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[YANG] Enhance the port yang model with new port fields: adv_speeds, interface_type and adv_interface_types (#6948)

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Enhance the port yang model with new port fields: adv_speeds, interface_types and adv_interface_types
Refer to HLD Azure/SONiC#732
This commit is contained in:
Junchao-Mellanox 2021-05-21 01:12:22 +08:00 committed by GitHub
parent 9387350e19
commit e17e9f4b60
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GPG Key ID: 4AEE18F83AFDEB23
4 changed files with 274 additions and 6 deletions
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38
src/sonic-yang-models/tests/yang_model_tests/tests/port.json
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@ -23,5 +23,43 @@
"desc": "PORT_INVALID_AUTONEG_TEST must condition failure.",
"eStrKey" : "Pattern",
"eStr": ["on|off"]
},
"PORT_VALID_ADVSPEEDS_TEST_1": {
"desc": "PORT_VALID_ADVSPEEDS_TEST_1 no failure."
},
"PORT_VALID_ADVSPEEDS_TEST_2": {
"desc": "PORT_VALID_ADVSPEEDS_TEST_2 no failure."
},
"PORT_INVALID_ADVSPEEDS_TEST_1": {
"desc": "PORT_INVALID_ADVSPEEDS_TEST_1 InvalidValue condition failure.",
"eStrKey" : "InvalidValue",
"eStr": ["adv_speeds"]
},
"PORT_INVALID_ADVSPEEDS_TEST_2": {
"desc": "PORT_INVALID_ADVSPEEDS_TEST_2 must condition failure.",
"eStrKey" : "Must"
},
"PORT_VALID_TYPE_TEST": {
"desc": "PORT_VALID_TYPE_TEST no failure."
},
"PORT_INVALID_TYPE_TEST": {
"desc": "PORT_INVALID_TYPE_TEST InvalidValue condition failure.",
"eStrKey" : "InvalidValue",
"eStr": ["interface_type"]
},
"PORT_VALID_ADVTYPES_TEST_1": {
"desc": "PORT_VALID_ADVTYPES_TEST_1 no failure."
},
"PORT_VALID_ADVTYPES_TEST_2": {
"desc": "PORT_VALID_ADVTYPES_TEST_2 no failure."
},
"PORT_INVALID_ADVTYPES_TEST_1": {
"desc": "PORT_INVALID_ADVTYPES_TEST_1 InvalidValue condition failure.",
"eStrKey" : "InvalidValue",
"eStr": ["adv_interface_types"]
},
"PORT_INVALID_ADVTYPES_TEST_2": {
"desc": "PORT_INVALID_ADVTYPES_TEST_2 must condition failure.",
"eStrKey" : "Must"
}
}

170
src/sonic-yang-models/tests/yang_model_tests/tests_config/port.json
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@ -83,5 +83,175 @@
]
}
}
},
"PORT_VALID_ADVSPEEDS_TEST_1": {
"sonic-port:sonic-port": {
"sonic-port:PORT": {
"PORT_LIST": [
{
"name": "Ethernet8",
"alias": "eth8",
"lanes": "65",
"speed": 25000,
"autoneg": "on",
"adv_speeds": [25000,40000]
}
]
}
}
},
"PORT_VALID_ADVSPEEDS_TEST_2": {
"sonic-port:sonic-port": {
"sonic-port:PORT": {
"PORT_LIST": [
{
"name": "Ethernet8",
"alias": "eth8",
"lanes": "65",
"speed": 25000,
"autoneg": "on",
"adv_speeds": ["all"]
}
]
}
}
},
"PORT_INVALID_ADVSPEEDS_TEST_1": {
"sonic-port:sonic-port": {
"sonic-port:PORT": {
"PORT_LIST": [
{
"name": "Ethernet8",
"alias": "eth8",
"lanes": "65",
"speed": 25000,
"autoneg": "on",
"adv_speeds": ["invalid"]
}
]
}
}
},
"PORT_INVALID_ADVSPEEDS_TEST_2": {
"sonic-port:sonic-port": {
"sonic-port:PORT": {
"PORT_LIST": [
{
"name": "Ethernet8",
"alias": "eth8",
"lanes": "65",
"speed": 25000,
"autoneg": "on",
"adv_speeds": ["all", "25000"]
}
]
}
}
},
"PORT_VALID_TYPE_TEST": {
"sonic-port:sonic-port": {
"sonic-port:PORT": {
"PORT_LIST": [
{
"name": "Ethernet8",
"alias": "eth8",
"lanes": "65",
"speed": 25000,
"autoneg": "on",
"interface_type": "CR4"
}
]
}
}
},
"PORT_INVALID_TYPE_TEST": {
"sonic-port:sonic-port": {
"sonic-port:PORT": {
"PORT_LIST": [
{
"name": "Ethernet8",
"alias": "eth8",
"lanes": "65",
"speed": 25000,
"autoneg": "on",
"interface_type": "Invalid"
}
]
}
}
},
"PORT_VALID_ADVTYPES_TEST_1": {
"sonic-port:sonic-port": {
"sonic-port:PORT": {
"PORT_LIST": [
{
"name": "Ethernet8",
"alias": "eth8",
"lanes": "65",
"speed": 25000,
"autoneg": "on",
"adv_interface_types": ["CR4", "CR"]
}
]
}
}
},
"PORT_VALID_ADVTYPES_TEST_2": {
"sonic-port:sonic-port": {
"sonic-port:PORT": {
"PORT_LIST": [
{
"name": "Ethernet8",
"alias": "eth8",
"lanes": "65",
"speed": 25000,
"autoneg": "on",
"adv_interface_types": ["all"]
}
]
}
}
},
"PORT_INVALID_ADVTYPES_TEST_1": {
"sonic-port:sonic-port": {
"sonic-port:PORT": {
"PORT_LIST": [
{
"name": "Ethernet8",
"alias": "eth8",
"lanes": "65",
"speed": 25000,
"autoneg": "on",
"adv_interface_types": ["Invalid"]
}
]
}
}
},
"PORT_INVALID_ADVTYPES_TEST_2": {
"sonic-port:sonic-port": {
"sonic-port:PORT": {
"PORT_LIST": [
{
"name": "Ethernet8",
"alias": "eth8",
"lanes": "65",
"speed": 25000,
"autoneg": "on",
"adv_interface_types": ["all", "CR4"]
}
]
}
}
}
}

48
src/sonic-yang-models/yang-models/sonic-port.yang
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@ -63,6 +63,48 @@ module sonic-port{
}
}
leaf autoneg {
description "Port auto negotiation mode";
type string {
pattern "on|off";
}
}
leaf-list adv_speeds {
description "Port advertised speeds, valid value could be a list of interger or all";
type union {
type uint32 {
range 1..400000;
}
type string {
pattern "all";
}
}
}
must "(count(adv_speeds[text()='all']) = 0) or (count(adv_speeds) = 1)";
leaf interface_type {
description "Port interface type";
type stypes:interface_type;
}
leaf-list adv_interface_types {
description "Port advertised interface type, valid value could be a list of stypes:interface_type or all";
type union {
type stypes:interface_type;
type string {
pattern "all";
}
}
}
must "(count(adv_interface_types[text()='all']) = 0) or (count(adv_interface_types) = 1)";
leaf mtu {
type uint16 {
range 1..9216;
@ -90,12 +132,6 @@ module sonic-port{
pattern "on|off";
}
}
leaf autoneg {
type string {
pattern "on|off";
}
}
} /* end of list PORT_LIST */
} /* end of container PORT */

24
src/sonic-yang-models/yang-models/sonic-types.yang
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@ -114,4 +114,28 @@ module sonic-types {
pattern "percentage|used|free|PERCENTAGE|USED|FREE";
}
}
typedef interface_type {
type enumeration {
enum CR;
enum CR2;
enum CR4;
enum SR;
enum SR2;
enum SR4;
enum LR;
enum LR4;
enum KR;
enum KR4;
enum CAUI;
enum GMII;
enum SFI;
enum XLAUI;
enum KR2;
enum CAUI4;
enum XAUI;
enum XFI;
enum XGMII;
}
}
}