sonic-buildimage Remove unused SAT port from arista configs. (#14167)
Why I did it To fix aristanetworks/sonic#85 How I did it Remove unnecessary SAT ports How to verify it Speed change from 400-100g without any error.
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@ -251,17 +251,6 @@ tm_port_header_type_out_202=ETH
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tm_port_header_type_in_203=INJECTED_2_PP
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tm_port_header_type_in_203=INJECTED_2_PP
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tm_port_header_type_out_203=ETH
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tm_port_header_type_out_203=ETH
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### SAT
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## Enable SAT Interface. 0 - Disable, 1 - Enable (Default)
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sat_enable=1
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ucode_port_218=SAT:core_0.218
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tm_port_header_type_out_218=CPU
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tm_port_header_type_in_218=INJECTED_2
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ucode_port_219=SAT:core_1.219
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tm_port_header_type_out_219=CPU
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tm_port_header_type_in_219=INJECTED_2
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port_init_speed_sat=400000
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### RCY
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### RCY
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sai_recycle_port_lane_base=200
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sai_recycle_port_lane_base=200
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ucode_port_49=RCY0:core_0.49
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ucode_port_49=RCY0:core_0.49
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@ -251,17 +251,6 @@ tm_port_header_type_out_202=ETH
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tm_port_header_type_in_203=INJECTED_2_PP
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tm_port_header_type_in_203=INJECTED_2_PP
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tm_port_header_type_out_203=ETH
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tm_port_header_type_out_203=ETH
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### SAT
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## Enable SAT Interface. 0 - Disable, 1 - Enable (Default)
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sat_enable=1
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ucode_port_218=SAT:core_0.218
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tm_port_header_type_out_218=CPU
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tm_port_header_type_in_218=INJECTED_2
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ucode_port_219=SAT:core_1.219
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tm_port_header_type_out_219=CPU
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tm_port_header_type_in_219=INJECTED_2
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port_init_speed_sat=400000
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### RCY
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### RCY
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sai_recycle_port_lane_base=200
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sai_recycle_port_lane_base=200
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ucode_port_49=RCY0:core_0.49
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ucode_port_49=RCY0:core_0.49
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@ -269,17 +269,6 @@ tm_port_header_type_out_202=ETH
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tm_port_header_type_in_203=INJECTED_2_PP
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tm_port_header_type_in_203=INJECTED_2_PP
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tm_port_header_type_out_203=ETH
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tm_port_header_type_out_203=ETH
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### SAT
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## Enable SAT Interface. 0 - Disable, 1 - Enable (Default)
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sat_enable=1
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ucode_port_218=SAT:core_0.218
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tm_port_header_type_out_218=CPU
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tm_port_header_type_in_218=INJECTED_2
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ucode_port_219=SAT:core_1.219
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tm_port_header_type_out_219=CPU
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tm_port_header_type_in_219=INJECTED_2
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port_init_speed_sat=400000
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### RCY
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### RCY
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sai_recycle_port_lane_base=0
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sai_recycle_port_lane_base=0
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ucode_port_221=RCY.21:core_0.221
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ucode_port_221=RCY.21:core_0.221
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@ -269,17 +269,6 @@ tm_port_header_type_out_202=ETH
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tm_port_header_type_in_203=INJECTED_2_PP
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tm_port_header_type_in_203=INJECTED_2_PP
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tm_port_header_type_out_203=ETH
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tm_port_header_type_out_203=ETH
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### SAT
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## Enable SAT Interface. 0 - Disable, 1 - Enable (Default)
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sat_enable=1
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ucode_port_218=SAT:core_0.218
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tm_port_header_type_out_218=CPU
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tm_port_header_type_in_218=INJECTED_2
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ucode_port_219=SAT:core_1.219
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tm_port_header_type_out_219=CPU
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tm_port_header_type_in_219=INJECTED_2
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port_init_speed_sat=400000
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### RCY
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### RCY
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sai_recycle_port_lane_base=0
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sai_recycle_port_lane_base=0
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ucode_port_221=RCY.21:core_0.221
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ucode_port_221=RCY.21:core_0.221
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@ -251,17 +251,6 @@ tm_port_header_type_out_202=ETH
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tm_port_header_type_in_203=INJECTED_2_PP
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tm_port_header_type_in_203=INJECTED_2_PP
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tm_port_header_type_out_203=ETH
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tm_port_header_type_out_203=ETH
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### SAT
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## Enable SAT Interface. 0 - Disable, 1 - Enable (Default)
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sat_enable=1
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ucode_port_218=SAT:core_0.218
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tm_port_header_type_out_218=CPU
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tm_port_header_type_in_218=INJECTED_2
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ucode_port_219=SAT:core_1.219
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tm_port_header_type_out_219=CPU
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tm_port_header_type_in_219=INJECTED_2
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port_init_speed_sat=400000
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### RCY
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### RCY
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sai_recycle_port_lane_base=200
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sai_recycle_port_lane_base=200
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ucode_port_49=RCY0:core_0.49
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ucode_port_49=RCY0:core_0.49
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@ -251,17 +251,6 @@ tm_port_header_type_out_202=ETH
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tm_port_header_type_in_203=INJECTED_2_PP
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tm_port_header_type_in_203=INJECTED_2_PP
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tm_port_header_type_out_203=ETH
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tm_port_header_type_out_203=ETH
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### SAT
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## Enable SAT Interface. 0 - Disable, 1 - Enable (Default)
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sat_enable=1
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ucode_port_218=SAT:core_0.218
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tm_port_header_type_out_218=CPU
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tm_port_header_type_in_218=INJECTED_2
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ucode_port_219=SAT:core_1.219
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tm_port_header_type_out_219=CPU
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tm_port_header_type_in_219=INJECTED_2
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port_init_speed_sat=400000
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### RCY
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### RCY
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sai_recycle_port_lane_base=200
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sai_recycle_port_lane_base=200
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ucode_port_49=RCY0:core_0.49
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ucode_port_49=RCY0:core_0.49
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