[device/dell] Add z9100 pfc T1 support (#1707)
This commit adds new code to support z9100 PFC T1 support with broadcom recommended MMU settings for PFC feature. Unit tested the setting by loading sonic-broadcom.bin and checking the hardware for the values from the JSON file. Added the config.bcm file th-z9100-32x100G.config.bcm to this folder and updated the sai.profile file to point to hwsku directory. sai.profile now points to /usr/share/sonic/hwsku/th-z9100-32x100G.config.bcm Signed-off-by: Harish Venkatraman <Harish_Venkatraman@dell.com>
This commit is contained in:
Harish Venkatraman
Ying Xie
parent
5feb3632c9
commit
d261506f84
@ -0,0 +1,2 @@
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{%- set default_topo = 't1' %}
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{%- include 'buffers_config.j2' %}
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{%- set default_cable = '40m' %}
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{%- macro generate_port_lists(PORT_ALL) %}
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{# Generate list of ports #}
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{%- for port_idx in range(0,32) %}
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{%- if PORT_ALL.append("Ethernet%d" % (port_idx*4)) %}{%- endif %}
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{%- endfor %}
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{%- endmacro %}
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{%- macro generate_buffer_pool_and_profiles() %}
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"BUFFER_POOL": {
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"ingress_lossless_pool": {
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"size": "10443264",
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"type": "ingress",
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"mode": "dynamic",
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"xoff": "4625920"
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},
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"egress_lossy_pool": {
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"size": "8877440",
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"type": "egress",
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"mode": "dynamic"
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},
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"egress_lossless_pool": {
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"size": "15982720",
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"type": "egress",
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"mode": "static"
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}
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},
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"BUFFER_PROFILE": {
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"ingress_lossy_profile": {
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"pool":"[BUFFER_POOL|ingress_lossless_pool]",
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"size":"0",
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"dynamic_th":"3"
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},
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"egress_lossless_profile": {
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"pool":"[BUFFER_POOL|egress_lossless_pool]",
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"size":"1518",
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"static_th":"3995680"
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},
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"egress_lossy_profile": {
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"pool":"[BUFFER_POOL|egress_lossy_pool]",
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"size":"1518",
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"dynamic_th":"3"
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}
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},
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{%- endmacro %}
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@ -0,0 +1,17 @@
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# PG lossless profiles.
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# speed cable size xon xoff threshold xon_offset
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10000 5m 1248 2288 35776 -4 2288
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25000 5m 1248 2288 53248 -4 2288
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40000 5m 1248 2288 66560 -4 2288
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50000 5m 1248 2288 79872 -4 2288
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100000 5m 1248 2288 165568 -4 2288
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10000 40m 1248 2288 37024 -4 2288
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25000 40m 1248 2288 56160 -4 2288
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40000 40m 1248 2288 71552 -4 2288
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50000 40m 1248 2288 85696 -4 2288
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100000 40m 1248 2288 177632 -4 2288
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10000 300m 1248 2288 46176 -4 2288
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25000 300m 1248 2288 79040 -4 2288
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40000 300m 1248 2288 108160 -4 2288
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50000 300m 1248 2288 131456 -4 2288
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100000 300m 1248 2288 268736 -4 2288
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167
device/dell/x86_64-dell_z9100_c2538-r0/Force10-Z9100/qos.json
Normal file
167
device/dell/x86_64-dell_z9100_c2538-r0/Force10-Z9100/qos.json
Normal file
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{
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"TC_TO_PRIORITY_GROUP_MAP": {
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"AZURE": {
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"0": "0",
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"1": "1",
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"2": "2",
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"3": "3",
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"4": "4",
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"5": "5",
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"6": "6",
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"7": "7"
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}
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},
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"MAP_PFC_PRIORITY_TO_QUEUE": {
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"AZURE": {
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"0": "0",
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"1": "1",
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"2": "2",
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"3": "3",
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"4": "4",
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"5": "5",
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"6": "6",
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"7": "7"
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}
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},
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"TC_TO_QUEUE_MAP": {
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"AZURE": {
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"0": "0",
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"1": "1",
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"2": "2",
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"3": "3",
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"4": "4",
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"5": "5",
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"6": "6",
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"7": "7"
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}
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},
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"DSCP_TO_TC_MAP": {
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"AZURE": {
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"0":"0",
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"1":"0",
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"2":"0",
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"3":"3",
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"4":"4",
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"5":"0",
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"6":"0",
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"7":"0",
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"8":"1",
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"9":"0",
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"10":"0",
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"11":"0",
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"12":"0",
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"13":"0",
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"14":"0",
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"15":"0",
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"16":"0",
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"17":"0",
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"18":"0",
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"19":"0",
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"20":"0",
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"21":"0",
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"22":"0",
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"23":"0",
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"24":"0",
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"25":"0",
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"26":"0",
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"27":"0",
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"28":"0",
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"29":"0",
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"30":"0",
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"31":"0",
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"32":"0",
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"33":"0",
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"34":"0",
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"35":"0",
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"36":"0",
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"37":"0",
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"38":"0",
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"39":"0",
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"40":"0",
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"41":"0",
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"42":"0",
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"43":"0",
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"44":"0",
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"45":"0",
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"46":"0",
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"47":"0",
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"48":"0",
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"49":"0",
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"50":"0",
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"51":"0",
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"52":"0",
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"53":"0",
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"54":"0",
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"55":"0",
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"56":"0",
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"57":"0",
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"58":"0",
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"59":"0",
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"60":"0",
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"61":"0",
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"62":"0",
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"63":"0"
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}
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},
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"SCHEDULER": {
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"scheduler.0" : {
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"type":"DWRR",
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"weight": "25"
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},
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"scheduler.1" : {
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"type":"DWRR",
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"weight": "30"
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},
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"scheduler.2" : {
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"type":"DWRR",
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"weight": "20"
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}
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},
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"PORT_QOS_MAP": {
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"Ethernet0,Ethernet4,Ethernet8,Ethernet12,Ethernet16,Ethernet20,Ethernet24,Ethernet28,Ethernet32,Ethernet36,Ethernet40,Ethernet44,Ethernet48,Ethernet52,Ethernet56,Ethernet60,Ethernet64,Ethernet68,Ethernet72,Ethernet76,Ethernet80,Ethernet84,Ethernet88,Ethernet92,Ethernet96,Ethernet100,Ethernet104,Ethernet108,Ethernet112,Ethernet116,Ethernet120,Ethernet124": {
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"dscp_to_tc_map" : "[DSCP_TO_TC_MAP|AZURE]",
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"tc_to_queue_map" : "[TC_TO_QUEUE_MAP|AZURE]",
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"tc_to_pg_map" : "[TC_TO_PRIORITY_GROUP_MAP|AZURE]",
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"pfc_to_queue_map": "[MAP_PFC_PRIORITY_TO_QUEUE|AZURE]",
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"pfc_enable": "3,4"
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}
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},
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"WRED_PROFILE": {
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"AZURE_LOSSY" : {
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"wred_green_enable":"true",
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"wred_yellow_enable":"true",
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"ecn":"ecn_all",
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"red_max_threshold":"512000",
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"red_min_threshold":"512000",
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"yellow_max_threshold":"512000",
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"yellow_min_threshold":"512000",
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"green_max_threshold": "184320",
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"green_min_threshold": "184320"
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},
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"AZURE_LOSSLESS" : {
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"wred_green_enable":"true",
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"wred_yellow_enable":"true",
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"ecn":"ecn_all",
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"red_max_threshold":"512000",
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"red_min_threshold":"512000",
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"yellow_max_threshold":"512000",
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"yellow_min_threshold":"512000",
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"green_max_threshold": "184320",
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"green_min_threshold": "184320"
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}
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},
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"QUEUE": {
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"Ethernet0,Ethernet4,Ethernet8,Ethernet12,Ethernet16,Ethernet20,Ethernet24,Ethernet28,Ethernet32,Ethernet36,Ethernet40,Ethernet44,Ethernet48,Ethernet52,Ethernet56,Ethernet60,Ethernet64,Ethernet68,Ethernet72,Ethernet76,Ethernet80,Ethernet84,Ethernet88,Ethernet92,Ethernet96,Ethernet100,Ethernet104,Ethernet108,Ethernet112,Ethernet116,Ethernet120,Ethernet124|0-1" : {
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"wred_profile" : "[WRED_PROFILE|AZURE_LOSSY]"
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},
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"Ethernet0,Ethernet4,Ethernet8,Ethernet12,Ethernet16,Ethernet20,Ethernet24,Ethernet28,Ethernet32,Ethernet36,Ethernet40,Ethernet44,Ethernet48,Ethernet52,Ethernet56,Ethernet60,Ethernet64,Ethernet68,Ethernet72,Ethernet76,Ethernet80,Ethernet84,Ethernet88,Ethernet92,Ethernet96,Ethernet100,Ethernet104,Ethernet108,Ethernet112,Ethernet116,Ethernet120,Ethernet124|3-4" : {
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"scheduler" : "[SCHEDULER|scheduler.0]"
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},
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"Ethernet0,Ethernet4,Ethernet8,Ethernet12,Ethernet16,Ethernet20,Ethernet24,Ethernet28,Ethernet32,Ethernet36,Ethernet40,Ethernet44,Ethernet48,Ethernet52,Ethernet56,Ethernet60,Ethernet64,Ethernet68,Ethernet72,Ethernet76,Ethernet80,Ethernet84,Ethernet88,Ethernet92,Ethernet96,Ethernet100,Ethernet104,Ethernet108,Ethernet112,Ethernet116,Ethernet120,Ethernet124|0" : {
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"scheduler" : "[SCHEDULER|scheduler.1]"
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},
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"Ethernet0,Ethernet4,Ethernet8,Ethernet12,Ethernet16,Ethernet20,Ethernet24,Ethernet28,Ethernet32,Ethernet36,Ethernet40,Ethernet44,Ethernet48,Ethernet52,Ethernet56,Ethernet60,Ethernet64,Ethernet68,Ethernet72,Ethernet76,Ethernet80,Ethernet84,Ethernet88,Ethernet92,Ethernet96,Ethernet100,Ethernet104,Ethernet108,Ethernet112,Ethernet116,Ethernet120,Ethernet124|1" : {
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"scheduler" : "[SCHEDULER|scheduler.2]"
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}
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}
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}
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@ -1 +1 @@
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SAI_INIT_CONFIG_FILE=/etc/bcm/th-z9100-32x100G.config.bcm
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SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/th-z9100-32x100G.config.bcm
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#TH Z9100 32x100
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l3_alpm_enable=2
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bcm_num_cos=8
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switch_bypass_mode=0
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mmu_lossless=0
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lpm_scaling_enable=0
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lpm_ipv6_128b_reserved=0
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ipv6_lpm_128b_enable=1
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os=unix
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#Parity
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parity_correction=1
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parity_enable=1
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scache_filename=/tmp/scache
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#Port configuration
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portmap_38=49:100
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portmap_39=53:100
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portmap_40=57:100
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portmap_41=61:100
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portmap_68=65:100
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portmap_69=69:100
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portmap_70=73:100
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portmap_71=77:100
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portmap_35=37:100
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portmap_34=33:100
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portmap_37=45:100
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portmap_36=41:100
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portmap_72=81:100
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portmap_73=85:100
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portmap_74=89:100
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portmap_75=93:100
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portmap_102=97:100
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portmap_103=101:100
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portmap_104=105:100
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portmap_105=109:100
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portmap_6=21:100
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portmap_5=17:100
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portmap_8=29:100
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portmap_7=25:100
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portmap_107=117:100
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portmap_106=113:100
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portmap_109=125:100
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portmap_108=121:100
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portmap_2=5:100
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portmap_1=1:100
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portmap_4=13:100
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portmap_3=9:100
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portmap_66=129:10
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portmap_100=131:10
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portmap_33=132:10
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portmap_67=133:10
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portmap_101=134:10
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portmap_135=135:10
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xgxs_tx_lane_map_ce0=0x0132
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xgxs_rx_lane_map_ce0=0x1023
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phy_xaui_tx_polarity_flip_ce0=0xe
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phy_xaui_rx_polarity_flip_ce0=0xc
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xgxs_tx_lane_map_ce1=0x2301
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xgxs_rx_lane_map_ce1=0x1302
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phy_xaui_tx_polarity_flip_ce1=0x2
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phy_xaui_rx_polarity_flip_ce1=0xd
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xgxs_tx_lane_map_ce2=0x0123
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xgxs_rx_lane_map_ce2=0x1203
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phy_xaui_tx_polarity_flip_ce2=0xa
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phy_xaui_rx_polarity_flip_ce2=0x2
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xgxs_tx_lane_map_ce3=0x3201
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xgxs_rx_lane_map_ce3=0x1302
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phy_xaui_tx_polarity_flip_ce3=0xb
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phy_xaui_rx_polarity_flip_ce3=0xf
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xgxs_tx_lane_map_ce4=0x3210
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xgxs_rx_lane_map_ce4=0x3201
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phy_xaui_tx_polarity_flip_ce4=0x2
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phy_xaui_rx_polarity_flip_ce4=0xc
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xgxs_tx_lane_map_ce5=0x2301
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xgxs_rx_lane_map_ce5=0x1302
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phy_xaui_tx_polarity_flip_ce5=0x0
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phy_xaui_rx_polarity_flip_ce5=0x2
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xgxs_tx_lane_map_ce6=0x0123
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xgxs_rx_lane_map_ce6=0x1203
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phy_xaui_tx_polarity_flip_ce6=0x0
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phy_xaui_rx_polarity_flip_ce6=0x2
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xgxs_tx_lane_map_ce7=0x1320
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xgxs_rx_lane_map_ce7=0x2301
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phy_xaui_tx_polarity_flip_ce7=0xa
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phy_xaui_rx_polarity_flip_ce7=0xd
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xgxs_tx_lane_map_ce8=0x1032
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xgxs_rx_lane_map_ce8=0x0312
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phy_xaui_tx_polarity_flip_ce8=0x0
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phy_xaui_rx_polarity_flip_ce8=0xd
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xgxs_tx_lane_map_ce9=0x2031
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xgxs_rx_lane_map_ce9=0x1302
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phy_xaui_tx_polarity_flip_ce9=0xb
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phy_xaui_rx_polarity_flip_ce9=0xa
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xgxs_tx_lane_map_ce10=0x1023
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xgxs_rx_lane_map_ce10=0x2103
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phy_xaui_tx_polarity_flip_ce10=0xe
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phy_xaui_rx_polarity_flip_ce10=0x7
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xgxs_tx_lane_map_ce11=0x0132
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xgxs_rx_lane_map_ce11=0x3210
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phy_xaui_tx_polarity_flip_ce11=0x6
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phy_xaui_rx_polarity_flip_ce11=0xf
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xgxs_tx_lane_map_ce12=0x0213
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xgxs_rx_lane_map_ce12=0x2301
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phy_xaui_tx_polarity_flip_ce12=0x6
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phy_xaui_rx_polarity_flip_ce12=0xf
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xgxs_tx_lane_map_ce13=0x1032
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xgxs_rx_lane_map_ce13=0x0213
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phy_xaui_tx_polarity_flip_ce13=0xf
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phy_xaui_rx_polarity_flip_ce13=0xd
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xgxs_tx_lane_map_ce14=0x0132
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xgxs_rx_lane_map_ce14=0x3210
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phy_xaui_tx_polarity_flip_ce14=0x5
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phy_xaui_rx_polarity_flip_ce14=0x4
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xgxs_tx_lane_map_ce15=0x0123
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xgxs_rx_lane_map_ce15=0x3210
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phy_xaui_tx_polarity_flip_ce15=0x8
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phy_xaui_rx_polarity_flip_ce15=0xb
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xgxs_tx_lane_map_ce16=0x0123
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xgxs_rx_lane_map_ce16=0x3201
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phy_xaui_tx_polarity_flip_ce16=0xf
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phy_xaui_rx_polarity_flip_ce16=0x2
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xgxs_tx_lane_map_ce17=0x0123
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xgxs_rx_lane_map_ce17=0x0213
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phy_xaui_tx_polarity_flip_ce17=0xf
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phy_xaui_rx_polarity_flip_ce17=0xd
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xgxs_tx_lane_map_ce18=0x1032
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xgxs_rx_lane_map_ce18=0x3210
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phy_xaui_tx_polarity_flip_ce18=0xf
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phy_xaui_rx_polarity_flip_ce18=0xf
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xgxs_tx_lane_map_ce19=0x0123
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xgxs_rx_lane_map_ce19=0x3210
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phy_xaui_tx_polarity_flip_ce19=0xf
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phy_xaui_rx_polarity_flip_ce19=0x0
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xgxs_tx_lane_map_ce20=0x2301
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xgxs_rx_lane_map_ce20=0x3102
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phy_xaui_tx_polarity_flip_ce20=0xf
|
||||
phy_xaui_rx_polarity_flip_ce20=0x0
|
||||
xgxs_tx_lane_map_ce21=0x3102
|
||||
xgxs_rx_lane_map_ce21=0x2103
|
||||
phy_xaui_tx_polarity_flip_ce21=0xf
|
||||
phy_xaui_rx_polarity_flip_ce21=0x5
|
||||
xgxs_tx_lane_map_ce22=0x1023
|
||||
xgxs_rx_lane_map_ce22=0x2301
|
||||
phy_xaui_tx_polarity_flip_ce22=0xb
|
||||
phy_xaui_rx_polarity_flip_ce22=0x0
|
||||
xgxs_tx_lane_map_ce23=0x2130
|
||||
xgxs_rx_lane_map_ce23=0x2310
|
||||
phy_xaui_tx_polarity_flip_ce23=0xa
|
||||
phy_xaui_rx_polarity_flip_ce23=0x2
|
||||
xgxs_tx_lane_map_ce24=0x2310
|
||||
xgxs_rx_lane_map_ce24=0x3201
|
||||
phy_xaui_tx_polarity_flip_ce24=0xf
|
||||
phy_xaui_rx_polarity_flip_ce24=0xc
|
||||
xgxs_tx_lane_map_ce25=0x2013
|
||||
xgxs_rx_lane_map_ce25=0x0123
|
||||
phy_xaui_tx_polarity_flip_ce25=0x0
|
||||
phy_xaui_rx_polarity_flip_ce25=0x8
|
||||
xgxs_tx_lane_map_ce26=0x0132
|
||||
xgxs_rx_lane_map_ce26=0x1023
|
||||
phy_xaui_tx_polarity_flip_ce26=0xb
|
||||
phy_xaui_rx_polarity_flip_ce26=0x4
|
||||
xgxs_tx_lane_map_ce27=0x0123
|
||||
xgxs_rx_lane_map_ce27=0x0213
|
||||
phy_xaui_tx_polarity_flip_ce27=0x7
|
||||
phy_xaui_rx_polarity_flip_ce27=0x7
|
||||
xgxs_tx_lane_map_ce28=0x0213
|
||||
xgxs_rx_lane_map_ce28=0x1203
|
||||
phy_xaui_tx_polarity_flip_ce28=0x8
|
||||
phy_xaui_rx_polarity_flip_ce28=0x7
|
||||
xgxs_tx_lane_map_ce29=0x0123
|
||||
xgxs_rx_lane_map_ce29=0x0213
|
||||
phy_xaui_tx_polarity_flip_ce29=0x3
|
||||
phy_xaui_rx_polarity_flip_ce29=0x9
|
||||
xgxs_tx_lane_map_ce30=0x2301
|
||||
xgxs_rx_lane_map_ce30=0x3201
|
||||
phy_xaui_tx_polarity_flip_ce30=0xc
|
||||
phy_xaui_rx_polarity_flip_ce30=0xc
|
||||
xgxs_tx_lane_map_ce31=0x0123
|
||||
xgxs_rx_lane_map_ce31=0x0213
|
||||
phy_xaui_tx_polarity_flip_ce31=0x3
|
||||
phy_xaui_rx_polarity_flip_ce31=0x8
|
||||
dport_map_port_38=1
|
||||
dport_map_port_39=2
|
||||
dport_map_port_40=3
|
||||
dport_map_port_41=4
|
||||
dport_map_port_68=5
|
||||
dport_map_port_69=6
|
||||
dport_map_port_70=7
|
||||
dport_map_port_71=8
|
||||
dport_map_port_35=9
|
||||
dport_map_port_34=10
|
||||
dport_map_port_37=11
|
||||
dport_map_port_36=12
|
||||
dport_map_port_72=13
|
||||
dport_map_port_73=14
|
||||
dport_map_port_74=15
|
||||
dport_map_port_75=16
|
||||
dport_map_port_102=17
|
||||
dport_map_port_103=18
|
||||
dport_map_port_104=19
|
||||
dport_map_port_105=20
|
||||
dport_map_port_6=21
|
||||
dport_map_port_5=22
|
||||
dport_map_port_8=23
|
||||
dport_map_port_7=24
|
||||
dport_map_port_107=25
|
||||
dport_map_port_106=26
|
||||
dport_map_port_109=27
|
||||
dport_map_port_108=28
|
||||
dport_map_port_2=29
|
||||
dport_map_port_1=30
|
||||
dport_map_port_4=31
|
||||
dport_map_port_3=32
|
||||
oversubscribe_mode=1
|
||||
pbmp_xport_xe=0x3fd000000ff4000003fc000001fe
|
||||
serdes_if_type_xe=14
|
||||
serdes_if_type_ce=14
|
||||
|
||||
mmu_init_config="MSFT-TH-Tier1"
|
||||
Loading…
Reference in New Issue
Block a user