update sdk and sai for 201807 (#2330)
* update device driver and support qos and fix some driver bug * modified device file for support qos and fix some device init error
This commit is contained in:
simonJi2018
lguohan
parent
fea4bdfc04
commit
c164caf529
@ -0,0 +1,2 @@
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{%- set default_topo = 't0' %}
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{%- include 'buffers_config.j2' %}
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@ -0,0 +1,72 @@
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{% set default_cable = '5m' %}
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{% set ingress_lossless_pool_size = '20971328' %}
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{% set ingress_lossy_pool_size = '20971328' %}
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{% set egress_lossless_pool_size = '20971328' %}
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{% set egress_lossy_pool_size = '20971328' %}
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{%- macro generate_port_lists(PORT_ALL) %}
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{# Generate list of ports #}
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{%- for port_idx in range(0, 48) %}
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{%- if PORT_ALL.append("Ethernet%d" % (port_idx)) %}{%- endif %}
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{%- endfor %}
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{%- for port_idx in range(48, 54) %}
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{%- if PORT_ALL.append("Ethernet%d" % (48 + (port_idx-48) * 4)) %}{%- endif %}
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{%- endfor %}
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{%- endmacro %}
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{%- macro generate_buffer_pool_and_profiles() %}
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"BUFFER_POOL": {
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"ingress_lossless_pool": {
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"size": "{{ ingress_lossless_pool_size }}",
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"type": "ingress",
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"mode": "dynamic"
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},
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"ingress_lossy_pool": {
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"size": "{{ ingress_lossy_pool_size }}",
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"type": "ingress",
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"mode": "dynamic"
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},
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"egress_lossless_pool": {
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"size": "{{ egress_lossless_pool_size }}",
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"type": "egress",
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"mode": "dynamic"
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},
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"egress_lossy_pool": {
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"size": "{{ egress_lossy_pool_size }}",
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"type": "egress",
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"mode": "dynamic"
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}
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},
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"BUFFER_PROFILE": {
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"ingress_lossless_profile": {
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"pool":"[BUFFER_POOL|ingress_lossless_pool]",
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"xon":"78400",
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"xoff":"132160",
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"size":"3584",
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"static_th":"82880"
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},
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"ingress_lossy_profile": {
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"pool":"[BUFFER_POOL|ingress_lossy_pool]",
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"size":"3584",
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"dynamic_th":"-1"
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},
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"egress_lossy_profile": {
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"pool":"[BUFFER_POOL|egress_lossy_pool]",
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"size":"3584",
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"dynamic_th":"-4"
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}
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},
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{%- endmacro %}
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{# the typo of generate_pg_profils dued to buffers_config.j2 #}
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{# Default, we do not bind any buffer profiles. #}
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{%- macro generate_pg_profils(port_names) %}
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"BUFFER_PG": {
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}
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{%- endmacro %}
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{# Default, we do not bind any buffer profiles. #}
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{%- macro generate_queue_buffers(port_names) %}
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"BUFFER_QUEUE": {
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}
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{%- endmacro %}
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@ -0,0 +1,72 @@
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{% set default_cable = '5m' %}
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{% set ingress_lossless_pool_size = '20971328' %}
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{% set ingress_lossy_pool_size = '20971328' %}
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{% set egress_lossless_pool_size = '20971328' %}
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{% set egress_lossy_pool_size = '20971328' %}
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{%- macro generate_port_lists(PORT_ALL) %}
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{# Generate list of ports #}
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{%- for port_idx in range(0, 48) %}
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{%- if PORT_ALL.append("Ethernet%d" % (port_idx)) %}{%- endif %}
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{%- endfor %}
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{%- for port_idx in range(48, 54) %}
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{%- if PORT_ALL.append("Ethernet%d" % (48 + (port_idx-48) * 4)) %}{%- endif %}
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{%- endfor %}
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{%- endmacro %}
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{%- macro generate_buffer_pool_and_profiles() %}
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"BUFFER_POOL": {
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"ingress_lossless_pool": {
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"size": "{{ ingress_lossless_pool_size }}",
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"type": "ingress",
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"mode": "dynamic"
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},
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"ingress_lossy_pool": {
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"size": "{{ ingress_lossy_pool_size }}",
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"type": "ingress",
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"mode": "dynamic"
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},
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"egress_lossless_pool": {
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"size": "{{ egress_lossless_pool_size }}",
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"type": "egress",
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"mode": "dynamic"
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},
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"egress_lossy_pool": {
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"size": "{{ egress_lossy_pool_size }}",
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"type": "egress",
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"mode": "dynamic"
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}
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},
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"BUFFER_PROFILE": {
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"ingress_lossless_profile": {
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"pool":"[BUFFER_POOL|ingress_lossless_pool]",
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"xon":"78400",
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"xoff":"132160",
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"size":"3584",
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"static_th":"82880"
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},
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"ingress_lossy_profile": {
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"pool":"[BUFFER_POOL|ingress_lossy_pool]",
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"size":"3584",
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"dynamic_th":"-1"
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},
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"egress_lossy_profile": {
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"pool":"[BUFFER_POOL|egress_lossy_pool]",
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"size":"3584",
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"dynamic_th":"-4"
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}
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},
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{%- endmacro %}
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{# the typo of generate_pg_profils dued to buffers_config.j2 #}
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{# Default, we do not bind any buffer profiles. #}
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{%- macro generate_pg_profils(port_names) %}
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"BUFFER_PG": {
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}
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{%- endmacro %}
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{# Default, we do not bind any buffer profiles. #}
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{%- macro generate_queue_buffers(port_names) %}
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"BUFFER_QUEUE": {
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}
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{%- endmacro %}
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@ -0,0 +1,17 @@
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# PG lossless profiles.
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# speed cable size xon xoff threshold
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10000 5m 3584 32256 59136 36736
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25000 5m 3584 41216 68096 45696
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40000 5m 3584 47488 74368 51968
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50000 5m 3584 52864 79744 57344
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100000 5m 3584 78400 132160 82880
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10000 40m 3584 32256 59136 36736
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25000 40m 3584 41216 68096 45696
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40000 40m 3584 47488 74368 51968
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50000 40m 3584 52864 79744 57344
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100000 40m 3584 78400 132160 82880
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10000 300m 3584 32256 65856 36736
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25000 300m 3584 41216 84672 45696
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40000 300m 3584 47488 101024 51968
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50000 300m 3584 52864 113120 57344
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100000 300m 3584 78400 198688 82880
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@ -47,12 +47,9 @@ Ethernet44 76 Ethernet45/1 44
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Ethernet45 77 Ethernet46/1 45
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Ethernet46 78 Ethernet47/1 46
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Ethernet47 79 Ethernet48/1 47
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Ethernet48 80 Ethernet49/1 48
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Ethernet49 81 Ethernet50/1 49
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Ethernet50 82 Ethernet51/1 50
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Ethernet51 83 Ethernet52/1 51
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Ethernet52 84,85,86,87 Ethernet53/1 52
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Ethernet53 104,105,106,107 Ethernet54/1 53
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Ethernet54 108,109,110,111 Ethernet55/1 54
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Ethernet55 112,113,114,115 Ethernet56/1 55
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Ethernet56 116,117,118,119 Ethernet57/1 56
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Ethernet48 84,85,86,87 Ethernet49/1 48
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Ethernet49 80,81,82,83 Ethernet50/1 49
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Ethernet50 104,105,106,107 Ethernet51/1 50
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Ethernet51 108,109,110,111 Ethernet52/1 51
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Ethernet52 112,113,114,115 Ethernet53/1 52
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Ethernet53 116,117,118,119 Ethernet54/1 53
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@ -0,0 +1,414 @@
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init start stage unit=0 low-level
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init set port-map unit=0 port=0 eth-macro=2 lane=0 max-speed=25g active=true
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init set port-map unit=0 port=1 eth-macro=2 lane=1 max-speed=25g active=true
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init set port-map unit=0 port=2 eth-macro=2 lane=2 max-speed=25g active=true
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init set port-map unit=0 port=3 eth-macro=2 lane=3 max-speed=25g active=true
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init set port-map unit=0 port=4 eth-macro=3 lane=0 max-speed=25g active=true
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init set port-map unit=0 port=5 eth-macro=3 lane=1 max-speed=25g active=true
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init set port-map unit=0 port=6 eth-macro=3 lane=2 max-speed=25g active=true
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init set port-map unit=0 port=7 eth-macro=3 lane=3 max-speed=25g active=true
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init set port-map unit=0 port=8 eth-macro=4 lane=0 max-speed=25g active=true
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init set port-map unit=0 port=9 eth-macro=4 lane=1 max-speed=25g active=true
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init set port-map unit=0 port=10 eth-macro=4 lane=2 max-speed=25g active=true
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init set port-map unit=0 port=11 eth-macro=4 lane=3 max-speed=25g active=true
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init set port-map unit=0 port=12 eth-macro=5 lane=0 max-speed=25g active=true
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init set port-map unit=0 port=13 eth-macro=5 lane=1 max-speed=25g active=true
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init set port-map unit=0 port=14 eth-macro=5 lane=2 max-speed=25g active=true
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init set port-map unit=0 port=15 eth-macro=5 lane=3 max-speed=25g active=true
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init set port-map unit=0 port=16 eth-macro=8 lane=0 max-speed=25g active=true
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init set port-map unit=0 port=17 eth-macro=8 lane=1 max-speed=25g active=true
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init set port-map unit=0 port=18 eth-macro=8 lane=2 max-speed=25g active=true
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init set port-map unit=0 port=19 eth-macro=8 lane=3 max-speed=25g active=true
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init set port-map unit=0 port=20 eth-macro=10 lane=0 max-speed=25g active=true
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init set port-map unit=0 port=21 eth-macro=10 lane=1 max-speed=25g active=true
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init set port-map unit=0 port=22 eth-macro=10 lane=2 max-speed=25g active=true
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init set port-map unit=0 port=23 eth-macro=10 lane=3 max-speed=25g active=true
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init set port-map unit=0 port=24 eth-macro=12 lane=0 max-speed=25g active=true
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init set port-map unit=0 port=25 eth-macro=12 lane=1 max-speed=25g active=true
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init set port-map unit=0 port=26 eth-macro=12 lane=2 max-speed=25g active=true
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init set port-map unit=0 port=27 eth-macro=12 lane=3 max-speed=25g active=true
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init set port-map unit=0 port=28 eth-macro=14 lane=0 max-speed=25g active=true
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init set port-map unit=0 port=29 eth-macro=14 lane=1 max-speed=25g active=true
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init set port-map unit=0 port=30 eth-macro=14 lane=2 max-speed=25g active=true
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init set port-map unit=0 port=31 eth-macro=14 lane=3 max-speed=25g active=true
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init set port-map unit=0 port=32 eth-macro=16 lane=0 max-speed=25g active=true
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init set port-map unit=0 port=33 eth-macro=16 lane=1 max-speed=25g active=true
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init set port-map unit=0 port=34 eth-macro=16 lane=2 max-speed=25g active=true
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init set port-map unit=0 port=35 eth-macro=16 lane=3 max-speed=25g active=true
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init set port-map unit=0 port=36 eth-macro=17 lane=0 max-speed=25g active=true
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init set port-map unit=0 port=37 eth-macro=17 lane=1 max-speed=25g active=true
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init set port-map unit=0 port=38 eth-macro=17 lane=2 max-speed=25g active=true
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init set port-map unit=0 port=39 eth-macro=17 lane=3 max-speed=25g active=true
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init set port-map unit=0 port=40 eth-macro=18 lane=0 max-speed=25g active=true
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init set port-map unit=0 port=41 eth-macro=18 lane=1 max-speed=25g active=true
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init set port-map unit=0 port=42 eth-macro=18 lane=2 max-speed=25g active=true
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init set port-map unit=0 port=43 eth-macro=18 lane=3 max-speed=25g active=true
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init set port-map unit=0 port=44 eth-macro=19 lane=0 max-speed=25g active=true
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init set port-map unit=0 port=45 eth-macro=19 lane=1 max-speed=25g active=true
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init set port-map unit=0 port=46 eth-macro=19 lane=2 max-speed=25g active=true
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init set port-map unit=0 port=47 eth-macro=19 lane=3 max-speed=25g active=true
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init set port-map unit=0 port=48 eth-macro=21 lane=0 max-speed=100g active=true
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init set port-map unit=0 port=49 eth-macro=20 lane=0 max-speed=100g active=true
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init set port-map unit=0 port=50 eth-macro=26 lane=0 max-speed=100g active=true
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init set port-map unit=0 port=51 eth-macro=27 lane=0 max-speed=100g active=true
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init set port-map unit=0 port=52 eth-macro=28 lane=0 max-speed=100g active=true
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init set port-map unit=0 port=53 eth-macro=29 lane=0 max-speed=100g active=true
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init set port-map unit=0 port=129 eth-macro=0 lane=1 max-speed=10g active=true guarantee=true cpi=true
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init set port-map unit=0 port=130 eth-macro=0 lane=0 max-speed=10g active=true guarantee=true cpi=true init-done=true
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init start stage unit=0 task-rsrc
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init start stage unit=0 module
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init start stage unit=0 task
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phy set lane-swap portlist=0 lane-cnt=1 property=tx data=0x0
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phy set lane-swap portlist=1 lane-cnt=1 property=tx data=0x1
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phy set lane-swap portlist=2 lane-cnt=1 property=tx data=0x2
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phy set lane-swap portlist=3 lane-cnt=1 property=tx data=0x3
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phy set lane-swap portlist=4 lane-cnt=1 property=tx data=0x3
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phy set lane-swap portlist=5 lane-cnt=1 property=tx data=0x2
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phy set lane-swap portlist=6 lane-cnt=1 property=tx data=0x1
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phy set lane-swap portlist=7 lane-cnt=1 property=tx data=0x0
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phy set lane-swap portlist=8 lane-cnt=1 property=tx data=0x0
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phy set lane-swap portlist=9 lane-cnt=1 property=tx data=0x1
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phy set lane-swap portlist=10 lane-cnt=1 property=tx data=0x2
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phy set lane-swap portlist=11 lane-cnt=1 property=tx data=0x3
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phy set lane-swap portlist=12 lane-cnt=1 property=tx data=0x3
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phy set lane-swap portlist=13 lane-cnt=1 property=tx data=0x2
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phy set lane-swap portlist=14 lane-cnt=1 property=tx data=0x1
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phy set lane-swap portlist=15 lane-cnt=1 property=tx data=0x0
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phy set lane-swap portlist=16 lane-cnt=1 property=tx data=0x3
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phy set lane-swap portlist=17 lane-cnt=1 property=tx data=0x2
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phy set lane-swap portlist=18 lane-cnt=1 property=tx data=0x0
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phy set lane-swap portlist=19 lane-cnt=1 property=tx data=0x1
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phy set lane-swap portlist=20 lane-cnt=1 property=tx data=0x3
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phy set lane-swap portlist=21 lane-cnt=1 property=tx data=0x2
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phy set lane-swap portlist=22 lane-cnt=1 property=tx data=0x1
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phy set lane-swap portlist=23 lane-cnt=1 property=tx data=0x0
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phy set lane-swap portlist=24 lane-cnt=1 property=tx data=0x3
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phy set lane-swap portlist=25 lane-cnt=1 property=tx data=0x2
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phy set lane-swap portlist=26 lane-cnt=1 property=tx data=0x1
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phy set lane-swap portlist=27 lane-cnt=1 property=tx data=0x0
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phy set lane-swap portlist=28 lane-cnt=1 property=tx data=0x3
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phy set lane-swap portlist=29 lane-cnt=1 property=tx data=0x2
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phy set lane-swap portlist=30 lane-cnt=1 property=tx data=0x1
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phy set lane-swap portlist=31 lane-cnt=1 property=tx data=0x0
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phy set lane-swap portlist=32 lane-cnt=1 property=tx data=0x0
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phy set lane-swap portlist=33 lane-cnt=1 property=tx data=0x1
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phy set lane-swap portlist=34 lane-cnt=1 property=tx data=0x2
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phy set lane-swap portlist=35 lane-cnt=1 property=tx data=0x3
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phy set lane-swap portlist=36 lane-cnt=1 property=tx data=0x0
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phy set lane-swap portlist=37 lane-cnt=1 property=tx data=0x1
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phy set lane-swap portlist=38 lane-cnt=1 property=tx data=0x2
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phy set lane-swap portlist=39 lane-cnt=1 property=tx data=0x3
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phy set lane-swap portlist=40 lane-cnt=1 property=tx data=0x0
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phy set lane-swap portlist=41 lane-cnt=1 property=tx data=0x1
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phy set lane-swap portlist=42 lane-cnt=1 property=tx data=0x2
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phy set lane-swap portlist=43 lane-cnt=1 property=tx data=0x3
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phy set lane-swap portlist=44 lane-cnt=1 property=tx data=0x0
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phy set lane-swap portlist=45 lane-cnt=1 property=tx data=0x1
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phy set lane-swap portlist=46 lane-cnt=1 property=tx data=0x2
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phy set lane-swap portlist=47 lane-cnt=1 property=tx data=0x3
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phy set lane-swap portlist=48 lane-cnt=4 property=tx data=0x1.3.0.2
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phy set lane-swap portlist=49 lane-cnt=4 property=tx data=0x0.3.1.2
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phy set lane-swap portlist=50 lane-cnt=4 property=tx data=0x1.3.0.2
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phy set lane-swap portlist=51 lane-cnt=4 property=tx data=0x2.0.3.1
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phy set lane-swap portlist=52 lane-cnt=4 property=tx data=0x3.2.1.0
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phy set lane-swap portlist=53 lane-cnt=4 property=tx data=0x3.2.1.0
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phy set lane-swap portlist=0 lane-cnt=1 property=rx data=0x0
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phy set lane-swap portlist=1 lane-cnt=1 property=rx data=0x1
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phy set lane-swap portlist=2 lane-cnt=1 property=rx data=0x2
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phy set lane-swap portlist=3 lane-cnt=1 property=rx data=0x3
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phy set lane-swap portlist=4 lane-cnt=1 property=rx data=0x3
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phy set lane-swap portlist=5 lane-cnt=1 property=rx data=0x2
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phy set lane-swap portlist=6 lane-cnt=1 property=rx data=0x1
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phy set lane-swap portlist=7 lane-cnt=1 property=rx data=0x0
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phy set lane-swap portlist=8 lane-cnt=1 property=rx data=0x0
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phy set lane-swap portlist=9 lane-cnt=1 property=rx data=0x1
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phy set lane-swap portlist=10 lane-cnt=1 property=rx data=0x2
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phy set lane-swap portlist=11 lane-cnt=1 property=rx data=0x3
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phy set lane-swap portlist=12 lane-cnt=1 property=rx data=0x3
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phy set lane-swap portlist=13 lane-cnt=1 property=rx data=0x2
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phy set lane-swap portlist=14 lane-cnt=1 property=rx data=0x0
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phy set lane-swap portlist=15 lane-cnt=1 property=rx data=0x1
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phy set lane-swap portlist=16 lane-cnt=1 property=rx data=0x0
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phy set lane-swap portlist=17 lane-cnt=1 property=rx data=0x3
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phy set lane-swap portlist=18 lane-cnt=1 property=rx data=0x2
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phy set lane-swap portlist=19 lane-cnt=1 property=rx data=0x1
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phy set lane-swap portlist=20 lane-cnt=1 property=rx data=0x3
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phy set lane-swap portlist=21 lane-cnt=1 property=rx data=0x0
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phy set lane-swap portlist=22 lane-cnt=1 property=rx data=0x1
|
||||
phy set lane-swap portlist=23 lane-cnt=1 property=rx data=0x2
|
||||
phy set lane-swap portlist=24 lane-cnt=1 property=rx data=0x3
|
||||
phy set lane-swap portlist=25 lane-cnt=1 property=rx data=0x0
|
||||
phy set lane-swap portlist=26 lane-cnt=1 property=rx data=0x1
|
||||
phy set lane-swap portlist=27 lane-cnt=1 property=rx data=0x2
|
||||
phy set lane-swap portlist=28 lane-cnt=1 property=rx data=0x3
|
||||
phy set lane-swap portlist=29 lane-cnt=1 property=rx data=0x0
|
||||
phy set lane-swap portlist=30 lane-cnt=1 property=rx data=0x1
|
||||
phy set lane-swap portlist=31 lane-cnt=1 property=rx data=0x2
|
||||
phy set lane-swap portlist=32 lane-cnt=1 property=rx data=0x1
|
||||
phy set lane-swap portlist=33 lane-cnt=1 property=rx data=0x2
|
||||
phy set lane-swap portlist=34 lane-cnt=1 property=rx data=0x3
|
||||
phy set lane-swap portlist=35 lane-cnt=1 property=rx data=0x0
|
||||
phy set lane-swap portlist=36 lane-cnt=1 property=rx data=0x1
|
||||
phy set lane-swap portlist=37 lane-cnt=1 property=rx data=0x2
|
||||
phy set lane-swap portlist=38 lane-cnt=1 property=rx data=0x3
|
||||
phy set lane-swap portlist=39 lane-cnt=1 property=rx data=0x0
|
||||
phy set lane-swap portlist=40 lane-cnt=1 property=rx data=0x1
|
||||
phy set lane-swap portlist=41 lane-cnt=1 property=rx data=0x2
|
||||
phy set lane-swap portlist=42 lane-cnt=1 property=rx data=0x3
|
||||
phy set lane-swap portlist=43 lane-cnt=1 property=rx data=0x0
|
||||
phy set lane-swap portlist=44 lane-cnt=1 property=rx data=0x1
|
||||
phy set lane-swap portlist=45 lane-cnt=1 property=rx data=0x2
|
||||
phy set lane-swap portlist=46 lane-cnt=1 property=rx data=0x3
|
||||
phy set lane-swap portlist=47 lane-cnt=1 property=rx data=0x0
|
||||
phy set lane-swap portlist=48 lane-cnt=4 property=rx data=0x2.1.0.3
|
||||
phy set lane-swap portlist=49 lane-cnt=4 property=rx data=0x0.1.3.2
|
||||
phy set lane-swap portlist=50 lane-cnt=4 property=rx data=0x3.1.0.2
|
||||
phy set lane-swap portlist=51 lane-cnt=4 property=rx data=0x1.3.0.2
|
||||
phy set lane-swap portlist=52 lane-cnt=4 property=rx data=0x3.2.1.0
|
||||
phy set lane-swap portlist=53 lane-cnt=4 property=rx data=0x3.2.1.0
|
||||
phy set polarity-rev portlist=0 lane-cnt=1 property=tx data=0x0
|
||||
phy set polarity-rev portlist=1 lane-cnt=1 property=tx data=0x0
|
||||
phy set polarity-rev portlist=2 lane-cnt=1 property=tx data=0x0
|
||||
phy set polarity-rev portlist=3 lane-cnt=1 property=tx data=0x0
|
||||
phy set polarity-rev portlist=4 lane-cnt=1 property=tx data=0x0
|
||||
phy set polarity-rev portlist=5 lane-cnt=1 property=tx data=0x0
|
||||
phy set polarity-rev portlist=6 lane-cnt=1 property=tx data=0x0
|
||||
phy set polarity-rev portlist=7 lane-cnt=1 property=tx data=0x0
|
||||
phy set polarity-rev portlist=8 lane-cnt=1 property=tx data=0x0
|
||||
phy set polarity-rev portlist=9 lane-cnt=1 property=tx data=0x0
|
||||
phy set polarity-rev portlist=10 lane-cnt=1 property=tx data=0x0
|
||||
phy set polarity-rev portlist=11 lane-cnt=1 property=tx data=0x0
|
||||
phy set polarity-rev portlist=12 lane-cnt=1 property=tx data=0x0
|
||||
phy set polarity-rev portlist=13 lane-cnt=1 property=tx data=0x0
|
||||
phy set polarity-rev portlist=14 lane-cnt=1 property=tx data=0x0
|
||||
phy set polarity-rev portlist=15 lane-cnt=1 property=tx data=0x0
|
||||
phy set polarity-rev portlist=16 lane-cnt=1 property=tx data=0x0
|
||||
phy set polarity-rev portlist=17 lane-cnt=1 property=tx data=0x0
|
||||
phy set polarity-rev portlist=18 lane-cnt=1 property=tx data=0x0
|
||||
phy set polarity-rev portlist=19 lane-cnt=1 property=tx data=0x0
|
||||
phy set polarity-rev portlist=20 lane-cnt=1 property=tx data=0x0
|
||||
phy set polarity-rev portlist=21 lane-cnt=1 property=tx data=0x0
|
||||
phy set polarity-rev portlist=22 lane-cnt=1 property=tx data=0x0
|
||||
phy set polarity-rev portlist=23 lane-cnt=1 property=tx data=0x0
|
||||
phy set polarity-rev portlist=24 lane-cnt=1 property=tx data=0x0
|
||||
phy set polarity-rev portlist=25 lane-cnt=1 property=tx data=0x0
|
||||
phy set polarity-rev portlist=26 lane-cnt=1 property=tx data=0x0
|
||||
phy set polarity-rev portlist=27 lane-cnt=1 property=tx data=0x0
|
||||
phy set polarity-rev portlist=28 lane-cnt=1 property=tx data=0x0
|
||||
phy set polarity-rev portlist=29 lane-cnt=1 property=tx data=0x0
|
||||
phy set polarity-rev portlist=30 lane-cnt=1 property=tx data=0x0
|
||||
phy set polarity-rev portlist=31 lane-cnt=1 property=tx data=0x0
|
||||
phy set polarity-rev portlist=32 lane-cnt=1 property=tx data=0x0
|
||||
phy set polarity-rev portlist=33 lane-cnt=1 property=tx data=0x0
|
||||
phy set polarity-rev portlist=34 lane-cnt=1 property=tx data=0x0
|
||||
phy set polarity-rev portlist=35 lane-cnt=1 property=tx data=0x0
|
||||
phy set polarity-rev portlist=36 lane-cnt=1 property=tx data=0x0
|
||||
phy set polarity-rev portlist=37 lane-cnt=1 property=tx data=0x0
|
||||
phy set polarity-rev portlist=38 lane-cnt=1 property=tx data=0x0
|
||||
phy set polarity-rev portlist=39 lane-cnt=1 property=tx data=0x0
|
||||
phy set polarity-rev portlist=40 lane-cnt=1 property=tx data=0x0
|
||||
phy set polarity-rev portlist=41 lane-cnt=1 property=tx data=0x0
|
||||
phy set polarity-rev portlist=42 lane-cnt=1 property=tx data=0x0
|
||||
phy set polarity-rev portlist=43 lane-cnt=1 property=tx data=0x0
|
||||
phy set polarity-rev portlist=44 lane-cnt=1 property=tx data=0x0
|
||||
phy set polarity-rev portlist=45 lane-cnt=1 property=tx data=0x0
|
||||
phy set polarity-rev portlist=46 lane-cnt=1 property=tx data=0x0
|
||||
phy set polarity-rev portlist=47 lane-cnt=1 property=tx data=0x0
|
||||
phy set polarity-rev portlist=48 lane-cnt=4 property=tx data=0x0.0.0.1
|
||||
phy set polarity-rev portlist=49 lane-cnt=4 property=tx data=0x0.0.0.0
|
||||
phy set polarity-rev portlist=50 lane-cnt=4 property=tx data=0x1.1.0.0
|
||||
phy set polarity-rev portlist=51 lane-cnt=4 property=tx data=0x0.0.0.0
|
||||
phy set polarity-rev portlist=52 lane-cnt=4 property=tx data=0x0.0.0.0
|
||||
phy set polarity-rev portlist=53 lane-cnt=4 property=tx data=0x0.0.0.0
|
||||
phy set polarity-rev portlist=0 lane-cnt=1 property=rx data=0x0
|
||||
phy set polarity-rev portlist=1 lane-cnt=1 property=rx data=0x0
|
||||
phy set polarity-rev portlist=2 lane-cnt=1 property=rx data=0x0
|
||||
phy set polarity-rev portlist=3 lane-cnt=1 property=rx data=0x0
|
||||
phy set polarity-rev portlist=4 lane-cnt=1 property=rx data=0x0
|
||||
phy set polarity-rev portlist=5 lane-cnt=1 property=rx data=0x0
|
||||
phy set polarity-rev portlist=6 lane-cnt=1 property=rx data=0x0
|
||||
phy set polarity-rev portlist=7 lane-cnt=1 property=rx data=0x0
|
||||
phy set polarity-rev portlist=8 lane-cnt=1 property=rx data=0x0
|
||||
phy set polarity-rev portlist=9 lane-cnt=1 property=rx data=0x0
|
||||
phy set polarity-rev portlist=10 lane-cnt=1 property=rx data=0x0
|
||||
phy set polarity-rev portlist=11 lane-cnt=1 property=rx data=0x0
|
||||
phy set polarity-rev portlist=12 lane-cnt=1 property=rx data=0x0
|
||||
phy set polarity-rev portlist=13 lane-cnt=1 property=rx data=0x0
|
||||
phy set polarity-rev portlist=14 lane-cnt=1 property=rx data=0x0
|
||||
phy set polarity-rev portlist=15 lane-cnt=1 property=rx data=0x0
|
||||
phy set polarity-rev portlist=16 lane-cnt=1 property=rx data=0x0
|
||||
phy set polarity-rev portlist=17 lane-cnt=1 property=rx data=0x0
|
||||
phy set polarity-rev portlist=18 lane-cnt=1 property=rx data=0x0
|
||||
phy set polarity-rev portlist=19 lane-cnt=1 property=rx data=0x0
|
||||
phy set polarity-rev portlist=20 lane-cnt=1 property=rx data=0x0
|
||||
phy set polarity-rev portlist=21 lane-cnt=1 property=rx data=0x0
|
||||
phy set polarity-rev portlist=22 lane-cnt=1 property=rx data=0x0
|
||||
phy set polarity-rev portlist=23 lane-cnt=1 property=rx data=0x0
|
||||
phy set polarity-rev portlist=24 lane-cnt=1 property=rx data=0x0
|
||||
phy set polarity-rev portlist=25 lane-cnt=1 property=rx data=0x0
|
||||
phy set polarity-rev portlist=26 lane-cnt=1 property=rx data=0x0
|
||||
phy set polarity-rev portlist=27 lane-cnt=1 property=rx data=0x0
|
||||
phy set polarity-rev portlist=28 lane-cnt=1 property=rx data=0x0
|
||||
phy set polarity-rev portlist=29 lane-cnt=1 property=rx data=0x0
|
||||
phy set polarity-rev portlist=30 lane-cnt=1 property=rx data=0x0
|
||||
phy set polarity-rev portlist=31 lane-cnt=1 property=rx data=0x0
|
||||
phy set polarity-rev portlist=32 lane-cnt=1 property=rx data=0x0
|
||||
phy set polarity-rev portlist=33 lane-cnt=1 property=rx data=0x0
|
||||
phy set polarity-rev portlist=34 lane-cnt=1 property=rx data=0x0
|
||||
phy set polarity-rev portlist=35 lane-cnt=1 property=rx data=0x0
|
||||
phy set polarity-rev portlist=36 lane-cnt=1 property=rx data=0x0
|
||||
phy set polarity-rev portlist=37 lane-cnt=1 property=rx data=0x0
|
||||
phy set polarity-rev portlist=38 lane-cnt=1 property=rx data=0x0
|
||||
phy set polarity-rev portlist=39 lane-cnt=1 property=rx data=0x0
|
||||
phy set polarity-rev portlist=40 lane-cnt=1 property=rx data=0x0
|
||||
phy set polarity-rev portlist=41 lane-cnt=1 property=rx data=0x0
|
||||
phy set polarity-rev portlist=42 lane-cnt=1 property=rx data=0x0
|
||||
phy set polarity-rev portlist=43 lane-cnt=1 property=rx data=0x0
|
||||
phy set polarity-rev portlist=44 lane-cnt=1 property=rx data=0x0
|
||||
phy set polarity-rev portlist=45 lane-cnt=1 property=rx data=0x0
|
||||
phy set polarity-rev portlist=46 lane-cnt=1 property=rx data=0x0
|
||||
phy set polarity-rev portlist=47 lane-cnt=1 property=rx data=0x0
|
||||
phy set polarity-rev portlist=48 lane-cnt=4 property=rx data=0x0.1.0.1
|
||||
phy set polarity-rev portlist=49 lane-cnt=4 property=rx data=0x1.0.1.0
|
||||
phy set polarity-rev portlist=50 lane-cnt=4 property=rx data=0x0.0.1.0
|
||||
phy set polarity-rev portlist=51 lane-cnt=4 property=rx data=0x0.0.0.1
|
||||
phy set polarity-rev portlist=52 lane-cnt=4 property=rx data=0x0.0.0.0
|
||||
phy set polarity-rev portlist=53 lane-cnt=4 property=rx data=0x0.0.0.0
|
||||
phy set pre-emphasis portlist=0 lane-cnt=4 property=c2 data=0x2.2.2.2
|
||||
phy set pre-emphasis portlist=0 lane-cnt=4 property=cn1 data=0x1.1.1.1
|
||||
phy set pre-emphasis portlist=0 lane-cnt=4 property=c0 data=0x1a.1a.1a.1a
|
||||
phy set pre-emphasis portlist=0 lane-cnt=4 property=c1 data=0x7.7.7.7
|
||||
phy set pre-emphasis portlist=4 lane-cnt=4 property=c2 data=0x2.2.2.2
|
||||
phy set pre-emphasis portlist=4 lane-cnt=4 property=cn1 data=0x1.1.1.1
|
||||
phy set pre-emphasis portlist=4 lane-cnt=4 property=c0 data=0x1a.1a.1a.1a
|
||||
phy set pre-emphasis portlist=4 lane-cnt=4 property=c1 data=0x7.7.7.7
|
||||
phy set pre-emphasis portlist=8 lane-cnt=4 property=c2 data=0x2.2.2.2
|
||||
phy set pre-emphasis portlist=8 lane-cnt=4 property=cn1 data=0x0.0.0.0
|
||||
phy set pre-emphasis portlist=8 lane-cnt=4 property=c0 data=0x1c.1c.1c.1c
|
||||
phy set pre-emphasis portlist=8 lane-cnt=4 property=c1 data=0x6.6.6.6
|
||||
phy set pre-emphasis portlist=12 lane-cnt=4 property=c2 data=0x2.2.2.2
|
||||
phy set pre-emphasis portlist=12 lane-cnt=4 property=cn1 data=0x0.0.0.0
|
||||
phy set pre-emphasis portlist=12 lane-cnt=4 property=c0 data=0x1b.1b.1b.1b
|
||||
phy set pre-emphasis portlist=12 lane-cnt=4 property=c1 data=0x7.7.7.7
|
||||
phy set pre-emphasis portlist=16 lane-cnt=4 property=c2 data=0x2.2.2.2
|
||||
phy set pre-emphasis portlist=16 lane-cnt=4 property=cn1 data=0x0.0.0.0
|
||||
phy set pre-emphasis portlist=16 lane-cnt=4 property=c0 data=0x1c.1c.1c.1c
|
||||
phy set pre-emphasis portlist=16 lane-cnt=4 property=c1 data=0x6.6.6.6
|
||||
phy set pre-emphasis portlist=20 lane-cnt=4 property=c2 data=0x2.2.2.2
|
||||
phy set pre-emphasis portlist=20 lane-cnt=4 property=cn1 data=0x0.0.0.0
|
||||
phy set pre-emphasis portlist=20 lane-cnt=4 property=c0 data=0x1c.1c.1c.1c
|
||||
phy set pre-emphasis portlist=20 lane-cnt=4 property=c1 data=0x6.6.6.6
|
||||
phy set pre-emphasis portlist=24 lane-cnt=4 property=c2 data=0x2.2.2.2
|
||||
phy set pre-emphasis portlist=24 lane-cnt=4 property=cn1 data=0x0.0.0.0
|
||||
phy set pre-emphasis portlist=24 lane-cnt=4 property=c0 data=0x1c.1c.1c.1c
|
||||
phy set pre-emphasis portlist=24 lane-cnt=4 property=c1 data=0x6.6.6.6
|
||||
phy set pre-emphasis portlist=28 lane-cnt=4 property=c2 data=0x2.2.2.2
|
||||
phy set pre-emphasis portlist=28 lane-cnt=4 property=cn1 data=0x0.0.0.0
|
||||
phy set pre-emphasis portlist=28 lane-cnt=4 property=c0 data=0x1c.1c.1c.1c
|
||||
phy set pre-emphasis portlist=28 lane-cnt=4 property=c1 data=0x6.6.6.6
|
||||
phy set pre-emphasis portlist=32 lane-cnt=4 property=c2 data=0x2.2.2.2
|
||||
phy set pre-emphasis portlist=32 lane-cnt=4 property=cn1 data=0x0.0.0.0
|
||||
phy set pre-emphasis portlist=32 lane-cnt=4 property=c0 data=0x1c.1c.1c.1c
|
||||
phy set pre-emphasis portlist=32 lane-cnt=4 property=c1 data=0x6.6.6.6
|
||||
phy set pre-emphasis portlist=36 lane-cnt=4 property=c2 data=0x2.2.2.2
|
||||
phy set pre-emphasis portlist=36 lane-cnt=4 property=cn1 data=0x0.0.0.0
|
||||
phy set pre-emphasis portlist=36 lane-cnt=4 property=c0 data=0x1c.1c.1c.1c
|
||||
phy set pre-emphasis portlist=36 lane-cnt=4 property=c1 data=0x6.6.6.6
|
||||
phy set pre-emphasis portlist=40 lane-cnt=4 property=c2 data=0x2.2.2.2
|
||||
phy set pre-emphasis portlist=40 lane-cnt=4 property=cn1 data=0x0.0.0.0
|
||||
phy set pre-emphasis portlist=40 lane-cnt=4 property=c0 data=0x1c.1c.1c.1c
|
||||
phy set pre-emphasis portlist=40 lane-cnt=4 property=c1 data=0x6.6.6.6
|
||||
phy set pre-emphasis portlist=44 lane-cnt=4 property=c2 data=0x2.2.2.2
|
||||
phy set pre-emphasis portlist=44 lane-cnt=4 property=cn1 data=0x0.0.0.0
|
||||
phy set pre-emphasis portlist=44 lane-cnt=4 property=c0 data=0x1c.1c.1c.1c
|
||||
phy set pre-emphasis portlist=44 lane-cnt=4 property=c1 data=0x6.6.6.6
|
||||
phy set pre-emphasis portlist=48 lane-cnt=4 property=c2 data=0x2.2.2.2
|
||||
phy set pre-emphasis portlist=48 lane-cnt=4 property=cn1 data=0x0.0.0.0
|
||||
phy set pre-emphasis portlist=48 lane-cnt=4 property=c0 data=0x1b.1b.1b.1b
|
||||
phy set pre-emphasis portlist=48 lane-cnt=4 property=c1 data=0x6.6.6.6
|
||||
phy set pre-emphasis portlist=49 lane-cnt=4 property=c2 data=0x2.2.2.2
|
||||
phy set pre-emphasis portlist=49 lane-cnt=4 property=cn1 data=0x0.0.0.0
|
||||
phy set pre-emphasis portlist=49 lane-cnt=4 property=c0 data=0x1b.1b.1b.1b
|
||||
phy set pre-emphasis portlist=49 lane-cnt=4 property=c1 data=0x6.6.6.6
|
||||
phy set pre-emphasis portlist=50 lane-cnt=4 property=c2 data=0x2.2.2.2
|
||||
phy set pre-emphasis portlist=50 lane-cnt=4 property=cn1 data=0x0.0.0.0
|
||||
phy set pre-emphasis portlist=50 lane-cnt=4 property=c0 data=0x1b.1b.1b.1b
|
||||
phy set pre-emphasis portlist=50 lane-cnt=4 property=c1 data=0x7.7.7.7
|
||||
phy set pre-emphasis portlist=51 lane-cnt=4 property=c2 data=0x2.2.2.2
|
||||
phy set pre-emphasis portlist=51 lane-cnt=4 property=cn1 data=0x0.0.0.0
|
||||
phy set pre-emphasis portlist=51 lane-cnt=4 property=c0 data=0x1b.1b.1b.1b
|
||||
phy set pre-emphasis portlist=51 lane-cnt=4 property=c1 data=0x7.7.7.7
|
||||
phy set pre-emphasis portlist=52 lane-cnt=4 property=c2 data=0x2.2.2.2
|
||||
phy set pre-emphasis portlist=52 lane-cnt=4 property=cn1 data=0x0.0.0.0
|
||||
phy set pre-emphasis portlist=52 lane-cnt=4 property=c0 data=0x1a.1a.1a.1a
|
||||
phy set pre-emphasis portlist=52 lane-cnt=4 property=c1 data=0x8.8.8.8
|
||||
phy set pre-emphasis portlist=53 lane-cnt=4 property=c2 data=0x2.2.2.2
|
||||
phy set pre-emphasis portlist=53 lane-cnt=4 property=cn1 data=0x1.1.1.1
|
||||
phy set pre-emphasis portlist=53 lane-cnt=4 property=c0 data=0x1a.1a.1a.1a
|
||||
phy set pre-emphasis portlist=53 lane-cnt=4 property=c1 data=0x7.7.7.7
|
||||
phy set mdio portlist=0 devad=0x1E addr=0x2 data=0x8000
|
||||
phy set mdio portlist=1 devad=0x1E addr=0x2 data=0x8000
|
||||
phy set mdio portlist=2 devad=0x1E addr=0x2 data=0x8000
|
||||
phy set mdio portlist=3 devad=0x1E addr=0x2 data=0x8000
|
||||
phy set mdio portlist=4 devad=0x1E addr=0x2 data=0x8000
|
||||
phy set mdio portlist=5 devad=0x1E addr=0x2 data=0x8000
|
||||
phy set mdio portlist=6 devad=0x1E addr=0x2 data=0x8000
|
||||
phy set mdio portlist=7 devad=0x1E addr=0x2 data=0x8000
|
||||
phy set mdio portlist=8 devad=0x1E addr=0x2 data=0x8000
|
||||
phy set mdio portlist=9 devad=0x1E addr=0x2 data=0x8000
|
||||
phy set mdio portlist=10 devad=0x1E addr=0x2 data=0x8000
|
||||
phy set mdio portlist=11 devad=0x1E addr=0x2 data=0x8000
|
||||
phy set mdio portlist=12 devad=0x1E addr=0x2 data=0x8000
|
||||
phy set mdio portlist=13 devad=0x1E addr=0x2 data=0x8000
|
||||
phy set mdio portlist=14 devad=0x1E addr=0x2 data=0x8000
|
||||
phy set mdio portlist=15 devad=0x1E addr=0x2 data=0x8000
|
||||
phy set mdio portlist=16 devad=0x1E addr=0x2 data=0x8000
|
||||
phy set mdio portlist=17 devad=0x1E addr=0x2 data=0x8000
|
||||
phy set mdio portlist=18 devad=0x1E addr=0x2 data=0x8000
|
||||
phy set mdio portlist=19 devad=0x1E addr=0x2 data=0x8000
|
||||
phy set mdio portlist=20 devad=0x1E addr=0x2 data=0x8000
|
||||
phy set mdio portlist=21 devad=0x1E addr=0x2 data=0x8000
|
||||
phy set mdio portlist=22 devad=0x1E addr=0x2 data=0x8000
|
||||
phy set mdio portlist=23 devad=0x1E addr=0x2 data=0x8000
|
||||
phy set mdio portlist=24 devad=0x1E addr=0x2 data=0x8000
|
||||
phy set mdio portlist=25 devad=0x1E addr=0x2 data=0x8000
|
||||
phy set mdio portlist=26 devad=0x1E addr=0x2 data=0x8000
|
||||
phy set mdio portlist=27 devad=0x1E addr=0x2 data=0x8000
|
||||
phy set mdio portlist=28 devad=0x1E addr=0x2 data=0x8000
|
||||
phy set mdio portlist=29 devad=0x1E addr=0x2 data=0x8000
|
||||
phy set mdio portlist=30 devad=0x1E addr=0x2 data=0x8000
|
||||
phy set mdio portlist=31 devad=0x1E addr=0x2 data=0x8000
|
||||
phy set mdio portlist=32 devad=0x1E addr=0x2 data=0x8000
|
||||
phy set mdio portlist=33 devad=0x1E addr=0x2 data=0x8000
|
||||
phy set mdio portlist=34 devad=0x1E addr=0x2 data=0x8000
|
||||
phy set mdio portlist=35 devad=0x1E addr=0x2 data=0x8000
|
||||
phy set mdio portlist=36 devad=0x1E addr=0x2 data=0x8000
|
||||
phy set mdio portlist=37 devad=0x1E addr=0x2 data=0x8000
|
||||
phy set mdio portlist=38 devad=0x1E addr=0x2 data=0x8000
|
||||
phy set mdio portlist=39 devad=0x1E addr=0x2 data=0x8000
|
||||
phy set mdio portlist=40 devad=0x1E addr=0x2 data=0x8000
|
||||
phy set mdio portlist=41 devad=0x1E addr=0x2 data=0x8000
|
||||
phy set mdio portlist=42 devad=0x1E addr=0x2 data=0x8000
|
||||
phy set mdio portlist=43 devad=0x1E addr=0x2 data=0x8000
|
||||
phy set mdio portlist=44 devad=0x1E addr=0x2 data=0x8000
|
||||
phy set mdio portlist=45 devad=0x1E addr=0x2 data=0x8000
|
||||
phy set mdio portlist=46 devad=0x1E addr=0x2 data=0x8000
|
||||
phy set mdio portlist=47 devad=0x1E addr=0x2 data=0x8000
|
||||
phy set mdio portlist=48 devad=0x1E addr=0x2 data=0x8000
|
||||
phy set mdio portlist=49 devad=0x1E addr=0x2 data=0x8000
|
||||
phy set mdio portlist=50 devad=0x1E addr=0x2 data=0x8000
|
||||
phy set mdio portlist=51 devad=0x1E addr=0x2 data=0x8000
|
||||
phy set mdio portlist=52 devad=0x1E addr=0x2 data=0x8000
|
||||
phy set mdio portlist=53 devad=0x1E addr=0x2 data=0x8000
|
||||
phy set mdio portlist=129 devad=0x1E addr=0x2 data=0x0000
|
||||
phy set mdio portlist=130 devad=0x1E addr=0x2 data=0x0000
|
||||
port set property portlist=0-47 speed=25g
|
||||
port set property portlist=48-53 speed=100g
|
||||
port set property portlist=129-130 speed=10g
|
||||
port set property portlist=0-47 medium-type=sr
|
||||
port set property portlist=48-53 medium-type=sr4
|
||||
port set property portlist=129-130 medium-type=kr
|
||||
port set adver portlist=129-130 speed-10g-kr
|
||||
port set property portlist=129-130 an=enable
|
||||
port set property portlist=0-53,129-130 admin=enable
|
||||
|
||||
@ -1,55 +0,0 @@
|
||||
# name lanes alias index
|
||||
Ethernet0 8 Ethernet1/1 0
|
||||
Ethernet1 9 Ethernet2/1 1
|
||||
Ethernet2 10 Ethernet3/1 2
|
||||
Ethernet3 11 Ethernet4/1 3
|
||||
Ethernet4 12 Ethernet5/1 4
|
||||
Ethernet5 13 Ethernet6/1 5
|
||||
Ethernet6 14 Ethernet7/1 6
|
||||
Ethernet7 15 Ethernet8/1 7
|
||||
Ethernet8 16 Ethernet9/1 8
|
||||
Ethernet9 17 Ethernet10/1 9
|
||||
Ethernet10 18 Ethernet11/1 10
|
||||
Ethernet11 19 Ethernet12/1 11
|
||||
Ethernet12 20 Ethernet13/1 12
|
||||
Ethernet13 21 Ethernet14/1 13
|
||||
Ethernet14 22 Ethernet15/1 14
|
||||
Ethernet15 23 Ethernet16/1 15
|
||||
Ethernet16 32 Ethernet17/1 16
|
||||
Ethernet17 33 Ethernet18/1 17
|
||||
Ethernet18 34 Ethernet19/1 18
|
||||
Ethernet19 35 Ethernet20/1 19
|
||||
Ethernet20 40 Ethernet21/1 20
|
||||
Ethernet21 41 Ethernet22/1 21
|
||||
Ethernet22 42 Ethernet23/1 22
|
||||
Ethernet23 43 Ethernet24/1 23
|
||||
Ethernet24 48 Ethernet25/1 24
|
||||
Ethernet25 49 Ethernet26/1 25
|
||||
Ethernet26 50 Ethernet27/1 26
|
||||
Ethernet27 51 Ethernet28/1 27
|
||||
Ethernet28 56 Ethernet29/1 28
|
||||
Ethernet29 57 Ethernet30/1 29
|
||||
Ethernet30 58 Ethernet31/1 30
|
||||
Ethernet31 59 Ethernet32/1 31
|
||||
Ethernet32 64 Ethernet33/1 32
|
||||
Ethernet33 65 Ethernet34/1 33
|
||||
Ethernet34 66 Ethernet35/1 34
|
||||
Ethernet35 67 Ethernet36/1 35
|
||||
Ethernet36 68 Ethernet37/1 36
|
||||
Ethernet37 69 Ethernet38/1 37
|
||||
Ethernet38 70 Ethernet39/1 38
|
||||
Ethernet39 71 Ethernet40/1 39
|
||||
Ethernet40 72 Ethernet41/1 40
|
||||
Ethernet41 73 Ethernet42/1 41
|
||||
Ethernet42 74 Ethernet43/1 42
|
||||
Ethernet43 75 Ethernet44/1 43
|
||||
Ethernet44 76 Ethernet45/1 44
|
||||
Ethernet45 77 Ethernet46/1 45
|
||||
Ethernet46 78 Ethernet47/1 46
|
||||
Ethernet47 79 Ethernet48/1 47
|
||||
Ethernet48 80,81,82,83 Ethernet49/1 48
|
||||
Ethernet49 84,85,86,87 Ethernet50/1 49
|
||||
Ethernet50 104,105,106,107 Ethernet51/1 50
|
||||
Ethernet51 108,109,110,111 Ethernet52/1 51
|
||||
Ethernet52 112,113,114,115 Ethernet53/1 52
|
||||
Ethernet53 116,117,118,119 Ethernet54/1 56
|
||||
@ -104,13 +104,6 @@
|
||||
}
|
||||
},
|
||||
"PORT_QOS_MAP": {
|
||||
"Ethernet0,Ethernet1,Ethernet2,Ethernet3,Ethernet4,Ethernet5,Ethernet6,Ethernet7,Ethernet8,Ethernet9,Ethernet10,Ethernet11,Ethernet12,Ethernet13,Ethernet14,Ethernet15,Ethernet16,Ethernet17,Ethernet18,Ethernet19,Ethernet20,Ethernet21,Ethernet22,Ethernet23,Ethernet24,Ethernet25,Ethernet26,Ethernet27,Ethernet28,Ethernet29,Ethernet30,Ethernet31,Ethernet32,Ethernet33,Ethernet34,Ethernet35,Ethernet36,Ethernet37,Ethernet38,Ethernet39,Ethernet40,Ethernet41,Ethernet42,Ethernet43,Ethernet44,Ethernet45,Ethernet46,Ethernet47,Ethernet48,Ethernet49,Ethernet50,Ethernet51,Ethernet52,Ethernet53": {
|
||||
"dscp_to_tc_map" : "[DSCP_TO_TC_MAP|AZURE]",
|
||||
"tc_to_queue_map" : "[TC_TO_QUEUE_MAP|AZURE]",
|
||||
"tc_to_pg_map" : "[TC_TO_PRIORITY_GROUP_MAP|AZURE]",
|
||||
"pfc_to_queue_map": "[MAP_PFC_PRIORITY_TO_QUEUE|AZURE]",
|
||||
"pfc_enable": "3,4"
|
||||
}
|
||||
},
|
||||
"WRED_PROFILE": {
|
||||
"AZURE_LOSSY" : {
|
||||
@ -118,36 +111,26 @@
|
||||
"wred_yellow_enable":"true",
|
||||
"wred_red_enable":"true",
|
||||
"ecn":"ecn_all",
|
||||
"red_max_threshold":"516096",
|
||||
"red_min_threshold":"516096",
|
||||
"yellow_max_threshold":"516096",
|
||||
"yellow_min_threshold":"516096",
|
||||
"green_max_threshold": "184128",
|
||||
"green_min_threshold": "184128"
|
||||
"red_max_threshold":"613984",
|
||||
"red_min_threshold":"76608",
|
||||
"yellow_max_threshold":"628320",
|
||||
"yellow_min_threshold":"78400",
|
||||
"green_max_threshold": "642656",
|
||||
"green_min_threshold": "80192"
|
||||
},
|
||||
"AZURE_LOSSLESS" : {
|
||||
"wred_green_enable":"true",
|
||||
"wred_yellow_enable":"true",
|
||||
"wred_red_enable":"true",
|
||||
"ecn":"ecn_all",
|
||||
"red_max_threshold":"516096",
|
||||
"red_min_threshold":"516096",
|
||||
"yellow_max_threshold":"516096",
|
||||
"yellow_min_threshold":"516096",
|
||||
"green_max_threshold": "184128",
|
||||
"green_min_threshold": "184128"
|
||||
"red_max_threshold":"613984",
|
||||
"red_min_threshold":"76608",
|
||||
"yellow_max_threshold":"628320",
|
||||
"yellow_min_threshold":"78400",
|
||||
"green_max_threshold": "642656",
|
||||
"green_min_threshold": "80192"
|
||||
}
|
||||
},
|
||||
"QUEUE": {
|
||||
"Ethernet0,Ethernet1,Ethernet2,Ethernet3,Ethernet4,Ethernet5,Ethernet6,Ethernet7,Ethernet8,Ethernet9,Ethernet10,Ethernet11,Ethernet12,Ethernet13,Ethernet14,Ethernet15,Ethernet16,Ethernet17,Ethernet18,Ethernet19,Ethernet20,Ethernet21,Ethernet22,Ethernet23,Ethernet24,Ethernet25,Ethernet26,Ethernet27,Ethernet28,Ethernet29,Ethernet30,Ethernet31,Ethernet32,Ethernet33,Ethernet34,Ethernet35,Ethernet36,Ethernet37,Ethernet38,Ethernet39,Ethernet40,Ethernet41,Ethernet42,Ethernet43,Ethernet44,Ethernet45,Ethernet46,Ethernet47,Ethernet48,Ethernet49,Ethernet50,Ethernet51,Ethernet52,Ethernet53|3-4" : {
|
||||
"scheduler" : "[SCHEDULER|scheduler.0]",
|
||||
"wred_profile" : "[WRED_PROFILE|AZURE_LOSSY]"
|
||||
},
|
||||
"Ethernet0,Ethernet1,Ethernet2,Ethernet3,Ethernet4,Ethernet5,Ethernet6,Ethernet7,Ethernet8,Ethernet9,Ethernet10,Ethernet11,Ethernet12,Ethernet13,Ethernet14,Ethernet15,Ethernet16,Ethernet17,Ethernet18,Ethernet19,Ethernet20,Ethernet21,Ethernet22,Ethernet23,Ethernet24,Ethernet25,Ethernet26,Ethernet27,Ethernet28,Ethernet29,Ethernet30,Ethernet31,Ethernet32,Ethernet33,Ethernet34,Ethernet35,Ethernet36,Ethernet37,Ethernet38,Ethernet39,Ethernet40,Ethernet41,Ethernet42,Ethernet43,Ethernet44,Ethernet45,Ethernet46,Ethernet47,Ethernet48,Ethernet49,Ethernet50,Ethernet51,Ethernet52,Ethernet53|0" : {
|
||||
"scheduler" : "[SCHEDULER|scheduler.1]"
|
||||
},
|
||||
"Ethernet0,Ethernet1,Ethernet2,Ethernet3,Ethernet4,Ethernet5,Ethernet6,Ethernet7,Ethernet8,Ethernet9,Ethernet10,Ethernet11,Ethernet12,Ethernet13,Ethernet14,Ethernet15,Ethernet16,Ethernet17,Ethernet18,Ethernet19,Ethernet20,Ethernet21,Ethernet22,Ethernet23,Ethernet24,Ethernet25,Ethernet26,Ethernet27,Ethernet28,Ethernet29,Ethernet30,Ethernet31,Ethernet32,Ethernet33,Ethernet34,Ethernet35,Ethernet36,Ethernet37,Ethernet38,Ethernet39,Ethernet40,Ethernet41,Ethernet42,Ethernet43,Ethernet44,Ethernet45,Ethernet46,Ethernet47,Ethernet48,Ethernet49,Ethernet50,Ethernet51,Ethernet52,Ethernet53|1" : {
|
||||
"scheduler" : "[SCHEDULER|scheduler.2]"
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
@ -1,2 +1,2 @@
|
||||
SAI_INIT_CONFIG_FILE=/etc/nps/tau-as7116-4806.cfg
|
||||
SAI_DSH_CONFIG_FILE=/etc/nps/tau-as7116-4806.dsh
|
||||
SAI_INIT_CONFIG_FILE=/usr/share/sonic/platform/led_proc_init.nps
|
||||
SAI_DSH_CONFIG_FILE=/usr/share/sonic/hwsku/port_config.nps
|
||||
|
||||
@ -1,3 +1,4 @@
|
||||
CONSOLE_PORT=0x3f8
|
||||
CONSOLE_DEV=0
|
||||
CONSOLE_SPEED=115200
|
||||
ONIE_PLATFORM_EXTRA_CMDLINE_LINUX="pci=noaer"
|
||||
@ -1,20 +1,10 @@
|
||||
#This configuration file is for customer init value feature. Please refer to mtk_cfg.h/mtk_cfg.c for detail.
|
||||
#1. The lines beginning with # are comment lines. The lines beginning with number are the setting lines.
|
||||
#2. There are five parameters which can be set.
|
||||
# 1) the first is unit.
|
||||
# 2) the second is NPS_CFG_TYPE_XXX. Refer to NPS_CFG_TYPE_T.
|
||||
# 3) the 3-5 are {param0, param1, value} pairs. Refer to NPS_CFG_VALUE_T. Support HEX format.
|
||||
# 4) the (unit, NPS_CFG_TYPE_XXX, param0, param1) group is the key to get the correspingding value.
|
||||
# There should be no same (unit, NPS_CFG_TYPE_XXX, param0, param1) group.
|
||||
#3. User must follow correct format to apply the setting. Please refer to below commentted example(#0 NPS_CFG_TYPE_L2_ADDR_MODE 0 0 1);
|
||||
#4. Usage under the linux shell:
|
||||
# 1) ./image-path/image-name -c cfg-path/NPS_Ari_EVB_24.cfg : mamually specify directory path if they are not in current work dirctory.
|
||||
# 2) ./image-name -c NPS_Ari_EVB_24.cfg : the image and the NPS_Ari_EVB_24.cfg are in the current work directory.
|
||||
|
||||
#unit NPS_CFG_TYPE_XXX param0 param1 value
|
||||
#---- ---------------- ------ ------ -----
|
||||
0 NPS_CFG_TYPE_USE_UNIT_PORT 0 0 1
|
||||
0 NPS_CFG_TYPE_LED_CFG 0 0 3
|
||||
0 NPS_CFG_TYPE_USER_BUF_CTRL 0 0 1
|
||||
0 NPS_CFG_TYPE_LED_CFG 0 0 5
|
||||
0 NPS_CFG_TYPE_CPI_PORT_MODE 129 0 1
|
||||
0 NPS_CFG_TYPE_CPI_PORT_MODE 130 0 1
|
||||
0 NPS_CFG_TYPE_USER_BUF_CTRL 0 0 1
|
||||
0 NPS_CFG_TYPE_HASH_L2_FDB_REGION_ENTRY_NUM 0 0 49152
|
||||
0 NPS_CFG_TYPE_HASH_L3_WITH_IPV6_PREFIX_64_REGION_ENTRY_NUM 0 0 32768
|
||||
|
||||
|
||||
File diff suppressed because it is too large
Load Diff
92
device/accton/x86_64-accton_as7116_54x-r0/plugins/psuutil.py
Normal file
92
device/accton/x86_64-accton_as7116_54x-r0/plugins/psuutil.py
Normal file
@ -0,0 +1,92 @@
|
||||
#
|
||||
# psuutil.py
|
||||
# Platform-specific PSU status interface for SONiC
|
||||
#
|
||||
|
||||
|
||||
import os.path
|
||||
|
||||
try:
|
||||
from sonic_psu.psu_base import PsuBase
|
||||
except ImportError as e:
|
||||
raise ImportError(str(e) + "- required module not found")
|
||||
|
||||
|
||||
class PsuUtil(PsuBase):
|
||||
"""Platform-specific PSUutil class"""
|
||||
|
||||
SYSFS_PSU_DIR = ["/sys/bus/i2c/devices/10-0050",
|
||||
"/sys/bus/i2c/devices/11-0053"]
|
||||
|
||||
def __init__(self):
|
||||
PsuBase.__init__(self)
|
||||
|
||||
|
||||
# Get sysfs attribute
|
||||
def get_attr_value(self, attr_path):
|
||||
|
||||
retval = 'ERR'
|
||||
if (not os.path.isfile(attr_path)):
|
||||
return retval
|
||||
|
||||
try:
|
||||
with open(attr_path, 'r') as fd:
|
||||
retval = fd.read()
|
||||
except Exception as error:
|
||||
logging.error("Unable to open ", attr_path, " file !")
|
||||
|
||||
retval = retval.rstrip('\r\n')
|
||||
return retval
|
||||
|
||||
def get_num_psus(self):
|
||||
"""
|
||||
Retrieves the number of PSUs available on the device
|
||||
:return: An integer, the number of PSUs available on the device
|
||||
"""
|
||||
MAX_PSUS = 2
|
||||
return MAX_PSUS
|
||||
|
||||
def get_psu_status(self, index):
|
||||
"""
|
||||
Retrieves the oprational status of power supply unit (PSU) defined
|
||||
by index <index>
|
||||
:param index: An integer, index of the PSU of which to query status
|
||||
:return: Boolean, True if PSU is operating properly, False if PSU is\
|
||||
faulty
|
||||
"""
|
||||
status = 0
|
||||
attr_file = 'psu_power_good'
|
||||
attr_path = self.SYSFS_PSU_DIR[index-1] +'/' + attr_file
|
||||
|
||||
attr_value = self.get_attr_value(attr_path)
|
||||
|
||||
if (attr_value != 'ERR'):
|
||||
attr_value = int(attr_value, 16)
|
||||
# Check for PSU status
|
||||
if (attr_value == 1):
|
||||
status = 1
|
||||
|
||||
return status
|
||||
|
||||
def get_psu_presence(self, index):
|
||||
"""
|
||||
Retrieves the presence status of power supply unit (PSU) defined
|
||||
by index <index>
|
||||
:param index: An integer, index of the PSU of which to query status
|
||||
:return: Boolean, True if PSU is plugged, False if not
|
||||
"""
|
||||
status = 0
|
||||
psu_absent = 0
|
||||
attr_file ='psu_present'
|
||||
attr_path = self.SYSFS_PSU_DIR[index-1] +'/' + attr_file
|
||||
|
||||
attr_value = self.get_attr_value(attr_path)
|
||||
|
||||
if (attr_value != 'ERR'):
|
||||
attr_value = int(attr_value, 16)
|
||||
# Check for PSU presence
|
||||
if (attr_value == 1):
|
||||
status = 1
|
||||
|
||||
return status
|
||||
|
||||
@ -79,10 +79,7 @@ class SfpUtil(SfpUtilBase):
|
||||
eeprom_path = '/sys/bus/i2c/devices/{0}-0050/sfp_eeprom'
|
||||
for x in range(self._port_start, self._port_end + 1):
|
||||
port_eeprom_path = eeprom_path.format(self._port_to_i2c_mapping[x])
|
||||
if x == 53:
|
||||
self._port_to_eeprom_mapping[56] = port_eeprom_path # ugly!!!!
|
||||
else:
|
||||
self._port_to_eeprom_mapping[x] = port_eeprom_path
|
||||
self._port_to_eeprom_mapping[x] = port_eeprom_path
|
||||
|
||||
SfpUtilBase.__init__(self)
|
||||
|
||||
@ -136,6 +133,9 @@ class SfpUtil(SfpUtilBase):
|
||||
|
||||
return False
|
||||
|
||||
def get_transceiver_change_event(self, timeout=0):
|
||||
raise NotImplementedError
|
||||
|
||||
@property
|
||||
def port_start(self):
|
||||
return self._port_start
|
||||
@ -151,5 +151,3 @@ class SfpUtil(SfpUtilBase):
|
||||
@property
|
||||
def port_to_eeprom_mapping(self):
|
||||
return self._port_to_eeprom_mapping
|
||||
|
||||
|
||||
|
||||
13
device/accton/x86_64-accton_as7116_54x-r0/sensors.conf
Normal file
13
device/accton/x86_64-accton_as7116_54x-r0/sensors.conf
Normal file
@ -0,0 +1,13 @@
|
||||
# libsensors configuration file
|
||||
|
||||
chip "as7116_54x_fan-*"
|
||||
label fan1 "front fan 1"
|
||||
label fan2 "front fan 2"
|
||||
label fan3 "front fan 3"
|
||||
label fan4 "front fan 4"
|
||||
label fan5 "front fan 5"
|
||||
label fan6 "rear fan 1"
|
||||
label fan7 "rear fan 2"
|
||||
label fan8 "rear fan 3"
|
||||
label fan9 "rear fan 4"
|
||||
label fan10 "rear fan 5"
|
||||
@ -0,0 +1,2 @@
|
||||
{%- set default_topo = 't0' %}
|
||||
{%- include 'buffers_config.j2' %}
|
||||
@ -0,0 +1,69 @@
|
||||
{% set default_cable = '5m' %}
|
||||
{% set ingress_lossless_pool_size = '20971328' %}
|
||||
{% set ingress_lossy_pool_size = '20971328' %}
|
||||
{% set egress_lossless_pool_size = '20971328' %}
|
||||
{% set egress_lossy_pool_size = '20971328' %}
|
||||
|
||||
{%- macro generate_port_lists(PORT_ALL) %}
|
||||
{# Generate list of ports #}
|
||||
{%- for port_idx in range(0, 32) %}
|
||||
{%- if PORT_ALL.append("Ethernet%d" % (port_idx*4)) %}{%- endif %}
|
||||
{%- endfor %}
|
||||
{%- endmacro %}
|
||||
|
||||
{%- macro generate_buffer_pool_and_profiles() %}
|
||||
"BUFFER_POOL": {
|
||||
"ingress_lossless_pool": {
|
||||
"size": "{{ ingress_lossless_pool_size }}",
|
||||
"type": "ingress",
|
||||
"mode": "dynamic"
|
||||
},
|
||||
"ingress_lossy_pool": {
|
||||
"size": "{{ ingress_lossy_pool_size }}",
|
||||
"type": "ingress",
|
||||
"mode": "dynamic"
|
||||
},
|
||||
"egress_lossless_pool": {
|
||||
"size": "{{ egress_lossless_pool_size }}",
|
||||
"type": "egress",
|
||||
"mode": "dynamic"
|
||||
},
|
||||
"egress_lossy_pool": {
|
||||
"size": "{{ egress_lossy_pool_size }}",
|
||||
"type": "egress",
|
||||
"mode": "dynamic"
|
||||
}
|
||||
},
|
||||
"BUFFER_PROFILE": {
|
||||
"ingress_lossless_profile": {
|
||||
"pool":"[BUFFER_POOL|ingress_lossless_pool]",
|
||||
"xon":"78400",
|
||||
"xoff":"132160",
|
||||
"size":"3584",
|
||||
"static_th":"82880"
|
||||
},
|
||||
"ingress_lossy_profile": {
|
||||
"pool":"[BUFFER_POOL|ingress_lossy_pool]",
|
||||
"size":"3584",
|
||||
"dynamic_th":"-1"
|
||||
},
|
||||
"egress_lossy_profile": {
|
||||
"pool":"[BUFFER_POOL|egress_lossy_pool]",
|
||||
"size":"3584",
|
||||
"dynamic_th":"-4"
|
||||
}
|
||||
},
|
||||
{%- endmacro %}
|
||||
|
||||
{# the typo of generate_pg_profils dued to buffers_config.j2 #}
|
||||
{# Default, we do not bind any buffer profiles. #}
|
||||
{%- macro generate_pg_profils(port_names) %}
|
||||
"BUFFER_PG": {
|
||||
}
|
||||
{%- endmacro %}
|
||||
|
||||
{# Default, we do not bind any buffer profiles. #}
|
||||
{%- macro generate_queue_buffers(port_names) %}
|
||||
"BUFFER_QUEUE": {
|
||||
}
|
||||
{%- endmacro %}
|
||||
@ -0,0 +1,69 @@
|
||||
{% set default_cable = '5m' %}
|
||||
{% set ingress_lossless_pool_size = '20971328' %}
|
||||
{% set ingress_lossy_pool_size = '20971328' %}
|
||||
{% set egress_lossless_pool_size = '20971328' %}
|
||||
{% set egress_lossy_pool_size = '20971328' %}
|
||||
|
||||
{%- macro generate_port_lists(PORT_ALL) %}
|
||||
{# Generate list of ports #}
|
||||
{%- for port_idx in range(0, 32) %}
|
||||
{%- if PORT_ALL.append("Ethernet%d" % (port_idx*4)) %}{%- endif %}
|
||||
{%- endfor %}
|
||||
{%- endmacro %}
|
||||
|
||||
{%- macro generate_buffer_pool_and_profiles() %}
|
||||
"BUFFER_POOL": {
|
||||
"ingress_lossless_pool": {
|
||||
"size": "{{ ingress_lossless_pool_size }}",
|
||||
"type": "ingress",
|
||||
"mode": "dynamic"
|
||||
},
|
||||
"ingress_lossy_pool": {
|
||||
"size": "{{ ingress_lossy_pool_size }}",
|
||||
"type": "ingress",
|
||||
"mode": "dynamic"
|
||||
},
|
||||
"egress_lossless_pool": {
|
||||
"size": "{{ egress_lossless_pool_size }}",
|
||||
"type": "egress",
|
||||
"mode": "dynamic"
|
||||
},
|
||||
"egress_lossy_pool": {
|
||||
"size": "{{ egress_lossy_pool_size }}",
|
||||
"type": "egress",
|
||||
"mode": "dynamic"
|
||||
}
|
||||
},
|
||||
"BUFFER_PROFILE": {
|
||||
"ingress_lossless_profile": {
|
||||
"pool":"[BUFFER_POOL|ingress_lossless_pool]",
|
||||
"xon":"78400",
|
||||
"xoff":"132160",
|
||||
"size":"3584",
|
||||
"static_th":"82880"
|
||||
},
|
||||
"ingress_lossy_profile": {
|
||||
"pool":"[BUFFER_POOL|ingress_lossy_pool]",
|
||||
"size":"3584",
|
||||
"dynamic_th":"-1"
|
||||
},
|
||||
"egress_lossy_profile": {
|
||||
"pool":"[BUFFER_POOL|egress_lossy_pool]",
|
||||
"size":"3584",
|
||||
"dynamic_th":"-4"
|
||||
}
|
||||
},
|
||||
{%- endmacro %}
|
||||
|
||||
{# the typo of generate_pg_profils dued to buffers_config.j2 #}
|
||||
{# Default, we do not bind any buffer profiles. #}
|
||||
{%- macro generate_pg_profils(port_names) %}
|
||||
"BUFFER_PG": {
|
||||
}
|
||||
{%- endmacro %}
|
||||
|
||||
{# Default, we do not bind any buffer profiles. #}
|
||||
{%- macro generate_queue_buffers(port_names) %}
|
||||
"BUFFER_QUEUE": {
|
||||
}
|
||||
{%- endmacro %}
|
||||
@ -0,0 +1,17 @@
|
||||
# PG lossless profiles.
|
||||
# speed cable size xon xoff threshold
|
||||
10000 5m 3584 32256 59136 36736
|
||||
25000 5m 3584 41216 68096 45696
|
||||
40000 5m 3584 47488 74368 51968
|
||||
50000 5m 3584 52864 79744 57344
|
||||
100000 5m 3584 78400 132160 82880
|
||||
10000 40m 3584 32256 59136 36736
|
||||
25000 40m 3584 41216 68096 45696
|
||||
40000 40m 3584 47488 74368 51968
|
||||
50000 40m 3584 52864 79744 57344
|
||||
100000 40m 3584 78400 132160 82880
|
||||
10000 300m 3584 32256 65856 36736
|
||||
25000 300m 3584 41216 84672 45696
|
||||
40000 300m 3584 47488 101024 51968
|
||||
50000 300m 3584 52864 113120 57344
|
||||
100000 300m 3584 78400 198688 82880
|
||||
@ -308,6 +308,40 @@ phy set pre-emphasis unit=0 portlist=130 lane-cnt=1 property=c2 data=0x01
|
||||
phy set pre-emphasis unit=0 portlist=130 lane-cnt=1 property=cn1 data=0x01
|
||||
phy set pre-emphasis unit=0 portlist=130 lane-cnt=1 property=c0 data=0x02
|
||||
phy set pre-emphasis unit=0 portlist=130 lane-cnt=1 property=c1 data=0x03
|
||||
phy set mdio portlist=0 devad=0x1E addr=0x2 data=0x8000
|
||||
phy set mdio portlist=1 devad=0x1E addr=0x2 data=0x8000
|
||||
phy set mdio portlist=2 devad=0x1E addr=0x2 data=0x8000
|
||||
phy set mdio portlist=3 devad=0x1E addr=0x2 data=0x8000
|
||||
phy set mdio portlist=4 devad=0x1E addr=0x2 data=0x8000
|
||||
phy set mdio portlist=5 devad=0x1E addr=0x2 data=0x8000
|
||||
phy set mdio portlist=6 devad=0x1E addr=0x2 data=0x8000
|
||||
phy set mdio portlist=7 devad=0x1E addr=0x2 data=0x8000
|
||||
phy set mdio portlist=8 devad=0x1E addr=0x2 data=0x8000
|
||||
phy set mdio portlist=9 devad=0x1E addr=0x2 data=0x8000
|
||||
phy set mdio portlist=10 devad=0x1E addr=0x2 data=0x8000
|
||||
phy set mdio portlist=11 devad=0x1E addr=0x2 data=0x8000
|
||||
phy set mdio portlist=12 devad=0x1E addr=0x2 data=0x8000
|
||||
phy set mdio portlist=13 devad=0x1E addr=0x2 data=0x8000
|
||||
phy set mdio portlist=14 devad=0x1E addr=0x2 data=0x8000
|
||||
phy set mdio portlist=15 devad=0x1E addr=0x2 data=0x8000
|
||||
phy set mdio portlist=16 devad=0x1E addr=0x2 data=0x8000
|
||||
phy set mdio portlist=17 devad=0x1E addr=0x2 data=0x8000
|
||||
phy set mdio portlist=18 devad=0x1E addr=0x2 data=0x8000
|
||||
phy set mdio portlist=19 devad=0x1E addr=0x2 data=0x8000
|
||||
phy set mdio portlist=20 devad=0x1E addr=0x2 data=0x8000
|
||||
phy set mdio portlist=21 devad=0x1E addr=0x2 data=0x8000
|
||||
phy set mdio portlist=22 devad=0x1E addr=0x2 data=0x8000
|
||||
phy set mdio portlist=23 devad=0x1E addr=0x2 data=0x8000
|
||||
phy set mdio portlist=24 devad=0x1E addr=0x2 data=0x8000
|
||||
phy set mdio portlist=25 devad=0x1E addr=0x2 data=0x8000
|
||||
phy set mdio portlist=26 devad=0x1E addr=0x2 data=0x8000
|
||||
phy set mdio portlist=27 devad=0x1E addr=0x2 data=0x8000
|
||||
phy set mdio portlist=28 devad=0x1E addr=0x2 data=0x8000
|
||||
phy set mdio portlist=29 devad=0x1E addr=0x2 data=0x8000
|
||||
phy set mdio portlist=30 devad=0x1E addr=0x2 data=0x8000
|
||||
phy set mdio portlist=31 devad=0x1E addr=0x2 data=0x8000
|
||||
phy set mdio portlist=129 devad=0x1E addr=0x2 data=0x0000
|
||||
phy set mdio portlist=130 devad=0x1E addr=0x2 data=0x0000
|
||||
port set property unit=0 portlist=0-31 speed=100g
|
||||
port set property unit=0 portlist=129-130 speed=10g
|
||||
port set property unit=0 portlist=0-31 medium-type=sr4
|
||||
|
||||
@ -104,13 +104,6 @@
|
||||
}
|
||||
},
|
||||
"PORT_QOS_MAP": {
|
||||
"Ethernet0,Ethernet4,Ethernet8,Ethernet12,Ethernet16,Ethernet20,Ethernet24,Ethernet28,Ethernet32,Ethernet36,Ethernet40,Ethernet44,Ethernet48,Ethernet52,Ethernet56,Ethernet60,Ethernet64,Ethernet68,Ethernet72,Ethernet76,Ethernet80,Ethernet84,Ethernet88,Ethernet92,Ethernet96,Ethernet100,Ethernet104,Ethernet108,Ethernet112,Ethernet116,Ethernet120,Ethernet124": {
|
||||
"dscp_to_tc_map" : "[DSCP_TO_TC_MAP|AZURE]",
|
||||
"tc_to_queue_map" : "[TC_TO_QUEUE_MAP|AZURE]",
|
||||
"tc_to_pg_map" : "[TC_TO_PRIORITY_GROUP_MAP|AZURE]",
|
||||
"pfc_to_queue_map": "[MAP_PFC_PRIORITY_TO_QUEUE|AZURE]",
|
||||
"pfc_enable": "3,4"
|
||||
}
|
||||
},
|
||||
"WRED_PROFILE": {
|
||||
"AZURE_LOSSY" : {
|
||||
@ -139,15 +132,5 @@
|
||||
}
|
||||
},
|
||||
"QUEUE": {
|
||||
"Ethernet0,Ethernet4,Ethernet8,Ethernet12,Ethernet16,Ethernet20,Ethernet24,Ethernet28,Ethernet32,Ethernet36,Ethernet40,Ethernet44,Ethernet48,Ethernet52,Ethernet56,Ethernet60,Ethernet64,Ethernet68,Ethernet72,Ethernet76,Ethernet80,Ethernet84,Ethernet88,Ethernet92,Ethernet96,Ethernet100,Ethernet104,Ethernet108,Ethernet112,Ethernet116,Ethernet120,Ethernet124|3-4" : {
|
||||
"scheduler" : "[SCHEDULER|scheduler.0]",
|
||||
"wred_profile" : "[WRED_PROFILE|AZURE_LOSSY]"
|
||||
},
|
||||
"Ethernet0,Ethernet4,Ethernet8,Ethernet12,Ethernet16,Ethernet20,Ethernet24,Ethernet28,Ethernet32,Ethernet36,Ethernet40,Ethernet44,Ethernet48,Ethernet52,Ethernet56,Ethernet60,Ethernet64,Ethernet68,Ethernet72,Ethernet76,Ethernet80,Ethernet84,Ethernet88,Ethernet92,Ethernet96,Ethernet100,Ethernet104,Ethernet108,Ethernet112,Ethernet116,Ethernet120,Ethernet124|0" : {
|
||||
"scheduler" : "[SCHEDULER|scheduler.1]"
|
||||
},
|
||||
"Ethernet0,Ethernet4,Ethernet8,Ethernet12,Ethernet16,Ethernet20,Ethernet24,Ethernet28,Ethernet32,Ethernet36,Ethernet40,Ethernet44,Ethernet48,Ethernet52,Ethernet56,Ethernet60,Ethernet64,Ethernet68,Ethernet72,Ethernet76,Ethernet80,Ethernet84,Ethernet88,Ethernet92,Ethernet96,Ethernet100,Ethernet104,Ethernet108,Ethernet112,Ethernet116,Ethernet120,Ethernet124|1" : {
|
||||
"scheduler" : "[SCHEDULER|scheduler.2]"
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
@ -1,55 +1,6 @@
|
||||
<DeviceMiniGraph xmlns="Microsoft.Search.Autopilot.Evolution" xmlns:i="http://www.w3.org/2001/XMLSchema-instance">
|
||||
<CpgDec>
|
||||
<IsisRouters xmlns:a="http://schemas.datacontract.org/2004/07/Microsoft.Search.Autopilot.Evolution"/>
|
||||
<PeeringSessions>
|
||||
<BGPSession>
|
||||
<StartRouter>OCPSCH0104001MS</StartRouter>
|
||||
<StartPeer>10.10.1.26</StartPeer>
|
||||
<EndRouter>OCPSCH01040GGLF</EndRouter>
|
||||
<EndPeer>10.10.1.25</EndPeer>
|
||||
<Multihop>1</Multihop>
|
||||
<HoldTime>10</HoldTime>
|
||||
<KeepAliveTime>3</KeepAliveTime>
|
||||
</BGPSession>
|
||||
<BGPSession>
|
||||
<StartRouter>OCPSCH0104002MS</StartRouter>
|
||||
<StartPeer>10.10.2.26</StartPeer>
|
||||
<EndRouter>OCPSCH01040GGLF</EndRouter>
|
||||
<EndPeer>10.10.2.25</EndPeer>
|
||||
<Multihop>1</Multihop>
|
||||
<HoldTime>10</HoldTime>
|
||||
<KeepAliveTime>3</KeepAliveTime>
|
||||
</BGPSession>
|
||||
</PeeringSessions>
|
||||
<Routers xmlns:a="http://schemas.datacontract.org/2004/07/Microsoft.Search.Autopilot.Evolution">
|
||||
<a:BGPRouterDeclaration>
|
||||
<a:ASN>64536</a:ASN>
|
||||
<a:Hostname>OCPSCH01040GGLF</a:Hostname>
|
||||
<a:Peers>
|
||||
<BGPPeer>
|
||||
<Address>10.10.1.26</Address>
|
||||
<RouteMapIn i:nil="true"/>
|
||||
<RouteMapOut i:nil="true"/>
|
||||
</BGPPeer>
|
||||
<BGPPeer>
|
||||
<Address>10.10.2.26</Address>
|
||||
<RouteMapIn i:nil="true"/>
|
||||
<RouteMapOut i:nil="true"/>
|
||||
</BGPPeer>
|
||||
</a:Peers>
|
||||
<a:RouteMaps/>
|
||||
</a:BGPRouterDeclaration>
|
||||
<a:BGPRouterDeclaration>
|
||||
<a:ASN>64542</a:ASN>
|
||||
<a:Hostname>OCPSCH0104001MS</a:Hostname>
|
||||
<a:RouteMaps/>
|
||||
</a:BGPRouterDeclaration>
|
||||
<a:BGPRouterDeclaration>
|
||||
<a:ASN>64543</a:ASN>
|
||||
<a:Hostname>OCPSCH0104002MS</a:Hostname>
|
||||
<a:RouteMaps/>
|
||||
</a:BGPRouterDeclaration>
|
||||
</Routers>
|
||||
</CpgDec>
|
||||
<DpgDec>
|
||||
<DeviceDataPlaneInfo>
|
||||
@ -72,18 +23,7 @@
|
||||
<Hostname>OCPSCH01040GGLF</Hostname>
|
||||
<PortChannelInterfaces/>
|
||||
<VlanInterfaces/>
|
||||
<IPInterfaces>
|
||||
<IPInterface>
|
||||
<Name i:nil="true"/>
|
||||
<AttachTo>Ethernet0</AttachTo>
|
||||
<Prefix>10.10.1.25/30</Prefix>
|
||||
</IPInterface>
|
||||
<IPInterface>
|
||||
<Name i:nil="true"/>
|
||||
<AttachTo>Ethernet4</AttachTo>
|
||||
<Prefix>10.10.2.25/30</Prefix>
|
||||
</IPInterface>
|
||||
</IPInterfaces>
|
||||
<IPInterfaces/>
|
||||
<DataAcls/>
|
||||
<AclInterfaces/>
|
||||
<DownstreamSummaries/>
|
||||
@ -91,24 +31,7 @@
|
||||
</DeviceDataPlaneInfo>
|
||||
</DpgDec>
|
||||
<PngDec>
|
||||
<DeviceInterfaceLinks>
|
||||
<DeviceLinkBase i:type="DeviceInterfaceLink">
|
||||
<Bandwidth>40000</Bandwidth>
|
||||
<ElementType>DeviceInterfaceLink</ElementType>
|
||||
<EndDevice>OCPSCH0104001MS</EndDevice>
|
||||
<EndPort>Ethernet24</EndPort>
|
||||
<StartDevice>OCPSCH01040GGLF</StartDevice>
|
||||
<StartPort>Ethernet0</StartPort>
|
||||
</DeviceLinkBase>
|
||||
<DeviceLinkBase i:type="DeviceInterfaceLink">
|
||||
<Bandwidth>40000</Bandwidth>
|
||||
<ElementType>DeviceInterfaceLink</ElementType>
|
||||
<EndDevice>OCPSCH0104002MS</EndDevice>
|
||||
<EndPort>Ethernet24</EndPort>
|
||||
<StartDevice>OCPSCH01040GGLF</StartDevice>
|
||||
<StartPort>Ethernet4</StartPort>
|
||||
</DeviceLinkBase>
|
||||
</DeviceInterfaceLinks>
|
||||
<DeviceInterfaceLinks/>
|
||||
<Devices>
|
||||
<Device i:type="LeafRouter">
|
||||
<Hostname>OCPSCH01040GGLF</Hostname>
|
||||
@ -136,11 +59,6 @@
|
||||
<a:Reference i:nil="true"/>
|
||||
<a:Value></a:Value>
|
||||
</a:DeviceProperty>
|
||||
<a:DeviceProperty>
|
||||
<a:Name>ErspanDestinationIpv4</a:Name>
|
||||
<a:Reference i:nil="true"/>
|
||||
<a:Value>2.2.2.2</a:Value>
|
||||
</a:DeviceProperty>
|
||||
</a:Properties>
|
||||
</a:DeviceMetadata>
|
||||
</Devices>
|
||||
|
||||
@ -185,3 +185,6 @@ class SfpUtil(SfpUtilBase):
|
||||
gpio_file.close()
|
||||
|
||||
return True
|
||||
|
||||
def get_transceiver_change_event(self, timeout=0):
|
||||
raise NotImplementedError
|
||||
|
||||
@ -0,0 +1,2 @@
|
||||
{%- set default_topo = 't0' %}
|
||||
{%- include 'buffers_config.j2' %}
|
||||
@ -0,0 +1,69 @@
|
||||
{% set default_cable = '5m' %}
|
||||
{% set ingress_lossless_pool_size = '20971328' %}
|
||||
{% set ingress_lossy_pool_size = '20971328' %}
|
||||
{% set egress_lossless_pool_size = '20971328' %}
|
||||
{% set egress_lossy_pool_size = '20971328' %}
|
||||
|
||||
{%- macro generate_port_lists(PORT_ALL) %}
|
||||
{# Generate list of ports #}
|
||||
{%- for port_idx in range(0, 64) %}
|
||||
{%- if PORT_ALL.append("Ethernet%d" % (port_idx*4)) %}{%- endif %}
|
||||
{%- endfor %}
|
||||
{%- endmacro %}
|
||||
|
||||
{%- macro generate_buffer_pool_and_profiles() %}
|
||||
"BUFFER_POOL": {
|
||||
"ingress_lossless_pool": {
|
||||
"size": "{{ ingress_lossless_pool_size }}",
|
||||
"type": "ingress",
|
||||
"mode": "dynamic"
|
||||
},
|
||||
"ingress_lossy_pool": {
|
||||
"size": "{{ ingress_lossy_pool_size }}",
|
||||
"type": "ingress",
|
||||
"mode": "dynamic"
|
||||
},
|
||||
"egress_lossless_pool": {
|
||||
"size": "{{ egress_lossless_pool_size }}",
|
||||
"type": "egress",
|
||||
"mode": "dynamic"
|
||||
},
|
||||
"egress_lossy_pool": {
|
||||
"size": "{{ egress_lossy_pool_size }}",
|
||||
"type": "egress",
|
||||
"mode": "dynamic"
|
||||
}
|
||||
},
|
||||
"BUFFER_PROFILE": {
|
||||
"ingress_lossless_profile": {
|
||||
"pool":"[BUFFER_POOL|ingress_lossless_pool]",
|
||||
"xon":"78400",
|
||||
"xoff":"132160",
|
||||
"size":"3584",
|
||||
"static_th":"82880"
|
||||
},
|
||||
"ingress_lossy_profile": {
|
||||
"pool":"[BUFFER_POOL|ingress_lossy_pool]",
|
||||
"size":"3584",
|
||||
"dynamic_th":"-1"
|
||||
},
|
||||
"egress_lossy_profile": {
|
||||
"pool":"[BUFFER_POOL|egress_lossy_pool]",
|
||||
"size":"3584",
|
||||
"dynamic_th":"-4"
|
||||
}
|
||||
},
|
||||
{%- endmacro %}
|
||||
|
||||
{# the typo of generate_pg_profils dued to buffers_config.j2 #}
|
||||
{# Default, we do not bind any buffer profiles. #}
|
||||
{%- macro generate_pg_profils(port_names) %}
|
||||
"BUFFER_PG": {
|
||||
}
|
||||
{%- endmacro %}
|
||||
|
||||
{# Default, we do not bind any buffer profiles. #}
|
||||
{%- macro generate_queue_buffers(port_names) %}
|
||||
"BUFFER_QUEUE": {
|
||||
}
|
||||
{%- endmacro %}
|
||||
@ -0,0 +1,69 @@
|
||||
{% set default_cable = '5m' %}
|
||||
{% set ingress_lossless_pool_size = '20971328' %}
|
||||
{% set ingress_lossy_pool_size = '20971328' %}
|
||||
{% set egress_lossless_pool_size = '20971328' %}
|
||||
{% set egress_lossy_pool_size = '20971328' %}
|
||||
|
||||
{%- macro generate_port_lists(PORT_ALL) %}
|
||||
{# Generate list of ports #}
|
||||
{%- for port_idx in range(0, 64) %}
|
||||
{%- if PORT_ALL.append("Ethernet%d" % (port_idx*4)) %}{%- endif %}
|
||||
{%- endfor %}
|
||||
{%- endmacro %}
|
||||
|
||||
{%- macro generate_buffer_pool_and_profiles() %}
|
||||
"BUFFER_POOL": {
|
||||
"ingress_lossless_pool": {
|
||||
"size": "{{ ingress_lossless_pool_size }}",
|
||||
"type": "ingress",
|
||||
"mode": "dynamic"
|
||||
},
|
||||
"ingress_lossy_pool": {
|
||||
"size": "{{ ingress_lossy_pool_size }}",
|
||||
"type": "ingress",
|
||||
"mode": "dynamic"
|
||||
},
|
||||
"egress_lossless_pool": {
|
||||
"size": "{{ egress_lossless_pool_size }}",
|
||||
"type": "egress",
|
||||
"mode": "dynamic"
|
||||
},
|
||||
"egress_lossy_pool": {
|
||||
"size": "{{ egress_lossy_pool_size }}",
|
||||
"type": "egress",
|
||||
"mode": "dynamic"
|
||||
}
|
||||
},
|
||||
"BUFFER_PROFILE": {
|
||||
"ingress_lossless_profile": {
|
||||
"pool":"[BUFFER_POOL|ingress_lossless_pool]",
|
||||
"xon":"78400",
|
||||
"xoff":"132160",
|
||||
"size":"3584",
|
||||
"static_th":"82880"
|
||||
},
|
||||
"ingress_lossy_profile": {
|
||||
"pool":"[BUFFER_POOL|ingress_lossy_pool]",
|
||||
"size":"3584",
|
||||
"dynamic_th":"-1"
|
||||
},
|
||||
"egress_lossy_profile": {
|
||||
"pool":"[BUFFER_POOL|egress_lossy_pool]",
|
||||
"size":"3584",
|
||||
"dynamic_th":"-4"
|
||||
}
|
||||
},
|
||||
{%- endmacro %}
|
||||
|
||||
{# the typo of generate_pg_profils dued to buffers_config.j2 #}
|
||||
{# Default, we do not bind any buffer profiles. #}
|
||||
{%- macro generate_pg_profils(port_names) %}
|
||||
"BUFFER_PG": {
|
||||
}
|
||||
{%- endmacro %}
|
||||
|
||||
{# Default, we do not bind any buffer profiles. #}
|
||||
{%- macro generate_queue_buffers(port_names) %}
|
||||
"BUFFER_QUEUE": {
|
||||
}
|
||||
{%- endmacro %}
|
||||
@ -0,0 +1,17 @@
|
||||
# PG lossless profiles.
|
||||
# speed cable size xon xoff threshold
|
||||
10000 5m 3584 32256 59136 36736
|
||||
25000 5m 3584 41216 68096 45696
|
||||
40000 5m 3584 47488 74368 51968
|
||||
50000 5m 3584 52864 79744 57344
|
||||
100000 5m 3584 78400 132160 82880
|
||||
10000 40m 3584 32256 59136 36736
|
||||
25000 40m 3584 41216 68096 45696
|
||||
40000 40m 3584 47488 74368 51968
|
||||
50000 40m 3584 52864 79744 57344
|
||||
100000 40m 3584 78400 132160 82880
|
||||
10000 300m 3584 32256 65856 36736
|
||||
25000 300m 3584 41216 84672 45696
|
||||
40000 300m 3584 47488 101024 51968
|
||||
50000 300m 3584 52864 113120 57344
|
||||
100000 300m 3584 78400 198688 82880
|
||||
@ -1,6 +1,6 @@
|
||||
# name lanes alias index
|
||||
Ethernet0 4,5,6,7 Ethernet1/1 0
|
||||
Ethernet4 0,1,2,3 Ethernet2/1 1
|
||||
Ethernet0 0,1,2,3 Ethernet1/1 0
|
||||
Ethernet4 4,5,6,7 Ethernet2/1 1
|
||||
Ethernet8 20,21,22,23 Ethernet3/1 2
|
||||
Ethernet12 16,17,18,19 Ethernet4/1 3
|
||||
Ethernet16 36,37,38,39 Ethernet5/1 4
|
||||
@ -61,5 +61,5 @@ Ethernet232 220,221,222,223 Ethernet59/1 58
|
||||
Ethernet236 216,217,218,219 Ethernet60/1 59
|
||||
Ethernet240 236,237,238,239 Ethernet61/1 60
|
||||
Ethernet244 232,233,234,235 Ethernet62/1 61
|
||||
Ethernet248 252,253,254,255 Ethernet63/1 62
|
||||
Ethernet252 248,249,250,251 Ethernet64/1 63
|
||||
Ethernet248 248,249,250,251 Ethernet63/1 62
|
||||
Ethernet252 252,253,254,255 Ethernet64/1 63
|
||||
File diff suppressed because it is too large
Load Diff
@ -104,13 +104,6 @@
|
||||
}
|
||||
},
|
||||
"PORT_QOS_MAP": {
|
||||
"Ethernet0,Ethernet4,Ethernet8,Ethernet12,Ethernet16,Ethernet20,Ethernet24,Ethernet28,Ethernet32,Ethernet36,Ethernet40,Ethernet44,Ethernet48,Ethernet52,Ethernet56,Ethernet60,Ethernet64,Ethernet68,Ethernet72,Ethernet76,Ethernet80,Ethernet84,Ethernet88,Ethernet92,Ethernet96,Ethernet100,Ethernet104,Ethernet108,Ethernet112,Ethernet116,Ethernet120,Ethernet124,Ethernet128,Ethernet132,Ethernet136,Ethernet140,Ethernet144,Ethernet148,Ethernet152,Ethernet156,Ethernet160,Ethernet164,Ethernet168,Ethernet172,Ethernet176,Ethernet180,Ethernet184,Ethernet188,Ethernet192,Ethernet196,Ethernet200,Ethernet204,Ethernet208,Ethernet212,Ethernet216,Ethernet220,Ethernet224,Ethernet228,Ethernet232,Ethernet236,Ethernet240,Ethernet244,Ethernet248,Ethernet252": {
|
||||
"dscp_to_tc_map" : "[DSCP_TO_TC_MAP|AZURE]",
|
||||
"tc_to_queue_map" : "[TC_TO_QUEUE_MAP|AZURE]",
|
||||
"tc_to_pg_map" : "[TC_TO_PRIORITY_GROUP_MAP|AZURE]",
|
||||
"pfc_to_queue_map": "[MAP_PFC_PRIORITY_TO_QUEUE|AZURE]",
|
||||
"pfc_enable": "3,4"
|
||||
}
|
||||
},
|
||||
"WRED_PROFILE": {
|
||||
"AZURE_LOSSY" : {
|
||||
@ -139,15 +132,5 @@
|
||||
}
|
||||
},
|
||||
"QUEUE": {
|
||||
"Ethernet0,Ethernet4,Ethernet8,Ethernet12,Ethernet16,Ethernet20,Ethernet24,Ethernet28,Ethernet32,Ethernet36,Ethernet40,Ethernet44,Ethernet48,Ethernet52,Ethernet56,Ethernet60,Ethernet64,Ethernet68,Ethernet72,Ethernet76,Ethernet80,Ethernet84,Ethernet88,Ethernet92,Ethernet96,Ethernet100,Ethernet104,Ethernet108,Ethernet112,Ethernet116,Ethernet120,Ethernet124,Ethernet128,Ethernet132,Ethernet136,Ethernet140,Ethernet144,Ethernet148,Ethernet152,Ethernet156,Ethernet160,Ethernet164,Ethernet168,Ethernet172,Ethernet176,Ethernet180,Ethernet184,Ethernet188,Ethernet192,Ethernet196,Ethernet200,Ethernet204,Ethernet208,Ethernet212,Ethernet216,Ethernet220,Ethernet224,Ethernet228,Ethernet232,Ethernet236,Ethernet240,Ethernet244,Ethernet248,Ethernet252|3-4" : {
|
||||
"scheduler" : "[SCHEDULER|scheduler.0]",
|
||||
"wred_profile" : "[WRED_PROFILE|AZURE_LOSSY]"
|
||||
},
|
||||
"Ethernet0,Ethernet4,Ethernet8,Ethernet12,Ethernet16,Ethernet20,Ethernet24,Ethernet28,Ethernet32,Ethernet36,Ethernet40,Ethernet44,Ethernet48,Ethernet52,Ethernet56,Ethernet60,Ethernet64,Ethernet68,Ethernet72,Ethernet76,Ethernet80,Ethernet84,Ethernet88,Ethernet92,Ethernet96,Ethernet100,Ethernet104,Ethernet108,Ethernet112,Ethernet116,Ethernet120,Ethernet124,Ethernet128,Ethernet132,Ethernet136,Ethernet140,Ethernet144,Ethernet148,Ethernet152,Ethernet156,Ethernet160,Ethernet164,Ethernet168,Ethernet172,Ethernet176,Ethernet180,Ethernet184,Ethernet188,Ethernet192,Ethernet196,Ethernet200,Ethernet204,Ethernet208,Ethernet212,Ethernet216,Ethernet220,Ethernet224,Ethernet228,Ethernet232,Ethernet236,Ethernet240,Ethernet244,Ethernet248,Ethernet252|0" : {
|
||||
"scheduler" : "[SCHEDULER|scheduler.1]"
|
||||
},
|
||||
"Ethernet0,Ethernet4,Ethernet8,Ethernet12,Ethernet16,Ethernet20,Ethernet24,Ethernet28,Ethernet32,Ethernet36,Ethernet40,Ethernet44,Ethernet48,Ethernet52,Ethernet56,Ethernet60,Ethernet64,Ethernet68,Ethernet72,Ethernet76,Ethernet80,Ethernet84,Ethernet88,Ethernet92,Ethernet96,Ethernet100,Ethernet104,Ethernet108,Ethernet112,Ethernet116,Ethernet120,Ethernet124,Ethernet128,Ethernet132,Ethernet136,Ethernet140,Ethernet144,Ethernet148,Ethernet152,Ethernet156,Ethernet160,Ethernet164,Ethernet168,Ethernet172,Ethernet176,Ethernet180,Ethernet184,Ethernet188,Ethernet192,Ethernet196,Ethernet200,Ethernet204,Ethernet208,Ethernet212,Ethernet216,Ethernet220,Ethernet224,Ethernet228,Ethernet232,Ethernet236,Ethernet240,Ethernet244,Ethernet248,Ethernet252|1" : {
|
||||
"scheduler" : "[SCHEDULER|scheduler.2]"
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
@ -1,7 +1,7 @@
|
||||
#unit NPS_CFG_TYPE_XXX param0 param1 value
|
||||
#---- ---------------- ------ ------ -----
|
||||
0 NPS_CFG_TYPE_USE_UNIT_PORT 0 0 1
|
||||
0 NPS_CFG_TYPE_LED_CFG 0 0 2
|
||||
0 NPS_CFG_TYPE_LED_CFG 0 0 6
|
||||
0 NPS_CFG_TYPE_CPI_PORT_MODE 129 0 1
|
||||
0 NPS_CFG_TYPE_CPI_PORT_MODE 130 0 1
|
||||
0 NPS_CFG_TYPE_USER_BUF_CTRL 0 0 1
|
||||
|
||||
@ -291,3 +291,5 @@ class SfpUtil(SfpUtilBase):
|
||||
|
||||
return True
|
||||
|
||||
def get_transceiver_change_event(self, timeout=0):
|
||||
raise NotImplementedError
|
||||
|
||||
@ -1,9 +1,12 @@
|
||||
NEPHOS_SAI = libsainps_2.0.3_sai_1.3.0_3147dc_amd64.deb
|
||||
$(NEPHOS_SAI)_URL = "https://github.com/NephosInc/SONiC/raw/master/sai/libsainps_2.0.3_sai_1.3.0_3147dc_amd64.deb"
|
||||
SDK_VERSION = 2.0.5
|
||||
SAI_VERSION = 1.3.0
|
||||
SAI_COMMIT_ID = f32310
|
||||
NEPHOS_SAI = libsainps_$(SDK_VERSION)_sai_$(SAI_VERSION)_$(SAI_COMMIT_ID)_amd64.deb
|
||||
$(NEPHOS_SAI)_URL = "https://github.com/NephosInc/SONiC/raw/master/sai/libsainps_$(SDK_VERSION)_sai_$(SAI_VERSION)_$(SAI_COMMIT_ID)_amd64.deb"
|
||||
|
||||
NEPHOS_SAI_DEV = libsainps-dev_2.0.3_sai_1.3.0_3147dc_amd64.deb
|
||||
NEPHOS_SAI_DEV = libsainps-dev_$(SDK_VERSION)_sai_$(SAI_VERSION)_$(SAI_COMMIT_ID)_amd64.deb
|
||||
$(eval $(call add_derived_package,$(NEPHOS_SAI),$(NEPHOS_SAI_DEV)))
|
||||
$(NEPHOS_SAI_DEV)_URL = "https://github.com/NephosInc/SONiC/raw/master/sai/libsainps-dev_2.0.3_sai_1.3.0_3147dc_amd64.deb"
|
||||
$(NEPHOS_SAI_DEV)_URL = "https://github.com/NephosInc/SONiC/raw/master/sai/libsainps-dev_$(SDK_VERSION)_sai_$(SAI_VERSION)_$(SAI_COMMIT_ID)_amd64.deb"
|
||||
|
||||
SONIC_ONLINE_DEBS += $(NEPHOS_SAI) $(NEPHOS_SAI_DEV)
|
||||
$(NEPHOS_SAI_DEV)_DEPENDS += $(NEPHOS_SAI)
|
||||
|
||||
@ -1,4 +1,7 @@
|
||||
NEPHOS_NPS_KERNEL = nps-modules-3.16.0-5_2.0.3_3147dc_amd64.deb
|
||||
$(NEPHOS_NPS_KERNEL)_URL = "https://github.com/NephosInc/SONiC/raw/master/sdk/nps-modules-3.16.0-5_2.0.3_3147dc_amd64.deb"
|
||||
SDK_VERSION = 2.0.5
|
||||
LINUX_VER = 3.16.0-5
|
||||
SDK_COMMIT_ID = 674332
|
||||
NEPHOS_NPS_KERNEL = nps-modules-$(LINUX_VER)_$(SDK_VERSION)_$(SDK_COMMIT_ID)_amd64.deb
|
||||
$(NEPHOS_NPS_KERNEL)_URL = "https://github.com/NephosInc/SONiC/raw/master/sdk/nps-modules-$(LINUX_VER)_$(SDK_VERSION)_$(SDK_COMMIT_ID)_amd64.deb"
|
||||
|
||||
SONIC_ONLINE_DEBS += $(NEPHOS_NPS_KERNEL)
|
||||
|
||||
@ -109,7 +109,17 @@ enum sysfs_fan_attributes {
|
||||
FAN2_REAR_FAULT,
|
||||
FAN3_REAR_FAULT,
|
||||
FAN4_REAR_FAULT,
|
||||
FAN5_REAR_FAULT
|
||||
FAN5_REAR_FAULT,
|
||||
FAN1_INPUT, /* FAN1_FRONT_SPEED_RPM, */
|
||||
FAN2_INPUT, /* FAN2_FRONT_SPEED_RPM, */
|
||||
FAN3_INPUT, /* FAN3_FRONT_SPEED_RPM, */
|
||||
FAN4_INPUT, /* FAN4_FRONT_SPEED_RPM, */
|
||||
FAN5_INPUT, /* FAN5_FRONT_SPEED_RPM, */
|
||||
FAN6_INPUT, /* FAN1_REAR_SPEED_RPM, */
|
||||
FAN7_INPUT, /* FAN2_REAR_SPEED_RPM, */
|
||||
FAN8_INPUT, /* FAN3_REAR_SPEED_RPM, */
|
||||
FAN9_INPUT, /* FAN4_REAR_SPEED_RPM, */
|
||||
FAN10_INPUT, /* FAN5_REAR_SPEED_RPM */
|
||||
};
|
||||
|
||||
/* Define attributes
|
||||
@ -138,6 +148,10 @@ enum sysfs_fan_attributes {
|
||||
#define DECLARE_FAN_SPEED_RPM_ATTR(index) &sensor_dev_attr_fan##index##_front_speed_rpm.dev_attr.attr, \
|
||||
&sensor_dev_attr_fan##index##_rear_speed_rpm.dev_attr.attr
|
||||
|
||||
#define DECLARE_FAN_INPUT_SENSOR_DEV_ATTR(index) \
|
||||
static SENSOR_DEVICE_ATTR(fan##index##_input, S_IRUGO, fan_show_value, NULL, FAN##index##_INPUT)
|
||||
#define DECLARE_FAN_INPUT_ATTR(index) &sensor_dev_attr_fan##index##_input.dev_attr.attr
|
||||
|
||||
/* 6 fan fault attributes in this platform */
|
||||
DECLARE_FAN_FAULT_SENSOR_DEV_ATTR(1);
|
||||
DECLARE_FAN_FAULT_SENSOR_DEV_ATTR(2);
|
||||
@ -165,6 +179,19 @@ DECLARE_FAN_DIRECTION_SENSOR_DEV_ATTR(5);
|
||||
/* 1 fan duty cycle attribute in this platform */
|
||||
DECLARE_FAN_DUTY_CYCLE_SENSOR_DEV_ATTR();
|
||||
|
||||
/* fan input attributes in this platform */
|
||||
DECLARE_FAN_INPUT_SENSOR_DEV_ATTR(1);
|
||||
DECLARE_FAN_INPUT_SENSOR_DEV_ATTR(2);
|
||||
DECLARE_FAN_INPUT_SENSOR_DEV_ATTR(3);
|
||||
DECLARE_FAN_INPUT_SENSOR_DEV_ATTR(4);
|
||||
DECLARE_FAN_INPUT_SENSOR_DEV_ATTR(5);
|
||||
|
||||
DECLARE_FAN_INPUT_SENSOR_DEV_ATTR(6);
|
||||
DECLARE_FAN_INPUT_SENSOR_DEV_ATTR(7);
|
||||
DECLARE_FAN_INPUT_SENSOR_DEV_ATTR(8);
|
||||
DECLARE_FAN_INPUT_SENSOR_DEV_ATTR(9);
|
||||
DECLARE_FAN_INPUT_SENSOR_DEV_ATTR(10);
|
||||
|
||||
static struct attribute *as7116_54x_fan_attributes[] = {
|
||||
/* fan related attributes */
|
||||
DECLARE_FAN_FAULT_ATTR(1),
|
||||
@ -188,6 +215,16 @@ static struct attribute *as7116_54x_fan_attributes[] = {
|
||||
DECLARE_FAN_DIRECTION_ATTR(4),
|
||||
DECLARE_FAN_DIRECTION_ATTR(5),
|
||||
DECLARE_FAN_DUTY_CYCLE_ATTR(),
|
||||
DECLARE_FAN_INPUT_ATTR(1),
|
||||
DECLARE_FAN_INPUT_ATTR(2),
|
||||
DECLARE_FAN_INPUT_ATTR(3),
|
||||
DECLARE_FAN_INPUT_ATTR(4),
|
||||
DECLARE_FAN_INPUT_ATTR(5),
|
||||
DECLARE_FAN_INPUT_ATTR(6),
|
||||
DECLARE_FAN_INPUT_ATTR(7),
|
||||
DECLARE_FAN_INPUT_ATTR(8),
|
||||
DECLARE_FAN_INPUT_ATTR(9),
|
||||
DECLARE_FAN_INPUT_ATTR(10),
|
||||
NULL
|
||||
};
|
||||
|
||||
@ -340,6 +377,19 @@ static ssize_t fan_show_value(struct device *dev, struct device_attribute *da,
|
||||
reg_val_to_direction(data->reg_val[FAN_DIRECTION_REG],
|
||||
attr->index - FAN1_DIRECTION));
|
||||
break;
|
||||
case FAN1_INPUT:
|
||||
case FAN2_INPUT:
|
||||
case FAN3_INPUT:
|
||||
case FAN4_INPUT:
|
||||
case FAN5_INPUT:
|
||||
case FAN6_INPUT:
|
||||
case FAN7_INPUT:
|
||||
case FAN8_INPUT:
|
||||
case FAN9_INPUT:
|
||||
case FAN10_INPUT:
|
||||
ret = sprintf(buf, "%u\n", reg_val_to_speed_rpm(data->reg_val[attr->index
|
||||
- FAN1_INPUT + FAN1_FRONT_SPEED_RPM]));
|
||||
break;
|
||||
default:
|
||||
break;
|
||||
}
|
||||
|
||||
@ -252,6 +252,14 @@ def device_install():
|
||||
print output
|
||||
if FORCE == 0:
|
||||
return status
|
||||
|
||||
if i <= 47:
|
||||
status, output =log_os_system("echo as7116_54x_sfp"+str(i+1)+" 0x51 > /sys/bus/i2c/devices/i2c-"+str(sfp_map[i])+"/new_device", 1)
|
||||
if status:
|
||||
print output
|
||||
if FORCE == 0:
|
||||
return status
|
||||
|
||||
return
|
||||
|
||||
def device_uninstall():
|
||||
|
||||
@ -1 +1 @@
|
||||
Subproject commit 7181a00e42c292472e1327b9890bdcfac810e407
|
||||
Subproject commit b75c4f9aac53a72e576f5234c8a2610498306105
|
||||
Loading…
Reference in New Issue
Block a user