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[Mellanox]: Fix PCIEd configuration files for SN3700 and SN3800 systems (#6913)

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- Why I did it
To fix PCIEd errors in log.

- How I did it
Update pcie.yaml with the right PCI addresses.

- How to verify it
Check logs, operation occurs each minute.

Signed-off-by: liora <liora@nvidia.com>
This commit is contained in:
Lior Avramov 2021-03-01 12:36:18 +02:00 committed by GitHub
parent 0e71d82f72
commit bc1ed0a516
No known key found for this signature in database
GPG Key ID: 4AEE18F83AFDEB23
2 changed files with 3 additions and 3 deletions
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4
device/mellanox/x86_64-mlnx_msn3700c-r0/pcie.yaml
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@ -130,13 +130,13 @@
id: 6f53 id: 6f53
name: 'System peripheral: Intel Corporation Xeon Processor D Family QuickData Technology name: 'System peripheral: Intel Corporation Xeon Processor D Family QuickData Technology
Register DMA Channel 3' Register DMA Channel 3'
- bus: '06' - bus: '07'
dev: '00' dev: '00'
fn: '0' fn: '0'
id: cf6c id: cf6c
name: 'Ethernet controller: Mellanox Technologies MT53100 [Spectrum-2, 64 x 100GbE name: 'Ethernet controller: Mellanox Technologies MT53100 [Spectrum-2, 64 x 100GbE
switch]' switch]'
- bus: 08 - bus: 09
dev: '00' dev: '00'
fn: '0' fn: '0'
id: '1533' id: '1533'

2
device/mellanox/x86_64-mlnx_msn3800-r0/pcie.yaml
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@ -1 +1 @@
../x86_64-mlnx_msn3700-r0/pcie.yaml ../x86_64-mlnx_msn3700c-r0/pcie.yaml