Dell: S6100 fix xcvrd crash (#9206)
This commit is contained in:
Aravind Mani
GitHub
parent
e2bffdf9e7
commit
b31220530a
@ -12,11 +12,12 @@ try:
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import re
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import struct
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import time
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import syslog
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from sonic_platform_base.sfp_base import SfpBase
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from sonic_platform_base.sonic_sfp.sff8436 import sff8436InterfaceId
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from sonic_platform_base.sonic_sfp.sff8436 import sff8436Dom
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except ImportError as e:
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raise ImportError(str(e) + "- required module not found")
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except ImportError as err:
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raise ImportError(str(err) + "- required module not found")
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PAGE_OFFSET = 0
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@ -422,28 +423,24 @@ class Sfp(SfpBase):
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presence_ctrl = self.sfp_control + 'qsfp_modprs'
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try:
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reg_file = open(presence_ctrl)
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except IOError as e:
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return False
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reg_hex = reg_file.readline().rstrip()
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# content is a string containing the hex
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# representation of the register
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reg_value = int(reg_hex, 16)
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# Mask off the bit corresponding to our port
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if (self.sfp_ctrl_idx > 15):
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index = self.sfp_ctrl_idx % 16
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else:
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index = self.sfp_ctrl_idx
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# Mask off the bit corresponding to our port
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mask = (1 << index)
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# ModPrsL is active low
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if ((reg_value & mask) == 0):
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return True
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reg_hex = reg_file.readline().rstrip()
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# content is a string containing the hex
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# representation of the register
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reg_value = int(reg_hex, 16)
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# Mask off the bit corresponding to our port
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if (self.sfp_ctrl_idx > 15):
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index = self.sfp_ctrl_idx % 16
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else:
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index = self.sfp_ctrl_idx
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# Mask off the bit corresponding to our port
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mask = (1 << index)
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# ModPrsL is active low
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if ((reg_value & mask) == 0):
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return True
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except (IOError, ValueError) as err:
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syslog.syslog(syslog.LOG_ERR, str(err))
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return False
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def get_model(self):
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@ -478,28 +475,27 @@ class Sfp(SfpBase):
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reset_ctrl = self.sfp_control + 'qsfp_reset'
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try:
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reg_file = open(reset_ctrl, "r+")
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except IOError as e:
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reg_hex = reg_file.readline().rstrip()
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# content is a string containing the hex
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# representation of the register
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reg_value = int(reg_hex, 16)
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# Mask off the bit corresponding to our port
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if (self.sfp_ctrl_idx > 15):
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index = self.sfp_ctrl_idx % 16
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else:
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index = self.sfp_ctrl_idx
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mask = (1 << index)
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if ((reg_value & mask) == 0):
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reset_status = True
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else:
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reset_status = False
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except (IOError, ValueError) as err:
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syslog.syslog(syslog.LOG_ERR, str(err))
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return False
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reg_hex = reg_file.readline().rstrip()
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# content is a string containing the hex
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# representation of the register
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reg_value = int(reg_hex, 16)
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# Mask off the bit corresponding to our port
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if (self.sfp_ctrl_idx > 15):
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index = self.sfp_ctrl_idx % 16
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else:
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index = self.sfp_ctrl_idx
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mask = (1 << index)
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if ((reg_value & mask) == 0):
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reset_status = True
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else:
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reset_status = False
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return reset_status
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def get_rx_los(self):
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@ -615,28 +611,30 @@ class Sfp(SfpBase):
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lpmode_ctrl = self.sfp_control + 'qsfp_lpmode'
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try:
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reg_file = open(lpmode_ctrl, "r+")
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except IOError as e:
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reg_hex = reg_file.readline().rstrip()
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# content is a string containing the hex
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# representation of the register
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reg_value = int(reg_hex, 16)
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# Mask off the bit corresponding to our port
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if (self.sfp_ctrl_idx > 15):
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index = self.sfp_ctrl_idx % 16
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else:
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index = self.sfp_ctrl_idx
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mask = (1 << index)
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if ((reg_value & mask) == 0):
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lpmode_state = False
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else:
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lpmode_state = True
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except (IOError, ValueError) as err:
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syslog.syslog(syslog.LOG_ERR, str(err))
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return False
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reg_hex = reg_file.readline().rstrip()
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# content is a string containing the hex
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# representation of the register
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reg_value = int(reg_hex, 16)
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# Mask off the bit corresponding to our port
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if (self.sfp_ctrl_idx > 15):
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index = self.sfp_ctrl_idx % 16
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else:
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index = self.sfp_ctrl_idx
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mask = (1 << index)
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if ((reg_value & mask) == 0):
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lpmode_state = False
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else:
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lpmode_state = True
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return lpmode_state
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def get_power_override(self):
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@ -731,45 +729,41 @@ class Sfp(SfpBase):
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try:
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# Open reset_ctrl in both read & write mode
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reg_file = open(reset_ctrl, "r+")
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except IOError as e:
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return False
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reg_hex = reg_file.readline().rstrip()
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reg_value = int(reg_hex, 16)
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reg_hex = reg_file.readline().rstrip()
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reg_value = int(reg_hex, 16)
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# Mask off the bit corresponding to our port
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if (self.sfp_ctrl_idx > 15):
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index = self.sfp_ctrl_idx % 16
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else:
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index = self.sfp_ctrl_idx
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# Mask off the bit corresponding to our port
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if (self.sfp_ctrl_idx > 15):
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index = self.sfp_ctrl_idx % 16
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else:
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index = self.sfp_ctrl_idx
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# Mask off the bit corresponding to our port
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mask = (1 << index)
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# Mask off the bit corresponding to our port
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mask = (1 << index)
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# ResetL is active low
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reg_value = (reg_value & ~mask)
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# ResetL is active low
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reg_value = (reg_value & ~mask)
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# Convert our register value back to a
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# hex string and write back
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reg_file.seek(0)
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reg_file.write(hex(reg_value))
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reg_file.close()
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# Convert our register value back to a
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# hex string and write back
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reg_file.seek(0)
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reg_file.write(hex(reg_value))
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reg_file.close()
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# Sleep 1 second to allow it to settle
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time.sleep(1)
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# Flip the bit back high and write back to the
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# register to take port out of reset
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try:
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# Sleep 1 second to allow it to settle
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time.sleep(1)
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# Flip the bit back high and write back to the
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# register to take port out of reset
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reg_file = open(reset_ctrl, "w")
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except IOError as e:
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reg_value = reg_value | mask
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reg_file.seek(0)
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reg_file.write(hex(reg_value))
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reg_file.close()
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except (IOError, ValueError) as err:
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syslog.syslog(syslog.LOG_ERR, str(err))
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return False
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reg_value = reg_value | mask
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reg_file.seek(0)
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reg_file.write(hex(reg_value))
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reg_file.close()
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return True
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def set_lpmode(self, lpmode):
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@ -779,36 +773,36 @@ class Sfp(SfpBase):
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lpmode_ctrl = self.sfp_control + 'qsfp_lpmode'
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try:
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reg_file = open(lpmode_ctrl, "r+")
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except IOError as e:
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reg_hex = reg_file.readline().rstrip()
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# content is a string containing the hex
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# representation of the register
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reg_value = int(reg_hex, 16)
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# Mask off the bit corresponding to our port
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if (self.sfp_ctrl_idx > 15):
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index = self.sfp_ctrl_idx % 16
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else:
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index = self.sfp_ctrl_idx
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mask = (1 << index)
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# LPMode is active high; set or clear the bit accordingly
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if lpmode is True:
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reg_value = (reg_value | mask)
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else:
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reg_value = (reg_value & ~mask)
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# Convert our register value back to a hex string and write back
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content = hex(reg_value)
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reg_file.seek(0)
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reg_file.write(content)
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reg_file.close()
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except (IOError, ValueError) as err:
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syslog.syslog(syslog.LOG_ERR, str(err))
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return False
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reg_hex = reg_file.readline().rstrip()
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# content is a string containing the hex
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# representation of the register
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reg_value = int(reg_hex, 16)
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# Mask off the bit corresponding to our port
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if (self.sfp_ctrl_idx > 15):
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index = self.sfp_ctrl_idx % 16
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else:
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index = self.sfp_ctrl_idx
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mask = (1 << index)
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# LPMode is active high; set or clear the bit accordingly
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if lpmode is True:
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reg_value = (reg_value | mask)
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else:
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reg_value = (reg_value & ~mask)
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# Convert our register value back to a hex string and write back
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content = hex(reg_value)
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reg_file.seek(0)
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reg_file.write(content)
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reg_file.close()
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return True
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def tx_disable(self, tx_disable):
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