[devices]: Add new hwsku Arista-7050-Q31S4 (#2077)
This commit is contained in:
zzhiyuan
lguohan
parent
48a0e149ff
commit
b066c7c275
@ -0,0 +1,138 @@
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{# Default values which will be used if no actual configura available #}
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{% set default_cable = '300m' %}
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{% set default_speed = '100G' %}
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{% set default_ports_num = 32 -%}
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{# Port configuration to cable length look-up table #}
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{# Each record describes mapping of DUT (DUT port) role and neighbor role to cable length #}
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{# Roles described in the minigraph #}
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{% set ports2cable = {
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'torrouter_server' : '5m',
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'leafrouter_torrouter' : '40m',
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'spinerouter_leafrouter' : '300m'
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}
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%}
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{%- macro cable_length(port_name) -%}
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{%- set cable_len = [] -%}
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{%- for local_port in DEVICE_NEIGHBOR -%}
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{%- if local_port == port_name -%}
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{%- if DEVICE_NEIGHBOR_METADATA[DEVICE_NEIGHBOR[local_port].name] -%}
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{%- set neighbor = DEVICE_NEIGHBOR_METADATA[DEVICE_NEIGHBOR[local_port].name] -%}
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{%- set neighbor_role = neighbor.type -%}
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{%- set roles1 = switch_role + '_' + neighbor_role %}
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{%- set roles2 = neighbor_role + '_' + switch_role -%}
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{%- set roles1 = roles1 | lower -%}
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{%- set roles2 = roles2 | lower -%}
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{%- if roles1 in ports2cable -%}
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{%- if cable_len.append(ports2cable[roles1]) -%}{%- endif -%}
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{%- elif roles2 in ports2cable -%}
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{%- if cable_len.append(ports2cable[roles2]) -%}{%- endif -%}
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{%- endif -%}
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{%- endif -%}
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{%- endif -%}
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{%- endfor -%}
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{%- if cable_len -%}
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{{ cable_len.0 }}
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{%- else -%}
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{{ default_cable }}
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{%- endif -%}
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{% endmacro %}
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{%- if DEVICE_METADATA is defined %}
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{%- set switch_role = DEVICE_METADATA['localhost']['type'] %}
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{%- endif -%}
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{# Generate list of ports if not defined #}
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{% if PORT is not defined %}
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{% set PORT = [] %}
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{% if PORT.append("Ethernet0") %}{% endif %}
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{% if PORT.append("Ethernet1") %}{% endif %}
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{% if PORT.append("Ethernet2") %}{% endif %}
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{% if PORT.append("Ethernet3") %}{% endif %}
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{% for port_idx in range(1,default_ports_num) %}
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{% if PORT.append("Ethernet%d" % (port_idx*4)) %}{% endif %}
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{% endfor %}
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{% endif -%}
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{% set port_names_list = [] %}
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{% for port in PORT %}
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{%- if port_names_list.append(port) %}{% endif %}
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{% endfor %}
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{% set port_names = port_names_list | join(',') -%}
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{
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"CABLE_LENGTH": {
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"AZURE": {
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{% for port in PORT %}
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{% set cable = cable_length(port) -%}
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"{{ port }}": "{{ cable }}"{%- if not loop.last -%},{% endif %}
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{% endfor %}
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}
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},
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"BUFFER_POOL": {
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"ingress_lossless_pool": {
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"size": "12766208",
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"type": "ingress",
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"mode": "dynamic"
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},
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"egress_lossless_pool": {
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"size": "12766208",
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"type": "egress",
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"mode": "static"
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},
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"egress_lossy_pool": {
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"size": "8072396",
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"type": "egress",
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"mode": "dynamic"
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}
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},
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"BUFFER_PROFILE": {
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"ingress_lossless_profile": {
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"pool":"[BUFFER_POOL|ingress_lossless_pool]",
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"xon":"18432",
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"xoff":"40560",
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"size":"41808",
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"dynamic_th":"-3",
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"xon_offset":"2496"
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},
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"ingress_lossy_profile": {
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"pool":"[BUFFER_POOL|ingress_lossless_pool]",
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"size":"0",
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"dynamic_th":"3"
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},
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"egress_lossless_profile": {
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"pool":"[BUFFER_POOL|egress_lossless_pool]",
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"size":"0",
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"static_th":"12766208"
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},
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"egress_lossy_profile": {
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"pool":"[BUFFER_POOL|egress_lossy_pool]",
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"size":"1518",
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"dynamic_th":"3"
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}
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},
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"BUFFER_PG": {
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"{{ port_names }}|3-4": {
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"profile" : "[BUFFER_PROFILE|ingress_lossless_profile]"
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},
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"{{ port_names }}|0-1": {
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"profile" : "[BUFFER_PROFILE|ingress_lossy_profile]"
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},
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"{{ port_names }}|5": {
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"profile" : "[BUFFER_PROFILE|ingress_lossy_profile]"
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}
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},
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"BUFFER_QUEUE": {
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"{{ port_names }}|3-4": {
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"profile" : "[BUFFER_PROFILE|egress_lossless_profile]"
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},
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"{{ port_names }}|0-1": {
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"profile" : "[BUFFER_PROFILE|egress_lossy_profile]"
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},
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"{{ port_names }}|5": {
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"profile" : "[BUFFER_PROFILE|egress_lossy_profile]"
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}
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}
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}
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@ -0,0 +1 @@
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echo 1 > /sys/devices/pci0000:00/0000:00:02.2/0000:02:00.0/mux
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@ -0,0 +1,36 @@
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# name lanes alias index
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Ethernet0 9 Ethernet1 1
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Ethernet1 10 Ethernet2 2
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Ethernet2 11 Ethernet3 3
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Ethernet3 12 Ethernet4 4
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Ethernet4 13,14,15,16 Ethernet6/1 6
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Ethernet8 17,18,19,20 Ethernet7/1 7
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Ethernet12 21,22,23,24 Ethernet8/1 8
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Ethernet16 29,30,31,32 Ethernet9/1 9
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Ethernet20 25,26,27,28 Ethernet10/1 10
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Ethernet24 33,34,35,36 Ethernet11/1 11
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Ethernet28 37,38,39,40 Ethernet12/1 12
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Ethernet32 45,46,47,48 Ethernet13/1 13
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Ethernet36 41,42,43,44 Ethernet14/1 14
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Ethernet40 49,50,51,52 Ethernet15/1 15
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Ethernet44 53,54,55,56 Ethernet16/1 16
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Ethernet48 69,70,71,72 Ethernet17/1 17
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Ethernet52 65,66,67,68 Ethernet18/1 18
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Ethernet56 73,74,75,76 Ethernet19/1 19
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Ethernet60 77,78,79,80 Ethernet20/1 20
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Ethernet64 93,94,95,96 Ethernet21/1 21
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Ethernet68 89,90,91,92 Ethernet22/1 22
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Ethernet72 97,98,99,100 Ethernet23/1 23
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Ethernet76 101,102,103,104 Ethernet24/1 24
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Ethernet80 109,110,111,112 Ethernet25/1 25
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Ethernet84 105,106,107,108 Ethernet26/1 26
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Ethernet88 121,122,123,124 Ethernet27/1 27
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Ethernet92 125,126,127,128 Ethernet28/1 28
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Ethernet96 61,62,63,64 Ethernet29 29
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Ethernet100 57,58,59,60 Ethernet30 30
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Ethernet104 81,82,83,84 Ethernet31 31
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Ethernet108 85,86,87,88 Ethernet32 32
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Ethernet112 117,118,119,120 Ethernet33 33
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Ethernet116 113,114,115,116 Ethernet34 34
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Ethernet120 1,2,3,4 Ethernet35 35
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Ethernet124 5,6,7,8 Ethernet36 36
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@ -0,0 +1,144 @@
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{
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"TC_TO_PRIORITY_GROUP_MAP": {
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"AZURE": {
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"0": "0",
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"1": "1",
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"3": "3",
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"4": "4",
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"5": "5"
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}
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},
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"MAP_PFC_PRIORITY_TO_QUEUE": {
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"AZURE": {
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"0": "0",
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"1": "1",
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"3": "3",
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"4": "4",
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"5": "5"
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}
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},
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"TC_TO_QUEUE_MAP": {
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"AZURE": {
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"0": "0",
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"1": "1",
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"3": "3",
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"4": "4",
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"5": "5"
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}
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},
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"DSCP_TO_TC_MAP": {
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"AZURE": {
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"0":"0",
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"1":"0",
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"2":"0",
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"3":"3",
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"4":"4",
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"5":"0",
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"6":"0",
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"7":"0",
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"8":"1",
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"9":"0",
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"10":"0",
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"11":"0",
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"12":"0",
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"13":"0",
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"14":"0",
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"15":"0",
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"16":"0",
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"17":"0",
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"18":"0",
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"19":"0",
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"20":"0",
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"21":"0",
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"22":"0",
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"23":"0",
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"24":"0",
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"25":"0",
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"26":"0",
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"27":"0",
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"28":"0",
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"29":"0",
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"30":"0",
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"31":"0",
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"32":"0",
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"33":"0",
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"34":"0",
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"35":"0",
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"36":"0",
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"37":"0",
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"38":"0",
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"39":"0",
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"40":"0",
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"41":"0",
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"42":"0",
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"43":"0",
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"44":"0",
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"45":"0",
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"46":"5",
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"47":"0",
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"48":"0",
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"49":"0",
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"50":"0",
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"51":"0",
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"52":"0",
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"53":"0",
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"54":"0",
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"55":"0",
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"56":"0",
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"57":"0",
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"58":"0",
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"59":"0",
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"60":"0",
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"61":"0",
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"62":"0",
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"63":"0"
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}
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},
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"SCHEDULER": {
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"scheduler.0" : {
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"type":"DWRR",
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"weight": "20"
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}
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},
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"PORT_QOS_MAP": {
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"Ethernet0,Ethernet1,Ethernet2,Ethernet3,Ethernet4,Ethernet8,Ethernet12,Ethernet16,Ethernet20,Ethernet24,Ethernet28,Ethernet32,Ethernet36,Ethernet40,Ethernet44,Ethernet48,Ethernet52,Ethernet56,Ethernet60,Ethernet64,Ethernet68,Ethernet72,Ethernet76,Ethernet80,Ethernet84,Ethernet88,Ethernet92,Ethernet96,Ethernet100,Ethernet104,Ethernet108,Ethernet112,Ethernet116,Ethernet120,Ethernet124": {
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"dscp_to_tc_map" : "[DSCP_TO_TC_MAP|AZURE]",
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"tc_to_queue_map" : "[TC_TO_QUEUE_MAP|AZURE]",
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"tc_to_pg_map" : "[TC_TO_PRIORITY_GROUP_MAP|AZURE]",
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"pfc_to_queue_map": "[MAP_PFC_PRIORITY_TO_QUEUE|AZURE]",
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"pfc_enable": "3,4"
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}
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},
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"WRED_PROFILE": {
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"AZURE_LOSSLESS" : {
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"wred_green_enable":"true",
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"wred_yellow_enable":"true",
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"wred_red_enable":"true",
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"ecn":"ecn_all",
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"red_max_threshold":"2097152",
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"red_min_threshold":"1048576",
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"yellow_max_threshold":"2097152",
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"yellow_min_threshold":"1048576",
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"green_max_threshold":"2097152",
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"green_min_threshold":"1048576",
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"green_drop_probability":"5",
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"yellow_drop_probability":"5",
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"red_drop_probability":"5"
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}
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},
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"QUEUE": {
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"Ethernet0,Ethernet1,Ethernet2,Ethernet3,Ethernet4,Ethernet8,Ethernet12,Ethernet16,Ethernet20,Ethernet24,Ethernet28,Ethernet32,Ethernet36,Ethernet40,Ethernet44,Ethernet48,Ethernet52,Ethernet56,Ethernet60,Ethernet64,Ethernet68,Ethernet72,Ethernet76,Ethernet80,Ethernet84,Ethernet88,Ethernet92,Ethernet96,Ethernet100,Ethernet104,Ethernet108,Ethernet112,Ethernet116,Ethernet120,Ethernet124|3-4" : {
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"scheduler" : "[SCHEDULER|scheduler.0]",
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"wred_profile" : "[WRED_PROFILE|AZURE_LOSSLESS]"
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},
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"Ethernet0,Ethernet1,Ethernet2,Ethernet3,Ethernet4,Ethernet8,Ethernet12,Ethernet16,Ethernet20,Ethernet24,Ethernet28,Ethernet32,Ethernet36,Ethernet40,Ethernet44,Ethernet48,Ethernet52,Ethernet56,Ethernet60,Ethernet64,Ethernet68,Ethernet72,Ethernet76,Ethernet80,Ethernet84,Ethernet88,Ethernet92,Ethernet96,Ethernet100,Ethernet104,Ethernet108,Ethernet112,Ethernet116,Ethernet120,Ethernet124|0" : {
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"scheduler" : "[SCHEDULER|scheduler.0]"
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},
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"Ethernet0,Ethernet1,Ethernet2,Ethernet3,Ethernet4,Ethernet8,Ethernet12,Ethernet16,Ethernet20,Ethernet24,Ethernet28,Ethernet32,Ethernet36,Ethernet40,Ethernet44,Ethernet48,Ethernet52,Ethernet56,Ethernet60,Ethernet64,Ethernet68,Ethernet72,Ethernet76,Ethernet80,Ethernet84,Ethernet88,Ethernet92,Ethernet96,Ethernet100,Ethernet104,Ethernet108,Ethernet112,Ethernet116,Ethernet120,Ethernet124|1" : {
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"scheduler" : "[SCHEDULER|scheduler.0]"
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},
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"Ethernet0,Ethernet1,Ethernet2,Ethernet3,Ethernet4,Ethernet8,Ethernet12,Ethernet16,Ethernet20,Ethernet24,Ethernet28,Ethernet32,Ethernet36,Ethernet40,Ethernet44,Ethernet48,Ethernet52,Ethernet56,Ethernet60,Ethernet64,Ethernet68,Ethernet72,Ethernet76,Ethernet80,Ethernet84,Ethernet88,Ethernet92,Ethernet96,Ethernet100,Ethernet104,Ethernet108,Ethernet112,Ethernet116,Ethernet120,Ethernet124|5" : {
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"scheduler" : "[SCHEDULER|scheduler.0]"
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}
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}
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}
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@ -0,0 +1 @@
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SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/td2-a7050-q31s4-31x40G-4x10G.config.bcm
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@ -0,0 +1,676 @@
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arl_clean_timeout_usec=15000000
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bcm_num_cos.0=8
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bcm_stat_flags=1
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bcm_stat_jumbo.0=9236
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cdma_timeout_usec.0=15000000
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dma_desc_timeout_usec.0=15000000
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higig2_hdr_mode.0=1
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ipv6_lpm_128b_enable.0=2
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l2xmsg_mode.0=1
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max_vp_lags.0=0
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mdio_output_delay=0x0d
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miim_intr_enable.0=0
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module_64ports.0=0
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os=unix
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pbmp_oversubscribe.0=0x1fffffffffffffffffffffffffe
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pbmp_xport_xe.0=0x1fffffffffffffffffffffffffe
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phy_an_c37_1.0=3
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phy_an_c37_5.0=3
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phy_an_c37_9.0=3
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phy_an_c37_13.0=3
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phy_an_c37_17.0=3
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phy_an_c37_21.0=3
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phy_an_c37_25.0=3
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phy_an_c37_29.0=3
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phy_an_c37_33.0=3
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phy_an_c37_37.0=3
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phy_an_c37_41.0=3
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phy_an_c37_45.0=3
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phy_an_c37_49.0=3
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phy_an_c37_53.0=3
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phy_an_c37_57.0=3
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phy_an_c37_61.0=3
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phy_an_c37_65.0=3
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phy_an_c37_69.0=3
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phy_an_c37_73.0=3
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phy_an_c37_77.0=3
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phy_an_c37_81.0=3
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phy_an_c37_85.0=3
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phy_an_c37_89.0=3
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phy_an_c37_93.0=3
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phy_an_c37_97.0=0
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phy_an_c37_98.0=0
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phy_an_c37_99.0=0
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phy_an_c37_100.0=0
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phy_an_c37_101.0=0
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phy_an_c37_102.0=0
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phy_an_c37_103.0=0
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phy_an_c37_104.0=0
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phy_an_c73_1.0=0
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phy_an_c73_5.0=0
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phy_an_c73_9.0=0
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phy_an_c73_13.0=0
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phy_an_c73_17.0=0
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phy_an_c73_21.0=0
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phy_an_c73_25.0=0
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phy_an_c73_29.0=0
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phy_an_c73_33.0=0
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phy_an_c73_37.0=0
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phy_an_c73_41.0=0
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phy_an_c73_45.0=0
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phy_an_c73_49.0=0
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phy_an_c73_53.0=0
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phy_an_c73_57.0=0
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phy_an_c73_61.0=0
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phy_an_c73_65.0=0
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phy_an_c73_69.0=0
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phy_an_c73_73.0=0
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phy_an_c73_77.0=0
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phy_an_c73_81.0=0
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phy_an_c73_85.0=0
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phy_an_c73_89.0=0
|
||||
phy_an_c73_93.0=0
|
||||
phy_an_c73_97.0=2
|
||||
phy_an_c73_98.0=2
|
||||
phy_an_c73_99.0=2
|
||||
phy_an_c73_100.0=2
|
||||
phy_an_c73_101.0=2
|
||||
phy_an_c73_102.0=2
|
||||
phy_an_c73_103.0=2
|
||||
phy_an_c73_104.0=2
|
||||
phy_xaui_rx_polarity_flip_1.0=0x0
|
||||
phy_xaui_rx_polarity_flip_5.0=0x0
|
||||
phy_xaui_rx_polarity_flip_9.0=0x4
|
||||
phy_xaui_rx_polarity_flip_13.0=0x0
|
||||
phy_xaui_rx_polarity_flip_17.0=0xb
|
||||
phy_xaui_rx_polarity_flip_21.0=0x3
|
||||
phy_xaui_rx_polarity_flip_25.0=0xb
|
||||
phy_xaui_rx_polarity_flip_29.0=0xf
|
||||
phy_xaui_rx_polarity_flip_33.0=0xb
|
||||
phy_xaui_rx_polarity_flip_37.0=0x3
|
||||
phy_xaui_rx_polarity_flip_41.0=0xb
|
||||
phy_xaui_rx_polarity_flip_45.0=0x0
|
||||
phy_xaui_rx_polarity_flip_49.0=0x4
|
||||
phy_xaui_rx_polarity_flip_53.0=0xc
|
||||
phy_xaui_rx_polarity_flip_57.0=0x4
|
||||
phy_xaui_rx_polarity_flip_61.0=0x0
|
||||
phy_xaui_rx_polarity_flip_65.0=0xb
|
||||
phy_xaui_rx_polarity_flip_69.0=0x3
|
||||
phy_xaui_rx_polarity_flip_73.0=0xb
|
||||
phy_xaui_rx_polarity_flip_77.0=0xf
|
||||
phy_xaui_rx_polarity_flip_81.0=0xb
|
||||
phy_xaui_rx_polarity_flip_85.0=0x3
|
||||
phy_xaui_rx_polarity_flip_89.0=0x4
|
||||
phy_xaui_rx_polarity_flip_93.0=0x0
|
||||
phy_xaui_rx_polarity_flip_97.0=0xb
|
||||
phy_xaui_rx_polarity_flip_98.0=0x3
|
||||
phy_xaui_rx_polarity_flip_99.0=0x4
|
||||
phy_xaui_rx_polarity_flip_100.0=0x0
|
||||
phy_xaui_rx_polarity_flip_101.0=0x0
|
||||
phy_xaui_rx_polarity_flip_102.0=0xe
|
||||
phy_xaui_rx_polarity_flip_103.0=0x0
|
||||
phy_xaui_rx_polarity_flip_104.0=0x0
|
||||
phy_xaui_tx_polarity_flip_1.0=0x0
|
||||
phy_xaui_tx_polarity_flip_5.0=0x0
|
||||
phy_xaui_tx_polarity_flip_9.0=0x2
|
||||
phy_xaui_tx_polarity_flip_13.0=0x0
|
||||
phy_xaui_tx_polarity_flip_17.0=0xd
|
||||
phy_xaui_tx_polarity_flip_21.0=0xc
|
||||
phy_xaui_tx_polarity_flip_25.0=0xd
|
||||
phy_xaui_tx_polarity_flip_29.0=0xf
|
||||
phy_xaui_tx_polarity_flip_33.0=0xd
|
||||
phy_xaui_tx_polarity_flip_37.0=0xc
|
||||
phy_xaui_tx_polarity_flip_41.0=0xd
|
||||
phy_xaui_tx_polarity_flip_45.0=0x0
|
||||
phy_xaui_tx_polarity_flip_49.0=0x2
|
||||
phy_xaui_tx_polarity_flip_53.0=0x3
|
||||
phy_xaui_tx_polarity_flip_57.0=0x2
|
||||
phy_xaui_tx_polarity_flip_61.0=0x0
|
||||
phy_xaui_tx_polarity_flip_65.0=0xd
|
||||
phy_xaui_tx_polarity_flip_69.0=0xc
|
||||
phy_xaui_tx_polarity_flip_73.0=0xd
|
||||
phy_xaui_tx_polarity_flip_77.0=0xf
|
||||
phy_xaui_tx_polarity_flip_81.0=0xd
|
||||
phy_xaui_tx_polarity_flip_85.0=0xc
|
||||
phy_xaui_tx_polarity_flip_89.0=0x2
|
||||
phy_xaui_tx_polarity_flip_93.0=0x0
|
||||
phy_xaui_tx_polarity_flip_97.0=0xd
|
||||
phy_xaui_tx_polarity_flip_98.0=0xc
|
||||
phy_xaui_tx_polarity_flip_99.0=0x2
|
||||
phy_xaui_tx_polarity_flip_100.0=0x0
|
||||
phy_xaui_tx_polarity_flip_101.0=0x0
|
||||
phy_xaui_tx_polarity_flip_102.0=0x7
|
||||
phy_xaui_tx_polarity_flip_103.0=0x2
|
||||
phy_xaui_tx_polarity_flip_104.0=0x0
|
||||
port_init_autoneg_1.0=0
|
||||
port_init_autoneg_5.0=0
|
||||
port_init_autoneg_9.0=0
|
||||
port_init_autoneg_13.0=0
|
||||
port_init_autoneg_17.0=0
|
||||
port_init_autoneg_21.0=0
|
||||
port_init_autoneg_25.0=0
|
||||
port_init_autoneg_29.0=0
|
||||
port_init_autoneg_33.0=0
|
||||
port_init_autoneg_37.0=0
|
||||
port_init_autoneg_41.0=0
|
||||
port_init_autoneg_45.0=0
|
||||
port_init_autoneg_49.0=0
|
||||
port_init_autoneg_53.0=0
|
||||
port_init_autoneg_57.0=0
|
||||
port_init_autoneg_61.0=0
|
||||
port_init_autoneg_65.0=0
|
||||
port_init_autoneg_69.0=0
|
||||
port_init_autoneg_73.0=0
|
||||
port_init_autoneg_77.0=0
|
||||
port_init_autoneg_81.0=0
|
||||
port_init_autoneg_85.0=0
|
||||
port_init_autoneg_89.0=0
|
||||
port_init_autoneg_93.0=0
|
||||
port_init_autoneg_97.0=0
|
||||
port_init_autoneg_98.0=0
|
||||
port_init_autoneg_99.0=0
|
||||
port_init_autoneg_100.0=0
|
||||
port_init_autoneg_101.0=0
|
||||
port_init_autoneg_102.0=0
|
||||
port_init_autoneg_103.0=0
|
||||
port_init_autoneg_104.0=0
|
||||
port_init_cl72.0=0
|
||||
portmap_1.0=9:10
|
||||
portmap_2.0=10:10
|
||||
portmap_3.0=11:10
|
||||
portmap_4.0=12:10
|
||||
portmap_5.0=13:40
|
||||
portmap_9.0=17:40
|
||||
portmap_13.0=21:40
|
||||
portmap_17.0=29:40
|
||||
portmap_21.0=25:40
|
||||
portmap_25.0=33:40
|
||||
portmap_29.0=37:40
|
||||
portmap_33.0=45:40
|
||||
portmap_37.0=41:40
|
||||
portmap_41.0=49:40
|
||||
portmap_45.0=53:40
|
||||
portmap_49.0=69:40
|
||||
portmap_53.0=65:40
|
||||
portmap_57.0=73:40
|
||||
portmap_61.0=77:40
|
||||
portmap_65.0=93:40
|
||||
portmap_69.0=89:40
|
||||
portmap_73.0=97:40
|
||||
portmap_77.0=101:40
|
||||
portmap_81.0=109:40
|
||||
portmap_85.0=105:40
|
||||
portmap_89.0=121:40
|
||||
portmap_93.0=125:40
|
||||
portmap_97.0=61:40
|
||||
portmap_98.0=57:40
|
||||
portmap_99.0=81:40
|
||||
portmap_100.0=85:40
|
||||
portmap_101.0=117:40
|
||||
portmap_102.0=113:40
|
||||
portmap_103.0=1:40
|
||||
portmap_104.0=5:40
|
||||
scache_filename=/tmp/scache
|
||||
schan_intr_enable=0
|
||||
serdes_firmware_mode_1.0=2
|
||||
serdes_firmware_mode_5.0=2
|
||||
serdes_firmware_mode_9.0=2
|
||||
serdes_firmware_mode_13.0=2
|
||||
serdes_firmware_mode_17.0=2
|
||||
serdes_firmware_mode_21.0=2
|
||||
serdes_firmware_mode_25.0=2
|
||||
serdes_firmware_mode_29.0=2
|
||||
serdes_firmware_mode_33.0=2
|
||||
serdes_firmware_mode_37.0=2
|
||||
serdes_firmware_mode_41.0=2
|
||||
serdes_firmware_mode_45.0=2
|
||||
serdes_firmware_mode_49.0=2
|
||||
serdes_firmware_mode_53.0=2
|
||||
serdes_firmware_mode_57.0=2
|
||||
serdes_firmware_mode_61.0=2
|
||||
serdes_firmware_mode_65.0=2
|
||||
serdes_firmware_mode_69.0=2
|
||||
serdes_firmware_mode_73.0=2
|
||||
serdes_firmware_mode_77.0=2
|
||||
serdes_firmware_mode_81.0=2
|
||||
serdes_firmware_mode_85.0=2
|
||||
serdes_firmware_mode_89.0=2
|
||||
serdes_firmware_mode_93.0=2
|
||||
serdes_firmware_mode_97.0=2
|
||||
serdes_firmware_mode_98.0=2
|
||||
serdes_firmware_mode_99.0=2
|
||||
serdes_firmware_mode_100.0=2
|
||||
serdes_firmware_mode_101.0=2
|
||||
serdes_firmware_mode_102.0=2
|
||||
serdes_firmware_mode_103.0=2
|
||||
serdes_firmware_mode_104.0=2
|
||||
stable_size=0x2000000
|
||||
tdma_timeout_usec.0=15000000
|
||||
tslam_timeout_usec.0=15000000
|
||||
xgxs_lcpll_xtal_refclk.0=1
|
||||
xgxs_rx_lane_map_1.0=0x0123
|
||||
xgxs_rx_lane_map_5.0=0x0321
|
||||
xgxs_rx_lane_map_9.0=0x1302
|
||||
xgxs_rx_lane_map_13.0=0x0213
|
||||
xgxs_rx_lane_map_17.0=0x1302
|
||||
xgxs_rx_lane_map_21.0=0x1302
|
||||
xgxs_rx_lane_map_25.0=0x1302
|
||||
xgxs_rx_lane_map_29.0=0x0213
|
||||
xgxs_rx_lane_map_33.0=0x1302
|
||||
xgxs_rx_lane_map_37.0=0x1302
|
||||
xgxs_rx_lane_map_41.0=0x1302
|
||||
xgxs_rx_lane_map_45.0=0x0213
|
||||
xgxs_rx_lane_map_49.0=0x1302
|
||||
xgxs_rx_lane_map_53.0=0x1302
|
||||
xgxs_rx_lane_map_57.0=0x1302
|
||||
xgxs_rx_lane_map_61.0=0x0213
|
||||
xgxs_rx_lane_map_65.0=0x1302
|
||||
xgxs_rx_lane_map_69.0=0x1302
|
||||
xgxs_rx_lane_map_73.0=0x1302
|
||||
xgxs_rx_lane_map_77.0=0x0213
|
||||
xgxs_rx_lane_map_81.0=0x1302
|
||||
xgxs_rx_lane_map_85.0=0x1302
|
||||
xgxs_rx_lane_map_89.0=0x1302
|
||||
xgxs_rx_lane_map_93.0=0x0213
|
||||
xgxs_rx_lane_map_97.0=0x1302
|
||||
xgxs_rx_lane_map_98.0=0x1302
|
||||
xgxs_rx_lane_map_99.0=0x1302
|
||||
xgxs_rx_lane_map_100.0=0x0213
|
||||
xgxs_rx_lane_map_101.0=0x0213
|
||||
xgxs_rx_lane_map_102.0=0x1302
|
||||
xgxs_rx_lane_map_103.0=0x0123
|
||||
xgxs_rx_lane_map_104.0=0x2031
|
||||
xgxs_tx_lane_map_1.0=0x3210
|
||||
xgxs_tx_lane_map_5.0=0x0321
|
||||
xgxs_tx_lane_map_9.0=0x2031
|
||||
xgxs_tx_lane_map_13.0=0x0213
|
||||
xgxs_tx_lane_map_17.0=0x2031
|
||||
xgxs_tx_lane_map_21.0=0x2031
|
||||
xgxs_tx_lane_map_25.0=0x2031
|
||||
xgxs_tx_lane_map_29.0=0x0213
|
||||
xgxs_tx_lane_map_33.0=0x2031
|
||||
xgxs_tx_lane_map_37.0=0x2031
|
||||
xgxs_tx_lane_map_41.0=0x2031
|
||||
xgxs_tx_lane_map_45.0=0x0213
|
||||
xgxs_tx_lane_map_49.0=0x2031
|
||||
xgxs_tx_lane_map_53.0=0x2031
|
||||
xgxs_tx_lane_map_57.0=0x2031
|
||||
xgxs_tx_lane_map_61.0=0x0213
|
||||
xgxs_tx_lane_map_65.0=0x2031
|
||||
xgxs_tx_lane_map_69.0=0x2031
|
||||
xgxs_tx_lane_map_73.0=0x2031
|
||||
xgxs_tx_lane_map_77.0=0x0213
|
||||
xgxs_tx_lane_map_81.0=0x2031
|
||||
xgxs_tx_lane_map_85.0=0x2031
|
||||
xgxs_tx_lane_map_89.0=0x2031
|
||||
xgxs_tx_lane_map_93.0=0x0213
|
||||
xgxs_tx_lane_map_97.0=0x2031
|
||||
xgxs_tx_lane_map_98.0=0x2031
|
||||
xgxs_tx_lane_map_99.0=0x2031
|
||||
xgxs_tx_lane_map_100.0=0x0213
|
||||
xgxs_tx_lane_map_101.0=0x0213
|
||||
xgxs_tx_lane_map_102.0=0x2031
|
||||
xgxs_tx_lane_map_103.0=0x3120
|
||||
xgxs_tx_lane_map_104.0=0x1302
|
||||
|
||||
# tuning parameters
|
||||
serdes_preemphasis_lane0_1.0=0x81f7
|
||||
serdes_preemphasis_lane1_1.0=0x81f7
|
||||
serdes_preemphasis_lane2_1.0=0x81f7
|
||||
serdes_preemphasis_lane3_1.0=0x81f7
|
||||
serdes_pre_driver_current_lane0_5.0=0x7
|
||||
serdes_driver_current_lane0_5.0=0x7
|
||||
serdes_preemphasis_lane0_5.0=0xc2f0
|
||||
serdes_pre_driver_current_lane1_5.0=0x7
|
||||
serdes_driver_current_lane1_5.0=0x7
|
||||
serdes_preemphasis_lane1_5.0=0xc2f0
|
||||
serdes_pre_driver_current_lane2_5.0=0x7
|
||||
serdes_driver_current_lane2_5.0=0x7
|
||||
serdes_preemphasis_lane2_5.0=0xc2f0
|
||||
serdes_pre_driver_current_lane3_5.0=0x7
|
||||
serdes_driver_current_lane3_5.0=0x7
|
||||
serdes_preemphasis_lane3_5.0=0xc2f0
|
||||
serdes_pre_driver_current_lane0_9.0=0x7
|
||||
serdes_driver_current_lane0_9.0=0x7
|
||||
serdes_preemphasis_lane0_9.0=0xbb10
|
||||
serdes_pre_driver_current_lane1_9.0=0x7
|
||||
serdes_driver_current_lane1_9.0=0x7
|
||||
serdes_preemphasis_lane1_9.0=0xbb10
|
||||
serdes_pre_driver_current_lane2_9.0=0x7
|
||||
serdes_driver_current_lane2_9.0=0x7
|
||||
serdes_preemphasis_lane2_9.0=0xbb10
|
||||
serdes_pre_driver_current_lane3_9.0=0x7
|
||||
serdes_driver_current_lane3_9.0=0x7
|
||||
serdes_preemphasis_lane3_9.0=0xbb10
|
||||
serdes_pre_driver_current_lane0_13.0=0x7
|
||||
serdes_driver_current_lane0_13.0=0x7
|
||||
serdes_preemphasis_lane0_13.0=0xbb10
|
||||
serdes_pre_driver_current_lane1_13.0=0x7
|
||||
serdes_driver_current_lane1_13.0=0x7
|
||||
serdes_preemphasis_lane1_13.0=0xbb10
|
||||
serdes_pre_driver_current_lane2_13.0=0x7
|
||||
serdes_driver_current_lane2_13.0=0x7
|
||||
serdes_preemphasis_lane2_13.0=0xbb10
|
||||
serdes_pre_driver_current_lane3_13.0=0x7
|
||||
serdes_driver_current_lane3_13.0=0x7
|
||||
serdes_preemphasis_lane3_13.0=0xbb10
|
||||
serdes_pre_driver_current_lane0_17.0=0x6
|
||||
serdes_driver_current_lane0_17.0=0x6
|
||||
serdes_preemphasis_lane0_17.0=0xb720
|
||||
serdes_pre_driver_current_lane1_17.0=0x6
|
||||
serdes_driver_current_lane1_17.0=0x6
|
||||
serdes_preemphasis_lane1_17.0=0xb720
|
||||
serdes_pre_driver_current_lane2_17.0=0x6
|
||||
serdes_driver_current_lane2_17.0=0x6
|
||||
serdes_preemphasis_lane2_17.0=0xb720
|
||||
serdes_pre_driver_current_lane3_17.0=0x6
|
||||
serdes_driver_current_lane3_17.0=0x6
|
||||
serdes_preemphasis_lane3_17.0=0xb720
|
||||
serdes_pre_driver_current_lane0_21.0=0x7
|
||||
serdes_driver_current_lane0_21.0=0x7
|
||||
serdes_preemphasis_lane0_21.0=0xbb10
|
||||
serdes_pre_driver_current_lane1_21.0=0x7
|
||||
serdes_driver_current_lane1_21.0=0x7
|
||||
serdes_preemphasis_lane1_21.0=0xbb10
|
||||
serdes_pre_driver_current_lane2_21.0=0x7
|
||||
serdes_driver_current_lane2_21.0=0x7
|
||||
serdes_preemphasis_lane2_21.0=0xbb10
|
||||
serdes_pre_driver_current_lane3_21.0=0x7
|
||||
serdes_driver_current_lane3_21.0=0x7
|
||||
serdes_preemphasis_lane3_21.0=0xbb10
|
||||
serdes_pre_driver_current_lane0_25.0=0x5
|
||||
serdes_driver_current_lane0_25.0=0x5
|
||||
serdes_preemphasis_lane0_25.0=0xb720
|
||||
serdes_pre_driver_current_lane1_25.0=0x5
|
||||
serdes_driver_current_lane1_25.0=0x5
|
||||
serdes_preemphasis_lane1_25.0=0xb720
|
||||
serdes_pre_driver_current_lane2_25.0=0x5
|
||||
serdes_driver_current_lane2_25.0=0x5
|
||||
serdes_preemphasis_lane2_25.0=0xb720
|
||||
serdes_pre_driver_current_lane3_25.0=0x5
|
||||
serdes_driver_current_lane3_25.0=0x5
|
||||
serdes_preemphasis_lane3_25.0=0xb720
|
||||
serdes_pre_driver_current_lane0_29.0=0x5
|
||||
serdes_driver_current_lane0_29.0=0x5
|
||||
serdes_preemphasis_lane0_29.0=0xb720
|
||||
serdes_pre_driver_current_lane1_29.0=0x5
|
||||
serdes_driver_current_lane1_29.0=0x5
|
||||
serdes_preemphasis_lane1_29.0=0xb720
|
||||
serdes_pre_driver_current_lane2_29.0=0x5
|
||||
serdes_driver_current_lane2_29.0=0x5
|
||||
serdes_preemphasis_lane2_29.0=0xb720
|
||||
serdes_pre_driver_current_lane3_29.0=0x5
|
||||
serdes_driver_current_lane3_29.0=0x5
|
||||
serdes_preemphasis_lane3_29.0=0xb720
|
||||
serdes_pre_driver_current_lane0_33.0=0x4
|
||||
serdes_driver_current_lane0_33.0=0x4
|
||||
serdes_preemphasis_lane0_33.0=0xb720
|
||||
serdes_pre_driver_current_lane1_33.0=0x4
|
||||
serdes_driver_current_lane1_33.0=0x4
|
||||
serdes_preemphasis_lane1_33.0=0xb720
|
||||
serdes_pre_driver_current_lane2_33.0=0x4
|
||||
serdes_driver_current_lane2_33.0=0x4
|
||||
serdes_preemphasis_lane2_33.0=0xb720
|
||||
serdes_pre_driver_current_lane3_33.0=0x4
|
||||
serdes_driver_current_lane3_33.0=0x4
|
||||
serdes_preemphasis_lane3_33.0=0xb720
|
||||
serdes_pre_driver_current_lane0_37.0=0x5
|
||||
serdes_driver_current_lane0_37.0=0x5
|
||||
serdes_preemphasis_lane0_37.0=0xb720
|
||||
serdes_pre_driver_current_lane1_37.0=0x5
|
||||
serdes_driver_current_lane1_37.0=0x5
|
||||
serdes_preemphasis_lane1_37.0=0xb720
|
||||
serdes_pre_driver_current_lane2_37.0=0x5
|
||||
serdes_driver_current_lane2_37.0=0x5
|
||||
serdes_preemphasis_lane2_37.0=0xb720
|
||||
serdes_pre_driver_current_lane3_37.0=0x5
|
||||
serdes_driver_current_lane3_37.0=0x5
|
||||
serdes_preemphasis_lane3_37.0=0xb720
|
||||
serdes_pre_driver_current_lane0_41.0=0x3
|
||||
serdes_driver_current_lane0_41.0=0x3
|
||||
serdes_preemphasis_lane0_41.0=0xb330
|
||||
serdes_pre_driver_current_lane1_41.0=0x3
|
||||
serdes_driver_current_lane1_41.0=0x3
|
||||
serdes_preemphasis_lane1_41.0=0xb330
|
||||
serdes_pre_driver_current_lane2_41.0=0x3
|
||||
serdes_driver_current_lane2_41.0=0x3
|
||||
serdes_preemphasis_lane2_41.0=0xb330
|
||||
serdes_pre_driver_current_lane3_41.0=0x3
|
||||
serdes_driver_current_lane3_41.0=0x3
|
||||
serdes_preemphasis_lane3_41.0=0xb330
|
||||
serdes_pre_driver_current_lane0_45.0=0x4
|
||||
serdes_driver_current_lane0_45.0=0x4
|
||||
serdes_preemphasis_lane0_45.0=0xb720
|
||||
serdes_pre_driver_current_lane1_45.0=0x4
|
||||
serdes_driver_current_lane1_45.0=0x4
|
||||
serdes_preemphasis_lane1_45.0=0xb720
|
||||
serdes_pre_driver_current_lane2_45.0=0x4
|
||||
serdes_driver_current_lane2_45.0=0x4
|
||||
serdes_preemphasis_lane2_45.0=0xb720
|
||||
serdes_pre_driver_current_lane3_45.0=0x4
|
||||
serdes_driver_current_lane3_45.0=0x4
|
||||
serdes_preemphasis_lane3_45.0=0xb720
|
||||
serdes_pre_driver_current_lane0_49.0=0x3
|
||||
serdes_driver_current_lane0_49.0=0x3
|
||||
serdes_preemphasis_lane0_49.0=0xb330
|
||||
serdes_pre_driver_current_lane1_49.0=0x3
|
||||
serdes_driver_current_lane1_49.0=0x3
|
||||
serdes_preemphasis_lane1_49.0=0xb330
|
||||
serdes_pre_driver_current_lane2_49.0=0x3
|
||||
serdes_driver_current_lane2_49.0=0x3
|
||||
serdes_preemphasis_lane2_49.0=0xb330
|
||||
serdes_pre_driver_current_lane3_49.0=0x3
|
||||
serdes_driver_current_lane3_49.0=0x3
|
||||
serdes_preemphasis_lane3_49.0=0xb330
|
||||
serdes_pre_driver_current_lane0_53.0=0x4
|
||||
serdes_driver_current_lane0_53.0=0x4
|
||||
serdes_preemphasis_lane0_53.0=0xb720
|
||||
serdes_pre_driver_current_lane1_53.0=0x4
|
||||
serdes_driver_current_lane1_53.0=0x4
|
||||
serdes_preemphasis_lane1_53.0=0xb720
|
||||
serdes_pre_driver_current_lane2_53.0=0x4
|
||||
serdes_driver_current_lane2_53.0=0x4
|
||||
serdes_preemphasis_lane2_53.0=0xb720
|
||||
serdes_pre_driver_current_lane3_53.0=0x4
|
||||
serdes_driver_current_lane3_53.0=0x4
|
||||
serdes_preemphasis_lane3_53.0=0xb720
|
||||
serdes_pre_driver_current_lane0_57.0=0x3
|
||||
serdes_driver_current_lane0_57.0=0x3
|
||||
serdes_preemphasis_lane0_57.0=0xb330
|
||||
serdes_pre_driver_current_lane1_57.0=0x3
|
||||
serdes_driver_current_lane1_57.0=0x3
|
||||
serdes_preemphasis_lane1_57.0=0xb330
|
||||
serdes_pre_driver_current_lane2_57.0=0x3
|
||||
serdes_driver_current_lane2_57.0=0x3
|
||||
serdes_preemphasis_lane2_57.0=0xb330
|
||||
serdes_pre_driver_current_lane3_57.0=0x3
|
||||
serdes_driver_current_lane3_57.0=0x3
|
||||
serdes_preemphasis_lane3_57.0=0xb330
|
||||
serdes_pre_driver_current_lane0_61.0=0x4
|
||||
serdes_driver_current_lane0_61.0=0x4
|
||||
serdes_preemphasis_lane0_61.0=0xb720
|
||||
serdes_pre_driver_current_lane1_61.0=0x4
|
||||
serdes_driver_current_lane1_61.0=0x4
|
||||
serdes_preemphasis_lane1_61.0=0xb720
|
||||
serdes_pre_driver_current_lane2_61.0=0x4
|
||||
serdes_driver_current_lane2_61.0=0x4
|
||||
serdes_preemphasis_lane2_61.0=0xb720
|
||||
serdes_pre_driver_current_lane3_61.0=0x4
|
||||
serdes_driver_current_lane3_61.0=0x4
|
||||
serdes_preemphasis_lane3_61.0=0xb720
|
||||
serdes_pre_driver_current_lane0_65.0=0x4
|
||||
serdes_driver_current_lane0_65.0=0x4
|
||||
serdes_preemphasis_lane0_65.0=0xb720
|
||||
serdes_pre_driver_current_lane1_65.0=0x4
|
||||
serdes_driver_current_lane1_65.0=0x4
|
||||
serdes_preemphasis_lane1_65.0=0xb720
|
||||
serdes_pre_driver_current_lane2_65.0=0x4
|
||||
serdes_driver_current_lane2_65.0=0x4
|
||||
serdes_preemphasis_lane2_65.0=0xb720
|
||||
serdes_pre_driver_current_lane3_65.0=0x4
|
||||
serdes_driver_current_lane3_65.0=0x4
|
||||
serdes_preemphasis_lane3_65.0=0xb720
|
||||
serdes_pre_driver_current_lane0_69.0=0x4
|
||||
serdes_driver_current_lane0_69.0=0x4
|
||||
serdes_preemphasis_lane0_69.0=0xb720
|
||||
serdes_pre_driver_current_lane1_69.0=0x4
|
||||
serdes_driver_current_lane1_69.0=0x4
|
||||
serdes_preemphasis_lane1_69.0=0xb720
|
||||
serdes_pre_driver_current_lane2_69.0=0x4
|
||||
serdes_driver_current_lane2_69.0=0x4
|
||||
serdes_preemphasis_lane2_69.0=0xb720
|
||||
serdes_pre_driver_current_lane3_69.0=0x4
|
||||
serdes_driver_current_lane3_69.0=0x4
|
||||
serdes_preemphasis_lane3_69.0=0xb720
|
||||
serdes_pre_driver_current_lane0_73.0=0x4
|
||||
serdes_driver_current_lane0_73.0=0x4
|
||||
serdes_preemphasis_lane0_73.0=0xb720
|
||||
serdes_pre_driver_current_lane1_73.0=0x4
|
||||
serdes_driver_current_lane1_73.0=0x4
|
||||
serdes_preemphasis_lane1_73.0=0xb720
|
||||
serdes_pre_driver_current_lane2_73.0=0x4
|
||||
serdes_driver_current_lane2_73.0=0x4
|
||||
serdes_preemphasis_lane2_73.0=0xb720
|
||||
serdes_pre_driver_current_lane3_73.0=0x4
|
||||
serdes_driver_current_lane3_73.0=0x4
|
||||
serdes_preemphasis_lane3_73.0=0xb720
|
||||
serdes_pre_driver_current_lane0_77.0=0x5
|
||||
serdes_driver_current_lane0_77.0=0x5
|
||||
serdes_preemphasis_lane0_77.0=0xb720
|
||||
serdes_pre_driver_current_lane1_77.0=0x5
|
||||
serdes_driver_current_lane1_77.0=0x5
|
||||
serdes_preemphasis_lane1_77.0=0xb720
|
||||
serdes_pre_driver_current_lane2_77.0=0x5
|
||||
serdes_driver_current_lane2_77.0=0x5
|
||||
serdes_preemphasis_lane2_77.0=0xb720
|
||||
serdes_pre_driver_current_lane3_77.0=0x5
|
||||
serdes_driver_current_lane3_77.0=0x5
|
||||
serdes_preemphasis_lane3_77.0=0xb720
|
||||
serdes_pre_driver_current_lane0_81.0=0x5
|
||||
serdes_driver_current_lane0_81.0=0x5
|
||||
serdes_preemphasis_lane0_81.0=0xb720
|
||||
serdes_pre_driver_current_lane1_81.0=0x5
|
||||
serdes_driver_current_lane1_81.0=0x5
|
||||
serdes_preemphasis_lane1_81.0=0xb720
|
||||
serdes_pre_driver_current_lane2_81.0=0x5
|
||||
serdes_driver_current_lane2_81.0=0x5
|
||||
serdes_preemphasis_lane2_81.0=0xb720
|
||||
serdes_pre_driver_current_lane3_81.0=0x5
|
||||
serdes_driver_current_lane3_81.0=0x5
|
||||
serdes_preemphasis_lane3_81.0=0xb720
|
||||
serdes_pre_driver_current_lane0_85.0=0x5
|
||||
serdes_driver_current_lane0_85.0=0x5
|
||||
serdes_preemphasis_lane0_85.0=0xb720
|
||||
serdes_pre_driver_current_lane1_85.0=0x5
|
||||
serdes_driver_current_lane1_85.0=0x5
|
||||
serdes_preemphasis_lane1_85.0=0xb720
|
||||
serdes_pre_driver_current_lane2_85.0=0x5
|
||||
serdes_driver_current_lane2_85.0=0x5
|
||||
serdes_preemphasis_lane2_85.0=0xb720
|
||||
serdes_pre_driver_current_lane3_85.0=0x5
|
||||
serdes_driver_current_lane3_85.0=0x5
|
||||
serdes_preemphasis_lane3_85.0=0xb720
|
||||
serdes_pre_driver_current_lane0_89.0=0x6
|
||||
serdes_driver_current_lane0_89.0=0x6
|
||||
serdes_preemphasis_lane0_89.0=0xb720
|
||||
serdes_pre_driver_current_lane1_89.0=0x6
|
||||
serdes_driver_current_lane1_89.0=0x6
|
||||
serdes_preemphasis_lane1_89.0=0xb720
|
||||
serdes_pre_driver_current_lane2_89.0=0x6
|
||||
serdes_driver_current_lane2_89.0=0x6
|
||||
serdes_preemphasis_lane2_89.0=0xb720
|
||||
serdes_pre_driver_current_lane3_89.0=0x6
|
||||
serdes_driver_current_lane3_89.0=0x6
|
||||
serdes_preemphasis_lane3_89.0=0xb720
|
||||
serdes_pre_driver_current_lane0_93.0=0x7
|
||||
serdes_driver_current_lane0_93.0=0x7
|
||||
serdes_preemphasis_lane0_93.0=0xbb10
|
||||
serdes_pre_driver_current_lane1_93.0=0x7
|
||||
serdes_driver_current_lane1_93.0=0x7
|
||||
serdes_preemphasis_lane1_93.0=0xbb10
|
||||
serdes_pre_driver_current_lane2_93.0=0x7
|
||||
serdes_driver_current_lane2_93.0=0x7
|
||||
serdes_preemphasis_lane2_93.0=0xbb10
|
||||
serdes_pre_driver_current_lane3_93.0=0x7
|
||||
serdes_driver_current_lane3_93.0=0x7
|
||||
serdes_preemphasis_lane3_93.0=0xbb10
|
||||
serdes_pre_driver_current_lane0_97.0=0x5
|
||||
serdes_driver_current_lane0_97.0=0x5
|
||||
serdes_preemphasis_lane0_97.0=0xb720
|
||||
serdes_pre_driver_current_lane1_97.0=0x5
|
||||
serdes_driver_current_lane1_97.0=0x5
|
||||
serdes_preemphasis_lane1_97.0=0xb720
|
||||
serdes_pre_driver_current_lane2_97.0=0x5
|
||||
serdes_driver_current_lane2_97.0=0x5
|
||||
serdes_preemphasis_lane2_97.0=0xb720
|
||||
serdes_pre_driver_current_lane3_97.0=0x5
|
||||
serdes_driver_current_lane3_97.0=0x5
|
||||
serdes_preemphasis_lane3_97.0=0xb720
|
||||
serdes_pre_driver_current_lane0_98.0=0x6
|
||||
serdes_driver_current_lane0_98.0=0x6
|
||||
serdes_preemphasis_lane0_98.0=0xb720
|
||||
serdes_pre_driver_current_lane1_98.0=0x6
|
||||
serdes_driver_current_lane1_98.0=0x6
|
||||
serdes_preemphasis_lane1_98.0=0xb720
|
||||
serdes_pre_driver_current_lane2_98.0=0x6
|
||||
serdes_driver_current_lane2_98.0=0x6
|
||||
serdes_preemphasis_lane2_98.0=0xb720
|
||||
serdes_pre_driver_current_lane3_98.0=0x6
|
||||
serdes_driver_current_lane3_98.0=0x6
|
||||
serdes_preemphasis_lane3_98.0=0xb720
|
||||
serdes_pre_driver_current_lane0_99.0=0x5
|
||||
serdes_driver_current_lane0_99.0=0x5
|
||||
serdes_preemphasis_lane0_99.0=0xb720
|
||||
serdes_pre_driver_current_lane1_99.0=0x5
|
||||
serdes_driver_current_lane1_99.0=0x5
|
||||
serdes_preemphasis_lane1_99.0=0xb720
|
||||
serdes_pre_driver_current_lane2_99.0=0x5
|
||||
serdes_driver_current_lane2_99.0=0x5
|
||||
serdes_preemphasis_lane2_99.0=0xb720
|
||||
serdes_pre_driver_current_lane3_99.0=0x5
|
||||
serdes_driver_current_lane3_99.0=0x5
|
||||
serdes_preemphasis_lane3_99.0=0xb720
|
||||
serdes_pre_driver_current_lane0_100.0=0x7
|
||||
serdes_driver_current_lane0_100.0=0x7
|
||||
serdes_preemphasis_lane0_100.0=0xbb10
|
||||
serdes_pre_driver_current_lane1_100.0=0x7
|
||||
serdes_driver_current_lane1_100.0=0x7
|
||||
serdes_preemphasis_lane1_100.0=0xbb10
|
||||
serdes_pre_driver_current_lane2_100.0=0x7
|
||||
serdes_driver_current_lane2_100.0=0x7
|
||||
serdes_preemphasis_lane2_100.0=0xbb10
|
||||
serdes_pre_driver_current_lane3_100.0=0x7
|
||||
serdes_driver_current_lane3_100.0=0x7
|
||||
serdes_preemphasis_lane3_100.0=0xbb10
|
||||
serdes_pre_driver_current_lane0_101.0=0x7
|
||||
serdes_driver_current_lane0_101.0=0x7
|
||||
serdes_preemphasis_lane0_101.0=0xbb10
|
||||
serdes_pre_driver_current_lane1_101.0=0x7
|
||||
serdes_driver_current_lane1_101.0=0x7
|
||||
serdes_preemphasis_lane1_101.0=0xbb10
|
||||
serdes_pre_driver_current_lane2_101.0=0x7
|
||||
serdes_driver_current_lane2_101.0=0x7
|
||||
serdes_preemphasis_lane2_101.0=0xbb10
|
||||
serdes_pre_driver_current_lane3_101.0=0x7
|
||||
serdes_driver_current_lane3_101.0=0x7
|
||||
serdes_preemphasis_lane3_101.0=0xbb10
|
||||
serdes_pre_driver_current_lane0_102.0=0x7
|
||||
serdes_driver_current_lane0_102.0=0x7
|
||||
serdes_preemphasis_lane0_102.0=0xbb10
|
||||
serdes_pre_driver_current_lane1_102.0=0x7
|
||||
serdes_driver_current_lane1_102.0=0x7
|
||||
serdes_preemphasis_lane1_102.0=0xbb10
|
||||
serdes_pre_driver_current_lane2_102.0=0x7
|
||||
serdes_driver_current_lane2_102.0=0x7
|
||||
serdes_preemphasis_lane2_102.0=0xbb10
|
||||
serdes_pre_driver_current_lane3_102.0=0x7
|
||||
serdes_driver_current_lane3_102.0=0x7
|
||||
serdes_preemphasis_lane3_102.0=0xbb10
|
||||
serdes_preemphasis_lane0_103.0=0x81f4
|
||||
serdes_preemphasis_lane1_103.0=0x81f4
|
||||
serdes_preemphasis_lane2_103.0=0x81f4
|
||||
serdes_preemphasis_lane3_103.0=0x81f4
|
||||
serdes_preemphasis_lane0_104.0=0x81f5
|
||||
serdes_preemphasis_lane1_104.0=0x81f5
|
||||
serdes_preemphasis_lane2_104.0=0x81f5
|
||||
serdes_preemphasis_lane3_104.0=0x81f5
|
||||
@ -0,0 +1 @@
|
||||
echo 0 > /sys/devices/pci0000:00/0000:00:02.2/0000:02:00.0/mux
|
||||
Reference in New Issue
Block a user