From 99e1ce9987539d117e6e4b6ff3d094774d25b52d Mon Sep 17 00:00:00 2001
From: Nazarii Hnydyn <nazariig@nvidia.com>
Date: Wed, 30 Aug 2023 11:05:58 +0300
Subject: [PATCH] [202211][PPI]: Enable global port late create for SPC-4.
 (#15801)

DEPENDS:

[202211][ppi]: Implement port bulk comparison logic (#2564)  sonic-swss#2821
HLD: sonic-net/SONiC#1084

Why I did it
Enabled port late create on SN5600 switch boots up with no ports
Work item tracking
N/A
How I did it
Updated SAI xml config file
How to verify it
Run sonic-mgmt tests fastboot
---
 .../mellanox/x86_64-nvidia_sn5600-r0/ACS-SN5600/sai_5600.xml   | 3 +++
 .../x86_64-nvidia_sn5600_simx-r0/ACS-SN5600/sai_5600.xml       | 3 +++
 2 files changed, 6 insertions(+)

diff --git a/device/mellanox/x86_64-nvidia_sn5600-r0/ACS-SN5600/sai_5600.xml b/device/mellanox/x86_64-nvidia_sn5600-r0/ACS-SN5600/sai_5600.xml
index 83074f6a9c..bbfe12c0e8 100644
--- a/device/mellanox/x86_64-nvidia_sn5600-r0/ACS-SN5600/sai_5600.xml
+++ b/device/mellanox/x86_64-nvidia_sn5600-r0/ACS-SN5600/sai_5600.xml
@@ -27,6 +27,9 @@
         <!-- Number of ports in the following port list -->
         <number-of-physical-ports>65</number-of-physical-ports>
 
+        <!-- Global port late create -->
+        <late-create-all-ports>1</late-create-all-ports>
+
         <!-- List of ports in the device -->
         <ports-list>
             <port-info>
diff --git a/device/mellanox/x86_64-nvidia_sn5600_simx-r0/ACS-SN5600/sai_5600.xml b/device/mellanox/x86_64-nvidia_sn5600_simx-r0/ACS-SN5600/sai_5600.xml
index 7fe318fc08..e4548ffe25 100644
--- a/device/mellanox/x86_64-nvidia_sn5600_simx-r0/ACS-SN5600/sai_5600.xml
+++ b/device/mellanox/x86_64-nvidia_sn5600_simx-r0/ACS-SN5600/sai_5600.xml
@@ -27,6 +27,9 @@
         <!-- Number of ports in the following port list -->
         <number-of-physical-ports>65</number-of-physical-ports>
 
+        <!-- Global port late create -->
+        <late-create-all-ports>1</late-create-all-ports>
+
         <!-- List of ports in the device -->
         <ports-list>
             <port-info>