[Nokia][platform] Modified the bcm config file for Nokia-IXR7250E-36x400G (#9622)
Why I did it Updated the BCM config recommended by Broadcom for Nokia-IXR7250E-36x400G How I did it Updated the BCM config file How to verify it Verified running the image with this BCM config in Nokia-IXR7250E-36x400G and ensured that the syncd container was stable, ports were up and passing the traffic. Signed-off-by: Sakthivadivu Saravanaraj <sakthivadivu.saravanaraj@nokia.com>
This commit is contained in:
parent
bf74a68cb9
commit
977cb98479
@ -1,4 +1,3 @@
|
|||||||
platform_name.BCM8885X=j2_ixr7250
|
|
||||||
appl_enable_intr_init.BCM8885X=1
|
appl_enable_intr_init.BCM8885X=1
|
||||||
appl_enable_learn_and_limit_init.BCM8885X=0
|
appl_enable_learn_and_limit_init.BCM8885X=0
|
||||||
appl_enable_oam.BCM8885X=0
|
appl_enable_oam.BCM8885X=0
|
||||||
@ -9,6 +8,7 @@ dma_desc_aggregator_chain_length_max.BCM8885X=1000
|
|||||||
dma_desc_aggregator_enable_specific_MDB_LPM.BCM8885X=1
|
dma_desc_aggregator_enable_specific_MDB_LPM.BCM8885X=1
|
||||||
dma_desc_aggregator_timeout_usec.BCM8885X=1000
|
dma_desc_aggregator_timeout_usec.BCM8885X=1000
|
||||||
dport_map_direct.BCM8885X=1
|
dport_map_direct.BCM8885X=1
|
||||||
|
sai_postinit_cmd_file=/usr/share/sonic/hwsku/sai_postinit_cmd.soc
|
||||||
dtm_flow_mapping_mode_region_64.BCM8885X=3
|
dtm_flow_mapping_mode_region_64.BCM8885X=3
|
||||||
dtm_flow_mapping_mode_region_65.BCM8885X=3
|
dtm_flow_mapping_mode_region_65.BCM8885X=3
|
||||||
dtm_flow_mapping_mode_region_66.BCM8885X=3
|
dtm_flow_mapping_mode_region_66.BCM8885X=3
|
||||||
@ -108,15 +108,16 @@ dtm_flow_nof_remote_cores_region_75.BCM8869X=2
|
|||||||
dtm_flow_mapping_mode_region_75.BCM8869X=0
|
dtm_flow_mapping_mode_region_75.BCM8869X=0
|
||||||
ext_ram_enabled_bitmap.BCM8885X=3
|
ext_ram_enabled_bitmap.BCM8885X=3
|
||||||
ext_ram_freq.BCM8885X=1200
|
ext_ram_freq.BCM8885X=1200
|
||||||
dram_temperature_threshold_restore_traffic.BCM8885X=88
|
dram_temperature_threshold_restore_traffic.BCM8885X=89
|
||||||
dram_temperature_threshold_power_down.BCM8885X=100
|
dram_temperature_threshold_power_down.BCM8885X=102
|
||||||
dram_temperature_threshold_stop_traffic.BCM8885X=95
|
dram_temperature_threshold_stop_traffic.BCM8885X=94
|
||||||
dram_temperature_monitor_enable.BCM8885X=1
|
dram_temperature_monitor_enable.BCM8885X=1
|
||||||
fabric_connect_mode.BCM8885X=FE
|
fabric_connect_mode.BCM8885X=FE
|
||||||
ftmh_stacking_extension_size=0
|
ftmh_stacking_extension_size=0
|
||||||
j2_ftmh_lb_key_extension_size=3
|
j2_ftmh_lb_key_extension_size=3
|
||||||
j_ftmh_lb_key_extension_size=0
|
j_ftmh_lb_key_extension_size=0
|
||||||
|
|
||||||
|
|
||||||
lane_to_serdes_map_fabric_lane0.BCM8885X=rx0:tx0
|
lane_to_serdes_map_fabric_lane0.BCM8885X=rx0:tx0
|
||||||
lane_to_serdes_map_fabric_lane1.BCM8885X=rx1:tx1
|
lane_to_serdes_map_fabric_lane1.BCM8885X=rx1:tx1
|
||||||
lane_to_serdes_map_fabric_lane2.BCM8885X=rx2:tx3
|
lane_to_serdes_map_fabric_lane2.BCM8885X=rx2:tx3
|
||||||
@ -357,6 +358,7 @@ lane_to_serdes_map_fabric_lane189.BCM8885X=rx189:tx189
|
|||||||
lane_to_serdes_map_fabric_lane190.BCM8885X=rx190:tx188
|
lane_to_serdes_map_fabric_lane190.BCM8885X=rx190:tx188
|
||||||
lane_to_serdes_map_fabric_lane191.BCM8885X=rx191:tx191
|
lane_to_serdes_map_fabric_lane191.BCM8885X=rx191:tx191
|
||||||
|
|
||||||
|
|
||||||
phy_rx_polarity_flip_fabric0.BCM8885X=0
|
phy_rx_polarity_flip_fabric0.BCM8885X=0
|
||||||
phy_rx_polarity_flip_fabric1.BCM8885X=1
|
phy_rx_polarity_flip_fabric1.BCM8885X=1
|
||||||
phy_rx_polarity_flip_fabric2.BCM8885X=0
|
phy_rx_polarity_flip_fabric2.BCM8885X=0
|
||||||
@ -550,6 +552,7 @@ phy_rx_polarity_flip_fabric189.BCM8885X=0
|
|||||||
phy_rx_polarity_flip_fabric190.BCM8885X=0
|
phy_rx_polarity_flip_fabric190.BCM8885X=0
|
||||||
phy_rx_polarity_flip_fabric191.BCM8885X=1
|
phy_rx_polarity_flip_fabric191.BCM8885X=1
|
||||||
|
|
||||||
|
|
||||||
phy_tx_polarity_flip_fabric0.BCM8885X=0
|
phy_tx_polarity_flip_fabric0.BCM8885X=0
|
||||||
phy_tx_polarity_flip_fabric1.BCM8885X=0
|
phy_tx_polarity_flip_fabric1.BCM8885X=0
|
||||||
phy_tx_polarity_flip_fabric2.BCM8885X=0
|
phy_tx_polarity_flip_fabric2.BCM8885X=0
|
||||||
@ -743,6 +746,7 @@ phy_tx_polarity_flip_fabric189.BCM8885X=0
|
|||||||
phy_tx_polarity_flip_fabric190.BCM8885X=0
|
phy_tx_polarity_flip_fabric190.BCM8885X=0
|
||||||
phy_tx_polarity_flip_fabric191.BCM8885X=1
|
phy_tx_polarity_flip_fabric191.BCM8885X=1
|
||||||
|
|
||||||
|
|
||||||
lane_to_serdes_map_nif_lane0.BCM8885X=rx0:tx0
|
lane_to_serdes_map_nif_lane0.BCM8885X=rx0:tx0
|
||||||
lane_to_serdes_map_nif_lane1.BCM8885X=rx1:tx1
|
lane_to_serdes_map_nif_lane1.BCM8885X=rx1:tx1
|
||||||
lane_to_serdes_map_nif_lane2.BCM8885X=rx2:tx2
|
lane_to_serdes_map_nif_lane2.BCM8885X=rx2:tx2
|
||||||
@ -931,6 +935,7 @@ outlif_physical_phase_data_granularity_S2=60
|
|||||||
outlif_physical_phase_data_granularity_XL=60
|
outlif_physical_phase_data_granularity_XL=60
|
||||||
pdma_continuous_mode_enable.BCM8885X=1
|
pdma_continuous_mode_enable.BCM8885X=1
|
||||||
|
|
||||||
|
|
||||||
phy_rx_polarity_flip_phy0.BCM8885X=1
|
phy_rx_polarity_flip_phy0.BCM8885X=1
|
||||||
phy_rx_polarity_flip_phy1.BCM8885X=0
|
phy_rx_polarity_flip_phy1.BCM8885X=0
|
||||||
phy_rx_polarity_flip_phy2.BCM8885X=1
|
phy_rx_polarity_flip_phy2.BCM8885X=1
|
||||||
@ -1093,6 +1098,7 @@ phy_rx_polarity_flip_phy141.BCM8885X=1
|
|||||||
phy_rx_polarity_flip_phy142.BCM8885X=0
|
phy_rx_polarity_flip_phy142.BCM8885X=0
|
||||||
phy_rx_polarity_flip_phy143.BCM8885X=1
|
phy_rx_polarity_flip_phy143.BCM8885X=1
|
||||||
|
|
||||||
|
|
||||||
phy_tx_polarity_flip_phy0.BCM8885X=1
|
phy_tx_polarity_flip_phy0.BCM8885X=1
|
||||||
phy_tx_polarity_flip_phy1.BCM8885X=0
|
phy_tx_polarity_flip_phy1.BCM8885X=0
|
||||||
phy_tx_polarity_flip_phy2.BCM8885X=0
|
phy_tx_polarity_flip_phy2.BCM8885X=0
|
||||||
@ -1260,6 +1266,7 @@ polled_irq_delay.BCM8885X=5
|
|||||||
polled_irq_mode.BCM8885X=1
|
polled_irq_mode.BCM8885X=1
|
||||||
port_fec_fabric.BCM8885X=7
|
port_fec_fabric.BCM8885X=7
|
||||||
|
|
||||||
|
|
||||||
port_init_cl72_1=0
|
port_init_cl72_1=0
|
||||||
port_init_cl72_2=0
|
port_init_cl72_2=0
|
||||||
port_init_cl72_3=0
|
port_init_cl72_3=0
|
||||||
@ -1279,198 +1286,198 @@ port_init_cl72_16=0
|
|||||||
port_init_cl72_17=0
|
port_init_cl72_17=0
|
||||||
port_init_cl72_18=0
|
port_init_cl72_18=0
|
||||||
|
|
||||||
port_init_cl72_256=1
|
port_init_cl72_256=0
|
||||||
port_init_cl72_257=1
|
port_init_cl72_257=0
|
||||||
port_init_cl72_258=1
|
port_init_cl72_258=0
|
||||||
port_init_cl72_259=1
|
port_init_cl72_259=0
|
||||||
port_init_cl72_260=1
|
port_init_cl72_260=0
|
||||||
port_init_cl72_261=1
|
port_init_cl72_261=0
|
||||||
port_init_cl72_262=1
|
port_init_cl72_262=0
|
||||||
port_init_cl72_263=1
|
port_init_cl72_263=0
|
||||||
port_init_cl72_264=1
|
port_init_cl72_264=0
|
||||||
port_init_cl72_265=1
|
port_init_cl72_265=0
|
||||||
port_init_cl72_266=1
|
port_init_cl72_266=0
|
||||||
port_init_cl72_267=1
|
port_init_cl72_267=0
|
||||||
port_init_cl72_268=1
|
port_init_cl72_268=0
|
||||||
port_init_cl72_269=1
|
port_init_cl72_269=0
|
||||||
port_init_cl72_270=1
|
port_init_cl72_270=0
|
||||||
port_init_cl72_271=1
|
port_init_cl72_271=0
|
||||||
port_init_cl72_272=1
|
port_init_cl72_272=0
|
||||||
port_init_cl72_273=1
|
port_init_cl72_273=0
|
||||||
port_init_cl72_274=1
|
port_init_cl72_274=0
|
||||||
port_init_cl72_275=1
|
port_init_cl72_275=0
|
||||||
port_init_cl72_276=1
|
port_init_cl72_276=0
|
||||||
port_init_cl72_277=1
|
port_init_cl72_277=0
|
||||||
port_init_cl72_278=1
|
port_init_cl72_278=0
|
||||||
port_init_cl72_279=1
|
port_init_cl72_279=0
|
||||||
port_init_cl72_280=1
|
port_init_cl72_280=0
|
||||||
port_init_cl72_281=1
|
port_init_cl72_281=0
|
||||||
port_init_cl72_282=1
|
port_init_cl72_282=0
|
||||||
port_init_cl72_283=1
|
port_init_cl72_283=0
|
||||||
port_init_cl72_284=1
|
port_init_cl72_284=0
|
||||||
port_init_cl72_285=1
|
port_init_cl72_285=0
|
||||||
port_init_cl72_286=1
|
port_init_cl72_286=0
|
||||||
port_init_cl72_287=1
|
port_init_cl72_287=0
|
||||||
port_init_cl72_288=1
|
port_init_cl72_288=0
|
||||||
port_init_cl72_289=1
|
port_init_cl72_289=0
|
||||||
port_init_cl72_290=1
|
port_init_cl72_290=0
|
||||||
port_init_cl72_291=1
|
port_init_cl72_291=0
|
||||||
port_init_cl72_292=1
|
port_init_cl72_292=0
|
||||||
port_init_cl72_293=1
|
port_init_cl72_293=0
|
||||||
port_init_cl72_294=1
|
port_init_cl72_294=0
|
||||||
port_init_cl72_295=1
|
port_init_cl72_295=0
|
||||||
port_init_cl72_296=1
|
port_init_cl72_296=0
|
||||||
port_init_cl72_297=1
|
port_init_cl72_297=0
|
||||||
port_init_cl72_298=1
|
port_init_cl72_298=0
|
||||||
port_init_cl72_299=1
|
port_init_cl72_299=0
|
||||||
port_init_cl72_300=1
|
port_init_cl72_300=0
|
||||||
port_init_cl72_301=1
|
port_init_cl72_301=0
|
||||||
port_init_cl72_302=1
|
port_init_cl72_302=0
|
||||||
port_init_cl72_303=1
|
port_init_cl72_303=0
|
||||||
port_init_cl72_304=1
|
port_init_cl72_304=0
|
||||||
port_init_cl72_305=1
|
port_init_cl72_305=0
|
||||||
port_init_cl72_306=1
|
port_init_cl72_306=0
|
||||||
port_init_cl72_307=1
|
port_init_cl72_307=0
|
||||||
port_init_cl72_308=1
|
port_init_cl72_308=0
|
||||||
port_init_cl72_309=1
|
port_init_cl72_309=0
|
||||||
port_init_cl72_310=1
|
port_init_cl72_310=0
|
||||||
port_init_cl72_311=1
|
port_init_cl72_311=0
|
||||||
port_init_cl72_312=1
|
port_init_cl72_312=0
|
||||||
port_init_cl72_313=1
|
port_init_cl72_313=0
|
||||||
port_init_cl72_314=1
|
port_init_cl72_314=0
|
||||||
port_init_cl72_315=1
|
port_init_cl72_315=0
|
||||||
port_init_cl72_316=1
|
port_init_cl72_316=0
|
||||||
port_init_cl72_317=1
|
port_init_cl72_317=0
|
||||||
port_init_cl72_318=1
|
port_init_cl72_318=0
|
||||||
port_init_cl72_319=1
|
port_init_cl72_319=0
|
||||||
port_init_cl72_320=1
|
port_init_cl72_320=0
|
||||||
port_init_cl72_321=1
|
port_init_cl72_321=0
|
||||||
port_init_cl72_322=1
|
port_init_cl72_322=0
|
||||||
port_init_cl72_323=1
|
port_init_cl72_323=0
|
||||||
port_init_cl72_324=1
|
port_init_cl72_324=0
|
||||||
port_init_cl72_325=1
|
port_init_cl72_325=0
|
||||||
port_init_cl72_326=1
|
port_init_cl72_326=0
|
||||||
port_init_cl72_327=1
|
port_init_cl72_327=0
|
||||||
port_init_cl72_328=1
|
port_init_cl72_328=0
|
||||||
port_init_cl72_329=1
|
port_init_cl72_329=0
|
||||||
port_init_cl72_330=1
|
port_init_cl72_330=0
|
||||||
port_init_cl72_331=1
|
port_init_cl72_331=0
|
||||||
port_init_cl72_332=1
|
port_init_cl72_332=0
|
||||||
port_init_cl72_333=1
|
port_init_cl72_333=0
|
||||||
port_init_cl72_334=1
|
port_init_cl72_334=0
|
||||||
port_init_cl72_335=1
|
port_init_cl72_335=0
|
||||||
port_init_cl72_336=1
|
port_init_cl72_336=0
|
||||||
port_init_cl72_337=1
|
port_init_cl72_337=0
|
||||||
port_init_cl72_338=1
|
port_init_cl72_338=0
|
||||||
port_init_cl72_339=1
|
port_init_cl72_339=0
|
||||||
port_init_cl72_340=1
|
port_init_cl72_340=0
|
||||||
port_init_cl72_341=1
|
port_init_cl72_341=0
|
||||||
port_init_cl72_342=1
|
port_init_cl72_342=0
|
||||||
port_init_cl72_343=1
|
port_init_cl72_343=0
|
||||||
port_init_cl72_344=1
|
port_init_cl72_344=0
|
||||||
port_init_cl72_345=1
|
port_init_cl72_345=0
|
||||||
port_init_cl72_346=1
|
port_init_cl72_346=0
|
||||||
port_init_cl72_347=1
|
port_init_cl72_347=0
|
||||||
port_init_cl72_348=1
|
port_init_cl72_348=0
|
||||||
port_init_cl72_349=1
|
port_init_cl72_349=0
|
||||||
port_init_cl72_350=1
|
port_init_cl72_350=0
|
||||||
port_init_cl72_351=1
|
port_init_cl72_351=0
|
||||||
port_init_cl72_352=1
|
port_init_cl72_352=0
|
||||||
port_init_cl72_353=1
|
port_init_cl72_353=0
|
||||||
port_init_cl72_354=1
|
port_init_cl72_354=0
|
||||||
port_init_cl72_355=1
|
port_init_cl72_355=0
|
||||||
port_init_cl72_356=1
|
port_init_cl72_356=0
|
||||||
port_init_cl72_357=1
|
port_init_cl72_357=0
|
||||||
port_init_cl72_358=1
|
port_init_cl72_358=0
|
||||||
port_init_cl72_359=1
|
port_init_cl72_359=0
|
||||||
port_init_cl72_360=1
|
port_init_cl72_360=0
|
||||||
port_init_cl72_361=1
|
port_init_cl72_361=0
|
||||||
port_init_cl72_362=1
|
port_init_cl72_362=0
|
||||||
port_init_cl72_363=1
|
port_init_cl72_363=0
|
||||||
port_init_cl72_364=1
|
port_init_cl72_364=0
|
||||||
port_init_cl72_365=1
|
port_init_cl72_365=0
|
||||||
port_init_cl72_366=1
|
port_init_cl72_366=0
|
||||||
port_init_cl72_367=1
|
port_init_cl72_367=0
|
||||||
port_init_cl72_368=1
|
port_init_cl72_368=0
|
||||||
port_init_cl72_369=1
|
port_init_cl72_369=0
|
||||||
port_init_cl72_370=1
|
port_init_cl72_370=0
|
||||||
port_init_cl72_371=1
|
port_init_cl72_371=0
|
||||||
port_init_cl72_372=1
|
port_init_cl72_372=0
|
||||||
port_init_cl72_373=1
|
port_init_cl72_373=0
|
||||||
port_init_cl72_374=1
|
port_init_cl72_374=0
|
||||||
port_init_cl72_375=1
|
port_init_cl72_375=0
|
||||||
port_init_cl72_376=1
|
port_init_cl72_376=0
|
||||||
port_init_cl72_377=1
|
port_init_cl72_377=0
|
||||||
port_init_cl72_378=1
|
port_init_cl72_378=0
|
||||||
port_init_cl72_379=1
|
port_init_cl72_379=0
|
||||||
port_init_cl72_380=1
|
port_init_cl72_380=0
|
||||||
port_init_cl72_381=1
|
port_init_cl72_381=0
|
||||||
port_init_cl72_382=1
|
port_init_cl72_382=0
|
||||||
port_init_cl72_383=1
|
port_init_cl72_383=0
|
||||||
port_init_cl72_384=1
|
port_init_cl72_384=0
|
||||||
port_init_cl72_385=1
|
port_init_cl72_385=0
|
||||||
port_init_cl72_386=1
|
port_init_cl72_386=0
|
||||||
port_init_cl72_387=1
|
port_init_cl72_387=0
|
||||||
port_init_cl72_388=1
|
port_init_cl72_388=0
|
||||||
port_init_cl72_389=1
|
port_init_cl72_389=0
|
||||||
port_init_cl72_390=1
|
port_init_cl72_390=0
|
||||||
port_init_cl72_391=1
|
port_init_cl72_391=0
|
||||||
port_init_cl72_392=1
|
port_init_cl72_392=0
|
||||||
port_init_cl72_393=1
|
port_init_cl72_393=0
|
||||||
port_init_cl72_394=1
|
port_init_cl72_394=0
|
||||||
port_init_cl72_395=1
|
port_init_cl72_395=0
|
||||||
port_init_cl72_396=1
|
port_init_cl72_396=0
|
||||||
port_init_cl72_397=1
|
port_init_cl72_397=0
|
||||||
port_init_cl72_398=1
|
port_init_cl72_398=0
|
||||||
port_init_cl72_399=1
|
port_init_cl72_399=0
|
||||||
port_init_cl72_400=1
|
port_init_cl72_400=0
|
||||||
port_init_cl72_401=1
|
port_init_cl72_401=0
|
||||||
port_init_cl72_402=1
|
port_init_cl72_402=0
|
||||||
port_init_cl72_403=1
|
port_init_cl72_403=0
|
||||||
port_init_cl72_404=1
|
port_init_cl72_404=0
|
||||||
port_init_cl72_405=1
|
port_init_cl72_405=0
|
||||||
port_init_cl72_406=1
|
port_init_cl72_406=0
|
||||||
port_init_cl72_407=1
|
port_init_cl72_407=0
|
||||||
port_init_cl72_408=1
|
port_init_cl72_408=0
|
||||||
port_init_cl72_409=1
|
port_init_cl72_409=0
|
||||||
port_init_cl72_410=1
|
port_init_cl72_410=0
|
||||||
port_init_cl72_411=1
|
port_init_cl72_411=0
|
||||||
port_init_cl72_412=1
|
port_init_cl72_412=0
|
||||||
port_init_cl72_413=1
|
port_init_cl72_413=0
|
||||||
port_init_cl72_414=1
|
port_init_cl72_414=0
|
||||||
port_init_cl72_415=1
|
port_init_cl72_415=0
|
||||||
port_init_cl72_416=1
|
port_init_cl72_416=0
|
||||||
port_init_cl72_417=1
|
port_init_cl72_417=0
|
||||||
port_init_cl72_418=1
|
port_init_cl72_418=0
|
||||||
port_init_cl72_419=1
|
port_init_cl72_419=0
|
||||||
port_init_cl72_420=1
|
port_init_cl72_420=0
|
||||||
port_init_cl72_421=1
|
port_init_cl72_421=0
|
||||||
port_init_cl72_422=1
|
port_init_cl72_422=0
|
||||||
port_init_cl72_423=1
|
port_init_cl72_423=0
|
||||||
port_init_cl72_424=1
|
port_init_cl72_424=0
|
||||||
port_init_cl72_425=1
|
port_init_cl72_425=0
|
||||||
port_init_cl72_426=1
|
port_init_cl72_426=0
|
||||||
port_init_cl72_427=1
|
port_init_cl72_427=0
|
||||||
port_init_cl72_428=1
|
port_init_cl72_428=0
|
||||||
port_init_cl72_429=1
|
port_init_cl72_429=0
|
||||||
port_init_cl72_430=1
|
port_init_cl72_430=0
|
||||||
port_init_cl72_431=1
|
port_init_cl72_431=0
|
||||||
port_init_cl72_432=1
|
port_init_cl72_432=0
|
||||||
port_init_cl72_433=1
|
port_init_cl72_433=0
|
||||||
port_init_cl72_434=1
|
port_init_cl72_434=0
|
||||||
port_init_cl72_435=1
|
port_init_cl72_435=0
|
||||||
port_init_cl72_436=1
|
port_init_cl72_436=0
|
||||||
port_init_cl72_437=1
|
port_init_cl72_437=0
|
||||||
port_init_cl72_438=1
|
port_init_cl72_438=0
|
||||||
port_init_cl72_439=1
|
port_init_cl72_439=0
|
||||||
port_init_cl72_440=1
|
port_init_cl72_440=0
|
||||||
port_init_cl72_441=1
|
port_init_cl72_441=0
|
||||||
port_init_cl72_442=1
|
port_init_cl72_442=0
|
||||||
port_init_cl72_443=1
|
port_init_cl72_443=0
|
||||||
port_init_cl72_444=1
|
port_init_cl72_444=0
|
||||||
port_init_cl72_445=1
|
port_init_cl72_445=0
|
||||||
port_init_cl72_446=1
|
port_init_cl72_446=0
|
||||||
port_init_cl72_447=1
|
port_init_cl72_447=0
|
||||||
|
|
||||||
|
|
||||||
port_init_speed_cc.BCM8885X=200000
|
port_init_speed_cc.BCM8885X=200000
|
||||||
@ -1506,6 +1513,7 @@ tm_port_header_type_in_201.BCM8885X=INJECTED_2_PP
|
|||||||
tm_port_header_type_in_202.BCM8885X=INJECTED_2_PP
|
tm_port_header_type_in_202.BCM8885X=INJECTED_2_PP
|
||||||
tm_port_header_type_in_203.BCM8885X=INJECTED_2_PP
|
tm_port_header_type_in_203.BCM8885X=INJECTED_2_PP
|
||||||
tm_port_header_type_in_232.BCM8885X=INJECTED_2
|
tm_port_header_type_in_232.BCM8885X=INJECTED_2
|
||||||
|
tm_port_header_type_in_19.BCM8885X=ETH
|
||||||
tm_port_header_type_in_20.BCM8885X=INJECTED_2
|
tm_port_header_type_in_20.BCM8885X=INJECTED_2
|
||||||
tm_port_header_type_out_0.BCM8885X=CPU
|
tm_port_header_type_out_0.BCM8885X=CPU
|
||||||
tm_port_header_type_out_200.BCM8885X=ETH
|
tm_port_header_type_out_200.BCM8885X=ETH
|
||||||
@ -1513,6 +1521,7 @@ tm_port_header_type_out_201.BCM8885X=ETH
|
|||||||
tm_port_header_type_out_202.BCM8885X=ETH
|
tm_port_header_type_out_202.BCM8885X=ETH
|
||||||
tm_port_header_type_out_203.BCM8885X=ETH
|
tm_port_header_type_out_203.BCM8885X=ETH
|
||||||
tm_port_header_type_out_232.BCM8885X=CPU
|
tm_port_header_type_out_232.BCM8885X=CPU
|
||||||
|
tm_port_header_type_out_19.BCM8885X=ETH
|
||||||
tm_port_header_type_out_20.BCM8885X=RAW
|
tm_port_header_type_out_20.BCM8885X=RAW
|
||||||
tslam_intr_enable.BCM8885X=0
|
tslam_intr_enable.BCM8885X=0
|
||||||
tslam_timeout_usec.BCM8885X=1000000
|
tslam_timeout_usec.BCM8885X=1000000
|
||||||
@ -1522,6 +1531,7 @@ ucode_port_201.BCM8885X=CPU.16:core_1.201
|
|||||||
ucode_port_202.BCM8885X=CPU.24:core_1.202
|
ucode_port_202.BCM8885X=CPU.24:core_1.202
|
||||||
ucode_port_203.BCM8885X=CPU.32:core_1.203
|
ucode_port_203.BCM8885X=CPU.32:core_1.203
|
||||||
|
|
||||||
|
|
||||||
ucode_port_1.BCM8885X=CDGE9:core_1.1
|
ucode_port_1.BCM8885X=CDGE9:core_1.1
|
||||||
ucode_port_2.BCM8885X=CDGE10:core_1.2
|
ucode_port_2.BCM8885X=CDGE10:core_1.2
|
||||||
ucode_port_3.BCM8885X=CDGE11:core_1.3
|
ucode_port_3.BCM8885X=CDGE11:core_1.3
|
||||||
@ -1541,9 +1551,11 @@ ucode_port_16.BCM8885X=CDGE2:core_0.16
|
|||||||
ucode_port_17.BCM8885X=CDGE1:core_0.17
|
ucode_port_17.BCM8885X=CDGE1:core_0.17
|
||||||
ucode_port_18.BCM8885X=CDGE0:core_0.18
|
ucode_port_18.BCM8885X=CDGE0:core_0.18
|
||||||
|
|
||||||
|
|
||||||
ucode_port_19.BCM8885X=RCY0:core_0.19
|
ucode_port_19.BCM8885X=RCY0:core_0.19
|
||||||
ucode_port_20.BCM8885X=OLP:core_1.20
|
ucode_port_20.BCM8885X=OLP:core_1.20
|
||||||
|
|
||||||
|
|
||||||
serdes_lane_config_dfe_1.BCM8885X=on
|
serdes_lane_config_dfe_1.BCM8885X=on
|
||||||
serdes_lane_config_dfe_2.BCM8885X=on
|
serdes_lane_config_dfe_2.BCM8885X=on
|
||||||
serdes_lane_config_dfe_3.BCM8885X=on
|
serdes_lane_config_dfe_3.BCM8885X=on
|
||||||
@ -1563,24 +1575,280 @@ serdes_lane_config_dfe_16.BCM8885X=on
|
|||||||
serdes_lane_config_dfe_17.BCM8885X=on
|
serdes_lane_config_dfe_17.BCM8885X=on
|
||||||
serdes_lane_config_dfe_18.BCM8885X=on
|
serdes_lane_config_dfe_18.BCM8885X=on
|
||||||
|
|
||||||
serdes_tx_taps_1.BCM8885X=pam4:-16:132:-8:0:0:0
|
|
||||||
serdes_tx_taps_2.BCM8885X=pam4:-16:130:-8:0:0:0
|
serdes_lane_config_channel_mode_1.BCM8885X=force_nr
|
||||||
serdes_tx_taps_3.BCM8885X=pam4:-16:130:-8:0:0:0
|
serdes_lane_config_channel_mode_2.BCM8885X=force_nr
|
||||||
serdes_tx_taps_4.BCM8885X=pam4:-16:130:-8:0:0:0
|
serdes_lane_config_channel_mode_3.BCM8885X=force_nr
|
||||||
serdes_tx_taps_5.BCM8885X=pam4:-16:130:-8:0:0:0
|
serdes_lane_config_channel_mode_4.BCM8885X=force_nr
|
||||||
serdes_tx_taps_6.BCM8885X=pam4:-16:130:-8:0:0:0
|
serdes_lane_config_channel_mode_5.BCM8885X=force_nr
|
||||||
serdes_tx_taps_7.BCM8885X=pam4:-16:130:-8:0:0:0
|
serdes_lane_config_channel_mode_6.BCM8885X=force_nr
|
||||||
serdes_tx_taps_8.BCM8885X=pam4:-16:130:-8:0:0:0
|
serdes_lane_config_channel_mode_7.BCM8885X=force_nr
|
||||||
serdes_tx_taps_9.BCM8885X=pam4:-16:130:-8:0:0:0
|
serdes_lane_config_channel_mode_8.BCM8885X=force_nr
|
||||||
serdes_tx_taps_10.BCM8885X=pam4:-16:130:-8:0:0:0
|
serdes_lane_config_channel_mode_9.BCM8885X=force_nr
|
||||||
serdes_tx_taps_11.BCM8885X=pam4:-16:130:-8:0:0:0
|
serdes_lane_config_channel_mode_10.BCM8885X=force_nr
|
||||||
serdes_tx_taps_12.BCM8885X=pam4:-16:130:-8:0:0:0
|
serdes_lane_config_channel_mode_11.BCM8885X=force_nr
|
||||||
serdes_tx_taps_13.BCM8885X=pam4:-16:130:-8:0:0:0
|
serdes_lane_config_channel_mode_12.BCM8885X=force_nr
|
||||||
serdes_tx_taps_14.BCM8885X=pam4:-16:130:-8:0:0:0
|
serdes_lane_config_channel_mode_13.BCM8885X=force_nr
|
||||||
serdes_tx_taps_15.BCM8885X=pam4:-16:130:-8:0:0:0
|
serdes_lane_config_channel_mode_14.BCM8885X=force_nr
|
||||||
serdes_tx_taps_16.BCM8885X=pam4:-16:130:-8:0:0:0
|
serdes_lane_config_channel_mode_15.BCM8885X=force_nr
|
||||||
serdes_tx_taps_17.BCM8885X=pam4:-16:130:-8:0:0:0
|
serdes_lane_config_channel_mode_16.BCM8885X=force_nr
|
||||||
serdes_tx_taps_18.BCM8885X=pam4:-16:132:-8:0:0:0
|
serdes_lane_config_channel_mode_17.BCM8885X=force_nr
|
||||||
|
serdes_lane_config_channel_mode_18.BCM8885X=force_nr
|
||||||
|
|
||||||
|
|
||||||
|
serdes_lane_config_media_type_1.BCM8885X=backplane
|
||||||
|
serdes_lane_config_media_type_2.BCM8885X=backplane
|
||||||
|
serdes_lane_config_media_type_3.BCM8885X=backplane
|
||||||
|
serdes_lane_config_media_type_4.BCM8885X=backplane
|
||||||
|
serdes_lane_config_media_type_5.BCM8885X=backplane
|
||||||
|
serdes_lane_config_media_type_6.BCM8885X=backplane
|
||||||
|
serdes_lane_config_media_type_7.BCM8885X=backplane
|
||||||
|
serdes_lane_config_media_type_8.BCM8885X=backplane
|
||||||
|
serdes_lane_config_media_type_9.BCM8885X=backplane
|
||||||
|
serdes_lane_config_media_type_10.BCM8885X=backplane
|
||||||
|
serdes_lane_config_media_type_11.BCM8885X=backplane
|
||||||
|
serdes_lane_config_media_type_12.BCM8885X=backplane
|
||||||
|
serdes_lane_config_media_type_13.BCM8885X=backplane
|
||||||
|
serdes_lane_config_media_type_14.BCM8885X=backplane
|
||||||
|
serdes_lane_config_media_type_15.BCM8885X=backplane
|
||||||
|
serdes_lane_config_media_type_16.BCM8885X=backplane
|
||||||
|
serdes_lane_config_media_type_17.BCM8885X=backplane
|
||||||
|
serdes_lane_config_media_type_18.BCM8885X=backplane
|
||||||
|
|
||||||
|
|
||||||
|
port_fec.1.BCM8885x=9
|
||||||
|
port_fec.2.BCM8885x=9
|
||||||
|
port_fec.3.BCM8885x=9
|
||||||
|
port_fec.4.BCM8885x=9
|
||||||
|
port_fec.5.BCM8885x=9
|
||||||
|
port_fec.6.BCM8885x=9
|
||||||
|
port_fec.7.BCM8885x=9
|
||||||
|
port_fec.8.BCM8885x=9
|
||||||
|
port_fec.9.BCM8885x=9
|
||||||
|
port_fec.10.BCM8885x=9
|
||||||
|
port_fec.11.BCM8885x=9
|
||||||
|
port_fec.12.BCM8885x=9
|
||||||
|
port_fec.13.BCM8885x=9
|
||||||
|
port_fec.14.BCM8885x=9
|
||||||
|
port_fec.15.BCM8885x=9
|
||||||
|
port_fec.16.BCM8885x=9
|
||||||
|
port_fec.17.BCM8885x=9
|
||||||
|
port_fec.18.BCM8885x=9
|
||||||
|
|
||||||
|
|
||||||
|
serdes_tx_taps_1.BCM8885X=pam4:-8:128:-8:0:0:0
|
||||||
|
serdes_tx_taps_2.BCM8885X=pam4:-8:128:-8:0:0:0
|
||||||
|
serdes_tx_taps_3.BCM8885X=pam4:-8:132:-12:4:0:0
|
||||||
|
serdes_tx_taps_4.BCM8885X=pam4:-8:128:-4:4:0:0
|
||||||
|
serdes_tx_taps_5.BCM8885X=pam4:-8:128:-4:4:0:0
|
||||||
|
serdes_tx_taps_6.BCM8885X=pam4:-8:136:0:0:0:0
|
||||||
|
serdes_tx_taps_7.BCM8885X=pam4:-8:132:-4:0:-4:0
|
||||||
|
serdes_tx_taps_8.BCM8885X=pam4:-4:144:0:0:0:0
|
||||||
|
serdes_tx_taps_9.BCM8885X=pam4:-8:132:-4:2:-4:0
|
||||||
|
serdes_tx_taps_10.BCM8885X=pam4:-4:144:0:0:0:0
|
||||||
|
serdes_tx_taps_11.BCM8885X=pam4:-8:132:-4:0:-4:0
|
||||||
|
serdes_tx_taps_12.BCM8885X=pam4:-4:144:0:0:0:0
|
||||||
|
serdes_tx_taps_13.BCM8885X=pam4:-8:128:-8:4:0:0
|
||||||
|
serdes_tx_taps_14.BCM8885X=pam4:-4:144:0:0:0:0
|
||||||
|
serdes_tx_taps_15.BCM8885X=pam4:-8:128:-8:4:0:0
|
||||||
|
serdes_tx_taps_16.BCM8885X=pam4:-8:136:-4:4:-4:0
|
||||||
|
serdes_tx_taps_17.BCM8885X=pam4:-8:132:-8:0:0:0
|
||||||
|
serdes_tx_taps_18.BCM8885X=pam4:-4:128:-8:0:0:0
|
||||||
|
|
||||||
|
|
||||||
|
serdes_tx_taps_256.BCM8885X=pam4:-20:148:0:0:0:0
|
||||||
|
serdes_tx_taps_257.BCM8885X=pam4:-20:148:0:0:0:0
|
||||||
|
serdes_tx_taps_258.BCM8885X=pam4:-20:148:0:0:0:0
|
||||||
|
serdes_tx_taps_259.BCM8885X=pam4:-20:148:0:0:0:0
|
||||||
|
serdes_tx_taps_260.BCM8885X=pam4:-20:148:0:0:0:0
|
||||||
|
serdes_tx_taps_261.BCM8885X=pam4:-20:148:0:0:0:0
|
||||||
|
serdes_tx_taps_262.BCM8885X=pam4:-20:148:0:0:0:0
|
||||||
|
serdes_tx_taps_263.BCM8885X=pam4:-20:148:0:0:0:0
|
||||||
|
serdes_tx_taps_264.BCM8885X=pam4:-20:148:0:0:0:0
|
||||||
|
serdes_tx_taps_265.BCM8885X=pam4:-20:148:0:0:0:0
|
||||||
|
serdes_tx_taps_266.BCM8885X=pam4:-20:148:0:0:0:0
|
||||||
|
serdes_tx_taps_267.BCM8885X=pam4:-20:148:0:0:0:0
|
||||||
|
serdes_tx_taps_268.BCM8885X=pam4:-20:148:0:0:0:0
|
||||||
|
serdes_tx_taps_269.BCM8885X=pam4:-20:148:0:0:0:0
|
||||||
|
serdes_tx_taps_270.BCM8885X=pam4:-20:148:0:0:0:0
|
||||||
|
serdes_tx_taps_271.BCM8885X=pam4:-20:148:0:0:0:0
|
||||||
|
serdes_tx_taps_272.BCM8885X=pam4:-20:148:0:0:0:0
|
||||||
|
serdes_tx_taps_273.BCM8885X=pam4:-20:148:0:0:0:0
|
||||||
|
serdes_tx_taps_274.BCM8885X=pam4:-20:148:0:0:0:0
|
||||||
|
serdes_tx_taps_275.BCM8885X=pam4:-20:148:0:0:0:0
|
||||||
|
serdes_tx_taps_276.BCM8885X=pam4:-20:148:0:0:0:0
|
||||||
|
serdes_tx_taps_277.BCM8885X=pam4:-20:148:0:0:0:0
|
||||||
|
serdes_tx_taps_278.BCM8885X=pam4:-20:148:0:0:0:0
|
||||||
|
serdes_tx_taps_279.BCM8885X=pam4:-20:148:0:0:0:0
|
||||||
|
serdes_tx_taps_280.BCM8885X=pam4:-20:148:0:0:0:0
|
||||||
|
serdes_tx_taps_281.BCM8885X=pam4:-20:148:0:0:0:0
|
||||||
|
serdes_tx_taps_282.BCM8885X=pam4:-20:148:0:0:0:0
|
||||||
|
serdes_tx_taps_283.BCM8885X=pam4:-20:148:0:0:0:0
|
||||||
|
serdes_tx_taps_284.BCM8885X=pam4:-20:148:0:0:0:0
|
||||||
|
serdes_tx_taps_285.BCM8885X=pam4:-20:148:0:0:0:0
|
||||||
|
serdes_tx_taps_286.BCM8885X=pam4:-20:148:0:0:0:0
|
||||||
|
serdes_tx_taps_287.BCM8885X=pam4:-20:148:0:0:0:0
|
||||||
|
serdes_tx_taps_288.BCM8885X=pam4:-20:148:0:0:0:0
|
||||||
|
serdes_tx_taps_289.BCM8885X=pam4:-20:148:0:0:0:0
|
||||||
|
serdes_tx_taps_290.BCM8885X=pam4:-20:148:0:0:0:0
|
||||||
|
serdes_tx_taps_291.BCM8885X=pam4:-20:148:0:0:0:0
|
||||||
|
serdes_tx_taps_292.BCM8885X=pam4:-20:148:0:0:0:0
|
||||||
|
serdes_tx_taps_293.BCM8885X=pam4:-20:148:0:0:0:0
|
||||||
|
serdes_tx_taps_294.BCM8885X=pam4:-20:148:0:0:0:0
|
||||||
|
serdes_tx_taps_295.BCM8885X=pam4:-20:148:0:0:0:0
|
||||||
|
serdes_tx_taps_296.BCM8885X=pam4:-20:148:0:0:0:0
|
||||||
|
serdes_tx_taps_297.BCM8885X=pam4:-20:148:0:0:0:0
|
||||||
|
serdes_tx_taps_298.BCM8885X=pam4:-20:148:0:0:0:0
|
||||||
|
serdes_tx_taps_299.BCM8885X=pam4:-20:148:0:0:0:0
|
||||||
|
serdes_tx_taps_300.BCM8885X=pam4:-20:148:0:0:0:0
|
||||||
|
serdes_tx_taps_301.BCM8885X=pam4:-20:148:0:0:0:0
|
||||||
|
serdes_tx_taps_302.BCM8885X=pam4:-20:148:0:0:0:0
|
||||||
|
serdes_tx_taps_303.BCM8885X=pam4:-20:148:0:0:0:0
|
||||||
|
serdes_tx_taps_304.BCM8885X=pam4:-20:148:0:0:0:0
|
||||||
|
serdes_tx_taps_305.BCM8885X=pam4:-20:148:0:0:0:0
|
||||||
|
serdes_tx_taps_306.BCM8885X=pam4:-20:148:0:0:0:0
|
||||||
|
serdes_tx_taps_307.BCM8885X=pam4:-20:148:0:0:0:0
|
||||||
|
serdes_tx_taps_308.BCM8885X=pam4:-20:148:0:0:0:0
|
||||||
|
serdes_tx_taps_309.BCM8885X=pam4:-20:148:0:0:0:0
|
||||||
|
serdes_tx_taps_310.BCM8885X=pam4:-20:148:0:0:0:0
|
||||||
|
serdes_tx_taps_311.BCM8885X=pam4:-20:148:0:0:0:0
|
||||||
|
serdes_tx_taps_312.BCM8885X=pam4:-20:148:0:0:0:0
|
||||||
|
serdes_tx_taps_313.BCM8885X=pam4:-20:148:0:0:0:0
|
||||||
|
serdes_tx_taps_314.BCM8885X=pam4:-20:148:0:0:0:0
|
||||||
|
serdes_tx_taps_315.BCM8885X=pam4:-20:148:0:0:0:0
|
||||||
|
serdes_tx_taps_316.BCM8885X=pam4:-20:148:0:0:0:0
|
||||||
|
serdes_tx_taps_317.BCM8885X=pam4:-20:148:0:0:0:0
|
||||||
|
serdes_tx_taps_318.BCM8885X=pam4:-20:148:0:0:0:0
|
||||||
|
serdes_tx_taps_319.BCM8885X=pam4:-20:148:0:0:0:0
|
||||||
|
serdes_tx_taps_320.BCM8885X=pam4:-20:148:0:0:0:0
|
||||||
|
serdes_tx_taps_321.BCM8885X=pam4:-20:148:0:0:0:0
|
||||||
|
serdes_tx_taps_322.BCM8885X=pam4:-20:148:0:0:0:0
|
||||||
|
serdes_tx_taps_323.BCM8885X=pam4:-20:148:0:0:0:0
|
||||||
|
serdes_tx_taps_324.BCM8885X=pam4:-20:148:0:0:0:0
|
||||||
|
serdes_tx_taps_325.BCM8885X=pam4:-20:148:0:0:0:0
|
||||||
|
serdes_tx_taps_326.BCM8885X=pam4:-20:148:0:0:0:0
|
||||||
|
serdes_tx_taps_327.BCM8885X=pam4:-20:148:0:0:0:0
|
||||||
|
serdes_tx_taps_328.BCM8885X=pam4:-20:148:0:0:0:0
|
||||||
|
serdes_tx_taps_329.BCM8885X=pam4:-20:148:0:0:0:0
|
||||||
|
serdes_tx_taps_330.BCM8885X=pam4:-20:148:0:0:0:0
|
||||||
|
serdes_tx_taps_331.BCM8885X=pam4:-20:148:0:0:0:0
|
||||||
|
serdes_tx_taps_332.BCM8885X=pam4:-20:148:0:0:0:0
|
||||||
|
serdes_tx_taps_333.BCM8885X=pam4:-20:148:0:0:0:0
|
||||||
|
serdes_tx_taps_334.BCM8885X=pam4:-20:148:0:0:0:0
|
||||||
|
serdes_tx_taps_335.BCM8885X=pam4:-20:148:0:0:0:0
|
||||||
|
serdes_tx_taps_336.BCM8885X=pam4:-20:148:0:0:0:0
|
||||||
|
serdes_tx_taps_337.BCM8885X=pam4:-20:148:0:0:0:0
|
||||||
|
serdes_tx_taps_338.BCM8885X=pam4:-20:148:0:0:0:0
|
||||||
|
serdes_tx_taps_339.BCM8885X=pam4:-20:148:0:0:0:0
|
||||||
|
serdes_tx_taps_340.BCM8885X=pam4:-20:148:0:0:0:0
|
||||||
|
serdes_tx_taps_341.BCM8885X=pam4:-20:148:0:0:0:0
|
||||||
|
serdes_tx_taps_342.BCM8885X=pam4:-20:148:0:0:0:0
|
||||||
|
serdes_tx_taps_343.BCM8885X=pam4:-20:148:0:0:0:0
|
||||||
|
serdes_tx_taps_344.BCM8885X=pam4:-20:148:0:0:0:0
|
||||||
|
serdes_tx_taps_345.BCM8885X=pam4:-20:148:0:0:0:0
|
||||||
|
serdes_tx_taps_346.BCM8885X=pam4:-20:148:0:0:0:0
|
||||||
|
serdes_tx_taps_347.BCM8885X=pam4:-20:148:0:0:0:0
|
||||||
|
serdes_tx_taps_348.BCM8885X=pam4:-20:148:0:0:0:0
|
||||||
|
serdes_tx_taps_349.BCM8885X=pam4:-20:148:0:0:0:0
|
||||||
|
serdes_tx_taps_350.BCM8885X=pam4:-20:148:0:0:0:0
|
||||||
|
serdes_tx_taps_351.BCM8885X=pam4:-20:148:0:0:0:0
|
||||||
|
serdes_tx_taps_352.BCM8885X=pam4:-20:148:0:0:0:0
|
||||||
|
serdes_tx_taps_353.BCM8885X=pam4:-20:148:0:0:0:0
|
||||||
|
serdes_tx_taps_354.BCM8885X=pam4:-20:148:0:0:0:0
|
||||||
|
serdes_tx_taps_355.BCM8885X=pam4:-20:148:0:0:0:0
|
||||||
|
serdes_tx_taps_356.BCM8885X=pam4:-20:148:0:0:0:0
|
||||||
|
serdes_tx_taps_357.BCM8885X=pam4:-20:148:0:0:0:0
|
||||||
|
serdes_tx_taps_358.BCM8885X=pam4:-20:148:0:0:0:0
|
||||||
|
serdes_tx_taps_359.BCM8885X=pam4:-20:148:0:0:0:0
|
||||||
|
serdes_tx_taps_360.BCM8885X=pam4:-20:148:0:0:0:0
|
||||||
|
serdes_tx_taps_361.BCM8885X=pam4:-20:148:0:0:0:0
|
||||||
|
serdes_tx_taps_362.BCM8885X=pam4:-20:148:0:0:0:0
|
||||||
|
serdes_tx_taps_363.BCM8885X=pam4:-20:148:0:0:0:0
|
||||||
|
serdes_tx_taps_364.BCM8885X=pam4:-20:148:0:0:0:0
|
||||||
|
serdes_tx_taps_365.BCM8885X=pam4:-20:148:0:0:0:0
|
||||||
|
serdes_tx_taps_366.BCM8885X=pam4:-20:148:0:0:0:0
|
||||||
|
serdes_tx_taps_367.BCM8885X=pam4:-20:148:0:0:0:0
|
||||||
|
serdes_tx_taps_368.BCM8885X=pam4:-20:148:0:0:0:0
|
||||||
|
serdes_tx_taps_369.BCM8885X=pam4:-20:148:0:0:0:0
|
||||||
|
serdes_tx_taps_370.BCM8885X=pam4:-20:148:0:0:0:0
|
||||||
|
serdes_tx_taps_371.BCM8885X=pam4:-20:148:0:0:0:0
|
||||||
|
serdes_tx_taps_372.BCM8885X=pam4:-20:148:0:0:0:0
|
||||||
|
serdes_tx_taps_373.BCM8885X=pam4:-20:148:0:0:0:0
|
||||||
|
serdes_tx_taps_374.BCM8885X=pam4:-20:148:0:0:0:0
|
||||||
|
serdes_tx_taps_375.BCM8885X=pam4:-20:148:0:0:0:0
|
||||||
|
serdes_tx_taps_376.BCM8885X=pam4:-20:148:0:0:0:0
|
||||||
|
serdes_tx_taps_377.BCM8885X=pam4:-20:148:0:0:0:0
|
||||||
|
serdes_tx_taps_378.BCM8885X=pam4:-20:148:0:0:0:0
|
||||||
|
serdes_tx_taps_379.BCM8885X=pam4:-20:148:0:0:0:0
|
||||||
|
serdes_tx_taps_380.BCM8885X=pam4:-20:148:0:0:0:0
|
||||||
|
serdes_tx_taps_381.BCM8885X=pam4:-20:148:0:0:0:0
|
||||||
|
serdes_tx_taps_382.BCM8885X=pam4:-20:148:0:0:0:0
|
||||||
|
serdes_tx_taps_383.BCM8885X=pam4:-20:148:0:0:0:0
|
||||||
|
serdes_tx_taps_384.BCM8885X=pam4:-20:148:0:0:0:0
|
||||||
|
serdes_tx_taps_385.BCM8885X=pam4:-20:148:0:0:0:0
|
||||||
|
serdes_tx_taps_386.BCM8885X=pam4:-20:148:0:0:0:0
|
||||||
|
serdes_tx_taps_387.BCM8885X=pam4:-20:148:0:0:0:0
|
||||||
|
serdes_tx_taps_388.BCM8885X=pam4:-20:148:0:0:0:0
|
||||||
|
serdes_tx_taps_389.BCM8885X=pam4:-20:148:0:0:0:0
|
||||||
|
serdes_tx_taps_390.BCM8885X=pam4:-20:148:0:0:0:0
|
||||||
|
serdes_tx_taps_391.BCM8885X=pam4:-20:148:0:0:0:0
|
||||||
|
serdes_tx_taps_392.BCM8885X=pam4:-20:148:0:0:0:0
|
||||||
|
serdes_tx_taps_393.BCM8885X=pam4:-20:148:0:0:0:0
|
||||||
|
serdes_tx_taps_394.BCM8885X=pam4:-20:148:0:0:0:0
|
||||||
|
serdes_tx_taps_395.BCM8885X=pam4:-20:148:0:0:0:0
|
||||||
|
serdes_tx_taps_396.BCM8885X=pam4:-20:148:0:0:0:0
|
||||||
|
serdes_tx_taps_397.BCM8885X=pam4:-20:148:0:0:0:0
|
||||||
|
serdes_tx_taps_398.BCM8885X=pam4:-20:148:0:0:0:0
|
||||||
|
serdes_tx_taps_399.BCM8885X=pam4:-20:148:0:0:0:0
|
||||||
|
serdes_tx_taps_400.BCM8885X=pam4:-20:148:0:0:0:0
|
||||||
|
serdes_tx_taps_401.BCM8885X=pam4:-20:148:0:0:0:0
|
||||||
|
serdes_tx_taps_402.BCM8885X=pam4:-20:148:0:0:0:0
|
||||||
|
serdes_tx_taps_403.BCM8885X=pam4:-20:148:0:0:0:0
|
||||||
|
serdes_tx_taps_404.BCM8885X=pam4:-20:148:0:0:0:0
|
||||||
|
serdes_tx_taps_405.BCM8885X=pam4:-20:148:0:0:0:0
|
||||||
|
serdes_tx_taps_406.BCM8885X=pam4:-20:148:0:0:0:0
|
||||||
|
serdes_tx_taps_407.BCM8885X=pam4:-20:148:0:0:0:0
|
||||||
|
serdes_tx_taps_408.BCM8885X=pam4:-20:148:0:0:0:0
|
||||||
|
serdes_tx_taps_409.BCM8885X=pam4:-20:148:0:0:0:0
|
||||||
|
serdes_tx_taps_410.BCM8885X=pam4:-20:148:0:0:0:0
|
||||||
|
serdes_tx_taps_411.BCM8885X=pam4:-20:148:0:0:0:0
|
||||||
|
serdes_tx_taps_412.BCM8885X=pam4:-20:148:0:0:0:0
|
||||||
|
serdes_tx_taps_413.BCM8885X=pam4:-20:148:0:0:0:0
|
||||||
|
serdes_tx_taps_414.BCM8885X=pam4:-20:148:0:0:0:0
|
||||||
|
serdes_tx_taps_415.BCM8885X=pam4:-20:148:0:0:0:0
|
||||||
|
serdes_tx_taps_416.BCM8885X=pam4:-20:148:0:0:0:0
|
||||||
|
serdes_tx_taps_417.BCM8885X=pam4:-20:148:0:0:0:0
|
||||||
|
serdes_tx_taps_418.BCM8885X=pam4:-20:148:0:0:0:0
|
||||||
|
serdes_tx_taps_419.BCM8885X=pam4:-20:148:0:0:0:0
|
||||||
|
serdes_tx_taps_420.BCM8885X=pam4:-20:148:0:0:0:0
|
||||||
|
serdes_tx_taps_421.BCM8885X=pam4:-20:148:0:0:0:0
|
||||||
|
serdes_tx_taps_422.BCM8885X=pam4:-20:148:0:0:0:0
|
||||||
|
serdes_tx_taps_423.BCM8885X=pam4:-20:148:0:0:0:0
|
||||||
|
serdes_tx_taps_424.BCM8885X=pam4:-20:148:0:0:0:0
|
||||||
|
serdes_tx_taps_425.BCM8885X=pam4:-20:148:0:0:0:0
|
||||||
|
serdes_tx_taps_426.BCM8885X=pam4:-20:148:0:0:0:0
|
||||||
|
serdes_tx_taps_427.BCM8885X=pam4:-20:148:0:0:0:0
|
||||||
|
serdes_tx_taps_428.BCM8885X=pam4:-20:148:0:0:0:0
|
||||||
|
serdes_tx_taps_429.BCM8885X=pam4:-20:148:0:0:0:0
|
||||||
|
serdes_tx_taps_430.BCM8885X=pam4:-20:148:0:0:0:0
|
||||||
|
serdes_tx_taps_431.BCM8885X=pam4:-20:148:0:0:0:0
|
||||||
|
serdes_tx_taps_432.BCM8885X=pam4:-20:148:0:0:0:0
|
||||||
|
serdes_tx_taps_433.BCM8885X=pam4:-20:148:0:0:0:0
|
||||||
|
serdes_tx_taps_434.BCM8885X=pam4:-20:148:0:0:0:0
|
||||||
|
serdes_tx_taps_435.BCM8885X=pam4:-20:148:0:0:0:0
|
||||||
|
serdes_tx_taps_436.BCM8885X=pam4:-20:148:0:0:0:0
|
||||||
|
serdes_tx_taps_437.BCM8885X=pam4:-20:148:0:0:0:0
|
||||||
|
serdes_tx_taps_438.BCM8885X=pam4:-20:148:0:0:0:0
|
||||||
|
serdes_tx_taps_439.BCM8885X=pam4:-20:148:0:0:0:0
|
||||||
|
serdes_tx_taps_440.BCM8885X=pam4:-20:148:0:0:0:0
|
||||||
|
serdes_tx_taps_441.BCM8885X=pam4:-20:148:0:0:0:0
|
||||||
|
serdes_tx_taps_442.BCM8885X=pam4:-20:148:0:0:0:0
|
||||||
|
serdes_tx_taps_443.BCM8885X=pam4:-20:148:0:0:0:0
|
||||||
|
serdes_tx_taps_444.BCM8885X=pam4:-20:148:0:0:0:0
|
||||||
|
serdes_tx_taps_445.BCM8885X=pam4:-20:148:0:0:0:0
|
||||||
|
serdes_tx_taps_446.BCM8885X=pam4:-20:148:0:0:0:0
|
||||||
|
serdes_tx_taps_447.BCM8885X=pam4:-20:148:0:0:0:0
|
||||||
|
|
||||||
|
|
||||||
serdes_lane_config_channel_mode_256=force_nr
|
serdes_lane_config_channel_mode_256=force_nr
|
||||||
serdes_lane_config_channel_mode_257=force_nr
|
serdes_lane_config_channel_mode_257=force_nr
|
||||||
|
@ -0,0 +1,36 @@
|
|||||||
|
phy set 3 reg=0xd134 data=-8 lane=0
|
||||||
|
phy set 3 reg=0xd135 data=132 lane=0
|
||||||
|
phy set 3 reg=0xd136 data=-8 lane=0
|
||||||
|
phy set 3 reg=0xd137 data=0 lane=0
|
||||||
|
phy set 3 reg=0xd138 data=0 lane=0
|
||||||
|
phy set 3 reg=0xd133 data=0x1802 lane=0
|
||||||
|
|
||||||
|
phy set 3 reg=0xd134 data=-8 lane=1
|
||||||
|
phy set 3 reg=0xd135 data=132 lane=1
|
||||||
|
phy set 3 reg=0xd136 data=-12 lane=1
|
||||||
|
phy set 3 reg=0xd137 data=0 lane=1
|
||||||
|
phy set 3 reg=0xd138 data=0 lane=1
|
||||||
|
phy set 3 reg=0xd133 data=0x1800 lane=1
|
||||||
|
|
||||||
|
phy set 3 reg=0xd134 data=-8 lane=7
|
||||||
|
phy set 3 reg=0xd135 data=132 lane=7
|
||||||
|
phy set 3 reg=0xd136 data=-8 lane=7
|
||||||
|
phy set 3 reg=0xd137 data=0 lane=7
|
||||||
|
phy set 3 reg=0xd138 data=0 lane=7
|
||||||
|
phy set 3 reg=0xd133 data=0x1804 lane=7
|
||||||
|
|
||||||
|
|
||||||
|
phy set 6 reg=0xd134 data=-8 lane=1
|
||||||
|
phy set 6 reg=0xd135 data=132 lane=1
|
||||||
|
phy set 6 reg=0xd136 data=-8 lane=1
|
||||||
|
phy set 6 reg=0xd137 data=0 lane=1
|
||||||
|
phy set 6 reg=0xd138 data=0 lane=1
|
||||||
|
phy set 6 reg=0xd133 data=0x1802 lane=1
|
||||||
|
|
||||||
|
|
||||||
|
phy set 8 reg=0xd134 data=-8 lane=1
|
||||||
|
phy set 8 reg=0xd135 data=132 lane=1
|
||||||
|
phy set 8 reg=0xd136 data=-8 lane=1
|
||||||
|
phy set 8 reg=0xd137 data=0 lane=1
|
||||||
|
phy set 8 reg=0xd138 data=0 lane=1
|
||||||
|
phy set 8 reg=0xd133 data=0x1802 lane=1
|
@ -1,4 +1,3 @@
|
|||||||
platform_name.BCM8885X=j2_ixr7250
|
|
||||||
appl_enable_intr_init.BCM8885X=1
|
appl_enable_intr_init.BCM8885X=1
|
||||||
appl_enable_learn_and_limit_init.BCM8885X=0
|
appl_enable_learn_and_limit_init.BCM8885X=0
|
||||||
appl_enable_oam.BCM8885X=0
|
appl_enable_oam.BCM8885X=0
|
||||||
@ -9,6 +8,7 @@ dma_desc_aggregator_chain_length_max.BCM8885X=1000
|
|||||||
dma_desc_aggregator_enable_specific_MDB_LPM.BCM8885X=1
|
dma_desc_aggregator_enable_specific_MDB_LPM.BCM8885X=1
|
||||||
dma_desc_aggregator_timeout_usec.BCM8885X=1000
|
dma_desc_aggregator_timeout_usec.BCM8885X=1000
|
||||||
dport_map_direct.BCM8885X=1
|
dport_map_direct.BCM8885X=1
|
||||||
|
sai_postinit_cmd_file=/usr/share/sonic/hwsku/sai_postinit_cmd.soc
|
||||||
dtm_flow_mapping_mode_region_64.BCM8885X=3
|
dtm_flow_mapping_mode_region_64.BCM8885X=3
|
||||||
dtm_flow_mapping_mode_region_65.BCM8885X=3
|
dtm_flow_mapping_mode_region_65.BCM8885X=3
|
||||||
dtm_flow_mapping_mode_region_66.BCM8885X=3
|
dtm_flow_mapping_mode_region_66.BCM8885X=3
|
||||||
@ -108,15 +108,16 @@ dtm_flow_nof_remote_cores_region_75.BCM8869X=2
|
|||||||
dtm_flow_mapping_mode_region_75.BCM8869X=0
|
dtm_flow_mapping_mode_region_75.BCM8869X=0
|
||||||
ext_ram_enabled_bitmap.BCM8885X=3
|
ext_ram_enabled_bitmap.BCM8885X=3
|
||||||
ext_ram_freq.BCM8885X=1200
|
ext_ram_freq.BCM8885X=1200
|
||||||
dram_temperature_threshold_restore_traffic.BCM8885X=88
|
dram_temperature_threshold_restore_traffic.BCM8885X=89
|
||||||
dram_temperature_threshold_power_down.BCM8885X=100
|
dram_temperature_threshold_power_down.BCM8885X=102
|
||||||
dram_temperature_threshold_stop_traffic.BCM8885X=95
|
dram_temperature_threshold_stop_traffic.BCM8885X=94
|
||||||
dram_temperature_monitor_enable.BCM8885X=1
|
dram_temperature_monitor_enable.BCM8885X=1
|
||||||
fabric_connect_mode.BCM8885X=FE
|
fabric_connect_mode.BCM8885X=FE
|
||||||
ftmh_stacking_extension_size=0
|
ftmh_stacking_extension_size=0
|
||||||
j2_ftmh_lb_key_extension_size=3
|
j2_ftmh_lb_key_extension_size=3
|
||||||
j_ftmh_lb_key_extension_size=0
|
j_ftmh_lb_key_extension_size=0
|
||||||
|
|
||||||
|
|
||||||
lane_to_serdes_map_fabric_lane0.BCM8885X=rx0:tx0
|
lane_to_serdes_map_fabric_lane0.BCM8885X=rx0:tx0
|
||||||
lane_to_serdes_map_fabric_lane1.BCM8885X=rx1:tx1
|
lane_to_serdes_map_fabric_lane1.BCM8885X=rx1:tx1
|
||||||
lane_to_serdes_map_fabric_lane2.BCM8885X=rx2:tx3
|
lane_to_serdes_map_fabric_lane2.BCM8885X=rx2:tx3
|
||||||
@ -357,6 +358,7 @@ lane_to_serdes_map_fabric_lane189.BCM8885X=rx189:tx189
|
|||||||
lane_to_serdes_map_fabric_lane190.BCM8885X=rx190:tx188
|
lane_to_serdes_map_fabric_lane190.BCM8885X=rx190:tx188
|
||||||
lane_to_serdes_map_fabric_lane191.BCM8885X=rx191:tx191
|
lane_to_serdes_map_fabric_lane191.BCM8885X=rx191:tx191
|
||||||
|
|
||||||
|
|
||||||
phy_rx_polarity_flip_fabric0.BCM8885X=0
|
phy_rx_polarity_flip_fabric0.BCM8885X=0
|
||||||
phy_rx_polarity_flip_fabric1.BCM8885X=1
|
phy_rx_polarity_flip_fabric1.BCM8885X=1
|
||||||
phy_rx_polarity_flip_fabric2.BCM8885X=0
|
phy_rx_polarity_flip_fabric2.BCM8885X=0
|
||||||
@ -550,6 +552,7 @@ phy_rx_polarity_flip_fabric189.BCM8885X=0
|
|||||||
phy_rx_polarity_flip_fabric190.BCM8885X=0
|
phy_rx_polarity_flip_fabric190.BCM8885X=0
|
||||||
phy_rx_polarity_flip_fabric191.BCM8885X=1
|
phy_rx_polarity_flip_fabric191.BCM8885X=1
|
||||||
|
|
||||||
|
|
||||||
phy_tx_polarity_flip_fabric0.BCM8885X=0
|
phy_tx_polarity_flip_fabric0.BCM8885X=0
|
||||||
phy_tx_polarity_flip_fabric1.BCM8885X=0
|
phy_tx_polarity_flip_fabric1.BCM8885X=0
|
||||||
phy_tx_polarity_flip_fabric2.BCM8885X=0
|
phy_tx_polarity_flip_fabric2.BCM8885X=0
|
||||||
@ -743,6 +746,7 @@ phy_tx_polarity_flip_fabric189.BCM8885X=0
|
|||||||
phy_tx_polarity_flip_fabric190.BCM8885X=0
|
phy_tx_polarity_flip_fabric190.BCM8885X=0
|
||||||
phy_tx_polarity_flip_fabric191.BCM8885X=1
|
phy_tx_polarity_flip_fabric191.BCM8885X=1
|
||||||
|
|
||||||
|
|
||||||
lane_to_serdes_map_nif_lane0.BCM8885X=rx0:tx0
|
lane_to_serdes_map_nif_lane0.BCM8885X=rx0:tx0
|
||||||
lane_to_serdes_map_nif_lane1.BCM8885X=rx1:tx1
|
lane_to_serdes_map_nif_lane1.BCM8885X=rx1:tx1
|
||||||
lane_to_serdes_map_nif_lane2.BCM8885X=rx2:tx2
|
lane_to_serdes_map_nif_lane2.BCM8885X=rx2:tx2
|
||||||
@ -931,6 +935,7 @@ outlif_physical_phase_data_granularity_S2=60
|
|||||||
outlif_physical_phase_data_granularity_XL=60
|
outlif_physical_phase_data_granularity_XL=60
|
||||||
pdma_continuous_mode_enable.BCM8885X=1
|
pdma_continuous_mode_enable.BCM8885X=1
|
||||||
|
|
||||||
|
|
||||||
phy_rx_polarity_flip_phy0.BCM8885X=0
|
phy_rx_polarity_flip_phy0.BCM8885X=0
|
||||||
phy_rx_polarity_flip_phy1.BCM8885X=0
|
phy_rx_polarity_flip_phy1.BCM8885X=0
|
||||||
phy_rx_polarity_flip_phy2.BCM8885X=1
|
phy_rx_polarity_flip_phy2.BCM8885X=1
|
||||||
@ -1093,6 +1098,7 @@ phy_rx_polarity_flip_phy141.BCM8885X=1
|
|||||||
phy_rx_polarity_flip_phy142.BCM8885X=0
|
phy_rx_polarity_flip_phy142.BCM8885X=0
|
||||||
phy_rx_polarity_flip_phy143.BCM8885X=1
|
phy_rx_polarity_flip_phy143.BCM8885X=1
|
||||||
|
|
||||||
|
|
||||||
phy_tx_polarity_flip_phy0.BCM8885X=1
|
phy_tx_polarity_flip_phy0.BCM8885X=1
|
||||||
phy_tx_polarity_flip_phy1.BCM8885X=1
|
phy_tx_polarity_flip_phy1.BCM8885X=1
|
||||||
phy_tx_polarity_flip_phy2.BCM8885X=0
|
phy_tx_polarity_flip_phy2.BCM8885X=0
|
||||||
@ -1260,6 +1266,7 @@ polled_irq_delay.BCM8885X=5
|
|||||||
polled_irq_mode.BCM8885X=1
|
polled_irq_mode.BCM8885X=1
|
||||||
port_fec_fabric.BCM8885X=7
|
port_fec_fabric.BCM8885X=7
|
||||||
|
|
||||||
|
|
||||||
port_init_cl72_1=0
|
port_init_cl72_1=0
|
||||||
port_init_cl72_2=0
|
port_init_cl72_2=0
|
||||||
port_init_cl72_3=0
|
port_init_cl72_3=0
|
||||||
@ -1279,198 +1286,198 @@ port_init_cl72_16=0
|
|||||||
port_init_cl72_17=0
|
port_init_cl72_17=0
|
||||||
port_init_cl72_18=0
|
port_init_cl72_18=0
|
||||||
|
|
||||||
port_init_cl72_256=1
|
port_init_cl72_256=0
|
||||||
port_init_cl72_257=1
|
port_init_cl72_257=0
|
||||||
port_init_cl72_258=1
|
port_init_cl72_258=0
|
||||||
port_init_cl72_259=1
|
port_init_cl72_259=0
|
||||||
port_init_cl72_260=1
|
port_init_cl72_260=0
|
||||||
port_init_cl72_261=1
|
port_init_cl72_261=0
|
||||||
port_init_cl72_262=1
|
port_init_cl72_262=0
|
||||||
port_init_cl72_263=1
|
port_init_cl72_263=0
|
||||||
port_init_cl72_264=1
|
port_init_cl72_264=0
|
||||||
port_init_cl72_265=1
|
port_init_cl72_265=0
|
||||||
port_init_cl72_266=1
|
port_init_cl72_266=0
|
||||||
port_init_cl72_267=1
|
port_init_cl72_267=0
|
||||||
port_init_cl72_268=1
|
port_init_cl72_268=0
|
||||||
port_init_cl72_269=1
|
port_init_cl72_269=0
|
||||||
port_init_cl72_270=1
|
port_init_cl72_270=0
|
||||||
port_init_cl72_271=1
|
port_init_cl72_271=0
|
||||||
port_init_cl72_272=1
|
port_init_cl72_272=0
|
||||||
port_init_cl72_273=1
|
port_init_cl72_273=0
|
||||||
port_init_cl72_274=1
|
port_init_cl72_274=0
|
||||||
port_init_cl72_275=1
|
port_init_cl72_275=0
|
||||||
port_init_cl72_276=1
|
port_init_cl72_276=0
|
||||||
port_init_cl72_277=1
|
port_init_cl72_277=0
|
||||||
port_init_cl72_278=1
|
port_init_cl72_278=0
|
||||||
port_init_cl72_279=1
|
port_init_cl72_279=0
|
||||||
port_init_cl72_280=1
|
port_init_cl72_280=0
|
||||||
port_init_cl72_281=1
|
port_init_cl72_281=0
|
||||||
port_init_cl72_282=1
|
port_init_cl72_282=0
|
||||||
port_init_cl72_283=1
|
port_init_cl72_283=0
|
||||||
port_init_cl72_284=1
|
port_init_cl72_284=0
|
||||||
port_init_cl72_285=1
|
port_init_cl72_285=0
|
||||||
port_init_cl72_286=1
|
port_init_cl72_286=0
|
||||||
port_init_cl72_287=1
|
port_init_cl72_287=0
|
||||||
port_init_cl72_288=1
|
port_init_cl72_288=0
|
||||||
port_init_cl72_289=1
|
port_init_cl72_289=0
|
||||||
port_init_cl72_290=1
|
port_init_cl72_290=0
|
||||||
port_init_cl72_291=1
|
port_init_cl72_291=0
|
||||||
port_init_cl72_292=1
|
port_init_cl72_292=0
|
||||||
port_init_cl72_293=1
|
port_init_cl72_293=0
|
||||||
port_init_cl72_294=1
|
port_init_cl72_294=0
|
||||||
port_init_cl72_295=1
|
port_init_cl72_295=0
|
||||||
port_init_cl72_296=1
|
port_init_cl72_296=0
|
||||||
port_init_cl72_297=1
|
port_init_cl72_297=0
|
||||||
port_init_cl72_298=1
|
port_init_cl72_298=0
|
||||||
port_init_cl72_299=1
|
port_init_cl72_299=0
|
||||||
port_init_cl72_300=1
|
port_init_cl72_300=0
|
||||||
port_init_cl72_301=1
|
port_init_cl72_301=0
|
||||||
port_init_cl72_302=1
|
port_init_cl72_302=0
|
||||||
port_init_cl72_303=1
|
port_init_cl72_303=0
|
||||||
port_init_cl72_304=1
|
port_init_cl72_304=0
|
||||||
port_init_cl72_305=1
|
port_init_cl72_305=0
|
||||||
port_init_cl72_306=1
|
port_init_cl72_306=0
|
||||||
port_init_cl72_307=1
|
port_init_cl72_307=0
|
||||||
port_init_cl72_308=1
|
port_init_cl72_308=0
|
||||||
port_init_cl72_309=1
|
port_init_cl72_309=0
|
||||||
port_init_cl72_310=1
|
port_init_cl72_310=0
|
||||||
port_init_cl72_311=1
|
port_init_cl72_311=0
|
||||||
port_init_cl72_312=1
|
port_init_cl72_312=0
|
||||||
port_init_cl72_313=1
|
port_init_cl72_313=0
|
||||||
port_init_cl72_314=1
|
port_init_cl72_314=0
|
||||||
port_init_cl72_315=1
|
port_init_cl72_315=0
|
||||||
port_init_cl72_316=1
|
port_init_cl72_316=0
|
||||||
port_init_cl72_317=1
|
port_init_cl72_317=0
|
||||||
port_init_cl72_318=1
|
port_init_cl72_318=0
|
||||||
port_init_cl72_319=1
|
port_init_cl72_319=0
|
||||||
port_init_cl72_320=1
|
port_init_cl72_320=0
|
||||||
port_init_cl72_321=1
|
port_init_cl72_321=0
|
||||||
port_init_cl72_322=1
|
port_init_cl72_322=0
|
||||||
port_init_cl72_323=1
|
port_init_cl72_323=0
|
||||||
port_init_cl72_324=1
|
port_init_cl72_324=0
|
||||||
port_init_cl72_325=1
|
port_init_cl72_325=0
|
||||||
port_init_cl72_326=1
|
port_init_cl72_326=0
|
||||||
port_init_cl72_327=1
|
port_init_cl72_327=0
|
||||||
port_init_cl72_328=1
|
port_init_cl72_328=0
|
||||||
port_init_cl72_329=1
|
port_init_cl72_329=0
|
||||||
port_init_cl72_330=1
|
port_init_cl72_330=0
|
||||||
port_init_cl72_331=1
|
port_init_cl72_331=0
|
||||||
port_init_cl72_332=1
|
port_init_cl72_332=0
|
||||||
port_init_cl72_333=1
|
port_init_cl72_333=0
|
||||||
port_init_cl72_334=1
|
port_init_cl72_334=0
|
||||||
port_init_cl72_335=1
|
port_init_cl72_335=0
|
||||||
port_init_cl72_336=1
|
port_init_cl72_336=0
|
||||||
port_init_cl72_337=1
|
port_init_cl72_337=0
|
||||||
port_init_cl72_338=1
|
port_init_cl72_338=0
|
||||||
port_init_cl72_339=1
|
port_init_cl72_339=0
|
||||||
port_init_cl72_340=1
|
port_init_cl72_340=0
|
||||||
port_init_cl72_341=1
|
port_init_cl72_341=0
|
||||||
port_init_cl72_342=1
|
port_init_cl72_342=0
|
||||||
port_init_cl72_343=1
|
port_init_cl72_343=0
|
||||||
port_init_cl72_344=1
|
port_init_cl72_344=0
|
||||||
port_init_cl72_345=1
|
port_init_cl72_345=0
|
||||||
port_init_cl72_346=1
|
port_init_cl72_346=0
|
||||||
port_init_cl72_347=1
|
port_init_cl72_347=0
|
||||||
port_init_cl72_348=1
|
port_init_cl72_348=0
|
||||||
port_init_cl72_349=1
|
port_init_cl72_349=0
|
||||||
port_init_cl72_350=1
|
port_init_cl72_350=0
|
||||||
port_init_cl72_351=1
|
port_init_cl72_351=0
|
||||||
port_init_cl72_352=1
|
port_init_cl72_352=0
|
||||||
port_init_cl72_353=1
|
port_init_cl72_353=0
|
||||||
port_init_cl72_354=1
|
port_init_cl72_354=0
|
||||||
port_init_cl72_355=1
|
port_init_cl72_355=0
|
||||||
port_init_cl72_356=1
|
port_init_cl72_356=0
|
||||||
port_init_cl72_357=1
|
port_init_cl72_357=0
|
||||||
port_init_cl72_358=1
|
port_init_cl72_358=0
|
||||||
port_init_cl72_359=1
|
port_init_cl72_359=0
|
||||||
port_init_cl72_360=1
|
port_init_cl72_360=0
|
||||||
port_init_cl72_361=1
|
port_init_cl72_361=0
|
||||||
port_init_cl72_362=1
|
port_init_cl72_362=0
|
||||||
port_init_cl72_363=1
|
port_init_cl72_363=0
|
||||||
port_init_cl72_364=1
|
port_init_cl72_364=0
|
||||||
port_init_cl72_365=1
|
port_init_cl72_365=0
|
||||||
port_init_cl72_366=1
|
port_init_cl72_366=0
|
||||||
port_init_cl72_367=1
|
port_init_cl72_367=0
|
||||||
port_init_cl72_368=1
|
port_init_cl72_368=0
|
||||||
port_init_cl72_369=1
|
port_init_cl72_369=0
|
||||||
port_init_cl72_370=1
|
port_init_cl72_370=0
|
||||||
port_init_cl72_371=1
|
port_init_cl72_371=0
|
||||||
port_init_cl72_372=1
|
port_init_cl72_372=0
|
||||||
port_init_cl72_373=1
|
port_init_cl72_373=0
|
||||||
port_init_cl72_374=1
|
port_init_cl72_374=0
|
||||||
port_init_cl72_375=1
|
port_init_cl72_375=0
|
||||||
port_init_cl72_376=1
|
port_init_cl72_376=0
|
||||||
port_init_cl72_377=1
|
port_init_cl72_377=0
|
||||||
port_init_cl72_378=1
|
port_init_cl72_378=0
|
||||||
port_init_cl72_379=1
|
port_init_cl72_379=0
|
||||||
port_init_cl72_380=1
|
port_init_cl72_380=0
|
||||||
port_init_cl72_381=1
|
port_init_cl72_381=0
|
||||||
port_init_cl72_382=1
|
port_init_cl72_382=0
|
||||||
port_init_cl72_383=1
|
port_init_cl72_383=0
|
||||||
port_init_cl72_384=1
|
port_init_cl72_384=0
|
||||||
port_init_cl72_385=1
|
port_init_cl72_385=0
|
||||||
port_init_cl72_386=1
|
port_init_cl72_386=0
|
||||||
port_init_cl72_387=1
|
port_init_cl72_387=0
|
||||||
port_init_cl72_388=1
|
port_init_cl72_388=0
|
||||||
port_init_cl72_389=1
|
port_init_cl72_389=0
|
||||||
port_init_cl72_390=1
|
port_init_cl72_390=0
|
||||||
port_init_cl72_391=1
|
port_init_cl72_391=0
|
||||||
port_init_cl72_392=1
|
port_init_cl72_392=0
|
||||||
port_init_cl72_393=1
|
port_init_cl72_393=0
|
||||||
port_init_cl72_394=1
|
port_init_cl72_394=0
|
||||||
port_init_cl72_395=1
|
port_init_cl72_395=0
|
||||||
port_init_cl72_396=1
|
port_init_cl72_396=0
|
||||||
port_init_cl72_397=1
|
port_init_cl72_397=0
|
||||||
port_init_cl72_398=1
|
port_init_cl72_398=0
|
||||||
port_init_cl72_399=1
|
port_init_cl72_399=0
|
||||||
port_init_cl72_400=1
|
port_init_cl72_400=0
|
||||||
port_init_cl72_401=1
|
port_init_cl72_401=0
|
||||||
port_init_cl72_402=1
|
port_init_cl72_402=0
|
||||||
port_init_cl72_403=1
|
port_init_cl72_403=0
|
||||||
port_init_cl72_404=1
|
port_init_cl72_404=0
|
||||||
port_init_cl72_405=1
|
port_init_cl72_405=0
|
||||||
port_init_cl72_406=1
|
port_init_cl72_406=0
|
||||||
port_init_cl72_407=1
|
port_init_cl72_407=0
|
||||||
port_init_cl72_408=1
|
port_init_cl72_408=0
|
||||||
port_init_cl72_409=1
|
port_init_cl72_409=0
|
||||||
port_init_cl72_410=1
|
port_init_cl72_410=0
|
||||||
port_init_cl72_411=1
|
port_init_cl72_411=0
|
||||||
port_init_cl72_412=1
|
port_init_cl72_412=0
|
||||||
port_init_cl72_413=1
|
port_init_cl72_413=0
|
||||||
port_init_cl72_414=1
|
port_init_cl72_414=0
|
||||||
port_init_cl72_415=1
|
port_init_cl72_415=0
|
||||||
port_init_cl72_416=1
|
port_init_cl72_416=0
|
||||||
port_init_cl72_417=1
|
port_init_cl72_417=0
|
||||||
port_init_cl72_418=1
|
port_init_cl72_418=0
|
||||||
port_init_cl72_419=1
|
port_init_cl72_419=0
|
||||||
port_init_cl72_420=1
|
port_init_cl72_420=0
|
||||||
port_init_cl72_421=1
|
port_init_cl72_421=0
|
||||||
port_init_cl72_422=1
|
port_init_cl72_422=0
|
||||||
port_init_cl72_423=1
|
port_init_cl72_423=0
|
||||||
port_init_cl72_424=1
|
port_init_cl72_424=0
|
||||||
port_init_cl72_425=1
|
port_init_cl72_425=0
|
||||||
port_init_cl72_426=1
|
port_init_cl72_426=0
|
||||||
port_init_cl72_427=1
|
port_init_cl72_427=0
|
||||||
port_init_cl72_428=1
|
port_init_cl72_428=0
|
||||||
port_init_cl72_429=1
|
port_init_cl72_429=0
|
||||||
port_init_cl72_430=1
|
port_init_cl72_430=0
|
||||||
port_init_cl72_431=1
|
port_init_cl72_431=0
|
||||||
port_init_cl72_432=1
|
port_init_cl72_432=0
|
||||||
port_init_cl72_433=1
|
port_init_cl72_433=0
|
||||||
port_init_cl72_434=1
|
port_init_cl72_434=0
|
||||||
port_init_cl72_435=1
|
port_init_cl72_435=0
|
||||||
port_init_cl72_436=1
|
port_init_cl72_436=0
|
||||||
port_init_cl72_437=1
|
port_init_cl72_437=0
|
||||||
port_init_cl72_438=1
|
port_init_cl72_438=0
|
||||||
port_init_cl72_439=1
|
port_init_cl72_439=0
|
||||||
port_init_cl72_440=1
|
port_init_cl72_440=0
|
||||||
port_init_cl72_441=1
|
port_init_cl72_441=0
|
||||||
port_init_cl72_442=1
|
port_init_cl72_442=0
|
||||||
port_init_cl72_443=1
|
port_init_cl72_443=0
|
||||||
port_init_cl72_444=1
|
port_init_cl72_444=0
|
||||||
port_init_cl72_445=1
|
port_init_cl72_445=0
|
||||||
port_init_cl72_446=1
|
port_init_cl72_446=0
|
||||||
port_init_cl72_447=1
|
port_init_cl72_447=0
|
||||||
|
|
||||||
|
|
||||||
port_init_speed_cc.BCM8885X=200000
|
port_init_speed_cc.BCM8885X=200000
|
||||||
@ -1506,6 +1513,7 @@ tm_port_header_type_in_201.BCM8885X=INJECTED_2_PP
|
|||||||
tm_port_header_type_in_202.BCM8885X=INJECTED_2_PP
|
tm_port_header_type_in_202.BCM8885X=INJECTED_2_PP
|
||||||
tm_port_header_type_in_203.BCM8885X=INJECTED_2_PP
|
tm_port_header_type_in_203.BCM8885X=INJECTED_2_PP
|
||||||
tm_port_header_type_in_232.BCM8885X=INJECTED_2
|
tm_port_header_type_in_232.BCM8885X=INJECTED_2
|
||||||
|
tm_port_header_type_in_19.BCM8885X=ETH
|
||||||
tm_port_header_type_in_20.BCM8885X=INJECTED_2
|
tm_port_header_type_in_20.BCM8885X=INJECTED_2
|
||||||
tm_port_header_type_out_0.BCM8885X=CPU
|
tm_port_header_type_out_0.BCM8885X=CPU
|
||||||
tm_port_header_type_out_200.BCM8885X=ETH
|
tm_port_header_type_out_200.BCM8885X=ETH
|
||||||
@ -1513,6 +1521,7 @@ tm_port_header_type_out_201.BCM8885X=ETH
|
|||||||
tm_port_header_type_out_202.BCM8885X=ETH
|
tm_port_header_type_out_202.BCM8885X=ETH
|
||||||
tm_port_header_type_out_203.BCM8885X=ETH
|
tm_port_header_type_out_203.BCM8885X=ETH
|
||||||
tm_port_header_type_out_232.BCM8885X=CPU
|
tm_port_header_type_out_232.BCM8885X=CPU
|
||||||
|
tm_port_header_type_out_19.BCM8885X=ETH
|
||||||
tm_port_header_type_out_20.BCM8885X=RAW
|
tm_port_header_type_out_20.BCM8885X=RAW
|
||||||
tslam_intr_enable.BCM8885X=0
|
tslam_intr_enable.BCM8885X=0
|
||||||
tslam_timeout_usec.BCM8885X=1000000
|
tslam_timeout_usec.BCM8885X=1000000
|
||||||
@ -1522,6 +1531,7 @@ ucode_port_201.BCM8885X=CPU.16:core_1.201
|
|||||||
ucode_port_202.BCM8885X=CPU.24:core_1.202
|
ucode_port_202.BCM8885X=CPU.24:core_1.202
|
||||||
ucode_port_203.BCM8885X=CPU.32:core_1.203
|
ucode_port_203.BCM8885X=CPU.32:core_1.203
|
||||||
|
|
||||||
|
|
||||||
ucode_port_1.BCM8885X=CDGE9:core_1.1
|
ucode_port_1.BCM8885X=CDGE9:core_1.1
|
||||||
ucode_port_2.BCM8885X=CDGE10:core_1.2
|
ucode_port_2.BCM8885X=CDGE10:core_1.2
|
||||||
ucode_port_3.BCM8885X=CDGE11:core_1.3
|
ucode_port_3.BCM8885X=CDGE11:core_1.3
|
||||||
@ -1541,9 +1551,11 @@ ucode_port_16.BCM8885X=CDGE2:core_0.16
|
|||||||
ucode_port_17.BCM8885X=CDGE1:core_0.17
|
ucode_port_17.BCM8885X=CDGE1:core_0.17
|
||||||
ucode_port_18.BCM8885X=CDGE0:core_0.18
|
ucode_port_18.BCM8885X=CDGE0:core_0.18
|
||||||
|
|
||||||
|
|
||||||
ucode_port_19.BCM8885X=RCY0:core_0.19
|
ucode_port_19.BCM8885X=RCY0:core_0.19
|
||||||
ucode_port_20.BCM8885X=OLP:core_1.20
|
ucode_port_20.BCM8885X=OLP:core_1.20
|
||||||
|
|
||||||
|
|
||||||
serdes_lane_config_dfe_1.BCM8885X=on
|
serdes_lane_config_dfe_1.BCM8885X=on
|
||||||
serdes_lane_config_dfe_2.BCM8885X=on
|
serdes_lane_config_dfe_2.BCM8885X=on
|
||||||
serdes_lane_config_dfe_3.BCM8885X=on
|
serdes_lane_config_dfe_3.BCM8885X=on
|
||||||
@ -1563,24 +1575,280 @@ serdes_lane_config_dfe_16.BCM8885X=on
|
|||||||
serdes_lane_config_dfe_17.BCM8885X=on
|
serdes_lane_config_dfe_17.BCM8885X=on
|
||||||
serdes_lane_config_dfe_18.BCM8885X=on
|
serdes_lane_config_dfe_18.BCM8885X=on
|
||||||
|
|
||||||
serdes_tx_taps_1.BCM8885X=pam4:-16:132:-8:0:0:0
|
|
||||||
serdes_tx_taps_2.BCM8885X=pam4:-16:130:-8:0:0:0
|
serdes_lane_config_channel_mode_1.BCM8885X=force_nr
|
||||||
serdes_tx_taps_3.BCM8885X=pam4:-16:130:-8:0:0:0
|
serdes_lane_config_channel_mode_2.BCM8885X=force_nr
|
||||||
serdes_tx_taps_4.BCM8885X=pam4:-16:130:-8:0:0:0
|
serdes_lane_config_channel_mode_3.BCM8885X=force_nr
|
||||||
serdes_tx_taps_5.BCM8885X=pam4:-16:130:-8:0:0:0
|
serdes_lane_config_channel_mode_4.BCM8885X=force_nr
|
||||||
serdes_tx_taps_6.BCM8885X=pam4:-16:130:-8:0:0:0
|
serdes_lane_config_channel_mode_5.BCM8885X=force_nr
|
||||||
serdes_tx_taps_7.BCM8885X=pam4:-16:130:-8:0:0:0
|
serdes_lane_config_channel_mode_6.BCM8885X=force_nr
|
||||||
serdes_tx_taps_8.BCM8885X=pam4:-16:130:-8:0:0:0
|
serdes_lane_config_channel_mode_7.BCM8885X=force_nr
|
||||||
serdes_tx_taps_9.BCM8885X=pam4:-16:130:-8:0:0:0
|
serdes_lane_config_channel_mode_8.BCM8885X=force_nr
|
||||||
serdes_tx_taps_10.BCM8885X=pam4:-16:130:-8:0:0:0
|
serdes_lane_config_channel_mode_9.BCM8885X=force_nr
|
||||||
serdes_tx_taps_11.BCM8885X=pam4:-16:130:-8:0:0:0
|
serdes_lane_config_channel_mode_10.BCM8885X=force_nr
|
||||||
serdes_tx_taps_12.BCM8885X=pam4:-16:130:-8:0:0:0
|
serdes_lane_config_channel_mode_11.BCM8885X=force_nr
|
||||||
serdes_tx_taps_13.BCM8885X=pam4:-16:130:-8:0:0:0
|
serdes_lane_config_channel_mode_12.BCM8885X=force_nr
|
||||||
serdes_tx_taps_14.BCM8885X=pam4:-16:130:-8:0:0:0
|
serdes_lane_config_channel_mode_13.BCM8885X=force_nr
|
||||||
serdes_tx_taps_15.BCM8885X=pam4:-16:130:-8:0:0:0
|
serdes_lane_config_channel_mode_14.BCM8885X=force_nr
|
||||||
serdes_tx_taps_16.BCM8885X=pam4:-16:130:-8:0:0:0
|
serdes_lane_config_channel_mode_15.BCM8885X=force_nr
|
||||||
serdes_tx_taps_17.BCM8885X=pam4:-16:130:-8:0:0:0
|
serdes_lane_config_channel_mode_16.BCM8885X=force_nr
|
||||||
serdes_tx_taps_18.BCM8885X=pam4:-16:132:-8:0:0:0
|
serdes_lane_config_channel_mode_17.BCM8885X=force_nr
|
||||||
|
serdes_lane_config_channel_mode_18.BCM8885X=force_nr
|
||||||
|
|
||||||
|
|
||||||
|
serdes_lane_config_media_type_1.BCM8885X=backplane
|
||||||
|
serdes_lane_config_media_type_2.BCM8885X=backplane
|
||||||
|
serdes_lane_config_media_type_3.BCM8885X=backplane
|
||||||
|
serdes_lane_config_media_type_4.BCM8885X=backplane
|
||||||
|
serdes_lane_config_media_type_5.BCM8885X=backplane
|
||||||
|
serdes_lane_config_media_type_6.BCM8885X=backplane
|
||||||
|
serdes_lane_config_media_type_7.BCM8885X=backplane
|
||||||
|
serdes_lane_config_media_type_8.BCM8885X=backplane
|
||||||
|
serdes_lane_config_media_type_9.BCM8885X=backplane
|
||||||
|
serdes_lane_config_media_type_10.BCM8885X=backplane
|
||||||
|
serdes_lane_config_media_type_11.BCM8885X=backplane
|
||||||
|
serdes_lane_config_media_type_12.BCM8885X=backplane
|
||||||
|
serdes_lane_config_media_type_13.BCM8885X=backplane
|
||||||
|
serdes_lane_config_media_type_14.BCM8885X=backplane
|
||||||
|
serdes_lane_config_media_type_15.BCM8885X=backplane
|
||||||
|
serdes_lane_config_media_type_16.BCM8885X=backplane
|
||||||
|
serdes_lane_config_media_type_17.BCM8885X=backplane
|
||||||
|
serdes_lane_config_media_type_18.BCM8885X=backplane
|
||||||
|
|
||||||
|
|
||||||
|
port_fec.1.BCM8885x=9
|
||||||
|
port_fec.2.BCM8885x=9
|
||||||
|
port_fec.3.BCM8885x=9
|
||||||
|
port_fec.4.BCM8885x=9
|
||||||
|
port_fec.5.BCM8885x=9
|
||||||
|
port_fec.6.BCM8885x=9
|
||||||
|
port_fec.7.BCM8885x=9
|
||||||
|
port_fec.8.BCM8885x=9
|
||||||
|
port_fec.9.BCM8885x=9
|
||||||
|
port_fec.10.BCM8885x=9
|
||||||
|
port_fec.11.BCM8885x=9
|
||||||
|
port_fec.12.BCM8885x=9
|
||||||
|
port_fec.13.BCM8885x=9
|
||||||
|
port_fec.14.BCM8885x=9
|
||||||
|
port_fec.15.BCM8885x=9
|
||||||
|
port_fec.16.BCM8885x=9
|
||||||
|
port_fec.17.BCM8885x=9
|
||||||
|
port_fec.18.BCM8885x=9
|
||||||
|
|
||||||
|
|
||||||
|
serdes_tx_taps_1.BCM8885X=pam4:-8:132:-8:0:0:0
|
||||||
|
serdes_tx_taps_2.BCM8885X=pam4:-8:132:-8:0:0:0
|
||||||
|
serdes_tx_taps_3.BCM8885X=pam4:-8:132:-8:4:0:0
|
||||||
|
serdes_tx_taps_4.BCM8885X=pam4:-8:128:-4:4:0:0
|
||||||
|
serdes_tx_taps_5.BCM8885X=pam4:-8:132:-8:4:0:0
|
||||||
|
serdes_tx_taps_6.BCM8885X=pam4:-8:136:0:0:0:0
|
||||||
|
serdes_tx_taps_7.BCM8885X=pam4:-8:132:-4:0:-4:0
|
||||||
|
serdes_tx_taps_8.BCM8885X=pam4:-4:144:0:0:0:0
|
||||||
|
serdes_tx_taps_9.BCM8885X=pam4:-8:132:-4:2:-4:0
|
||||||
|
serdes_tx_taps_10.BCM8885X=pam4:-4:144:0:0:0:0
|
||||||
|
serdes_tx_taps_11.BCM8885X=pam4:-8:132:-4:0:-4:0
|
||||||
|
serdes_tx_taps_12.BCM8885X=pam4:-4:144:0:0:0:0
|
||||||
|
serdes_tx_taps_13.BCM8885X=pam4:-8:132:-8:4:0:0
|
||||||
|
serdes_tx_taps_14.BCM8885X=pam4:-4:144:0:0:0:0
|
||||||
|
serdes_tx_taps_15.BCM8885X=pam4:-8:132:-8:4:0:0
|
||||||
|
serdes_tx_taps_16.BCM8885X=pam4:-8:136:-4:4:-4:0
|
||||||
|
serdes_tx_taps_17.BCM8885X=pam4:-8:132:-4:0:0:0
|
||||||
|
serdes_tx_taps_18.BCM8885X=pam4:-4:128:-4:0:0:0
|
||||||
|
|
||||||
|
|
||||||
|
serdes_tx_taps_256.BCM8885X=pam4:-20:148:0:0:0:0
|
||||||
|
serdes_tx_taps_257.BCM8885X=pam4:-20:148:0:0:0:0
|
||||||
|
serdes_tx_taps_258.BCM8885X=pam4:-20:148:0:0:0:0
|
||||||
|
serdes_tx_taps_259.BCM8885X=pam4:-20:148:0:0:0:0
|
||||||
|
serdes_tx_taps_260.BCM8885X=pam4:-20:148:0:0:0:0
|
||||||
|
serdes_tx_taps_261.BCM8885X=pam4:-20:148:0:0:0:0
|
||||||
|
serdes_tx_taps_262.BCM8885X=pam4:-20:148:0:0:0:0
|
||||||
|
serdes_tx_taps_263.BCM8885X=pam4:-20:148:0:0:0:0
|
||||||
|
serdes_tx_taps_264.BCM8885X=pam4:-20:148:0:0:0:0
|
||||||
|
serdes_tx_taps_265.BCM8885X=pam4:-20:148:0:0:0:0
|
||||||
|
serdes_tx_taps_266.BCM8885X=pam4:-20:148:0:0:0:0
|
||||||
|
serdes_tx_taps_267.BCM8885X=pam4:-20:148:0:0:0:0
|
||||||
|
serdes_tx_taps_268.BCM8885X=pam4:-20:148:0:0:0:0
|
||||||
|
serdes_tx_taps_269.BCM8885X=pam4:-20:148:0:0:0:0
|
||||||
|
serdes_tx_taps_270.BCM8885X=pam4:-20:148:0:0:0:0
|
||||||
|
serdes_tx_taps_271.BCM8885X=pam4:-20:148:0:0:0:0
|
||||||
|
serdes_tx_taps_272.BCM8885X=pam4:-20:148:0:0:0:0
|
||||||
|
serdes_tx_taps_273.BCM8885X=pam4:-20:148:0:0:0:0
|
||||||
|
serdes_tx_taps_274.BCM8885X=pam4:-20:148:0:0:0:0
|
||||||
|
serdes_tx_taps_275.BCM8885X=pam4:-20:148:0:0:0:0
|
||||||
|
serdes_tx_taps_276.BCM8885X=pam4:-20:148:0:0:0:0
|
||||||
|
serdes_tx_taps_277.BCM8885X=pam4:-20:148:0:0:0:0
|
||||||
|
serdes_tx_taps_278.BCM8885X=pam4:-20:148:0:0:0:0
|
||||||
|
serdes_tx_taps_279.BCM8885X=pam4:-20:148:0:0:0:0
|
||||||
|
serdes_tx_taps_280.BCM8885X=pam4:-20:148:0:0:0:0
|
||||||
|
serdes_tx_taps_281.BCM8885X=pam4:-20:148:0:0:0:0
|
||||||
|
serdes_tx_taps_282.BCM8885X=pam4:-20:148:0:0:0:0
|
||||||
|
serdes_tx_taps_283.BCM8885X=pam4:-20:148:0:0:0:0
|
||||||
|
serdes_tx_taps_284.BCM8885X=pam4:-20:148:0:0:0:0
|
||||||
|
serdes_tx_taps_285.BCM8885X=pam4:-20:148:0:0:0:0
|
||||||
|
serdes_tx_taps_286.BCM8885X=pam4:-20:148:0:0:0:0
|
||||||
|
serdes_tx_taps_287.BCM8885X=pam4:-20:148:0:0:0:0
|
||||||
|
serdes_tx_taps_288.BCM8885X=pam4:-20:148:0:0:0:0
|
||||||
|
serdes_tx_taps_289.BCM8885X=pam4:-20:148:0:0:0:0
|
||||||
|
serdes_tx_taps_290.BCM8885X=pam4:-20:148:0:0:0:0
|
||||||
|
serdes_tx_taps_291.BCM8885X=pam4:-20:148:0:0:0:0
|
||||||
|
serdes_tx_taps_292.BCM8885X=pam4:-20:148:0:0:0:0
|
||||||
|
serdes_tx_taps_293.BCM8885X=pam4:-20:148:0:0:0:0
|
||||||
|
serdes_tx_taps_294.BCM8885X=pam4:-20:148:0:0:0:0
|
||||||
|
serdes_tx_taps_295.BCM8885X=pam4:-20:148:0:0:0:0
|
||||||
|
serdes_tx_taps_296.BCM8885X=pam4:-20:148:0:0:0:0
|
||||||
|
serdes_tx_taps_297.BCM8885X=pam4:-20:148:0:0:0:0
|
||||||
|
serdes_tx_taps_298.BCM8885X=pam4:-20:148:0:0:0:0
|
||||||
|
serdes_tx_taps_299.BCM8885X=pam4:-20:148:0:0:0:0
|
||||||
|
serdes_tx_taps_300.BCM8885X=pam4:-20:148:0:0:0:0
|
||||||
|
serdes_tx_taps_301.BCM8885X=pam4:-20:148:0:0:0:0
|
||||||
|
serdes_tx_taps_302.BCM8885X=pam4:-20:148:0:0:0:0
|
||||||
|
serdes_tx_taps_303.BCM8885X=pam4:-20:148:0:0:0:0
|
||||||
|
serdes_tx_taps_304.BCM8885X=pam4:-20:148:0:0:0:0
|
||||||
|
serdes_tx_taps_305.BCM8885X=pam4:-20:148:0:0:0:0
|
||||||
|
serdes_tx_taps_306.BCM8885X=pam4:-20:148:0:0:0:0
|
||||||
|
serdes_tx_taps_307.BCM8885X=pam4:-20:148:0:0:0:0
|
||||||
|
serdes_tx_taps_308.BCM8885X=pam4:-20:148:0:0:0:0
|
||||||
|
serdes_tx_taps_309.BCM8885X=pam4:-20:148:0:0:0:0
|
||||||
|
serdes_tx_taps_310.BCM8885X=pam4:-20:148:0:0:0:0
|
||||||
|
serdes_tx_taps_311.BCM8885X=pam4:-20:148:0:0:0:0
|
||||||
|
serdes_tx_taps_312.BCM8885X=pam4:-20:148:0:0:0:0
|
||||||
|
serdes_tx_taps_313.BCM8885X=pam4:-20:148:0:0:0:0
|
||||||
|
serdes_tx_taps_314.BCM8885X=pam4:-20:148:0:0:0:0
|
||||||
|
serdes_tx_taps_315.BCM8885X=pam4:-20:148:0:0:0:0
|
||||||
|
serdes_tx_taps_316.BCM8885X=pam4:-20:148:0:0:0:0
|
||||||
|
serdes_tx_taps_317.BCM8885X=pam4:-20:148:0:0:0:0
|
||||||
|
serdes_tx_taps_318.BCM8885X=pam4:-20:148:0:0:0:0
|
||||||
|
serdes_tx_taps_319.BCM8885X=pam4:-20:148:0:0:0:0
|
||||||
|
serdes_tx_taps_320.BCM8885X=pam4:-20:148:0:0:0:0
|
||||||
|
serdes_tx_taps_321.BCM8885X=pam4:-20:148:0:0:0:0
|
||||||
|
serdes_tx_taps_322.BCM8885X=pam4:-20:148:0:0:0:0
|
||||||
|
serdes_tx_taps_323.BCM8885X=pam4:-20:148:0:0:0:0
|
||||||
|
serdes_tx_taps_324.BCM8885X=pam4:-20:148:0:0:0:0
|
||||||
|
serdes_tx_taps_325.BCM8885X=pam4:-20:148:0:0:0:0
|
||||||
|
serdes_tx_taps_326.BCM8885X=pam4:-20:148:0:0:0:0
|
||||||
|
serdes_tx_taps_327.BCM8885X=pam4:-20:148:0:0:0:0
|
||||||
|
serdes_tx_taps_328.BCM8885X=pam4:-20:148:0:0:0:0
|
||||||
|
serdes_tx_taps_329.BCM8885X=pam4:-20:148:0:0:0:0
|
||||||
|
serdes_tx_taps_330.BCM8885X=pam4:-20:148:0:0:0:0
|
||||||
|
serdes_tx_taps_331.BCM8885X=pam4:-20:148:0:0:0:0
|
||||||
|
serdes_tx_taps_332.BCM8885X=pam4:-20:148:0:0:0:0
|
||||||
|
serdes_tx_taps_333.BCM8885X=pam4:-20:148:0:0:0:0
|
||||||
|
serdes_tx_taps_334.BCM8885X=pam4:-20:148:0:0:0:0
|
||||||
|
serdes_tx_taps_335.BCM8885X=pam4:-20:148:0:0:0:0
|
||||||
|
serdes_tx_taps_336.BCM8885X=pam4:-20:148:0:0:0:0
|
||||||
|
serdes_tx_taps_337.BCM8885X=pam4:-20:148:0:0:0:0
|
||||||
|
serdes_tx_taps_338.BCM8885X=pam4:-20:148:0:0:0:0
|
||||||
|
serdes_tx_taps_339.BCM8885X=pam4:-20:148:0:0:0:0
|
||||||
|
serdes_tx_taps_340.BCM8885X=pam4:-20:148:0:0:0:0
|
||||||
|
serdes_tx_taps_341.BCM8885X=pam4:-20:148:0:0:0:0
|
||||||
|
serdes_tx_taps_342.BCM8885X=pam4:-20:148:0:0:0:0
|
||||||
|
serdes_tx_taps_343.BCM8885X=pam4:-20:148:0:0:0:0
|
||||||
|
serdes_tx_taps_344.BCM8885X=pam4:-20:148:0:0:0:0
|
||||||
|
serdes_tx_taps_345.BCM8885X=pam4:-20:148:0:0:0:0
|
||||||
|
serdes_tx_taps_346.BCM8885X=pam4:-20:148:0:0:0:0
|
||||||
|
serdes_tx_taps_347.BCM8885X=pam4:-20:148:0:0:0:0
|
||||||
|
serdes_tx_taps_348.BCM8885X=pam4:-20:148:0:0:0:0
|
||||||
|
serdes_tx_taps_349.BCM8885X=pam4:-20:148:0:0:0:0
|
||||||
|
serdes_tx_taps_350.BCM8885X=pam4:-20:148:0:0:0:0
|
||||||
|
serdes_tx_taps_351.BCM8885X=pam4:-20:148:0:0:0:0
|
||||||
|
serdes_tx_taps_352.BCM8885X=pam4:-20:148:0:0:0:0
|
||||||
|
serdes_tx_taps_353.BCM8885X=pam4:-20:148:0:0:0:0
|
||||||
|
serdes_tx_taps_354.BCM8885X=pam4:-20:148:0:0:0:0
|
||||||
|
serdes_tx_taps_355.BCM8885X=pam4:-20:148:0:0:0:0
|
||||||
|
serdes_tx_taps_356.BCM8885X=pam4:-20:148:0:0:0:0
|
||||||
|
serdes_tx_taps_357.BCM8885X=pam4:-20:148:0:0:0:0
|
||||||
|
serdes_tx_taps_358.BCM8885X=pam4:-20:148:0:0:0:0
|
||||||
|
serdes_tx_taps_359.BCM8885X=pam4:-20:148:0:0:0:0
|
||||||
|
serdes_tx_taps_360.BCM8885X=pam4:-20:148:0:0:0:0
|
||||||
|
serdes_tx_taps_361.BCM8885X=pam4:-20:148:0:0:0:0
|
||||||
|
serdes_tx_taps_362.BCM8885X=pam4:-20:148:0:0:0:0
|
||||||
|
serdes_tx_taps_363.BCM8885X=pam4:-20:148:0:0:0:0
|
||||||
|
serdes_tx_taps_364.BCM8885X=pam4:-20:148:0:0:0:0
|
||||||
|
serdes_tx_taps_365.BCM8885X=pam4:-20:148:0:0:0:0
|
||||||
|
serdes_tx_taps_366.BCM8885X=pam4:-20:148:0:0:0:0
|
||||||
|
serdes_tx_taps_367.BCM8885X=pam4:-20:148:0:0:0:0
|
||||||
|
serdes_tx_taps_368.BCM8885X=pam4:-20:148:0:0:0:0
|
||||||
|
serdes_tx_taps_369.BCM8885X=pam4:-20:148:0:0:0:0
|
||||||
|
serdes_tx_taps_370.BCM8885X=pam4:-20:148:0:0:0:0
|
||||||
|
serdes_tx_taps_371.BCM8885X=pam4:-20:148:0:0:0:0
|
||||||
|
serdes_tx_taps_372.BCM8885X=pam4:-20:148:0:0:0:0
|
||||||
|
serdes_tx_taps_373.BCM8885X=pam4:-20:148:0:0:0:0
|
||||||
|
serdes_tx_taps_374.BCM8885X=pam4:-20:148:0:0:0:0
|
||||||
|
serdes_tx_taps_375.BCM8885X=pam4:-20:148:0:0:0:0
|
||||||
|
serdes_tx_taps_376.BCM8885X=pam4:-20:148:0:0:0:0
|
||||||
|
serdes_tx_taps_377.BCM8885X=pam4:-20:148:0:0:0:0
|
||||||
|
serdes_tx_taps_378.BCM8885X=pam4:-20:148:0:0:0:0
|
||||||
|
serdes_tx_taps_379.BCM8885X=pam4:-20:148:0:0:0:0
|
||||||
|
serdes_tx_taps_380.BCM8885X=pam4:-20:148:0:0:0:0
|
||||||
|
serdes_tx_taps_381.BCM8885X=pam4:-20:148:0:0:0:0
|
||||||
|
serdes_tx_taps_382.BCM8885X=pam4:-20:148:0:0:0:0
|
||||||
|
serdes_tx_taps_383.BCM8885X=pam4:-20:148:0:0:0:0
|
||||||
|
serdes_tx_taps_384.BCM8885X=pam4:-20:148:0:0:0:0
|
||||||
|
serdes_tx_taps_385.BCM8885X=pam4:-20:148:0:0:0:0
|
||||||
|
serdes_tx_taps_386.BCM8885X=pam4:-20:148:0:0:0:0
|
||||||
|
serdes_tx_taps_387.BCM8885X=pam4:-20:148:0:0:0:0
|
||||||
|
serdes_tx_taps_388.BCM8885X=pam4:-20:148:0:0:0:0
|
||||||
|
serdes_tx_taps_389.BCM8885X=pam4:-20:148:0:0:0:0
|
||||||
|
serdes_tx_taps_390.BCM8885X=pam4:-20:148:0:0:0:0
|
||||||
|
serdes_tx_taps_391.BCM8885X=pam4:-20:148:0:0:0:0
|
||||||
|
serdes_tx_taps_392.BCM8885X=pam4:-20:148:0:0:0:0
|
||||||
|
serdes_tx_taps_393.BCM8885X=pam4:-20:148:0:0:0:0
|
||||||
|
serdes_tx_taps_394.BCM8885X=pam4:-20:148:0:0:0:0
|
||||||
|
serdes_tx_taps_395.BCM8885X=pam4:-20:148:0:0:0:0
|
||||||
|
serdes_tx_taps_396.BCM8885X=pam4:-20:148:0:0:0:0
|
||||||
|
serdes_tx_taps_397.BCM8885X=pam4:-20:148:0:0:0:0
|
||||||
|
serdes_tx_taps_398.BCM8885X=pam4:-20:148:0:0:0:0
|
||||||
|
serdes_tx_taps_399.BCM8885X=pam4:-20:148:0:0:0:0
|
||||||
|
serdes_tx_taps_400.BCM8885X=pam4:-20:148:0:0:0:0
|
||||||
|
serdes_tx_taps_401.BCM8885X=pam4:-20:148:0:0:0:0
|
||||||
|
serdes_tx_taps_402.BCM8885X=pam4:-20:148:0:0:0:0
|
||||||
|
serdes_tx_taps_403.BCM8885X=pam4:-20:148:0:0:0:0
|
||||||
|
serdes_tx_taps_404.BCM8885X=pam4:-20:148:0:0:0:0
|
||||||
|
serdes_tx_taps_405.BCM8885X=pam4:-20:148:0:0:0:0
|
||||||
|
serdes_tx_taps_406.BCM8885X=pam4:-20:148:0:0:0:0
|
||||||
|
serdes_tx_taps_407.BCM8885X=pam4:-20:148:0:0:0:0
|
||||||
|
serdes_tx_taps_408.BCM8885X=pam4:-20:148:0:0:0:0
|
||||||
|
serdes_tx_taps_409.BCM8885X=pam4:-20:148:0:0:0:0
|
||||||
|
serdes_tx_taps_410.BCM8885X=pam4:-20:148:0:0:0:0
|
||||||
|
serdes_tx_taps_411.BCM8885X=pam4:-20:148:0:0:0:0
|
||||||
|
serdes_tx_taps_412.BCM8885X=pam4:-20:148:0:0:0:0
|
||||||
|
serdes_tx_taps_413.BCM8885X=pam4:-20:148:0:0:0:0
|
||||||
|
serdes_tx_taps_414.BCM8885X=pam4:-20:148:0:0:0:0
|
||||||
|
serdes_tx_taps_415.BCM8885X=pam4:-20:148:0:0:0:0
|
||||||
|
serdes_tx_taps_416.BCM8885X=pam4:-20:148:0:0:0:0
|
||||||
|
serdes_tx_taps_417.BCM8885X=pam4:-20:148:0:0:0:0
|
||||||
|
serdes_tx_taps_418.BCM8885X=pam4:-20:148:0:0:0:0
|
||||||
|
serdes_tx_taps_419.BCM8885X=pam4:-20:148:0:0:0:0
|
||||||
|
serdes_tx_taps_420.BCM8885X=pam4:-20:148:0:0:0:0
|
||||||
|
serdes_tx_taps_421.BCM8885X=pam4:-20:148:0:0:0:0
|
||||||
|
serdes_tx_taps_422.BCM8885X=pam4:-20:148:0:0:0:0
|
||||||
|
serdes_tx_taps_423.BCM8885X=pam4:-20:148:0:0:0:0
|
||||||
|
serdes_tx_taps_424.BCM8885X=pam4:-20:148:0:0:0:0
|
||||||
|
serdes_tx_taps_425.BCM8885X=pam4:-20:148:0:0:0:0
|
||||||
|
serdes_tx_taps_426.BCM8885X=pam4:-20:148:0:0:0:0
|
||||||
|
serdes_tx_taps_427.BCM8885X=pam4:-20:148:0:0:0:0
|
||||||
|
serdes_tx_taps_428.BCM8885X=pam4:-20:148:0:0:0:0
|
||||||
|
serdes_tx_taps_429.BCM8885X=pam4:-20:148:0:0:0:0
|
||||||
|
serdes_tx_taps_430.BCM8885X=pam4:-20:148:0:0:0:0
|
||||||
|
serdes_tx_taps_431.BCM8885X=pam4:-20:148:0:0:0:0
|
||||||
|
serdes_tx_taps_432.BCM8885X=pam4:-20:148:0:0:0:0
|
||||||
|
serdes_tx_taps_433.BCM8885X=pam4:-20:148:0:0:0:0
|
||||||
|
serdes_tx_taps_434.BCM8885X=pam4:-20:148:0:0:0:0
|
||||||
|
serdes_tx_taps_435.BCM8885X=pam4:-20:148:0:0:0:0
|
||||||
|
serdes_tx_taps_436.BCM8885X=pam4:-20:148:0:0:0:0
|
||||||
|
serdes_tx_taps_437.BCM8885X=pam4:-20:148:0:0:0:0
|
||||||
|
serdes_tx_taps_438.BCM8885X=pam4:-20:148:0:0:0:0
|
||||||
|
serdes_tx_taps_439.BCM8885X=pam4:-20:148:0:0:0:0
|
||||||
|
serdes_tx_taps_440.BCM8885X=pam4:-20:148:0:0:0:0
|
||||||
|
serdes_tx_taps_441.BCM8885X=pam4:-20:148:0:0:0:0
|
||||||
|
serdes_tx_taps_442.BCM8885X=pam4:-20:148:0:0:0:0
|
||||||
|
serdes_tx_taps_443.BCM8885X=pam4:-20:148:0:0:0:0
|
||||||
|
serdes_tx_taps_444.BCM8885X=pam4:-20:148:0:0:0:0
|
||||||
|
serdes_tx_taps_445.BCM8885X=pam4:-20:148:0:0:0:0
|
||||||
|
serdes_tx_taps_446.BCM8885X=pam4:-20:148:0:0:0:0
|
||||||
|
serdes_tx_taps_447.BCM8885X=pam4:-20:148:0:0:0:0
|
||||||
|
|
||||||
|
|
||||||
serdes_lane_config_channel_mode_256=force_nr
|
serdes_lane_config_channel_mode_256=force_nr
|
||||||
serdes_lane_config_channel_mode_257=force_nr
|
serdes_lane_config_channel_mode_257=force_nr
|
||||||
@ -1775,6 +2043,8 @@ serdes_lane_config_channel_mode_445=force_nr
|
|||||||
serdes_lane_config_channel_mode_446=force_nr
|
serdes_lane_config_channel_mode_446=force_nr
|
||||||
serdes_lane_config_channel_mode_447=force_nr
|
serdes_lane_config_channel_mode_447=force_nr
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
rif_id_max=24576
|
rif_id_max=24576
|
||||||
dpp_db_path=/usr/share/bcm/db
|
dpp_db_path=/usr/share/bcm/db
|
||||||
sai_recycle_port_lane_base=96
|
sai_recycle_port_lane_base=96
|
||||||
|
@ -0,0 +1,6 @@
|
|||||||
|
phy set 8 reg=0xd134 data=-8 lane=1
|
||||||
|
phy set 8 reg=0xd135 data=132 lane=1
|
||||||
|
phy set 8 reg=0xd136 data=-8 lane=1
|
||||||
|
phy set 8 reg=0xd137 data=0 lane=1
|
||||||
|
phy set 8 reg=0xd138 data=0 lane=1
|
||||||
|
phy set 8 reg=0xd133 data=0x1802 lane=1
|
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
Loading…
Reference in New Issue
Block a user