diff --git a/device/arista/x86_64-arista_7060dx5_32/Arista-7060DX5-32/BALANCED b/device/arista/x86_64-arista_7060dx5_32/Arista-7060DX5-32/BALANCED new file mode 120000 index 0000000000..2c9506a909 --- /dev/null +++ b/device/arista/x86_64-arista_7060dx5_32/Arista-7060DX5-32/BALANCED @@ -0,0 +1 @@ +../../../common/profiles/th4/gen/BALANCED \ No newline at end of file diff --git a/device/arista/x86_64-arista_7060dx5_32/Arista-7060DX5-32/buffers.json.j2 b/device/arista/x86_64-arista_7060dx5_32/Arista-7060DX5-32/buffers.json.j2 new file mode 100644 index 0000000000..0b1cb2c541 --- /dev/null +++ b/device/arista/x86_64-arista_7060dx5_32/Arista-7060DX5-32/buffers.json.j2 @@ -0,0 +1,2 @@ +{%- set default_topo = 't1' %} +{%- include 'buffers_config.j2' %} diff --git a/device/arista/x86_64-arista_7060dx5_32/Arista-7060DX5-32/buffers_defaults_t0.j2 b/device/arista/x86_64-arista_7060dx5_32/Arista-7060DX5-32/buffers_defaults_t0.j2 new file mode 120000 index 0000000000..9524e6a476 --- /dev/null +++ b/device/arista/x86_64-arista_7060dx5_32/Arista-7060DX5-32/buffers_defaults_t0.j2 @@ -0,0 +1 @@ +BALANCED/buffers_defaults_t0.j2 \ No newline at end of file diff --git a/device/arista/x86_64-arista_7060dx5_32/Arista-7060DX5-32/buffers_defaults_t1.j2 b/device/arista/x86_64-arista_7060dx5_32/Arista-7060DX5-32/buffers_defaults_t1.j2 new file mode 120000 index 0000000000..c25cc95d6d --- /dev/null +++ b/device/arista/x86_64-arista_7060dx5_32/Arista-7060DX5-32/buffers_defaults_t1.j2 @@ -0,0 +1 @@ +BALANCED/buffers_defaults_t1.j2 \ No newline at end of file diff --git a/device/arista/x86_64-arista_7060dx5_32/Arista-7060DX5-32/hwsku.json b/device/arista/x86_64-arista_7060dx5_32/Arista-7060DX5-32/hwsku.json new file mode 100644 index 0000000000..46936732aa --- /dev/null +++ b/device/arista/x86_64-arista_7060dx5_32/Arista-7060DX5-32/hwsku.json @@ -0,0 +1,104 @@ +{ + "interfaces": { + "Ethernet0": { + "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G]" + }, + "Ethernet8": { + "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G]" + }, + "Ethernet16": { + "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G]" + }, + "Ethernet24": { + "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G]" + }, + "Ethernet32": { + "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G]" + }, + "Ethernet40": { + "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G]" + }, + "Ethernet48": { + "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G]" + }, + "Ethernet56": { + "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G]" + }, + "Ethernet64": { + "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G]" + }, + "Ethernet72": { + "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G]" + }, + "Ethernet80": { + "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G]" + }, + "Ethernet88": { + "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G]" + }, + "Ethernet96": { + "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G]" + }, + "Ethernet104": { + "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G]" + }, + "Ethernet112": { + "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G]" + }, + "Ethernet120": { + "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G]" + }, + "Ethernet128": { + "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G]" + }, + "Ethernet136": { + "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G]" + }, + "Ethernet144": { + "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G]" + }, + "Ethernet152": { + "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G]" + }, + "Ethernet160": { + "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G]" + }, + "Ethernet168": { + "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G]" + }, + "Ethernet176": { + "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G]" + }, + "Ethernet184": { + "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G]" + }, + "Ethernet192": { + "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G]" + }, + "Ethernet200": { + "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G]" + }, + "Ethernet208": { + "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G]" + }, + "Ethernet216": { + "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G]" + }, + "Ethernet224": { + "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G]" + }, + "Ethernet232": { + "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G]" + }, + "Ethernet240": { + "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G]" + }, + "Ethernet248": { + "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G]" + }, + "Ethernet256": { + "default_brkout_mode": "1x10G", + "fec": "none" + } + } +} diff --git a/device/arista/x86_64-arista_7060dx5_32/Arista-7060DX5-32/pg_profile_lookup.ini b/device/arista/x86_64-arista_7060dx5_32/Arista-7060DX5-32/pg_profile_lookup.ini new file mode 120000 index 0000000000..297cddb2d2 --- /dev/null +++ b/device/arista/x86_64-arista_7060dx5_32/Arista-7060DX5-32/pg_profile_lookup.ini @@ -0,0 +1 @@ +BALANCED/pg_profile_lookup.ini \ No newline at end of file diff --git a/device/arista/x86_64-arista_7060dx5_32/Arista-7060DX5-32/port_config.ini b/device/arista/x86_64-arista_7060dx5_32/Arista-7060DX5-32/port_config.ini new file mode 100644 index 0000000000..9e4a4a6e91 --- /dev/null +++ b/device/arista/x86_64-arista_7060dx5_32/Arista-7060DX5-32/port_config.ini @@ -0,0 +1,34 @@ +# name lanes alias index speed fec +Ethernet0 1,2,3,4,5,6,7,8 Ethernet1/1 1 400000 rs +Ethernet8 9,10,11,12,13,14,15,16 Ethernet2/1 2 400000 rs +Ethernet16 17,18,19,20,21,22,23,24 Ethernet3/1 3 400000 rs +Ethernet24 25,26,27,28,29,30,31,32 Ethernet4/1 4 400000 rs +Ethernet32 33,34,35,36,37,38,39,40 Ethernet5/1 5 400000 rs +Ethernet40 41,42,43,44,45,46,47,48 Ethernet6/1 6 400000 rs +Ethernet48 49,50,51,52,53,54,55,56 Ethernet7/1 7 400000 rs +Ethernet56 57,58,59,60,61,62,63,64 Ethernet8/1 8 400000 rs +Ethernet64 65,66,67,68,69,70,71,72 Ethernet9/1 9 400000 rs +Ethernet72 73,74,75,76,77,78,79,80 Ethernet10/1 10 400000 rs +Ethernet80 81,82,83,84,85,86,87,88 Ethernet11/1 11 400000 rs +Ethernet88 89,90,91,92,93,94,95,96 Ethernet12/1 12 400000 rs +Ethernet96 97,98,99,100,101,102,103,104 Ethernet13/1 13 400000 rs +Ethernet104 105,106,107,108,109,110,111,112 Ethernet14/1 14 400000 rs +Ethernet112 113,114,115,116,117,118,119,120 Ethernet15/1 15 400000 rs +Ethernet120 121,122,123,124,125,126,127,128 Ethernet16/1 16 400000 rs +Ethernet128 385,386,387,388,389,390,391,392 Ethernet17/1 17 400000 rs +Ethernet136 393,394,395,396,397,398,399,400 Ethernet18/1 18 400000 rs +Ethernet144 401,402,403,404,405,406,407,408 Ethernet19/1 19 400000 rs +Ethernet152 409,410,411,412,413,414,415,416 Ethernet20/1 20 400000 rs +Ethernet160 417,418,419,420,421,422,423,424 Ethernet21/1 21 400000 rs +Ethernet168 425,426,427,428,429,430,431,432 Ethernet22/1 22 400000 rs +Ethernet176 433,434,435,436,437,438,439,440 Ethernet23/1 23 400000 rs +Ethernet184 441,442,443,444,445,446,447,448 Ethernet24/1 24 400000 rs +Ethernet192 449,450,451,452,453,454,455,456 Ethernet25/1 25 400000 rs +Ethernet200 457,458,459,460,461,462,463,464 Ethernet26/1 26 400000 rs +Ethernet208 465,466,467,468,469,470,471,472 Ethernet27/1 27 400000 rs +Ethernet216 473,474,475,476,477,478,479,480 Ethernet28/1 28 400000 rs +Ethernet224 481,482,483,484,485,486,487,488 Ethernet29/1 29 400000 rs +Ethernet232 489,490,491,492,493,494,495,496 Ethernet30/1 30 400000 rs +Ethernet240 497,498,499,500,501,502,503,504 Ethernet31/1 31 400000 rs +Ethernet248 505,506,507,508,509,510,511,512 Ethernet32/1 32 400000 rs +Ethernet256 513 Ethernet33 33 10000 none diff --git a/device/arista/x86_64-arista_7060dx5_32/Arista-7060DX5-32/qos.json.j2 b/device/arista/x86_64-arista_7060dx5_32/Arista-7060DX5-32/qos.json.j2 new file mode 100644 index 0000000000..3e548325ea --- /dev/null +++ b/device/arista/x86_64-arista_7060dx5_32/Arista-7060DX5-32/qos.json.j2 @@ -0,0 +1 @@ +{%- include 'qos_config.j2' %} diff --git a/device/arista/x86_64-arista_7060dx5_32/Arista-7060DX5-32/sai.profile b/device/arista/x86_64-arista_7060dx5_32/Arista-7060DX5-32/sai.profile new file mode 100644 index 0000000000..ee4438ef39 --- /dev/null +++ b/device/arista/x86_64-arista_7060dx5_32/Arista-7060DX5-32/sai.profile @@ -0,0 +1 @@ +SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/th4-a7060dx5-32.config.bcm diff --git a/device/arista/x86_64-arista_7060dx5_32/Arista-7060DX5-32/th4-a7060dx5-32.config.bcm b/device/arista/x86_64-arista_7060dx5_32/Arista-7060DX5-32/th4-a7060dx5-32.config.bcm new file mode 100644 index 0000000000..f61168ea5d --- /dev/null +++ b/device/arista/x86_64-arista_7060dx5_32/Arista-7060DX5-32/th4-a7060dx5-32.config.bcm @@ -0,0 +1,1643 @@ +# $Copyright: Broadcom Ltd.$ +# +# BCM56990 64x400g port configuration. +# +# configuration yaml file +# device: +# : +# : +# ? +# : +# : +# ... +# : +# : +# : +# : +# ... +# : +# + +--- +bcm_device: + 0: + global: + pktio_mode: 1 + vlan_flooding_l2mc_num_reserved: 0 + ipv6_lpm_128b_enable: 1 + shared_block_mask_section: uc_bc + skip_protocol_default_entries: 1 + # LTSW uses value 1 for ALPM combined mode + l3_alpm_template: 1 + l3_alpm_hit_skip: 1 + sai_feat_tail_timestamp : 1 + sai_field_group_auto_prioritize: 1 + #l3_intf_vlan_split_egress for MTU at L3IF + l3_intf_vlan_split_egress : 1 + + # vxlan + l3_alpm_template: 1 + riot_overlay_l3_egress_mem_size: 16384 + riot_overlay_l3_intf_mem_size: 4096 + l3_ecmp_member_first_lkup_mem_size: 12288 + bcm_tunnel_term_compatible_mode: 1 + shared_l2_tunnel: 1 + sai_tunnel_support: 10 + sai_tunnel_underlay_route_mode: 2 + sai_tunnel_ecmp_sharing_mode: 0 # change to 2 if SAI_NEXT_HOP_GROUP_ATTR_LEVEL_1 used + + # bfd + bfd_enable: 1 + bfd_sha1_keys: 5 + bfd_num_sessions: 2048 + bfd_simple_password_keys: 5 + num_queues_pci: 47 + num_queues_uc0: 1 + bfd_feature_enable: 1 + bfd_use_endpoint_id_as_discriminator: 1 + bfd_tx_raw_ingress_enable: 1 + sai_eapp_config_file: "/usr/share/sonic/device/x86_64-broadcom_common/eapps/eapp_config.json" +--- +device: + 0: + PC_SERDES_CONFIG: + PKG_SWAP_BYPASS: 1 + + PC_PM_CORE: + ? + PC_PM_ID: 1 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x67235401 + TX_LANE_MAP: 0x2731465 + RX_POLARITY_FLIP: 0x00 + TX_POLARITY_FLIP: 0x00 + ? + PC_PM_ID: 2 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x31752064 + TX_LANE_MAP: 0x76025314 + RX_POLARITY_FLIP: 0xff + TX_POLARITY_FLIP: 0xff + ? + PC_PM_ID: 3 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x67241503 + TX_LANE_MAP: 0x13650274 + RX_POLARITY_FLIP: 0x00 + TX_POLARITY_FLIP: 0x01 + ? + PC_PM_ID: 4 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x46025713 + TX_LANE_MAP: 0x31650274 + RX_POLARITY_FLIP: 0x00 + TX_POLARITY_FLIP: 0x00 + ? + PC_PM_ID: 5 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x62713054 + TX_LANE_MAP: 0x21703465 + RX_POLARITY_FLIP: 0x00 + TX_POLARITY_FLIP: 0xd8 + ? + PC_PM_ID: 6 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x13460257 + TX_LANE_MAP: 0x64137502 + RX_POLARITY_FLIP: 0xff + TX_POLARITY_FLIP: 0xff + ? + PC_PM_ID: 7 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x43512670 + TX_LANE_MAP: 0x2571364 + RX_POLARITY_FLIP: 0x00 + TX_POLARITY_FLIP: 0x00 + ? + PC_PM_ID: 8 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x14270356 + TX_LANE_MAP: 0x64237501 + RX_POLARITY_FLIP: 0xfb + TX_POLARITY_FLIP: 0xff + ? + PC_PM_ID: 9 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x76140235 + TX_LANE_MAP: 0x74036521 + RX_POLARITY_FLIP: 0xc1 + TX_POLARITY_FLIP: 0x00 + ? + PC_PM_ID: 10 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x47125603 + TX_LANE_MAP: 0x30451276 + RX_POLARITY_FLIP: 0xff + TX_POLARITY_FLIP: 0xff + ? + PC_PM_ID: 11 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x76041235 + TX_LANE_MAP: 0x74036512 + RX_POLARITY_FLIP: 0x40 + TX_POLARITY_FLIP: 0x00 + ? + PC_PM_ID: 12 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x27145603 + TX_LANE_MAP: 0x21450376 + RX_POLARITY_FLIP: 0xff + TX_POLARITY_FLIP: 0xff + ? + PC_PM_ID: 13 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x2735146 + TX_LANE_MAP: 0x3657421 + RX_POLARITY_FLIP: 0x00 + TX_POLARITY_FLIP: 0xc8 + ? + PC_PM_ID: 14 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x47306521 + TX_LANE_MAP: 0x12643075 + RX_POLARITY_FLIP: 0xff + TX_POLARITY_FLIP: 0x33 + ? + PC_PM_ID: 15 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x20157436 + TX_LANE_MAP: 0x56237104 + RX_POLARITY_FLIP: 0x08 + TX_POLARITY_FLIP: 0x00 + ? + PC_PM_ID: 16 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x14270356 + TX_LANE_MAP: 0x76325014 + RX_POLARITY_FLIP: 0xff + TX_POLARITY_FLIP: 0xff + ? + PC_PM_ID: 49 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x56704312 + TX_LANE_MAP: 0x32641570 + RX_POLARITY_FLIP: 0xff + TX_POLARITY_FLIP: 0xff + ? + PC_PM_ID: 50 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x21564073 + TX_LANE_MAP: 0x50314762 + RX_POLARITY_FLIP: 0x00 + TX_POLARITY_FLIP: 0x00 + ? + PC_PM_ID: 51 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x36715402 + TX_LANE_MAP: 0x32641075 + RX_POLARITY_FLIP: 0xff + TX_POLARITY_FLIP: 0xff + ? + PC_PM_ID: 52 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x51462073 + TX_LANE_MAP: 0x5127634 + RX_POLARITY_FLIP: 0x69 + TX_POLARITY_FLIP: 0x08 + ? + PC_PM_ID: 53 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x73204651 + TX_LANE_MAP: 0x32640175 + RX_POLARITY_FLIP: 0x69 + TX_POLARITY_FLIP: 0xff + ? + PC_PM_ID: 54 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x5134627 + TX_LANE_MAP: 0x60137254 + RX_POLARITY_FLIP: 0x00 + TX_POLARITY_FLIP: 0x00 + ? + PC_PM_ID: 55 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x57420163 + TX_LANE_MAP: 0x32651074 + RX_POLARITY_FLIP: 0xff + TX_POLARITY_FLIP: 0xff + ? + PC_PM_ID: 56 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x5134627 + TX_LANE_MAP: 0x10524376 + RX_POLARITY_FLIP: 0x05 + TX_POLARITY_FLIP: 0x00 + ? + PC_PM_ID: 57 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x73520146 + TX_LANE_MAP: 0x31650274 + RX_POLARITY_FLIP: 0x3d + TX_POLARITY_FLIP: 0xff + ? + PC_PM_ID: 58 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x16072354 + TX_LANE_MAP: 0x51634270 + RX_POLARITY_FLIP: 0x01 + TX_POLARITY_FLIP: 0x00 + ? + PC_PM_ID: 59 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x72530164 + TX_LANE_MAP: 0x32506147 + RX_POLARITY_FLIP: 0xff + TX_POLARITY_FLIP: 0xff + ? + PC_PM_ID: 60 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x4371256 + TX_LANE_MAP: 0x21673054 + RX_POLARITY_FLIP: 0x00 + TX_POLARITY_FLIP: 0xcc + ? + PC_PM_ID: 61 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x67241503 + TX_LANE_MAP: 0x12730465 + RX_POLARITY_FLIP: 0x20 + TX_POLARITY_FLIP: 0x00 + ? + PC_PM_ID: 62 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x73625140 + TX_LANE_MAP: 0x12640573 + RX_POLARITY_FLIP: 0x00 + TX_POLARITY_FLIP: 0x00 + ? + PC_PM_ID: 63 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x23674015 + TX_LANE_MAP: 0x57206143 + RX_POLARITY_FLIP: 0xff + TX_POLARITY_FLIP: 0xff + ? + PC_PM_ID: 64 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x57314260 + TX_LANE_MAP: 0x1735264 + RX_POLARITY_FLIP: 0x10 + TX_POLARITY_FLIP: 0x00 +... +--- +device: + 0: + PC_PORT_PHYS_MAP: + ? + # CPU port + PORT_ID: 0 + : + PC_PHYS_PORT_ID: 0 + ? + PORT_ID: 1 + : + PC_PHYS_PORT_ID: 1 + ? + PORT_ID: 2 + : + PC_PHYS_PORT_ID: 5 + ? + PORT_ID: 3 + : + PC_PHYS_PORT_ID: 9 + ? + PORT_ID: 4 + : + PC_PHYS_PORT_ID: 13 + ? + PORT_ID: 17 + : + PC_PHYS_PORT_ID: 17 + ? + PORT_ID: 18 + : + PC_PHYS_PORT_ID: 21 + ? + PORT_ID: 19 + : + PC_PHYS_PORT_ID: 25 + ? + PORT_ID: 20 + : + PC_PHYS_PORT_ID: 29 + ? + PORT_ID: 34 + : + PC_PHYS_PORT_ID: 33 + ? + PORT_ID: 35 + : + PC_PHYS_PORT_ID: 37 + ? + PORT_ID: 36 + : + PC_PHYS_PORT_ID: 41 + ? + PORT_ID: 37 + : + PC_PHYS_PORT_ID: 45 + ? + PORT_ID: 51 + : + PC_PHYS_PORT_ID: 49 + ? + PORT_ID: 52 + : + PC_PHYS_PORT_ID: 53 + ? + PORT_ID: 53 + : + PC_PHYS_PORT_ID: 57 + ? + PORT_ID: 54 + : + PC_PHYS_PORT_ID: 61 + ? + PORT_ID: 204 + : + PC_PHYS_PORT_ID: 193 + ? + PORT_ID: 205 + : + PC_PHYS_PORT_ID: 197 + ? + PORT_ID: 206 + : + PC_PHYS_PORT_ID: 201 + ? + PORT_ID: 207 + : + PC_PHYS_PORT_ID: 205 + ? + PORT_ID: 221 + : + PC_PHYS_PORT_ID: 209 + ? + PORT_ID: 222 + : + PC_PHYS_PORT_ID: 213 + ? + PORT_ID: 223 + : + PC_PHYS_PORT_ID: 217 + ? + PORT_ID: 224 + : + PC_PHYS_PORT_ID: 221 + ? + PORT_ID: 238 + : + PC_PHYS_PORT_ID: 225 + ? + PORT_ID: 239 + : + PC_PHYS_PORT_ID: 229 + ? + PORT_ID: 240 + : + PC_PHYS_PORT_ID: 233 + ? + PORT_ID: 241 + : + PC_PHYS_PORT_ID: 237 + ? + PORT_ID: 255 + : + PC_PHYS_PORT_ID: 241 + ? + PORT_ID: 256 + : + PC_PHYS_PORT_ID: 245 + ? + PORT_ID: 257 + : + PC_PHYS_PORT_ID: 249 + ? + PORT_ID: 258 + : + PC_PHYS_PORT_ID: 253 + ? + PORT_ID: 50 + : + PC_PHYS_PORT_ID: 258 +... +--- +device: + 0: + PC_PORT: + ? + PORT_ID: 0 + : + &port_mode_10g + ENABLE: 1 + SPEED: 10000 + NUM_LANES: 1 + ? + PORT_ID: [[50, 50]] + : + ENABLE: 0 + MAX_FRAME_SIZE: 9416 + SPEED: 10000 + NUM_LANES: 1 + ? + PORT_ID: [[1, 4], + [17, 20], + [34, 37], + [51, 54], + [204, 207], + [221, 224], + [238, 241], + [255, 258]] + : + ENABLE: 0 + SPEED: 400000 + NUM_LANES: 8 + FEC_MODE: PC_FEC_RS544_2XN + MAX_FRAME_SIZE: 9416 +... +--- +device: + 0: + # Per pipe flex counter configuration + CTR_EFLEX_CONFIG: + CTR_ING_EFLEX_OPERMODE_PIPEUNIQUE: 0 + CTR_EGR_EFLEX_OPERMODE_PIPEUNIQUE: 0 + + # Per pipe flex state configuration + #FLEX_STATE_CONFIG: + # FLEX_STATE_ING_OPERMODE_PIPEUNIQUE: 0 + # FLEX_STATE_EGR_OPERMODE_PIPEUNIQUE: 1 + + # Lossy vs Lossless mode + TM_THD_CONFIG: + THRESHOLD_MODE: LOSSLESS + + # IFP mode + FP_CONFIG: + FP_ING_OPERMODE: GLOBAL_PIPE_AWARE +... +--- +device: + 0: + TM_THD_CONFIG: + SKIP_BUFFER_RESERVATION: 1 + THRESHOLD_MODE: LOSSY_AND_LOSSLESS + + TM_SCHEDULER_CONFIG: + NUM_MC_Q: NUM_MC_Q_2 +... +--- +device: + 0: + TM_ING_THD_PORT_PRI_GRP: + ? + PORT_ID: [[0,67], [204,219], [221,253],[255,271]] + TM_PRI_GRP_ID: [[0,7]] + : + MIN_GUARANTEE_CELLS: 0 + DYNAMIC_SHARED_LIMITS: 0 + SHARED_LIMIT_CELLS_STATIC: 0 + HEADROOM_LIMIT_CELLS: 0 + + TM_ING_THD_PORT_SERVICE_POOL: + ? + PORT_ID: [[0,67], [204,219], [221,253],[255,271]] + TM_ING_SERVICE_POOL_ID: [[0,3]] + : + MIN_GUARANTEE_CELLS: 0 + SHARED_LIMIT_CELLS: 0 + + TM_ING_THD_HEADROOM_POOL: + ? + BUFFER_POOL: 0 + TM_HEADROOM_POOL_ID: [[0,3]] + : + LIMIT_CELLS: 0 + + TM_THD_UC_Q: + ? + PORT_ID: [[1,67], [204,219], [221,253],[255,271]] + TM_UC_Q_ID: [[0,11]] + : + MIN_GUARANTEE_CELLS: 0 + SHARED_LIMITS: 1 + DYNAMIC_SHARED_LIMITS: 0 + SHARED_LIMIT_CELLS_STATIC: 0 + + TM_THD_MC_Q: + ? + PORT_ID: 0 + TM_MC_Q_ID: [[0,47]] + : + MIN_GUARANTEE_CELLS: 0 + ? + PORT_ID: [[1,67], [204,219], [221,253],[255,271]] + TM_MC_Q_ID: [[0,5]] + : + MIN_GUARANTEE_CELLS: 0 + SHARED_LIMITS: 1 + DYNAMIC_SHARED_LIMITS: 0 + SHARED_LIMIT_CELLS_STATIC: 0 + + TM_THD_Q_GRP: + ? + PORT_ID: [[0,67], [204,219], [221,253],[255,271]] + : + UC_Q_GRP_MIN_GUARANTEE_CELLS: 0 + MC_Q_GRP_MIN_GUARANTEE_CELLS: 0 +... +--- +device: + 0: + TM_ING_PORT: + ? + PORT_ID: [[0,67], [204,219], [221,253],[255,271]] + : + PAUSE: 0 + + TM_ING_PORT_PRI_GRP: + ? + PORT_ID: [[0,67], [204,219], [221,253],[255,271]] + TM_PRI_GRP_ID: [[0,7]] + : + PFC: 0 + LOSSLESS: 0 + ING_MIN_MODE: USE_PRI_GRP_MIN + + TM_PORT_UC_Q_TO_SERVICE_POOL: + ? + PORT_ID: [[1,67], [204,219], [221,253],[255,271]] + TM_UC_Q_ID: [[0,11]] + : + USE_QGROUP_MIN: 0 + + TM_PORT_MC_Q_TO_SERVICE_POOL: + ? + PORT_ID: 0 + TM_MC_Q_ID: [[0,47]] + : + USE_QGROUP_MIN: 0 + ? + PORT_ID: [[1,67], [204,219], [221,253],[255,271]] + TM_MC_Q_ID: [[0,5]] + : + USE_QGROUP_MIN: 0 +... +--- +device: + 0: + TM_ING_THD_HEADROOM_POOL: + ? + BUFFER_POOL: 0 + TM_HEADROOM_POOL_ID: [[0,3]] + : + LIMIT_CELLS: 0 + + TM_ING_THD_SERVICE_POOL: + ? + BUFFER_POOL: 0 + TM_ING_SERVICE_POOL_ID: [[0,3]] + : + SHARED_LIMIT_CELLS: 0 + SHARED_RESUME_OFFSET_CELLS: 0 + COLOR_SPECIFIC_LIMITS: 0 + + TM_EGR_THD_SERVICE_POOL: + ? + BUFFER_POOL: 0 + TM_EGR_SERVICE_POOL_ID: [[0,3]] + : + SHARED_LIMIT_CELLS: 0 + SHARED_RESUME_LIMIT_CELLS: 0 + COLOR_SPECIFIC_LIMITS: 0 + YELLOW_SHARED_LIMIT_CELLS: 0 + YELLOW_SHARED_RESUME_LIMIT_CELLS: 0 + RED_SHARED_LIMIT_CELLS: 0 + RED_SHARED_RESUME_LIMIT_CELLS: 0 + + TM_THD_MC_EGR_SERVICE_POOL: + ? + BUFFER_POOL: 0 + TM_EGR_SERVICE_POOL_ID: [[0,3]] + : + SHARED_LIMIT_CELLS: 0 + SHARED_RESUME_LIMIT_CELLS: 0 + COLOR_SPECIFIC_LIMITS: 0 + YELLOW_SHARED_LIMIT_CELLS: 0 + YELLOW_SHARED_RESUME_LIMIT_CELLS: 0 + RED_SHARED_LIMIT_CELLS: 0 + RED_SHARED_RESUME_LIMIT_CELLS: 0 +... + +### Mapping +--- +device: + 0: + TM_ING_UC_ING_PRI_MAP: + ? + # Profile 1 + TM_ING_UC_ING_PRI_MAP_ID: 1 + ING_PRI: [0, 1, 2, 5, 6, [8,15]] + : + TM_PRI_GRP_ID: 0 + ? + TM_ING_UC_ING_PRI_MAP_ID: 1 + ING_PRI: 3 + : + TM_PRI_GRP_ID: 3 + ? + TM_ING_UC_ING_PRI_MAP_ID: 1 + ING_PRI: 4 + : + TM_PRI_GRP_ID: 4 + ? + TM_ING_UC_ING_PRI_MAP_ID: 1 + ING_PRI: 7 + : + TM_PRI_GRP_ID: 7 + ? + # Profile 2 + TM_ING_UC_ING_PRI_MAP_ID: 1 + ING_PRI: [0, 1, 5, [8,15]] + : + TM_PRI_GRP_ID: 0 + ? + TM_ING_UC_ING_PRI_MAP_ID: 2 + ING_PRI: 2 + : + TM_PRI_GRP_ID: 2 + ? + TM_ING_UC_ING_PRI_MAP_ID: 2 + ING_PRI: 3 + : + TM_PRI_GRP_ID: 3 + ? + TM_ING_UC_ING_PRI_MAP_ID: 2 + ING_PRI: 4 + : + TM_PRI_GRP_ID: 4 + ? + TM_ING_UC_ING_PRI_MAP_ID: 2 + ING_PRI: 6 + : + TM_PRI_GRP_ID: 6 + ? + TM_ING_UC_ING_PRI_MAP_ID: 2 + ING_PRI: 7 + : + TM_PRI_GRP_ID: 7 + ? + # Profile 3 + TM_ING_UC_ING_PRI_MAP_ID: 3 + ING_PRI: [[0,15]] + : + TM_PRI_GRP_ID: 7 + + TM_ING_NONUC_ING_PRI_MAP: + ? + # Profile 1 + TM_ING_NONUC_ING_PRI_MAP_ID: 1 + ING_PRI: [0, 1, 2, 5, 6, [8,15]] + : + TM_PRI_GRP_ID: 0 + ? + TM_ING_NONUC_ING_PRI_MAP_ID: 1 + ING_PRI: 3 + : + TM_PRI_GRP_ID: 3 + ? + TM_ING_NONUC_ING_PRI_MAP_ID: 1 + ING_PRI: 4 + : + TM_PRI_GRP_ID: 4 + ? + TM_ING_NONUC_ING_PRI_MAP_ID: 1 + ING_PRI: 7 + : + TM_PRI_GRP_ID: 7 + ? + # Profile 2 + TM_ING_NONUC_ING_PRI_MAP_ID: 1 + ING_PRI: [0, 1, 5, [8,15]] + : + TM_PRI_GRP_ID: 0 + ? + TM_ING_NONUC_ING_PRI_MAP_ID: 2 + ING_PRI: 2 + : + TM_PRI_GRP_ID: 2 + ? + TM_ING_NONUC_ING_PRI_MAP_ID: 2 + ING_PRI: 3 + : + TM_PRI_GRP_ID: 3 + ? + TM_ING_NONUC_ING_PRI_MAP_ID: 2 + ING_PRI: 4 + : + TM_PRI_GRP_ID: 4 + ? + TM_ING_NONUC_ING_PRI_MAP_ID: 2 + ING_PRI: 6 + : + TM_PRI_GRP_ID: 6 + ? + TM_ING_NONUC_ING_PRI_MAP_ID: 2 + ING_PRI: 7 + : + TM_PRI_GRP_ID: 7 + ? + # Profile 3 + TM_ING_NONUC_ING_PRI_MAP_ID: 3 + ING_PRI: [[0,15]] + : + TM_PRI_GRP_ID: 7 + + TM_PRI_GRP_POOL_MAP: + ? + TM_PRI_GRP_POOL_MAP_ID: 1 + TM_PRI_GRP_ID: [[0,6]] + : + TM_ING_SERVICE_POOL_ID: 0 + TM_HEADROOM_POOL_ID: 0 + ? + TM_PRI_GRP_POOL_MAP_ID: 1 + TM_PRI_GRP_ID: 7 + : + TM_ING_SERVICE_POOL_ID: 1 + TM_HEADROOM_POOL_ID: 1 + + TM_ING_PORT: + ? + PORT_ID: [0] + : + ING_PRI_MAP_ID: 3 + PRI_GRP_MAP_ID: 1 + ? + PORT_ID: [[1,4], [204,207]] + : + ING_PRI_MAP_ID: 1 + PRI_GRP_MAP_ID: 1 + ? + PORT_ID: [[17,20], [34,37], [51,54], [221,224], [238,241], [255,258]] + : + ING_PRI_MAP_ID: 2 + PRI_GRP_MAP_ID: 1 + ? + PORT_ID: [50] + : + ING_PRI_MAP_ID: 1 + PRI_GRP_MAP_ID: 1 + ? + PORT_ID: [33, 67, 237, 271] + : + ING_PRI_MAP_ID: 1 + PRI_GRP_MAP_ID: 1 + + TM_PORT_UC_Q_TO_SERVICE_POOL: + ? + PORT_ID: [[1,4], [17,20], [33,37], [50,54], 67, [204,207], [221,224], [237,241], [255,258], 271] + TM_UC_Q_ID: [[0,6], [8,9]] + : + TM_EGR_SERVICE_POOL_ID: 0 + ? + PORT_ID: [[1,4], [17,20], [33,37], [50,54], 67, [204,207], [221,224], [237,241], [255,258], 271] + TM_UC_Q_ID: 7 + : + TM_EGR_SERVICE_POOL_ID: 1 + + TM_PORT_MC_Q_TO_SERVICE_POOL: + ? + PORT_ID: [0] + TM_MC_Q_ID: [[0,47]] + : + TM_EGR_SERVICE_POOL_ID: 1 + ? + PORT_ID: [[1,4], [17,20], [33,37], [50,54], 67, [204,207], [221,224], [237,241], [255,258], 271] + TM_MC_Q_ID: [[0,1]] + : + TM_EGR_SERVICE_POOL_ID: 0 +... + +### Scheduler +--- +device: + 0: + TM_SCHEDULER_PROFILE: + ? + TM_SCHEDULER_PROFILE_ID: 1 + TM_SCHEDULER_NODE_ID: [0, 1] + : + NUM_UC_Q: 1 + NUM_MC_Q: 1 + FLOW_CTRL_UC: 0 + ? + TM_SCHEDULER_PROFILE_ID: 1 + TM_SCHEDULER_NODE_ID: [2, 5, 6, 7, 8, 9] + : + NUM_UC_Q: 1 + NUM_MC_Q: 0 + FLOW_CTRL_UC: 0 + ? + TM_SCHEDULER_PROFILE_ID: 1 + TM_SCHEDULER_NODE_ID: [3, 4] + : + NUM_UC_Q: 1 + NUM_MC_Q: 0 + FLOW_CTRL_UC: 1 + ? + TM_SCHEDULER_PROFILE_ID: 1 + TM_SCHEDULER_NODE_ID: [10, 11] + : + NUM_UC_Q: 0 + NUM_MC_Q: 0 + FLOW_CTRL_UC: 0 + + TM_SCHEDULER_PROFILE: + ? + TM_SCHEDULER_PROFILE_ID: 2 + TM_SCHEDULER_NODE_ID: [0, 1] + : + NUM_UC_Q: 1 + NUM_MC_Q: 1 + FLOW_CTRL_UC: 0 + ? + TM_SCHEDULER_PROFILE_ID: 2 + TM_SCHEDULER_NODE_ID: [5, 7, 8, 9] + : + NUM_UC_Q: 1 + NUM_MC_Q: 0 + FLOW_CTRL_UC: 0 + ? + TM_SCHEDULER_PROFILE_ID: 2 + TM_SCHEDULER_NODE_ID: [2, 3, 4, 6] + : + NUM_UC_Q: 1 + NUM_MC_Q: 0 + FLOW_CTRL_UC: 1 + ? + TM_SCHEDULER_PROFILE_ID: 2 + TM_SCHEDULER_NODE_ID: [10, 11] + : + NUM_UC_Q: 0 + NUM_MC_Q: 0 + FLOW_CTRL_UC: 0 +... +--- +device: + 0: + TM_SCHEDULER_PORT_PROFILE: + ? + PORT_ID: [[1,4], [204,207]] + : + TM_SCHEDULER_PROFILE_ID: 1 + WRR: 0 + TM_SCHEDULER_PORT_PROFILE: + ? + PORT_ID: [[17,20], [34,37], [51,54], [221,224], [238,241], [255,258]] + : + TM_SCHEDULER_PROFILE_ID: 2 + WRR: 0 +... + +### Pools +### hard code service pool size for TH4 per architecture requirement. +--- +device: + 0: + TM_ING_THD_HEADROOM_POOL: + ? + BUFFER_POOL: 0 + TM_HEADROOM_POOL_ID: 0 + : + LIMIT_CELLS: 45696 + + TM_ING_THD_SERVICE_POOL: + ? + BUFFER_POOL: 0 + TM_ING_SERVICE_POOL_ID: 0 + : + SHARED_LIMIT_CELLS: 173222 + SHARED_RESUME_OFFSET_CELLS: 74 + COLOR_SPECIFIC_LIMITS: 0 + ? + BUFFER_POOL: 0 + TM_ING_SERVICE_POOL_ID: 1 + : + SHARED_LIMIT_CELLS: 605 + SHARED_RESUME_OFFSET_CELLS: 74 + COLOR_SPECIFIC_LIMITS: 0 + + TM_EGR_THD_SERVICE_POOL: + ? + BUFFER_POOL: 0 + TM_EGR_SERVICE_POOL_ID: 0 + : + SHARED_LIMIT_CELLS: 173222 + SHARED_RESUME_LIMIT_CELLS: 21643 + COLOR_SPECIFIC_LIMITS: 1 + YELLOW_SHARED_LIMIT_CELLS: 16240 + YELLOW_SHARED_RESUME_LIMIT_CELLS: 16230 + RED_SHARED_LIMIT_CELLS: 13533 + RED_SHARED_RESUME_LIMIT_CELLS: 13523 + ? + BUFFER_POOL: 0 + TM_EGR_SERVICE_POOL_ID: 1 + : + SHARED_LIMIT_CELLS: 605 + SHARED_RESUME_LIMIT_CELLS: 73 + COLOR_SPECIFIC_LIMITS: 1 + YELLOW_SHARED_LIMIT_CELLS: 57 + YELLOW_SHARED_RESUME_LIMIT_CELLS: 55 + RED_SHARED_LIMIT_CELLS: 48 + RED_SHARED_RESUME_LIMIT_CELLS: 46 + + TM_THD_MC_EGR_SERVICE_POOL: + ? + BUFFER_POOL: 0 + TM_EGR_SERVICE_POOL_ID: 0 + : + SHARED_LIMIT_CELLS: 15779 + SHARED_RESUME_LIMIT_CELLS: 1962 + COLOR_SPECIFIC_LIMITS: 1 + YELLOW_SHARED_LIMIT_CELLS: 1480 + YELLOW_SHARED_RESUME_LIMIT_CELLS: 1470 + RED_SHARED_LIMIT_CELLS: 1233 + RED_SHARED_RESUME_LIMIT_CELLS: 1223 + ? + BUFFER_POOL: 0 + TM_EGR_SERVICE_POOL_ID: 1 + : + SHARED_LIMIT_CELLS: 605 + SHARED_RESUME_LIMIT_CELLS: 73 + COLOR_SPECIFIC_LIMITS: 1 + YELLOW_SHARED_LIMIT_CELLS: 57 + YELLOW_SHARED_RESUME_LIMIT_CELLS: 55 + RED_SHARED_LIMIT_CELLS: 46 + RED_SHARED_RESUME_LIMIT_CELLS: 46 +... + +### Thresholds +###################################### +--- +device: + 0: + TM_ING_THD_PORT_PRI_GRP: + ? + PORT_ID: [[0,4], [17,20], [33,37], [50,54], 67, [204,207], [221,224], [237,241], [255,258], 271] + TM_PRI_GRP_ID: [0, 1, 5, 7] + : + SHARED_LIMIT_CELLS_STATIC: 227317 + MIN_GUARANTEE_CELLS: 0 + DYNAMIC_SHARED_LIMITS: 0 + RESUME_OFFSET_CELLS: 0 + RESUME_FLOOR_CELLS: 0 + HEADROOM_LIMIT_AUTO: 0 + HEADROOM_LIMIT_CELLS: 0 + ? + PORT_ID: [[1,4], [204,207]] + TM_PRI_GRP_ID: [2, 3, 4, 6] + : + MIN_GUARANTEE_CELLS: 18 + DYNAMIC_SHARED_LIMITS: 1 + SHARED_LIMIT_DYNAMIC: ALPHA_1_4 + RESUME_OFFSET_CELLS: 18 + RESUME_FLOOR_CELLS: 0 + HEADROOM_LIMIT_AUTO: 0 + HEADROOM_LIMIT_CELLS: 2874 + ? + PORT_ID: [[17,20], [34,37], [51,54], [221,224], [238,241], [255,258]] + TM_PRI_GRP_ID: [2, 3, 4, 6] + : + MIN_GUARANTEE_CELLS: 18 + DYNAMIC_SHARED_LIMITS: 1 + SHARED_LIMIT_DYNAMIC: ALPHA_1_4 + RESUME_OFFSET_CELLS: 18 + RESUME_FLOOR_CELLS: 0 + HEADROOM_LIMIT_AUTO: 0 + HEADROOM_LIMIT_CELLS: 675 + ? + PORT_ID: [50] + TM_PRI_GRP_ID: [2, 3, 4, 6] + : + MIN_GUARANTEE_CELLS: 0 + DYNAMIC_SHARED_LIMITS: 1 + SHARED_LIMIT_DYNAMIC: ALPHA_1_4 + RESUME_OFFSET_CELLS: 0 + RESUME_FLOOR_CELLS: 0 + HEADROOM_LIMIT_AUTO: 0 + ? + PORT_ID: [33, 67, 237, 271] + TM_PRI_GRP_ID: [2, 3, 4, 6] + : + MIN_GUARANTEE_CELLS: 0 + DYNAMIC_SHARED_LIMITS: 1 + SHARED_LIMIT_DYNAMIC: ALPHA_1_4 + RESUME_OFFSET_CELLS: 0 + RESUME_FLOOR_CELLS: 0 + HEADROOM_LIMIT_AUTO: 0 + ? + PORT_ID: [0] + TM_PRI_GRP_ID: [2, 3, 4, 6] + : + MIN_GUARANTEE_CELLS: 0 + DYNAMIC_SHARED_LIMITS: 1 + SHARED_LIMIT_DYNAMIC: ALPHA_1_4 + RESUME_OFFSET_CELLS: 0 + RESUME_FLOOR_CELLS: 0 + HEADROOM_LIMIT_AUTO: 0 + + TM_ING_THD_PORT_SERVICE_POOL: + ? + PORT_ID: [[0,4], [17,20], [33,37], [50,54], 67, [204,207], [221,224], [237,241], [255,258], 271] + TM_ING_SERVICE_POOL_ID: [0, 1] + : + MIN_GUARANTEE_CELLS: 0 + SHARED_LIMIT_CELLS: 227317 + RESUME_LIMIT_CELLS: 227317 + + TM_THD_UC_Q: + ? + PORT_ID: [[1,4], [17,20], [33,37], [50,54], 67, [204,207], [221,224], [237,241], [255,258], 271] + TM_UC_Q_ID: [0, 1, 5, 7, 8, 9] + : + SHARED_LIMITS: 1 + COLOR_SPECIFIC_LIMITS: 1 + RED_LIMIT_DYNAMIC: PERCENTAGE_675 + YELLOW_LIMIT_DYNAMIC: PERCENTAGE_750 + COLOR_SPECIFIC_DYNAMIC_LIMITS: 1 + MIN_GUARANTEE_CELLS: 7 + DYNAMIC_SHARED_LIMITS: 1 + SHARED_LIMIT_DYNAMIC: ALPHA_1 + RESUME_OFFSET_CELLS: 2 + ? + PORT_ID: [[1,4], [17,20], [33,37], [50,54], 67, [204,207], [221,224], [237,241], [255,258], 271] + TM_UC_Q_ID: [2, 3, 4, 6] + : + SHARED_LIMITS: 0 + COLOR_SPECIFIC_LIMITS: 0 + COLOR_SPECIFIC_DYNAMIC_LIMITS: 0 + MIN_GUARANTEE_CELLS: 0 + DYNAMIC_SHARED_LIMITS: 0 + SHARED_LIMIT_CELLS_STATIC: 227317 + RESUME_OFFSET_CELLS: 2 + + TM_THD_MC_Q: + ? + PORT_ID: [0] + TM_MC_Q_ID: [0, 1, 2, 3] + : + MIN_GUARANTEE_CELLS: 37 + DYNAMIC_SHARED_LIMITS: 1 + SHARED_LIMIT_DYNAMIC: ALPHA_2 + COLOR_SPECIFIC_LIMITS: 1 + COLOR_SPECIFIC_DYNAMIC_LIMITS: 1 + YELLOW_LIMIT_DYNAMIC: PERCENTAGE_750 + RED_LIMIT_DYNAMIC: PERCENTAGE_675 + RESUME_OFFSET_CELLS: 2 + ? + PORT_ID: [0] + TM_MC_Q_ID: [4, 5, 6, 7, 8, 9] + : + MIN_GUARANTEE_CELLS: 7 + SHARED_LIMITS: 1 + DYNAMIC_SHARED_LIMITS: 1 + SHARED_LIMIT_DYNAMIC: ALPHA_1_4 + COLOR_SPECIFIC_LIMITS: 1 + COLOR_SPECIFIC_DYNAMIC_LIMITS: 1 + YELLOW_LIMIT_DYNAMIC: PERCENTAGE_750 + RED_LIMIT_DYNAMIC: PERCENTAGE_675 + RESUME_OFFSET_CELLS: 2 + ? + PORT_ID: [[1,4], [17,20], [33,37], [50,54], 67, [204,207], [221,224], [237,241], [255,258], 271] + TM_MC_Q_ID: [0, 1] + : + SHARED_LIMITS: 1 + DYNAMIC_SHARED_LIMITS: 1 + SHARED_LIMIT_DYNAMIC: ALPHA_1 + COLOR_SPECIFIC_LIMITS: 1 + COLOR_SPECIFIC_DYNAMIC_LIMITS: 1 + YELLOW_LIMIT_DYNAMIC: PERCENTAGE_750 + RED_LIMIT_DYNAMIC: PERCENTAGE_675 + RESUME_OFFSET_CELLS: 2 + + TM_EGR_THD_UC_PORT_SERVICE_POOL: + ? + PORT_ID: [[1,4], [17,20], [33,37], [50,54], 67, [204,207], [221,224], [237,241], [255,258], 271] + TM_EGR_SERVICE_POOL_ID: 0 + : + SHARED_LIMIT_CELLS: 173222 + SHARED_RESUME_LIMIT_CELLS: 21651 + COLOR_SPECIFIC_LIMITS: 1 + YELLOW_SHARED_LIMIT_CELLS: 16239 + YELLOW_SHARED_RESUME_LIMIT_CELLS: 16237 + RED_SHARED_LIMIT_CELLS: 13532 + RED_SHARED_RESUME_LIMIT_CELLS: 13530 + ? + PORT_ID: [[1,4], [17,20], [33,37], [50,54], 67, [204,207], [221,224], [237,241], [255,258], 271] + TM_EGR_SERVICE_POOL_ID: 1 + : + SHARED_LIMIT_CELLS: 605 + SHARED_RESUME_LIMIT_CELLS: 73 + COLOR_SPECIFIC_LIMITS: 1 + YELLOW_SHARED_LIMIT_CELLS: 56 + YELLOW_SHARED_RESUME_LIMIT_CELLS: 54 + RED_SHARED_LIMIT_CELLS: 47 + RED_SHARED_RESUME_LIMIT_CELLS: 45 + + TM_EGR_THD_MC_PORT_SERVICE_POOL: + ? + PORT_ID: [[0,4], [17,20], [33,37], [50,54], 67, [204,207], [221,224], [237,241], [255,258], 271] + TM_EGR_SERVICE_POOL_ID: 0 + : + COLOR_SPECIFIC_LIMITS: 1 + RED_SHARED_LIMIT_CELLS: 1232 + YELLOW_SHARED_LIMIT_CELLS: 1479 + SHARED_LIMIT_CELLS: 15779 + RED_SHARED_RESUME_LIMIT_CELLS: 1230 + YELLOW_SHARED_RESUME_LIMIT_CELLS: 1477 + SHARED_RESUME_LIMIT_CELLS: 1970 + ? + PORT_ID: [[0,4], [17,20], [33,37], [50,54], 67, [204,207], [221,224], [237,241], [255,258], 271] + TM_EGR_SERVICE_POOL_ID: 1 + : + COLOR_SPECIFIC_LIMITS: 1 + RED_SHARED_LIMIT_CELLS: 47 + YELLOW_SHARED_LIMIT_CELLS: 56 + SHARED_LIMIT_CELLS: 605 + RED_SHARED_RESUME_LIMIT_CELLS: 45 + YELLOW_SHARED_RESUME_LIMIT_CELLS: 54 + SHARED_RESUME_LIMIT_CELLS: 73 + + +... +### THDR Limits +--- +device: + 0: + TM_THD_REPL_SERVICE_POOL: + COLOR_SPECIFIC_LIMITS: 1 + SHARED_LIMIT_CELLS: 2961 + SHARED_RESUME_LIMIT_CELLS: 2947 + YELLOW_SHARED_LIMIT_CELLS: 2220 + YELLOW_SHARED_RESUME_LIMIT_CELLS: 2206 + RED_SHARED_LIMIT_CELLS: 1850 + RED_SHARED_RESUME_LIMIT_CELLS: 1836 + + TM_THD_REPL_Q: + ? + REPL_Q_NUM: [0,8] + : + COLOR_SPECIFIC_LIMITS: 1 + COLOR_SPECIFIC_DYNAMIC_LIMITS: 1 + SHARED_LIMITS: 1 + DYNAMIC_SHARED_LIMITS: 1 + RESUME_OFFSET_CELLS: 14 + SHARED_LIMIT_DYNAMIC: ALPHA_1 + YELLOW_LIMIT_DYNAMIC: PERCENTAGE_750 + RED_LIMIT_DYNAMIC: PERCENTAGE_675 + RESUME_OFFSET_YELLOW_CELLS: 14 + RESUME_OFFSET_RED_CELLS: 14 + + TM_THD_REPL_Q: + ? + REPL_Q_NUM: [0,5] + : + MIN_GUARANTEE_CELLS: 0 + ? + REPL_Q_NUM: [6,8] + : + MIN_GUARANTEE_CELLS: 37 + +... +### Mirror-on-drop +--- +device: + 0: + TM_MIRROR_ON_DROP_CONTROL: + RESERVED_LIMIT_CELLS: 2580 + + TM_MIRROR_ON_DROP_PROFILE: + ? + TM_MIRROR_ON_DROP_PROFILE_ID: 0 + : + PERCENTAGE_0_25: 65535 + PERCENTAGE_25_50: 65535 + PERCENTAGE_50_75: 65535 + PERCENTAGE_75_100: 65535 + + TM_MIRROR_ON_DROP_DESTINATION: + ? + TM_MIRROR_ON_DROP_DESTINATION_ID: 0 + : + TM_MC_Q_ID: 1 + PORT_ID: 1 +... + +### OBM +--- +device: + 0: + TM_OBM_PORT_PKT_PARSE: + ? + PORT_ID: [[1,4], [204,207]] + : + DSCP_MAP: 1 + HEADER_TYPE: OBM_HEADER_TYPE_ETHERNET + DEFAULT_PKT_PRI: 0 + + TM_OBM_PORT_PKT_PARSE: + ? + PORT_ID: [[17,20], [34,37], [51,54], [221,224], [238,241], [255,258]] + : + DSCP_MAP: 1 + HEADER_TYPE: OBM_HEADER_TYPE_ETHERNET + DEFAULT_PKT_PRI: 0 + + TM_OBM_PORT_PKT_PRI_TC_MAP: + ? + PORT_ID: [[1,4], [204,207]] + PKT_PRI_TYPE: PKT_PRI_TYPE_DSCP + PKT_PRI: [3, 4] + : + TRAFFIC_CLASS: OBM_TC_LOSSLESS0 + + TM_OBM_PORT_PKT_PRI_TC_MAP: + ? + PORT_ID: [[17,20], [34,37], [51,54], [221,224], [238,241], [255,258]] + PKT_PRI_TYPE: PKT_PRI_TYPE_DSCP + PKT_PRI: [2, 3, 4, 6] + : + TRAFFIC_CLASS: OBM_TC_LOSSLESS0 + + TM_OBM_THD_PORT: + ? + PORT_ID: [[1,4], [204,207]] + : + THD_AUTO: 0 + LOSSY_LOW_MAX_BYTES: 37376 + LOSSLESS0_MAX_BYTES: 235264 + MAX_BYTES: 235264 + + TM_OBM_THD_PORT: + ? + PORT_ID: [[17,20], [34,37], [51,54], [221,224], [238,241], [255,258]] + : + THD_AUTO: 0 + LOSSY_LOW_MAX_BYTES: 37376 + LOSSLESS0_MAX_BYTES: 235264 + MAX_BYTES: 235264 + + TM_OBM_THD_PORT_FLOW_CTRL: + ? + PORT_ID: [[1,4], [204,207]] + : + THD_AUTO: 0 + LOSSLESS0_XOFF_BYTES: 5184 + LOSSLESS0_XON_BYTES: 4672 + XOFF_BYTES: 5184 + XON_BYTES: 4672 + + TM_OBM_THD_PORT_FLOW_CTRL: + ? + PORT_ID: [[17,20], [34,37], [51,54], [221,224], [238,241], [255,258]] + : + THD_AUTO: 0 + LOSSLESS0_XOFF_BYTES: 5184 + LOSSLESS0_XON_BYTES: 4672 + XOFF_BYTES: 5184 + XON_BYTES: 4672 + + TM_OBM_PORT_FLOW_CTRL: + ? + PORT_ID: [[1,4], [204,207]] + : + FLOW_CTRL: 1 + FLOW_CTRL_TYPE: PFC + LOSSLESS0_FLOW_CTRL: 1 + + TM_OBM_PORT_FLOW_CTRL: + ? + PORT_ID: [[17,20], [34,37], [51,54], [221,224], [238,241], [255,258]] + : + FLOW_CTRL: 1 + FLOW_CTRL_TYPE: PFC + LOSSLESS0_FLOW_CTRL: 1 +... + +### PFC +--- +device: + 0: + PC_MAC_CONTROL: + ? + PORT_ID: [[1,4], [17,20], [33,37], [50,54], 67, [204,207], [221,224], [237,241], [255,258], 271] + : + PAUSE_TX: 0 + PAUSE_RX: 0 + + TM_PFC_EGR: + ? + PORT_ID: [[1,4], [204,207]] + : + TM_PFC_PRI_PROFILE_ID: 1 + + TM_PFC_EGR: + ? + PORT_ID: [[17,20], [34,37], [51,54], [221,224], [238,241], [255,258]] + : + TM_PFC_PRI_PROFILE_ID: 2 +... +--- +device: + 0: + TM_PFC_PRI_TO_PRI_GRP_MAP: + ? + TM_PFC_PRI_TO_PRI_GRP_MAP_ID: 1 + PFC_PRI: 3 + : + TM_PRI_GRP_ID: 3 + + TM_PFC_PRI_TO_PRI_GRP_MAP: + ? + TM_PFC_PRI_TO_PRI_GRP_MAP_ID: 1 + PFC_PRI: 4 + : + TM_PRI_GRP_ID: 4 + + TM_PFC_PRI_TO_PRI_GRP_MAP: + ? + TM_PFC_PRI_TO_PRI_GRP_MAP_ID: 2 + PFC_PRI: 2 + : + TM_PRI_GRP_ID: 2 + + TM_PFC_PRI_TO_PRI_GRP_MAP: + ? + TM_PFC_PRI_TO_PRI_GRP_MAP_ID: 2 + PFC_PRI: 3 + : + TM_PRI_GRP_ID: 3 + + TM_PFC_PRI_TO_PRI_GRP_MAP: + ? + TM_PFC_PRI_TO_PRI_GRP_MAP_ID: 2 + PFC_PRI: 4 + : + TM_PRI_GRP_ID: 4 + + TM_PFC_PRI_TO_PRI_GRP_MAP: + ? + TM_PFC_PRI_TO_PRI_GRP_MAP_ID: 2 + PFC_PRI: 6 + : + TM_PRI_GRP_ID: 6 + + TM_PFC_PRI_PROFILE: + ? + TM_PFC_PRI_PROFILE_ID: 1 + PFC_PRI: 3 + : + PFC: 1 + COS_LIST: [0, 0, 0, 1, 0, 0, 0, 0, 0, 0] + + TM_PFC_PRI_PROFILE: + ? + TM_PFC_PRI_PROFILE_ID: 1 + PFC_PRI: 4 + : + PFC: 1 + COS_LIST: [0, 0, 0, 0, 1, 0, 0, 0, 0, 0] + + TM_PFC_PRI_PROFILE: + ? + TM_PFC_PRI_PROFILE_ID: 2 + PFC_PRI: 2 + : + PFC: 1 + COS_LIST: [0, 0, 1, 0, 0, 0, 0, 0, 0, 0] + + TM_PFC_PRI_PROFILE: + ? + TM_PFC_PRI_PROFILE_ID: 2 + PFC_PRI: 3 + : + PFC: 1 + COS_LIST: [0, 0, 0, 1, 0, 0, 0, 0, 0, 0] + + TM_PFC_PRI_PROFILE: + ? + TM_PFC_PRI_PROFILE_ID: 2 + PFC_PRI: 4 + : + PFC: 1 + COS_LIST: [0, 0, 0, 0, 1, 0, 0, 0, 0, 0] + + TM_PFC_PRI_PROFILE: + ? + TM_PFC_PRI_PROFILE_ID: 2 + PFC_PRI: 6 + : + PFC: 1 + COS_LIST: [0, 0, 0, 0, 0, 0, 1, 0, 0, 0] + + TM_ING_PORT_PRI_GRP: + ? + PORT_ID: [[1,4], [204,207]] + TM_PRI_GRP_ID: [3, 4] + : + PFC: 1 + LOSSLESS: 1 + + TM_ING_PORT_PRI_GRP: + ? + PORT_ID: [[17,20], [34,37], [51,54], [221,224], [238,241], [255,258]] + TM_PRI_GRP_ID: [2, 3, 4, 6] + : + PFC: 1 + LOSSLESS: 1 + + PC_PFC: + ? + PORT_ID: [[1,4], [204,207]] + : + ENABLE_RX: 1 + ENABLE_TX: 1 + + PC_PFC: + ? + PORT_ID: [[17,20], [34,37], [51,54], [221,224], [238,241], [255,258]] + : + ENABLE_RX: 1 + ENABLE_TX: 1 +... diff --git a/device/arista/x86_64-arista_7060dx5_32/default_sku b/device/arista/x86_64-arista_7060dx5_32/default_sku new file mode 100644 index 0000000000..6636cf97ee --- /dev/null +++ b/device/arista/x86_64-arista_7060dx5_32/default_sku @@ -0,0 +1 @@ +Arista-7060DX5-32 t1 diff --git a/device/arista/x86_64-arista_7060dx5_32/platform.json b/device/arista/x86_64-arista_7060dx5_32/platform.json new file mode 100644 index 0000000000..e98355e15a --- /dev/null +++ b/device/arista/x86_64-arista_7060dx5_32/platform.json @@ -0,0 +1,933 @@ +{ + "chassis": { + "name": "DCS-7060DX5-32", + "components": [ + { + "name": "Aboot()" + }, + { + "name": "Scd(addr=0000:00:18.7)" + }, + { + "name": "Scd(addr=0000:01:00.0)" + }, + { + "name": "LorikeetSysCpld(addr=13-0023)" + } + ], + "fans": [], + "fan_drawers": [ + { + "name": "slot1", + "fans": [ + { + "name": "fan1" + }, + { + "name": "fan2" + } + ] + }, + { + "name": "slot2", + "fans": [ + { + "name": "fan3" + }, + { + "name": "fan4" + } + ] + }, + { + "name": "slot3", + "fans": [ + { + "name": "fan5" + }, + { + "name": "fan6" + } + ] + } + ], + "psus": [ + { + "name": "psu1", + "fans": [ + { + "name": "psu1/1", + "speed": { + "controllable": false + } + } + ] + }, + { + "name": "psu2", + "fans": [ + { + "name": "psu2/1", + "speed": { + "controllable": false + } + } + ] + } + ], + "thermals": [ + { + "name": "Cpu temp sensor", + "controllable": false + }, + { + "name": "CPU board temp sensor", + "controllable": false + }, + { + "name": "Back-panel temp sensor", + "controllable": false + }, + { + "name": "Center Rear", + "controllable": false + }, + { + "name": "Switch board right sensor", + "controllable": false + }, + { + "name": "Switch board left sensor", + "controllable": false + }, + { + "name": "Front-panel temp sensor", + "controllable": false + }, + { + "name": "Switch chip diode 1 sensor", + "controllable": false + }, + { + "name": "Switch chip diode 2 sensor", + "controllable": false + } + ], + "sfps": [ + { + "name": "osfp1" + }, + { + "name": "osfp2" + }, + { + "name": "osfp3" + }, + { + "name": "osfp4" + }, + { + "name": "osfp5" + }, + { + "name": "osfp6" + }, + { + "name": "osfp7" + }, + { + "name": "osfp8" + }, + { + "name": "osfp9" + }, + { + "name": "osfp10" + }, + { + "name": "osfp11" + }, + { + "name": "osfp12" + }, + { + "name": "osfp13" + }, + { + "name": "osfp14" + }, + { + "name": "osfp15" + }, + { + "name": "osfp16" + }, + { + "name": "osfp17" + }, + { + "name": "osfp18" + }, + { + "name": "osfp19" + }, + { + "name": "osfp20" + }, + { + "name": "osfp21" + }, + { + "name": "osfp22" + }, + { + "name": "osfp23" + }, + { + "name": "osfp24" + }, + { + "name": "osfp25" + }, + { + "name": "osfp26" + }, + { + "name": "osfp27" + }, + { + "name": "osfp28" + }, + { + "name": "osfp29" + }, + { + "name": "osfp30" + }, + { + "name": "osfp31" + }, + { + "name": "osfp32" + }, + { + "name": "sfp33" + } + ] + }, + "interfaces": { + "Ethernet0": { + "index": "1,1,1,1,1,1,1,1", + "lanes": "1,2,3,4,5,6,7,8", + "breakout_modes": { + "1x400G[200G,100G,50G,40G,25G,10G]": [ + "Ethernet1/1" + ], + "2x200G[100G,50G,40G,25G,10G]": [ + "Ethernet1/1", + "Ethernet1/5" + ], + "4x100G[50G,40G,25G,10G]": [ + "Ethernet1/1", + "Ethernet1/3", + "Ethernet1/5", + "Ethernet1/7" + ], + "1x100G(4)": [ + "Ethernet1/1" + ] + } + }, + "Ethernet8": { + "index": "2,2,2,2,2,2,2,2", + "lanes": "9,10,11,12,13,14,15,16", + "breakout_modes": { + "1x400G[200G,100G,50G,40G,25G,10G]": [ + "Ethernet2/1" + ], + "2x200G[100G,50G,40G,25G,10G]": [ + "Ethernet2/1", + "Ethernet2/5" + ], + "4x100G[50G,40G,25G,10G]": [ + "Ethernet2/1", + "Ethernet2/3", + "Ethernet2/5", + "Ethernet2/7" + ], + "1x100G(4)": [ + "Ethernet2/1" + ] + } + }, + "Ethernet16": { + "index": "3,3,3,3,3,3,3,3", + "lanes": "17,18,19,20,21,22,23,24", + "breakout_modes": { + "1x400G[200G,100G,50G,40G,25G,10G]": [ + "Ethernet3/1" + ], + "2x200G[100G,50G,40G,25G,10G]": [ + "Ethernet3/1", + "Ethernet3/5" + ], + "4x100G[50G,40G,25G,10G]": [ + "Ethernet3/1", + "Ethernet3/3", + "Ethernet3/5", + "Ethernet3/7" + ], + "1x100G(4)": [ + "Ethernet3/1" + ] + } + }, + "Ethernet24": { + "index": "4,4,4,4,4,4,4,4", + "lanes": "25,26,27,28,29,30,31,32", + "breakout_modes": { + "1x400G[200G,100G,50G,40G,25G,10G]": [ + "Ethernet4/1" + ], + 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"Ethernet240": { + "index": "31,31,31,31,31,31,31,31", + "lanes": "497,498,499,500,501,502,503,504", + "breakout_modes": { + "1x400G[200G,100G,50G,40G,25G,10G]": [ + "Ethernet31/1" + ], + "2x200G[100G,50G,40G,25G,10G]": [ + "Ethernet31/1", + "Ethernet31/5" + ], + "4x100G[50G,40G,25G,10G]": [ + "Ethernet31/1", + "Ethernet31/3", + "Ethernet31/5", + "Ethernet31/7" + ], + "1x100G(4)": [ + "Ethernet31/1" + ] + } + }, + "Ethernet248": { + "index": "32,32,32,32,32,32,32,32", + "lanes": "505,506,507,508,509,510,511,512", + "breakout_modes": { + "1x400G[200G,100G,50G,40G,25G,10G]": [ + "Ethernet32/1" + ], + "2x200G[100G,50G,40G,25G,10G]": [ + "Ethernet32/1", + "Ethernet32/5" + ], + "4x100G[50G,40G,25G,10G]": [ + "Ethernet32/1", + "Ethernet32/3", + "Ethernet32/5", + "Ethernet32/7" + ], + "1x100G(4)": [ + "Ethernet32/1" + ] + } + }, + "Ethernet256": { + "index": "33", + "lanes": "513", + "breakout_modes": { + "1x10G": [ + "Ethernet33" + ] + } + } + } +} diff --git a/device/arista/x86_64-arista_7060dx5_32/platform_asic b/device/arista/x86_64-arista_7060dx5_32/platform_asic new file mode 100644 index 0000000000..9604676527 --- /dev/null +++ b/device/arista/x86_64-arista_7060dx5_32/platform_asic @@ -0,0 +1 @@ +broadcom diff --git a/device/arista/x86_64-arista_7060dx5_32/platform_components.json b/device/arista/x86_64-arista_7060dx5_32/platform_components.json new file mode 100644 index 0000000000..26c3bafc31 --- /dev/null +++ b/device/arista/x86_64-arista_7060dx5_32/platform_components.json @@ -0,0 +1,12 @@ +{ + "chassis": { + "DCS-7060DX5-32": { + "component": { + "Aboot()": {}, + "Scd(addr=0000:00:18.7)": {}, + "Scd(addr=0000:01:00.0)": {}, + "LorikeetSysCpld(addr=13-0023)": {} + } + } + } +} diff --git a/device/arista/x86_64-arista_7060dx5_32/platform_env.conf b/device/arista/x86_64-arista_7060dx5_32/platform_env.conf new file mode 100644 index 0000000000..dd7cf4fe01 --- /dev/null +++ b/device/arista/x86_64-arista_7060dx5_32/platform_env.conf @@ -0,0 +1,2 @@ +SYNCD_SHM_SIZE=512m +is_ltsw_chip=1 diff --git a/device/arista/x86_64-arista_7060dx5_32/platform_reboot b/device/arista/x86_64-arista_7060dx5_32/platform_reboot new file mode 120000 index 0000000000..7f94a49e38 --- /dev/null +++ b/device/arista/x86_64-arista_7060dx5_32/platform_reboot @@ -0,0 +1 @@ +../x86_64-arista_common/platform_reboot \ No newline at end of file diff --git a/device/arista/x86_64-arista_7060dx5_32/plugins b/device/arista/x86_64-arista_7060dx5_32/plugins new file mode 120000 index 0000000000..5fbbf98a62 --- /dev/null +++ b/device/arista/x86_64-arista_7060dx5_32/plugins @@ -0,0 +1 @@ +../x86_64-arista_common/plugins/ \ No newline at end of file diff --git a/device/arista/x86_64-arista_7060dx5_32/pmon_daemon_control.json b/device/arista/x86_64-arista_7060dx5_32/pmon_daemon_control.json new file mode 120000 index 0000000000..51d5ab7b00 --- /dev/null +++ b/device/arista/x86_64-arista_7060dx5_32/pmon_daemon_control.json @@ -0,0 +1 @@ +../x86_64-arista_common/pmon_daemon_control.json \ No newline at end of file diff --git a/device/arista/x86_64-arista_7060dx5_32/sensors.conf b/device/arista/x86_64-arista_7060dx5_32/sensors.conf new file mode 100644 index 0000000000..ba4e8045c5 --- /dev/null +++ b/device/arista/x86_64-arista_7060dx5_32/sensors.conf @@ -0,0 +1,36 @@ +# libsensors configuration file for DCS-7060DX4-32 +# ------------------------------------------------# + +bus "i2c-9" "SCD 0000:00:18.7 SMBus master 0 bus 0" +bus "i2c-29" "SCD 0000:01:00.0 SMBus master 1 bus 0" +bus "i2c-32" "SCD 0000:01:00.0 SMBus master 1 bus 3" +bus "i2c-33" "SCD 0000:01:00.0 SMBus master 1 bus 4" + +chip "max6658-i2c-9-4c" + label temp1 "CPU board temp sensor" + label temp2 "Back-panel temp sensor" + +chip "max6581-i2c-29-4d" + label temp1 "Center Rear" + label temp2 "Switch board right sensor" + label temp3 "Switch board left sensor" + label temp4 "Front-panel temp sensor" + label temp5 "Switch chip diode 1 sensor" + label temp6 "Switch chip diode 2 sensor" + ignore temp7 + ignore temp8 + +chip "pmbus-i2c-32-58" + label temp1 "Power supply 1 hotspot sensor" + label temp2 "Power supply 1 inlet temp sensor" + label temp3 "Power supply 1 exhaust temp sensor" + ignore fan2 + ignore fan3 + +chip "pmbus-i2c-33-58" + label temp1 "Power supply 2 hotspot sensor" + label temp2 "Power supply 2 inlet temp sensor" + label temp3 "Power supply 2 exhaust temp sensor" + ignore fan2 + ignore fan3 + diff --git a/device/arista/x86_64-arista_7060dx5_32/system_health_monitoring_config.json b/device/arista/x86_64-arista_7060dx5_32/system_health_monitoring_config.json new file mode 120000 index 0000000000..1185f771fa --- /dev/null +++ b/device/arista/x86_64-arista_7060dx5_32/system_health_monitoring_config.json @@ -0,0 +1 @@ +../x86_64-arista_common/system_health_monitoring_config.json \ No newline at end of file diff --git a/device/arista/x86_64-arista_7060dx5_32/thermal_policy.json b/device/arista/x86_64-arista_7060dx5_32/thermal_policy.json new file mode 120000 index 0000000000..0991dc7f36 --- /dev/null +++ b/device/arista/x86_64-arista_7060dx5_32/thermal_policy.json @@ -0,0 +1 @@ +../x86_64-arista_common/thermal_policy.json \ No newline at end of file diff --git a/device/common/profiles/th4/gen/BALANCED/buffers_defaults_t0.j2 b/device/common/profiles/th4/gen/BALANCED/buffers_defaults_t0.j2 new file mode 100644 index 0000000000..2bd54b00be --- /dev/null +++ b/device/common/profiles/th4/gen/BALANCED/buffers_defaults_t0.j2 @@ -0,0 +1,46 @@ +{%- set default_cable = '5m' %} + +{%- macro generate_port_lists(PORT_ALL) %} + {# Generate list of ports #} + {%- for port_idx in range(0,256,8) %} + {%- if PORT_ALL.append("Ethernet%d" % (port_idx)) %}{%- endif %} + {%- endfor %} +{%- endmacro %} + +{%- macro generate_buffer_pool_and_profiles() %} + "BUFFER_POOL": { + "ingress_lossless_pool": { + "size": "37333333", + "type": "ingress", + "mode": "dynamic", + "xoff": "24000000" + }, + "egress_lossy_pool": { + "size": "34000000", + "type": "egress", + "mode": "dynamic" + }, + "egress_lossless_pool": { + "size": "56000000", + "type": "egress", + "mode": "static" + } + }, + "BUFFER_PROFILE": { + "ingress_lossy_profile": { + "pool":"ingress_lossless_pool", + "size":"0", + "dynamic_th":"3" + }, + "egress_lossless_profile": { + "pool":"egress_lossless_pool", + "size":"1518", + "static_th":"56000000" + }, + "egress_lossy_profile": { + "pool":"egress_lossy_pool", + "size":"1518", + "dynamic_th":"3" + } + }, +{%- endmacro %} diff --git a/device/common/profiles/th4/gen/BALANCED/buffers_defaults_t1.j2 b/device/common/profiles/th4/gen/BALANCED/buffers_defaults_t1.j2 new file mode 100644 index 0000000000..2bd54b00be --- /dev/null +++ b/device/common/profiles/th4/gen/BALANCED/buffers_defaults_t1.j2 @@ -0,0 +1,46 @@ +{%- set default_cable = '5m' %} + +{%- macro generate_port_lists(PORT_ALL) %} + {# Generate list of ports #} + {%- for port_idx in range(0,256,8) %} + {%- if PORT_ALL.append("Ethernet%d" % (port_idx)) %}{%- endif %} + {%- endfor %} +{%- endmacro %} + +{%- macro generate_buffer_pool_and_profiles() %} + "BUFFER_POOL": { + "ingress_lossless_pool": { + "size": "37333333", + "type": "ingress", + "mode": "dynamic", + "xoff": "24000000" + }, + "egress_lossy_pool": { + "size": "34000000", + "type": "egress", + "mode": "dynamic" + }, + "egress_lossless_pool": { + "size": "56000000", + "type": "egress", + "mode": "static" + } + }, + "BUFFER_PROFILE": { + "ingress_lossy_profile": { + "pool":"ingress_lossless_pool", + "size":"0", + "dynamic_th":"3" + }, + "egress_lossless_profile": { + "pool":"egress_lossless_pool", + "size":"1518", + "static_th":"56000000" + }, + "egress_lossy_profile": { + "pool":"egress_lossy_pool", + "size":"1518", + "dynamic_th":"3" + } + }, +{%- endmacro %} diff --git a/device/common/profiles/th4/gen/BALANCED/pg_profile_lookup.ini b/device/common/profiles/th4/gen/BALANCED/pg_profile_lookup.ini new file mode 100644 index 0000000000..673df369a9 --- /dev/null +++ b/device/common/profiles/th4/gen/BALANCED/pg_profile_lookup.ini @@ -0,0 +1,17 @@ +# PG lossless profiles. +# speed cable size xon xoff threshold xon_offset + 10000 5m 1248 2288 35776 0 2288 + 25000 5m 1248 2288 53248 0 2288 + 40000 5m 1248 2288 66560 0 2288 + 50000 5m 1248 2288 90272 0 2288 + 100000 5m 1248 2288 165568 0 2288 + 10000 40m 1248 2288 37024 0 2288 + 25000 40m 1248 2288 53248 0 2288 + 40000 40m 1248 2288 71552 0 2288 + 50000 40m 1248 2288 96096 0 2288 + 100000 40m 1248 2288 177632 0 2288 + 10000 300m 1248 2288 46176 0 2288 + 25000 300m 1248 2288 79040 0 2288 + 40000 300m 1248 2288 108160 0 2288 + 50000 300m 1248 2288 141856 0 2288 + 100000 300m 1248 2288 268736 0 2288 diff --git a/files/Aboot/boot0.j2 b/files/Aboot/boot0.j2 index c35302e126..898eb0bcdd 100644 --- a/files/Aboot/boot0.j2 +++ b/files/Aboot/boot0.j2 @@ -554,6 +554,9 @@ write_platform_specific_cmdline() { if [ "$sid" = "BlackhawkT4DD" ]; then aboot_machine=arista_7050dx4_32s fi + if [ "$sid" = "BlackhawkTH4DD" ] || [ "$sid" = "BlackhawkTh4Dd" ]; then + aboot_machine=arista_7060dx5_32 + fi if [ "$sid" = "Smartsville" ]; then aboot_machine=arista_7280cr3_32p4 fi