[Quanta] Add and update platform and device files (#6971)
Add device and platform code for ix7-bwde, ix8a-bwde. Support platform API 2.0 for all quanta platforms except for ix1b Co-authored-by: robert.hong <robert.hong@qct.io>
This commit is contained in:
roberthong-qct
GitHub
parent
9d1c1659bd
commit
95c67d2d55
@ -0,0 +1,3 @@
|
||||
{%- set default_topo = 't1' %}
|
||||
{%- include 'buffers_config.j2' %}
|
||||
|
||||
@ -0,0 +1,46 @@
|
||||
{%- set default_cable = '300m' %}
|
||||
|
||||
{%- macro generate_port_lists(PORT_ALL) %}
|
||||
{# Generate list of ports #}
|
||||
{% for port_idx in range(0,32) %}
|
||||
{% if PORT_ALL.append("Ethernet%d" % (port_idx * 4)) %}{% endif %}
|
||||
{% endfor %}
|
||||
{%- endmacro %}
|
||||
|
||||
{%- macro generate_buffer_pool_and_profiles() %}
|
||||
"BUFFER_POOL": {
|
||||
"ingress_lossless_pool": {
|
||||
"xoff": "4625920",
|
||||
"size": "12766208",
|
||||
"type": "ingress",
|
||||
"mode": "dynamic"
|
||||
},
|
||||
"egress_lossless_pool": {
|
||||
"size": "12766208",
|
||||
"type": "egress",
|
||||
"mode": "static"
|
||||
},
|
||||
"egress_lossy_pool": {
|
||||
"size": "7326924",
|
||||
"type": "egress",
|
||||
"mode": "dynamic"
|
||||
}
|
||||
},
|
||||
"BUFFER_PROFILE": {
|
||||
"ingress_lossy_profile": {
|
||||
"pool":"[BUFFER_POOL|ingress_lossless_pool]",
|
||||
"size":"0",
|
||||
"dynamic_th":"3"
|
||||
},
|
||||
"egress_lossless_profile": {
|
||||
"pool":"[BUFFER_POOL|egress_lossless_pool]",
|
||||
"size":"0",
|
||||
"static_th":"12766208"
|
||||
},
|
||||
"egress_lossy_profile": {
|
||||
"pool":"[BUFFER_POOL|egress_lossless_pool]",
|
||||
"size":"1518",
|
||||
"dynamic_th":"3"
|
||||
}
|
||||
},
|
||||
{%- endmacro %}
|
||||
@ -0,0 +1,45 @@
|
||||
{%- set default_cable = '300m' %}
|
||||
|
||||
{%- macro generate_port_lists(PORT_ALL) %}
|
||||
{# Generate list of ports #}
|
||||
{% for port_idx in range(0,32) %}
|
||||
{% if PORT_ALL.append("Ethernet%d" % (port_idx * 4)) %}{% endif %}
|
||||
{% endfor %}
|
||||
{%- endmacro %}
|
||||
|
||||
{%- macro generate_buffer_pool_and_profiles() %}
|
||||
"BUFFER_POOL": {
|
||||
"ingress_lossless_pool": {
|
||||
"size": "12766208",
|
||||
"type": "ingress",
|
||||
"mode": "dynamic"
|
||||
},
|
||||
"egress_lossless_pool": {
|
||||
"size": "12766208",
|
||||
"type": "egress",
|
||||
"mode": "static"
|
||||
},
|
||||
"egress_lossy_pool": {
|
||||
"size": "7326924",
|
||||
"type": "egress",
|
||||
"mode": "dynamic"
|
||||
}
|
||||
},
|
||||
"BUFFER_PROFILE": {
|
||||
"ingress_lossy_profile": {
|
||||
"pool":"[BUFFER_POOL|ingress_lossless_pool]",
|
||||
"size":"0",
|
||||
"dynamic_th":"3"
|
||||
},
|
||||
"egress_lossless_profile": {
|
||||
"pool":"[BUFFER_POOL|egress_lossless_pool]",
|
||||
"size":"0",
|
||||
"static_th":"12766208"
|
||||
},
|
||||
"egress_lossy_profile": {
|
||||
"pool":"[BUFFER_POOL|egress_lossless_pool]",
|
||||
"size":"1518",
|
||||
"dynamic_th":"3"
|
||||
}
|
||||
},
|
||||
{%- endmacro %}
|
||||
@ -0,0 +1,46 @@
|
||||
{%- set default_cable = '300m' %}
|
||||
|
||||
{%- macro generate_port_lists(PORT_ALL) %}
|
||||
{# Generate list of ports #}
|
||||
{% for port_idx in range(0,32) %}
|
||||
{% if PORT_ALL.append("Ethernet%d" % (port_idx * 4)) %}{% endif %}
|
||||
{% endfor %}
|
||||
{%- endmacro %}
|
||||
|
||||
{%- macro generate_buffer_pool_and_profiles() %}
|
||||
"BUFFER_POOL": {
|
||||
"ingress_lossless_pool": {
|
||||
"xoff": "196608",
|
||||
"size": "12766208",
|
||||
"type": "ingress",
|
||||
"mode": "dynamic"
|
||||
},
|
||||
"egress_lossless_pool": {
|
||||
"size": "33004032",
|
||||
"type": "egress",
|
||||
"mode": "static"
|
||||
},
|
||||
"egress_lossy_pool": {
|
||||
"size": "12766208",
|
||||
"type": "egress",
|
||||
"mode": "dynamic"
|
||||
}
|
||||
},
|
||||
"BUFFER_PROFILE": {
|
||||
"ingress_lossy_profile": {
|
||||
"pool":"[BUFFER_POOL|ingress_lossless_pool]",
|
||||
"size":"0",
|
||||
"dynamic_th":"3"
|
||||
},
|
||||
"egress_lossless_profile": {
|
||||
"pool":"[BUFFER_POOL|egress_lossless_pool]",
|
||||
"size":"0",
|
||||
"static_th":"33004032"
|
||||
},
|
||||
"egress_lossy_profile": {
|
||||
"pool":"[BUFFER_POOL|egress_lossless_pool]",
|
||||
"size":"1518",
|
||||
"dynamic_th":"3"
|
||||
}
|
||||
},
|
||||
{%- endmacro %}
|
||||
@ -0,0 +1,3 @@
|
||||
l2_mem_entries=294912
|
||||
l3_mem_entries=16384
|
||||
l3_alpm_enable=0
|
||||
@ -0,0 +1,5 @@
|
||||
l2_mem_entries=40960
|
||||
l3_mem_entries=40960
|
||||
l3_alpm_enable=2
|
||||
use_all_splithorizon_groups=1
|
||||
sai_tunnel_support=1
|
||||
@ -0,0 +1,17 @@
|
||||
# PG lossless profiles.
|
||||
# speed cable size xon xoff threshold xon_offset
|
||||
10000 5m 9427 0 50176 1 3584
|
||||
25000 5m 9427 0 50176 1 3584
|
||||
40000 5m 9427 0 50176 1 3584
|
||||
50000 5m 9427 0 50176 1 3584
|
||||
100000 5m 9427 0 50176 1 3584
|
||||
10000 40m 9427 0 50176 1 3584
|
||||
25000 40m 9427 0 50176 1 3584
|
||||
40000 40m 9427 0 50176 1 3584
|
||||
50000 40m 9427 0 50176 1 3584
|
||||
100000 40m 9427 0 50176 1 3584
|
||||
10000 300m 9427 0 50176 1 3584
|
||||
25000 300m 9427 0 50176 1 3584
|
||||
40000 300m 9427 0 50176 1 3584
|
||||
50000 300m 9427 0 50176 1 3584
|
||||
100000 300m 9427 0 50176 1 3584
|
||||
@ -0,0 +1,32 @@
|
||||
{
|
||||
"fec-mode": {
|
||||
"Ethernet0-127": {
|
||||
"1": {
|
||||
"10000": [ "none", "fc" ],
|
||||
"25000": [ "none", "rs" ]
|
||||
},
|
||||
"2": {
|
||||
"20000": [ "none", "fc" ],
|
||||
"50000": [ "none", "rs" ]
|
||||
},
|
||||
"4": {
|
||||
"40000": [ "none", "fc" ],
|
||||
"100000": [ "none", "rs" ]
|
||||
}
|
||||
}
|
||||
},
|
||||
"default-fec-mode": {
|
||||
"Ethernet0-127": {
|
||||
"4": {
|
||||
"40000": "none",
|
||||
"100000": "rs"
|
||||
}
|
||||
}
|
||||
},
|
||||
"native-port-supported-speeds": {
|
||||
"Ethernet0-127": {
|
||||
"4": ["100000","40000"]
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
@ -0,0 +1,33 @@
|
||||
# name lanes alias index speed
|
||||
Ethernet0 29,30,31,32 hundredGigE1 1 100000
|
||||
Ethernet4 33,34,35,36 hundredGigE2 2 100000
|
||||
Ethernet8 41,42,43,44 hundredGigE3 3 100000
|
||||
Ethernet12 45,46,47,48 hundredGigE4 4 100000
|
||||
Ethernet16 1,2,3,4 hundredGigE5 5 100000
|
||||
Ethernet20 5,6,7,8 hundredGigE6 6 100000
|
||||
Ethernet24 9,10,11,12 hundredGigE7 7 100000
|
||||
Ethernet28 13,14,15,16 hundredGigE8 8 100000
|
||||
Ethernet32 17,18,19,20 hundredGigE9 9 100000
|
||||
Ethernet36 21,22,23,24 hundredGigE10 10 100000
|
||||
Ethernet40 25,26,27,28 hundredGigE11 11 100000
|
||||
Ethernet44 37,38,39,40 hundredGigE12 12 100000
|
||||
Ethernet48 49,50,51,52 hundredGigE13 13 100000
|
||||
Ethernet52 53,54,55,56 hundredGigE14 14 100000
|
||||
Ethernet56 57,58,59,60 hundredGigE15 15 100000
|
||||
Ethernet60 61,62,63,64 hundredGigE16 16 100000
|
||||
Ethernet64 65,66,67,68 hundredGigE17 17 100000
|
||||
Ethernet68 69,70,71,72 hundredGigE18 18 100000
|
||||
Ethernet72 73,74,75,76 hundredGigE19 19 100000
|
||||
Ethernet76 77,78,79,80 hundredGigE20 20 100000
|
||||
Ethernet80 93,94,95,96 hundredGigE21 21 100000
|
||||
Ethernet84 101,102,103,104 hundredGigE22 22 100000
|
||||
Ethernet88 105,106,107,108 hundredGigE23 23 100000
|
||||
Ethernet92 109,110,111,112 hundredGigE24 24 100000
|
||||
Ethernet96 113,114,115,116 hundredGigE25 25 100000
|
||||
Ethernet100 117,118,119,120 hundredGigE26 26 100000
|
||||
Ethernet104 121,122,123,124 hundredGigE27 27 100000
|
||||
Ethernet108 125,126,127,128 hundredGigE28 28 100000
|
||||
Ethernet112 81,82,83,84 hundredGigE29 29 100000
|
||||
Ethernet116 85,86,87,88 hundredGigE30 30 100000
|
||||
Ethernet120 89,90,91,92 hundredGigE31 31 100000
|
||||
Ethernet124 97,98,99,100 hundredGigE32 32 100000
|
||||
@ -0,0 +1 @@
|
||||
{%- include 'qos_config_t1.j2' %}
|
||||
@ -0,0 +1,175 @@
|
||||
{%- set PORT_ALL = [] %}
|
||||
{%- for port in PORT %}
|
||||
{%- if PORT_ALL.append(port) %}{% endif %}
|
||||
{%- endfor %}
|
||||
{%- if PORT_ALL | sort_by_port_index %}{% endif %}
|
||||
|
||||
{%- set port_names_list_all = [] %}
|
||||
{%- for port in PORT_ALL %}
|
||||
{%- if port_names_list_all.append(port) %}{% endif %}
|
||||
{%- endfor %}
|
||||
{%- set port_names_all = port_names_list_all | join(',') -%}
|
||||
|
||||
|
||||
{%- set PORT_ACTIVE = [] %}
|
||||
{%- if DEVICE_NEIGHBOR is not defined %}
|
||||
{%- set PORT_ACTIVE = PORT_ALL %}
|
||||
{%- else %}
|
||||
{%- for port in DEVICE_NEIGHBOR.keys() %}
|
||||
{%- if PORT_ACTIVE.append(port) %}{%- endif %}
|
||||
{%- endfor %}
|
||||
{%- endif %}
|
||||
{%- if PORT_ACTIVE | sort_by_port_index %}{% endif %}
|
||||
|
||||
{%- set port_names_list_active = [] %}
|
||||
{%- for port in PORT_ACTIVE %}
|
||||
{%- if port_names_list_active.append(port) %}{%- endif %}
|
||||
{%- endfor %}
|
||||
{%- set port_names_active = port_names_list_active | join(',') -%}
|
||||
|
||||
|
||||
{%- set pfc_to_pg_map_supported_asics = ['mellanox', 'barefoot', 'marvell'] -%}
|
||||
|
||||
|
||||
{
|
||||
{% if generate_tc_to_pg_map is defined %}
|
||||
{{- generate_tc_to_pg_map() }}
|
||||
{% else %}
|
||||
"TC_TO_PRIORITY_GROUP_MAP": {
|
||||
"AZURE": {
|
||||
"0": "0",
|
||||
"1": "0",
|
||||
"2": "0",
|
||||
"3": "3",
|
||||
"4": "4",
|
||||
"5": "0",
|
||||
"6": "0",
|
||||
"7": "7"
|
||||
}
|
||||
},
|
||||
{% endif %}
|
||||
"MAP_PFC_PRIORITY_TO_QUEUE": {
|
||||
"AZURE": {
|
||||
"0": "0",
|
||||
"1": "1",
|
||||
"2": "2",
|
||||
"3": "3",
|
||||
"4": "4",
|
||||
"5": "5",
|
||||
"6": "6",
|
||||
"7": "7"
|
||||
}
|
||||
},
|
||||
"TC_TO_QUEUE_MAP": {
|
||||
"AZURE": {
|
||||
"0": "0",
|
||||
"1": "1",
|
||||
"2": "2",
|
||||
"3": "3",
|
||||
"4": "4",
|
||||
"5": "5",
|
||||
"6": "6",
|
||||
"7": "7"
|
||||
}
|
||||
},
|
||||
"DSCP_TO_TC_MAP": {
|
||||
"AZURE": {
|
||||
"0" : "1",
|
||||
"1" : "1",
|
||||
"2" : "1",
|
||||
"3" : "3",
|
||||
"4" : "4",
|
||||
"5" : "2",
|
||||
"6" : "1",
|
||||
"7" : "1",
|
||||
"8" : "0",
|
||||
"9" : "1",
|
||||
"10": "1",
|
||||
"11": "1",
|
||||
"12": "1",
|
||||
"13": "1",
|
||||
"14": "1",
|
||||
"15": "1",
|
||||
"16": "1",
|
||||
"17": "1",
|
||||
"18": "1",
|
||||
"19": "1",
|
||||
"20": "1",
|
||||
"21": "1",
|
||||
"22": "1",
|
||||
"23": "1",
|
||||
"24": "1",
|
||||
"25": "1",
|
||||
"26": "1",
|
||||
"27": "1",
|
||||
"28": "1",
|
||||
"29": "1",
|
||||
"30": "1",
|
||||
"31": "1",
|
||||
"32": "1",
|
||||
"33": "1",
|
||||
"34": "1",
|
||||
"35": "1",
|
||||
"36": "1",
|
||||
"37": "1",
|
||||
"38": "1",
|
||||
"39": "1",
|
||||
"40": "1",
|
||||
"41": "1",
|
||||
"42": "1",
|
||||
"43": "1",
|
||||
"44": "1",
|
||||
"45": "1",
|
||||
"46": "5",
|
||||
"47": "1",
|
||||
"48": "6",
|
||||
"49": "1",
|
||||
"50": "1",
|
||||
"51": "1",
|
||||
"52": "1",
|
||||
"53": "1",
|
||||
"54": "1",
|
||||
"55": "1",
|
||||
"56": "1",
|
||||
"57": "1",
|
||||
"58": "1",
|
||||
"59": "1",
|
||||
"60": "1",
|
||||
"61": "1",
|
||||
"62": "1",
|
||||
"63": "1"
|
||||
}
|
||||
},
|
||||
"SCHEDULER": {
|
||||
"scheduler.0": {
|
||||
"type" : "DWRR",
|
||||
"weight": "14"
|
||||
},
|
||||
"scheduler.1": {
|
||||
"type" : "DWRR",
|
||||
"weight": "15"
|
||||
}
|
||||
},
|
||||
{% if asic_type in pfc_to_pg_map_supported_asics %}
|
||||
"PFC_PRIORITY_TO_PRIORITY_GROUP_MAP": {
|
||||
"AZURE": {
|
||||
"3": "3",
|
||||
"4": "4"
|
||||
}
|
||||
},
|
||||
{% endif %}
|
||||
"PORT_QOS_MAP": {
|
||||
{% for port in PORT_ACTIVE %}
|
||||
"{{ port }}": {
|
||||
"dscp_to_tc_map" : "[DSCP_TO_TC_MAP|AZURE]",
|
||||
"tc_to_queue_map" : "[TC_TO_QUEUE_MAP|AZURE]",
|
||||
"tc_to_pg_map" : "[TC_TO_PRIORITY_GROUP_MAP|AZURE]",
|
||||
"pfc_to_queue_map": "[MAP_PFC_PRIORITY_TO_QUEUE|AZURE]",
|
||||
{% if asic_type in pfc_to_pg_map_supported_asics %}
|
||||
"pfc_to_pg_map" : "[PFC_PRIORITY_TO_PRIORITY_GROUP_MAP|AZURE]",
|
||||
{% endif %}
|
||||
"pfc_enable" : "3,4"
|
||||
}{% if not loop.last %},{% endif %}
|
||||
{% endfor %}
|
||||
}
|
||||
}
|
||||
@ -0,0 +1,2 @@
|
||||
SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/td3-ix7-bwde-32x100G.config.bcm
|
||||
SAI_NUM_ECMP_MEMBERS=64
|
||||
@ -0,0 +1,612 @@
|
||||
#polarity/lanemap is using TH2 style.
|
||||
core_clock_frequency=1525
|
||||
dpp_clock_ratio=2:3
|
||||
|
||||
oversubscribe_mode=1
|
||||
|
||||
#RIOT Enable
|
||||
riot_enable=1
|
||||
riot_overlay_l3_intf_mem_size=4096
|
||||
riot_overlay_l3_egress_mem_size=32768
|
||||
l3_ecmp_levels=2
|
||||
riot_overlay_ecmp_resilient_hash_size=16384
|
||||
|
||||
pbmp_xport_xe=0x3ffffffffffffffffffffffffffffffffe
|
||||
|
||||
port_flex_enable=1
|
||||
mem_cache_enable=0
|
||||
|
||||
l3_alpm_ipv6_128b_bkt_rsvd=1
|
||||
fpem_mem_entries=0
|
||||
ifp_inports_support_enable=1
|
||||
l2xmsg_mode=1
|
||||
|
||||
# Platform specfic
|
||||
bcm_num_cos=10
|
||||
default_cpu_tx_queue=9
|
||||
bcm_stat_interval=2000000
|
||||
cdma_timeout_usec=3000000
|
||||
ipv6_lpm_128b_enable=0x1
|
||||
l3_max_ecmp_mode=1
|
||||
lpm_scaling_enable=0
|
||||
max_vp_lags=0
|
||||
miim_intr_enable=0
|
||||
module_64ports=1
|
||||
schan_intr_enable=0
|
||||
stable_size=0x5500000
|
||||
tdma_timeout_usec=3000000
|
||||
skip_L2_USER_ENTRY=0
|
||||
bcm_tunnel_term_compatible_mode=1
|
||||
|
||||
phy_an_c73=1
|
||||
# portmap settings
|
||||
|
||||
portmap_1=1:100
|
||||
portmap_5=5:100
|
||||
portmap_9=9:100
|
||||
portmap_13=13:100
|
||||
portmap_17=17:100
|
||||
portmap_21=21:100
|
||||
portmap_25=25:100
|
||||
portmap_29=29:100
|
||||
|
||||
portmap_33=33:100
|
||||
portmap_37=37:100
|
||||
portmap_41=41:100
|
||||
portmap_45=45:100
|
||||
portmap_49=49:100
|
||||
portmap_53=53:100
|
||||
portmap_57=57:100
|
||||
portmap_61=61:100
|
||||
|
||||
portmap_67=65:100
|
||||
portmap_71=69:100
|
||||
portmap_75=73:100
|
||||
portmap_79=77:100
|
||||
portmap_83=81:100
|
||||
portmap_87=85:100
|
||||
portmap_91=89:100
|
||||
portmap_95=93:100
|
||||
|
||||
portmap_99=97:100
|
||||
portmap_103=101:100
|
||||
portmap_107=105:100
|
||||
portmap_111=109:100
|
||||
portmap_115=113:100
|
||||
portmap_119=117:100
|
||||
portmap_123=121:100
|
||||
portmap_127=125:100
|
||||
|
||||
# datapath port -- MerlinCore
|
||||
#Hide these to prevent SAI from initializing them...they are physically not on system
|
||||
#front panel
|
||||
#portmap_66=129:10:m
|
||||
#portmap_130=128:10:m
|
||||
|
||||
# loopback port
|
||||
portmap_65=130:10
|
||||
portmap_131=131:10
|
||||
|
||||
# port order remap
|
||||
dport_map_port_29=1
|
||||
dport_map_port_30=2
|
||||
dport_map_port_31=3
|
||||
dport_map_port_32=4
|
||||
|
||||
dport_map_port_33=5
|
||||
dport_map_port_34=6
|
||||
dport_map_port_35=7
|
||||
dport_map_port_36=8
|
||||
|
||||
dport_map_port_41=9
|
||||
dport_map_port_42=10
|
||||
dport_map_port_43=11
|
||||
dport_map_port_44=12
|
||||
|
||||
dport_map_port_45=13
|
||||
dport_map_port_46=14
|
||||
dport_map_port_47=15
|
||||
dport_map_port_48=16
|
||||
|
||||
dport_map_port_1=17
|
||||
dport_map_port_2=18
|
||||
dport_map_port_3=19
|
||||
dport_map_port_4=20
|
||||
|
||||
dport_map_port_5=21
|
||||
dport_map_port_6=22
|
||||
dport_map_port_7=23
|
||||
dport_map_port_8=24
|
||||
|
||||
dport_map_port_9=25
|
||||
dport_map_port_10=26
|
||||
dport_map_port_11=27
|
||||
dport_map_port_12=28
|
||||
|
||||
dport_map_port_13=29
|
||||
dport_map_port_14=30
|
||||
dport_map_port_15=31
|
||||
dport_map_port_16=32
|
||||
|
||||
dport_map_port_17=33
|
||||
dport_map_port_18=34
|
||||
dport_map_port_19=35
|
||||
dport_map_port_20=36
|
||||
|
||||
dport_map_port_21=37
|
||||
dport_map_port_22=38
|
||||
dport_map_port_23=39
|
||||
dport_map_port_24=40
|
||||
|
||||
dport_map_port_25=41
|
||||
dport_map_port_26=42
|
||||
dport_map_port_27=43
|
||||
dport_map_port_28=44
|
||||
|
||||
dport_map_port_37=45
|
||||
dport_map_port_38=46
|
||||
dport_map_port_39=47
|
||||
dport_map_port_40=48
|
||||
|
||||
dport_map_port_49=49
|
||||
dport_map_port_50=50
|
||||
dport_map_port_51=51
|
||||
dport_map_port_52=52
|
||||
|
||||
dport_map_port_53=53
|
||||
dport_map_port_54=54
|
||||
dport_map_port_55=55
|
||||
dport_map_port_56=56
|
||||
|
||||
dport_map_port_57=57
|
||||
dport_map_port_58=58
|
||||
dport_map_port_59=59
|
||||
dport_map_port_60=60
|
||||
|
||||
dport_map_port_61=61
|
||||
dport_map_port_62=62
|
||||
dport_map_port_63=63
|
||||
dport_map_port_64=64
|
||||
|
||||
dport_map_port_67=65
|
||||
dport_map_port_68=66
|
||||
dport_map_port_69=67
|
||||
dport_map_port_70=68
|
||||
|
||||
dport_map_port_71=69
|
||||
dport_map_port_72=70
|
||||
dport_map_port_73=71
|
||||
dport_map_port_74=72
|
||||
|
||||
dport_map_port_75=73
|
||||
dport_map_port_76=74
|
||||
dport_map_port_77=75
|
||||
dport_map_port_78=76
|
||||
|
||||
dport_map_port_79=77
|
||||
dport_map_port_80=78
|
||||
dport_map_port_81=79
|
||||
dport_map_port_82=80
|
||||
|
||||
dport_map_port_95=81
|
||||
dport_map_port_96=82
|
||||
dport_map_port_97=83
|
||||
dport_map_port_98=84
|
||||
|
||||
dport_map_port_103=85
|
||||
dport_map_port_104=86
|
||||
dport_map_port_105=87
|
||||
dport_map_port_106=88
|
||||
|
||||
dport_map_port_107=89
|
||||
dport_map_port_108=90
|
||||
dport_map_port_109=91
|
||||
dport_map_port_110=92
|
||||
|
||||
dport_map_port_111=93
|
||||
dport_map_port_112=94
|
||||
dport_map_port_113=95
|
||||
dport_map_port_114=96
|
||||
|
||||
dport_map_port_115=97
|
||||
dport_map_port_116=98
|
||||
dport_map_port_117=99
|
||||
dport_map_port_118=100
|
||||
|
||||
dport_map_port_119=101
|
||||
dport_map_port_120=102
|
||||
dport_map_port_121=103
|
||||
dport_map_port_122=104
|
||||
|
||||
dport_map_port_123=105
|
||||
dport_map_port_124=106
|
||||
dport_map_port_125=107
|
||||
dport_map_port_126=108
|
||||
|
||||
dport_map_port_127=109
|
||||
dport_map_port_128=110
|
||||
dport_map_port_129=111
|
||||
dport_map_port_130=112
|
||||
|
||||
dport_map_port_83=113
|
||||
dport_map_port_84=114
|
||||
dport_map_port_85=115
|
||||
dport_map_port_86=116
|
||||
|
||||
dport_map_port_87=117
|
||||
dport_map_port_88=118
|
||||
dport_map_port_89=119
|
||||
dport_map_port_90=120
|
||||
|
||||
dport_map_port_91=121
|
||||
dport_map_port_92=122
|
||||
dport_map_port_93=123
|
||||
dport_map_port_94=124
|
||||
|
||||
dport_map_port_99=125
|
||||
dport_map_port_100=126
|
||||
dport_map_port_101=127
|
||||
dport_map_port_102=128
|
||||
|
||||
dport_map_port_66=129
|
||||
dport_map_port_130=130
|
||||
|
||||
|
||||
### lane swap and polarity follow physical port
|
||||
phy_chain_tx_lane_map_physical{29.0}=0x1230
|
||||
phy_chain_tx_polarity_flip_physical{29.0}=0x1
|
||||
phy_chain_tx_polarity_flip_physical{30.0}=0x0
|
||||
phy_chain_tx_polarity_flip_physical{31.0}=0x1
|
||||
phy_chain_tx_polarity_flip_physical{32.0}=0x1
|
||||
phy_chain_rx_lane_map_physical{29.0}=0x1302
|
||||
phy_chain_rx_polarity_flip_physical{29.0}=0x0
|
||||
phy_chain_rx_polarity_flip_physical{30.0}=0x0
|
||||
phy_chain_rx_polarity_flip_physical{31.0}=0x1
|
||||
phy_chain_rx_polarity_flip_physical{32.0}=0x1
|
||||
|
||||
phy_chain_tx_lane_map_physical{33.0}=0x3210
|
||||
phy_chain_tx_polarity_flip_physical{33.0}=0x1
|
||||
phy_chain_tx_polarity_flip_physical{34.0}=0x1
|
||||
phy_chain_tx_polarity_flip_physical{35.0}=0x1
|
||||
phy_chain_tx_polarity_flip_physical{36.0}=0x1
|
||||
phy_chain_rx_lane_map_physical{33.0}=0x0123
|
||||
phy_chain_rx_polarity_flip_physical{33.0}=0x0
|
||||
phy_chain_rx_polarity_flip_physical{34.0}=0x1
|
||||
phy_chain_rx_polarity_flip_physical{35.0}=0x0
|
||||
phy_chain_rx_polarity_flip_physical{36.0}=0x1
|
||||
|
||||
phy_chain_tx_lane_map_physical{41.0}=0x0213
|
||||
phy_chain_tx_polarity_flip_physical{41.0}=0x0
|
||||
phy_chain_tx_polarity_flip_physical{42.0}=0x1
|
||||
phy_chain_tx_polarity_flip_physical{43.0}=0x1
|
||||
phy_chain_tx_polarity_flip_physical{44.0}=0x0
|
||||
phy_chain_rx_lane_map_physical{41.0}=0x1302
|
||||
phy_chain_rx_polarity_flip_physical{41.0}=0x1
|
||||
phy_chain_rx_polarity_flip_physical{42.0}=0x1
|
||||
phy_chain_rx_polarity_flip_physical{43.0}=0x0
|
||||
phy_chain_rx_polarity_flip_physical{44.0}=0x0
|
||||
|
||||
phy_chain_tx_lane_map_physical{45.0}=0x3210
|
||||
phy_chain_tx_polarity_flip_physical{45.0}=0x1
|
||||
phy_chain_tx_polarity_flip_physical{46.0}=0x1
|
||||
phy_chain_tx_polarity_flip_physical{47.0}=0x1
|
||||
phy_chain_tx_polarity_flip_physical{48.0}=0x1
|
||||
phy_chain_rx_lane_map_physical{45.0}=0x2103
|
||||
phy_chain_rx_polarity_flip_physical{45.0}=0x0
|
||||
phy_chain_rx_polarity_flip_physical{46.0}=0x0
|
||||
phy_chain_rx_polarity_flip_physical{47.0}=0x1
|
||||
phy_chain_rx_polarity_flip_physical{48.0}=0x0
|
||||
|
||||
phy_chain_tx_lane_map_physical{1.0}=0x0213
|
||||
phy_chain_tx_polarity_flip_physical{1.0}=0x0
|
||||
phy_chain_tx_polarity_flip_physical{2.0}=0x1
|
||||
phy_chain_tx_polarity_flip_physical{3.0}=0x1
|
||||
phy_chain_tx_polarity_flip_physical{4.0}=0x0
|
||||
phy_chain_rx_lane_map_physical{1.0}=0x1302
|
||||
phy_chain_rx_polarity_flip_physical{1.0}=0x0
|
||||
phy_chain_rx_polarity_flip_physical{2.0}=0x0
|
||||
phy_chain_rx_polarity_flip_physical{3.0}=0x1
|
||||
phy_chain_rx_polarity_flip_physical{4.0}=0x1
|
||||
|
||||
phy_chain_tx_lane_map_physical{5.0}=0x3210
|
||||
phy_chain_tx_polarity_flip_physical{5.0}=0x1
|
||||
phy_chain_tx_polarity_flip_physical{6.0}=0x1
|
||||
phy_chain_tx_polarity_flip_physical{7.0}=0x1
|
||||
phy_chain_tx_polarity_flip_physical{8.0}=0x1
|
||||
phy_chain_rx_lane_map_physical{5.0}=0x2103
|
||||
phy_chain_rx_polarity_flip_physical{5.0}=0x1
|
||||
phy_chain_rx_polarity_flip_physical{6.0}=0x1
|
||||
phy_chain_rx_polarity_flip_physical{7.0}=0x0
|
||||
phy_chain_rx_polarity_flip_physical{8.0}=0x1
|
||||
|
||||
phy_chain_tx_lane_map_physical{9.0}=0x0213
|
||||
phy_chain_tx_polarity_flip_physical{9.0}=0x0
|
||||
phy_chain_tx_polarity_flip_physical{10.0}=0x1
|
||||
phy_chain_tx_polarity_flip_physical{11.0}=0x1
|
||||
phy_chain_tx_polarity_flip_physical{12.0}=0x0
|
||||
phy_chain_rx_lane_map_physical{9.0}=0x1302
|
||||
phy_chain_rx_polarity_flip_physical{9.0}=0x0
|
||||
phy_chain_rx_polarity_flip_physical{10.0}=0x1
|
||||
phy_chain_rx_polarity_flip_physical{11.0}=0x1
|
||||
phy_chain_rx_polarity_flip_physical{12.0}=0x1
|
||||
|
||||
phy_chain_tx_lane_map_physical{13.0}=0x3210
|
||||
phy_chain_tx_polarity_flip_physical{13.0}=0x1
|
||||
phy_chain_tx_polarity_flip_physical{14.0}=0x1
|
||||
phy_chain_tx_polarity_flip_physical{15.0}=0x1
|
||||
phy_chain_tx_polarity_flip_physical{16.0}=0x1
|
||||
phy_chain_rx_lane_map_physical{13.0}=0x2031
|
||||
phy_chain_rx_polarity_flip_physical{13.0}=0x1
|
||||
phy_chain_rx_polarity_flip_physical{14.0}=0x0
|
||||
phy_chain_rx_polarity_flip_physical{15.0}=0x1
|
||||
phy_chain_rx_polarity_flip_physical{16.0}=0x1
|
||||
|
||||
phy_chain_tx_lane_map_physical{17.0}=0x0123
|
||||
phy_chain_tx_polarity_flip_physical{17.0}=0x0
|
||||
phy_chain_tx_polarity_flip_physical{18.0}=0x0
|
||||
phy_chain_tx_polarity_flip_physical{19.0}=0x1
|
||||
phy_chain_tx_polarity_flip_physical{20.0}=0x1
|
||||
phy_chain_rx_lane_map_physical{17.0}=0x1302
|
||||
phy_chain_rx_polarity_flip_physical{17.0}=0x0
|
||||
phy_chain_rx_polarity_flip_physical{18.0}=0x0
|
||||
phy_chain_rx_polarity_flip_physical{19.0}=0x1
|
||||
phy_chain_rx_polarity_flip_physical{20.0}=0x1
|
||||
|
||||
phy_chain_tx_lane_map_physical{21.0}=0x3210
|
||||
phy_chain_tx_polarity_flip_physical{21.0}=0x1
|
||||
phy_chain_tx_polarity_flip_physical{22.0}=0x1
|
||||
phy_chain_tx_polarity_flip_physical{23.0}=0x1
|
||||
phy_chain_tx_polarity_flip_physical{24.0}=0x1
|
||||
phy_chain_rx_lane_map_physical{21.0}=0x1032
|
||||
phy_chain_rx_polarity_flip_physical{21.0}=0x0
|
||||
phy_chain_rx_polarity_flip_physical{22.0}=0x1
|
||||
phy_chain_rx_polarity_flip_physical{23.0}=0x1
|
||||
phy_chain_rx_polarity_flip_physical{24.0}=0x0
|
||||
|
||||
phy_chain_tx_lane_map_physical{25.0}=0x0213
|
||||
phy_chain_tx_polarity_flip_physical{25.0}=0x1
|
||||
phy_chain_tx_polarity_flip_physical{26.0}=0x0
|
||||
phy_chain_tx_polarity_flip_physical{27.0}=0x0
|
||||
phy_chain_tx_polarity_flip_physical{28.0}=0x1
|
||||
phy_chain_rx_lane_map_physical{25.0}=0x1302
|
||||
phy_chain_rx_polarity_flip_physical{25.0}=0x1
|
||||
phy_chain_rx_polarity_flip_physical{26.0}=0x1
|
||||
phy_chain_rx_polarity_flip_physical{27.0}=0x0
|
||||
phy_chain_rx_polarity_flip_physical{28.0}=0x0
|
||||
|
||||
phy_chain_tx_lane_map_physical{37.0}=0x3210
|
||||
phy_chain_tx_polarity_flip_physical{37.0}=0x1
|
||||
phy_chain_tx_polarity_flip_physical{38.0}=0x1
|
||||
phy_chain_tx_polarity_flip_physical{39.0}=0x1
|
||||
phy_chain_tx_polarity_flip_physical{40.0}=0x1
|
||||
phy_chain_rx_lane_map_physical{37.0}=0x2103
|
||||
phy_chain_rx_polarity_flip_physical{37.0}=0x0
|
||||
phy_chain_rx_polarity_flip_physical{38.0}=0x0
|
||||
phy_chain_rx_polarity_flip_physical{39.0}=0x1
|
||||
phy_chain_rx_polarity_flip_physical{40.0}=0x0
|
||||
|
||||
phy_chain_tx_lane_map_physical{49.0}=0x0213
|
||||
phy_chain_tx_polarity_flip_physical{49.0}=0x1
|
||||
phy_chain_tx_polarity_flip_physical{50.0}=0x0
|
||||
phy_chain_tx_polarity_flip_physical{51.0}=0x0
|
||||
phy_chain_tx_polarity_flip_physical{52.0}=0x1
|
||||
phy_chain_rx_lane_map_physical{49.0}=0x1302
|
||||
phy_chain_rx_polarity_flip_physical{49.0}=0x1
|
||||
phy_chain_rx_polarity_flip_physical{50.0}=0x1
|
||||
phy_chain_rx_polarity_flip_physical{51.0}=0x0
|
||||
phy_chain_rx_polarity_flip_physical{52.0}=0x0
|
||||
|
||||
phy_chain_tx_lane_map_physical{53.0}=0x3210
|
||||
phy_chain_tx_polarity_flip_physical{53.0}=0x0
|
||||
phy_chain_tx_polarity_flip_physical{54.0}=0x0
|
||||
phy_chain_tx_polarity_flip_physical{55.0}=0x0
|
||||
phy_chain_tx_polarity_flip_physical{56.0}=0x0
|
||||
phy_chain_rx_lane_map_physical{53.0}=0x2103
|
||||
phy_chain_rx_polarity_flip_physical{53.0}=0x0
|
||||
phy_chain_rx_polarity_flip_physical{54.0}=0x0
|
||||
phy_chain_rx_polarity_flip_physical{55.0}=0x1
|
||||
phy_chain_rx_polarity_flip_physical{56.0}=0x0
|
||||
|
||||
phy_chain_tx_lane_map_physical{57.0}=0x0213
|
||||
phy_chain_tx_polarity_flip_physical{57.0}=0x0
|
||||
phy_chain_tx_polarity_flip_physical{58.0}=0x1
|
||||
phy_chain_tx_polarity_flip_physical{59.0}=0x1
|
||||
phy_chain_tx_polarity_flip_physical{60.0}=0x0
|
||||
phy_chain_rx_lane_map_physical{57.0}=0x1302
|
||||
phy_chain_rx_polarity_flip_physical{57.0}=0x1
|
||||
phy_chain_rx_polarity_flip_physical{58.0}=0x1
|
||||
phy_chain_rx_polarity_flip_physical{59.0}=0x0
|
||||
phy_chain_rx_polarity_flip_physical{60.0}=0x0
|
||||
|
||||
phy_chain_tx_lane_map_physical{61.0}=0x3210
|
||||
phy_chain_tx_polarity_flip_physical{61.0}=0x1
|
||||
phy_chain_tx_polarity_flip_physical{62.0}=0x1
|
||||
phy_chain_tx_polarity_flip_physical{63.0}=0x1
|
||||
phy_chain_tx_polarity_flip_physical{64.0}=0x1
|
||||
phy_chain_rx_lane_map_physical{61.0}=0x2103
|
||||
phy_chain_rx_polarity_flip_physical{61.0}=0x0
|
||||
phy_chain_rx_polarity_flip_physical{62.0}=0x0
|
||||
phy_chain_rx_polarity_flip_physical{63.0}=0x1
|
||||
phy_chain_rx_polarity_flip_physical{64.0}=0x0
|
||||
|
||||
phy_chain_tx_lane_map_physical{65.0}=0x3210
|
||||
phy_chain_tx_polarity_flip_physical{65.0}=0x0
|
||||
phy_chain_tx_polarity_flip_physical{66.0}=0x0
|
||||
phy_chain_tx_polarity_flip_physical{67.0}=0x1
|
||||
phy_chain_tx_polarity_flip_physical{68.0}=0x1
|
||||
phy_chain_rx_lane_map_physical{65.0}=0x3120
|
||||
phy_chain_rx_polarity_flip_physical{65.0}=0x0
|
||||
phy_chain_rx_polarity_flip_physical{66.0}=0x0
|
||||
phy_chain_rx_polarity_flip_physical{67.0}=0x1
|
||||
phy_chain_rx_polarity_flip_physical{68.0}=0x1
|
||||
|
||||
phy_chain_tx_lane_map_physical{69.0}=0x0123
|
||||
phy_chain_tx_polarity_flip_physical{69.0}=0x0
|
||||
phy_chain_tx_polarity_flip_physical{70.0}=0x0
|
||||
phy_chain_tx_polarity_flip_physical{71.0}=0x0
|
||||
phy_chain_tx_polarity_flip_physical{72.0}=0x0
|
||||
phy_chain_rx_lane_map_physical{69.0}=0x2301
|
||||
phy_chain_rx_polarity_flip_physical{69.0}=0x1
|
||||
phy_chain_rx_polarity_flip_physical{70.0}=0x0
|
||||
phy_chain_rx_polarity_flip_physical{71.0}=0x0
|
||||
phy_chain_rx_polarity_flip_physical{72.0}=0x0
|
||||
|
||||
phy_chain_tx_lane_map_physical{73.0}=0x3120
|
||||
phy_chain_tx_polarity_flip_physical{73.0}=0x1
|
||||
phy_chain_tx_polarity_flip_physical{74.0}=0x0
|
||||
phy_chain_tx_polarity_flip_physical{75.0}=0x0
|
||||
phy_chain_tx_polarity_flip_physical{76.0}=0x1
|
||||
phy_chain_rx_lane_map_physical{73.0}=0x3120
|
||||
phy_chain_rx_polarity_flip_physical{73.0}=0x0
|
||||
phy_chain_rx_polarity_flip_physical{74.0}=0x0
|
||||
phy_chain_rx_polarity_flip_physical{75.0}=0x1
|
||||
phy_chain_rx_polarity_flip_physical{76.0}=0x1
|
||||
|
||||
phy_chain_tx_lane_map_physical{77.0}=0x0213
|
||||
phy_chain_tx_polarity_flip_physical{77.0}=0x1
|
||||
phy_chain_tx_polarity_flip_physical{78.0}=0x0
|
||||
phy_chain_tx_polarity_flip_physical{79.0}=0x0
|
||||
phy_chain_tx_polarity_flip_physical{80.0}=0x1
|
||||
phy_chain_rx_lane_map_physical{77.0}=0x0321
|
||||
phy_chain_rx_polarity_flip_physical{77.0}=0x1
|
||||
phy_chain_rx_polarity_flip_physical{78.0}=0x1
|
||||
phy_chain_rx_polarity_flip_physical{79.0}=0x0
|
||||
phy_chain_rx_polarity_flip_physical{80.0}=0x1
|
||||
|
||||
phy_chain_tx_lane_map_physical{93.0}=0x3120
|
||||
phy_chain_tx_polarity_flip_physical{93.0}=0x1
|
||||
phy_chain_tx_polarity_flip_physical{94.0}=0x0
|
||||
phy_chain_tx_polarity_flip_physical{95.0}=0x0
|
||||
phy_chain_tx_polarity_flip_physical{96.0}=0x1
|
||||
phy_chain_rx_lane_map_physical{93.0}=0x3120
|
||||
phy_chain_rx_polarity_flip_physical{93.0}=0x1
|
||||
phy_chain_rx_polarity_flip_physical{94.0}=0x1
|
||||
phy_chain_rx_polarity_flip_physical{95.0}=0x0
|
||||
phy_chain_rx_polarity_flip_physical{96.0}=0x0
|
||||
|
||||
phy_chain_tx_lane_map_physical{101.0}=0x0321
|
||||
phy_chain_tx_polarity_flip_physical{101.0}=0x0
|
||||
phy_chain_tx_polarity_flip_physical{102.0}=0x1
|
||||
phy_chain_tx_polarity_flip_physical{103.0}=0x1
|
||||
phy_chain_tx_polarity_flip_physical{104.0}=0x1
|
||||
phy_chain_rx_lane_map_physical{101.0}=0x0321
|
||||
phy_chain_rx_polarity_flip_physical{101.0}=0x1
|
||||
phy_chain_rx_polarity_flip_physical{102.0}=0x1
|
||||
phy_chain_rx_polarity_flip_physical{103.0}=0x0
|
||||
phy_chain_rx_polarity_flip_physical{104.0}=0x1
|
||||
|
||||
phy_chain_tx_lane_map_physical{105.0}=0x3120
|
||||
phy_chain_tx_polarity_flip_physical{105.0}=0x1
|
||||
phy_chain_tx_polarity_flip_physical{106.0}=0x0
|
||||
phy_chain_tx_polarity_flip_physical{107.0}=0x0
|
||||
phy_chain_tx_polarity_flip_physical{108.0}=0x1
|
||||
phy_chain_rx_lane_map_physical{105.0}=0x3120
|
||||
phy_chain_rx_polarity_flip_physical{105.0}=0x1
|
||||
phy_chain_rx_polarity_flip_physical{106.0}=0x1
|
||||
phy_chain_rx_polarity_flip_physical{107.0}=0x0
|
||||
phy_chain_rx_polarity_flip_physical{108.0}=0x0
|
||||
|
||||
phy_chain_tx_lane_map_physical{109.0}=0x0123
|
||||
phy_chain_tx_polarity_flip_physical{109.0}=0x1
|
||||
phy_chain_tx_polarity_flip_physical{110.0}=0x1
|
||||
phy_chain_tx_polarity_flip_physical{111.0}=0x1
|
||||
phy_chain_tx_polarity_flip_physical{112.0}=0x1
|
||||
phy_chain_rx_lane_map_physical{109.0}=0x0321
|
||||
phy_chain_rx_polarity_flip_physical{109.0}=0x0
|
||||
phy_chain_rx_polarity_flip_physical{110.0}=0x0
|
||||
phy_chain_rx_polarity_flip_physical{111.0}=0x1
|
||||
phy_chain_rx_polarity_flip_physical{112.0}=0x0
|
||||
|
||||
phy_chain_tx_lane_map_physical{113.0}=0x0312
|
||||
phy_chain_tx_polarity_flip_physical{113.0}=0x0
|
||||
phy_chain_tx_polarity_flip_physical{114.0}=0x0
|
||||
phy_chain_tx_polarity_flip_physical{115.0}=0x1
|
||||
phy_chain_tx_polarity_flip_physical{116.0}=0x0
|
||||
phy_chain_rx_lane_map_physical{113.0}=0x3120
|
||||
phy_chain_rx_polarity_flip_physical{113.0}=0x1
|
||||
phy_chain_rx_polarity_flip_physical{114.0}=0x1
|
||||
phy_chain_rx_polarity_flip_physical{115.0}=0x0
|
||||
phy_chain_rx_polarity_flip_physical{116.0}=0x1
|
||||
|
||||
phy_chain_tx_lane_map_physical{117.0}=0x0123
|
||||
phy_chain_tx_polarity_flip_physical{117.0}=0x1
|
||||
phy_chain_tx_polarity_flip_physical{118.0}=0x1
|
||||
phy_chain_tx_polarity_flip_physical{119.0}=0x1
|
||||
phy_chain_tx_polarity_flip_physical{120.0}=0x1
|
||||
phy_chain_rx_lane_map_physical{117.0}=0x1320
|
||||
phy_chain_rx_polarity_flip_physical{117.0}=0x1
|
||||
phy_chain_rx_polarity_flip_physical{118.0}=0x1
|
||||
phy_chain_rx_polarity_flip_physical{119.0}=0x1
|
||||
phy_chain_rx_polarity_flip_physical{120.0}=0x0
|
||||
|
||||
phy_chain_tx_lane_map_physical{121.0}=0x3120
|
||||
phy_chain_tx_polarity_flip_physical{121.0}=0x1
|
||||
phy_chain_tx_polarity_flip_physical{122.0}=0x0
|
||||
phy_chain_tx_polarity_flip_physical{123.0}=0x0
|
||||
phy_chain_tx_polarity_flip_physical{124.0}=0x1
|
||||
phy_chain_rx_lane_map_physical{121.0}=0x0123
|
||||
phy_chain_rx_polarity_flip_physical{121.0}=0x0
|
||||
phy_chain_rx_polarity_flip_physical{122.0}=0x1
|
||||
phy_chain_rx_polarity_flip_physical{123.0}=0x0
|
||||
phy_chain_rx_polarity_flip_physical{124.0}=0x1
|
||||
|
||||
phy_chain_tx_lane_map_physical{125.0}=0x0123
|
||||
phy_chain_tx_polarity_flip_physical{125.0}=0x0
|
||||
phy_chain_tx_polarity_flip_physical{126.0}=0x0
|
||||
phy_chain_tx_polarity_flip_physical{127.0}=0x0
|
||||
phy_chain_tx_polarity_flip_physical{128.0}=0x0
|
||||
phy_chain_rx_lane_map_physical{125.0}=0x0321
|
||||
phy_chain_rx_polarity_flip_physical{125.0}=0x0
|
||||
phy_chain_rx_polarity_flip_physical{126.0}=0x0
|
||||
phy_chain_rx_polarity_flip_physical{127.0}=0x1
|
||||
phy_chain_rx_polarity_flip_physical{128.0}=0x0
|
||||
|
||||
phy_chain_tx_lane_map_physical{81.0}=0x3201
|
||||
phy_chain_tx_polarity_flip_physical{81.0}=0x0
|
||||
phy_chain_tx_polarity_flip_physical{82.0}=0x1
|
||||
phy_chain_tx_polarity_flip_physical{83.0}=0x1
|
||||
phy_chain_tx_polarity_flip_physical{84.0}=0x1
|
||||
phy_chain_rx_lane_map_physical{81.0}=0x3120
|
||||
phy_chain_rx_polarity_flip_physical{81.0}=0x0
|
||||
phy_chain_rx_polarity_flip_physical{82.0}=0x0
|
||||
phy_chain_rx_polarity_flip_physical{83.0}=0x1
|
||||
phy_chain_rx_polarity_flip_physical{84.0}=0x0
|
||||
|
||||
phy_chain_tx_lane_map_physical{85.0}=0x0123
|
||||
phy_chain_tx_polarity_flip_physical{85.0}=0x1
|
||||
phy_chain_tx_polarity_flip_physical{86.0}=0x1
|
||||
phy_chain_tx_polarity_flip_physical{87.0}=0x1
|
||||
phy_chain_tx_polarity_flip_physical{88.0}=0x1
|
||||
phy_chain_rx_lane_map_physical{85.0}=0x0321
|
||||
phy_chain_rx_polarity_flip_physical{85.0}=0x1
|
||||
phy_chain_rx_polarity_flip_physical{86.0}=0x1
|
||||
phy_chain_rx_polarity_flip_physical{87.0}=0x0
|
||||
phy_chain_rx_polarity_flip_physical{88.0}=0x1
|
||||
|
||||
phy_chain_tx_lane_map_physical{89.0}=0x3210
|
||||
phy_chain_tx_polarity_flip_physical{89.0}=0x1
|
||||
phy_chain_tx_polarity_flip_physical{90.0}=0x1
|
||||
phy_chain_tx_polarity_flip_physical{91.0}=0x1
|
||||
phy_chain_tx_polarity_flip_physical{92.0}=0x1
|
||||
phy_chain_rx_lane_map_physical{89.0}=0x0123
|
||||
phy_chain_rx_polarity_flip_physical{89.0}=0x1
|
||||
phy_chain_rx_polarity_flip_physical{90.0}=0x0
|
||||
phy_chain_rx_polarity_flip_physical{91.0}=0x1
|
||||
phy_chain_rx_polarity_flip_physical{92.0}=0x0
|
||||
|
||||
phy_chain_tx_lane_map_physical{97.0}=0x0312
|
||||
phy_chain_tx_polarity_flip_physical{97.0}=0x0
|
||||
phy_chain_tx_polarity_flip_physical{98.0}=0x0
|
||||
phy_chain_tx_polarity_flip_physical{99.0}=0x1
|
||||
phy_chain_tx_polarity_flip_physical{100.0}=0x1
|
||||
phy_chain_rx_lane_map_physical{97.0}=0x0321
|
||||
phy_chain_rx_polarity_flip_physical{97.0}=0x1
|
||||
phy_chain_rx_polarity_flip_physical{98.0}=0x0
|
||||
phy_chain_rx_polarity_flip_physical{99.0}=0x1
|
||||
phy_chain_rx_polarity_flip_physical{100.0}=0x0
|
||||
|
||||
|
||||
l2_mem_entries=40960
|
||||
l3_mem_entries=40960
|
||||
l3_alpm_enable=2
|
||||
use_all_splithorizon_groups=1
|
||||
BIN
device/quanta/x86_64-quanta_ix7_bwde-r0/custom_led.bin
Normal file
BIN
device/quanta/x86_64-quanta_ix7_bwde-r0/custom_led.bin
Normal file
Binary file not shown.
1
device/quanta/x86_64-quanta_ix7_bwde-r0/default_sku
Normal file
1
device/quanta/x86_64-quanta_ix7_bwde-r0/default_sku
Normal file
@ -0,0 +1 @@
|
||||
Quanta-IX7-BWDE-32X t1
|
||||
4
device/quanta/x86_64-quanta_ix7_bwde-r0/installer.conf
Normal file
4
device/quanta/x86_64-quanta_ix7_bwde-r0/installer.conf
Normal file
@ -0,0 +1,4 @@
|
||||
CONSOLE_PORT=0x3f8
|
||||
CONSOLE_DEV=0
|
||||
CONSOLE_SPEED=115200
|
||||
|
||||
@ -0,0 +1,4 @@
|
||||
m0 load 0 0x3800 /usr/share/sonic/platform/custom_led.bin
|
||||
led start
|
||||
|
||||
rcload /usr/share/sonic/platform/preemphasis-32x100G.soc
|
||||
12
device/quanta/x86_64-quanta_ix7_bwde-r0/plugins/eeprom.py
Normal file
12
device/quanta/x86_64-quanta_ix7_bwde-r0/plugins/eeprom.py
Normal file
@ -0,0 +1,12 @@
|
||||
try:
|
||||
from sonic_eeprom import eeprom_tlvinfo
|
||||
except ImportError as e:
|
||||
raise ImportError(str(e) + "- required module not found")
|
||||
|
||||
|
||||
class board(eeprom_tlvinfo.TlvInfoDecoder):
|
||||
_TLV_INFO_MAX_LEN = 256
|
||||
|
||||
def __init__(self, name, path, cpld_root, ro):
|
||||
self.eeprom_path = "/sys/bus/i2c/devices/3-0054/eeprom"
|
||||
super(board, self).__init__(self.eeprom_path, 0, '', True)
|
||||
110
device/quanta/x86_64-quanta_ix7_bwde-r0/plugins/fanutil.py
Normal file
110
device/quanta/x86_64-quanta_ix7_bwde-r0/plugins/fanutil.py
Normal file
@ -0,0 +1,110 @@
|
||||
#
|
||||
# fanutil.py
|
||||
# Platform-specific Fan status interface for SONiC
|
||||
#
|
||||
|
||||
import logging
|
||||
import os.path
|
||||
|
||||
try:
|
||||
from sonic_fan.fan_base import FanBase
|
||||
except ImportError as e:
|
||||
raise ImportError (str(e) + "- required module not found")
|
||||
|
||||
class FanUtil(FanBase):
|
||||
"""Platform-specific FANutil class"""
|
||||
|
||||
SYS_FAN_NUM = 6
|
||||
NUM_FANS_PERTRAY = 2
|
||||
HWMON_PATH = '/sys/class/hwmon/hwmon2/'
|
||||
FAN_INDEX_START = 18
|
||||
|
||||
logger = logging.getLogger(__name__)
|
||||
|
||||
def __init__(self, log_level=logging.DEBUG):
|
||||
FanBase.__init__(self)
|
||||
self.num_fans = (self.SYS_FAN_NUM * self.NUM_FANS_PERTRAY)
|
||||
|
||||
# Get sysfs attribute
|
||||
def get_attr_value(self, attr_path):
|
||||
|
||||
retval = 'ERR'
|
||||
if (not os.path.isfile(attr_path)):
|
||||
return retval
|
||||
|
||||
try:
|
||||
with open(attr_path, 'r') as fd:
|
||||
retval = fd.read()
|
||||
except Exception:
|
||||
logging.error("Unable to open ", attr_path, " file !")
|
||||
|
||||
retval = retval.rstrip('\r\n')
|
||||
return retval
|
||||
|
||||
def check_fan_index(self, index):
|
||||
if index is None:
|
||||
return False
|
||||
|
||||
if index < 1 or index > self.num_fans:
|
||||
logging.error("Invalid Fan index:", index)
|
||||
return False
|
||||
|
||||
return True
|
||||
|
||||
def get_num_fans(self):
|
||||
return self.num_fans
|
||||
|
||||
def get_status(self, index):
|
||||
if self.check_fan_index(index) == False:
|
||||
return False
|
||||
|
||||
fantray_speed_file = 'fan' + str(self.FAN_INDEX_START+(index-1)) + '_input'
|
||||
fantray_speed = self.get_attr_value(self.HWMON_PATH + fantray_speed_file)
|
||||
|
||||
if fantray_speed == '0.0' :
|
||||
return False
|
||||
|
||||
return True
|
||||
|
||||
def get_presence(self, index):
|
||||
if self.check_fan_index(index) == False:
|
||||
return False
|
||||
|
||||
fantray_present_file = 'fan' + str(self.FAN_INDEX_START+(index-1)) + '_present'
|
||||
fantray_present = self.get_attr_value(self.HWMON_PATH + fantray_present_file)
|
||||
|
||||
if fantray_present == '1' :
|
||||
return True
|
||||
|
||||
return False
|
||||
|
||||
def get_direction(self, index):
|
||||
if self.check_fan_index(index) == False:
|
||||
return None
|
||||
|
||||
fantray_direction_file = 'fan' + str(self.FAN_INDEX_START+(index-1)) + '_direction'
|
||||
fantray_direction = self.get_attr_value(self.HWMON_PATH + fantray_direction_file)
|
||||
|
||||
"""
|
||||
1: FB 2: BF
|
||||
Since the fan is at rear of the switch, FB means Exhaust; BF means Intake
|
||||
"""
|
||||
if fantray_direction == '2':
|
||||
return "INTAKE"
|
||||
else:
|
||||
return "EXHAUST"
|
||||
|
||||
def get_speed(self, index):
|
||||
if self.check_fan_index(index) == False:
|
||||
return 0
|
||||
|
||||
fantray_speed_file = 'fan' + str(self.FAN_INDEX_START+(index-1)) + '_input'
|
||||
fantray_speed = self.get_attr_value(self.HWMON_PATH + fantray_speed_file)
|
||||
|
||||
return int(float(fantray_speed))
|
||||
|
||||
|
||||
def set_speed(self, val):
|
||||
logging.error("Not allowed to set fan speed!")
|
||||
|
||||
return False
|
||||
251
device/quanta/x86_64-quanta_ix7_bwde-r0/plugins/psuutil.py
Normal file
251
device/quanta/x86_64-quanta_ix7_bwde-r0/plugins/psuutil.py
Normal file
@ -0,0 +1,251 @@
|
||||
#
|
||||
# psuutil.py
|
||||
# Platform-specific PSU status interface for SONiC
|
||||
#
|
||||
|
||||
import logging
|
||||
import os.path
|
||||
|
||||
try:
|
||||
from sonic_psu.psu_base import PsuBase
|
||||
except ImportError as e:
|
||||
raise ImportError(str(e) + "- required module not found")
|
||||
|
||||
|
||||
class PsuUtil(PsuBase):
|
||||
"""Platform-specific PSUutil class"""
|
||||
|
||||
HWMON_PATH = '/sys/class/hwmon/hwmon2/'
|
||||
PSU1_PREFIX = 'power39_'
|
||||
PSU2_PREFIX = 'power49_'
|
||||
MAX_PSUS = 2
|
||||
def __init__(self):
|
||||
PsuBase.__init__(self)
|
||||
|
||||
# Get sysfs attribute
|
||||
def get_attr_value(self, attr_path):
|
||||
|
||||
retval = 'ERR'
|
||||
if (not os.path.isfile(attr_path)):
|
||||
return retval
|
||||
|
||||
try:
|
||||
with open(attr_path, 'r') as fd:
|
||||
retval = fd.read()
|
||||
except Exception:
|
||||
logging.error("Unable to open ", attr_path, " file !")
|
||||
|
||||
retval = retval.rstrip('\r\n')
|
||||
return retval
|
||||
|
||||
def get_attr_filename(self, index, attr):
|
||||
if (index == 1):
|
||||
attr_file = self.PSU1_PREFIX + attr
|
||||
elif (index == 2):
|
||||
attr_file = self.PSU2_PREFIX + attr
|
||||
else:
|
||||
logging.error("Invalid PSU number:", index)
|
||||
return ''
|
||||
|
||||
return attr_file
|
||||
|
||||
def get_num_psus(self):
|
||||
"""
|
||||
Retrieves the number of PSUs available on the device
|
||||
:return: An integer, the number of PSUs available on the device
|
||||
"""
|
||||
|
||||
return self.MAX_PSUS
|
||||
|
||||
def get_psu_status(self, index):
|
||||
"""
|
||||
Retrieves the oprational status of power supply unit (PSU) defined
|
||||
by index <index>
|
||||
:param index: An integer, index of the PSU of which to query status
|
||||
:return: Boolean, True if PSU is operating properly, False if PSU is\
|
||||
faulty
|
||||
"""
|
||||
status = False
|
||||
|
||||
attr_filename = self.get_attr_filename(index, 'input')
|
||||
if attr_filename == '':
|
||||
return status
|
||||
|
||||
attr_path = self.HWMON_PATH + attr_filename
|
||||
attr_value = self.get_attr_value(attr_path)
|
||||
|
||||
if (attr_value != 'ERR'):
|
||||
attr_value = float(attr_value)
|
||||
|
||||
# Check PSU status
|
||||
if (attr_value != 0.0):
|
||||
status = True
|
||||
|
||||
return status
|
||||
|
||||
def get_psu_presence(self, index):
|
||||
"""
|
||||
Retrieves the presence status of power supply unit (PSU) defined
|
||||
by index <index>
|
||||
:param index: An integer, index of the PSU of which to query status
|
||||
:return: Boolean, True if PSU is plugged, False if not
|
||||
"""
|
||||
status = False
|
||||
|
||||
attr_filename = self.get_attr_filename(index, 'present')
|
||||
if attr_filename == '':
|
||||
return status
|
||||
|
||||
attr_path = self.HWMON_PATH + attr_filename
|
||||
attr_value = self.get_attr_value(attr_path)
|
||||
|
||||
if (attr_value != 'ERR'):
|
||||
attr_value = int(attr_value, 16)
|
||||
# Check PSU status
|
||||
if (attr_value == 1):
|
||||
status = True
|
||||
return status
|
||||
|
||||
def get_powergood_status(self, index):
|
||||
status = False
|
||||
|
||||
attr_filename = self.get_attr_filename(index, 'input')
|
||||
if attr_filename == '':
|
||||
return status
|
||||
|
||||
attr_path = self.HWMON_PATH + attr_filename
|
||||
attr_value = self.get_attr_value(attr_path)
|
||||
|
||||
if (attr_value != 'ERR'):
|
||||
attr_value = float(attr_value)
|
||||
|
||||
# Check PSU status
|
||||
if (attr_value != 0.0):
|
||||
status = True
|
||||
|
||||
return status
|
||||
|
||||
def get_model(self, index):
|
||||
attr_filename = self.get_attr_filename(index, 'model')
|
||||
if attr_filename == '':
|
||||
return None
|
||||
|
||||
attr_path = self.HWMON_PATH + attr_filename
|
||||
attr_value = self.get_attr_value(attr_path)
|
||||
|
||||
if (attr_value != 'ERR'):
|
||||
return attr_value.rstrip()
|
||||
|
||||
def get_mfr_id(self, index):
|
||||
attr_filename = self.get_attr_filename(index, 'mfrid')
|
||||
if attr_filename == '':
|
||||
return None
|
||||
|
||||
attr_path = self.HWMON_PATH + attr_filename
|
||||
attr_value = self.get_attr_value(attr_path)
|
||||
|
||||
if (attr_value != 'ERR'):
|
||||
return attr_value.rstrip()
|
||||
|
||||
def get_serial(self, index):
|
||||
attr_filename = self.get_attr_filename(index, 'sn')
|
||||
if attr_filename == '':
|
||||
return None
|
||||
|
||||
attr_path = self.HWMON_PATH + attr_filename
|
||||
attr_value = self.get_attr_value(attr_path)
|
||||
|
||||
if (attr_value != 'ERR'):
|
||||
return attr_value.rstrip()
|
||||
|
||||
def get_direction(self, index):
|
||||
if (index == 1):
|
||||
direction_file = 'fan37_direction'
|
||||
elif (index == 2):
|
||||
direction_file = 'fan47_direction'
|
||||
else:
|
||||
logging.error("Invalid PSU number:", index)
|
||||
return None
|
||||
|
||||
direction = self.get_attr_value(self.HWMON_PATH + direction_file)
|
||||
direction = direction.rstrip()
|
||||
|
||||
"""
|
||||
1: FB 2: BF
|
||||
Since the fan is at rear of the switch, FB means Exhaust; BF means Intake
|
||||
"""
|
||||
if direction == '2':
|
||||
return "INTAKE"
|
||||
else:
|
||||
return "EXHAUST"
|
||||
|
||||
def get_output_voltage(self, index):
|
||||
if (index == 1):
|
||||
attr_file = 'in44_input'
|
||||
elif (index == 2):
|
||||
attr_file = 'in54_input'
|
||||
else:
|
||||
logging.error("Invalid PSU number:", index)
|
||||
return 0.0
|
||||
|
||||
voltage = self.get_attr_value(self.HWMON_PATH + attr_file)
|
||||
voltage = voltage.rstrip()
|
||||
|
||||
if (voltage != 'ERR'):
|
||||
voltage, dummy = voltage.split('.', 1)
|
||||
else:
|
||||
return 0.0
|
||||
|
||||
return float(voltage)/1000
|
||||
|
||||
def get_output_current(self, index):
|
||||
if (index == 1):
|
||||
attr_file = 'curr36_input'
|
||||
elif (index == 2):
|
||||
attr_file = 'curr46_input'
|
||||
else:
|
||||
logging.error("Invalid PSU number:", index)
|
||||
return 0.0
|
||||
|
||||
current = self.get_attr_value(self.HWMON_PATH + attr_file)
|
||||
current = current.rstrip()
|
||||
|
||||
if (current != 'ERR'):
|
||||
current, dummy = current.split('.',1)
|
||||
else:
|
||||
return 0.0
|
||||
|
||||
return float(current)/1000
|
||||
|
||||
def get_output_power(self, index):
|
||||
attr_filename = self.get_attr_filename(index, 'input')
|
||||
if attr_filename == '':
|
||||
return 0.0
|
||||
|
||||
attr_path = self.HWMON_PATH + attr_filename
|
||||
attr_value = self.get_attr_value(attr_path)
|
||||
|
||||
if (attr_value != 'ERR'):
|
||||
attr_value = float(attr_value)
|
||||
else:
|
||||
return 0.0
|
||||
|
||||
return float(attr_value/1000)
|
||||
|
||||
def get_fan_rpm(self, index, fan_idx):
|
||||
if (index == 1):
|
||||
rpm_file = 'fan37_input'
|
||||
elif (index == 2):
|
||||
rpm_file = 'fan47_input'
|
||||
else:
|
||||
logging.error("Invalid PSU number:", index)
|
||||
return 0
|
||||
|
||||
rpm = self.get_attr_value(self.HWMON_PATH + rpm_file)
|
||||
rpm = rpm.rstrip()
|
||||
if (rpm != 'ERR'):
|
||||
rpm = float(rpm)
|
||||
else:
|
||||
return 0
|
||||
|
||||
return int(rpm)
|
||||
172
device/quanta/x86_64-quanta_ix7_bwde-r0/plugins/sfputil.py
Normal file
172
device/quanta/x86_64-quanta_ix7_bwde-r0/plugins/sfputil.py
Normal file
@ -0,0 +1,172 @@
|
||||
# sfputil.py
|
||||
#
|
||||
# Platform-specific SFP transceiver interface for SONiC
|
||||
#
|
||||
|
||||
try:
|
||||
import time
|
||||
from sonic_sfp.sfputilbase import SfpUtilBase
|
||||
except ImportError as e:
|
||||
raise ImportError("%s - required module not found" % str(e))
|
||||
|
||||
|
||||
class SfpUtil(SfpUtilBase):
|
||||
"""Platform-specific SfpUtil class"""
|
||||
|
||||
PORT_START = 1
|
||||
PORT_END = 32
|
||||
PORTS_IN_BLOCK = 32
|
||||
|
||||
_port_to_eeprom_mapping = {}
|
||||
_port_to_i2c_mapping = {
|
||||
1 : 13,
|
||||
2 : 14,
|
||||
3 : 15,
|
||||
4 : 16,
|
||||
5 : 17,
|
||||
6 : 18,
|
||||
7 : 19,
|
||||
8 : 20,
|
||||
9 : 21,
|
||||
10 : 22,
|
||||
11 : 23,
|
||||
12 : 24,
|
||||
13 : 25,
|
||||
14 : 26,
|
||||
15 : 27,
|
||||
16 : 28,
|
||||
17 : 29,
|
||||
18 : 30,
|
||||
19 : 31,
|
||||
20 : 32,
|
||||
21 : 33,
|
||||
22 : 34,
|
||||
23 : 35,
|
||||
24 : 36,
|
||||
25 : 37,
|
||||
26 : 38,
|
||||
27 : 39,
|
||||
28 : 40,
|
||||
29 : 41,
|
||||
30 : 42,
|
||||
31 : 43,
|
||||
32 : 44
|
||||
}
|
||||
|
||||
@property
|
||||
def port_start(self):
|
||||
return self.PORT_START
|
||||
|
||||
@property
|
||||
def port_end(self):
|
||||
return self.PORT_END
|
||||
|
||||
@property
|
||||
def qsfp_ports(self):
|
||||
return list(range(self.PORT_START, self.PORTS_IN_BLOCK + 1))
|
||||
|
||||
@property
|
||||
def port_to_eeprom_mapping(self):
|
||||
return self._port_to_eeprom_mapping
|
||||
|
||||
def __init__(self):
|
||||
eeprom_path = '/sys/bus/i2c/devices/{0}-0050/eeprom'
|
||||
for x in range(self.port_start, self.port_end+1):
|
||||
self.port_to_eeprom_mapping[x] = eeprom_path.format(self._port_to_i2c_mapping[x])
|
||||
SfpUtilBase.__init__(self)
|
||||
|
||||
def get_presence(self, port_num):
|
||||
# Check for invalid port_num
|
||||
if port_num < self.port_start or port_num > self.port_end:
|
||||
return False
|
||||
|
||||
try:
|
||||
reg_file = open("/sys/class/cpld-qsfp28/port-"+str(port_num)+"/module_present")
|
||||
except IOError as e:
|
||||
print("Error: unable to open file: %s" % str(e))
|
||||
return False
|
||||
|
||||
reg_value = reg_file.readline().rstrip()
|
||||
if reg_value == '1':
|
||||
return True
|
||||
|
||||
return False
|
||||
|
||||
def get_low_power_mode(self, port_num):
|
||||
# Check for invalid port_num
|
||||
if port_num < self.port_start or port_num > self.port_end:
|
||||
return False
|
||||
|
||||
try:
|
||||
reg_file = open("/sys/class/cpld-qsfp28/port-"+str(port_num)+"/lpmode")
|
||||
except IOError as e:
|
||||
print("Error: unable to open file: %s" % str(e))
|
||||
return False
|
||||
|
||||
reg_value = int(reg_file.readline().rstrip())
|
||||
|
||||
if reg_value == 0:
|
||||
return False
|
||||
|
||||
return True
|
||||
|
||||
def set_low_power_mode(self, port_num, lpmode):
|
||||
# Check for invalid port_num
|
||||
if port_num < self.port_start or port_num > self.port_end:
|
||||
return False
|
||||
|
||||
try:
|
||||
reg_file = open("/sys/class/cpld-qsfp28/port-"+str(port_num)+"/lpmode", "r+")
|
||||
except IOError as e:
|
||||
print("Error: unable to open file: %s" % str(e))
|
||||
return False
|
||||
|
||||
# LPMode is active high; set or clear the bit accordingly
|
||||
if lpmode is True:
|
||||
reg_value = 1
|
||||
else:
|
||||
reg_value = 0
|
||||
|
||||
reg_file.write(hex(reg_value))
|
||||
reg_file.close()
|
||||
|
||||
return True
|
||||
|
||||
def reset(self, port_num):
|
||||
# Check for invalid port_num
|
||||
if port_num < self.port_start or port_num > self.port_end:
|
||||
return False
|
||||
|
||||
try:
|
||||
reg_file = open("/sys/class/cpld-qsfp28/port-"+str(port_num)+"/reset", "r+")
|
||||
except IOError as e:
|
||||
print("Error: unable to open file: %s" % str(e))
|
||||
return False
|
||||
|
||||
reg_value = 0
|
||||
reg_file.write(hex(reg_value))
|
||||
reg_file.close()
|
||||
|
||||
# Sleep 2 second to allow it to settle
|
||||
time.sleep(2)
|
||||
|
||||
# Flip the value back write back to the register to take port out of reset
|
||||
try:
|
||||
reg_file = open("/sys/class/cpld-qsfp28/port-"+str(port_num)+"/reset", "r+")
|
||||
except IOError as e:
|
||||
print("Error: unable to open file: %s" % str(e))
|
||||
return False
|
||||
|
||||
reg_value = 1
|
||||
reg_file.write(hex(reg_value))
|
||||
reg_file.close()
|
||||
|
||||
return True
|
||||
|
||||
def get_transceiver_change_event(self):
|
||||
"""
|
||||
TODO: This function need to be implemented
|
||||
when decide to support monitoring SFP(Xcvrd)
|
||||
on this platform.
|
||||
"""
|
||||
raise NotImplementedError
|
||||
@ -0,0 +1,3 @@
|
||||
{
|
||||
"skip_ledd": true
|
||||
}
|
||||
546
device/quanta/x86_64-quanta_ix7_bwde-r0/preemphasis-32x100G.soc
Normal file
546
device/quanta/x86_64-quanta_ix7_bwde-r0/preemphasis-32x100G.soc
Normal file
@ -0,0 +1,546 @@
|
||||
# Pre-emphasis
|
||||
|
||||
phy raw c45 0xa5 0x1 0xffde 0
|
||||
phy raw c45 0xa5 0x1 0xd130 0x4d
|
||||
phy raw c45 0xa5 0x1 0xd131 0x0611
|
||||
phy raw c45 0xa5 0x1 0xd134 1
|
||||
phy raw c45 0xa5 0x1 0xffde 1
|
||||
phy raw c45 0xa5 0x1 0xd130 0x4d
|
||||
phy raw c45 0xa5 0x1 0xd131 0x0611
|
||||
phy raw c45 0xa5 0x1 0xd134 1
|
||||
phy raw c45 0xa5 0x1 0xffde 2
|
||||
phy raw c45 0xa5 0x1 0xd130 0x4e
|
||||
phy raw c45 0xa5 0x1 0xd131 0x0610
|
||||
phy raw c45 0xa5 0x1 0xd134 1
|
||||
phy raw c45 0xa5 0x1 0xffde 3
|
||||
phy raw c45 0xa5 0x1 0xd130 0x4e
|
||||
phy raw c45 0xa5 0x1 0xd131 0x0610
|
||||
phy raw c45 0xa5 0x1 0xd134 1
|
||||
|
||||
phy raw c45 0xa9 0x1 0xffde 0
|
||||
phy raw c45 0xa9 0x1 0xd130 0x4e
|
||||
phy raw c45 0xa9 0x1 0xd131 0x0610
|
||||
phy raw c45 0xa9 0x1 0xd134 1
|
||||
phy raw c45 0xa9 0x1 0xffde 1
|
||||
phy raw c45 0xa9 0x1 0xd130 0x4e
|
||||
phy raw c45 0xa9 0x1 0xd131 0x0610
|
||||
phy raw c45 0xa9 0x1 0xd134 1
|
||||
phy raw c45 0xa9 0x1 0xffde 2
|
||||
phy raw c45 0xa9 0x1 0xd130 0x4e
|
||||
phy raw c45 0xa9 0x1 0xd131 0x0610
|
||||
phy raw c45 0xa9 0x1 0xd134 1
|
||||
phy raw c45 0xa9 0x1 0xffde 3
|
||||
phy raw c45 0xa9 0x1 0xd130 0x4e
|
||||
phy raw c45 0xa9 0x1 0xd131 0x0610
|
||||
phy raw c45 0xa9 0x1 0xd134 1
|
||||
|
||||
phy raw c45 0xc1 0x1 0xffde 0
|
||||
phy raw c45 0xc1 0x1 0xd130 0x4e
|
||||
phy raw c45 0xc1 0x1 0xd131 0x0610
|
||||
phy raw c45 0xc1 0x1 0xd134 1
|
||||
phy raw c45 0xc1 0x1 0xffde 1
|
||||
phy raw c45 0xc1 0x1 0xd130 0x4d
|
||||
phy raw c45 0xc1 0x1 0xd131 0x0611
|
||||
phy raw c45 0xc1 0x1 0xd134 1
|
||||
phy raw c45 0xc1 0x1 0xffde 2
|
||||
phy raw c45 0xc1 0x1 0xd130 0x4e
|
||||
phy raw c45 0xc1 0x1 0xd131 0x0610
|
||||
phy raw c45 0xc1 0x1 0xd134 1
|
||||
phy raw c45 0xc1 0x1 0xffde 3
|
||||
phy raw c45 0xc1 0x1 0xd130 0x4e
|
||||
phy raw c45 0xc1 0x1 0xd131 0x0610
|
||||
phy raw c45 0xc1 0x1 0xd134 1
|
||||
|
||||
phy raw c45 0xc5 0x1 0xffde 0
|
||||
phy raw c45 0xc5 0x1 0xd130 0x4e
|
||||
phy raw c45 0xc5 0x1 0xd131 0x0610
|
||||
phy raw c45 0xc5 0x1 0xd134 1
|
||||
phy raw c45 0xc5 0x1 0xffde 1
|
||||
phy raw c45 0xc5 0x1 0xd130 0x4e
|
||||
phy raw c45 0xc5 0x1 0xd131 0x0610
|
||||
phy raw c45 0xc5 0x1 0xd134 1
|
||||
phy raw c45 0xc5 0x1 0xffde 2
|
||||
phy raw c45 0xc5 0x1 0xd130 0x4d
|
||||
phy raw c45 0xc5 0x1 0xd131 0x0611
|
||||
phy raw c45 0xc5 0x1 0xd134 1
|
||||
phy raw c45 0xc5 0x1 0xffde 3
|
||||
phy raw c45 0xc5 0x1 0xd130 0x4e
|
||||
phy raw c45 0xc5 0x1 0xd131 0x0610
|
||||
phy raw c45 0xc5 0x1 0xd134 1
|
||||
|
||||
phy raw c45 0x81 0x1 0xffde 0
|
||||
phy raw c45 0x81 0x1 0xd130 0x4e
|
||||
phy raw c45 0x81 0x1 0xd131 0x0610
|
||||
phy raw c45 0x81 0x1 0xd134 1
|
||||
phy raw c45 0x81 0x1 0xffde 1
|
||||
phy raw c45 0x81 0x1 0xd130 0x4d
|
||||
phy raw c45 0x81 0x1 0xd131 0x0611
|
||||
phy raw c45 0x81 0x1 0xd134 1
|
||||
phy raw c45 0x81 0x1 0xffde 2
|
||||
phy raw c45 0x81 0x1 0xd130 0x4e
|
||||
phy raw c45 0x81 0x1 0xd131 0x0610
|
||||
phy raw c45 0x81 0x1 0xd134 1
|
||||
phy raw c45 0x81 0x1 0xffde 3
|
||||
phy raw c45 0x81 0x1 0xd130 0x4e
|
||||
phy raw c45 0x81 0x1 0xd131 0x0610
|
||||
phy raw c45 0x81 0x1 0xd134 1
|
||||
|
||||
phy raw c45 0x85 0x1 0xffde 0
|
||||
phy raw c45 0x85 0x1 0xd130 0x4e
|
||||
phy raw c45 0x85 0x1 0xd131 0x0610
|
||||
phy raw c45 0x85 0x1 0xd134 1
|
||||
phy raw c45 0x85 0x1 0xffde 1
|
||||
phy raw c45 0x85 0x1 0xd130 0x4e
|
||||
phy raw c45 0x85 0x1 0xd131 0x0610
|
||||
phy raw c45 0x85 0x1 0xd134 1
|
||||
phy raw c45 0x85 0x1 0xffde 2
|
||||
phy raw c45 0x85 0x1 0xd130 0x4e
|
||||
phy raw c45 0x85 0x1 0xd131 0x0610
|
||||
phy raw c45 0x85 0x1 0xd134 1
|
||||
phy raw c45 0x85 0x1 0xffde 3
|
||||
phy raw c45 0x85 0x1 0xd130 0x4d
|
||||
phy raw c45 0x85 0x1 0xd131 0x0611
|
||||
phy raw c45 0x85 0x1 0xd134 1
|
||||
|
||||
phy raw c45 0x89 0x1 0xffde 0
|
||||
phy raw c45 0x89 0x1 0xd130 0x50
|
||||
phy raw c45 0x89 0x1 0xd131 0x060e
|
||||
phy raw c45 0x89 0x1 0xd134 1
|
||||
phy raw c45 0x89 0x1 0xffde 1
|
||||
phy raw c45 0x89 0x1 0xd130 0x50
|
||||
phy raw c45 0x89 0x1 0xd131 0x060e
|
||||
phy raw c45 0x89 0x1 0xd134 1
|
||||
phy raw c45 0x89 0x1 0xffde 2
|
||||
phy raw c45 0x89 0x1 0xd130 0x50
|
||||
phy raw c45 0x89 0x1 0xd131 0x060e
|
||||
phy raw c45 0x89 0x1 0xd134 1
|
||||
phy raw c45 0x89 0x1 0xffde 3
|
||||
phy raw c45 0x89 0x1 0xd130 0x50
|
||||
phy raw c45 0x89 0x1 0xd131 0x060e
|
||||
phy raw c45 0x89 0x1 0xd134 1
|
||||
|
||||
phy raw c45 0x8d 0x1 0xffde 0
|
||||
phy raw c45 0x8d 0x1 0xd130 0x4f
|
||||
phy raw c45 0x8d 0x1 0xd131 0x060f
|
||||
phy raw c45 0x8d 0x1 0xd134 1
|
||||
phy raw c45 0x8d 0x1 0xffde 1
|
||||
phy raw c45 0x8d 0x1 0xd130 0x4f
|
||||
phy raw c45 0x8d 0x1 0xd131 0x060f
|
||||
phy raw c45 0x8d 0x1 0xd134 1
|
||||
phy raw c45 0x8d 0x1 0xffde 2
|
||||
phy raw c45 0x8d 0x1 0xd130 0x4f
|
||||
phy raw c45 0x8d 0x1 0xd131 0x060f
|
||||
phy raw c45 0x8d 0x1 0xd134 1
|
||||
phy raw c45 0x8d 0x1 0xffde 3
|
||||
phy raw c45 0x8d 0x1 0xd130 0x4f
|
||||
phy raw c45 0x8d 0x1 0xd131 0x060f
|
||||
phy raw c45 0x8d 0x1 0xd134 1
|
||||
|
||||
phy raw c45 0x91 0x1 0xffde 0
|
||||
phy raw c45 0x91 0x1 0xd130 0x50
|
||||
phy raw c45 0x91 0x1 0xd131 0x060e
|
||||
phy raw c45 0x91 0x1 0xd134 1
|
||||
phy raw c45 0x91 0x1 0xffde 1
|
||||
phy raw c45 0x91 0x1 0xd130 0x50
|
||||
phy raw c45 0x91 0x1 0xd131 0x060e
|
||||
phy raw c45 0x91 0x1 0xd134 1
|
||||
phy raw c45 0x91 0x1 0xffde 2
|
||||
phy raw c45 0x91 0x1 0xd130 0x50
|
||||
phy raw c45 0x91 0x1 0xd131 0x060e
|
||||
phy raw c45 0x91 0x1 0xd134 1
|
||||
phy raw c45 0x91 0x1 0xffde 3
|
||||
phy raw c45 0x91 0x1 0xd130 0x50
|
||||
phy raw c45 0x91 0x1 0xd131 0x060e
|
||||
phy raw c45 0x91 0x1 0xd134 1
|
||||
|
||||
phy raw c45 0x95 0x1 0xffde 0
|
||||
phy raw c45 0x95 0x1 0xd130 0x52
|
||||
phy raw c45 0x95 0x1 0xd131 0x060c
|
||||
phy raw c45 0x95 0x1 0xd134 1
|
||||
phy raw c45 0x95 0x1 0xffde 1
|
||||
phy raw c45 0x95 0x1 0xd130 0x52
|
||||
phy raw c45 0x95 0x1 0xd131 0x060c
|
||||
phy raw c45 0x95 0x1 0xd134 1
|
||||
phy raw c45 0x95 0x1 0xffde 2
|
||||
phy raw c45 0x95 0x1 0xd130 0x52
|
||||
phy raw c45 0x95 0x1 0xd131 0x060c
|
||||
phy raw c45 0x95 0x1 0xd134 1
|
||||
phy raw c45 0x95 0x1 0xffde 3
|
||||
phy raw c45 0x95 0x1 0xd130 0x52
|
||||
phy raw c45 0x95 0x1 0xd131 0x060c
|
||||
phy raw c45 0x95 0x1 0xd134 1
|
||||
|
||||
phy raw c45 0xa1 0x1 0xffde 0
|
||||
phy raw c45 0xa1 0x1 0xd130 0x52
|
||||
phy raw c45 0xa1 0x1 0xd131 0x060c
|
||||
phy raw c45 0xa1 0x1 0xd134 1
|
||||
phy raw c45 0xa1 0x1 0xffde 1
|
||||
phy raw c45 0xa1 0x1 0xd130 0x52
|
||||
phy raw c45 0xa1 0x1 0xd131 0x060c
|
||||
phy raw c45 0xa1 0x1 0xd134 1
|
||||
phy raw c45 0xa1 0x1 0xffde 2
|
||||
phy raw c45 0xa1 0x1 0xd130 0x52
|
||||
phy raw c45 0xa1 0x1 0xd131 0x060c
|
||||
phy raw c45 0xa1 0x1 0xd134 1
|
||||
phy raw c45 0xa1 0x1 0xffde 3
|
||||
phy raw c45 0xa1 0x1 0xd130 0x52
|
||||
phy raw c45 0xa1 0x1 0xd131 0x060c
|
||||
phy raw c45 0xa1 0x1 0xd134 1
|
||||
|
||||
phy raw c45 0xad 0x1 0xffde 0
|
||||
phy raw c45 0xad 0x1 0xd130 0x53
|
||||
phy raw c45 0xad 0x1 0xd131 0x060b
|
||||
phy raw c45 0xad 0x1 0xd134 1
|
||||
phy raw c45 0xad 0x1 0xffde 1
|
||||
phy raw c45 0xad 0x1 0xd130 0x53
|
||||
phy raw c45 0xad 0x1 0xd131 0x060b
|
||||
phy raw c45 0xad 0x1 0xd134 1
|
||||
phy raw c45 0xad 0x1 0xffde 2
|
||||
phy raw c45 0xad 0x1 0xd130 0x53
|
||||
phy raw c45 0xad 0x1 0xd131 0x060b
|
||||
phy raw c45 0xad 0x1 0xd134 1
|
||||
phy raw c45 0xad 0x1 0xffde 3
|
||||
phy raw c45 0xad 0x1 0xd130 0x53
|
||||
phy raw c45 0xad 0x1 0xd131 0x060b
|
||||
phy raw c45 0xad 0x1 0xd134 1
|
||||
|
||||
phy raw c45 0xc9 0x1 0xffde 0
|
||||
phy raw c45 0xc9 0x1 0xd130 0x53
|
||||
phy raw c45 0xc9 0x1 0xd131 0x060b
|
||||
phy raw c45 0xc9 0x1 0xd134 1
|
||||
phy raw c45 0xc9 0x1 0xffde 1
|
||||
phy raw c45 0xc9 0x1 0xd130 0x53
|
||||
phy raw c45 0xc9 0x1 0xd131 0x060b
|
||||
phy raw c45 0xc9 0x1 0xd134 1
|
||||
phy raw c45 0xc9 0x1 0xffde 2
|
||||
phy raw c45 0xc9 0x1 0xd130 0x53
|
||||
phy raw c45 0xc9 0x1 0xd131 0x060b
|
||||
phy raw c45 0xc9 0x1 0xd134 1
|
||||
phy raw c45 0xc9 0x1 0xffde 3
|
||||
phy raw c45 0xc9 0x1 0xd130 0x53
|
||||
phy raw c45 0xc9 0x1 0xd131 0x060b
|
||||
phy raw c45 0xc9 0x1 0xd134 1
|
||||
|
||||
phy raw c45 0xcd 0x1 0xffde 0
|
||||
phy raw c45 0xcd 0x1 0xd130 0x54
|
||||
phy raw c45 0xcd 0x1 0xd131 0x060a
|
||||
phy raw c45 0xcd 0x1 0xd134 1
|
||||
phy raw c45 0xcd 0x1 0xffde 1
|
||||
phy raw c45 0xcd 0x1 0xd130 0x54
|
||||
phy raw c45 0xcd 0x1 0xd131 0x060a
|
||||
phy raw c45 0xcd 0x1 0xd134 1
|
||||
phy raw c45 0xcd 0x1 0xffde 2
|
||||
phy raw c45 0xcd 0x1 0xd130 0x54
|
||||
phy raw c45 0xcd 0x1 0xd131 0x060a
|
||||
phy raw c45 0xcd 0x1 0xd134 1
|
||||
phy raw c45 0xcd 0x1 0xffde 3
|
||||
phy raw c45 0xcd 0x1 0xd130 0x54
|
||||
phy raw c45 0xcd 0x1 0xd131 0x060a
|
||||
phy raw c45 0xcd 0x1 0xd134 1
|
||||
|
||||
phy raw c45 0xd1 0x1 0xffde 0
|
||||
phy raw c45 0xd1 0x1 0xd130 0x56
|
||||
phy raw c45 0xd1 0x1 0xd131 0x0608
|
||||
phy raw c45 0xd1 0x1 0xd134 1
|
||||
phy raw c45 0xd1 0x1 0xffde 1
|
||||
phy raw c45 0xd1 0x1 0xd130 0x56
|
||||
phy raw c45 0xd1 0x1 0xd131 0x0608
|
||||
phy raw c45 0xd1 0x1 0xd134 1
|
||||
phy raw c45 0xd1 0x1 0xffde 2
|
||||
phy raw c45 0xd1 0x1 0xd130 0x56
|
||||
phy raw c45 0xd1 0x1 0xd131 0x0608
|
||||
phy raw c45 0xd1 0x1 0xd134 1
|
||||
phy raw c45 0xd1 0x1 0xffde 3
|
||||
phy raw c45 0xd1 0x1 0xd130 0x56
|
||||
phy raw c45 0xd1 0x1 0xd131 0x0608
|
||||
phy raw c45 0xd1 0x1 0xd134 1
|
||||
|
||||
phy raw c45 0xd5 0x1 0xffde 0
|
||||
phy raw c45 0xd5 0x1 0xd130 0x55
|
||||
phy raw c45 0xd5 0x1 0xd131 0x0609
|
||||
phy raw c45 0xd5 0x1 0xd134 1
|
||||
phy raw c45 0xd5 0x1 0xffde 1
|
||||
phy raw c45 0xd5 0x1 0xd130 0x55
|
||||
phy raw c45 0xd5 0x1 0xd131 0x0609
|
||||
phy raw c45 0xd5 0x1 0xd134 1
|
||||
phy raw c45 0xd5 0x1 0xffde 2
|
||||
phy raw c45 0xd5 0x1 0xd130 0x55
|
||||
phy raw c45 0xd5 0x1 0xd131 0x0609
|
||||
phy raw c45 0xd5 0x1 0xd134 1
|
||||
phy raw c45 0xd5 0x1 0xffde 3
|
||||
phy raw c45 0xd5 0x1 0xd130 0x55
|
||||
phy raw c45 0xd5 0x1 0xd131 0x0609
|
||||
phy raw c45 0xd5 0x1 0xd134 1
|
||||
|
||||
phy raw c45 0xe1 0x1 0xffde 0
|
||||
phy raw c45 0xe1 0x1 0xd130 0x56
|
||||
phy raw c45 0xe1 0x1 0xd131 0x0608
|
||||
phy raw c45 0xe1 0x1 0xd134 1
|
||||
phy raw c45 0xe1 0x1 0xffde 1
|
||||
phy raw c45 0xe1 0x1 0xd130 0x56
|
||||
phy raw c45 0xe1 0x1 0xd131 0x0608
|
||||
phy raw c45 0xe1 0x1 0xd134 1
|
||||
phy raw c45 0xe1 0x1 0xffde 2
|
||||
phy raw c45 0xe1 0x1 0xd130 0x56
|
||||
phy raw c45 0xe1 0x1 0xd131 0x0608
|
||||
phy raw c45 0xe1 0x1 0xd134 1
|
||||
phy raw c45 0xe1 0x1 0xffde 3
|
||||
phy raw c45 0xe1 0x1 0xd130 0x56
|
||||
phy raw c45 0xe1 0x1 0xd131 0x0608
|
||||
phy raw c45 0xe1 0x1 0xd134 1
|
||||
|
||||
phy raw c45 0xe5 0x1 0xffde 0
|
||||
phy raw c45 0xe5 0x1 0xd130 0x55
|
||||
phy raw c45 0xe5 0x1 0xd131 0x0609
|
||||
phy raw c45 0xe5 0x1 0xd134 1
|
||||
phy raw c45 0xe5 0x1 0xffde 1
|
||||
phy raw c45 0xe5 0x1 0xd130 0x55
|
||||
phy raw c45 0xe5 0x1 0xd131 0x0609
|
||||
phy raw c45 0xe5 0x1 0xd134 1
|
||||
phy raw c45 0xe5 0x1 0xffde 2
|
||||
phy raw c45 0xe5 0x1 0xd130 0x55
|
||||
phy raw c45 0xe5 0x1 0xd131 0x0609
|
||||
phy raw c45 0xe5 0x1 0xd134 1
|
||||
phy raw c45 0xe5 0x1 0xffde 3
|
||||
phy raw c45 0xe5 0x1 0xd130 0x55
|
||||
phy raw c45 0xe5 0x1 0xd131 0x0609
|
||||
phy raw c45 0xe5 0x1 0xd134 1
|
||||
|
||||
phy raw c45 0xe9 0x1 0xffde 0
|
||||
phy raw c45 0xe9 0x1 0xd130 0x56
|
||||
phy raw c45 0xe9 0x1 0xd131 0x0608
|
||||
phy raw c45 0xe9 0x1 0xd134 1
|
||||
phy raw c45 0xe9 0x1 0xffde 1
|
||||
phy raw c45 0xe9 0x1 0xd130 0x56
|
||||
phy raw c45 0xe9 0x1 0xd131 0x0608
|
||||
phy raw c45 0xe9 0x1 0xd134 1
|
||||
phy raw c45 0xe9 0x1 0xffde 2
|
||||
phy raw c45 0xe9 0x1 0xd130 0x56
|
||||
phy raw c45 0xe9 0x1 0xd131 0x0608
|
||||
phy raw c45 0xe9 0x1 0xd134 1
|
||||
phy raw c45 0xe9 0x1 0xffde 3
|
||||
phy raw c45 0xe9 0x1 0xd130 0x56
|
||||
phy raw c45 0xe9 0x1 0xd131 0x0608
|
||||
phy raw c45 0xe9 0x1 0xd134 1
|
||||
|
||||
phy raw c45 0xed 0x1 0xffde 0
|
||||
phy raw c45 0xed 0x1 0xd130 0x55
|
||||
phy raw c45 0xed 0x1 0xd131 0x0609
|
||||
phy raw c45 0xed 0x1 0xd134 1
|
||||
phy raw c45 0xed 0x1 0xffde 1
|
||||
phy raw c45 0xed 0x1 0xd130 0x53
|
||||
phy raw c45 0xed 0x1 0xd131 0x060b
|
||||
phy raw c45 0xed 0x1 0xd134 1
|
||||
phy raw c45 0xed 0x1 0xffde 2
|
||||
phy raw c45 0xed 0x1 0xd130 0x54
|
||||
phy raw c45 0xed 0x1 0xd131 0x060a
|
||||
phy raw c45 0xed 0x1 0xd134 1
|
||||
phy raw c45 0xed 0x1 0xffde 3
|
||||
phy raw c45 0xed 0x1 0xd130 0x54
|
||||
phy raw c45 0xed 0x1 0xd131 0x060a
|
||||
phy raw c45 0xed 0x1 0xd134 1
|
||||
|
||||
phy raw c45 0x185 0x1 0xffde 0
|
||||
phy raw c45 0x185 0x1 0xd130 0x55
|
||||
phy raw c45 0x185 0x1 0xd131 0x0609
|
||||
phy raw c45 0x185 0x1 0xd134 1
|
||||
phy raw c45 0x185 0x1 0xffde 1
|
||||
phy raw c45 0x185 0x1 0xd130 0x55
|
||||
phy raw c45 0x185 0x1 0xd131 0x0609
|
||||
phy raw c45 0x185 0x1 0xd134 1
|
||||
phy raw c45 0x185 0x1 0xffde 2
|
||||
phy raw c45 0x185 0x1 0xd130 0x55
|
||||
phy raw c45 0x185 0x1 0xd131 0x0609
|
||||
phy raw c45 0x185 0x1 0xd134 1
|
||||
phy raw c45 0x185 0x1 0xffde 3
|
||||
phy raw c45 0x185 0x1 0xd130 0x55
|
||||
phy raw c45 0x185 0x1 0xd131 0x0609
|
||||
phy raw c45 0x185 0x1 0xd134 1
|
||||
|
||||
phy raw c45 0x18d 0x1 0xffde 0
|
||||
phy raw c45 0x18d 0x1 0xd130 0x54
|
||||
phy raw c45 0x18d 0x1 0xd131 0x060a
|
||||
phy raw c45 0x18d 0x1 0xd134 1
|
||||
phy raw c45 0x18d 0x1 0xffde 1
|
||||
phy raw c45 0x18d 0x1 0xd130 0x53
|
||||
phy raw c45 0x18d 0x1 0xd131 0x060b
|
||||
phy raw c45 0x18d 0x1 0xd134 1
|
||||
phy raw c45 0x18d 0x1 0xffde 2
|
||||
phy raw c45 0x18d 0x1 0xd130 0x53
|
||||
phy raw c45 0x18d 0x1 0xd131 0x060b
|
||||
phy raw c45 0x18d 0x1 0xd134 1
|
||||
phy raw c45 0x18d 0x1 0xffde 3
|
||||
phy raw c45 0x18d 0x1 0xd130 0x53
|
||||
phy raw c45 0x18d 0x1 0xd131 0x060b
|
||||
phy raw c45 0x18d 0x1 0xd134 1
|
||||
|
||||
phy raw c45 0x1a1 0x1 0xffde 0
|
||||
phy raw c45 0x1a1 0x1 0xd130 0x55
|
||||
phy raw c45 0x1a1 0x1 0xd131 0x0609
|
||||
phy raw c45 0x1a1 0x1 0xd134 1
|
||||
phy raw c45 0x1a1 0x1 0xffde 1
|
||||
phy raw c45 0x1a1 0x1 0xd130 0x54
|
||||
phy raw c45 0x1a1 0x1 0xd131 0x060a
|
||||
phy raw c45 0x1a1 0x1 0xd134 1
|
||||
phy raw c45 0x1a1 0x1 0xffde 2
|
||||
phy raw c45 0x1a1 0x1 0xd130 0x55
|
||||
phy raw c45 0x1a1 0x1 0xd131 0x0609
|
||||
phy raw c45 0x1a1 0x1 0xd134 1
|
||||
phy raw c45 0x1a1 0x1 0xffde 3
|
||||
phy raw c45 0x1a1 0x1 0xd130 0x53
|
||||
phy raw c45 0x1a1 0x1 0xd131 0x060b
|
||||
phy raw c45 0x1a1 0x1 0xd134 1
|
||||
|
||||
phy raw c45 0x1a5 0x1 0xffde 0
|
||||
phy raw c45 0x1a5 0x1 0xd130 0x54
|
||||
phy raw c45 0x1a5 0x1 0xd131 0x060a
|
||||
phy raw c45 0x1a5 0x1 0xd134 1
|
||||
phy raw c45 0x1a5 0x1 0xffde 1
|
||||
phy raw c45 0x1a5 0x1 0xd130 0x53
|
||||
phy raw c45 0x1a5 0x1 0xd131 0x060b
|
||||
phy raw c45 0x1a5 0x1 0xd134 1
|
||||
phy raw c45 0x1a5 0x1 0xffde 2
|
||||
phy raw c45 0x1a5 0x1 0xd130 0x53
|
||||
phy raw c45 0x1a5 0x1 0xd131 0x060b
|
||||
phy raw c45 0x1a5 0x1 0xd134 1
|
||||
phy raw c45 0x1a5 0x1 0xffde 3
|
||||
phy raw c45 0x1a5 0x1 0xd130 0x53
|
||||
phy raw c45 0x1a5 0x1 0xd131 0x060b
|
||||
phy raw c45 0x1a5 0x1 0xd134 1
|
||||
|
||||
phy raw c45 0x1a9 0x1 0xffde 0
|
||||
phy raw c45 0x1a9 0x1 0xd130 0x54
|
||||
phy raw c45 0x1a9 0x1 0xd131 0x060a
|
||||
phy raw c45 0x1a9 0x1 0xd134 1
|
||||
phy raw c45 0x1a9 0x1 0xffde 1
|
||||
phy raw c45 0x1a9 0x1 0xd130 0x51
|
||||
phy raw c45 0x1a9 0x1 0xd131 0x060d
|
||||
phy raw c45 0x1a9 0x1 0xd134 1
|
||||
phy raw c45 0x1a9 0x1 0xffde 2
|
||||
phy raw c45 0x1a9 0x1 0xd130 0x52
|
||||
phy raw c45 0x1a9 0x1 0xd131 0x060c
|
||||
phy raw c45 0x1a9 0x1 0xd134 1
|
||||
phy raw c45 0x1a9 0x1 0xffde 3
|
||||
phy raw c45 0x1a9 0x1 0xd130 0x52
|
||||
phy raw c45 0x1a9 0x1 0xd131 0x060c
|
||||
phy raw c45 0x1a9 0x1 0xd134 1
|
||||
|
||||
phy raw c45 0x1ad 0x1 0xffde 0
|
||||
phy raw c45 0x1ad 0x1 0xd130 0x51
|
||||
phy raw c45 0x1ad 0x1 0xd131 0x060d
|
||||
phy raw c45 0x1ad 0x1 0xd134 1
|
||||
phy raw c45 0x1ad 0x1 0xffde 1
|
||||
phy raw c45 0x1ad 0x1 0xd130 0x4f
|
||||
phy raw c45 0x1ad 0x1 0xd131 0x060f
|
||||
phy raw c45 0x1ad 0x1 0xd134 1
|
||||
phy raw c45 0x1ad 0x1 0xffde 2
|
||||
phy raw c45 0x1ad 0x1 0xd130 0x4f
|
||||
phy raw c45 0x1ad 0x1 0xd131 0x060f
|
||||
phy raw c45 0x1ad 0x1 0xd134 1
|
||||
phy raw c45 0x1ad 0x1 0xffde 3
|
||||
phy raw c45 0x1ad 0x1 0xd130 0x4f
|
||||
phy raw c45 0x1ad 0x1 0xd131 0x060f
|
||||
phy raw c45 0x1ad 0x1 0xd134 1
|
||||
|
||||
phy raw c45 0x1b1 0x1 0xffde 0
|
||||
phy raw c45 0x1b1 0x1 0xd130 0x4f
|
||||
phy raw c45 0x1b1 0x1 0xd131 0x060f
|
||||
phy raw c45 0x1b1 0x1 0xd134 1
|
||||
phy raw c45 0x1b1 0x1 0xffde 1
|
||||
phy raw c45 0x1b1 0x1 0xd130 0x4f
|
||||
phy raw c45 0x1b1 0x1 0xd131 0x060f
|
||||
phy raw c45 0x1b1 0x1 0xd134 1
|
||||
phy raw c45 0x1b1 0x1 0xffde 2
|
||||
phy raw c45 0x1b1 0x1 0xd130 0x4f
|
||||
phy raw c45 0x1b1 0x1 0xd131 0x060f
|
||||
phy raw c45 0x1b1 0x1 0xd134 1
|
||||
phy raw c45 0x1b1 0x1 0xffde 3
|
||||
phy raw c45 0x1b1 0x1 0xd130 0x4f
|
||||
phy raw c45 0x1b1 0x1 0xd131 0x060f
|
||||
phy raw c45 0x1b1 0x1 0xd134 1
|
||||
|
||||
phy raw c45 0x1b5 0x1 0xffde 0
|
||||
phy raw c45 0x1b5 0x1 0xd130 0x4e
|
||||
phy raw c45 0x1b5 0x1 0xd131 0x0610
|
||||
phy raw c45 0x1b5 0x1 0xd134 1
|
||||
phy raw c45 0x1b5 0x1 0xffde 1
|
||||
phy raw c45 0x1b5 0x1 0xd130 0x4d
|
||||
phy raw c45 0x1b5 0x1 0xd131 0x0611
|
||||
phy raw c45 0x1b5 0x1 0xd134 1
|
||||
phy raw c45 0x1b5 0x1 0xffde 2
|
||||
phy raw c45 0x1b5 0x1 0xd130 0x4d
|
||||
phy raw c45 0x1b5 0x1 0xd131 0x0611
|
||||
phy raw c45 0x1b5 0x1 0xd134 1
|
||||
phy raw c45 0x1b5 0x1 0xffde 3
|
||||
phy raw c45 0x1b5 0x1 0xd130 0x4d
|
||||
phy raw c45 0x1b5 0x1 0xd131 0x0611
|
||||
phy raw c45 0x1b5 0x1 0xd134 1
|
||||
|
||||
phy raw c45 0xf1 0x1 0xffde 0
|
||||
phy raw c45 0xf1 0x1 0xd130 0x4f
|
||||
phy raw c45 0xf1 0x1 0xd131 0x060f
|
||||
phy raw c45 0xf1 0x1 0xd134 1
|
||||
phy raw c45 0xf1 0x1 0xffde 1
|
||||
phy raw c45 0xf1 0x1 0xd130 0x4f
|
||||
phy raw c45 0xf1 0x1 0xd131 0x060f
|
||||
phy raw c45 0xf1 0x1 0xd134 1
|
||||
phy raw c45 0xf1 0x1 0xffde 2
|
||||
phy raw c45 0xf1 0x1 0xd130 0x4f
|
||||
phy raw c45 0xf1 0x1 0xd131 0x060f
|
||||
phy raw c45 0xf1 0x1 0xd134 1
|
||||
phy raw c45 0xf1 0x1 0xffde 3
|
||||
phy raw c45 0xf1 0x1 0xd130 0x4f
|
||||
phy raw c45 0xf1 0x1 0xd131 0x060f
|
||||
phy raw c45 0xf1 0x1 0xd134 1
|
||||
|
||||
phy raw c45 0xf5 0x1 0xffde 0
|
||||
phy raw c45 0xf5 0x1 0xd130 0x4d
|
||||
phy raw c45 0xf5 0x1 0xd131 0x0611
|
||||
phy raw c45 0xf5 0x1 0xd134 1
|
||||
phy raw c45 0xf5 0x1 0xffde 1
|
||||
phy raw c45 0xf5 0x1 0xd130 0x4d
|
||||
phy raw c45 0xf5 0x1 0xd131 0x0611
|
||||
phy raw c45 0xf5 0x1 0xd134 1
|
||||
phy raw c45 0xf5 0x1 0xffde 2
|
||||
phy raw c45 0xf5 0x1 0xd130 0x4d
|
||||
phy raw c45 0xf5 0x1 0xd131 0x0611
|
||||
phy raw c45 0xf5 0x1 0xd134 1
|
||||
phy raw c45 0xf5 0x1 0xffde 3
|
||||
phy raw c45 0xf5 0x1 0xd130 0x4d
|
||||
phy raw c45 0xf5 0x1 0xd131 0x0611
|
||||
phy raw c45 0xf5 0x1 0xd134 1
|
||||
|
||||
phy raw c45 0x181 0x1 0xffde 0
|
||||
phy raw c45 0x181 0x1 0xd130 0x4e
|
||||
phy raw c45 0x181 0x1 0xd131 0x0610
|
||||
phy raw c45 0x181 0x1 0xd134 1
|
||||
phy raw c45 0x181 0x1 0xffde 1
|
||||
phy raw c45 0x181 0x1 0xd130 0x4e
|
||||
phy raw c45 0x181 0x1 0xd131 0x0610
|
||||
phy raw c45 0x181 0x1 0xd134 1
|
||||
phy raw c45 0x181 0x1 0xffde 2
|
||||
phy raw c45 0x181 0x1 0xd130 0x4e
|
||||
phy raw c45 0x181 0x1 0xd131 0x0610
|
||||
phy raw c45 0x181 0x1 0xd134 1
|
||||
phy raw c45 0x181 0x1 0xffde 3
|
||||
phy raw c45 0x181 0x1 0xd130 0x4e
|
||||
phy raw c45 0x181 0x1 0xd131 0x0610
|
||||
phy raw c45 0x181 0x1 0xd134 1
|
||||
|
||||
phy raw c45 0x189 0x1 0xffde 0
|
||||
phy raw c45 0x189 0x1 0xd130 0x4d
|
||||
phy raw c45 0x189 0x1 0xd131 0x0611
|
||||
phy raw c45 0x189 0x1 0xd134 1
|
||||
phy raw c45 0x189 0x1 0xffde 1
|
||||
phy raw c45 0x189 0x1 0xd130 0x4d
|
||||
phy raw c45 0x189 0x1 0xd131 0x0611
|
||||
phy raw c45 0x189 0x1 0xd134 1
|
||||
phy raw c45 0x189 0x1 0xffde 2
|
||||
phy raw c45 0x189 0x1 0xd130 0x4d
|
||||
phy raw c45 0x189 0x1 0xd131 0x0611
|
||||
phy raw c45 0x189 0x1 0xd134 1
|
||||
phy raw c45 0x189 0x1 0xffde 3
|
||||
phy raw c45 0x189 0x1 0xd130 0x4d
|
||||
phy raw c45 0x189 0x1 0xd131 0x0611
|
||||
phy raw c45 0x189 0x1 0xd134 1
|
||||
|
||||
@ -0,0 +1,3 @@
|
||||
{%- set default_topo = 't1' %}
|
||||
{%- include 'buffers_config.j2' %}
|
||||
|
||||
@ -0,0 +1,46 @@
|
||||
{%- set default_cable = '300m' %}
|
||||
|
||||
{%- macro generate_port_lists(PORT_ALL) %}
|
||||
{# Generate list of ports #}
|
||||
{% for port_idx in range(0,32) %}
|
||||
{% if PORT_ALL.append("Ethernet%d" % (port_idx * 4)) %}{% endif %}
|
||||
{% endfor %}
|
||||
{%- endmacro %}
|
||||
|
||||
{%- macro generate_buffer_pool_and_profiles() %}
|
||||
"BUFFER_POOL": {
|
||||
"ingress_lossless_pool": {
|
||||
"xoff": "4625920",
|
||||
"size": "12766208",
|
||||
"type": "ingress",
|
||||
"mode": "dynamic"
|
||||
},
|
||||
"egress_lossless_pool": {
|
||||
"size": "12766208",
|
||||
"type": "egress",
|
||||
"mode": "static"
|
||||
},
|
||||
"egress_lossy_pool": {
|
||||
"size": "7326924",
|
||||
"type": "egress",
|
||||
"mode": "dynamic"
|
||||
}
|
||||
},
|
||||
"BUFFER_PROFILE": {
|
||||
"ingress_lossy_profile": {
|
||||
"pool":"[BUFFER_POOL|ingress_lossless_pool]",
|
||||
"size":"0",
|
||||
"dynamic_th":"3"
|
||||
},
|
||||
"egress_lossless_profile": {
|
||||
"pool":"[BUFFER_POOL|egress_lossless_pool]",
|
||||
"size":"0",
|
||||
"static_th":"12766208"
|
||||
},
|
||||
"egress_lossy_profile": {
|
||||
"pool":"[BUFFER_POOL|egress_lossless_pool]",
|
||||
"size":"1518",
|
||||
"dynamic_th":"3"
|
||||
}
|
||||
},
|
||||
{%- endmacro %}
|
||||
@ -0,0 +1,45 @@
|
||||
{%- set default_cable = '300m' %}
|
||||
|
||||
{%- macro generate_port_lists(PORT_ALL) %}
|
||||
{# Generate list of ports #}
|
||||
{% for port_idx in range(0,32) %}
|
||||
{% if PORT_ALL.append("Ethernet%d" % (port_idx * 4)) %}{% endif %}
|
||||
{% endfor %}
|
||||
{%- endmacro %}
|
||||
|
||||
{%- macro generate_buffer_pool_and_profiles() %}
|
||||
"BUFFER_POOL": {
|
||||
"ingress_lossless_pool": {
|
||||
"size": "12766208",
|
||||
"type": "ingress",
|
||||
"mode": "dynamic"
|
||||
},
|
||||
"egress_lossless_pool": {
|
||||
"size": "12766208",
|
||||
"type": "egress",
|
||||
"mode": "static"
|
||||
},
|
||||
"egress_lossy_pool": {
|
||||
"size": "7326924",
|
||||
"type": "egress",
|
||||
"mode": "dynamic"
|
||||
}
|
||||
},
|
||||
"BUFFER_PROFILE": {
|
||||
"ingress_lossy_profile": {
|
||||
"pool":"[BUFFER_POOL|ingress_lossless_pool]",
|
||||
"size":"0",
|
||||
"dynamic_th":"3"
|
||||
},
|
||||
"egress_lossless_profile": {
|
||||
"pool":"[BUFFER_POOL|egress_lossless_pool]",
|
||||
"size":"0",
|
||||
"static_th":"12766208"
|
||||
},
|
||||
"egress_lossy_profile": {
|
||||
"pool":"[BUFFER_POOL|egress_lossless_pool]",
|
||||
"size":"1518",
|
||||
"dynamic_th":"3"
|
||||
}
|
||||
},
|
||||
{%- endmacro %}
|
||||
@ -0,0 +1,46 @@
|
||||
{%- set default_cable = '300m' %}
|
||||
|
||||
{%- macro generate_port_lists(PORT_ALL) %}
|
||||
{# Generate list of ports #}
|
||||
{% for port_idx in range(0,32) %}
|
||||
{% if PORT_ALL.append("Ethernet%d" % (port_idx * 4)) %}{% endif %}
|
||||
{% endfor %}
|
||||
{%- endmacro %}
|
||||
|
||||
{%- macro generate_buffer_pool_and_profiles() %}
|
||||
"BUFFER_POOL": {
|
||||
"ingress_lossless_pool": {
|
||||
"xoff": "196608",
|
||||
"size": "12766208",
|
||||
"type": "ingress",
|
||||
"mode": "dynamic"
|
||||
},
|
||||
"egress_lossless_pool": {
|
||||
"size": "33004032",
|
||||
"type": "egress",
|
||||
"mode": "static"
|
||||
},
|
||||
"egress_lossy_pool": {
|
||||
"size": "12766208",
|
||||
"type": "egress",
|
||||
"mode": "dynamic"
|
||||
}
|
||||
},
|
||||
"BUFFER_PROFILE": {
|
||||
"ingress_lossy_profile": {
|
||||
"pool":"[BUFFER_POOL|ingress_lossless_pool]",
|
||||
"size":"0",
|
||||
"dynamic_th":"3"
|
||||
},
|
||||
"egress_lossless_profile": {
|
||||
"pool":"[BUFFER_POOL|egress_lossless_pool]",
|
||||
"size":"0",
|
||||
"static_th":"33004032"
|
||||
},
|
||||
"egress_lossy_profile": {
|
||||
"pool":"[BUFFER_POOL|egress_lossless_pool]",
|
||||
"size":"1518",
|
||||
"dynamic_th":"3"
|
||||
}
|
||||
},
|
||||
{%- endmacro %}
|
||||
@ -0,0 +1,3 @@
|
||||
l2_mem_entries=294912
|
||||
l3_mem_entries=16384
|
||||
l3_alpm_enable=0
|
||||
@ -0,0 +1,5 @@
|
||||
l2_mem_entries=40960
|
||||
l3_mem_entries=40960
|
||||
l3_alpm_enable=2
|
||||
use_all_splithorizon_groups=1
|
||||
sai_tunnel_support=1
|
||||
@ -0,0 +1,17 @@
|
||||
# PG lossless profiles.
|
||||
# speed cable size xon xoff threshold xon_offset
|
||||
10000 5m 9427 0 50176 1 3584
|
||||
25000 5m 9427 0 50176 1 3584
|
||||
40000 5m 9427 0 50176 1 3584
|
||||
50000 5m 9427 0 50176 1 3584
|
||||
100000 5m 9427 0 50176 1 3584
|
||||
10000 40m 9427 0 50176 1 3584
|
||||
25000 40m 9427 0 50176 1 3584
|
||||
40000 40m 9427 0 50176 1 3584
|
||||
50000 40m 9427 0 50176 1 3584
|
||||
100000 40m 9427 0 50176 1 3584
|
||||
10000 300m 9427 0 50176 1 3584
|
||||
25000 300m 9427 0 50176 1 3584
|
||||
40000 300m 9427 0 50176 1 3584
|
||||
50000 300m 9427 0 50176 1 3584
|
||||
100000 300m 9427 0 50176 1 3584
|
||||
@ -0,0 +1,32 @@
|
||||
{
|
||||
"fec-mode": {
|
||||
"Ethernet0-127": {
|
||||
"1": {
|
||||
"10000": [ "none", "fc" ],
|
||||
"25000": [ "none", "rs" ]
|
||||
},
|
||||
"2": {
|
||||
"20000": [ "none", "fc" ],
|
||||
"50000": [ "none", "rs" ]
|
||||
},
|
||||
"4": {
|
||||
"40000": [ "none", "fc" ],
|
||||
"100000": [ "none", "rs" ]
|
||||
}
|
||||
}
|
||||
},
|
||||
"default-fec-mode": {
|
||||
"Ethernet0-127": {
|
||||
"4": {
|
||||
"40000": "none",
|
||||
"100000": "rs"
|
||||
}
|
||||
}
|
||||
},
|
||||
"native-port-supported-speeds": {
|
||||
"Ethernet0-127": {
|
||||
"4": ["100000","40000"]
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
@ -0,0 +1 @@
|
||||
{%- include 'qos_config_t1.j2' %}
|
||||
@ -0,0 +1,175 @@
|
||||
{%- set PORT_ALL = [] %}
|
||||
{%- for port in PORT %}
|
||||
{%- if PORT_ALL.append(port) %}{% endif %}
|
||||
{%- endfor %}
|
||||
{%- if PORT_ALL | sort_by_port_index %}{% endif %}
|
||||
|
||||
{%- set port_names_list_all = [] %}
|
||||
{%- for port in PORT_ALL %}
|
||||
{%- if port_names_list_all.append(port) %}{% endif %}
|
||||
{%- endfor %}
|
||||
{%- set port_names_all = port_names_list_all | join(',') -%}
|
||||
|
||||
|
||||
{%- set PORT_ACTIVE = [] %}
|
||||
{%- if DEVICE_NEIGHBOR is not defined %}
|
||||
{%- set PORT_ACTIVE = PORT_ALL %}
|
||||
{%- else %}
|
||||
{%- for port in DEVICE_NEIGHBOR.keys() %}
|
||||
{%- if PORT_ACTIVE.append(port) %}{%- endif %}
|
||||
{%- endfor %}
|
||||
{%- endif %}
|
||||
{%- if PORT_ACTIVE | sort_by_port_index %}{% endif %}
|
||||
|
||||
{%- set port_names_list_active = [] %}
|
||||
{%- for port in PORT_ACTIVE %}
|
||||
{%- if port_names_list_active.append(port) %}{%- endif %}
|
||||
{%- endfor %}
|
||||
{%- set port_names_active = port_names_list_active | join(',') -%}
|
||||
|
||||
|
||||
{%- set pfc_to_pg_map_supported_asics = ['mellanox', 'barefoot', 'marvell'] -%}
|
||||
|
||||
|
||||
{
|
||||
{% if generate_tc_to_pg_map is defined %}
|
||||
{{- generate_tc_to_pg_map() }}
|
||||
{% else %}
|
||||
"TC_TO_PRIORITY_GROUP_MAP": {
|
||||
"AZURE": {
|
||||
"0": "0",
|
||||
"1": "0",
|
||||
"2": "0",
|
||||
"3": "3",
|
||||
"4": "4",
|
||||
"5": "0",
|
||||
"6": "0",
|
||||
"7": "7"
|
||||
}
|
||||
},
|
||||
{% endif %}
|
||||
"MAP_PFC_PRIORITY_TO_QUEUE": {
|
||||
"AZURE": {
|
||||
"0": "0",
|
||||
"1": "1",
|
||||
"2": "2",
|
||||
"3": "3",
|
||||
"4": "4",
|
||||
"5": "5",
|
||||
"6": "6",
|
||||
"7": "7"
|
||||
}
|
||||
},
|
||||
"TC_TO_QUEUE_MAP": {
|
||||
"AZURE": {
|
||||
"0": "0",
|
||||
"1": "1",
|
||||
"2": "2",
|
||||
"3": "3",
|
||||
"4": "4",
|
||||
"5": "5",
|
||||
"6": "6",
|
||||
"7": "7"
|
||||
}
|
||||
},
|
||||
"DSCP_TO_TC_MAP": {
|
||||
"AZURE": {
|
||||
"0" : "1",
|
||||
"1" : "1",
|
||||
"2" : "1",
|
||||
"3" : "3",
|
||||
"4" : "4",
|
||||
"5" : "2",
|
||||
"6" : "1",
|
||||
"7" : "1",
|
||||
"8" : "0",
|
||||
"9" : "1",
|
||||
"10": "1",
|
||||
"11": "1",
|
||||
"12": "1",
|
||||
"13": "1",
|
||||
"14": "1",
|
||||
"15": "1",
|
||||
"16": "1",
|
||||
"17": "1",
|
||||
"18": "1",
|
||||
"19": "1",
|
||||
"20": "1",
|
||||
"21": "1",
|
||||
"22": "1",
|
||||
"23": "1",
|
||||
"24": "1",
|
||||
"25": "1",
|
||||
"26": "1",
|
||||
"27": "1",
|
||||
"28": "1",
|
||||
"29": "1",
|
||||
"30": "1",
|
||||
"31": "1",
|
||||
"32": "1",
|
||||
"33": "1",
|
||||
"34": "1",
|
||||
"35": "1",
|
||||
"36": "1",
|
||||
"37": "1",
|
||||
"38": "1",
|
||||
"39": "1",
|
||||
"40": "1",
|
||||
"41": "1",
|
||||
"42": "1",
|
||||
"43": "1",
|
||||
"44": "1",
|
||||
"45": "1",
|
||||
"46": "5",
|
||||
"47": "1",
|
||||
"48": "6",
|
||||
"49": "1",
|
||||
"50": "1",
|
||||
"51": "1",
|
||||
"52": "1",
|
||||
"53": "1",
|
||||
"54": "1",
|
||||
"55": "1",
|
||||
"56": "1",
|
||||
"57": "1",
|
||||
"58": "1",
|
||||
"59": "1",
|
||||
"60": "1",
|
||||
"61": "1",
|
||||
"62": "1",
|
||||
"63": "1"
|
||||
}
|
||||
},
|
||||
"SCHEDULER": {
|
||||
"scheduler.0": {
|
||||
"type" : "DWRR",
|
||||
"weight": "14"
|
||||
},
|
||||
"scheduler.1": {
|
||||
"type" : "DWRR",
|
||||
"weight": "15"
|
||||
}
|
||||
},
|
||||
{% if asic_type in pfc_to_pg_map_supported_asics %}
|
||||
"PFC_PRIORITY_TO_PRIORITY_GROUP_MAP": {
|
||||
"AZURE": {
|
||||
"3": "3",
|
||||
"4": "4"
|
||||
}
|
||||
},
|
||||
{% endif %}
|
||||
"PORT_QOS_MAP": {
|
||||
{% for port in PORT_ACTIVE %}
|
||||
"{{ port }}": {
|
||||
"dscp_to_tc_map" : "[DSCP_TO_TC_MAP|AZURE]",
|
||||
"tc_to_queue_map" : "[TC_TO_QUEUE_MAP|AZURE]",
|
||||
"tc_to_pg_map" : "[TC_TO_PRIORITY_GROUP_MAP|AZURE]",
|
||||
"pfc_to_queue_map": "[MAP_PFC_PRIORITY_TO_QUEUE|AZURE]",
|
||||
{% if asic_type in pfc_to_pg_map_supported_asics %}
|
||||
"pfc_to_pg_map" : "[PFC_PRIORITY_TO_PRIORITY_GROUP_MAP|AZURE]",
|
||||
{% endif %}
|
||||
"pfc_enable" : "3,4"
|
||||
}{% if not loop.last %},{% endif %}
|
||||
{% endfor %}
|
||||
}
|
||||
}
|
||||
@ -1,37 +1,45 @@
|
||||
sai_load_hw_config=/etc/bcm/flex/bcm56870_a0_issu/b870.6.4.1/
|
||||
bcm_tunnel_term_compatible_mode=1
|
||||
#polarity/lanemap is using TH2 style.
|
||||
core_clock_frequency=1525
|
||||
dpp_clock_ratio=2:3
|
||||
parity_enable=0
|
||||
mem_cache_enable=0
|
||||
l2_mem_entries=40960
|
||||
l3_mem_entries=40960
|
||||
fpem_mem_entries=16384
|
||||
l2xmsg_mode=1
|
||||
|
||||
bcm_num_cos=10
|
||||
bcm_stat_interval=2000000
|
||||
cdma_timeout_usec=3000000
|
||||
|
||||
ifp_inports_support_enable=1
|
||||
ipv6_lpm_128b_enable=0x1
|
||||
l3_max_ecmp_mode=1
|
||||
l3_alpm_enable=2
|
||||
lpm_scaling_enable=0
|
||||
|
||||
miim_intr_enable=0
|
||||
module_64ports=1
|
||||
|
||||
schan_intr_enable=0
|
||||
skip_L2_USER_ENTRY=0
|
||||
stable_size=0x5500000
|
||||
tdma_timeout_usec=3000000
|
||||
|
||||
# portmap settings
|
||||
oversubscribe_mode=1
|
||||
pbmp_xport_xe=0x4888888888888888c2222222222222222
|
||||
|
||||
#RIOT Enable
|
||||
riot_enable=1
|
||||
riot_overlay_l3_intf_mem_size=4096
|
||||
riot_overlay_l3_egress_mem_size=32768
|
||||
l3_ecmp_levels=2
|
||||
riot_overlay_ecmp_resilient_hash_size=16384
|
||||
|
||||
pbmp_xport_xe=0x3ffffffffffffffffffffffffffffffffe
|
||||
|
||||
port_flex_enable=1
|
||||
mem_cache_enable=0
|
||||
|
||||
l3_alpm_ipv6_128b_bkt_rsvd=1
|
||||
fpem_mem_entries=0
|
||||
ifp_inports_support_enable=1
|
||||
l2xmsg_mode=1
|
||||
|
||||
# Platform specfic
|
||||
bcm_num_cos=10
|
||||
default_cpu_tx_queue=9
|
||||
bcm_stat_interval=2000000
|
||||
cdma_timeout_usec=3000000
|
||||
ipv6_lpm_128b_enable=0x1
|
||||
l3_max_ecmp_mode=1
|
||||
lpm_scaling_enable=0
|
||||
max_vp_lags=0
|
||||
miim_intr_enable=0
|
||||
module_64ports=1
|
||||
schan_intr_enable=0
|
||||
stable_size=0x5500000
|
||||
tdma_timeout_usec=3000000
|
||||
skip_L2_USER_ENTRY=0
|
||||
bcm_tunnel_term_compatible_mode=1
|
||||
phy_an_c73=1
|
||||
# portmap settings
|
||||
|
||||
portmap_1=1:100
|
||||
portmap_5=5:100
|
||||
@ -69,9 +77,11 @@ portmap_119=117:100
|
||||
portmap_123=121:100
|
||||
portmap_127=125:100
|
||||
|
||||
# datapath port -- merlin core
|
||||
portmap_66=129:10:m
|
||||
portmap_130=128:10:m
|
||||
# datapath port -- MerlinCore
|
||||
#Hide these to prevent SAI from initializing them...they are physically not on system
|
||||
#front panel
|
||||
#portmap_66=129:10:m
|
||||
#portmap_130=128:10:m
|
||||
|
||||
# loopback port
|
||||
portmap_65=130:10
|
||||
@ -79,41 +89,167 @@ portmap_131=131:10
|
||||
|
||||
# port order remap
|
||||
dport_map_port_29=1
|
||||
dport_map_port_33=2
|
||||
dport_map_port_41=3
|
||||
dport_map_port_45=4
|
||||
dport_map_port_1=5
|
||||
dport_map_port_5=6
|
||||
dport_map_port_9=7
|
||||
dport_map_port_13=8
|
||||
dport_map_port_17=9
|
||||
dport_map_port_21=10
|
||||
dport_map_port_25=11
|
||||
dport_map_port_37=12
|
||||
dport_map_port_49=13
|
||||
dport_map_port_53=14
|
||||
dport_map_port_57=15
|
||||
dport_map_port_61=16
|
||||
dport_map_port_30=2
|
||||
dport_map_port_31=3
|
||||
dport_map_port_32=4
|
||||
|
||||
dport_map_port_67=17
|
||||
dport_map_port_71=18
|
||||
dport_map_port_75=19
|
||||
dport_map_port_79=20
|
||||
dport_map_port_95=21
|
||||
dport_map_port_103=22
|
||||
dport_map_port_107=23
|
||||
dport_map_port_111=24
|
||||
dport_map_port_115=25
|
||||
dport_map_port_119=26
|
||||
dport_map_port_123=27
|
||||
dport_map_port_127=28
|
||||
dport_map_port_83=29
|
||||
dport_map_port_87=30
|
||||
dport_map_port_91=31
|
||||
dport_map_port_99=32
|
||||
dport_map_port_33=5
|
||||
dport_map_port_34=6
|
||||
dport_map_port_35=7
|
||||
dport_map_port_36=8
|
||||
|
||||
dport_map_port_66=33
|
||||
dport_map_port_130=34
|
||||
dport_map_port_41=9
|
||||
dport_map_port_42=10
|
||||
dport_map_port_43=11
|
||||
dport_map_port_44=12
|
||||
|
||||
dport_map_port_45=13
|
||||
dport_map_port_46=14
|
||||
dport_map_port_47=15
|
||||
dport_map_port_48=16
|
||||
|
||||
dport_map_port_1=17
|
||||
dport_map_port_2=18
|
||||
dport_map_port_3=19
|
||||
dport_map_port_4=20
|
||||
|
||||
dport_map_port_5=21
|
||||
dport_map_port_6=22
|
||||
dport_map_port_7=23
|
||||
dport_map_port_8=24
|
||||
|
||||
dport_map_port_9=25
|
||||
dport_map_port_10=26
|
||||
dport_map_port_11=27
|
||||
dport_map_port_12=28
|
||||
|
||||
dport_map_port_13=29
|
||||
dport_map_port_14=30
|
||||
dport_map_port_15=31
|
||||
dport_map_port_16=32
|
||||
|
||||
dport_map_port_17=33
|
||||
dport_map_port_18=34
|
||||
dport_map_port_19=35
|
||||
dport_map_port_20=36
|
||||
|
||||
dport_map_port_21=37
|
||||
dport_map_port_22=38
|
||||
dport_map_port_23=39
|
||||
dport_map_port_24=40
|
||||
|
||||
dport_map_port_25=41
|
||||
dport_map_port_26=42
|
||||
dport_map_port_27=43
|
||||
dport_map_port_28=44
|
||||
|
||||
dport_map_port_37=45
|
||||
dport_map_port_38=46
|
||||
dport_map_port_39=47
|
||||
dport_map_port_40=48
|
||||
|
||||
dport_map_port_49=49
|
||||
dport_map_port_50=50
|
||||
dport_map_port_51=51
|
||||
dport_map_port_52=52
|
||||
|
||||
dport_map_port_53=53
|
||||
dport_map_port_54=54
|
||||
dport_map_port_55=55
|
||||
dport_map_port_56=56
|
||||
|
||||
dport_map_port_57=57
|
||||
dport_map_port_58=58
|
||||
dport_map_port_59=59
|
||||
dport_map_port_60=60
|
||||
|
||||
dport_map_port_61=61
|
||||
dport_map_port_62=62
|
||||
dport_map_port_63=63
|
||||
dport_map_port_64=64
|
||||
|
||||
dport_map_port_67=65
|
||||
dport_map_port_68=66
|
||||
dport_map_port_69=67
|
||||
dport_map_port_70=68
|
||||
|
||||
dport_map_port_71=69
|
||||
dport_map_port_72=70
|
||||
dport_map_port_73=71
|
||||
dport_map_port_74=72
|
||||
|
||||
dport_map_port_75=73
|
||||
dport_map_port_76=74
|
||||
dport_map_port_77=75
|
||||
dport_map_port_78=76
|
||||
|
||||
dport_map_port_79=77
|
||||
dport_map_port_80=78
|
||||
dport_map_port_81=79
|
||||
dport_map_port_82=80
|
||||
|
||||
dport_map_port_95=81
|
||||
dport_map_port_96=82
|
||||
dport_map_port_97=83
|
||||
dport_map_port_98=84
|
||||
|
||||
dport_map_port_103=85
|
||||
dport_map_port_104=86
|
||||
dport_map_port_105=87
|
||||
dport_map_port_106=88
|
||||
|
||||
dport_map_port_107=89
|
||||
dport_map_port_108=90
|
||||
dport_map_port_109=91
|
||||
dport_map_port_110=92
|
||||
|
||||
dport_map_port_111=93
|
||||
dport_map_port_112=94
|
||||
dport_map_port_113=95
|
||||
dport_map_port_114=96
|
||||
|
||||
dport_map_port_115=97
|
||||
dport_map_port_116=98
|
||||
dport_map_port_117=99
|
||||
dport_map_port_118=100
|
||||
|
||||
dport_map_port_119=101
|
||||
dport_map_port_120=102
|
||||
dport_map_port_121=103
|
||||
dport_map_port_122=104
|
||||
|
||||
dport_map_port_123=105
|
||||
dport_map_port_124=106
|
||||
dport_map_port_125=107
|
||||
dport_map_port_126=108
|
||||
|
||||
dport_map_port_127=109
|
||||
dport_map_port_128=110
|
||||
dport_map_port_129=111
|
||||
dport_map_port_130=112
|
||||
|
||||
dport_map_port_83=113
|
||||
dport_map_port_84=114
|
||||
dport_map_port_85=115
|
||||
dport_map_port_86=116
|
||||
|
||||
dport_map_port_87=117
|
||||
dport_map_port_88=118
|
||||
dport_map_port_89=119
|
||||
dport_map_port_90=120
|
||||
|
||||
dport_map_port_91=121
|
||||
dport_map_port_92=122
|
||||
dport_map_port_93=123
|
||||
dport_map_port_94=124
|
||||
|
||||
dport_map_port_99=125
|
||||
dport_map_port_100=126
|
||||
dport_map_port_101=127
|
||||
dport_map_port_102=128
|
||||
|
||||
dport_map_port_66=129
|
||||
dport_map_port_130=130
|
||||
|
||||
### interface setting
|
||||
# TSCF / TSCE interface definition
|
||||
@ -533,3 +669,8 @@ phy_chain_rx_polarity_flip_physical{98.0}=0x0
|
||||
phy_chain_rx_polarity_flip_physical{99.0}=0x1
|
||||
phy_chain_rx_polarity_flip_physical{100.0}=0x0
|
||||
|
||||
|
||||
l2_mem_entries=40960
|
||||
l3_mem_entries=40960
|
||||
l3_alpm_enable=2
|
||||
use_all_splithorizon_groups=1
|
||||
|
||||
BIN
device/quanta/x86_64-quanta_ix7_rglbmc-r0/custom_led.bin
Normal file
BIN
device/quanta/x86_64-quanta_ix7_rglbmc-r0/custom_led.bin
Normal file
Binary file not shown.
8
device/quanta/x86_64-quanta_ix7_rglbmc-r0/led_proc_init.soc
Executable file → Normal file
8
device/quanta/x86_64-quanta_ix7_rglbmc-r0/led_proc_init.soc
Executable file → Normal file
@ -1,6 +1,4 @@
|
||||
sleep 10
|
||||
led stop
|
||||
sleep 3
|
||||
m0 load 0 0x3800 /usr/share/sonic/platform/custom_led.bin
|
||||
led start
|
||||
sleep 3
|
||||
led auto on
|
||||
|
||||
rcload /usr/share/sonic/platform/preemphasis-32x100G.soc
|
||||
|
||||
@ -16,5 +16,5 @@ class board(eeprom_tlvinfo.TlvInfoDecoder):
|
||||
_TLV_INFO_MAX_LEN = 256
|
||||
|
||||
def __init__(self, name, path, cpld_root, ro):
|
||||
self.eeprom_path = "/sys/bus/i2c/devices/18-0054/eeprom"
|
||||
self.eeprom_path = "/sys/bus/i2c/devices/3-0054/eeprom"
|
||||
super(board, self).__init__(self.eeprom_path, 0, '', True)
|
||||
|
||||
110
device/quanta/x86_64-quanta_ix7_rglbmc-r0/plugins/fanutil.py
Normal file
110
device/quanta/x86_64-quanta_ix7_rglbmc-r0/plugins/fanutil.py
Normal file
@ -0,0 +1,110 @@
|
||||
#
|
||||
# fanutil.py
|
||||
# Platform-specific Fan status interface for SONiC
|
||||
#
|
||||
|
||||
import logging
|
||||
import os.path
|
||||
|
||||
try:
|
||||
from sonic_fan.fan_base import FanBase
|
||||
except ImportError as e:
|
||||
raise ImportError (str(e) + "- required module not found")
|
||||
|
||||
class FanUtil(FanBase):
|
||||
"""Platform-specific FANutil class"""
|
||||
|
||||
SYS_FAN_NUM = 6
|
||||
NUM_FANS_PERTRAY = 2
|
||||
HWMON_PATH = '/sys/class/hwmon/hwmon1/'
|
||||
FAN_INDEX_START = 21
|
||||
|
||||
logger = logging.getLogger(__name__)
|
||||
|
||||
def __init__(self, log_level=logging.DEBUG):
|
||||
FanBase.__init__(self)
|
||||
self.num_fans = (self.SYS_FAN_NUM * self.NUM_FANS_PERTRAY)
|
||||
|
||||
# Get sysfs attribute
|
||||
def get_attr_value(self, attr_path):
|
||||
|
||||
retval = 'ERR'
|
||||
if (not os.path.isfile(attr_path)):
|
||||
return retval
|
||||
|
||||
try:
|
||||
with open(attr_path, 'r') as fd:
|
||||
retval = fd.read()
|
||||
except Exception:
|
||||
logging.error("Unable to open ", attr_path, " file !")
|
||||
|
||||
retval = retval.rstrip('\r\n')
|
||||
return retval
|
||||
|
||||
def check_fan_index(self, index):
|
||||
if index is None:
|
||||
return False
|
||||
|
||||
if index < 1 or index > self.num_fans:
|
||||
logging.error("Invalid Fan index:", index)
|
||||
return False
|
||||
|
||||
return True
|
||||
|
||||
def get_num_fans(self):
|
||||
return self.num_fans
|
||||
|
||||
def get_status(self, index):
|
||||
if self.check_fan_index(index) == False:
|
||||
return False
|
||||
|
||||
fantray_speed_file = 'fan' + str(self.FAN_INDEX_START+(index-1)) + '_input'
|
||||
fantray_speed = self.get_attr_value(self.HWMON_PATH + fantray_speed_file)
|
||||
|
||||
if fantray_speed == '0.0' :
|
||||
return False
|
||||
|
||||
return True
|
||||
|
||||
def get_presence(self, index):
|
||||
if self.check_fan_index(index) == False:
|
||||
return False
|
||||
|
||||
fantray_present_file = 'fan' + str(self.FAN_INDEX_START+(index-1)) + '_present'
|
||||
fantray_present = self.get_attr_value(self.HWMON_PATH + fantray_present_file)
|
||||
|
||||
if fantray_present == '1' :
|
||||
return True
|
||||
|
||||
return False
|
||||
|
||||
def get_direction(self, index):
|
||||
if self.check_fan_index(index) == False:
|
||||
return None
|
||||
|
||||
fantray_direction_file = 'fan' + str(self.FAN_INDEX_START+(index-1)) + '_direction'
|
||||
fantray_direction = self.get_attr_value(self.HWMON_PATH + fantray_direction_file)
|
||||
|
||||
"""
|
||||
1: FB 2: BF
|
||||
Since the fan is at rear of the switch, FB means Exhaust; BF means Intake
|
||||
"""
|
||||
if fantray_direction == '2':
|
||||
return "INTAKE"
|
||||
else:
|
||||
return "EXHAUST"
|
||||
|
||||
def get_speed(self, index):
|
||||
if self.check_fan_index(index) == False:
|
||||
return 0
|
||||
|
||||
fantray_speed_file = 'fan' + str(self.FAN_INDEX_START+(index-1)) + '_input'
|
||||
fantray_speed = self.get_attr_value(self.HWMON_PATH + fantray_speed_file)
|
||||
|
||||
return int(float(fantray_speed))
|
||||
|
||||
|
||||
def set_speed(self, val):
|
||||
logging.error("Not allowed to set fan speed!")
|
||||
|
||||
return False
|
||||
@ -3,6 +3,7 @@
|
||||
# Platform-specific PSU status interface for SONiC
|
||||
#
|
||||
|
||||
import logging
|
||||
import os.path
|
||||
|
||||
try:
|
||||
@ -14,17 +15,47 @@ except ImportError as e:
|
||||
class PsuUtil(PsuBase):
|
||||
"""Platform-specific PSUutil class"""
|
||||
|
||||
HWMON_PATH = '/sys/class/hwmon/hwmon1/'
|
||||
PSU1_PREFIX = 'power42_'
|
||||
PSU2_PREFIX = 'power52_'
|
||||
MAX_PSUS = 2
|
||||
def __init__(self):
|
||||
PsuBase.__init__(self)
|
||||
|
||||
# Get sysfs attribute
|
||||
def get_attr_value(self, attr_path):
|
||||
|
||||
retval = 'ERR'
|
||||
if (not os.path.isfile(attr_path)):
|
||||
return retval
|
||||
|
||||
try:
|
||||
with open(attr_path, 'r') as fd:
|
||||
retval = fd.read()
|
||||
except Exception:
|
||||
logging.error("Unable to open ", attr_path, " file !")
|
||||
|
||||
retval = retval.rstrip('\r\n')
|
||||
return retval
|
||||
|
||||
def get_attr_filename(self, index, attr):
|
||||
if (index == 1):
|
||||
attr_file = self.PSU1_PREFIX + attr
|
||||
elif (index == 2):
|
||||
attr_file = self.PSU2_PREFIX + attr
|
||||
else:
|
||||
logging.error("Invalid PSU number:", index)
|
||||
return ''
|
||||
|
||||
return attr_file
|
||||
|
||||
def get_num_psus(self):
|
||||
"""
|
||||
Retrieves the number of PSUs available on the device
|
||||
:return: An integer, the number of PSUs available on the device
|
||||
"""
|
||||
MAX_PSUS = 2
|
||||
|
||||
return MAX_PSUS
|
||||
return self.MAX_PSUS
|
||||
|
||||
def get_psu_status(self, index):
|
||||
"""
|
||||
@ -34,7 +65,21 @@ class PsuUtil(PsuBase):
|
||||
:return: Boolean, True if PSU is operating properly, False if PSU is\
|
||||
faulty
|
||||
"""
|
||||
status = 1
|
||||
status = False
|
||||
|
||||
attr_filename = self.get_attr_filename(index, 'input')
|
||||
if attr_filename == '':
|
||||
return status
|
||||
|
||||
attr_path = self.HWMON_PATH + attr_filename
|
||||
attr_value = self.get_attr_value(attr_path)
|
||||
|
||||
if (attr_value != 'ERR'):
|
||||
attr_value = float(attr_value)
|
||||
|
||||
# Check PSU status
|
||||
if (attr_value != 0.0):
|
||||
status = True
|
||||
|
||||
return status
|
||||
|
||||
@ -45,6 +90,162 @@ class PsuUtil(PsuBase):
|
||||
:param index: An integer, index of the PSU of which to query status
|
||||
:return: Boolean, True if PSU is plugged, False if not
|
||||
"""
|
||||
status = 1
|
||||
status = False
|
||||
|
||||
attr_filename = self.get_attr_filename(index, 'present')
|
||||
if attr_filename == '':
|
||||
return status
|
||||
|
||||
attr_path = self.HWMON_PATH + attr_filename
|
||||
attr_value = self.get_attr_value(attr_path)
|
||||
|
||||
if (attr_value != 'ERR'):
|
||||
attr_value = int(attr_value, 16)
|
||||
# Check PSU status
|
||||
if (attr_value == 1):
|
||||
status = True
|
||||
return status
|
||||
|
||||
def get_powergood_status(self, index):
|
||||
status = False
|
||||
|
||||
attr_filename = self.get_attr_filename(index, 'input')
|
||||
if attr_filename == '':
|
||||
return status
|
||||
|
||||
attr_path = self.HWMON_PATH + attr_filename
|
||||
attr_value = self.get_attr_value(attr_path)
|
||||
|
||||
if (attr_value != 'ERR'):
|
||||
attr_value = float(attr_value)
|
||||
|
||||
# Check PSU status
|
||||
if (attr_value != 0.0):
|
||||
status = True
|
||||
|
||||
return status
|
||||
|
||||
def get_model(self, index):
|
||||
attr_filename = self.get_attr_filename(index, 'model')
|
||||
if attr_filename == '':
|
||||
return None
|
||||
|
||||
attr_path = self.HWMON_PATH + attr_filename
|
||||
attr_value = self.get_attr_value(attr_path)
|
||||
|
||||
if (attr_value != 'ERR'):
|
||||
return attr_value.rstrip()
|
||||
|
||||
def get_mfr_id(self, index):
|
||||
attr_filename = self.get_attr_filename(index, 'mfrid')
|
||||
if attr_filename == '':
|
||||
return None
|
||||
|
||||
attr_path = self.HWMON_PATH + attr_filename
|
||||
attr_value = self.get_attr_value(attr_path)
|
||||
|
||||
if (attr_value != 'ERR'):
|
||||
return attr_value.rstrip()
|
||||
|
||||
def get_serial(self, index):
|
||||
attr_filename = self.get_attr_filename(index, 'sn')
|
||||
if attr_filename == '':
|
||||
return None
|
||||
|
||||
attr_path = self.HWMON_PATH + attr_filename
|
||||
attr_value = self.get_attr_value(attr_path)
|
||||
|
||||
if (attr_value != 'ERR'):
|
||||
return attr_value.rstrip()
|
||||
|
||||
def get_direction(self, index):
|
||||
if (index == 1):
|
||||
direction_file = 'fan40_direction'
|
||||
elif (index == 2):
|
||||
direction_file = 'fan50_direction'
|
||||
else:
|
||||
logging.error("Invalid PSU number:", index)
|
||||
return None
|
||||
|
||||
direction = self.get_attr_value(self.HWMON_PATH + direction_file)
|
||||
direction = direction.rstrip()
|
||||
|
||||
"""
|
||||
1: FB 2: BF
|
||||
Since the fan is at rear of the switch, FB means Exhaust; BF means Intake
|
||||
"""
|
||||
if direction == '2':
|
||||
return "INTAKE"
|
||||
else:
|
||||
return "EXHAUST"
|
||||
|
||||
def get_output_voltage(self, index):
|
||||
if (index == 1):
|
||||
attr_file = 'in47_input'
|
||||
elif (index == 2):
|
||||
attr_file = 'in57_input'
|
||||
else:
|
||||
logging.error("Invalid PSU number:", index)
|
||||
return 0.0
|
||||
|
||||
voltage = self.get_attr_value(self.HWMON_PATH + attr_file)
|
||||
voltage = voltage.rstrip()
|
||||
|
||||
if (voltage != 'ERR'):
|
||||
voltage, dummy = voltage.split('.', 1)
|
||||
else:
|
||||
return 0.0
|
||||
|
||||
return float(voltage)/1000
|
||||
|
||||
def get_output_current(self, index):
|
||||
if (index == 1):
|
||||
attr_file = 'curr39_input'
|
||||
elif (index == 2):
|
||||
attr_file = 'curr49_input'
|
||||
else:
|
||||
logging.error("Invalid PSU number:", index)
|
||||
return 0.0
|
||||
|
||||
current = self.get_attr_value(self.HWMON_PATH + attr_file)
|
||||
current = current.rstrip()
|
||||
|
||||
if (current != 'ERR'):
|
||||
current, dummy = current.split('.',1)
|
||||
else:
|
||||
return 0.0
|
||||
|
||||
return float(current)/1000
|
||||
|
||||
def get_output_power(self, index):
|
||||
attr_filename = self.get_attr_filename(index, 'input')
|
||||
if attr_filename == '':
|
||||
return 0.0
|
||||
|
||||
attr_path = self.HWMON_PATH + attr_filename
|
||||
attr_value = self.get_attr_value(attr_path)
|
||||
|
||||
if (attr_value != 'ERR'):
|
||||
attr_value = float(attr_value)
|
||||
else:
|
||||
return 0.0
|
||||
|
||||
return float(attr_value/1000)
|
||||
|
||||
def get_fan_rpm(self, index, fan_idx):
|
||||
if (index == 1):
|
||||
rpm_file = 'fan40_input'
|
||||
elif (index == 2):
|
||||
rpm_file = 'fan50_input'
|
||||
else:
|
||||
logging.error("Invalid PSU number:", index)
|
||||
return 0
|
||||
|
||||
rpm = self.get_attr_value(self.HWMON_PATH + rpm_file)
|
||||
rpm = rpm.rstrip()
|
||||
if (rpm != 'ERR'):
|
||||
rpm = float(rpm)
|
||||
else:
|
||||
return 0
|
||||
|
||||
return int(rpm)
|
||||
|
||||
@ -21,38 +21,38 @@ class SfpUtil(SfpUtilBase):
|
||||
|
||||
_port_to_eeprom_mapping = {}
|
||||
_port_to_i2c_mapping = {
|
||||
1: 32,
|
||||
2: 33,
|
||||
3: 34,
|
||||
4: 35,
|
||||
5: 36,
|
||||
6: 37,
|
||||
7: 38,
|
||||
8: 39,
|
||||
9: 40,
|
||||
10: 41,
|
||||
11: 42,
|
||||
12: 43,
|
||||
13: 44,
|
||||
14: 45,
|
||||
15: 46,
|
||||
16: 47,
|
||||
17: 48,
|
||||
18: 49,
|
||||
19: 50,
|
||||
20: 51,
|
||||
21: 52,
|
||||
22: 53,
|
||||
23: 54,
|
||||
24: 55,
|
||||
25: 56,
|
||||
26: 57,
|
||||
27: 58,
|
||||
28: 59,
|
||||
29: 60,
|
||||
30: 61,
|
||||
31: 62,
|
||||
32: 63,
|
||||
1 : 17,
|
||||
2 : 18,
|
||||
3 : 19,
|
||||
4 : 20,
|
||||
5 : 21,
|
||||
6 : 22,
|
||||
7 : 23,
|
||||
8 : 24,
|
||||
9 : 25,
|
||||
10 : 26,
|
||||
11 : 27,
|
||||
12 : 28,
|
||||
13 : 29,
|
||||
14 : 30,
|
||||
15 : 31,
|
||||
16 : 32,
|
||||
17 : 33,
|
||||
18 : 34,
|
||||
19 : 35,
|
||||
20 : 36,
|
||||
21 : 37,
|
||||
22 : 38,
|
||||
23 : 39,
|
||||
24 : 40,
|
||||
25 : 41,
|
||||
26 : 42,
|
||||
27 : 43,
|
||||
28 : 44,
|
||||
29 : 45,
|
||||
30 : 46,
|
||||
31 : 47,
|
||||
32 : 48
|
||||
}
|
||||
|
||||
@property
|
||||
|
||||
@ -0,0 +1,3 @@
|
||||
{
|
||||
"skip_ledd": true
|
||||
}
|
||||
@ -0,0 +1,546 @@
|
||||
# Pre-emphasis
|
||||
|
||||
phy raw c45 0xa5 0x1 0xffde 0
|
||||
phy raw c45 0xa5 0x1 0xd130 0x41
|
||||
phy raw c45 0xa5 0x1 0xd131 0xd
|
||||
phy raw c45 0xa5 0x1 0xd134 1
|
||||
phy raw c45 0xa5 0x1 0xffde 1
|
||||
phy raw c45 0xa5 0x1 0xd130 0x41
|
||||
phy raw c45 0xa5 0x1 0xd131 0xd
|
||||
phy raw c45 0xa5 0x1 0xd134 1
|
||||
phy raw c45 0xa5 0x1 0xffde 2
|
||||
phy raw c45 0xa5 0x1 0xd130 0x41
|
||||
phy raw c45 0xa5 0x1 0xd131 0xd
|
||||
phy raw c45 0xa5 0x1 0xd134 1
|
||||
phy raw c45 0xa5 0x1 0xffde 3
|
||||
phy raw c45 0xa5 0x1 0xd130 0x41
|
||||
phy raw c45 0xa5 0x1 0xd131 0xd
|
||||
phy raw c45 0xa5 0x1 0xd134 1
|
||||
|
||||
phy raw c45 0xa9 0x1 0xffde 0
|
||||
phy raw c45 0xa9 0x1 0xd130 0x41
|
||||
phy raw c45 0xa9 0x1 0xd131 0xd
|
||||
phy raw c45 0xa9 0x1 0xd134 1
|
||||
phy raw c45 0xa9 0x1 0xffde 1
|
||||
phy raw c45 0xa9 0x1 0xd130 0x41
|
||||
phy raw c45 0xa9 0x1 0xd131 0xd
|
||||
phy raw c45 0xa9 0x1 0xd134 1
|
||||
phy raw c45 0xa9 0x1 0xffde 2
|
||||
phy raw c45 0xa9 0x1 0xd130 0x41
|
||||
phy raw c45 0xa9 0x1 0xd131 0xd
|
||||
phy raw c45 0xa9 0x1 0xd134 1
|
||||
phy raw c45 0xa9 0x1 0xffde 3
|
||||
phy raw c45 0xa9 0x1 0xd130 0x41
|
||||
phy raw c45 0xa9 0x1 0xd131 0xd
|
||||
phy raw c45 0xa9 0x1 0xd134 1
|
||||
|
||||
phy raw c45 0xc1 0x1 0xffde 0
|
||||
phy raw c45 0xc1 0x1 0xd130 0x41
|
||||
phy raw c45 0xc1 0x1 0xd131 0xd
|
||||
phy raw c45 0xc1 0x1 0xd134 1
|
||||
phy raw c45 0xc1 0x1 0xffde 1
|
||||
phy raw c45 0xc1 0x1 0xd130 0x41
|
||||
phy raw c45 0xc1 0x1 0xd131 0xd
|
||||
phy raw c45 0xc1 0x1 0xd134 1
|
||||
phy raw c45 0xc1 0x1 0xffde 2
|
||||
phy raw c45 0xc1 0x1 0xd130 0x41
|
||||
phy raw c45 0xc1 0x1 0xd131 0xd
|
||||
phy raw c45 0xc1 0x1 0xd134 1
|
||||
phy raw c45 0xc1 0x1 0xffde 3
|
||||
phy raw c45 0xc1 0x1 0xd130 0x41
|
||||
phy raw c45 0xc1 0x1 0xd131 0xd
|
||||
phy raw c45 0xc1 0x1 0xd134 1
|
||||
|
||||
phy raw c45 0xc5 0x1 0xffde 0
|
||||
phy raw c45 0xc5 0x1 0xd130 0x41
|
||||
phy raw c45 0xc5 0x1 0xd131 0xd
|
||||
phy raw c45 0xc5 0x1 0xd134 1
|
||||
phy raw c45 0xc5 0x1 0xffde 1
|
||||
phy raw c45 0xc5 0x1 0xd130 0x41
|
||||
phy raw c45 0xc5 0x1 0xd131 0xd
|
||||
phy raw c45 0xc5 0x1 0xd134 1
|
||||
phy raw c45 0xc5 0x1 0xffde 2
|
||||
phy raw c45 0xc5 0x1 0xd130 0x41
|
||||
phy raw c45 0xc5 0x1 0xd131 0xd
|
||||
phy raw c45 0xc5 0x1 0xd134 1
|
||||
phy raw c45 0xc5 0x1 0xffde 3
|
||||
phy raw c45 0xc5 0x1 0xd130 0x41
|
||||
phy raw c45 0xc5 0x1 0xd131 0xd
|
||||
phy raw c45 0xc5 0x1 0xd134 1
|
||||
|
||||
phy raw c45 0x81 0x1 0xffde 0
|
||||
phy raw c45 0x81 0x1 0xd130 0x41
|
||||
phy raw c45 0x81 0x1 0xd131 0xd
|
||||
phy raw c45 0x81 0x1 0xd134 1
|
||||
phy raw c45 0x81 0x1 0xffde 1
|
||||
phy raw c45 0x81 0x1 0xd130 0x41
|
||||
phy raw c45 0x81 0x1 0xd131 0xd
|
||||
phy raw c45 0x81 0x1 0xd134 1
|
||||
phy raw c45 0x81 0x1 0xffde 2
|
||||
phy raw c45 0x81 0x1 0xd130 0x41
|
||||
phy raw c45 0x81 0x1 0xd131 0xd
|
||||
phy raw c45 0x81 0x1 0xd134 1
|
||||
phy raw c45 0x81 0x1 0xffde 3
|
||||
phy raw c45 0x81 0x1 0xd130 0x41
|
||||
phy raw c45 0x81 0x1 0xd131 0xd
|
||||
phy raw c45 0x81 0x1 0xd134 1
|
||||
|
||||
phy raw c45 0x85 0x1 0xffde 0
|
||||
phy raw c45 0x85 0x1 0xd130 0x41
|
||||
phy raw c45 0x85 0x1 0xd131 0xd
|
||||
phy raw c45 0x85 0x1 0xd134 1
|
||||
phy raw c45 0x85 0x1 0xffde 1
|
||||
phy raw c45 0x85 0x1 0xd130 0x41
|
||||
phy raw c45 0x85 0x1 0xd131 0xd
|
||||
phy raw c45 0x85 0x1 0xd134 1
|
||||
phy raw c45 0x85 0x1 0xffde 2
|
||||
phy raw c45 0x85 0x1 0xd130 0x41
|
||||
phy raw c45 0x85 0x1 0xd131 0xd
|
||||
phy raw c45 0x85 0x1 0xd134 1
|
||||
phy raw c45 0x85 0x1 0xffde 3
|
||||
phy raw c45 0x85 0x1 0xd130 0x41
|
||||
phy raw c45 0x85 0x1 0xd131 0xd
|
||||
phy raw c45 0x85 0x1 0xd134 1
|
||||
|
||||
phy raw c45 0x89 0x1 0xffde 0
|
||||
phy raw c45 0x89 0x1 0xd130 0x41
|
||||
phy raw c45 0x89 0x1 0xd131 0xd
|
||||
phy raw c45 0x89 0x1 0xd134 1
|
||||
phy raw c45 0x89 0x1 0xffde 1
|
||||
phy raw c45 0x89 0x1 0xd130 0x41
|
||||
phy raw c45 0x89 0x1 0xd131 0xd
|
||||
phy raw c45 0x89 0x1 0xd134 1
|
||||
phy raw c45 0x89 0x1 0xffde 2
|
||||
phy raw c45 0x89 0x1 0xd130 0x41
|
||||
phy raw c45 0x89 0x1 0xd131 0xd
|
||||
phy raw c45 0x89 0x1 0xd134 1
|
||||
phy raw c45 0x89 0x1 0xffde 3
|
||||
phy raw c45 0x89 0x1 0xd130 0x41
|
||||
phy raw c45 0x89 0x1 0xd131 0xd
|
||||
phy raw c45 0x89 0x1 0xd134 1
|
||||
|
||||
phy raw c45 0x8d 0x1 0xffde 0
|
||||
phy raw c45 0x8d 0x1 0xd130 0x41
|
||||
phy raw c45 0x8d 0x1 0xd131 0xd
|
||||
phy raw c45 0x8d 0x1 0xd134 1
|
||||
phy raw c45 0x8d 0x1 0xffde 1
|
||||
phy raw c45 0x8d 0x1 0xd130 0x41
|
||||
phy raw c45 0x8d 0x1 0xd131 0xd
|
||||
phy raw c45 0x8d 0x1 0xd134 1
|
||||
phy raw c45 0x8d 0x1 0xffde 2
|
||||
phy raw c45 0x8d 0x1 0xd130 0x41
|
||||
phy raw c45 0x8d 0x1 0xd131 0xd
|
||||
phy raw c45 0x8d 0x1 0xd134 1
|
||||
phy raw c45 0x8d 0x1 0xffde 3
|
||||
phy raw c45 0x8d 0x1 0xd130 0x41
|
||||
phy raw c45 0x8d 0x1 0xd131 0xd
|
||||
phy raw c45 0x8d 0x1 0xd134 1
|
||||
|
||||
phy raw c45 0x91 0x1 0xffde 0
|
||||
phy raw c45 0x91 0x1 0xd130 0x41
|
||||
phy raw c45 0x91 0x1 0xd131 0x0408
|
||||
phy raw c45 0x91 0x1 0xd134 1
|
||||
phy raw c45 0x91 0x1 0xffde 1
|
||||
phy raw c45 0x91 0x1 0xd130 0x41
|
||||
phy raw c45 0x91 0x1 0xd131 0x0408
|
||||
phy raw c45 0x91 0x1 0xd134 1
|
||||
phy raw c45 0x91 0x1 0xffde 2
|
||||
phy raw c45 0x91 0x1 0xd130 0x41
|
||||
phy raw c45 0x91 0x1 0xd131 0x0408
|
||||
phy raw c45 0x91 0x1 0xd134 1
|
||||
phy raw c45 0x91 0x1 0xffde 3
|
||||
phy raw c45 0x91 0x1 0xd130 0x41
|
||||
phy raw c45 0x91 0x1 0xd131 0x0408
|
||||
phy raw c45 0x91 0x1 0xd134 1
|
||||
|
||||
phy raw c45 0x95 0x1 0xffde 0
|
||||
phy raw c45 0x95 0x1 0xd130 0x41
|
||||
phy raw c45 0x95 0x1 0xd131 0x0307
|
||||
phy raw c45 0x95 0x1 0xd134 1
|
||||
phy raw c45 0x95 0x1 0xffde 1
|
||||
phy raw c45 0x95 0x1 0xd130 0x41
|
||||
phy raw c45 0x95 0x1 0xd131 0x0307
|
||||
phy raw c45 0x95 0x1 0xd134 1
|
||||
phy raw c45 0x95 0x1 0xffde 2
|
||||
phy raw c45 0x95 0x1 0xd130 0x41
|
||||
phy raw c45 0x95 0x1 0xd131 0x0307
|
||||
phy raw c45 0x95 0x1 0xd134 1
|
||||
phy raw c45 0x95 0x1 0xffde 3
|
||||
phy raw c45 0x95 0x1 0xd130 0x41
|
||||
phy raw c45 0x95 0x1 0xd131 0x0307
|
||||
phy raw c45 0x95 0x1 0xd134 1
|
||||
|
||||
phy raw c45 0xa1 0x1 0xffde 0
|
||||
phy raw c45 0xa1 0x1 0xd130 0x41
|
||||
phy raw c45 0xa1 0x1 0xd131 0x0307
|
||||
phy raw c45 0xa1 0x1 0xd134 1
|
||||
phy raw c45 0xa1 0x1 0xffde 1
|
||||
phy raw c45 0xa1 0x1 0xd130 0x41
|
||||
phy raw c45 0xa1 0x1 0xd131 0x0307
|
||||
phy raw c45 0xa1 0x1 0xd134 1
|
||||
phy raw c45 0xa1 0x1 0xffde 2
|
||||
phy raw c45 0xa1 0x1 0xd130 0x41
|
||||
phy raw c45 0xa1 0x1 0xd131 0x0307
|
||||
phy raw c45 0xa1 0x1 0xd134 1
|
||||
phy raw c45 0xa1 0x1 0xffde 3
|
||||
phy raw c45 0xa1 0x1 0xd130 0x41
|
||||
phy raw c45 0xa1 0x1 0xd131 0x0307
|
||||
phy raw c45 0xa1 0x1 0xd134 1
|
||||
|
||||
phy raw c45 0xad 0x1 0xffde 0
|
||||
phy raw c45 0xad 0x1 0xd130 0x41
|
||||
phy raw c45 0xad 0x1 0xd131 0x0307
|
||||
phy raw c45 0xad 0x1 0xd134 1
|
||||
phy raw c45 0xad 0x1 0xffde 1
|
||||
phy raw c45 0xad 0x1 0xd130 0x41
|
||||
phy raw c45 0xad 0x1 0xd131 0x0307
|
||||
phy raw c45 0xad 0x1 0xd134 1
|
||||
phy raw c45 0xad 0x1 0xffde 2
|
||||
phy raw c45 0xad 0x1 0xd130 0x41
|
||||
phy raw c45 0xad 0x1 0xd131 0x0307
|
||||
phy raw c45 0xad 0x1 0xd134 1
|
||||
phy raw c45 0xad 0x1 0xffde 3
|
||||
phy raw c45 0xad 0x1 0xd130 0x41
|
||||
phy raw c45 0xad 0x1 0xd131 0x0307
|
||||
phy raw c45 0xad 0x1 0xd134 1
|
||||
|
||||
phy raw c45 0xc9 0x1 0xffde 0
|
||||
phy raw c45 0xc9 0x1 0xd130 0x41
|
||||
phy raw c45 0xc9 0x1 0xd131 0x0307
|
||||
phy raw c45 0xc9 0x1 0xd134 1
|
||||
phy raw c45 0xc9 0x1 0xffde 1
|
||||
phy raw c45 0xc9 0x1 0xd130 0x41
|
||||
phy raw c45 0xc9 0x1 0xd131 0x0307
|
||||
phy raw c45 0xc9 0x1 0xd134 1
|
||||
phy raw c45 0xc9 0x1 0xffde 2
|
||||
phy raw c45 0xc9 0x1 0xd130 0x41
|
||||
phy raw c45 0xc9 0x1 0xd131 0x0307
|
||||
phy raw c45 0xc9 0x1 0xd134 1
|
||||
phy raw c45 0xc9 0x1 0xffde 3
|
||||
phy raw c45 0xc9 0x1 0xd130 0x41
|
||||
phy raw c45 0xc9 0x1 0xd131 0x0307
|
||||
phy raw c45 0xc9 0x1 0xd134 1
|
||||
|
||||
phy raw c45 0xcd 0x1 0xffde 0
|
||||
phy raw c45 0xcd 0x1 0xd130 0x41
|
||||
phy raw c45 0xcd 0x1 0xd131 0x0307
|
||||
phy raw c45 0xcd 0x1 0xd134 1
|
||||
phy raw c45 0xcd 0x1 0xffde 1
|
||||
phy raw c45 0xcd 0x1 0xd130 0x41
|
||||
phy raw c45 0xcd 0x1 0xd131 0x0307
|
||||
phy raw c45 0xcd 0x1 0xd134 1
|
||||
phy raw c45 0xcd 0x1 0xffde 2
|
||||
phy raw c45 0xcd 0x1 0xd130 0x41
|
||||
phy raw c45 0xcd 0x1 0xd131 0x0307
|
||||
phy raw c45 0xcd 0x1 0xd134 1
|
||||
phy raw c45 0xcd 0x1 0xffde 3
|
||||
phy raw c45 0xcd 0x1 0xd130 0x41
|
||||
phy raw c45 0xcd 0x1 0xd131 0x0307
|
||||
phy raw c45 0xcd 0x1 0xd134 1
|
||||
|
||||
phy raw c45 0xd1 0x1 0xffde 0
|
||||
phy raw c45 0xd1 0x1 0xd130 0x41
|
||||
phy raw c45 0xd1 0x1 0xd131 0x0307
|
||||
phy raw c45 0xd1 0x1 0xd134 1
|
||||
phy raw c45 0xd1 0x1 0xffde 1
|
||||
phy raw c45 0xd1 0x1 0xd130 0x41
|
||||
phy raw c45 0xd1 0x1 0xd131 0x0307
|
||||
phy raw c45 0xd1 0x1 0xd134 1
|
||||
phy raw c45 0xd1 0x1 0xffde 2
|
||||
phy raw c45 0xd1 0x1 0xd130 0x41
|
||||
phy raw c45 0xd1 0x1 0xd131 0x0307
|
||||
phy raw c45 0xd1 0x1 0xd134 1
|
||||
phy raw c45 0xd1 0x1 0xffde 3
|
||||
phy raw c45 0xd1 0x1 0xd130 0x41
|
||||
phy raw c45 0xd1 0x1 0xd131 0x0307
|
||||
phy raw c45 0xd1 0x1 0xd134 1
|
||||
|
||||
phy raw c45 0xd5 0x1 0xffde 0
|
||||
phy raw c45 0xd5 0x1 0xd130 0x41
|
||||
phy raw c45 0xd5 0x1 0xd131 0x0307
|
||||
phy raw c45 0xd5 0x1 0xd134 1
|
||||
phy raw c45 0xd5 0x1 0xffde 1
|
||||
phy raw c45 0xd5 0x1 0xd130 0x41
|
||||
phy raw c45 0xd5 0x1 0xd131 0x0307
|
||||
phy raw c45 0xd5 0x1 0xd134 1
|
||||
phy raw c45 0xd5 0x1 0xffde 2
|
||||
phy raw c45 0xd5 0x1 0xd130 0x41
|
||||
phy raw c45 0xd5 0x1 0xd131 0x0307
|
||||
phy raw c45 0xd5 0x1 0xd134 1
|
||||
phy raw c45 0xd5 0x1 0xffde 3
|
||||
phy raw c45 0xd5 0x1 0xd130 0x41
|
||||
phy raw c45 0xd5 0x1 0xd131 0x0307
|
||||
phy raw c45 0xd5 0x1 0xd134 1
|
||||
|
||||
phy raw c45 0xe1 0x1 0xffde 0
|
||||
phy raw c45 0xe1 0x1 0xd130 0x41
|
||||
phy raw c45 0xe1 0x1 0xd131 0x0307
|
||||
phy raw c45 0xe1 0x1 0xd134 1
|
||||
phy raw c45 0xe1 0x1 0xffde 1
|
||||
phy raw c45 0xe1 0x1 0xd130 0x41
|
||||
phy raw c45 0xe1 0x1 0xd131 0x0307
|
||||
phy raw c45 0xe1 0x1 0xd134 1
|
||||
phy raw c45 0xe1 0x1 0xffde 2
|
||||
phy raw c45 0xe1 0x1 0xd130 0x41
|
||||
phy raw c45 0xe1 0x1 0xd131 0x0307
|
||||
phy raw c45 0xe1 0x1 0xd134 1
|
||||
phy raw c45 0xe1 0x1 0xffde 3
|
||||
phy raw c45 0xe1 0x1 0xd130 0x41
|
||||
phy raw c45 0xe1 0x1 0xd131 0x0307
|
||||
phy raw c45 0xe1 0x1 0xd134 1
|
||||
|
||||
phy raw c45 0xe5 0x1 0xffde 0
|
||||
phy raw c45 0xe5 0x1 0xd130 0x41
|
||||
phy raw c45 0xe5 0x1 0xd131 0x0307
|
||||
phy raw c45 0xe5 0x1 0xd134 1
|
||||
phy raw c45 0xe5 0x1 0xffde 1
|
||||
phy raw c45 0xe5 0x1 0xd130 0x41
|
||||
phy raw c45 0xe5 0x1 0xd131 0x0307
|
||||
phy raw c45 0xe5 0x1 0xd134 1
|
||||
phy raw c45 0xe5 0x1 0xffde 2
|
||||
phy raw c45 0xe5 0x1 0xd130 0x41
|
||||
phy raw c45 0xe5 0x1 0xd131 0x0307
|
||||
phy raw c45 0xe5 0x1 0xd134 1
|
||||
phy raw c45 0xe5 0x1 0xffde 3
|
||||
phy raw c45 0xe5 0x1 0xd130 0x41
|
||||
phy raw c45 0xe5 0x1 0xd131 0x0307
|
||||
phy raw c45 0xe5 0x1 0xd134 1
|
||||
|
||||
phy raw c45 0xe9 0x1 0xffde 0
|
||||
phy raw c45 0xe9 0x1 0xd130 0x41
|
||||
phy raw c45 0xe9 0x1 0xd131 0x0307
|
||||
phy raw c45 0xe9 0x1 0xd134 1
|
||||
phy raw c45 0xe9 0x1 0xffde 1
|
||||
phy raw c45 0xe9 0x1 0xd130 0x41
|
||||
phy raw c45 0xe9 0x1 0xd131 0x0307
|
||||
phy raw c45 0xe9 0x1 0xd134 1
|
||||
phy raw c45 0xe9 0x1 0xffde 2
|
||||
phy raw c45 0xe9 0x1 0xd130 0x41
|
||||
phy raw c45 0xe9 0x1 0xd131 0x0307
|
||||
phy raw c45 0xe9 0x1 0xd134 1
|
||||
phy raw c45 0xe9 0x1 0xffde 3
|
||||
phy raw c45 0xe9 0x1 0xd130 0x41
|
||||
phy raw c45 0xe9 0x1 0xd131 0x0307
|
||||
phy raw c45 0xe9 0x1 0xd134 1
|
||||
|
||||
phy raw c45 0xed 0x1 0xffde 0
|
||||
phy raw c45 0xed 0x1 0xd130 0x41
|
||||
phy raw c45 0xed 0x1 0xd131 0xb
|
||||
phy raw c45 0xed 0x1 0xd134 1
|
||||
phy raw c45 0xed 0x1 0xffde 1
|
||||
phy raw c45 0xed 0x1 0xd130 0x41
|
||||
phy raw c45 0xed 0x1 0xd131 0xb
|
||||
phy raw c45 0xed 0x1 0xd134 1
|
||||
phy raw c45 0xed 0x1 0xffde 2
|
||||
phy raw c45 0xed 0x1 0xd130 0x41
|
||||
phy raw c45 0xed 0x1 0xd131 0xb
|
||||
phy raw c45 0xed 0x1 0xd134 1
|
||||
phy raw c45 0xed 0x1 0xffde 3
|
||||
phy raw c45 0xed 0x1 0xd130 0x41
|
||||
phy raw c45 0xed 0x1 0xd131 0xb
|
||||
phy raw c45 0xed 0x1 0xd134 1
|
||||
|
||||
phy raw c45 0x185 0x1 0xffde 0
|
||||
phy raw c45 0x185 0x1 0xd130 0x41
|
||||
phy raw c45 0x185 0x1 0xd131 0x0307
|
||||
phy raw c45 0x185 0x1 0xd134 1
|
||||
phy raw c45 0x185 0x1 0xffde 1
|
||||
phy raw c45 0x185 0x1 0xd130 0x41
|
||||
phy raw c45 0x185 0x1 0xd131 0x0307
|
||||
phy raw c45 0x185 0x1 0xd134 1
|
||||
phy raw c45 0x185 0x1 0xffde 2
|
||||
phy raw c45 0x185 0x1 0xd130 0x41
|
||||
phy raw c45 0x185 0x1 0xd131 0x0307
|
||||
phy raw c45 0x185 0x1 0xd134 1
|
||||
phy raw c45 0x185 0x1 0xffde 3
|
||||
phy raw c45 0x185 0x1 0xd130 0x41
|
||||
phy raw c45 0x185 0x1 0xd131 0x0307
|
||||
phy raw c45 0x185 0x1 0xd134 1
|
||||
|
||||
phy raw c45 0x18d 0x1 0xffde 0
|
||||
phy raw c45 0x18d 0x1 0xd130 0x41
|
||||
phy raw c45 0x18d 0x1 0xd131 0x0307
|
||||
phy raw c45 0x18d 0x1 0xd134 1
|
||||
phy raw c45 0x18d 0x1 0xffde 1
|
||||
phy raw c45 0x18d 0x1 0xd130 0x41
|
||||
phy raw c45 0x18d 0x1 0xd131 0x0307
|
||||
phy raw c45 0x18d 0x1 0xd134 1
|
||||
phy raw c45 0x18d 0x1 0xffde 2
|
||||
phy raw c45 0x18d 0x1 0xd130 0x41
|
||||
phy raw c45 0x18d 0x1 0xd131 0x0307
|
||||
phy raw c45 0x18d 0x1 0xd134 1
|
||||
phy raw c45 0x18d 0x1 0xffde 3
|
||||
phy raw c45 0x18d 0x1 0xd130 0x41
|
||||
phy raw c45 0x18d 0x1 0xd131 0x0307
|
||||
phy raw c45 0x18d 0x1 0xd134 1
|
||||
|
||||
phy raw c45 0x1a1 0x1 0xffde 0
|
||||
phy raw c45 0x1a1 0x1 0xd130 0x41
|
||||
phy raw c45 0x1a1 0x1 0xd131 0x0408
|
||||
phy raw c45 0x1a1 0x1 0xd134 1
|
||||
phy raw c45 0x1a1 0x1 0xffde 1
|
||||
phy raw c45 0x1a1 0x1 0xd130 0x41
|
||||
phy raw c45 0x1a1 0x1 0xd131 0x0408
|
||||
phy raw c45 0x1a1 0x1 0xd134 1
|
||||
phy raw c45 0x1a1 0x1 0xffde 2
|
||||
phy raw c45 0x1a1 0x1 0xd130 0x41
|
||||
phy raw c45 0x1a1 0x1 0xd131 0x0408
|
||||
phy raw c45 0x1a1 0x1 0xd134 1
|
||||
phy raw c45 0x1a1 0x1 0xffde 3
|
||||
phy raw c45 0x1a1 0x1 0xd130 0x41
|
||||
phy raw c45 0x1a1 0x1 0xd131 0x0408
|
||||
phy raw c45 0x1a1 0x1 0xd134 1
|
||||
|
||||
phy raw c45 0x1a5 0x1 0xffde 0
|
||||
phy raw c45 0x1a5 0x1 0xd130 0x41
|
||||
phy raw c45 0x1a5 0x1 0xd131 0x0408
|
||||
phy raw c45 0x1a5 0x1 0xd134 1
|
||||
phy raw c45 0x1a5 0x1 0xffde 1
|
||||
phy raw c45 0x1a5 0x1 0xd130 0x41
|
||||
phy raw c45 0x1a5 0x1 0xd131 0x0408
|
||||
phy raw c45 0x1a5 0x1 0xd134 1
|
||||
phy raw c45 0x1a5 0x1 0xffde 2
|
||||
phy raw c45 0x1a5 0x1 0xd130 0x41
|
||||
phy raw c45 0x1a5 0x1 0xd131 0x0408
|
||||
phy raw c45 0x1a5 0x1 0xd134 1
|
||||
phy raw c45 0x1a5 0x1 0xffde 3
|
||||
phy raw c45 0x1a5 0x1 0xd130 0x41
|
||||
phy raw c45 0x1a5 0x1 0xd131 0x0408
|
||||
phy raw c45 0x1a5 0x1 0xd134 1
|
||||
|
||||
phy raw c45 0x1a9 0x1 0xffde 0
|
||||
phy raw c45 0x1a9 0x1 0xd130 0x41
|
||||
phy raw c45 0x1a9 0x1 0xd131 0xb
|
||||
phy raw c45 0x1a9 0x1 0xd134 1
|
||||
phy raw c45 0x1a9 0x1 0xffde 1
|
||||
phy raw c45 0x1a9 0x1 0xd130 0x41
|
||||
phy raw c45 0x1a9 0x1 0xd131 0xb
|
||||
phy raw c45 0x1a9 0x1 0xd134 1
|
||||
phy raw c45 0x1a9 0x1 0xffde 2
|
||||
phy raw c45 0x1a9 0x1 0xd130 0x41
|
||||
phy raw c45 0x1a9 0x1 0xd131 0xb
|
||||
phy raw c45 0x1a9 0x1 0xd134 1
|
||||
phy raw c45 0x1a9 0x1 0xffde 3
|
||||
phy raw c45 0x1a9 0x1 0xd130 0x41
|
||||
phy raw c45 0x1a9 0x1 0xd131 0xb
|
||||
phy raw c45 0x1a9 0x1 0xd134 1
|
||||
|
||||
phy raw c45 0x1ad 0x1 0xffde 0
|
||||
phy raw c45 0x1ad 0x1 0xd130 0x41
|
||||
phy raw c45 0x1ad 0x1 0xd131 0xc
|
||||
phy raw c45 0x1ad 0x1 0xd134 1
|
||||
phy raw c45 0x1ad 0x1 0xffde 1
|
||||
phy raw c45 0x1ad 0x1 0xd130 0x41
|
||||
phy raw c45 0x1ad 0x1 0xd131 0xc
|
||||
phy raw c45 0x1ad 0x1 0xd134 1
|
||||
phy raw c45 0x1ad 0x1 0xffde 2
|
||||
phy raw c45 0x1ad 0x1 0xd130 0x41
|
||||
phy raw c45 0x1ad 0x1 0xd131 0xc
|
||||
phy raw c45 0x1ad 0x1 0xd134 1
|
||||
phy raw c45 0x1ad 0x1 0xffde 3
|
||||
phy raw c45 0x1ad 0x1 0xd130 0x41
|
||||
phy raw c45 0x1ad 0x1 0xd131 0xc
|
||||
phy raw c45 0x1ad 0x1 0xd134 1
|
||||
|
||||
phy raw c45 0x1b1 0x1 0xffde 0
|
||||
phy raw c45 0x1b1 0x1 0xd130 0x41
|
||||
phy raw c45 0x1b1 0x1 0xd131 0xd
|
||||
phy raw c45 0x1b1 0x1 0xd134 1
|
||||
phy raw c45 0x1b1 0x1 0xffde 1
|
||||
phy raw c45 0x1b1 0x1 0xd130 0x41
|
||||
phy raw c45 0x1b1 0x1 0xd131 0xd
|
||||
phy raw c45 0x1b1 0x1 0xd134 1
|
||||
phy raw c45 0x1b1 0x1 0xffde 2
|
||||
phy raw c45 0x1b1 0x1 0xd130 0x41
|
||||
phy raw c45 0x1b1 0x1 0xd131 0xd
|
||||
phy raw c45 0x1b1 0x1 0xd134 1
|
||||
phy raw c45 0x1b1 0x1 0xffde 3
|
||||
phy raw c45 0x1b1 0x1 0xd130 0x41
|
||||
phy raw c45 0x1b1 0x1 0xd131 0xd
|
||||
phy raw c45 0x1b1 0x1 0xd134 1
|
||||
|
||||
phy raw c45 0x1b5 0x1 0xffde 0
|
||||
phy raw c45 0x1b5 0x1 0xd130 0x41
|
||||
phy raw c45 0x1b5 0x1 0xd131 0xf
|
||||
phy raw c45 0x1b5 0x1 0xd134 1
|
||||
phy raw c45 0x1b5 0x1 0xffde 1
|
||||
phy raw c45 0x1b5 0x1 0xd130 0x41
|
||||
phy raw c45 0x1b5 0x1 0xd131 0xf
|
||||
phy raw c45 0x1b5 0x1 0xd134 1
|
||||
phy raw c45 0x1b5 0x1 0xffde 2
|
||||
phy raw c45 0x1b5 0x1 0xd130 0x41
|
||||
phy raw c45 0x1b5 0x1 0xd131 0xf
|
||||
phy raw c45 0x1b5 0x1 0xd134 1
|
||||
phy raw c45 0x1b5 0x1 0xffde 3
|
||||
phy raw c45 0x1b5 0x1 0xd130 0x41
|
||||
phy raw c45 0x1b5 0x1 0xd131 0xf
|
||||
phy raw c45 0x1b5 0x1 0xd134 1
|
||||
|
||||
phy raw c45 0xf1 0x1 0xffde 0
|
||||
phy raw c45 0xf1 0x1 0xd130 0x41
|
||||
phy raw c45 0xf1 0x1 0xd131 0xd
|
||||
phy raw c45 0xf1 0x1 0xd134 1
|
||||
phy raw c45 0xf1 0x1 0xffde 1
|
||||
phy raw c45 0xf1 0x1 0xd130 0x41
|
||||
phy raw c45 0xf1 0x1 0xd131 0xd
|
||||
phy raw c45 0xf1 0x1 0xd134 1
|
||||
phy raw c45 0xf1 0x1 0xffde 2
|
||||
phy raw c45 0xf1 0x1 0xd130 0x41
|
||||
phy raw c45 0xf1 0x1 0xd131 0xd
|
||||
phy raw c45 0xf1 0x1 0xd134 1
|
||||
phy raw c45 0xf1 0x1 0xffde 3
|
||||
phy raw c45 0xf1 0x1 0xd130 0x41
|
||||
phy raw c45 0xf1 0x1 0xd131 0xd
|
||||
phy raw c45 0xf1 0x1 0xd134 1
|
||||
|
||||
phy raw c45 0xf5 0x1 0xffde 0
|
||||
phy raw c45 0xf5 0x1 0xd130 0x41
|
||||
phy raw c45 0xf5 0x1 0xd131 0xf
|
||||
phy raw c45 0xf5 0x1 0xd134 1
|
||||
phy raw c45 0xf5 0x1 0xffde 1
|
||||
phy raw c45 0xf5 0x1 0xd130 0x41
|
||||
phy raw c45 0xf5 0x1 0xd131 0xf
|
||||
phy raw c45 0xf5 0x1 0xd134 1
|
||||
phy raw c45 0xf5 0x1 0xffde 2
|
||||
phy raw c45 0xf5 0x1 0xd130 0x41
|
||||
phy raw c45 0xf5 0x1 0xd131 0xf
|
||||
phy raw c45 0xf5 0x1 0xd134 1
|
||||
phy raw c45 0xf5 0x1 0xffde 3
|
||||
phy raw c45 0xf5 0x1 0xd130 0x41
|
||||
phy raw c45 0xf5 0x1 0xd131 0xf
|
||||
phy raw c45 0xf5 0x1 0xd134 1
|
||||
|
||||
phy raw c45 0x181 0x1 0xffde 0
|
||||
phy raw c45 0x181 0x1 0xd130 0x41
|
||||
phy raw c45 0x181 0x1 0xd131 0xd
|
||||
phy raw c45 0x181 0x1 0xd134 1
|
||||
phy raw c45 0x181 0x1 0xffde 1
|
||||
phy raw c45 0x181 0x1 0xd130 0x41
|
||||
phy raw c45 0x181 0x1 0xd131 0xd
|
||||
phy raw c45 0x181 0x1 0xd134 1
|
||||
phy raw c45 0x181 0x1 0xffde 2
|
||||
phy raw c45 0x181 0x1 0xd130 0x41
|
||||
phy raw c45 0x181 0x1 0xd131 0xd
|
||||
phy raw c45 0x181 0x1 0xd134 1
|
||||
phy raw c45 0x181 0x1 0xffde 3
|
||||
phy raw c45 0x181 0x1 0xd130 0x41
|
||||
phy raw c45 0x181 0x1 0xd131 0xd
|
||||
phy raw c45 0x181 0x1 0xd134 1
|
||||
|
||||
phy raw c45 0x189 0x1 0xffde 0
|
||||
phy raw c45 0x189 0x1 0xd130 0x41
|
||||
phy raw c45 0x189 0x1 0xd131 0xe
|
||||
phy raw c45 0x189 0x1 0xd134 1
|
||||
phy raw c45 0x189 0x1 0xffde 1
|
||||
phy raw c45 0x189 0x1 0xd130 0x41
|
||||
phy raw c45 0x189 0x1 0xd131 0xe
|
||||
phy raw c45 0x189 0x1 0xd134 1
|
||||
phy raw c45 0x189 0x1 0xffde 2
|
||||
phy raw c45 0x189 0x1 0xd130 0x41
|
||||
phy raw c45 0x189 0x1 0xd131 0xe
|
||||
phy raw c45 0x189 0x1 0xd134 1
|
||||
phy raw c45 0x189 0x1 0xffde 3
|
||||
phy raw c45 0x189 0x1 0xd130 0x41
|
||||
phy raw c45 0x189 0x1 0xd131 0xe
|
||||
phy raw c45 0x189 0x1 0xd134 1
|
||||
|
||||
@ -0,0 +1,3 @@
|
||||
{%- set default_topo = 't1' %}
|
||||
{%- include 'buffers_config.j2' %}
|
||||
|
||||
@ -0,0 +1,46 @@
|
||||
{%- set default_cable = '300m' %}
|
||||
|
||||
{%- macro generate_port_lists(PORT_ALL) %}
|
||||
{# Generate list of ports #}
|
||||
{% for port_idx in range(0,32) %}
|
||||
{% if PORT_ALL.append("Ethernet%d" % (port_idx * 4)) %}{% endif %}
|
||||
{% endfor %}
|
||||
{%- endmacro %}
|
||||
|
||||
{%- macro generate_buffer_pool_and_profiles() %}
|
||||
"BUFFER_POOL": {
|
||||
"ingress_lossless_pool": {
|
||||
"xoff": "4625920",
|
||||
"size": "12766208",
|
||||
"type": "ingress",
|
||||
"mode": "dynamic"
|
||||
},
|
||||
"egress_lossless_pool": {
|
||||
"size": "12766208",
|
||||
"type": "egress",
|
||||
"mode": "static"
|
||||
},
|
||||
"egress_lossy_pool": {
|
||||
"size": "7326924",
|
||||
"type": "egress",
|
||||
"mode": "dynamic"
|
||||
}
|
||||
},
|
||||
"BUFFER_PROFILE": {
|
||||
"ingress_lossy_profile": {
|
||||
"pool":"[BUFFER_POOL|ingress_lossless_pool]",
|
||||
"size":"0",
|
||||
"dynamic_th":"3"
|
||||
},
|
||||
"egress_lossless_profile": {
|
||||
"pool":"[BUFFER_POOL|egress_lossless_pool]",
|
||||
"size":"0",
|
||||
"static_th":"12766208"
|
||||
},
|
||||
"egress_lossy_profile": {
|
||||
"pool":"[BUFFER_POOL|egress_lossless_pool]",
|
||||
"size":"1518",
|
||||
"dynamic_th":"3"
|
||||
}
|
||||
},
|
||||
{%- endmacro %}
|
||||
@ -0,0 +1,45 @@
|
||||
{%- set default_cable = '300m' %}
|
||||
|
||||
{%- macro generate_port_lists(PORT_ALL) %}
|
||||
{# Generate list of ports #}
|
||||
{% for port_idx in range(0,32) %}
|
||||
{% if PORT_ALL.append("Ethernet%d" % (port_idx * 4)) %}{% endif %}
|
||||
{% endfor %}
|
||||
{%- endmacro %}
|
||||
|
||||
{%- macro generate_buffer_pool_and_profiles() %}
|
||||
"BUFFER_POOL": {
|
||||
"ingress_lossless_pool": {
|
||||
"size": "12766208",
|
||||
"type": "ingress",
|
||||
"mode": "dynamic"
|
||||
},
|
||||
"egress_lossless_pool": {
|
||||
"size": "12766208",
|
||||
"type": "egress",
|
||||
"mode": "static"
|
||||
},
|
||||
"egress_lossy_pool": {
|
||||
"size": "7326924",
|
||||
"type": "egress",
|
||||
"mode": "dynamic"
|
||||
}
|
||||
},
|
||||
"BUFFER_PROFILE": {
|
||||
"ingress_lossy_profile": {
|
||||
"pool":"[BUFFER_POOL|ingress_lossless_pool]",
|
||||
"size":"0",
|
||||
"dynamic_th":"3"
|
||||
},
|
||||
"egress_lossless_profile": {
|
||||
"pool":"[BUFFER_POOL|egress_lossless_pool]",
|
||||
"size":"0",
|
||||
"static_th":"12766208"
|
||||
},
|
||||
"egress_lossy_profile": {
|
||||
"pool":"[BUFFER_POOL|egress_lossless_pool]",
|
||||
"size":"1518",
|
||||
"dynamic_th":"3"
|
||||
}
|
||||
},
|
||||
{%- endmacro %}
|
||||
@ -0,0 +1,46 @@
|
||||
{%- set default_cable = '300m' %}
|
||||
|
||||
{%- macro generate_port_lists(PORT_ALL) %}
|
||||
{# Generate list of ports #}
|
||||
{% for port_idx in range(0,32) %}
|
||||
{% if PORT_ALL.append("Ethernet%d" % (port_idx * 4)) %}{% endif %}
|
||||
{% endfor %}
|
||||
{%- endmacro %}
|
||||
|
||||
{%- macro generate_buffer_pool_and_profiles() %}
|
||||
"BUFFER_POOL": {
|
||||
"ingress_lossless_pool": {
|
||||
"xoff": "196608",
|
||||
"size": "12766208",
|
||||
"type": "ingress",
|
||||
"mode": "dynamic"
|
||||
},
|
||||
"egress_lossless_pool": {
|
||||
"size": "33004032",
|
||||
"type": "egress",
|
||||
"mode": "static"
|
||||
},
|
||||
"egress_lossy_pool": {
|
||||
"size": "12766208",
|
||||
"type": "egress",
|
||||
"mode": "dynamic"
|
||||
}
|
||||
},
|
||||
"BUFFER_PROFILE": {
|
||||
"ingress_lossy_profile": {
|
||||
"pool":"[BUFFER_POOL|ingress_lossless_pool]",
|
||||
"size":"0",
|
||||
"dynamic_th":"3"
|
||||
},
|
||||
"egress_lossless_profile": {
|
||||
"pool":"[BUFFER_POOL|egress_lossless_pool]",
|
||||
"size":"0",
|
||||
"static_th":"33004032"
|
||||
},
|
||||
"egress_lossy_profile": {
|
||||
"pool":"[BUFFER_POOL|egress_lossless_pool]",
|
||||
"size":"1518",
|
||||
"dynamic_th":"3"
|
||||
}
|
||||
},
|
||||
{%- endmacro %}
|
||||
@ -0,0 +1,3 @@
|
||||
l2_mem_entries=294912
|
||||
l3_mem_entries=16384
|
||||
l3_alpm_enable=0
|
||||
@ -0,0 +1,5 @@
|
||||
l2_mem_entries=40960
|
||||
l3_mem_entries=40960
|
||||
l3_alpm_enable=2
|
||||
use_all_splithorizon_groups=1
|
||||
sai_tunnel_support=1
|
||||
@ -0,0 +1,17 @@
|
||||
# PG lossless profiles.
|
||||
# speed cable size xon xoff threshold xon_offset
|
||||
10000 5m 9427 0 50176 1 3584
|
||||
25000 5m 9427 0 50176 1 3584
|
||||
40000 5m 9427 0 50176 1 3584
|
||||
50000 5m 9427 0 50176 1 3584
|
||||
100000 5m 9427 0 50176 1 3584
|
||||
10000 40m 9427 0 50176 1 3584
|
||||
25000 40m 9427 0 50176 1 3584
|
||||
40000 40m 9427 0 50176 1 3584
|
||||
50000 40m 9427 0 50176 1 3584
|
||||
100000 40m 9427 0 50176 1 3584
|
||||
10000 300m 9427 0 50176 1 3584
|
||||
25000 300m 9427 0 50176 1 3584
|
||||
40000 300m 9427 0 50176 1 3584
|
||||
50000 300m 9427 0 50176 1 3584
|
||||
100000 300m 9427 0 50176 1 3584
|
||||
@ -0,0 +1,84 @@
|
||||
{
|
||||
"port-group": {
|
||||
"1": {
|
||||
"members": "Ethernet0-3",
|
||||
"valid_speeds": ["25000",["10000","1000"]]
|
||||
},
|
||||
"2": {
|
||||
"members": "Ethernet4-7",
|
||||
"valid_speeds": ["25000",["10000","1000"]]
|
||||
},
|
||||
"3": {
|
||||
"members": "Ethernet8-11",
|
||||
"valid_speeds": ["25000",["10000","1000"]]
|
||||
},
|
||||
"4": {
|
||||
"members": "Ethernet12-15",
|
||||
"valid_speeds": ["25000",["10000","1000"]]
|
||||
},
|
||||
"5": {
|
||||
"members": "Ethernet16-19",
|
||||
"valid_speeds": ["25000",["10000","1000"]]
|
||||
},
|
||||
"6": {
|
||||
"members": "Ethernet20-23",
|
||||
"valid_speeds": ["25000",["10000","1000"]]
|
||||
},
|
||||
"7": {
|
||||
"members": "Ethernet24-27",
|
||||
"valid_speeds": ["25000",["10000","1000"]]
|
||||
},
|
||||
"8": {
|
||||
"members": "Ethernet28-31",
|
||||
"valid_speeds": ["25000",["10000","1000"]]
|
||||
},
|
||||
"9": {
|
||||
"members": "Ethernet32-35",
|
||||
"valid_speeds": ["25000",["10000","1000"]]
|
||||
},
|
||||
"10": {
|
||||
"members": "Ethernet36-39",
|
||||
"valid_speeds": ["25000",["10000","1000"]]
|
||||
},
|
||||
"11": {
|
||||
"members": "Ethernet40-43",
|
||||
"valid_speeds": ["25000",["10000","1000"]]
|
||||
},
|
||||
"12": {
|
||||
"members": "Ethernet44-47",
|
||||
"valid_speeds": ["25000",["10000","1000"]]
|
||||
}
|
||||
},
|
||||
"fec-mode": {
|
||||
"Ethernet0-47": {
|
||||
"1": {
|
||||
"1000": [ "none" ],
|
||||
"10000": [ "none", "fc" ],
|
||||
"25000": [ "none", "rs" ]
|
||||
}
|
||||
},
|
||||
"Ethernet48-79": {
|
||||
"1": {
|
||||
"10000": [ "none", "fc" ],
|
||||
"25000": [ "none", "rs" ]
|
||||
},
|
||||
"2": {
|
||||
"20000": [ "none", "fc" ],
|
||||
"50000": [ "none", "rs" ]
|
||||
},
|
||||
"4": {
|
||||
"40000": [ "none", "fc" ],
|
||||
"100000": [ "none", "rs" ]
|
||||
}
|
||||
}
|
||||
},
|
||||
"native-port-supported-speeds": {
|
||||
"Ethernet0-47": {
|
||||
"1": ["25000","10000","1000"]
|
||||
},
|
||||
"Ethernet48-79": {
|
||||
"4": ["100000","40000"]
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
@ -0,0 +1 @@
|
||||
{%- include 'qos_config_t1.j2' %}
|
||||
@ -0,0 +1,175 @@
|
||||
{%- set PORT_ALL = [] %}
|
||||
{%- for port in PORT %}
|
||||
{%- if PORT_ALL.append(port) %}{% endif %}
|
||||
{%- endfor %}
|
||||
{%- if PORT_ALL | sort_by_port_index %}{% endif %}
|
||||
|
||||
{%- set port_names_list_all = [] %}
|
||||
{%- for port in PORT_ALL %}
|
||||
{%- if port_names_list_all.append(port) %}{% endif %}
|
||||
{%- endfor %}
|
||||
{%- set port_names_all = port_names_list_all | join(',') -%}
|
||||
|
||||
|
||||
{%- set PORT_ACTIVE = [] %}
|
||||
{%- if DEVICE_NEIGHBOR is not defined %}
|
||||
{%- set PORT_ACTIVE = PORT_ALL %}
|
||||
{%- else %}
|
||||
{%- for port in DEVICE_NEIGHBOR.keys() %}
|
||||
{%- if PORT_ACTIVE.append(port) %}{%- endif %}
|
||||
{%- endfor %}
|
||||
{%- endif %}
|
||||
{%- if PORT_ACTIVE | sort_by_port_index %}{% endif %}
|
||||
|
||||
{%- set port_names_list_active = [] %}
|
||||
{%- for port in PORT_ACTIVE %}
|
||||
{%- if port_names_list_active.append(port) %}{%- endif %}
|
||||
{%- endfor %}
|
||||
{%- set port_names_active = port_names_list_active | join(',') -%}
|
||||
|
||||
|
||||
{%- set pfc_to_pg_map_supported_asics = ['mellanox', 'barefoot', 'marvell'] -%}
|
||||
|
||||
|
||||
{
|
||||
{% if generate_tc_to_pg_map is defined %}
|
||||
{{- generate_tc_to_pg_map() }}
|
||||
{% else %}
|
||||
"TC_TO_PRIORITY_GROUP_MAP": {
|
||||
"AZURE": {
|
||||
"0": "0",
|
||||
"1": "0",
|
||||
"2": "0",
|
||||
"3": "3",
|
||||
"4": "4",
|
||||
"5": "0",
|
||||
"6": "0",
|
||||
"7": "7"
|
||||
}
|
||||
},
|
||||
{% endif %}
|
||||
"MAP_PFC_PRIORITY_TO_QUEUE": {
|
||||
"AZURE": {
|
||||
"0": "0",
|
||||
"1": "1",
|
||||
"2": "2",
|
||||
"3": "3",
|
||||
"4": "4",
|
||||
"5": "5",
|
||||
"6": "6",
|
||||
"7": "7"
|
||||
}
|
||||
},
|
||||
"TC_TO_QUEUE_MAP": {
|
||||
"AZURE": {
|
||||
"0": "0",
|
||||
"1": "1",
|
||||
"2": "2",
|
||||
"3": "3",
|
||||
"4": "4",
|
||||
"5": "5",
|
||||
"6": "6",
|
||||
"7": "7"
|
||||
}
|
||||
},
|
||||
"DSCP_TO_TC_MAP": {
|
||||
"AZURE": {
|
||||
"0" : "1",
|
||||
"1" : "1",
|
||||
"2" : "1",
|
||||
"3" : "3",
|
||||
"4" : "4",
|
||||
"5" : "2",
|
||||
"6" : "1",
|
||||
"7" : "1",
|
||||
"8" : "0",
|
||||
"9" : "1",
|
||||
"10": "1",
|
||||
"11": "1",
|
||||
"12": "1",
|
||||
"13": "1",
|
||||
"14": "1",
|
||||
"15": "1",
|
||||
"16": "1",
|
||||
"17": "1",
|
||||
"18": "1",
|
||||
"19": "1",
|
||||
"20": "1",
|
||||
"21": "1",
|
||||
"22": "1",
|
||||
"23": "1",
|
||||
"24": "1",
|
||||
"25": "1",
|
||||
"26": "1",
|
||||
"27": "1",
|
||||
"28": "1",
|
||||
"29": "1",
|
||||
"30": "1",
|
||||
"31": "1",
|
||||
"32": "1",
|
||||
"33": "1",
|
||||
"34": "1",
|
||||
"35": "1",
|
||||
"36": "1",
|
||||
"37": "1",
|
||||
"38": "1",
|
||||
"39": "1",
|
||||
"40": "1",
|
||||
"41": "1",
|
||||
"42": "1",
|
||||
"43": "1",
|
||||
"44": "1",
|
||||
"45": "1",
|
||||
"46": "5",
|
||||
"47": "1",
|
||||
"48": "6",
|
||||
"49": "1",
|
||||
"50": "1",
|
||||
"51": "1",
|
||||
"52": "1",
|
||||
"53": "1",
|
||||
"54": "1",
|
||||
"55": "1",
|
||||
"56": "1",
|
||||
"57": "1",
|
||||
"58": "1",
|
||||
"59": "1",
|
||||
"60": "1",
|
||||
"61": "1",
|
||||
"62": "1",
|
||||
"63": "1"
|
||||
}
|
||||
},
|
||||
"SCHEDULER": {
|
||||
"scheduler.0": {
|
||||
"type" : "DWRR",
|
||||
"weight": "14"
|
||||
},
|
||||
"scheduler.1": {
|
||||
"type" : "DWRR",
|
||||
"weight": "15"
|
||||
}
|
||||
},
|
||||
{% if asic_type in pfc_to_pg_map_supported_asics %}
|
||||
"PFC_PRIORITY_TO_PRIORITY_GROUP_MAP": {
|
||||
"AZURE": {
|
||||
"3": "3",
|
||||
"4": "4"
|
||||
}
|
||||
},
|
||||
{% endif %}
|
||||
"PORT_QOS_MAP": {
|
||||
{% for port in PORT_ACTIVE %}
|
||||
"{{ port }}": {
|
||||
"dscp_to_tc_map" : "[DSCP_TO_TC_MAP|AZURE]",
|
||||
"tc_to_queue_map" : "[TC_TO_QUEUE_MAP|AZURE]",
|
||||
"tc_to_pg_map" : "[TC_TO_PRIORITY_GROUP_MAP|AZURE]",
|
||||
"pfc_to_queue_map": "[MAP_PFC_PRIORITY_TO_QUEUE|AZURE]",
|
||||
{% if asic_type in pfc_to_pg_map_supported_asics %}
|
||||
"pfc_to_pg_map" : "[PFC_PRIORITY_TO_PRIORITY_GROUP_MAP|AZURE]",
|
||||
{% endif %}
|
||||
"pfc_enable" : "3,4"
|
||||
}{% if not loop.last %},{% endif %}
|
||||
{% endfor %}
|
||||
}
|
||||
}
|
||||
@ -1,15 +1,22 @@
|
||||
sai_load_hw_config=/etc/bcm/flex/bcm56870_a0_issu/b870.6.4.1/
|
||||
bcm_tunnel_term_compatible_mode=1
|
||||
core_clock_frequency=1525
|
||||
dpp_clock_ratio=2:3
|
||||
parity_enable=0
|
||||
mem_cache_enable=0
|
||||
l2_mem_entries=40960
|
||||
l3_mem_entries=40960
|
||||
fpem_mem_entries=16384
|
||||
fpem_mem_entries=0
|
||||
l2xmsg_mode=1
|
||||
l3_alpm_ipv6_128b_bkt_rsvd=1
|
||||
|
||||
#RIOT Enable
|
||||
riot_enable=1
|
||||
riot_overlay_l3_intf_mem_size=4096
|
||||
riot_overlay_l3_egress_mem_size=32768
|
||||
l3_ecmp_levels=2
|
||||
riot_overlay_ecmp_resilient_hash_size=16384
|
||||
|
||||
bcm_num_cos=10
|
||||
default_cpu_tx_queue=9
|
||||
bcm_stat_interval=2000000
|
||||
cdma_timeout_usec=3000000
|
||||
|
||||
@ -29,7 +36,8 @@ tdma_timeout_usec=3000000
|
||||
|
||||
# portmap settings
|
||||
oversubscribe_mode=1
|
||||
pbmp_xport_xe=0x48808080f8780808dfe1e1e1fe1e1e1fe
|
||||
#pbmp_xport_xe=0x48808080f8780808dfe1e1e1fe1e1e1fe
|
||||
pbmp_xport_xe=0x7F878787F878787FDFE1E1E1FE1E1E1FE
|
||||
|
||||
port_flex_enable=1
|
||||
|
||||
@ -73,9 +81,6 @@ portmap_61=61:25
|
||||
portmap_62=62:25
|
||||
portmap_63=63:25
|
||||
portmap_64=64:25
|
||||
portmap_67=65:100
|
||||
portmap_71=69:100
|
||||
portmap_79=77:100
|
||||
portmap_87=85:25
|
||||
portmap_88=86:25
|
||||
portmap_89=87:25
|
||||
@ -84,6 +89,10 @@ portmap_95=93:25
|
||||
portmap_96=94:25
|
||||
portmap_97=95:25
|
||||
portmap_98=96:25
|
||||
|
||||
portmap_67=65:100
|
||||
portmap_71=69:100
|
||||
portmap_79=77:100
|
||||
portmap_99=97:100
|
||||
portmap_107=105:100
|
||||
portmap_115=113:100
|
||||
@ -91,8 +100,10 @@ portmap_123=121:100
|
||||
portmap_127=125:100
|
||||
|
||||
# datapath port -- MerlinCore
|
||||
portmap_66=129:10:m
|
||||
portmap_130=128:10:m
|
||||
#Hide these to prevent SAI from initializing them...they are physically not on system
|
||||
#front panel
|
||||
#portmap_66=129:10:m
|
||||
#portmap_130=128:10:m
|
||||
|
||||
# loopback port
|
||||
portmap_65=130:10
|
||||
@ -166,9 +177,6 @@ serdes_if_type_61=13
|
||||
serdes_if_type_62=13
|
||||
serdes_if_type_63=13
|
||||
serdes_if_type_64=13
|
||||
serdes_if_type_67=14
|
||||
serdes_if_type_71=14
|
||||
serdes_if_type_79=14
|
||||
serdes_if_type_87=13
|
||||
serdes_if_type_88=13
|
||||
serdes_if_type_89=13
|
||||
@ -177,11 +185,16 @@ serdes_if_type_95=13
|
||||
serdes_if_type_96=13
|
||||
serdes_if_type_97=13
|
||||
serdes_if_type_98=13
|
||||
|
||||
serdes_if_type_67=14
|
||||
serdes_if_type_71=14
|
||||
serdes_if_type_79=14
|
||||
serdes_if_type_99=14
|
||||
serdes_if_type_107=14
|
||||
serdes_if_type_115=14
|
||||
serdes_if_type_123=14
|
||||
serdes_if_type_127=14
|
||||
|
||||
serdes_if_type_66=11
|
||||
serdes_if_type_130=11
|
||||
|
||||
@ -234,17 +247,48 @@ dport_map_port_96=45
|
||||
dport_map_port_95=46
|
||||
dport_map_port_98=47
|
||||
dport_map_port_97=48
|
||||
dport_map_port_99=49
|
||||
dport_map_port_107=50
|
||||
dport_map_port_115=51
|
||||
dport_map_port_123=52
|
||||
dport_map_port_79=53
|
||||
dport_map_port_67=54
|
||||
dport_map_port_71=55
|
||||
dport_map_port_127=56
|
||||
|
||||
dport_map_port_66=57
|
||||
dport_map_port_130=58
|
||||
dport_map_port_67=49
|
||||
dport_map_port_68=50
|
||||
dport_map_port_69=51
|
||||
dport_map_port_70=52
|
||||
|
||||
dport_map_port_71=53
|
||||
dport_map_port_72=54
|
||||
dport_map_port_73=55
|
||||
dport_map_port_74=56
|
||||
|
||||
dport_map_port_79=57
|
||||
dport_map_port_80=58
|
||||
dport_map_port_81=59
|
||||
dport_map_port_82=60
|
||||
|
||||
dport_map_port_99=61
|
||||
dport_map_port_100=62
|
||||
dport_map_port_101=63
|
||||
dport_map_port_102=64
|
||||
|
||||
dport_map_port_107=65
|
||||
dport_map_port_108=66
|
||||
dport_map_port_109=67
|
||||
dport_map_port_110=68
|
||||
|
||||
dport_map_port_115=69
|
||||
dport_map_port_116=70
|
||||
dport_map_port_117=71
|
||||
dport_map_port_118=72
|
||||
|
||||
dport_map_port_123=73
|
||||
dport_map_port_124=74
|
||||
dport_map_port_125=75
|
||||
dport_map_port_126=76
|
||||
|
||||
# Not able to breakout, Since overlap with mgmt port
|
||||
dport_map_port_127=77
|
||||
|
||||
# mgmt ports
|
||||
dport_map_port_66=81
|
||||
dport_map_port_130=82
|
||||
|
||||
|
||||
phy_chain_tx_lane_map_physical{1.0}=0x3210
|
||||
@ -479,3 +523,8 @@ phy_chain_rx_polarity_flip_physical{130.0}=0x0
|
||||
phy_chain_rx_polarity_flip_physical{131.0}=0x0
|
||||
phy_chain_rx_polarity_flip_physical{132.0}=0x0
|
||||
|
||||
l2_mem_entries=40960
|
||||
l3_mem_entries=40960
|
||||
l3_alpm_enable=2
|
||||
use_all_splithorizon_groups=1
|
||||
|
||||
|
||||
BIN
device/quanta/x86_64-quanta_ix8_rglbmc-r0/custom_led.bin
Normal file
BIN
device/quanta/x86_64-quanta_ix8_rglbmc-r0/custom_led.bin
Normal file
Binary file not shown.
@ -1,3 +1,4 @@
|
||||
CONSOLE_PORT=0x2f8
|
||||
CONSOLE_DEV=1
|
||||
CONSOLE_SPEED=115200
|
||||
ONIE_PLATFORM_EXTRA_CMDLINE_LINUX="modprobe.blacklist=i2c-ismt,i2c_ismt,ixgbe"
|
||||
|
||||
8
device/quanta/x86_64-quanta_ix8_rglbmc-r0/led_proc_init.soc
Executable file → Normal file
8
device/quanta/x86_64-quanta_ix8_rglbmc-r0/led_proc_init.soc
Executable file → Normal file
@ -1,6 +1,4 @@
|
||||
sleep 10
|
||||
led stop
|
||||
sleep 3
|
||||
m0 load 0 0x3800 /usr/share/sonic/platform/custom_led.bin
|
||||
led start
|
||||
sleep 3
|
||||
led auto on
|
||||
rcload /usr/share/sonic/platform/preemphasis-48x25_8x100.soc
|
||||
|
||||
|
||||
@ -16,5 +16,5 @@ class board(eeprom_tlvinfo.TlvInfoDecoder):
|
||||
_TLV_INFO_MAX_LEN = 256
|
||||
|
||||
def __init__(self, name, path, cpld_root, ro):
|
||||
self.eeprom_path = "/sys/bus/i2c/devices/18-0054/eeprom"
|
||||
self.eeprom_path = "/sys/bus/i2c/devices/3-0054/eeprom"
|
||||
super(board, self).__init__(self.eeprom_path, 0, '', True)
|
||||
|
||||
110
device/quanta/x86_64-quanta_ix8_rglbmc-r0/plugins/fanutil.py
Normal file
110
device/quanta/x86_64-quanta_ix8_rglbmc-r0/plugins/fanutil.py
Normal file
@ -0,0 +1,110 @@
|
||||
#
|
||||
# fanutil.py
|
||||
# Platform-specific Fan status interface for SONiC
|
||||
#
|
||||
|
||||
import logging
|
||||
import os.path
|
||||
|
||||
try:
|
||||
from sonic_fan.fan_base import FanBase
|
||||
except ImportError as e:
|
||||
raise ImportError (str(e) + "- required module not found")
|
||||
|
||||
class FanUtil(FanBase):
|
||||
"""Platform-specific FANutil class"""
|
||||
|
||||
SYS_FAN_NUM = 6
|
||||
NUM_FANS_PERTRAY = 2
|
||||
HWMON_PATH = '/sys/class/hwmon/hwmon1/'
|
||||
FAN_INDEX_START = 21
|
||||
|
||||
logger = logging.getLogger(__name__)
|
||||
|
||||
def __init__(self, log_level=logging.DEBUG):
|
||||
FanBase.__init__(self)
|
||||
self.num_fans = (self.SYS_FAN_NUM * self.NUM_FANS_PERTRAY)
|
||||
|
||||
# Get sysfs attribute
|
||||
def get_attr_value(self, attr_path):
|
||||
|
||||
retval = 'ERR'
|
||||
if (not os.path.isfile(attr_path)):
|
||||
return retval
|
||||
|
||||
try:
|
||||
with open(attr_path, 'r') as fd:
|
||||
retval = fd.read()
|
||||
except Exception:
|
||||
logging.error("Unable to open ", attr_path, " file !")
|
||||
|
||||
retval = retval.rstrip('\r\n')
|
||||
return retval
|
||||
|
||||
def check_fan_index(self, index):
|
||||
if index is None:
|
||||
return False
|
||||
|
||||
if index < 1 or index > self.num_fans:
|
||||
logging.error("Invalid Fan index:", index)
|
||||
return False
|
||||
|
||||
return True
|
||||
|
||||
def get_num_fans(self):
|
||||
return self.num_fans
|
||||
|
||||
def get_status(self, index):
|
||||
if self.check_fan_index(index) == False:
|
||||
return False
|
||||
|
||||
fantray_speed_file = 'fan' + str(self.FAN_INDEX_START+(index-1)) + '_input'
|
||||
fantray_speed = self.get_attr_value(self.HWMON_PATH + fantray_speed_file)
|
||||
|
||||
if fantray_speed == '0.0' :
|
||||
return False
|
||||
|
||||
return True
|
||||
|
||||
def get_presence(self, index):
|
||||
if self.check_fan_index(index) == False:
|
||||
return False
|
||||
|
||||
fantray_present_file = 'fan' + str(self.FAN_INDEX_START+(index-1)) + '_present'
|
||||
fantray_present = self.get_attr_value(self.HWMON_PATH + fantray_present_file)
|
||||
|
||||
if fantray_present == '1' :
|
||||
return True
|
||||
|
||||
return False
|
||||
|
||||
def get_direction(self, index):
|
||||
if self.check_fan_index(index) == False:
|
||||
return None
|
||||
|
||||
fantray_direction_file = 'fan' + str(self.FAN_INDEX_START+(index-1)) + '_direction'
|
||||
fantray_direction = self.get_attr_value(self.HWMON_PATH + fantray_direction_file)
|
||||
|
||||
"""
|
||||
1: FB 2: BF
|
||||
Since the fan is at rear of the switch, FB means Exhaust; BF means Intake
|
||||
"""
|
||||
if fantray_direction == '2':
|
||||
return "INTAKE"
|
||||
else:
|
||||
return "EXHAUST"
|
||||
|
||||
def get_speed(self, index):
|
||||
if self.check_fan_index(index) == False:
|
||||
return 0
|
||||
|
||||
fantray_speed_file = 'fan' + str(self.FAN_INDEX_START+(index-1)) + '_input'
|
||||
fantray_speed = self.get_attr_value(self.HWMON_PATH + fantray_speed_file)
|
||||
|
||||
return int(float(fantray_speed))
|
||||
|
||||
|
||||
def set_speed(self, val):
|
||||
logging.error("Not allowed to set fan speed!")
|
||||
|
||||
return False
|
||||
@ -3,6 +3,7 @@
|
||||
# Platform-specific PSU status interface for SONiC
|
||||
#
|
||||
|
||||
import logging
|
||||
import os.path
|
||||
|
||||
try:
|
||||
@ -14,17 +15,47 @@ except ImportError as e:
|
||||
class PsuUtil(PsuBase):
|
||||
"""Platform-specific PSUutil class"""
|
||||
|
||||
HWMON_PATH = '/sys/class/hwmon/hwmon1/'
|
||||
PSU1_PREFIX = 'power43_'
|
||||
PSU2_PREFIX = 'power54_'
|
||||
MAX_PSUS = 2
|
||||
def __init__(self):
|
||||
PsuBase.__init__(self)
|
||||
|
||||
# Get sysfs attribute
|
||||
def get_attr_value(self, attr_path):
|
||||
|
||||
retval = 'ERR'
|
||||
if (not os.path.isfile(attr_path)):
|
||||
return retval
|
||||
|
||||
try:
|
||||
with open(attr_path, 'r') as fd:
|
||||
retval = fd.read()
|
||||
except Exception:
|
||||
logging.error("Unable to open ", attr_path, " file !")
|
||||
|
||||
retval = retval.rstrip('\r\n')
|
||||
return retval
|
||||
|
||||
def get_attr_filename(self, index, attr):
|
||||
if (index == 1):
|
||||
attr_file = self.PSU1_PREFIX + attr
|
||||
elif (index == 2):
|
||||
attr_file = self.PSU2_PREFIX + attr
|
||||
else:
|
||||
logging.error("Invalid PSU number:", index)
|
||||
return ''
|
||||
|
||||
return attr_file
|
||||
|
||||
def get_num_psus(self):
|
||||
"""
|
||||
Retrieves the number of PSUs available on the device
|
||||
:return: An integer, the number of PSUs available on the device
|
||||
"""
|
||||
MAX_PSUS = 2
|
||||
|
||||
return MAX_PSUS
|
||||
return self.MAX_PSUS
|
||||
|
||||
def get_psu_status(self, index):
|
||||
"""
|
||||
@ -34,7 +65,21 @@ class PsuUtil(PsuBase):
|
||||
:return: Boolean, True if PSU is operating properly, False if PSU is\
|
||||
faulty
|
||||
"""
|
||||
status = 1
|
||||
status = False
|
||||
|
||||
attr_filename = self.get_attr_filename(index, 'input')
|
||||
if attr_filename == '':
|
||||
return status
|
||||
|
||||
attr_path = self.HWMON_PATH + attr_filename
|
||||
attr_value = self.get_attr_value(attr_path)
|
||||
|
||||
if (attr_value != 'ERR'):
|
||||
attr_value = float(attr_value)
|
||||
|
||||
# Check PSU status
|
||||
if (attr_value != 0.0):
|
||||
status = True
|
||||
|
||||
return status
|
||||
|
||||
@ -45,6 +90,162 @@ class PsuUtil(PsuBase):
|
||||
:param index: An integer, index of the PSU of which to query status
|
||||
:return: Boolean, True if PSU is plugged, False if not
|
||||
"""
|
||||
status = 1
|
||||
status = False
|
||||
|
||||
attr_filename = self.get_attr_filename(index, 'present')
|
||||
if attr_filename == '':
|
||||
return status
|
||||
|
||||
attr_path = self.HWMON_PATH + attr_filename
|
||||
attr_value = self.get_attr_value(attr_path)
|
||||
|
||||
if (attr_value != 'ERR'):
|
||||
attr_value = int(attr_value, 16)
|
||||
# Check PSU status
|
||||
if (attr_value == 1):
|
||||
status = True
|
||||
return status
|
||||
|
||||
def get_powergood_status(self, index):
|
||||
status = False
|
||||
|
||||
attr_filename = self.get_attr_filename(index, 'input')
|
||||
if attr_filename == '':
|
||||
return status
|
||||
|
||||
attr_path = self.HWMON_PATH + attr_filename
|
||||
attr_value = self.get_attr_value(attr_path)
|
||||
|
||||
if (attr_value != 'ERR'):
|
||||
attr_value = float(attr_value)
|
||||
|
||||
# Check PSU status
|
||||
if (attr_value != 0.0):
|
||||
status = True
|
||||
|
||||
return status
|
||||
|
||||
def get_model(self, index):
|
||||
attr_filename = self.get_attr_filename(index, 'model')
|
||||
if attr_filename == '':
|
||||
return None
|
||||
|
||||
attr_path = self.HWMON_PATH + attr_filename
|
||||
attr_value = self.get_attr_value(attr_path)
|
||||
|
||||
if (attr_value != 'ERR'):
|
||||
return attr_value.rstrip()
|
||||
|
||||
def get_mfr_id(self, index):
|
||||
attr_filename = self.get_attr_filename(index, 'mfrid')
|
||||
if attr_filename == '':
|
||||
return None
|
||||
|
||||
attr_path = self.HWMON_PATH + attr_filename
|
||||
attr_value = self.get_attr_value(attr_path)
|
||||
|
||||
if (attr_value != 'ERR'):
|
||||
return attr_value.rstrip()
|
||||
|
||||
def get_serial(self, index):
|
||||
attr_filename = self.get_attr_filename(index, 'sn')
|
||||
if attr_filename == '':
|
||||
return None
|
||||
|
||||
attr_path = self.HWMON_PATH + attr_filename
|
||||
attr_value = self.get_attr_value(attr_path)
|
||||
|
||||
if (attr_value != 'ERR'):
|
||||
return attr_value.rstrip()
|
||||
|
||||
def get_direction(self, index):
|
||||
if (index == 1):
|
||||
direction_file = 'fan41_direction'
|
||||
elif (index == 2):
|
||||
direction_file = 'fan52_direction'
|
||||
else:
|
||||
logging.error("Invalid PSU number:", index)
|
||||
return None
|
||||
|
||||
direction = self.get_attr_value(self.HWMON_PATH + direction_file)
|
||||
direction = direction.rstrip()
|
||||
|
||||
"""
|
||||
1: FB 2: BF
|
||||
Since the fan is at rear of the switch, FB means Exhaust; BF means Intake
|
||||
"""
|
||||
if direction == '2':
|
||||
return "INTAKE"
|
||||
else:
|
||||
return "EXHAUST"
|
||||
|
||||
def get_output_voltage(self, index):
|
||||
if (index == 1):
|
||||
attr_file = 'in48_input'
|
||||
elif (index == 2):
|
||||
attr_file = 'in59_input'
|
||||
else:
|
||||
logging.error("Invalid PSU number:", index)
|
||||
return 0.0
|
||||
|
||||
voltage = self.get_attr_value(self.HWMON_PATH + attr_file)
|
||||
voltage = voltage.rstrip()
|
||||
|
||||
if (voltage != 'ERR'):
|
||||
voltage, dummy = voltage.split('.', 1)
|
||||
else:
|
||||
return 0.0
|
||||
|
||||
return float(voltage)/1000
|
||||
|
||||
def get_output_current(self, index):
|
||||
if (index == 1):
|
||||
attr_file = 'curr40_input'
|
||||
elif (index == 2):
|
||||
attr_file = 'curr51_input'
|
||||
else:
|
||||
logging.error("Invalid PSU number:", index)
|
||||
return 0.0
|
||||
|
||||
current = self.get_attr_value(self.HWMON_PATH + attr_file)
|
||||
current = current.rstrip()
|
||||
|
||||
if (current != 'ERR'):
|
||||
current, dummy = current.split('.',1)
|
||||
else:
|
||||
return 0.0
|
||||
|
||||
return float(current)/1000
|
||||
|
||||
def get_output_power(self, index):
|
||||
attr_filename = self.get_attr_filename(index, 'input')
|
||||
if attr_filename == '':
|
||||
return 0.0
|
||||
|
||||
attr_path = self.HWMON_PATH + attr_filename
|
||||
attr_value = self.get_attr_value(attr_path)
|
||||
|
||||
if (attr_value != 'ERR'):
|
||||
attr_value = float(attr_value)
|
||||
else:
|
||||
return 0.0
|
||||
|
||||
return float(attr_value/1000)
|
||||
|
||||
def get_fan_rpm(self, index, fan_idx):
|
||||
if (index == 1):
|
||||
rpm_file = 'fan41_input'
|
||||
elif (index == 2):
|
||||
rpm_file = 'fan52_input'
|
||||
else:
|
||||
logging.error("Invalid PSU number:", index)
|
||||
return 0
|
||||
|
||||
rpm = self.get_attr_value(self.HWMON_PATH + rpm_file)
|
||||
rpm = rpm.rstrip()
|
||||
if (rpm != 'ERR'):
|
||||
rpm = float(rpm)
|
||||
else:
|
||||
return 0
|
||||
|
||||
return int(rpm)
|
||||
|
||||
@ -23,62 +23,62 @@ class SfpUtil(SfpUtilBase):
|
||||
|
||||
_port_to_eeprom_mapping = {}
|
||||
_port_to_i2c_mapping = {
|
||||
1: 32,
|
||||
2: 33,
|
||||
3: 34,
|
||||
4: 35,
|
||||
5: 36,
|
||||
6: 37,
|
||||
7: 38,
|
||||
8: 39,
|
||||
9: 40,
|
||||
10: 41,
|
||||
11: 42,
|
||||
12: 43,
|
||||
13: 44,
|
||||
14: 45,
|
||||
15: 46,
|
||||
16: 47,
|
||||
17: 48,
|
||||
18: 49,
|
||||
19: 50,
|
||||
20: 51,
|
||||
21: 52,
|
||||
22: 53,
|
||||
23: 54,
|
||||
24: 55,
|
||||
25: 56,
|
||||
26: 57,
|
||||
27: 58,
|
||||
28: 59,
|
||||
29: 60,
|
||||
30: 61,
|
||||
31: 62,
|
||||
32: 63,
|
||||
33: 64,
|
||||
34: 65,
|
||||
35: 66,
|
||||
36: 67,
|
||||
37: 68,
|
||||
38: 69,
|
||||
39: 70,
|
||||
40: 71,
|
||||
41: 72,
|
||||
42: 73,
|
||||
43: 74,
|
||||
44: 75,
|
||||
45: 76,
|
||||
46: 77,
|
||||
47: 78,
|
||||
48: 79,
|
||||
49: 80, # QSFP49
|
||||
50: 81, # QSFP50
|
||||
51: 82, # QSFP51
|
||||
52: 83, # QSFP52
|
||||
53: 84, # QSFP53
|
||||
54: 85, # QSFP54
|
||||
55: 86, # QSFP55
|
||||
56: 87, # QSFP56
|
||||
1 : 17,
|
||||
2 : 18,
|
||||
3 : 19,
|
||||
4 : 20,
|
||||
5 : 21,
|
||||
6 : 22,
|
||||
7 : 23,
|
||||
8 : 24,
|
||||
9 : 25,
|
||||
10 : 26,
|
||||
11 : 27,
|
||||
12 : 28,
|
||||
13 : 29,
|
||||
14 : 30,
|
||||
15 : 31,
|
||||
16 : 32,
|
||||
17 : 33,
|
||||
18 : 34,
|
||||
19 : 35,
|
||||
20 : 36,
|
||||
21 : 37,
|
||||
22 : 38,
|
||||
23 : 39,
|
||||
24 : 40,
|
||||
25 : 41,
|
||||
26 : 42,
|
||||
27 : 43,
|
||||
28 : 44,
|
||||
29 : 45,
|
||||
30 : 46,
|
||||
31 : 47,
|
||||
32 : 48,
|
||||
33 : 49,
|
||||
34 : 50,
|
||||
35 : 51,
|
||||
36 : 52,
|
||||
37 : 53,
|
||||
38 : 54,
|
||||
39 : 55,
|
||||
40 : 56,
|
||||
41 : 57,
|
||||
42 : 58,
|
||||
43 : 59,
|
||||
44 : 60,
|
||||
45 : 61,
|
||||
46 : 62,
|
||||
47 : 63,
|
||||
48 : 64,
|
||||
49 : 65,#QSFP49
|
||||
50 : 66,#QSFP50
|
||||
51 : 67,#QSFP51
|
||||
52 : 68,#QSFP52
|
||||
53 : 69,#QSFP53
|
||||
54 : 70,#QSFP54
|
||||
55 : 71,#QSFP55
|
||||
56 : 72,#QSFP56
|
||||
}
|
||||
|
||||
@property
|
||||
|
||||
@ -0,0 +1,3 @@
|
||||
{
|
||||
"skip_ledd": true
|
||||
}
|
||||
@ -0,0 +1,325 @@
|
||||
# 48x25G 8x100G pre-emphasis setting for Quanta IX8
|
||||
echo "Set tx pre-emphasis and idriver values"
|
||||
linkscan off
|
||||
|
||||
# Start of 48x25G
|
||||
|
||||
phy raw c45 0xd1 0x1 0xffde 0
|
||||
phy raw c45 0xd1 0x1 0xd130 0x55
|
||||
phy raw c45 0xd1 0x1 0xd131 0x303
|
||||
phy raw c45 0xd1 0x1 0xd134 0x1
|
||||
phy raw c45 0xd1 0x1 0xffde 1
|
||||
phy raw c45 0xd1 0x1 0xd130 0x55
|
||||
phy raw c45 0xd1 0x1 0xd131 0x303
|
||||
phy raw c45 0xd1 0x1 0xd134 0x1
|
||||
phy raw c45 0xd1 0x1 0xffde 2
|
||||
phy raw c45 0xd1 0x1 0xd130 0x55
|
||||
phy raw c45 0xd1 0x1 0xd131 0x303
|
||||
phy raw c45 0xd1 0x1 0xd134 0x1
|
||||
phy raw c45 0xd1 0x1 0xffde 3
|
||||
phy raw c45 0xd1 0x1 0xd130 0x55
|
||||
phy raw c45 0xd1 0x1 0xd131 0x303
|
||||
phy raw c45 0xd1 0x1 0xd134 0x1
|
||||
|
||||
phy raw c45 0xd5 0x1 0xffde 0
|
||||
phy raw c45 0xd5 0x1 0xd130 0x55
|
||||
phy raw c45 0xd5 0x1 0xd131 0x303
|
||||
phy raw c45 0xd5 0x1 0xd134 0x1
|
||||
phy raw c45 0xd5 0x1 0xffde 1
|
||||
phy raw c45 0xd5 0x1 0xd130 0x55
|
||||
phy raw c45 0xd5 0x1 0xd131 0x303
|
||||
phy raw c45 0xd5 0x1 0xd134 0x1
|
||||
phy raw c45 0xd5 0x1 0xffde 2
|
||||
phy raw c45 0xd5 0x1 0xd130 0x55
|
||||
phy raw c45 0xd5 0x1 0xd131 0x303
|
||||
phy raw c45 0xd5 0x1 0xd134 0x1
|
||||
phy raw c45 0xd5 0x1 0xffde 3
|
||||
phy raw c45 0xd5 0x1 0xd130 0x55
|
||||
phy raw c45 0xd5 0x1 0xd131 0x303
|
||||
phy raw c45 0xd5 0x1 0xd134 0x1
|
||||
|
||||
phy raw c45 0xc9 0x1 0xffde 0
|
||||
phy raw c45 0xc9 0x1 0xd130 0x55
|
||||
phy raw c45 0xc9 0x1 0xd131 0x303
|
||||
phy raw c45 0xc9 0x1 0xd134 0x1
|
||||
phy raw c45 0xc9 0x1 0xffde 1
|
||||
phy raw c45 0xc9 0x1 0xd130 0x55
|
||||
phy raw c45 0xc9 0x1 0xd131 0x303
|
||||
phy raw c45 0xc9 0x1 0xd134 0x1
|
||||
phy raw c45 0xc9 0x1 0xffde 2
|
||||
phy raw c45 0xc9 0x1 0xd130 0x55
|
||||
phy raw c45 0xc9 0x1 0xd131 0x303
|
||||
phy raw c45 0xc9 0x1 0xd134 0x1
|
||||
phy raw c45 0xc9 0x1 0xffde 3
|
||||
phy raw c45 0xc9 0x1 0xd130 0x55
|
||||
phy raw c45 0xc9 0x1 0xd131 0x303
|
||||
phy raw c45 0xc9 0x1 0xd134 0x1
|
||||
|
||||
phy raw c45 0x81 0x1 0xffde 0
|
||||
phy raw c45 0x81 0x1 0xd130 0x55
|
||||
phy raw c45 0x81 0x1 0xd131 0x303
|
||||
phy raw c45 0x81 0x1 0xd134 0x1
|
||||
phy raw c45 0x81 0x1 0xffde 1
|
||||
phy raw c45 0x81 0x1 0xd130 0x55
|
||||
phy raw c45 0x81 0x1 0xd131 0x303
|
||||
phy raw c45 0x81 0x1 0xd134 0x1
|
||||
phy raw c45 0x81 0x1 0xffde 2
|
||||
phy raw c45 0x81 0x1 0xd130 0x55
|
||||
phy raw c45 0x81 0x1 0xd131 0x303
|
||||
phy raw c45 0x81 0x1 0xd134 0x1
|
||||
phy raw c45 0x81 0x1 0xffde 3
|
||||
phy raw c45 0x81 0x1 0xd130 0x55
|
||||
phy raw c45 0x81 0x1 0xd131 0x303
|
||||
phy raw c45 0x81 0x1 0xd134 0x1
|
||||
|
||||
phy raw c45 0x85 0x1 0xffde 0
|
||||
phy raw c45 0x85 0x1 0xd130 0x55
|
||||
phy raw c45 0x85 0x1 0xd131 0x303
|
||||
phy raw c45 0x85 0x1 0xd134 0x1
|
||||
phy raw c45 0x85 0x1 0xffde 1
|
||||
phy raw c45 0x85 0x1 0xd130 0x55
|
||||
phy raw c45 0x85 0x1 0xd131 0x303
|
||||
phy raw c45 0x85 0x1 0xd134 0x1
|
||||
phy raw c45 0x85 0x1 0xffde 2
|
||||
phy raw c45 0x85 0x1 0xd130 0x55
|
||||
phy raw c45 0x85 0x1 0xd131 0x303
|
||||
phy raw c45 0x85 0x1 0xd134 0x1
|
||||
phy raw c45 0x85 0x1 0xffde 3
|
||||
phy raw c45 0x85 0x1 0xd130 0x55
|
||||
phy raw c45 0x85 0x1 0xd131 0x303
|
||||
phy raw c45 0x85 0x1 0xd134 0x1
|
||||
|
||||
phy raw c45 0x8d 0x1 0xffde 0
|
||||
phy raw c45 0x8d 0x1 0xd130 0x55
|
||||
phy raw c45 0x8d 0x1 0xd131 0x303
|
||||
phy raw c45 0x8d 0x1 0xd134 0x1
|
||||
phy raw c45 0x8d 0x1 0xffde 1
|
||||
phy raw c45 0x8d 0x1 0xd130 0x55
|
||||
phy raw c45 0x8d 0x1 0xd131 0x303
|
||||
phy raw c45 0x8d 0x1 0xd134 0x1
|
||||
phy raw c45 0x8d 0x1 0xffde 2
|
||||
phy raw c45 0x8d 0x1 0xd130 0x55
|
||||
phy raw c45 0x8d 0x1 0xd131 0x303
|
||||
phy raw c45 0x8d 0x1 0xd134 0x1
|
||||
phy raw c45 0x8d 0x1 0xffde 3
|
||||
phy raw c45 0x8d 0x1 0xd130 0x55
|
||||
phy raw c45 0x8d 0x1 0xd131 0x303
|
||||
phy raw c45 0x8d 0x1 0xd134 0x1
|
||||
|
||||
phy raw c45 0x95 0x1 0xffde 0
|
||||
phy raw c45 0x95 0x1 0xd130 0x55
|
||||
phy raw c45 0x95 0x1 0xd131 0x303
|
||||
phy raw c45 0x95 0x1 0xd134 0x1
|
||||
phy raw c45 0x95 0x1 0xffde 1
|
||||
phy raw c45 0x95 0x1 0xd130 0x55
|
||||
phy raw c45 0x95 0x1 0xd131 0x303
|
||||
phy raw c45 0x95 0x1 0xd134 0x1
|
||||
phy raw c45 0x95 0x1 0xffde 2
|
||||
phy raw c45 0x95 0x1 0xd130 0x55
|
||||
phy raw c45 0x95 0x1 0xd131 0x303
|
||||
phy raw c45 0x95 0x1 0xd134 0x1
|
||||
phy raw c45 0x95 0x1 0xffde 3
|
||||
phy raw c45 0x95 0x1 0xd130 0x55
|
||||
phy raw c45 0x95 0x1 0xd131 0x303
|
||||
phy raw c45 0x95 0x1 0xd134 0x1
|
||||
|
||||
phy raw c45 0xa5 0x1 0xffde 0
|
||||
phy raw c45 0xa5 0x1 0xd130 0x55
|
||||
phy raw c45 0xa5 0x1 0xd131 0x303
|
||||
phy raw c45 0xa5 0x1 0xd134 0x1
|
||||
phy raw c45 0xa5 0x1 0xffde 1
|
||||
phy raw c45 0xa5 0x1 0xd130 0x55
|
||||
phy raw c45 0xa5 0x1 0xd131 0x303
|
||||
phy raw c45 0xa5 0x1 0xd134 0x1
|
||||
phy raw c45 0xa5 0x1 0xffde 2
|
||||
phy raw c45 0xa5 0x1 0xd130 0x55
|
||||
phy raw c45 0xa5 0x1 0xd131 0x303
|
||||
phy raw c45 0xa5 0x1 0xd134 0x1
|
||||
phy raw c45 0xa5 0x1 0xffde 3
|
||||
phy raw c45 0xa5 0x1 0xd130 0x55
|
||||
phy raw c45 0xa5 0x1 0xd131 0x303
|
||||
phy raw c45 0xa5 0x1 0xd134 0x1
|
||||
|
||||
phy raw c45 0xa9 0x1 0xffde 0
|
||||
phy raw c45 0xa9 0x1 0xd130 0x55
|
||||
phy raw c45 0xa9 0x1 0xd131 0x303
|
||||
phy raw c45 0xa9 0x1 0xd134 0x1
|
||||
phy raw c45 0xa9 0x1 0xffde 1
|
||||
phy raw c45 0xa9 0x1 0xd130 0x55
|
||||
phy raw c45 0xa9 0x1 0xd131 0x303
|
||||
phy raw c45 0xa9 0x1 0xd134 0x1
|
||||
phy raw c45 0xa9 0x1 0xffde 2
|
||||
phy raw c45 0xa9 0x1 0xd130 0x55
|
||||
phy raw c45 0xa9 0x1 0xd131 0x303
|
||||
phy raw c45 0xa9 0x1 0xd134 0x1
|
||||
phy raw c45 0xa9 0x1 0xffde 3
|
||||
phy raw c45 0xa9 0x1 0xd130 0x55
|
||||
phy raw c45 0xa9 0x1 0xd131 0x303
|
||||
phy raw c45 0xa9 0x1 0xd134 0x1
|
||||
|
||||
phy raw c45 0xc1 0x1 0xffde 0
|
||||
phy raw c45 0xc1 0x1 0xd130 0x55
|
||||
phy raw c45 0xc1 0x1 0xd131 0x303
|
||||
phy raw c45 0xc1 0x1 0xd134 0x1
|
||||
phy raw c45 0xc1 0x1 0xffde 1
|
||||
phy raw c45 0xc1 0x1 0xd130 0x55
|
||||
phy raw c45 0xc1 0x1 0xd131 0x303
|
||||
phy raw c45 0xc1 0x1 0xd134 0x1
|
||||
phy raw c45 0xc1 0x1 0xffde 2
|
||||
phy raw c45 0xc1 0x1 0xd130 0x55
|
||||
phy raw c45 0xc1 0x1 0xd131 0x303
|
||||
phy raw c45 0xc1 0x1 0xd134 0x1
|
||||
phy raw c45 0xc1 0x1 0xffde 3
|
||||
phy raw c45 0xc1 0x1 0xd130 0x55
|
||||
phy raw c45 0xc1 0x1 0xd131 0x303
|
||||
phy raw c45 0xc1 0x1 0xd134 0x1
|
||||
|
||||
phy raw c45 0xf5 0x1 0xffde 0
|
||||
phy raw c45 0xf5 0x1 0xd130 0x55
|
||||
phy raw c45 0xf5 0x1 0xd131 0x303
|
||||
phy raw c45 0xf5 0x1 0xd134 0x1
|
||||
phy raw c45 0xf5 0x1 0xffde 1
|
||||
phy raw c45 0xf5 0x1 0xd130 0x55
|
||||
phy raw c45 0xf5 0x1 0xd131 0x303
|
||||
phy raw c45 0xf5 0x1 0xd134 0x1
|
||||
phy raw c45 0xf5 0x1 0xffde 2
|
||||
phy raw c45 0xf5 0x1 0xd130 0x55
|
||||
phy raw c45 0xf5 0x1 0xd131 0x303
|
||||
phy raw c45 0xf5 0x1 0xd134 0x1
|
||||
phy raw c45 0xf5 0x1 0xffde 3
|
||||
phy raw c45 0xf5 0x1 0xd130 0x55
|
||||
phy raw c45 0xf5 0x1 0xd131 0x303
|
||||
phy raw c45 0xf5 0x1 0xd134 0x1
|
||||
|
||||
phy raw c45 0x185 0x1 0xffde 0
|
||||
phy raw c45 0x185 0x1 0xd130 0x55
|
||||
phy raw c45 0x185 0x1 0xd131 0x303
|
||||
phy raw c45 0x185 0x1 0xd134 0x1
|
||||
phy raw c45 0x185 0x1 0xffde 1
|
||||
phy raw c45 0x185 0x1 0xd130 0x55
|
||||
phy raw c45 0x185 0x1 0xd131 0x303
|
||||
phy raw c45 0x185 0x1 0xd134 0x1
|
||||
phy raw c45 0x185 0x1 0xffde 2
|
||||
phy raw c45 0x185 0x1 0xd130 0x55
|
||||
phy raw c45 0x185 0x1 0xd131 0x303
|
||||
phy raw c45 0x185 0x1 0xd134 0x1
|
||||
phy raw c45 0x185 0x1 0xffde 3
|
||||
phy raw c45 0x185 0x1 0xd130 0x55
|
||||
phy raw c45 0x185 0x1 0xd131 0x303
|
||||
phy raw c45 0x185 0x1 0xd134 0x1
|
||||
|
||||
# Start of 8x100G
|
||||
|
||||
phy raw c45 0xe1 0x1 0xffde 0
|
||||
phy raw c45 0xe1 0x1 0xd130 0x55
|
||||
phy raw c45 0xe1 0x1 0xd131 0x303
|
||||
phy raw c45 0xe1 0x1 0xffde 1
|
||||
phy raw c45 0xe1 0x1 0xd130 0x55
|
||||
phy raw c45 0xe1 0x1 0xd131 0x303
|
||||
phy raw c45 0xe1 0x1 0xffde 2
|
||||
phy raw c45 0xe1 0x1 0xd130 0x55
|
||||
phy raw c45 0xe1 0x1 0xd131 0x303
|
||||
phy raw c45 0xe1 0x1 0xffde 3
|
||||
phy raw c45 0xe1 0x1 0xd130 0x59
|
||||
phy raw c45 0xe1 0x1 0xd131 0x505
|
||||
phy raw c45 0xe1 0x1 0xd134 0x1
|
||||
|
||||
phy raw c45 0xe5 0x1 0xffde 0
|
||||
phy raw c45 0xe5 0x1 0xd130 0x59
|
||||
phy raw c45 0xe5 0x1 0xd131 0x502
|
||||
phy raw c45 0xe5 0x1 0xffde 1
|
||||
phy raw c45 0xe5 0x1 0xd130 0x59
|
||||
phy raw c45 0xe5 0x1 0xd131 0x502
|
||||
phy raw c45 0xe5 0x1 0xffde 2
|
||||
phy raw c45 0xe5 0x1 0xd130 0x59
|
||||
phy raw c45 0xe5 0x1 0xd131 0x502
|
||||
phy raw c45 0xe5 0x1 0xffde 3
|
||||
phy raw c45 0xe5 0x1 0xd130 0x59
|
||||
phy raw c45 0xe5 0x1 0xd131 0x502
|
||||
phy raw c45 0xe5 0x1 0xd134 0x1
|
||||
|
||||
phy raw c45 0xed 0x1 0xffde 0
|
||||
phy raw c45 0xed 0x1 0xd130 0x59
|
||||
phy raw c45 0xed 0x1 0xd131 0x502
|
||||
phy raw c45 0xed 0x1 0xffde 1
|
||||
phy raw c45 0xed 0x1 0xd130 0x59
|
||||
phy raw c45 0xed 0x1 0xd131 0x502
|
||||
phy raw c45 0xed 0x1 0xffde 2
|
||||
phy raw c45 0xed 0x1 0xd130 0x59
|
||||
phy raw c45 0xed 0x1 0xd131 0x502
|
||||
phy raw c45 0xed 0x1 0xffde 3
|
||||
phy raw c45 0xed 0x1 0xd130 0x59
|
||||
phy raw c45 0xed 0x1 0xd131 0x502
|
||||
phy raw c45 0xed 0x1 0xd134 0x1
|
||||
|
||||
phy raw c45 0x189 0x1 0xffde 0
|
||||
phy raw c45 0x189 0x1 0xd130 0x59
|
||||
phy raw c45 0x189 0x1 0xd131 0x502
|
||||
phy raw c45 0x189 0x1 0xffde 1
|
||||
phy raw c45 0x189 0x1 0xd130 0x59
|
||||
phy raw c45 0x189 0x1 0xd131 0x502
|
||||
phy raw c45 0x189 0x1 0xffde 2
|
||||
phy raw c45 0x189 0x1 0xd130 0x59
|
||||
phy raw c45 0x189 0x1 0xd131 0x502
|
||||
phy raw c45 0x189 0x1 0xffde 3
|
||||
phy raw c45 0x189 0x1 0xd130 0x59
|
||||
phy raw c45 0x189 0x1 0xd131 0x502
|
||||
phy raw c45 0x189 0x1 0xd134 0x1
|
||||
|
||||
phy raw c45 0x1a1 0x1 0xffde 0
|
||||
phy raw c45 0x1a1 0x1 0xd130 0x59
|
||||
phy raw c45 0x1a1 0x1 0xd131 0x502
|
||||
phy raw c45 0x1a1 0x1 0xffde 1
|
||||
phy raw c45 0x1a1 0x1 0xd130 0x59
|
||||
phy raw c45 0x1a1 0x1 0xd131 0x502
|
||||
phy raw c45 0x1a1 0x1 0xffde 2
|
||||
phy raw c45 0x1a1 0x1 0xd130 0x59
|
||||
phy raw c45 0x1a1 0x1 0xd131 0x502
|
||||
phy raw c45 0x1a1 0x1 0xffde 3
|
||||
phy raw c45 0x1a1 0x1 0xd130 0x59
|
||||
phy raw c45 0x1a1 0x1 0xd131 0x502
|
||||
phy raw c45 0x1a1 0x1 0xd134 0x1
|
||||
|
||||
phy raw c45 0x1a9 0x1 0xffde 0
|
||||
phy raw c45 0x1a9 0x1 0xd130 0x59
|
||||
phy raw c45 0x1a9 0x1 0xd131 0x502
|
||||
phy raw c45 0x1a9 0x1 0xffde 1
|
||||
phy raw c45 0x1a9 0x1 0xd130 0x59
|
||||
phy raw c45 0x1a9 0x1 0xd131 0x502
|
||||
phy raw c45 0x1a9 0x1 0xffde 2
|
||||
phy raw c45 0x1a9 0x1 0xd130 0x59
|
||||
phy raw c45 0x1a9 0x1 0xd131 0x502
|
||||
phy raw c45 0x1a9 0x1 0xffde 3
|
||||
phy raw c45 0x1a9 0x1 0xd130 0x59
|
||||
phy raw c45 0x1a9 0x1 0xd131 0x502
|
||||
phy raw c45 0x1a9 0x1 0xd134 0x1
|
||||
|
||||
phy raw c45 0x1b1 0x1 0xffde 0
|
||||
phy raw c45 0x1b1 0x1 0xd130 0x59
|
||||
phy raw c45 0x1b1 0x1 0xd131 0x502
|
||||
phy raw c45 0x1b1 0x1 0xffde 1
|
||||
phy raw c45 0x1b1 0x1 0xd130 0x59
|
||||
phy raw c45 0x1b1 0x1 0xd131 0x502
|
||||
phy raw c45 0x1b1 0x1 0xffde 2
|
||||
phy raw c45 0x1b1 0x1 0xd130 0x59
|
||||
phy raw c45 0x1b1 0x1 0xd131 0x502
|
||||
phy raw c45 0x1b1 0x1 0xffde 3
|
||||
phy raw c45 0x1b1 0x1 0xd130 0x59
|
||||
phy raw c45 0x1b1 0x1 0xd131 0x502
|
||||
phy raw c45 0x1b1 0x1 0xd134 0x1
|
||||
|
||||
phy raw c45 0x1b5 0x1 0xffde 0
|
||||
phy raw c45 0x1b5 0x1 0xd130 0x59
|
||||
phy raw c45 0x1b5 0x1 0xd131 0x502
|
||||
phy raw c45 0x1b5 0x1 0xffde 1
|
||||
phy raw c45 0x1b5 0x1 0xd130 0x59
|
||||
phy raw c45 0x1b5 0x1 0xd131 0x502
|
||||
phy raw c45 0x1b5 0x1 0xffde 2
|
||||
phy raw c45 0x1b5 0x1 0xd130 0x59
|
||||
phy raw c45 0x1b5 0x1 0xd131 0x502
|
||||
phy raw c45 0x1b5 0x1 0xffde 3
|
||||
phy raw c45 0x1b5 0x1 0xd130 0x59
|
||||
phy raw c45 0x1b5 0x1 0xd131 0x502
|
||||
phy raw c45 0x1b5 0x1 0xd134 0x1
|
||||
|
||||
linkscan on
|
||||
@ -0,0 +1,3 @@
|
||||
{%- set default_topo = 't1' %}
|
||||
{%- include 'buffers_config.j2' %}
|
||||
|
||||
@ -0,0 +1,46 @@
|
||||
{%- set default_cable = '300m' %}
|
||||
|
||||
{%- macro generate_port_lists(PORT_ALL) %}
|
||||
{# Generate list of ports #}
|
||||
{% for port_idx in range(0,32) %}
|
||||
{% if PORT_ALL.append("Ethernet%d" % (port_idx * 4)) %}{% endif %}
|
||||
{% endfor %}
|
||||
{%- endmacro %}
|
||||
|
||||
{%- macro generate_buffer_pool_and_profiles() %}
|
||||
"BUFFER_POOL": {
|
||||
"ingress_lossless_pool": {
|
||||
"xoff": "4625920",
|
||||
"size": "12766208",
|
||||
"type": "ingress",
|
||||
"mode": "dynamic"
|
||||
},
|
||||
"egress_lossless_pool": {
|
||||
"size": "12766208",
|
||||
"type": "egress",
|
||||
"mode": "static"
|
||||
},
|
||||
"egress_lossy_pool": {
|
||||
"size": "7326924",
|
||||
"type": "egress",
|
||||
"mode": "dynamic"
|
||||
}
|
||||
},
|
||||
"BUFFER_PROFILE": {
|
||||
"ingress_lossy_profile": {
|
||||
"pool":"[BUFFER_POOL|ingress_lossless_pool]",
|
||||
"size":"0",
|
||||
"dynamic_th":"3"
|
||||
},
|
||||
"egress_lossless_profile": {
|
||||
"pool":"[BUFFER_POOL|egress_lossless_pool]",
|
||||
"size":"0",
|
||||
"static_th":"12766208"
|
||||
},
|
||||
"egress_lossy_profile": {
|
||||
"pool":"[BUFFER_POOL|egress_lossless_pool]",
|
||||
"size":"1518",
|
||||
"dynamic_th":"3"
|
||||
}
|
||||
},
|
||||
{%- endmacro %}
|
||||
@ -0,0 +1,45 @@
|
||||
{%- set default_cable = '300m' %}
|
||||
|
||||
{%- macro generate_port_lists(PORT_ALL) %}
|
||||
{# Generate list of ports #}
|
||||
{% for port_idx in range(0,32) %}
|
||||
{% if PORT_ALL.append("Ethernet%d" % (port_idx * 4)) %}{% endif %}
|
||||
{% endfor %}
|
||||
{%- endmacro %}
|
||||
|
||||
{%- macro generate_buffer_pool_and_profiles() %}
|
||||
"BUFFER_POOL": {
|
||||
"ingress_lossless_pool": {
|
||||
"size": "12766208",
|
||||
"type": "ingress",
|
||||
"mode": "dynamic"
|
||||
},
|
||||
"egress_lossless_pool": {
|
||||
"size": "12766208",
|
||||
"type": "egress",
|
||||
"mode": "static"
|
||||
},
|
||||
"egress_lossy_pool": {
|
||||
"size": "7326924",
|
||||
"type": "egress",
|
||||
"mode": "dynamic"
|
||||
}
|
||||
},
|
||||
"BUFFER_PROFILE": {
|
||||
"ingress_lossy_profile": {
|
||||
"pool":"[BUFFER_POOL|ingress_lossless_pool]",
|
||||
"size":"0",
|
||||
"dynamic_th":"3"
|
||||
},
|
||||
"egress_lossless_profile": {
|
||||
"pool":"[BUFFER_POOL|egress_lossless_pool]",
|
||||
"size":"0",
|
||||
"static_th":"12766208"
|
||||
},
|
||||
"egress_lossy_profile": {
|
||||
"pool":"[BUFFER_POOL|egress_lossless_pool]",
|
||||
"size":"1518",
|
||||
"dynamic_th":"3"
|
||||
}
|
||||
},
|
||||
{%- endmacro %}
|
||||
@ -0,0 +1,46 @@
|
||||
{%- set default_cable = '300m' %}
|
||||
|
||||
{%- macro generate_port_lists(PORT_ALL) %}
|
||||
{# Generate list of ports #}
|
||||
{% for port_idx in range(0,32) %}
|
||||
{% if PORT_ALL.append("Ethernet%d" % (port_idx * 4)) %}{% endif %}
|
||||
{% endfor %}
|
||||
{%- endmacro %}
|
||||
|
||||
{%- macro generate_buffer_pool_and_profiles() %}
|
||||
"BUFFER_POOL": {
|
||||
"ingress_lossless_pool": {
|
||||
"xoff": "196608",
|
||||
"size": "12766208",
|
||||
"type": "ingress",
|
||||
"mode": "dynamic"
|
||||
},
|
||||
"egress_lossless_pool": {
|
||||
"size": "33004032",
|
||||
"type": "egress",
|
||||
"mode": "static"
|
||||
},
|
||||
"egress_lossy_pool": {
|
||||
"size": "12766208",
|
||||
"type": "egress",
|
||||
"mode": "dynamic"
|
||||
}
|
||||
},
|
||||
"BUFFER_PROFILE": {
|
||||
"ingress_lossy_profile": {
|
||||
"pool":"[BUFFER_POOL|ingress_lossless_pool]",
|
||||
"size":"0",
|
||||
"dynamic_th":"3"
|
||||
},
|
||||
"egress_lossless_profile": {
|
||||
"pool":"[BUFFER_POOL|egress_lossless_pool]",
|
||||
"size":"0",
|
||||
"static_th":"33004032"
|
||||
},
|
||||
"egress_lossy_profile": {
|
||||
"pool":"[BUFFER_POOL|egress_lossless_pool]",
|
||||
"size":"1518",
|
||||
"dynamic_th":"3"
|
||||
}
|
||||
},
|
||||
{%- endmacro %}
|
||||
@ -0,0 +1,3 @@
|
||||
l2_mem_entries=294912
|
||||
l3_mem_entries=16384
|
||||
l3_alpm_enable=0
|
||||
@ -0,0 +1,5 @@
|
||||
l2_mem_entries=40960
|
||||
l3_mem_entries=40960
|
||||
l3_alpm_enable=2
|
||||
use_all_splithorizon_groups=1
|
||||
sai_tunnel_support=1
|
||||
@ -0,0 +1,17 @@
|
||||
# PG lossless profiles.
|
||||
# speed cable size xon xoff threshold xon_offset
|
||||
10000 5m 9427 0 50176 1 3584
|
||||
25000 5m 9427 0 50176 1 3584
|
||||
40000 5m 9427 0 50176 1 3584
|
||||
50000 5m 9427 0 50176 1 3584
|
||||
100000 5m 9427 0 50176 1 3584
|
||||
10000 40m 9427 0 50176 1 3584
|
||||
25000 40m 9427 0 50176 1 3584
|
||||
40000 40m 9427 0 50176 1 3584
|
||||
50000 40m 9427 0 50176 1 3584
|
||||
100000 40m 9427 0 50176 1 3584
|
||||
10000 300m 9427 0 50176 1 3584
|
||||
25000 300m 9427 0 50176 1 3584
|
||||
40000 300m 9427 0 50176 1 3584
|
||||
50000 300m 9427 0 50176 1 3584
|
||||
100000 300m 9427 0 50176 1 3584
|
||||
@ -0,0 +1,48 @@
|
||||
{
|
||||
"fec-mode": {
|
||||
"Ethernet0-47": {
|
||||
"1": {
|
||||
"1000": [ "none" ],
|
||||
"10000": [ "none", "fc" ],
|
||||
"25000": [ "none", "rs" ]
|
||||
}
|
||||
},
|
||||
"Ethernet48-79": {
|
||||
"1": {
|
||||
"10000": [ "none", "fc" ],
|
||||
"25000": [ "none", "rs" ]
|
||||
},
|
||||
"2": {
|
||||
"20000": [ "none", "fc" ],
|
||||
"50000": [ "none", "rs" ]
|
||||
},
|
||||
"4": {
|
||||
"40000": [ "none", "fc" ],
|
||||
"100000": [ "none", "rs" ]
|
||||
}
|
||||
}
|
||||
},
|
||||
"default-fec-mode": {
|
||||
"Ethernet0-47": {
|
||||
"1": {
|
||||
"1000": "none",
|
||||
"10000": "none",
|
||||
"25000": "rs"
|
||||
}
|
||||
},
|
||||
"Ethernet48-79": {
|
||||
"4": {
|
||||
"40000": "none",
|
||||
"100000": "rs"
|
||||
}
|
||||
}
|
||||
},
|
||||
"native-port-supported-speeds": {
|
||||
"Ethernet0-47": {
|
||||
"1": ["25000","10000","1000"]
|
||||
},
|
||||
"Ethernet48-79": {
|
||||
"4": ["100000","40000"]
|
||||
}
|
||||
}
|
||||
}
|
||||
@ -0,0 +1,57 @@
|
||||
# name lanes alias index speed
|
||||
Ethernet0 1 twentyfiveGigE1 1 25000
|
||||
Ethernet1 2 twentyfiveGigE2 2 25000
|
||||
Ethernet2 3 twentyfiveGigE3 3 25000
|
||||
Ethernet3 4 twentyfiveGigE4 4 25000
|
||||
Ethernet4 5 twentyfiveGigE5 5 25000
|
||||
Ethernet5 6 twentyfiveGigE6 6 25000
|
||||
Ethernet6 7 twentyfiveGigE7 7 25000
|
||||
Ethernet7 8 twentyfiveGigE8 8 25000
|
||||
Ethernet8 9 twentyfiveGigE9 9 25000
|
||||
Ethernet9 10 twentyfiveGigE10 10 25000
|
||||
Ethernet10 11 twentyfiveGigE11 11 25000
|
||||
Ethernet11 12 twentyfiveGigE12 12 25000
|
||||
Ethernet12 13 twentyfiveGigE13 13 25000
|
||||
Ethernet13 14 twentyfiveGigE14 14 25000
|
||||
Ethernet14 15 twentyfiveGigE15 15 25000
|
||||
Ethernet15 16 twentyfiveGigE16 16 25000
|
||||
Ethernet16 17 twentyfiveGigE17 17 25000
|
||||
Ethernet17 18 twentyfiveGigE18 18 25000
|
||||
Ethernet18 19 twentyfiveGigE19 19 25000
|
||||
Ethernet19 20 twentyfiveGigE20 20 25000
|
||||
Ethernet20 21 twentyfiveGigE21 21 25000
|
||||
Ethernet21 22 twentyfiveGigE22 22 25000
|
||||
Ethernet22 23 twentyfiveGigE23 23 25000
|
||||
Ethernet23 24 twentyfiveGigE24 24 25000
|
||||
Ethernet24 57 twentyfiveGigE25 25 25000
|
||||
Ethernet25 58 twentyfiveGigE26 26 25000
|
||||
Ethernet26 59 twentyfiveGigE27 27 25000
|
||||
Ethernet27 60 twentyfiveGigE28 28 25000
|
||||
Ethernet28 61 twentyfiveGigE29 29 25000
|
||||
Ethernet29 62 twentyfiveGigE30 30 25000
|
||||
Ethernet30 63 twentyfiveGigE31 31 25000
|
||||
Ethernet31 64 twentyfiveGigE32 32 25000
|
||||
Ethernet32 65 twentyfiveGigE33 33 25000
|
||||
Ethernet33 66 twentyfiveGigE34 34 25000
|
||||
Ethernet34 67 twentyfiveGigE35 35 25000
|
||||
Ethernet35 68 twentyfiveGigE36 36 25000
|
||||
Ethernet36 69 twentyfiveGigE37 37 25000
|
||||
Ethernet37 70 twentyfiveGigE38 38 25000
|
||||
Ethernet38 71 twentyfiveGigE39 39 25000
|
||||
Ethernet39 72 twentyfiveGigE40 40 25000
|
||||
Ethernet40 73 twentyfiveGigE41 41 25000
|
||||
Ethernet41 74 twentyfiveGigE42 42 25000
|
||||
Ethernet42 75 twentyfiveGigE43 43 25000
|
||||
Ethernet43 76 twentyfiveGigE44 44 25000
|
||||
Ethernet44 77 twentyfiveGigE45 45 25000
|
||||
Ethernet45 78 twentyfiveGigE46 46 25000
|
||||
Ethernet46 79 twentyfiveGigE47 47 25000
|
||||
Ethernet47 80 twentyfiveGigE48 48 25000
|
||||
Ethernet48 41,42,43,44 hundredGigE49 49 100000
|
||||
Ethernet52 45,46,47,48 hundredGigE50 50 100000
|
||||
Ethernet56 49,50,51,52 hundredGigE51 51 100000
|
||||
Ethernet60 53,54,55,56 hundredGigE52 52 100000
|
||||
Ethernet64 33,34,35,36 hundredGigE53 53 100000
|
||||
Ethernet68 37,38,39,40 hundredGigE54 54 100000
|
||||
Ethernet72 25,26,27,28 hundredGigE55 55 100000
|
||||
Ethernet76 29,30,31,32 hundredGigE56 56 100000
|
||||
@ -0,0 +1 @@
|
||||
{%- include 'qos_config_t1.j2' %}
|
||||
@ -0,0 +1,175 @@
|
||||
{%- set PORT_ALL = [] %}
|
||||
{%- for port in PORT %}
|
||||
{%- if PORT_ALL.append(port) %}{% endif %}
|
||||
{%- endfor %}
|
||||
{%- if PORT_ALL | sort_by_port_index %}{% endif %}
|
||||
|
||||
{%- set port_names_list_all = [] %}
|
||||
{%- for port in PORT_ALL %}
|
||||
{%- if port_names_list_all.append(port) %}{% endif %}
|
||||
{%- endfor %}
|
||||
{%- set port_names_all = port_names_list_all | join(',') -%}
|
||||
|
||||
|
||||
{%- set PORT_ACTIVE = [] %}
|
||||
{%- if DEVICE_NEIGHBOR is not defined %}
|
||||
{%- set PORT_ACTIVE = PORT_ALL %}
|
||||
{%- else %}
|
||||
{%- for port in DEVICE_NEIGHBOR.keys() %}
|
||||
{%- if PORT_ACTIVE.append(port) %}{%- endif %}
|
||||
{%- endfor %}
|
||||
{%- endif %}
|
||||
{%- if PORT_ACTIVE | sort_by_port_index %}{% endif %}
|
||||
|
||||
{%- set port_names_list_active = [] %}
|
||||
{%- for port in PORT_ACTIVE %}
|
||||
{%- if port_names_list_active.append(port) %}{%- endif %}
|
||||
{%- endfor %}
|
||||
{%- set port_names_active = port_names_list_active | join(',') -%}
|
||||
|
||||
|
||||
{%- set pfc_to_pg_map_supported_asics = ['mellanox', 'barefoot', 'marvell'] -%}
|
||||
|
||||
|
||||
{
|
||||
{% if generate_tc_to_pg_map is defined %}
|
||||
{{- generate_tc_to_pg_map() }}
|
||||
{% else %}
|
||||
"TC_TO_PRIORITY_GROUP_MAP": {
|
||||
"AZURE": {
|
||||
"0": "0",
|
||||
"1": "0",
|
||||
"2": "0",
|
||||
"3": "3",
|
||||
"4": "4",
|
||||
"5": "0",
|
||||
"6": "0",
|
||||
"7": "7"
|
||||
}
|
||||
},
|
||||
{% endif %}
|
||||
"MAP_PFC_PRIORITY_TO_QUEUE": {
|
||||
"AZURE": {
|
||||
"0": "0",
|
||||
"1": "1",
|
||||
"2": "2",
|
||||
"3": "3",
|
||||
"4": "4",
|
||||
"5": "5",
|
||||
"6": "6",
|
||||
"7": "7"
|
||||
}
|
||||
},
|
||||
"TC_TO_QUEUE_MAP": {
|
||||
"AZURE": {
|
||||
"0": "0",
|
||||
"1": "1",
|
||||
"2": "2",
|
||||
"3": "3",
|
||||
"4": "4",
|
||||
"5": "5",
|
||||
"6": "6",
|
||||
"7": "7"
|
||||
}
|
||||
},
|
||||
"DSCP_TO_TC_MAP": {
|
||||
"AZURE": {
|
||||
"0" : "1",
|
||||
"1" : "1",
|
||||
"2" : "1",
|
||||
"3" : "3",
|
||||
"4" : "4",
|
||||
"5" : "2",
|
||||
"6" : "1",
|
||||
"7" : "1",
|
||||
"8" : "0",
|
||||
"9" : "1",
|
||||
"10": "1",
|
||||
"11": "1",
|
||||
"12": "1",
|
||||
"13": "1",
|
||||
"14": "1",
|
||||
"15": "1",
|
||||
"16": "1",
|
||||
"17": "1",
|
||||
"18": "1",
|
||||
"19": "1",
|
||||
"20": "1",
|
||||
"21": "1",
|
||||
"22": "1",
|
||||
"23": "1",
|
||||
"24": "1",
|
||||
"25": "1",
|
||||
"26": "1",
|
||||
"27": "1",
|
||||
"28": "1",
|
||||
"29": "1",
|
||||
"30": "1",
|
||||
"31": "1",
|
||||
"32": "1",
|
||||
"33": "1",
|
||||
"34": "1",
|
||||
"35": "1",
|
||||
"36": "1",
|
||||
"37": "1",
|
||||
"38": "1",
|
||||
"39": "1",
|
||||
"40": "1",
|
||||
"41": "1",
|
||||
"42": "1",
|
||||
"43": "1",
|
||||
"44": "1",
|
||||
"45": "1",
|
||||
"46": "5",
|
||||
"47": "1",
|
||||
"48": "6",
|
||||
"49": "1",
|
||||
"50": "1",
|
||||
"51": "1",
|
||||
"52": "1",
|
||||
"53": "1",
|
||||
"54": "1",
|
||||
"55": "1",
|
||||
"56": "1",
|
||||
"57": "1",
|
||||
"58": "1",
|
||||
"59": "1",
|
||||
"60": "1",
|
||||
"61": "1",
|
||||
"62": "1",
|
||||
"63": "1"
|
||||
}
|
||||
},
|
||||
"SCHEDULER": {
|
||||
"scheduler.0": {
|
||||
"type" : "DWRR",
|
||||
"weight": "14"
|
||||
},
|
||||
"scheduler.1": {
|
||||
"type" : "DWRR",
|
||||
"weight": "15"
|
||||
}
|
||||
},
|
||||
{% if asic_type in pfc_to_pg_map_supported_asics %}
|
||||
"PFC_PRIORITY_TO_PRIORITY_GROUP_MAP": {
|
||||
"AZURE": {
|
||||
"3": "3",
|
||||
"4": "4"
|
||||
}
|
||||
},
|
||||
{% endif %}
|
||||
"PORT_QOS_MAP": {
|
||||
{% for port in PORT_ACTIVE %}
|
||||
"{{ port }}": {
|
||||
"dscp_to_tc_map" : "[DSCP_TO_TC_MAP|AZURE]",
|
||||
"tc_to_queue_map" : "[TC_TO_QUEUE_MAP|AZURE]",
|
||||
"tc_to_pg_map" : "[TC_TO_PRIORITY_GROUP_MAP|AZURE]",
|
||||
"pfc_to_queue_map": "[MAP_PFC_PRIORITY_TO_QUEUE|AZURE]",
|
||||
{% if asic_type in pfc_to_pg_map_supported_asics %}
|
||||
"pfc_to_pg_map" : "[PFC_PRIORITY_TO_PRIORITY_GROUP_MAP|AZURE]",
|
||||
{% endif %}
|
||||
"pfc_enable" : "3,4"
|
||||
}{% if not loop.last %},{% endif %}
|
||||
{% endfor %}
|
||||
}
|
||||
}
|
||||
@ -0,0 +1,2 @@
|
||||
SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/td3-ix8a-bwde-48x25G+8x100G.config.bcm
|
||||
SAI_NUM_ECMP_MEMBERS=64
|
||||
@ -0,0 +1,475 @@
|
||||
core_clock_frequency=1525
|
||||
dpp_clock_ratio=2:3
|
||||
parity_enable=1
|
||||
mem_cache_enable=0
|
||||
l2_mem_entries=40960
|
||||
l3_mem_entries=40960
|
||||
fpem_mem_entries=0
|
||||
l2xmsg_mode=1
|
||||
bcm_stat_flags=0
|
||||
l3_alpm_ipv6_128b_bkt_rsvd=1
|
||||
|
||||
#RIOT Enable
|
||||
riot_enable=1
|
||||
riot_overlay_l3_intf_mem_size=4096
|
||||
riot_overlay_l3_egress_mem_size=32768
|
||||
l3_ecmp_levels=2
|
||||
riot_overlay_ecmp_resilient_hash_size=16384
|
||||
|
||||
bcm_num_cos=10
|
||||
default_cpu_tx_queue=9
|
||||
bcm_stat_interval=2000000
|
||||
cdma_timeout_usec=3000000
|
||||
|
||||
ifp_inports_support_enable=1
|
||||
ipv6_lpm_128b_enable=0x1
|
||||
l3_max_ecmp_mode=1
|
||||
l3_alpm_enable=2
|
||||
lpm_scaling_enable=0
|
||||
|
||||
miim_intr_enable=0
|
||||
module_64ports=1
|
||||
|
||||
schan_intr_enable=0
|
||||
skip_L2_USER_ENTRY=0
|
||||
stable_size=0x5500000
|
||||
tdma_timeout_usec=3000000
|
||||
|
||||
# portmap settings
|
||||
oversubscribe_mode=1
|
||||
pbmp_xport_xe=0x3ffffffffffffffffffffffffffffffffe
|
||||
port_flex_enable=1
|
||||
stable_size=0x5500000
|
||||
|
||||
#falcon core 0 flex [1:32]
|
||||
portmap_1=1:25
|
||||
portmap_2=2:25
|
||||
portmap_3=3:25
|
||||
portmap_4=4:25
|
||||
|
||||
#falcon core 1
|
||||
portmap_5=5:25
|
||||
portmap_6=6:25
|
||||
portmap_7=7:25
|
||||
portmap_8=8:25
|
||||
|
||||
#falcon core 2
|
||||
portmap_9=9:25
|
||||
portmap_10=10:25
|
||||
portmap_11=11:25
|
||||
portmap_12=12:25
|
||||
|
||||
#falcon core 3
|
||||
portmap_13=13:25
|
||||
portmap_14=14:25
|
||||
portmap_15=15:25
|
||||
portmap_16=16:25
|
||||
|
||||
#falcon core 4
|
||||
portmap_17=17:25
|
||||
portmap_18=18:25
|
||||
portmap_19=19:25
|
||||
portmap_20=20:25
|
||||
|
||||
#falcon core 5
|
||||
portmap_21=21:25
|
||||
portmap_22=22:25
|
||||
portmap_23=23:25
|
||||
portmap_24=24:25
|
||||
|
||||
#falcon core 6
|
||||
portmap_25=25:100
|
||||
|
||||
#falcon core 7, port 56 supports breakout
|
||||
portmap_26=29:100
|
||||
|
||||
#falcon core 8
|
||||
portmap_30=33:100
|
||||
|
||||
#falcon core 9
|
||||
portmap_31=37:100
|
||||
|
||||
#falcon core 10 flex [33:64], port 49 supports breakout
|
||||
portmap_33=41:100
|
||||
|
||||
#falcon core 11
|
||||
portmap_37=45:100
|
||||
|
||||
#falcon core 12
|
||||
portmap_38=49:100
|
||||
|
||||
#falcon core 13
|
||||
portmap_39=53:100
|
||||
|
||||
#falcon core 14
|
||||
portmap_40=57:25
|
||||
portmap_41=58:25
|
||||
portmap_42=59:25
|
||||
portmap_43=60:25
|
||||
|
||||
#falcon core 15
|
||||
portmap_44=61:25
|
||||
portmap_45=62:25
|
||||
portmap_46=63:25
|
||||
portmap_47=64:25
|
||||
|
||||
#falcon core 16
|
||||
portmap_48=65:25
|
||||
portmap_49=66:25
|
||||
portmap_50=67:25
|
||||
portmap_51=68:25
|
||||
|
||||
#falcon core 17
|
||||
portmap_52=69:25
|
||||
portmap_53=70:25
|
||||
portmap_54=71:25
|
||||
portmap_55=72:25
|
||||
|
||||
#falcon core 18
|
||||
portmap_56=73:25
|
||||
portmap_57=74:25
|
||||
portmap_58=75:25
|
||||
portmap_59=76:25
|
||||
|
||||
#falcon core 19
|
||||
portmap_60=77:25
|
||||
portmap_61=78:25
|
||||
portmap_62=79:25
|
||||
portmap_63=80:25
|
||||
|
||||
# datapath port -- MerlinCore
|
||||
#Hide these to prevent SAI from initializing them...they are physically not on system
|
||||
#portmap_64=81:10:m
|
||||
|
||||
### port remap
|
||||
|
||||
dport_map_port_1=1
|
||||
dport_map_port_2=2
|
||||
dport_map_port_3=3
|
||||
dport_map_port_4=4
|
||||
|
||||
dport_map_port_5=5
|
||||
dport_map_port_6=6
|
||||
dport_map_port_7=7
|
||||
dport_map_port_8=8
|
||||
|
||||
dport_map_port_9=9
|
||||
dport_map_port_10=10
|
||||
dport_map_port_11=11
|
||||
dport_map_port_12=12
|
||||
|
||||
dport_map_port_13=13
|
||||
dport_map_port_14=14
|
||||
dport_map_port_15=15
|
||||
dport_map_port_16=16
|
||||
|
||||
dport_map_port_17=17
|
||||
dport_map_port_18=18
|
||||
dport_map_port_19=19
|
||||
dport_map_port_20=20
|
||||
|
||||
dport_map_port_21=21
|
||||
dport_map_port_22=22
|
||||
dport_map_port_23=23
|
||||
dport_map_port_24=24
|
||||
|
||||
dport_map_port_40=25
|
||||
dport_map_port_41=26
|
||||
dport_map_port_42=27
|
||||
dport_map_port_43=28
|
||||
|
||||
dport_map_port_44=29
|
||||
dport_map_port_45=30
|
||||
dport_map_port_46=31
|
||||
dport_map_port_47=32
|
||||
|
||||
dport_map_port_48=33
|
||||
dport_map_port_49=34
|
||||
dport_map_port_50=35
|
||||
dport_map_port_51=36
|
||||
|
||||
dport_map_port_52=37
|
||||
dport_map_port_53=38
|
||||
dport_map_port_54=39
|
||||
dport_map_port_55=40
|
||||
|
||||
dport_map_port_56=41
|
||||
dport_map_port_57=42
|
||||
dport_map_port_58=43
|
||||
dport_map_port_59=44
|
||||
|
||||
dport_map_port_60=45
|
||||
dport_map_port_61=46
|
||||
dport_map_port_62=47
|
||||
dport_map_port_63=48
|
||||
|
||||
dport_map_port_33=49
|
||||
dport_map_port_34=50
|
||||
dport_map_port_35=51
|
||||
dport_map_port_36=52
|
||||
dport_map_port_37=53
|
||||
dport_map_port_38=54
|
||||
dport_map_port_39=55
|
||||
|
||||
dport_map_port_30=56
|
||||
dport_map_port_31=57
|
||||
dport_map_port_25=58
|
||||
dport_map_port_26=59
|
||||
dport_map_port_27=60
|
||||
dport_map_port_28=61
|
||||
dport_map_port_29=62
|
||||
|
||||
#dport_map_port_64=63
|
||||
|
||||
### lane swap and polarity follow physical port
|
||||
|
||||
### FC0
|
||||
phy_chain_tx_lane_map_physical{1.0}=0x3210
|
||||
phy_chain_tx_polarity_flip_physical{1.0}=0x0
|
||||
phy_chain_tx_polarity_flip_physical{2.0}=0x0
|
||||
phy_chain_tx_polarity_flip_physical{3.0}=0x0
|
||||
phy_chain_tx_polarity_flip_physical{4.0}=0x0
|
||||
phy_chain_rx_lane_map_physical{1.0}=0x1320
|
||||
phy_chain_rx_polarity_flip_physical{1.0}=0x0
|
||||
phy_chain_rx_polarity_flip_physical{2.0}=0x1
|
||||
phy_chain_rx_polarity_flip_physical{3.0}=0x1
|
||||
phy_chain_rx_polarity_flip_physical{4.0}=0x0
|
||||
|
||||
### FC1
|
||||
phy_chain_tx_lane_map_physical{5.0}=0x0132
|
||||
phy_chain_tx_polarity_flip_physical{5.0}=0x0
|
||||
phy_chain_tx_polarity_flip_physical{6.0}=0x0
|
||||
phy_chain_tx_polarity_flip_physical{7.0}=0x1
|
||||
phy_chain_tx_polarity_flip_physical{8.0}=0x1
|
||||
phy_chain_rx_lane_map_physical{5.0}=0x1032
|
||||
phy_chain_rx_polarity_flip_physical{5.0}=0x1
|
||||
phy_chain_rx_polarity_flip_physical{6.0}=0x1
|
||||
phy_chain_rx_polarity_flip_physical{7.0}=0x1
|
||||
phy_chain_rx_polarity_flip_physical{8.0}=0x1
|
||||
|
||||
### FC2
|
||||
phy_chain_tx_lane_map_physical{9.0}=0x0123
|
||||
phy_chain_tx_polarity_flip_physical{9.0}=0x1
|
||||
phy_chain_tx_polarity_flip_physical{10.0}=0x1
|
||||
phy_chain_tx_polarity_flip_physical{11.0}=0x1
|
||||
phy_chain_tx_polarity_flip_physical{12.0}=0x1
|
||||
phy_chain_rx_lane_map_physical{9.0}=0x1032
|
||||
phy_chain_rx_polarity_flip_physical{9.0}=0x1
|
||||
phy_chain_rx_polarity_flip_physical{10.0}=0x1
|
||||
phy_chain_rx_polarity_flip_physical{11.0}=0x1
|
||||
phy_chain_rx_polarity_flip_physical{12.0}=0x1
|
||||
|
||||
### FC3
|
||||
phy_chain_tx_lane_map_physical{13.0}=0x0123
|
||||
phy_chain_tx_polarity_flip_physical{13.0}=0x1
|
||||
phy_chain_tx_polarity_flip_physical{14.0}=0x1
|
||||
phy_chain_tx_polarity_flip_physical{15.0}=0x1
|
||||
phy_chain_tx_polarity_flip_physical{16.0}=0x1
|
||||
phy_chain_rx_lane_map_physical{13.0}=0x1032
|
||||
phy_chain_rx_polarity_flip_physical{13.0}=0x1
|
||||
phy_chain_rx_polarity_flip_physical{14.0}=0x1
|
||||
phy_chain_rx_polarity_flip_physical{15.0}=0x1
|
||||
phy_chain_rx_polarity_flip_physical{16.0}=0x1
|
||||
|
||||
### FC4
|
||||
phy_chain_tx_lane_map_physical{17.0}=0x0123
|
||||
phy_chain_tx_polarity_flip_physical{17.0}=0x1
|
||||
phy_chain_tx_polarity_flip_physical{18.0}=0x0
|
||||
phy_chain_tx_polarity_flip_physical{19.0}=0x0
|
||||
phy_chain_tx_polarity_flip_physical{20.0}=0x0
|
||||
phy_chain_rx_lane_map_physical{17.0}=0x1032
|
||||
phy_chain_rx_polarity_flip_physical{17.0}=0x1
|
||||
phy_chain_rx_polarity_flip_physical{18.0}=0x0
|
||||
phy_chain_rx_polarity_flip_physical{19.0}=0x1
|
||||
phy_chain_rx_polarity_flip_physical{20.0}=0x1
|
||||
|
||||
### FC5
|
||||
phy_chain_tx_lane_map_physical{21.0}=0x0123
|
||||
phy_chain_tx_polarity_flip_physical{21.0}=0x0
|
||||
phy_chain_tx_polarity_flip_physical{22.0}=0x0
|
||||
phy_chain_tx_polarity_flip_physical{23.0}=0x0
|
||||
phy_chain_tx_polarity_flip_physical{24.0}=0x0
|
||||
phy_chain_rx_lane_map_physical{21.0}=0x1032
|
||||
phy_chain_rx_polarity_flip_physical{21.0}=0x0
|
||||
phy_chain_rx_polarity_flip_physical{22.0}=0x0
|
||||
phy_chain_rx_polarity_flip_physical{23.0}=0x0
|
||||
phy_chain_rx_polarity_flip_physical{24.0}=0x0
|
||||
|
||||
### FC6
|
||||
phy_chain_tx_lane_map_physical{25.0}=0x3021
|
||||
phy_chain_tx_polarity_flip_physical{25.0}=0x1
|
||||
phy_chain_tx_polarity_flip_physical{26.0}=0x1
|
||||
phy_chain_tx_polarity_flip_physical{27.0}=0x0
|
||||
phy_chain_tx_polarity_flip_physical{28.0}=0x0
|
||||
phy_chain_rx_lane_map_physical{25.0}=0x1032
|
||||
phy_chain_rx_polarity_flip_physical{25.0}=0x0
|
||||
phy_chain_rx_polarity_flip_physical{26.0}=0x0
|
||||
phy_chain_rx_polarity_flip_physical{27.0}=0x1
|
||||
phy_chain_rx_polarity_flip_physical{28.0}=0x0
|
||||
|
||||
### FC7
|
||||
phy_chain_tx_lane_map_physical{29.0}=0x0213
|
||||
phy_chain_tx_polarity_flip_physical{29.0}=0x1
|
||||
phy_chain_tx_polarity_flip_physical{30.0}=0x0
|
||||
phy_chain_tx_polarity_flip_physical{31.0}=0x0
|
||||
phy_chain_tx_polarity_flip_physical{32.0}=0x1
|
||||
phy_chain_rx_lane_map_physical{29.0}=0x1203
|
||||
phy_chain_rx_polarity_flip_physical{29.0}=0x0
|
||||
phy_chain_rx_polarity_flip_physical{30.0}=0x0
|
||||
phy_chain_rx_polarity_flip_physical{31.0}=0x0
|
||||
phy_chain_rx_polarity_flip_physical{32.0}=0x1
|
||||
|
||||
### FC8
|
||||
phy_chain_tx_lane_map_physical{33.0}=0x0213
|
||||
phy_chain_tx_polarity_flip_physical{33.0}=0x1
|
||||
phy_chain_tx_polarity_flip_physical{34.0}=0x0
|
||||
phy_chain_tx_polarity_flip_physical{35.0}=0x0
|
||||
phy_chain_tx_polarity_flip_physical{36.0}=0x0
|
||||
phy_chain_rx_lane_map_physical{33.0}=0x1302
|
||||
phy_chain_rx_polarity_flip_physical{33.0}=0x0
|
||||
phy_chain_rx_polarity_flip_physical{34.0}=0x1
|
||||
phy_chain_rx_polarity_flip_physical{35.0}=0x0
|
||||
phy_chain_rx_polarity_flip_physical{36.0}=0x0
|
||||
|
||||
### FC9
|
||||
phy_chain_tx_lane_map_physical{37.0}=0x3120
|
||||
phy_chain_tx_polarity_flip_physical{37.0}=0x1
|
||||
phy_chain_tx_polarity_flip_physical{38.0}=0x0
|
||||
phy_chain_tx_polarity_flip_physical{39.0}=0x0
|
||||
phy_chain_tx_polarity_flip_physical{40.0}=0x1
|
||||
phy_chain_rx_lane_map_physical{37.0}=0x2031
|
||||
phy_chain_rx_polarity_flip_physical{37.0}=0x0
|
||||
phy_chain_rx_polarity_flip_physical{38.0}=0x1
|
||||
phy_chain_rx_polarity_flip_physical{39.0}=0x0
|
||||
phy_chain_rx_polarity_flip_physical{40.0}=0x0
|
||||
|
||||
### FC10
|
||||
phy_chain_tx_lane_map_physical{41.0}=0x0213
|
||||
phy_chain_tx_polarity_flip_physical{41.0}=0x0
|
||||
phy_chain_tx_polarity_flip_physical{42.0}=0x0
|
||||
phy_chain_tx_polarity_flip_physical{43.0}=0x0
|
||||
phy_chain_tx_polarity_flip_physical{44.0}=0x1
|
||||
phy_chain_rx_lane_map_physical{41.0}=0x2013
|
||||
phy_chain_rx_polarity_flip_physical{41.0}=0x1
|
||||
phy_chain_rx_polarity_flip_physical{42.0}=0x0
|
||||
phy_chain_rx_polarity_flip_physical{43.0}=0x1
|
||||
phy_chain_rx_polarity_flip_physical{44.0}=0x1
|
||||
|
||||
### FC11
|
||||
phy_chain_tx_lane_map_physical{45.0}=0x2031
|
||||
phy_chain_tx_polarity_flip_physical{45.0}=0x1
|
||||
phy_chain_tx_polarity_flip_physical{46.0}=0x0
|
||||
phy_chain_tx_polarity_flip_physical{47.0}=0x0
|
||||
phy_chain_tx_polarity_flip_physical{48.0}=0x1
|
||||
phy_chain_rx_lane_map_physical{45.0}=0x2031
|
||||
phy_chain_rx_polarity_flip_physical{45.0}=0x1
|
||||
phy_chain_rx_polarity_flip_physical{46.0}=0x1
|
||||
phy_chain_rx_polarity_flip_physical{47.0}=0x0
|
||||
phy_chain_rx_polarity_flip_physical{48.0}=0x1
|
||||
|
||||
### FC12
|
||||
phy_chain_tx_lane_map_physical{49.0}=0x3120
|
||||
phy_chain_tx_polarity_flip_physical{49.0}=0x1
|
||||
phy_chain_tx_polarity_flip_physical{50.0}=0x0
|
||||
phy_chain_tx_polarity_flip_physical{51.0}=0x0
|
||||
phy_chain_tx_polarity_flip_physical{52.0}=0x1
|
||||
phy_chain_rx_lane_map_physical{49.0}=0x0123
|
||||
phy_chain_rx_polarity_flip_physical{49.0}=0x1
|
||||
phy_chain_rx_polarity_flip_physical{50.0}=0x1
|
||||
phy_chain_rx_polarity_flip_physical{51.0}=0x1
|
||||
phy_chain_rx_polarity_flip_physical{52.0}=0x0
|
||||
|
||||
### FC13
|
||||
phy_chain_tx_lane_map_physical{53.0}=0x0123
|
||||
phy_chain_tx_polarity_flip_physical{53.0}=0x1
|
||||
phy_chain_tx_polarity_flip_physical{54.0}=0x1
|
||||
phy_chain_tx_polarity_flip_physical{55.0}=0x1
|
||||
phy_chain_tx_polarity_flip_physical{56.0}=0x1
|
||||
phy_chain_rx_lane_map_physical{53.0}=0x0312
|
||||
phy_chain_rx_polarity_flip_physical{53.0}=0x1
|
||||
phy_chain_rx_polarity_flip_physical{54.0}=0x0
|
||||
phy_chain_rx_polarity_flip_physical{55.0}=0x0
|
||||
## This polarity filp is due to the reverse RX connection in HW
|
||||
phy_chain_rx_polarity_flip_physical{56.0}=0x1
|
||||
|
||||
### FC14
|
||||
phy_chain_tx_lane_map_physical{57.0}=0x3210
|
||||
phy_chain_tx_polarity_flip_physical{57.0}=0x0
|
||||
phy_chain_tx_polarity_flip_physical{58.0}=0x0
|
||||
phy_chain_tx_polarity_flip_physical{59.0}=0x0
|
||||
phy_chain_tx_polarity_flip_physical{60.0}=0x0
|
||||
phy_chain_rx_lane_map_physical{57.0}=0x2301
|
||||
phy_chain_rx_polarity_flip_physical{57.0}=0x0
|
||||
phy_chain_rx_polarity_flip_physical{58.0}=0x0
|
||||
phy_chain_rx_polarity_flip_physical{59.0}=0x0
|
||||
phy_chain_rx_polarity_flip_physical{60.0}=0x0
|
||||
|
||||
### FC15
|
||||
phy_chain_tx_lane_map_physical{61.0}=0x3210
|
||||
phy_chain_tx_polarity_flip_physical{61.0}=0x0
|
||||
phy_chain_tx_polarity_flip_physical{62.0}=0x0
|
||||
phy_chain_tx_polarity_flip_physical{63.0}=0x0
|
||||
phy_chain_tx_polarity_flip_physical{64.0}=0x1
|
||||
phy_chain_rx_lane_map_physical{61.0}=0x2301
|
||||
phy_chain_rx_polarity_flip_physical{61.0}=0x1
|
||||
phy_chain_rx_polarity_flip_physical{62.0}=0x1
|
||||
phy_chain_rx_polarity_flip_physical{63.0}=0x0
|
||||
phy_chain_rx_polarity_flip_physical{64.0}=0x1
|
||||
|
||||
### FC16
|
||||
phy_chain_tx_lane_map_physical{65.0}=0x3210
|
||||
phy_chain_tx_polarity_flip_physical{65.0}=0x1
|
||||
phy_chain_tx_polarity_flip_physical{66.0}=0x1
|
||||
phy_chain_tx_polarity_flip_physical{67.0}=0x1
|
||||
phy_chain_tx_polarity_flip_physical{68.0}=0x1
|
||||
phy_chain_rx_lane_map_physical{65.0}=0x2301
|
||||
phy_chain_rx_polarity_flip_physical{65.0}=0x1
|
||||
phy_chain_rx_polarity_flip_physical{66.0}=0x1
|
||||
phy_chain_rx_polarity_flip_physical{67.0}=0x1
|
||||
phy_chain_rx_polarity_flip_physical{68.0}=0x1
|
||||
|
||||
### FC17
|
||||
phy_chain_tx_lane_map_physical{69.0}=0x3210
|
||||
phy_chain_tx_polarity_flip_physical{69.0}=0x1
|
||||
phy_chain_tx_polarity_flip_physical{70.0}=0x1
|
||||
phy_chain_tx_polarity_flip_physical{71.0}=0x1
|
||||
phy_chain_tx_polarity_flip_physical{72.0}=0x1
|
||||
phy_chain_rx_lane_map_physical{69.0}=0x2301
|
||||
phy_chain_rx_polarity_flip_physical{69.0}=0x1
|
||||
phy_chain_rx_polarity_flip_physical{70.0}=0x1
|
||||
phy_chain_rx_polarity_flip_physical{71.0}=0x1
|
||||
phy_chain_rx_polarity_flip_physical{72.0}=0x1
|
||||
|
||||
### FC18
|
||||
phy_chain_tx_lane_map_physical{73.0}=0x3210
|
||||
phy_chain_tx_polarity_flip_physical{73.0}=0x1
|
||||
phy_chain_tx_polarity_flip_physical{74.0}=0x1
|
||||
phy_chain_tx_polarity_flip_physical{75.0}=0x1
|
||||
phy_chain_tx_polarity_flip_physical{76.0}=0x1
|
||||
phy_chain_rx_lane_map_physical{73.0}=0x2301
|
||||
phy_chain_rx_polarity_flip_physical{73.0}=0x1
|
||||
phy_chain_rx_polarity_flip_physical{74.0}=0x1
|
||||
phy_chain_rx_polarity_flip_physical{75.0}=0x1
|
||||
phy_chain_rx_polarity_flip_physical{76.0}=0x1
|
||||
|
||||
### FC19
|
||||
phy_chain_tx_lane_map_physical{77.0}=0x0213
|
||||
phy_chain_tx_polarity_flip_physical{77.0}=0x0
|
||||
phy_chain_tx_polarity_flip_physical{78.0}=0x1
|
||||
phy_chain_tx_polarity_flip_physical{79.0}=0x1
|
||||
phy_chain_tx_polarity_flip_physical{80.0}=0x0
|
||||
phy_chain_rx_lane_map_physical{77.0}=0x0213
|
||||
phy_chain_rx_polarity_flip_physical{77.0}=0x0
|
||||
phy_chain_rx_polarity_flip_physical{78.0}=0x1
|
||||
phy_chain_rx_polarity_flip_physical{79.0}=0x1
|
||||
phy_chain_rx_polarity_flip_physical{80.0}=0x0
|
||||
|
||||
### MerlinCore
|
||||
#phy_chain_tx_polarity_flip_physical{81.0}=0x0
|
||||
#phy_chain_rx_polarity_flip_physical{81.0}=0x0
|
||||
|
||||
l2_mem_entries=40960
|
||||
l3_mem_entries=40960
|
||||
l3_alpm_enable=2
|
||||
use_all_splithorizon_groups=1
|
||||
|
||||
BIN
device/quanta/x86_64-quanta_ix8a_bwde-r0/custom_led.bin
Normal file
BIN
device/quanta/x86_64-quanta_ix8a_bwde-r0/custom_led.bin
Normal file
Binary file not shown.
1
device/quanta/x86_64-quanta_ix8a_bwde-r0/default_sku
Normal file
1
device/quanta/x86_64-quanta_ix8a_bwde-r0/default_sku
Normal file
@ -0,0 +1 @@
|
||||
Quanta-IX8A-BWDE-56X t1
|
||||
3
device/quanta/x86_64-quanta_ix8a_bwde-r0/installer.conf
Normal file
3
device/quanta/x86_64-quanta_ix8a_bwde-r0/installer.conf
Normal file
@ -0,0 +1,3 @@
|
||||
CONSOLE_PORT=0x3f8
|
||||
CONSOLE_DEV=0
|
||||
CONSOLE_SPEED=115200
|
||||
@ -0,0 +1,3 @@
|
||||
m0 load 0 0x3800 /usr/share/sonic/platform/custom_led.bin
|
||||
led start
|
||||
rcload /usr/share/sonic/platform/preemphasis-48x25_8x100.soc
|
||||
12
device/quanta/x86_64-quanta_ix8a_bwde-r0/plugins/eeprom.py
Normal file
12
device/quanta/x86_64-quanta_ix8a_bwde-r0/plugins/eeprom.py
Normal file
@ -0,0 +1,12 @@
|
||||
try:
|
||||
from sonic_eeprom import eeprom_tlvinfo
|
||||
except ImportError as e:
|
||||
raise ImportError(str(e) + "- required module not found")
|
||||
|
||||
|
||||
class board(eeprom_tlvinfo.TlvInfoDecoder):
|
||||
_TLV_INFO_MAX_LEN = 256
|
||||
|
||||
def __init__(self, name, path, cpld_root, ro):
|
||||
self.eeprom_path = "/sys/bus/i2c/devices/3-0054/eeprom"
|
||||
super(board, self).__init__(self.eeprom_path, 0, '', True)
|
||||
110
device/quanta/x86_64-quanta_ix8a_bwde-r0/plugins/fanutil.py
Normal file
110
device/quanta/x86_64-quanta_ix8a_bwde-r0/plugins/fanutil.py
Normal file
@ -0,0 +1,110 @@
|
||||
#
|
||||
# fanutil.py
|
||||
# Platform-specific Fan status interface for SONiC
|
||||
#
|
||||
|
||||
import logging
|
||||
import os.path
|
||||
|
||||
try:
|
||||
from sonic_fan.fan_base import FanBase
|
||||
except ImportError as e:
|
||||
raise ImportError (str(e) + "- required module not found")
|
||||
|
||||
class FanUtil(FanBase):
|
||||
"""Platform-specific FANutil class"""
|
||||
|
||||
SYS_FAN_NUM = 6
|
||||
NUM_FANS_PERTRAY = 2
|
||||
HWMON_PATH = '/sys/class/hwmon/hwmon2/'
|
||||
FAN_INDEX_START = 18
|
||||
|
||||
logger = logging.getLogger(__name__)
|
||||
|
||||
def __init__(self, log_level=logging.DEBUG):
|
||||
FanBase.__init__(self)
|
||||
self.num_fans = (self.SYS_FAN_NUM * self.NUM_FANS_PERTRAY)
|
||||
|
||||
# Get sysfs attribute
|
||||
def get_attr_value(self, attr_path):
|
||||
|
||||
retval = 'ERR'
|
||||
if (not os.path.isfile(attr_path)):
|
||||
return retval
|
||||
|
||||
try:
|
||||
with open(attr_path, 'r') as fd:
|
||||
retval = fd.read()
|
||||
except Exception:
|
||||
logging.error("Unable to open ", attr_path, " file !")
|
||||
|
||||
retval = retval.rstrip('\r\n')
|
||||
return retval
|
||||
|
||||
def check_fan_index(self, index):
|
||||
if index is None:
|
||||
return False
|
||||
|
||||
if index < 1 or index > self.num_fans:
|
||||
logging.error("Invalid Fan index:", index)
|
||||
return False
|
||||
|
||||
return True
|
||||
|
||||
def get_num_fans(self):
|
||||
return self.num_fans
|
||||
|
||||
def get_status(self, index):
|
||||
if self.check_fan_index(index) == False:
|
||||
return False
|
||||
|
||||
fantray_speed_file = 'fan' + str(self.FAN_INDEX_START+(index-1)) + '_input'
|
||||
fantray_speed = self.get_attr_value(self.HWMON_PATH + fantray_speed_file)
|
||||
|
||||
if fantray_speed == '0.0' :
|
||||
return False
|
||||
|
||||
return True
|
||||
|
||||
def get_presence(self, index):
|
||||
if self.check_fan_index(index) == False:
|
||||
return False
|
||||
|
||||
fantray_present_file = 'fan' + str(self.FAN_INDEX_START+(index-1)) + '_present'
|
||||
fantray_present = self.get_attr_value(self.HWMON_PATH + fantray_present_file)
|
||||
|
||||
if fantray_present == '1' :
|
||||
return True
|
||||
|
||||
return False
|
||||
|
||||
def get_direction(self, index):
|
||||
if self.check_fan_index(index) == False:
|
||||
return None
|
||||
|
||||
fantray_direction_file = 'fan' + str(self.FAN_INDEX_START+(index-1)) + '_direction'
|
||||
fantray_direction = self.get_attr_value(self.HWMON_PATH + fantray_direction_file)
|
||||
|
||||
"""
|
||||
1: FB 2: BF
|
||||
Since the fan is at rear of the switch, FB means Exhaust; BF means Intake
|
||||
"""
|
||||
if fantray_direction == '2':
|
||||
return "INTAKE"
|
||||
else:
|
||||
return "EXHAUST"
|
||||
|
||||
def get_speed(self, index):
|
||||
if self.check_fan_index(index) == False:
|
||||
return 0
|
||||
|
||||
fantray_speed_file = 'fan' + str(self.FAN_INDEX_START+(index-1)) + '_input'
|
||||
fantray_speed = self.get_attr_value(self.HWMON_PATH + fantray_speed_file)
|
||||
|
||||
return int(float(fantray_speed))
|
||||
|
||||
|
||||
def set_speed(self, val):
|
||||
logging.error("Not allowed to set fan speed!")
|
||||
|
||||
return False
|
||||
250
device/quanta/x86_64-quanta_ix8a_bwde-r0/plugins/psuutil.py
Normal file
250
device/quanta/x86_64-quanta_ix8a_bwde-r0/plugins/psuutil.py
Normal file
@ -0,0 +1,250 @@
|
||||
#
|
||||
# psuutil.py
|
||||
# Platform-specific PSU status interface for SONiC
|
||||
#
|
||||
|
||||
import logging
|
||||
import os.path
|
||||
|
||||
try:
|
||||
from sonic_psu.psu_base import PsuBase
|
||||
except ImportError as e:
|
||||
raise ImportError (str(e) + "- required module not found")
|
||||
|
||||
class PsuUtil(PsuBase):
|
||||
"""Platform-specific PSUutil class"""
|
||||
|
||||
HWMON_PATH = '/sys/class/hwmon/hwmon1/'
|
||||
PSU1_PREFIX = 'power114_'
|
||||
PSU2_PREFIX = 'power126_'
|
||||
MAX_PSUS = 2
|
||||
def __init__(self):
|
||||
PsuBase.__init__(self)
|
||||
|
||||
# Get sysfs attribute
|
||||
def get_attr_value(self, attr_path):
|
||||
|
||||
retval = 'ERR'
|
||||
if (not os.path.isfile(attr_path)):
|
||||
return retval
|
||||
|
||||
try:
|
||||
with open(attr_path, 'r') as fd:
|
||||
retval = fd.read()
|
||||
except Exception:
|
||||
logging.error("Unable to open ", attr_path, " file !")
|
||||
|
||||
retval = retval.rstrip('\r\n')
|
||||
return retval
|
||||
|
||||
def get_attr_filename(self, index, attr):
|
||||
if (index == 1):
|
||||
attr_file = self.PSU1_PREFIX + attr
|
||||
elif (index == 2):
|
||||
attr_file = self.PSU2_PREFIX + attr
|
||||
else:
|
||||
logging.error("Invalid PSU number:", index)
|
||||
return ''
|
||||
|
||||
return attr_file
|
||||
|
||||
def get_num_psus(self):
|
||||
"""
|
||||
Retrieves the number of PSUs available on the device
|
||||
:return: An integer, the number of PSUs available on the device
|
||||
"""
|
||||
|
||||
return self.MAX_PSUS
|
||||
|
||||
def get_psu_status(self, index):
|
||||
"""
|
||||
Retrieves the oprational status of power supply unit (PSU) defined
|
||||
by index <index>
|
||||
:param index: An integer, index of the PSU of which to query status
|
||||
:return: Boolean, True if PSU is operating properly, False if PSU is\
|
||||
faulty
|
||||
"""
|
||||
status = False
|
||||
|
||||
attr_filename = self.get_attr_filename(index, 'input')
|
||||
if attr_filename == '':
|
||||
return status
|
||||
|
||||
attr_path = self.HWMON_PATH + attr_filename
|
||||
attr_value = self.get_attr_value(attr_path)
|
||||
|
||||
if (attr_value != 'ERR'):
|
||||
attr_value = float(attr_value)
|
||||
|
||||
# Check PSU status
|
||||
if (attr_value != 0.0):
|
||||
status = True
|
||||
|
||||
return status
|
||||
|
||||
def get_psu_presence(self, index):
|
||||
"""
|
||||
Retrieves the presence status of power supply unit (PSU) defined
|
||||
by index <index>
|
||||
:param index: An integer, index of the PSU of which to query status
|
||||
:return: Boolean, True if PSU is plugged, False if not
|
||||
"""
|
||||
status = False
|
||||
|
||||
attr_filename = self.get_attr_filename(index, 'present')
|
||||
if attr_filename == '':
|
||||
return status
|
||||
|
||||
attr_path = self.HWMON_PATH + attr_filename
|
||||
attr_value = self.get_attr_value(attr_path)
|
||||
|
||||
if (attr_value != 'ERR'):
|
||||
attr_value = int(attr_value, 16)
|
||||
# Check PSU status
|
||||
if (attr_value == 1):
|
||||
status = True
|
||||
return status
|
||||
|
||||
def get_powergood_status(self, index):
|
||||
status = False
|
||||
|
||||
attr_filename = self.get_attr_filename(index, 'input')
|
||||
if attr_filename == '':
|
||||
return status
|
||||
|
||||
attr_path = self.HWMON_PATH + attr_filename
|
||||
attr_value = self.get_attr_value(attr_path)
|
||||
|
||||
if (attr_value != 'ERR'):
|
||||
attr_value = float(attr_value)
|
||||
|
||||
# Check PSU status
|
||||
if (attr_value != 0.0):
|
||||
status = True
|
||||
|
||||
return status
|
||||
|
||||
def get_model(self, index):
|
||||
attr_filename = self.get_attr_filename(index, 'model')
|
||||
if attr_filename == '':
|
||||
return None
|
||||
|
||||
attr_path = self.HWMON_PATH + attr_filename
|
||||
attr_value = self.get_attr_value(attr_path)
|
||||
|
||||
if (attr_value != 'ERR'):
|
||||
return attr_value.rstrip()
|
||||
|
||||
def get_mfr_id(self, index):
|
||||
attr_filename = self.get_attr_filename(index, 'mfrid')
|
||||
if attr_filename == '':
|
||||
return None
|
||||
|
||||
attr_path = self.HWMON_PATH + attr_filename
|
||||
attr_value = self.get_attr_value(attr_path)
|
||||
|
||||
if (attr_value != 'ERR'):
|
||||
return attr_value.rstrip()
|
||||
|
||||
def get_serial(self, index):
|
||||
attr_filename = self.get_attr_filename(index, 'sn')
|
||||
if attr_filename == '':
|
||||
return None
|
||||
|
||||
attr_path = self.HWMON_PATH + attr_filename
|
||||
attr_value = self.get_attr_value(attr_path)
|
||||
|
||||
if (attr_value != 'ERR'):
|
||||
return attr_value.rstrip()
|
||||
|
||||
def get_direction(self, index):
|
||||
if (index == 1):
|
||||
direction_file = 'fan120_direction'
|
||||
elif (index == 2):
|
||||
direction_file = 'fan132_direction'
|
||||
else:
|
||||
logging.error("Invalid PSU number:", index)
|
||||
return None
|
||||
|
||||
direction = self.get_attr_value(self.HWMON_PATH + direction_file)
|
||||
direction = direction.rstrip()
|
||||
|
||||
"""
|
||||
1: FB 2: BF
|
||||
Since the fan is at rear of the switch, FB means Exhaust; BF means Intake
|
||||
"""
|
||||
if direction == '"\"':
|
||||
return "INTAKE"
|
||||
else:
|
||||
return "EXHAUST"
|
||||
|
||||
def get_output_voltage(self, index):
|
||||
if (index == 1):
|
||||
attr_file = 'in129_input'
|
||||
elif (index == 2):
|
||||
attr_file = 'in124_input'
|
||||
else:
|
||||
logging.error("Invalid PSU number:", index)
|
||||
return 0.0
|
||||
|
||||
voltage = self.get_attr_value(self.HWMON_PATH + attr_file)
|
||||
voltage = voltage.rstrip()
|
||||
|
||||
if (voltage != 'ERR'):
|
||||
voltage, dummy = voltage.split('.', 1)
|
||||
else:
|
||||
return 0.0
|
||||
|
||||
return float(voltage)/1000
|
||||
|
||||
def get_output_current(self, index):
|
||||
if (index == 1):
|
||||
attr_file = 'curr130_input'
|
||||
elif (index == 2):
|
||||
attr_file = 'curr115_input'
|
||||
else:
|
||||
logging.error("Invalid PSU number:", index)
|
||||
return 0.0
|
||||
|
||||
current = self.get_attr_value(self.HWMON_PATH + attr_file)
|
||||
current = current.rstrip()
|
||||
|
||||
if (current != 'ERR'):
|
||||
current, dummy = current.split('.',1)
|
||||
else:
|
||||
return 0.0
|
||||
|
||||
return float(current)/1000
|
||||
|
||||
def get_output_power(self, index):
|
||||
attr_filename = self.get_attr_filename(index, 'input')
|
||||
if attr_filename == '':
|
||||
return 0.0
|
||||
|
||||
attr_path = self.HWMON_PATH + attr_filename
|
||||
attr_value = self.get_attr_value(attr_path)
|
||||
|
||||
if (attr_value != 'ERR'):
|
||||
attr_value = float(attr_value)
|
||||
else:
|
||||
return 0.0
|
||||
|
||||
return float(attr_value/1000)
|
||||
|
||||
def get_fan_rpm(self, index, fan_idx):
|
||||
if (index == 1):
|
||||
rpm_file = 'fan120_input'
|
||||
elif (index == 2):
|
||||
rpm_file = 'fan132_input'
|
||||
else:
|
||||
logging.error("Invalid PSU number:", index)
|
||||
return 0
|
||||
|
||||
rpm = self.get_attr_value(self.HWMON_PATH + rpm_file)
|
||||
rpm = rpm.rstrip()
|
||||
if (rpm != 'ERR'):
|
||||
rpm = float(rpm)
|
||||
else:
|
||||
return 0
|
||||
|
||||
return int(rpm)
|
||||
213
device/quanta/x86_64-quanta_ix8a_bwde-r0/plugins/sfputil.py
Normal file
213
device/quanta/x86_64-quanta_ix8a_bwde-r0/plugins/sfputil.py
Normal file
@ -0,0 +1,213 @@
|
||||
# sfputil.py
|
||||
#
|
||||
# Platform-specific SFP transceiver interface for SONiC
|
||||
#
|
||||
|
||||
try:
|
||||
import time
|
||||
from sonic_sfp.sfputilbase import SfpUtilBase
|
||||
except ImportError as e:
|
||||
raise ImportError("%s - required module not found" % str(e))
|
||||
|
||||
|
||||
class SfpUtil(SfpUtilBase):
|
||||
"""Platform-specific SfpUtil class"""
|
||||
|
||||
PORT_START = 1
|
||||
PORT_END = 56
|
||||
PORTS_IN_BLOCK = 56
|
||||
QSFP_PORT_START = 49
|
||||
QSFP_PORT_END = 56
|
||||
|
||||
_port_to_eeprom_mapping = {}
|
||||
_port_to_i2c_mapping = {
|
||||
1 : 13,
|
||||
2 : 14,
|
||||
3 : 15,
|
||||
4 : 16,
|
||||
5 : 17,
|
||||
6 : 18,
|
||||
7 : 19,
|
||||
8 : 20,
|
||||
9 : 21,
|
||||
10 : 22,
|
||||
11 : 23,
|
||||
12 : 24,
|
||||
13 : 25,
|
||||
14 : 26,
|
||||
15 : 27,
|
||||
16 : 28,
|
||||
17 : 29,
|
||||
18 : 30,
|
||||
19 : 31,
|
||||
20 : 32,
|
||||
21 : 33,
|
||||
22 : 34,
|
||||
23 : 35,
|
||||
24 : 36,
|
||||
25 : 37,
|
||||
26 : 38,
|
||||
27 : 39,
|
||||
28 : 40,
|
||||
29 : 41,
|
||||
30 : 42,
|
||||
31 : 43,
|
||||
32 : 44,
|
||||
33 : 45,
|
||||
34 : 46,
|
||||
35 : 47,
|
||||
36 : 48,
|
||||
37 : 49,
|
||||
38 : 50,
|
||||
39 : 51,
|
||||
40 : 52,
|
||||
41 : 53,
|
||||
42 : 54,
|
||||
43 : 55,
|
||||
44 : 56,
|
||||
45 : 57,
|
||||
46 : 58,
|
||||
47 : 59,
|
||||
48 : 60,
|
||||
49 : 61,#QSFP49
|
||||
50 : 62,#QSFP50
|
||||
51 : 63,#QSFP51
|
||||
52 : 64,#QSFP52
|
||||
53 : 65,#QSFP53
|
||||
54 : 66,#QSFP54
|
||||
55 : 67,#QSFP55
|
||||
56 : 68,#QSFP56
|
||||
}
|
||||
|
||||
@property
|
||||
def port_start(self):
|
||||
return self.PORT_START
|
||||
|
||||
@property
|
||||
def port_end(self):
|
||||
return self.PORT_END
|
||||
|
||||
@property
|
||||
def qsfp_port_start(self):
|
||||
return self.QSFP_PORT_START
|
||||
|
||||
@property
|
||||
def qsfp_port_end(self):
|
||||
return self.QSFP_PORT_END
|
||||
|
||||
@property
|
||||
def qsfp_ports(self):
|
||||
return range(self.QSFP_PORT_START, self.PORTS_IN_BLOCK + 1)
|
||||
|
||||
@property
|
||||
def port_to_eeprom_mapping(self):
|
||||
return self._port_to_eeprom_mapping
|
||||
|
||||
def __init__(self):
|
||||
eeprom_path = '/sys/bus/i2c/devices/{0}-0050/eeprom'
|
||||
for x in range(self.port_start, self.port_end+1):
|
||||
self.port_to_eeprom_mapping[x] = eeprom_path.format(self._port_to_i2c_mapping[x])
|
||||
SfpUtilBase.__init__(self)
|
||||
|
||||
def get_presence(self, port_num):
|
||||
# Check for invalid port_num
|
||||
if port_num < self.port_start or port_num > self.port_end:
|
||||
return False
|
||||
|
||||
try:
|
||||
if port_num < self.qsfp_port_start:
|
||||
reg_file = open("/sys/class/cpld-sfp28/port-"+str(port_num)+"/pre_n")
|
||||
else:
|
||||
reg_file = open("/sys/class/gpio/gpio"+str((port_num-self.qsfp_port_start)*4+34)+"/value")
|
||||
except IOError as e:
|
||||
print("Error: unable to open file: %s" % str(e))
|
||||
return False
|
||||
|
||||
reg_value = reg_file.readline().rstrip()
|
||||
if port_num < self.qsfp_port_start:
|
||||
if reg_value == '1':
|
||||
return True
|
||||
else:
|
||||
if reg_value == '0':
|
||||
return True
|
||||
|
||||
return False
|
||||
|
||||
def get_low_power_mode(self, port_num):
|
||||
# Check for invalid port_num
|
||||
if port_num < self.qsfp_port_start or port_num > self.qsfp_port_end:
|
||||
return False
|
||||
|
||||
try:
|
||||
reg_file = open("/sys/class/gpio/gpio"+str((port_num-self.qsfp_port_start)*4+35)+"/value")
|
||||
except IOError as e:
|
||||
print("Error: unable to open file: %s" % str(e))
|
||||
return False
|
||||
|
||||
reg_value = int(reg_file.readline().rstrip())
|
||||
|
||||
if reg_value == 0:
|
||||
return False
|
||||
|
||||
return True
|
||||
|
||||
def set_low_power_mode(self, port_num, lpmode):
|
||||
# Check for invalid port_num
|
||||
if port_num < self.qsfp_port_start or port_num > self.qsfp_port_end:
|
||||
return False
|
||||
|
||||
try:
|
||||
reg_file = open("/sys/class/gpio/gpio"+str((port_num-self.qsfp_port_start)*4+35)+"/value", "r+")
|
||||
except IOError as e:
|
||||
print("Error: unable to open file: %s" % str(e))
|
||||
return False
|
||||
|
||||
# LPMode is active high; set or clear the bit accordingly
|
||||
if lpmode is True:
|
||||
reg_value = 1
|
||||
else:
|
||||
reg_value = 0
|
||||
|
||||
reg_file.write(hex(reg_value))
|
||||
reg_file.close()
|
||||
|
||||
return True
|
||||
|
||||
def reset(self, port_num):
|
||||
# Check for invalid port_num
|
||||
if port_num < self.qsfp_port_start or port_num > self.port_end:
|
||||
return False
|
||||
|
||||
try:
|
||||
reg_file = open("/sys/class/gpio/gpio"+str((port_num-self.qsfp_port_start)*4+32)+"/value", "r+")
|
||||
except IOError as e:
|
||||
print("Error: unable to open file: %s" % str(e))
|
||||
return False
|
||||
|
||||
reg_value = 0
|
||||
reg_file.write(hex(reg_value))
|
||||
reg_file.close()
|
||||
|
||||
# Sleep 2 second to allow it to settle
|
||||
time.sleep(2)
|
||||
|
||||
# Flip the value back write back to the register to take port out of reset
|
||||
try:
|
||||
reg_file = open("/sys/class/gpio/gpio"+str((port_num-self.qsfp_port_start)*4+32)+"/value", "r+")
|
||||
except IOError as e:
|
||||
print("Error: unable to open file: %s" % str(e))
|
||||
return False
|
||||
|
||||
reg_value = 1
|
||||
reg_file.write(hex(reg_value))
|
||||
reg_file.close()
|
||||
|
||||
return True
|
||||
|
||||
def get_transceiver_change_event(self):
|
||||
"""
|
||||
TODO: This function need to be implemented
|
||||
when decide to support monitoring SFP(Xcvrd)
|
||||
on this platform.
|
||||
"""
|
||||
raise NotImplementedError
|
||||
@ -0,0 +1,3 @@
|
||||
{
|
||||
"skip_ledd": true
|
||||
}
|
||||
@ -0,0 +1,349 @@
|
||||
# 48x25G 8x100G pre-emphasis setting for Quanta IX8A-BWDE
|
||||
echo "Set tx pre-emphasis and idriver values"
|
||||
linkscan off
|
||||
|
||||
# Start of 48x25G
|
||||
|
||||
phy raw c45 0x81 0x1 0xffde 0
|
||||
phy raw c45 0x81 0x1 0xd130 0x32
|
||||
phy raw c45 0x81 0x1 0xd131 0x306
|
||||
phy raw c45 0x81 0x1 0xd134 0x1
|
||||
phy raw c45 0x81 0x1 0xffde 1
|
||||
phy raw c45 0x81 0x1 0xd130 0x32
|
||||
phy raw c45 0x81 0x1 0xd131 0x306
|
||||
phy raw c45 0x81 0x1 0xd134 0x1
|
||||
phy raw c45 0x81 0x1 0xffde 2
|
||||
phy raw c45 0x81 0x1 0xd130 0x32
|
||||
phy raw c45 0x81 0x1 0xd131 0x306
|
||||
phy raw c45 0x81 0x1 0xd134 0x1
|
||||
phy raw c45 0x81 0x1 0xffde 3
|
||||
phy raw c45 0x81 0x1 0xd130 0x32
|
||||
phy raw c45 0x81 0x1 0xd131 0x306
|
||||
phy raw c45 0x81 0x1 0xd134 0x1
|
||||
|
||||
phy raw c45 0x85 0x1 0xffde 0
|
||||
phy raw c45 0x85 0x1 0xd130 0x32
|
||||
phy raw c45 0x85 0x1 0xd131 0x306
|
||||
phy raw c45 0x85 0x1 0xd134 0x1
|
||||
phy raw c45 0x85 0x1 0xffde 1
|
||||
phy raw c45 0x85 0x1 0xd130 0x32
|
||||
phy raw c45 0x85 0x1 0xd131 0x306
|
||||
phy raw c45 0x85 0x1 0xd134 0x1
|
||||
phy raw c45 0x85 0x1 0xffde 2
|
||||
phy raw c45 0x85 0x1 0xd130 0x32
|
||||
phy raw c45 0x85 0x1 0xd131 0x306
|
||||
phy raw c45 0x85 0x1 0xd134 0x1
|
||||
phy raw c45 0x85 0x1 0xffde 3
|
||||
phy raw c45 0x85 0x1 0xd130 0x32
|
||||
phy raw c45 0x85 0x1 0xd131 0x306
|
||||
phy raw c45 0x85 0x1 0xd134 0x1
|
||||
|
||||
phy raw c45 0x89 0x1 0xffde 0
|
||||
phy raw c45 0x89 0x1 0xd130 0x32
|
||||
phy raw c45 0x89 0x1 0xd131 0x306
|
||||
phy raw c45 0x89 0x1 0xd134 0x1
|
||||
phy raw c45 0x89 0x1 0xffde 1
|
||||
phy raw c45 0x89 0x1 0xd130 0x32
|
||||
phy raw c45 0x89 0x1 0xd131 0x306
|
||||
phy raw c45 0x89 0x1 0xd134 0x1
|
||||
phy raw c45 0x89 0x1 0xffde 2
|
||||
phy raw c45 0x89 0x1 0xd130 0x32
|
||||
phy raw c45 0x89 0x1 0xd131 0x306
|
||||
phy raw c45 0x89 0x1 0xd134 0x1
|
||||
phy raw c45 0x89 0x1 0xffde 3
|
||||
phy raw c45 0x89 0x1 0xd130 0x32
|
||||
phy raw c45 0x89 0x1 0xd131 0x306
|
||||
phy raw c45 0x89 0x1 0xd134 0x1
|
||||
|
||||
phy raw c45 0x8d 0x1 0xffde 0
|
||||
phy raw c45 0x8d 0x1 0xd130 0x32
|
||||
phy raw c45 0x8d 0x1 0xd131 0x306
|
||||
phy raw c45 0x8d 0x1 0xd134 0x1
|
||||
phy raw c45 0x8d 0x1 0xffde 1
|
||||
phy raw c45 0x8d 0x1 0xd130 0x32
|
||||
phy raw c45 0x8d 0x1 0xd131 0x306
|
||||
phy raw c45 0x8d 0x1 0xd134 0x1
|
||||
phy raw c45 0x8d 0x1 0xffde 2
|
||||
phy raw c45 0x8d 0x1 0xd130 0x32
|
||||
phy raw c45 0x8d 0x1 0xd131 0x306
|
||||
phy raw c45 0x8d 0x1 0xd134 0x1
|
||||
phy raw c45 0x8d 0x1 0xffde 3
|
||||
phy raw c45 0x8d 0x1 0xd130 0x32
|
||||
phy raw c45 0x8d 0x1 0xd131 0x306
|
||||
phy raw c45 0x8d 0x1 0xd134 0x1
|
||||
|
||||
phy raw c45 0x91 0x1 0xffde 0
|
||||
phy raw c45 0x91 0x1 0xd130 0x32
|
||||
phy raw c45 0x91 0x1 0xd131 0x306
|
||||
phy raw c45 0x91 0x1 0xd134 0x1
|
||||
phy raw c45 0x91 0x1 0xffde 1
|
||||
phy raw c45 0x91 0x1 0xd130 0x32
|
||||
phy raw c45 0x91 0x1 0xd131 0x306
|
||||
phy raw c45 0x91 0x1 0xd134 0x1
|
||||
phy raw c45 0x91 0x1 0xffde 2
|
||||
phy raw c45 0x91 0x1 0xd130 0x32
|
||||
phy raw c45 0x91 0x1 0xd131 0x306
|
||||
phy raw c45 0x91 0x1 0xd134 0x1
|
||||
phy raw c45 0x91 0x1 0xffde 3
|
||||
phy raw c45 0x91 0x1 0xd130 0x32
|
||||
phy raw c45 0x91 0x1 0xd131 0x306
|
||||
phy raw c45 0x91 0x1 0xd134 0x1
|
||||
|
||||
phy raw c45 0xa1 0x1 0xffde 0
|
||||
phy raw c45 0xa1 0x1 0xd130 0x32
|
||||
phy raw c45 0xa1 0x1 0xd131 0x306
|
||||
phy raw c45 0xa1 0x1 0xd134 0x1
|
||||
phy raw c45 0xa1 0x1 0xffde 1
|
||||
phy raw c45 0xa1 0x1 0xd130 0x32
|
||||
phy raw c45 0xa1 0x1 0xd131 0x306
|
||||
phy raw c45 0xa1 0x1 0xd134 0x1
|
||||
phy raw c45 0xa1 0x1 0xffde 2
|
||||
phy raw c45 0xa1 0x1 0xd130 0x32
|
||||
phy raw c45 0xa1 0x1 0xd131 0x306
|
||||
phy raw c45 0xa1 0x1 0xd134 0x1
|
||||
phy raw c45 0xa1 0x1 0xffde 3
|
||||
phy raw c45 0xa1 0x1 0xd130 0x32
|
||||
phy raw c45 0xa1 0x1 0xd131 0x306
|
||||
phy raw c45 0xa1 0x1 0xd134 0x1
|
||||
|
||||
phy raw c45 0xd1 0x1 0xffde 0
|
||||
phy raw c45 0xd1 0x1 0xd130 0x32
|
||||
phy raw c45 0xd1 0x1 0xd131 0x306
|
||||
phy raw c45 0xd1 0x1 0xd134 0x1
|
||||
phy raw c45 0xd1 0x1 0xffde 1
|
||||
phy raw c45 0xd1 0x1 0xd130 0x32
|
||||
phy raw c45 0xd1 0x1 0xd131 0x306
|
||||
phy raw c45 0xd1 0x1 0xd134 0x1
|
||||
phy raw c45 0xd1 0x1 0xffde 2
|
||||
phy raw c45 0xd1 0x1 0xd130 0x32
|
||||
phy raw c45 0xd1 0x1 0xd131 0x306
|
||||
phy raw c45 0xd1 0x1 0xd134 0x1
|
||||
phy raw c45 0xd1 0x1 0xffde 3
|
||||
phy raw c45 0xd1 0x1 0xd130 0x32
|
||||
phy raw c45 0xd1 0x1 0xd131 0x306
|
||||
phy raw c45 0xd1 0x1 0xd134 0x1
|
||||
|
||||
phy raw c45 0xe1 0x1 0xffde 0
|
||||
phy raw c45 0xe1 0x1 0xd130 0x32
|
||||
phy raw c45 0xe1 0x1 0xd131 0x306
|
||||
phy raw c45 0xe1 0x1 0xd134 0x1
|
||||
phy raw c45 0xe1 0x1 0xffde 1
|
||||
phy raw c45 0xe1 0x1 0xd130 0x32
|
||||
phy raw c45 0xe1 0x1 0xd131 0x306
|
||||
phy raw c45 0xe1 0x1 0xd134 0x1
|
||||
phy raw c45 0xe1 0x1 0xffde 2
|
||||
phy raw c45 0xe1 0x1 0xd130 0x32
|
||||
phy raw c45 0xe1 0x1 0xd131 0x306
|
||||
phy raw c45 0xe1 0x1 0xd134 0x1
|
||||
phy raw c45 0xe1 0x1 0xffde 3
|
||||
phy raw c45 0xe1 0x1 0xd130 0x32
|
||||
phy raw c45 0xe1 0x1 0xd131 0x306
|
||||
phy raw c45 0xe1 0x1 0xd134 0x1
|
||||
|
||||
phy raw c45 0xe5 0x1 0xffde 0
|
||||
phy raw c45 0xe5 0x1 0xd130 0x32
|
||||
phy raw c45 0xe5 0x1 0xd131 0x306
|
||||
phy raw c45 0xe5 0x1 0xd134 0x1
|
||||
phy raw c45 0xe5 0x1 0xffde 1
|
||||
phy raw c45 0xe5 0x1 0xd130 0x32
|
||||
phy raw c45 0xe5 0x1 0xd131 0x306
|
||||
phy raw c45 0xe5 0x1 0xd134 0x1
|
||||
phy raw c45 0xe5 0x1 0xffde 2
|
||||
phy raw c45 0xe5 0x1 0xd130 0x32
|
||||
phy raw c45 0xe5 0x1 0xd131 0x306
|
||||
phy raw c45 0xe5 0x1 0xd134 0x1
|
||||
phy raw c45 0xe5 0x1 0xffde 3
|
||||
phy raw c45 0xe5 0x1 0xd130 0x32
|
||||
phy raw c45 0xe5 0x1 0xd131 0x306
|
||||
phy raw c45 0xe5 0x1 0xd134 0x1
|
||||
|
||||
phy raw c45 0xe9 0x1 0xffde 0
|
||||
phy raw c45 0xe9 0x1 0xd130 0x32
|
||||
phy raw c45 0xe9 0x1 0xd131 0x306
|
||||
phy raw c45 0xe9 0x1 0xd134 0x1
|
||||
phy raw c45 0xe9 0x1 0xffde 1
|
||||
phy raw c45 0xe9 0x1 0xd130 0x32
|
||||
phy raw c45 0xe9 0x1 0xd131 0x306
|
||||
phy raw c45 0xe9 0x1 0xd134 0x1
|
||||
phy raw c45 0xe9 0x1 0xffde 2
|
||||
phy raw c45 0xe9 0x1 0xd130 0x32
|
||||
phy raw c45 0xe9 0x1 0xd131 0x306
|
||||
phy raw c45 0xe9 0x1 0xd134 0x1
|
||||
phy raw c45 0xe9 0x1 0xffde 3
|
||||
phy raw c45 0xe9 0x1 0xd130 0x32
|
||||
phy raw c45 0xe9 0x1 0xd131 0x306
|
||||
phy raw c45 0xe9 0x1 0xd134 0x1
|
||||
|
||||
phy raw c45 0xed 0x1 0xffde 0
|
||||
phy raw c45 0xed 0x1 0xd130 0x32
|
||||
phy raw c45 0xed 0x1 0xd131 0x306
|
||||
phy raw c45 0xed 0x1 0xd134 0x1
|
||||
phy raw c45 0xed 0x1 0xffde 1
|
||||
phy raw c45 0xed 0x1 0xd130 0x32
|
||||
phy raw c45 0xed 0x1 0xd131 0x306
|
||||
phy raw c45 0xed 0x1 0xd134 0x1
|
||||
phy raw c45 0xed 0x1 0xffde 2
|
||||
phy raw c45 0xed 0x1 0xd130 0x32
|
||||
phy raw c45 0xed 0x1 0xd131 0x306
|
||||
phy raw c45 0xed 0x1 0xd134 0x1
|
||||
phy raw c45 0xed 0x1 0xffde 3
|
||||
phy raw c45 0xed 0x1 0xd130 0x32
|
||||
phy raw c45 0xed 0x1 0xd131 0x306
|
||||
phy raw c45 0xed 0x1 0xd134 0x1
|
||||
|
||||
phy raw c45 0xf1 0x1 0xffde 0
|
||||
phy raw c45 0xf1 0x1 0xd130 0x32
|
||||
phy raw c45 0xf1 0x1 0xd131 0x306
|
||||
phy raw c45 0xf1 0x1 0xd134 0x1
|
||||
phy raw c45 0xf1 0x1 0xffde 1
|
||||
phy raw c45 0xf1 0x1 0xd130 0x32
|
||||
phy raw c45 0xf1 0x1 0xd131 0x306
|
||||
phy raw c45 0xf1 0x1 0xd134 0x1
|
||||
phy raw c45 0xf1 0x1 0xffde 2
|
||||
phy raw c45 0xf1 0x1 0xd130 0x32
|
||||
phy raw c45 0xf1 0x1 0xd131 0x306
|
||||
phy raw c45 0xf1 0x1 0xd134 0x1
|
||||
phy raw c45 0xf1 0x1 0xffde 3
|
||||
phy raw c45 0xf1 0x1 0xd130 0x32
|
||||
phy raw c45 0xf1 0x1 0xd131 0x306
|
||||
phy raw c45 0xf1 0x1 0xd134 0x1
|
||||
|
||||
# Start of 8x100G
|
||||
|
||||
phy raw c45 0xc1 0x1 0xffde 0
|
||||
phy raw c45 0xc1 0x1 0xd130 0x50
|
||||
phy raw c45 0xc1 0x1 0xd131 0xa0a
|
||||
phy raw c45 0xc1 0x1 0xd134 0x1
|
||||
phy raw c45 0xc1 0x1 0xffde 1
|
||||
phy raw c45 0xc1 0x1 0xd130 0x50
|
||||
phy raw c45 0xc1 0x1 0xd131 0xa0a
|
||||
phy raw c45 0xc1 0x1 0xd134 0x1
|
||||
phy raw c45 0xc1 0x1 0xffde 2
|
||||
phy raw c45 0xc1 0x1 0xd130 0x50
|
||||
phy raw c45 0xc1 0x1 0xd131 0xa0a
|
||||
phy raw c45 0xc1 0x1 0xd134 0x1
|
||||
phy raw c45 0xc1 0x1 0xffde 3
|
||||
phy raw c45 0xc1 0x1 0xd130 0x50
|
||||
phy raw c45 0xc1 0x1 0xd131 0xa0a
|
||||
phy raw c45 0xc1 0x1 0xd134 0x1
|
||||
|
||||
phy raw c45 0xc5 0x1 0xffde 0
|
||||
phy raw c45 0xc5 0x1 0xd130 0x50
|
||||
phy raw c45 0xc5 0x1 0xd131 0xa0a
|
||||
phy raw c45 0xc5 0x1 0xd134 0x1
|
||||
phy raw c45 0xc5 0x1 0xffde 1
|
||||
phy raw c45 0xc5 0x1 0xd130 0x50
|
||||
phy raw c45 0xc5 0x1 0xd131 0xa0a
|
||||
phy raw c45 0xc5 0x1 0xd134 0x1
|
||||
phy raw c45 0xc5 0x1 0xffde 2
|
||||
phy raw c45 0xc5 0x1 0xd130 0x50
|
||||
phy raw c45 0xc5 0x1 0xd131 0xa0a
|
||||
phy raw c45 0xc5 0x1 0xd134 0x1
|
||||
phy raw c45 0xc5 0x1 0xffde 3
|
||||
phy raw c45 0xc5 0x1 0xd130 0x50
|
||||
phy raw c45 0xc5 0x1 0xd131 0xa0a
|
||||
phy raw c45 0xc5 0x1 0xd134 0x1
|
||||
|
||||
phy raw c45 0xc9 0x1 0xffde 0
|
||||
phy raw c45 0xc9 0x1 0xd130 0x50
|
||||
phy raw c45 0xc9 0x1 0xd131 0xa0a
|
||||
phy raw c45 0xc9 0x1 0xd134 0x1
|
||||
phy raw c45 0xc9 0x1 0xffde 1
|
||||
phy raw c45 0xc9 0x1 0xd130 0x50
|
||||
phy raw c45 0xc9 0x1 0xd131 0xa0a
|
||||
phy raw c45 0xc9 0x1 0xd134 0x1
|
||||
phy raw c45 0xc9 0x1 0xffde 2
|
||||
phy raw c45 0xc9 0x1 0xd130 0x50
|
||||
phy raw c45 0xc9 0x1 0xd131 0xa0a
|
||||
phy raw c45 0xc9 0x1 0xd134 0x1
|
||||
phy raw c45 0xc9 0x1 0xffde 3
|
||||
phy raw c45 0xc9 0x1 0xd130 0x50
|
||||
phy raw c45 0xc9 0x1 0xd131 0xa0a
|
||||
phy raw c45 0xc9 0x1 0xd134 0x1
|
||||
|
||||
phy raw c45 0xcd 0x1 0xffde 0
|
||||
phy raw c45 0xcd 0x1 0xd130 0x50
|
||||
phy raw c45 0xcd 0x1 0xd131 0xa0a
|
||||
phy raw c45 0xcd 0x1 0xd134 0x1
|
||||
phy raw c45 0xcd 0x1 0xffde 1
|
||||
phy raw c45 0xcd 0x1 0xd130 0x50
|
||||
phy raw c45 0xcd 0x1 0xd131 0xa0a
|
||||
phy raw c45 0xcd 0x1 0xd134 0x1
|
||||
phy raw c45 0xcd 0x1 0xffde 2
|
||||
phy raw c45 0xcd 0x1 0xd130 0x50
|
||||
phy raw c45 0xcd 0x1 0xd131 0xa0a
|
||||
phy raw c45 0xcd 0x1 0xd134 0x1
|
||||
phy raw c45 0xcd 0x1 0xffde 3
|
||||
phy raw c45 0xcd 0x1 0xd130 0x50
|
||||
phy raw c45 0xcd 0x1 0xd131 0xa0a
|
||||
phy raw c45 0xcd 0x1 0xd134 0x1
|
||||
|
||||
phy raw c45 0xad 0x1 0xffde 0
|
||||
phy raw c45 0xad 0x1 0xd130 0x50
|
||||
phy raw c45 0xad 0x1 0xd131 0xa0a
|
||||
phy raw c45 0xad 0x1 0xd134 0x1
|
||||
phy raw c45 0xad 0x1 0xffde 1
|
||||
phy raw c45 0xad 0x1 0xd130 0x50
|
||||
phy raw c45 0xad 0x1 0xd131 0xa0a
|
||||
phy raw c45 0xad 0x1 0xd134 0x1
|
||||
phy raw c45 0xad 0x1 0xffde 2
|
||||
phy raw c45 0xad 0x1 0xd130 0x50
|
||||
phy raw c45 0xad 0x1 0xd131 0xa0a
|
||||
phy raw c45 0xad 0x1 0xd134 0x1
|
||||
phy raw c45 0xad 0x1 0xffde 3
|
||||
phy raw c45 0xad 0x1 0xd130 0x50
|
||||
phy raw c45 0xad 0x1 0xd131 0xa0a
|
||||
phy raw c45 0xad 0x1 0xd134 0x1
|
||||
|
||||
phy raw c45 0xb1 0x1 0xffde 0
|
||||
phy raw c45 0xb1 0x1 0xd130 0x50
|
||||
phy raw c45 0xb1 0x1 0xd131 0xa0a
|
||||
phy raw c45 0xb1 0x1 0xd134 0x1
|
||||
phy raw c45 0xb1 0x1 0xffde 1
|
||||
phy raw c45 0xb1 0x1 0xd130 0x50
|
||||
phy raw c45 0xb1 0x1 0xd131 0xa0a
|
||||
phy raw c45 0xb1 0x1 0xd134 0x1
|
||||
phy raw c45 0xb1 0x1 0xffde 2
|
||||
phy raw c45 0xb1 0x1 0xd130 0x50
|
||||
phy raw c45 0xb1 0x1 0xd131 0xa0a
|
||||
phy raw c45 0xb1 0x1 0xd134 0x1
|
||||
phy raw c45 0xb1 0x1 0xffde 3
|
||||
phy raw c45 0xb1 0x1 0xd130 0x50
|
||||
phy raw c45 0xb1 0x1 0xd131 0xa0a
|
||||
phy raw c45 0xb1 0x1 0xd134 0x1
|
||||
|
||||
phy raw c45 0xa5 0x1 0xffde 0
|
||||
phy raw c45 0xa5 0x1 0xd130 0x50
|
||||
phy raw c45 0xa5 0x1 0xd131 0xa0a
|
||||
phy raw c45 0xa5 0x1 0xd134 0x1
|
||||
phy raw c45 0xa5 0x1 0xffde 1
|
||||
phy raw c45 0xa5 0x1 0xd130 0x50
|
||||
phy raw c45 0xa5 0x1 0xd131 0xa0a
|
||||
phy raw c45 0xa5 0x1 0xd134 0x1
|
||||
phy raw c45 0xa5 0x1 0xffde 2
|
||||
phy raw c45 0xa5 0x1 0xd130 0x50
|
||||
phy raw c45 0xa5 0x1 0xd131 0xa0a
|
||||
phy raw c45 0xa5 0x1 0xd134 0x1
|
||||
phy raw c45 0xa5 0x1 0xffde 3
|
||||
phy raw c45 0xa5 0x1 0xd130 0x50
|
||||
phy raw c45 0xa5 0x1 0xd131 0xa0a
|
||||
phy raw c45 0xa5 0x1 0xd134 0x1
|
||||
|
||||
phy raw c45 0xa9 0x1 0xffde 0
|
||||
phy raw c45 0xa9 0x1 0xd130 0x50
|
||||
phy raw c45 0xa9 0x1 0xd131 0xa0a
|
||||
phy raw c45 0xa9 0x1 0xd134 0x1
|
||||
phy raw c45 0xa9 0x1 0xffde 1
|
||||
phy raw c45 0xa9 0x1 0xd130 0x50
|
||||
phy raw c45 0xa9 0x1 0xd131 0xa0a
|
||||
phy raw c45 0xa9 0x1 0xd134 0x1
|
||||
phy raw c45 0xa9 0x1 0xffde 2
|
||||
phy raw c45 0xa9 0x1 0xd130 0x50
|
||||
phy raw c45 0xa9 0x1 0xd131 0xa0a
|
||||
phy raw c45 0xa9 0x1 0xd134 0x1
|
||||
phy raw c45 0xa9 0x1 0xffde 3
|
||||
phy raw c45 0xa9 0x1 0xd130 0x50
|
||||
phy raw c45 0xa9 0x1 0xd131 0xa0a
|
||||
phy raw c45 0xa9 0x1 0xd134 0x1
|
||||
|
||||
linkscan on
|
||||
@ -2,7 +2,6 @@ sai_load_hw_config=/etc/bcm/flex/bcm56870_a0_issu/b870.6.4.1/
|
||||
bcm_tunnel_term_compatible_mode=1
|
||||
core_clock_frequency=1525
|
||||
dpp_clock_ratio=2:3
|
||||
parity_enable=0
|
||||
mem_cache_enable=0
|
||||
l2_mem_entries=40960
|
||||
l3_mem_entries=40960
|
||||
@ -91,8 +90,8 @@ portmap_123=121:100
|
||||
portmap_127=125:100
|
||||
|
||||
# datapath port -- MerlinCore
|
||||
portmap_66=129:10:m
|
||||
portmap_130=128:10:m
|
||||
#portmap_66=129:10:m
|
||||
#portmap_130=128:10:m
|
||||
|
||||
# loopback port
|
||||
portmap_65=130:10
|
||||
@ -479,3 +478,85 @@ phy_chain_rx_polarity_flip_physical{130.0}=0x0
|
||||
phy_chain_rx_polarity_flip_physical{131.0}=0x0
|
||||
phy_chain_rx_polarity_flip_physical{132.0}=0x0
|
||||
|
||||
|
||||
serdes_preemphasis_1=0x35503
|
||||
serdes_preemphasis_2=0x35503
|
||||
serdes_preemphasis_3=0x35503
|
||||
serdes_preemphasis_4=0x35503
|
||||
serdes_preemphasis_5=0x35503
|
||||
serdes_preemphasis_6=0x35503
|
||||
serdes_preemphasis_7=0x35503
|
||||
serdes_preemphasis_8=0x35503
|
||||
serdes_preemphasis_13=0x35503
|
||||
serdes_preemphasis_14=0x35503
|
||||
serdes_preemphasis_15=0x35503
|
||||
serdes_preemphasis_16=0x35503
|
||||
serdes_preemphasis_21=0x35503
|
||||
serdes_preemphasis_22=0x35503
|
||||
serdes_preemphasis_23=0x35503
|
||||
serdes_preemphasis_24=0x35503
|
||||
serdes_preemphasis_29=0x35503
|
||||
serdes_preemphasis_30=0x35503
|
||||
serdes_preemphasis_31=0x35503
|
||||
serdes_preemphasis_32=0x35503
|
||||
serdes_preemphasis_33=0x35503
|
||||
serdes_preemphasis_34=0x35503
|
||||
serdes_preemphasis_35=0x35503
|
||||
serdes_preemphasis_36=0x35503
|
||||
serdes_preemphasis_41=0x35503
|
||||
serdes_preemphasis_42=0x35503
|
||||
serdes_preemphasis_43=0x35503
|
||||
serdes_preemphasis_44=0x35503
|
||||
serdes_preemphasis_49=0x35503
|
||||
serdes_preemphasis_50=0x35503
|
||||
serdes_preemphasis_51=0x35503
|
||||
serdes_preemphasis_52=0x35503
|
||||
serdes_preemphasis_57=0x35503
|
||||
serdes_preemphasis_58=0x35503
|
||||
serdes_preemphasis_59=0x35503
|
||||
serdes_preemphasis_60=0x35503
|
||||
serdes_preemphasis_61=0x35503
|
||||
serdes_preemphasis_62=0x35503
|
||||
serdes_preemphasis_63=0x35503
|
||||
serdes_preemphasis_64=0x35503
|
||||
serdes_preemphasis_lane0_67=0x25905
|
||||
serdes_preemphasis_lane1_67=0x25905
|
||||
serdes_preemphasis_lane2_67=0x25905
|
||||
serdes_preemphasis_lane3_67=0x25905
|
||||
serdes_preemphasis_lane0_71=0x25905
|
||||
serdes_preemphasis_lane1_71=0x25905
|
||||
serdes_preemphasis_lane2_71=0x25905
|
||||
serdes_preemphasis_lane3_71=0x25905
|
||||
serdes_preemphasis_lane0_79=0x25905
|
||||
serdes_preemphasis_lane1_79=0x25905
|
||||
serdes_preemphasis_lane2_79=0x25905
|
||||
serdes_preemphasis_lane3_79=0x25905
|
||||
serdes_preemphasis_87=0x35503
|
||||
serdes_preemphasis_88=0x35503
|
||||
serdes_preemphasis_89=0x35503
|
||||
serdes_preemphasis_90=0x35503
|
||||
serdes_preemphasis_95=0x35503
|
||||
serdes_preemphasis_96=0x35503
|
||||
serdes_preemphasis_97=0x35503
|
||||
serdes_preemphasis_98=0x35503
|
||||
serdes_preemphasis_lane0_99=0x35503
|
||||
serdes_preemphasis_lane1_99=0x35503
|
||||
serdes_preemphasis_lane2_99=0x35503
|
||||
serdes_preemphasis_lane3_99=0x55905
|
||||
serdes_preemphasis_lane0_107=0x25905
|
||||
serdes_preemphasis_lane1_107=0x25905
|
||||
serdes_preemphasis_lane2_107=0x25905
|
||||
serdes_preemphasis_lane3_107=0x25905
|
||||
serdes_preemphasis_lane0_115=0x25905
|
||||
serdes_preemphasis_lane1_115=0x25905
|
||||
serdes_preemphasis_lane2_115=0x25905
|
||||
serdes_preemphasis_lane3_115=0x25905
|
||||
serdes_preemphasis_lane0_123=0x25905
|
||||
serdes_preemphasis_lane1_123=0x25905
|
||||
serdes_preemphasis_lane2_123=0x25905
|
||||
serdes_preemphasis_lane3_123=0x25905
|
||||
serdes_preemphasis_lane0_127=0x25905
|
||||
serdes_preemphasis_lane1_127=0x25905
|
||||
serdes_preemphasis_lane2_127=0x25905
|
||||
serdes_preemphasis_lane3_127=0x25905
|
||||
|
||||
|
||||
BIN
device/quanta/x86_64-quanta_ix8c_bwde-r0/custom_led.bin
Normal file
BIN
device/quanta/x86_64-quanta_ix8c_bwde-r0/custom_led.bin
Normal file
Binary file not shown.
@ -1,6 +1,4 @@
|
||||
sleep 10
|
||||
led stop
|
||||
sleep 3
|
||||
led start
|
||||
sleep 3
|
||||
m0 Load 0 0x3800 /usr/share/sonic/platform/custom_led.bin
|
||||
led auto on
|
||||
led start
|
||||
|
||||
@ -16,5 +16,5 @@ class board(eeprom_tlvinfo.TlvInfoDecoder):
|
||||
_TLV_INFO_MAX_LEN = 256
|
||||
|
||||
def __init__(self, name, path, cpld_root, ro):
|
||||
self.eeprom_path = "/sys/bus/i2c/devices/18-0054/eeprom"
|
||||
self.eeprom_path = "/sys/bus/i2c/devices/3-0054/eeprom"
|
||||
super(board, self).__init__(self.eeprom_path, 0, '', True)
|
||||
|
||||
@ -23,62 +23,62 @@ class SfpUtil(SfpUtilBase):
|
||||
|
||||
_port_to_eeprom_mapping = {}
|
||||
_port_to_i2c_mapping = {
|
||||
1: 32,
|
||||
2: 33,
|
||||
3: 34,
|
||||
4: 35,
|
||||
5: 36,
|
||||
6: 37,
|
||||
7: 38,
|
||||
8: 39,
|
||||
9: 40,
|
||||
10: 41,
|
||||
11: 42,
|
||||
12: 43,
|
||||
13: 44,
|
||||
14: 45,
|
||||
15: 46,
|
||||
16: 47,
|
||||
17: 48,
|
||||
18: 49,
|
||||
19: 50,
|
||||
20: 51,
|
||||
21: 52,
|
||||
22: 53,
|
||||
23: 54,
|
||||
24: 55,
|
||||
25: 56,
|
||||
26: 57,
|
||||
27: 58,
|
||||
28: 59,
|
||||
29: 60,
|
||||
30: 61,
|
||||
31: 62,
|
||||
32: 63,
|
||||
33: 64,
|
||||
34: 65,
|
||||
35: 66,
|
||||
36: 67,
|
||||
37: 68,
|
||||
38: 69,
|
||||
39: 70,
|
||||
40: 71,
|
||||
41: 72,
|
||||
42: 73,
|
||||
43: 74,
|
||||
44: 75,
|
||||
45: 76,
|
||||
46: 77,
|
||||
47: 78,
|
||||
48: 79,
|
||||
49: 80, # QSFP49
|
||||
50: 81, # QSFP50
|
||||
51: 82, # QSFP51
|
||||
52: 83, # QSFP52
|
||||
53: 84, # QSFP53
|
||||
54: 85, # QSFP54
|
||||
55: 86, # QSFP55
|
||||
56: 87, # QSFP56
|
||||
1 : 13,
|
||||
2 : 14,
|
||||
3 : 15,
|
||||
4 : 16,
|
||||
5 : 17,
|
||||
6 : 18,
|
||||
7 : 19,
|
||||
8 : 20,
|
||||
9 : 21,
|
||||
10 : 22,
|
||||
11 : 23,
|
||||
12 : 24,
|
||||
13 : 25,
|
||||
14 : 26,
|
||||
15 : 27,
|
||||
16 : 28,
|
||||
17 : 29,
|
||||
18 : 30,
|
||||
19 : 31,
|
||||
20 : 32,
|
||||
21 : 33,
|
||||
22 : 34,
|
||||
23 : 35,
|
||||
24 : 36,
|
||||
25 : 37,
|
||||
26 : 38,
|
||||
27 : 39,
|
||||
28 : 40,
|
||||
29 : 41,
|
||||
30 : 42,
|
||||
31 : 43,
|
||||
32 : 44,
|
||||
33 : 45,
|
||||
34 : 46,
|
||||
35 : 47,
|
||||
36 : 48,
|
||||
37 : 49,
|
||||
38 : 50,
|
||||
39 : 51,
|
||||
40 : 52,
|
||||
41 : 53,
|
||||
42 : 54,
|
||||
43 : 55,
|
||||
44 : 56,
|
||||
45 : 57,
|
||||
46 : 58,
|
||||
47 : 59,
|
||||
48 : 60,
|
||||
49 : 61,#QSFP49
|
||||
50 : 62,#QSFP50
|
||||
51 : 63,#QSFP51
|
||||
52 : 64,#QSFP52
|
||||
53 : 65,#QSFP53
|
||||
54 : 66,#QSFP54
|
||||
55 : 67,#QSFP55
|
||||
56 : 68,#QSFP56
|
||||
}
|
||||
|
||||
@property
|
||||
|
||||
@ -0,0 +1,4 @@
|
||||
{
|
||||
"skip_ledd": true
|
||||
}
|
||||
|
||||
@ -0,0 +1,2 @@
|
||||
{%- set default_topo = 't0' %}
|
||||
{%- include 'buffers_config.j2' %}
|
||||
@ -0,0 +1,57 @@
|
||||
|
||||
{%- set default_cable = '40m' %}
|
||||
|
||||
{%- macro generate_buffer_pool_and_profiles() %}
|
||||
"BUFFER_POOL": {
|
||||
"egress_lossy_pool": {
|
||||
"size": "67108864",
|
||||
"type": "egress",
|
||||
"mode": "dynamic"
|
||||
},
|
||||
"egress_lossless_pool": {
|
||||
"size": "0",
|
||||
"type": "egress",
|
||||
"mode": "dynamic"
|
||||
},
|
||||
"ingress_lossless_pool": {
|
||||
"mode": "dynamic",
|
||||
"size": "59001152",
|
||||
"xoff": "7428992",
|
||||
"type": "ingress"
|
||||
}
|
||||
},
|
||||
"BUFFER_PROFILE": {
|
||||
"ingress_lossy_profile": {
|
||||
"pool":"[BUFFER_POOL|ingress_lossless_pool]",
|
||||
"size":"0",
|
||||
"static_th":"67108864"
|
||||
},
|
||||
"egress_lossless_profile": {
|
||||
"pool":"[BUFFER_POOL|egress_lossy_pool]",
|
||||
"size":"0",
|
||||
"dynamic_th":"3"
|
||||
},
|
||||
"egress_lossy_profile": {
|
||||
"pool":"[BUFFER_POOL|egress_lossy_pool]",
|
||||
"size":"0",
|
||||
"dynamic_th":"3"
|
||||
}
|
||||
},
|
||||
{%- endmacro %}
|
||||
|
||||
"BUFFER_PG": {
|
||||
{% for port in PORT_ACTIVE %}
|
||||
"{{ port }}|0": {
|
||||
"profile" : "[BUFFER_PROFILE|ingress_lossy_profile]"
|
||||
}{% if not loop.last %},{% endif %}
|
||||
{% endfor %}
|
||||
},
|
||||
|
||||
"BUFFER_QUEUE": {
|
||||
{% for port in PORT_ACTIVE %}
|
||||
"{{ port }}|0-6": {
|
||||
"profile" : "[BUFFER_PROFILE|egress_lossy_profile]"
|
||||
}{% if not loop.last %},{% endif %}
|
||||
{% endfor %}
|
||||
}
|
||||
|
||||
@ -0,0 +1,57 @@
|
||||
|
||||
{%- set default_cable = '40m' %}
|
||||
|
||||
{%- macro generate_buffer_pool_and_profiles() %}
|
||||
"BUFFER_POOL": {
|
||||
"egress_lossy_pool": {
|
||||
"size": "67108864",
|
||||
"type": "egress",
|
||||
"mode": "dynamic"
|
||||
},
|
||||
"egress_lossless_pool": {
|
||||
"size": "0",
|
||||
"type": "egress",
|
||||
"mode": "dynamic"
|
||||
},
|
||||
"ingress_lossless_pool": {
|
||||
"mode": "dynamic",
|
||||
"size": "59001152",
|
||||
"xoff": "7428992",
|
||||
"type": "ingress"
|
||||
}
|
||||
},
|
||||
"BUFFER_PROFILE": {
|
||||
"ingress_lossy_profile": {
|
||||
"pool":"[BUFFER_POOL|ingress_lossless_pool]",
|
||||
"size":"0",
|
||||
"static_th":"67108864"
|
||||
},
|
||||
"egress_lossless_profile": {
|
||||
"pool":"[BUFFER_POOL|egress_lossy_pool]",
|
||||
"size":"0",
|
||||
"dynamic_th":"3"
|
||||
},
|
||||
"egress_lossy_profile": {
|
||||
"pool":"[BUFFER_POOL|egress_lossy_pool]",
|
||||
"size":"0",
|
||||
"dynamic_th":"3"
|
||||
}
|
||||
},
|
||||
{%- endmacro %}
|
||||
|
||||
"BUFFER_PG": {
|
||||
{% for port in PORT_ACTIVE %}
|
||||
"{{ port }}|0": {
|
||||
"profile" : "[BUFFER_PROFILE|ingress_lossy_profile]"
|
||||
}{% if not loop.last %},{% endif %}
|
||||
{% endfor %}
|
||||
},
|
||||
|
||||
"BUFFER_QUEUE": {
|
||||
{% for port in PORT_ACTIVE %}
|
||||
"{{ port }}|0-6": {
|
||||
"profile" : "[BUFFER_PROFILE|egress_lossy_profile]"
|
||||
}{% if not loop.last %},{% endif %}
|
||||
{% endfor %}
|
||||
}
|
||||
|
||||
@ -0,0 +1,23 @@
|
||||
# PG lossless profiles.
|
||||
# speed cable size xon xoff threshold xon_offset
|
||||
10000 5m 1270 0 190500 -2 2540
|
||||
25000 5m 1270 0 190500 -2 2540
|
||||
40000 5m 1270 0 190500 -2 2540
|
||||
50000 5m 1270 0 190500 -2 2540
|
||||
100000 5m 1270 0 190500 -2 2540
|
||||
200000 5m 1270 0 190500 -2 2540
|
||||
400000 5m 1270 0 190500 -2 2540
|
||||
10000 40m 1270 0 190500 -2 2540
|
||||
25000 40m 1270 0 190500 -2 2540
|
||||
40000 40m 1270 0 190500 -2 2540
|
||||
50000 40m 1270 0 190500 -2 2540
|
||||
100000 40m 1270 0 190500 -2 2540
|
||||
200000 40m 1270 0 190500 -2 2540
|
||||
400000 40m 1270 0 190500 -2 2540
|
||||
10000 300m 1270 0 190500 -2 2540
|
||||
25000 300m 1270 0 190500 -2 2540
|
||||
40000 300m 1270 0 190500 -2 2540
|
||||
50000 300m 1270 0 190500 -2 2540
|
||||
100000 300m 1270 0 190500 -2 2540
|
||||
200000 300m 1270 0 190500 -2 2540
|
||||
400000 300m 1270 0 190500 -2 2540
|
||||
@ -0,0 +1,43 @@
|
||||
{
|
||||
"fec-mode": {
|
||||
"Ethernet0-255": {
|
||||
"1": {
|
||||
"10000": [ "none", "fc" ],
|
||||
"25000": [ "none", "fc", "rs" ],
|
||||
"50000": [ "none", "rs" ]
|
||||
},
|
||||
"2": [ "none", "rs" ],
|
||||
"4": {
|
||||
"40000": [ "none", "fc" ],
|
||||
"100000": [ "none", "rs" ],
|
||||
"200000": [ "none", "rs" ]
|
||||
},
|
||||
"8": [ "rs" ]
|
||||
}
|
||||
},
|
||||
"default-fec-mode": {
|
||||
"Ethernet0-255": {
|
||||
"1": {
|
||||
"10000": "none",
|
||||
"25000": "none",
|
||||
"50000": "none"
|
||||
},
|
||||
"2": {
|
||||
"20000": "none",
|
||||
"50000": "none",
|
||||
"100000": "rs"
|
||||
},
|
||||
"4": {
|
||||
"40000": "none",
|
||||
"100000": "none",
|
||||
"200000": "none"
|
||||
},
|
||||
"8": "rs"
|
||||
}
|
||||
},
|
||||
"native-port-supported-speeds": {
|
||||
"Ethernet0-255": {
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
@ -1,33 +1,33 @@
|
||||
# name lanes alias index
|
||||
Ethernet0 33,34,35,36,37,38,39,40 fourhundredGigE1 0
|
||||
Ethernet4 25,26,27,28,29,30,31,32 fourhundredGigE2 1
|
||||
Ethernet8 49,50,51,52,53,54,55,56 fourhundredGigE3 2
|
||||
Ethernet12 57,58,59,60,61,62,63,64 fourhundredGigE4 3
|
||||
Ethernet16 65,66,67,68,69,70,71,72 fourhundredGigE5 4
|
||||
Ethernet20 73,74,75,76,77,78,79,80 fourhundredGigE6 5
|
||||
Ethernet24 81,82,83,84,85,86,87,88 fourhundredGigE7 6
|
||||
Ethernet28 89,90,91,92,93,94,95,96 fourhundredGigE8 7
|
||||
Ethernet32 17,18,19,20,21,22,23,24 fourhundredGigE9 8
|
||||
Ethernet36 97,98,99,100,101,102,103,104 fourhundredGigE10 9
|
||||
Ethernet40 9,10,11,12,13,14,15,16 fourhundredGigE11 10
|
||||
Ethernet44 41,42,43,44,45,46,47,48 fourhundredGigE12 11
|
||||
Ethernet48 113,114,115,116,117,118,119,120 fourhundredGigE13 12
|
||||
Ethernet52 105,106,107,108,109,110,111,112 fourhundredGigE14 13
|
||||
Ethernet56 121,122,123,124,125,126,127,128 fourhundredGigE15 14
|
||||
Ethernet60 1,2,3,4,5,6,7,8 fourhundredGigE16 15
|
||||
Ethernet64 137,138,139,140,141,142,143,144 fourhundredGigE17 16
|
||||
Ethernet68 129,130,131,132,133,134,135,136 fourhundredGigE18 17
|
||||
Ethernet72 241,242,243,244,245,246,247,248 fourhundredGigE19 18
|
||||
Ethernet76 249,250,251,252,253,254,255,256 fourhundredGigE20 19
|
||||
Ethernet80 225,226,227,228,229,230,231,232 fourhundredGigE21 20
|
||||
Ethernet84 145,146,147,148,149,150,151,152 fourhundredGigE22 21
|
||||
Ethernet88 153,154,155,156,157,158,159,160 fourhundredGigE23 22
|
||||
Ethernet92 233,234,235,236,237,238,239,240 fourhundredGigE24 23
|
||||
Ethernet96 161,162,163,164,165,166,167,168 fourhundredGigE25 24
|
||||
Ethernet100 169,170,171,172,173,174,175,176 fourhundredGigE26 25
|
||||
Ethernet104 177,178,179,180,181,182,183,184 fourhundredGigE27 26
|
||||
Ethernet108 185,186,187,188,189,190,191,192 fourhundredGigE28 27
|
||||
Ethernet112 193,194,195,196,197,198,199,200 fourhundredGigE29 28
|
||||
Ethernet116 201,202,203,204,205,206,207,208 fourhundredGigE30 29
|
||||
Ethernet120 209,210,211,212,213,214,215,216 fourhundredGigE31 30
|
||||
Ethernet124 217,218,219,220,221,222,223,224 fourhundredGigE32 31
|
||||
# name lanes alias index speed fec
|
||||
Ethernet0 33,34,35,36,37,38,39,40 fourhundredGigE1 1 400000 rs
|
||||
Ethernet8 25,26,27,28,29,30,31,32 fourhundredGigE2 2 400000 rs
|
||||
Ethernet16 49,50,51,52,53,54,55,56 fourhundredGigE3 3 400000 rs
|
||||
Ethernet24 57,58,59,60,61,62,63,64 fourhundredGigE4 4 400000 rs
|
||||
Ethernet32 65,66,67,68,69,70,71,72 fourhundredGigE5 5 400000 rs
|
||||
Ethernet40 73,74,75,76,77,78,79,80 fourhundredGigE6 6 400000 rs
|
||||
Ethernet48 81,82,83,84,85,86,87,88 fourhundredGigE7 7 400000 rs
|
||||
Ethernet56 89,90,91,92,93,94,95,96 fourhundredGigE8 8 400000 rs
|
||||
Ethernet64 17,18,19,20,21,22,23,24 fourhundredGigE9 9 400000 rs
|
||||
Ethernet72 97,98,99,100,101,102,103,104 fourhundredGigE10 10 400000 rs
|
||||
Ethernet80 9,10,11,12,13,14,15,16 fourhundredGigE11 11 400000 rs
|
||||
Ethernet88 41,42,43,44,45,46,47,48 fourhundredGigE12 12 400000 rs
|
||||
Ethernet96 113,114,115,116,117,118,119,120 fourhundredGigE13 13 400000 rs
|
||||
Ethernet104 105,106,107,108,109,110,111,112 fourhundredGigE14 14 400000 rs
|
||||
Ethernet112 121,122,123,124,125,126,127,128 fourhundredGigE15 15 400000 rs
|
||||
Ethernet120 1,2,3,4,5,6,7,8 fourhundredGigE16 16 400000 rs
|
||||
Ethernet128 137,138,139,140,141,142,143,144 fourhundredGigE17 17 400000 rs
|
||||
Ethernet136 129,130,131,132,133,134,135,136 fourhundredGigE18 18 400000 rs
|
||||
Ethernet144 241,242,243,244,245,246,247,248 fourhundredGigE19 19 400000 rs
|
||||
Ethernet152 249,250,251,252,253,254,255,256 fourhundredGigE20 20 400000 rs
|
||||
Ethernet160 225,226,227,228,229,230,231,232 fourhundredGigE21 21 400000 rs
|
||||
Ethernet168 145,146,147,148,149,150,151,152 fourhundredGigE22 22 400000 rs
|
||||
Ethernet176 153,154,155,156,157,158,159,160 fourhundredGigE23 23 400000 rs
|
||||
Ethernet184 233,234,235,236,237,238,239,240 fourhundredGigE24 24 400000 rs
|
||||
Ethernet192 161,162,163,164,165,166,167,168 fourhundredGigE25 25 400000 rs
|
||||
Ethernet200 169,170,171,172,173,174,175,176 fourhundredGigE26 26 400000 rs
|
||||
Ethernet208 177,178,179,180,181,182,183,184 fourhundredGigE27 27 400000 rs
|
||||
Ethernet216 185,186,187,188,189,190,191,192 fourhundredGigE28 28 400000 rs
|
||||
Ethernet224 193,194,195,196,197,198,199,200 fourhundredGigE29 29 400000 rs
|
||||
Ethernet232 201,202,203,204,205,206,207,208 fourhundredGigE30 30 400000 rs
|
||||
Ethernet240 209,210,211,212,213,214,215,216 fourhundredGigE31 31 400000 rs
|
||||
Ethernet248 217,218,219,220,221,222,223,224 fourhundredGigE32 32 400000 rs
|
||||
|
||||
@ -0,0 +1,230 @@
|
||||
{%- set PORT_ALL = [] %}
|
||||
{%- for port in PORT %}
|
||||
{%- if PORT_ALL.append(port) %}{% endif %}
|
||||
{%- endfor %}
|
||||
{%- if PORT_ALL | sort_by_port_index %}{% endif %}
|
||||
|
||||
{%- set port_names_list_all = [] %}
|
||||
{%- for port in PORT_ALL %}
|
||||
{%- if port_names_list_all.append(port) %}{% endif %}
|
||||
{%- endfor %}
|
||||
{%- set port_names_all = port_names_list_all | join(',') -%}
|
||||
|
||||
|
||||
{%- set PORT_ACTIVE = [] %}
|
||||
{%- if DEVICE_NEIGHBOR is not defined %}
|
||||
{%- set PORT_ACTIVE = PORT_ALL %}
|
||||
{%- else %}
|
||||
{%- for port in DEVICE_NEIGHBOR.keys() %}
|
||||
{%- if PORT_ACTIVE.append(port) %}{%- endif %}
|
||||
{%- endfor %}
|
||||
{%- endif %}
|
||||
{%- if PORT_ACTIVE | sort_by_port_index %}{% endif %}
|
||||
|
||||
{%- set port_names_list_active = [] %}
|
||||
{%- for port in PORT_ACTIVE %}
|
||||
{%- if port_names_list_active.append(port) %}{%- endif %}
|
||||
{%- endfor %}
|
||||
{%- set port_names_active = port_names_list_active | join(',') -%}
|
||||
|
||||
|
||||
{%- set pfc_to_pg_map_supported_asics = ['mellanox', 'barefoot', 'marvell'] -%}
|
||||
|
||||
|
||||
{
|
||||
{% if generate_tc_to_pg_map is defined %}
|
||||
{{- generate_tc_to_pg_map() }}
|
||||
{% else %}
|
||||
"TC_TO_PRIORITY_GROUP_MAP": {
|
||||
"DEFAULT": {
|
||||
"0": "0",
|
||||
"1": "0",
|
||||
"2": "0",
|
||||
"3": "3",
|
||||
"4": "4",
|
||||
"5": "0",
|
||||
"6": "0",
|
||||
"7": "7"
|
||||
}
|
||||
},
|
||||
{% endif %}
|
||||
"MAP_PFC_PRIORITY_TO_QUEUE": {
|
||||
"DEFAULT": {
|
||||
"0": "0",
|
||||
"1": "1",
|
||||
"2": "2",
|
||||
"3": "3",
|
||||
"4": "4",
|
||||
"5": "5",
|
||||
"6": "6",
|
||||
"7": "7"
|
||||
}
|
||||
},
|
||||
"TC_TO_QUEUE_MAP": {
|
||||
"DEFAULT": {
|
||||
"0": "0",
|
||||
"1": "1",
|
||||
"2": "2",
|
||||
"3": "3",
|
||||
"4": "4",
|
||||
"5": "5",
|
||||
"6": "6",
|
||||
"7": "7"
|
||||
}
|
||||
},
|
||||
"DSCP_TO_TC_MAP": {
|
||||
"DEFAULT": {
|
||||
"0" : "0",
|
||||
"1" : "0",
|
||||
"2" : "0",
|
||||
"3" : "0",
|
||||
"4" : "0",
|
||||
"5" : "0",
|
||||
"6" : "0",
|
||||
"7" : "0",
|
||||
"8" : "0",
|
||||
"9" : "0",
|
||||
"10": "0",
|
||||
"11": "0",
|
||||
"12": "0",
|
||||
"13": "0",
|
||||
"14": "0",
|
||||
"15": "0",
|
||||
"16": "0",
|
||||
"17": "0",
|
||||
"18": "0",
|
||||
"19": "0",
|
||||
"20": "0",
|
||||
"21": "0",
|
||||
"22": "0",
|
||||
"23": "0",
|
||||
"24": "0",
|
||||
"25": "0",
|
||||
"26": "0",
|
||||
"27": "0",
|
||||
"28": "0",
|
||||
"29": "0",
|
||||
"30": "0",
|
||||
"31": "0",
|
||||
"32": "0",
|
||||
"33": "0",
|
||||
"34": "0",
|
||||
"35": "0",
|
||||
"36": "0",
|
||||
"37": "0",
|
||||
"38": "0",
|
||||
"39": "0",
|
||||
"40": "0",
|
||||
"41": "0",
|
||||
"42": "0",
|
||||
"43": "0",
|
||||
"44": "0",
|
||||
"45": "0",
|
||||
"46": "0",
|
||||
"47": "0",
|
||||
"48": "0",
|
||||
"49": "0",
|
||||
"50": "0",
|
||||
"51": "0",
|
||||
"52": "0",
|
||||
"53": "0",
|
||||
"54": "0",
|
||||
"55": "0",
|
||||
"56": "0",
|
||||
"57": "0",
|
||||
"58": "0",
|
||||
"59": "0",
|
||||
"60": "0",
|
||||
"61": "0",
|
||||
"62": "0",
|
||||
"63": "0"
|
||||
}
|
||||
},
|
||||
"SCHEDULER": {
|
||||
"scheduler.0": {
|
||||
"type" : "DWRR",
|
||||
"weight": "1"
|
||||
},
|
||||
"scheduler.1": {
|
||||
"type" : "DWRR",
|
||||
"weight": "2"
|
||||
},
|
||||
"scheduler.2": {
|
||||
"type" : "DWRR",
|
||||
"weight": "3"
|
||||
},
|
||||
"scheduler.3": {
|
||||
"type" : "DWRR",
|
||||
"weight": "4"
|
||||
},
|
||||
"scheduler.4": {
|
||||
"type" : "DWRR",
|
||||
"weight": "5"
|
||||
},
|
||||
"scheduler.5": {
|
||||
"type" : "DWRR",
|
||||
"weight": "10"
|
||||
},
|
||||
"scheduler.6": {
|
||||
"type" : "DWRR",
|
||||
"weight": "25"
|
||||
},
|
||||
"scheduler.7": {
|
||||
"type" : "DWRR",
|
||||
"weight": "50"
|
||||
}
|
||||
},
|
||||
"PORT_QOS_MAP": {
|
||||
{% for port in PORT_ACTIVE %}
|
||||
"{{ port }}": {
|
||||
"dscp_to_tc_map" : "[DSCP_TO_TC_MAP|DEFAULT]",
|
||||
"tc_to_queue_map" : "[TC_TO_QUEUE_MAP|DEFAULT]",
|
||||
"pfc_enable" : "3,4",
|
||||
"pfc_to_queue_map": "[MAP_PFC_PRIORITY_TO_QUEUE|DEFAULT]",
|
||||
"tc_to_pg_map" : "[TC_TO_PRIORITY_GROUP_MAP|DEFAULT]"
|
||||
}{% if not loop.last %},{% endif %}
|
||||
{% endfor %}
|
||||
},
|
||||
"QUEUE": {
|
||||
{% for port in PORT_ACTIVE %}
|
||||
"{{ port }}|0": {
|
||||
"scheduler" : "[SCHEDULER|scheduler.0]"
|
||||
},
|
||||
{% endfor %}
|
||||
{% for port in PORT_ACTIVE %}
|
||||
"{{ port }}|1": {
|
||||
"scheduler" : "[SCHEDULER|scheduler.1]"
|
||||
},
|
||||
{% endfor %}
|
||||
{% for port in PORT_ACTIVE %}
|
||||
"{{ port }}|2": {
|
||||
"scheduler": "[SCHEDULER|scheduler.2]"
|
||||
},
|
||||
{% endfor %}
|
||||
{% for port in PORT_ACTIVE %}
|
||||
"{{ port }}|3": {
|
||||
"scheduler": "[SCHEDULER|scheduler.3]"
|
||||
},
|
||||
{% endfor %}
|
||||
{% for port in PORT_ACTIVE %}
|
||||
"{{ port }}|4": {
|
||||
"scheduler": "[SCHEDULER|scheduler.4]"
|
||||
},
|
||||
{% endfor %}
|
||||
{% for port in PORT_ACTIVE %}
|
||||
"{{ port }}|5": {
|
||||
"scheduler": "[SCHEDULER|scheduler.5]"
|
||||
},
|
||||
{% endfor %}
|
||||
{% for port in PORT_ACTIVE %}
|
||||
"{{ port }}|6": {
|
||||
"scheduler": "[SCHEDULER|scheduler.6]"
|
||||
},
|
||||
{% endfor %}
|
||||
{% for port in PORT_ACTIVE %}
|
||||
"{{ port }}|7": {
|
||||
"scheduler": "[SCHEDULER|scheduler.7]"
|
||||
}{% if not loop.last %},{% endif %}
|
||||
{% endfor %}
|
||||
}
|
||||
}
|
||||
@ -1,23 +1,27 @@
|
||||
ccm_dma_enable=0
|
||||
ccmdma_intr_enable=0
|
||||
ctr_evict_enable=0
|
||||
mem_cache_enable=0
|
||||
parity_correction=0
|
||||
parity_enable=0
|
||||
phy_enable=0
|
||||
phy_null=1
|
||||
pll_bypass=1
|
||||
|
||||
init_all_modules=0
|
||||
core_clock_frequency=1325
|
||||
dpr_clock_frequency=1000
|
||||
device_clock_frequency=1325
|
||||
|
||||
load_firmware=0x2
|
||||
port_flex_enable=1
|
||||
|
||||
l2xmsg_mode.0=1
|
||||
l2_mem_entries.0=8192
|
||||
l3_alpm_enable.0=2
|
||||
l3_mem_entries.0=16384
|
||||
ipv6_lpm_128b_enable=1
|
||||
lpm_ipv6_128b_reserved=0
|
||||
l3_alpm_ipv6_128b_bkt_rsvd=0
|
||||
num_ipv6_lpm_128b_entries=768
|
||||
mmu_port_num_mc_queue.0=1
|
||||
module_64ports.0=1
|
||||
multicast_l2_range.0=511
|
||||
oversubscribe_mode=1
|
||||
led_fw_path="/usr/share/sonic/platform/"
|
||||
|
||||
# portmap settings
|
||||
pbmp_xport_xe=0x111101111411110111101111011114111102222
|
||||
pbmp_xport_xe.0=0x3ffffffffffffffffffffffffffffffffffffffe
|
||||
|
||||
portmap_1=1:400
|
||||
portmap_5=9:400
|
||||
@ -47,17 +51,18 @@ portmap_108=177:400
|
||||
portmap_112=185:400
|
||||
|
||||
portmap_120=193:400
|
||||
portmap_124=201:400
|
||||
portmap_128=209:400
|
||||
portmap_132=217:400
|
||||
portmap_121=201:400
|
||||
portmap_122=209:400
|
||||
portmap_130=217:400
|
||||
|
||||
portmap_140=225:400
|
||||
portmap_144=233:400
|
||||
portmap_148=241:400
|
||||
portmap_152=249:400
|
||||
|
||||
# datapath port
|
||||
portmap_38=257:10
|
||||
portmap_118=258:10
|
||||
#portmap_38=257:10
|
||||
#portmap_118=258:10
|
||||
|
||||
# loopback port
|
||||
portmap_19=260:10
|
||||
@ -71,41 +76,165 @@ portmap_159=266:10
|
||||
|
||||
# port order remap
|
||||
dport_map_port_20=1
|
||||
dport_map_port_13=2
|
||||
dport_map_port_28=3
|
||||
dport_map_port_32=4
|
||||
dport_map_port_40=5
|
||||
dport_map_port_44=6
|
||||
dport_map_port_48=7
|
||||
dport_map_port_52=8
|
||||
dport_map_port_9=9
|
||||
dport_map_port_60=10
|
||||
dport_map_port_5=11
|
||||
dport_map_port_24=12
|
||||
dport_map_port_68=13
|
||||
dport_map_port_64=14
|
||||
dport_map_port_72=15
|
||||
dport_map_port_1=16
|
||||
dport_map_port_21=2
|
||||
dport_map_port_22=3
|
||||
dport_map_port_23=4
|
||||
|
||||
dport_map_port_84=17
|
||||
dport_map_port_80=18
|
||||
dport_map_port_148=19
|
||||
dport_map_port_152=20
|
||||
dport_map_port_140=21
|
||||
dport_map_port_88=22
|
||||
dport_map_port_92=23
|
||||
dport_map_port_144=24
|
||||
dport_map_port_100=25
|
||||
dport_map_port_104=26
|
||||
dport_map_port_108=27
|
||||
dport_map_port_112=28
|
||||
dport_map_port_120=29
|
||||
dport_map_port_124=30
|
||||
dport_map_port_128=31
|
||||
dport_map_port_132=32
|
||||
dport_map_port_13=5
|
||||
dport_map_port_14=6
|
||||
dport_map_port_15=7
|
||||
dport_map_port_16=8
|
||||
|
||||
dport_map_port_38=33
|
||||
dport_map_port_118=34
|
||||
dport_map_port_28=9
|
||||
dport_map_port_29=10
|
||||
dport_map_port_30=11
|
||||
dport_map_port_31=12
|
||||
|
||||
dport_map_port_32=13
|
||||
dport_map_port_33=14
|
||||
dport_map_port_34=15
|
||||
dport_map_port_35=16
|
||||
|
||||
dport_map_port_40=17
|
||||
dport_map_port_41=18
|
||||
dport_map_port_42=19
|
||||
dport_map_port_43=20
|
||||
|
||||
dport_map_port_44=21
|
||||
dport_map_port_45=22
|
||||
dport_map_port_46=23
|
||||
dport_map_port_47=24
|
||||
|
||||
dport_map_port_48=25
|
||||
dport_map_port_49=26
|
||||
dport_map_port_50=27
|
||||
dport_map_port_51=28
|
||||
|
||||
dport_map_port_52=29
|
||||
dport_map_port_53=30
|
||||
dport_map_port_54=31
|
||||
dport_map_port_55=32
|
||||
|
||||
dport_map_port_9=33
|
||||
dport_map_port_10=34
|
||||
dport_map_port_11=35
|
||||
dport_map_port_12=36
|
||||
|
||||
dport_map_port_60=37
|
||||
dport_map_port_61=38
|
||||
dport_map_port_62=39
|
||||
dport_map_port_63=40
|
||||
|
||||
dport_map_port_5=41
|
||||
dport_map_port_6=42
|
||||
dport_map_port_7=43
|
||||
dport_map_port_8=44
|
||||
|
||||
dport_map_port_24=45
|
||||
dport_map_port_25=46
|
||||
dport_map_port_26=47
|
||||
dport_map_port_27=48
|
||||
|
||||
dport_map_port_68=49
|
||||
dport_map_port_69=50
|
||||
dport_map_port_70=51
|
||||
dport_map_port_71=52
|
||||
|
||||
dport_map_port_64=53
|
||||
dport_map_port_65=54
|
||||
dport_map_port_66=55
|
||||
dport_map_port_67=56
|
||||
|
||||
dport_map_port_72=57
|
||||
dport_map_port_73=58
|
||||
dport_map_port_74=59
|
||||
dport_map_port_75=60
|
||||
|
||||
dport_map_port_1=61
|
||||
dport_map_port_2=62
|
||||
dport_map_port_3=63
|
||||
dport_map_port_4=64
|
||||
|
||||
dport_map_port_84=65
|
||||
dport_map_port_85=66
|
||||
dport_map_port_86=67
|
||||
dport_map_port_87=68
|
||||
|
||||
dport_map_port_80=69
|
||||
dport_map_port_81=70
|
||||
dport_map_port_82=71
|
||||
dport_map_port_83=72
|
||||
|
||||
dport_map_port_148=73
|
||||
dport_map_port_149=74
|
||||
dport_map_port_150=75
|
||||
dport_map_port_151=76
|
||||
|
||||
dport_map_port_152=77
|
||||
dport_map_port_153=78
|
||||
dport_map_port_154=79
|
||||
dport_map_port_155=80
|
||||
|
||||
dport_map_port_140=81
|
||||
dport_map_port_141=82
|
||||
dport_map_port_142=83
|
||||
dport_map_port_143=84
|
||||
|
||||
|
||||
dport_map_port_88=85
|
||||
dport_map_port_89=86
|
||||
dport_map_port_90=87
|
||||
dport_map_port_91=88
|
||||
|
||||
dport_map_port_92=89
|
||||
dport_map_port_93=90
|
||||
dport_map_port_94=91
|
||||
dport_map_port_95=92
|
||||
|
||||
dport_map_port_144=93
|
||||
dport_map_port_145=94
|
||||
dport_map_port_146=95
|
||||
dport_map_port_147=96
|
||||
|
||||
dport_map_port_100=97
|
||||
dport_map_port_101=98
|
||||
dport_map_port_102=99
|
||||
dport_map_port_103=100
|
||||
|
||||
dport_map_port_104=101
|
||||
dport_map_port_105=102
|
||||
dport_map_port_106=103
|
||||
dport_map_port_107=104
|
||||
|
||||
dport_map_port_108=105
|
||||
dport_map_port_109=106
|
||||
dport_map_port_110=107
|
||||
dport_map_port_111=108
|
||||
|
||||
dport_map_port_112=109
|
||||
dport_map_port_113=110
|
||||
dport_map_port_114=111
|
||||
dport_map_port_115=112
|
||||
|
||||
dport_map_port_120=113
|
||||
dport_map_port_121=114
|
||||
dport_map_port_122=115
|
||||
dport_map_port_123=116
|
||||
|
||||
dport_map_port_124=117
|
||||
dport_map_port_125=118
|
||||
dport_map_port_126=119
|
||||
dport_map_port_127=120
|
||||
|
||||
dport_map_port_128=121
|
||||
dport_map_port_129=122
|
||||
dport_map_port_130=123
|
||||
dport_map_port_131=124
|
||||
|
||||
dport_map_port_132=125
|
||||
dport_map_port_133=126
|
||||
dport_map_port_134=127
|
||||
dport_map_port_135=128
|
||||
|
||||
### lane swap and polarity follow front port order ###
|
||||
phy_chain_tx_lane_map_physical{33.0}=0x75206431
|
||||
@ -269,73 +398,3 @@ phy_chain_rx_lane_map_physical{217.0}=0x67541203
|
||||
serdes_core_rx_polarity_flip_physical{217}=0x33
|
||||
|
||||
|
||||
port_fec_20=9
|
||||
port_fec_13=9
|
||||
port_fec_28=9
|
||||
port_fec_32=9
|
||||
port_fec_40=9
|
||||
port_fec_44=9
|
||||
port_fec_48=9
|
||||
port_fec_52=9
|
||||
port_fec_9=9
|
||||
port_fec_60=9
|
||||
port_fec_5=9
|
||||
port_fec_24=9
|
||||
port_fec_68=9
|
||||
port_fec_64=9
|
||||
port_fec_72=9
|
||||
port_fec_1=9
|
||||
|
||||
port_fec_84=9
|
||||
port_fec_80=9
|
||||
port_fec_148=9
|
||||
port_fec_152=9
|
||||
port_fec_140=9
|
||||
port_fec_88=9
|
||||
port_fec_92=9
|
||||
port_fec_144=9
|
||||
port_fec_100=9
|
||||
port_fec_104=9
|
||||
port_fec_108=9
|
||||
port_fec_112=9
|
||||
port_fec_120=9
|
||||
port_fec_124=9
|
||||
port_fec_128=9
|
||||
port_fec_132=9
|
||||
|
||||
|
||||
port_init_cl72_20=1
|
||||
port_init_cl72_13=1
|
||||
port_init_cl72_28=1
|
||||
port_init_cl72_32=1
|
||||
port_init_cl72_40=1
|
||||
port_init_cl72_44=1
|
||||
port_init_cl72_48=1
|
||||
port_init_cl72_52=1
|
||||
port_init_cl72_9=1
|
||||
port_init_cl72_60=1
|
||||
port_init_cl72_5=1
|
||||
port_init_cl72_24=1
|
||||
port_init_cl72_68=1
|
||||
port_init_cl72_64=1
|
||||
port_init_cl72_72=1
|
||||
port_init_cl72_1=1
|
||||
|
||||
port_init_cl72_84=1
|
||||
port_init_cl72_80=1
|
||||
port_init_cl72_148=1
|
||||
port_init_cl72_152=1
|
||||
port_init_cl72_140=1
|
||||
port_init_cl72_88=1
|
||||
port_init_cl72_92=1
|
||||
port_init_cl72_144=1
|
||||
port_init_cl72_100=1
|
||||
port_init_cl72_104=1
|
||||
port_init_cl72_108=1
|
||||
port_init_cl72_112=1
|
||||
port_init_cl72_120=1
|
||||
port_init_cl72_124=1
|
||||
port_init_cl72_128=1
|
||||
port_init_cl72_132=1
|
||||
|
||||
|
||||
|
||||
BIN
device/quanta/x86_64-quanta_ix9_bwde-r0/custom_led.bin
Normal file
BIN
device/quanta/x86_64-quanta_ix9_bwde-r0/custom_led.bin
Normal file
Binary file not shown.
Some files were not shown because too many files have changed in this diff Show More
Loading…
Reference in New Issue
Block a user