[Bookworm] Upgrade centec-arm64 platform to Bookworm. (#17411)

Why I did it
1. Upgrade centec-arm64 platform to Bookworm.
2. Solve the problem of compiling the docker-syncd-centec-rpc.gz error on the centec platform.

How I did it
1. Modified platform driver to comply with bookworm kernel.
2. Upgrade SONiC package versions of the centec platform.

How to verify it
1. Compile the centec-arm64 platform to generate sonic-centec-arm64.bin.
2. Compile the centec platform to generate docker-syncd-centec-rpc.gz.

Signed-off-by: centecqianj <qianj@centec.com>
This commit is contained in:
centecqianj 2023-12-08 00:42:13 +08:00 committed by GitHub
parent fef1346483
commit 8ec4b53451
No known key found for this signature in database
GPG Key ID: 4AEE18F83AFDEB23
10 changed files with 85 additions and 64 deletions

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@ -15,14 +15,14 @@ libarchive13==3.4.3-2+deb11u1
libasan6==10.2.1-6 libasan6==10.2.1-6
libbinutils==2.35.2-2 libbinutils==2.35.2-2
libboost-atomic1.74.0==1.74.0-9 libboost-atomic1.74.0==1.74.0-9
libc-dev-bin==2.31-13+deb11u6 libc-dev-bin==2.31-13+deb11u7
libc6-dev==2.31-13+deb11u6 libc6-dev==2.31-13+deb11u7
libcc1-0==10.2.1-6 libcc1-0==10.2.1-6
libcrypt-dev==1:4.4.18-4 libcrypt-dev==1:4.4.18-4
libctf-nobfd0==2.35.2-2 libctf-nobfd0==2.35.2-2
libctf0==2.35.2-2 libctf0==2.35.2-2
libdouble-conversion3==3.1.5-6.1 libdouble-conversion3==3.1.5-6.1
libdpkg-perl==1.20.12 libdpkg-perl==1.20.13
libexpat1-dev==2.2.10-2+deb11u5 libexpat1-dev==2.2.10-2+deb11u5
libffi-dev==3.3-6 libffi-dev==3.3-6
libgcc-10-dev==10.2.1-6 libgcc-10-dev==10.2.1-6
@ -39,17 +39,17 @@ libnsl-dev==1.3.0-2
libpcre2-16-0==10.36-2+deb11u1 libpcre2-16-0==10.36-2+deb11u1
libpython2-dev==2.7.18-3 libpython2-dev==2.7.18-3
libpython2-stdlib==2.7.18-3 libpython2-stdlib==2.7.18-3
libpython2.7==2.7.18-8 libpython2.7==2.7.18-8+deb11u1
libpython2.7-dev==2.7.18-8 libpython2.7-dev==2.7.18-8+deb11u1
libpython2.7-minimal==2.7.18-8 libpython2.7-minimal==2.7.18-8+deb11u1
libpython2.7-stdlib==2.7.18-8 libpython2.7-stdlib==2.7.18-8+deb11u1
libqt5core5a==5.15.2+dfsg-9 libqt5core5a==5.15.2+dfsg-9
libqt5dbus5==5.15.2+dfsg-9 libqt5dbus5==5.15.2+dfsg-9
libqt5network5==5.15.2+dfsg-9 libqt5network5==5.15.2+dfsg-9
libquadmath0==10.2.1-6 libquadmath0==10.2.1-6
librhash0==1.4.1-2 librhash0==1.4.1-2
libssl-dev==1.1.1n-0+deb11u5 libssl-dev==1.1.1w-0+deb11u1
libssl1.1==1.1.1n-0+deb11u5 libssl1.1==1.1.1w-0+deb11u1
libstdc++-10-dev==10.2.1-6 libstdc++-10-dev==10.2.1-6
libthrift-0.11.0==0.11.0-4 libthrift-0.11.0==0.11.0-4
libtirpc-dev==1.3.1-1+deb11u1 libtirpc-dev==1.3.1-1+deb11u1
@ -57,7 +57,7 @@ libtsan0==10.2.1-6
libubsan1==10.2.1-6 libubsan1==10.2.1-6
libuv1==1.40.0-2 libuv1==1.40.0-2
libxml2==2.9.10+dfsg-6.7+deb11u4 libxml2==2.9.10+dfsg-6.7+deb11u4
linux-libc-dev==5.10.191-1 linux-libc-dev==5.10.197-1
mailcap==3.69 mailcap==3.69
make==4.3-4.1 make==4.3-4.1
mime-support==3.66 mime-support==3.66
@ -70,9 +70,9 @@ python-setuptools==44.1.1-1
python2==2.7.18-3 python2==2.7.18-3
python2-dev==2.7.18-3 python2-dev==2.7.18-3
python2-minimal==2.7.18-3 python2-minimal==2.7.18-3
python2.7==2.7.18-8 python2.7==2.7.18-8+deb11u1
python2.7-dev==2.7.18-8 python2.7-dev==2.7.18-8+deb11u1
python2.7-minimal==2.7.18-8 python2.7-minimal==2.7.18-8+deb11u1
python3-pip==20.3.4-4+deb11u1 python3-pip==20.3.4-4+deb11u1
python3-pkg-resources==52.0.0-4 python3-pkg-resources==52.0.0-4
python3-setuptools==52.0.0-4 python3-setuptools==52.0.0-4

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@ -4,7 +4,7 @@ kmod==28-1
libbabeltrace1==1.5.8-1+b3 libbabeltrace1==1.5.8-1+b3
libboost-regex1.74.0==1.74.0-9 libboost-regex1.74.0==1.74.0-9
libcbor0==0.5.0+dfsg-2 libcbor0==0.5.0+dfsg-2
libcurl3-gnutls==7.74.0-1.3+deb11u7 libcurl3-gnutls==7.74.0-1.3+deb11u10
libdebuginfod1==0.183-1 libdebuginfod1==0.183-1
libdw1==0.183-1 libdw1==0.183-1
libedit2==3.1-20191231-2+b1 libedit2==3.1-20191231-2+b1
@ -24,7 +24,7 @@ libsource-highlight4v5==3.1.9-3+b1
libswsscommon-dbg==1.0.0 libswsscommon-dbg==1.0.0
libswsscommon-dbgsym==1.0.0 libswsscommon-dbgsym==1.0.0
libunwind8==1.3.2-2 libunwind8==1.3.2-2
openssh-client==1:8.4p1-5+deb11u1 openssh-client==1:8.4p1-5+deb11u2
sshpass==1.09-1+b1 sshpass==1.09-1+b1
strace==5.10-1 strace==5.10-1
syncd==1.0.0 syncd==1.0.0

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@ -180,7 +180,7 @@ static int fan_ctc5236_probe(struct platform_device *pdev)
for (idx = 0; idx < CTC_MAX_FAN; idx++) for (idx = 0; idx < CTC_MAX_FAN; idx++)
{ {
data->pwm[idx] = devm_of_pwm_get(&pdev->dev, pdev->dev.of_node, pwmnames[idx]); data->pwm[idx] = devm_pwm_get(&pdev->dev, pwmnames[idx]);
if (IS_ERR(data->pwm[idx])) { if (IS_ERR(data->pwm[idx])) {
dev_err(&pdev->dev, "Could not get PWM\n"); dev_err(&pdev->dev, "Could not get PWM\n");
return PTR_ERR(data->pwm[idx]); return PTR_ERR(data->pwm[idx]);

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@ -167,7 +167,7 @@ int mars1s_config_aneg(struct phy_device *phydev)
return 0; return 0;
} }
static int mars_ack_interrupt(struct phy_device *phydev) static irqreturn_t mars_handle_interrupt(struct phy_device *phydev)
{ {
int err; int err;
@ -178,9 +178,9 @@ static int mars_ack_interrupt(struct phy_device *phydev)
err = mars_ext_read(phydev, 0xa011); err = mars_ext_read(phydev, 0xa011);
#endif #endif
if (err < 0) if (err < 0)
return err; return IRQ_NONE;
return 0; return IRQ_HANDLED;
} }
static int mars_config_intr(struct phy_device *phydev) static int mars_config_intr(struct phy_device *phydev)
@ -256,7 +256,7 @@ static struct phy_driver ctc_drivers[] = {
.config_init = mars_config_init, .config_init = mars_config_init,
.features = PHY_GBIT_FEATURES, .features = PHY_GBIT_FEATURES,
.config_aneg = mars1s_config_aneg, .config_aneg = mars1s_config_aneg,
.ack_interrupt = &mars_ack_interrupt, .handle_interrupt = &mars_handle_interrupt,
.config_intr = &mars_config_intr, .config_intr = &mars_config_intr,
.read_status = genphy_read_status, .read_status = genphy_read_status,
.suspend = genphy_suspend, .suspend = genphy_suspend,
@ -269,7 +269,7 @@ static struct phy_driver ctc_drivers[] = {
.config_init = mars_config_init, .config_init = mars_config_init,
.features = PHY_GBIT_FEATURES, .features = PHY_GBIT_FEATURES,
.config_aneg = mars1s_config_aneg, .config_aneg = mars1s_config_aneg,
.ack_interrupt = &mars_ack_interrupt, .handle_interrupt = &mars_handle_interrupt,
.config_intr = &mars_config_intr, .config_intr = &mars_config_intr,
.read_status = genphy_read_status, .read_status = genphy_read_status,
.suspend = genphy_suspend, .suspend = genphy_suspend,
@ -282,7 +282,7 @@ static struct phy_driver ctc_drivers[] = {
.config_init = mars1p_config_init, .config_init = mars1p_config_init,
.features = PHY_GBIT_FEATURES, .features = PHY_GBIT_FEATURES,
.config_aneg = mars1s_config_aneg, .config_aneg = mars1s_config_aneg,
.ack_interrupt = &mars_ack_interrupt, .handle_interrupt = &mars_handle_interrupt,
.config_intr = &mars_config_intr, .config_intr = &mars_config_intr,
.read_status = genphy_read_status, .read_status = genphy_read_status,
.suspend = genphy_suspend, .suspend = genphy_suspend,
@ -295,7 +295,7 @@ static struct phy_driver ctc_drivers[] = {
.config_init = mars1p_config_init, .config_init = mars1p_config_init,
.features = PHY_GBIT_FEATURES, .features = PHY_GBIT_FEATURES,
.config_aneg = mars1s_config_aneg, .config_aneg = mars1s_config_aneg,
.ack_interrupt = &mars_ack_interrupt, .handle_interrupt = &mars_handle_interrupt,
.config_intr = &mars_config_intr, .config_intr = &mars_config_intr,
.read_status = genphy_read_status, .read_status = genphy_read_status,
.suspend = genphy_suspend, .suspend = genphy_suspend,

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@ -278,7 +278,6 @@ static int ctc_switch_probe(struct platform_device *pdev)
struct resource *iomem; struct resource *iomem;
void __iomem *ioaddr; void __iomem *ioaddr;
resource_size_t start; resource_size_t start;
uint val;
iomem = platform_get_resource(pdev, IORESOURCE_MEM, 0); iomem = platform_get_resource(pdev, IORESOURCE_MEM, 0);

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@ -267,7 +267,7 @@ static int ctcmac_of_init(struct platform_device *ofdev,
{ {
u32 val; u32 val;
int err = 0, index, int_coalesce; int err = 0, index, int_coalesce;
const void *mac_addr; u8 mac_addr[ETH_ALEN];
const char *ctype, *automode, *dfe, *int_type, *tx_inv, *rx_inv; const char *ctype, *automode, *dfe, *int_type, *tx_inv, *rx_inv;
struct net_device *dev = NULL; struct net_device *dev = NULL;
struct ctcmac_private *priv = NULL; struct ctcmac_private *priv = NULL;
@ -313,10 +313,10 @@ static int ctcmac_of_init(struct platform_device *ofdev,
else else
priv->index = 0; priv->index = 0;
mac_addr = of_get_mac_address(np); err = of_get_mac_address(np, mac_addr);
if (!err) {
if (!IS_ERR(mac_addr))
memcpy(dev->dev_addr, mac_addr, ETH_ALEN); memcpy(dev->dev_addr, mac_addr, ETH_ALEN);
}
err = of_property_read_string(np, "int-type", &int_type); err = of_property_read_string(np, "int-type", &int_type);
if ((err == 0) && !strncmp(int_type, "desc", 4)) { if ((err == 0) && !strncmp(int_type, "desc", 4)) {
@ -977,7 +977,7 @@ static int ctc_mac_serdes_init(struct ctcmac_private *priv)
static void ctcmac_mac_filter_init(struct ctcmac_private *priv) static void ctcmac_mac_filter_init(struct ctcmac_private *priv)
{ {
unsigned char *dev_addr; const unsigned char *dev_addr;
u32 val, addr_h = 0, addr_l = 0; u32 val, addr_h = 0, addr_l = 0;
if (priv->version == 0) if (priv->version == 0)
@ -3147,7 +3147,9 @@ static void ctcmac_get_regs(struct net_device *dev, struct ethtool_regs *regs,
* rx, rx_mini, and rx_jumbo rings are the same size, as mini and * rx, rx_mini, and rx_jumbo rings are the same size, as mini and
* jumbo are ignored by the driver */ * jumbo are ignored by the driver */
static void ctcmac_gringparam(struct net_device *dev, static void ctcmac_gringparam(struct net_device *dev,
struct ethtool_ringparam *rvals) struct ethtool_ringparam *rvals,
struct kernel_ethtool_ringparam *kernel_ring,
struct netlink_ext_ack *extack)
{ {
struct ctcmac_private *priv = netdev_priv(dev); struct ctcmac_private *priv = netdev_priv(dev);
struct ctcmac_priv_tx_q *tx_queue = NULL; struct ctcmac_priv_tx_q *tx_queue = NULL;
@ -3174,7 +3176,9 @@ static void ctcmac_gringparam(struct net_device *dev,
* necessary so that we don't mess things up while we're in motion. * necessary so that we don't mess things up while we're in motion.
*/ */
static int ctcmac_sringparam(struct net_device *dev, static int ctcmac_sringparam(struct net_device *dev,
struct ethtool_ringparam *rvals) struct ethtool_ringparam *rvals,
struct kernel_ethtool_ringparam *kernel_ring,
struct netlink_ext_ack *extack)
{ {
struct ctcmac_private *priv = netdev_priv(dev); struct ctcmac_private *priv = netdev_priv(dev);
int err = 0, i; int err = 0, i;
@ -3492,16 +3496,16 @@ static int ctcmac_probe(struct platform_device *ofdev)
dev->ethtool_ops = &ctcmac_ethtool_ops; dev->ethtool_ops = &ctcmac_ethtool_ops;
if (priv->version == 0) { if (priv->version == 0) {
netif_napi_add(dev, &priv->napi_rx, ctcmac_poll_rx_sq, netif_napi_add_weight(dev, &priv->napi_rx, ctcmac_poll_rx_sq,
CTCMAC_NAIP_RX_WEIGHT); CTCMAC_NAIP_RX_WEIGHT);
netif_napi_add(dev, &priv->napi_tx, ctcmac_poll_tx_sq, netif_napi_add_weight(dev, &priv->napi_tx, ctcmac_poll_tx_sq,
CTCMAC_NAIP_TX_WEIGHT); CTCMAC_NAIP_TX_WEIGHT);
} else { } else {
netif_napi_add(dev, &priv->napi_rx, ctcmac_poll_rx0_sq, netif_napi_add_weight(dev, &priv->napi_rx, ctcmac_poll_rx0_sq,
CTCMAC_NAIP_RX_WEIGHT); CTCMAC_NAIP_RX_WEIGHT);
netif_napi_add(dev, &priv->napi_rx1, ctcmac_poll_rx1_sq, netif_napi_add_weight(dev, &priv->napi_rx1, ctcmac_poll_rx1_sq,
CTCMAC_NAIP_RX_WEIGHT); CTCMAC_NAIP_RX_WEIGHT);
netif_napi_add(dev, &priv->napi_tx, ctcmac_poll_tx_sq, netif_napi_add_weight(dev, &priv->napi_tx, ctcmac_poll_tx_sq,
CTCMAC_NAIP_TX_WEIGHT); CTCMAC_NAIP_TX_WEIGHT);
} }

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@ -34,6 +34,8 @@
#define DWAPB_MAX_PORTS 2 #define DWAPB_MAX_PORTS 2
static DEFINE_SPINLOCK(ctcgpio_lock);
struct ctcapb_gpio; struct ctcapb_gpio;
static u32 soc_v; static u32 soc_v;
@ -118,9 +120,9 @@ static void ctcapb_irq_enable(struct irq_data *d)
struct gpio_chip *gc = &port->gc; struct gpio_chip *gc = &port->gc;
unsigned long flags; unsigned long flags;
spin_lock_irqsave(&gc->bgpio_lock, flags); spin_lock_irqsave(&ctcgpio_lock, flags);
clrsetbits(&port->regs->GpioIntrEn, 0, BIT(d->hwirq)); clrsetbits(&port->regs->GpioIntrEn, 0, BIT(d->hwirq));
spin_unlock_irqrestore(&gc->bgpio_lock, flags); spin_unlock_irqrestore(&ctcgpio_lock, flags);
} }
extern void irq_gc_mask_clr_bit(struct irq_data *d); extern void irq_gc_mask_clr_bit(struct irq_data *d);
@ -139,9 +141,9 @@ static void ctcapb_irq_disable(struct irq_data *d)
struct gpio_chip *gc = &port->gc; struct gpio_chip *gc = &port->gc;
unsigned long flags; unsigned long flags;
spin_lock_irqsave(&gc->bgpio_lock, flags); spin_lock_irqsave(&ctcgpio_lock, flags);
clrsetbits(&port->regs->GpioIntrEn, ~BIT(d->hwirq), 0); clrsetbits(&port->regs->GpioIntrEn, ~BIT(d->hwirq), 0);
spin_unlock_irqrestore(&gc->bgpio_lock, flags); spin_unlock_irqrestore(&ctcgpio_lock, flags);
} }
#endif #endif
@ -180,7 +182,7 @@ static int ctcapb_irq_set_type(struct irq_data *d, u32 type)
IRQ_TYPE_LEVEL_HIGH | IRQ_TYPE_LEVEL_LOW)) IRQ_TYPE_LEVEL_HIGH | IRQ_TYPE_LEVEL_LOW))
return -EINVAL; return -EINVAL;
spin_lock_irqsave(&gc->bgpio_lock, flags); spin_lock_irqsave(&ctcgpio_lock, flags);
level = readl(&port->regs->GpioIntrLevel); level = readl(&port->regs->GpioIntrLevel);
polarity = readl(&port->regs->GpioIntrPolarity); polarity = readl(&port->regs->GpioIntrPolarity);
@ -226,7 +228,7 @@ static int ctcapb_irq_set_type(struct irq_data *d, u32 type)
writel(level, &port->regs->GpioIntrLevel); writel(level, &port->regs->GpioIntrLevel);
writel(polarity, &port->regs->GpioIntrPolarity); writel(polarity, &port->regs->GpioIntrPolarity);
spin_unlock_irqrestore(&gc->bgpio_lock, flags); spin_unlock_irqrestore(&ctcgpio_lock, flags);
return 0; return 0;
} }
@ -238,7 +240,7 @@ static int ctcapb_gpio_set_debounce(struct gpio_chip *gc,
unsigned long flags, val_deb; unsigned long flags, val_deb;
unsigned long mask = BIT(offset); unsigned long mask = BIT(offset);
spin_lock_irqsave(&gc->bgpio_lock, flags); spin_lock_irqsave(&ctcgpio_lock, flags);
val_deb = readl(&port->regs->GpioDebCtl); val_deb = readl(&port->regs->GpioDebCtl);
if (debounce) if (debounce)
@ -246,7 +248,7 @@ static int ctcapb_gpio_set_debounce(struct gpio_chip *gc,
else else
writel(val_deb & ~mask, &port->regs->GpioDebCtl); writel(val_deb & ~mask, &port->regs->GpioDebCtl);
spin_unlock_irqrestore(&gc->bgpio_lock, flags); spin_unlock_irqrestore(&ctcgpio_lock, flags);
return 0; return 0;
} }

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@ -133,7 +133,33 @@ static void ctc_pwm_disable(struct pwm_chip *chip, struct pwm_device *pwm)
ctc_pwm_writel(pc, pwm->hwpwm, CTC_CR_PWM, cur_value); ctc_pwm_writel(pc, pwm->hwpwm, CTC_CR_PWM, cur_value);
} }
static void ctc_pwm_get_state(struct pwm_chip *chip, struct pwm_device *pwm, static int ctc_pwm_apply(struct pwm_chip *chip, struct pwm_device *pwm,
const struct pwm_state *state)
{
int err;
if (state->polarity != PWM_POLARITY_NORMAL)
return -EINVAL;
if (!state->enabled)
{
if(pwm->state.enabled)
ctc_pwm_disable(chip,pwm);
return 0;
}
err = ctc_pwm_config(pwm->chip, pwm, state->duty_cycle, state->period);
if (err)
return err;
if (!pwm->state.enabled)
err = ctc_pwm_enable(chip, pwm);
return err;
}
static int ctc_pwm_get_state(struct pwm_chip *chip, struct pwm_device *pwm,
struct pwm_state *state) struct pwm_state *state)
{ {
struct ctc_pwm_chip *pc = to_ctc_pwm_chip(chip); struct ctc_pwm_chip *pc = to_ctc_pwm_chip(chip);
@ -154,6 +180,8 @@ static void ctc_pwm_get_state(struct pwm_chip *chip, struct pwm_device *pwm,
cur_value_2 = ctc_pwm_readl(pc, pwm->hwpwm, CTC_DUTY_PWM); cur_value_2 = ctc_pwm_readl(pc, pwm->hwpwm, CTC_DUTY_PWM);
state->duty_cycle = cur_value_2 * 1000; // in nanoseconds state->duty_cycle = cur_value_2 * 1000; // in nanoseconds
return 0;
} }
static int ctc_pwm_capture(struct pwm_chip *chip, struct pwm_device *pwm, static int ctc_pwm_capture(struct pwm_chip *chip, struct pwm_device *pwm,
@ -173,9 +201,9 @@ static int ctc_pwm_capture(struct pwm_chip *chip, struct pwm_device *pwm,
} }
static const struct pwm_ops ctc_pwm_ops = { static const struct pwm_ops ctc_pwm_ops = {
.config = ctc_pwm_config, .apply = ctc_pwm_apply,
.enable = ctc_pwm_enable, //.enable = ctc_pwm_enable,
.disable = ctc_pwm_disable, //.disable = ctc_pwm_disable,
.get_state = ctc_pwm_get_state, .get_state = ctc_pwm_get_state,
.capture = ctc_pwm_capture, .capture = ctc_pwm_capture,
.owner = THIS_MODULE, .owner = THIS_MODULE,
@ -225,7 +253,7 @@ static int ctc_pwm_probe(struct platform_device *pdev)
return 0; return 0;
} }
static int ctc_pwm_remove(struct platform_device *pdev) static void ctc_pwm_remove(struct platform_device *pdev)
{ {
struct ctc_pwm_chip *pc = platform_get_drvdata(pdev); struct ctc_pwm_chip *pc = platform_get_drvdata(pdev);
int i; int i;
@ -233,7 +261,7 @@ static int ctc_pwm_remove(struct platform_device *pdev)
for (i = 0; i < CTC_NUM_PWM; i++) for (i = 0; i < CTC_NUM_PWM; i++)
pwm_disable(&pc->chip.pwms[i]); pwm_disable(&pc->chip.pwms[i]);
return pwmchip_remove(&pc->chip); pwmchip_remove(&pc->chip);
} }
static const struct of_device_id ctc_pwm_of_match[] = { static const struct of_device_id ctc_pwm_of_match[] = {
@ -249,7 +277,7 @@ static struct platform_driver ctc_pwm_driver = {
.of_match_table = ctc_pwm_of_match, .of_match_table = ctc_pwm_of_match,
}, },
.probe = ctc_pwm_probe, .probe = ctc_pwm_probe,
.remove = ctc_pwm_remove, .remove_new = ctc_pwm_remove,
}; };
module_platform_driver(ctc_pwm_driver); module_platform_driver(ctc_pwm_driver);

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@ -180,17 +180,6 @@ static int sd2405_rtc_set_time(struct device *dev, struct rtc_time *tm)
return sd2405_i2c_set_time(to_i2c_client(dev), tm); return sd2405_i2c_set_time(to_i2c_client(dev), tm);
} }
static int sd2405_remove(struct i2c_client *client)
{
#if 0
struct rtc_device *rtc = i2c_get_clientdata(client);
if (rtc)
rtc_device_unregister(rtc);
#endif
return 0;
}
static const struct rtc_class_ops sd2405_rtc_ops = { static const struct rtc_class_ops sd2405_rtc_ops = {
.read_time = sd2405_rtc_read_time, .read_time = sd2405_rtc_read_time,
.set_time = sd2405_rtc_set_time, .set_time = sd2405_rtc_set_time,
@ -229,7 +218,6 @@ static struct i2c_driver sd2405_driver = {
.name = "rtc-sd2405", .name = "rtc-sd2405",
}, },
.probe = sd2405_probe, .probe = sd2405_probe,
.remove = sd2405_remove,
.id_table = sd2405_id, .id_table = sd2405_id,
}; };

View File

@ -327,7 +327,7 @@ static int sdhci_ctc5236_probe(struct platform_device *pdev)
version = (val == 0x1) ? CTC_REV_TM_1_1 : CTC_REV_TM_1_0; version = (val == 0x1) ? CTC_REV_TM_1_1 : CTC_REV_TM_1_0;
mmc_of_parse_voltage(pdev->dev.of_node, &host->ocr_mask); mmc_of_parse_voltage(host->mmc, &host->ocr_mask);
ret = mmc_of_parse(host->mmc); ret = mmc_of_parse(host->mmc);
if (ret) if (ret)