[Bookworm] Upgrade centec-arm64 platform to Bookworm. (#17411)
Why I did it 1. Upgrade centec-arm64 platform to Bookworm. 2. Solve the problem of compiling the docker-syncd-centec-rpc.gz error on the centec platform. How I did it 1. Modified platform driver to comply with bookworm kernel. 2. Upgrade SONiC package versions of the centec platform. How to verify it 1. Compile the centec-arm64 platform to generate sonic-centec-arm64.bin. 2. Compile the centec platform to generate docker-syncd-centec-rpc.gz. Signed-off-by: centecqianj <qianj@centec.com>
This commit is contained in:
parent
fef1346483
commit
8ec4b53451
26
files/build/versions/dockers/docker-syncd-centec-rpc/versions-deb-bullseye
Normal file → Executable file
26
files/build/versions/dockers/docker-syncd-centec-rpc/versions-deb-bullseye
Normal file → Executable file
@ -15,14 +15,14 @@ libarchive13==3.4.3-2+deb11u1
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libasan6==10.2.1-6
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libbinutils==2.35.2-2
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libboost-atomic1.74.0==1.74.0-9
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libc-dev-bin==2.31-13+deb11u6
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libc6-dev==2.31-13+deb11u6
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libc-dev-bin==2.31-13+deb11u7
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libc6-dev==2.31-13+deb11u7
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libcc1-0==10.2.1-6
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libcrypt-dev==1:4.4.18-4
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libctf-nobfd0==2.35.2-2
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libctf0==2.35.2-2
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libdouble-conversion3==3.1.5-6.1
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libdpkg-perl==1.20.12
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libdpkg-perl==1.20.13
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libexpat1-dev==2.2.10-2+deb11u5
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libffi-dev==3.3-6
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libgcc-10-dev==10.2.1-6
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@ -39,17 +39,17 @@ libnsl-dev==1.3.0-2
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libpcre2-16-0==10.36-2+deb11u1
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libpython2-dev==2.7.18-3
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libpython2-stdlib==2.7.18-3
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libpython2.7==2.7.18-8
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libpython2.7-dev==2.7.18-8
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libpython2.7-minimal==2.7.18-8
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libpython2.7-stdlib==2.7.18-8
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libpython2.7==2.7.18-8+deb11u1
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libpython2.7-dev==2.7.18-8+deb11u1
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libpython2.7-minimal==2.7.18-8+deb11u1
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libpython2.7-stdlib==2.7.18-8+deb11u1
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libqt5core5a==5.15.2+dfsg-9
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libqt5dbus5==5.15.2+dfsg-9
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libqt5network5==5.15.2+dfsg-9
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libquadmath0==10.2.1-6
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librhash0==1.4.1-2
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libssl-dev==1.1.1n-0+deb11u5
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libssl1.1==1.1.1n-0+deb11u5
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libssl-dev==1.1.1w-0+deb11u1
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libssl1.1==1.1.1w-0+deb11u1
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libstdc++-10-dev==10.2.1-6
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libthrift-0.11.0==0.11.0-4
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libtirpc-dev==1.3.1-1+deb11u1
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@ -57,7 +57,7 @@ libtsan0==10.2.1-6
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libubsan1==10.2.1-6
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libuv1==1.40.0-2
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libxml2==2.9.10+dfsg-6.7+deb11u4
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linux-libc-dev==5.10.191-1
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linux-libc-dev==5.10.197-1
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mailcap==3.69
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make==4.3-4.1
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mime-support==3.66
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@ -70,9 +70,9 @@ python-setuptools==44.1.1-1
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python2==2.7.18-3
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python2-dev==2.7.18-3
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python2-minimal==2.7.18-3
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python2.7==2.7.18-8
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python2.7-dev==2.7.18-8
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python2.7-minimal==2.7.18-8
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python2.7==2.7.18-8+deb11u1
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python2.7-dev==2.7.18-8+deb11u1
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python2.7-minimal==2.7.18-8+deb11u1
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python3-pip==20.3.4-4+deb11u1
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python3-pkg-resources==52.0.0-4
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python3-setuptools==52.0.0-4
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4
files/build/versions/dockers/docker-syncd-centec/versions-deb-bullseye
Normal file → Executable file
4
files/build/versions/dockers/docker-syncd-centec/versions-deb-bullseye
Normal file → Executable file
@ -4,7 +4,7 @@ kmod==28-1
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libbabeltrace1==1.5.8-1+b3
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libboost-regex1.74.0==1.74.0-9
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libcbor0==0.5.0+dfsg-2
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libcurl3-gnutls==7.74.0-1.3+deb11u7
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libcurl3-gnutls==7.74.0-1.3+deb11u10
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libdebuginfod1==0.183-1
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libdw1==0.183-1
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libedit2==3.1-20191231-2+b1
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@ -24,7 +24,7 @@ libsource-highlight4v5==3.1.9-3+b1
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libswsscommon-dbg==1.0.0
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libswsscommon-dbgsym==1.0.0
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libunwind8==1.3.2-2
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openssh-client==1:8.4p1-5+deb11u1
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openssh-client==1:8.4p1-5+deb11u2
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sshpass==1.09-1+b1
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strace==5.10-1
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syncd==1.0.0
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@ -180,7 +180,7 @@ static int fan_ctc5236_probe(struct platform_device *pdev)
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for (idx = 0; idx < CTC_MAX_FAN; idx++)
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{
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data->pwm[idx] = devm_of_pwm_get(&pdev->dev, pdev->dev.of_node, pwmnames[idx]);
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data->pwm[idx] = devm_pwm_get(&pdev->dev, pwmnames[idx]);
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if (IS_ERR(data->pwm[idx])) {
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dev_err(&pdev->dev, "Could not get PWM\n");
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return PTR_ERR(data->pwm[idx]);
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@ -167,7 +167,7 @@ int mars1s_config_aneg(struct phy_device *phydev)
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return 0;
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}
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static int mars_ack_interrupt(struct phy_device *phydev)
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static irqreturn_t mars_handle_interrupt(struct phy_device *phydev)
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{
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int err;
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@ -178,9 +178,9 @@ static int mars_ack_interrupt(struct phy_device *phydev)
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err = mars_ext_read(phydev, 0xa011);
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#endif
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if (err < 0)
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return err;
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return IRQ_NONE;
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return 0;
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return IRQ_HANDLED;
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}
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static int mars_config_intr(struct phy_device *phydev)
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@ -256,7 +256,7 @@ static struct phy_driver ctc_drivers[] = {
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.config_init = mars_config_init,
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.features = PHY_GBIT_FEATURES,
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.config_aneg = mars1s_config_aneg,
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.ack_interrupt = &mars_ack_interrupt,
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.handle_interrupt = &mars_handle_interrupt,
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.config_intr = &mars_config_intr,
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.read_status = genphy_read_status,
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.suspend = genphy_suspend,
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@ -269,7 +269,7 @@ static struct phy_driver ctc_drivers[] = {
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.config_init = mars_config_init,
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.features = PHY_GBIT_FEATURES,
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.config_aneg = mars1s_config_aneg,
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.ack_interrupt = &mars_ack_interrupt,
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.handle_interrupt = &mars_handle_interrupt,
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.config_intr = &mars_config_intr,
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.read_status = genphy_read_status,
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.suspend = genphy_suspend,
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@ -282,7 +282,7 @@ static struct phy_driver ctc_drivers[] = {
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.config_init = mars1p_config_init,
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.features = PHY_GBIT_FEATURES,
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.config_aneg = mars1s_config_aneg,
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.ack_interrupt = &mars_ack_interrupt,
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.handle_interrupt = &mars_handle_interrupt,
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.config_intr = &mars_config_intr,
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.read_status = genphy_read_status,
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.suspend = genphy_suspend,
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@ -295,7 +295,7 @@ static struct phy_driver ctc_drivers[] = {
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.config_init = mars1p_config_init,
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.features = PHY_GBIT_FEATURES,
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.config_aneg = mars1s_config_aneg,
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.ack_interrupt = &mars_ack_interrupt,
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.handle_interrupt = &mars_handle_interrupt,
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.config_intr = &mars_config_intr,
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.read_status = genphy_read_status,
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.suspend = genphy_suspend,
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@ -278,7 +278,6 @@ static int ctc_switch_probe(struct platform_device *pdev)
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struct resource *iomem;
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void __iomem *ioaddr;
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resource_size_t start;
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uint val;
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iomem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
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@ -267,7 +267,7 @@ static int ctcmac_of_init(struct platform_device *ofdev,
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{
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u32 val;
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int err = 0, index, int_coalesce;
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const void *mac_addr;
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u8 mac_addr[ETH_ALEN];
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const char *ctype, *automode, *dfe, *int_type, *tx_inv, *rx_inv;
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struct net_device *dev = NULL;
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struct ctcmac_private *priv = NULL;
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@ -313,10 +313,10 @@ static int ctcmac_of_init(struct platform_device *ofdev,
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else
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priv->index = 0;
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mac_addr = of_get_mac_address(np);
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if (!IS_ERR(mac_addr))
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err = of_get_mac_address(np, mac_addr);
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if (!err) {
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memcpy(dev->dev_addr, mac_addr, ETH_ALEN);
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}
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err = of_property_read_string(np, "int-type", &int_type);
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if ((err == 0) && !strncmp(int_type, "desc", 4)) {
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@ -977,7 +977,7 @@ static int ctc_mac_serdes_init(struct ctcmac_private *priv)
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static void ctcmac_mac_filter_init(struct ctcmac_private *priv)
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{
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unsigned char *dev_addr;
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const unsigned char *dev_addr;
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u32 val, addr_h = 0, addr_l = 0;
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if (priv->version == 0)
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@ -3147,7 +3147,9 @@ static void ctcmac_get_regs(struct net_device *dev, struct ethtool_regs *regs,
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* rx, rx_mini, and rx_jumbo rings are the same size, as mini and
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* jumbo are ignored by the driver */
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static void ctcmac_gringparam(struct net_device *dev,
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struct ethtool_ringparam *rvals)
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struct ethtool_ringparam *rvals,
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struct kernel_ethtool_ringparam *kernel_ring,
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struct netlink_ext_ack *extack)
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{
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struct ctcmac_private *priv = netdev_priv(dev);
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struct ctcmac_priv_tx_q *tx_queue = NULL;
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@ -3174,7 +3176,9 @@ static void ctcmac_gringparam(struct net_device *dev,
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* necessary so that we don't mess things up while we're in motion.
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*/
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static int ctcmac_sringparam(struct net_device *dev,
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struct ethtool_ringparam *rvals)
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struct ethtool_ringparam *rvals,
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struct kernel_ethtool_ringparam *kernel_ring,
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struct netlink_ext_ack *extack)
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{
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struct ctcmac_private *priv = netdev_priv(dev);
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int err = 0, i;
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@ -3492,16 +3496,16 @@ static int ctcmac_probe(struct platform_device *ofdev)
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dev->ethtool_ops = &ctcmac_ethtool_ops;
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if (priv->version == 0) {
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netif_napi_add(dev, &priv->napi_rx, ctcmac_poll_rx_sq,
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netif_napi_add_weight(dev, &priv->napi_rx, ctcmac_poll_rx_sq,
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CTCMAC_NAIP_RX_WEIGHT);
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netif_napi_add(dev, &priv->napi_tx, ctcmac_poll_tx_sq,
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netif_napi_add_weight(dev, &priv->napi_tx, ctcmac_poll_tx_sq,
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CTCMAC_NAIP_TX_WEIGHT);
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} else {
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netif_napi_add(dev, &priv->napi_rx, ctcmac_poll_rx0_sq,
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netif_napi_add_weight(dev, &priv->napi_rx, ctcmac_poll_rx0_sq,
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CTCMAC_NAIP_RX_WEIGHT);
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netif_napi_add(dev, &priv->napi_rx1, ctcmac_poll_rx1_sq,
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netif_napi_add_weight(dev, &priv->napi_rx1, ctcmac_poll_rx1_sq,
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CTCMAC_NAIP_RX_WEIGHT);
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netif_napi_add(dev, &priv->napi_tx, ctcmac_poll_tx_sq,
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netif_napi_add_weight(dev, &priv->napi_tx, ctcmac_poll_tx_sq,
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CTCMAC_NAIP_TX_WEIGHT);
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}
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@ -34,6 +34,8 @@
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#define DWAPB_MAX_PORTS 2
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static DEFINE_SPINLOCK(ctcgpio_lock);
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struct ctcapb_gpio;
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static u32 soc_v;
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@ -118,9 +120,9 @@ static void ctcapb_irq_enable(struct irq_data *d)
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struct gpio_chip *gc = &port->gc;
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unsigned long flags;
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spin_lock_irqsave(&gc->bgpio_lock, flags);
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spin_lock_irqsave(&ctcgpio_lock, flags);
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clrsetbits(&port->regs->GpioIntrEn, 0, BIT(d->hwirq));
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spin_unlock_irqrestore(&gc->bgpio_lock, flags);
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spin_unlock_irqrestore(&ctcgpio_lock, flags);
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}
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extern void irq_gc_mask_clr_bit(struct irq_data *d);
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@ -139,9 +141,9 @@ static void ctcapb_irq_disable(struct irq_data *d)
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struct gpio_chip *gc = &port->gc;
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unsigned long flags;
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spin_lock_irqsave(&gc->bgpio_lock, flags);
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spin_lock_irqsave(&ctcgpio_lock, flags);
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clrsetbits(&port->regs->GpioIntrEn, ~BIT(d->hwirq), 0);
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spin_unlock_irqrestore(&gc->bgpio_lock, flags);
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spin_unlock_irqrestore(&ctcgpio_lock, flags);
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}
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#endif
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@ -180,7 +182,7 @@ static int ctcapb_irq_set_type(struct irq_data *d, u32 type)
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IRQ_TYPE_LEVEL_HIGH | IRQ_TYPE_LEVEL_LOW))
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return -EINVAL;
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spin_lock_irqsave(&gc->bgpio_lock, flags);
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spin_lock_irqsave(&ctcgpio_lock, flags);
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level = readl(&port->regs->GpioIntrLevel);
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polarity = readl(&port->regs->GpioIntrPolarity);
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@ -226,7 +228,7 @@ static int ctcapb_irq_set_type(struct irq_data *d, u32 type)
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writel(level, &port->regs->GpioIntrLevel);
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writel(polarity, &port->regs->GpioIntrPolarity);
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spin_unlock_irqrestore(&gc->bgpio_lock, flags);
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spin_unlock_irqrestore(&ctcgpio_lock, flags);
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return 0;
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}
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@ -238,7 +240,7 @@ static int ctcapb_gpio_set_debounce(struct gpio_chip *gc,
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unsigned long flags, val_deb;
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unsigned long mask = BIT(offset);
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spin_lock_irqsave(&gc->bgpio_lock, flags);
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spin_lock_irqsave(&ctcgpio_lock, flags);
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val_deb = readl(&port->regs->GpioDebCtl);
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if (debounce)
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@ -246,7 +248,7 @@ static int ctcapb_gpio_set_debounce(struct gpio_chip *gc,
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else
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writel(val_deb & ~mask, &port->regs->GpioDebCtl);
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spin_unlock_irqrestore(&gc->bgpio_lock, flags);
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spin_unlock_irqrestore(&ctcgpio_lock, flags);
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return 0;
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}
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|
@ -133,7 +133,33 @@ static void ctc_pwm_disable(struct pwm_chip *chip, struct pwm_device *pwm)
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ctc_pwm_writel(pc, pwm->hwpwm, CTC_CR_PWM, cur_value);
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}
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static void ctc_pwm_get_state(struct pwm_chip *chip, struct pwm_device *pwm,
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static int ctc_pwm_apply(struct pwm_chip *chip, struct pwm_device *pwm,
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const struct pwm_state *state)
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{
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int err;
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if (state->polarity != PWM_POLARITY_NORMAL)
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return -EINVAL;
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if (!state->enabled)
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{
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if(pwm->state.enabled)
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ctc_pwm_disable(chip,pwm);
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return 0;
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}
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err = ctc_pwm_config(pwm->chip, pwm, state->duty_cycle, state->period);
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if (err)
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return err;
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if (!pwm->state.enabled)
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err = ctc_pwm_enable(chip, pwm);
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return err;
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}
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static int ctc_pwm_get_state(struct pwm_chip *chip, struct pwm_device *pwm,
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struct pwm_state *state)
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{
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struct ctc_pwm_chip *pc = to_ctc_pwm_chip(chip);
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@ -154,6 +180,8 @@ static void ctc_pwm_get_state(struct pwm_chip *chip, struct pwm_device *pwm,
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cur_value_2 = ctc_pwm_readl(pc, pwm->hwpwm, CTC_DUTY_PWM);
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state->duty_cycle = cur_value_2 * 1000; // in nanoseconds
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return 0;
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}
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static int ctc_pwm_capture(struct pwm_chip *chip, struct pwm_device *pwm,
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@ -173,9 +201,9 @@ static int ctc_pwm_capture(struct pwm_chip *chip, struct pwm_device *pwm,
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}
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static const struct pwm_ops ctc_pwm_ops = {
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.config = ctc_pwm_config,
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.enable = ctc_pwm_enable,
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.disable = ctc_pwm_disable,
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.apply = ctc_pwm_apply,
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//.enable = ctc_pwm_enable,
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//.disable = ctc_pwm_disable,
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.get_state = ctc_pwm_get_state,
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.capture = ctc_pwm_capture,
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.owner = THIS_MODULE,
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@ -225,7 +253,7 @@ static int ctc_pwm_probe(struct platform_device *pdev)
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return 0;
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}
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static int ctc_pwm_remove(struct platform_device *pdev)
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static void ctc_pwm_remove(struct platform_device *pdev)
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{
|
||||
struct ctc_pwm_chip *pc = platform_get_drvdata(pdev);
|
||||
int i;
|
||||
@ -233,7 +261,7 @@ static int ctc_pwm_remove(struct platform_device *pdev)
|
||||
for (i = 0; i < CTC_NUM_PWM; i++)
|
||||
pwm_disable(&pc->chip.pwms[i]);
|
||||
|
||||
return pwmchip_remove(&pc->chip);
|
||||
pwmchip_remove(&pc->chip);
|
||||
}
|
||||
|
||||
static const struct of_device_id ctc_pwm_of_match[] = {
|
||||
@ -249,7 +277,7 @@ static struct platform_driver ctc_pwm_driver = {
|
||||
.of_match_table = ctc_pwm_of_match,
|
||||
},
|
||||
.probe = ctc_pwm_probe,
|
||||
.remove = ctc_pwm_remove,
|
||||
.remove_new = ctc_pwm_remove,
|
||||
};
|
||||
|
||||
module_platform_driver(ctc_pwm_driver);
|
||||
|
12
platform/centec-arm64/tsingma-bsp/src/rtc-sd2405/rtc-sd2405.c
Normal file → Executable file
12
platform/centec-arm64/tsingma-bsp/src/rtc-sd2405/rtc-sd2405.c
Normal file → Executable file
@ -180,17 +180,6 @@ static int sd2405_rtc_set_time(struct device *dev, struct rtc_time *tm)
|
||||
return sd2405_i2c_set_time(to_i2c_client(dev), tm);
|
||||
}
|
||||
|
||||
static int sd2405_remove(struct i2c_client *client)
|
||||
{
|
||||
#if 0
|
||||
struct rtc_device *rtc = i2c_get_clientdata(client);
|
||||
|
||||
if (rtc)
|
||||
rtc_device_unregister(rtc);
|
||||
#endif
|
||||
return 0;
|
||||
}
|
||||
|
||||
static const struct rtc_class_ops sd2405_rtc_ops = {
|
||||
.read_time = sd2405_rtc_read_time,
|
||||
.set_time = sd2405_rtc_set_time,
|
||||
@ -229,7 +218,6 @@ static struct i2c_driver sd2405_driver = {
|
||||
.name = "rtc-sd2405",
|
||||
},
|
||||
.probe = sd2405_probe,
|
||||
.remove = sd2405_remove,
|
||||
.id_table = sd2405_id,
|
||||
};
|
||||
|
||||
|
@ -327,7 +327,7 @@ static int sdhci_ctc5236_probe(struct platform_device *pdev)
|
||||
|
||||
version = (val == 0x1) ? CTC_REV_TM_1_1 : CTC_REV_TM_1_0;
|
||||
|
||||
mmc_of_parse_voltage(pdev->dev.of_node, &host->ocr_mask);
|
||||
mmc_of_parse_voltage(host->mmc, &host->ocr_mask);
|
||||
|
||||
ret = mmc_of_parse(host->mmc);
|
||||
if (ret)
|
||||
|
Loading…
Reference in New Issue
Block a user