diff --git a/device/ufispace/x86_64-ufispace_s6301_56st-r0/UFISPACE-S6301-56ST/hwsku.json b/device/ufispace/x86_64-ufispace_s6301_56st-r0/UFISPACE-S6301-56ST/hwsku.json new file mode 100644 index 0000000000..4f341c2edd --- /dev/null +++ b/device/ufispace/x86_64-ufispace_s6301_56st-r0/UFISPACE-S6301-56ST/hwsku.json @@ -0,0 +1,221 @@ +{ + "interfaces": { + "Ethernet0": { + "default_brkout_mode": "1x1G", + "autoneg": "on" + }, + "Ethernet1": { + "default_brkout_mode": "1x1G", + "autoneg": "on" + }, + "Ethernet2": { + "default_brkout_mode": "1x1G", + "autoneg": "on" + }, + "Ethernet3": { + "default_brkout_mode": "1x1G", + "autoneg": "on" + }, + "Ethernet4": { + "default_brkout_mode": "1x1G", + "autoneg": "on" + }, + "Ethernet5": { + "default_brkout_mode": "1x1G", + "autoneg": "on" + }, + "Ethernet6": { + "default_brkout_mode": "1x1G", + "autoneg": "on" + }, + "Ethernet7": { + "default_brkout_mode": "1x1G", + "autoneg": "on" + }, + "Ethernet8": { + "default_brkout_mode": "1x1G", + "autoneg": "on" + }, + "Ethernet9": { + "default_brkout_mode": "1x1G", + "autoneg": "on" + }, + "Ethernet10": { + "default_brkout_mode": "1x1G", + "autoneg": "on" + }, + "Ethernet11": { + "default_brkout_mode": "1x1G", + "autoneg": "on" + }, + "Ethernet12": { + "default_brkout_mode": "1x1G", + "autoneg": "on" + }, + "Ethernet13": { + "default_brkout_mode": "1x1G", + "autoneg": "on" + }, + "Ethernet14": { + "default_brkout_mode": "1x1G", + "autoneg": "on" + }, + "Ethernet15": { + "default_brkout_mode": "1x1G", + "autoneg": "on" + }, + "Ethernet16": { + "default_brkout_mode": "1x1G", + "autoneg": "on" + }, + "Ethernet17": { + "default_brkout_mode": "1x1G", + "autoneg": "on" + }, + "Ethernet18": { + "default_brkout_mode": "1x1G", + "autoneg": "on" + }, + "Ethernet19": { + "default_brkout_mode": "1x1G", + "autoneg": "on" + }, + "Ethernet20": { + "default_brkout_mode": "1x1G", + "autoneg": "on" + }, + "Ethernet21": { + "default_brkout_mode": "1x1G", + "autoneg": "on" + }, + "Ethernet22": { + "default_brkout_mode": "1x1G", + "autoneg": "on" + }, + "Ethernet23": { + "default_brkout_mode": "1x1G", + "autoneg": "on" + }, + "Ethernet24": { + "default_brkout_mode": "1x1G", + "autoneg": "on" + }, + "Ethernet25": { + "default_brkout_mode": "1x1G", + "autoneg": "on" + }, + "Ethernet26": { + "default_brkout_mode": "1x1G", + "autoneg": "on" + }, + "Ethernet27": { + "default_brkout_mode": "1x1G", + "autoneg": "on" + }, + "Ethernet28": { + "default_brkout_mode": "1x1G", + "autoneg": "on" + }, + "Ethernet29": { + "default_brkout_mode": "1x1G", + "autoneg": "on" + }, + "Ethernet30": { + "default_brkout_mode": "1x1G", + "autoneg": "on" + }, + "Ethernet31": { + "default_brkout_mode": "1x1G", + "autoneg": "on" + }, + "Ethernet32": { + "default_brkout_mode": "1x1G", + "autoneg": "on" + }, + "Ethernet33": { + "default_brkout_mode": "1x1G", + "autoneg": "on" + }, + "Ethernet34": { + "default_brkout_mode": "1x1G", + "autoneg": "on" + }, + "Ethernet35": { + "default_brkout_mode": "1x1G", + "autoneg": "on" + }, + "Ethernet36": { + "default_brkout_mode": "1x1G", + "autoneg": "on" + }, + "Ethernet37": { + "default_brkout_mode": "1x1G", + "autoneg": "on" + }, + "Ethernet38": { + "default_brkout_mode": "1x1G", + "autoneg": "on" + }, + "Ethernet39": { + "default_brkout_mode": "1x1G", + "autoneg": "on" + }, + "Ethernet40": { + "default_brkout_mode": "1x1G", + "autoneg": "on" + }, + "Ethernet41": { + "default_brkout_mode": "1x1G", + "autoneg": "on" + }, + "Ethernet42": { + "default_brkout_mode": "1x1G", + "autoneg": "on" + }, + "Ethernet43": { + "default_brkout_mode": "1x1G", + "autoneg": "on" + }, + "Ethernet44": { + "default_brkout_mode": "1x1G", + "autoneg": "on" + }, + "Ethernet45": { + "default_brkout_mode": "1x1G", + "autoneg": "on" + }, + "Ethernet46": { + "default_brkout_mode": "1x1G", + "autoneg": "on" + }, + "Ethernet47": { + "default_brkout_mode": "1x1G", + "autoneg": "on" + }, + "Ethernet48": { + "default_brkout_mode": "1x10G" + }, + "Ethernet49": { + "default_brkout_mode": "1x10G" + }, + "Ethernet50": { + "default_brkout_mode": "1x10G" + }, + "Ethernet51": { + "default_brkout_mode": "1x10G" + }, + "Ethernet52": { + "default_brkout_mode": "1x10G" + }, + "Ethernet53": { + "default_brkout_mode": "1x10G" + }, + "Ethernet54": { + "default_brkout_mode": "1x10G" + }, + "Ethernet55": { + "default_brkout_mode": "1x10G" + } + } +} + diff --git a/device/ufispace/x86_64-ufispace_s6301_56st-r0/UFISPACE-S6301-56ST/sai.profile b/device/ufispace/x86_64-ufispace_s6301_56st-r0/UFISPACE-S6301-56ST/sai.profile new file mode 100644 index 0000000000..33b427a78f --- /dev/null +++ b/device/ufispace/x86_64-ufispace_s6301_56st-r0/UFISPACE-S6301-56ST/sai.profile @@ -0,0 +1 @@ +SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/td3-x2-s6301-56st.config.bcm diff --git a/device/ufispace/x86_64-ufispace_s6301_56st-r0/UFISPACE-S6301-56ST/td3-x2-s6301-56st.config.bcm b/device/ufispace/x86_64-ufispace_s6301_56st-r0/UFISPACE-S6301-56ST/td3-x2-s6301-56st.config.bcm new file mode 100644 index 0000000000..7bf91509ca --- /dev/null +++ b/device/ufispace/x86_64-ufispace_s6301_56st-r0/UFISPACE-S6301-56ST/td3-x2-s6301-56st.config.bcm @@ -0,0 +1,295 @@ +# r2, 20230713 + +sram_scan_enable=0 +stable_size=0x5500000 +tdma_timeout_usec=15000000 +tslam_timeout_usec=15000000 +sai_mdio_access_clause22=1 +sai_verify_incoming_chksum=0 +robust_hash_disable_egress_vlan=1 +robust_hash_disable_mpls=1 +robust_hash_disable_vlan=1 +port_flex_enable=1 +arl_clean_timeout_usec=15000000 +asf_mem_profile=0 +bcm_num_cos=9 +bcm_stat_flags=1 +bcm_stat_jumbo=9236 +cdma_timeout_usec=15000000 +disable_pcie_firmware_check=1 +dma_desc_timeout_usec=15000000 +fpem_mem_entries=0 +higig2_hdr_mode=1 +ifp_inports_support_enable=1 +ipv6_lpm_128b_enable=1 +l2xmsg_mode=1 +l2_mem_entries=65536 +l3_mem_entries=32768 +max_vp_lags=0 +mem_scan_enable=1 +miim_intr_enable=0 +module_64ports=1 +multicast_l2_range=4095 +multicast_l3_range=0 +os=unix + +# global setting + +pbmp_xport_xe=0x1fe00000000000000 +pbmp_xport_ge=0x00001fffffffffffe + +phy_chain_tx_lane_map_physical{25}=0x2310 +phy_chain_rx_lane_map_physical{25}=0x2310 + +phy_chain_tx_lane_map_physical{41}=0x3102 +phy_chain_rx_lane_map_physical{41}=0x3102 + +port_gmii_mode_25=1 +port_gmii_mode_26=1 +port_gmii_mode_27=1 +port_gmii_mode_28=1 +port_gmii_mode_29=1 +port_gmii_mode_30=1 +port_gmii_mode_31=1 +port_gmii_mode_32=1 + +port_gmii_mode_33=1 +port_gmii_mode_34=1 +port_gmii_mode_35=1 +port_gmii_mode_36=1 +port_gmii_mode_37=1 +port_gmii_mode_38=1 +port_gmii_mode_39=1 +port_gmii_mode_40=1 + +port_gmii_mode_41=1 +port_gmii_mode_42=1 +port_gmii_mode_43=1 +port_gmii_mode_44=1 +port_gmii_mode_45=1 +port_gmii_mode_46=1 +port_gmii_mode_47=1 +port_gmii_mode_48=1 + +# GPHY0 +portmap_1=1:1 +portmap_2=2:1 +portmap_3=3:1 +portmap_4=4:1 + +# GPHY1 +portmap_5=5:1 +portmap_6=6:1 +portmap_7=7:1 +portmap_8=8:1 + +# GPHY2 +portmap_9=9:1 +portmap_10=10:1 +portmap_11=11:1 +portmap_12=12:1 + +# GPHY3 +portmap_13=13:1 +portmap_14=14:1 +portmap_15=15:1 +portmap_16=16:1 + +# GPHY4 +portmap_17=17:1 +portmap_18=18:1 +portmap_19=19:1 +portmap_20=20:1 + +# GPHY5 +portmap_21=21:1 +portmap_22=22:1 +portmap_23=23:1 +portmap_24=24:1 + +phy_port_primary_and_offset_1.0=0x0100 +phy_port_primary_and_offset_2.0=0x0101 +phy_port_primary_and_offset_3.0=0x0102 +phy_port_primary_and_offset_4.0=0x0103 +phy_port_primary_and_offset_5.0=0x0104 +phy_port_primary_and_offset_6.0=0x0105 +phy_port_primary_and_offset_7.0=0x0106 +phy_port_primary_and_offset_8.0=0x0107 + +phy_port_primary_and_offset_9.0=0x0900 +phy_port_primary_and_offset_10.0=0x0901 +phy_port_primary_and_offset_11.0=0x0902 +phy_port_primary_and_offset_12.0=0x0903 +phy_port_primary_and_offset_13.0=0x0904 +phy_port_primary_and_offset_14.0=0x0905 +phy_port_primary_and_offset_15.0=0x0906 +phy_port_primary_and_offset_16.0=0x0907 + +phy_port_primary_and_offset_17.0=0x1100 +phy_port_primary_and_offset_18.0=0x1101 +phy_port_primary_and_offset_19.0=0x1102 +phy_port_primary_and_offset_20.0=0x1103 +phy_port_primary_and_offset_21.0=0x1104 +phy_port_primary_and_offset_22.0=0x1105 +phy_port_primary_and_offset_23.0=0x1106 +phy_port_primary_and_offset_24.0=0x1107 + +# Comment out configuration on PHY ports + +# MCQ 0 - QSGMII +portmap_25=25:1 +portmap_26=26:1 +portmap_27=27:1 +portmap_28=28:1 +portmap_29=29:1 +portmap_30=30:1 +portmap_31=31:1 +portmap_32=32:1 + +# 54182_1 PHY ADDR 0x1-0x8 +port_phy_addr_25=0x01 +port_phy_addr_26=0x02 +port_phy_addr_27=0x03 +port_phy_addr_28=0x04 +port_phy_addr_29=0x05 +port_phy_addr_30=0x06 +port_phy_addr_31=0x07 +port_phy_addr_32=0x08 +phy_port_primary_and_offset_25.0=0x1900 +phy_port_primary_and_offset_26.0=0x1901 +phy_port_primary_and_offset_27.0=0x1902 +phy_port_primary_and_offset_28.0=0x1903 +phy_port_primary_and_offset_29.0=0x1904 +phy_port_primary_and_offset_30.0=0x1905 +phy_port_primary_and_offset_31.0=0x1906 +phy_port_primary_and_offset_32.0=0x1907 + +# MCQ 1 - QSGMII +portmap_33=33:1 +portmap_34=34:1 +portmap_35=35:1 +portmap_36=36:1 +portmap_37=37:1 +portmap_38=38:1 +portmap_39=39:1 +portmap_40=40:1 + +# 54182_2 PHY ADDR 0x21-0x28 +port_phy_addr_33=0x21 +port_phy_addr_34=0x22 +port_phy_addr_35=0x23 +port_phy_addr_36=0x24 +port_phy_addr_37=0x25 +port_phy_addr_38=0x26 +port_phy_addr_39=0x27 +port_phy_addr_40=0x28 + +phy_port_primary_and_offset_33.0=0x2100 +phy_port_primary_and_offset_34.0=0x2101 +phy_port_primary_and_offset_35.0=0x2102 +phy_port_primary_and_offset_36.0=0x2103 +phy_port_primary_and_offset_37.0=0x2104 +phy_port_primary_and_offset_38.0=0x2105 +phy_port_primary_and_offset_39.0=0x2106 +phy_port_primary_and_offset_40.0=0x2107 + +# MCQ2-2L 50182 +portmap_41=41:1 +portmap_42=42:1 +portmap_43=43:1 +portmap_44=44:1 +portmap_45=45:1 +portmap_46=46:1 +portmap_47=47:1 +portmap_48=48:1 + +# 54182_3 PHY ADDR 0x41-0x48 +port_phy_addr_41=0x41 +port_phy_addr_42=0x42 +port_phy_addr_43=0x43 +port_phy_addr_44=0x44 +port_phy_addr_45=0x45 +port_phy_addr_46=0x46 +port_phy_addr_47=0x47 +port_phy_addr_48=0x48 + +phy_port_primary_and_offset_41.0=0x2900 +phy_port_primary_and_offset_42.0=0x2901 +phy_port_primary_and_offset_43.0=0x2902 +phy_port_primary_and_offset_44.0=0x2903 +phy_port_primary_and_offset_45.0=0x2904 +phy_port_primary_and_offset_46.0=0x2905 +phy_port_primary_and_offset_47.0=0x2906 +phy_port_primary_and_offset_48.0=0x2907 + +# TSCF SFP +portmap_57=57:10 +portmap_58=58:10 +portmap_59=59:10 +portmap_60=60:10 + +portmap_61=61:10 +portmap_62=62:10 +portmap_63=63:10 +portmap_64=64:10 + + +dport_map_enable=1 + +dport_map_port_25=1 +dport_map_port_26=2 +dport_map_port_27=3 +dport_map_port_28=4 +dport_map_port_29=5 +dport_map_port_30=6 +dport_map_port_31=7 +dport_map_port_32=8 +dport_map_port_33=9 +dport_map_port_34=10 +dport_map_port_35=11 +dport_map_port_36=12 +dport_map_port_37=13 +dport_map_port_38=14 +dport_map_port_39=15 +dport_map_port_40=16 +dport_map_port_41=17 +dport_map_port_42=18 +dport_map_port_43=19 +dport_map_port_44=20 +dport_map_port_45=21 +dport_map_port_46=22 +dport_map_port_47=23 +dport_map_port_48=24 +dport_map_port_1=25 +dport_map_port_2=26 +dport_map_port_3=27 +dport_map_port_4=28 +dport_map_port_5=29 +dport_map_port_6=30 +dport_map_port_7=31 +dport_map_port_8=32 +dport_map_port_9=33 +dport_map_port_10=34 +dport_map_port_11=35 +dport_map_port_12=36 +dport_map_port_13=37 +dport_map_port_14=38 +dport_map_port_15=39 +dport_map_port_16=40 +dport_map_port_17=41 +dport_map_port_18=42 +dport_map_port_19=43 +dport_map_port_20=44 +dport_map_port_21=45 +dport_map_port_22=46 +dport_map_port_23=47 +dport_map_port_24=48 +dport_map_port_57=49 +dport_map_port_58=50 +dport_map_port_59=51 +dport_map_port_60=52 +dport_map_port_64=53 +dport_map_port_63=54 +dport_map_port_62=55 +dport_map_port_61=56 + diff --git a/device/ufispace/x86_64-ufispace_s6301_56st-r0/custom_led.bin b/device/ufispace/x86_64-ufispace_s6301_56st-r0/custom_led.bin new file mode 100644 index 0000000000..cb3a607afe Binary files /dev/null and b/device/ufispace/x86_64-ufispace_s6301_56st-r0/custom_led.bin differ diff --git a/device/ufispace/x86_64-ufispace_s6301_56st-r0/default_sku b/device/ufispace/x86_64-ufispace_s6301_56st-r0/default_sku new file mode 100644 index 0000000000..81aaf36922 --- /dev/null +++ b/device/ufispace/x86_64-ufispace_s6301_56st-r0/default_sku @@ -0,0 +1 @@ +UFISPACE-S6301-56ST t1 diff --git a/device/ufispace/x86_64-ufispace_s6301_56st-r0/fancontrol b/device/ufispace/x86_64-ufispace_s6301_56st-r0/fancontrol new file mode 100644 index 0000000000..1234cd994f --- /dev/null +++ b/device/ufispace/x86_64-ufispace_s6301_56st-r0/fancontrol @@ -0,0 +1,10 @@ +# Configuration file generated by pwmconfig, changes will be lost +INTERVAL=10 +DEVPATH= +DEVNAME= +FCTEMPS= +FCFANS= +MINTEMP= +MAXTEMP= +MINSTART= +MINSTOP= diff --git a/device/ufispace/x86_64-ufispace_s6301_56st-r0/installer.conf b/device/ufispace/x86_64-ufispace_s6301_56st-r0/installer.conf new file mode 100644 index 0000000000..74b02f0766 --- /dev/null +++ b/device/ufispace/x86_64-ufispace_s6301_56st-r0/installer.conf @@ -0,0 +1,4 @@ +CONSOLE_PORT=0x3f8 +CONSOLE_DEV=0 +CONSOLE_SPEED=115200 +ONIE_PLATFORM_EXTRA_CMDLINE_LINUX="modprobe.blacklist=gpio_ich,qat_c3xxx nomodeset pcie_aspm=off" diff --git a/device/ufispace/x86_64-ufispace_s6301_56st-r0/led_proc_init.soc b/device/ufispace/x86_64-ufispace_s6301_56st-r0/led_proc_init.soc new file mode 100644 index 0000000000..a65a2eac30 --- /dev/null +++ b/device/ufispace/x86_64-ufispace_s6301_56st-r0/led_proc_init.soc @@ -0,0 +1,4 @@ +led stop +m0 load 0 0x3800 /usr/share/sonic/platform/custom_led.bin +led auto on +led start diff --git a/device/ufispace/x86_64-ufispace_s6301_56st-r0/pcie.yaml b/device/ufispace/x86_64-ufispace_s6301_56st-r0/pcie.yaml new file mode 100644 index 0000000000..9397b3a26d --- /dev/null +++ b/device/ufispace/x86_64-ufispace_s6301_56st-r0/pcie.yaml @@ -0,0 +1,178 @@ +- bus: '00' + dev: '00' + fn: '0' + id: '1980' + name: 'Host bridge: Intel Corporation Atom Processor C3000 Series System Agent (rev + 11)' +- bus: '00' + dev: '04' + fn: '0' + id: 19a1 + name: 'Host bridge: Intel Corporation Atom Processor C3000 Series Error Registers + (rev 11)' +- bus: '00' + dev: '05' + fn: '0' + id: 19a2 + name: 'Generic system peripheral [0807]: Intel Corporation Atom Processor C3000 + Series Root Complex Event Collector (rev 11)' +- bus: '00' + dev: '06' + fn: '0' + id: 19a3 + name: 'PCI bridge: Intel Corporation Atom Processor C3000 Series Integrated QAT + Root Port (rev 11)' +- bus: '00' + dev: 09 + fn: '0' + id: 19a4 + name: 'PCI bridge: Intel Corporation Atom Processor C3000 Series PCI Express Root + Port #0 (rev 11)' +- bus: '00' + dev: 0a + fn: '0' + id: 19a5 + name: 'PCI bridge: Intel Corporation Atom Processor C3000 Series PCI Express Root + Port #1 (rev 11)' +- bus: '00' + dev: 0b + fn: '0' + id: 19a6 + name: 'PCI bridge: Intel Corporation Atom Processor C3000 Series PCI Express Root + Port #2 (rev 11)' +- bus: '00' + dev: 0c + fn: '0' + id: 19a7 + name: 'PCI bridge: Intel Corporation Atom Processor C3000 Series PCI Express Root + Port #3 (rev 11)' +- bus: '00' + dev: 0e + fn: '0' + id: 19a8 + name: 'PCI bridge: Intel Corporation Atom Processor C3000 Series PCI Express Root + Port #4 (rev 11)' +- bus: '00' + dev: 0f + fn: '0' + id: 19a9 + name: 'PCI bridge: Intel Corporation Atom Processor C3000 Series PCI Express Root + Port #5 (rev 11)' +- bus: '00' + dev: '10' + fn: '0' + id: 19aa + name: 'PCI bridge: Intel Corporation Atom Processor C3000 Series PCI Express Root + Port #6 (rev 11)' +- bus: '00' + dev: '11' + fn: '0' + id: 19ab + name: 'PCI bridge: Intel Corporation Atom Processor C3000 Series PCI Express Root + Port #7 (rev 11)' +- bus: '00' + dev: '12' + fn: '0' + id: 19ac + name: 'System peripheral: Intel Corporation Atom Processor C3000 Series SMBus Contoller + - Host (rev 11)' +- bus: '00' + dev: '14' + fn: '0' + id: 19c2 + name: 'SATA controller: Intel Corporation Atom Processor C3000 Series SATA Controller + 1 (rev 11)' +- bus: '00' + dev: '15' + fn: '0' + id: 19d0 + name: 'USB controller: Intel Corporation Atom Processor C3000 Series USB 3.0 xHCI + Controller (rev 11)' +- bus: '00' + dev: '16' + fn: '0' + id: 19d1 + name: 'PCI bridge: Intel Corporation Atom Processor C3000 Series Integrated LAN + Root Port #0 (rev 11)' +- bus: '00' + dev: '17' + fn: '0' + id: 19d2 + name: 'PCI bridge: Intel Corporation Atom Processor C3000 Series Integrated LAN + Root Port #1 (rev 11)' +- bus: '00' + dev: '18' + fn: '0' + id: 19d3 + name: 'Communication controller: Intel Corporation Atom Processor C3000 Series ME + HECI 1 (rev 11)' +- bus: '00' + dev: 1c + fn: '0' + id: 19db + name: 'SD Host controller: Intel Corporation Device 19db (rev 11)' +- bus: '00' + dev: 1f + fn: '0' + id: 19dc + name: 'ISA bridge: Intel Corporation Atom Processor C3000 Series LPC or eSPI (rev + 11)' +- bus: '00' + dev: 1f + fn: '2' + id: 19de + name: 'Memory controller: Intel Corporation Atom Processor C3000 Series Power Management + Controller (rev 11)' +- bus: '00' + dev: 1f + fn: '4' + id: 19df + name: 'SMBus: Intel Corporation Atom Processor C3000 Series SMBus controller (rev + 11)' +- bus: '00' + dev: 1f + fn: '5' + id: 19e0 + name: 'Serial bus controller [0c80]: Intel Corporation Atom Processor C3000 Series + SPI Controller (rev 11)' +- bus: '01' + dev: '00' + fn: '0' + id: 19e2 + name: 'Co-processor: Intel Corporation Atom Processor C3000 Series QuickAssist Technology + (rev 11)' +- bus: '02' + dev: '00' + fn: '0' + id: b277 + name: 'Ethernet controller: Broadcom Inc. and subsidiaries Device b277 (rev 02)' +- bus: '07' + dev: '00' + fn: '0' + id: '1533' + name: 'Ethernet controller: Intel Corporation I210 Gigabit Network Connection (rev + 03)' +- bus: 0a + dev: '00' + fn: '0' + id: 15c3 + name: 'Ethernet controller: Intel Corporation Ethernet Connection X553 Backplane + (rev 11)' +- bus: 0a + dev: '00' + fn: '1' + id: 15c3 + name: 'Ethernet controller: Intel Corporation Ethernet Connection X553 Backplane + (rev 11)' +- bus: 0b + dev: '00' + fn: '0' + id: 15c3 + name: 'Ethernet controller: Intel Corporation Ethernet Connection X553 Backplane + (rev 11)' +- bus: 0b + dev: '00' + fn: '1' + id: 15c3 + name: 'Ethernet controller: Intel Corporation Ethernet Connection X553 Backplane + (rev 11)' diff --git a/device/ufispace/x86_64-ufispace_s6301_56st-r0/pddf/pd-plugin.json b/device/ufispace/x86_64-ufispace_s6301_56st-r0/pddf/pd-plugin.json new file mode 100644 index 0000000000..eae9cd3795 --- /dev/null +++ b/device/ufispace/x86_64-ufispace_s6301_56st-r0/pddf/pd-plugin.json @@ -0,0 +1,75 @@ +{ + + "XCVR": + { + "xcvr_present": + { + "i2c": + { + "valmap-SFP+": {"0":true, "1":false } + } + + }, + "plug_status": + { + "inserted": "1", + "removed": "0" + } + }, + "PSU": + { + "psu_present": + { + "i2c": + { + "valmap": { "1":true, "0":false } + }, + "bmc": + { + "valmap": { "1":true, "0":false } + } + }, + + "psu_power_good": + { + "i2c": + { + "valmap": { "1": true, "0":false } + } + }, + + "psu_support_list": + [ + {"Manufacturer": "ASPOWER","Name": "U1A-K10150-DRB-13", "MaxSpd": "PSU_AC_FAN_MAX_SPEED", "Dir": "EXHAUST", "Type": "AC" }, + {"Manufacturer": "ASPOWER","Name": "U1A-K0150-B-13", "MaxSpd": "PSU_AC_FAN_MAX_SPEED", "Dir": "INTAKE", "Type": "AC"}, + {"Manufacturer": "ASPOWER","Name": "U1D-K0150-A-13", "MaxSpd": "PSU_DC_FAN_MAX_SPEED", "Dir": "EXHAUST", "Type": "DC"}, + {"Manufacturer": "ASPOWER","Name": "U1D-K0150-B-13", "MaxSpd": "PSU_DC_FAN_MAX_SPEED", "Dir": "INTAKE", "Type": "DC"} + ], + "valmap": {"PSU_FAN_MAX_SPEED": "13000", "PSU_AC_FAN_MAX_SPEED": "13000", "PSU_DC_FAN_MAX_SPEED":"13000", "DEFAULT_TYPE": "AC"} + }, + + "FAN": + { + "direction": + { + "i2c": + { + "valmap": {"0":"INTAKE", "1":"EXHAUST"} + } + }, + + "present": + { + "i2c": + { + "valmap": {"1":true, "0":false} + } + }, + + "FAN_MAX_SPEED":"25000" + }, + "REBOOT_CAUSE": + { + "reboot_cause_file": "/host/reboot-cause/reboot-cause.txt" + } +} diff --git a/device/ufispace/x86_64-ufispace_s6301_56st-r0/pddf/pddf-device.json b/device/ufispace/x86_64-ufispace_s6301_56st-r0/pddf/pddf-device.json new file mode 100644 index 0000000000..87474f056c --- /dev/null +++ b/device/ufispace/x86_64-ufispace_s6301_56st-r0/pddf/pddf-device.json @@ -0,0 +1,2343 @@ +{ + "PLATFORM": { + "num_psus": 2, + "num_fantrays": 2, + "num_fans_pertray": 1, + "num_ports": 56, + "num_temps": 5, + "pddf_dev_types": { + "description": "PDDF supported devices", + "CPLD": [ + "i2c_cpld" + ], + "PSU": [ + "psu_eeprom", + "psu_pmbus" + ], + "FAN": + [ + "fan_ctrl", + "fan_eeprom", + "fan_cpld" + ], + "PORT_MODULE": [ + "pddf_xcvr" + ] + }, + "std_perm_kos": [ + "i2c-i801", + "i2c-ismt" + ], + "std_kos": [ + "i2c_dev", + "i2c_mux_pca954x", + "optoe", + "lm75", + "gpio-pca953x", + "ucd9000", + "eeprom" + ], + "pddf_kos": [ + "pddf_client_module", + "pddf_cpld_module", + "pddf_cpld_driver", + "pddf_mux_module", + "pddf_xcvr_module", + "pddf_xcvr_driver_module", + "pddf_psu_driver_module", + "pddf_psu_module", + "pddf_fan_driver_module", + "pddf_fan_module", + "pddf_led_module", + "pddf_gpio_module" + ], + "custom_kos": [ + "x86-64-ufispace-s6301-56st-lpc", + "x86-64-ufispace-s6301-56st-sys-eeprom", + "pddf_custom_psu" + ] + }, + "SYSTEM": { + "dev_info": { + "device_type": "CPU", + "device_name": "ROOT_COMPLEX", + "device_parent": null + }, + "i2c": { + "CONTROLLERS": [ + { + "dev_name": "i2c-1", + "dev": "SMBUS1" + }, + { + "dev_name": "i2c-0", + "dev": "SMBUS0" + } + ] + } + }, + "SMBUS1": { + "dev_info": { + "device_type": "SMBUS", "device_name": "SMBUS1", "device_parent": "SYSTEM" + }, + "i2c": { + "topo_info": { + "dev_addr": "0x1" + }, + "DEVICES": [ + { + "dev": "EEPROM1" + }, + { + "dev": "MUX1" + }, + { + "dev": "MUX2" + }, + { + "dev": "CPLD1" + }, + { + "dev": "FAN-CTRL" + } + ] + } + }, + "EEPROM1": { + "dev_info": { + "device_type": "EEPROM", + "device_name": "EEPROM1", + "device_parent": "SMBUS1" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x1", + "dev_addr": "0x56", + "dev_type": "sys_eeprom" + }, + "dev_attr": { + "access_mode": "BLOCK" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "MUX1": { + "dev_info": { "device_type": "MUX", "device_name": "MUX1", "device_parent": "SMBUS1"}, + "i2c": { + "topo_info": { + "parent_bus": "0x1", + "dev_addr": "0x72", + "dev_type": "pca9546" + }, + "dev_attr": { + "virt_bus": "0x2", + "idle_state": "-2" + }, + "channel": [ + { + "chn": "0", + "dev": "PSU1" + }, + { + "chn": "0", + "dev": "PSU2" + }, + { + "chn": "1", + "dev": "TEMP1" + }, + { + "chn": "1", + "dev": "TEMP2" + }, + { + "chn": "1", + "dev": "GPIO4" + }, + { + "chn": "3", + "dev": "TEMP3" + } + ] + } + }, + "MUX2": { + "dev_info": { "device_type": "MUX", "device_name": "MUX2", "device_parent": "SMBUS1"}, + "i2c": { + "topo_info": { + "parent_bus": "0x1", + "dev_addr": "0x70", + "dev_type": "pca9546" + }, + "dev_attr": { + "virt_bus": "0x6", + "idle_state": "-2" + }, + "channel": [ + { + "chn": "0", + "dev": "GPIO1" + }, + { + "chn": "1", + "dev": "GPIO2" + }, + { + "chn": "2", + "dev": "GPIO3" + } + ] + } + }, + "GPIO1": { + "dev_info": { + "device_type": "GPIO", + "device_name": "GPIO1", + "device_parent": "MUX2" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x6", + "dev_addr": "0x20", + "dev_type": "pca9535" + }, + "dev_attr": { + "gpio_base": "0x1f0" + }, + "ports": [ + { + "port_num": "0", + "direction": "in", + "value": "", + "edge": "", + "active_low": "" + }, + { + "port_num": "1", + "direction": "in", + "value": "", + "edge": "", + "active_low": "" + }, + { + "port_num": "2", + "direction": "in", + "value": "", + "edge": "", + "active_low": "" + }, + { + "port_num": "3", + "direction": "in", + "value": "", + "edge": "", + "active_low": "" + }, + { + "port_num": "4", + "direction": "in", + "value": "", + "edge": "", + "active_low": "" + }, + { + "port_num": "5", + "direction": "in", + "value": "", + "edge": "", + "active_low": "" + }, + { + "port_num": "6", + "direction": "in", + "value": "", + "edge": "", + "active_low": "" + }, + { + "port_num": "7", + "direction": "in", + "value": "", + "edge": "", + "active_low": "" + }, + { + "port_num": "8", + "direction": "in", + "value": "", + "edge": "", + "active_low": "" + }, + { + "port_num": "9", + "direction": "in", + "value": "", + "edge": "", + "active_low": "" + }, + { + "port_num": "10", + "direction": "in", + "value": "", + "edge": "", + "active_low": "" + }, + { + "port_num": "11", + "direction": "in", + "value": "", + "edge": "", + "active_low": "" + }, + { + "port_num": "12", + "direction": "in", + "value": "", + "edge": "", + "active_low": "" + }, + { + "port_num": "13", + "direction": "in", + "value": "", + "edge": "", + "active_low": "" + }, + { + "port_num": "14", + "direction": "in", + "value": "", + "edge": "", + "active_low": "" + }, + { + "port_num": "15", + "direction": "in", + "value": "", + "edge": "", + "active_low": "" + } + ] + } + }, + "GPIO2": { + "dev_info": { + "device_type": "GPIO", + "device_name": "GPIO2", + "device_parent": "MUX2" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x7", + "dev_addr": "0x21", + "dev_type": "pca9535" + }, + "dev_attr": { + "gpio_base": "0x1e0" + }, + "ports": [ + { + "port_num": "0", + "direction": "out", + "value": "1", + "edge": "", + "active_low": "" + }, + { + "port_num": "1", + "direction": "out", + "value": "1", + "edge": "", + "active_low": "" + }, + { + "port_num": "2", + "direction": "out", + "value": "1", + "edge": "", + "active_low": "" + }, + { + "port_num": "3", + "direction": "out", + "value": "1", + "edge": "", + "active_low": "" + }, + { + "port_num": "4", + "direction": "out", + "value": "1", + "edge": "", + "active_low": "" + }, + { + "port_num": "5", + "direction": "out", + "value": "1", + "edge": "", + "active_low": "" + }, + { + "port_num": "6", + "direction": "out", + "value": "1", + "edge": "", + "active_low": "" + }, + { + "port_num": "7", + "direction": "out", + "value": "1", + "edge": "", + "active_low": "" + }, + { + "port_num": "8", + "direction": "out", + "value": "0", + "edge": "", + "active_low": "" + }, + { + "port_num": "9", + "direction": "out", + "value": "0", + "edge": "", + "active_low": "" + }, + { + "port_num": "10", + "direction": "out", + "value": "0", + "edge": "", + "active_low": "" + }, + { + "port_num": "11", + "direction": "out", + "value": "0", + "edge": "", + "active_low": "" + }, + { + "port_num": "12", + "direction": "out", + "value": "0", + "edge": "", + "active_low": "" + }, + { + "port_num": "13", + "direction": "out", + "value": "0", + "edge": "", + "active_low": "" + }, + { + "port_num": "14", + "direction": "out", + "value": "0", + "edge": "", + "active_low": "" + }, + { + "port_num": "15", + "direction": "out", + "value": "0", + "edge": "", + "active_low": "" + } + ] + } + }, + "GPIO3": { + "dev_info": { + "device_type": "GPIO", + "device_name": "GPIO3", + "device_parent": "MUX2" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x8", + "dev_addr": "0x22", + "dev_type": "pca9535" + }, + "dev_attr": { + "gpio_base": "0x1d0" + }, + "ports": [ + { + "port_num": "0", + "direction": "in", + "value": "", + "edge": "", + "active_low": "" + }, + { + "port_num": "1", + "direction": "in", + "value": "", + "edge": "", + "active_low": "" + }, + { + "port_num": "2", + "direction": "in", + "value": "", + "edge": "", + "active_low": "" + }, + { + "port_num": "3", + "direction": "in", + "value": "", + "edge": "", + "active_low": "" + }, + { + "port_num": "4", + "direction": "in", + "value": "", + "edge": "", + "active_low": "" + }, + { + "port_num": "5", + "direction": "in", + "value": "", + "edge": "", + "active_low": "" + }, + { + "port_num": "6", + "direction": "in", + "value": "", + "edge": "", + "active_low": "" + }, + { + "port_num": "7", + "direction": "in", + "value": "", + "edge": "", + "active_low": "" + }, + { + "port_num": "8", + "direction": "in", + "value": "", + "edge": "", + "active_low": "" + }, + { + "port_num": "9", + "direction": "in", + "value": "", + "edge": "", + "active_low": "" + }, + { + "port_num": "10", + "direction": "in", + "value": "", + "edge": "", + "active_low": "" + }, + { + "port_num": "11", + "direction": "in", + "value": "", + "edge": "", + "active_low": "" + }, + { + "port_num": "12", + "direction": "in", + "value": "", + "edge": "", + "active_low": "" + }, + { + "port_num": "13", + "direction": "in", + "value": "", + "edge": "", + "active_low": "" + }, + { + "port_num": "14", + "direction": "in", + "value": "", + "edge": "", + "active_low": "" + }, + { + "port_num": "15", + "direction": "in", + "value": "", + "edge": "", + "active_low": "" + } + ] + } + }, + "GPIO4": { + "dev_info": { + "device_type": "GPIO", + "device_name": "GPIO4", + "device_parent": "MUX1" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x3", + "dev_addr": "0x21", + "dev_type": "pca9554" + }, + "dev_attr": { + "gpio_base": "0x1C8" + }, + "ports": [ + { + "port_num": "0", + "direction": "in", + "value": "", + "edge": "", + "active_low": "" + }, + { + "port_num": "1", + "direction": "in", + "value": "", + "edge": "", + "active_low": "" + }, + { + "port_num": "2", + "direction": "in", + "value": "", + "edge": "", + "active_low": "" + }, + { + "port_num": "3", + "direction": "in", + "value": "", + "edge": "", + "active_low": "" + }, + { + "port_num": "4", + "direction": "in", + "value": "", + "edge": "", + "active_low": "" + }, + { + "port_num": "5", + "direction": "in", + "value": "", + "edge": "", + "active_low": "" + }, + { + "port_num": "6", + "direction": "in", + "value": "", + "edge": "", + "active_low": "" + }, + { + "port_num": "7", + "direction": "in", + "value": "", + "edge": "", + "active_low": "" + } + ] + } + }, + "CPLD1": { + "dev_info": { + "device_type": "CPLD", + "device_name": "CPLD1", + "device_parent": "SMBUS1" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x1", + "dev_addr": "0x33", + "dev_type": "i2c_cpld" + }, + "dev_attr": {} + } + }, + "SMBUS0": { + "dev_info": { + "device_type": "SMBUS", "device_name": "SMBUS0", "device_parent": "SYSTEM" + }, + "i2c": { + "topo_info": { + "dev_addr": "0x0" + }, + "DEVICES": [ + { + "dev": "MUX3" + } + ] + } + }, + "MUX3": { + "dev_info": { "device_type":"MUX", "device_name":"MUX3", "device_parent":"SMBUS0"}, + "i2c": + { + "topo_info": { "parent_bus":"0x0", "dev_addr":"0x71", "dev_type":"pca9548"}, + "dev_attr": { "virt_bus":"0xa", "idle_state":"-2"}, + "channel": + [ + { "chn":"0", "dev":"PORT49" }, + { "chn":"1", "dev":"PORT50" }, + { "chn":"2", "dev":"PORT51" }, + { "chn":"3", "dev":"PORT52" }, + { "chn":"4", "dev":"PORT53" }, + { "chn":"5", "dev":"PORT54" }, + { "chn":"6", "dev":"PORT55" }, + { "chn":"7", "dev":"PORT56" } + ] + } + }, + "TEMP1": { + "dev_info": { + "device_type": "TEMP_SENSOR", + "device_name": "TEMP1", + "device_parent": "MUX1" + }, + "dev_attr": { + "display_name": "Temp_FAN1" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x3", + "dev_addr": "0x49", + "dev_type": "tmp75" + }, + "attr_list": [ + { + "attr_name": "temp1_high_threshold", + "drv_attr_name": "temp1_max" + }, + { + "attr_name": "temp1_max_hyst" + }, + { + "attr_name": "temp1_input" + } + ] + } + }, + "TEMP2": { + "dev_info": { + "device_type": "TEMP_SENSOR", + "device_name": "TEMP2", + "device_parent": "MUX1" + }, + "dev_attr": { + "display_name": "Temp_FAN2" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x3", + "dev_addr": "0x4A", + "dev_type": "tmp75" + }, + "attr_list": [ + { + "attr_name": "temp1_high_threshold", + "drv_attr_name": "temp1_max" + }, + { + "attr_name": "temp1_max_hyst" + }, + { + "attr_name": "temp1_input" + } + ] + } + }, + "TEMP3": { + "dev_info": { + "device_type": "TEMP_SENSOR", + "device_name": "TEMP3", + "device_parent": "MUX1" + }, + "dev_attr": { + "display_name": "Temp_PSUDB" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x5", + "dev_addr": "0x34", + "dev_type": "ucd90124" + }, + "attr_list": [ + { + "attr_name": "temp1_high_threshold", + "drv_attr_name": "temp2_max" + }, + { + "attr_name": "temp1_input", + "drv_attr_name": "temp2_input" + } + ] + } + }, + "TEMP4": { + "dev_info": { + "device_type": "TEMP_SENSOR", + "device_name": "TEMP4", + "device_parent": "MUX1" + }, + "dev_attr": { + "display_name": "Temp_MAC" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x5", + "dev_addr": "0x34", + "dev_type": "ucd90124" + }, + "attr_list": [ + { + "attr_name": "temp1_high_threshold", + "drv_attr_name": "temp3_max" + }, + { + "attr_name": "temp1_input", + "drv_attr_name": "temp3_input" + } + ] + } + }, + "TEMP5": { + "dev_info": { + "device_type": "TEMP_SENSOR", + "device_name": "TEMP5", + "device_parent": "MUX1" + }, + "dev_attr": { + "display_name": "Temp_INLET" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x5", + "dev_addr": "0x34", + "dev_type": "ucd90124" + }, + "attr_list": [ + { + "attr_name": "temp1_high_threshold", + "drv_attr_name": "temp4_max" + }, + { + "attr_name": "temp1_input", + "drv_attr_name": "temp4_input" + } + ] + } + }, + "PSU1": { + "dev_info": { + "device_type": "PSU", + "device_name": "PSU1", + "device_parent": "MUX1" + }, + "dev_attr": { + "dev_idx": "1", + "num_psu_fans": "1" + }, + "i2c": { + "interface": [ + { "itf":"pmbus", "dev":"PSU1-PMBUS" }, + { "itf":"eeprom", "dev":"PSU1-EEPROM" } + ] + }, + "bmc": { + "ipmitool": { + "attr_list": [ + { + "attr_name": "psu_present", + "bmc_cmd": "i2cget -y -f 2 0x58 0x0 > /dev/null 2>&1; [ $? -ne 0 ] && echo '0' || echo '1'", + "raw": "1", + "type": "raw" + } + ] + } + } + }, + "PSU1-PMBUS": { + "dev_info": { + "device_type": "PSU-PMBUS", + "device_name": "PSU1-PMBUS", + "device_parent": "MUX1", + "virt_parent": "PSU1" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x2", + "dev_addr": "0x58", + "dev_type": "psu_pmbus" + }, + "attr_list": [ + { + "attr_name": "psu_power_good", + "attr_devaddr": "0x33", + "attr_devtype": "cpld", + "attr_devname": "CPLD1", + "attr_offset": "0x59", + "attr_mask": "0x10", + "attr_cmpval": "0x10", + "attr_len": "1" + }, + { + "attr_name": "psu_model_name", + "attr_devaddr": "0x58", + "attr_devtype": "pmbus", + "attr_offset": "0x9a", + "attr_mask": "0x0", + "attr_cmpval": "0xff", + "attr_len": "12" + }, + { + "attr_name": "psu_mfr_id", + "attr_devaddr": "0x58", + "attr_devtype": "pmbus", + "attr_offset": "0x99", + "attr_mask": "0x0", + "attr_cmpval": "0xff", + "attr_len": "10" + }, + { + "attr_name": "psu_v_in", + "attr_devaddr": "0x58", + "attr_devtype": "pmbus", + "attr_offset": "0x88", + "attr_mask": "0x0", + "attr_cmpval": "0xff", + "attr_len": "2" + }, + { + "attr_name": "psu_i_in", + "attr_devaddr": "0x58", + "attr_devtype": "pmbus", + "attr_offset": "0x89", + "attr_mask": "0x0", + "attr_cmpval": "0xff", + "attr_len": "2" + }, + { + "attr_name": "psu_p_in", + "attr_devaddr": "0x58", + "attr_devtype": "pmbus", + "attr_offset": "0x97", + "attr_mask": "0x0", + "attr_cmpval": "0xff", + "attr_len": "2" + }, + { + "attr_name": "psu_v_out", + "attr_devaddr": "0x58", + "attr_devtype": "pmbus", + "attr_offset": "0x8b", + "attr_mask": "0x0", + "attr_cmpval": "0xff", + "attr_len": "2" + }, + { + "attr_name": "psu_v_out_min", + "attr_devaddr": "0x58", + "attr_devtype": "pmbus", + "attr_offset": "0xa4", + "attr_mask": "0x0", + "attr_cmpval": "0xff", + "attr_len": "2" + }, + { + "attr_name": "psu_v_out_max", + "attr_devaddr": "0x58", + "attr_devtype": "pmbus", + "attr_offset": "0xa5", + "attr_mask": "0x0", + "attr_cmpval": "0xff", + "attr_len": "2" + }, + { + "attr_name": "psu_i_out", + "attr_devaddr": "0x58", + "attr_devtype": "pmbus", + "attr_offset": "0x8c", + "attr_mask": "0x0", + "attr_cmpval": "0xff", + "attr_len": "2" + }, + { + "attr_name": "psu_p_out", + "attr_devaddr": "0x58", + "attr_devtype": "pmbus", + "attr_offset": "0x96", + "attr_mask": "0x0", + "attr_cmpval": "0xff", + "attr_len": "2" + }, + { + "attr_name": "psu_p_out_max", + "attr_devaddr": "0x58", + "attr_devtype": "pmbus", + "attr_offset": "0xa7", + "attr_mask": "0x0", + "attr_cmpval": "0xff", + "attr_len": "2" + }, + { + "attr_name": "psu_fan1_speed_rpm", + "attr_devaddr": "0x58", + "attr_devtype": "pmbus", + "attr_offset": "0x90", + "attr_mask": "0x0", + "attr_cmpval": "0xff", + "attr_len": "2" + }, + { + "attr_name": "psu_temp1_input", + "attr_devaddr": "0x58", + "attr_devtype": "pmbus", + "attr_offset": "0x8d", + "attr_mask": "0x0", + "attr_cmpval": "0xff", + "attr_len": "2" + } + ] + } + }, + "PSU1-EEPROM": + { + "dev_info": { + "device_type":"", + "device_name":"PSU1-EEPROM", + "device_parent":"MUX1", + "virt_parent":"PSU1" + }, + "i2c": + { + "topo_info":{ + "parent_bus":"0x2", + "dev_addr":"0x50", + "dev_type":"eeprom" + }, + "attr_list": + [ + { "attr_name":"eeprom" } + ] + } + }, + "PSU2": { + "dev_info": { + "device_type": "PSU", + "device_name": "PSU2", + "device_parent": "MUX1" + }, + "dev_attr": { + "dev_idx": "2", + "num_psu_fans": "1" + }, + "i2c": { + "interface": [ + { "itf":"pmbus", "dev":"PSU2-PMBUS" }, + { "itf":"eeprom", "dev":"PSU2-EEPROM" } + ] + }, + "bmc": { + "ipmitool": { + "attr_list": [ + { + "attr_name": "psu_present", + "bmc_cmd": "i2cget -y -f 2 0x59 0x0 > /dev/null 2>&1; [ $? -ne 0 ] && echo '0' || echo '1'", + "raw": "1", + "type": "raw" + } + ] + } + } + }, + "PSU2-PMBUS": { + "dev_info": { + "device_type": "PSU-PMBUS", + "device_name": "PSU2-PMBUS", + "device_parent": "MUX1", + "virt_parent": "PSU2" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x2", + "dev_addr": "0x59", + "dev_type": "psu_pmbus" + }, + "attr_list": [ + { + "attr_name": "psu_power_good", + "attr_devaddr": "0x33", + "attr_devtype": "cpld", + "attr_devname": "CPLD1", + "attr_offset": "0x59", + "attr_mask": "0x20", + "attr_cmpval": "0x20", + "attr_len": "1" + }, + { + "attr_name": "psu_model_name", + "attr_devaddr": "0x59", + "attr_devtype": "pmbus", + "attr_offset": "0x9a", + "attr_mask": "0x0", + "attr_cmpval": "0xff", + "attr_len": "12" + }, + { + "attr_name": "psu_mfr_id", + "attr_devaddr": "0x59", + "attr_devtype": "pmbus", + "attr_offset": "0x99", + "attr_mask": "0x0", + "attr_cmpval": "0xff", + "attr_len": "10" + }, + { + "attr_name": "psu_v_in", + "attr_devaddr": "0x59", + "attr_devtype": "pmbus", + "attr_offset": "0x88", + "attr_mask": "0x0", + "attr_cmpval": "0xff", + "attr_len": "2" + }, + { + "attr_name": "psu_i_in", + "attr_devaddr": "0x59", + "attr_devtype": "pmbus", + "attr_offset": "0x89", + "attr_mask": "0x0", + "attr_cmpval": "0xff", + "attr_len": "2" + }, + { + "attr_name": "psu_p_in", + "attr_devaddr": "0x59", + "attr_devtype": "pmbus", + "attr_offset": "0x97", + "attr_mask": "0x0", + "attr_cmpval": "0xff", + "attr_len": "2" + }, + { + "attr_name": "psu_v_out", + "attr_devaddr": "0x59", + "attr_devtype": "pmbus", + "attr_offset": "0x8b", + "attr_mask": "0x0", + "attr_cmpval": "0xff", + "attr_len": "2" + }, + { + "attr_name": "psu_v_out_min", + "attr_devaddr": "0x59", + "attr_devtype": "pmbus", + "attr_offset": "0xa4", + "attr_mask": "0x0", + "attr_cmpval": "0xff", + "attr_len": "2" + }, + { + "attr_name": "psu_v_out_max", + "attr_devaddr": "0x59", + "attr_devtype": "pmbus", + "attr_offset": "0xa5", + "attr_mask": "0x0", + "attr_cmpval": "0xff", + "attr_len": "2" + }, + { + "attr_name": "psu_i_out", + "attr_devaddr": "0x59", + "attr_devtype": "pmbus", + "attr_offset": "0x8c", + "attr_mask": "0x0", + "attr_cmpval": "0xff", + "attr_len": "2" + }, + { + "attr_name": "psu_p_out", + "attr_devaddr": "0x59", + "attr_devtype": "pmbus", + "attr_offset": "0x96", + "attr_mask": "0x0", + "attr_cmpval": "0xff", + "attr_len": "2" + }, + { + "attr_name": "psu_p_out_max", + "attr_devaddr": "0x59", + "attr_devtype": "pmbus", + "attr_offset": "0xa7", + "attr_mask": "0x0", + "attr_cmpval": "0xff", + "attr_len": "2" + }, + { + "attr_name": "psu_fan1_speed_rpm", + "attr_devaddr": "0x59", + "attr_devtype": "pmbus", + "attr_offset": "0x90", + "attr_mask": "0x0", + "attr_cmpval": "0xff", + "attr_len": "2" + }, + { + "attr_name": "psu_temp1_input", + "attr_devaddr": "0x59", + "attr_devtype": "pmbus", + "attr_offset": "0x8d", + "attr_mask": "0x0", + "attr_cmpval": "0xff", + "attr_len": "2" + } + ] + } + }, + "PSU2-EEPROM": + { + "dev_info": { + "device_type":"", + "device_name":"PSU2-EEPROM", + "device_parent":"MUX1", + "virt_parent":"PSU2" + }, + "i2c": + { + "topo_info":{ + "parent_bus":"0x2", + "dev_addr":"0x51", + "dev_type":"eeprom" + }, + "attr_list": + [ + { "attr_name":"eeprom" } + ] + } + }, + "FAN-CTRL": { + "dev_info": { + "device_type": "FAN", + "device_name": "FAN-CTRL", + "device_parent": "SMBUS1" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x1", + "dev_addr": "0x60", + "dev_type": "fan_cpld" + }, + "dev_attr": { "num_fantrays":"2"}, + "attr_list": [ + { + "attr_name": "fan1_present", + "attr_devaddr":"0x33", + "attr_devtype": "cpld", + "attr_devname":"CPLD1", + "attr_offset": "0x55", + "attr_mask": "0x1", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "fan2_present", + "attr_devaddr":"0x33", + "attr_devtype": "cpld", + "attr_devname":"CPLD1", + "attr_offset": "0x55", + "attr_mask": "0x2", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "fan1_direction", + "attr_devaddr":"0x21", + "attr_devtype": "gpio", + "attr_devname":"GPIO4", + "attr_offset": "0x4", + "attr_mask": "", + "attr_cmpval": "", + "attr_len": "" + }, + { + "attr_name": "fan2_direction", + "attr_devaddr":"0x21", + "attr_devtype": "gpio", + "attr_devname":"GPIO4", + "attr_offset": "0x3", + "attr_mask": "", + "attr_cmpval": "", + "attr_len": "" + } + ] + } + }, + "SYS_LED": { + "dev_info": { + "device_type": "LED", + "device_name": "SYS_LED" + }, + "dev_attr": { + "index": "0", + "flag": "ro" + }, + "i2c": { + "attr_list": [ + { + "attr_name": "green", + "bits": "7:4", + "descr": "Green", + "value": "0x09;0x0b", + "swpld_addr": "0x33", + "swpld_addr_offset": "0x81" + }, + { + "attr_name": "green_blink", + "bits": "7:4", + "descr": "Green Blinking", + "value": "0x0d;0x0f", + "swpld_addr": "0x33", + "swpld_addr_offset": "0x81" + }, + { + "attr_name": "yellow", + "bits": "7:4", + "descr": "Yellow", + "value": "0x08;0x0a", + "swpld_addr": "0x33", + "swpld_addr_offset": "0x81" + }, + { + "attr_name": "yellow_blink", + "bits": "7:4", + "descr": "Yellow Blinking", + "value": "0x0c;0x0e", + "swpld_addr": "0x33", + "swpld_addr_offset": "0x81" + }, + { + "attr_name": "off", + "bits": "7", + "descr": "Off", + "value": "0x0", + "swpld_addr": "0x33", + "swpld_addr_offset": "0x81" + } + ] + } + }, + "LOC_LED": { + "dev_info": { + "device_type": "LED", + "device_name": "LOC_LED" + }, + "dev_attr": { + "index": "0", + "flag": "rw" + }, + "i2c": { + "attr_list": [ + { + "attr_name": "blue", + "bits": "3:0", + "descr": "Bule", + "value": "0x09;0x0b", + "swpld_addr": "0x33", + "swpld_addr_offset": "0x81" + }, + { + "attr_name": "blue_blink", + "bits": "3:0", + "descr": "Blue Blinking", + "value": "0x0d;0x0f", + "swpld_addr": "0x33", + "swpld_addr_offset": "0x81" + }, + { + "attr_name": "off", + "bits": "3", + "descr": "Off", + "value": "0x0", + "swpld_addr": "0x33", + "swpld_addr_offset": "0x81" + } + ] + } + }, + "FAN_LED": { + "dev_info": { + "device_type": "LED", + "device_name": "FAN_LED" + }, + "dev_attr": { + "index": "0", + "flag": "ro" + }, + "i2c": { + "attr_list": [ + { + "attr_name": "green", + "bits": "7:4", + "descr": "Green", + "value": "0x09;0x0b", + "swpld_addr": "0x33", + "swpld_addr_offset": "0x83" + }, + { + "attr_name": "green_blink", + "bits": "7:4", + "descr": "Green Blinking", + "value": "0x0d;0x0f", + "swpld_addr": "0x33", + "swpld_addr_offset": "0x83" + }, + { + "attr_name": "yellow", + "bits": "7:4", + "descr": "Yellow", + "value": "0x08;0x0a", + "swpld_addr": "0x33", + "swpld_addr_offset": "0x83" + }, + { + "attr_name": "yellow_blink", + "bits": "7:4", + "descr": "Yellow Blinking", + "value": "0x0c;0x0e", + "swpld_addr": "0x33", + "swpld_addr_offset": "0x83" + }, + { + "attr_name": "off", + "bits": "7", + "descr": "Off", + "value": "0x0", + "swpld_addr": "0x33", + "swpld_addr_offset": "0x83" + } + ] + } + }, + "PSU2_LED": { + "dev_info": { + "device_type": "LED", + "device_name": "PSU_LED" + }, + "dev_attr": { + "index": "1", + "flag": "ro" + }, + "i2c": { + "attr_list": [ + { + "attr_name": "green", + "bits": "7:4", + "descr": "Green", + "value": "0x09;0x0b", + "swpld_addr": "0x33", + "swpld_addr_offset": "0x84" + }, + { + "attr_name": "green_blink", + "bits": "7:4", + "descr": "Green Blinking", + "value": "0x0d;0x0f", + "swpld_addr": "0x33", + "swpld_addr_offset": "0x84" + }, + { + "attr_name": "yellow", + "bits": "7:4", + "descr": "Yellow", + "value": "0x08;0x0a", + "swpld_addr": "0x33", + "swpld_addr_offset": "0x84" + }, + { + "attr_name": "yellow_blink", + "bits": "7:4", + "descr": "Yellow Blinking", + "value": "0x0c;0x0e", + "swpld_addr": "0x33", + "swpld_addr_offset": "0x84" + }, + { + "attr_name": "off", + "bits": "7", + "descr": "Off", + "value": "0x0", + "swpld_addr": "0x33", + "swpld_addr_offset": "0x84" + } + ] + } + }, + "PSU1_LED": { + "dev_info": { + "device_type": "LED", + "device_name": "PSU_LED" + }, + "dev_attr": { + "index": "0", + "flag": "ro" + }, + "i2c": { + "attr_list": [ + { + "attr_name": "green", + "bits": "3:0", + "descr": "Green", + "value": "0x09;0x0b", + "swpld_addr": "0x33", + "swpld_addr_offset": "0x84" + }, + { + "attr_name": "green_blink", + "bits": "3:0", + "descr": "Green Blinking", + "value": "0x0d;0x0f", + "swpld_addr": "0x33", + "swpld_addr_offset": "0x84" + }, + { + "attr_name": "yellow", + "bits": "3:0", + "descr": "Yellow", + "value": "0x08;0x0a", + "swpld_addr": "0x33", + "swpld_addr_offset": "0x84" + }, + { + "attr_name": "yellow_blink", + "bits": "3:0", + "descr": "Yellow Blinking", + "value": "0x0c;0x0e", + "swpld_addr": "0x33", + "swpld_addr_offset": "0x84" + }, + { + "attr_name": "off", + "bits": "3", + "descr": "Off", + "value": "0x0", + "swpld_addr": "0x33", + "swpld_addr_offset": "0x84" + } + ] + } + }, + "PORT49": { + "dev_info": { + "device_type": "SFP+", + "device_name": "PORT49", + "device_parent": "MUX3" + }, + "dev_attr": { + "dev_idx": "49" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT49-EEPROM" + }, + { + "itf": "control", + "dev": "PORT49-CTRL" + } + ] + } + }, + "PORT49-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT49-EEPROM", + "device_parent": "MUX3", + "virt_parent": "PORT49" + }, + "i2c": { + "topo_info": { + "parent_bus": "0xA", + "dev_addr": "0x50", + "dev_type": "optoe2" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT49-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT49-CTRL", + "device_parent": "MUX3", + "virt_parent": "PORT49" + }, + "i2c": { + "topo_info": { + "parent_bus": "0xA", + "dev_addr": "0x54", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x20", + "attr_devname": "GPIO1", + "attr_devtype": "gpio", + "attr_offset": "0x7", + "attr_mask": "", + "attr_cmpval": "", + "attr_len": "" + }, + { + "attr_name": "xcvr_rxlos", + "attr_devaddr": "0x22", + "attr_devname": "GPIO3", + "attr_devtype": "gpio", + "attr_offset": "0xF", + "attr_mask": "", + "attr_cmpval": "", + "attr_len": "" + }, + { + "attr_name": "xcvr_txfault", + "attr_devaddr": "0x22", + "attr_devname": "GPIO3", + "attr_devtype": "gpio", + "attr_offset": "0x7", + "attr_mask": "", + "attr_cmpval": "", + "attr_len": "" + }, + { + "attr_name": "xcvr_txdisable", + "attr_devaddr": "0x21", + "attr_devname": "GPIO2", + "attr_devtype": "gpio", + "attr_offset": "0xF", + "attr_mask": "", + "attr_cmpval": "", + "attr_len": "" + } + ] + } + }, + "PORT50": { + "dev_info": { + "device_type": "SFP+", + "device_name": "PORT50", + "device_parent": "MUX3" + }, + "dev_attr": { + "dev_idx": "50" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT50-EEPROM" + }, + { + "itf": "control", + "dev": "PORT50-CTRL" + } + ] + } + }, + "PORT50-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT50-EEPROM", + "device_parent": "MUX3", + "virt_parent": "PORT50" + }, + "i2c": { + "topo_info": { + "parent_bus": "0xB", + "dev_addr": "0x50", + "dev_type": "optoe2" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT50-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT50-CTRL", + "device_parent": "MUX3", + "virt_parent": "PORT50" + }, + "i2c": { + "topo_info": { + "parent_bus": "0xB", + "dev_addr": "0x54", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x20", + "attr_devname": "GPIO1", + "attr_devtype": "gpio", + "attr_offset": "0x6", + "attr_mask": "", + "attr_cmpval": "", + "attr_len": "" + }, + { + "attr_name": "xcvr_rxlos", + "attr_devaddr": "0x22", + "attr_devname": "GPIO3", + "attr_devtype": "gpio", + "attr_offset": "0xE", + "attr_mask": "", + "attr_cmpval": "", + "attr_len": "" + }, + { + "attr_name": "xcvr_txfault", + "attr_devaddr": "0x22", + "attr_devname": "GPIO3", + "attr_devtype": "gpio", + "attr_offset": "0x6", + "attr_mask": "", + "attr_cmpval": "", + "attr_len": "" + }, + { + "attr_name": "xcvr_txdisable", + "attr_devaddr": "0x21", + "attr_devname": "GPIO2", + "attr_devtype": "gpio", + "attr_offset": "0xE", + "attr_mask": "", + "attr_cmpval": "", + "attr_len": "" + } + ] + } + }, + "PORT51": { + "dev_info": { + "device_type": "SFP+", + "device_name": "PORT51", + "device_parent": "MUX3" + }, + "dev_attr": { + "dev_idx": "51" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT51-EEPROM" + }, + { + "itf": "control", + "dev": "PORT51-CTRL" + } + ] + } + }, + "PORT51-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT51-EEPROM", + "device_parent": "MUX3", + "virt_parent": "PORT51" + }, + "i2c": { + "topo_info": { + "parent_bus": "0xC", + "dev_addr": "0x50", + "dev_type": "optoe2" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT51-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT51-CTRL", + "device_parent": "MUX3", + "virt_parent": "PORT51" + }, + "i2c": { + "topo_info": { + "parent_bus": "0xC", + "dev_addr": "0x54", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x20", + "attr_devname": "GPIO1", + "attr_devtype": "gpio", + "attr_offset": "0x5", + "attr_mask": "", + "attr_cmpval": "", + "attr_len": "" + }, + { + "attr_name": "xcvr_rxlos", + "attr_devaddr": "0x22", + "attr_devname": "GPIO3", + "attr_devtype": "gpio", + "attr_offset": "0xD", + "attr_mask": "", + "attr_cmpval": "", + "attr_len": "" + }, + { + "attr_name": "xcvr_txfault", + "attr_devaddr": "0x22", + "attr_devname": "GPIO3", + "attr_devtype": "gpio", + "attr_offset": "0x5", + "attr_mask": "", + "attr_cmpval": "", + "attr_len": "" + }, + { + "attr_name": "xcvr_txdisable", + "attr_devaddr": "0x21", + "attr_devname": "GPIO2", + "attr_devtype": "gpio", + "attr_offset": "0xD", + "attr_mask": "", + "attr_cmpval": "", + "attr_len": "" + } + ] + } + }, + "PORT52": { + "dev_info": { + "device_type": "SFP+", + "device_name": "PORT52", + "device_parent": "MUX3" + }, + "dev_attr": { + "dev_idx": "52" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT52-EEPROM" + }, + { + "itf": "control", + "dev": "PORT52-CTRL" + } + ] + } + }, + "PORT52-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT52-EEPROM", + "device_parent": "MUX3", + "virt_parent": "PORT52" + }, + "i2c": { + "topo_info": { + "parent_bus": "0xD", + "dev_addr": "0x50", + "dev_type": "optoe2" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT52-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT52-CTRL", + "device_parent": "MUX3", + "virt_parent": "PORT52" + }, + "i2c": { + "topo_info": { + "parent_bus": "0xD", + "dev_addr": "0x54", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x20", + "attr_devname": "GPIO1", + "attr_devtype": "gpio", + "attr_offset": "0x4", + "attr_mask": "", + "attr_cmpval": "", + "attr_len": "" + }, + { + "attr_name": "xcvr_rxlos", + "attr_devaddr": "0x22", + "attr_devname": "GPIO3", + "attr_devtype": "gpio", + "attr_offset": "0xC", + "attr_mask": "", + "attr_cmpval": "", + "attr_len": "" + }, + { + "attr_name": "xcvr_txfault", + "attr_devaddr": "0x22", + "attr_devname": "GPIO3", + "attr_devtype": "gpio", + "attr_offset": "0x4", + "attr_mask": "", + "attr_cmpval": "", + "attr_len": "" + }, + { + "attr_name": "xcvr_txdisable", + "attr_devaddr": "0x21", + "attr_devname": "GPIO2", + "attr_devtype": "gpio", + "attr_offset": "0xC", + "attr_mask": "", + "attr_cmpval": "", + "attr_len": "" + } + ] + } + }, + "PORT53": { + "dev_info": { + "device_type": "SFP+", + "device_name": "PORT53", + "device_parent": "MUX3" + }, + "dev_attr": { + "dev_idx": "53" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT53-EEPROM" + }, + { + "itf": "control", + "dev": "PORT53-CTRL" + } + ] + } + }, + "PORT53-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT53-EEPROM", + "device_parent": "MUX3", + "virt_parent": "PORT53" + }, + "i2c": { + "topo_info": { + "parent_bus": "0xE", + "dev_addr": "0x50", + "dev_type": "optoe2" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT53-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT53-CTRL", + "device_parent": "MUX3", + "virt_parent": "PORT53" + }, + "i2c": { + "topo_info": { + "parent_bus": "0xE", + "dev_addr": "0x54", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x20", + "attr_devname": "GPIO1", + "attr_devtype": "gpio", + "attr_offset": "0x3", + "attr_mask": "", + "attr_cmpval": "", + "attr_len": "" + }, + { + "attr_name": "xcvr_rxlos", + "attr_devaddr": "0x22", + "attr_devname": "GPIO3", + "attr_devtype": "gpio", + "attr_offset": "0xB", + "attr_mask": "", + "attr_cmpval": "", + "attr_len": "" + }, + { + "attr_name": "xcvr_txfault", + "attr_devaddr": "0x22", + "attr_devname": "GPIO3", + "attr_devtype": "gpio", + "attr_offset": "0x3", + "attr_mask": "", + "attr_cmpval": "", + "attr_len": "" + }, + { + "attr_name": "xcvr_txdisable", + "attr_devaddr": "0x21", + "attr_devname": "GPIO2", + "attr_devtype": "gpio", + "attr_offset": "0xB", + "attr_mask": "", + "attr_cmpval": "", + "attr_len": "" + } + ] + } + }, + "PORT54": { + "dev_info": { + "device_type": "SFP+", + "device_name": "PORT54", + "device_parent": "MUX3" + }, + "dev_attr": { + "dev_idx": "54" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT54-EEPROM" + }, + { + "itf": "control", + "dev": "PORT54-CTRL" + } + ] + } + }, + "PORT54-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT54-EEPROM", + "device_parent": "MUX3", + "virt_parent": "PORT54" + }, + "i2c": { + "topo_info": { + "parent_bus": "0xF", + "dev_addr": "0x50", + "dev_type": "optoe2" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT54-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT54-CTRL", + "device_parent": "MUX3", + "virt_parent": "PORT54" + }, + "i2c": { + "topo_info": { + "parent_bus": "0xF", + "dev_addr": "0x54", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x20", + "attr_devname": "GPIO1", + "attr_devtype": "gpio", + "attr_offset": "0x2", + "attr_mask": "", + "attr_cmpval": "", + "attr_len": "" + }, + { + "attr_name": "xcvr_rxlos", + "attr_devaddr": "0x22", + "attr_devname": "GPIO3", + "attr_devtype": "gpio", + "attr_offset": "0xA", + "attr_mask": "", + "attr_cmpval": "", + "attr_len": "" + }, + { + "attr_name": "xcvr_txfault", + "attr_devaddr": "0x22", + "attr_devname": "GPIO3", + "attr_devtype": "gpio", + "attr_offset": "0x2", + "attr_mask": "", + "attr_cmpval": "", + "attr_len": "" + }, + { + "attr_name": "xcvr_txdisable", + "attr_devaddr": "0x21", + "attr_devname": "GPIO2", + "attr_devtype": "gpio", + "attr_offset": "0xA", + "attr_mask": "", + "attr_cmpval": "", + "attr_len": "" + } + ] + } + }, + "PORT55": { + "dev_info": { + "device_type": "SFP+", + "device_name": "PORT55", + "device_parent": "MUX3" + }, + "dev_attr": { + "dev_idx": "55" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT55-EEPROM" + }, + { + "itf": "control", + "dev": "PORT55-CTRL" + } + ] + } + }, + "PORT55-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT55-EEPROM", + "device_parent": "MUX3", + "virt_parent": "PORT55" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x10", + "dev_addr": "0x50", + "dev_type": "optoe2" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT55-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT55-CTRL", + "device_parent": "MUX3", + "virt_parent": "PORT55" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x10", + "dev_addr": "0x54", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x20", + "attr_devname": "GPIO1", + "attr_devtype": "gpio", + "attr_offset": "0x1", + "attr_mask": "", + "attr_cmpval": "", + "attr_len": "" + }, + { + "attr_name": "xcvr_rxlos", + "attr_devaddr": "0x22", + "attr_devname": "GPIO3", + "attr_devtype": "gpio", + "attr_offset": "0x9", + "attr_mask": "", + "attr_cmpval": "", + "attr_len": "" + }, + { + "attr_name": "xcvr_txfault", + "attr_devaddr": "0x22", + "attr_devname": "GPIO3", + "attr_devtype": "gpio", + "attr_offset": "0x1", + "attr_mask": "", + "attr_cmpval": "", + "attr_len": "" + }, + { + "attr_name": "xcvr_txdisable", + "attr_devaddr": "0x21", + "attr_devname": "GPIO2", + "attr_devtype": "gpio", + "attr_offset": "0x9", + "attr_mask": "", + "attr_cmpval": "", + "attr_len": "" + } + ] + } + }, + "PORT56": { + "dev_info": { + "device_type": "SFP+", + "device_name": "PORT56", + "device_parent": "MUX3" + }, + "dev_attr": { + "dev_idx": "56" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT56-EEPROM" + }, + { + "itf": "control", + "dev": "PORT56-CTRL" + } + ] + } + }, + "PORT56-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT56-EEPROM", + "device_parent": "MUX3", + "virt_parent": "PORT56" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x11", + "dev_addr": "0x50", + "dev_type": "optoe2" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT56-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT56-CTRL", + "device_parent": "MUX3", + "virt_parent": "PORT56" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x11", + "dev_addr": "0x54", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x20", + "attr_devname": "GPIO1", + "attr_devtype": "gpio", + "attr_offset": "0x0", + "attr_mask": "", + "attr_cmpval": "", + "attr_len": "" + }, + { + "attr_name": "xcvr_rxlos", + "attr_devaddr": "0x22", + "attr_devname": "GPIO3", + "attr_devtype": "gpio", + "attr_offset": "0x8", + "attr_mask": "", + "attr_cmpval": "", + "attr_len": "" + }, + { + "attr_name": "xcvr_txfault", + "attr_devaddr": "0x22", + "attr_devname": "GPIO3", + "attr_devtype": "gpio", + "attr_offset": "0x0", + "attr_mask": "", + "attr_cmpval": "", + "attr_len": "" + }, + { + "attr_name": "xcvr_txdisable", + "attr_devaddr": "0x21", + "attr_devname": "GPIO2", + "attr_devtype": "gpio", + "attr_offset": "0x8", + "attr_mask": "", + "attr_cmpval": "", + "attr_len": "" + } + ] + } + } +} \ No newline at end of file diff --git a/device/ufispace/x86_64-ufispace_s6301_56st-r0/pddf_support b/device/ufispace/x86_64-ufispace_s6301_56st-r0/pddf_support new file mode 100644 index 0000000000..e69de29bb2 diff --git a/device/ufispace/x86_64-ufispace_s6301_56st-r0/platform.json b/device/ufispace/x86_64-ufispace_s6301_56st-r0/platform.json new file mode 100644 index 0000000000..814d8577f2 --- /dev/null +++ b/device/ufispace/x86_64-ufispace_s6301_56st-r0/platform.json @@ -0,0 +1,651 @@ +{ + "chassis": { + "name": "S6301-56ST", + "components": [ + { + "name": "CPLD1" + }, + { + "name": "BIOS" + } + ], + "fans": [ + { + "name": "Fantray1" + }, + { + "name": "Fantray2" + } + ], + "fan_drawers":[ + { + "name": "Fantray1", + "num_fans" : 1, + "fans": [ + { + "name": "Fantray1" + } + ] + }, + { + "name": "Fantray2", + "num_fans" : 1, + "fans": [ + { + "name": "Fantray2" + } + ] + } + ], + "psus": [ + { + "name": "PSU1", + "fans": [ + { + "name": "PSU1_FAN1" + } + ], + "thermals": [ + { + "name": "PSU1_TEMP1" + } + ] + }, + { + "name": "PSU2", + "fans": [ + { + "name": "PSU2_FAN1" + } + ], + "thermals": [ + { + "name": "PSU2_TEMP1" + } + ] + } + ], + "thermals": [ + { + "name": "Temp_FAN1" + }, + { + "name": "Temp_FAN2" + }, + { + "name": "Temp_PSUDB" + }, + { + "name": "Temp_MAC" + }, + { + "name": "Temp_INLET" + } + ], + "sfps": [ + { + "name": "Ethernet0" + }, + { + "name": "Ethernet1" + }, + { + "name": "Ethernet2" + }, + { + "name": "Ethernet3" + }, + { + "name": "Ethernet4" + }, + { + "name": "Ethernet5" + }, + { + "name": "Ethernet6" + }, + { + "name": "Ethernet7" + }, + { + "name": "Ethernet8" + }, + { + "name": "Ethernet9" + }, + { + "name": "Ethernet10" + }, + { + "name": "Ethernet11" + }, + { + "name": "Ethernet12" + }, + { + "name": "Ethernet13" + }, + { + "name": "Ethernet14" + }, + { + "name": "Ethernet15" + }, + { + "name": "Ethernet16" + }, + { + "name": "Ethernet17" + }, + { + "name": "Ethernet18" + }, + { + "name": "Ethernet19" + }, + { + "name": "Ethernet20" + }, + { + "name": "Ethernet21" + }, + { + "name": "Ethernet22" + }, + { + "name": "Ethernet23" + }, + { + "name": "Ethernet24" + }, + { + "name": "Ethernet25" + }, + { + "name": "Ethernet26" + }, + { + "name": "Ethernet27" + }, + { + "name": "Ethernet28" + }, + { + "name": "Ethernet29" + }, + { + "name": "Ethernet30" + }, + { + "name": "Ethernet31" + }, + { + "name": "Ethernet32" + }, + { + "name": "Ethernet33" + }, + { + "name": "Ethernet34" + }, + { + "name": "Ethernet35" + }, + { + "name": "Ethernet36" + }, + { + "name": "Ethernet37" + }, + { + "name": "Ethernet38" + }, + { + "name": "Ethernet39" + }, + { + "name": "Ethernet40" + }, + { + "name": "Ethernet41" + }, + { + "name": "Ethernet42" + }, + { + "name": "Ethernet43" + }, + { + "name": "Ethernet44" + }, + { + "name": "Ethernet45" + }, + { + "name": "Ethernet46" + }, + { + "name": "Ethernet47" + }, + { + "name": "Ethernet48" + }, + { + "name": "Ethernet49" + }, + { + "name": "Ethernet50" + }, + { + "name": "Ethernet51" + }, + { + "name": "Ethernet52" + }, + { + "name": "Ethernet53" + }, + { + "name": "Ethernet54" + }, + { + "name": "Ethernet55" + } + ] + }, + "interfaces": { + "Ethernet0": { + "index": "0", + "lanes": "25", + "breakout_modes": { + "1x1G": ["Eth0(Port0)"] + } + }, + "Ethernet1": { + "index": "1", + "lanes": "26", + "breakout_modes": { + "1x1G": ["Eth1(Port1)"] + } + }, + "Ethernet2": { + "index": "2", + "lanes": "27", + "breakout_modes": { + "1x1G": ["Eth2(Port2)"] + } + }, + "Ethernet3": { + "index": "3", + "lanes": "28", + "breakout_modes": { + "1x1G": ["Eth3(Port3)"] + } + }, + "Ethernet4": { + "index": "4", + "lanes": "29", + "breakout_modes": { + "1x1G": ["Eth4(Port4)"] + } + }, + "Ethernet5": { + "index": "5", + "lanes": "30", + "breakout_modes": { + "1x1G": ["Eth5(Port5)"] + } + }, + "Ethernet6": { + "index": "6", + "lanes": "31", + "breakout_modes": { + "1x1G": ["Eth6(Port6)"] + } + }, + "Ethernet7": { + "index": "7", + "lanes": "32", + "breakout_modes": { + "1x1G": ["Eth7(Port7)"] + } + }, + "Ethernet8": { + "index": "8", + "lanes": "33", + "breakout_modes": { + "1x1G": ["Eth8(Port8)"] + } + }, + "Ethernet9": { + "index": "9", + "lanes": "34", + "breakout_modes": { + "1x1G": ["Eth9(Port9)"] + } + }, + "Ethernet10": { + "index": "10", + "lanes": "35", + "breakout_modes": { + "1x1G": ["Eth10(Port10)"] + } + }, + "Ethernet11": { + "index": "11", + "lanes": "36", + "breakout_modes": { + "1x1G": ["Eth11(Port11)"] + } + }, + "Ethernet12": { + "index": "12", + "lanes": "37", + "breakout_modes": { + "1x1G": ["Eth12(Port12)"] + } + }, + "Ethernet13": { + "index": "13", + "lanes": "38", + "breakout_modes": { + "1x1G": ["Eth13(Port13)"] + } + }, + "Ethernet14": { + "index": "14", + "lanes": "39", + "breakout_modes": { + "1x1G": ["Eth14(Port14)"] + } + }, + "Ethernet15": { + "index": "15", + "lanes": "40", + "breakout_modes": { + "1x1G": ["Eth15(Port15)"] + } + }, + "Ethernet16": { + "index": "16", + "lanes": "41", + "breakout_modes": { + "1x1G": ["Eth16(Port16)"] + } + }, + "Ethernet17": { + "index": "17", + "lanes": "42", + "breakout_modes": { + "1x1G": ["Eth17(Port17)"] + } + }, + "Ethernet18": { + "index": "18", + "lanes": "43", + "breakout_modes": { + "1x1G": ["Eth18(Port18)"] + } + }, + "Ethernet19": { + "index": "19", + "lanes": "44", + "breakout_modes": { + "1x1G": ["Eth19(Port19)"] + } + }, + "Ethernet20": { + "index": "20", + "lanes": "45", + "breakout_modes": { + "1x1G": ["Eth20(Port20)"] + } + }, + "Ethernet21": { + "index": "21", + "lanes": "46", + "breakout_modes": { + "1x1G": ["Eth21(Port21)"] + } + }, + "Ethernet22": { + "index": "22", + "lanes": "47", + "breakout_modes": { + "1x1G": ["Eth22(Port22)"] + } + }, + "Ethernet23": { + "index": "23", + "lanes": "48", + "breakout_modes": { + "1x1G": ["Eth23(Port23)"] + } + }, + "Ethernet24": { + "index": "24", + "lanes": "1", + "breakout_modes": { + "1x1G": ["Eth24(Port24)"] + } + }, + "Ethernet25": { + "index": "25", + "lanes": "2", + "breakout_modes": { + "1x1G": ["Eth25(Port25)"] + } + }, + "Ethernet26": { + "index": "26", + "lanes": "3", + "breakout_modes": { + "1x1G": ["Eth26(Port26)"] + } + }, + "Ethernet27": { + "index": "27", + "lanes": "4", + "breakout_modes": { + "1x1G": ["Eth27(Port27)"] + } + }, + "Ethernet28": { + "index": "28", + "lanes": "5", + "breakout_modes": { + "1x1G": ["Eth28(Port28)"] + } + }, + "Ethernet29": { + "index": "29", + "lanes": "6", + "breakout_modes": { + "1x1G": ["Eth29(Port29)"] + } + }, + "Ethernet30": { + "index": "30", + "lanes": "7", + "breakout_modes": { + "1x1G": ["Eth30(Port30)"] + } + }, + "Ethernet31": { + "index": "31", + "lanes": "8", + "breakout_modes": { + "1x1G": ["Eth31(Port31)"] + } + }, + "Ethernet32": { + "index": "32", + "lanes": "9", + "breakout_modes": { + "1x1G": ["Eth32(Port32)"] + } + }, + "Ethernet33": { + "index": "33", + "lanes": "10", + "breakout_modes": { + "1x1G": ["Eth33(Port33)"] + } + }, + "Ethernet34": { + "index": "34", + "lanes": "11", + "breakout_modes": { + "1x1G": ["Eth34(Port34)"] + } + }, + "Ethernet35": { + "index": "35", + "lanes": "12", + "breakout_modes": { + "1x1G": ["Eth35(Port35)"] + } + }, + "Ethernet36": { + "index": "36", + "lanes": "13", + "breakout_modes": { + "1x1G": ["Eth36(Port36)"] + } + }, + "Ethernet37": { + "index": "37", + "lanes": "14", + "breakout_modes": { + "1x1G": ["Eth37(Port37)"] + } + }, + "Ethernet38": { + "index": "38", + "lanes": "15", + "breakout_modes": { + "1x1G": ["Eth38(Port38)"] + } + }, + "Ethernet39": { + "index": "39", + "lanes": "16", + "breakout_modes": { + "1x1G": ["Eth39(Port39)"] + } + }, + "Ethernet40": { + "index": "40", + "lanes": "17", + "breakout_modes": { + "1x1G": ["Eth40(Port40)"] + } + }, + "Ethernet41": { + "index": "41", + "lanes": "18", + "breakout_modes": { + "1x1G": ["Eth41(Port41)"] + } + }, + "Ethernet42": { + "index": "42", + "lanes": "19", + "breakout_modes": { + "1x1G": ["Eth42(Port42)"] + } + }, + "Ethernet43": { + "index": "43", + "lanes": "20", + "breakout_modes": { + "1x1G": ["Eth43(Port43)"] + } + }, + "Ethernet44": { + "index": "44", + "lanes": "21", + "breakout_modes": { + "1x1G": ["Eth44(Port44)"] + } + }, + "Ethernet45": { + "index": "45", + "lanes": "22", + "breakout_modes": { + "1x1G": ["Eth45(Port45)"] + } + }, + "Ethernet46": { + "index": "46", + "lanes": "23", + "breakout_modes": { + "1x1G": ["Eth46(Port46)"] + } + }, + "Ethernet47": { + "index": "47", + "lanes": "24", + "breakout_modes": { + "1x1G": ["Eth47(Port47)"] + } + }, + "Ethernet48": { + "index": "48", + "lanes": "57", + "breakout_modes": { + "1x10G": ["Eth48(Port48)"] + } + }, + "Ethernet49": { + "index": "49", + "lanes": "58", + "breakout_modes": { + "1x10G": ["Eth49(Port49)"] + } + }, + "Ethernet50": { + "index": "50", + "lanes": "59", + "breakout_modes": { + "1x10G": ["Eth50(Port50)"] + } + }, + "Ethernet51": { + "index": "51", + "lanes": "60", + "breakout_modes": { + "1x10G": ["Eth51(Port51)"] + } + }, + "Ethernet52": { + "index": "52", + "lanes": "64", + "breakout_modes": { + "1x10G": ["Eth52(Port52)"] + } + }, + "Ethernet53": { + "index": "53", + "lanes": "63", + "breakout_modes": { + "1x10G": ["Eth53(Port53)"] + } + }, + "Ethernet54": { + "index": "54", + "lanes": "62", + "breakout_modes": { + "1x10G": ["Eth54(Port54)"] + } + }, + "Ethernet55": { + "index": "55", + "lanes": "61", + "breakout_modes": { + "1x10G": ["Eth55(Port55)"] + } + } + } +} + diff --git a/device/ufispace/x86_64-ufispace_s6301_56st-r0/platform_asic b/device/ufispace/x86_64-ufispace_s6301_56st-r0/platform_asic new file mode 100644 index 0000000000..9604676527 --- /dev/null +++ b/device/ufispace/x86_64-ufispace_s6301_56st-r0/platform_asic @@ -0,0 +1 @@ +broadcom diff --git a/device/ufispace/x86_64-ufispace_s6301_56st-r0/platform_components.json b/device/ufispace/x86_64-ufispace_s6301_56st-r0/platform_components.json new file mode 100644 index 0000000000..a581c95c99 --- /dev/null +++ b/device/ufispace/x86_64-ufispace_s6301_56st-r0/platform_components.json @@ -0,0 +1,10 @@ +{ + "chassis": { + "x86_64-ufispace_s6301_56st-r0": { + "component": { + "CPLD1": { }, + "BIOS": { } + } + } + } +} diff --git a/device/ufispace/x86_64-ufispace_s6301_56st-r0/platform_env.conf b/device/ufispace/x86_64-ufispace_s6301_56st-r0/platform_env.conf new file mode 100644 index 0000000000..6313683d88 --- /dev/null +++ b/device/ufispace/x86_64-ufispace_s6301_56st-r0/platform_env.conf @@ -0,0 +1,2 @@ +SYNCD_SHM_SIZE=256m + diff --git a/device/ufispace/x86_64-ufispace_s6301_56st-r0/pmon_daemon_control.json b/device/ufispace/x86_64-ufispace_s6301_56st-r0/pmon_daemon_control.json new file mode 100644 index 0000000000..e348e0168f --- /dev/null +++ b/device/ufispace/x86_64-ufispace_s6301_56st-r0/pmon_daemon_control.json @@ -0,0 +1,9 @@ +{ + "skip_pcied": false, + "skip_fancontrol": false, + "skip_thermalctld": false, + "skip_ledd": true, + "skip_xcvrd": false, + "skip_psud": false, + "skip_syseepromd": false +} diff --git a/device/ufispace/x86_64-ufispace_s6301_56st-r0/system_health_monitoring_config.json b/device/ufispace/x86_64-ufispace_s6301_56st-r0/system_health_monitoring_config.json new file mode 100644 index 0000000000..43816ab551 --- /dev/null +++ b/device/ufispace/x86_64-ufispace_s6301_56st-r0/system_health_monitoring_config.json @@ -0,0 +1,15 @@ +{ + "services_to_ignore": [], + "devices_to_ignore": [ + "asic", + "psu", + "fan" + ], + "user_defined_checkers": [], + "polling_interval": 60, + "led_color": { + "fault": "yellow_blink", + "normal": "green", + "booting": "green_blink" + } +} \ No newline at end of file diff --git a/device/ufispace/x86_64-ufispace_s7801_54xs-r0/UFISPACE-S7801-54XS/hwsku.json b/device/ufispace/x86_64-ufispace_s7801_54xs-r0/UFISPACE-S7801-54XS/hwsku.json new file mode 100644 index 0000000000..db472c5ce2 --- /dev/null +++ b/device/ufispace/x86_64-ufispace_s7801_54xs-r0/UFISPACE-S7801-54XS/hwsku.json @@ -0,0 +1,166 @@ +{ + "interfaces": { + "Ethernet0": { + "default_brkout_mode": "1x10G" + }, + "Ethernet1": { + "default_brkout_mode": "1x10G" + }, + "Ethernet2": { + "default_brkout_mode": "1x10G" + }, + "Ethernet3": { + "default_brkout_mode": "1x10G" + }, + "Ethernet4": { + "default_brkout_mode": "1x10G" + }, + "Ethernet5": { + "default_brkout_mode": "1x10G" + }, + "Ethernet6": { + "default_brkout_mode": "1x10G" + }, + "Ethernet7": { + "default_brkout_mode": "1x10G" + }, + "Ethernet8": { + "default_brkout_mode": "1x10G" + }, + "Ethernet9": { + "default_brkout_mode": "1x10G" + }, + "Ethernet10": { + "default_brkout_mode": "1x10G" + }, + "Ethernet11": { + "default_brkout_mode": "1x10G" + }, + "Ethernet12": { + "default_brkout_mode": "1x10G" + }, + "Ethernet13": { + "default_brkout_mode": "1x10G" + }, + "Ethernet14": { + "default_brkout_mode": "1x10G" + }, + "Ethernet15": { + "default_brkout_mode": "1x10G" + }, + "Ethernet16": { + "default_brkout_mode": "1x10G" + }, + "Ethernet17": { + "default_brkout_mode": "1x10G" + }, + "Ethernet18": { + "default_brkout_mode": "1x10G" + }, + "Ethernet19": { + "default_brkout_mode": "1x10G" + }, + "Ethernet20": { + "default_brkout_mode": "1x10G" + }, + "Ethernet21": { + "default_brkout_mode": "1x10G" + }, + "Ethernet22": { + "default_brkout_mode": "1x10G" + }, + "Ethernet23": { + "default_brkout_mode": "1x10G" + }, + "Ethernet24": { + "default_brkout_mode": "1x10G" + }, + "Ethernet25": { + "default_brkout_mode": "1x10G" + }, + "Ethernet26": { + "default_brkout_mode": "1x10G" + }, + "Ethernet27": { + "default_brkout_mode": "1x10G" + }, + "Ethernet28": { + "default_brkout_mode": "1x10G" + }, + "Ethernet29": { + "default_brkout_mode": "1x10G" + }, + "Ethernet30": { + "default_brkout_mode": "1x10G" + }, + "Ethernet31": { + "default_brkout_mode": "1x10G" + }, + "Ethernet32": { + "default_brkout_mode": "1x10G" + }, + "Ethernet33": { + "default_brkout_mode": "1x10G" + }, + "Ethernet34": { + "default_brkout_mode": "1x10G" + }, + "Ethernet35": { + "default_brkout_mode": "1x10G" + }, + "Ethernet36": { + "default_brkout_mode": "1x10G" + }, + "Ethernet37": { + "default_brkout_mode": "1x10G" + }, + "Ethernet38": { + "default_brkout_mode": "1x10G" + }, + "Ethernet39": { + "default_brkout_mode": "1x10G" + }, + "Ethernet40": { + "default_brkout_mode": "1x10G" + }, + "Ethernet41": { + "default_brkout_mode": "1x10G" + }, + "Ethernet42": { + "default_brkout_mode": "1x10G" + }, + "Ethernet43": { + "default_brkout_mode": "1x10G" + }, + "Ethernet44": { + "default_brkout_mode": "1x10G" + }, + "Ethernet45": { + "default_brkout_mode": "1x10G" + }, + "Ethernet46": { + "default_brkout_mode": "1x10G" + }, + "Ethernet47": { + "default_brkout_mode": "1x10G" + }, + "Ethernet48": { + "default_brkout_mode": "1x100G[40G]" + }, + "Ethernet52": { + "default_brkout_mode": "1x100G[40G]" + }, + "Ethernet56": { + "default_brkout_mode": "1x100G[40G]" + }, + "Ethernet60": { + "default_brkout_mode": "1x100G[40G]" + }, + "Ethernet64": { + "default_brkout_mode": "1x100G[40G]" + }, + "Ethernet68": { + "default_brkout_mode": "1x100G[40G]" + } + } +} diff --git a/device/ufispace/x86_64-ufispace_s7801_54xs-r0/UFISPACE-S7801-54XS/sai.profile b/device/ufispace/x86_64-ufispace_s7801_54xs-r0/UFISPACE-S7801-54XS/sai.profile new file mode 100644 index 0000000000..c712c4511d --- /dev/null +++ b/device/ufispace/x86_64-ufispace_s7801_54xs-r0/UFISPACE-S7801-54XS/sai.profile @@ -0,0 +1 @@ +SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/td3-x5-s7801-54xs.config.bcm diff --git a/device/ufispace/x86_64-ufispace_s7801_54xs-r0/UFISPACE-S7801-54XS/td3-x5-s7801-54xs.config.bcm b/device/ufispace/x86_64-ufispace_s7801_54xs-r0/UFISPACE-S7801-54XS/td3-x5-s7801-54xs.config.bcm new file mode 100644 index 0000000000..bfbc045d02 --- /dev/null +++ b/device/ufispace/x86_64-ufispace_s7801_54xs-r0/UFISPACE-S7801-54XS/td3-x5-s7801-54xs.config.bcm @@ -0,0 +1,502 @@ +# cfg version: r1, 20230628 + +pbmp_xport_xe=0x7fffffffffffffffdfffffffffffffffe + + +#FC 0 +phy_chain_tx_polarity_flip_physical{1}=0x0 +phy_chain_tx_polarity_flip_physical{2}=0x0 +phy_chain_tx_polarity_flip_physical{3}=0x0 +phy_chain_tx_polarity_flip_physical{4}=0x0 + +phy_chain_rx_polarity_flip_physical{1}=0x0 +phy_chain_rx_polarity_flip_physical{2}=0x0 +phy_chain_rx_polarity_flip_physical{3}=0x0 +phy_chain_rx_polarity_flip_physical{4}=0x0 + +phy_chain_tx_lane_map_physical{1.0}=0x0123 +phy_chain_rx_lane_map_physical{1.0}=0x0123 + +#FC 1 +phy_chain_tx_polarity_flip_physical{5}=0x0 +phy_chain_tx_polarity_flip_physical{6}=0x0 +phy_chain_tx_polarity_flip_physical{7}=0x0 +phy_chain_tx_polarity_flip_physical{8}=0x0 + +phy_chain_rx_polarity_flip_physical{5}=0x1 +phy_chain_rx_polarity_flip_physical{6}=0x1 +phy_chain_rx_polarity_flip_physical{7}=0x1 +phy_chain_rx_polarity_flip_physical{8}=0x1 + +phy_chain_tx_lane_map_physical{5.0}=0x0123 +phy_chain_rx_lane_map_physical{5.0}=0x0123 + +#FC 2 +phy_chain_tx_polarity_flip_physical{9}=0x0 +phy_chain_tx_polarity_flip_physical{10}=0x0 +phy_chain_tx_polarity_flip_physical{11}=0x0 +phy_chain_tx_polarity_flip_physical{12}=0x0 + +phy_chain_rx_polarity_flip_physical{9}=0x1 +phy_chain_rx_polarity_flip_physical{10}=0x1 +phy_chain_rx_polarity_flip_physical{11}=0x1 +phy_chain_rx_polarity_flip_physical{12}=0x1 + +phy_chain_tx_lane_map_physical{9.0}=0x0123 +phy_chain_rx_lane_map_physical{9.0}=0x0123 + +#FC 3 +phy_chain_tx_polarity_flip_physical{13}=0x0 +phy_chain_tx_polarity_flip_physical{14}=0x0 +phy_chain_tx_polarity_flip_physical{15}=0x0 +phy_chain_tx_polarity_flip_physical{16}=0x0 + +phy_chain_rx_polarity_flip_physical{13}=0x1 +phy_chain_rx_polarity_flip_physical{14}=0x1 +phy_chain_rx_polarity_flip_physical{15}=0x1 +phy_chain_rx_polarity_flip_physical{16}=0x1 + +phy_chain_tx_lane_map_physical{13.0}=0x0123 +phy_chain_rx_lane_map_physical{13.0}=0x0123 + +#FC 4 +phy_chain_tx_polarity_flip_physical{17}=0x0 +phy_chain_tx_polarity_flip_physical{18}=0x0 +phy_chain_tx_polarity_flip_physical{19}=0x0 +phy_chain_tx_polarity_flip_physical{20}=0x0 + +phy_chain_rx_polarity_flip_physical{17}=0x0 +phy_chain_rx_polarity_flip_physical{18}=0x0 +phy_chain_rx_polarity_flip_physical{19}=0x0 +phy_chain_rx_polarity_flip_physical{20}=0x0 + +phy_chain_tx_lane_map_physical{17.0}=0x0123 +phy_chain_rx_lane_map_physical{17.0}=0x0123 + +#FC 5 +phy_chain_tx_polarity_flip_physical{21}=0x0 +phy_chain_tx_polarity_flip_physical{22}=0x0 +phy_chain_tx_polarity_flip_physical{23}=0x0 +phy_chain_tx_polarity_flip_physical{24}=0x0 + +phy_chain_rx_polarity_flip_physical{21}=0x1 +phy_chain_rx_polarity_flip_physical{22}=0x1 +phy_chain_rx_polarity_flip_physical{23}=0x1 +phy_chain_rx_polarity_flip_physical{24}=0x1 + +phy_chain_tx_lane_map_physical{21.0}=0x0123 +phy_chain_rx_lane_map_physical{21.0}=0x0123 + +#FC 6 +phy_chain_tx_polarity_flip_physical{25}=0x0 +phy_chain_tx_polarity_flip_physical{26}=0x0 +phy_chain_tx_polarity_flip_physical{27}=0x0 +phy_chain_tx_polarity_flip_physical{28}=0x0 + +phy_chain_rx_polarity_flip_physical{25}=0x1 +phy_chain_rx_polarity_flip_physical{26}=0x1 +phy_chain_rx_polarity_flip_physical{27}=0x1 +phy_chain_rx_polarity_flip_physical{28}=0x1 + +phy_chain_tx_lane_map_physical{25.0}=0x0123 +phy_chain_rx_lane_map_physical{25.0}=0x0123 + +#FC 7 not use +phy_chain_tx_polarity_flip_physical{29}=0x0 +phy_chain_tx_polarity_flip_physical{30}=0x0 +phy_chain_tx_polarity_flip_physical{31}=0x0 +phy_chain_tx_polarity_flip_physical{32}=0x0 + +phy_chain_rx_polarity_flip_physical{29}=0x0 +phy_chain_rx_polarity_flip_physical{30}=0x0 +phy_chain_rx_polarity_flip_physical{31}=0x0 +phy_chain_rx_polarity_flip_physical{32}=0x0 + +phy_chain_tx_lane_map_physical{29.0}=0x0123 +phy_chain_rx_lane_map_physical{29.0}=0x0123 + +#FC 8 +phy_chain_tx_polarity_flip_physical{33}=0x1 +phy_chain_tx_polarity_flip_physical{34}=0x0 +phy_chain_tx_polarity_flip_physical{35}=0x1 +phy_chain_tx_polarity_flip_physical{36}=0x1 + +phy_chain_rx_polarity_flip_physical{33}=0x0 +phy_chain_rx_polarity_flip_physical{34}=0x0 +phy_chain_rx_polarity_flip_physical{35}=0x1 +phy_chain_rx_polarity_flip_physical{36}=0x0 + +phy_chain_tx_lane_map_physical{33.0}=0x3120 +phy_chain_rx_lane_map_physical{33.0}=0x0213 + +#FC 9 +phy_chain_tx_polarity_flip_physical{37}=0x0 +phy_chain_tx_polarity_flip_physical{38}=0x0 +phy_chain_tx_polarity_flip_physical{39}=0x1 +phy_chain_tx_polarity_flip_physical{40}=0x1 + +phy_chain_rx_polarity_flip_physical{37}=0x1 +phy_chain_rx_polarity_flip_physical{38}=0x1 +phy_chain_rx_polarity_flip_physical{39}=0x0 +phy_chain_rx_polarity_flip_physical{40}=0x0 + +phy_chain_tx_lane_map_physical{37.0}=0x2031 +phy_chain_rx_lane_map_physical{37.0}=0x1302 + +#FC 10 +phy_chain_tx_polarity_flip_physical{41}=0x0 +phy_chain_tx_polarity_flip_physical{42}=0x0 +phy_chain_tx_polarity_flip_physical{43}=0x0 +phy_chain_tx_polarity_flip_physical{44}=0x0 + +phy_chain_rx_polarity_flip_physical{41}=0x1 +phy_chain_rx_polarity_flip_physical{42}=0x1 +phy_chain_rx_polarity_flip_physical{43}=0x1 +phy_chain_rx_polarity_flip_physical{44}=0x1 + +phy_chain_tx_lane_map_physical{41.0}=0x3210 +phy_chain_rx_lane_map_physical{41.0}=0x0123 + +#FC 11 +phy_chain_tx_polarity_flip_physical{45}=0x0 +phy_chain_tx_polarity_flip_physical{46}=0x0 +phy_chain_tx_polarity_flip_physical{47}=0x1 +phy_chain_tx_polarity_flip_physical{48}=0x1 + +phy_chain_rx_polarity_flip_physical{45}=0x0 +phy_chain_rx_polarity_flip_physical{46}=0x0 +phy_chain_rx_polarity_flip_physical{47}=0x0 +phy_chain_rx_polarity_flip_physical{48}=0x1 + +phy_chain_tx_lane_map_physical{45.0}=0x3120 +phy_chain_rx_lane_map_physical{45.0}=0x2130 + +#FC 12 +phy_chain_tx_polarity_flip_physical{49}=0x1 +phy_chain_tx_polarity_flip_physical{50}=0x0 +phy_chain_tx_polarity_flip_physical{51}=0x0 +phy_chain_tx_polarity_flip_physical{52}=0x1 + +phy_chain_rx_polarity_flip_physical{49}=0x0 +phy_chain_rx_polarity_flip_physical{50}=0x1 +phy_chain_rx_polarity_flip_physical{51}=0x1 +phy_chain_rx_polarity_flip_physical{52}=0x0 + +phy_chain_tx_lane_map_physical{49.0}=0x3201 +phy_chain_rx_lane_map_physical{49.0}=0x1023 + +#FC 13 +phy_chain_tx_polarity_flip_physical{53}=0x0 +phy_chain_tx_polarity_flip_physical{54}=0x0 +phy_chain_tx_polarity_flip_physical{55}=0x1 +phy_chain_tx_polarity_flip_physical{56}=0x1 + +phy_chain_rx_polarity_flip_physical{53}=0x0 +phy_chain_rx_polarity_flip_physical{54}=0x0 +phy_chain_rx_polarity_flip_physical{55}=0x0 +phy_chain_rx_polarity_flip_physical{56}=0x1 + +phy_chain_tx_lane_map_physical{53.0}=0x3120 +phy_chain_rx_lane_map_physical{53.0}=0x2130 + +#FC 14 +phy_chain_tx_polarity_flip_physical{57}=0x1 +phy_chain_tx_polarity_flip_physical{58}=0x0 +phy_chain_tx_polarity_flip_physical{59}=0x0 +phy_chain_tx_polarity_flip_physical{60}=0x1 + +phy_chain_rx_polarity_flip_physical{57}=0x0 +phy_chain_rx_polarity_flip_physical{58}=0x1 +phy_chain_rx_polarity_flip_physical{59}=0x1 +phy_chain_rx_polarity_flip_physical{60}=0x0 + +phy_chain_tx_lane_map_physical{57.0}=0x3201 +phy_chain_rx_lane_map_physical{57.0}=0x1023 + +#FC 15 +phy_chain_tx_polarity_flip_physical{61}=0x0 +phy_chain_tx_polarity_flip_physical{62}=0x0 +phy_chain_tx_polarity_flip_physical{63}=0x0 +phy_chain_tx_polarity_flip_physical{64}=0x0 + +phy_chain_rx_polarity_flip_physical{61}=0x0 +phy_chain_rx_polarity_flip_physical{62}=0x0 +phy_chain_rx_polarity_flip_physical{63}=0x0 +phy_chain_rx_polarity_flip_physical{64}=0x0 + +phy_chain_tx_lane_map_physical{61.0}=0x3210 +phy_chain_rx_lane_map_physical{61.0}=0x3210 + +#FC 16 +phy_chain_tx_polarity_flip_physical{65}=0x0 +phy_chain_tx_polarity_flip_physical{66}=0x0 +phy_chain_tx_polarity_flip_physical{67}=0x0 +phy_chain_tx_polarity_flip_physical{68}=0x0 + +phy_chain_rx_polarity_flip_physical{65}=0x1 +phy_chain_rx_polarity_flip_physical{66}=0x1 +phy_chain_rx_polarity_flip_physical{67}=0x1 +phy_chain_rx_polarity_flip_physical{68}=0x1 + +phy_chain_tx_lane_map_physical{65.0}=0x3210 +phy_chain_rx_lane_map_physical{65.0}=0x3210 + +#FC 17 +phy_chain_tx_polarity_flip_physical{69}=0x0 +phy_chain_tx_polarity_flip_physical{70}=0x0 +phy_chain_tx_polarity_flip_physical{71}=0x0 +phy_chain_tx_polarity_flip_physical{72}=0x0 + +phy_chain_rx_polarity_flip_physical{69}=0x1 +phy_chain_rx_polarity_flip_physical{70}=0x1 +phy_chain_rx_polarity_flip_physical{71}=0x1 +phy_chain_rx_polarity_flip_physical{72}=0x1 + +phy_chain_tx_lane_map_physical{69.0}=0x3210 +phy_chain_rx_lane_map_physical{69.0}=0x3210 + +#FC 18 +phy_chain_tx_polarity_flip_physical{73}=0x0 +phy_chain_tx_polarity_flip_physical{74}=0x0 +phy_chain_tx_polarity_flip_physical{75}=0x0 +phy_chain_tx_polarity_flip_physical{76}=0x0 + +phy_chain_rx_polarity_flip_physical{73}=0x1 +phy_chain_rx_polarity_flip_physical{74}=0x1 +phy_chain_rx_polarity_flip_physical{75}=0x1 +phy_chain_rx_polarity_flip_physical{76}=0x1 + +phy_chain_tx_lane_map_physical{73.0}=0x3210 +phy_chain_rx_lane_map_physical{73.0}=0x3210 + +#FC 19 not use +phy_chain_tx_polarity_flip_physical{77}=0x0 +phy_chain_tx_polarity_flip_physical{78}=0x0 +phy_chain_tx_polarity_flip_physical{79}=0x0 +phy_chain_tx_polarity_flip_physical{80}=0x0 + +phy_chain_rx_polarity_flip_physical{77}=0x0 +phy_chain_rx_polarity_flip_physical{78}=0x0 +phy_chain_rx_polarity_flip_physical{79}=0x0 +phy_chain_rx_polarity_flip_physical{80}=0x0 + +phy_chain_tx_lane_map_physical{77.0}=0x3210 +phy_chain_rx_lane_map_physical{77.0}=0x3210 + + +#FC0 sfp28 port 0-3 +portmap_1=1:10 +portmap_2=2:10 +portmap_3=3:10 +portmap_4=4:10 + +#FC1 sfp28 port 4-7 +portmap_5=5:10 +portmap_6=6:10 +portmap_7=7:10 +portmap_8=8:10 + +#FC2 sfp28 port 8-11 +portmap_9=9:10 +portmap_10=10:10 +portmap_11=11:10 +portmap_12=12:10 + +#FC3 sfp28 port 12-15 +portmap_13=13:10 +portmap_14=14:10 +portmap_15=15:10 +portmap_16=16:10 + +#FC4 sfp28 port 16-19 +portmap_17=17:10 +portmap_18=18:10 +portmap_19=19:10 +portmap_20=20:10 + +#FC5 sfp28 port 20-23 +portmap_21=21:10 +portmap_22=22:10 +portmap_23=23:10 +portmap_24=24:10 + +#FC6 sfp28 port 24-27 +portmap_25=25:10 +portmap_26=26:10 +portmap_27=27:10 +portmap_28=28:10 + +#FC7 not use + +#FC10 sfp28 port 28-31 +portmap_33=41:10 +portmap_34=42:10 +portmap_35=43:10 +portmap_36=44:10 + +#FC15 sfp28 port 32-35 +portmap_37=61:10 +portmap_38=62:10 +portmap_39=63:10 +portmap_40=64:10 + +#FC16 sfp28 port 36-39 +portmap_41=65:10 +portmap_42=66:10 +portmap_43=67:10 +portmap_44=68:10 + +#FC17 sfp28 port 40-43 +portmap_45=69:10 +portmap_46=70:10 +portmap_47=71:10 +portmap_48=72:10 + +#FC18 sfp28 port 44-47 +portmap_49=73:10 +portmap_50=74:10 +portmap_51=75:10 +portmap_52=76:10 + +#FC9 qsfp port 48 +portmap_29=37:100 + +#FC8 qsfp port 49 +portmap_30=33:100 + +#FC11 qsfp port 50 +portmap_53=45:100 + +#FC12 qsfp port 51 +portmap_54=49:100 + +#FC13 qsfp port 52 +portmap_55=53:100 + +#FC14 qsfp port 53 +portmap_59=57:100 + +#FC19 not use + +# dport +dport_map_enable=1 + +dport_map_port_1=1 +dport_map_port_2=2 +dport_map_port_3=3 +dport_map_port_4=4 +dport_map_port_5=5 +dport_map_port_6=6 +dport_map_port_7=7 +dport_map_port_8=8 +dport_map_port_9=9 +dport_map_port_10=10 +dport_map_port_11=11 +dport_map_port_12=12 +dport_map_port_13=13 +dport_map_port_14=14 +dport_map_port_15=15 +dport_map_port_16=16 +dport_map_port_17=17 +dport_map_port_18=18 +dport_map_port_19=19 +dport_map_port_20=20 +dport_map_port_21=21 +dport_map_port_22=22 +dport_map_port_23=23 +dport_map_port_24=24 +dport_map_port_25=25 +dport_map_port_26=26 +dport_map_port_27=27 +dport_map_port_28=28 +dport_map_port_33=29 +dport_map_port_34=30 +dport_map_port_35=31 +dport_map_port_36=32 +dport_map_port_37=33 +dport_map_port_38=34 +dport_map_port_39=35 +dport_map_port_40=36 +dport_map_port_41=37 +dport_map_port_42=38 +dport_map_port_43=39 +dport_map_port_44=40 +dport_map_port_45=41 +dport_map_port_46=42 +dport_map_port_47=43 +dport_map_port_48=44 +dport_map_port_49=45 +dport_map_port_50=46 +dport_map_port_51=47 +dport_map_port_52=48 +dport_map_port_29=49 +dport_map_port_30=50 +dport_map_port_53=51 +dport_map_port_54=52 +dport_map_port_55=53 +dport_map_port_59=54 + +# cfg for timing +ptp_bs_fref_0=50000000 +ptp_bs_fref_1=50000000 + +port_flex_enable=1 +oversubscribe_mode=1 +core_clock_frequency=1525 + +#25G,10G and 1G support +serdes_10g_at_25g_vco=1 +serdes_1000x_at_25g_vco=1 + +l2xmsg_mode=1 +l2xmsg_hostbuf_size=16384 +module_64ports=0 + +#Interrupts and Parity +max_vp_lags=0 +schan_intr_enable=0 +tdma_timeout_usec=5000000 +stable_size=0x5500000 + +#Default L3 profile +l2_mem_entries=40960 +l3_alpm_enable=2 +l3_alpm_ipv6_128b_bkt_rsvd=1 +l3_mem_entries=40960 + +#Tunnels +use_all_splithorizon_groups=1 +sai_tunnel_support=1 +bcm_tunnel_term_compatible_mode=1 + +#RIOT Enable +riot_enable=1 +riot_overlay_l3_intf_mem_size=8192 +riot_overlay_l3_egress_mem_size=32768 +l3_ecmp_levels=2 +riot_overlay_ecmp_resilient_hash_size=16384 +pfc_deadlock_seq_control=1 + +mem_cache_enable=0 +ifp_inports_support_enable=1 +ipv6_lpm_128b_enable=0x1 +l3_max_ecmp_mode=1 +lpm_scaling_enable=0 +bcm_num_cos=10 +default_cpu_tx_queue=9 +mmu_lossless=0 +host_as_route_disable=1 +sai_fast_convergence_support=1 +flow_init_mode=1 +sai_interface_type_auto_detect=0 +mpls_mem_entries=16384 +vlan_xlate_1_mem_entries=65536 +vlan_xlate_2_mem_entries=16384 +sai_nbr_bcast_ifp_optimized=1 +sai_brcm_sonic_acl_enhancements=1 + +# Reduced Trap Group QSET for BRCM Sonic +sai_brcm_sonic_trap_group=1 +l2_entry_used_as_my_station=1 +multi_hash_recurse_depth_l3=2 + diff --git a/device/ufispace/x86_64-ufispace_s7801_54xs-r0/custom_led.bin b/device/ufispace/x86_64-ufispace_s7801_54xs-r0/custom_led.bin new file mode 100644 index 0000000000..af49a6baba Binary files /dev/null and b/device/ufispace/x86_64-ufispace_s7801_54xs-r0/custom_led.bin differ diff --git a/device/ufispace/x86_64-ufispace_s7801_54xs-r0/default_sku b/device/ufispace/x86_64-ufispace_s7801_54xs-r0/default_sku new file mode 100644 index 0000000000..9cb01149fb --- /dev/null +++ b/device/ufispace/x86_64-ufispace_s7801_54xs-r0/default_sku @@ -0,0 +1 @@ +UFISPACE-S7801-54XS t1 diff --git a/device/ufispace/x86_64-ufispace_s7801_54xs-r0/fancontrol b/device/ufispace/x86_64-ufispace_s7801_54xs-r0/fancontrol new file mode 100644 index 0000000000..1234cd994f --- /dev/null +++ b/device/ufispace/x86_64-ufispace_s7801_54xs-r0/fancontrol @@ -0,0 +1,10 @@ +# Configuration file generated by pwmconfig, changes will be lost +INTERVAL=10 +DEVPATH= +DEVNAME= +FCTEMPS= +FCFANS= +MINTEMP= +MAXTEMP= +MINSTART= +MINSTOP= diff --git a/device/ufispace/x86_64-ufispace_s7801_54xs-r0/installer.conf b/device/ufispace/x86_64-ufispace_s7801_54xs-r0/installer.conf new file mode 100644 index 0000000000..74b02f0766 --- /dev/null +++ b/device/ufispace/x86_64-ufispace_s7801_54xs-r0/installer.conf @@ -0,0 +1,4 @@ +CONSOLE_PORT=0x3f8 +CONSOLE_DEV=0 +CONSOLE_SPEED=115200 +ONIE_PLATFORM_EXTRA_CMDLINE_LINUX="modprobe.blacklist=gpio_ich,qat_c3xxx nomodeset pcie_aspm=off" diff --git a/device/ufispace/x86_64-ufispace_s7801_54xs-r0/led_proc_init.soc b/device/ufispace/x86_64-ufispace_s7801_54xs-r0/led_proc_init.soc new file mode 100644 index 0000000000..57ee7fedaf --- /dev/null +++ b/device/ufispace/x86_64-ufispace_s7801_54xs-r0/led_proc_init.soc @@ -0,0 +1,3 @@ +m0 load 0 0x3800 /usr/share/sonic/platform/custom_led.bin +led auto on +led start diff --git a/device/ufispace/x86_64-ufispace_s7801_54xs-r0/pcie.yaml b/device/ufispace/x86_64-ufispace_s7801_54xs-r0/pcie.yaml new file mode 100644 index 0000000000..c2465f5e0b --- /dev/null +++ b/device/ufispace/x86_64-ufispace_s7801_54xs-r0/pcie.yaml @@ -0,0 +1,172 @@ +- bus: '00' + dev: '00' + fn: '0' + id: '1980' + name: 'Host bridge: Intel Corporation Atom Processor C3000 Series System Agent (rev + 11)' +- bus: '00' + dev: '04' + fn: '0' + id: 19a1 + name: 'Host bridge: Intel Corporation Atom Processor C3000 Series Error Registers + (rev 11)' +- bus: '00' + dev: '05' + fn: '0' + id: 19a2 + name: 'Generic system peripheral [0807]: Intel Corporation Atom Processor C3000 + Series Root Complex Event Collector (rev 11)' +- bus: '00' + dev: '06' + fn: '0' + id: 19a3 + name: 'PCI bridge: Intel Corporation Atom Processor C3000 Series Integrated QAT + Root Port (rev 11)' +- bus: '00' + dev: 09 + fn: '0' + id: 19a4 + name: 'PCI bridge: Intel Corporation Atom Processor C3000 Series PCI Express Root + Port #0 (rev 11)' +- bus: '00' + dev: 0a + fn: '0' + id: 19a5 + name: 'PCI bridge: Intel Corporation Atom Processor C3000 Series PCI Express Root + Port #1 (rev 11)' +- bus: '00' + dev: 0b + fn: '0' + id: 19a6 + name: 'PCI bridge: Intel Corporation Atom Processor C3000 Series PCI Express Root + Port #2 (rev 11)' +- bus: '00' + dev: 0e + fn: '0' + id: 19a8 + name: 'PCI bridge: Intel Corporation Atom Processor C3000 Series PCI Express Root + Port #4 (rev 11)' +- bus: '00' + dev: 0f + fn: '0' + id: 19a9 + name: 'PCI bridge: Intel Corporation Atom Processor C3000 Series PCI Express Root + Port #5 (rev 11)' +- bus: '00' + dev: '10' + fn: '0' + id: 19aa + name: 'PCI bridge: Intel Corporation Atom Processor C3000 Series PCI Express Root + Port #6 (rev 11)' +- bus: '00' + dev: '11' + fn: '0' + id: 19ab + name: 'PCI bridge: Intel Corporation Atom Processor C3000 Series PCI Express Root + Port #7 (rev 11)' +- bus: '00' + dev: '12' + fn: '0' + id: 19ac + name: 'System peripheral: Intel Corporation Atom Processor C3000 Series SMBus Contoller + - Host (rev 11)' +- bus: '00' + dev: '14' + fn: '0' + id: 19c2 + name: 'SATA controller: Intel Corporation Atom Processor C3000 Series SATA Controller + 1 (rev 11)' +- bus: '00' + dev: '15' + fn: '0' + id: 19d0 + name: 'USB controller: Intel Corporation Atom Processor C3000 Series USB 3.0 xHCI + Controller (rev 11)' +- bus: '00' + dev: '16' + fn: '0' + id: 19d1 + name: 'PCI bridge: Intel Corporation Atom Processor C3000 Series Integrated LAN + Root Port #0 (rev 11)' +- bus: '00' + dev: '17' + fn: '0' + id: 19d2 + name: 'PCI bridge: Intel Corporation Atom Processor C3000 Series Integrated LAN + Root Port #1 (rev 11)' +- bus: '00' + dev: '18' + fn: '0' + id: 19d3 + name: 'Communication controller: Intel Corporation Atom Processor C3000 Series ME + HECI 1 (rev 11)' +- bus: '00' + dev: 1c + fn: '0' + id: 19db + name: 'SD Host controller: Intel Corporation Device 19db (rev 11)' +- bus: '00' + dev: 1f + fn: '0' + id: 19dc + name: 'ISA bridge: Intel Corporation Atom Processor C3000 Series LPC or eSPI (rev + 11)' +- bus: '00' + dev: 1f + fn: '2' + id: 19de + name: 'Memory controller: Intel Corporation Atom Processor C3000 Series Power Management + Controller (rev 11)' +- bus: '00' + dev: 1f + fn: '4' + id: 19df + name: 'SMBus: Intel Corporation Atom Processor C3000 Series SMBus controller (rev + 11)' +- bus: '00' + dev: 1f + fn: '5' + id: 19e0 + name: 'Serial bus controller [0c80]: Intel Corporation Atom Processor C3000 Series + SPI Controller (rev 11)' +- bus: '01' + dev: '00' + fn: '0' + id: 19e2 + name: 'Co-processor: Intel Corporation Atom Processor C3000 Series QuickAssist Technology + (rev 11)' +- bus: '04' + dev: '00' + fn: '0' + id: b771 + name: 'Ethernet controller: Broadcom Inc. and subsidiaries Device b771 (rev 01)' +- bus: '06' + dev: '00' + fn: '0' + id: '1533' + name: 'Ethernet controller: Intel Corporation I210 Gigabit Network Connection (rev + 03)' +- bus: 09 + dev: '00' + fn: '0' + id: 15c3 + name: 'Ethernet controller: Intel Corporation Ethernet Connection X553 Backplane + (rev 11)' +- bus: 09 + dev: '00' + fn: '1' + id: 15c3 + name: 'Ethernet controller: Intel Corporation Ethernet Connection X553 Backplane + (rev 11)' +- bus: 0a + dev: '00' + fn: '0' + id: 15c3 + name: 'Ethernet controller: Intel Corporation Ethernet Connection X553 Backplane + (rev 11)' +- bus: 0a + dev: '00' + fn: '1' + id: 15c3 + name: 'Ethernet controller: Intel Corporation Ethernet Connection X553 Backplane + (rev 11)' diff --git a/device/ufispace/x86_64-ufispace_s7801_54xs-r0/pddf/pd-plugin.json b/device/ufispace/x86_64-ufispace_s7801_54xs-r0/pddf/pd-plugin.json new file mode 100644 index 0000000000..32df3d822e --- /dev/null +++ b/device/ufispace/x86_64-ufispace_s7801_54xs-r0/pddf/pd-plugin.json @@ -0,0 +1,98 @@ +{ + + "XCVR": + { + "xcvr_present": + { + "i2c": + { + "valmap-SFP": {"1":true, "0":false }, + "valmap-SFP28": {"1":true, "0":false }, + "valmap-QSFP28": {"1":true, "0":false }, + "valmap-QSFP-DD": {"1":true, "0":false} + } + }, + + "plug_status": + { + "inserted": "1", + "removed": "0" + } + }, + "PSU": + { + "psu_present": + { + "i2c": + { + "valmap": { "1":true, "0":false } + }, + "bmc": + { + "valmap": { "0x0280|":true, "0x0180|":false } + } + }, + + "psu_power_good": + { + "i2c": + { + "valmap": { "1": true, "0":false } + }, + "bmc": + { + "valmap": { "0x0280|":true, "0x0180|":false } + } + }, + + "psu_fan_dir": + { + "bmc": + { + "valmap": {"0": "UNKNOWN", "1":"INTAKE", "2":"EXHAUST"} + } + }, + + "psu_support_list": + [ + {"Manufacturer": "FSPGROUP", "Name": "YNEB0450BM", "MaxSpd": "PSU_FAN_MAX_SPEED_AC", "Type": "AC"}, + {"Manufacturer": "FSPGROUP", "Name": "YNEB0450AM", "MaxSpd": "PSU_FAN_MAX_SPEED_DC", "Type": "DC"}, + {"Manufacturer": "DELTA", "Name": "DPS-450AB-27", "MaxSpd": "PSU_FAN_MAX_SPEED_AC", "Type": "AC"}, + {"Manufacturer": "DELTA", "Name": "DPS-450AB-28", "MaxSpd": "PSU_FAN_MAX_SPEED_DC", "Type": "DC"} + ], + + "valmap": { + "PSU_FAN_MAX_SPEED":"20000", + "PSU_FAN_MAX_SPEED_AC":"20000", + "PSU_FAN_MAX_SPEED_DC":"18000", + "DEFAULT_TYPE": "AC" + } + }, + "FAN": + { + "direction": + { + "bmc": + { + "valmap": {"0": "UNKNOWN", "1":"INTAKE", "2":"EXHAUST"} + } + }, + + "present": + { + "i2c": + { + "valmap": {"1":true, "0":false} + }, + "bmc": + { + "valmap": { "0x0280|":true, "0x0180|":false, "Device Present":true, "Device Absent":false} + } + }, + "FAN_MAX_SPEED":"25000" + }, + "REBOOT_CAUSE": + { + "reboot_cause_file": "/host/reboot-cause/reboot-cause.txt" + } +} diff --git a/device/ufispace/x86_64-ufispace_s7801_54xs-r0/pddf/pddf-device.json b/device/ufispace/x86_64-ufispace_s7801_54xs-r0/pddf/pddf-device.json new file mode 100644 index 0000000000..b05b6c7b2d --- /dev/null +++ b/device/ufispace/x86_64-ufispace_s7801_54xs-r0/pddf/pddf-device.json @@ -0,0 +1,7888 @@ +{ + "PLATFORM": { + "num_psus": 2, + "num_fantrays": 5, + "num_fans_pertray": 1, + "num_ports": 54, + "num_temps": 8, + "pddf_dev_types": { + "description": "PDDF supported devices", + "CPLD": [ + "i2c_cpld" + ], + "PSU": [ + "psu_eeprom", + "psu_pmbus" + ], + "PORT_MODULE": [ + "pddf_xcvr" + ] + }, + "std_perm_kos": [ + "i2c-i801", + "i2c-ismt" + ], + "std_kos": [ + "i2c_dev", + "i2c_mux_pca954x", + "coretemp", + "optoe", + "gpio-pca953x" + ], + "pddf_kos": [ + "pddf_client_module", + "pddf_cpld_module", + "pddf_cpld_driver", + "pddf_mux_module", + "pddf_xcvr_module", + "pddf_xcvr_driver_module", + "pddf_psu_driver_module", + "pddf_psu_module", + "pddf_fan_driver_module", + "pddf_fan_module", + "pddf_led_module" + ], + "custom_kos": [ + "x86-64-ufispace-s7801-54xs-lpc", + "x86-64-ufispace-s7801-54xs-sys-eeprom", + "pddf_custom_gpio_module", + "pddf_custom_sysstatus_module" + ] + }, + "SYSTEM": { + "dev_info": { + "device_type": "CPU", + "device_name": "ROOT_COMPLEX", + "device_parent": null + }, + "i2c": { + "CONTROLLERS": [ + { + "dev_name": "i2c-1", + "dev": "SMBUS1" + }, + { + "dev_name": "i2c-0", + "dev": "SMBUS0" + } + ] + } + }, + "SMBUS0": { + "dev_info": { + "device_type": "SMBUS", + "device_name": "SMBUS0", + "device_parent": "SYSTEM" + }, + "i2c": { + "topo_info": { + "dev_addr": "0x0" + }, + "DEVICES": [ + { + "dev": "MUX3" + } + ] + } + }, + "SMBUS1": { + "dev_info": { + "device_type": "SMBUS", + "device_name": "SMBUS1", + "device_parent": "SYSTEM" + }, + "i2c": { + "topo_info": { + "dev_addr": "0x1" + }, + "DEVICES": [ + { + "dev": "MUX1" + }, + { + "dev": "MUX2" + } + ] + } + }, + "MUX1": { + "dev_info": { + "device_type": "MUX", + "device_name": "MUX1", + "device_parent": "SMBUS1" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x1", + "dev_addr": "0x70", + "dev_type": "pca9548" + }, + "dev_attr": { + "virt_bus": "0x2", + "idle_state": "-2" + }, + "channel": [ + { + "chn": "0", + "dev": "CPLD1" + }, + { + "chn": "0", + "dev": "CPLD2" + }, + { + "chn": "0", + "dev": "PSU1" + }, + { + "chn": "0", + "dev": "PSU2" + }, + { + "chn": "3", + "dev": "EEPROM1" + }, + { + "chn": "4", + "dev": "GPIO1" + }, + { + "chn": "4", + "dev": "GPIO2" + }, + { + "chn": "5", + "dev": "GPIO3" + }, + { + "chn": "5", + "dev": "GPIO4" + } + ] + } + }, + "MUX2": { + "dev_info": { + "device_type": "MUX", + "device_name": "MUX2", + "device_parent": "SMBUS1" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x1", + "dev_addr": "0x71", + "dev_type": "pca9548" + }, + "dev_attr": { + "virt_bus": "0xa", + "idle_state": "-2" + }, + "channel": [ + ] + } + }, + "MUX3": { + "dev_info": { + "device_type": "MUX", + "device_name": "MUX3", + "device_parent": "SMBUS0" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x0", + "dev_addr": "0x72", + "dev_type": "pca9548" + }, + "dev_attr": { + "virt_bus": "0x12", + "idle_state": "-2" + }, + "channel": [ + { + "chn": "0", + "dev": "MUX4" + }, + { + "chn": "1", + "dev": "MUX5" + }, + { + "chn": "2", + "dev": "MUX6" + }, + { + "chn": "3", + "dev": "MUX7" + }, + { + "chn": "4", + "dev": "MUX8" + }, + { + "chn": "5", + "dev": "MUX9" + }, + { + "chn": "6", + "dev": "MUX10" + } + ] + } + }, + "MUX4": { + "dev_info": { + "device_type": "MUX", + "device_name": "MUX4", + "device_parent": "MUX3" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x12", + "dev_addr": "0x73", + "dev_type": "pca9548" + }, + "dev_attr": { + "virt_bus": "0x1a", + "idle_state": "-2" + }, + "channel": [ + { + "chn": "0", + "dev": "PORT1" + }, + { + "chn": "1", + "dev": "PORT2" + }, + { + "chn": "2", + "dev": "PORT3" + }, + { + "chn": "3", + "dev": "PORT4" + }, + { + "chn": "4", + "dev": "PORT5" + }, + { + "chn": "5", + "dev": "PORT6" + }, + { + "chn": "6", + "dev": "PORT7" + }, + { + "chn": "7", + "dev": "PORT8" + } + ] + } + }, + "MUX5": { + "dev_info": { + "device_type": "MUX", + "device_name": "MUX5", + "device_parent": "MUX3" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x13", + "dev_addr": "0x73", + "dev_type": "pca9548" + }, + "dev_attr": { + "virt_bus": "0x22", + "idle_state": "-2" + }, + "channel": [ + { + "chn": "0", + "dev": "PORT9" + }, + { + "chn": "1", + "dev": "PORT10" + }, + { + "chn": "2", + "dev": "PORT11" + }, + { + "chn": "3", + "dev": "PORT12" + }, + { + "chn": "4", + "dev": "PORT13" + }, + { + "chn": "5", + "dev": "PORT14" + }, + { + "chn": "6", + "dev": "PORT15" + }, + { + "chn": "7", + "dev": "PORT16" + } + ] + } + }, + "MUX6": { + "dev_info": { + "device_type": "MUX", + "device_name": "MUX6", + "device_parent": "MUX3" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x14", + "dev_addr": "0x73", + "dev_type": "pca9548" + }, + "dev_attr": { + "virt_bus": "0x2a", + "idle_state": "-2" + }, + "channel": [ + { + "chn": "0", + "dev": "PORT17" + }, + { + "chn": "1", + "dev": "PORT18" + }, + { + "chn": "2", + "dev": "PORT19" + }, + { + "chn": "3", + "dev": "PORT20" + }, + { + "chn": "4", + "dev": "PORT21" + }, + { + "chn": "5", + "dev": "PORT22" + }, + { + "chn": "6", + "dev": "PORT23" + }, + { + "chn": "7", + "dev": "PORT24" + } + ] + } + }, + "MUX7": { + "dev_info": { + "device_type": "MUX", + "device_name": "MUX7", + "device_parent": "MUX3" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x15", + "dev_addr": "0x73", + "dev_type": "pca9548" + }, + "dev_attr": { + "virt_bus": "032", + "idle_state": "-2" + }, + "channel": [ + { + "chn": "0", + "dev": "PORT25" + }, + { + "chn": "1", + "dev": "PORT26" + }, + { + "chn": "2", + "dev": "PORT27" + }, + { + "chn": "3", + "dev": "PORT28" + }, + { + "chn": "4", + "dev": "PORT29" + }, + { + "chn": "5", + "dev": "PORT30" + }, + { + "chn": "6", + "dev": "PORT31" + }, + { + "chn": "7", + "dev": "PORT32" + } + ] + } + }, + "MUX8": { + "dev_info": { + "device_type": "MUX", + "device_name": "MUX8", + "device_parent": "MUX3" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x16", + "dev_addr": "0x73", + "dev_type": "pca9548" + }, + "dev_attr": { + "virt_bus": "03a", + "idle_state": "-2" + }, + "channel": [ + { + "chn": "0", + "dev": "PORT33" + }, + { + "chn": "1", + "dev": "PORT34" + }, + { + "chn": "2", + "dev": "PORT35" + }, + { + "chn": "3", + "dev": "PORT36" + }, + { + "chn": "4", + "dev": "PORT37" + }, + { + "chn": "5", + "dev": "PORT38" + }, + { + "chn": "6", + "dev": "PORT39" + }, + { + "chn": "7", + "dev": "PORT40" + } + ] + } + }, + "MUX9": { + "dev_info": { + "device_type": "MUX", + "device_name": "MUX9", + "device_parent": "MUX3" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x17", + "dev_addr": "0x73", + "dev_type": "pca9548" + }, + "dev_attr": { + "virt_bus": "042", + "idle_state": "-2" + }, + "channel": [ + { + "chn": "0", + "dev": "PORT41" + }, + { + "chn": "1", + "dev": "PORT42" + }, + { + "chn": "2", + "dev": "PORT43" + }, + { + "chn": "3", + "dev": "PORT44" + }, + { + "chn": "4", + "dev": "PORT45" + }, + { + "chn": "5", + "dev": "PORT46" + }, + { + "chn": "6", + "dev": "PORT47" + }, + { + "chn": "7", + "dev": "PORT48" + } + ] + } + }, + "MUX10": { + "dev_info": { + "device_type": "MUX", + "device_name": "MUX10", + "device_parent": "MUX3" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x18", + "dev_addr": "0x73", + "dev_type": "pca9548" + }, + "dev_attr": { + "virt_bus": "04a", + "idle_state": "-2" + }, + "channel": [ + { + "chn": "0", + "dev": "PORT49" + }, + { + "chn": "1", + "dev": "PORT50" + }, + { + "chn": "2", + "dev": "PORT51" + }, + { + "chn": "3", + "dev": "PORT52" + }, + { + "chn": "4", + "dev": "PORT53" + }, + { + "chn": "5", + "dev": "PORT54" + } + ] + } + }, + "CPLD1": { + "dev_info": { + "device_type": "CPLD", + "device_name": "CPLD1", + "device_parent": "MUX1" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x2", + "dev_addr": "0x30", + "dev_type": "i2c_cpld" + }, + "dev_attr": {} + } + }, + "CPLD2": { + "dev_info": { + "device_type": "CPLD", + "device_name": "CPLD2", + "device_parent": "MUX1" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x2", + "dev_addr": "0x31", + "dev_type": "i2c_cpld" + }, + "dev_attr": {} + } + }, + "SYSSTATUS": { + "dev_info": { + "device_type": "SYSSTAT", + "device_name": "SYSSTATUS" + }, + "dev_attr": {}, + "attr_list": + [ + { + "attr_name": "board_sku_id", + "attr_devaddr": "0x30", + "attr_offset": "0x0", + "attr_mask": "0xff", + "attr_len": "0x1" + }, + { + "attr_name": "board_hw_id", + "attr_devaddr": "0x30", + "attr_offset": "0x1", + "attr_mask": "0x03", + "attr_len": "0x1" + }, + { + "attr_name": "board_deph_id", + "attr_devaddr": "0x30", + "attr_offset": "0x1", + "attr_mask": "0x4", + "attr_len": "0x1" + }, + { + "attr_name": "board_build_id", + "attr_devaddr": "0x30", + "attr_offset": "0x1", + "attr_mask": "0x18", + "attr_len": "0x1" + }, + { + "attr_name": "cpld1_major_ver", + "attr_devaddr": "0x30", + "attr_offset": "0x2", + "attr_mask": "0xc0", + "attr_len": "0x1" + }, + { + "attr_name": "cpld1_minor_ver", + "attr_devaddr": "0x30", + "attr_offset": "0x2", + "attr_mask": "0x3f", + "attr_len": "0x1" + }, + { + "attr_name": "cpld1_build", + "attr_devaddr": "0x30", + "attr_offset": "0x4", + "attr_mask": "0xff", + "attr_len": "0x1" + }, + { + "attr_name": "cpld2_major_ver", + "attr_devaddr": "0x31", + "attr_offset": "0x2", + "attr_mask": "0xc0", + "attr_len": "0x1" + }, + { + "attr_name": "cpld2_minor_ver", + "attr_devaddr": "0x31", + "attr_offset": "0x2", + "attr_mask": "0x3f", + "attr_len": "0x1" + }, + { + "attr_name": "cpld2_build", + "attr_devaddr": "0x31", + "attr_offset": "0x4", + "attr_mask": "0xff", + "attr_len": "0x1" + }, + { + "attr_name": "psu_status", + "attr_devaddr": "0x30", + "attr_offset": "0x51", + "attr_mask": "0xff", + "attr_len": "0x1" + }, + { + "attr_name": "system_led_psu", + "attr_devaddr": "0x30", + "attr_offset": "0x80", + "attr_mask": "0xff", + "attr_len": "0x1" + }, + { + "attr_name": "system_led_sys", + "attr_devaddr": "0x30", + "attr_offset": "0x81", + "attr_mask": "0xff", + "attr_len": "0x1" + }, + { + "attr_name": "system_led_sync", + "attr_devaddr": "0x30", + "attr_offset": "0x82", + "attr_mask": "0xff", + "attr_len": "0x1" + }, + { + "attr_name": "system_led_fan", + "attr_devaddr": "0x30", + "attr_offset": "0x83", + "attr_mask": "0xff", + "attr_len": "0x1" + }, + { + "attr_name": "system_led_id", + "attr_devaddr": "0x30", + "attr_offset": "0x84", + "attr_mask": "0xff", + "attr_len": "0x1" + } + ] + }, + "EEPROM1": { + "dev_info": { + "device_type": "EEPROM", + "device_name": "EEPROM1", + "device_parent": "MUX1" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x5", + "dev_addr": "0x53", + "dev_type": "sys_eeprom" + }, + "dev_attr": { + "access_mode": "BLOCK" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "GPIO1": { + "dev_info": { + "device_type": "GPIO", + "device_name": "GPIO1", + "device_parent": "MUX1" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x6", + "dev_addr": "0x22", + "dev_type": "tca6424" + }, + "dev_attr": { + "gpio_base": "0x1d0" + }, + "ports": [ + { + "port_num": "0", + "direction": "out", + "value": "1", + "edge": "", + "active_low": "" + }, + { + "port_num": "1", + "direction": "out", + "value": "1", + "edge": "", + "active_low": "" + }, + { + "port_num": "2", + "direction": "out", + "value": "1", + "edge": "", + "active_low": "" + }, + { + "port_num": "3", + "direction": "out", + "value": "1", + "edge": "", + "active_low": "" + }, + { + "port_num": "4", + "direction": "out", + "value": "1", + "edge": "", + "active_low": "" + }, + { + "port_num": "5", + "direction": "out", + "value": "1", + "edge": "", + "active_low": "" + }, + { + "port_num": "6", + "direction": "out", + "value": "1", + "edge": "", + "active_low": "" + }, + { + "port_num": "7", + "direction": "out", + "value": "1", + "edge": "", + "active_low": "" + }, + { + "port_num": "8", + "direction": "out", + "value": "1", + "edge": "", + "active_low": "" + }, + { + "port_num": "9", + "direction": "out", + "value": "1", + "edge": "", + "active_low": "" + }, + { + "port_num": "10", + "direction": "out", + "value": "1", + "edge": "", + "active_low": "" + }, + { + "port_num": "11", + "direction": "out", + "value": "1", + "edge": "", + "active_low": "" + }, + { + "port_num": "12", + "direction": "out", + "value": "1", + "edge": "", + "active_low": "" + }, + { + "port_num": "13", + "direction": "out", + "value": "1", + "edge": "", + "active_low": "" + }, + { + "port_num": "14", + "direction": "out", + "value": "1", + "edge": "", + "active_low": "" + }, + { + "port_num": "15", + "direction": "out", + "value": "1", + "edge": "", + "active_low": "" + }, + { + "port_num": "16", + "direction": "out", + "value": "1", + "edge": "", + "active_low": "" + }, + { + "port_num": "17", + "direction": "out", + "value": "1", + "edge": "", + "active_low": "" + }, + { + "port_num": "18", + "direction": "out", + "value": "1", + "edge": "", + "active_low": "" + }, + { + "port_num": "19", + "direction": "out", + "value": "1", + "edge": "", + "active_low": "" + }, + { + "port_num": "20", + "direction": "out", + "value": "1", + "edge": "", + "active_low": "" + }, + { + "port_num": "21", + "direction": "out", + "value": "1", + "edge": "", + "active_low": "" + }, + { + "port_num": "22", + "direction": "out", + "value": "1", + "edge": "", + "active_low": "" + }, + { + "port_num": "23", + "direction": "out", + "value": "1", + "edge": "", + "active_low": "" + } + ] + } + }, + "GPIO2": { + "dev_info": { + "device_type": "GPIO", + "device_name": "GPIO2", + "device_parent": "MUX1" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x6", + "dev_addr": "0x23", + "dev_type": "tca6424" + }, + "dev_attr": { + "gpio_base": "0x1a0" + }, + "ports": [ + { + "port_num": "0", + "direction": "out", + "value": "1", + "edge": "", + "active_low": "" + }, + { + "port_num": "1", + "direction": "out", + "value": "1", + "edge": "", + "active_low": "" + }, + { + "port_num": "2", + "direction": "out", + "value": "1", + "edge": "", + "active_low": "" + }, + { + "port_num": "3", + "direction": "out", + "value": "1", + "edge": "", + "active_low": "" + }, + { + "port_num": "4", + "direction": "out", + "value": "1", + "edge": "", + "active_low": "" + }, + { + "port_num": "5", + "direction": "out", + "value": "1", + "edge": "", + "active_low": "" + }, + { + "port_num": "6", + "direction": "out", + "value": "1", + "edge": "", + "active_low": "" + }, + { + "port_num": "7", + "direction": "out", + "value": "1", + "edge": "", + "active_low": "" + }, + { + "port_num": "8", + "direction": "out", + "value": "1", + "edge": "", + "active_low": "" + }, + { + "port_num": "9", + "direction": "out", + "value": "1", + "edge": "", + "active_low": "" + }, + { + "port_num": "10", + "direction": "out", + "value": "1", + "edge": "", + "active_low": "" + }, + { + "port_num": "11", + "direction": "out", + "value": "1", + "edge": "", + "active_low": "" + }, + { + "port_num": "12", + "direction": "out", + "value": "1", + "edge": "", + "active_low": "" + }, + { + "port_num": "13", + "direction": "out", + "value": "1", + "edge": "", + "active_low": "" + }, + { + "port_num": "14", + "direction": "out", + "value": "1", + "edge": "", + "active_low": "" + }, + { + "port_num": "15", + "direction": "out", + "value": "1", + "edge": "", + "active_low": "" + }, + { + "port_num": "16", + "direction": "out", + "value": "1", + "edge": "", + "active_low": "" + }, + { + "port_num": "17", + "direction": "out", + "value": "1", + "edge": "", + "active_low": "" + }, + { + "port_num": "18", + "direction": "out", + "value": "1", + "edge": "", + "active_low": "" + }, + { + "port_num": "19", + "direction": "out", + "value": "1", + "edge": "", + "active_low": "" + }, + { + "port_num": "20", + "direction": "out", + "value": "1", + "edge": "", + "active_low": "" + }, + { + "port_num": "21", + "direction": "out", + "value": "1", + "edge": "", + "active_low": "" + }, + { + "port_num": "22", + "direction": "out", + "value": "1", + "edge": "", + "active_low": "" + }, + { + "port_num": "23", + "direction": "out", + "value": "1", + "edge": "", + "active_low": "" + } + ] + } + }, + "GPIO3": { + "dev_info": { + "device_type": "GPIO", + "device_name": "GPIO3", + "device_parent": "MUX1" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x7", + "dev_addr": "0x22", + "dev_type": "tca6424" + }, + "dev_attr": { + "gpio_base": "0x1e8" + }, + "ports": [ + { + "port_num": "0", + "direction": "out", + "value": "1", + "edge": "", + "active_low": "" + }, + { + "port_num": "1", + "direction": "out", + "value": "1", + "edge": "", + "active_low": "" + }, + { + "port_num": "2", + "direction": "out", + "value": "1", + "edge": "", + "active_low": "" + }, + { + "port_num": "3", + "direction": "out", + "value": "1", + "edge": "", + "active_low": "" + }, + { + "port_num": "4", + "direction": "out", + "value": "1", + "edge": "", + "active_low": "" + }, + { + "port_num": "5", + "direction": "out", + "value": "1", + "edge": "", + "active_low": "" + }, + { + "port_num": "6", + "direction": "out", + "value": "1", + "edge": "", + "active_low": "" + }, + { + "port_num": "7", + "direction": "out", + "value": "1", + "edge": "", + "active_low": "" + }, + { + "port_num": "8", + "direction": "out", + "value": "1", + "edge": "", + "active_low": "" + }, + { + "port_num": "9", + "direction": "out", + "value": "1", + "edge": "", + "active_low": "" + }, + { + "port_num": "10", + "direction": "out", + "value": "1", + "edge": "", + "active_low": "" + }, + { + "port_num": "11", + "direction": "out", + "value": "1", + "edge": "", + "active_low": "" + }, + { + "port_num": "12", + "direction": "out", + "value": "1", + "edge": "", + "active_low": "" + }, + { + "port_num": "13", + "direction": "out", + "value": "1", + "edge": "", + "active_low": "" + }, + { + "port_num": "14", + "direction": "out", + "value": "1", + "edge": "", + "active_low": "" + }, + { + "port_num": "15", + "direction": "out", + "value": "1", + "edge": "", + "active_low": "" + }, + { + "port_num": "16", + "direction": "out", + "value": "1", + "edge": "", + "active_low": "" + }, + { + "port_num": "17", + "direction": "out", + "value": "1", + "edge": "", + "active_low": "" + }, + { + "port_num": "18", + "direction": "out", + "value": "1", + "edge": "", + "active_low": "" + }, + { + "port_num": "19", + "direction": "out", + "value": "1", + "edge": "", + "active_low": "" + }, + { + "port_num": "20", + "direction": "out", + "value": "1", + "edge": "", + "active_low": "" + }, + { + "port_num": "21", + "direction": "out", + "value": "1", + "edge": "", + "active_low": "" + }, + { + "port_num": "22", + "direction": "out", + "value": "1", + "edge": "", + "active_low": "" + }, + { + "port_num": "23", + "direction": "out", + "value": "1", + "edge": "", + "active_low": "" + } + ] + } + }, + "GPIO4": { + "dev_info": { + "device_type": "GPIO", + "device_name": "GPIO4", + "device_parent": "MUX1" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x7", + "dev_addr": "0x23", + "dev_type": "tca6424" + }, + "dev_attr": { + "gpio_base": "0x1b8" + }, + "ports": [ + { + "port_num": "0", + "direction": "out", + "value": "1", + "edge": "", + "active_low": "" + }, + { + "port_num": "1", + "direction": "out", + "value": "1", + "edge": "", + "active_low": "" + }, + { + "port_num": "2", + "direction": "out", + "value": "1", + "edge": "", + "active_low": "" + }, + { + "port_num": "3", + "direction": "out", + "value": "1", + "edge": "", + "active_low": "" + }, + { + "port_num": "4", + "direction": "out", + "value": "1", + "edge": "", + "active_low": "" + }, + { + "port_num": "5", + "direction": "out", + "value": "1", + "edge": "", + "active_low": "" + }, + { + "port_num": "6", + "direction": "out", + "value": "1", + "edge": "", + "active_low": "" + }, + { + "port_num": "7", + "direction": "out", + "value": "1", + "edge": "", + "active_low": "" + }, + { + "port_num": "8", + "direction": "out", + "value": "1", + "edge": "", + "active_low": "" + }, + { + "port_num": "9", + "direction": "out", + "value": "1", + "edge": "", + "active_low": "" + }, + { + "port_num": "10", + "direction": "out", + "value": "1", + "edge": "", + "active_low": "" + }, + { + "port_num": "11", + "direction": "out", + "value": "1", + "edge": "", + "active_low": "" + }, + { + "port_num": "12", + "direction": "out", + "value": "1", + "edge": "", + "active_low": "" + }, + { + "port_num": "13", + "direction": "out", + "value": "1", + "edge": "", + "active_low": "" + }, + { + "port_num": "14", + "direction": "out", + "value": "1", + "edge": "", + "active_low": "" + }, + { + "port_num": "15", + "direction": "out", + "value": "1", + "edge": "", + "active_low": "" + }, + { + "port_num": "16", + "direction": "out", + "value": "1", + "edge": "", + "active_low": "" + }, + { + "port_num": "17", + "direction": "out", + "value": "1", + "edge": "", + "active_low": "" + }, + { + "port_num": "18", + "direction": "out", + "value": "1", + "edge": "", + "active_low": "" + }, + { + "port_num": "19", + "direction": "out", + "value": "1", + "edge": "", + "active_low": "" + }, + { + "port_num": "20", + "direction": "out", + "value": "1", + "edge": "", + "active_low": "" + }, + { + "port_num": "21", + "direction": "out", + "value": "1", + "edge": "", + "active_low": "" + }, + { + "port_num": "22", + "direction": "out", + "value": "1", + "edge": "", + "active_low": "" + }, + { + "port_num": "23", + "direction": "out", + "value": "1", + "edge": "", + "active_low": "" + } + ] + } + }, + "TEMP1": { + "dev_info": { + "device_type": "TEMP_SENSOR", + "device_name": "TEMP1", + "device_parent": "SMBUS0" + }, + "dev_attr": { + "display_name": "TEMP_MAC" + }, + "bmc": { + "ipmitool": { + "attr_list": [ + { + "attr_name": "temp1_input", + "bmc_cmd": "ipmitool sdr -c get TEMP_MAC", + "raw": "0", + "field_name": "TEMP_MAC", + "field_pos": "2", + "separator": "," + }, + { + "attr_name": "temp1_high_crit_threshold", + "bmc_cmd": "ipmitool sdr -c get TEMP_MAC", + "raw": "0", + "field_name": "TEMP_MAC", + "field_pos": "12", + "separator": "," + }, + { + "attr_name": "temp1_high_threshold", + "bmc_cmd": "ipmitool sdr -c get TEMP_MAC", + "raw": "0", + "field_name": "TEMP_MAC", + "field_pos": "13", + "separator": "," + } + ] + } + } + }, + "TEMP2": { + "dev_info": { + "device_type": "TEMP_SENSOR", + "device_name": "TEMP2", + "device_parent": "SMBUS0" + }, + "dev_attr": { + "display_name": "TEMP_ENV_MACCASE" + }, + "bmc": { + "ipmitool": { + "attr_list": [ + { + "attr_name": "temp1_input", + "bmc_cmd": "ipmitool sdr -c get TEMP_ENV_MACCASE", + "raw": "0", + "field_name": "TEMP_ENV_MACCASE", + "field_pos": "2", + "separator": "," + }, + { + "attr_name": "temp1_high_crit_threshold", + "bmc_cmd": "ipmitool sdr -c get TEMP_ENV_MACCASE", + "raw": "0", + "field_name": "TEMP_ENV_MACCASE", + "field_pos": "12", + "separator": "," + }, + { + "attr_name": "temp1_high_threshold", + "bmc_cmd": "ipmitool sdr -c get TEMP_ENV_MACCASE", + "raw": "0", + "field_name": "TEMP_ENV_MACCASE", + "field_pos": "13", + "separator": "," + } + ] + } + } + }, + "TEMP3": { + "dev_info": { + "device_type": "TEMP_SENSOR", + "device_name": "TEMP3", + "device_parent": "SMBUS0" + }, + "dev_attr": { + "display_name": "TEMP_ENV_PSUCASE" + }, + "bmc": { + "ipmitool": { + "attr_list": [ + { + "attr_name": "temp1_input", + "bmc_cmd": "ipmitool sdr -c get TEMP_ENV_PSUCASE", + "raw": "0", + "field_name": "TEMP_ENV_PSUCASE", + "field_pos": "2", + "separator": "," + }, + { + "attr_name": "temp1_high_crit_threshold", + "bmc_cmd": "ipmitool sdr -c get TEMP_ENV_PSUCASE", + "raw": "0", + "field_name": "TEMP_ENV_PSUCASE", + "field_pos": "12", + "separator": "," + }, + { + "attr_name": "temp1_high_threshold", + "bmc_cmd": "ipmitool sdr -c get TEMP_ENV_PSUCASE", + "raw": "0", + "field_name": "TEMP_ENV_PSUCASE", + "field_pos": "13", + "separator": "," + } + ] + } + } + }, + "TEMP4": { + "dev_info": { + "device_type": "TEMP_SENSOR", + "device_name": "TEMP4", + "device_parent": "SMBUS0" + }, + "dev_attr": { + "display_name": "TEMP_ENV_FANCONN" + }, + "bmc": { + "ipmitool": { + "attr_list": [ + { + "attr_name": "temp1_input", + "bmc_cmd": "ipmitool sdr -c get TEMP_ENV_FANCONN", + "raw": "0", + "field_name": "TEMP_ENV_FANCONN", + "field_pos": "2", + "separator": "," + }, + { + "attr_name": "temp1_high_crit_threshold", + "bmc_cmd": "ipmitool sdr -c get TEMP_ENV_FANCONN", + "raw": "0", + "field_name": "TEMP_ENV_FANCONN", + "field_pos": "12", + "separator": "," + }, + { + "attr_name": "temp1_high_threshold", + "bmc_cmd": "ipmitool sdr -c get TEMP_ENV_FANCONN", + "raw": "0", + "field_name": "TEMP_ENV_FANCONN", + "field_pos": "13", + "separator": "," + } + ] + } + } + }, + "TEMP5": { + "dev_info": { + "device_type": "TEMP_SENSOR", + "device_name": "TEMP5", + "device_parent": "SMBUS0" + }, + "dev_attr": { + "display_name": "TEMP_ENV_FANCARD" + }, + "bmc": { + "ipmitool": { + "attr_list": [ + { + "attr_name": "temp1_input", + "bmc_cmd": "ipmitool sdr -c get TEMP_ENV_FANCARD", + "raw": "0", + "field_name": "TEMP_ENV_FANCARD", + "field_pos": "2", + "separator": "," + }, + { + "attr_name": "temp1_high_crit_threshold", + "bmc_cmd": "ipmitool sdr -c get TEMP_ENV_FANCARD", + "raw": "0", + "field_name": "TEMP_ENV_FANCARD", + "field_pos": "12", + "separator": "," + }, + { + "attr_name": "temp1_high_threshold", + "bmc_cmd": "ipmitool sdr -c get TEMP_ENV_FANCARD", + "raw": "0", + "field_name": "TEMP_ENV_FANCARD", + "field_pos": "13", + "separator": "," + } + ] + } + } + }, + "TEMP6": { + "dev_info": { + "device_type": "TEMP_SENSOR", + "device_name": "TEMP6", + "device_parent": "SMBUS0" + }, + "dev_attr": { + "display_name": "TEMP_ENV_BMC" + }, + "bmc": { + "ipmitool": { + "attr_list": [ + { + "attr_name": "temp1_input", + "bmc_cmd": "ipmitool sdr -c get TEMP_ENV_BMC", + "raw": "0", + "field_name": "TEMP_ENV_BMC", + "field_pos": "2", + "separator": "," + }, + { + "attr_name": "temp1_high_crit_threshold", + "bmc_cmd": "ipmitool sdr -c get TEMP_ENV_BMC", + "raw": "0", + "field_name": "TEMP_ENV_BMC", + "field_pos": "12", + "separator": "," + }, + { + "attr_name": "temp1_high_threshold", + "bmc_cmd": "ipmitool sdr -c get TEMP_ENV_BMC", + "raw": "0", + "field_name": "TEMP_ENV_BMC", + "field_pos": "13", + "separator": "," + } + ] + } + } + }, + "TEMP7": { + "dev_info": { + "device_type": "TEMP_SENSOR", + "device_name": "TEMP7", + "device_parent": "SMBUS0" + }, + "dev_attr": { + "display_name": "TEMP_PSU0_TEMP1" + }, + "bmc": { + "ipmitool": { + "attr_list": [ + { + "attr_name": "temp1_input", + "bmc_cmd": "ipmitool sdr -c get PSU0_TEMP1 | sed -e 's/,,/,0,/g' -e 's/,,/,0,/g'", + "raw": "0", + "field_name": "PSU0_TEMP1", + "field_pos": "2", + "separator": "," + }, + { + "attr_name": "temp1_high_crit_threshold", + "bmc_cmd": "ipmitool sdr -c get PSU0_TEMP1", + "raw": "0", + "field_name": "PSU0_TEMP1", + "field_pos": "12", + "separator": "," + }, + { + "attr_name": "temp1_high_threshold", + "bmc_cmd": "ipmitool sdr -c get PSU0_TEMP1", + "raw": "0", + "field_name": "PSU0_TEMP1", + "field_pos": "13", + "separator": "," + } + ] + } + } + }, + "TEMP8": { + "dev_info": { + "device_type": "TEMP_SENSOR", + "device_name": "TEMP8", + "device_parent": "SMBUS0" + }, + "dev_attr": { + "display_name": "TEMP_PSU1_TEMP1" + }, + "bmc": { + "ipmitool": { + "attr_list": [ + { + "attr_name": "temp1_input", + "bmc_cmd": "ipmitool sdr -c get PSU1_TEMP1 | sed -e 's/,,/,0,/g' -e 's/,,/,0,/g'", + "raw": "0", + "field_name": "PSU1_TEMP1", + "field_pos": "2", + "separator": "," + }, + { + "attr_name": "temp1_high_crit_threshold", + "bmc_cmd": "ipmitool sdr -c get PSU1_TEMP1", + "raw": "0", + "field_name": "PSU1_TEMP1", + "field_pos": "12", + "separator": "," + }, + { + "attr_name": "temp1_high_threshold", + "bmc_cmd": "ipmitool sdr -c get PSU1_TEMP1", + "raw": "0", + "field_name": "PSU1_TEMP1", + "field_pos": "13", + "separator": "," + } + ] + } + } + }, + "PSU1": { + "dev_info": { + "device_type": "PSU", + "device_name": "PSU1", + "device_parent": "MUX1" + }, + "dev_attr": { + "dev_idx": "1", + "num_psu_fans": "1" + }, + "i2c": { + "interface": [ + { "itf":"eeprom", "dev":"PSU1-EEPROM" } + ] + }, + "bmc": { + "ipmitool": { + "attr_list": [ + { + "attr_name": "psu_temp1_input", + "bmc_cmd": "ipmitool sdr -c get PSU0_TEMP1 | sed -e 's/,,/,0,/g' -e 's/,,/,0,/g'", + "raw": "0", + "field_name": "PSU0_TEMP1", + "field_pos": "2", + "mult": "1000", + "separator": "," + }, + { + "attr_name": "psu_fan1_speed_rpm", + "bmc_cmd": "ipmitool sdr -c get PSU0_FAN1 | sed -e 's/,,/,N\\/A,/g' -e 's/,,/,N\\/A,/g'", + "raw": "0", + "field_name": "PSU0_FAN1", + "field_pos": "2", + "separator": "," + }, + { + "attr_name": "psu_v_out", + "bmc_cmd": "ipmitool sdr -c get PSU0_VOUT | sed -e 's/,,/,N\\/A,/g' -e 's/,,/,N\\/A,/g'", + "raw": "0", + "field_name": "PSU0_VOUT", + "field_pos": "2", + "mult": "1000", + "separator": "," + }, + { + "attr_name": "psu_i_out", + "bmc_cmd": "ipmitool sdr -c get PSU0_IOUT | sed -e 's/,,/,N\\/A,/g' -e 's/,,/,N\\/A,/g'", + "raw": "0", + "field_name": "PSU0_IOUT", + "field_pos": "2", + "mult": "1000", + "separator": "," + }, + { + "attr_name": "psu_mfr_id", + "bmc_cmd": "_rv=$(ipmitool fru print 1 2>/dev/null | tr -s ' ' | cut -d' ' -f3-5 | grep 'Manufacturer') && echo $_rv || echo 'Manufacturer : N/A'", + "raw": "0", + "separator": ":", + "field_name": "Manufacturer", + "field_pos": "2" + }, + { + "attr_name": "psu_model_name", + "bmc_cmd": "_rv=$(ipmitool fru print 1 2>/dev/null | tr -s ' ' | cut -d' ' -f3-5 | grep 'Name') && echo $_rv || echo 'Name : N/A'", + "raw": "0", + "separator": ":", + "field_name": "Name", + "field_pos": "2" + }, + { + "attr_name": "psu_serial_num", + "bmc_cmd": "_rv=$(ipmitool fru print 1 2>/dev/null | tr -s ' ' | cut -d' ' -f3-5 | grep 'Serial') && echo $_rv || echo 'Serial : N/A'", + "raw": "0", + "separator": ":", + "field_name": "Serial", + "field_pos": "2" + }, + { + "attr_name": "psu_fan_dir", + "bmc_cmd": "ipmitool raw 0x3c 0x30 0x0 | xargs | cut -d' ' -f1", + "raw": "1", + "type": "raw" + }, + { + "attr_name": "psu_v_in", + "bmc_cmd": "ipmitool sdr get -c PSU0_VIN | sed -e 's/,,/,N\\/A,/g' -e 's/,,/,N\\/A,/g'", + "raw": "0", + "separator": ",", + "field_name": "PSU0_VIN", + "field_pos": "2", + "mult": "1000" + }, + { + "attr_name": "psu_i_in", + "bmc_cmd": "ipmitool sdr get -c PSU0_IIN | sed -e 's/,,/,N\\/A,/g' -e 's/,,/,N\\/A,/g'", + "raw": "0", + "separator": ",", + "field_name": "PSU0_IIN", + "field_pos": "2", + "mult": "1000" + } + ] + } + } + }, + "PSU1-EEPROM": { + "dev_info": { + "device_type": "PSU-EEPROM", + "device_name": "PSU1-EEPROM", + "device_parent": "MUX1", + "virt_parent": "PSU1" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x2", + "dev_addr": "0x50", + "dev_type": "psu_eeprom" + }, + "attr_list": [ + { + "attr_name":"psu_present", + "attr_devaddr":"0x30", + "attr_devtype":"cpld", + "attr_offset":"0x51", + "attr_mask":"0x1", + "attr_cmpval":"0x0", + "attr_len":"1" + }, + { + "attr_name":"psu_power_good", + "attr_devaddr":"0x30", + "attr_devtype":"cpld", + "attr_offset":"0x51", + "attr_mask":"0x10", + "attr_cmpval":"0x10", + "attr_len":"1" + } + ] + } + }, + "PSU2": { + "dev_info": { + "device_type": "PSU", + "device_name": "PSU2", + "device_parent": "MUX1" + }, + "dev_attr": { + "dev_idx": "2", + "num_psu_fans": "1" + }, + "i2c": { + "interface": [ + { "itf":"eeprom", "dev":"PSU2-EEPROM" } + ] + }, + "bmc": { + "ipmitool": { + "attr_list": [ + { + "attr_name": "psu_temp1_input", + "bmc_cmd": "ipmitool sdr -c get PSU1_TEMP1 | sed -e 's/,,/,N\\/A,/g' -e 's/,,/,N\\/A,/g'", + "raw": "0", + "field_name": "PSU1_TEMP1", + "field_pos": "2", + "mult": "1000", + "separator": "," + }, + { + "attr_name": "psu_fan1_speed_rpm", + "bmc_cmd": "ipmitool sdr -c get PSU1_FAN1 | sed -e 's/,,/,N\\/A,/g' -e 's/,,/,N\\/A,/g'", + "raw": "0", + "field_name": "PSU1_FAN1", + "field_pos": "2", + "separator": "," + }, + { + "attr_name": "psu_v_out", + "bmc_cmd": "ipmitool sdr -c get PSU1_VOUT | sed -e 's/,,/,N\\/A,/g' -e 's/,,/,N\\/A,/g'", + "raw": "0", + "field_name": "PSU1_VOUT", + "field_pos": "2", + "mult": "1000", + "separator": "," + }, + { + "attr_name": "psu_i_out", + "bmc_cmd": "ipmitool sdr -c get PSU1_IOUT | sed -e 's/,,/,N\\/A,/g' -e 's/,,/,N\\/A,/g'", + "raw": "0", + "field_name": "PSU1_IOUT", + "field_pos": "2", + "mult": "1000", + "separator": "," + }, + { + "attr_name": "psu_mfr_id", + "bmc_cmd": "_rv=$(ipmitool fru print 2 2>/dev/null | tr -s ' ' | cut -d' ' -f3-5 | grep 'Manufacturer') && echo $_rv || echo 'Manufacturer : N/A'", + "raw": "0", + "separator": ":", + "field_name": "Manufacturer", + "field_pos": "2" + }, + { + "attr_name": "psu_model_name", + "bmc_cmd": "_rv=$(ipmitool fru print 2 2>/dev/null | tr -s ' ' | cut -d' ' -f3-5 | grep 'Name') && echo $_rv || echo 'Name : N/A'", + "raw": "0", + "separator": ":", + "field_name": "Name", + "field_pos": "2" + }, + { + "attr_name": "psu_serial_num", + "bmc_cmd": "_rv=$(ipmitool fru print 2 2>/dev/null | tr -s ' ' | cut -d' ' -f3-5 | grep 'Serial') && echo $_rv || echo 'Serial : N/A'", + "raw": "0", + "separator": ":", + "field_name": "Serial", + "field_pos": "2" + }, + + { + "attr_name": "psu_fan_dir", + "bmc_cmd": "ipmitool raw 0x3c 0x30 0x0 | xargs | cut -d' ' -f2", + "raw": "1", + "type": "raw" + }, + { + "attr_name": "psu_v_in", + "bmc_cmd": "ipmitool sdr get -c PSU1_VIN | sed -e 's/,,/,N\\/A,/g' -e 's/,,/,N\\/A,/g'", + "raw": "0", + "separator": ",", + "field_name": "PSU1_VIN", + "field_pos": "2", + "mult": "1000" + }, + { + "attr_name": "psu_i_in", + "bmc_cmd": "ipmitool sdr get -c PSU1_IIN | sed -e 's/,,/,N\\/A,/g' -e 's/,,/,N\\/A,/g'", + "raw": "0", + "separator": ",", + "field_name": "PSU1_IIN", + "field_pos": "2", + "mult": "1000" + } + ] + } + } + }, + "PSU2-EEPROM": { + "dev_info": { + "device_type": "PSU-EEPROM", + "device_name": "PSU2-EEPROM", + "device_parent": "MUX1", + "virt_parent": "PSU2" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x2", + "dev_addr": "0x51", + "dev_type": "psu_eeprom" + }, + "attr_list": [ + { + "attr_name":"psu_present", + "attr_devaddr":"0x30", + "attr_devtype":"cpld", + "attr_offset":"0x51", + "attr_mask":"0x2", + "attr_cmpval":"0x0", + "attr_len":"1" + }, + { + "attr_name":"psu_power_good", + "attr_devaddr":"0x30", + "attr_devtype":"cpld", + "attr_offset":"0x51", + "attr_mask":"0x20", + "attr_cmpval":"0x20", + "attr_len":"1" + } + ] + } + }, + "FAN-CTRL": { + "dev_info": { + "device_type": "FAN", + "device_name": "FAN-CTRL", + "device_parent": "" + }, + "bmc": { + "ipmitool": { + "attr_list": [ + { + "attr_name": "fan1_present", + "bmc_cmd": "ipmitool sdr -c get FAN0_PRSNT_L", + "raw": "0", + "field_name": "FAN0_PRSNT_L", + "field_pos": "5", + "separator": "," + }, + { + "attr_name": "fan2_present", + "bmc_cmd": "ipmitool sdr -c get FAN1_PRSNT_L", + "raw": "0", + "field_name": "FAN1_PRSNT_L", + "field_pos": "5", + "separator": "," + }, + { + "attr_name": "fan3_present", + "bmc_cmd": "ipmitool sdr -c get FAN2_PRSNT_L", + "raw": "0", + "field_name": "FAN2_PRSNT_L", + "field_pos": "5", + "separator": "," + }, + { + "attr_name": "fan4_present", + "bmc_cmd": "ipmitool sdr -c get FAN3_PRSNT_L", + "raw": "0", + "field_name": "FAN3_PRSNT_L", + "field_pos": "5", + "separator": "," + }, + { + "attr_name": "fan5_present", + "bmc_cmd": "ipmitool sdr -c get FAN4_PRSNT_L", + "raw": "0", + "field_name": "FAN4_PRSNT_L", + "field_pos": "5", + "separator": "," + }, + { + "attr_name": "fan1_input", + "bmc_cmd": "ipmitool sdr -c get FAN0_RPM | sed -e 's/,,/,N\\/A,/g' -e 's/,,/,N\\/A,/g'", + "raw": "0", + "field_name": "FAN0_RPM", + "field_pos": "2", + "separator": "," + }, + { + "attr_name": "fan2_input", + "bmc_cmd": "ipmitool sdr -c get FAN1_RPM | sed -e 's/,,/,N\\/A,/g' -e 's/,,/,N\\/A,/g'", + "raw": "0", + "field_name": "FAN1_RPM", + "field_pos": "2", + "separator": "," + }, + { + "attr_name": "fan3_input", + "bmc_cmd": "ipmitool sdr -c get FAN2_RPM | sed -e 's/,,/,N\\/A,/g' -e 's/,,/,N\\/A,/g'", + "raw": "0", + "field_name": "FAN2_RPM", + "field_pos": "2", + "separator": "," + }, + { + "attr_name": "fan4_input", + "bmc_cmd": "ipmitool sdr -c get FAN3_RPM | sed -e 's/,,/,N\\/A,/g' -e 's/,,/,N\\/A,/g'", + "raw": "0", + "field_name": "FAN3_RPM", + "field_pos": "2", + "separator": "," + }, + { + "attr_name": "fan5_input", + "bmc_cmd": "ipmitool sdr -c get FAN4_RPM | sed -e 's/,,/,N\\/A,/g' -e 's/,,/,N\\/A,/g'", + "raw": "0", + "field_name": "FAN4_RPM", + "field_pos": "2", + "separator": "," + }, + { + "attr_name": "fan1_direction", + "bmc_cmd": "ipmitool raw 0x3c 0x31 0x0 | xargs | cut -d' ' -f1", + "raw": "1", + "type": "raw" + }, + { + "attr_name": "fan2_direction", + "bmc_cmd": "ipmitool raw 0x3c 0x31 0x0 | xargs | cut -d' ' -f2", + "raw": "1", + "type": "raw" + }, + { + "attr_name": "fan3_direction", + "bmc_cmd": "ipmitool raw 0x3c 0x31 0x0 | xargs | cut -d' ' -f3", + "raw": "1", + "type": "raw" + }, + { + "attr_name": "fan4_direction", + "bmc_cmd": "ipmitool raw 0x3c 0x31 0x0 | xargs | cut -d' ' -f4", + "raw": "1", + "type": "raw" + }, + { + "attr_name": "fan5_direction", + "bmc_cmd": "ipmitool raw 0x3c 0x31 0x0 | xargs | cut -d' ' -f5", + "raw": "1", + "type": "raw" + } + ] + } + } + }, + "SYNC_LED": { + "dev_info": { + "device_type": "LED", + "device_name": "DIAG_LED" + }, + "dev_attr": { + "index": "0", + "flag": "rw" + }, + "i2c": { + "attr_list": [ + { + "attr_name": "green", + "bits": "3:0", + "descr": "Green", + "value": "0x09;0x0b", + "swpld_addr": "0x30", + "swpld_addr_offset": "0x82" + }, + { + "attr_name": "green_blink", + "bits": "3:0", + "descr": "Green Blinking", + "value": "0x0d;0x0f", + "swpld_addr": "0x30", + "swpld_addr_offset": "0x82" + }, + { + "attr_name": "yellow", + "bits": "3:0", + "descr": "Yellow", + "value": "0x08;0x0a", + "swpld_addr": "0x30", + "swpld_addr_offset": "0x82" + }, + { + "attr_name": "yellow_blink", + "bits": "3:0", + "descr": "Yellow Blinking", + "value": "0x0c;0x0e", + "swpld_addr": "0x30", + "swpld_addr_offset": "0x82" + }, + { + "attr_name": "off", + "bits": "3:2", + "descr": "Off", + "value": "0x1;0x0", + "swpld_addr": "0x30", + "swpld_addr_offset": "0x82" + } + ] + } + }, + "SYS_LED": { + "dev_info": { + "device_type": "LED", + "device_name": "SYS_LED" + }, + "dev_attr": { + "index": "0", + "flag": "rw" + }, + "i2c": { + "attr_list": [ + { + "attr_name": "green", + "bits": "7:4", + "descr": "Green", + "value": "0x09;0x0b", + "swpld_addr": "0x30", + "swpld_addr_offset": "0x81" + }, + { + "attr_name": "green_blink", + "bits": "7:4", + "descr": "Green Blinking", + "value": "0x0d;0x0f", + "swpld_addr": "0x30", + "swpld_addr_offset": "0x81" + }, + { + "attr_name": "yellow", + "bits": "7:4", + "descr": "Yellow", + "value": "0x08;0x0a", + "swpld_addr": "0x30", + "swpld_addr_offset": "0x81" + }, + { + "attr_name": "yellow_blink", + "bits": "7:4", + "descr": "Yellow Blinking", + "value": "0x0c;0x0e", + "swpld_addr": "0x30", + "swpld_addr_offset": "0x81" + }, + { + "attr_name": "off", + "bits": "7:6", + "descr": "Off", + "value": "0x01;0x0", + "swpld_addr": "0x30", + "swpld_addr_offset": "0x81" + } + ] + } + }, + "FAN_LED": { + "dev_info": { + "device_type": "LED", + "device_name": "FAN_LED" + }, + "dev_attr": { + "index": "0", + "flag": "ro" + }, + "i2c": { + "attr_list": [ + { + "attr_name": "green", + "bits": "3:0", + "descr": "Green", + "value": "0x09;0x0b", + "swpld_addr": "0x30", + "swpld_addr_offset": "0x83" + }, + { + "attr_name": "green_blink", + "bits": "3:0", + "descr": "Green Blinking", + "value": "0x0d;0x0f", + "swpld_addr": "0x30", + "swpld_addr_offset": "0x83" + }, + { + "attr_name": "yellow", + "bits": "3:0", + "descr": "Yellow", + "value": "0x08;0x0a", + "swpld_addr": "0x30", + "swpld_addr_offset": "0x83" + }, + { + "attr_name": "yellow_blink", + "bits": "3:0", + "descr": "Yellow Blinking", + "value": "0x0c;0x0e", + "swpld_addr": "0x30", + "swpld_addr_offset": "0x83" + }, + { + "attr_name": "off", + "bits": "3", + "descr": "Off", + "value": "0x0", + "swpld_addr": "0x30", + "swpld_addr_offset": "0x83" + } + ] + } + }, + "PSU1_LED": { + "dev_info": { + "device_type": "LED", + "device_name": "PSU_LED" + }, + "dev_attr": { + "index": "0", + "flag": "ro" + }, + "i2c": { + "attr_list": [ + { + "attr_name": "green", + "bits": "3:0", + "descr": "Green", + "value": "0x09;0x0b", + "swpld_addr": "0x30", + "swpld_addr_offset": "0x80" + }, + { + "attr_name": "green_blink", + "bits": "3:0", + "descr": "Green Blinking", + "value": "0x0d;0x0f", + "swpld_addr": "0x30", + "swpld_addr_offset": "0x80" + }, + { + "attr_name": "yellow", + "bits": "3:0", + "descr": "Yellow", + "value": "0x08;0x0a", + "swpld_addr": "0x30", + "swpld_addr_offset": "0x80" + }, + { + "attr_name": "yellow_blink", + "bits": "3:0", + "descr": "Yellow Blinking", + "value": "0x0c;0x0e", + "swpld_addr": "0x30", + "swpld_addr_offset": "0x80" + }, + { + "attr_name": "off", + "bits": "3", + "descr": "Off", + "value": "0x0", + "swpld_addr": "0x30", + "swpld_addr_offset": "0x80" + } + ] + } + }, + "PSU2_LED": { + "dev_info": { + "device_type": "LED", + "device_name": "PSU_LED" + }, + "dev_attr": { + "index": "1", + "flag": "ro" + }, + "i2c": { + "attr_list": [ + { + "attr_name": "green", + "bits": "7:4", + "descr": "Green", + "value": "0x09;0x0b", + "swpld_addr": "0x30", + "swpld_addr_offset": "0x80" + }, + { + "attr_name": "green_blink", + "bits": "7:4", + "descr": "Green Blinking", + "value": "0x0d;0x0f", + "swpld_addr": "0x30", + "swpld_addr_offset": "0x80" + }, + { + "attr_name": "yellow", + "bits": "7:4", + "descr": "Yellow", + "value": "0x08;0x0a", + "swpld_addr": "0x30", + "swpld_addr_offset": "0x80" + }, + { + "attr_name": "yellow_blink", + "bits": "7:4", + "descr": "Yellow Blinking", + "value": "0x0c;0x0e", + "swpld_addr": "0x30", + "swpld_addr_offset": "0x80" + }, + { + "attr_name": "off", + "bits": "7", + "descr": "Off", + "value": "0x0", + "swpld_addr": "0x30", + "swpld_addr_offset": "0x80" + } + ] + } + }, + "LOC_LED": { + "dev_info": { + "device_type": "LED", + "device_name": "LOC_LED" + }, + "dev_attr": { + "index": "0", + "flag": "rw" + }, + "i2c": { + "attr_list": [ + { + "attr_name": "blue", + "bits": "3:1", + "descr": "Blue", + "value": "0x04;0x05", + "swpld_addr": "0x30", + "swpld_addr_offset": "0x84" + }, + { + "attr_name": "blue_blink", + "bits": "3:1", + "descr": "Blue Blinking", + "value": "0x06;0x07", + "swpld_addr": "0x30", + "swpld_addr_offset": "0x84" + }, + { + "attr_name": "off", + "bits": "3:2", + "descr": "Off", + "value": "0x01;0x0", + "swpld_addr": "0x30", + "swpld_addr_offset": "0x84" + } + ] + } + }, + "PORT1": { + "dev_info": { + "device_type": "SFP28", + "device_name": "PORT1", + "device_parent": "MUX4" + }, + "dev_attr": { + "dev_idx": "1" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT1-EEPROM" + }, + { + "itf": "control", + "dev": "PORT1-CTRL" + } + ] + } + }, + "PORT1-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT1-EEPROM", + "device_parent": "MUX4", + "virt_parent": "PORT1" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x1a", + "dev_addr": "0x50", + "dev_type": "optoe2" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT1-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT1-CTRL", + "device_parent": "MUX4", + "virt_parent": "PORT1" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x1a", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x10", + "attr_mask": "0x0", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_rxlos", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x40", + "attr_mask": "0x0", + "attr_cmpval": "0x1", + "attr_len": "1" + }, + { + "attr_name": "xcvr_txfault", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x46", + "attr_mask": "0x0", + "attr_cmpval": "0x1", + "attr_len": "1" + }, + { + "attr_name": "xcvr_txdisable", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x70", + "attr_mask": "0x0", + "attr_cmpval": "0x1", + "attr_len": "1" + } + ] + } + }, + "PORT2": { + "dev_info": { + "device_type": "SFP28", + "device_name": "PORT2", + "device_parent": "MUX4" + }, + "dev_attr": { + "dev_idx": "2" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT2-EEPROM" + }, + { + "itf": "control", + "dev": "PORT2-CTRL" + } + ] + } + }, + "PORT2-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT2-EEPROM", + "device_parent": "MUX4", + "virt_parent": "PORT2" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x1b", + "dev_addr": "0x50", + "dev_type": "optoe2" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT2-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT2-CTRL", + "device_parent": "MUX4", + "virt_parent": "PORT2" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x1b", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x10", + "attr_mask": "0x1", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_rxlos", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x40", + "attr_mask": "0x1", + "attr_cmpval": "0x2", + "attr_len": "1" + }, + { + "attr_name": "xcvr_txfault", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x46", + "attr_mask": "0x1", + "attr_cmpval": "0x2", + "attr_len": "1" + }, + { + "attr_name": "xcvr_txdisable", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x70", + "attr_mask": "0x1", + "attr_cmpval": "0x2", + "attr_len": "1" + } + ] + } + }, + "PORT3": { + "dev_info": { + "device_type": "SFP28", + "device_name": "PORT3", + "device_parent": "MUX4" + }, + "dev_attr": { + "dev_idx": "3" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT3-EEPROM" + }, + { + "itf": "control", + "dev": "PORT3-CTRL" + } + ] + } + }, + "PORT3-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT3-EEPROM", + "device_parent": "MUX4", + "virt_parent": "PORT3" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x1c", + "dev_addr": "0x50", + "dev_type": "optoe2" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT3-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT3-CTRL", + "device_parent": "MUX4", + "virt_parent": "PORT3" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x1c", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x10", + "attr_mask": "0x2", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_rxlos", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x40", + "attr_mask": "0x2", + "attr_cmpval": "0x4", + "attr_len": "1" + }, + { + "attr_name": "xcvr_txfault", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x46", + "attr_mask": "0x2", + "attr_cmpval": "0x4", + "attr_len": "1" + }, + { + "attr_name": "xcvr_txdisable", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x70", + "attr_mask": "0x2", + "attr_cmpval": "0x4", + "attr_len": "1" + } + ] + } + }, + "PORT4": { + "dev_info": { + "device_type": "SFP28", + "device_name": "PORT4", + "device_parent": "MUX4" + }, + "dev_attr": { + "dev_idx": "4" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT4-EEPROM" + }, + { + "itf": "control", + "dev": "PORT4-CTRL" + } + ] + } + }, + "PORT4-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT4-EEPROM", + "device_parent": "MUX4", + "virt_parent": "PORT4" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x1d", + "dev_addr": "0x50", + "dev_type": "optoe2" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT4-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT4-CTRL", + "device_parent": "MUX4", + "virt_parent": "PORT4" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x1d", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x10", + "attr_mask": "0x3", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_rxlos", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x40", + "attr_mask": "0x3", + "attr_cmpval": "0x8", + "attr_len": "1" + }, + { + "attr_name": "xcvr_txfault", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x46", + "attr_mask": "0x3", + "attr_cmpval": "0x8", + "attr_len": "1" + }, + { + "attr_name": "xcvr_txdisable", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x70", + "attr_mask": "0x3", + "attr_cmpval": "0x8", + "attr_len": "1" + } + ] + } + }, + "PORT5": { + "dev_info": { + "device_type": "SFP28", + "device_name": "PORT5", + "device_parent": "MUX4" + }, + "dev_attr": { + "dev_idx": "5" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT5-EEPROM" + }, + { + "itf": "control", + "dev": "PORT5-CTRL" + } + ] + } + }, + "PORT5-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT5-EEPROM", + "device_parent": "MUX4", + "virt_parent": "PORT5" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x1e", + "dev_addr": "0x50", + "dev_type": "optoe2" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT5-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT5-CTRL", + "device_parent": "MUX4", + "virt_parent": "PORT5" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x1e", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x10", + "attr_mask": "0x4", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_rxlos", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x40", + "attr_mask": "0x4", + "attr_cmpval": "0x10", + "attr_len": "1" + }, + { + "attr_name": "xcvr_txfault", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x46", + "attr_mask": "0x4", + "attr_cmpval": "0x10", + "attr_len": "1" + }, + { + "attr_name": "xcvr_txdisable", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x70", + "attr_mask": "0x4", + "attr_cmpval": "0x10", + "attr_len": "1" + } + ] + } + }, + "PORT6": { + "dev_info": { + "device_type": "SFP28", + "device_name": "PORT6", + "device_parent": "MUX4" + }, + "dev_attr": { + "dev_idx": "6" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT6-EEPROM" + }, + { + "itf": "control", + "dev": "PORT6-CTRL" + } + ] + } + }, + "PORT6-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT6-EEPROM", + "device_parent": "MUX4", + "virt_parent": "PORT6" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x1f", + "dev_addr": "0x50", + "dev_type": "optoe2" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT6-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT6-CTRL", + "device_parent": "MUX4", + "virt_parent": "PORT6" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x1f", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x10", + "attr_mask": "0x5", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_rxlos", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x40", + "attr_mask": "0x5", + "attr_cmpval": "0x20", + "attr_len": "1" + }, + { + "attr_name": "xcvr_txfault", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x46", + "attr_mask": "0x5", + "attr_cmpval": "0x20", + "attr_len": "1" + }, + { + "attr_name": "xcvr_txdisable", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x70", + "attr_mask": "0x5", + "attr_cmpval": "0x20", + "attr_len": "1" + } + ] + } + }, + "PORT7": { + "dev_info": { + "device_type": "SFP28", + "device_name": "PORT7", + "device_parent": "MUX4" + }, + "dev_attr": { + "dev_idx": "7" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT7-EEPROM" + }, + { + "itf": "control", + "dev": "PORT7-CTRL" + } + ] + } + }, + "PORT7-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT7-EEPROM", + "device_parent": "MUX4", + "virt_parent": "PORT7" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x20", + "dev_addr": "0x50", + "dev_type": "optoe2" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT7-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT7-CTRL", + "device_parent": "MUX4", + "virt_parent": "PORT7" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x20", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x10", + "attr_mask": "0x6", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_rxlos", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x40", + "attr_mask": "0x6", + "attr_cmpval": "0x40", + "attr_len": "1" + }, + { + "attr_name": "xcvr_txfault", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x46", + "attr_mask": "0x6", + "attr_cmpval": "0x40", + "attr_len": "1" + }, + { + "attr_name": "xcvr_txdisable", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x70", + "attr_mask": "0x6", + "attr_cmpval": "0x40", + "attr_len": "1" + } + ] + } + }, + "PORT8": { + "dev_info": { + "device_type": "SFP28", + "device_name": "PORT8", + "device_parent": "MUX4" + }, + "dev_attr": { + "dev_idx": "8" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT8-EEPROM" + }, + { + "itf": "control", + "dev": "PORT8-CTRL" + } + ] + } + }, + "PORT8-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT8-EEPROM", + "device_parent": "MUX4", + "virt_parent": "PORT8" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x21", + "dev_addr": "0x50", + "dev_type": "optoe2" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT8-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT8-CTRL", + "device_parent": "MUX4", + "virt_parent": "PORT8" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x21", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x10", + "attr_mask": "0x7", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_rxlos", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x40", + "attr_mask": "0x7", + "attr_cmpval": "0x80", + "attr_len": "1" + }, + { + "attr_name": "xcvr_txfault", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x46", + "attr_mask": "0x7", + "attr_cmpval": "0x80", + "attr_len": "1" + }, + { + "attr_name": "xcvr_txdisable", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x70", + "attr_mask": "0x7", + "attr_cmpval": "0x80", + "attr_len": "1" + } + ] + } + }, + "PORT9": { + "dev_info": { + "device_type": "SFP28", + "device_name": "PORT9", + "device_parent": "MUX5" + }, + "dev_attr": { + "dev_idx": "9" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT9-EEPROM" + }, + { + "itf": "control", + "dev": "PORT9-CTRL" + } + ] + } + }, + "PORT9-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT9-EEPROM", + "device_parent": "MUX5", + "virt_parent": "PORT9" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x22", + "dev_addr": "0x50", + "dev_type": "optoe2" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT9-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT9-CTRL", + "device_parent": "MUX5", + "virt_parent": "PORT9" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x22", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x11", + "attr_mask": "0x0", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_rxlos", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x41", + "attr_mask": "0x0", + "attr_cmpval": "0x1", + "attr_len": "1" + }, + { + "attr_name": "xcvr_txfault", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x47", + "attr_mask": "0x0", + "attr_cmpval": "0x1", + "attr_len": "1" + }, + { + "attr_name": "xcvr_txdisable", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x71", + "attr_mask": "0x0", + "attr_cmpval": "0x1", + "attr_len": "1" + } + ] + } + }, + "PORT10": { + "dev_info": { + "device_type": "SFP28", + "device_name": "PORT10", + "device_parent": "MUX5" + }, + "dev_attr": { + "dev_idx": "10" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT10-EEPROM" + }, + { + "itf": "control", + "dev": "PORT10-CTRL" + } + ] + } + }, + "PORT10-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT10-EEPROM", + "device_parent": "MUX5", + "virt_parent": "PORT10" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x23", + "dev_addr": "0x50", + "dev_type": "optoe2" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT10-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT10-CTRL", + "device_parent": "MUX5", + "virt_parent": "PORT10" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x23", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x11", + "attr_mask": "0x1", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_rxlos", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x41", + "attr_mask": "0x1", + "attr_cmpval": "0x2", + "attr_len": "1" + }, + { + "attr_name": "xcvr_txfault", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x47", + "attr_mask": "0x1", + "attr_cmpval": "0x2", + "attr_len": "1" + }, + { + "attr_name": "xcvr_txdisable", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x71", + "attr_mask": "0x1", + "attr_cmpval": "0x2", + "attr_len": "1" + } + ] + } + }, + "PORT11": { + "dev_info": { + "device_type": "SFP28", + "device_name": "PORT11", + "device_parent": "MUX5" + }, + "dev_attr": { + "dev_idx": "11" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT11-EEPROM" + }, + { + "itf": "control", + "dev": "PORT11-CTRL" + } + ] + } + }, + "PORT11-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT11-EEPROM", + "device_parent": "MUX5", + "virt_parent": "PORT11" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x24", + "dev_addr": "0x50", + "dev_type": "optoe2" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT11-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT11-CTRL", + "device_parent": "MUX5", + "virt_parent": "PORT11" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x24", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x11", + "attr_mask": "0x2", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_rxlos", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x41", + "attr_mask": "0x2", + "attr_cmpval": "0x4", + "attr_len": "1" + }, + { + "attr_name": "xcvr_txfault", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x47", + "attr_mask": "0x2", + "attr_cmpval": "0x4", + "attr_len": "1" + }, + { + "attr_name": "xcvr_txdisable", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x71", + "attr_mask": "0x2", + "attr_cmpval": "0x4", + "attr_len": "1" + } + ] + } + }, + "PORT12": { + "dev_info": { + "device_type": "SFP28", + "device_name": "PORT12", + "device_parent": "MUX5" + }, + "dev_attr": { + "dev_idx": "12" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT12-EEPROM" + }, + { + "itf": "control", + "dev": "PORT12-CTRL" + } + ] + } + }, + "PORT12-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT12-EEPROM", + "device_parent": "MUX5", + "virt_parent": "PORT12" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x25", + "dev_addr": "0x50", + "dev_type": "optoe2" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT12-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT12-CTRL", + "device_parent": "MUX5", + "virt_parent": "PORT12" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x25", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x11", + "attr_mask": "0x3", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_rxlos", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x41", + "attr_mask": "0x3", + "attr_cmpval": "0x8", + "attr_len": "1" + }, + { + "attr_name": "xcvr_txfault", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x47", + "attr_mask": "0x3", + "attr_cmpval": "0x8", + "attr_len": "1" + }, + { + "attr_name": "xcvr_txdisable", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x71", + "attr_mask": "0x3", + "attr_cmpval": "0x8", + "attr_len": "1" + } + ] + } + }, + "PORT13": { + "dev_info": { + "device_type": "SFP28", + "device_name": "PORT13", + "device_parent": "MUX5" + }, + "dev_attr": { + "dev_idx": "13" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT13-EEPROM" + }, + { + "itf": "control", + "dev": "PORT13-CTRL" + } + ] + } + }, + "PORT13-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT13-EEPROM", + "device_parent": "MUX5", + "virt_parent": "PORT13" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x26", + "dev_addr": "0x50", + "dev_type": "optoe2" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT13-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT13-CTRL", + "device_parent": "MUX5", + "virt_parent": "PORT13" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x26", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x11", + "attr_mask": "0x4", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_rxlos", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x41", + "attr_mask": "0x4", + "attr_cmpval": "0x10", + "attr_len": "1" + }, + { + "attr_name": "xcvr_txfault", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x47", + "attr_mask": "0x4", + "attr_cmpval": "0x10", + "attr_len": "1" + }, + { + "attr_name": "xcvr_txdisable", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x71", + "attr_mask": "0x4", + "attr_cmpval": "0x10", + "attr_len": "1" + } + ] + } + }, + "PORT14": { + "dev_info": { + "device_type": "SFP28", + "device_name": "PORT14", + "device_parent": "MUX5" + }, + "dev_attr": { + "dev_idx": "14" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT14-EEPROM" + }, + { + "itf": "control", + "dev": "PORT14-CTRL" + } + ] + } + }, + "PORT14-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT14-EEPROM", + "device_parent": "MUX5", + "virt_parent": "PORT14" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x27", + "dev_addr": "0x50", + "dev_type": "optoe2" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT14-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT14-CTRL", + "device_parent": "MUX5", + "virt_parent": "PORT14" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x27", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x11", + "attr_mask": "0x5", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_rxlos", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x41", + "attr_mask": "0x5", + "attr_cmpval": "0x20", + "attr_len": "1" + }, + { + "attr_name": "xcvr_txfault", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x47", + "attr_mask": "0x5", + "attr_cmpval": "0x20", + "attr_len": "1" + }, + { + "attr_name": "xcvr_txdisable", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x71", + "attr_mask": "0x5", + "attr_cmpval": "0x20", + "attr_len": "1" + } + ] + } + }, + "PORT15": { + "dev_info": { + "device_type": "SFP28", + "device_name": "PORT15", + "device_parent": "MUX5" + }, + "dev_attr": { + "dev_idx": "15" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT15-EEPROM" + }, + { + "itf": "control", + "dev": "PORT15-CTRL" + } + ] + } + }, + "PORT15-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT15-EEPROM", + "device_parent": "MUX5", + "virt_parent": "PORT15" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x28", + "dev_addr": "0x50", + "dev_type": "optoe2" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT15-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT15-CTRL", + "device_parent": "MUX5", + "virt_parent": "PORT15" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x28", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x11", + "attr_mask": "0x6", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_rxlos", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x41", + "attr_mask": "0x6", + "attr_cmpval": "0x40", + "attr_len": "1" + }, + { + "attr_name": "xcvr_txfault", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x47", + "attr_mask": "0x6", + "attr_cmpval": "0x40", + "attr_len": "1" + }, + { + "attr_name": "xcvr_txdisable", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x71", + "attr_mask": "0x6", + "attr_cmpval": "0x40", + "attr_len": "1" + } + ] + } + }, + "PORT16": { + "dev_info": { + "device_type": "SFP28", + "device_name": "PORT16", + "device_parent": "MUX5" + }, + "dev_attr": { + "dev_idx": "16" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT16-EEPROM" + }, + { + "itf": "control", + "dev": "PORT16-CTRL" + } + ] + } + }, + "PORT16-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT16-EEPROM", + "device_parent": "MUX5", + "virt_parent": "PORT16" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x29", + "dev_addr": "0x50", + "dev_type": "optoe2" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT16-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT16-CTRL", + "device_parent": "MUX5", + "virt_parent": "PORT16" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x29", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x11", + "attr_mask": "0x7", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_rxlos", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x41", + "attr_mask": "0x7", + "attr_cmpval": "0x80", + "attr_len": "1" + }, + { + "attr_name": "xcvr_txfault", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x47", + "attr_mask": "0x7", + "attr_cmpval": "0x80", + "attr_len": "1" + }, + { + "attr_name": "xcvr_txdisable", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x71", + "attr_mask": "0x7", + "attr_cmpval": "0x80", + "attr_len": "1" + } + ] + } + }, + "PORT17": { + "dev_info": { + "device_type": "SFP28", + "device_name": "PORT17", + "device_parent": "MUX6" + }, + "dev_attr": { + "dev_idx": "17" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT17-EEPROM" + }, + { + "itf": "control", + "dev": "PORT17-CTRL" + } + ] + } + }, + "PORT17-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT17-EEPROM", + "device_parent": "MUX6", + "virt_parent": "PORT17" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x2a", + "dev_addr": "0x50", + "dev_type": "optoe2" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT17-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT17-CTRL", + "device_parent": "MUX6", + "virt_parent": "PORT17" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x2a", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x12", + "attr_mask": "0x0", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_rxlos", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x42", + "attr_mask": "0x0", + "attr_cmpval": "0x1", + "attr_len": "1" + }, + { + "attr_name": "xcvr_txfault", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x48", + "attr_mask": "0x0", + "attr_cmpval": "0x1", + "attr_len": "1" + }, + { + "attr_name": "xcvr_txdisable", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x72", + "attr_mask": "0x0", + "attr_cmpval": "0x1", + "attr_len": "1" + } + ] + } + }, + "PORT18": { + "dev_info": { + "device_type": "SFP28", + "device_name": "PORT18", + "device_parent": "MUX6" + }, + "dev_attr": { + "dev_idx": "18" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT18-EEPROM" + }, + { + "itf": "control", + "dev": "PORT18-CTRL" + } + ] + } + }, + "PORT18-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT18-EEPROM", + "device_parent": "MUX6", + "virt_parent": "PORT18" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x2b", + "dev_addr": "0x50", + "dev_type": "optoe2" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT18-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT18-CTRL", + "device_parent": "MUX6", + "virt_parent": "PORT18" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x2b", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x12", + "attr_mask": "0x1", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_rxlos", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x42", + "attr_mask": "0x1", + "attr_cmpval": "0x2", + "attr_len": "1" + }, + { + "attr_name": "xcvr_txfault", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x48", + "attr_mask": "0x1", + "attr_cmpval": "0x2", + "attr_len": "1" + }, + { + "attr_name": "xcvr_txdisable", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x72", + "attr_mask": "0x1", + "attr_cmpval": "0x2", + "attr_len": "1" + } + ] + } + }, + "PORT19": { + "dev_info": { + "device_type": "SFP28", + "device_name": "PORT19", + "device_parent": "MUX6" + }, + "dev_attr": { + "dev_idx": "19" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT19-EEPROM" + }, + { + "itf": "control", + "dev": "PORT19-CTRL" + } + ] + } + }, + "PORT19-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT19-EEPROM", + "device_parent": "MUX6", + "virt_parent": "PORT19" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x2c", + "dev_addr": "0x50", + "dev_type": "optoe2" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT19-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT19-CTRL", + "device_parent": "MUX6", + "virt_parent": "PORT19" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x2c", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x12", + "attr_mask": "0x2", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_rxlos", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x42", + "attr_mask": "0x2", + "attr_cmpval": "0x4", + "attr_len": "1" + }, + { + "attr_name": "xcvr_txfault", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x48", + "attr_mask": "0x2", + "attr_cmpval": "0x4", + "attr_len": "1" + }, + { + "attr_name": "xcvr_txdisable", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x72", + "attr_mask": "0x2", + "attr_cmpval": "0x4", + "attr_len": "1" + } + ] + } + }, + "PORT20": { + "dev_info": { + "device_type": "SFP28", + "device_name": "PORT20", + "device_parent": "MUX6" + }, + "dev_attr": { + "dev_idx": "20" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT20-EEPROM" + }, + { + "itf": "control", + "dev": "PORT20-CTRL" + } + ] + } + }, + "PORT20-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT20-EEPROM", + "device_parent": "MUX6", + "virt_parent": "PORT20" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x2d", + "dev_addr": "0x50", + "dev_type": "optoe2" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT20-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT20-CTRL", + "device_parent": "MUX6", + "virt_parent": "PORT20" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x2d", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x12", + "attr_mask": "0x3", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_rxlos", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x42", + "attr_mask": "0x3", + "attr_cmpval": "0x8", + "attr_len": "1" + }, + { + "attr_name": "xcvr_txfault", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x48", + "attr_mask": "0x3", + "attr_cmpval": "0x8", + "attr_len": "1" + }, + { + "attr_name": "xcvr_txdisable", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x72", + "attr_mask": "0x3", + "attr_cmpval": "0x8", + "attr_len": "1" + } + ] + } + }, + "PORT21": { + "dev_info": { + "device_type": "SFP28", + "device_name": "PORT21", + "device_parent": "MUX6" + }, + "dev_attr": { + "dev_idx": "21" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT21-EEPROM" + }, + { + "itf": "control", + "dev": "PORT21-CTRL" + } + ] + } + }, + "PORT21-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT21-EEPROM", + "device_parent": "MUX6", + "virt_parent": "PORT21" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x2e", + "dev_addr": "0x50", + "dev_type": "optoe2" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT21-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT21-CTRL", + "device_parent": "MUX6", + "virt_parent": "PORT21" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x2e", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x12", + "attr_mask": "0x4", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_rxlos", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x42", + "attr_mask": "0x4", + "attr_cmpval": "0x10", + "attr_len": "1" + }, + { + "attr_name": "xcvr_txfault", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x48", + "attr_mask": "0x4", + "attr_cmpval": "0x10", + "attr_len": "1" + }, + { + "attr_name": "xcvr_txdisable", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x72", + "attr_mask": "0x4", + "attr_cmpval": "0x10", + "attr_len": "1" + } + ] + } + }, + "PORT22": { + "dev_info": { + "device_type": "SFP28", + "device_name": "PORT22", + "device_parent": "MUX6" + }, + "dev_attr": { + "dev_idx": "22" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT22-EEPROM" + }, + { + "itf": "control", + "dev": "PORT22-CTRL" + } + ] + } + }, + "PORT22-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT22-EEPROM", + "device_parent": "MUX6", + "virt_parent": "PORT22" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x2f", + "dev_addr": "0x50", + "dev_type": "optoe2" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT22-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT22-CTRL", + "device_parent": "MUX6", + "virt_parent": "PORT22" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x2f", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x12", + "attr_mask": "0x5", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_rxlos", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x42", + "attr_mask": "0x5", + "attr_cmpval": "0x20", + "attr_len": "1" + }, + { + "attr_name": "xcvr_txfault", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x48", + "attr_mask": "0x5", + "attr_cmpval": "0x20", + "attr_len": "1" + }, + { + "attr_name": "xcvr_txdisable", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x72", + "attr_mask": "0x5", + "attr_cmpval": "0x20", + "attr_len": "1" + } + ] + } + }, + "PORT23": { + "dev_info": { + "device_type": "SFP28", + "device_name": "PORT23", + "device_parent": "MUX6" + }, + "dev_attr": { + "dev_idx": "23" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT23-EEPROM" + }, + { + "itf": "control", + "dev": "PORT23-CTRL" + } + ] + } + }, + "PORT23-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT23-EEPROM", + "device_parent": "MUX6", + "virt_parent": "PORT23" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x30", + "dev_addr": "0x50", + "dev_type": "optoe2" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT23-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT23-CTRL", + "device_parent": "MUX6", + "virt_parent": "PORT23" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x30", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x12", + "attr_mask": "0x6", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_rxlos", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x42", + "attr_mask": "0x6", + "attr_cmpval": "0x40", + "attr_len": "1" + }, + { + "attr_name": "xcvr_txfault", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x48", + "attr_mask": "0x6", + "attr_cmpval": "0x40", + "attr_len": "1" + }, + { + "attr_name": "xcvr_txdisable", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x72", + "attr_mask": "0x6", + "attr_cmpval": "0x40", + "attr_len": "1" + } + ] + } + }, + "PORT24": { + "dev_info": { + "device_type": "SFP28", + "device_name": "PORT24", + "device_parent": "MUX6" + }, + "dev_attr": { + "dev_idx": "24" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT24-EEPROM" + }, + { + "itf": "control", + "dev": "PORT24-CTRL" + } + ] + } + }, + "PORT24-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT24-EEPROM", + "device_parent": "MUX6", + "virt_parent": "PORT24" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x31", + "dev_addr": "0x50", + "dev_type": "optoe2" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT24-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT24-CTRL", + "device_parent": "MUX6", + "virt_parent": "PORT24" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x31", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x12", + "attr_mask": "0x7", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_rxlos", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x42", + "attr_mask": "0x7", + "attr_cmpval": "0x80", + "attr_len": "1" + }, + { + "attr_name": "xcvr_txfault", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x48", + "attr_mask": "0x7", + "attr_cmpval": "0x80", + "attr_len": "1" + }, + { + "attr_name": "xcvr_txdisable", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x72", + "attr_mask": "0x7", + "attr_cmpval": "0x80", + "attr_len": "1" + } + ] + } + }, + "PORT25": { + "dev_info": { + "device_type": "SFP28", + "device_name": "PORT25", + "device_parent": "MUX7" + }, + "dev_attr": { + "dev_idx": "25" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT25-EEPROM" + }, + { + "itf": "control", + "dev": "PORT25-CTRL" + } + ] + } + }, + "PORT25-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT25-EEPROM", + "device_parent": "MUX7", + "virt_parent": "PORT25" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x32", + "dev_addr": "0x50", + "dev_type": "optoe2" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT25-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT25-CTRL", + "device_parent": "MUX7", + "virt_parent": "PORT25" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x32", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x13", + "attr_mask": "0x0", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_rxlos", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x43", + "attr_mask": "0x0", + "attr_cmpval": "0x1", + "attr_len": "1" + }, + { + "attr_name": "xcvr_txfault", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x49", + "attr_mask": "0x0", + "attr_cmpval": "0x1", + "attr_len": "1" + }, + { + "attr_name": "xcvr_txdisable", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x73", + "attr_mask": "0x0", + "attr_cmpval": "0x1", + "attr_len": "1" + } + ] + } + }, + "PORT26": { + "dev_info": { + "device_type": "SFP28", + "device_name": "PORT26", + "device_parent": "MUX7" + }, + "dev_attr": { + "dev_idx": "26" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT26-EEPROM" + }, + { + "itf": "control", + "dev": "PORT26-CTRL" + } + ] + } + }, + "PORT26-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT26-EEPROM", + "device_parent": "MUX7", + "virt_parent": "PORT26" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x33", + "dev_addr": "0x50", + "dev_type": "optoe2" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT26-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT26-CTRL", + "device_parent": "MUX7", + "virt_parent": "PORT26" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x33", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x13", + "attr_mask": "0x1", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_rxlos", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x43", + "attr_mask": "0x1", + "attr_cmpval": "0x2", + "attr_len": "1" + }, + { + "attr_name": "xcvr_txfault", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x49", + "attr_mask": "0x1", + "attr_cmpval": "0x2", + "attr_len": "1" + }, + { + "attr_name": "xcvr_txdisable", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x73", + "attr_mask": "0x1", + "attr_cmpval": "0x2", + "attr_len": "1" + } + ] + } + }, + "PORT27": { + "dev_info": { + "device_type": "SFP28", + "device_name": "PORT27", + "device_parent": "MUX7" + }, + "dev_attr": { + "dev_idx": "27" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT27-EEPROM" + }, + { + "itf": "control", + "dev": "PORT27-CTRL" + } + ] + } + }, + "PORT27-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT27-EEPROM", + "device_parent": "MUX7", + "virt_parent": "PORT27" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x34", + "dev_addr": "0x50", + "dev_type": "optoe2" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT27-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT27-CTRL", + "device_parent": "MUX7", + "virt_parent": "PORT27" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x34", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x13", + "attr_mask": "0x2", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_rxlos", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x43", + "attr_mask": "0x2", + "attr_cmpval": "0x4", + "attr_len": "1" + }, + { + "attr_name": "xcvr_txfault", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x49", + "attr_mask": "0x2", + "attr_cmpval": "0x4", + "attr_len": "1" + }, + { + "attr_name": "xcvr_txdisable", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x73", + "attr_mask": "0x2", + "attr_cmpval": "0x4", + "attr_len": "1" + } + ] + } + }, + "PORT28": { + "dev_info": { + "device_type": "SFP28", + "device_name": "PORT28", + "device_parent": "MUX7" + }, + "dev_attr": { + "dev_idx": "28" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT28-EEPROM" + }, + { + "itf": "control", + "dev": "PORT28-CTRL" + } + ] + } + }, + "PORT28-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT28-EEPROM", + "device_parent": "MUX7", + "virt_parent": "PORT28" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x35", + "dev_addr": "0x50", + "dev_type": "optoe2" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT28-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT28-CTRL", + "device_parent": "MUX7", + "virt_parent": "PORT28" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x35", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x13", + "attr_mask": "0x3", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_rxlos", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x43", + "attr_mask": "0x3", + "attr_cmpval": "0x8", + "attr_len": "1" + }, + { + "attr_name": "xcvr_txfault", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x49", + "attr_mask": "0x3", + "attr_cmpval": "0x8", + "attr_len": "1" + }, + { + "attr_name": "xcvr_txdisable", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x73", + "attr_mask": "0x3", + "attr_cmpval": "0x8", + "attr_len": "1" + } + ] + } + }, + "PORT29": { + "dev_info": { + "device_type": "SFP28", + "device_name": "PORT29", + "device_parent": "MUX7" + }, + "dev_attr": { + "dev_idx": "29" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT29-EEPROM" + }, + { + "itf": "control", + "dev": "PORT29-CTRL" + } + ] + } + }, + "PORT29-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT29-EEPROM", + "device_parent": "MUX7", + "virt_parent": "PORT29" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x36", + "dev_addr": "0x50", + "dev_type": "optoe2" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT29-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT29-CTRL", + "device_parent": "MUX7", + "virt_parent": "PORT29" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x36", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x13", + "attr_mask": "0x4", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_rxlos", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x43", + "attr_mask": "0x4", + "attr_cmpval": "0x10", + "attr_len": "1" + }, + { + "attr_name": "xcvr_txfault", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x49", + "attr_mask": "0x4", + "attr_cmpval": "0x10", + "attr_len": "1" + }, + { + "attr_name": "xcvr_txdisable", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x73", + "attr_mask": "0x4", + "attr_cmpval": "0x10", + "attr_len": "1" + } + ] + } + }, + "PORT30": { + "dev_info": { + "device_type": "SFP28", + "device_name": "PORT30", + "device_parent": "MUX7" + }, + "dev_attr": { + "dev_idx": "30" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT30-EEPROM" + }, + { + "itf": "control", + "dev": "PORT30-CTRL" + } + ] + } + }, + "PORT30-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT30-EEPROM", + "device_parent": "MUX7", + "virt_parent": "PORT30" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x37", + "dev_addr": "0x50", + "dev_type": "optoe2" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT30-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT30-CTRL", + "device_parent": "MUX7", + "virt_parent": "PORT30" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x37", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x13", + "attr_mask": "0x5", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_rxlos", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x43", + "attr_mask": "0x5", + "attr_cmpval": "0x20", + "attr_len": "1" + }, + { + "attr_name": "xcvr_txfault", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x49", + "attr_mask": "0x5", + "attr_cmpval": "0x20", + "attr_len": "1" + }, + { + "attr_name": "xcvr_txdisable", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x73", + "attr_mask": "0x5", + "attr_cmpval": "0x20", + "attr_len": "1" + } + ] + } + }, + "PORT31": { + "dev_info": { + "device_type": "SFP28", + "device_name": "PORT31", + "device_parent": "MUX7" + }, + "dev_attr": { + "dev_idx": "31" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT31-EEPROM" + }, + { + "itf": "control", + "dev": "PORT31-CTRL" + } + ] + } + }, + "PORT31-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT31-EEPROM", + "device_parent": "MUX7", + "virt_parent": "PORT31" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x38", + "dev_addr": "0x50", + "dev_type": "optoe2" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT31-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT31-CTRL", + "device_parent": "MUX7", + "virt_parent": "PORT31" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x38", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x13", + "attr_mask": "0x6", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_rxlos", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x43", + "attr_mask": "0x6", + "attr_cmpval": "0x40", + "attr_len": "1" + }, + { + "attr_name": "xcvr_txfault", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x49", + "attr_mask": "0x6", + "attr_cmpval": "0x40", + "attr_len": "1" + }, + { + "attr_name": "xcvr_txdisable", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x73", + "attr_mask": "0x6", + "attr_cmpval": "0x40", + "attr_len": "1" + } + ] + } + }, + "PORT32": { + "dev_info": { + "device_type": "SFP28", + "device_name": "PORT32", + "device_parent": "MUX7" + }, + "dev_attr": { + "dev_idx": "32" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT32-EEPROM" + }, + { + "itf": "control", + "dev": "PORT32-CTRL" + } + ] + } + }, + "PORT32-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT32-EEPROM", + "device_parent": "MUX7", + "virt_parent": "PORT32" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x39", + "dev_addr": "0x50", + "dev_type": "optoe2" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT32-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT32-CTRL", + "device_parent": "MUX7", + "virt_parent": "PORT32" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x39", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x13", + "attr_mask": "0x7", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_rxlos", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x43", + "attr_mask": "0x7", + "attr_cmpval": "0x80", + "attr_len": "1" + }, + { + "attr_name": "xcvr_txfault", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x49", + "attr_mask": "0x7", + "attr_cmpval": "0x80", + "attr_len": "1" + }, + { + "attr_name": "xcvr_txdisable", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x73", + "attr_mask": "0x7", + "attr_cmpval": "0x80", + "attr_len": "1" + } + ] + } + }, + "PORT33": { + "dev_info": { + "device_type": "SFP28", + "device_name": "PORT33", + "device_parent": "MUX8" + }, + "dev_attr": { + "dev_idx": "33" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT33-EEPROM" + }, + { + "itf": "control", + "dev": "PORT33-CTRL" + } + ] + } + }, + "PORT33-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT33-EEPROM", + "device_parent": "MUX8", + "virt_parent": "PORT33" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x3a", + "dev_addr": "0x50", + "dev_type": "optoe2" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT33-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT33-CTRL", + "device_parent": "MUX8", + "virt_parent": "PORT33" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x3a", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x14", + "attr_mask": "0x0", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_rxlos", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x44", + "attr_mask": "0x0", + "attr_cmpval": "0x1", + "attr_len": "1" + }, + { + "attr_name": "xcvr_txfault", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x4a", + "attr_mask": "0x0", + "attr_cmpval": "0x1", + "attr_len": "1" + }, + { + "attr_name": "xcvr_txdisable", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x74", + "attr_mask": "0x0", + "attr_cmpval": "0x1", + "attr_len": "1" + } + ] + } + }, + "PORT34": { + "dev_info": { + "device_type": "SFP28", + "device_name": "PORT34", + "device_parent": "MUX8" + }, + "dev_attr": { + "dev_idx": "34" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT34-EEPROM" + }, + { + "itf": "control", + "dev": "PORT34-CTRL" + } + ] + } + }, + "PORT34-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT34-EEPROM", + "device_parent": "MUX8", + "virt_parent": "PORT34" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x3b", + "dev_addr": "0x50", + "dev_type": "optoe2" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT34-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT34-CTRL", + "device_parent": "MUX8", + "virt_parent": "PORT34" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x3b", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x14", + "attr_mask": "0x1", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_rxlos", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x44", + "attr_mask": "0x1", + "attr_cmpval": "0x2", + "attr_len": "1" + }, + { + "attr_name": "xcvr_txfault", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x4a", + "attr_mask": "0x1", + "attr_cmpval": "0x2", + "attr_len": "1" + }, + { + "attr_name": "xcvr_txdisable", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x74", + "attr_mask": "0x1", + "attr_cmpval": "0x2", + "attr_len": "1" + } + ] + } + }, + "PORT35": { + "dev_info": { + "device_type": "SFP28", + "device_name": "PORT35", + "device_parent": "MUX8" + }, + "dev_attr": { + "dev_idx": "35" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT35-EEPROM" + }, + { + "itf": "control", + "dev": "PORT35-CTRL" + } + ] + } + }, + "PORT35-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT35-EEPROM", + "device_parent": "MUX8", + "virt_parent": "PORT35" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x3c", + "dev_addr": "0x50", + "dev_type": "optoe2" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT35-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT35-CTRL", + "device_parent": "MUX8", + "virt_parent": "PORT35" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x3c", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x14", + "attr_mask": "0x2", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_rxlos", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x44", + "attr_mask": "0x2", + "attr_cmpval": "0x4", + "attr_len": "1" + }, + { + "attr_name": "xcvr_txfault", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x4a", + "attr_mask": "0x2", + "attr_cmpval": "0x4", + "attr_len": "1" + }, + { + "attr_name": "xcvr_txdisable", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x74", + "attr_mask": "0x2", + "attr_cmpval": "0x4", + "attr_len": "1" + } + ] + } + }, + "PORT36": { + "dev_info": { + "device_type": "SFP28", + "device_name": "PORT36", + "device_parent": "MUX8" + }, + "dev_attr": { + "dev_idx": "36" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT36-EEPROM" + }, + { + "itf": "control", + "dev": "PORT36-CTRL" + } + ] + } + }, + "PORT36-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT36-EEPROM", + "device_parent": "MUX8", + "virt_parent": "PORT36" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x3d", + "dev_addr": "0x50", + "dev_type": "optoe2" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT36-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT36-CTRL", + "device_parent": "MUX8", + "virt_parent": "PORT36" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x3d", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x14", + "attr_mask": "0x3", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_rxlos", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x44", + "attr_mask": "0x3", + "attr_cmpval": "0x8", + "attr_len": "1" + }, + { + "attr_name": "xcvr_txfault", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x4a", + "attr_mask": "0x3", + "attr_cmpval": "0x8", + "attr_len": "1" + }, + { + "attr_name": "xcvr_txdisable", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x74", + "attr_mask": "0x3", + "attr_cmpval": "0x8", + "attr_len": "1" + } + ] + } + }, + "PORT37": { + "dev_info": { + "device_type": "SFP28", + "device_name": "PORT37", + "device_parent": "MUX8" + }, + "dev_attr": { + "dev_idx": "37" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT37-EEPROM" + }, + { + "itf": "control", + "dev": "PORT37-CTRL" + } + ] + } + }, + "PORT37-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT37-EEPROM", + "device_parent": "MUX8", + "virt_parent": "PORT37" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x3e", + "dev_addr": "0x50", + "dev_type": "optoe2" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT37-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT37-CTRL", + "device_parent": "MUX8", + "virt_parent": "PORT37" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x3e", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x14", + "attr_mask": "0x4", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_rxlos", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x44", + "attr_mask": "0x4", + "attr_cmpval": "0x10", + "attr_len": "1" + }, + { + "attr_name": "xcvr_txfault", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x4a", + "attr_mask": "0x4", + "attr_cmpval": "0x10", + "attr_len": "1" + }, + { + "attr_name": "xcvr_txdisable", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x74", + "attr_mask": "0x4", + "attr_cmpval": "0x10", + "attr_len": "1" + } + ] + } + }, + "PORT38": { + "dev_info": { + "device_type": "SFP28", + "device_name": "PORT38", + "device_parent": "MUX8" + }, + "dev_attr": { + "dev_idx": "38" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT38-EEPROM" + }, + { + "itf": "control", + "dev": "PORT38-CTRL" + } + ] + } + }, + "PORT38-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT38-EEPROM", + "device_parent": "MUX8", + "virt_parent": "PORT38" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x3f", + "dev_addr": "0x50", + "dev_type": "optoe2" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT38-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT38-CTRL", + "device_parent": "MUX8", + "virt_parent": "PORT38" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x3f", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x14", + "attr_mask": "0x5", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_rxlos", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x44", + "attr_mask": "0x5", + "attr_cmpval": "0x20", + "attr_len": "1" + }, + { + "attr_name": "xcvr_txfault", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x4a", + "attr_mask": "0x5", + "attr_cmpval": "0x20", + "attr_len": "1" + }, + { + "attr_name": "xcvr_txdisable", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x74", + "attr_mask": "0x5", + "attr_cmpval": "0x20", + "attr_len": "1" + } + ] + } + }, + "PORT39": { + "dev_info": { + "device_type": "SFP28", + "device_name": "PORT39", + "device_parent": "MUX8" + }, + "dev_attr": { + "dev_idx": "39" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT39-EEPROM" + }, + { + "itf": "control", + "dev": "PORT39-CTRL" + } + ] + } + }, + "PORT39-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT39-EEPROM", + "device_parent": "MUX8", + "virt_parent": "PORT39" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x40", + "dev_addr": "0x50", + "dev_type": "optoe2" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT39-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT39-CTRL", + "device_parent": "MUX8", + "virt_parent": "PORT39" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x40", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x14", + "attr_mask": "0x6", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_rxlos", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x44", + "attr_mask": "0x6", + "attr_cmpval": "0x40", + "attr_len": "1" + }, + { + "attr_name": "xcvr_txfault", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x4a", + "attr_mask": "0x6", + "attr_cmpval": "0x40", + "attr_len": "1" + }, + { + "attr_name": "xcvr_txdisable", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x74", + "attr_mask": "0x6", + "attr_cmpval": "0x40", + "attr_len": "1" + } + ] + } + }, + "PORT40": { + "dev_info": { + "device_type": "SFP28", + "device_name": "PORT40", + "device_parent": "MUX8" + }, + "dev_attr": { + "dev_idx": "40" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT40-EEPROM" + }, + { + "itf": "control", + "dev": "PORT40-CTRL" + } + ] + } + }, + "PORT40-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT40-EEPROM", + "device_parent": "MUX8", + "virt_parent": "PORT40" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x41", + "dev_addr": "0x50", + "dev_type": "optoe2" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT40-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT40-CTRL", + "device_parent": "MUX8", + "virt_parent": "PORT40" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x41", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x14", + "attr_mask": "0x7", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_rxlos", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x44", + "attr_mask": "0x7", + "attr_cmpval": "0x80", + "attr_len": "1" + }, + { + "attr_name": "xcvr_txfault", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x4a", + "attr_mask": "0x7", + "attr_cmpval": "0x80", + "attr_len": "1" + }, + { + "attr_name": "xcvr_txdisable", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x74", + "attr_mask": "0x7", + "attr_cmpval": "0x80", + "attr_len": "1" + } + ] + } + }, + "PORT41": { + "dev_info": { + "device_type": "SFP28", + "device_name": "PORT41", + "device_parent": "MUX9" + }, + "dev_attr": { + "dev_idx": "41" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT41-EEPROM" + }, + { + "itf": "control", + "dev": "PORT41-CTRL" + } + ] + } + }, + "PORT41-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT41-EEPROM", + "device_parent": "MUX9", + "virt_parent": "PORT41" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x42", + "dev_addr": "0x50", + "dev_type": "optoe2" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT41-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT41-CTRL", + "device_parent": "MUX9", + "virt_parent": "PORT41" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x42", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x15", + "attr_mask": "0x0", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_rxlos", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x45", + "attr_mask": "0x0", + "attr_cmpval": "0x1", + "attr_len": "1" + }, + { + "attr_name": "xcvr_txfault", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x4b", + "attr_mask": "0x0", + "attr_cmpval": "0x1", + "attr_len": "1" + }, + { + "attr_name": "xcvr_txdisable", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x75", + "attr_mask": "0x0", + "attr_cmpval": "0x1", + "attr_len": "1" + } + ] + } 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"PORT43-CTRL" + } + ] + } + }, + "PORT43-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT43-EEPROM", + "device_parent": "MUX9", + "virt_parent": "PORT43" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x44", + "dev_addr": "0x50", + "dev_type": "optoe2" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT43-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT43-CTRL", + "device_parent": "MUX9", + "virt_parent": "PORT43" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x44", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x15", + "attr_mask": "0x2", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_rxlos", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x45", + "attr_mask": "0x2", + "attr_cmpval": "0x4", + "attr_len": "1" + }, + { + "attr_name": "xcvr_txfault", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x4b", + "attr_mask": "0x2", + "attr_cmpval": "0x4", + "attr_len": "1" + }, + { + "attr_name": "xcvr_txdisable", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x75", + "attr_mask": "0x2", + "attr_cmpval": "0x4", + "attr_len": "1" + } + ] + } + }, + "PORT44": { + "dev_info": { + "device_type": "SFP28", + "device_name": "PORT44", + "device_parent": "MUX9" + }, + "dev_attr": { + "dev_idx": "44" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT44-EEPROM" + }, + { + "itf": "control", + "dev": "PORT44-CTRL" + } + ] + } + }, + "PORT44-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT44-EEPROM", + "device_parent": "MUX9", + "virt_parent": "PORT44" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x45", + "dev_addr": "0x50", + "dev_type": "optoe2" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT44-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT44-CTRL", + "device_parent": "MUX9", + "virt_parent": "PORT44" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x45", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x15", + "attr_mask": "0x3", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_rxlos", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x45", + "attr_mask": "0x3", + "attr_cmpval": "0x8", + "attr_len": "1" + }, + { + "attr_name": "xcvr_txfault", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x4b", + "attr_mask": "0x3", + "attr_cmpval": "0x8", + "attr_len": "1" + }, + { + "attr_name": "xcvr_txdisable", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x75", + "attr_mask": "0x3", + "attr_cmpval": "0x8", + "attr_len": "1" + } + ] + } + }, + "PORT45": { + "dev_info": { + "device_type": "SFP28", + "device_name": "PORT45", + "device_parent": "MUX9" + }, + "dev_attr": { + "dev_idx": "45" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT45-EEPROM" + }, + { + "itf": "control", + "dev": "PORT45-CTRL" + } + ] + } + }, + "PORT45-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT45-EEPROM", + "device_parent": "MUX9", + "virt_parent": "PORT45" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x46", + "dev_addr": "0x50", + "dev_type": "optoe2" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT45-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT45-CTRL", + "device_parent": "MUX9", + "virt_parent": "PORT45" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x46", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x15", + "attr_mask": "0x4", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_rxlos", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x45", + "attr_mask": "0x4", + "attr_cmpval": "0x10", + "attr_len": "1" + }, + { + "attr_name": "xcvr_txfault", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x4b", + "attr_mask": "0x4", + "attr_cmpval": "0x10", + "attr_len": "1" + }, + { + "attr_name": "xcvr_txdisable", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x75", + "attr_mask": "0x4", + "attr_cmpval": "0x10", + "attr_len": "1" + } + ] + } + }, + "PORT46": { + "dev_info": { + "device_type": "SFP28", + "device_name": "PORT46", + "device_parent": "MUX9" + }, + "dev_attr": { + "dev_idx": "46" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT46-EEPROM" + }, + { + "itf": "control", + "dev": "PORT46-CTRL" + } + ] + } + }, + "PORT46-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT46-EEPROM", + "device_parent": "MUX9", + "virt_parent": "PORT46" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x47", + "dev_addr": "0x50", + "dev_type": "optoe2" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT46-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT46-CTRL", + "device_parent": "MUX9", + "virt_parent": "PORT46" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x47", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x15", + "attr_mask": "0x5", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_rxlos", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x45", + "attr_mask": "0x5", + "attr_cmpval": "0x20", + "attr_len": "1" + }, + { + "attr_name": "xcvr_txfault", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x4b", + "attr_mask": "0x5", + "attr_cmpval": "0x20", + "attr_len": "1" + }, + { + "attr_name": "xcvr_txdisable", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x75", + "attr_mask": "0x5", + "attr_cmpval": "0x20", + "attr_len": "1" + } + ] + } + }, + "PORT47": { + "dev_info": { + "device_type": "SFP28", + "device_name": "PORT47", + "device_parent": "MUX9" + }, + "dev_attr": { + "dev_idx": "47" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT47-EEPROM" + }, + { + "itf": "control", + "dev": "PORT47-CTRL" + } + ] + } + }, + "PORT47-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT47-EEPROM", + "device_parent": "MUX9", + "virt_parent": "PORT47" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x48", + "dev_addr": "0x50", + "dev_type": "optoe2" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT47-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT47-CTRL", + "device_parent": "MUX9", + "virt_parent": "PORT47" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x48", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x15", + "attr_mask": "0x6", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_rxlos", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x45", + "attr_mask": "0x6", + "attr_cmpval": "0x40", + "attr_len": "1" + }, + { + "attr_name": "xcvr_txfault", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x4b", + "attr_mask": "0x6", + "attr_cmpval": "0x40", + "attr_len": "1" + }, + { + "attr_name": "xcvr_txdisable", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x75", + "attr_mask": "0x6", + "attr_cmpval": "0x40", + "attr_len": "1" + } + ] + } + }, + "PORT48": { + "dev_info": { + "device_type": "SFP28", + "device_name": "PORT48", + "device_parent": "MUX9" + }, + "dev_attr": { + "dev_idx": "48" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT48-EEPROM" + }, + { + "itf": "control", + "dev": "PORT48-CTRL" + } + ] + } + }, + "PORT48-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT48-EEPROM", + "device_parent": "MUX9", + "virt_parent": "PORT48" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x49", + "dev_addr": "0x50", + "dev_type": "optoe2" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT48-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT48-CTRL", + "device_parent": "MUX9", + "virt_parent": "PORT48" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x49", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x15", + "attr_mask": "0x7", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_rxlos", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x45", + "attr_mask": "0x7", + "attr_cmpval": "0x80", + "attr_len": "1" + }, + { + "attr_name": "xcvr_txfault", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x4b", + "attr_mask": "0x7", + "attr_cmpval": "0x80", + "attr_len": "1" + }, + { + "attr_name": "xcvr_txdisable", + "attr_devaddr": "0x31", + "attr_devname": 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"pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x16", + "attr_mask": "0x0", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_intr_status", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x17", + "attr_mask": "0x0", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x76", + "attr_mask": "0x0", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_lpmode", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x77", + "attr_mask": "0x0", + "attr_cmpval": "0x1", + "attr_len": "1" + } + ] + } + }, + "PORT50": { + "dev_info": { + "device_type": "QSFP28", + "device_name": "PORT50", + "device_parent": "MUX10" + }, + "dev_attr": { + "dev_idx": "50" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT50-EEPROM" + }, + { + "itf": "control", + "dev": "PORT50-CTRL" + } + ] + } + }, + "PORT50-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT50-EEPROM", + "device_parent": "MUX10", + "virt_parent": "PORT50" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x4b", + "dev_addr": "0x50", + "dev_type": "optoe1" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT50-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT50-CTRL", + "device_parent": "MUX10", + "virt_parent": "PORT50" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x4b", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x16", + "attr_mask": "0x1", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_intr_status", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x17", + "attr_mask": "0x1", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x76", + "attr_mask": "0x1", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_lpmode", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x77", + "attr_mask": "0x1", + "attr_cmpval": "0x2", + "attr_len": "1" + } + ] + } + }, + "PORT51": { + "dev_info": { + "device_type": "QSFP28", + "device_name": "PORT51", + "device_parent": "MUX10" + }, + "dev_attr": { + "dev_idx": "51" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT51-EEPROM" + }, + { + "itf": "control", + "dev": "PORT51-CTRL" + } + ] + } + }, + "PORT51-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT51-EEPROM", + "device_parent": "MUX10", + "virt_parent": "PORT51" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x4c", + "dev_addr": "0x50", + "dev_type": "optoe1" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT51-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT51-CTRL", + "device_parent": "MUX10", + "virt_parent": "PORT51" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x4c", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x16", + "attr_mask": "0x2", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_intr_status", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x17", + "attr_mask": "0x2", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x76", + "attr_mask": "0x2", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_lpmode", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x77", + "attr_mask": "0x2", + "attr_cmpval": "0x4", + "attr_len": "1" + } + ] + } + }, + "PORT52": { + "dev_info": { + "device_type": "QSFP28", + "device_name": "PORT52", + "device_parent": "MUX10" + }, + "dev_attr": { + "dev_idx": "52" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT52-EEPROM" + }, + { + "itf": "control", + "dev": "PORT52-CTRL" + } + ] + } + }, + "PORT52-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT52-EEPROM", + "device_parent": "MUX10", + "virt_parent": "PORT52" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x4d", + "dev_addr": "0x50", + "dev_type": "optoe1" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT52-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT52-CTRL", + "device_parent": "MUX10", + "virt_parent": "PORT52" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x4d", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x16", + "attr_mask": "0x3", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_intr_status", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x17", + "attr_mask": "0x3", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x76", + "attr_mask": "0x3", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_lpmode", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x77", + "attr_mask": "0x3", + "attr_cmpval": "0x8", + "attr_len": "1" + } + ] + } + }, + "PORT53": { + "dev_info": { + "device_type": "QSFP28", + "device_name": "PORT53", + "device_parent": "MUX10" + }, + "dev_attr": { + "dev_idx": "53" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT53-EEPROM" + }, + { + "itf": "control", + "dev": "PORT53-CTRL" + } + ] + } + }, + "PORT53-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT53-EEPROM", + "device_parent": "MUX10", + "virt_parent": "PORT53" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x4e", + "dev_addr": "0x50", + "dev_type": "optoe1" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT53-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT53-CTRL", + "device_parent": "MUX10", + "virt_parent": "PORT53" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x4e", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x16", + "attr_mask": "0x4", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_intr_status", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x17", + "attr_mask": "0x4", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x76", + "attr_mask": "0x4", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_lpmode", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x77", + "attr_mask": "0x4", + "attr_cmpval": "0x10", + "attr_len": "1" + } + ] + } + }, + "PORT54": { + "dev_info": { + "device_type": "QSFP28", + "device_name": "PORT54", + "device_parent": "MUX10" + }, + "dev_attr": { + "dev_idx": "54" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT54-EEPROM" + }, + { + "itf": "control", + "dev": "PORT54-CTRL" + } + ] + } + }, + "PORT54-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT54-EEPROM", + "device_parent": "MUX10", + "virt_parent": "PORT54" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x4f", + "dev_addr": "0x50", + "dev_type": "optoe1" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT54-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT54-CTRL", + "device_parent": "MUX10", + "virt_parent": "PORT54" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x4f", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x16", + "attr_mask": "0x5", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_intr_status", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x17", + "attr_mask": "0x5", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x76", + "attr_mask": "0x5", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_lpmode", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x77", + "attr_mask": "0x5", + "attr_cmpval": "0x20", + "attr_len": "1" + } + ] + } + } +} diff --git a/device/ufispace/x86_64-ufispace_s7801_54xs-r0/pddf_support b/device/ufispace/x86_64-ufispace_s7801_54xs-r0/pddf_support new file mode 100644 index 0000000000..e69de29bb2 diff --git a/device/ufispace/x86_64-ufispace_s7801_54xs-r0/platform.json b/device/ufispace/x86_64-ufispace_s7801_54xs-r0/platform.json new file mode 100644 index 0000000000..7800ce50dd --- /dev/null +++ b/device/ufispace/x86_64-ufispace_s7801_54xs-r0/platform.json @@ -0,0 +1,691 @@ +{ + "chassis": { + "name": "S7801-54XS", + "components": [ + { + "name": "CPLD1" + }, + { + "name": "CPLD2" + }, + { + "name": "BIOS" + }, + { + "name": "BMC" + } + ], + "fans": [ + { + "name": "Fan_1" + }, + { + "name": "Fan_2" + }, + { + "name": "Fan_3" + }, + { + "name": "Fan_4" + }, + { + "name": "Fan_5" + } + ], + "fan_drawers":[ + { + "name": "Fantray1", + "num_fans" : 1, + "fans": [ + { + "name": "Fan_1" + } + ] + }, + { + "name": "Fantray2", + "num_fans" : 1, + "fans": [ + { + "name": "Fan_2" + } + ] + }, + { + "name": "Fantray3", + "num_fans" : 1, + "fans": [ + { + "name": "Fan_3" + } + ] + }, + { + "name": "Fantray4", + "num_fans" : 1, + "fans": [ + { + "name": "Fan_4" + } + ] + }, + { + "name": "Fantray5", + "num_fans" : 1, + "fans": [ + { + "name": "Fan_5" + } + ] + } + ], + "psus": [ + { + "name": "PSU1", + "fans": [ + { + "name": "PSU1_FAN1" + } + ], + "thermals": [ + { + "name": "PSU1_TEMP1" + } + ] + }, + { + "name": "PSU2", + "fans": [ + { + "name": "PSU2_FAN1" + } + ], + "thermals": [ + { + "name": "PSU2_TEMP1" + } + ] + } + ], + "thermals": [ + { + "name": "TEMP_MAC" + }, + { + "name": "TEMP_ENV_MACCASE" + }, + { + "name": "TEMP_ENV_PSUCASE" + }, + { + "name": "TEMP_ENV_FANCONN" + }, + { + "name": "TEMP_ENV_FANCARD" + }, + { + "name": "TEMP_ENV_BMC" + }, + { + "name": "PSU-0-Thermal" + }, + { + "name": "PSU-1-Thermal" + } + ], + "sfps": [ + { + "name": "Ethernet0" + }, + { + "name": "Ethernet1" + }, + { + "name": "Ethernet2" + }, + { + "name": "Ethernet3" + }, + { + "name": "Ethernet4" + }, + { + "name": "Ethernet5" + }, + { + "name": "Ethernet6" + }, + { + "name": "Ethernet7" + }, + { + "name": "Ethernet8" + }, + { + "name": "Ethernet9" + }, + { + "name": "Ethernet10" + }, + { + "name": "Ethernet11" + }, + { + "name": "Ethernet12" + }, + { + "name": "Ethernet13" + }, + { + "name": "Ethernet14" + }, + { + "name": "Ethernet15" + }, + { + "name": "Ethernet16" + }, + { + "name": "Ethernet17" + }, + { + "name": "Ethernet18" + }, + { + "name": "Ethernet19" + }, + { + "name": "Ethernet20" + }, + { + "name": "Ethernet21" + }, + { + "name": "Ethernet22" + }, + { + "name": "Ethernet23" + }, + { + "name": "Ethernet24" + }, + { + "name": "Ethernet25" + }, + { + "name": "Ethernet26" + }, + { + "name": "Ethernet27" + }, + { + "name": "Ethernet28" + }, + { + "name": "Ethernet29" + }, + { + "name": "Ethernet30" + }, + { + "name": "Ethernet31" + }, + { + "name": "Ethernet32" + }, + { + "name": "Ethernet33" + }, + { + "name": "Ethernet34" + }, + { + "name": "Ethernet35" + }, + { + "name": "Ethernet36" + }, + { + "name": "Ethernet37" + }, + { + "name": "Ethernet38" + }, + { + "name": "Ethernet39" + }, + { + "name": "Ethernet40" + }, + { + "name": "Ethernet41" + }, + { + "name": "Ethernet42" + }, + { + "name": "Ethernet43" + }, + { + "name": "Ethernet44" + }, + { + "name": "Ethernet45" + }, + { + "name": "Ethernet46" + }, + { + "name": "Ethernet47" + }, + { + "name": "Ethernet48" + }, + { + "name": "Ethernet52" + }, + { + "name": "Ethernet56" + }, + { + "name": "Ethernet60" + }, + { + "name": "Ethernet64" + }, + { + "name": "Ethernet68" + }, + { + "name": "Ethernet72" + } + ] + }, + "interfaces": { + "Ethernet0": { + "index": "0", + "lanes": "1", + "breakout_modes": { + "1x10G" : [ "Eth0(Port0)" ] + } + }, + "Ethernet1": { + "index": "1", + "lanes": "2", + "breakout_modes": { + "1x10G" : [ "Eth1(Port1)" ] + } + }, + "Ethernet2": { + "index": "2", + "lanes": "3", + "breakout_modes": { + "1x10G" : [ "Eth2(Port2)" ] + } + }, + "Ethernet3": { + "index": "3", + "lanes": "4", + "breakout_modes": { + "1x10G" : [ "Eth3(Port3)" ] + } + }, + "Ethernet4": { + "index": "4", + "lanes": "5", + "breakout_modes": { + "1x10G" : [ "Eth4(Port4)" ] + } + }, + "Ethernet5": { + "index": "5", + "lanes": "6", + "breakout_modes": { + "1x10G" : [ "Eth5(Port5)" ] + } + }, + "Ethernet6": { + "index": "6", + "lanes": "7", + "breakout_modes": { + "1x10G" : [ "Eth6(Port6)" ] + } + }, + "Ethernet7": { + "index": "7", + "lanes": "8", + "breakout_modes": { + "1x10G" : [ "Eth7(Port7)" ] + } + }, + "Ethernet8": { + "index": "8", + "lanes": "9", + "breakout_modes": { + "1x10G" : [ "Eth8(Port8)" ] + } + }, + "Ethernet9": { + "index": "9", + "lanes": "10", + "breakout_modes": { + "1x10G" : [ "Eth9(Port9)" ] + } + }, + "Ethernet10": { + "index": "10", + "lanes": "11", + "breakout_modes": { + "1x10G" : [ "Eth10(Port10)" ] + } + }, + "Ethernet11": { + "index": "11", + "lanes": "12", + "breakout_modes": { + "1x10G" : [ "Eth11(Port11)" ] + } + }, + "Ethernet12": { + "index": "12", + "lanes": "13", + "breakout_modes": { + "1x10G" : [ "Eth12(Port12)" ] + } + }, + "Ethernet13": { + "index": "13", + "lanes": "14", + "breakout_modes": { + "1x10G" : [ "Eth13(Port13)" ] + } + }, + "Ethernet14": { + "index": "14", + "lanes": "15", + "breakout_modes": { + "1x10G" : [ "Eth14(Port14)" ] + } + }, + "Ethernet15": { + "index": "15", + "lanes": "16", + "breakout_modes": { + "1x10G" : [ "Eth15(Port15)" ] + } + }, + "Ethernet16": { + "index": "16", + "lanes": "17", + "breakout_modes": { + "1x10G" : [ "Eth16(Port16)" ] + } + }, + "Ethernet17": { + "index": "17", + "lanes": "18", + "breakout_modes": { + "1x10G" : [ "Eth17(Port17)" ] + } + }, + "Ethernet18": { + "index": "18", + "lanes": "19", + "breakout_modes": { + "1x10G" : [ "Eth18(Port18)" ] + } + }, + "Ethernet19": { + "index": "19", + "lanes": "20", + "breakout_modes": { + "1x10G" : [ "Eth19(Port19)" ] + } + }, + "Ethernet20": { + "index": "20", + "lanes": "21", + "breakout_modes": { + "1x10G" : [ "Eth20(Port20)" ] + } + }, + "Ethernet21": { + "index": "21", + "lanes": "22", + "breakout_modes": { + "1x10G" : [ "Eth21(Port21)" ] + } + }, + "Ethernet22": { + "index": "22", + "lanes": "23", + "breakout_modes": { + "1x10G" : [ "Eth22(Port22)" ] + } + }, + "Ethernet23": { + "index": "23", + "lanes": "24", + "breakout_modes": { + "1x10G" : [ "Eth23(Port23)" ] + } + }, + "Ethernet24": { + "index": "24", + "lanes": "25", + "breakout_modes": { + "1x10G" : [ "Eth24(Port24)" ] + } + }, + "Ethernet25": { + "index": "25", + "lanes": "26", + "breakout_modes": { + "1x10G" : [ "Eth25(Port25)" ] + } + }, + "Ethernet26": { + "index": "26", + "lanes": "27", + "breakout_modes": { + "1x10G" : [ "Eth26(Port26)" ] + } + }, + "Ethernet27": { + "index": "27", + "lanes": "28", + "breakout_modes": { + "1x10G" : [ "Eth27(Port27)" ] + } + }, + "Ethernet28": { + "index": "28", + "lanes": "41", + "breakout_modes": { + "1x10G" : [ "Eth28(Port28)" ] + } + }, + "Ethernet29": { + "index": "29", + "lanes": "42", + "breakout_modes": { + "1x10G" : [ "Eth29(Port29)" ] + } + }, + "Ethernet30": { + "index": "30", + "lanes": "43", + "breakout_modes": { + "1x10G" : [ "Eth30(Port30)" ] + } + }, + "Ethernet31": { + "index": "31", + "lanes": "44", + "breakout_modes": { + "1x10G" : [ "Eth31(Port31)" ] + } + }, + "Ethernet32": { + "index": "32", + "lanes": "61", + "breakout_modes": { + "1x10G" : [ "Eth32(Port32)" ] + } + }, + "Ethernet33": { + "index": "33", + "lanes": "62", + "breakout_modes": { + "1x10G" : [ "Eth33(Port33)" ] + } + }, + "Ethernet34": { + "index": "34", + "lanes": "63", + "breakout_modes": { + "1x10G" : [ "Eth34(Port34)" ] + } + }, + "Ethernet35": { + "index": "35", + "lanes": "64", + "breakout_modes": { + "1x10G" : [ "Eth35(Port35)" ] + } + }, + "Ethernet36": { + "index": "36", + "lanes": "65", + "breakout_modes": { + "1x10G" : [ "Eth36(Port36)" ] + } + }, + "Ethernet37": { + "index": "37", + "lanes": "66", + "breakout_modes": { + "1x10G" : [ "Eth37(Port37)" ] + } + }, + "Ethernet38": { + "index": "38", + "lanes": "67", + "breakout_modes": { + "1x10G" : [ "Eth38(Port38)" ] + } + }, + "Ethernet39": { + "index": "39", + "lanes": "68", + "breakout_modes": { + "1x10G" : [ "Eth39(Port39)" ] + } + }, + "Ethernet40": { + "index": "40", + "lanes": "69", + "breakout_modes": { + "1x10G" : [ "Eth40(Port40)" ] + } + }, + "Ethernet41": { + "index": "41", + "lanes": "70", + "breakout_modes": { + "1x10G" : [ "Eth41(Port41)" ] + } + }, + "Ethernet42": { + "index": "42", + "lanes": "71", + "breakout_modes": { + "1x10G" : [ "Eth42(Port42)" ] + } + }, + "Ethernet43": { + "index": "43", + "lanes": "72", + "breakout_modes": { + "1x10G" : [ "Eth43(Port43)" ] + } + }, + "Ethernet44": { + "index": "44", + "lanes": "73", + "breakout_modes": { + "1x10G" : [ "Eth44(Port44)" ] + } + }, + "Ethernet45": { + "index": "45", + "lanes": "74", + "breakout_modes": { + "1x10G" : [ "Eth45(Port45)" ] + } + }, + "Ethernet46": { + "index": "46", + "lanes": "75", + "breakout_modes": { + "1x10G" : [ "Eth46(Port46)" ] + } + }, + "Ethernet47": { + "index": "47", + "lanes": "76", + "breakout_modes": { + "1x10G" : [ "Eth47(Port47)" ] + } + }, + "Ethernet48": { + "index": "48,48,48,48", + "lanes": "37,38,39,40", + "breakout_modes": { + "1x100G[40G]" : [ "Eth48(Port48)" ] + } + }, + "Ethernet52": { + "index": "49,49,49,49", + "lanes": "33,34,35,36", + "breakout_modes": { + "1x100G[40G]" : [ "Eth49(Port49)" ] + } + }, + "Ethernet56": { + "index": "50,50,50,50", + "lanes": "45,46,47,48", + "breakout_modes": { + "1x100G[40G]" : [ "Eth50(Port50)" ] + } + }, + "Ethernet60": { + "index": "51,51,51,51", + "lanes": "49,50,51,52", + "breakout_modes": { + "1x100G[40G]" : [ "Eth51(Port51)" ] + } + }, + "Ethernet64": { + "index": "52,52,52,52", + "lanes": "53,54,55,56", + "breakout_modes": { + "1x100G[40G]": ["Eth52(Port52)"], + "2x50G": ["Eth52/1(Port52)", "Eth52/2(Port52)"], + "4x25G": ["Eth52/1(Port52)", "Eth52/2(Port52)", "Eth52/3(Port52)", "Eth52/4(Port52)"], + "4x10G": ["Eth52/1(Port52)", "Eth52/2(Port52)", "Eth52/3(Port52)", "Eth52/4(Port52)"] + } + }, + "Ethernet68": { + "index": "53,53,53,53", + "lanes": "57,58,59,60", + "breakout_modes": { + "1x100G[40G]": ["Eth53(Port53)"], + "2x50G": ["Eth53/1(Port53)", "Eth53/2(Port53)"], + "4x25G": ["Eth53/1(Port53)", "Eth53/2(Port53)", "Eth53/3(Port53)", "Eth53/4(Port53)"], + "4x10G": ["Eth53/1(Port53)", "Eth53/2(Port53)", "Eth53/3(Port53)", "Eth53/4(Port53)"] + } + } + } +} + diff --git a/device/ufispace/x86_64-ufispace_s7801_54xs-r0/platform_asic b/device/ufispace/x86_64-ufispace_s7801_54xs-r0/platform_asic new file mode 100644 index 0000000000..9604676527 --- /dev/null +++ b/device/ufispace/x86_64-ufispace_s7801_54xs-r0/platform_asic @@ -0,0 +1 @@ +broadcom diff --git a/device/ufispace/x86_64-ufispace_s7801_54xs-r0/platform_components.json b/device/ufispace/x86_64-ufispace_s7801_54xs-r0/platform_components.json new file mode 100644 index 0000000000..5ab2d23557 --- /dev/null +++ b/device/ufispace/x86_64-ufispace_s7801_54xs-r0/platform_components.json @@ -0,0 +1,12 @@ +{ + "chassis": { + "x86_64-ufispace_s7801_54xs-r0": { + "component": { + "CPLD1": { }, + "CPLD2": { }, + "BIOS": { }, + "BMC": {} + } + } + } +} diff --git a/device/ufispace/x86_64-ufispace_s7801_54xs-r0/platform_env.conf b/device/ufispace/x86_64-ufispace_s7801_54xs-r0/platform_env.conf new file mode 100644 index 0000000000..77fd88ac36 --- /dev/null +++ b/device/ufispace/x86_64-ufispace_s7801_54xs-r0/platform_env.conf @@ -0,0 +1 @@ +SYNCD_SHM_SIZE=256m diff --git a/device/ufispace/x86_64-ufispace_s7801_54xs-r0/pmon_daemon_control.json b/device/ufispace/x86_64-ufispace_s7801_54xs-r0/pmon_daemon_control.json new file mode 100644 index 0000000000..e348e0168f --- /dev/null +++ b/device/ufispace/x86_64-ufispace_s7801_54xs-r0/pmon_daemon_control.json @@ -0,0 +1,9 @@ +{ + "skip_pcied": false, + "skip_fancontrol": false, + "skip_thermalctld": false, + "skip_ledd": true, + "skip_xcvrd": false, + "skip_psud": false, + "skip_syseepromd": false +} diff --git a/device/ufispace/x86_64-ufispace_s7801_54xs-r0/system_health_monitoring_config.json b/device/ufispace/x86_64-ufispace_s7801_54xs-r0/system_health_monitoring_config.json new file mode 100644 index 0000000000..467d81304d --- /dev/null +++ b/device/ufispace/x86_64-ufispace_s7801_54xs-r0/system_health_monitoring_config.json @@ -0,0 +1,15 @@ +{ + "services_to_ignore": [], + "devices_to_ignore": [ + "asic", + "psu", + "fan" + ], + "user_defined_checkers": [], + "polling_interval": 60, + "led_color": { + "fault": "yellow", + "normal": "green", + "booting": "green_blink" + } +} diff --git a/device/ufispace/x86_64-ufispace_s8901_54xc-r0/UFISPACE-S8901-54XC/hwsku.json b/device/ufispace/x86_64-ufispace_s8901_54xc-r0/UFISPACE-S8901-54XC/hwsku.json new file mode 100644 index 0000000000..041ad2b5df --- /dev/null +++ b/device/ufispace/x86_64-ufispace_s8901_54xc-r0/UFISPACE-S8901-54XC/hwsku.json @@ -0,0 +1,166 @@ +{ + "interfaces": { + "Ethernet0": { + "default_brkout_mode": "1x25G[10G]" + }, + "Ethernet1": { + "default_brkout_mode": "1x25G[10G]" + }, + "Ethernet2": { + "default_brkout_mode": "1x25G[10G]" + }, + "Ethernet3": { + "default_brkout_mode": "1x25G[10G]" + }, + "Ethernet4": { + "default_brkout_mode": "1x25G[10G]" + }, + "Ethernet5": { + "default_brkout_mode": "1x25G[10G]" + }, + "Ethernet6": { + "default_brkout_mode": "1x25G[10G]" + }, + "Ethernet7": { + "default_brkout_mode": "1x25G[10G]" + }, + "Ethernet8": { + "default_brkout_mode": "1x25G[10G]" + }, + "Ethernet9": { + "default_brkout_mode": "1x25G[10G]" + }, + "Ethernet10": { + "default_brkout_mode": "1x25G[10G]" + }, + "Ethernet11": { + "default_brkout_mode": "1x25G[10G]" + }, + "Ethernet12": { + "default_brkout_mode": "1x25G[10G]" + }, + "Ethernet13": { + "default_brkout_mode": "1x25G[10G]" + }, + "Ethernet14": { + "default_brkout_mode": "1x25G[10G]" + }, + "Ethernet15": { + "default_brkout_mode": "1x25G[10G]" + }, + "Ethernet16": { + "default_brkout_mode": "1x25G[10G]" + }, + "Ethernet17": { + "default_brkout_mode": "1x25G[10G]" + }, + "Ethernet18": { + "default_brkout_mode": "1x25G[10G]" + }, + "Ethernet19": { + "default_brkout_mode": "1x25G[10G]" + }, + "Ethernet20": { + "default_brkout_mode": "1x25G[10G]" + }, + "Ethernet21": { + "default_brkout_mode": "1x25G[10G]" + }, + "Ethernet22": { + "default_brkout_mode": "1x25G[10G]" + }, + "Ethernet23": { + "default_brkout_mode": "1x25G[10G]" + }, + "Ethernet24": { + "default_brkout_mode": "1x25G[10G]" + }, + "Ethernet25": { + "default_brkout_mode": "1x25G[10G]" + }, + "Ethernet26": { + "default_brkout_mode": "1x25G[10G]" + }, + "Ethernet27": { + "default_brkout_mode": "1x25G[10G]" + }, + "Ethernet28": { + "default_brkout_mode": "1x25G[10G]" + }, + "Ethernet29": { + "default_brkout_mode": "1x25G[10G]" + }, + "Ethernet30": { + "default_brkout_mode": "1x25G[10G]" + }, + "Ethernet31": { + "default_brkout_mode": "1x25G[10G]" + }, + "Ethernet32": { + "default_brkout_mode": "1x25G[10G]" + }, + "Ethernet33": { + "default_brkout_mode": "1x25G[10G]" + }, + "Ethernet34": { + "default_brkout_mode": "1x25G[10G]" + }, + "Ethernet35": { + "default_brkout_mode": "1x25G[10G]" + }, + "Ethernet36": { + "default_brkout_mode": "1x25G[10G]" + }, + "Ethernet37": { + "default_brkout_mode": "1x25G[10G]" + }, + "Ethernet38": { + "default_brkout_mode": "1x25G[10G]" + }, + "Ethernet39": { + "default_brkout_mode": "1x25G[10G]" + }, + "Ethernet40": { + "default_brkout_mode": "1x25G[10G]" + }, + "Ethernet41": { + "default_brkout_mode": "1x25G[10G]" + }, + "Ethernet42": { + "default_brkout_mode": "1x25G[10G]" + }, + "Ethernet43": { + "default_brkout_mode": "1x25G[10G]" + }, + "Ethernet44": { + "default_brkout_mode": "1x25G[10G]" + }, + "Ethernet45": { + "default_brkout_mode": "1x25G[10G]" + }, + "Ethernet46": { + "default_brkout_mode": "1x25G[10G]" + }, + "Ethernet47": { + "default_brkout_mode": "1x25G[10G]" + }, + "Ethernet48": { + "default_brkout_mode": "1x100G[40G]" + }, + "Ethernet52": { + "default_brkout_mode": "1x100G[40G]" + }, + "Ethernet56": { + "default_brkout_mode": "1x100G[40G]" + }, + "Ethernet60": { + "default_brkout_mode": "1x100G[40G]" + }, + "Ethernet64": { + "default_brkout_mode": "1x100G[40G]" + }, + "Ethernet68": { + "default_brkout_mode": "1x100G[40G]" + } + } +} diff --git a/device/ufispace/x86_64-ufispace_s8901_54xc-r0/UFISPACE-S8901-54XC/sai.profile b/device/ufispace/x86_64-ufispace_s8901_54xc-r0/UFISPACE-S8901-54XC/sai.profile new file mode 100644 index 0000000000..39a5f795f1 --- /dev/null +++ b/device/ufispace/x86_64-ufispace_s8901_54xc-r0/UFISPACE-S8901-54XC/sai.profile @@ -0,0 +1 @@ +SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/td3-x5-s8901-54xc.config.bcm \ No newline at end of file diff --git a/device/ufispace/x86_64-ufispace_s8901_54xc-r0/UFISPACE-S8901-54XC/td3-x5-s8901-54xc.config.bcm b/device/ufispace/x86_64-ufispace_s8901_54xc-r0/UFISPACE-S8901-54XC/td3-x5-s8901-54xc.config.bcm new file mode 100644 index 0000000000..37d9d8ec80 --- /dev/null +++ b/device/ufispace/x86_64-ufispace_s8901_54xc-r0/UFISPACE-S8901-54XC/td3-x5-s8901-54xc.config.bcm @@ -0,0 +1,502 @@ +# cfg version: r2, 20230515 + +pbmp_xport_xe=0x7fffffffffffffffdfffffffffffffffe + + +#FC 0 +phy_chain_tx_polarity_flip_physical{1}=0x0 +phy_chain_tx_polarity_flip_physical{2}=0x0 +phy_chain_tx_polarity_flip_physical{3}=0x0 +phy_chain_tx_polarity_flip_physical{4}=0x0 + +phy_chain_rx_polarity_flip_physical{1}=0x0 +phy_chain_rx_polarity_flip_physical{2}=0x0 +phy_chain_rx_polarity_flip_physical{3}=0x0 +phy_chain_rx_polarity_flip_physical{4}=0x0 + +phy_chain_tx_lane_map_physical{1.0}=0x0123 +phy_chain_rx_lane_map_physical{1.0}=0x0123 + +#FC 1 +phy_chain_tx_polarity_flip_physical{5}=0x0 +phy_chain_tx_polarity_flip_physical{6}=0x0 +phy_chain_tx_polarity_flip_physical{7}=0x0 +phy_chain_tx_polarity_flip_physical{8}=0x0 + +phy_chain_rx_polarity_flip_physical{5}=0x1 +phy_chain_rx_polarity_flip_physical{6}=0x1 +phy_chain_rx_polarity_flip_physical{7}=0x1 +phy_chain_rx_polarity_flip_physical{8}=0x1 + +phy_chain_tx_lane_map_physical{5.0}=0x0123 +phy_chain_rx_lane_map_physical{5.0}=0x0123 + +#FC 2 +phy_chain_tx_polarity_flip_physical{9}=0x0 +phy_chain_tx_polarity_flip_physical{10}=0x0 +phy_chain_tx_polarity_flip_physical{11}=0x0 +phy_chain_tx_polarity_flip_physical{12}=0x0 + +phy_chain_rx_polarity_flip_physical{9}=0x1 +phy_chain_rx_polarity_flip_physical{10}=0x1 +phy_chain_rx_polarity_flip_physical{11}=0x1 +phy_chain_rx_polarity_flip_physical{12}=0x1 + +phy_chain_tx_lane_map_physical{9.0}=0x0123 +phy_chain_rx_lane_map_physical{9.0}=0x0123 + +#FC 3 +phy_chain_tx_polarity_flip_physical{13}=0x0 +phy_chain_tx_polarity_flip_physical{14}=0x0 +phy_chain_tx_polarity_flip_physical{15}=0x0 +phy_chain_tx_polarity_flip_physical{16}=0x0 + +phy_chain_rx_polarity_flip_physical{13}=0x1 +phy_chain_rx_polarity_flip_physical{14}=0x1 +phy_chain_rx_polarity_flip_physical{15}=0x1 +phy_chain_rx_polarity_flip_physical{16}=0x1 + +phy_chain_tx_lane_map_physical{13.0}=0x0123 +phy_chain_rx_lane_map_physical{13.0}=0x0123 + +#FC 4 +phy_chain_tx_polarity_flip_physical{17}=0x0 +phy_chain_tx_polarity_flip_physical{18}=0x0 +phy_chain_tx_polarity_flip_physical{19}=0x0 +phy_chain_tx_polarity_flip_physical{20}=0x0 + +phy_chain_rx_polarity_flip_physical{17}=0x0 +phy_chain_rx_polarity_flip_physical{18}=0x0 +phy_chain_rx_polarity_flip_physical{19}=0x0 +phy_chain_rx_polarity_flip_physical{20}=0x0 + +phy_chain_tx_lane_map_physical{17.0}=0x0123 +phy_chain_rx_lane_map_physical{17.0}=0x0123 + +#FC 5 +phy_chain_tx_polarity_flip_physical{21}=0x0 +phy_chain_tx_polarity_flip_physical{22}=0x0 +phy_chain_tx_polarity_flip_physical{23}=0x0 +phy_chain_tx_polarity_flip_physical{24}=0x0 + +phy_chain_rx_polarity_flip_physical{21}=0x1 +phy_chain_rx_polarity_flip_physical{22}=0x1 +phy_chain_rx_polarity_flip_physical{23}=0x1 +phy_chain_rx_polarity_flip_physical{24}=0x1 + +phy_chain_tx_lane_map_physical{21.0}=0x0123 +phy_chain_rx_lane_map_physical{21.0}=0x0123 + +#FC 6 +phy_chain_tx_polarity_flip_physical{25}=0x0 +phy_chain_tx_polarity_flip_physical{26}=0x0 +phy_chain_tx_polarity_flip_physical{27}=0x0 +phy_chain_tx_polarity_flip_physical{28}=0x0 + +phy_chain_rx_polarity_flip_physical{25}=0x1 +phy_chain_rx_polarity_flip_physical{26}=0x1 +phy_chain_rx_polarity_flip_physical{27}=0x1 +phy_chain_rx_polarity_flip_physical{28}=0x1 + +phy_chain_tx_lane_map_physical{25.0}=0x0123 +phy_chain_rx_lane_map_physical{25.0}=0x0123 + +#FC 7 not use +phy_chain_tx_polarity_flip_physical{29}=0x0 +phy_chain_tx_polarity_flip_physical{30}=0x0 +phy_chain_tx_polarity_flip_physical{31}=0x0 +phy_chain_tx_polarity_flip_physical{32}=0x0 + +phy_chain_rx_polarity_flip_physical{29}=0x0 +phy_chain_rx_polarity_flip_physical{30}=0x0 +phy_chain_rx_polarity_flip_physical{31}=0x0 +phy_chain_rx_polarity_flip_physical{32}=0x0 + +phy_chain_tx_lane_map_physical{29.0}=0x0123 +phy_chain_rx_lane_map_physical{29.0}=0x0123 + +#FC 8 +phy_chain_tx_polarity_flip_physical{33}=0x1 +phy_chain_tx_polarity_flip_physical{34}=0x0 +phy_chain_tx_polarity_flip_physical{35}=0x1 +phy_chain_tx_polarity_flip_physical{36}=0x1 + +phy_chain_rx_polarity_flip_physical{33}=0x0 +phy_chain_rx_polarity_flip_physical{34}=0x0 +phy_chain_rx_polarity_flip_physical{35}=0x1 +phy_chain_rx_polarity_flip_physical{36}=0x0 + +phy_chain_tx_lane_map_physical{33.0}=0x3120 +phy_chain_rx_lane_map_physical{33.0}=0x0213 + +#FC 9 +phy_chain_tx_polarity_flip_physical{37}=0x0 +phy_chain_tx_polarity_flip_physical{38}=0x0 +phy_chain_tx_polarity_flip_physical{39}=0x1 +phy_chain_tx_polarity_flip_physical{40}=0x1 + +phy_chain_rx_polarity_flip_physical{37}=0x1 +phy_chain_rx_polarity_flip_physical{38}=0x1 +phy_chain_rx_polarity_flip_physical{39}=0x0 +phy_chain_rx_polarity_flip_physical{40}=0x0 + +phy_chain_tx_lane_map_physical{37.0}=0x2031 +phy_chain_rx_lane_map_physical{37.0}=0x1302 + +#FC 10 +phy_chain_tx_polarity_flip_physical{41}=0x0 +phy_chain_tx_polarity_flip_physical{42}=0x0 +phy_chain_tx_polarity_flip_physical{43}=0x0 +phy_chain_tx_polarity_flip_physical{44}=0x0 + +phy_chain_rx_polarity_flip_physical{41}=0x1 +phy_chain_rx_polarity_flip_physical{42}=0x1 +phy_chain_rx_polarity_flip_physical{43}=0x1 +phy_chain_rx_polarity_flip_physical{44}=0x1 + +phy_chain_tx_lane_map_physical{41.0}=0x3210 +phy_chain_rx_lane_map_physical{41.0}=0x0123 + +#FC 11 +phy_chain_tx_polarity_flip_physical{45}=0x0 +phy_chain_tx_polarity_flip_physical{46}=0x0 +phy_chain_tx_polarity_flip_physical{47}=0x1 +phy_chain_tx_polarity_flip_physical{48}=0x1 + +phy_chain_rx_polarity_flip_physical{45}=0x0 +phy_chain_rx_polarity_flip_physical{46}=0x0 +phy_chain_rx_polarity_flip_physical{47}=0x0 +phy_chain_rx_polarity_flip_physical{48}=0x1 + +phy_chain_tx_lane_map_physical{45.0}=0x3120 +phy_chain_rx_lane_map_physical{45.0}=0x2130 + +#FC 12 +phy_chain_tx_polarity_flip_physical{49}=0x1 +phy_chain_tx_polarity_flip_physical{50}=0x0 +phy_chain_tx_polarity_flip_physical{51}=0x0 +phy_chain_tx_polarity_flip_physical{52}=0x1 + +phy_chain_rx_polarity_flip_physical{49}=0x0 +phy_chain_rx_polarity_flip_physical{50}=0x1 +phy_chain_rx_polarity_flip_physical{51}=0x1 +phy_chain_rx_polarity_flip_physical{52}=0x0 + +phy_chain_tx_lane_map_physical{49.0}=0x3201 +phy_chain_rx_lane_map_physical{49.0}=0x1023 + +#FC 13 +phy_chain_tx_polarity_flip_physical{53}=0x0 +phy_chain_tx_polarity_flip_physical{54}=0x0 +phy_chain_tx_polarity_flip_physical{55}=0x1 +phy_chain_tx_polarity_flip_physical{56}=0x1 + +phy_chain_rx_polarity_flip_physical{53}=0x0 +phy_chain_rx_polarity_flip_physical{54}=0x0 +phy_chain_rx_polarity_flip_physical{55}=0x0 +phy_chain_rx_polarity_flip_physical{56}=0x1 + +phy_chain_tx_lane_map_physical{53.0}=0x3120 +phy_chain_rx_lane_map_physical{53.0}=0x2130 + +#FC 14 +phy_chain_tx_polarity_flip_physical{57}=0x1 +phy_chain_tx_polarity_flip_physical{58}=0x0 +phy_chain_tx_polarity_flip_physical{59}=0x0 +phy_chain_tx_polarity_flip_physical{60}=0x1 + +phy_chain_rx_polarity_flip_physical{57}=0x0 +phy_chain_rx_polarity_flip_physical{58}=0x1 +phy_chain_rx_polarity_flip_physical{59}=0x1 +phy_chain_rx_polarity_flip_physical{60}=0x0 + +phy_chain_tx_lane_map_physical{57.0}=0x3201 +phy_chain_rx_lane_map_physical{57.0}=0x1023 + +#FC 15 +phy_chain_tx_polarity_flip_physical{61}=0x0 +phy_chain_tx_polarity_flip_physical{62}=0x0 +phy_chain_tx_polarity_flip_physical{63}=0x0 +phy_chain_tx_polarity_flip_physical{64}=0x0 + +phy_chain_rx_polarity_flip_physical{61}=0x0 +phy_chain_rx_polarity_flip_physical{62}=0x0 +phy_chain_rx_polarity_flip_physical{63}=0x0 +phy_chain_rx_polarity_flip_physical{64}=0x0 + +phy_chain_tx_lane_map_physical{61.0}=0x3210 +phy_chain_rx_lane_map_physical{61.0}=0x3210 + +#FC 16 +phy_chain_tx_polarity_flip_physical{65}=0x0 +phy_chain_tx_polarity_flip_physical{66}=0x0 +phy_chain_tx_polarity_flip_physical{67}=0x0 +phy_chain_tx_polarity_flip_physical{68}=0x0 + +phy_chain_rx_polarity_flip_physical{65}=0x1 +phy_chain_rx_polarity_flip_physical{66}=0x1 +phy_chain_rx_polarity_flip_physical{67}=0x1 +phy_chain_rx_polarity_flip_physical{68}=0x1 + +phy_chain_tx_lane_map_physical{65.0}=0x3210 +phy_chain_rx_lane_map_physical{65.0}=0x3210 + +#FC 17 +phy_chain_tx_polarity_flip_physical{69}=0x0 +phy_chain_tx_polarity_flip_physical{70}=0x0 +phy_chain_tx_polarity_flip_physical{71}=0x0 +phy_chain_tx_polarity_flip_physical{72}=0x0 + +phy_chain_rx_polarity_flip_physical{69}=0x1 +phy_chain_rx_polarity_flip_physical{70}=0x1 +phy_chain_rx_polarity_flip_physical{71}=0x1 +phy_chain_rx_polarity_flip_physical{72}=0x1 + +phy_chain_tx_lane_map_physical{69.0}=0x3210 +phy_chain_rx_lane_map_physical{69.0}=0x3210 + +#FC 18 +phy_chain_tx_polarity_flip_physical{73}=0x0 +phy_chain_tx_polarity_flip_physical{74}=0x0 +phy_chain_tx_polarity_flip_physical{75}=0x0 +phy_chain_tx_polarity_flip_physical{76}=0x0 + +phy_chain_rx_polarity_flip_physical{73}=0x1 +phy_chain_rx_polarity_flip_physical{74}=0x1 +phy_chain_rx_polarity_flip_physical{75}=0x1 +phy_chain_rx_polarity_flip_physical{76}=0x1 + +phy_chain_tx_lane_map_physical{73.0}=0x3210 +phy_chain_rx_lane_map_physical{73.0}=0x3210 + +#FC 19 not use +phy_chain_tx_polarity_flip_physical{77}=0x0 +phy_chain_tx_polarity_flip_physical{78}=0x0 +phy_chain_tx_polarity_flip_physical{79}=0x0 +phy_chain_tx_polarity_flip_physical{80}=0x0 + +phy_chain_rx_polarity_flip_physical{77}=0x0 +phy_chain_rx_polarity_flip_physical{78}=0x0 +phy_chain_rx_polarity_flip_physical{79}=0x0 +phy_chain_rx_polarity_flip_physical{80}=0x0 + +phy_chain_tx_lane_map_physical{77.0}=0x3210 +phy_chain_rx_lane_map_physical{77.0}=0x3210 + + +#FC0 sfp28 port 0-3 +portmap_1=1:25 +portmap_2=2:25 +portmap_3=3:25 +portmap_4=4:25 + +#FC1 sfp28 port 4-7 +portmap_5=5:25 +portmap_6=6:25 +portmap_7=7:25 +portmap_8=8:25 + +#FC2 sfp28 port 8-11 +portmap_9=9:25 +portmap_10=10:25 +portmap_11=11:25 +portmap_12=12:25 + +#FC3 sfp28 port 12-15 +portmap_13=13:25 +portmap_14=14:25 +portmap_15=15:25 +portmap_16=16:25 + +#FC4 sfp28 port 16-19 +portmap_17=17:25 +portmap_18=18:25 +portmap_19=19:25 +portmap_20=20:25 + +#FC5 sfp28 port 20-23 +portmap_21=21:25 +portmap_22=22:25 +portmap_23=23:25 +portmap_24=24:25 + +#FC6 sfp28 port 24-27 +portmap_25=25:25 +portmap_26=26:25 +portmap_27=27:25 +portmap_28=28:25 + +#FC7 not use + +#FC10 sfp28 port 28-31 +portmap_33=41:25 +portmap_34=42:25 +portmap_35=43:25 +portmap_36=44:25 + +#FC15 sfp28 port 32-35 +portmap_37=61:25 +portmap_38=62:25 +portmap_39=63:25 +portmap_40=64:25 + +#FC16 sfp28 port 36-39 +portmap_41=65:25 +portmap_42=66:25 +portmap_43=67:25 +portmap_44=68:25 + +#FC17 sfp28 port 40-43 +portmap_45=69:25 +portmap_46=70:25 +portmap_47=71:25 +portmap_48=72:25 + +#FC18 sfp28 port 44-47 +portmap_49=73:25 +portmap_50=74:25 +portmap_51=75:25 +portmap_52=76:25 + +#FC9 qsfp port 48 +portmap_29=37:100 + +#FC8 qsfp port 49 +portmap_30=33:100 + +#FC11 qsfp port 50 +portmap_53=45:100 + +#FC12 qsfp port 51 +portmap_54=49:100 + +#FC13 qsfp port 52 +portmap_55=53:100 + +#FC14 qsfp port 53 +portmap_59=57:100 + +#FC19 not use + +# dport +dport_map_enable=1 + +dport_map_port_1=1 +dport_map_port_2=2 +dport_map_port_3=3 +dport_map_port_4=4 +dport_map_port_5=5 +dport_map_port_6=6 +dport_map_port_7=7 +dport_map_port_8=8 +dport_map_port_9=9 +dport_map_port_10=10 +dport_map_port_11=11 +dport_map_port_12=12 +dport_map_port_13=13 +dport_map_port_14=14 +dport_map_port_15=15 +dport_map_port_16=16 +dport_map_port_17=17 +dport_map_port_18=18 +dport_map_port_19=19 +dport_map_port_20=20 +dport_map_port_21=21 +dport_map_port_22=22 +dport_map_port_23=23 +dport_map_port_24=24 +dport_map_port_25=25 +dport_map_port_26=26 +dport_map_port_27=27 +dport_map_port_28=28 +dport_map_port_33=29 +dport_map_port_34=30 +dport_map_port_35=31 +dport_map_port_36=32 +dport_map_port_37=33 +dport_map_port_38=34 +dport_map_port_39=35 +dport_map_port_40=36 +dport_map_port_41=37 +dport_map_port_42=38 +dport_map_port_43=39 +dport_map_port_44=40 +dport_map_port_45=41 +dport_map_port_46=42 +dport_map_port_47=43 +dport_map_port_48=44 +dport_map_port_49=45 +dport_map_port_50=46 +dport_map_port_51=47 +dport_map_port_52=48 +dport_map_port_29=49 +dport_map_port_30=50 +dport_map_port_53=51 +dport_map_port_54=52 +dport_map_port_55=53 +dport_map_port_59=54 + +# cfg for timing +ptp_bs_fref_0=50000000 +ptp_bs_fref_1=50000000 + +port_flex_enable=1 +oversubscribe_mode=1 +core_clock_frequency=1525 + +#25G,10G and 1G support +serdes_10g_at_25g_vco=1 +serdes_1000x_at_25g_vco=1 + +l2xmsg_mode=1 +l2xmsg_hostbuf_size=16384 +module_64ports=0 + +#Interrupts and Parity +max_vp_lags=0 +schan_intr_enable=0 +tdma_timeout_usec=5000000 +stable_size=0x5500000 + +#Default L3 profile +l2_mem_entries=40960 +l3_alpm_enable=2 +l3_alpm_ipv6_128b_bkt_rsvd=1 +l3_mem_entries=40960 + +#Tunnels +use_all_splithorizon_groups=1 +sai_tunnel_support=1 +bcm_tunnel_term_compatible_mode=1 + +#RIOT Enable +riot_enable=1 +riot_overlay_l3_intf_mem_size=8192 +riot_overlay_l3_egress_mem_size=32768 +l3_ecmp_levels=2 +riot_overlay_ecmp_resilient_hash_size=16384 +pfc_deadlock_seq_control=1 + +mem_cache_enable=0 +ifp_inports_support_enable=1 +ipv6_lpm_128b_enable=0x1 +l3_max_ecmp_mode=1 +lpm_scaling_enable=0 +bcm_num_cos=10 +default_cpu_tx_queue=9 +mmu_lossless=0 +host_as_route_disable=1 +sai_fast_convergence_support=1 +flow_init_mode=1 +sai_interface_type_auto_detect=0 +mpls_mem_entries=16384 +vlan_xlate_1_mem_entries=65536 +vlan_xlate_2_mem_entries=16384 +sai_nbr_bcast_ifp_optimized=1 +sai_brcm_sonic_acl_enhancements=1 + +# Reduced Trap Group QSET for BRCM Sonic +sai_brcm_sonic_trap_group=1 +l2_entry_used_as_my_station=1 +multi_hash_recurse_depth_l3=2 + diff --git a/device/ufispace/x86_64-ufispace_s8901_54xc-r0/custom_led.bin b/device/ufispace/x86_64-ufispace_s8901_54xc-r0/custom_led.bin new file mode 100644 index 0000000000..af49a6baba Binary files /dev/null and b/device/ufispace/x86_64-ufispace_s8901_54xc-r0/custom_led.bin differ diff --git a/device/ufispace/x86_64-ufispace_s8901_54xc-r0/default_sku b/device/ufispace/x86_64-ufispace_s8901_54xc-r0/default_sku new file mode 100644 index 0000000000..c4420766f9 --- /dev/null +++ b/device/ufispace/x86_64-ufispace_s8901_54xc-r0/default_sku @@ -0,0 +1 @@ +UFISPACE-S8901-54XC t1 diff --git a/device/ufispace/x86_64-ufispace_s8901_54xc-r0/fancontrol b/device/ufispace/x86_64-ufispace_s8901_54xc-r0/fancontrol new file mode 100644 index 0000000000..1234cd994f --- /dev/null +++ b/device/ufispace/x86_64-ufispace_s8901_54xc-r0/fancontrol @@ -0,0 +1,10 @@ +# Configuration file generated by pwmconfig, changes will be lost +INTERVAL=10 +DEVPATH= +DEVNAME= +FCTEMPS= +FCFANS= +MINTEMP= +MAXTEMP= +MINSTART= +MINSTOP= diff --git a/device/ufispace/x86_64-ufispace_s8901_54xc-r0/installer.conf b/device/ufispace/x86_64-ufispace_s8901_54xc-r0/installer.conf new file mode 100644 index 0000000000..c64a3ca8fc --- /dev/null +++ b/device/ufispace/x86_64-ufispace_s8901_54xc-r0/installer.conf @@ -0,0 +1,4 @@ +CONSOLE_PORT=0x3f8 +CONSOLE_DEV=0 +CONSOLE_SPEED=115200 +ONIE_PLATFORM_EXTRA_CMDLINE_LINUX="modprobe.blacklist=gpio_ich,qat_c3xxx nomodeset pcie_aspm=off" \ No newline at end of file diff --git a/device/ufispace/x86_64-ufispace_s8901_54xc-r0/led_proc_init.soc b/device/ufispace/x86_64-ufispace_s8901_54xc-r0/led_proc_init.soc new file mode 100644 index 0000000000..57ee7fedaf --- /dev/null +++ b/device/ufispace/x86_64-ufispace_s8901_54xc-r0/led_proc_init.soc @@ -0,0 +1,3 @@ +m0 load 0 0x3800 /usr/share/sonic/platform/custom_led.bin +led auto on +led start diff --git a/device/ufispace/x86_64-ufispace_s8901_54xc-r0/pcie.yaml b/device/ufispace/x86_64-ufispace_s8901_54xc-r0/pcie.yaml new file mode 100644 index 0000000000..341b683682 --- /dev/null +++ b/device/ufispace/x86_64-ufispace_s8901_54xc-r0/pcie.yaml @@ -0,0 +1,172 @@ +- bus: '00' + dev: '00' + fn: '0' + id: '1980' + name: 'Host bridge: Intel Corporation Atom Processor C3000 Series System Agent (rev + 11)' +- bus: '00' + dev: '04' + fn: '0' + id: 19a1 + name: 'Host bridge: Intel Corporation Atom Processor C3000 Series Error Registers + (rev 11)' +- bus: '00' + dev: '05' + fn: '0' + id: 19a2 + name: 'Generic system peripheral [0807]: Intel Corporation Atom Processor C3000 + Series Root Complex Event Collector (rev 11)' +- bus: '00' + dev: '06' + fn: '0' + id: 19a3 + name: 'PCI bridge: Intel Corporation Atom Processor C3000 Series Integrated QAT + Root Port (rev 11)' +- bus: '00' + dev: 09 + fn: '0' + id: 19a4 + name: 'PCI bridge: Intel Corporation Atom Processor C3000 Series PCI Express Root + Port #0 (rev 11)' +- bus: '00' + dev: 0a + fn: '0' + id: 19a5 + name: 'PCI bridge: Intel Corporation Atom Processor C3000 Series PCI Express Root + Port #1 (rev 11)' +- bus: '00' + dev: 0b + fn: '0' + id: 19a6 + name: 'PCI bridge: Intel Corporation Atom Processor C3000 Series PCI Express Root + Port #2 (rev 11)' +- bus: '00' + dev: 0e + fn: '0' + id: 19a8 + name: 'PCI bridge: Intel Corporation Atom Processor C3000 Series PCI Express Root + Port #4 (rev 11)' +- bus: '00' + dev: 0f + fn: '0' + id: 19a9 + name: 'PCI bridge: Intel Corporation Atom Processor C3000 Series PCI Express Root + Port #5 (rev 11)' +- bus: '00' + dev: '10' + fn: '0' + id: 19aa + name: 'PCI bridge: Intel Corporation Atom Processor C3000 Series PCI Express Root + Port #6 (rev 11)' +- bus: '00' + dev: '11' + fn: '0' + id: 19ab + name: 'PCI bridge: Intel Corporation Atom Processor C3000 Series PCI Express Root + Port #7 (rev 11)' +- bus: '00' + dev: '12' + fn: '0' + id: 19ac + name: 'System peripheral: Intel Corporation Atom Processor C3000 Series SMBus Contoller + - Host (rev 11)' +- bus: '00' + dev: '14' + fn: '0' + id: 19c2 + name: 'SATA controller: Intel Corporation Atom Processor C3000 Series SATA Controller + 1 (rev 11)' +- bus: '00' + dev: '15' + fn: '0' + id: 19d0 + name: 'USB controller: Intel Corporation Atom Processor C3000 Series USB 3.0 xHCI + Controller (rev 11)' +- bus: '00' + dev: '16' + fn: '0' + id: 19d1 + name: 'PCI bridge: Intel Corporation Atom Processor C3000 Series Integrated LAN + Root Port #0 (rev 11)' +- bus: '00' + dev: '17' + fn: '0' + id: 19d2 + name: 'PCI bridge: Intel Corporation Atom Processor C3000 Series Integrated LAN + Root Port #1 (rev 11)' +- bus: '00' + dev: '18' + fn: '0' + id: 19d3 + name: 'Communication controller: Intel Corporation Atom Processor C3000 Series ME + HECI 1 (rev 11)' +- bus: '00' + dev: 1c + fn: '0' + id: 19db + name: 'SD Host controller: Intel Corporation Device 19db (rev 11)' +- bus: '00' + dev: 1f + fn: '0' + id: 19dc + name: 'ISA bridge: Intel Corporation Atom Processor C3000 Series LPC or eSPI (rev + 11)' +- bus: '00' + dev: 1f + fn: '2' + id: 19de + name: 'Memory controller: Intel Corporation Atom Processor C3000 Series Power Management + Controller (rev 11)' +- bus: '00' + dev: 1f + fn: '4' + id: 19df + name: 'SMBus: Intel Corporation Atom Processor C3000 Series SMBus controller (rev + 11)' +- bus: '00' + dev: 1f + fn: '5' + id: 19e0 + name: 'Serial bus controller [0c80]: Intel Corporation Atom Processor C3000 Series + SPI Controller (rev 11)' +- bus: '01' + dev: '00' + fn: '0' + id: 19e2 + name: 'Co-processor: Intel Corporation Atom Processor C3000 Series QuickAssist Technology + (rev 11)' +- bus: '04' + dev: '00' + fn: '0' + id: b770 + name: 'Ethernet controller: Broadcom Inc. and subsidiaries Device b770 (rev 01)' +- bus: '06' + dev: '00' + fn: '0' + id: '1533' + name: 'Ethernet controller: Intel Corporation I210 Gigabit Network Connection (rev + 03)' +- bus: 09 + dev: '00' + fn: '0' + id: 15c3 + name: 'Ethernet controller: Intel Corporation Ethernet Connection X553 Backplane + (rev 11)' +- bus: 09 + dev: '00' + fn: '1' + id: 15c3 + name: 'Ethernet controller: Intel Corporation Ethernet Connection X553 Backplane + (rev 11)' +- bus: 0a + dev: '00' + fn: '0' + id: 15c3 + name: 'Ethernet controller: Intel Corporation Ethernet Connection X553 Backplane + (rev 11)' +- bus: 0a + dev: '00' + fn: '1' + id: 15c3 + name: 'Ethernet controller: Intel Corporation Ethernet Connection X553 Backplane + (rev 11)' diff --git a/device/ufispace/x86_64-ufispace_s8901_54xc-r0/pddf/pd-plugin.json b/device/ufispace/x86_64-ufispace_s8901_54xc-r0/pddf/pd-plugin.json new file mode 100644 index 0000000000..32df3d822e --- /dev/null +++ b/device/ufispace/x86_64-ufispace_s8901_54xc-r0/pddf/pd-plugin.json @@ -0,0 +1,98 @@ +{ + + "XCVR": + { + "xcvr_present": + { + "i2c": + { + "valmap-SFP": {"1":true, "0":false }, + "valmap-SFP28": {"1":true, "0":false }, + "valmap-QSFP28": {"1":true, "0":false }, + "valmap-QSFP-DD": {"1":true, "0":false} + } + }, + + "plug_status": + { + "inserted": "1", + "removed": "0" + } + }, + "PSU": + { + "psu_present": + { + "i2c": + { + "valmap": { "1":true, "0":false } + }, + "bmc": + { + "valmap": { "0x0280|":true, "0x0180|":false } + } + }, + + "psu_power_good": + { + "i2c": + { + "valmap": { "1": true, "0":false } + }, + "bmc": + { + "valmap": { "0x0280|":true, "0x0180|":false } + } + }, + + "psu_fan_dir": + { + "bmc": + { + "valmap": {"0": "UNKNOWN", "1":"INTAKE", "2":"EXHAUST"} + } + }, + + "psu_support_list": + [ + {"Manufacturer": "FSPGROUP", "Name": "YNEB0450BM", "MaxSpd": "PSU_FAN_MAX_SPEED_AC", "Type": "AC"}, + {"Manufacturer": "FSPGROUP", "Name": "YNEB0450AM", "MaxSpd": "PSU_FAN_MAX_SPEED_DC", "Type": "DC"}, + {"Manufacturer": "DELTA", "Name": "DPS-450AB-27", "MaxSpd": "PSU_FAN_MAX_SPEED_AC", "Type": "AC"}, + {"Manufacturer": "DELTA", "Name": "DPS-450AB-28", "MaxSpd": "PSU_FAN_MAX_SPEED_DC", "Type": "DC"} + ], + + "valmap": { + "PSU_FAN_MAX_SPEED":"20000", + "PSU_FAN_MAX_SPEED_AC":"20000", + "PSU_FAN_MAX_SPEED_DC":"18000", + "DEFAULT_TYPE": "AC" + } + }, + "FAN": + { + "direction": + { + "bmc": + { + "valmap": {"0": "UNKNOWN", "1":"INTAKE", "2":"EXHAUST"} + } + }, + + "present": + { + "i2c": + { + "valmap": {"1":true, "0":false} + }, + "bmc": + { + "valmap": { "0x0280|":true, "0x0180|":false, "Device Present":true, "Device Absent":false} + } + }, + "FAN_MAX_SPEED":"25000" + }, + "REBOOT_CAUSE": + { + "reboot_cause_file": "/host/reboot-cause/reboot-cause.txt" + } +} diff --git a/device/ufispace/x86_64-ufispace_s8901_54xc-r0/pddf/pddf-device.json b/device/ufispace/x86_64-ufispace_s8901_54xc-r0/pddf/pddf-device.json new file mode 100644 index 0000000000..7aa6159f56 --- /dev/null +++ b/device/ufispace/x86_64-ufispace_s8901_54xc-r0/pddf/pddf-device.json @@ -0,0 +1,7888 @@ +{ + "PLATFORM": { + "num_psus": 2, + "num_fantrays": 5, + "num_fans_pertray": 1, + "num_ports": 54, + "num_temps": 8, + "pddf_dev_types": { + "description": "PDDF supported devices", + "CPLD": [ + "i2c_cpld" + ], + "PSU": [ + "psu_eeprom", + "psu_pmbus" + ], + "PORT_MODULE": [ + "pddf_xcvr" + ] + }, + "std_perm_kos": [ + "i2c-i801", + "i2c-ismt" + ], + "std_kos": [ + "i2c_dev", + "i2c_mux_pca954x", + "coretemp", + "optoe", + "gpio-pca953x" + ], + "pddf_kos": [ + "pddf_client_module", + "pddf_cpld_module", + "pddf_cpld_driver", + "pddf_mux_module", + "pddf_xcvr_module", + "pddf_xcvr_driver_module", + "pddf_psu_driver_module", + "pddf_psu_module", + "pddf_fan_driver_module", + "pddf_fan_module", + "pddf_led_module" + ], + "custom_kos": [ + "x86-64-ufispace-s8901-54xc-lpc", + "x86-64-ufispace-s8901-54xc-sys-eeprom", + "pddf_custom_gpio_module", + "pddf_custom_sysstatus_module" + ] + }, + "SYSTEM": { + "dev_info": { + "device_type": "CPU", + "device_name": "ROOT_COMPLEX", + "device_parent": null + }, + "i2c": { + "CONTROLLERS": [ + { + "dev_name": "i2c-1", + "dev": "SMBUS1" + }, + { + "dev_name": "i2c-0", + "dev": "SMBUS0" + } + ] + } + }, + "SMBUS0": { + "dev_info": { + "device_type": "SMBUS", + "device_name": "SMBUS0", + "device_parent": "SYSTEM" + }, + "i2c": { + "topo_info": { + "dev_addr": "0x0" + }, + "DEVICES": [ + { + "dev": "MUX3" + } + ] + } + }, + "SMBUS1": { + "dev_info": { + "device_type": "SMBUS", + "device_name": "SMBUS1", + "device_parent": "SYSTEM" + }, + "i2c": { + "topo_info": { + "dev_addr": "0x1" + }, + "DEVICES": [ + { + "dev": "MUX1" + }, + { + "dev": "MUX2" + } + ] + } + }, + "MUX1": { + "dev_info": { + "device_type": "MUX", + "device_name": "MUX1", + "device_parent": "SMBUS1" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x1", + "dev_addr": "0x70", + "dev_type": "pca9548" + }, + "dev_attr": { + "virt_bus": "0x2", + "idle_state": "-2" + }, + "channel": [ + { + "chn": "0", + "dev": "CPLD1" + }, + { + "chn": "0", + "dev": "CPLD2" + }, + { + "chn": "0", + "dev": "PSU1" + }, + { + "chn": "0", + "dev": "PSU2" + }, + { + "chn": "3", + "dev": "EEPROM1" + }, + { + "chn": "4", + "dev": "GPIO1" + }, + { + "chn": "4", + "dev": "GPIO2" + }, + { + "chn": "5", + "dev": "GPIO3" + }, + { + "chn": "5", + "dev": "GPIO4" + } + ] + } + }, + "MUX2": { + "dev_info": { + "device_type": "MUX", + "device_name": "MUX2", + "device_parent": "SMBUS1" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x1", + "dev_addr": "0x71", + "dev_type": "pca9548" + }, + "dev_attr": { + "virt_bus": "0xa", + "idle_state": "-2" + }, + "channel": [ + ] + } + }, + "MUX3": { + "dev_info": { + "device_type": "MUX", + "device_name": "MUX3", + "device_parent": "SMBUS0" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x0", + "dev_addr": "0x72", + "dev_type": "pca9548" + }, + "dev_attr": { + "virt_bus": "0x12", + "idle_state": "-2" + }, + "channel": [ + { + "chn": "0", + "dev": "MUX4" + }, + { + "chn": "1", + "dev": "MUX5" + }, + { + "chn": "2", + "dev": "MUX6" + }, + { + "chn": "3", + "dev": "MUX7" + }, + { + "chn": "4", + "dev": "MUX8" + }, + { + "chn": "5", + "dev": "MUX9" + }, + { + "chn": "6", + "dev": "MUX10" + } + ] + } + }, + "MUX4": { + "dev_info": { + "device_type": "MUX", + "device_name": "MUX4", + "device_parent": "MUX3" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x12", + "dev_addr": "0x73", + "dev_type": "pca9548" + }, + "dev_attr": { + "virt_bus": "0x1a", + "idle_state": "-2" + }, + "channel": [ + { + "chn": "0", + "dev": "PORT1" + }, + { + "chn": "1", + "dev": "PORT2" + }, + { + "chn": "2", + "dev": "PORT3" + }, + { + "chn": "3", + "dev": "PORT4" + }, + { + "chn": "4", + "dev": "PORT5" + }, + { + "chn": "5", + "dev": "PORT6" + }, + { + "chn": "6", + "dev": "PORT7" + }, + { + "chn": "7", + "dev": "PORT8" + } + ] + } + }, + "MUX5": { + "dev_info": { + "device_type": "MUX", + "device_name": "MUX5", + "device_parent": "MUX3" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x13", + "dev_addr": "0x73", + "dev_type": "pca9548" + }, + "dev_attr": { + "virt_bus": "0x22", + "idle_state": "-2" + }, + "channel": [ + { + "chn": "0", + "dev": "PORT9" + }, + { + "chn": "1", + "dev": "PORT10" + }, + { + "chn": "2", + "dev": "PORT11" + }, + { + "chn": "3", + "dev": "PORT12" + }, + { + "chn": "4", + "dev": "PORT13" + }, + { + "chn": "5", + "dev": "PORT14" + }, + { + "chn": "6", + "dev": "PORT15" + }, + { + "chn": "7", + "dev": "PORT16" + } + ] + } + }, + "MUX6": { + "dev_info": { + "device_type": "MUX", + "device_name": "MUX6", + "device_parent": "MUX3" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x14", + "dev_addr": "0x73", + "dev_type": "pca9548" + }, + "dev_attr": { + "virt_bus": "0x2a", + "idle_state": "-2" + }, + "channel": [ + { + "chn": "0", + "dev": "PORT17" + }, + { + "chn": "1", + "dev": "PORT18" + }, + { + "chn": "2", + "dev": "PORT19" + }, + { + "chn": "3", + "dev": "PORT20" + }, + { + "chn": "4", + "dev": "PORT21" + }, + { + "chn": "5", + "dev": "PORT22" + }, + { + "chn": "6", + "dev": "PORT23" + }, + { + "chn": "7", + "dev": "PORT24" + } + ] + } + }, + "MUX7": { + "dev_info": { + "device_type": "MUX", + "device_name": "MUX7", + "device_parent": "MUX3" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x15", + "dev_addr": "0x73", + "dev_type": "pca9548" + }, + "dev_attr": { + "virt_bus": "032", + "idle_state": "-2" + }, + "channel": [ + { + "chn": "0", + "dev": "PORT25" + }, + { + "chn": "1", + "dev": "PORT26" + }, + { + "chn": "2", + "dev": "PORT27" + }, + { + "chn": "3", + "dev": "PORT28" + }, + { + "chn": "4", + "dev": "PORT29" + }, + { + "chn": "5", + "dev": "PORT30" + }, + { + "chn": "6", + "dev": "PORT31" + }, + { + "chn": "7", + "dev": "PORT32" + } + ] + } + }, + "MUX8": { + "dev_info": { + "device_type": "MUX", + "device_name": "MUX8", + "device_parent": "MUX3" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x16", + "dev_addr": "0x73", + "dev_type": "pca9548" + }, + "dev_attr": { + "virt_bus": "03a", + "idle_state": "-2" + }, + "channel": [ + { + "chn": "0", + "dev": "PORT33" + }, + { + "chn": "1", + "dev": "PORT34" + }, + { + "chn": "2", + "dev": "PORT35" + }, + { + "chn": "3", + "dev": "PORT36" + }, + { + "chn": "4", + "dev": "PORT37" + }, + { + "chn": "5", + "dev": "PORT38" + }, + { + "chn": "6", + "dev": "PORT39" + }, + { + "chn": "7", + "dev": "PORT40" + } + ] + } + }, + "MUX9": { + "dev_info": { + "device_type": "MUX", + "device_name": "MUX9", + "device_parent": "MUX3" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x17", + "dev_addr": "0x73", + "dev_type": "pca9548" + }, + "dev_attr": { + "virt_bus": "042", + "idle_state": "-2" + }, + "channel": [ + { + "chn": "0", + "dev": "PORT41" + }, + { + "chn": "1", + "dev": "PORT42" + }, + { + "chn": "2", + "dev": "PORT43" + }, + { + "chn": "3", + "dev": "PORT44" + }, + { + "chn": "4", + "dev": "PORT45" + }, + { + "chn": "5", + "dev": "PORT46" + }, + { + "chn": "6", + "dev": "PORT47" + }, + { + "chn": "7", + "dev": "PORT48" + } + ] + } + }, + "MUX10": { + "dev_info": { + "device_type": "MUX", + "device_name": "MUX10", + "device_parent": "MUX3" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x18", + "dev_addr": "0x73", + "dev_type": "pca9548" + }, + "dev_attr": { + "virt_bus": "04a", + "idle_state": "-2" + }, + "channel": [ + { + "chn": "0", + "dev": "PORT49" + }, + { + "chn": "1", + "dev": "PORT50" + }, + { + "chn": "2", + "dev": "PORT51" + }, + { + "chn": "3", + "dev": "PORT52" + }, + { + "chn": "4", + "dev": "PORT53" + }, + { + "chn": "5", + "dev": "PORT54" + } + ] + } + }, + "CPLD1": { + "dev_info": { + "device_type": "CPLD", + "device_name": "CPLD1", + "device_parent": "MUX1" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x2", + "dev_addr": "0x30", + "dev_type": "i2c_cpld" + }, + "dev_attr": {} + } + }, + "CPLD2": { + "dev_info": { + "device_type": "CPLD", + "device_name": "CPLD2", + "device_parent": "MUX1" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x2", + "dev_addr": "0x31", + "dev_type": "i2c_cpld" + }, + "dev_attr": {} + } + }, + "SYSSTATUS": { + "dev_info": { + "device_type": "SYSSTAT", + "device_name": "SYSSTATUS" + }, + "dev_attr": {}, + "attr_list": + [ + { + "attr_name": "board_sku_id", + "attr_devaddr": "0x30", + "attr_offset": "0x0", + "attr_mask": "0xff", + "attr_len": "0x1" + }, + { + "attr_name": "board_hw_id", + "attr_devaddr": "0x30", + "attr_offset": "0x1", + "attr_mask": "0x03", + "attr_len": "0x1" + }, + { + "attr_name": "board_deph_id", + "attr_devaddr": "0x30", + "attr_offset": "0x1", + "attr_mask": "0x4", + "attr_len": "0x1" + }, + { + "attr_name": "board_build_id", + "attr_devaddr": "0x30", + "attr_offset": "0x1", + "attr_mask": "0x18", + "attr_len": "0x1" + }, + { + "attr_name": "cpld1_major_ver", + "attr_devaddr": "0x30", + "attr_offset": "0x2", + "attr_mask": "0xc0", + "attr_len": "0x1" + }, + { + "attr_name": "cpld1_minor_ver", + "attr_devaddr": "0x30", + "attr_offset": "0x2", + "attr_mask": "0x3f", + "attr_len": "0x1" + }, + { + "attr_name": "cpld1_build", + "attr_devaddr": "0x30", + "attr_offset": "0x4", + "attr_mask": "0xff", + "attr_len": "0x1" + }, + { + "attr_name": "cpld2_major_ver", + "attr_devaddr": "0x31", + "attr_offset": "0x2", + "attr_mask": "0xc0", + "attr_len": "0x1" + }, + { + "attr_name": "cpld2_minor_ver", + "attr_devaddr": "0x31", + "attr_offset": "0x2", + "attr_mask": "0x3f", + "attr_len": "0x1" + }, + { + "attr_name": "cpld2_build", + "attr_devaddr": "0x31", + "attr_offset": "0x4", + "attr_mask": "0xff", + "attr_len": "0x1" + }, + { + "attr_name": "psu_status", + "attr_devaddr": "0x30", + "attr_offset": "0x51", + "attr_mask": "0xff", + "attr_len": "0x1" + }, + { + "attr_name": "system_led_psu", + "attr_devaddr": "0x30", + "attr_offset": "0x80", + "attr_mask": "0xff", + "attr_len": "0x1" + }, + { + "attr_name": "system_led_sys", + "attr_devaddr": "0x30", + "attr_offset": "0x81", + "attr_mask": "0xff", + "attr_len": "0x1" + }, + { + "attr_name": "system_led_sync", + "attr_devaddr": "0x30", + "attr_offset": "0x82", + "attr_mask": "0xff", + "attr_len": "0x1" + }, + { + "attr_name": "system_led_fan", + "attr_devaddr": "0x30", + "attr_offset": "0x83", + "attr_mask": "0xff", + "attr_len": "0x1" + }, + { + "attr_name": "system_led_id", + "attr_devaddr": "0x30", + "attr_offset": "0x84", + "attr_mask": "0xff", + "attr_len": "0x1" + } + ] + }, + "EEPROM1": { + "dev_info": { + "device_type": "EEPROM", + "device_name": "EEPROM1", + "device_parent": "MUX1" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x5", + "dev_addr": "0x53", + "dev_type": "sys_eeprom" + }, + "dev_attr": { + "access_mode": "BLOCK" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "GPIO1": { + "dev_info": { + "device_type": "GPIO", + "device_name": "GPIO1", + "device_parent": "MUX1" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x6", + "dev_addr": "0x22", + "dev_type": "tca6424" + }, + "dev_attr": { + "gpio_base": "0x1d0" + }, + "ports": [ + { + "port_num": "0", + "direction": "out", + "value": "1", + "edge": "", + "active_low": "" + }, + { + "port_num": "1", + "direction": "out", + "value": "1", + "edge": "", + "active_low": "" + }, + { + "port_num": "2", + "direction": "out", + "value": "1", + "edge": "", + "active_low": "" + }, + { + "port_num": "3", + "direction": "out", + "value": "1", + "edge": "", + "active_low": "" + }, + { + "port_num": "4", + "direction": "out", + "value": "1", + "edge": "", + "active_low": "" + }, + { + "port_num": "5", + "direction": "out", + "value": "1", + "edge": "", + "active_low": "" + }, + { + "port_num": "6", + "direction": "out", + "value": "1", + "edge": "", + "active_low": "" + }, + { + "port_num": "7", + "direction": "out", + "value": "1", + "edge": "", + "active_low": "" + }, + { + "port_num": "8", + "direction": "out", + "value": "1", + "edge": "", + "active_low": "" + }, + { + "port_num": "9", + "direction": "out", + "value": "1", + "edge": "", + "active_low": "" + }, + { + "port_num": "10", + "direction": "out", + "value": "1", + "edge": "", + "active_low": "" + }, + { + "port_num": "11", + "direction": "out", + "value": "1", + "edge": "", + "active_low": "" + }, + { + "port_num": "12", + "direction": "out", + "value": "1", + "edge": "", + "active_low": "" + }, + { + "port_num": "13", + "direction": "out", + "value": "1", + "edge": "", + "active_low": "" + }, + { + "port_num": "14", + "direction": "out", + "value": "1", + "edge": "", + "active_low": "" + }, + { + "port_num": "15", + "direction": "out", + "value": "1", + "edge": "", + "active_low": "" + }, + { + "port_num": "16", + "direction": "out", + "value": "1", + "edge": "", + "active_low": "" + }, + { + "port_num": "17", + "direction": "out", + "value": "1", + "edge": "", + "active_low": "" + }, + { + "port_num": "18", + "direction": "out", + "value": "1", + "edge": "", + "active_low": "" + }, + { + "port_num": "19", + "direction": "out", + "value": "1", + "edge": "", + "active_low": "" + }, + { + "port_num": "20", + "direction": "out", + "value": "1", + "edge": "", + "active_low": "" + }, + { + "port_num": "21", + "direction": "out", + "value": "1", + "edge": "", + "active_low": "" + }, + { + "port_num": "22", + "direction": "out", + "value": "1", + "edge": "", + "active_low": "" + }, + { + "port_num": "23", + "direction": "out", + "value": "1", + "edge": "", + "active_low": "" + } + ] + } + }, + "GPIO2": { + "dev_info": { + "device_type": "GPIO", + "device_name": "GPIO2", + "device_parent": "MUX1" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x6", + "dev_addr": "0x23", + "dev_type": "tca6424" + }, + "dev_attr": { + "gpio_base": "0x1a0" + }, + "ports": [ + { + "port_num": "0", + "direction": "out", + "value": "1", + "edge": "", + "active_low": "" + }, + { + "port_num": "1", + "direction": "out", + "value": "1", + "edge": "", + "active_low": "" + }, + { + "port_num": "2", + "direction": "out", + "value": "1", + "edge": "", + "active_low": "" + }, + { + "port_num": "3", + "direction": "out", + "value": "1", + "edge": "", + "active_low": "" + }, + { + "port_num": "4", + "direction": "out", + "value": "1", + "edge": "", + "active_low": "" + }, + { + "port_num": "5", + "direction": "out", + "value": "1", + "edge": "", + "active_low": "" + }, + { + "port_num": "6", + "direction": "out", + "value": "1", + "edge": "", + "active_low": "" + }, + { + "port_num": "7", + "direction": "out", + "value": "1", + "edge": "", + "active_low": "" + }, + { + "port_num": "8", + "direction": "out", + "value": "1", + "edge": "", + "active_low": "" + }, + { + "port_num": "9", + "direction": "out", + "value": "1", + "edge": "", + "active_low": "" + }, + { + "port_num": "10", + "direction": "out", + "value": "1", + "edge": "", + "active_low": "" + }, + { + "port_num": "11", + "direction": "out", + "value": "1", + "edge": "", + "active_low": "" + }, + { + "port_num": "12", + "direction": "out", + "value": "1", + "edge": "", + "active_low": "" + }, + { + "port_num": "13", + "direction": "out", + "value": "1", + "edge": "", + "active_low": "" + }, + { + "port_num": "14", + "direction": "out", + "value": "1", + "edge": "", + "active_low": "" + }, + { + "port_num": "15", + "direction": "out", + "value": "1", + "edge": "", + "active_low": "" + }, + { + "port_num": "16", + "direction": "out", + "value": "1", + "edge": "", + "active_low": "" + }, + { + "port_num": "17", + "direction": "out", + "value": "1", + "edge": "", + "active_low": "" + }, + { + "port_num": "18", + "direction": "out", + "value": "1", + "edge": "", + "active_low": "" + }, + { + "port_num": "19", + "direction": "out", + "value": "1", + "edge": "", + "active_low": "" + }, + { + "port_num": "20", + "direction": "out", + "value": "1", + "edge": "", + "active_low": "" + }, + { + "port_num": "21", + "direction": "out", + "value": "1", + "edge": "", + "active_low": "" + }, + { + "port_num": "22", + "direction": "out", + "value": "1", + "edge": "", + "active_low": "" + }, + { + "port_num": "23", + "direction": "out", + "value": "1", + "edge": "", + "active_low": "" + } + ] + } + }, + "GPIO3": { + "dev_info": { + "device_type": "GPIO", + "device_name": "GPIO3", + "device_parent": "MUX1" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x7", + "dev_addr": "0x22", + "dev_type": "tca6424" + }, + "dev_attr": { + "gpio_base": "0x1e8" + }, + "ports": [ + { + "port_num": "0", + "direction": "out", + "value": "1", + "edge": "", + "active_low": "" + }, + { + "port_num": "1", + "direction": "out", + "value": "1", + "edge": "", + "active_low": "" + }, + { + "port_num": "2", + "direction": "out", + "value": "1", + "edge": "", + "active_low": "" + }, + { + "port_num": "3", + "direction": "out", + "value": "1", + "edge": "", + "active_low": "" + }, + { + "port_num": "4", + "direction": "out", + "value": "1", + "edge": "", + "active_low": "" + }, + { + "port_num": "5", + "direction": "out", + "value": "1", + "edge": "", + "active_low": "" + }, + { + "port_num": "6", + "direction": "out", + "value": "1", + "edge": "", + "active_low": "" + }, + { + "port_num": "7", + "direction": "out", + "value": "1", + "edge": "", + "active_low": "" + }, + { + "port_num": "8", + "direction": "out", + "value": "1", + "edge": "", + "active_low": "" + }, + { + "port_num": "9", + "direction": "out", + "value": "1", + "edge": "", + "active_low": "" + }, + { + "port_num": "10", + "direction": "out", + "value": "1", + "edge": "", + "active_low": "" + }, + { + "port_num": "11", + "direction": "out", + "value": "1", + "edge": "", + "active_low": "" + }, + { + "port_num": "12", + "direction": "out", + "value": "1", + "edge": "", + "active_low": "" + }, + { + "port_num": "13", + "direction": "out", + "value": "1", + "edge": "", + "active_low": "" + }, + { + "port_num": "14", + "direction": "out", + "value": "1", + "edge": "", + "active_low": "" + }, + { + "port_num": "15", + "direction": "out", + "value": "1", + "edge": "", + "active_low": "" + }, + { + "port_num": "16", + "direction": "out", + "value": "1", + "edge": "", + "active_low": "" + }, + { + "port_num": "17", + "direction": "out", + "value": "1", + "edge": "", + "active_low": "" + }, + { + "port_num": "18", + "direction": "out", + "value": "1", + "edge": "", + "active_low": "" + }, + { + "port_num": "19", + "direction": "out", + "value": "1", + "edge": "", + "active_low": "" + }, + { + "port_num": "20", + "direction": "out", + "value": "1", + "edge": "", + "active_low": "" + }, + { + "port_num": "21", + "direction": "out", + "value": "1", + "edge": "", + "active_low": "" + }, + { + "port_num": "22", + "direction": "out", + "value": "1", + "edge": "", + "active_low": "" + }, + { + "port_num": "23", + "direction": "out", + "value": "1", + "edge": "", + "active_low": "" + } + ] + } + }, + "GPIO4": { + "dev_info": { + "device_type": "GPIO", + "device_name": "GPIO4", + "device_parent": "MUX1" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x7", + "dev_addr": "0x23", + "dev_type": "tca6424" + }, + "dev_attr": { + "gpio_base": "0x1b8" + }, + "ports": [ + { + "port_num": "0", + "direction": "out", + "value": "1", + "edge": "", + "active_low": "" + }, + { + "port_num": "1", + "direction": "out", + "value": "1", + "edge": "", + "active_low": "" + }, + { + "port_num": "2", + "direction": "out", + "value": "1", + "edge": "", + "active_low": "" + }, + { + "port_num": "3", + "direction": "out", + "value": "1", + "edge": "", + "active_low": "" + }, + { + "port_num": "4", + "direction": "out", + "value": "1", + "edge": "", + "active_low": "" + }, + { + "port_num": "5", + "direction": "out", + "value": "1", + "edge": "", + "active_low": "" + }, + { + "port_num": "6", + "direction": "out", + "value": "1", + "edge": "", + "active_low": "" + }, + { + "port_num": "7", + "direction": "out", + "value": "1", + "edge": "", + "active_low": "" + }, + { + "port_num": "8", + "direction": "out", + "value": "1", + "edge": "", + "active_low": "" + }, + { + "port_num": "9", + "direction": "out", + "value": "1", + "edge": "", + "active_low": "" + }, + { + "port_num": "10", + "direction": "out", + "value": "1", + "edge": "", + "active_low": "" + }, + { + "port_num": "11", + "direction": "out", + "value": "1", + "edge": "", + "active_low": "" + }, + { + "port_num": "12", + "direction": "out", + "value": "1", + "edge": "", + "active_low": "" + }, + { + "port_num": "13", + "direction": "out", + "value": "1", + "edge": "", + "active_low": "" + }, + { + "port_num": "14", + "direction": "out", + "value": "1", + "edge": "", + "active_low": "" + }, + { + "port_num": "15", + "direction": "out", + "value": "1", + "edge": "", + "active_low": "" + }, + { + "port_num": "16", + "direction": "out", + "value": "1", + "edge": "", + "active_low": "" + }, + { + "port_num": "17", + "direction": "out", + "value": "1", + "edge": "", + "active_low": "" + }, + { + "port_num": "18", + "direction": "out", + "value": "1", + "edge": "", + "active_low": "" + }, + { + "port_num": "19", + "direction": "out", + "value": "1", + "edge": "", + "active_low": "" + }, + { + "port_num": "20", + "direction": "out", + "value": "1", + "edge": "", + "active_low": "" + }, + { + "port_num": "21", + "direction": "out", + "value": "1", + "edge": "", + "active_low": "" + }, + { + "port_num": "22", + "direction": "out", + "value": "1", + "edge": "", + "active_low": "" + }, + { + "port_num": "23", + "direction": "out", + "value": "1", + "edge": "", + "active_low": "" + } + ] + } + }, + "TEMP1": { + "dev_info": { + "device_type": "TEMP_SENSOR", + "device_name": "TEMP1", + "device_parent": "SMBUS0" + }, + "dev_attr": { + "display_name": "TEMP_MAC" + }, + "bmc": { + "ipmitool": { + "attr_list": [ + { + "attr_name": "temp1_input", + "bmc_cmd": "ipmitool sdr -c get TEMP_MAC", + "raw": "0", + "field_name": "TEMP_MAC", + "field_pos": "2", + "separator": "," + }, + { + "attr_name": "temp1_high_crit_threshold", + "bmc_cmd": "ipmitool sdr -c get TEMP_MAC", + "raw": "0", + "field_name": "TEMP_MAC", + "field_pos": "12", + "separator": "," + }, + { + "attr_name": "temp1_high_threshold", + "bmc_cmd": "ipmitool sdr -c get TEMP_MAC", + "raw": "0", + "field_name": "TEMP_MAC", + "field_pos": "13", + "separator": "," + } + ] + } + } + }, + "TEMP2": { + "dev_info": { + "device_type": "TEMP_SENSOR", + "device_name": "TEMP2", + "device_parent": "SMBUS0" + }, + "dev_attr": { + "display_name": "TEMP_ENV_MACCASE" + }, + "bmc": { + "ipmitool": { + "attr_list": [ + { + "attr_name": "temp1_input", + "bmc_cmd": "ipmitool sdr -c get TEMP_ENV_MACCASE", + "raw": "0", + "field_name": "TEMP_ENV_MACCASE", + "field_pos": "2", + "separator": "," + }, + { + "attr_name": "temp1_high_crit_threshold", + "bmc_cmd": "ipmitool sdr -c get TEMP_ENV_MACCASE", + "raw": "0", + "field_name": "TEMP_ENV_MACCASE", + "field_pos": "12", + "separator": "," + }, + { + "attr_name": "temp1_high_threshold", + "bmc_cmd": "ipmitool sdr -c get TEMP_ENV_MACCASE", + "raw": "0", + "field_name": "TEMP_ENV_MACCASE", + "field_pos": "13", + "separator": "," + } + ] + } + } + }, + "TEMP3": { + "dev_info": { + "device_type": "TEMP_SENSOR", + "device_name": "TEMP3", + "device_parent": "SMBUS0" + }, + "dev_attr": { + "display_name": "TEMP_ENV_PSUCASE" + }, + "bmc": { + "ipmitool": { + "attr_list": [ + { + "attr_name": "temp1_input", + "bmc_cmd": "ipmitool sdr -c get TEMP_ENV_PSUCASE", + "raw": "0", + "field_name": "TEMP_ENV_PSUCASE", + "field_pos": "2", + "separator": "," + }, + { + "attr_name": "temp1_high_crit_threshold", + "bmc_cmd": "ipmitool sdr -c get TEMP_ENV_PSUCASE", + "raw": "0", + "field_name": "TEMP_ENV_PSUCASE", + "field_pos": "12", + "separator": "," + }, + { + "attr_name": "temp1_high_threshold", + "bmc_cmd": "ipmitool sdr -c get TEMP_ENV_PSUCASE", + "raw": "0", + "field_name": "TEMP_ENV_PSUCASE", + "field_pos": "13", + "separator": "," + } + ] + } + } + }, + "TEMP4": { + "dev_info": { + "device_type": "TEMP_SENSOR", + "device_name": "TEMP4", + "device_parent": "SMBUS0" + }, + "dev_attr": { + "display_name": "TEMP_ENV_FANCONN" + }, + "bmc": { + "ipmitool": { + "attr_list": [ + { + "attr_name": "temp1_input", + "bmc_cmd": "ipmitool sdr -c get TEMP_ENV_FANCONN", + "raw": "0", + "field_name": "TEMP_ENV_FANCONN", + "field_pos": "2", + "separator": "," + }, + { + "attr_name": "temp1_high_crit_threshold", + "bmc_cmd": "ipmitool sdr -c get TEMP_ENV_FANCONN", + "raw": "0", + "field_name": "TEMP_ENV_FANCONN", + "field_pos": "12", + "separator": "," + }, + { + "attr_name": "temp1_high_threshold", + "bmc_cmd": "ipmitool sdr -c get TEMP_ENV_FANCONN", + "raw": "0", + "field_name": "TEMP_ENV_FANCONN", + "field_pos": "13", + "separator": "," + } + ] + } + } + }, + "TEMP5": { + "dev_info": { + "device_type": "TEMP_SENSOR", + "device_name": "TEMP5", + "device_parent": "SMBUS0" + }, + "dev_attr": { + "display_name": "TEMP_ENV_FANCARD" + }, + "bmc": { + "ipmitool": { + "attr_list": [ + { + "attr_name": "temp1_input", + "bmc_cmd": "ipmitool sdr -c get TEMP_ENV_FANCARD", + "raw": "0", + "field_name": "TEMP_ENV_FANCARD", + "field_pos": "2", + "separator": "," + }, + { + "attr_name": "temp1_high_crit_threshold", + "bmc_cmd": "ipmitool sdr -c get TEMP_ENV_FANCARD", + "raw": "0", + "field_name": "TEMP_ENV_FANCARD", + "field_pos": "12", + "separator": "," + }, + { + "attr_name": "temp1_high_threshold", + "bmc_cmd": "ipmitool sdr -c get TEMP_ENV_FANCARD", + "raw": "0", + "field_name": "TEMP_ENV_FANCARD", + "field_pos": "13", + "separator": "," + } + ] + } + } + }, + "TEMP6": { + "dev_info": { + "device_type": "TEMP_SENSOR", + "device_name": "TEMP6", + "device_parent": "SMBUS0" + }, + "dev_attr": { + "display_name": "TEMP_ENV_BMC" + }, + "bmc": { + "ipmitool": { + "attr_list": [ + { + "attr_name": "temp1_input", + "bmc_cmd": "ipmitool sdr -c get TEMP_ENV_BMC", + "raw": "0", + "field_name": "TEMP_ENV_BMC", + "field_pos": "2", + "separator": "," + }, + { + "attr_name": "temp1_high_crit_threshold", + "bmc_cmd": "ipmitool sdr -c get TEMP_ENV_BMC", + "raw": "0", + "field_name": "TEMP_ENV_BMC", + "field_pos": "12", + "separator": "," + }, + { + "attr_name": "temp1_high_threshold", + "bmc_cmd": "ipmitool sdr -c get TEMP_ENV_BMC", + "raw": "0", + "field_name": "TEMP_ENV_BMC", + "field_pos": "13", + "separator": "," + } + ] + } + } + }, + "TEMP7": { + "dev_info": { + "device_type": "TEMP_SENSOR", + "device_name": "TEMP7", + "device_parent": "SMBUS0" + }, + "dev_attr": { + "display_name": "TEMP_PSU0_TEMP1" + }, + "bmc": { + "ipmitool": { + "attr_list": [ + { + "attr_name": "temp1_input", + "bmc_cmd": "ipmitool sdr -c get PSU0_TEMP1 | sed -e 's/,,/,0,/g' -e 's/,,/,0,/g'", + "raw": "0", + "field_name": "PSU0_TEMP1", + "field_pos": "2", + "separator": "," + }, + { + "attr_name": "temp1_high_crit_threshold", + "bmc_cmd": "ipmitool sdr -c get PSU0_TEMP1", + "raw": "0", + "field_name": "PSU0_TEMP1", + "field_pos": "12", + "separator": "," + }, + { + "attr_name": "temp1_high_threshold", + "bmc_cmd": "ipmitool sdr -c get PSU0_TEMP1", + "raw": "0", + "field_name": "PSU0_TEMP1", + "field_pos": "13", + "separator": "," + } + ] + } + } + }, + "TEMP8": { + "dev_info": { + "device_type": "TEMP_SENSOR", + "device_name": "TEMP8", + "device_parent": "SMBUS0" + }, + "dev_attr": { + "display_name": "TEMP_PSU1_TEMP1" + }, + "bmc": { + "ipmitool": { + "attr_list": [ + { + "attr_name": "temp1_input", + "bmc_cmd": "ipmitool sdr -c get PSU1_TEMP1 | sed -e 's/,,/,0,/g' -e 's/,,/,0,/g'", + "raw": "0", + "field_name": "PSU1_TEMP1", + "field_pos": "2", + "separator": "," + }, + { + "attr_name": "temp1_high_crit_threshold", + "bmc_cmd": "ipmitool sdr -c get PSU1_TEMP1", + "raw": "0", + "field_name": "PSU1_TEMP1", + "field_pos": "12", + "separator": "," + }, + { + "attr_name": "temp1_high_threshold", + "bmc_cmd": "ipmitool sdr -c get PSU1_TEMP1", + "raw": "0", + "field_name": "PSU1_TEMP1", + "field_pos": "13", + "separator": "," + } + ] + } + } + }, + "PSU1": { + "dev_info": { + "device_type": "PSU", + "device_name": "PSU1", + "device_parent": "MUX1" + }, + "dev_attr": { + "dev_idx": "1", + "num_psu_fans": "1" + }, + "i2c": { + "interface": [ + { "itf":"eeprom", "dev":"PSU1-EEPROM" } + ] + }, + "bmc": { + "ipmitool": { + "attr_list": [ + { + "attr_name": "psu_temp1_input", + "bmc_cmd": "ipmitool sdr -c get PSU0_TEMP1 | sed -e 's/,,/,0,/g' -e 's/,,/,0,/g'", + "raw": "0", + "field_name": "PSU0_TEMP1", + "field_pos": "2", + "mult": "1000", + "separator": "," + }, + { + "attr_name": "psu_fan1_speed_rpm", + "bmc_cmd": "ipmitool sdr -c get PSU0_FAN1 | sed -e 's/,,/,N\\/A,/g' -e 's/,,/,N\\/A,/g'", + "raw": "0", + "field_name": "PSU0_FAN1", + "field_pos": "2", + "separator": "," + }, + { + "attr_name": "psu_v_out", + "bmc_cmd": "ipmitool sdr -c get PSU0_VOUT | sed -e 's/,,/,N\\/A,/g' -e 's/,,/,N\\/A,/g'", + "raw": "0", + "field_name": "PSU0_VOUT", + "field_pos": "2", + "mult": "1000", + "separator": "," + }, + { + "attr_name": "psu_i_out", + "bmc_cmd": "ipmitool sdr -c get PSU0_IOUT | sed -e 's/,,/,N\\/A,/g' -e 's/,,/,N\\/A,/g'", + "raw": "0", + "field_name": "PSU0_IOUT", + "field_pos": "2", + "mult": "1000", + "separator": "," + }, + { + "attr_name": "psu_mfr_id", + "bmc_cmd": "_rv=$(ipmitool fru print 1 2>/dev/null | tr -s ' ' | cut -d' ' -f3-5 | grep 'Manufacturer') && echo $_rv || echo 'Manufacturer : N/A'", + "raw": "0", + "separator": ":", + "field_name": "Manufacturer", + "field_pos": "2" + }, + { + "attr_name": "psu_model_name", + "bmc_cmd": "_rv=$(ipmitool fru print 1 2>/dev/null | tr -s ' ' | cut -d' ' -f3-5 | grep 'Name') && echo $_rv || echo 'Name : N/A'", + "raw": "0", + "separator": ":", + "field_name": "Name", + "field_pos": "2" + }, + { + "attr_name": "psu_serial_num", + "bmc_cmd": "_rv=$(ipmitool fru print 1 2>/dev/null | tr -s ' ' | cut -d' ' -f3-5 | grep 'Serial') && echo $_rv || echo 'Serial : N/A'", + "raw": "0", + "separator": ":", + "field_name": "Serial", + "field_pos": "2" + }, + { + "attr_name": "psu_fan_dir", + "bmc_cmd": "ipmitool raw 0x3c 0x30 0x0 | xargs | cut -d' ' -f1", + "raw": "1", + "type": "raw" + }, + { + "attr_name": "psu_v_in", + "bmc_cmd": "ipmitool sdr get -c PSU0_VIN | sed -e 's/,,/,N\\/A,/g' -e 's/,,/,N\\/A,/g'", + "raw": "0", + "separator": ",", + "field_name": "PSU0_VIN", + "field_pos": "2", + "mult": "1000" + }, + { + "attr_name": "psu_i_in", + "bmc_cmd": "ipmitool sdr get -c PSU0_IIN | sed -e 's/,,/,N\\/A,/g' -e 's/,,/,N\\/A,/g'", + "raw": "0", + "separator": ",", + "field_name": "PSU0_IIN", + "field_pos": "2", + "mult": "1000" + } + ] + } + } + }, + "PSU1-EEPROM": { + "dev_info": { + "device_type": "PSU-EEPROM", + "device_name": "PSU1-EEPROM", + "device_parent": "MUX1", + "virt_parent": "PSU1" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x2", + "dev_addr": "0x50", + "dev_type": "psu_eeprom" + }, + "attr_list": [ + { + "attr_name":"psu_present", + "attr_devaddr":"0x30", + "attr_devtype":"cpld", + "attr_offset":"0x51", + "attr_mask":"0x1", + "attr_cmpval":"0x0", + "attr_len":"1" + }, + { + "attr_name":"psu_power_good", + "attr_devaddr":"0x30", + "attr_devtype":"cpld", + "attr_offset":"0x51", + "attr_mask":"0x10", + "attr_cmpval":"0x10", + "attr_len":"1" + } + ] + } + }, + "PSU2": { + "dev_info": { + "device_type": "PSU", + "device_name": "PSU2", + "device_parent": "MUX1" + }, + "dev_attr": { + "dev_idx": "2", + "num_psu_fans": "1" + }, + "i2c": { + "interface": [ + { "itf":"eeprom", "dev":"PSU2-EEPROM" } + ] + }, + "bmc": { + "ipmitool": { + "attr_list": [ + { + "attr_name": "psu_temp1_input", + "bmc_cmd": "ipmitool sdr -c get PSU1_TEMP1 | sed -e 's/,,/,N\\/A,/g' -e 's/,,/,N\\/A,/g'", + "raw": "0", + "field_name": "PSU1_TEMP1", + "field_pos": "2", + "mult": "1000", + "separator": "," + }, + { + "attr_name": "psu_fan1_speed_rpm", + "bmc_cmd": "ipmitool sdr -c get PSU1_FAN1 | sed -e 's/,,/,N\\/A,/g' -e 's/,,/,N\\/A,/g'", + "raw": "0", + "field_name": "PSU1_FAN1", + "field_pos": "2", + "separator": "," + }, + { + "attr_name": "psu_v_out", + "bmc_cmd": "ipmitool sdr -c get PSU1_VOUT | sed -e 's/,,/,N\\/A,/g' -e 's/,,/,N\\/A,/g'", + "raw": "0", + "field_name": "PSU1_VOUT", + "field_pos": "2", + "mult": "1000", + "separator": "," + }, + { + "attr_name": "psu_i_out", + "bmc_cmd": "ipmitool sdr -c get PSU1_IOUT | sed -e 's/,,/,N\\/A,/g' -e 's/,,/,N\\/A,/g'", + "raw": "0", + "field_name": "PSU1_IOUT", + "field_pos": "2", + "mult": "1000", + "separator": "," + }, + { + "attr_name": "psu_mfr_id", + "bmc_cmd": "_rv=$(ipmitool fru print 2 2>/dev/null | tr -s ' ' | cut -d' ' -f3-5 | grep 'Manufacturer') && echo $_rv || echo 'Manufacturer : N/A'", + "raw": "0", + "separator": ":", + "field_name": "Manufacturer", + "field_pos": "2" + }, + { + "attr_name": "psu_model_name", + "bmc_cmd": "_rv=$(ipmitool fru print 2 2>/dev/null | tr -s ' ' | cut -d' ' -f3-5 | grep 'Name') && echo $_rv || echo 'Name : N/A'", + "raw": "0", + "separator": ":", + "field_name": "Name", + "field_pos": "2" + }, + { + "attr_name": "psu_serial_num", + "bmc_cmd": "_rv=$(ipmitool fru print 2 2>/dev/null | tr -s ' ' | cut -d' ' -f3-5 | grep 'Serial') && echo $_rv || echo 'Serial : N/A'", + "raw": "0", + "separator": ":", + "field_name": "Serial", + "field_pos": "2" + }, + + { + "attr_name": "psu_fan_dir", + "bmc_cmd": "ipmitool raw 0x3c 0x30 0x0 | xargs | cut -d' ' -f2", + "raw": "1", + "type": "raw" + }, + { + "attr_name": "psu_v_in", + "bmc_cmd": "ipmitool sdr get -c PSU1_VIN | sed -e 's/,,/,N\\/A,/g' -e 's/,,/,N\\/A,/g'", + "raw": "0", + "separator": ",", + "field_name": "PSU1_VIN", + "field_pos": "2", + "mult": "1000" + }, + { + "attr_name": "psu_i_in", + "bmc_cmd": "ipmitool sdr get -c PSU1_IIN | sed -e 's/,,/,N\\/A,/g' -e 's/,,/,N\\/A,/g'", + "raw": "0", + "separator": ",", + "field_name": "PSU1_IIN", + "field_pos": "2", + "mult": "1000" + } + ] + } + } + }, + "PSU2-EEPROM": { + "dev_info": { + "device_type": "PSU-EEPROM", + "device_name": "PSU2-EEPROM", + "device_parent": "MUX1", + "virt_parent": "PSU2" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x2", + "dev_addr": "0x51", + "dev_type": "psu_eeprom" + }, + "attr_list": [ + { + "attr_name":"psu_present", + "attr_devaddr":"0x30", + "attr_devtype":"cpld", + "attr_offset":"0x51", + "attr_mask":"0x2", + "attr_cmpval":"0x0", + "attr_len":"1" + }, + { + "attr_name":"psu_power_good", + "attr_devaddr":"0x30", + "attr_devtype":"cpld", + "attr_offset":"0x51", + "attr_mask":"0x20", + "attr_cmpval":"0x20", + "attr_len":"1" + } + ] + } + }, + "FAN-CTRL": { + "dev_info": { + "device_type": "FAN", + "device_name": "FAN-CTRL", + "device_parent": "" + }, + "bmc": { + "ipmitool": { + "attr_list": [ + { + "attr_name": "fan1_present", + "bmc_cmd": "ipmitool sdr -c get FAN0_PRSNT_L", + "raw": "0", + "field_name": "FAN0_PRSNT_L", + "field_pos": "5", + "separator": "," + }, + { + "attr_name": "fan2_present", + "bmc_cmd": "ipmitool sdr -c get FAN1_PRSNT_L", + "raw": "0", + "field_name": "FAN1_PRSNT_L", + "field_pos": "5", + "separator": "," + }, + { + "attr_name": "fan3_present", + "bmc_cmd": "ipmitool sdr -c get FAN2_PRSNT_L", + "raw": "0", + "field_name": "FAN2_PRSNT_L", + "field_pos": "5", + "separator": "," + }, + { + "attr_name": "fan4_present", + "bmc_cmd": "ipmitool sdr -c get FAN3_PRSNT_L", + "raw": "0", + "field_name": "FAN3_PRSNT_L", + "field_pos": "5", + "separator": "," + }, + { + "attr_name": "fan5_present", + "bmc_cmd": "ipmitool sdr -c get FAN4_PRSNT_L", + "raw": "0", + "field_name": "FAN4_PRSNT_L", + "field_pos": "5", + "separator": "," + }, + { + "attr_name": "fan1_input", + "bmc_cmd": "ipmitool sdr -c get FAN0_RPM | sed -e 's/,,/,N\\/A,/g' -e 's/,,/,N\\/A,/g'", + "raw": "0", + "field_name": "FAN0_RPM", + "field_pos": "2", + "separator": "," + }, + { + "attr_name": "fan2_input", + "bmc_cmd": "ipmitool sdr -c get FAN1_RPM | sed -e 's/,,/,N\\/A,/g' -e 's/,,/,N\\/A,/g'", + "raw": "0", + "field_name": "FAN1_RPM", + "field_pos": "2", + "separator": "," + }, + { + "attr_name": "fan3_input", + "bmc_cmd": "ipmitool sdr -c get FAN2_RPM | sed -e 's/,,/,N\\/A,/g' -e 's/,,/,N\\/A,/g'", + "raw": "0", + "field_name": "FAN2_RPM", + "field_pos": "2", + "separator": "," + }, + { + "attr_name": "fan4_input", + "bmc_cmd": "ipmitool sdr -c get FAN3_RPM | sed -e 's/,,/,N\\/A,/g' -e 's/,,/,N\\/A,/g'", + "raw": "0", + "field_name": "FAN3_RPM", + "field_pos": "2", + "separator": "," + }, + { + "attr_name": "fan5_input", + "bmc_cmd": "ipmitool sdr -c get FAN4_RPM | sed -e 's/,,/,N\\/A,/g' -e 's/,,/,N\\/A,/g'", + "raw": "0", + "field_name": "FAN4_RPM", + "field_pos": "2", + "separator": "," + }, + { + "attr_name": "fan1_direction", + "bmc_cmd": "ipmitool raw 0x3c 0x31 0x0 | xargs | cut -d' ' -f1", + "raw": "1", + "type": "raw" + }, + { + "attr_name": "fan2_direction", + "bmc_cmd": "ipmitool raw 0x3c 0x31 0x0 | xargs | cut -d' ' -f2", + "raw": "1", + "type": "raw" + }, + { + "attr_name": "fan3_direction", + "bmc_cmd": "ipmitool raw 0x3c 0x31 0x0 | xargs | cut -d' ' -f3", + "raw": "1", + "type": "raw" + }, + { + "attr_name": "fan4_direction", + "bmc_cmd": "ipmitool raw 0x3c 0x31 0x0 | xargs | cut -d' ' -f4", + "raw": "1", + "type": "raw" + }, + { + "attr_name": "fan5_direction", + "bmc_cmd": "ipmitool raw 0x3c 0x31 0x0 | xargs | cut -d' ' -f5", + "raw": "1", + "type": "raw" + } + ] + } + } + }, + "SYNC_LED": { + "dev_info": { + "device_type": "LED", + "device_name": "DIAG_LED" + }, + "dev_attr": { + "index": "0", + "flag": "rw" + }, + "i2c": { + "attr_list": [ + { + "attr_name": "green", + "bits": "3:0", + "descr": "Green", + "value": "0x09;0x0b", + "swpld_addr": "0x30", + "swpld_addr_offset": "0x82" + }, + { + "attr_name": "green_blink", + "bits": "3:0", + "descr": "Green Blinking", + "value": "0x0d;0x0f", + "swpld_addr": "0x30", + "swpld_addr_offset": "0x82" + }, + { + "attr_name": "yellow", + "bits": "3:0", + "descr": "Yellow", + "value": "0x08;0x0a", + "swpld_addr": "0x30", + "swpld_addr_offset": "0x82" + }, + { + "attr_name": "yellow_blink", + "bits": "3:0", + "descr": "Yellow Blinking", + "value": "0x0c;0x0e", + "swpld_addr": "0x30", + "swpld_addr_offset": "0x82" + }, + { + "attr_name": "off", + "bits": "3:2", + "descr": "Off", + "value": "0x1;0x0", + "swpld_addr": "0x30", + "swpld_addr_offset": "0x82" + } + ] + } + }, + "SYS_LED": { + "dev_info": { + "device_type": "LED", + "device_name": "SYS_LED" + }, + "dev_attr": { + "index": "0", + "flag": "rw" + }, + "i2c": { + "attr_list": [ + { + "attr_name": "green", + "bits": "7:4", + "descr": "Green", + "value": "0x09;0x0b", + "swpld_addr": "0x30", + "swpld_addr_offset": "0x81" + }, + { + "attr_name": "green_blink", + "bits": "7:4", + "descr": "Green Blinking", + "value": "0x0d;0x0f", + "swpld_addr": "0x30", + "swpld_addr_offset": "0x81" + }, + { + "attr_name": "yellow", + "bits": "7:4", + "descr": "Yellow", + "value": "0x08;0x0a", + "swpld_addr": "0x30", + "swpld_addr_offset": "0x81" + }, + { + "attr_name": "yellow_blink", + "bits": "7:4", + "descr": "Yellow Blinking", + "value": "0x0c;0x0e", + "swpld_addr": "0x30", + "swpld_addr_offset": "0x81" + }, + { + "attr_name": "off", + "bits": "7:6", + "descr": "Off", + "value": "0x01;0x0", + "swpld_addr": "0x30", + "swpld_addr_offset": "0x81" + } + ] + } + }, + "FAN_LED": { + "dev_info": { + "device_type": "LED", + "device_name": "FAN_LED" + }, + "dev_attr": { + "index": "0", + "flag": "ro" + }, + "i2c": { + "attr_list": [ + { + "attr_name": "green", + "bits": "3:0", + "descr": "Green", + "value": "0x09;0x0b", + "swpld_addr": "0x30", + "swpld_addr_offset": "0x83" + }, + { + "attr_name": "green_blink", + "bits": "3:0", + "descr": "Green Blinking", + "value": "0x0d;0x0f", + "swpld_addr": "0x30", + "swpld_addr_offset": "0x83" + }, + { + "attr_name": "yellow", + "bits": "3:0", + "descr": "Yellow", + "value": "0x08;0x0a", + "swpld_addr": "0x30", + "swpld_addr_offset": "0x83" + }, + { + "attr_name": "yellow_blink", + "bits": "3:0", + "descr": "Yellow Blinking", + "value": "0x0c;0x0e", + "swpld_addr": "0x30", + "swpld_addr_offset": "0x83" + }, + { + "attr_name": "off", + "bits": "3", + "descr": "Off", + "value": "0x0", + "swpld_addr": "0x30", + "swpld_addr_offset": "0x83" + } + ] + } + }, + "PSU1_LED": { + "dev_info": { + "device_type": "LED", + "device_name": "PSU_LED" + }, + "dev_attr": { + "index": "0", + "flag": "ro" + }, + "i2c": { + "attr_list": [ + { + "attr_name": "green", + "bits": "3:0", + "descr": "Green", + "value": "0x09;0x0b", + "swpld_addr": "0x30", + "swpld_addr_offset": "0x80" + }, + { + "attr_name": "green_blink", + "bits": "3:0", + "descr": "Green Blinking", + "value": "0x0d;0x0f", + "swpld_addr": "0x30", + "swpld_addr_offset": "0x80" + }, + { + "attr_name": "yellow", + "bits": "3:0", + "descr": "Yellow", + "value": "0x08;0x0a", + "swpld_addr": "0x30", + "swpld_addr_offset": "0x80" + }, + { + "attr_name": "yellow_blink", + "bits": "3:0", + "descr": "Yellow Blinking", + "value": "0x0c;0x0e", + "swpld_addr": "0x30", + "swpld_addr_offset": "0x80" + }, + { + "attr_name": "off", + "bits": "3", + "descr": "Off", + "value": "0x0", + "swpld_addr": "0x30", + "swpld_addr_offset": "0x80" + } + ] + } + }, + "PSU2_LED": { + "dev_info": { + "device_type": "LED", + "device_name": "PSU_LED" + }, + "dev_attr": { + "index": "1", + "flag": "ro" + }, + "i2c": { + "attr_list": [ + { + "attr_name": "green", + "bits": "7:4", + "descr": "Green", + "value": "0x09;0x0b", + "swpld_addr": "0x30", + "swpld_addr_offset": "0x80" + }, + { + "attr_name": "green_blink", + "bits": "7:4", + "descr": "Green Blinking", + "value": "0x0d;0x0f", + "swpld_addr": "0x30", + "swpld_addr_offset": "0x80" + }, + { + "attr_name": "yellow", + "bits": "7:4", + "descr": "Yellow", + "value": "0x08;0x0a", + "swpld_addr": "0x30", + "swpld_addr_offset": "0x80" + }, + { + "attr_name": "yellow_blink", + "bits": "7:4", + "descr": "Yellow Blinking", + "value": "0x0c;0x0e", + "swpld_addr": "0x30", + "swpld_addr_offset": "0x80" + }, + { + "attr_name": "off", + "bits": "7", + "descr": "Off", + "value": "0x0", + "swpld_addr": "0x30", + "swpld_addr_offset": "0x80" + } + ] + } + }, + "LOC_LED": { + "dev_info": { + "device_type": "LED", + "device_name": "LOC_LED" + }, + "dev_attr": { + "index": "0", + "flag": "rw" + }, + "i2c": { + "attr_list": [ + { + "attr_name": "blue", + "bits": "3:1", + "descr": "Blue", + "value": "0x04;0x05", + "swpld_addr": "0x30", + "swpld_addr_offset": "0x84" + }, + { + "attr_name": "blue_blink", + "bits": "3:1", + "descr": "Blue Blinking", + "value": "0x06;0x07", + "swpld_addr": "0x30", + "swpld_addr_offset": "0x84" + }, + { + "attr_name": "off", + "bits": "3:2", + "descr": "Off", + "value": "0x01;0x0", + "swpld_addr": "0x30", + "swpld_addr_offset": "0x84" + } + ] + } + }, + "PORT1": { + "dev_info": { + "device_type": "SFP28", + "device_name": "PORT1", + "device_parent": "MUX4" + }, + "dev_attr": { + "dev_idx": "1" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT1-EEPROM" + }, + { + "itf": "control", + "dev": "PORT1-CTRL" + } + ] + } + }, + "PORT1-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT1-EEPROM", + "device_parent": "MUX4", + "virt_parent": "PORT1" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x1a", + "dev_addr": "0x50", + "dev_type": "optoe2" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT1-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT1-CTRL", + "device_parent": "MUX4", + "virt_parent": "PORT1" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x1a", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x10", + "attr_mask": "0x0", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_rxlos", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x40", + "attr_mask": "0x0", + "attr_cmpval": "0x1", + "attr_len": "1" + }, + { + "attr_name": "xcvr_txfault", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x46", + "attr_mask": "0x0", + "attr_cmpval": "0x1", + "attr_len": "1" + }, + { + "attr_name": "xcvr_txdisable", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x70", + "attr_mask": "0x0", + "attr_cmpval": "0x1", + "attr_len": "1" + } + ] + } + }, + "PORT2": { + "dev_info": { + "device_type": "SFP28", + "device_name": "PORT2", + "device_parent": "MUX4" + }, + "dev_attr": { + "dev_idx": "2" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT2-EEPROM" + }, + { + "itf": "control", + "dev": "PORT2-CTRL" + } + ] + } + }, + "PORT2-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT2-EEPROM", + "device_parent": "MUX4", + "virt_parent": "PORT2" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x1b", + "dev_addr": "0x50", + "dev_type": "optoe2" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT2-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT2-CTRL", + "device_parent": "MUX4", + "virt_parent": "PORT2" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x1b", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x10", + "attr_mask": "0x1", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_rxlos", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x40", + "attr_mask": "0x1", + "attr_cmpval": "0x2", + "attr_len": "1" + }, + { + "attr_name": "xcvr_txfault", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x46", + "attr_mask": "0x1", + "attr_cmpval": "0x2", + "attr_len": "1" + }, + { + "attr_name": "xcvr_txdisable", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x70", + "attr_mask": "0x1", + "attr_cmpval": "0x2", + "attr_len": "1" + } + ] + } + }, + "PORT3": { + "dev_info": { + "device_type": "SFP28", + "device_name": "PORT3", + "device_parent": "MUX4" + }, + "dev_attr": { + "dev_idx": "3" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT3-EEPROM" + }, + { + "itf": "control", + "dev": "PORT3-CTRL" + } + ] + } + }, + "PORT3-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT3-EEPROM", + "device_parent": "MUX4", + "virt_parent": "PORT3" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x1c", + "dev_addr": "0x50", + "dev_type": "optoe2" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT3-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT3-CTRL", + "device_parent": "MUX4", + "virt_parent": "PORT3" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x1c", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x10", + "attr_mask": "0x2", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_rxlos", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x40", + "attr_mask": "0x2", + "attr_cmpval": "0x4", + "attr_len": "1" + }, + { + "attr_name": "xcvr_txfault", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x46", + "attr_mask": "0x2", + "attr_cmpval": "0x4", + "attr_len": "1" + }, + { + "attr_name": "xcvr_txdisable", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x70", + "attr_mask": "0x2", + "attr_cmpval": "0x4", + "attr_len": "1" + } + ] + } + }, + "PORT4": { + "dev_info": { + "device_type": "SFP28", + "device_name": "PORT4", + "device_parent": "MUX4" + }, + "dev_attr": { + "dev_idx": "4" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT4-EEPROM" + }, + { + "itf": "control", + "dev": "PORT4-CTRL" + } + ] + } + }, + "PORT4-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT4-EEPROM", + "device_parent": "MUX4", + "virt_parent": "PORT4" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x1d", + "dev_addr": "0x50", + "dev_type": "optoe2" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT4-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT4-CTRL", + "device_parent": "MUX4", + "virt_parent": "PORT4" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x1d", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x10", + "attr_mask": "0x3", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_rxlos", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x40", + "attr_mask": "0x3", + "attr_cmpval": "0x8", + "attr_len": "1" + }, + { + "attr_name": "xcvr_txfault", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x46", + "attr_mask": "0x3", + "attr_cmpval": "0x8", + "attr_len": "1" + }, + { + "attr_name": "xcvr_txdisable", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x70", + "attr_mask": "0x3", + "attr_cmpval": "0x8", + "attr_len": "1" + } + ] + } + }, + "PORT5": { + "dev_info": { + "device_type": "SFP28", + "device_name": "PORT5", + "device_parent": "MUX4" + }, + "dev_attr": { + "dev_idx": "5" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT5-EEPROM" + }, + { + "itf": "control", + "dev": "PORT5-CTRL" + } + ] + } + }, + "PORT5-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT5-EEPROM", + "device_parent": "MUX4", + "virt_parent": "PORT5" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x1e", + "dev_addr": "0x50", + "dev_type": "optoe2" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT5-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT5-CTRL", + "device_parent": "MUX4", + "virt_parent": "PORT5" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x1e", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x10", + "attr_mask": "0x4", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_rxlos", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x40", + "attr_mask": "0x4", + "attr_cmpval": "0x10", + "attr_len": "1" + }, + { + "attr_name": "xcvr_txfault", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x46", + "attr_mask": "0x4", + "attr_cmpval": "0x10", + "attr_len": "1" + }, + { + "attr_name": "xcvr_txdisable", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x70", + "attr_mask": "0x4", + "attr_cmpval": "0x10", + "attr_len": "1" + } + ] + } + }, + "PORT6": { + "dev_info": { + "device_type": "SFP28", + "device_name": "PORT6", + "device_parent": "MUX4" + }, + "dev_attr": { + "dev_idx": "6" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT6-EEPROM" + }, + { + "itf": "control", + "dev": "PORT6-CTRL" + } + ] + } + }, + "PORT6-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT6-EEPROM", + "device_parent": "MUX4", + "virt_parent": "PORT6" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x1f", + "dev_addr": "0x50", + "dev_type": "optoe2" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT6-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT6-CTRL", + "device_parent": "MUX4", + "virt_parent": "PORT6" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x1f", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x10", + "attr_mask": "0x5", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_rxlos", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x40", + "attr_mask": "0x5", + "attr_cmpval": "0x20", + "attr_len": "1" + }, + { + "attr_name": "xcvr_txfault", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x46", + "attr_mask": "0x5", + "attr_cmpval": "0x20", + "attr_len": "1" + }, + { + "attr_name": "xcvr_txdisable", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x70", + "attr_mask": "0x5", + "attr_cmpval": "0x20", + "attr_len": "1" + } + ] + } + }, + "PORT7": { + "dev_info": { + "device_type": "SFP28", + "device_name": "PORT7", + "device_parent": "MUX4" + }, + "dev_attr": { + "dev_idx": "7" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT7-EEPROM" + }, + { + "itf": "control", + "dev": "PORT7-CTRL" + } + ] + } + }, + "PORT7-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT7-EEPROM", + "device_parent": "MUX4", + "virt_parent": "PORT7" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x20", + "dev_addr": "0x50", + "dev_type": "optoe2" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT7-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT7-CTRL", + "device_parent": "MUX4", + "virt_parent": "PORT7" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x20", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x10", + "attr_mask": "0x6", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_rxlos", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x40", + "attr_mask": "0x6", + "attr_cmpval": "0x40", + "attr_len": "1" + }, + { + "attr_name": "xcvr_txfault", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x46", + "attr_mask": "0x6", + "attr_cmpval": "0x40", + "attr_len": "1" + }, + { + "attr_name": "xcvr_txdisable", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x70", + "attr_mask": "0x6", + "attr_cmpval": "0x40", + "attr_len": "1" + } + ] + } + }, + "PORT8": { + "dev_info": { + "device_type": "SFP28", + "device_name": "PORT8", + "device_parent": "MUX4" + }, + "dev_attr": { + "dev_idx": "8" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT8-EEPROM" + }, + { + "itf": "control", + "dev": "PORT8-CTRL" + } + ] + } + }, + "PORT8-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT8-EEPROM", + "device_parent": "MUX4", + "virt_parent": "PORT8" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x21", + "dev_addr": "0x50", + "dev_type": "optoe2" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT8-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT8-CTRL", + "device_parent": "MUX4", + "virt_parent": "PORT8" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x21", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x10", + "attr_mask": "0x7", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_rxlos", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x40", + "attr_mask": "0x7", + "attr_cmpval": "0x80", + "attr_len": "1" + }, + { + "attr_name": "xcvr_txfault", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x46", + "attr_mask": "0x7", + "attr_cmpval": "0x80", + "attr_len": "1" + }, + { + "attr_name": "xcvr_txdisable", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x70", + "attr_mask": "0x7", + "attr_cmpval": "0x80", + "attr_len": "1" + } + ] + } + }, + "PORT9": { + "dev_info": { + "device_type": "SFP28", + "device_name": "PORT9", + "device_parent": "MUX5" + }, + "dev_attr": { + "dev_idx": "9" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT9-EEPROM" + }, + { + "itf": "control", + "dev": "PORT9-CTRL" + } + ] + } + }, + "PORT9-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT9-EEPROM", + "device_parent": "MUX5", + "virt_parent": "PORT9" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x22", + "dev_addr": "0x50", + "dev_type": "optoe2" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT9-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT9-CTRL", + "device_parent": "MUX5", + "virt_parent": "PORT9" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x22", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x11", + "attr_mask": "0x0", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_rxlos", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x41", + "attr_mask": "0x0", + "attr_cmpval": "0x1", + "attr_len": "1" + }, + { + "attr_name": "xcvr_txfault", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x47", + "attr_mask": "0x0", + "attr_cmpval": "0x1", + "attr_len": "1" + }, + { + "attr_name": "xcvr_txdisable", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x71", + "attr_mask": "0x0", + "attr_cmpval": "0x1", + "attr_len": "1" + } + ] + } + }, + "PORT10": { + "dev_info": { + "device_type": "SFP28", + "device_name": "PORT10", + "device_parent": "MUX5" + }, + "dev_attr": { + "dev_idx": "10" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT10-EEPROM" + }, + { + "itf": "control", + "dev": "PORT10-CTRL" + } + ] + } + }, + "PORT10-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT10-EEPROM", + "device_parent": "MUX5", + "virt_parent": "PORT10" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x23", + "dev_addr": "0x50", + "dev_type": "optoe2" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT10-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT10-CTRL", + "device_parent": "MUX5", + "virt_parent": "PORT10" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x23", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x11", + "attr_mask": "0x1", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_rxlos", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x41", + "attr_mask": "0x1", + "attr_cmpval": "0x2", + "attr_len": "1" + }, + { + "attr_name": "xcvr_txfault", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x47", + "attr_mask": "0x1", + "attr_cmpval": "0x2", + "attr_len": "1" + }, + { + "attr_name": "xcvr_txdisable", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x71", + "attr_mask": "0x1", + "attr_cmpval": "0x2", + "attr_len": "1" + } + ] + } + }, + "PORT11": { + "dev_info": { + "device_type": "SFP28", + "device_name": "PORT11", + "device_parent": "MUX5" + }, + "dev_attr": { + "dev_idx": "11" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT11-EEPROM" + }, + { + "itf": "control", + "dev": "PORT11-CTRL" + } + ] + } + }, + "PORT11-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT11-EEPROM", + "device_parent": "MUX5", + "virt_parent": "PORT11" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x24", + "dev_addr": "0x50", + "dev_type": "optoe2" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT11-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT11-CTRL", + "device_parent": "MUX5", + "virt_parent": "PORT11" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x24", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x11", + "attr_mask": "0x2", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_rxlos", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x41", + "attr_mask": "0x2", + "attr_cmpval": "0x4", + "attr_len": "1" + }, + { + "attr_name": "xcvr_txfault", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x47", + "attr_mask": "0x2", + "attr_cmpval": "0x4", + "attr_len": "1" + }, + { + "attr_name": "xcvr_txdisable", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x71", + "attr_mask": "0x2", + "attr_cmpval": "0x4", + "attr_len": "1" + } + ] + } + }, + "PORT12": { + "dev_info": { + "device_type": "SFP28", + "device_name": "PORT12", + "device_parent": "MUX5" + }, + "dev_attr": { + "dev_idx": "12" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT12-EEPROM" + }, + { + "itf": "control", + "dev": "PORT12-CTRL" + } + ] + } + }, + "PORT12-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT12-EEPROM", + "device_parent": "MUX5", + "virt_parent": "PORT12" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x25", + "dev_addr": "0x50", + "dev_type": "optoe2" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT12-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT12-CTRL", + "device_parent": "MUX5", + "virt_parent": "PORT12" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x25", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x11", + "attr_mask": "0x3", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_rxlos", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x41", + "attr_mask": "0x3", + "attr_cmpval": "0x8", + "attr_len": "1" + }, + { + "attr_name": "xcvr_txfault", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x47", + "attr_mask": "0x3", + "attr_cmpval": "0x8", + "attr_len": "1" + }, + { + "attr_name": "xcvr_txdisable", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x71", + "attr_mask": "0x3", + "attr_cmpval": "0x8", + "attr_len": "1" + } + ] + } + }, + "PORT13": { + "dev_info": { + "device_type": "SFP28", + "device_name": "PORT13", + "device_parent": "MUX5" + }, + "dev_attr": { + "dev_idx": "13" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT13-EEPROM" + }, + { + "itf": "control", + "dev": "PORT13-CTRL" + } + ] + } + }, + "PORT13-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT13-EEPROM", + "device_parent": "MUX5", + "virt_parent": "PORT13" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x26", + "dev_addr": "0x50", + "dev_type": "optoe2" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT13-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT13-CTRL", + "device_parent": "MUX5", + "virt_parent": "PORT13" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x26", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x11", + "attr_mask": "0x4", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_rxlos", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x41", + "attr_mask": "0x4", + "attr_cmpval": "0x10", + "attr_len": "1" + }, + { + "attr_name": "xcvr_txfault", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x47", + "attr_mask": "0x4", + "attr_cmpval": "0x10", + "attr_len": "1" + }, + { + "attr_name": "xcvr_txdisable", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x71", + "attr_mask": "0x4", + "attr_cmpval": "0x10", + "attr_len": "1" + } + ] + } + }, + "PORT14": { + "dev_info": { + "device_type": "SFP28", + "device_name": "PORT14", + "device_parent": "MUX5" + }, + "dev_attr": { + "dev_idx": "14" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT14-EEPROM" + }, + { + "itf": "control", + "dev": "PORT14-CTRL" + } + ] + } + }, + "PORT14-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT14-EEPROM", + "device_parent": "MUX5", + "virt_parent": "PORT14" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x27", + "dev_addr": "0x50", + "dev_type": "optoe2" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT14-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT14-CTRL", + "device_parent": "MUX5", + "virt_parent": "PORT14" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x27", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x11", + "attr_mask": "0x5", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_rxlos", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x41", + "attr_mask": "0x5", + "attr_cmpval": "0x20", + "attr_len": "1" + }, + { + "attr_name": "xcvr_txfault", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x47", + "attr_mask": "0x5", + "attr_cmpval": "0x20", + "attr_len": "1" + }, + { + "attr_name": "xcvr_txdisable", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x71", + "attr_mask": "0x5", + "attr_cmpval": "0x20", + "attr_len": "1" + } + ] + } + }, + "PORT15": { + "dev_info": { + "device_type": "SFP28", + "device_name": "PORT15", + "device_parent": "MUX5" + }, + "dev_attr": { + "dev_idx": "15" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT15-EEPROM" + }, + { + "itf": "control", + "dev": "PORT15-CTRL" + } + ] + } + }, + "PORT15-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT15-EEPROM", + "device_parent": "MUX5", + "virt_parent": "PORT15" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x28", + "dev_addr": "0x50", + "dev_type": "optoe2" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT15-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT15-CTRL", + "device_parent": "MUX5", + "virt_parent": "PORT15" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x28", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x11", + "attr_mask": "0x6", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_rxlos", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x41", + "attr_mask": "0x6", + "attr_cmpval": "0x40", + "attr_len": "1" + }, + { + "attr_name": "xcvr_txfault", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x47", + "attr_mask": "0x6", + "attr_cmpval": "0x40", + "attr_len": "1" + }, + { + "attr_name": "xcvr_txdisable", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x71", + "attr_mask": "0x6", + "attr_cmpval": "0x40", + "attr_len": "1" + } + ] + } + }, + "PORT16": { + "dev_info": { + "device_type": "SFP28", + "device_name": "PORT16", + "device_parent": "MUX5" + }, + "dev_attr": { + "dev_idx": "16" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT16-EEPROM" + }, + { + "itf": "control", + "dev": "PORT16-CTRL" + } + ] + } + }, + "PORT16-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT16-EEPROM", + "device_parent": "MUX5", + "virt_parent": "PORT16" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x29", + "dev_addr": "0x50", + "dev_type": "optoe2" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT16-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT16-CTRL", + "device_parent": "MUX5", + "virt_parent": "PORT16" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x29", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x11", + "attr_mask": "0x7", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_rxlos", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x41", + "attr_mask": "0x7", + "attr_cmpval": "0x80", + "attr_len": "1" + }, + { + "attr_name": "xcvr_txfault", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x47", + "attr_mask": "0x7", + "attr_cmpval": "0x80", + "attr_len": "1" + }, + { + "attr_name": "xcvr_txdisable", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x71", + "attr_mask": "0x7", + "attr_cmpval": "0x80", + "attr_len": "1" + } + ] + } + }, + "PORT17": { + "dev_info": { + "device_type": "SFP28", + "device_name": "PORT17", + "device_parent": "MUX6" + }, + "dev_attr": { + "dev_idx": "17" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT17-EEPROM" + }, + { + "itf": "control", + "dev": "PORT17-CTRL" + } + ] + } + }, + "PORT17-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT17-EEPROM", + "device_parent": "MUX6", + "virt_parent": "PORT17" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x2a", + "dev_addr": "0x50", + "dev_type": "optoe2" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT17-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT17-CTRL", + "device_parent": "MUX6", + "virt_parent": "PORT17" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x2a", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x12", + "attr_mask": "0x0", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_rxlos", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x42", + "attr_mask": "0x0", + "attr_cmpval": "0x1", + "attr_len": "1" + }, + { + "attr_name": "xcvr_txfault", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x48", + "attr_mask": "0x0", + "attr_cmpval": "0x1", + "attr_len": "1" + }, + { + "attr_name": "xcvr_txdisable", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x72", + "attr_mask": "0x0", + "attr_cmpval": "0x1", + "attr_len": "1" + } + ] + } + }, + "PORT18": { + "dev_info": { + "device_type": "SFP28", + "device_name": "PORT18", + "device_parent": "MUX6" + }, + "dev_attr": { + "dev_idx": "18" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT18-EEPROM" + }, + { + "itf": "control", + "dev": "PORT18-CTRL" + } + ] + } + }, + "PORT18-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT18-EEPROM", + "device_parent": "MUX6", + "virt_parent": "PORT18" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x2b", + "dev_addr": "0x50", + "dev_type": "optoe2" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT18-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT18-CTRL", + "device_parent": "MUX6", + "virt_parent": "PORT18" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x2b", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x12", + "attr_mask": "0x1", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_rxlos", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x42", + "attr_mask": "0x1", + "attr_cmpval": "0x2", + "attr_len": "1" + }, + { + "attr_name": "xcvr_txfault", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x48", + "attr_mask": "0x1", + "attr_cmpval": "0x2", + "attr_len": "1" + }, + { + "attr_name": "xcvr_txdisable", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x72", + "attr_mask": "0x1", + "attr_cmpval": "0x2", + "attr_len": "1" + } + ] + } + }, + "PORT19": { + "dev_info": { + "device_type": "SFP28", + "device_name": "PORT19", + "device_parent": "MUX6" + }, + "dev_attr": { + "dev_idx": "19" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT19-EEPROM" + }, + { + "itf": "control", + "dev": "PORT19-CTRL" + } + ] + } + }, + "PORT19-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT19-EEPROM", + "device_parent": "MUX6", + "virt_parent": "PORT19" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x2c", + "dev_addr": "0x50", + "dev_type": "optoe2" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT19-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT19-CTRL", + "device_parent": "MUX6", + "virt_parent": "PORT19" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x2c", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x12", + "attr_mask": "0x2", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_rxlos", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x42", + "attr_mask": "0x2", + "attr_cmpval": "0x4", + "attr_len": "1" + }, + { + "attr_name": "xcvr_txfault", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x48", + "attr_mask": "0x2", + "attr_cmpval": "0x4", + "attr_len": "1" + }, + { + "attr_name": "xcvr_txdisable", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x72", + "attr_mask": "0x2", + "attr_cmpval": "0x4", + "attr_len": "1" + } + ] + } + }, + "PORT20": { + "dev_info": { + "device_type": "SFP28", + "device_name": "PORT20", + "device_parent": "MUX6" + }, + "dev_attr": { + "dev_idx": "20" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT20-EEPROM" + }, + { + "itf": "control", + "dev": "PORT20-CTRL" + } + ] + } + }, + "PORT20-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT20-EEPROM", + "device_parent": "MUX6", + "virt_parent": "PORT20" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x2d", + "dev_addr": "0x50", + "dev_type": "optoe2" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT20-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT20-CTRL", + "device_parent": "MUX6", + "virt_parent": "PORT20" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x2d", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x12", + "attr_mask": "0x3", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_rxlos", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x42", + "attr_mask": "0x3", + "attr_cmpval": "0x8", + "attr_len": "1" + }, + { + "attr_name": "xcvr_txfault", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x48", + "attr_mask": "0x3", + "attr_cmpval": "0x8", + "attr_len": "1" + }, + { + "attr_name": "xcvr_txdisable", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x72", + "attr_mask": "0x3", + "attr_cmpval": "0x8", + "attr_len": "1" + } + ] + } + }, + "PORT21": { + "dev_info": { + "device_type": "SFP28", + "device_name": "PORT21", + "device_parent": "MUX6" + }, + "dev_attr": { + "dev_idx": "21" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT21-EEPROM" + }, + { + "itf": "control", + "dev": "PORT21-CTRL" + } + ] + } + }, + "PORT21-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT21-EEPROM", + "device_parent": "MUX6", + "virt_parent": "PORT21" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x2e", + "dev_addr": "0x50", + "dev_type": "optoe2" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT21-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT21-CTRL", + "device_parent": "MUX6", + "virt_parent": "PORT21" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x2e", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x12", + "attr_mask": "0x4", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_rxlos", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x42", + "attr_mask": "0x4", + "attr_cmpval": "0x10", + "attr_len": "1" + }, + { + "attr_name": "xcvr_txfault", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x48", + "attr_mask": "0x4", + "attr_cmpval": "0x10", + "attr_len": "1" + }, + { + "attr_name": "xcvr_txdisable", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x72", + "attr_mask": "0x4", + "attr_cmpval": "0x10", + "attr_len": "1" + } + ] + } + }, + "PORT22": { + "dev_info": { + "device_type": "SFP28", + "device_name": "PORT22", + "device_parent": "MUX6" + }, + "dev_attr": { + "dev_idx": "22" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT22-EEPROM" + }, + { + "itf": "control", + "dev": "PORT22-CTRL" + } + ] + } + }, + "PORT22-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT22-EEPROM", + "device_parent": "MUX6", + "virt_parent": "PORT22" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x2f", + "dev_addr": "0x50", + "dev_type": "optoe2" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT22-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT22-CTRL", + "device_parent": "MUX6", + "virt_parent": "PORT22" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x2f", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x12", + "attr_mask": "0x5", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_rxlos", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x42", + "attr_mask": "0x5", + "attr_cmpval": "0x20", + "attr_len": "1" + }, + { + "attr_name": "xcvr_txfault", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x48", + "attr_mask": "0x5", + "attr_cmpval": "0x20", + "attr_len": "1" + }, + { + "attr_name": "xcvr_txdisable", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x72", + "attr_mask": "0x5", + "attr_cmpval": "0x20", + "attr_len": "1" + } + ] + } + }, + "PORT23": { + "dev_info": { + "device_type": "SFP28", + "device_name": "PORT23", + "device_parent": "MUX6" + }, + "dev_attr": { + "dev_idx": "23" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT23-EEPROM" + }, + { + "itf": "control", + "dev": "PORT23-CTRL" + } + ] + } + }, + "PORT23-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT23-EEPROM", + "device_parent": "MUX6", + "virt_parent": "PORT23" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x30", + "dev_addr": "0x50", + "dev_type": "optoe2" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT23-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT23-CTRL", + "device_parent": "MUX6", + "virt_parent": "PORT23" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x30", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x12", + "attr_mask": "0x6", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_rxlos", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x42", + "attr_mask": "0x6", + "attr_cmpval": "0x40", + "attr_len": "1" + }, + { + "attr_name": "xcvr_txfault", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x48", + "attr_mask": "0x6", + "attr_cmpval": "0x40", + "attr_len": "1" + }, + { + "attr_name": "xcvr_txdisable", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x72", + "attr_mask": "0x6", + "attr_cmpval": "0x40", + "attr_len": "1" + } + ] + } + }, + "PORT24": { + "dev_info": { + "device_type": "SFP28", + "device_name": "PORT24", + "device_parent": "MUX6" + }, + "dev_attr": { + "dev_idx": "24" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT24-EEPROM" + }, + { + "itf": "control", + "dev": "PORT24-CTRL" + } + ] + } + }, + "PORT24-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT24-EEPROM", + "device_parent": "MUX6", + "virt_parent": "PORT24" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x31", + "dev_addr": "0x50", + "dev_type": "optoe2" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT24-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT24-CTRL", + "device_parent": "MUX6", + "virt_parent": "PORT24" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x31", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x12", + "attr_mask": "0x7", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_rxlos", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x42", + "attr_mask": "0x7", + "attr_cmpval": "0x80", + "attr_len": "1" + }, + { + "attr_name": "xcvr_txfault", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x48", + "attr_mask": "0x7", + "attr_cmpval": "0x80", + "attr_len": "1" + }, + { + "attr_name": "xcvr_txdisable", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x72", + "attr_mask": "0x7", + "attr_cmpval": "0x80", + "attr_len": "1" + } + ] + } + }, + "PORT25": { + "dev_info": { + "device_type": "SFP28", + "device_name": "PORT25", + "device_parent": "MUX7" + }, + "dev_attr": { + "dev_idx": "25" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT25-EEPROM" + }, + { + "itf": "control", + "dev": "PORT25-CTRL" + } + ] + } + }, + "PORT25-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT25-EEPROM", + "device_parent": "MUX7", + "virt_parent": "PORT25" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x32", + "dev_addr": "0x50", + "dev_type": "optoe2" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT25-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT25-CTRL", + "device_parent": "MUX7", + "virt_parent": "PORT25" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x32", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x13", + "attr_mask": "0x0", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_rxlos", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x43", + "attr_mask": "0x0", + "attr_cmpval": "0x1", + "attr_len": "1" + }, + { + "attr_name": "xcvr_txfault", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x49", + "attr_mask": "0x0", + "attr_cmpval": "0x1", + "attr_len": "1" + }, + { + "attr_name": "xcvr_txdisable", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x73", + "attr_mask": "0x0", + "attr_cmpval": "0x1", + "attr_len": "1" + } + ] + } + }, + "PORT26": { + "dev_info": { + "device_type": "SFP28", + "device_name": "PORT26", + "device_parent": "MUX7" + }, + "dev_attr": { + "dev_idx": "26" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT26-EEPROM" + }, + { + "itf": "control", + "dev": "PORT26-CTRL" + } + ] + } + }, + "PORT26-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT26-EEPROM", + "device_parent": "MUX7", + "virt_parent": "PORT26" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x33", + "dev_addr": "0x50", + "dev_type": "optoe2" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT26-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT26-CTRL", + "device_parent": "MUX7", + "virt_parent": "PORT26" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x33", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x13", + "attr_mask": "0x1", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_rxlos", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x43", + "attr_mask": "0x1", + "attr_cmpval": "0x2", + "attr_len": "1" + }, + { + "attr_name": "xcvr_txfault", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x49", + "attr_mask": "0x1", + "attr_cmpval": "0x2", + "attr_len": "1" + }, + { + "attr_name": "xcvr_txdisable", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x73", + "attr_mask": "0x1", + "attr_cmpval": "0x2", + "attr_len": "1" + } + ] + } + }, + "PORT27": { + "dev_info": { + "device_type": "SFP28", + "device_name": "PORT27", + "device_parent": "MUX7" + }, + "dev_attr": { + "dev_idx": "27" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT27-EEPROM" + }, + { + "itf": "control", + "dev": "PORT27-CTRL" + } + ] + } + }, + "PORT27-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT27-EEPROM", + "device_parent": "MUX7", + "virt_parent": "PORT27" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x34", + "dev_addr": "0x50", + "dev_type": "optoe2" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT27-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT27-CTRL", + "device_parent": "MUX7", + "virt_parent": "PORT27" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x34", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x13", + "attr_mask": "0x2", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_rxlos", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x43", + "attr_mask": "0x2", + "attr_cmpval": "0x4", + "attr_len": "1" + }, + { + "attr_name": "xcvr_txfault", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x49", + "attr_mask": "0x2", + "attr_cmpval": "0x4", + "attr_len": "1" + }, + { + "attr_name": "xcvr_txdisable", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x73", + "attr_mask": "0x2", + "attr_cmpval": "0x4", + "attr_len": "1" + } + ] + } + }, + "PORT28": { + "dev_info": { + "device_type": "SFP28", + "device_name": "PORT28", + "device_parent": "MUX7" + }, + "dev_attr": { + "dev_idx": "28" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT28-EEPROM" + }, + { + "itf": "control", + "dev": "PORT28-CTRL" + } + ] + } + }, + "PORT28-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT28-EEPROM", + "device_parent": "MUX7", + "virt_parent": "PORT28" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x35", + "dev_addr": "0x50", + "dev_type": "optoe2" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT28-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT28-CTRL", + "device_parent": "MUX7", + "virt_parent": "PORT28" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x35", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x13", + "attr_mask": "0x3", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_rxlos", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x43", + "attr_mask": "0x3", + "attr_cmpval": "0x8", + "attr_len": "1" + }, + { + "attr_name": "xcvr_txfault", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x49", + "attr_mask": "0x3", + "attr_cmpval": "0x8", + "attr_len": "1" + }, + { + "attr_name": "xcvr_txdisable", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x73", + "attr_mask": "0x3", + "attr_cmpval": "0x8", + "attr_len": "1" + } + ] + } + }, + "PORT29": { + "dev_info": { + "device_type": "SFP28", + "device_name": "PORT29", + "device_parent": "MUX7" + }, + "dev_attr": { + "dev_idx": "29" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT29-EEPROM" + }, + { + "itf": "control", + "dev": "PORT29-CTRL" + } + ] + } + }, + "PORT29-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT29-EEPROM", + "device_parent": "MUX7", + "virt_parent": "PORT29" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x36", + "dev_addr": "0x50", + "dev_type": "optoe2" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT29-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT29-CTRL", + "device_parent": "MUX7", + "virt_parent": "PORT29" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x36", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x13", + "attr_mask": "0x4", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_rxlos", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x43", + "attr_mask": "0x4", + "attr_cmpval": "0x10", + "attr_len": "1" + }, + { + "attr_name": "xcvr_txfault", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x49", + "attr_mask": "0x4", + "attr_cmpval": "0x10", + "attr_len": "1" + }, + { + "attr_name": "xcvr_txdisable", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x73", + "attr_mask": "0x4", + "attr_cmpval": "0x10", + "attr_len": "1" + } + ] + } + }, + "PORT30": { + "dev_info": { + "device_type": "SFP28", + "device_name": "PORT30", + "device_parent": "MUX7" + }, + "dev_attr": { + "dev_idx": "30" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT30-EEPROM" + }, + { + "itf": "control", + "dev": "PORT30-CTRL" + } + ] + } + }, + "PORT30-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT30-EEPROM", + "device_parent": "MUX7", + "virt_parent": "PORT30" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x37", + "dev_addr": "0x50", + "dev_type": "optoe2" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT30-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT30-CTRL", + "device_parent": "MUX7", + "virt_parent": "PORT30" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x37", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x13", + "attr_mask": "0x5", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_rxlos", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x43", + "attr_mask": "0x5", + "attr_cmpval": "0x20", + "attr_len": "1" + }, + { + "attr_name": "xcvr_txfault", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x49", + "attr_mask": "0x5", + "attr_cmpval": "0x20", + "attr_len": "1" + }, + { + "attr_name": "xcvr_txdisable", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x73", + "attr_mask": "0x5", + "attr_cmpval": "0x20", + "attr_len": "1" + } + ] + } + }, + "PORT31": { + "dev_info": { + "device_type": "SFP28", + "device_name": "PORT31", + "device_parent": "MUX7" + }, + "dev_attr": { + "dev_idx": "31" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT31-EEPROM" + }, + { + "itf": "control", + "dev": "PORT31-CTRL" + } + ] + } + }, + "PORT31-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT31-EEPROM", + "device_parent": "MUX7", + "virt_parent": "PORT31" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x38", + "dev_addr": "0x50", + "dev_type": "optoe2" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT31-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT31-CTRL", + "device_parent": "MUX7", + "virt_parent": "PORT31" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x38", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x13", + "attr_mask": "0x6", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_rxlos", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x43", + "attr_mask": "0x6", + "attr_cmpval": "0x40", + "attr_len": "1" + }, + { + "attr_name": "xcvr_txfault", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x49", + "attr_mask": "0x6", + "attr_cmpval": "0x40", + "attr_len": "1" + }, + { + "attr_name": "xcvr_txdisable", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x73", + "attr_mask": "0x6", + "attr_cmpval": "0x40", + "attr_len": "1" + } + ] + } + }, + "PORT32": { + "dev_info": { + "device_type": "SFP28", + "device_name": "PORT32", + "device_parent": "MUX7" + }, + "dev_attr": { + "dev_idx": "32" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT32-EEPROM" + }, + { + "itf": "control", + "dev": "PORT32-CTRL" + } + ] + } + }, + "PORT32-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT32-EEPROM", + "device_parent": "MUX7", + "virt_parent": "PORT32" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x39", + "dev_addr": "0x50", + "dev_type": "optoe2" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT32-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT32-CTRL", + "device_parent": "MUX7", + "virt_parent": "PORT32" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x39", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x13", + "attr_mask": "0x7", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_rxlos", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x43", + "attr_mask": "0x7", + "attr_cmpval": "0x80", + "attr_len": "1" + }, + { + "attr_name": "xcvr_txfault", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x49", + "attr_mask": "0x7", + "attr_cmpval": "0x80", + "attr_len": "1" + }, + { + "attr_name": "xcvr_txdisable", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x73", + "attr_mask": "0x7", + "attr_cmpval": "0x80", + "attr_len": "1" + } + ] + } + }, + "PORT33": { + "dev_info": { + "device_type": "SFP28", + "device_name": "PORT33", + "device_parent": "MUX8" + }, + "dev_attr": { + "dev_idx": "33" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT33-EEPROM" + }, + { + "itf": "control", + "dev": "PORT33-CTRL" + } + ] + } + }, + "PORT33-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT33-EEPROM", + "device_parent": "MUX8", + "virt_parent": "PORT33" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x3a", + "dev_addr": "0x50", + "dev_type": "optoe2" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT33-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT33-CTRL", + "device_parent": "MUX8", + "virt_parent": "PORT33" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x3a", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x14", + "attr_mask": "0x0", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_rxlos", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x44", + "attr_mask": "0x0", + "attr_cmpval": "0x1", + "attr_len": "1" + }, + { + "attr_name": "xcvr_txfault", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x4a", + "attr_mask": "0x0", + "attr_cmpval": "0x1", + "attr_len": "1" + }, + { + "attr_name": "xcvr_txdisable", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x74", + "attr_mask": "0x0", + "attr_cmpval": "0x1", + "attr_len": "1" + } + ] + } + }, + "PORT34": { + "dev_info": { + "device_type": "SFP28", + "device_name": "PORT34", + "device_parent": "MUX8" + }, + "dev_attr": { + "dev_idx": "34" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT34-EEPROM" + }, + { + "itf": "control", + "dev": "PORT34-CTRL" + } + ] + } + }, + "PORT34-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT34-EEPROM", + "device_parent": "MUX8", + "virt_parent": "PORT34" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x3b", + "dev_addr": "0x50", + "dev_type": "optoe2" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT34-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT34-CTRL", + "device_parent": "MUX8", + "virt_parent": "PORT34" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x3b", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x14", + "attr_mask": "0x1", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_rxlos", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x44", + "attr_mask": "0x1", + "attr_cmpval": "0x2", + "attr_len": "1" + }, + { + "attr_name": "xcvr_txfault", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x4a", + "attr_mask": "0x1", + "attr_cmpval": "0x2", + "attr_len": "1" + }, + { + "attr_name": "xcvr_txdisable", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x74", + "attr_mask": "0x1", + "attr_cmpval": "0x2", + "attr_len": "1" + } + ] + } + }, + "PORT35": { + "dev_info": { + "device_type": "SFP28", + "device_name": "PORT35", + "device_parent": "MUX8" + }, + "dev_attr": { + "dev_idx": "35" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT35-EEPROM" + }, + { + "itf": "control", + "dev": "PORT35-CTRL" + } + ] + } + }, + "PORT35-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT35-EEPROM", + "device_parent": "MUX8", + "virt_parent": "PORT35" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x3c", + "dev_addr": "0x50", + "dev_type": "optoe2" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT35-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT35-CTRL", + "device_parent": "MUX8", + "virt_parent": "PORT35" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x3c", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x14", + "attr_mask": "0x2", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_rxlos", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x44", + "attr_mask": "0x2", + "attr_cmpval": "0x4", + "attr_len": "1" + }, + { + "attr_name": "xcvr_txfault", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x4a", + "attr_mask": "0x2", + "attr_cmpval": "0x4", + "attr_len": "1" + }, + { + "attr_name": "xcvr_txdisable", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x74", + "attr_mask": "0x2", + "attr_cmpval": "0x4", + "attr_len": "1" + } + ] + } + }, + "PORT36": { + "dev_info": { + "device_type": "SFP28", + "device_name": "PORT36", + "device_parent": "MUX8" + }, + "dev_attr": { + "dev_idx": "36" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT36-EEPROM" + }, + { + "itf": "control", + "dev": "PORT36-CTRL" + } + ] + } + }, + "PORT36-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT36-EEPROM", + "device_parent": "MUX8", + "virt_parent": "PORT36" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x3d", + "dev_addr": "0x50", + "dev_type": "optoe2" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT36-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT36-CTRL", + "device_parent": "MUX8", + "virt_parent": "PORT36" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x3d", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x14", + "attr_mask": "0x3", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_rxlos", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x44", + "attr_mask": "0x3", + "attr_cmpval": "0x8", + "attr_len": "1" + }, + { + "attr_name": "xcvr_txfault", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x4a", + "attr_mask": "0x3", + "attr_cmpval": "0x8", + "attr_len": "1" + }, + { + "attr_name": "xcvr_txdisable", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x74", + "attr_mask": "0x3", + "attr_cmpval": "0x8", + "attr_len": "1" + } + ] + } + }, + "PORT37": { + "dev_info": { + "device_type": "SFP28", + "device_name": "PORT37", + "device_parent": "MUX8" + }, + "dev_attr": { + "dev_idx": "37" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT37-EEPROM" + }, + { + "itf": "control", + "dev": "PORT37-CTRL" + } + ] + } + }, + "PORT37-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT37-EEPROM", + "device_parent": "MUX8", + "virt_parent": "PORT37" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x3e", + "dev_addr": "0x50", + "dev_type": "optoe2" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT37-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT37-CTRL", + "device_parent": "MUX8", + "virt_parent": "PORT37" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x3e", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x14", + "attr_mask": "0x4", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_rxlos", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x44", + "attr_mask": "0x4", + "attr_cmpval": "0x10", + "attr_len": "1" + }, + { + "attr_name": "xcvr_txfault", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x4a", + "attr_mask": "0x4", + "attr_cmpval": "0x10", + "attr_len": "1" + }, + { + "attr_name": "xcvr_txdisable", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x74", + "attr_mask": "0x4", + "attr_cmpval": "0x10", + "attr_len": "1" + } + ] + } + }, + "PORT38": { + "dev_info": { + "device_type": "SFP28", + "device_name": "PORT38", + "device_parent": "MUX8" + }, + "dev_attr": { + "dev_idx": "38" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT38-EEPROM" + }, + { + "itf": "control", + "dev": "PORT38-CTRL" + } + ] + } + }, + "PORT38-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT38-EEPROM", + "device_parent": "MUX8", + "virt_parent": "PORT38" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x3f", + "dev_addr": "0x50", + "dev_type": "optoe2" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT38-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT38-CTRL", + "device_parent": "MUX8", + "virt_parent": "PORT38" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x3f", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x14", + "attr_mask": "0x5", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_rxlos", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x44", + "attr_mask": "0x5", + "attr_cmpval": "0x20", + "attr_len": "1" + }, + { + "attr_name": "xcvr_txfault", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x4a", + "attr_mask": "0x5", + "attr_cmpval": "0x20", + "attr_len": "1" + }, + { + "attr_name": "xcvr_txdisable", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x74", + "attr_mask": "0x5", + "attr_cmpval": "0x20", + "attr_len": "1" + } + ] + } + }, + "PORT39": { + "dev_info": { + "device_type": "SFP28", + "device_name": "PORT39", + "device_parent": "MUX8" + }, + "dev_attr": { + "dev_idx": "39" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT39-EEPROM" + }, + { + "itf": "control", + "dev": "PORT39-CTRL" + } + ] + } + }, + "PORT39-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT39-EEPROM", + "device_parent": "MUX8", + "virt_parent": "PORT39" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x40", + "dev_addr": "0x50", + "dev_type": "optoe2" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT39-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT39-CTRL", + "device_parent": "MUX8", + "virt_parent": "PORT39" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x40", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x14", + "attr_mask": "0x6", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_rxlos", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x44", + "attr_mask": "0x6", + "attr_cmpval": "0x40", + "attr_len": "1" + }, + { + "attr_name": "xcvr_txfault", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x4a", + "attr_mask": "0x6", + "attr_cmpval": "0x40", + "attr_len": "1" + }, + { + "attr_name": "xcvr_txdisable", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x74", + "attr_mask": "0x6", + "attr_cmpval": "0x40", + "attr_len": "1" + } + ] + } + }, + "PORT40": { + "dev_info": { + "device_type": "SFP28", + "device_name": "PORT40", + "device_parent": "MUX8" + }, + "dev_attr": { + "dev_idx": "40" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT40-EEPROM" + }, + { + "itf": "control", + "dev": "PORT40-CTRL" + } + ] + } + }, + "PORT40-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT40-EEPROM", + "device_parent": "MUX8", + "virt_parent": "PORT40" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x41", + "dev_addr": "0x50", + "dev_type": "optoe2" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT40-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT40-CTRL", + "device_parent": "MUX8", + "virt_parent": "PORT40" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x41", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x14", + "attr_mask": "0x7", + "attr_cmpval": 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"dev_info": { + "device_type": "", + "device_name": "PORT41-EEPROM", + "device_parent": "MUX9", + "virt_parent": "PORT41" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x42", + "dev_addr": "0x50", + "dev_type": "optoe2" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT41-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT41-CTRL", + "device_parent": "MUX9", + "virt_parent": "PORT41" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x42", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x15", + "attr_mask": "0x0", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_rxlos", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x45", + "attr_mask": "0x0", + "attr_cmpval": "0x1", + "attr_len": "1" + }, + { + "attr_name": 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"device_parent": "MUX9", + "virt_parent": "PORT45" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x46", + "dev_addr": "0x50", + "dev_type": "optoe2" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT45-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT45-CTRL", + "device_parent": "MUX9", + "virt_parent": "PORT45" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x46", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x15", + "attr_mask": "0x4", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_rxlos", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x45", + "attr_mask": "0x4", + "attr_cmpval": "0x10", + "attr_len": "1" + }, + { + "attr_name": "xcvr_txfault", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + 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"attr_mask": "0x5", + "attr_cmpval": "0x20", + "attr_len": "1" + } + ] + } + }, + "PORT47": { + "dev_info": { + "device_type": "SFP28", + "device_name": "PORT47", + "device_parent": "MUX9" + }, + "dev_attr": { + "dev_idx": "47" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT47-EEPROM" + }, + { + "itf": "control", + "dev": "PORT47-CTRL" + } + ] + } + }, + "PORT47-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT47-EEPROM", + "device_parent": "MUX9", + "virt_parent": "PORT47" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x48", + "dev_addr": "0x50", + "dev_type": "optoe2" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT47-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT47-CTRL", + "device_parent": "MUX9", + "virt_parent": "PORT47" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x48", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_present", + 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"itf": "eeprom", + "dev": "PORT48-EEPROM" + }, + { + "itf": "control", + "dev": "PORT48-CTRL" + } + ] + } + }, + "PORT48-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT48-EEPROM", + "device_parent": "MUX9", + "virt_parent": "PORT48" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x49", + "dev_addr": "0x50", + "dev_type": "optoe2" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT48-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT48-CTRL", + "device_parent": "MUX9", + "virt_parent": "PORT48" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x49", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x15", + "attr_mask": "0x7", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_rxlos", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + 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"attr_mask": "0x0", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_lpmode", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x77", + "attr_mask": "0x0", + "attr_cmpval": "0x1", + "attr_len": "1" + } + ] + } + }, + "PORT50": { + "dev_info": { + "device_type": "QSFP28", + "device_name": "PORT50", + "device_parent": "MUX10" + }, + "dev_attr": { + "dev_idx": "50" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT50-EEPROM" + }, + { + "itf": "control", + "dev": "PORT50-CTRL" + } + ] + } + }, + "PORT50-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT50-EEPROM", + "device_parent": "MUX10", + "virt_parent": "PORT50" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x4b", + "dev_addr": "0x50", + "dev_type": "optoe1" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT50-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT50-CTRL", + "device_parent": "MUX10", + "virt_parent": "PORT50" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x4b", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x16", + "attr_mask": "0x1", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_intr_status", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x17", + "attr_mask": "0x1", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x76", + "attr_mask": "0x1", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_lpmode", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x77", + "attr_mask": "0x1", + "attr_cmpval": "0x2", + "attr_len": "1" + } + ] + } + }, + "PORT51": { + "dev_info": { + "device_type": "QSFP28", + "device_name": "PORT51", + "device_parent": "MUX10" + }, + "dev_attr": { + "dev_idx": "51" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT51-EEPROM" + }, + { + "itf": "control", + "dev": "PORT51-CTRL" + } + ] + } + }, + "PORT51-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT51-EEPROM", + "device_parent": "MUX10", + "virt_parent": "PORT51" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x4c", + "dev_addr": "0x50", + "dev_type": "optoe1" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT51-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT51-CTRL", + "device_parent": "MUX10", + "virt_parent": "PORT51" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x4c", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x16", + "attr_mask": "0x2", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_intr_status", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x17", + "attr_mask": "0x2", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x76", + "attr_mask": "0x2", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_lpmode", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x77", + "attr_mask": "0x2", + "attr_cmpval": "0x4", + "attr_len": "1" + } + ] + } + }, + "PORT52": { + "dev_info": { + "device_type": "QSFP28", + "device_name": "PORT52", + "device_parent": "MUX10" + }, + "dev_attr": { + "dev_idx": "52" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT52-EEPROM" + }, + { + "itf": "control", + "dev": "PORT52-CTRL" + } + ] + } + }, + "PORT52-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT52-EEPROM", + "device_parent": "MUX10", + "virt_parent": "PORT52" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x4d", + "dev_addr": "0x50", + "dev_type": "optoe1" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT52-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT52-CTRL", + "device_parent": "MUX10", + "virt_parent": "PORT52" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x4d", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x16", + "attr_mask": "0x3", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_intr_status", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x17", + "attr_mask": "0x3", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x76", + "attr_mask": "0x3", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_lpmode", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x77", + "attr_mask": "0x3", + "attr_cmpval": "0x8", + "attr_len": "1" + } + ] + } + }, + "PORT53": { + "dev_info": { + "device_type": "QSFP28", + "device_name": "PORT53", + "device_parent": "MUX10" + }, + "dev_attr": { + "dev_idx": "53" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT53-EEPROM" + }, + { + "itf": "control", + "dev": "PORT53-CTRL" + } + ] + } + }, + "PORT53-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT53-EEPROM", + "device_parent": "MUX10", + "virt_parent": "PORT53" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x4e", + "dev_addr": "0x50", + "dev_type": "optoe1" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT53-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT53-CTRL", + "device_parent": "MUX10", + "virt_parent": "PORT53" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x4e", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x16", + "attr_mask": "0x4", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_intr_status", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x17", + "attr_mask": "0x4", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x76", + "attr_mask": "0x4", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_lpmode", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x77", + "attr_mask": "0x4", + "attr_cmpval": "0x10", + "attr_len": "1" + } + ] + } + }, + "PORT54": { + "dev_info": { + "device_type": "QSFP28", + "device_name": "PORT54", + "device_parent": "MUX10" + }, + "dev_attr": { + "dev_idx": "54" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT54-EEPROM" + }, + { + "itf": "control", + "dev": "PORT54-CTRL" + } + ] + } + }, + "PORT54-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT54-EEPROM", + "device_parent": "MUX10", + "virt_parent": "PORT54" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x4f", + "dev_addr": "0x50", + "dev_type": "optoe1" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT54-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT54-CTRL", + "device_parent": "MUX10", + "virt_parent": "PORT54" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x4f", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x16", + "attr_mask": "0x5", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_intr_status", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x17", + "attr_mask": "0x5", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x76", + "attr_mask": "0x5", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_lpmode", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x77", + "attr_mask": "0x5", + "attr_cmpval": "0x20", + "attr_len": "1" + } + ] + } + } +} diff --git a/device/ufispace/x86_64-ufispace_s8901_54xc-r0/pddf_support b/device/ufispace/x86_64-ufispace_s8901_54xc-r0/pddf_support new file mode 100644 index 0000000000..e69de29bb2 diff --git a/device/ufispace/x86_64-ufispace_s8901_54xc-r0/platform.json b/device/ufispace/x86_64-ufispace_s8901_54xc-r0/platform.json new file mode 100644 index 0000000000..3db26c9842 --- /dev/null +++ b/device/ufispace/x86_64-ufispace_s8901_54xc-r0/platform.json @@ -0,0 +1,691 @@ +{ + "chassis": { + "name": "S8901-54XC", + "components": [ + { + "name": "CPLD1" + }, + { + "name": "CPLD2" + }, + { + "name": "BIOS" + }, + { + "name": "BMC" + } + ], + "fans": [ + { + "name": "Fan_1" + }, + { + "name": "Fan_2" + }, + { + "name": "Fan_3" + }, + { + "name": "Fan_4" + }, + { + "name": "Fan_5" + } + ], + "fan_drawers":[ + { + "name": "Fantray1", + "num_fans" : 1, + "fans": [ + { + "name": "Fan_1" + } + ] + }, + { + "name": "Fantray2", + "num_fans" : 1, + "fans": [ + { + "name": "Fan_2" + } + ] + }, + { + "name": "Fantray3", + "num_fans" : 1, + "fans": [ + { + "name": "Fan_3" + } + ] + }, + { + "name": "Fantray4", + "num_fans" : 1, + "fans": [ + { + "name": "Fan_4" + } + ] + }, + { + "name": "Fantray5", + "num_fans" : 1, + "fans": [ + { + "name": "Fan_5" + } + ] + } + ], + "psus": [ + { + "name": "PSU1", + "fans": [ + { + "name": "PSU1_FAN1" + } + ], + "thermals": [ + { + "name": "PSU1_TEMP1" + } + ] + }, + { + "name": "PSU2", + "fans": [ + { + "name": "PSU2_FAN1" + } + ], + "thermals": [ + { + "name": "PSU2_TEMP1" + } + ] + } + ], + "thermals": [ + { + "name": "TEMP_MAC" + }, + { + "name": "TEMP_ENV_MACCASE" + }, + { + "name": "TEMP_ENV_PSUCASE" + }, + { + "name": "TEMP_ENV_FANCONN" + }, + { + "name": "TEMP_ENV_FANCARD" + }, + { + "name": "TEMP_ENV_BMC" + }, + { + "name": "PSU-0-Thermal" + }, + { + "name": "PSU-1-Thermal" + } + ], + "sfps": [ + { + "name": "Ethernet0" + }, + { + "name": "Ethernet1" + }, + { + "name": "Ethernet2" + }, + { + "name": "Ethernet3" + }, + { + "name": "Ethernet4" + }, + { + "name": "Ethernet5" + }, + { + "name": "Ethernet6" + }, + { + "name": "Ethernet7" + }, + { + "name": "Ethernet8" + }, + { + "name": "Ethernet9" + }, + { + "name": "Ethernet10" + }, + { + "name": "Ethernet11" + }, + { + "name": "Ethernet12" + }, + { + "name": "Ethernet13" + }, + { + "name": "Ethernet14" + }, + { + "name": "Ethernet15" + }, + { + "name": "Ethernet16" + }, + { + "name": "Ethernet17" + }, + { + "name": "Ethernet18" + }, + { + "name": "Ethernet19" + }, + { + "name": "Ethernet20" + }, + { + "name": "Ethernet21" + }, + { + "name": "Ethernet22" + }, + { + "name": "Ethernet23" + }, + { + "name": "Ethernet24" + }, + { + "name": "Ethernet25" + }, + { + "name": "Ethernet26" + }, + { + "name": "Ethernet27" + }, + { + "name": "Ethernet28" + }, + { + "name": "Ethernet29" + }, + { + "name": "Ethernet30" + }, + { + "name": "Ethernet31" + }, + { + "name": "Ethernet32" + }, + { + "name": "Ethernet33" + }, + { + "name": "Ethernet34" + }, + { + "name": "Ethernet35" + }, + { + "name": "Ethernet36" + }, + { + "name": "Ethernet37" + }, + { + "name": "Ethernet38" + }, + { + "name": "Ethernet39" + }, + { + "name": "Ethernet40" + }, + { + "name": "Ethernet41" + }, + { + "name": "Ethernet42" + }, + { + "name": "Ethernet43" + }, + { + "name": "Ethernet44" + }, + { + "name": "Ethernet45" + }, + { + "name": "Ethernet46" + }, + { + "name": "Ethernet47" + }, + { + "name": "Ethernet48" + }, + { + "name": "Ethernet52" + }, + { + "name": "Ethernet56" + }, + { + "name": "Ethernet60" + }, + { + "name": "Ethernet64" + }, + { + "name": "Ethernet68" + }, + { + "name": "Ethernet72" + } + ] + }, + "interfaces": { + "Ethernet0": { + "index": "0", + "lanes": "1", + "breakout_modes": { + "1x25G[10G]" : [ "Eth0(Port0)" ] + } + }, + "Ethernet1": { + "index": "1", + "lanes": "2", + "breakout_modes": { + "1x25G[10G]" : [ "Eth1(Port1)" ] + } + }, + "Ethernet2": { + "index": "2", + "lanes": "3", + "breakout_modes": { + "1x25G[10G]" : [ "Eth2(Port2)" ] + } + }, + "Ethernet3": { + "index": "3", + "lanes": "4", + "breakout_modes": { + "1x25G[10G]" : [ "Eth3(Port3)" ] + } + }, + "Ethernet4": { + "index": "4", + "lanes": "5", + "breakout_modes": { + "1x25G[10G]" : [ "Eth4(Port4)" ] + } + }, + "Ethernet5": { + "index": "5", + "lanes": "6", + "breakout_modes": { + "1x25G[10G]" : [ "Eth5(Port5)" ] + } + }, + "Ethernet6": { + "index": "6", + "lanes": "7", + "breakout_modes": { + "1x25G[10G]" : [ "Eth6(Port6)" ] + } + }, + "Ethernet7": { + "index": "7", + "lanes": "8", + "breakout_modes": { + "1x25G[10G]" : [ "Eth7(Port7)" ] + } + }, + "Ethernet8": { + "index": "8", + "lanes": "9", + "breakout_modes": { + "1x25G[10G]" : [ "Eth8(Port8)" ] + } + }, + "Ethernet9": { + "index": "9", + "lanes": "10", + "breakout_modes": { + "1x25G[10G]" : [ "Eth9(Port9)" ] + } + }, + "Ethernet10": { + "index": "10", + "lanes": "11", + "breakout_modes": { + "1x25G[10G]" : [ "Eth10(Port10)" ] + } + }, + "Ethernet11": { + "index": "11", + "lanes": "12", + "breakout_modes": { + "1x25G[10G]" : [ "Eth11(Port11)" ] + } + }, + "Ethernet12": { + "index": "12", + "lanes": "13", + "breakout_modes": { + "1x25G[10G]" : [ "Eth12(Port12)" ] + } + }, + "Ethernet13": { + "index": "13", + "lanes": "14", + "breakout_modes": { + "1x25G[10G]" : [ "Eth13(Port13)" ] + } + }, + "Ethernet14": { + "index": "14", + "lanes": "15", + "breakout_modes": { + "1x25G[10G]" : [ "Eth14(Port14)" ] + } + }, + "Ethernet15": { + "index": "15", + "lanes": "16", + "breakout_modes": { + "1x25G[10G]" : [ "Eth15(Port15)" ] + } + }, + "Ethernet16": { + "index": "16", + "lanes": "17", + "breakout_modes": { + "1x25G[10G]" : [ "Eth16(Port16)" ] + } + }, + "Ethernet17": { + "index": "17", + "lanes": "18", + "breakout_modes": { + "1x25G[10G]" : [ "Eth17(Port17)" ] + } + }, + "Ethernet18": { + "index": "18", + "lanes": "19", + "breakout_modes": { + "1x25G[10G]" : [ "Eth18(Port18)" ] + } + }, + "Ethernet19": { + "index": "19", + "lanes": "20", + "breakout_modes": { + "1x25G[10G]" : [ "Eth19(Port19)" ] + } + }, + "Ethernet20": { + "index": "20", + "lanes": "21", + "breakout_modes": { + "1x25G[10G]" : [ "Eth20(Port20)" ] + } + }, + "Ethernet21": { + "index": "21", + "lanes": "22", + "breakout_modes": { + "1x25G[10G]" : [ "Eth21(Port21)" ] + } + }, + "Ethernet22": { + "index": "22", + "lanes": "23", + "breakout_modes": { + "1x25G[10G]" : [ "Eth22(Port22)" ] + } + }, + "Ethernet23": { + "index": "23", + "lanes": "24", + "breakout_modes": { + "1x25G[10G]" : [ "Eth23(Port23)" ] + } + }, + "Ethernet24": { + "index": "24", + "lanes": "25", + "breakout_modes": { + "1x25G[10G]" : [ "Eth24(Port24)" ] + } + }, + "Ethernet25": { + "index": "25", + "lanes": "26", + "breakout_modes": { + "1x25G[10G]" : [ "Eth25(Port25)" ] + } + }, + "Ethernet26": { + "index": "26", + "lanes": "27", + "breakout_modes": { + "1x25G[10G]" : [ "Eth26(Port26)" ] + } + }, + "Ethernet27": { + "index": "27", + "lanes": "28", + "breakout_modes": { + "1x25G[10G]" : [ "Eth27(Port27)" ] + } + }, + "Ethernet28": { + "index": "28", + "lanes": "41", + "breakout_modes": { + "1x25G[10G]" : [ "Eth28(Port28)" ] + } + }, + "Ethernet29": { + "index": "29", + "lanes": "42", + "breakout_modes": { + "1x25G[10G]" : [ "Eth29(Port29)" ] + } + }, + "Ethernet30": { + "index": "30", + "lanes": "43", + "breakout_modes": { + "1x25G[10G]" : [ "Eth30(Port30)" ] + } + }, + "Ethernet31": { + "index": "31", + "lanes": "44", + "breakout_modes": { + "1x25G[10G]" : [ "Eth31(Port31)" ] + } + }, + "Ethernet32": { + "index": "32", + "lanes": "61", + "breakout_modes": { + "1x25G[10G]" : [ "Eth32(Port32)" ] + } + }, + "Ethernet33": { + "index": "33", + "lanes": "62", + "breakout_modes": { + "1x25G[10G]" : [ "Eth33(Port33)" ] + } + }, + "Ethernet34": { + "index": "34", + "lanes": "63", + "breakout_modes": { + "1x25G[10G]" : [ "Eth34(Port34)" ] + } + }, + "Ethernet35": { + "index": "35", + "lanes": "64", + "breakout_modes": { + "1x25G[10G]" : [ "Eth35(Port35)" ] + } + }, + "Ethernet36": { + "index": "36", + "lanes": "65", + "breakout_modes": { + "1x25G[10G]" : [ "Eth36(Port36)" ] + } + }, + "Ethernet37": { + "index": "37", + "lanes": "66", + "breakout_modes": { + "1x25G[10G]" : [ "Eth37(Port37)" ] + } + }, + "Ethernet38": { + "index": "38", + "lanes": "67", + "breakout_modes": { + "1x25G[10G]" : [ "Eth38(Port38)" ] + } + }, + "Ethernet39": { + "index": "39", + "lanes": "68", + "breakout_modes": { + "1x25G[10G]" : [ "Eth39(Port39)" ] + } + }, + "Ethernet40": { + "index": "40", + "lanes": "69", + "breakout_modes": { + "1x25G[10G]" : [ "Eth40(Port40)" ] + } + }, + "Ethernet41": { + "index": "41", + "lanes": "70", + "breakout_modes": { + "1x25G[10G]" : [ "Eth41(Port41)" ] + } + }, + "Ethernet42": { + "index": "42", + "lanes": "71", + "breakout_modes": { + "1x25G[10G]" : [ "Eth42(Port42)" ] + } + }, + "Ethernet43": { + "index": "43", + "lanes": "72", + "breakout_modes": { + "1x25G[10G]" : [ "Eth43(Port43)" ] + } + }, + "Ethernet44": { + "index": "44", + "lanes": "73", + "breakout_modes": { + "1x25G[10G]" : [ "Eth44(Port44)" ] + } + }, + "Ethernet45": { + "index": "45", + "lanes": "74", + "breakout_modes": { + "1x25G[10G]" : [ "Eth45(Port45)" ] + } + }, + "Ethernet46": { + "index": "46", + "lanes": "75", + "breakout_modes": { + "1x25G[10G]" : [ "Eth46(Port46)" ] + } + }, + "Ethernet47": { + "index": "47", + "lanes": "76", + "breakout_modes": { + "1x25G[10G]" : [ "Eth47(Port47)" ] + } + }, + "Ethernet48": { + "index": "48,48,48,48", + "lanes": "37,38,39,40", + "breakout_modes": { + "1x100G[40G]" : [ "Eth48(Port48)" ] + } + }, + "Ethernet52": { + "index": "49,49,49,49", + "lanes": "33,34,35,36", + "breakout_modes": { + "1x100G[40G]" : [ "Eth49(Port49)" ] + } + }, + "Ethernet56": { + "index": "50,50,50,50", + "lanes": "45,46,47,48", + "breakout_modes": { + "1x100G[40G]" : [ "Eth50(Port50)" ] + } + }, + "Ethernet60": { + "index": "51,51,51,51", + "lanes": "49,50,51,52", + "breakout_modes": { + "1x100G[40G]" : [ "Eth51(Port51)" ] + } + }, + "Ethernet64": { + "index": "52,52,52,52", + "lanes": "53,54,55,56", + "breakout_modes": { + "1x100G[40G]" : [ "Eth52(Port52)" ], + "2x50G": ["Eth52/1(Port52)", "Eth52/2(Port52)"], + "4x25G": ["Eth52/1(Port52)", "Eth52/2(Port52)", "Eth52/3(Port52)", "Eth52/4(Port52)"], + "4x10G": ["Eth52/1(Port52)", "Eth52/2(Port52)", "Eth52/3(Port52)", "Eth52/4(Port52)"] + } + }, + "Ethernet68": { + "index": "53,53,53,53", + "lanes": "57,58,59,60", + "breakout_modes": { + "1x100G[40G]" : [ "Eth53(Port53)" ], + "2x50G": ["Eth53/1(Port53)", "Eth53/2(Port53)"], + "4x25G": ["Eth53/1(Port53)", "Eth53/2(Port53)", "Eth53/3(Port53)", "Eth53/4(Port53)"], + "4x10G": ["Eth53/1(Port53)", "Eth53/2(Port53)", "Eth53/3(Port53)", "Eth53/4(Port53)"] + } + } + } +} + diff --git a/device/ufispace/x86_64-ufispace_s8901_54xc-r0/platform_asic b/device/ufispace/x86_64-ufispace_s8901_54xc-r0/platform_asic new file mode 100644 index 0000000000..9604676527 --- /dev/null +++ b/device/ufispace/x86_64-ufispace_s8901_54xc-r0/platform_asic @@ -0,0 +1 @@ +broadcom diff --git a/device/ufispace/x86_64-ufispace_s8901_54xc-r0/platform_components.json b/device/ufispace/x86_64-ufispace_s8901_54xc-r0/platform_components.json new file mode 100644 index 0000000000..d122f45806 --- /dev/null +++ b/device/ufispace/x86_64-ufispace_s8901_54xc-r0/platform_components.json @@ -0,0 +1,12 @@ +{ + "chassis": { + "x86_64-ufispace_s8901_54xc-r0": { + "component": { + "CPLD1": { }, + "CPLD2": { }, + "BIOS": { }, + "BMC": {} + } + } + } +} diff --git a/device/ufispace/x86_64-ufispace_s8901_54xc-r0/platform_env.conf b/device/ufispace/x86_64-ufispace_s8901_54xc-r0/platform_env.conf new file mode 100644 index 0000000000..77fd88ac36 --- /dev/null +++ b/device/ufispace/x86_64-ufispace_s8901_54xc-r0/platform_env.conf @@ -0,0 +1 @@ +SYNCD_SHM_SIZE=256m diff --git a/device/ufispace/x86_64-ufispace_s8901_54xc-r0/pmon_daemon_control.json b/device/ufispace/x86_64-ufispace_s8901_54xc-r0/pmon_daemon_control.json new file mode 100644 index 0000000000..e348e0168f --- /dev/null +++ b/device/ufispace/x86_64-ufispace_s8901_54xc-r0/pmon_daemon_control.json @@ -0,0 +1,9 @@ +{ + "skip_pcied": false, + "skip_fancontrol": false, + "skip_thermalctld": false, + "skip_ledd": true, + "skip_xcvrd": false, + "skip_psud": false, + "skip_syseepromd": false +} diff --git a/device/ufispace/x86_64-ufispace_s8901_54xc-r0/system_health_monitoring_config.json b/device/ufispace/x86_64-ufispace_s8901_54xc-r0/system_health_monitoring_config.json new file mode 100644 index 0000000000..467d81304d --- /dev/null +++ b/device/ufispace/x86_64-ufispace_s8901_54xc-r0/system_health_monitoring_config.json @@ -0,0 +1,15 @@ +{ + "services_to_ignore": [], + "devices_to_ignore": [ + "asic", + "psu", + "fan" + ], + "user_defined_checkers": [], + "polling_interval": 60, + "led_color": { + "fault": "yellow", + "normal": "green", + "booting": "green_blink" + } +} diff --git a/device/ufispace/x86_64-ufispace_s9110_32x-r0/UFISPACE-S9110-32X/hwsku.json b/device/ufispace/x86_64-ufispace_s9110_32x-r0/UFISPACE-S9110-32X/hwsku.json new file mode 100644 index 0000000000..52ee4d8e9d --- /dev/null +++ b/device/ufispace/x86_64-ufispace_s9110_32x-r0/UFISPACE-S9110-32X/hwsku.json @@ -0,0 +1,136 @@ +{ + "interfaces": { + "Ethernet0": { + "default_brkout_mode": "1x100G[40G]" + }, + + "Ethernet4": { + "default_brkout_mode": "1x100G[40G]" + }, + + "Ethernet8": { + "default_brkout_mode": "1x100G[40G]" + }, + + "Ethernet12": { + "default_brkout_mode": "1x100G[40G]" + }, + + "Ethernet16": { + "default_brkout_mode": "1x100G[40G]" + }, + + "Ethernet20": { + "default_brkout_mode": "1x100G[40G]" + }, + + "Ethernet24": { + "default_brkout_mode": "1x100G[40G]" + }, + + "Ethernet28": { + "default_brkout_mode": "1x100G[40G]" + }, + + "Ethernet32": { + "default_brkout_mode": "1x100G[40G]" + }, + + "Ethernet36": { + "default_brkout_mode": "1x100G[40G]" + }, + + "Ethernet40": { + "default_brkout_mode": "1x100G[40G]" + }, + + "Ethernet44": { + "default_brkout_mode": "1x100G[40G]" + }, + + "Ethernet48": { + "default_brkout_mode": "1x100G[40G]" + }, + + "Ethernet52": { + "default_brkout_mode": "1x100G[40G]" + }, + + "Ethernet56": { + "default_brkout_mode": "1x100G[40G]" + }, + + "Ethernet60": { + "default_brkout_mode": "1x100G[40G]" + }, + + "Ethernet64": { + "default_brkout_mode": "1x100G[40G]" + }, + + "Ethernet68": { + "default_brkout_mode": "1x100G[40G]" + }, + + "Ethernet72": { + "default_brkout_mode": "1x100G[40G]" + }, + + "Ethernet76": { + "default_brkout_mode": "1x100G[40G]" + }, + + "Ethernet80": { + "default_brkout_mode": "1x100G[40G]" + }, + + "Ethernet84": { + "default_brkout_mode": "1x100G[40G]" + }, + + "Ethernet88": { + "default_brkout_mode": "1x100G[40G]" + }, + + "Ethernet92": { + "default_brkout_mode": "1x100G[40G]" + }, + + "Ethernet96": { + "default_brkout_mode": "1x100G[40G]" + }, + + "Ethernet100": { + "default_brkout_mode": "1x100G[40G]" + }, + + "Ethernet104": { + "default_brkout_mode": "1x100G[40G]" + }, + + "Ethernet108": { + "default_brkout_mode": "1x100G[40G]" + }, + + "Ethernet112": { + "default_brkout_mode": "1x100G[40G]" + }, + + "Ethernet116": { + "default_brkout_mode": "1x100G[40G]" + }, + + "Ethernet120": { + "default_brkout_mode": "1x100G[40G]" + }, + + "Ethernet124": { + "default_brkout_mode": "1x100G[40G]" + }, + + "Ethernet128": { + "default_brkout_mode": "1x10G" + } + } +} + diff --git a/device/ufispace/x86_64-ufispace_s9110_32x-r0/UFISPACE-S9110-32X/sai.profile b/device/ufispace/x86_64-ufispace_s9110_32x-r0/UFISPACE-S9110-32X/sai.profile new file mode 100644 index 0000000000..f602ed298f --- /dev/null +++ b/device/ufispace/x86_64-ufispace_s9110_32x-r0/UFISPACE-S9110-32X/sai.profile @@ -0,0 +1 @@ +SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/td3-x7-s9110-32x.config.bcm diff --git a/device/ufispace/x86_64-ufispace_s9110_32x-r0/UFISPACE-S9110-32X/td3-x7-s9110-32x.config.bcm b/device/ufispace/x86_64-ufispace_s9110_32x-r0/UFISPACE-S9110-32X/td3-x7-s9110-32x.config.bcm new file mode 100644 index 0000000000..94e9aa183a --- /dev/null +++ b/device/ufispace/x86_64-ufispace_s9110_32x-r0/UFISPACE-S9110-32X/td3-x7-s9110-32x.config.bcm @@ -0,0 +1,671 @@ +# cfg version: r2, 20230713 + +pbmp_xport_xe=0xFFFFFFFFFFFFFFFFFfffffffffffffffe + +# Software config lane swaps + +#FC0 QSFP port 0 +phy_chain_rx_lane_map_physical{1}=0x2310 +phy_chain_tx_lane_map_physical{1}=0x0132 + +#FC1 QSFP port 1 +phy_chain_rx_lane_map_physical{5}=0x3120 +phy_chain_tx_lane_map_physical{5}=0x1203 + +#FC2 QSFP port 2 +phy_chain_rx_lane_map_physical{9}=0x2310 +phy_chain_tx_lane_map_physical{9}=0x0213 + +#FC3 QSFP port 3 +phy_chain_rx_lane_map_physical{13}=0x3120 +phy_chain_tx_lane_map_physical{13}=0x1203 + +#FC4 QSFP port 4 +phy_chain_rx_lane_map_physical{17}=0x2310 +phy_chain_tx_lane_map_physical{17}=0x0132 + +#FC5 QSFP port 5 +phy_chain_rx_lane_map_physical{21}=0x3120 +phy_chain_tx_lane_map_physical{21}=0x1203 + +#FC6 QSFP port 6 +phy_chain_rx_lane_map_physical{25}=0x2310 +phy_chain_tx_lane_map_physical{25}=0x0132 + +#FC7 QSFP port 7 +phy_chain_rx_lane_map_physical{29}=0x3120 +phy_chain_tx_lane_map_physical{29}=0x1203 + +#FC8 QSFP port 8 +phy_chain_rx_lane_map_physical{33}=0x2310 +phy_chain_tx_lane_map_physical{33}=0x0132 + +#FC9 QSFP port 9 +phy_chain_rx_lane_map_physical{37}=0x3120 +phy_chain_tx_lane_map_physical{37}=0x1203 + +#FC10 QSFP port 10 +phy_chain_rx_lane_map_physical{41}=0x2310 +phy_chain_tx_lane_map_physical{41}=0x0132 + +#FC11 QSFP port 11 +phy_chain_rx_lane_map_physical{45}=0x3120 +phy_chain_tx_lane_map_physical{45}=0x1203 + +#FC12 QSFP port 12 +phy_chain_rx_lane_map_physical{49}=0x1320 +phy_chain_tx_lane_map_physical{49}=0x0231 + +#FC13 QSFP port 13 +phy_chain_rx_lane_map_physical{53}=0x3120 +phy_chain_tx_lane_map_physical{53}=0x1203 + +#FC14 QSFP port 14 +phy_chain_rx_lane_map_physical{57}=0x2310 +phy_chain_tx_lane_map_physical{57}=0x0132 + +#FC15 QSFP port 15 +phy_chain_rx_lane_map_physical{61}=0x3120 +phy_chain_tx_lane_map_physical{61}=0x1203 + +#FC16 QSFP port 17 +phy_chain_rx_lane_map_physical{65}=0x3021 +phy_chain_tx_lane_map_physical{65}=0x0312 + +#FC17 QSFP port 16 +phy_chain_rx_lane_map_physical{69}=0x1032 +phy_chain_tx_lane_map_physical{69}=0x3201 + +#FC18 QSFP port 19 +phy_chain_rx_lane_map_physical{73}=0x3021 +phy_chain_tx_lane_map_physical{73}=0x1302 + +#FC19 QSFP port 18 +phy_chain_rx_lane_map_physical{77}=0x2013 +phy_chain_tx_lane_map_physical{77}=0x3210 + +#FC20 QSFP port 21 +phy_chain_rx_lane_map_physical{81}=0x3021 +phy_chain_tx_lane_map_physical{81}=0x1302 + +#FC21 QSFP port 20 +phy_chain_rx_lane_map_physical{85}=0x2031 +phy_chain_tx_lane_map_physical{85}=0x3201 + +#FC22 QSFP port 23 +phy_chain_rx_lane_map_physical{89}=0x3021 +phy_chain_tx_lane_map_physical{89}=0x1302 + +#FC23 QSFP port 22 +phy_chain_rx_lane_map_physical{93}=0x2031 +phy_chain_tx_lane_map_physical{93}=0x3201 + +#FC24 QSFP port 25 +phy_chain_rx_lane_map_physical{97}=0x3021 +phy_chain_tx_lane_map_physical{97}=0x1302 + +#FC25 QSFP port 24 +phy_chain_rx_lane_map_physical{101}=0x2031 +phy_chain_tx_lane_map_physical{101}=0x1302 + +#FC26 QSFP port 27 +phy_chain_rx_lane_map_physical{105}=0x3021 +phy_chain_tx_lane_map_physical{105}=0x1302 + +#FC27 QSFP port 26 +phy_chain_rx_lane_map_physical{109}=0x2031 +phy_chain_tx_lane_map_physical{109}=0x1302 + +#FC28 QSFP port 29 +phy_chain_rx_lane_map_physical{113}=0x2031 +phy_chain_tx_lane_map_physical{113}=0x1302 + +#FC29 QSFP port 28 +phy_chain_rx_lane_map_physical{117}=0x2031 +phy_chain_tx_lane_map_physical{117}=0x1302 + +#FC30 QSFP port 31 +phy_chain_rx_lane_map_physical{121}=0x2031 +phy_chain_tx_lane_map_physical{121}=0x1302 + +#FC31 QSFP port 30 +phy_chain_rx_lane_map_physical{125}=0x2031 +phy_chain_tx_lane_map_physical{125}=0x3201 + +#MC management port (front port) +phy_chain_rx_lane_map_physical{129}=0x3210 +phy_chain_tx_lane_map_physical{129}=0x3210 + + +####### Polarity flips after lane swaps ###### + +#FC0 QSFP port 0 +phy_chain_rx_polarity_flip_physical{1}=0x1 +phy_chain_rx_polarity_flip_physical{2}=0x0 +phy_chain_rx_polarity_flip_physical{3}=0x0 +phy_chain_rx_polarity_flip_physical{4}=0x1 + +phy_chain_tx_polarity_flip_physical{1}=0x1 +phy_chain_tx_polarity_flip_physical{2}=0x0 +phy_chain_tx_polarity_flip_physical{3}=0x0 +phy_chain_tx_polarity_flip_physical{4}=0x1 + +#FC1 QSFP port 1 +phy_chain_rx_polarity_flip_physical{5}=0x0 +phy_chain_rx_polarity_flip_physical{6}=0x0 +phy_chain_rx_polarity_flip_physical{7}=0x1 +phy_chain_rx_polarity_flip_physical{8}=0x1 + +phy_chain_tx_polarity_flip_physical{5}=0x0 +phy_chain_tx_polarity_flip_physical{6}=0x1 +phy_chain_tx_polarity_flip_physical{7}=0x1 +phy_chain_tx_polarity_flip_physical{8}=0x1 + +#FC2 QSFP port 2 +phy_chain_rx_polarity_flip_physical{9}=0x1 +phy_chain_rx_polarity_flip_physical{10}=0x0 +phy_chain_rx_polarity_flip_physical{11}=0x0 +phy_chain_rx_polarity_flip_physical{12}=0x1 + +phy_chain_tx_polarity_flip_physical{9}=0x0 +phy_chain_tx_polarity_flip_physical{10}=0x1 +phy_chain_tx_polarity_flip_physical{11}=0x1 +phy_chain_tx_polarity_flip_physical{12}=0x0 + +#FC3 QSFP port 3 +phy_chain_rx_polarity_flip_physical{13}=0x0 +phy_chain_rx_polarity_flip_physical{14}=0x0 +phy_chain_rx_polarity_flip_physical{15}=0x1 +phy_chain_rx_polarity_flip_physical{16}=0x1 + +phy_chain_tx_polarity_flip_physical{13}=0x0 +phy_chain_tx_polarity_flip_physical{14}=0x1 +phy_chain_tx_polarity_flip_physical{15}=0x1 +phy_chain_tx_polarity_flip_physical{16}=0x1 + +#FC4 QSFP port 4 +phy_chain_rx_polarity_flip_physical{17}=0x1 +phy_chain_rx_polarity_flip_physical{18}=0x0 +phy_chain_rx_polarity_flip_physical{19}=0x0 +phy_chain_rx_polarity_flip_physical{20}=0x1 + +phy_chain_tx_polarity_flip_physical{17}=0x0 +phy_chain_tx_polarity_flip_physical{18}=0x0 +phy_chain_tx_polarity_flip_physical{19}=0x1 +phy_chain_tx_polarity_flip_physical{20}=0x1 + +#FC5 QSFP port 5 +phy_chain_rx_polarity_flip_physical{21}=0x0 +phy_chain_rx_polarity_flip_physical{22}=0x0 +phy_chain_rx_polarity_flip_physical{23}=0x1 +phy_chain_rx_polarity_flip_physical{24}=0x1 + +phy_chain_tx_polarity_flip_physical{21}=0x0 +phy_chain_tx_polarity_flip_physical{22}=0x1 +phy_chain_tx_polarity_flip_physical{23}=0x1 +phy_chain_tx_polarity_flip_physical{24}=0x1 + +#FC6 QSFP port 6 +phy_chain_rx_polarity_flip_physical{25}=0x0 +phy_chain_rx_polarity_flip_physical{26}=0x1 +phy_chain_rx_polarity_flip_physical{27}=0x1 +phy_chain_rx_polarity_flip_physical{28}=0x0 + +phy_chain_tx_polarity_flip_physical{25}=0x1 +phy_chain_tx_polarity_flip_physical{26}=0x0 +phy_chain_tx_polarity_flip_physical{27}=0x0 +phy_chain_tx_polarity_flip_physical{28}=0x0 + +#FC7 QSFP port 7 +phy_chain_rx_polarity_flip_physical{29}=0x1 +phy_chain_rx_polarity_flip_physical{30}=0x1 +phy_chain_rx_polarity_flip_physical{31}=0x0 +phy_chain_rx_polarity_flip_physical{32}=0x0 + +phy_chain_tx_polarity_flip_physical{29}=0x0 +phy_chain_tx_polarity_flip_physical{30}=0x1 +phy_chain_tx_polarity_flip_physical{31}=0x1 +phy_chain_tx_polarity_flip_physical{32}=0x1 + +#FC8 QSFP port 8 +phy_chain_rx_polarity_flip_physical{33}=0x0 +phy_chain_rx_polarity_flip_physical{34}=0x1 +phy_chain_rx_polarity_flip_physical{35}=0x1 +phy_chain_rx_polarity_flip_physical{36}=0x0 + +phy_chain_tx_polarity_flip_physical{33}=0x0 +phy_chain_tx_polarity_flip_physical{34}=0x0 +phy_chain_tx_polarity_flip_physical{35}=0x1 +phy_chain_tx_polarity_flip_physical{36}=0x1 + +#FC9 QSFP port 9 +phy_chain_rx_polarity_flip_physical{37}=0x1 +phy_chain_rx_polarity_flip_physical{38}=0x1 +phy_chain_rx_polarity_flip_physical{39}=0x0 +phy_chain_rx_polarity_flip_physical{40}=0x0 + +phy_chain_tx_polarity_flip_physical{37}=0x0 +phy_chain_tx_polarity_flip_physical{38}=0x1 +phy_chain_tx_polarity_flip_physical{39}=0x1 +phy_chain_tx_polarity_flip_physical{40}=0x1 + +#FC10 QSFP port 10 +phy_chain_rx_polarity_flip_physical{41}=0x0 +phy_chain_rx_polarity_flip_physical{42}=0x1 +phy_chain_rx_polarity_flip_physical{43}=0x1 +phy_chain_rx_polarity_flip_physical{44}=0x0 + +phy_chain_tx_polarity_flip_physical{41}=0x1 +phy_chain_tx_polarity_flip_physical{42}=0x0 +phy_chain_tx_polarity_flip_physical{43}=0x0 +phy_chain_tx_polarity_flip_physical{44}=0x1 + +#FC11 QSFP port 11 +phy_chain_rx_polarity_flip_physical{45}=0x1 +phy_chain_rx_polarity_flip_physical{46}=0x1 +phy_chain_rx_polarity_flip_physical{47}=0x0 +phy_chain_rx_polarity_flip_physical{48}=0x0 + +phy_chain_tx_polarity_flip_physical{45}=0x0 +phy_chain_tx_polarity_flip_physical{46}=0x1 +phy_chain_tx_polarity_flip_physical{47}=0x1 +phy_chain_tx_polarity_flip_physical{48}=0x1 + +#FC12 QSFP port 12 +phy_chain_rx_polarity_flip_physical{49}=0x0 +phy_chain_rx_polarity_flip_physical{50}=0x0 +phy_chain_rx_polarity_flip_physical{51}=0x1 +phy_chain_rx_polarity_flip_physical{52}=0x1 + +phy_chain_tx_polarity_flip_physical{49}=0x1 +phy_chain_tx_polarity_flip_physical{50}=0x0 +phy_chain_tx_polarity_flip_physical{51}=0x0 +phy_chain_tx_polarity_flip_physical{52}=0x1 + +#FC13 QSFP port 13 +phy_chain_rx_polarity_flip_physical{53}=0x0 +phy_chain_rx_polarity_flip_physical{54}=0x0 +phy_chain_rx_polarity_flip_physical{55}=0x1 +phy_chain_rx_polarity_flip_physical{56}=0x1 + +phy_chain_tx_polarity_flip_physical{53}=0x1 +phy_chain_tx_polarity_flip_physical{54}=0x0 +phy_chain_tx_polarity_flip_physical{55}=0x0 +phy_chain_tx_polarity_flip_physical{56}=0x0 + +#FC14 QSFP port 14 +phy_chain_rx_polarity_flip_physical{57}=0x1 +phy_chain_rx_polarity_flip_physical{58}=0x0 +phy_chain_rx_polarity_flip_physical{59}=0x0 +phy_chain_rx_polarity_flip_physical{60}=0x1 + +phy_chain_tx_polarity_flip_physical{57}=0x1 +phy_chain_tx_polarity_flip_physical{58}=0x1 +phy_chain_tx_polarity_flip_physical{59}=0x1 +phy_chain_tx_polarity_flip_physical{60}=0x0 + +#FC15 QSFP port 15 +phy_chain_rx_polarity_flip_physical{61}=0x0 +phy_chain_rx_polarity_flip_physical{62}=0x0 +phy_chain_rx_polarity_flip_physical{63}=0x1 +phy_chain_rx_polarity_flip_physical{64}=0x1 + +phy_chain_tx_polarity_flip_physical{61}=0x1 +phy_chain_tx_polarity_flip_physical{62}=0x0 +phy_chain_tx_polarity_flip_physical{63}=0x0 +phy_chain_tx_polarity_flip_physical{64}=0x0 + +#FC16 QSFP port 17 +phy_chain_rx_polarity_flip_physical{65}=0x1 +phy_chain_rx_polarity_flip_physical{66}=0x1 +phy_chain_rx_polarity_flip_physical{67}=0x0 +phy_chain_rx_polarity_flip_physical{68}=0x0 + +phy_chain_tx_polarity_flip_physical{65}=0x1 +phy_chain_tx_polarity_flip_physical{66}=0x0 +phy_chain_tx_polarity_flip_physical{67}=0x0 +phy_chain_tx_polarity_flip_physical{68}=0x0 + +#FC17 QSFP port 16 +phy_chain_rx_polarity_flip_physical{69}=0x1 +phy_chain_rx_polarity_flip_physical{70}=0x0 +phy_chain_rx_polarity_flip_physical{71}=0x1 +phy_chain_rx_polarity_flip_physical{72}=0x1 + +phy_chain_tx_polarity_flip_physical{69}=0x1 +phy_chain_tx_polarity_flip_physical{70}=0x0 +phy_chain_tx_polarity_flip_physical{71}=0x0 +phy_chain_tx_polarity_flip_physical{72}=0x0 + +#FC18 QSFP port 19 +phy_chain_rx_polarity_flip_physical{73}=0x1 +phy_chain_rx_polarity_flip_physical{74}=0x1 +phy_chain_rx_polarity_flip_physical{75}=0x0 +phy_chain_rx_polarity_flip_physical{76}=0x0 + +phy_chain_tx_polarity_flip_physical{73}=0x1 +phy_chain_tx_polarity_flip_physical{74}=0x1 +phy_chain_tx_polarity_flip_physical{75}=0x0 +phy_chain_tx_polarity_flip_physical{76}=0x1 + +#FC19 QSFP port 18 +phy_chain_rx_polarity_flip_physical{77}=0x0 +phy_chain_rx_polarity_flip_physical{78}=0x0 +phy_chain_rx_polarity_flip_physical{79}=0x1 +phy_chain_rx_polarity_flip_physical{80}=0x1 + +phy_chain_tx_polarity_flip_physical{77}=0x0 +phy_chain_tx_polarity_flip_physical{78}=0x0 +phy_chain_tx_polarity_flip_physical{79}=0x0 +phy_chain_tx_polarity_flip_physical{80}=0x0 + +#FC20 QSFP port 21 +phy_chain_rx_polarity_flip_physical{81}=0x1 +phy_chain_rx_polarity_flip_physical{82}=0x1 +phy_chain_rx_polarity_flip_physical{83}=0x0 +phy_chain_rx_polarity_flip_physical{84}=0x0 + +phy_chain_tx_polarity_flip_physical{81}=0x1 +phy_chain_tx_polarity_flip_physical{82}=0x1 +phy_chain_tx_polarity_flip_physical{83}=0x0 +phy_chain_tx_polarity_flip_physical{84}=0x1 + +#FC21 QSFP port 20 +phy_chain_rx_polarity_flip_physical{85}=0x0 +phy_chain_rx_polarity_flip_physical{86}=0x1 +phy_chain_rx_polarity_flip_physical{87}=0x1 +phy_chain_rx_polarity_flip_physical{88}=0x0 + +phy_chain_tx_polarity_flip_physical{85}=0x0 +phy_chain_tx_polarity_flip_physical{86}=0x0 +phy_chain_tx_polarity_flip_physical{87}=0x1 +phy_chain_tx_polarity_flip_physical{88}=0x0 + +#FC22 QSFP port 23 +phy_chain_rx_polarity_flip_physical{89}=0x1 +phy_chain_rx_polarity_flip_physical{90}=0x1 +phy_chain_rx_polarity_flip_physical{91}=0x0 +phy_chain_rx_polarity_flip_physical{92}=0x0 + +phy_chain_tx_polarity_flip_physical{89}=0x1 +phy_chain_tx_polarity_flip_physical{90}=0x1 +phy_chain_tx_polarity_flip_physical{91}=0x0 +phy_chain_tx_polarity_flip_physical{92}=0x1 + +#FC23 QSFP port 22 +phy_chain_rx_polarity_flip_physical{93}=0x0 +phy_chain_rx_polarity_flip_physical{94}=0x1 +phy_chain_rx_polarity_flip_physical{95}=0x1 +phy_chain_rx_polarity_flip_physical{96}=0x0 + +phy_chain_tx_polarity_flip_physical{93}=0x0 +phy_chain_tx_polarity_flip_physical{94}=0x1 +phy_chain_tx_polarity_flip_physical{95}=0x1 +phy_chain_tx_polarity_flip_physical{96}=0x0 + +#FC24 QSFP port 25 +phy_chain_rx_polarity_flip_physical{97}=0x1 +phy_chain_rx_polarity_flip_physical{98}=0x1 +phy_chain_rx_polarity_flip_physical{99}=0x0 +phy_chain_rx_polarity_flip_physical{100}=0x0 + +phy_chain_tx_polarity_flip_physical{97}=0x1 +phy_chain_tx_polarity_flip_physical{98}=0x1 +phy_chain_tx_polarity_flip_physical{99}=0x0 +phy_chain_tx_polarity_flip_physical{100}=0x1 + +#FC25 QSFP port 24 +phy_chain_rx_polarity_flip_physical{101}=0x0 +phy_chain_rx_polarity_flip_physical{102}=0x1 +phy_chain_rx_polarity_flip_physical{103}=0x1 +phy_chain_rx_polarity_flip_physical{104}=0x0 + +phy_chain_tx_polarity_flip_physical{101}=0x1 +phy_chain_tx_polarity_flip_physical{102}=0x0 +phy_chain_tx_polarity_flip_physical{103}=0x0 +phy_chain_tx_polarity_flip_physical{104}=0x1 + +#FC26 QSFP port 27 +phy_chain_rx_polarity_flip_physical{105}=0x0 +phy_chain_rx_polarity_flip_physical{106}=0x0 +phy_chain_rx_polarity_flip_physical{107}=0x1 +phy_chain_rx_polarity_flip_physical{108}=0x1 + +phy_chain_tx_polarity_flip_physical{105}=0x1 +phy_chain_tx_polarity_flip_physical{106}=0x1 +phy_chain_tx_polarity_flip_physical{107}=0x0 +phy_chain_tx_polarity_flip_physical{108}=0x1 + +#FC27 QSFP port 26 +phy_chain_rx_polarity_flip_physical{109}=0x1 +phy_chain_rx_polarity_flip_physical{110}=0x0 +phy_chain_rx_polarity_flip_physical{111}=0x0 +phy_chain_rx_polarity_flip_physical{112}=0x1 + +phy_chain_tx_polarity_flip_physical{109}=0x1 +phy_chain_tx_polarity_flip_physical{110}=0x0 +phy_chain_tx_polarity_flip_physical{111}=0x0 +phy_chain_tx_polarity_flip_physical{112}=0x0 + +#FC28 QSFP port 29 +phy_chain_rx_polarity_flip_physical{113}=0x0 +phy_chain_rx_polarity_flip_physical{114}=0x1 +phy_chain_rx_polarity_flip_physical{115}=0x1 +phy_chain_rx_polarity_flip_physical{116}=0x0 + +phy_chain_tx_polarity_flip_physical{113}=0x1 +phy_chain_tx_polarity_flip_physical{114}=0x1 +phy_chain_tx_polarity_flip_physical{115}=0x0 +phy_chain_tx_polarity_flip_physical{116}=0x1 + +#FC29 QSFP port 28 +phy_chain_rx_polarity_flip_physical{117}=0x1 +phy_chain_rx_polarity_flip_physical{118}=0x0 +phy_chain_rx_polarity_flip_physical{119}=0x0 +phy_chain_rx_polarity_flip_physical{120}=0x1 + +phy_chain_tx_polarity_flip_physical{117}=0x1 +phy_chain_tx_polarity_flip_physical{118}=0x0 +phy_chain_tx_polarity_flip_physical{119}=0x0 +phy_chain_tx_polarity_flip_physical{120}=0x1 + +#FC30 QSFP port 31 +phy_chain_rx_polarity_flip_physical{121}=0x1 +phy_chain_rx_polarity_flip_physical{122}=0x1 +phy_chain_rx_polarity_flip_physical{123}=0x0 +phy_chain_rx_polarity_flip_physical{124}=0x0 + +phy_chain_tx_polarity_flip_physical{121}=0x1 +phy_chain_tx_polarity_flip_physical{122}=0x1 +phy_chain_tx_polarity_flip_physical{123}=0x0 +phy_chain_tx_polarity_flip_physical{124}=0x1 + +#FC31 QSFP port 30 +phy_chain_rx_polarity_flip_physical{125}=0x1 +phy_chain_rx_polarity_flip_physical{126}=0x0 +phy_chain_rx_polarity_flip_physical{127}=0x0 +phy_chain_rx_polarity_flip_physical{128}=0x1 + +phy_chain_tx_polarity_flip_physical{125}=0x0 +phy_chain_tx_polarity_flip_physical{126}=0x0 +phy_chain_tx_polarity_flip_physical{127}=0x1 +phy_chain_tx_polarity_flip_physical{128}=0x0 + +#MC +phy_chain_rx_polarity_flip_physical{129}=0x0 +phy_chain_rx_polarity_flip_physical{130}=0x0 +phy_chain_rx_polarity_flip_physical{131}=0x0 +phy_chain_rx_polarity_flip_physical{132}=0x0 + +phy_chain_tx_polarity_flip_physical{129}=0x0 +phy_chain_tx_polarity_flip_physical{130}=0x0 +phy_chain_tx_polarity_flip_physical{131}=0x0 +phy_chain_tx_polarity_flip_physical{132}=0x0 + + +#Portmap setting +#FC0 QSFP port 0 +portmap_1=1:100 + +#FC1 QSFP port 1 +portmap_5=5:100 + +#FC2 QSFP port 2 +portmap_9=9:100 + +#FC3 QSFP port 3 +portmap_13=13:100 + +#FC4 QSFP port 4 +portmap_17=17:100 + +#FC5 QSFP port 5 +portmap_21=21:100 + +#FC6 QSFP port 6 +portmap_25=25:100 + +#FC7 QSFP port 7 +portmap_29=29:100 + +#FC8 QSFP port 8 +portmap_33=33:100 + +#FC9 QSFP port 9 +portmap_37=37:100 + +#FC10 QSFP port 10 +portmap_41=41:100 + +#FC11 QSFP port 11 +portmap_45=45:100 + +#FC12 QSFP port 12 +portmap_49=49:100 + +#FC13 QSFP port 13 +portmap_53=53:100 + +#FC14 QSFP port 14 +portmap_57=57:100 + +#FC15 QSFP port 15 +portmap_61=61:100 + +#MC port 66 - management port (front port) +portmap_66=129:10:m + + +#FC16 QSFP port 17 +portmap_67=65:100 + +#FC17 QSFP port 16 +portmap_71=69:100 + +#FC18 QSFP port 19 +portmap_75=73:100 + +#FC19 QSFP port 18 +portmap_79=77:100 + +#FC20 QSFP port 21 +portmap_83=81:100 + +#FC21 QSFP port 20 +portmap_87=85:100 + +#FC22 QSFP port 23 +portmap_91=89:100 + +#FC23 QSFP port 22 +portmap_95=93:100 + +#FC24 QSFP port 25 +portmap_99=97:100 + +#FC25 QSFP port 24 +portmap_103=101:100 + +#FC26 QSFP port 27 +portmap_107=105:100 + +#FC27 QSFP port 26 +portmap_111=109:100 + +#FC28 QSFP port 29 +portmap_115=113:100 + +#FC29 QSFP port 28 +portmap_119=117:100 + +#FC30 QSFP port 31 +portmap_123=121:100 + +#FC31 QSFP port 30 +portmap_127=125:100 + + +dport_map_enable=1 + +dport_map_port_1=1 +dport_map_port_5=2 +dport_map_port_9=3 +dport_map_port_13=4 +dport_map_port_17=5 +dport_map_port_21=6 +dport_map_port_25=7 +dport_map_port_29=8 +dport_map_port_33=9 +dport_map_port_37=10 +dport_map_port_41=11 +dport_map_port_45=12 +dport_map_port_49=13 +dport_map_port_53=14 +dport_map_port_57=15 +dport_map_port_61=16 +dport_map_port_71=17 +dport_map_port_67=18 +dport_map_port_79=19 +dport_map_port_75=20 +dport_map_port_87=21 +dport_map_port_83=22 +dport_map_port_95=23 +dport_map_port_91=24 +dport_map_port_103=25 +dport_map_port_99=26 +dport_map_port_111=27 +dport_map_port_107=28 +dport_map_port_119=29 +dport_map_port_115=30 +dport_map_port_127=31 +dport_map_port_123=32 +dport_map_port_66=33 + + +core_clock_frequency=1525 +dpp_clock_ratio=2:3 +oversubscribe_mode=1 +parity_enable=0 +mem_cache_enable=0 +l2_mem_entries=32768 +l3_mem_entries=16384 +fpem_mem_entries=131072 +l2xmsg_mode=1 +bcm_num_cos=10 +bcm_stat_interval=2000000 +cdma_timeout_usec=3000000 +ipv6_lpm_128b_enable=0x1 +l3_max_ecmp_mode=1 +lpm_scaling_enable=0 +max_vp_lags=0 +miim_intr_enable=0 +module_64ports=1 +schan_intr_enable=0 +stable_size=0x5500000 +tdma_timeout_usec=3000000 +skip_L2_USER_ENTRY=0 +bcm_tunnel_term_compatible_mode=1 +ifp_inports_support_enable=1 +port_flex_enable=1 + + diff --git a/device/ufispace/x86_64-ufispace_s9110_32x-r0/custom_led.bin b/device/ufispace/x86_64-ufispace_s9110_32x-r0/custom_led.bin new file mode 100644 index 0000000000..82315db109 Binary files /dev/null and b/device/ufispace/x86_64-ufispace_s9110_32x-r0/custom_led.bin differ diff --git a/device/ufispace/x86_64-ufispace_s9110_32x-r0/default_sku b/device/ufispace/x86_64-ufispace_s9110_32x-r0/default_sku new file mode 100644 index 0000000000..de055565f6 --- /dev/null +++ b/device/ufispace/x86_64-ufispace_s9110_32x-r0/default_sku @@ -0,0 +1 @@ +UFISPACE-S9110-32X t1 diff --git a/device/ufispace/x86_64-ufispace_s9110_32x-r0/fancontrol b/device/ufispace/x86_64-ufispace_s9110_32x-r0/fancontrol new file mode 100644 index 0000000000..1234cd994f --- /dev/null +++ b/device/ufispace/x86_64-ufispace_s9110_32x-r0/fancontrol @@ -0,0 +1,10 @@ +# Configuration file generated by pwmconfig, changes will be lost +INTERVAL=10 +DEVPATH= +DEVNAME= +FCTEMPS= +FCFANS= +MINTEMP= +MAXTEMP= +MINSTART= +MINSTOP= diff --git a/device/ufispace/x86_64-ufispace_s9110_32x-r0/installer.conf b/device/ufispace/x86_64-ufispace_s9110_32x-r0/installer.conf new file mode 100644 index 0000000000..74b02f0766 --- /dev/null +++ b/device/ufispace/x86_64-ufispace_s9110_32x-r0/installer.conf @@ -0,0 +1,4 @@ +CONSOLE_PORT=0x3f8 +CONSOLE_DEV=0 +CONSOLE_SPEED=115200 +ONIE_PLATFORM_EXTRA_CMDLINE_LINUX="modprobe.blacklist=gpio_ich,qat_c3xxx nomodeset pcie_aspm=off" diff --git a/device/ufispace/x86_64-ufispace_s9110_32x-r0/led_proc_init.soc b/device/ufispace/x86_64-ufispace_s9110_32x-r0/led_proc_init.soc new file mode 100644 index 0000000000..a65a2eac30 --- /dev/null +++ b/device/ufispace/x86_64-ufispace_s9110_32x-r0/led_proc_init.soc @@ -0,0 +1,4 @@ +led stop +m0 load 0 0x3800 /usr/share/sonic/platform/custom_led.bin +led auto on +led start diff --git a/device/ufispace/x86_64-ufispace_s9110_32x-r0/pcie.yaml b/device/ufispace/x86_64-ufispace_s9110_32x-r0/pcie.yaml new file mode 100644 index 0000000000..821972019e --- /dev/null +++ b/device/ufispace/x86_64-ufispace_s9110_32x-r0/pcie.yaml @@ -0,0 +1,172 @@ +- bus: '00' + dev: '00' + fn: '0' + id: '1980' + name: 'Host bridge: Intel Corporation Atom Processor C3000 Series System Agent (rev + 11)' +- bus: '00' + dev: '04' + fn: '0' + id: 19a1 + name: 'Host bridge: Intel Corporation Atom Processor C3000 Series Error Registers + (rev 11)' +- bus: '00' + dev: '05' + fn: '0' + id: 19a2 + name: 'Generic system peripheral [0807]: Intel Corporation Atom Processor C3000 + Series Root Complex Event Collector (rev 11)' +- bus: '00' + dev: '06' + fn: '0' + id: 19a3 + name: 'PCI bridge: Intel Corporation Atom Processor C3000 Series Integrated QAT + Root Port (rev 11)' +- bus: '00' + dev: 09 + fn: '0' + id: 19a4 + name: 'PCI bridge: Intel Corporation Atom Processor C3000 Series PCI Express Root + Port #0 (rev 11)' +- bus: '00' + dev: 0a + fn: '0' + id: 19a5 + name: 'PCI bridge: Intel Corporation Atom Processor C3000 Series PCI Express Root + Port #1 (rev 11)' +- bus: '00' + dev: 0b + fn: '0' + id: 19a6 + name: 'PCI bridge: Intel Corporation Atom Processor C3000 Series PCI Express Root + Port #2 (rev 11)' +- bus: '00' + dev: 0e + fn: '0' + id: 19a8 + name: 'PCI bridge: Intel Corporation Atom Processor C3000 Series PCI Express Root + Port #4 (rev 11)' +- bus: '00' + dev: 0f + fn: '0' + id: 19a9 + name: 'PCI bridge: Intel Corporation Atom Processor C3000 Series PCI Express Root + Port #5 (rev 11)' +- bus: '00' + dev: '10' + fn: '0' + id: 19aa + name: 'PCI bridge: Intel Corporation Atom Processor C3000 Series PCI Express Root + Port #6 (rev 11)' +- bus: '00' + dev: '11' + fn: '0' + id: 19ab + name: 'PCI bridge: Intel Corporation Atom Processor C3000 Series PCI Express Root + Port #7 (rev 11)' +- bus: '00' + dev: '12' + fn: '0' + id: 19ac + name: 'System peripheral: Intel Corporation Atom Processor C3000 Series SMBus Contoller + - Host (rev 11)' +- bus: '00' + dev: '14' + fn: '0' + id: 19c2 + name: 'SATA controller: Intel Corporation Atom Processor C3000 Series SATA Controller + 1 (rev 11)' +- bus: '00' + dev: '15' + fn: '0' + id: 19d0 + name: 'USB controller: Intel Corporation Atom Processor C3000 Series USB 3.0 xHCI + Controller (rev 11)' +- bus: '00' + dev: '16' + fn: '0' + id: 19d1 + name: 'PCI bridge: Intel Corporation Atom Processor C3000 Series Integrated LAN + Root Port #0 (rev 11)' +- bus: '00' + dev: '17' + fn: '0' + id: 19d2 + name: 'PCI bridge: Intel Corporation Atom Processor C3000 Series Integrated LAN + Root Port #1 (rev 11)' +- bus: '00' + dev: '18' + fn: '0' + id: 19d3 + name: 'Communication controller: Intel Corporation Atom Processor C3000 Series ME + HECI 1 (rev 11)' +- bus: '00' + dev: 1c + fn: '0' + id: 19db + name: 'SD Host controller: Intel Corporation Device 19db (rev 11)' +- bus: '00' + dev: 1f + fn: '0' + id: 19dc + name: 'ISA bridge: Intel Corporation Atom Processor C3000 Series LPC or eSPI (rev + 11)' +- bus: '00' + dev: 1f + fn: '2' + id: 19de + name: 'Memory controller: Intel Corporation Atom Processor C3000 Series Power Management + Controller (rev 11)' +- bus: '00' + dev: 1f + fn: '4' + id: 19df + name: 'SMBus: Intel Corporation Atom Processor C3000 Series SMBus controller (rev + 11)' +- bus: '00' + dev: 1f + fn: '5' + id: 19e0 + name: 'Serial bus controller [0c80]: Intel Corporation Atom Processor C3000 Series + SPI Controller (rev 11)' +- bus: '01' + dev: '00' + fn: '0' + id: 19e2 + name: 'Co-processor: Intel Corporation Atom Processor C3000 Series QuickAssist Technology + (rev 11)' +- bus: '04' + dev: '00' + fn: '0' + id: b870 + name: 'Ethernet controller: Broadcom Inc. and subsidiaries Device b870 (rev 01)' +- bus: '06' + dev: '00' + fn: '0' + id: '1533' + name: 'Ethernet controller: Intel Corporation I210 Gigabit Network Connection (rev + 03)' +- bus: 09 + dev: '00' + fn: '0' + id: 15c3 + name: 'Ethernet controller: Intel Corporation Ethernet Connection X553 Backplane + (rev 11)' +- bus: 09 + dev: '00' + fn: '1' + id: 15c3 + name: 'Ethernet controller: Intel Corporation Ethernet Connection X553 Backplane + (rev 11)' +- bus: 0a + dev: '00' + fn: '0' + id: 15c3 + name: 'Ethernet controller: Intel Corporation Ethernet Connection X553 Backplane + (rev 11)' +- bus: 0a + dev: '00' + fn: '1' + id: 15c3 + name: 'Ethernet controller: Intel Corporation Ethernet Connection X553 Backplane + (rev 11)' diff --git a/device/ufispace/x86_64-ufispace_s9110_32x-r0/pddf/pd-plugin.json b/device/ufispace/x86_64-ufispace_s9110_32x-r0/pddf/pd-plugin.json new file mode 100644 index 0000000000..99e551ed28 --- /dev/null +++ b/device/ufispace/x86_64-ufispace_s9110_32x-r0/pddf/pd-plugin.json @@ -0,0 +1,85 @@ +{ + + "XCVR": + { + "xcvr_present": + { + "i2c": + { + "valmap-SFP": {"1":true, "0":false }, + "valmap-QSFP-DD": {"1":true, "0":false}, + "valmap-QSFP": {"1":true, "0":false} + } + }, + "status": + { + "inserted": "1", + "removed": "0" + } + }, + + "PSU": + { + "psu_present": + { + "i2c": + { + "valmap": { "1":true, "0":false } + } + }, + + "psu_power_good": + { + "i2c": + { + "valmap": { "1": true, "0":false } + } + }, + + "psu_fan_dir": + { + "bmc": + { + "valmap": {"0": "UNKNOWN", "1":"INTAKE", "2":"EXHAUST"} + } + }, + "psu_support_list": + [ + {"Manufacturer": "FSPGROUP","Name": "YNEE0750EM", "MaxSpd": "PSU_AC_FAN_MAX_SPEED", "Type":"AC"}, + {"Manufacturer": "FSPGROUP","Name": "YNEE0750BM", "MaxSpd": "PSU_AC_FAN_MAX_SPEED", "Type":"AC"}, + {"Manufacturer": "FSPGROUP","Name": "YNEE0750AM", "MaxSpd": "PSU_DC_FAN_MAX_SPEED", "Type":"DC"} + ], + + "valmap": {"PSU_AC_FAN_MAX_SPEED": "26500", "PSU_DC_FAN_MAX_SPEED":"29000", "DEFAULT_TYPE": "AC"} + }, + + "FAN": + { + "direction": + { + "bmc": + { + "valmap": {"0": "UNKNOWN", "1":"INTAKE", "2":"EXHAUST"} + } + }, + + "present": + { + "i2c": + { + "valmap": {"1":true, "0":false} + }, + "bmc": + { + "valmap": {"Device Present":true, "Device Absent":false} + } + }, + "FAN_R_MAX_SPEED":"32000", + "FAN_F_MAX_SPEED":"36200" + }, + + "REBOOT_CAUSE": + { + "reboot_cause_file": "/host/reboot-cause/reboot-cause.txt" + } +} diff --git a/device/ufispace/x86_64-ufispace_s9110_32x-r0/pddf/pddf-device-beta.json b/device/ufispace/x86_64-ufispace_s9110_32x-r0/pddf/pddf-device-beta.json new file mode 100644 index 0000000000..df96c65547 --- /dev/null +++ b/device/ufispace/x86_64-ufispace_s9110_32x-r0/pddf/pddf-device-beta.json @@ -0,0 +1,4667 @@ +{ + "PLATFORM": { + "num_psus": 2, + "num_fantrays": 4, + "num_fans_pertray": 2, + "num_ports": 33, + "num_temps": 7, + "pddf_dev_types": { + "description": "PDDF supported devices", + "CPLD": [ + "i2c_cpld" + ], + "PSU": [ + "psu_eeprom", + "psu_pmbus" + ], + "PORT_MODULE": [ + "pddf_xcvr" + ] + }, + "std_perm_kos": [ + "i2c-i801", + "i2c-ismt" + ], + "std_kos": [ + "i2c_dev", + "i2c_mux_pca954x", + "optoe" + ], + "pddf_kos": [ + "pddf_client_module", + "pddf_cpld_module", + "pddf_cpld_driver", + "pddf_mux_module", + "pddf_xcvr_module", + "pddf_xcvr_driver_module", + "pddf_psu_driver_module", + "pddf_psu_module", + "pddf_fan_driver_module", + "pddf_fan_module", + "pddf_led_module" + ], + "custom_kos": [ + "x86-64-ufispace-s9110-32x-lpc", + "x86-64-ufispace-s9110-32x-sys-eeprom", + "pddf_custom_sysstatus_module" + ] + }, + "SYSTEM": { + "dev_info": { + "device_type": "CPU", + "device_name": "ROOT_COMPLEX", + "device_parent": null + }, + "i2c": { + "CONTROLLERS": [ + { + "dev_name": "i2c-1", + "dev": "SMBUS1" + }, + { + "dev_name": "i2c-0", + "dev": "SMBUS0" + } + ] + } + }, + "SMBUS1": { + "dev_info": { + "device_type": "SMBUS", "device_name": "SMBUS1", "device_parent": "SYSTEM" + }, + "i2c": { + "topo_info": { + "dev_addr": "0x1" + }, + "DEVICES": [ + { + "dev": "EEPROM1" + }, + { + "dev": "MUX1" + } + ] + } + }, + "EEPROM1": { + "dev_info": { + "device_type": "EEPROM", + "device_name": "EEPROM1", + "device_parent": "SMBUS1" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x1", + "dev_addr": "0x57", + "dev_type": "sys_eeprom" + }, + "dev_attr": { + "access_mode": "BLOCK" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "MUX1": { + "dev_info": { "device_type": "MUX", "device_name": "MUX1", "device_parent": "SMBUS1"}, + "i2c": { + "topo_info": { + "parent_bus": "0x1", + "dev_addr": "0x70", + "dev_type": "pca9548" + }, + "dev_attr": { + "virt_bus": "0x2", + "idle_state": "-2" + }, + "channel": [ + { + "chn": "0", + "dev": "CPLD1" + }, + { + "chn": "0", + "dev": "CPLD2" + }, + { + "chn": "0", + "dev": "PSU1" + }, + { + "chn": "0", + "dev": "PSU2" + } + ] + } + }, + "CPLD1": { + "dev_info": { + "device_type": "CPLD", + "device_name": "CPLD1", + "device_parent": "MUX1" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x2", + "dev_addr": "0x30", + "dev_type": "i2c_cpld" + }, + "dev_attr": {} + } + }, + "CPLD2": { + "dev_info": { + "device_type": "CPLD", + "device_name": "CPLD2", + "device_parent": "MUX1" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x2", + "dev_addr": "0x31", + "dev_type": "i2c_cpld" + }, + "dev_attr": {} + } + }, + "SMBUS0": { + "dev_info": { + "device_type": "SMBUS", "device_name": "SMBUS0", "device_parent": "SYSTEM" + }, + "i2c": { + "topo_info": { + "dev_addr": "0x0" + }, + "DEVICES": [ + { + "dev": "MUX2" + } + ] + } + }, + "MUX2": { + "dev_info": { "device_type":"MUX", "device_name":"MUX2", "device_parent":"SMBUS0"}, + "i2c": + { + "topo_info": { "parent_bus":"0x0", "dev_addr":"0x72", "dev_type":"pca9548"}, + "dev_attr": { "virt_bus":"0xa", "idle_state":"-2"}, + "channel": + [ + { "chn":"0", "dev":"MUX3" }, + { "chn":"1", "dev":"MUX4" }, + { "chn":"2", "dev":"MUX5" }, + { "chn":"3", "dev":"MUX6" }, + { "chn":"4", "dev":"MUX7" } + ] + } + }, + "MUX3": { + "dev_info": { "device_type":"MUX", "device_name":"MUX3", "device_parent":"MUX2"}, + "i2c": { + "topo_info": { "parent_bus":"0xa", "dev_addr":"0x73", "dev_type":"pca9548"}, + "dev_attr": { "virt_bus":"0x12", "idle_state":"-2"}, + "channel": [ + { "chn":"0", "dev":"PORT1" }, + { "chn":"1", "dev":"PORT2" }, + { "chn":"2", "dev":"PORT3" }, + { "chn":"3", "dev":"PORT4" }, + { "chn":"4", "dev":"PORT5" }, + { "chn":"5", "dev":"PORT6" }, + { "chn":"6", "dev":"PORT7" }, + { "chn":"7", "dev":"PORT8" } + ] + } + }, + "MUX4": { + "dev_info": { "device_type":"MUX", "device_name":"MUX4", "device_parent":"MUX2"}, + "i2c": { + "topo_info": { "parent_bus":"0xb", "dev_addr":"0x73", "dev_type":"pca9548"}, + "dev_attr": { "virt_bus":"0x1a", "idle_state":"-2"}, + "channel": [ + { "chn":"0", "dev":"PORT9" }, + { "chn":"1", "dev":"PORT10" }, + { "chn":"2", "dev":"PORT11" }, + { "chn":"3", "dev":"PORT12" }, + { "chn":"4", "dev":"PORT13" }, + { "chn":"5", "dev":"PORT14" }, + { "chn":"6", "dev":"PORT15" }, + { "chn":"7", "dev":"PORT16" } + ] + } + }, + "MUX5": { + "dev_info": { "device_type":"MUX", "device_name":"MUX5", "device_parent":"MUX2"}, + "i2c": { + "topo_info": { "parent_bus":"0xc", "dev_addr":"0x73", "dev_type":"pca9548"}, + "dev_attr": { "virt_bus":"0x22", "idle_state":"-2"}, + "channel": [ + { "chn":"0", "dev":"PORT17" }, + { "chn":"1", "dev":"PORT18" }, + { "chn":"2", "dev":"PORT19" }, + { "chn":"3", "dev":"PORT20" }, + { "chn":"4", "dev":"PORT21" }, + { "chn":"5", "dev":"PORT22" }, + { "chn":"6", "dev":"PORT23" }, + { "chn":"7", "dev":"PORT24" } + ] + } + }, + "MUX6": { + "dev_info": { "device_type":"MUX", "device_name":"MUX6", "device_parent":"MUX2"}, + "i2c": { + "topo_info": { "parent_bus":"0xd", "dev_addr":"0x73", "dev_type":"pca9548"}, + "dev_attr": { "virt_bus":"0x2a", "idle_state":"-2"}, + "channel": [ + { "chn":"0", "dev":"PORT25" }, + { "chn":"1", "dev":"PORT26" }, + { "chn":"2", "dev":"PORT27" }, + { "chn":"3", "dev":"PORT28" }, + { "chn":"4", "dev":"PORT29" }, + { "chn":"5", "dev":"PORT30" }, + { "chn":"6", "dev":"PORT31" }, + { "chn":"7", "dev":"PORT32" } + ] + } + }, + "MUX7": { + "dev_info": { "device_type":"MUX", "device_name":"MUX7", "device_parent":"MUX2"}, + "i2c": { + "topo_info": { "parent_bus":"0xe", "dev_addr":"0x73", "dev_type":"pca9548"}, + "dev_attr": { "virt_bus":"0x32", "idle_state":"-2"}, + "channel": [ + { "chn":"1", "dev":"PORT33" } + ] + } + }, + "TEMP1": { + "dev_info": { + "device_type": "TEMP_SENSOR", + "device_name": "TEMP1", + "device_parent": "SMBUS0" + }, + "dev_attr": { + "display_name": "TEMP_MAC" + }, + "bmc": { + "ipmitool": { + "attr_list": [ + { + "attr_name": "temp1_input", + "bmc_cmd": "ipmitool sdr get -c TEMP_MAC", + "raw": "0", + "separator": ",", + "field_name": "TEMP_MAC", + "field_pos": "2" + }, + { + "attr_name": "temp1_high_threshold", + "bmc_cmd": "ipmitool sdr get -c TEMP_MAC", + "raw": "0", + "separator": ",", + "field_name": "TEMP_MAC", + "field_pos": "13" + }, + { + "attr_name": "temp1_high_crit_threshold", + "bmc_cmd": "ipmitool sdr get -c TEMP_MAC", + "raw": "0", + "separator": ",", + "field_name": "TEMP_MAC", + "field_pos": "12" + } + ] + } + } + }, + "TEMP2": { + "dev_info": { + "device_type": "TEMP_SENSOR", + "device_name": "TEMP2", + "device_parent": "SMBUS0" + }, + "dev_attr": { + "display_name": "TEMP_ENV_MACCASE" + }, + "bmc": { + "ipmitool": { + "attr_list": [ + { + "attr_name": "temp1_input", + "bmc_cmd": "ipmitool sdr get -c TEMP_ENV_MACCASE", + "raw": "0", + "separator": ",", + "field_name": "TEMP_ENV_MACCASE", + "field_pos": "2" + }, + { + "attr_name": "temp1_high_threshold", + "bmc_cmd": "ipmitool sdr get -c TEMP_ENV_MACCASE", + "raw": "0", + "separator": ",", + "field_name": "TEMP_ENV_MACCASE", + "field_pos": "13" + }, + { + "attr_name": "temp1_high_crit_threshold", + "bmc_cmd": "ipmitool sdr get -c TEMP_ENV_MACCASE", + "raw": "0", + "separator": ",", + "field_name": "TEMP_ENV_MACCASE", + "field_pos": "12" + } + ] + } + } + }, + "TEMP3": { + "dev_info": { + "device_type": "TEMP_SENSOR", + "device_name": "TEMP3", + "device_parent": "SMBUS0" + }, + "dev_attr": { + "display_name": "TEMP_ENV_SSDCASE" + }, + "bmc": { + "ipmitool": { + "attr_list": [ + { + "attr_name": "temp1_input", + "bmc_cmd": "ipmitool sdr get -c TEMP_ENV_SSDCASE", + "raw": "0", + "separator": ",", + "field_name": "TEMP_ENV_SSDCASE", + "field_pos": "2" + }, + { + "attr_name": "temp1_high_threshold", + "bmc_cmd": "ipmitool sdr get -c TEMP_ENV_SSDCASE", + "raw": "0", + "separator": ",", + "field_name": "TEMP_ENV_SSDCASE", + "field_pos": "13" + }, + { + "attr_name": "temp1_high_crit_threshold", + "bmc_cmd": "ipmitool sdr get -c TEMP_ENV_SSDCASE", + "raw": "0", + "separator": ",", + "field_name": "TEMP_ENV_SSDCASE", + "field_pos": "12" + } + ] + } + } + }, + "TEMP4": { + "dev_info": { + "device_type": "TEMP_SENSOR", + "device_name": "TEMP4", + "device_parent": "SMBUS0" + }, + "dev_attr": { + "display_name": "TEMP_ENV_PSUCASE" + }, + "bmc": { + "ipmitool": { + "attr_list": [ + { + "attr_name": "temp1_input", + "bmc_cmd": "ipmitool sdr get -c TEMP_ENV_PSUCASE", + "raw": "0", + "separator": ",", + "field_name": "TEMP_ENV_PSUCASE", + "field_pos": "2" + }, + { + "attr_name": "temp1_high_threshold", + "bmc_cmd": "ipmitool sdr get -c TEMP_ENV_PSUCASE", + "raw": "0", + "separator": ",", + "field_name": "TEMP_ENV_PSUCASE", + "field_pos": "13" + }, + { + "attr_name": "temp1_high_crit_threshold", + "bmc_cmd": "ipmitool sdr get -c TEMP_ENV_PSUCASE", + "raw": "0", + "separator": ",", + "field_name": "TEMP_ENV_PSUCASE", + "field_pos": "12" + } + ] + } + } + }, + "TEMP5": { + "dev_info": { + "device_type": "TEMP_SENSOR", + "device_name": "TEMP5", + "device_parent": "SMBUS0" + }, + "dev_attr": { + "display_name": "TEMP_ENV_BMC" + }, + "bmc": { + "ipmitool": { + "attr_list": [ + { + "attr_name": "temp1_input", + "bmc_cmd": "ipmitool sdr get -c TEMP_ENV_BMC", + "raw": "0", + "separator": ",", + "field_name": "TEMP_ENV_BMC", + "field_pos": "2" + }, + { + "attr_name": "temp1_high_threshold", + "bmc_cmd": "ipmitool sdr get -c TEMP_ENV_BMC", + "raw": "0", + "separator": ",", + "field_name": "TEMP_ENV_BMC", + "field_pos": "13" + }, + { + "attr_name": "temp1_high_crit_threshold", + "bmc_cmd": "ipmitool sdr get -c TEMP_ENV_BMC", + "raw": "0", + "separator": ",", + "field_name": "TEMP_ENV_BMC", + "field_pos": "12" + } + ] + } + } + }, + "TEMP6": { + "dev_info": { + "device_type": "TEMP_SENSOR", + "device_name": "TEMP6", + "device_parent": "SMBUS0" + }, + "dev_attr": { + "display_name": "TEMP_PSU0_TEMP1" + }, + "bmc": { + "ipmitool": { + "attr_list": [ + { + "attr_name": "temp1_input", + "bmc_cmd": "ipmitool sdr get -c PSU0_TEMP1 | sed -e 's/,,/,0,/g' -e 's/,,/,0,/g'", + "raw": "0", + "separator": ",", + "field_name": "PSU0_TEMP1", + "field_pos": "2" + }, + { + "attr_name": "temp1_high_threshold", + "bmc_cmd": "ipmitool sdr get -c PSU0_TEMP1", + "raw": "0", + "separator": ",", + "field_name": "PSU0_TEMP1", + "field_pos": "13" + }, + { + "attr_name": "temp1_high_crit_threshold", + "bmc_cmd": "ipmitool sdr get -c PSU0_TEMP1", + "raw": "0", + "separator": ",", + "field_name": "PSU0_TEMP1", + "field_pos": "12" + } + ] + } + } + }, + "TEMP7": { + "dev_info": { + "device_type": "TEMP_SENSOR", + "device_name": "TEMP7", + "device_parent": "SMBUS0" + }, + "dev_attr": { + "display_name": "TEMP_PSU1_TEMP1" + }, + "bmc": { + "ipmitool": { + "attr_list": [ + { + "attr_name": "temp1_input", + "bmc_cmd": "ipmitool sdr get -c PSU1_TEMP1 | sed -e 's/,,/,0,/g' -e 's/,,/,0,/g'", + "raw": "0", + "separator": ",", + "field_name": "PSU1_TEMP1", + "field_pos": "2" + }, + { + "attr_name": "temp1_high_threshold", + "bmc_cmd": "ipmitool sdr get -c PSU1_TEMP1", + "raw": "0", + "separator": ",", + "field_name": "PSU1_TEMP1", + "field_pos": "13" + }, + { + "attr_name": "temp1_high_crit_threshold", + "bmc_cmd": "ipmitool sdr get -c PSU1_TEMP1", + "raw": "0", + "separator": ",", + "field_name": "PSU1_TEMP1", + "field_pos": "12" + } + ] + } + } + }, + "SYSSTATUS": { + "dev_info": { + "device_type": "SYSSTAT", + "device_name": "SYSSTATUS" + }, + "dev_attr": {}, + "attr_list": + [ + { + "attr_name": "board_sku_id", + "attr_devaddr": "0x30", + "attr_offset": "0x0", + "attr_mask": "0xff", + "attr_len": "0x1" + }, + { + "attr_name": "board_hw_id", + "attr_devaddr": "0x30", + "attr_offset": "0x1", + "attr_mask": "0x03", + "attr_len": "0x1" + }, + { + "attr_name": "board_deph_id", + "attr_devaddr": "0x30", + "attr_offset": "0x1", + "attr_mask": "0x4", + "attr_len": "0x1" + }, + { + "attr_name": "board_build_id", + "attr_devaddr": "0x30", + "attr_offset": "0x1", + "attr_mask": "0x18", + "attr_len": "0x1" + }, + { + "attr_name": "cpld1_major_ver", + "attr_devaddr": "0x30", + "attr_offset": "0x2", + "attr_mask": "0xc0", + "attr_len": "0x1" + }, + { + "attr_name": "cpld1_minor_ver", + "attr_devaddr": "0x30", + "attr_offset": "0x2", + "attr_mask": "0x3f", + "attr_len": "0x1" + }, + { + "attr_name": "cpld1_build", + "attr_devaddr": "0x30", + "attr_offset": "0x4", + "attr_mask": "0xff", + "attr_len": "0x1" + }, + { + "attr_name": "cpld2_major_ver", + "attr_devaddr": "0x31", + "attr_offset": "0x2", + "attr_mask": "0xc0", + "attr_len": "0x1" + }, + { + "attr_name": "cpld2_minor_ver", + "attr_devaddr": "0x31", + "attr_offset": "0x2", + "attr_mask": "0x3f", + "attr_len": "0x1" + }, + { + "attr_name": "cpld2_build", + "attr_devaddr": "0x31", + "attr_offset": "0x4", + "attr_mask": "0xff", + "attr_len": "0x1" + }, + { + "attr_name": "psu_status", + "attr_devaddr": "0x30", + "attr_offset": "0x51", + "attr_mask": "0xff", + "attr_len": "0x1" + }, + { + "attr_name": "system_led_psu", + "attr_devaddr": "0x30", + "attr_offset": "0x80", + "attr_mask": "0xff", + "attr_len": "0x1" + }, + { + "attr_name": "system_led_sys", + "attr_devaddr": "0x30", + "attr_offset": "0x81", + "attr_mask": "0xff", + "attr_len": "0x1" + }, + { + "attr_name": "system_led_fan", + "attr_devaddr": "0x30", + "attr_offset": "0x83", + "attr_mask": "0xff", + "attr_len": "0x1" + }, + { + "attr_name": "system_led_id", + "attr_devaddr": "0x30", + "attr_offset": "0x84", + "attr_mask": "0xff", + "attr_len": "0x1" + } + ] + }, + "PSU1": { + "dev_info": { + "device_type": "PSU", + "device_name": "PSU1", + "device_parent": "MUX1" + }, + "dev_attr": { + "dev_idx": "1", + "num_psu_fans": "1" + }, + "i2c": { + "interface": [ + { "itf":"eeprom", "dev":"PSU1-EEPROM" } + ] + }, + "bmc": { + "ipmitool": { + "attr_list": + [ + { + "attr_name": "psu_v_out", + "bmc_cmd": "ipmitool sdr get -c PSU0_VOUT | sed -e 's/,,/,N\\/A,/g' -e 's/,,/,N\\/A,/g'", + "raw": "0", + "separator": ",", + "field_name": "PSU0_VOUT", + "field_pos": "2", + "mult": "1000" + }, + { + "attr_name": "psu_i_out", + "bmc_cmd": "ipmitool sdr get -c PSU0_IOUT | sed -e 's/,,/,N\\/A,/g' -e 's/,,/,N\\/A,/g'", + "raw": "0", + "separator": ",", + "field_name": "PSU0_IOUT", + "field_pos": "2", + "mult": "1000" + }, + { + "attr_name": "psu_temp1_input", + "bmc_cmd": "ipmitool sdr get -c PSU0_TEMP1 | sed -e 's/,,/,N\\/A,/g' -e 's/,,/,N\\/A,/g'", + "raw": "0", + "separator": ",", + "field_name": "PSU0_TEMP1", + "field_pos": "2", + "mult": "1000" + }, + { + "attr_name": "psu_fan1_speed_rpm", + "bmc_cmd": "ipmitool sdr get -c PSU0_FAN1 | sed -e 's/,,/,N\\/A,/g' -e 's/,,/,N\\/A,/g'", + "raw": "0", + "separator": ",", + "field_name": "PSU0_FAN1", + "field_pos": "2" + }, + { + "attr_name": "psu_mfr_id", + "bmc_cmd": "_rv=$(ipmitool fru print 1 2>/dev/null | tr -s ' ' | cut -d' ' -f3-5 | grep 'Manufacturer') && echo $_rv || echo 'Manufacturer : N/A'", + "raw": "0", + "separator": ":", + "field_name": "Manufacturer", + "field_pos": "2" + }, + { + "attr_name": "psu_model_name", + "bmc_cmd": "_rv=$(ipmitool fru print 1 2>/dev/null | tr -s ' ' | cut -d' ' -f3-5 | grep 'Name') && echo $_rv || echo 'Name : N/A'", + "raw": "0", + "separator": ":", + "field_name": "Name", + "field_pos": "2" + }, + { + "attr_name": "psu_serial_num", + "bmc_cmd": "_rv=$(ipmitool fru print 1 2>/dev/null | tr -s ' ' | cut -d' ' -f3-5 | grep 'Serial') && echo $_rv || echo 'Serial : N/A'", + "raw": "0", + "separator": ":", + "field_name": "Serial", + "field_pos": "2" + }, + { + "attr_name": "psu_fan_dir", + "bmc_cmd": "ipmitool raw 0x3c 0x30 0x0 | xargs | cut -d' ' -f1", + "raw": "1", + "type": "raw" + }, + { + "attr_name": "psu_v_in", + "bmc_cmd": "ipmitool sdr get -c PSU0_VIN | sed -e 's/,,/,N\\/A,/g' -e 's/,,/,N\\/A,/g'", + "raw": "0", + "separator": ",", + "field_name": "PSU0_VIN", + "field_pos": "2", + "mult": "1000" + }, + { + "attr_name": "psu_i_in", + "bmc_cmd": "ipmitool sdr get -c PSU0_IIN | sed -e 's/,,/,N\\/A,/g' -e 's/,,/,N\\/A,/g'", + "raw": "0", + "separator": ",", + "field_name": "PSU0_IIN", + "field_pos": "2", + "mult": "1000" + } + ] + } + } + }, + "PSU1-EEPROM": { + "dev_info": { + "device_type": "PSU-EEPROM", + "device_name": "PSU1-EEPROM", + "device_parent": "MUX1", + "virt_parent": "PSU1" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x2", + "dev_addr": "0x5a", + "dev_type": "psu_eeprom" + }, + "attr_list": [ + { + "attr_name":"psu_present", + "attr_devaddr":"0x30", + "attr_devtype":"cpld", + "attr_offset":"0x51", + "attr_mask":"0x1", + "attr_cmpval":"0x0", + "attr_len":"1" + }, + { + "attr_name":"psu_power_good", + "attr_devaddr":"0x30", + "attr_devtype":"cpld", + "attr_offset":"0x51", + "attr_mask":"0x10", + "attr_cmpval":"0x10", + "attr_len":"1" + } + ] + } + }, + "PSU2": { + "dev_info": { + "device_type": "PSU", + "device_name": "PSU2", + "device_parent": "MUX1" + }, + "dev_attr": { + "dev_idx": "2", + "num_psu_fans": "1" + }, + "i2c": { + "interface": [ + { "itf":"eeprom", "dev":"PSU2-EEPROM" } + ] + }, + "bmc": { + "ipmitool": { + "attr_list": + [ + { + "attr_name": "psu_v_out", + "bmc_cmd": "ipmitool sdr get -c PSU1_VOUT | sed -e 's/,,/,N\\/A,/g' -e 's/,,/,N\\/A,/g'", + "raw": "0", + "separator": ",", + "field_name": "PSU1_VOUT", + "field_pos": "2", + "mult": "1000" + }, + { + "attr_name": "psu_i_out", + "bmc_cmd": "ipmitool sdr get -c PSU1_IOUT | sed -e 's/,,/,N\\/A,/g' -e 's/,,/,N\\/A,/g'", + "raw": "0", + "separator": ",", + "field_name": "PSU1_IOUT", + "field_pos": "2", + "mult": "1000" + }, + { + "attr_name": "psu_temp1_input", + "bmc_cmd": "ipmitool sdr get -c PSU1_TEMP1 | sed -e 's/,,/,N\\/A,/g' -e 's/,,/,N\\/A,/g'", + "raw": "0", + "separator": ",", + "field_name": "PSU1_TEMP1", + "field_pos": "2", + "mult": "1000" + }, + { + "attr_name": "psu_fan1_speed_rpm", + "bmc_cmd": "ipmitool sdr get -c PSU1_FAN1 | sed -e 's/,,/,N\\/A,/g' -e 's/,,/,N\\/A,/g'", + "raw": "0", + "separator": ",", + "field_name": "PSU1_FAN1", + "field_pos": "2" + }, + { + "attr_name": "psu_mfr_id", + "bmc_cmd": "_rv=$(ipmitool fru print 2 2>/dev/null | tr -s ' ' | cut -d' ' -f3-5 | grep 'Manufacturer') && echo $_rv || echo 'Manufacturer : N/A'", + "raw": "0", + "separator": ":", + "field_name": "Manufacturer", + "field_pos": "2" + }, + { + "attr_name": "psu_model_name", + "bmc_cmd": "_rv=$(ipmitool fru print 2 2>/dev/null | tr -s ' ' | cut -d' ' -f3-5 | grep 'Name') && echo $_rv || echo 'Name : N/A'", + "raw": "0", + "separator": ":", + "field_name": "Name", + "field_pos": "2" + }, + { + "attr_name": "psu_serial_num", + "bmc_cmd": "_rv=$(ipmitool fru print 2 2>/dev/null | tr -s ' ' | cut -d' ' -f3-5 | grep 'Serial') && echo $_rv || echo 'Serial : N/A'", + "raw": "0", + "separator": ":", + "field_name": "Serial", + "field_pos": "2" + }, + { + "attr_name": "psu_fan_dir", + "bmc_cmd": "ipmitool raw 0x3c 0x30 0x0 | xargs | cut -d' ' -f2", + "raw": "1", + "type": "raw" + }, + { + "attr_name": "psu_v_in", + "bmc_cmd": "ipmitool sdr get -c PSU1_VIN | sed -e 's/,,/,N\\/A,/g' -e 's/,,/,N\\/A,/g'", + "raw": "0", + "separator": ",", + "field_name": "PSU1_VIN", + "field_pos": "2", + "mult": "1000" + }, + { + "attr_name": "psu_i_in", + "bmc_cmd": "ipmitool sdr get -c PSU1_IIN | sed -e 's/,,/,N\\/A,/g' -e 's/,,/,N\\/A,/g'", + "raw": "0", + "separator": ",", + "field_name": "PSU1_IIN", + "field_pos": "2", + "mult": "1000" + } + ] + } + } + }, + "PSU2-EEPROM": { + "dev_info": { + "device_type": "PSU-EEPROM", + "device_name": "PSU2-EEPROM", + "device_parent": "MUX1", + "virt_parent": "PSU2" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x2", + "dev_addr": "0x5b", + "dev_type": "psu_eeprom" + }, + "attr_list": [ + { + "attr_name":"psu_present", + "attr_devaddr":"0x30", + "attr_devtype":"cpld", + "attr_offset":"0x51", + "attr_mask":"0x2", + "attr_cmpval":"0x0", + "attr_len":"1" + }, + { + "attr_name":"psu_power_good", + "attr_devaddr":"0x30", + "attr_devtype":"cpld", + "attr_offset":"0x51", + "attr_mask":"0x20", + "attr_cmpval":"0x20", + "attr_len":"1" + } + ] + } + }, + "FAN-CTRL": { + "dev_info": { + "device_type": "FAN", + "device_name": "FAN-CTRL", + "device_parent": "" + }, + "bmc": { + "ipmitool": { + "attr_list": [ + { + "attr_name": "fan1_present", + "bmc_cmd": "ipmitool sdr get -c FAN0_PRSNT_L", + "raw": "0", + "separator": ",", + "field_name": "FAN0_PRSNT_L", + "field_pos": "5" + }, + { + "attr_name": "fan2_present", + "bmc_cmd": "ipmitool sdr get -c FAN0_PRSNT_L", + "raw": "0", + "separator": ",", + "field_name": "FAN0_PRSNT_L", + "field_pos": "5" + }, + { + "attr_name": "fan3_present", + "bmc_cmd": "ipmitool sdr get -c FAN1_PRSNT_L", + "raw": "0", + "separator": ",", + "field_name": "FAN1_PRSNT_L", + "field_pos": "5" + }, + { + "attr_name": "fan4_present", + "bmc_cmd": "ipmitool sdr get -c FAN1_PRSNT_L", + "raw": "0", + "separator": ",", + "field_name": "FAN1_PRSNT_L", + "field_pos": "5" + }, + { + "attr_name": "fan5_present", + "bmc_cmd": "ipmitool sdr get -c FAN2_PRSNT_L", + "raw": "0", + "separator": ",", + "field_name": "FAN2_PRSNT_L", + "field_pos": "5" + }, + { + "attr_name": "fan6_present", + "bmc_cmd": "ipmitool sdr get -c FAN2_PRSNT_L", + "raw": "0", + "separator": ",", + "field_name": "FAN2_PRSNT_L", + "field_pos": "5" + }, + { + "attr_name": "fan7_present", + "bmc_cmd": "ipmitool sdr get -c FAN3_PRSNT_L", + "raw": "0", + "separator": ",", + "field_name": "FAN3_PRSNT_L", + "field_pos": "5" + }, + { + "attr_name": "fan8_present", + "bmc_cmd": "ipmitool sdr get -c FAN3_PRSNT_L", + "raw": "0", + "separator": ",", + "field_name": "FAN3_PRSNT_L", + "field_pos": "5" + }, + { + "attr_name": "fan1_input", + "bmc_cmd": "ipmitool sdr get -c FAN0_RPM_F | sed -e 's/,,/,N\\/A,/g' -e 's/,,/,N\\/A,/g'", + "raw": "0", + "separator": ",", + "field_name": "FAN0_RPM_F", + "field_pos": "2" + }, + { + "attr_name": "fan2_input", + "bmc_cmd": "ipmitool sdr get -c FAN0_RPM_R | sed -e 's/,,/,N\\/A,/g' -e 's/,,/,N\\/A,/g'", + "raw": "0", + "separator": ",", + "field_name": "FAN0_RPM_R", + "field_pos": "2" + }, + { + "attr_name": "fan3_input", + "bmc_cmd": "ipmitool sdr get -c FAN1_RPM_F | sed -e 's/,,/,N\\/A,/g' -e 's/,,/,N\\/A,/g'", + "raw": "0", + "separator": ",", + "field_name": "FAN1_RPM_F", + "field_pos": "2" + }, + { + "attr_name": "fan4_input", + "bmc_cmd": "ipmitool sdr get -c FAN1_RPM_R | sed -e 's/,,/,N\\/A,/g' -e 's/,,/,N\\/A,/g'", + "raw": "0", + "separator": ",", + "field_name": "FAN1_RPM_R", + "field_pos": "2" + }, + { + "attr_name": "fan5_input", + "bmc_cmd": "ipmitool sdr get -c FAN2_RPM_F | sed -e 's/,,/,N\\/A,/g' -e 's/,,/,N\\/A,/g'", + "raw": "0", + "separator": ",", + "field_name": "FAN2_RPM_F", + "field_pos": "2" + }, + { + "attr_name": "fan6_input", + "bmc_cmd": "ipmitool sdr get -c FAN2_RPM_R | sed -e 's/,,/,N\\/A,/g' -e 's/,,/,N\\/A,/g'", + "raw": "0", + "separator": ",", + "field_name": "FAN2_RPM_R", + "field_pos": "2" + }, + { + "attr_name": "fan7_input", + "bmc_cmd": "ipmitool sdr get -c FAN3_RPM_F | sed -e 's/,,/,N\\/A,/g' -e 's/,,/,N\\/A,/g'", + "raw": "0", + "separator": ",", + "field_name": "FAN3_RPM_F", + "field_pos": "2" + }, + { + "attr_name": "fan8_input", + "bmc_cmd": "ipmitool sdr get -c FAN3_RPM_R | sed -e 's/,,/,N\\/A,/g' -e 's/,,/,N\\/A,/g'", + "raw": "0", + "separator": ",", + "field_name": "FAN3_RPM_R", + "field_pos": "2" + }, + { + "attr_name": "fan1_direction", + "bmc_cmd": "ipmitool raw 0x3c 0x31 0x0 | xargs | cut -d' ' -f1", + "raw": "1", + "type": "raw" + }, + { + "attr_name": "fan2_direction", + "bmc_cmd": "ipmitool raw 0x3c 0x31 0x0 | xargs | cut -d' ' -f1", + "raw": "1", + "type": "raw" + }, + { + "attr_name": "fan3_direction", + "bmc_cmd": "ipmitool raw 0x3c 0x31 0x0 | xargs | cut -d' ' -f2", + "raw": "1", + "type": "raw" + }, + { + "attr_name": "fan4_direction", + "bmc_cmd": "ipmitool raw 0x3c 0x31 0x0 | xargs | cut -d' ' -f2", + "raw": "1", + "type": "raw" + }, + { + "attr_name": "fan5_direction", + "bmc_cmd": "ipmitool raw 0x3c 0x31 0x0 | xargs | cut -d' ' -f3", + "raw": "1", + "type": "raw" + }, + { + "attr_name": "fan6_direction", + "bmc_cmd": "ipmitool raw 0x3c 0x31 0x0 | xargs | cut -d' ' -f3", + "raw": "1", + "type": "raw" + }, + { + "attr_name": "fan7_direction", + "bmc_cmd": "ipmitool raw 0x3c 0x31 0x0 | xargs | cut -d' ' -f4", + "raw": "1", + "type": "raw" + }, + { + "attr_name": "fan8_direction", + "bmc_cmd": "ipmitool raw 0x3c 0x31 0x0 | xargs | cut -d' ' -f4", + "raw": "1", + "type": "raw" + } + ] + } + } + }, + "SYS_LED": { + "dev_info": { + "device_type": "LED", + "device_name": "SYS_LED" + }, + "dev_attr": { + "index": "0", + "flag": "rw" + }, + "i2c": { + "attr_list": [ + { + "attr_name": "green", + "bits": "7:4", + "descr": "Green", + "value": "0x09;0x0b", + "swpld_addr": "0x30", + "swpld_addr_offset": "0x81" + }, + { + "attr_name": "green_blink", + "bits": "7:4", + "descr": "Green Blinking", + "value": "0x0d;0x0f", + "swpld_addr": "0x30", + "swpld_addr_offset": "0x81" + }, + { + "attr_name": "yellow", + "bits": "7:4", + "descr": "Yellow", + "value": "0x08;0x0a", + "swpld_addr": "0x30", + "swpld_addr_offset": "0x81" + }, + { + "attr_name": "yellow_blink", + "bits": "7:4", + "descr": "Yellow Blinking", + "value": "0x0c;0x0e", + "swpld_addr": "0x30", + "swpld_addr_offset": "0x81" + }, + { + "attr_name": "off", + "bits": "7:6", + "descr": "Off", + "value": "0x01;0x0", + "swpld_addr": "0x30", + "swpld_addr_offset": "0x81" + } + ] + } + }, + "FAN_LED": { + "dev_info": { + "device_type": "LED", + "device_name": "FAN_LED" + }, + "dev_attr": { + "index": "0", + "flag": "ro" + }, + "i2c": { + "attr_list": [ + { + "attr_name": "green", + "bits": "3:0", + "descr": "Green", + "value": "0x09;0x0b", + "swpld_addr": "0x30", + "swpld_addr_offset": "0x83" + }, + { + "attr_name": "green_blink", + "bits": "3:0", + "descr": "Green Blinking", + "value": "0x0d;0x0f", + "swpld_addr": "0x30", + "swpld_addr_offset": "0x83" + }, + { + "attr_name": "yellow", + "bits": "3:0", + "descr": "Yellow", + "value": "0x08;0x0a", + "swpld_addr": "0x30", + "swpld_addr_offset": "0x83" + }, + { + "attr_name": "yellow_blink", + "bits": "3:0", + "descr": "Yellow Blinking", + "value": "0x0c;0x0e", + "swpld_addr": "0x30", + "swpld_addr_offset": "0x83" + }, + { + "attr_name": "off", + "bits": "3", + "descr": "Off", + "value": "0x0", + "swpld_addr": "0x30", + "swpld_addr_offset": "0x83" + } + ] + } + }, + "PSU1_LED": { + "dev_info": { + "device_type": "LED", + "device_name": "PSU_LED" + }, + "dev_attr": { + "index": "0", + "flag": "ro" + }, + "i2c": { + "attr_list": [ + { + "attr_name": "green", + "bits": "3:0", + "descr": "Green", + "value": "0x09;0x0b", + "swpld_addr": "0x30", + "swpld_addr_offset": "0x80" + }, + { + "attr_name": "green_blink", + "bits": "3:0", + "descr": "Green Blinking", + "value": "0x0d;0x0f", + "swpld_addr": "0x30", + "swpld_addr_offset": "0x80" + }, + { + "attr_name": "yellow", + "bits": "3:0", + "descr": "Yellow", + "value": "0x08;0x0a", + "swpld_addr": "0x30", + "swpld_addr_offset": "0x80" + }, + { + "attr_name": "yellow_blink", + "bits": "3:0", + "descr": "Yellow Blinking", + "value": "0x0c;0x0e", + "swpld_addr": "0x30", + "swpld_addr_offset": "0x80" + }, + { + "attr_name": "off", + "bits": "3", + "descr": "Off", + "value": "0x0", + "swpld_addr": "0x30", + "swpld_addr_offset": "0x80" + } + ] + } + }, + "PSU2_LED": { + "dev_info": { + "device_type": "LED", + "device_name": "PSU_LED" + }, + "dev_attr": { + "index": "1", + "flag": "ro" + }, + "i2c": { + "attr_list": [ + { + "attr_name": "green", + "bits": "7:4", + "descr": "Green", + "value": "0x09;0x0b", + "swpld_addr": "0x30", + "swpld_addr_offset": "0x80" + }, + { + "attr_name": "green_blink", + "bits": "7:4", + "descr": "Green Blinking", + "value": "0x0d;0x0f", + "swpld_addr": "0x30", + "swpld_addr_offset": "0x80" + }, + { + "attr_name": "yellow", + "bits": "7:4", + "descr": "Yellow", + "value": "0x08;0x0a", + "swpld_addr": "0x30", + "swpld_addr_offset": "0x80" + }, + { + "attr_name": "yellow_blink", + "bits": "7:4", + "descr": "Yellow Blinking", + "value": "0x0c;0x0e", + "swpld_addr": "0x30", + "swpld_addr_offset": "0x80" + }, + { + "attr_name": "off", + "bits": "7", + "descr": "Off", + "value": "0x0", + "swpld_addr": "0x30", + "swpld_addr_offset": "0x80" + } + ] + } + }, + "LOC_LED": { + "dev_info": { + "device_type": "LED", + "device_name": "LOC_LED" + }, + "dev_attr": { + "index": "0", + "flag": "rw" + }, + "i2c": { + "attr_list": [ + { + "attr_name": "blue", + "bits": "3:1", + "descr": "Blue", + "value": "0x04;0x05", + "swpld_addr": "0x30", + "swpld_addr_offset": "0x84" + }, + { + "attr_name": "blue_blink", + "bits": "3:1", + "descr": "Blue Blinking", + "value": "0x06;0x07", + "swpld_addr": "0x30", + "swpld_addr_offset": "0x84" + }, + { + "attr_name": "off", + "bits": "3:2", + "descr": "Off", + "value": "0x01;0x0", + "swpld_addr": "0x30", + "swpld_addr_offset": "0x84" + } + ] + } + }, + "PORT1": { + "dev_info": { + "device_type": "QSFP28", + "device_name": "PORT1", + "device_parent": "MUX3" + }, + "dev_attr": { + "dev_idx": "1" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT1-EEPROM" + }, + { + "itf": "control", + "dev": "PORT1-CTRL" + } + ] + } + }, + "PORT1-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT1-EEPROM", + "device_parent": "MUX3", + "virt_parent": "PORT1" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x12", + "dev_addr": "0x50", + "dev_type": "optoe1" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT1-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT1-CTRL", + "device_parent": "MUX3", + "virt_parent": "PORT1" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x12", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_intr_status", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x14", + "attr_mask": "0", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x10", + "attr_mask": "0", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x40", + "attr_mask": "0", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_lpmode", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x44", + "attr_mask": "0", + "attr_cmpval": "0x1", + "attr_len": "1" + } + ] + } + }, + "PORT2": { + "dev_info": { + "device_type": "QSFP28", + "device_name": "PORT2", + "device_parent": "MUX3" + }, + "dev_attr": { + "dev_idx": "2" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT2-EEPROM" + }, + { + "itf": "control", + "dev": "PORT2-CTRL" + } + ] + } + }, + "PORT2-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT2-EEPROM", + "device_parent": "MUX3", + "virt_parent": "PORT2" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x13", + "dev_addr": "0x50", + "dev_type": "optoe1" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT2-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT2-CTRL", + "device_parent": "MUX3", + "virt_parent": "PORT2" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x13", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_intr_status", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x14", + "attr_mask": "1", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x10", + "attr_mask": "1", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x40", + "attr_mask": "1", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_lpmode", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x44", + "attr_mask": "1", + "attr_cmpval": "0x2", + "attr_len": "1" + } + ] + } + }, + "PORT3": { + "dev_info": { + "device_type": "QSFP28", + "device_name": "PORT3", + "device_parent": "MUX3" + }, + "dev_attr": { + "dev_idx": "3" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT3-EEPROM" + }, + { + "itf": "control", + "dev": "PORT3-CTRL" + } + ] + } + }, + "PORT3-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT3-EEPROM", + "device_parent": "MUX3", + "virt_parent": "PORT3" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x14", + "dev_addr": "0x50", + "dev_type": "optoe1" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT3-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT3-CTRL", + "device_parent": "MUX3", + "virt_parent": "PORT3" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x14", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_intr_status", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x14", + "attr_mask": "2", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x10", + "attr_mask": "2", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x40", + "attr_mask": "2", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_lpmode", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x44", + "attr_mask": "2", + "attr_cmpval": "0x4", + "attr_len": "1" + } + ] + } + }, + "PORT4": { + "dev_info": { + "device_type": "QSFP28", + "device_name": "PORT4", + "device_parent": "MUX3" + }, + "dev_attr": { + "dev_idx": "4" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT4-EEPROM" + }, + { + "itf": "control", + "dev": "PORT4-CTRL" + } + ] + } + }, + "PORT4-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT4-EEPROM", + "device_parent": "MUX3", + "virt_parent": "PORT4" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x15", + "dev_addr": "0x50", + "dev_type": "optoe1" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT4-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT4-CTRL", + "device_parent": "MUX3", + "virt_parent": "PORT4" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x15", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_intr_status", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x14", + "attr_mask": "3", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x10", + "attr_mask": "3", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x40", + "attr_mask": "3", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_lpmode", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x44", + "attr_mask": "3", + "attr_cmpval": "0x8", + "attr_len": "1" + } + ] + } + }, + "PORT5": { + "dev_info": { + "device_type": "QSFP28", + "device_name": "PORT5", + "device_parent": "MUX3" + }, + "dev_attr": { + "dev_idx": "5" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT5-EEPROM" + }, + { + "itf": "control", + "dev": "PORT5-CTRL" + } + ] + } + }, + "PORT5-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT5-EEPROM", + "device_parent": "MUX3", + "virt_parent": "PORT5" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x16", + "dev_addr": "0x50", + "dev_type": "optoe1" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT5-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT5-CTRL", + "device_parent": "MUX3", + "virt_parent": "PORT5" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x16", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_intr_status", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x14", + "attr_mask": "4", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x10", + "attr_mask": "4", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x40", + "attr_mask": "4", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_lpmode", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x44", + "attr_mask": "4", + "attr_cmpval": "0x10", + "attr_len": "1" + } + ] + } + }, + "PORT6": { + "dev_info": { + "device_type": "QSFP28", + "device_name": "PORT6", + "device_parent": "MUX3" + }, + "dev_attr": { + "dev_idx": "6" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT6-EEPROM" + }, + { + "itf": "control", + "dev": "PORT6-CTRL" + } + ] + } + }, + "PORT6-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT6-EEPROM", + "device_parent": "MUX3", + "virt_parent": "PORT6" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x17", + "dev_addr": "0x50", + "dev_type": "optoe1" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT6-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT6-CTRL", + "device_parent": "MUX3", + "virt_parent": "PORT6" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x17", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_intr_status", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x14", + "attr_mask": "5", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x10", + "attr_mask": "5", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x40", + "attr_mask": "5", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_lpmode", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x44", + "attr_mask": "5", + "attr_cmpval": "0x20", + "attr_len": "1" + } + ] + } + }, + "PORT7": { + "dev_info": { + "device_type": "QSFP28", + "device_name": "PORT7", + "device_parent": "MUX3" + }, + "dev_attr": { + "dev_idx": "7" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT7-EEPROM" + }, + { + "itf": "control", + "dev": "PORT7-CTRL" + } + ] + } + }, + "PORT7-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT7-EEPROM", + "device_parent": "MUX3", + "virt_parent": "PORT7" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x18", + "dev_addr": "0x50", + "dev_type": "optoe1" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT7-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT7-CTRL", + "device_parent": "MUX3", + "virt_parent": "PORT7" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x18", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_intr_status", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x14", + "attr_mask": "6", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x10", + "attr_mask": "6", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x40", + "attr_mask": "6", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_lpmode", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x44", + "attr_mask": "6", + "attr_cmpval": "0x40", + "attr_len": "1" + } + ] + } + }, + "PORT8": { + "dev_info": { + "device_type": "QSFP28", + "device_name": "PORT8", + "device_parent": "MUX3" + }, + "dev_attr": { + "dev_idx": "8" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT8-EEPROM" + }, + { + "itf": "control", + "dev": "PORT8-CTRL" + } + ] + } + }, + "PORT8-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT8-EEPROM", + "device_parent": "MUX3", + "virt_parent": "PORT8" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x19", + "dev_addr": "0x50", + "dev_type": "optoe1" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT8-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT8-CTRL", + "device_parent": "MUX3", + "virt_parent": "PORT8" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x19", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_intr_status", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x14", + "attr_mask": "7", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x10", + "attr_mask": "7", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x40", + "attr_mask": "7", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_lpmode", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x44", + "attr_mask": "7", + "attr_cmpval": "0x80", + "attr_len": "1" + } + ] + } + }, + "PORT9": { + "dev_info": { + "device_type": "QSFP28", + "device_name": "PORT9", + "device_parent": "MUX4" + }, + "dev_attr": { + "dev_idx": "9" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT9-EEPROM" + }, + { + "itf": "control", + "dev": "PORT9-CTRL" + } + ] + } + }, + "PORT9-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT9-EEPROM", + "device_parent": "MUX4", + "virt_parent": "PORT9" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x1A", + "dev_addr": "0x50", + "dev_type": "optoe1" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT9-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT9-CTRL", + "device_parent": "MUX4", + "virt_parent": "PORT9" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x1A", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_intr_status", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x15", + "attr_mask": "0", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x11", + "attr_mask": "0", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x41", + "attr_mask": "0", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_lpmode", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x45", + "attr_mask": "0", + "attr_cmpval": "0x1", + "attr_len": "1" + } + ] + } + }, + "PORT10": { + "dev_info": { + "device_type": "QSFP28", + "device_name": "PORT10", + "device_parent": "MUX4" + }, + "dev_attr": { + "dev_idx": "10" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT10-EEPROM" + }, + { + "itf": "control", + "dev": "PORT10-CTRL" + } + ] + } + }, + "PORT10-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT10-EEPROM", + "device_parent": "MUX4", + "virt_parent": "PORT10" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x1B", + "dev_addr": "0x50", + "dev_type": "optoe1" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT10-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT10-CTRL", + "device_parent": "MUX4", + "virt_parent": "PORT10" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x1B", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_intr_status", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x15", + "attr_mask": "1", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x11", + "attr_mask": "1", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x41", + "attr_mask": "1", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_lpmode", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x45", + "attr_mask": "1", + "attr_cmpval": "0x2", + "attr_len": "1" + } + ] + } + }, + "PORT11": { + "dev_info": { + "device_type": "QSFP28", + "device_name": "PORT11", + "device_parent": "MUX4" + }, + "dev_attr": { + "dev_idx": "11" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT11-EEPROM" + }, + { + "itf": "control", + "dev": "PORT11-CTRL" + } + ] + } + }, + "PORT11-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT11-EEPROM", + "device_parent": "MUX4", + "virt_parent": "PORT11" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x1C", + "dev_addr": "0x50", + "dev_type": "optoe1" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT11-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT11-CTRL", + "device_parent": "MUX4", + "virt_parent": "PORT11" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x1C", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_intr_status", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x15", + "attr_mask": "2", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x11", + "attr_mask": "2", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x41", + "attr_mask": "2", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_lpmode", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x45", + "attr_mask": "2", + "attr_cmpval": "0x4", + "attr_len": "1" + } + ] + } + }, + "PORT12": { + "dev_info": { + "device_type": "QSFP28", + "device_name": "PORT12", + "device_parent": "MUX4" + }, + "dev_attr": { + "dev_idx": "12" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT12-EEPROM" + }, + { + "itf": "control", + "dev": "PORT12-CTRL" + } + ] + } + }, + "PORT12-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT12-EEPROM", + "device_parent": "MUX4", + "virt_parent": "PORT12" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x1D", + "dev_addr": "0x50", + "dev_type": "optoe1" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT12-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT12-CTRL", + "device_parent": "MUX4", + "virt_parent": "PORT12" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x1D", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_intr_status", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x15", + "attr_mask": "3", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x11", + "attr_mask": "3", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x41", + "attr_mask": "3", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_lpmode", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x45", + "attr_mask": "3", + "attr_cmpval": "0x8", + "attr_len": "1" + } + ] + } + }, + "PORT13": { + "dev_info": { + "device_type": "QSFP28", + "device_name": "PORT13", + "device_parent": "MUX4" + }, + "dev_attr": { + "dev_idx": "13" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT13-EEPROM" + }, + { + "itf": "control", + "dev": "PORT13-CTRL" + } + ] + } + }, + "PORT13-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT13-EEPROM", + "device_parent": "MUX4", + "virt_parent": "PORT13" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x1E", + "dev_addr": "0x50", + "dev_type": "optoe1" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT13-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT13-CTRL", + "device_parent": "MUX4", + "virt_parent": "PORT13" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x1E", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_intr_status", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x15", + "attr_mask": "4", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x11", + "attr_mask": "4", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x41", + "attr_mask": "4", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_lpmode", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x45", + "attr_mask": "4", + "attr_cmpval": "0x10", + "attr_len": "1" + } + ] + } + }, + "PORT14": { + "dev_info": { + "device_type": "QSFP28", + "device_name": "PORT14", + "device_parent": "MUX4" + }, + "dev_attr": { + "dev_idx": "14" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT14-EEPROM" + }, + { + "itf": "control", + "dev": "PORT14-CTRL" + } + ] + } + }, + "PORT14-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT14-EEPROM", + "device_parent": "MUX4", + "virt_parent": "PORT14" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x1F", + "dev_addr": "0x50", + "dev_type": "optoe1" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT14-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT14-CTRL", + "device_parent": "MUX4", + "virt_parent": "PORT14" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x1F", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_intr_status", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x15", + "attr_mask": "5", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x11", + "attr_mask": "5", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x41", + "attr_mask": "5", + "attr_cmpval": "0x20", + "attr_len": "1" + }, + { + "attr_name": "xcvr_lpmode", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x45", + "attr_mask": "5", + "attr_cmpval": "0x20", + "attr_len": "1" + } + ] + } + }, + "PORT15": { + "dev_info": { + "device_type": "QSFP28", + "device_name": "PORT15", + "device_parent": "MUX4" + }, + "dev_attr": { + "dev_idx": "15" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT15-EEPROM" + }, + { + "itf": "control", + "dev": "PORT15-CTRL" + } + ] + } + }, + "PORT15-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT15-EEPROM", + "device_parent": "MUX4", + "virt_parent": "PORT15" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x20", + "dev_addr": "0x50", + "dev_type": "optoe1" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT15-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT15-CTRL", + "device_parent": "MUX4", + "virt_parent": "PORT15" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x20", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_intr_status", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x15", + "attr_mask": "6", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x11", + "attr_mask": "6", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x41", + "attr_mask": "6", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_lpmode", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x45", + "attr_mask": "6", + "attr_cmpval": "0x40", + "attr_len": "1" + } + ] + } + }, + "PORT16": { + "dev_info": { + "device_type": "QSFP28", + "device_name": "PORT16", + "device_parent": "MUX4" + }, + "dev_attr": { + "dev_idx": "16" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT16-EEPROM" + }, + { + "itf": "control", + "dev": "PORT16-CTRL" + } + ] + } + }, + "PORT16-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT16-EEPROM", + "device_parent": "MUX4", + "virt_parent": "PORT16" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x21", + "dev_addr": "0x50", + "dev_type": "optoe1" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT16-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT16-CTRL", + "device_parent": "MUX4", + "virt_parent": "PORT16" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x21", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_intr_status", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x15", + "attr_mask": "7", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x11", + "attr_mask": "7", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x41", + "attr_mask": "7", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_lpmode", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x45", + "attr_mask": "7", + "attr_cmpval": "0x80", + "attr_len": "1" + } + ] + } + }, + "PORT17": { + "dev_info": { + "device_type": "QSFP28", + "device_name": "PORT17", + "device_parent": "MUX5" + }, + "dev_attr": { + "dev_idx": "17" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT17-EEPROM" + }, + { + "itf": "control", + "dev": "PORT17-CTRL" + } + ] + } + }, + "PORT17-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT17-EEPROM", + "device_parent": "MUX5", + "virt_parent": "PORT17" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x22", + "dev_addr": "0x50", + "dev_type": "optoe1" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT17-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT17-CTRL", + "device_parent": "MUX5", + "virt_parent": "PORT17" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x22", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_intr_status", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x16", + "attr_mask": "0", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x12", + "attr_mask": "0", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x42", + "attr_mask": "0", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_lpmode", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x46", + "attr_mask": "0", + "attr_cmpval": "0x1", + "attr_len": "1" + } + ] + } + }, + "PORT18": { + "dev_info": { + "device_type": "QSFP28", + "device_name": "PORT18", + "device_parent": "MUX5" + }, + "dev_attr": { + "dev_idx": "18" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT18-EEPROM" + }, + { + "itf": "control", + "dev": "PORT18-CTRL" + } + ] + } + }, + "PORT18-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT18-EEPROM", + "device_parent": "MUX5", + "virt_parent": "PORT18" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x23", + "dev_addr": "0x50", + "dev_type": "optoe1" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT18-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT18-CTRL", + "device_parent": "MUX5", + "virt_parent": "PORT18" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x23", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_intr_status", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x16", + "attr_mask": "1", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x12", + "attr_mask": "1", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x42", + "attr_mask": "1", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_lpmode", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x46", + "attr_mask": "1", + "attr_cmpval": "0x2", + "attr_len": "1" + } + ] + } + }, + "PORT19": { + "dev_info": { + "device_type": "QSFP28", + "device_name": "PORT19", + "device_parent": "MUX5" + }, + "dev_attr": { + "dev_idx": "19" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT19-EEPROM" + }, + { + "itf": "control", + "dev": "PORT19-CTRL" + } + ] + } + }, + "PORT19-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT19-EEPROM", + "device_parent": "MUX5", + "virt_parent": "PORT19" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x24", + "dev_addr": "0x50", + "dev_type": "optoe1" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT19-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT19-CTRL", + "device_parent": "MUX5", + "virt_parent": "PORT19" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x24", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_intr_status", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x16", + "attr_mask": "2", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x12", + "attr_mask": "2", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x42", + "attr_mask": "2", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_lpmode", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x46", + "attr_mask": "2", + "attr_cmpval": "0x4", + "attr_len": "1" + } + ] + } + }, + "PORT20": { + "dev_info": { + "device_type": "QSFP28", + "device_name": "PORT20", + "device_parent": "MUX5" + }, + "dev_attr": { + "dev_idx": "20" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT20-EEPROM" + }, + { + "itf": "control", + "dev": "PORT20-CTRL" + } + ] + } + }, + "PORT20-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT20-EEPROM", + "device_parent": "MUX5", + "virt_parent": "PORT20" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x25", + "dev_addr": "0x50", + "dev_type": "optoe1" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT20-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT20-CTRL", + "device_parent": "MUX5", + "virt_parent": "PORT20" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x25", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_intr_status", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x16", + "attr_mask": "3", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x12", + "attr_mask": "3", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x42", + "attr_mask": "3", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_lpmode", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x46", + "attr_mask": "3", + "attr_cmpval": "0x8", + "attr_len": "1" + } + ] + } + }, + "PORT21": { + "dev_info": { + "device_type": "QSFP28", + "device_name": "PORT21", + "device_parent": "MUX5" + }, + "dev_attr": { + "dev_idx": "21" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT21-EEPROM" + }, + { + "itf": "control", + "dev": "PORT21-CTRL" + } + ] + } + }, + "PORT21-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT21-EEPROM", + "device_parent": "MUX5", + "virt_parent": "PORT21" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x26", + "dev_addr": "0x50", + "dev_type": "optoe1" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT21-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT21-CTRL", + "device_parent": "MUX5", + "virt_parent": "PORT21" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x26", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_intr_status", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x16", + "attr_mask": "4", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x12", + "attr_mask": "4", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x42", + "attr_mask": "4", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_lpmode", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x46", + "attr_mask": "4", + "attr_cmpval": "0x10", + "attr_len": "1" + } + ] + } + }, + "PORT22": { + "dev_info": { + "device_type": "QSFP28", + "device_name": "PORT22", + "device_parent": "MUX5" + }, + "dev_attr": { + "dev_idx": "22" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT22-EEPROM" + }, + { + "itf": "control", + "dev": "PORT22-CTRL" + } + ] + } + }, + "PORT22-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT22-EEPROM", + "device_parent": "MUX5", + "virt_parent": "PORT22" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x27", + "dev_addr": "0x50", + "dev_type": "optoe1" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT22-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT22-CTRL", + "device_parent": "MUX5", + "virt_parent": "PORT22" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x27", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_intr_status", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x16", + "attr_mask": "5", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x12", + "attr_mask": "5", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x42", + "attr_mask": "5", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_lpmode", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x46", + "attr_mask": "5", + "attr_cmpval": "0x20", + "attr_len": "1" + } + ] + } + }, + "PORT23": { + "dev_info": { + "device_type": "QSFP28", + "device_name": "PORT23", + "device_parent": "MUX5" + }, + "dev_attr": { + "dev_idx": "23" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT23-EEPROM" + }, + { + "itf": "control", + "dev": "PORT23-CTRL" + } + ] + } + }, + "PORT23-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT23-EEPROM", + "device_parent": "MUX5", + "virt_parent": "PORT23" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x28", + "dev_addr": "0x50", + "dev_type": "optoe1" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT23-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT23-CTRL", + "device_parent": "MUX5", + "virt_parent": "PORT23" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x28", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_intr_status", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x16", + "attr_mask": "6", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x12", + "attr_mask": "6", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x42", + "attr_mask": "6", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_lpmode", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x46", + "attr_mask": "6", + "attr_cmpval": "0x40", + "attr_len": "1" + } + ] + } + }, + "PORT24": { + "dev_info": { + "device_type": "QSFP28", + "device_name": "PORT24", + "device_parent": "MUX5" + }, + "dev_attr": { + "dev_idx": "24" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT24-EEPROM" + }, + { + "itf": "control", + "dev": "PORT24-CTRL" + } + ] + } + }, + "PORT24-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT24-EEPROM", + "device_parent": "MUX5", + "virt_parent": "PORT24" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x29", + "dev_addr": "0x50", + "dev_type": "optoe1" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT24-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT24-CTRL", + "device_parent": "MUX5", + "virt_parent": "PORT24" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x29", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_intr_status", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x16", + "attr_mask": "7", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x12", + "attr_mask": "7", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x42", + "attr_mask": "7", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_lpmode", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x46", + "attr_mask": "7", + "attr_cmpval": "0x80", + "attr_len": "1" + } + ] + } + }, + "PORT25": { + "dev_info": { + "device_type": "QSFP28", + "device_name": "PORT25", + "device_parent": "MUX6" + }, + "dev_attr": { + "dev_idx": "25" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT25-EEPROM" + }, + { + "itf": "control", + "dev": "PORT25-CTRL" + } + ] + } + }, + "PORT25-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT25-EEPROM", + "device_parent": "MUX6", + "virt_parent": "PORT25" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x2A", + "dev_addr": "0x50", + "dev_type": "optoe1" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT25-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT25-CTRL", + "device_parent": "MUX6", + "virt_parent": "PORT25" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x2A", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_intr_status", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x17", + "attr_mask": "0", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x13", + "attr_mask": "0", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x43", + "attr_mask": "0", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_lpmode", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x47", + "attr_mask": "0", + "attr_cmpval": "0x1", + "attr_len": "1" + } + ] + } + }, + "PORT26": { + "dev_info": { + "device_type": "QSFP28", + "device_name": "PORT26", + "device_parent": "MUX6" + }, + "dev_attr": { + "dev_idx": "26" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT26-EEPROM" + }, + { + "itf": "control", + "dev": "PORT26-CTRL" + } + ] + } + }, + "PORT26-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT26-EEPROM", + "device_parent": "MUX6", + "virt_parent": "PORT26" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x2B", + "dev_addr": "0x50", + "dev_type": "optoe1" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT26-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT26-CTRL", + "device_parent": "MUX6", + "virt_parent": "PORT26" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x2B", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_intr_status", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x17", + "attr_mask": "1", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x13", + "attr_mask": "1", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x43", + "attr_mask": "1", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_lpmode", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x47", + "attr_mask": "1", + "attr_cmpval": "0x2", + "attr_len": "1" + } + ] + } + }, + "PORT27": { + "dev_info": { + "device_type": "QSFP28", + "device_name": "PORT27", + "device_parent": "MUX6" + }, + "dev_attr": { + "dev_idx": "27" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT27-EEPROM" + }, + { + "itf": "control", + "dev": "PORT27-CTRL" + } + ] + } + }, + "PORT27-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT27-EEPROM", + "device_parent": "MUX6", + "virt_parent": "PORT27" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x2C", + "dev_addr": "0x50", + "dev_type": "optoe1" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT27-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT27-CTRL", + "device_parent": "MUX6", + "virt_parent": "PORT27" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x2C", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_intr_status", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x17", + "attr_mask": "2", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x13", + "attr_mask": "2", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x43", + "attr_mask": "2", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_lpmode", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x47", + "attr_mask": "2", + "attr_cmpval": "0x4", + "attr_len": "1" + } + ] + } + }, + "PORT28": { + "dev_info": { + "device_type": "QSFP28", + "device_name": "PORT28", + "device_parent": "MUX6" + }, + "dev_attr": { + "dev_idx": "28" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT28-EEPROM" + }, + { + "itf": "control", + "dev": "PORT28-CTRL" + } + ] + } + }, + "PORT28-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT28-EEPROM", + "device_parent": "MUX6", + "virt_parent": "PORT28" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x2D", + "dev_addr": "0x50", + "dev_type": "optoe1" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT28-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT28-CTRL", + "device_parent": "MUX6", + "virt_parent": "PORT28" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x2D", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_intr_status", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x17", + "attr_mask": "3", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x13", + "attr_mask": "3", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x43", + "attr_mask": "3", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_lpmode", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x47", + "attr_mask": "3", + "attr_cmpval": "0x8", + "attr_len": "1" + } + ] + } + }, + "PORT29": { + "dev_info": { + "device_type": "QSFP28", + "device_name": "PORT29", + "device_parent": "MUX6" + }, + "dev_attr": { + "dev_idx": "29" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT29-EEPROM" + }, + { + "itf": "control", + "dev": "PORT29-CTRL" + } + ] + } + }, + "PORT29-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT29-EEPROM", + "device_parent": "MUX6", + "virt_parent": "PORT29" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x2E", + "dev_addr": "0x50", + "dev_type": "optoe1" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT29-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT29-CTRL", + "device_parent": "MUX6", + "virt_parent": "PORT29" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x2E", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_intr_status", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x17", + "attr_mask": "4", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x13", + "attr_mask": "4", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x43", + "attr_mask": "4", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_lpmode", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x47", + "attr_mask": "4", + "attr_cmpval": "0x10", + "attr_len": "1" + } + ] + } + }, + "PORT30": { + "dev_info": { + "device_type": "QSFP28", + "device_name": "PORT30", + "device_parent": "MUX6" + }, + "dev_attr": { + "dev_idx": "30" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT30-EEPROM" + }, + { + "itf": "control", + "dev": "PORT30-CTRL" + } + ] + } + }, + "PORT30-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT30-EEPROM", + "device_parent": "MUX6", + "virt_parent": "PORT30" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x2F", + "dev_addr": "0x50", + "dev_type": "optoe1" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT30-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT30-CTRL", + "device_parent": "MUX6", + "virt_parent": "PORT30" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x2F", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_intr_status", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x17", + "attr_mask": "5", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x13", + "attr_mask": "5", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x43", + "attr_mask": "5", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_lpmode", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x47", + "attr_mask": "5", + "attr_cmpval": "0x20", + "attr_len": "1" + } + ] + } + }, + "PORT31": { + "dev_info": { + "device_type": "QSFP28", + "device_name": "PORT31", + "device_parent": "MUX6" + }, + "dev_attr": { + "dev_idx": "31" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT31-EEPROM" + }, + { + "itf": "control", + "dev": "PORT31-CTRL" + } + ] + } + }, + "PORT31-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT31-EEPROM", + "device_parent": "MUX6", + "virt_parent": "PORT31" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x30", + "dev_addr": "0x50", + "dev_type": "optoe1" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT31-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT31-CTRL", + "device_parent": "MUX6", + "virt_parent": "PORT31" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x30", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_intr_status", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x17", + "attr_mask": "6", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x13", + "attr_mask": "6", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x43", + "attr_mask": "6", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_lpmode", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x47", + "attr_mask": "6", + "attr_cmpval": "0x40", + "attr_len": "1" + } + ] + } + }, + "PORT32": { + "dev_info": { + "device_type": "QSFP28", + "device_name": "PORT32", + "device_parent": "MUX6" + }, + "dev_attr": { + "dev_idx": "32" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT32-EEPROM" + }, + { + "itf": "control", + "dev": "PORT32-CTRL" + } + ] + } + }, + "PORT32-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT32-EEPROM", + "device_parent": "MUX6", + "virt_parent": "PORT32" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x31", + "dev_addr": "0x50", + "dev_type": "optoe1" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT32-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT32-CTRL", + "device_parent": "MUX6", + "virt_parent": "PORT32" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x31", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_intr_status", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x17", + "attr_mask": "7", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x13", + "attr_mask": "7", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x43", + "attr_mask": "7", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_lpmode", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x47", + "attr_mask": "7", + "attr_cmpval": "0x80", + "attr_len": "1" + } + ] + } + }, + "PORT33": { + "dev_info": { + "device_type": "SFP", + "device_name": "PORT33", + "device_parent": "MUX7" + }, + "dev_attr": { + "dev_idx": "33" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT33-EEPROM" + }, + { + "itf": "control", + "dev": "PORT33-CTRL" + } + ] + } + }, + "PORT33-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT33", + "device_parent": "MUX7", + "virt_parent": "PORT33" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x33", + "dev_addr": "0x50", + "dev_type": "optoe2" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT33-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT33-CTRL", + "device_parent": "MUX7", + "virt_parent": "PORT33" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x33", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x18", + "attr_mask": "1", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_rxlos", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x19", + "attr_mask": "1", + "attr_cmpval": "0x2", + "attr_len": "1" + }, + { + "attr_name": "xcvr_txfault", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x1A", + "attr_mask": "1", + "attr_cmpval": "0x2", + "attr_len": "1" + }, + { + "attr_name": "xcvr_txdisable", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x48", + "attr_mask": "1", + "attr_cmpval": "0x2", + "attr_len": "1" + } + ] + } + } + +} diff --git a/device/ufispace/x86_64-ufispace_s9110_32x-r0/pddf/pddf-device-pvt.json b/device/ufispace/x86_64-ufispace_s9110_32x-r0/pddf/pddf-device-pvt.json new file mode 100644 index 0000000000..7df09af4cf --- /dev/null +++ b/device/ufispace/x86_64-ufispace_s9110_32x-r0/pddf/pddf-device-pvt.json @@ -0,0 +1,4623 @@ +{ + "PLATFORM": { + "num_psus": 2, + "num_fantrays": 3, + "num_fans_pertray": 2, + "num_ports": 33, + "num_temps": 7, + "pddf_dev_types": { + "description": "PDDF supported devices", + "CPLD": [ + "i2c_cpld" + ], + "PSU": [ + "psu_eeprom", + "psu_pmbus" + ], + "PORT_MODULE": [ + "pddf_xcvr" + ] + }, + "std_perm_kos": [ + "i2c-i801", + "i2c-ismt" + ], + "std_kos": [ + "i2c_dev", + "i2c_mux_pca954x", + "optoe" + ], + "pddf_kos": [ + "pddf_client_module", + "pddf_cpld_module", + "pddf_cpld_driver", + "pddf_mux_module", + "pddf_xcvr_module", + "pddf_xcvr_driver_module", + "pddf_psu_driver_module", + "pddf_psu_module", + "pddf_fan_driver_module", + "pddf_fan_module", + "pddf_led_module" + ], + "custom_kos": [ + "x86-64-ufispace-s9110-32x-lpc", + "x86-64-ufispace-s9110-32x-sys-eeprom", + "pddf_custom_sysstatus_module" + ] + }, + "SYSTEM": { + "dev_info": { + "device_type": "CPU", + "device_name": "ROOT_COMPLEX", + "device_parent": null + }, + "i2c": { + "CONTROLLERS": [ + { + "dev_name": "i2c-1", + "dev": "SMBUS1" + }, + { + "dev_name": "i2c-0", + "dev": "SMBUS0" + } + ] + } + }, + "SMBUS1": { + "dev_info": { + "device_type": "SMBUS", "device_name": "SMBUS1", "device_parent": "SYSTEM" + }, + "i2c": { + "topo_info": { + "dev_addr": "0x1" + }, + "DEVICES": [ + { + "dev": "EEPROM1" + }, + { + "dev": "MUX1" + } + ] + } + }, + "EEPROM1": { + "dev_info": { + "device_type": "EEPROM", + "device_name": "EEPROM1", + "device_parent": "SMBUS1" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x1", + "dev_addr": "0x57", + "dev_type": "sys_eeprom" + }, + "dev_attr": { + "access_mode": "BLOCK" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "MUX1": { + "dev_info": { "device_type": "MUX", "device_name": "MUX1", "device_parent": "SMBUS1"}, + "i2c": { + "topo_info": { + "parent_bus": "0x1", + "dev_addr": "0x70", + "dev_type": "pca9548" + }, + "dev_attr": { + "virt_bus": "0x2", + "idle_state": "-2" + }, + "channel": [ + { + "chn": "0", + "dev": "CPLD1" + }, + { + "chn": "0", + "dev": "CPLD2" + }, + { + "chn": "0", + "dev": "PSU1" + }, + { + "chn": "0", + "dev": "PSU2" + } + ] + } + }, + "CPLD1": { + "dev_info": { + "device_type": "CPLD", + "device_name": "CPLD1", + "device_parent": "MUX1" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x2", + "dev_addr": "0x30", + "dev_type": "i2c_cpld" + }, + "dev_attr": {} + } + }, + "CPLD2": { + "dev_info": { + "device_type": "CPLD", + "device_name": "CPLD2", + "device_parent": "MUX1" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x2", + "dev_addr": "0x31", + "dev_type": "i2c_cpld" + }, + "dev_attr": {} + } + }, + "SMBUS0": { + "dev_info": { + "device_type": "SMBUS", "device_name": "SMBUS0", "device_parent": "SYSTEM" + }, + "i2c": { + "topo_info": { + "dev_addr": "0x0" + }, + "DEVICES": [ + { + "dev": "MUX2" + } + ] + } + }, + "MUX2": { + "dev_info": { "device_type":"MUX", "device_name":"MUX2", "device_parent":"SMBUS0"}, + "i2c": + { + "topo_info": { "parent_bus":"0x0", "dev_addr":"0x72", "dev_type":"pca9548"}, + "dev_attr": { "virt_bus":"0xa", "idle_state":"-2"}, + "channel": + [ + { "chn":"0", "dev":"MUX3" }, + { "chn":"1", "dev":"MUX4" }, + { "chn":"2", "dev":"MUX5" }, + { "chn":"3", "dev":"MUX6" }, + { "chn":"4", "dev":"MUX7" } + ] + } + }, + "MUX3": { + "dev_info": { "device_type":"MUX", "device_name":"MUX3", "device_parent":"MUX2"}, + "i2c": { + "topo_info": { "parent_bus":"0xa", "dev_addr":"0x73", "dev_type":"pca9548"}, + "dev_attr": { "virt_bus":"0x12", "idle_state":"-2"}, + "channel": [ + { "chn":"0", "dev":"PORT1" }, + { "chn":"1", "dev":"PORT2" }, + { "chn":"2", "dev":"PORT3" }, + { "chn":"3", "dev":"PORT4" }, + { "chn":"4", "dev":"PORT5" }, + { "chn":"5", "dev":"PORT6" }, + { "chn":"6", "dev":"PORT7" }, + { "chn":"7", "dev":"PORT8" } + ] + } + }, + "MUX4": { + "dev_info": { "device_type":"MUX", "device_name":"MUX4", "device_parent":"MUX2"}, + "i2c": { + "topo_info": { "parent_bus":"0xb", "dev_addr":"0x73", "dev_type":"pca9548"}, + "dev_attr": { "virt_bus":"0x1a", "idle_state":"-2"}, + "channel": [ + { "chn":"0", "dev":"PORT9" }, + { "chn":"1", "dev":"PORT10" }, + { "chn":"2", "dev":"PORT11" }, + { "chn":"3", "dev":"PORT12" }, + { "chn":"4", "dev":"PORT13" }, + { "chn":"5", "dev":"PORT14" }, + { "chn":"6", "dev":"PORT15" }, + { "chn":"7", "dev":"PORT16" } + ] + } + }, + "MUX5": { + "dev_info": { "device_type":"MUX", "device_name":"MUX5", "device_parent":"MUX2"}, + "i2c": { + "topo_info": { "parent_bus":"0xc", "dev_addr":"0x73", "dev_type":"pca9548"}, + "dev_attr": { "virt_bus":"0x22", "idle_state":"-2"}, + "channel": [ + { "chn":"0", "dev":"PORT17" }, + { "chn":"1", "dev":"PORT18" }, + { "chn":"2", "dev":"PORT19" }, + { "chn":"3", "dev":"PORT20" }, + { "chn":"4", "dev":"PORT21" }, + { "chn":"5", "dev":"PORT22" }, + { "chn":"6", "dev":"PORT23" }, + { "chn":"7", "dev":"PORT24" } + ] + } + }, + "MUX6": { + "dev_info": { "device_type":"MUX", "device_name":"MUX6", "device_parent":"MUX2"}, + "i2c": { + "topo_info": { "parent_bus":"0xd", "dev_addr":"0x73", "dev_type":"pca9548"}, + "dev_attr": { "virt_bus":"0x2a", "idle_state":"-2"}, + "channel": [ + { "chn":"0", "dev":"PORT25" }, + { "chn":"1", "dev":"PORT26" }, + { "chn":"2", "dev":"PORT27" }, + { "chn":"3", "dev":"PORT28" }, + { "chn":"4", "dev":"PORT29" }, + { "chn":"5", "dev":"PORT30" }, + { "chn":"6", "dev":"PORT31" }, + { "chn":"7", "dev":"PORT32" } + ] + } + }, + "MUX7": { + "dev_info": { "device_type":"MUX", "device_name":"MUX7", "device_parent":"MUX2"}, + "i2c": { + "topo_info": { "parent_bus":"0xe", "dev_addr":"0x73", "dev_type":"pca9548"}, + "dev_attr": { "virt_bus":"0x32", "idle_state":"-2"}, + "channel": [ + { "chn":"1", "dev":"PORT33" } + ] + } + }, + "TEMP1": { + "dev_info": { + "device_type": "TEMP_SENSOR", + "device_name": "TEMP1", + "device_parent": "SMBUS0" + }, + "dev_attr": { + "display_name": "TEMP_MAC" + }, + "bmc": { + "ipmitool": { + "attr_list": [ + { + "attr_name": "temp1_input", + "bmc_cmd": "ipmitool sdr get -c TEMP_MAC", + "raw": "0", + "separator": ",", + "field_name": "TEMP_MAC", + "field_pos": "2" + }, + { + "attr_name": "temp1_high_threshold", + "bmc_cmd": "ipmitool sdr get -c TEMP_MAC", + "raw": "0", + "separator": ",", + "field_name": "TEMP_MAC", + "field_pos": "13" + }, + { + "attr_name": "temp1_high_crit_threshold", + "bmc_cmd": "ipmitool sdr get -c TEMP_MAC", + "raw": "0", + "separator": ",", + "field_name": "TEMP_MAC", + "field_pos": "12" + } + ] + } + } + }, + "TEMP2": { + "dev_info": { + "device_type": "TEMP_SENSOR", + "device_name": "TEMP2", + "device_parent": "SMBUS0" + }, + "dev_attr": { + "display_name": "TEMP_ENV_MACCASE" + }, + "bmc": { + "ipmitool": { + "attr_list": [ + { + "attr_name": "temp1_input", + "bmc_cmd": "ipmitool sdr get -c TEMP_ENV_MACCASE", + "raw": "0", + "separator": ",", + "field_name": "TEMP_ENV_MACCASE", + "field_pos": "2" + }, + { + "attr_name": "temp1_high_threshold", + "bmc_cmd": "ipmitool sdr get -c TEMP_ENV_MACCASE", + "raw": "0", + "separator": ",", + "field_name": "TEMP_ENV_MACCASE", + "field_pos": "13" + }, + { + "attr_name": "temp1_high_crit_threshold", + "bmc_cmd": "ipmitool sdr get -c TEMP_ENV_MACCASE", + "raw": "0", + "separator": ",", + "field_name": "TEMP_ENV_MACCASE", + "field_pos": "12" + } + ] + } + } + }, + "TEMP3": { + "dev_info": { + "device_type": "TEMP_SENSOR", + "device_name": "TEMP3", + "device_parent": "SMBUS0" + }, + "dev_attr": { + "display_name": "TEMP_ENV_SSDCASE" + }, + "bmc": { + "ipmitool": { + "attr_list": [ + { + "attr_name": "temp1_input", + "bmc_cmd": "ipmitool sdr get -c TEMP_ENV_SSDCASE", + "raw": "0", + "separator": ",", + "field_name": "TEMP_ENV_SSDCASE", + "field_pos": "2" + }, + { + "attr_name": "temp1_high_threshold", + "bmc_cmd": "ipmitool sdr get -c TEMP_ENV_SSDCASE", + "raw": "0", + "separator": ",", + "field_name": "TEMP_ENV_SSDCASE", + "field_pos": "13" + }, + { + "attr_name": "temp1_high_crit_threshold", + "bmc_cmd": "ipmitool sdr get -c TEMP_ENV_SSDCASE", + "raw": "0", + "separator": ",", + "field_name": "TEMP_ENV_SSDCASE", + "field_pos": "12" + } + ] + } + } + }, + "TEMP4": { + "dev_info": { + "device_type": "TEMP_SENSOR", + "device_name": "TEMP4", + "device_parent": "SMBUS0" + }, + "dev_attr": { + "display_name": "TEMP_ENV_PSUCASE" + }, + "bmc": { + "ipmitool": { + "attr_list": [ + { + "attr_name": "temp1_input", + "bmc_cmd": "ipmitool sdr get -c TEMP_ENV_PSUCASE", + "raw": "0", + "separator": ",", + "field_name": "TEMP_ENV_PSUCASE", + "field_pos": "2" + }, + { + "attr_name": "temp1_high_threshold", + "bmc_cmd": "ipmitool sdr get -c TEMP_ENV_PSUCASE", + "raw": "0", + "separator": ",", + "field_name": "TEMP_ENV_PSUCASE", + "field_pos": "13" + }, + { + "attr_name": "temp1_high_crit_threshold", + "bmc_cmd": "ipmitool sdr get -c TEMP_ENV_PSUCASE", + "raw": "0", + "separator": ",", + "field_name": "TEMP_ENV_PSUCASE", + "field_pos": "12" + } + ] + } + } + }, + "TEMP5": { + "dev_info": { + "device_type": "TEMP_SENSOR", + "device_name": "TEMP5", + "device_parent": "SMBUS0" + }, + "dev_attr": { + "display_name": "TEMP_ENV_BMC" + }, + "bmc": { + "ipmitool": { + "attr_list": [ + { + "attr_name": "temp1_input", + "bmc_cmd": "ipmitool sdr get -c TEMP_ENV_BMC", + "raw": "0", + "separator": ",", + "field_name": "TEMP_ENV_BMC", + "field_pos": "2" + }, + { + "attr_name": "temp1_high_threshold", + "bmc_cmd": "ipmitool sdr get -c TEMP_ENV_BMC", + "raw": "0", + "separator": ",", + "field_name": "TEMP_ENV_BMC", + "field_pos": "13" + }, + { + "attr_name": "temp1_high_crit_threshold", + "bmc_cmd": "ipmitool sdr get -c TEMP_ENV_BMC", + "raw": "0", + "separator": ",", + "field_name": "TEMP_ENV_BMC", + "field_pos": "12" + } + ] + } + } + }, + "TEMP6": { + "dev_info": { + "device_type": "TEMP_SENSOR", + "device_name": "TEMP6", + "device_parent": "SMBUS0" + }, + "dev_attr": { + "display_name": "TEMP_PSU0_TEMP1" + }, + "bmc": { + "ipmitool": { + "attr_list": [ + { + "attr_name": "temp1_input", + "bmc_cmd": "ipmitool sdr get -c PSU0_TEMP1 | sed -e 's/,,/,0,/g' -e 's/,,/,0,/g'", + "raw": "0", + "separator": ",", + "field_name": "PSU0_TEMP1", + "field_pos": "2" + }, + { + "attr_name": "temp1_high_threshold", + "bmc_cmd": "ipmitool sdr get -c PSU0_TEMP1", + "raw": "0", + "separator": ",", + "field_name": "PSU0_TEMP1", + "field_pos": "13" + }, + { + "attr_name": "temp1_high_crit_threshold", + "bmc_cmd": "ipmitool sdr get -c PSU0_TEMP1", + "raw": "0", + "separator": ",", + "field_name": "PSU0_TEMP1", + "field_pos": "12" + } + ] + } + } + }, + "TEMP7": { + "dev_info": { + "device_type": "TEMP_SENSOR", + "device_name": "TEMP7", + "device_parent": "SMBUS0" + }, + "dev_attr": { + "display_name": "TEMP_PSU1_TEMP1" + }, + "bmc": { + "ipmitool": { + "attr_list": [ + { + "attr_name": "temp1_input", + "bmc_cmd": "ipmitool sdr get -c PSU1_TEMP1 | sed -e 's/,,/,0,/g' -e 's/,,/,0,/g'", + "raw": "0", + "separator": ",", + "field_name": "PSU1_TEMP1", + "field_pos": "2" + }, + { + "attr_name": "temp1_high_threshold", + "bmc_cmd": "ipmitool sdr get -c PSU1_TEMP1", + "raw": "0", + "separator": ",", + "field_name": "PSU1_TEMP1", + "field_pos": "13" + }, + { + "attr_name": "temp1_high_crit_threshold", + "bmc_cmd": "ipmitool sdr get -c PSU1_TEMP1", + "raw": "0", + "separator": ",", + "field_name": "PSU1_TEMP1", + "field_pos": "12" + } + ] + } + } + }, + "SYSSTATUS": { + "dev_info": { + "device_type": "SYSSTAT", + "device_name": "SYSSTATUS" + }, + "dev_attr": {}, + "attr_list": + [ + { + "attr_name": "board_sku_id", + "attr_devaddr": "0x30", + "attr_offset": "0x0", + "attr_mask": "0xff", + "attr_len": "0x1" + }, + { + "attr_name": "board_hw_id", + "attr_devaddr": "0x30", + "attr_offset": "0x1", + "attr_mask": "0x03", + "attr_len": "0x1" + }, + { + "attr_name": "board_deph_id", + "attr_devaddr": "0x30", + "attr_offset": "0x1", + "attr_mask": "0x4", + "attr_len": "0x1" + }, + { + "attr_name": "board_build_id", + "attr_devaddr": "0x30", + "attr_offset": "0x1", + "attr_mask": "0x18", + "attr_len": "0x1" + }, + { + "attr_name": "cpld1_major_ver", + "attr_devaddr": "0x30", + "attr_offset": "0x2", + "attr_mask": "0xc0", + "attr_len": "0x1" + }, + { + "attr_name": "cpld1_minor_ver", + "attr_devaddr": "0x30", + "attr_offset": "0x2", + "attr_mask": "0x3f", + "attr_len": "0x1" + }, + { + "attr_name": "cpld1_build", + "attr_devaddr": "0x30", + "attr_offset": "0x4", + "attr_mask": "0xff", + "attr_len": "0x1" + }, + { + "attr_name": "cpld2_major_ver", + "attr_devaddr": "0x31", + "attr_offset": "0x2", + "attr_mask": "0xc0", + "attr_len": "0x1" + }, + { + "attr_name": "cpld2_minor_ver", + "attr_devaddr": "0x31", + "attr_offset": "0x2", + "attr_mask": "0x3f", + "attr_len": "0x1" + }, + { + "attr_name": "cpld2_build", + "attr_devaddr": "0x31", + "attr_offset": "0x4", + "attr_mask": "0xff", + "attr_len": "0x1" + }, + { + "attr_name": "psu_status", + "attr_devaddr": "0x30", + "attr_offset": "0x51", + "attr_mask": "0xff", + "attr_len": "0x1" + }, + { + "attr_name": "system_led_psu", + "attr_devaddr": "0x30", + "attr_offset": "0x80", + "attr_mask": "0xff", + "attr_len": "0x1" + }, + { + "attr_name": "system_led_sys", + "attr_devaddr": "0x30", + "attr_offset": "0x81", + "attr_mask": "0xff", + "attr_len": "0x1" + }, + { + "attr_name": "system_led_fan", + "attr_devaddr": "0x30", + "attr_offset": "0x83", + "attr_mask": "0xff", + "attr_len": "0x1" + }, + { + "attr_name": "system_led_id", + "attr_devaddr": "0x30", + "attr_offset": "0x84", + "attr_mask": "0xff", + "attr_len": "0x1" + } + ] + }, + "PSU1": { + "dev_info": { + "device_type": "PSU", + "device_name": "PSU1", + "device_parent": "MUX1" + }, + "dev_attr": { + "dev_idx": "1", + "num_psu_fans": "1" + }, + "i2c": { + "interface": [ + { "itf":"eeprom", "dev":"PSU1-EEPROM" } + ] + }, + "bmc": { + "ipmitool": { + "attr_list": + [ + { + "attr_name": "psu_v_out", + "bmc_cmd": "ipmitool sdr get -c PSU0_VOUT | sed -e 's/,,/,N\\/A,/g' -e 's/,,/,N\\/A,/g'", + "raw": "0", + "separator": ",", + "field_name": "PSU0_VOUT", + "field_pos": "2", + "mult": "1000" + }, + { + "attr_name": "psu_i_out", + "bmc_cmd": "ipmitool sdr get -c PSU0_IOUT | sed -e 's/,,/,N\\/A,/g' -e 's/,,/,N\\/A,/g'", + "raw": "0", + "separator": ",", + "field_name": "PSU0_IOUT", + "field_pos": "2", + "mult": "1000" + }, + { + "attr_name": "psu_temp1_input", + "bmc_cmd": "ipmitool sdr get -c PSU0_TEMP1 | sed -e 's/,,/,N\\/A,/g' -e 's/,,/,N\\/A,/g'", + "raw": "0", + "separator": ",", + "field_name": "PSU0_TEMP1", + "field_pos": "2", + "mult": "1000" + }, + { + "attr_name": "psu_fan1_speed_rpm", + "bmc_cmd": "ipmitool sdr get -c PSU0_FAN1 | sed -e 's/,,/,N\\/A,/g' -e 's/,,/,N\\/A,/g'", + "raw": "0", + "separator": ",", + "field_name": "PSU0_FAN1", + "field_pos": "2" + }, + { + "attr_name": "psu_mfr_id", + "bmc_cmd": "_rv=$(ipmitool fru print 1 2>/dev/null | tr -s ' ' | cut -d' ' -f3-5 | grep 'Manufacturer') && echo $_rv || echo 'Manufacturer : N/A'", + "raw": "0", + "separator": ":", + "field_name": "Manufacturer", + "field_pos": "2" + }, + { + "attr_name": "psu_model_name", + "bmc_cmd": "_rv=$(ipmitool fru print 1 2>/dev/null | tr -s ' ' | cut -d' ' -f3-5 | grep 'Name') && echo $_rv || echo 'Name : N/A'", + "raw": "0", + "separator": ":", + "field_name": "Name", + "field_pos": "2" + }, + { + "attr_name": "psu_serial_num", + "bmc_cmd": "_rv=$(ipmitool fru print 1 2>/dev/null | tr -s ' ' | cut -d' ' -f3-5 | grep 'Serial') && echo $_rv || echo 'Serial : N/A'", + "raw": "0", + "separator": ":", + "field_name": "Serial", + "field_pos": "2" + }, + { + "attr_name": "psu_fan_dir", + "bmc_cmd": "ipmitool raw 0x3c 0x30 0x0 | xargs | cut -d' ' -f1", + "raw": "1", + "type": "raw" + }, + { + "attr_name": "psu_v_in", + "bmc_cmd": "ipmitool sdr get -c PSU0_VIN | sed -e 's/,,/,N\\/A,/g' -e 's/,,/,N\\/A,/g'", + "raw": "0", + "separator": ",", + "field_name": "PSU0_VIN", + "field_pos": "2", + "mult": "1000" + }, + { + "attr_name": "psu_i_in", + "bmc_cmd": "ipmitool sdr get -c PSU0_IIN | sed -e 's/,,/,N\\/A,/g' -e 's/,,/,N\\/A,/g'", + "raw": "0", + "separator": ",", + "field_name": "PSU0_IIN", + "field_pos": "2", + "mult": "1000" + } + ] + } + } + }, + "PSU1-EEPROM": { + "dev_info": { + "device_type": "PSU-EEPROM", + "device_name": "PSU1-EEPROM", + "device_parent": "MUX1", + "virt_parent": "PSU1" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x2", + "dev_addr": "0x5a", + "dev_type": "psu_eeprom" + }, + "attr_list": [ + { + "attr_name":"psu_present", + "attr_devaddr":"0x30", + "attr_devtype":"cpld", + "attr_offset":"0x51", + "attr_mask":"0x1", + "attr_cmpval":"0x0", + "attr_len":"1" + }, + { + "attr_name":"psu_power_good", + "attr_devaddr":"0x30", + "attr_devtype":"cpld", + "attr_offset":"0x51", + "attr_mask":"0x10", + "attr_cmpval":"0x10", + "attr_len":"1" + } + ] + } + }, + "PSU2": { + "dev_info": { + "device_type": "PSU", + "device_name": "PSU2", + "device_parent": "MUX1" + }, + "dev_attr": { + "dev_idx": "2", + "num_psu_fans": "1" + }, + "i2c": { + "interface": [ + { "itf":"eeprom", "dev":"PSU2-EEPROM" } + ] + }, + "bmc": { + "ipmitool": { + "attr_list": + [ + { + "attr_name": "psu_v_out", + "bmc_cmd": "ipmitool sdr get -c PSU1_VOUT | sed -e 's/,,/,N\\/A,/g' -e 's/,,/,N\\/A,/g'", + "raw": "0", + "separator": ",", + "field_name": "PSU1_VOUT", + "field_pos": "2", + "mult": "1000" + }, + { + "attr_name": "psu_i_out", + "bmc_cmd": "ipmitool sdr get -c PSU1_IOUT | sed -e 's/,,/,N\\/A,/g' -e 's/,,/,N\\/A,/g'", + "raw": "0", + "separator": ",", + "field_name": "PSU1_IOUT", + "field_pos": "2", + "mult": "1000" + }, + { + "attr_name": "psu_temp1_input", + "bmc_cmd": "ipmitool sdr get -c PSU1_TEMP1 | sed -e 's/,,/,N\\/A,/g' -e 's/,,/,N\\/A,/g'", + "raw": "0", + "separator": ",", + "field_name": "PSU1_TEMP1", + "field_pos": "2", + "mult": "1000" + }, + { + "attr_name": "psu_fan1_speed_rpm", + "bmc_cmd": "ipmitool sdr get -c PSU1_FAN1 | sed -e 's/,,/,N\\/A,/g' -e 's/,,/,N\\/A,/g'", + "raw": "0", + "separator": ",", + "field_name": "PSU1_FAN1", + "field_pos": "2" + }, + { + "attr_name": "psu_mfr_id", + "bmc_cmd": "_rv=$(ipmitool fru print 2 2>/dev/null | tr -s ' ' | cut -d' ' -f3-5 | grep 'Manufacturer') && echo $_rv || echo 'Manufacturer : N/A'", + "raw": "0", + "separator": ":", + "field_name": "Manufacturer", + "field_pos": "2" + }, + { + "attr_name": "psu_model_name", + "bmc_cmd": "_rv=$(ipmitool fru print 2 2>/dev/null | tr -s ' ' | cut -d' ' -f3-5 | grep 'Name') && echo $_rv || echo 'Name : N/A'", + "raw": "0", + "separator": ":", + "field_name": "Name", + "field_pos": "2" + }, + { + "attr_name": "psu_serial_num", + "bmc_cmd": "_rv=$(ipmitool fru print 2 2>/dev/null | tr -s ' ' | cut -d' ' -f3-5 | grep 'Serial') && echo $_rv || echo 'Serial : N/A'", + "raw": "0", + "separator": ":", + "field_name": "Serial", + "field_pos": "2" + }, + { + "attr_name": "psu_fan_dir", + "bmc_cmd": "ipmitool raw 0x3c 0x30 0x0 | xargs | cut -d' ' -f2", + "raw": "1", + "type": "raw" + }, + { + "attr_name": "psu_v_in", + "bmc_cmd": "ipmitool sdr get -c PSU1_VIN | sed -e 's/,,/,N\\/A,/g' -e 's/,,/,N\\/A,/g'", + "raw": "0", + "separator": ",", + "field_name": "PSU1_VIN", + "field_pos": "2", + "mult": "1000" + }, + { + "attr_name": "psu_i_in", + "bmc_cmd": "ipmitool sdr get -c PSU1_IIN | sed -e 's/,,/,N\\/A,/g' -e 's/,,/,N\\/A,/g'", + "raw": "0", + "separator": ",", + "field_name": "PSU1_IIN", + "field_pos": "2", + "mult": "1000" + } + ] + } + } + }, + "PSU2-EEPROM": { + "dev_info": { + "device_type": "PSU-EEPROM", + "device_name": "PSU2-EEPROM", + "device_parent": "MUX1", + "virt_parent": "PSU2" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x2", + "dev_addr": "0x5b", + "dev_type": "psu_eeprom" + }, + "attr_list": [ + { + "attr_name":"psu_present", + "attr_devaddr":"0x30", + "attr_devtype":"cpld", + "attr_offset":"0x51", + "attr_mask":"0x2", + "attr_cmpval":"0x0", + "attr_len":"1" + }, + { + "attr_name":"psu_power_good", + "attr_devaddr":"0x30", + "attr_devtype":"cpld", + "attr_offset":"0x51", + "attr_mask":"0x20", + "attr_cmpval":"0x20", + "attr_len":"1" + } + ] + } + }, + "FAN-CTRL": { + "dev_info": { + "device_type": "FAN", + "device_name": "FAN-CTRL", + "device_parent": "" + }, + "bmc": { + "ipmitool": { + "attr_list": [ + { + "attr_name": "fan1_present", + "bmc_cmd": "ipmitool sdr get -c FAN0_PRSNT_L", + "raw": "0", + "separator": ",", + "field_name": "FAN0_PRSNT_L", + "field_pos": "5" + }, + { + "attr_name": "fan2_present", + "bmc_cmd": "ipmitool sdr get -c FAN0_PRSNT_L", + "raw": "0", + "separator": ",", + "field_name": "FAN0_PRSNT_L", + "field_pos": "5" + }, + { + "attr_name": "fan3_present", + "bmc_cmd": "ipmitool sdr get -c FAN1_PRSNT_L", + "raw": "0", + "separator": ",", + "field_name": "FAN1_PRSNT_L", + "field_pos": "5" + }, + { + "attr_name": "fan4_present", + "bmc_cmd": "ipmitool sdr get -c FAN1_PRSNT_L", + "raw": "0", + "separator": ",", + "field_name": "FAN1_PRSNT_L", + "field_pos": "5" + }, + { + "attr_name": "fan5_present", + "bmc_cmd": "ipmitool sdr get -c FAN2_PRSNT_L", + "raw": "0", + "separator": ",", + "field_name": "FAN2_PRSNT_L", + "field_pos": "5" + }, + { + "attr_name": "fan6_present", + "bmc_cmd": "ipmitool sdr get -c FAN2_PRSNT_L", + "raw": "0", + "separator": ",", + "field_name": "FAN2_PRSNT_L", + "field_pos": "5" + }, + { + "attr_name": "fan1_input", + "bmc_cmd": "ipmitool sdr get -c FAN0_RPM_F | sed -e 's/,,/,N\\/A,/g' -e 's/,,/,N\\/A,/g'", + "raw": "0", + "separator": ",", + "field_name": "FAN0_RPM_F", + "field_pos": "2" + }, + { + "attr_name": "fan2_input", + "bmc_cmd": "ipmitool sdr get -c FAN0_RPM_R | sed -e 's/,,/,N\\/A,/g' -e 's/,,/,N\\/A,/g'", + "raw": "0", + "separator": ",", + "field_name": "FAN0_RPM_R", + "field_pos": "2" + }, + { + "attr_name": "fan3_input", + "bmc_cmd": "ipmitool sdr get -c FAN1_RPM_F | sed -e 's/,,/,N\\/A,/g' -e 's/,,/,N\\/A,/g'", + "raw": "0", + "separator": ",", + "field_name": "FAN1_RPM_F", + "field_pos": "2" + }, + { + "attr_name": "fan4_input", + "bmc_cmd": "ipmitool sdr get -c FAN1_RPM_R | sed -e 's/,,/,N\\/A,/g' -e 's/,,/,N\\/A,/g'", + "raw": "0", + "separator": ",", + "field_name": "FAN1_RPM_R", + "field_pos": "2" + }, + { + "attr_name": "fan5_input", + "bmc_cmd": "ipmitool sdr get -c FAN2_RPM_F | sed -e 's/,,/,N\\/A,/g' -e 's/,,/,N\\/A,/g'", + "raw": "0", + "separator": ",", + "field_name": "FAN2_RPM_F", + "field_pos": "2" + }, + { + "attr_name": "fan6_input", + "bmc_cmd": "ipmitool sdr get -c FAN2_RPM_R | sed -e 's/,,/,N\\/A,/g' -e 's/,,/,N\\/A,/g'", + "raw": "0", + "separator": ",", + "field_name": "FAN2_RPM_R", + "field_pos": "2" + }, + { + "attr_name": "fan1_direction", + "bmc_cmd": "ipmitool raw 0x3c 0x31 0x0 | xargs | cut -d' ' -f1", + "raw": "1", + "type": "raw" + }, + { + "attr_name": "fan2_direction", + "bmc_cmd": "ipmitool raw 0x3c 0x31 0x0 | xargs | cut -d' ' -f1", + "raw": "1", + "type": "raw" + }, + { + "attr_name": "fan3_direction", + "bmc_cmd": "ipmitool raw 0x3c 0x31 0x0 | xargs | cut -d' ' -f2", + "raw": "1", + "type": "raw" + }, + { + "attr_name": "fan4_direction", + "bmc_cmd": "ipmitool raw 0x3c 0x31 0x0 | xargs | cut -d' ' -f2", + "raw": "1", + "type": "raw" + }, + { + "attr_name": "fan5_direction", + "bmc_cmd": "ipmitool raw 0x3c 0x31 0x0 | xargs | cut -d' ' -f3", + "raw": "1", + "type": "raw" + }, + { + "attr_name": "fan6_direction", + "bmc_cmd": "ipmitool raw 0x3c 0x31 0x0 | xargs | cut -d' ' -f3", + "raw": "1", + "type": "raw" + } + ] + } + } + }, + "SYS_LED": { + "dev_info": { + "device_type": "LED", + "device_name": "SYS_LED" + }, + "dev_attr": { + "index": "0", + "flag": "rw" + }, + "i2c": { + "attr_list": [ + { + "attr_name": "green", + "bits": "7:4", + "descr": "Green", + "value": "0x09;0x0b", + "swpld_addr": "0x30", + "swpld_addr_offset": "0x81" + }, + { + "attr_name": "green_blink", + "bits": "7:4", + "descr": "Green Blinking", + "value": "0x0d;0x0f", + "swpld_addr": "0x30", + "swpld_addr_offset": "0x81" + }, + { + "attr_name": "yellow", + "bits": "7:4", + "descr": "Yellow", + "value": "0x08;0x0a", + "swpld_addr": "0x30", + "swpld_addr_offset": "0x81" + }, + { + "attr_name": "yellow_blink", + "bits": "7:4", + "descr": "Yellow Blinking", + "value": "0x0c;0x0e", + "swpld_addr": "0x30", + "swpld_addr_offset": "0x81" + }, + { + "attr_name": "off", + "bits": "7:6", + "descr": "Off", + "value": "0x01;0x0", + "swpld_addr": "0x30", + "swpld_addr_offset": "0x81" + } + ] + } + }, + "FAN_LED": { + "dev_info": { + "device_type": "LED", + "device_name": "FAN_LED" + }, + "dev_attr": { + "index": "0", + "flag": "ro" + }, + "i2c": { + "attr_list": [ + { + "attr_name": "green", + "bits": "3:0", + "descr": "Green", + "value": "0x09;0x0b", + "swpld_addr": "0x30", + "swpld_addr_offset": "0x83" + }, + { + "attr_name": "green_blink", + "bits": "3:0", + "descr": "Green Blinking", + "value": "0x0d;0x0f", + "swpld_addr": "0x30", + "swpld_addr_offset": "0x83" + }, + { + "attr_name": "yellow", + "bits": "3:0", + "descr": "Yellow", + "value": "0x08;0x0a", + "swpld_addr": "0x30", + "swpld_addr_offset": "0x83" + }, + { + "attr_name": "yellow_blink", + "bits": "3:0", + "descr": "Yellow Blinking", + "value": "0x0c;0x0e", + "swpld_addr": "0x30", + "swpld_addr_offset": "0x83" + }, + { + "attr_name": "off", + "bits": "3", + "descr": "Off", + "value": "0x0", + "swpld_addr": "0x30", + "swpld_addr_offset": "0x83" + } + ] + } + }, + "PSU1_LED": { + "dev_info": { + "device_type": "LED", + "device_name": "PSU_LED" + }, + "dev_attr": { + "index": "0", + "flag": "ro" + }, + "i2c": { + "attr_list": [ + { + "attr_name": "green", + "bits": "3:0", + "descr": "Green", + "value": "0x09;0x0b", + "swpld_addr": "0x30", + "swpld_addr_offset": "0x80" + }, + { + "attr_name": "green_blink", + "bits": "3:0", + "descr": "Green Blinking", + "value": "0x0d;0x0f", + "swpld_addr": "0x30", + "swpld_addr_offset": "0x80" + }, + { + "attr_name": "yellow", + "bits": "3:0", + "descr": "Yellow", + "value": "0x08;0x0a", + "swpld_addr": "0x30", + "swpld_addr_offset": "0x80" + }, + { + "attr_name": "yellow_blink", + "bits": "3:0", + "descr": "Yellow Blinking", + "value": "0x0c;0x0e", + "swpld_addr": "0x30", + "swpld_addr_offset": "0x80" + }, + { + "attr_name": "off", + "bits": "3", + "descr": "Off", + "value": "0x0", + "swpld_addr": "0x30", + "swpld_addr_offset": "0x80" + } + ] + } + }, + "PSU2_LED": { + "dev_info": { + "device_type": "LED", + "device_name": "PSU_LED" + }, + "dev_attr": { + "index": "1", + "flag": "ro" + }, + "i2c": { + "attr_list": [ + { + "attr_name": "green", + "bits": "7:4", + "descr": "Green", + "value": "0x09;0x0b", + "swpld_addr": "0x30", + "swpld_addr_offset": "0x80" + }, + { + "attr_name": "green_blink", + "bits": "7:4", + "descr": "Green Blinking", + "value": "0x0d;0x0f", + "swpld_addr": "0x30", + "swpld_addr_offset": "0x80" + }, + { + "attr_name": "yellow", + "bits": "7:4", + "descr": "Yellow", + "value": "0x08;0x0a", + "swpld_addr": "0x30", + "swpld_addr_offset": "0x80" + }, + { + "attr_name": "yellow_blink", + "bits": "7:4", + "descr": "Yellow Blinking", + "value": "0x0c;0x0e", + "swpld_addr": "0x30", + "swpld_addr_offset": "0x80" + }, + { + "attr_name": "off", + "bits": "7", + "descr": "Off", + "value": "0x0", + "swpld_addr": "0x30", + "swpld_addr_offset": "0x80" + } + ] + } + }, + "LOC_LED": { + "dev_info": { + "device_type": "LED", + "device_name": "LOC_LED" + }, + "dev_attr": { + "index": "0", + "flag": "rw" + }, + "i2c": { + "attr_list": [ + { + "attr_name": "blue", + "bits": "3:1", + "descr": "Blue", + "value": "0x04;0x05", + "swpld_addr": "0x30", + "swpld_addr_offset": "0x84" + }, + { + "attr_name": "blue_blink", + "bits": "3:1", + "descr": "Blue Blinking", + "value": "0x06;0x07", + "swpld_addr": "0x30", + "swpld_addr_offset": "0x84" + }, + { + "attr_name": "off", + "bits": "3:2", + "descr": "Off", + "value": "0x01;0x0", + "swpld_addr": "0x30", + "swpld_addr_offset": "0x84" + } + ] + } + }, + "PORT1": { + "dev_info": { + "device_type": "QSFP28", + "device_name": "PORT1", + "device_parent": "MUX3" + }, + "dev_attr": { + "dev_idx": "1" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT1-EEPROM" + }, + { + "itf": "control", + "dev": "PORT1-CTRL" + } + ] + } + }, + "PORT1-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT1-EEPROM", + "device_parent": "MUX3", + "virt_parent": "PORT1" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x12", + "dev_addr": "0x50", + "dev_type": "optoe1" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT1-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT1-CTRL", + "device_parent": "MUX3", + "virt_parent": "PORT1" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x12", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_intr_status", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x14", + "attr_mask": "0", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x10", + "attr_mask": "0", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x40", + "attr_mask": "0", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_lpmode", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x44", + "attr_mask": "0", + "attr_cmpval": "0x1", + "attr_len": "1" + } + ] + } + }, + "PORT2": { + "dev_info": { + "device_type": "QSFP28", + "device_name": "PORT2", + "device_parent": "MUX3" + }, + "dev_attr": { + "dev_idx": "2" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT2-EEPROM" + }, + { + "itf": "control", + "dev": "PORT2-CTRL" + } + ] + } + }, + "PORT2-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT2-EEPROM", + "device_parent": "MUX3", + "virt_parent": "PORT2" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x13", + "dev_addr": "0x50", + "dev_type": "optoe1" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT2-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT2-CTRL", + "device_parent": "MUX3", + "virt_parent": "PORT2" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x13", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_intr_status", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x14", + "attr_mask": "1", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x10", + "attr_mask": "1", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x40", + "attr_mask": "1", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_lpmode", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x44", + "attr_mask": "1", + "attr_cmpval": "0x2", + "attr_len": "1" + } + ] + } + }, + "PORT3": { + "dev_info": { + "device_type": "QSFP28", + "device_name": "PORT3", + "device_parent": "MUX3" + }, + "dev_attr": { + "dev_idx": "3" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT3-EEPROM" + }, + { + "itf": "control", + "dev": "PORT3-CTRL" + } + ] + } + }, + "PORT3-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT3-EEPROM", + "device_parent": "MUX3", + "virt_parent": "PORT3" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x14", + "dev_addr": "0x50", + "dev_type": "optoe1" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT3-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT3-CTRL", + "device_parent": "MUX3", + "virt_parent": "PORT3" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x14", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_intr_status", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x14", + "attr_mask": "2", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x10", + "attr_mask": "2", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x40", + "attr_mask": "2", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_lpmode", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x44", + "attr_mask": "2", + "attr_cmpval": "0x4", + "attr_len": "1" + } + ] + } + }, + "PORT4": { + "dev_info": { + "device_type": "QSFP28", + "device_name": "PORT4", + "device_parent": "MUX3" + }, + "dev_attr": { + "dev_idx": "4" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT4-EEPROM" + }, + { + "itf": "control", + "dev": "PORT4-CTRL" + } + ] + } + }, + "PORT4-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT4-EEPROM", + "device_parent": "MUX3", + "virt_parent": "PORT4" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x15", + "dev_addr": "0x50", + "dev_type": "optoe1" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT4-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT4-CTRL", + "device_parent": "MUX3", + "virt_parent": "PORT4" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x15", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_intr_status", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x14", + "attr_mask": "3", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x10", + "attr_mask": "3", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x40", + "attr_mask": "3", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_lpmode", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x44", + "attr_mask": "3", + "attr_cmpval": "0x8", + "attr_len": "1" + } + ] + } + }, + "PORT5": { + "dev_info": { + "device_type": "QSFP28", + "device_name": "PORT5", + "device_parent": "MUX3" + }, + "dev_attr": { + "dev_idx": "5" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT5-EEPROM" + }, + { + "itf": "control", + "dev": "PORT5-CTRL" + } + ] + } + }, + "PORT5-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT5-EEPROM", + "device_parent": "MUX3", + "virt_parent": "PORT5" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x16", + "dev_addr": "0x50", + "dev_type": "optoe1" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT5-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT5-CTRL", + "device_parent": "MUX3", + "virt_parent": "PORT5" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x16", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_intr_status", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x14", + "attr_mask": "4", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x10", + "attr_mask": "4", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x40", + "attr_mask": "4", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_lpmode", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x44", + "attr_mask": "4", + "attr_cmpval": "0x10", + "attr_len": "1" + } + ] + } + }, + "PORT6": { + "dev_info": { + "device_type": "QSFP28", + "device_name": "PORT6", + "device_parent": "MUX3" + }, + "dev_attr": { + "dev_idx": "6" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT6-EEPROM" + }, + { + "itf": "control", + "dev": "PORT6-CTRL" + } + ] + } + }, + "PORT6-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT6-EEPROM", + "device_parent": "MUX3", + "virt_parent": "PORT6" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x17", + "dev_addr": "0x50", + "dev_type": "optoe1" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT6-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT6-CTRL", + "device_parent": "MUX3", + "virt_parent": "PORT6" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x17", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_intr_status", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x14", + "attr_mask": "5", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x10", + "attr_mask": "5", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x40", + "attr_mask": "5", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_lpmode", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x44", + "attr_mask": "5", + "attr_cmpval": "0x20", + "attr_len": "1" + } + ] + } + }, + "PORT7": { + "dev_info": { + "device_type": "QSFP28", + "device_name": "PORT7", + "device_parent": "MUX3" + }, + "dev_attr": { + "dev_idx": "7" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT7-EEPROM" + }, + { + "itf": "control", + "dev": "PORT7-CTRL" + } + ] + } + }, + "PORT7-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT7-EEPROM", + "device_parent": "MUX3", + "virt_parent": "PORT7" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x18", + "dev_addr": "0x50", + "dev_type": "optoe1" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT7-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT7-CTRL", + "device_parent": "MUX3", + "virt_parent": "PORT7" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x18", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_intr_status", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x14", + "attr_mask": "6", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x10", + "attr_mask": "6", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x40", + "attr_mask": "6", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_lpmode", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x44", + "attr_mask": "6", + "attr_cmpval": "0x40", + "attr_len": "1" + } + ] + } + }, + "PORT8": { + "dev_info": { + "device_type": "QSFP28", + "device_name": "PORT8", + "device_parent": "MUX3" + }, + "dev_attr": { + "dev_idx": "8" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT8-EEPROM" + }, + { + "itf": "control", + "dev": "PORT8-CTRL" + } + ] + } + }, + "PORT8-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT8-EEPROM", + "device_parent": "MUX3", + "virt_parent": "PORT8" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x19", + "dev_addr": "0x50", + "dev_type": "optoe1" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT8-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT8-CTRL", + "device_parent": "MUX3", + "virt_parent": "PORT8" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x19", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_intr_status", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x14", + "attr_mask": "7", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x10", + "attr_mask": "7", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x40", + "attr_mask": "7", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_lpmode", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x44", + "attr_mask": "7", + "attr_cmpval": "0x80", + "attr_len": "1" + } + ] + } + }, + "PORT9": { + "dev_info": { + "device_type": "QSFP28", + "device_name": "PORT9", + "device_parent": "MUX4" + }, + "dev_attr": { + "dev_idx": "9" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT9-EEPROM" + }, + { + "itf": "control", + "dev": "PORT9-CTRL" + } + ] + } + }, + "PORT9-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT9-EEPROM", + "device_parent": "MUX4", + "virt_parent": "PORT9" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x1A", + "dev_addr": "0x50", + "dev_type": "optoe1" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT9-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT9-CTRL", + "device_parent": "MUX4", + "virt_parent": "PORT9" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x1A", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_intr_status", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x15", + "attr_mask": "0", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x11", + "attr_mask": "0", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x41", + "attr_mask": "0", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_lpmode", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x45", + "attr_mask": "0", + "attr_cmpval": "0x1", + "attr_len": "1" + } + ] + } + }, + "PORT10": { + "dev_info": { + "device_type": "QSFP28", + "device_name": "PORT10", + "device_parent": "MUX4" + }, + "dev_attr": { + "dev_idx": "10" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT10-EEPROM" + }, + { + "itf": "control", + "dev": "PORT10-CTRL" + } + ] + } + }, + "PORT10-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT10-EEPROM", + "device_parent": "MUX4", + "virt_parent": "PORT10" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x1B", + "dev_addr": "0x50", + "dev_type": "optoe1" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT10-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT10-CTRL", + "device_parent": "MUX4", + "virt_parent": "PORT10" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x1B", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_intr_status", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x15", + "attr_mask": "1", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x11", + "attr_mask": "1", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x41", + "attr_mask": "1", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_lpmode", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x45", + "attr_mask": "1", + "attr_cmpval": "0x2", + "attr_len": "1" + } + ] + } + }, + "PORT11": { + "dev_info": { + "device_type": "QSFP28", + "device_name": "PORT11", + "device_parent": "MUX4" + }, + "dev_attr": { + "dev_idx": "11" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT11-EEPROM" + }, + { + "itf": "control", + "dev": "PORT11-CTRL" + } + ] + } + }, + "PORT11-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT11-EEPROM", + "device_parent": "MUX4", + "virt_parent": "PORT11" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x1C", + "dev_addr": "0x50", + "dev_type": "optoe1" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT11-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT11-CTRL", + "device_parent": "MUX4", + "virt_parent": "PORT11" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x1C", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_intr_status", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x15", + "attr_mask": "2", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x11", + "attr_mask": "2", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x41", + "attr_mask": "2", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_lpmode", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x45", + "attr_mask": "2", + "attr_cmpval": "0x4", + "attr_len": "1" + } + ] + } + }, + "PORT12": { + "dev_info": { + "device_type": "QSFP28", + "device_name": "PORT12", + "device_parent": "MUX4" + }, + "dev_attr": { + "dev_idx": "12" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT12-EEPROM" + }, + { + "itf": "control", + "dev": "PORT12-CTRL" + } + ] + } + }, + "PORT12-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT12-EEPROM", + "device_parent": "MUX4", + "virt_parent": "PORT12" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x1D", + "dev_addr": "0x50", + "dev_type": "optoe1" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT12-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT12-CTRL", + "device_parent": "MUX4", + "virt_parent": "PORT12" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x1D", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_intr_status", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x15", + "attr_mask": "3", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x11", + "attr_mask": "3", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x41", + "attr_mask": "3", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_lpmode", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x45", + "attr_mask": "3", + "attr_cmpval": "0x8", + "attr_len": "1" + } + ] + } + }, + "PORT13": { + "dev_info": { + "device_type": "QSFP28", + "device_name": "PORT13", + "device_parent": "MUX4" + }, + "dev_attr": { + "dev_idx": "13" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT13-EEPROM" + }, + { + "itf": "control", + "dev": "PORT13-CTRL" + } + ] + } + }, + "PORT13-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT13-EEPROM", + "device_parent": "MUX4", + "virt_parent": "PORT13" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x1E", + "dev_addr": "0x50", + "dev_type": "optoe1" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT13-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT13-CTRL", + "device_parent": "MUX4", + "virt_parent": "PORT13" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x1E", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_intr_status", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x15", + "attr_mask": "4", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x11", + "attr_mask": "4", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x41", + "attr_mask": "4", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_lpmode", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x45", + "attr_mask": "4", + "attr_cmpval": "0x10", + "attr_len": "1" + } + ] + } + }, + "PORT14": { + "dev_info": { + "device_type": "QSFP28", + "device_name": "PORT14", + "device_parent": "MUX4" + }, + "dev_attr": { + "dev_idx": "14" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT14-EEPROM" + }, + { + "itf": "control", + "dev": "PORT14-CTRL" + } + ] + } + }, + "PORT14-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT14-EEPROM", + "device_parent": "MUX4", + "virt_parent": "PORT14" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x1F", + "dev_addr": "0x50", + "dev_type": "optoe1" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT14-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT14-CTRL", + "device_parent": "MUX4", + "virt_parent": "PORT14" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x1F", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_intr_status", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x15", + "attr_mask": "5", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x11", + "attr_mask": "5", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x41", + "attr_mask": "5", + "attr_cmpval": "0x20", + "attr_len": "1" + }, + { + "attr_name": "xcvr_lpmode", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x45", + "attr_mask": "5", + "attr_cmpval": "0x20", + "attr_len": "1" + } + ] + } + }, + "PORT15": { + "dev_info": { + "device_type": "QSFP28", + "device_name": "PORT15", + "device_parent": "MUX4" + }, + "dev_attr": { + "dev_idx": "15" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT15-EEPROM" + }, + { + "itf": "control", + "dev": "PORT15-CTRL" + } + ] + } + }, + "PORT15-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT15-EEPROM", + "device_parent": "MUX4", + "virt_parent": "PORT15" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x20", + "dev_addr": "0x50", + "dev_type": "optoe1" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT15-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT15-CTRL", + "device_parent": "MUX4", + "virt_parent": "PORT15" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x20", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_intr_status", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x15", + "attr_mask": "6", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x11", + "attr_mask": "6", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x41", + "attr_mask": "6", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_lpmode", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x45", + "attr_mask": "6", + "attr_cmpval": "0x40", + "attr_len": "1" + } + ] + } + }, + "PORT16": { + "dev_info": { + "device_type": "QSFP28", + "device_name": "PORT16", + "device_parent": "MUX4" + }, + "dev_attr": { + "dev_idx": "16" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT16-EEPROM" + }, + { + "itf": "control", + "dev": "PORT16-CTRL" + } + ] + } + }, + "PORT16-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT16-EEPROM", + "device_parent": "MUX4", + "virt_parent": "PORT16" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x21", + "dev_addr": "0x50", + "dev_type": "optoe1" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT16-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT16-CTRL", + "device_parent": "MUX4", + "virt_parent": "PORT16" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x21", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_intr_status", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x15", + "attr_mask": "7", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x11", + "attr_mask": "7", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x41", + "attr_mask": "7", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_lpmode", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x45", + "attr_mask": "7", + "attr_cmpval": "0x80", + "attr_len": "1" + } + ] + } + }, + "PORT17": { + "dev_info": { + "device_type": "QSFP28", + "device_name": "PORT17", + "device_parent": "MUX5" + }, + "dev_attr": { + "dev_idx": "17" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT17-EEPROM" + }, + { + "itf": "control", + "dev": "PORT17-CTRL" + } + ] + } + }, + "PORT17-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT17-EEPROM", + "device_parent": "MUX5", + "virt_parent": "PORT17" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x22", + "dev_addr": "0x50", + "dev_type": "optoe1" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT17-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT17-CTRL", + "device_parent": "MUX5", + "virt_parent": "PORT17" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x22", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_intr_status", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x16", + "attr_mask": "0", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x12", + "attr_mask": "0", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x42", + "attr_mask": "0", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_lpmode", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x46", + "attr_mask": "0", + "attr_cmpval": "0x1", + "attr_len": "1" + } + ] + } + }, + "PORT18": { + "dev_info": { + "device_type": "QSFP28", + "device_name": "PORT18", + "device_parent": "MUX5" + }, + "dev_attr": { + "dev_idx": "18" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT18-EEPROM" + }, + { + "itf": "control", + "dev": "PORT18-CTRL" + } + ] + } + }, + "PORT18-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT18-EEPROM", + "device_parent": "MUX5", + "virt_parent": "PORT18" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x23", + "dev_addr": "0x50", + "dev_type": "optoe1" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT18-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT18-CTRL", + "device_parent": "MUX5", + "virt_parent": "PORT18" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x23", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_intr_status", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x16", + "attr_mask": "1", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x12", + "attr_mask": "1", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x42", + "attr_mask": "1", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_lpmode", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x46", + "attr_mask": "1", + "attr_cmpval": "0x2", + "attr_len": "1" + } + ] + } + }, + "PORT19": { + "dev_info": { + "device_type": "QSFP28", + "device_name": "PORT19", + "device_parent": "MUX5" + }, + "dev_attr": { + "dev_idx": "19" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT19-EEPROM" + }, + { + "itf": "control", + "dev": "PORT19-CTRL" + } + ] + } + }, + "PORT19-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT19-EEPROM", + "device_parent": "MUX5", + "virt_parent": "PORT19" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x24", + "dev_addr": "0x50", + "dev_type": "optoe1" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT19-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT19-CTRL", + "device_parent": "MUX5", + "virt_parent": "PORT19" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x24", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_intr_status", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x16", + "attr_mask": "2", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x12", + "attr_mask": "2", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x42", + "attr_mask": "2", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_lpmode", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x46", + "attr_mask": "2", + "attr_cmpval": "0x4", + "attr_len": "1" + } + ] + } + }, + "PORT20": { + "dev_info": { + "device_type": "QSFP28", + "device_name": "PORT20", + "device_parent": "MUX5" + }, + "dev_attr": { + "dev_idx": "20" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT20-EEPROM" + }, + { + "itf": "control", + "dev": "PORT20-CTRL" + } + ] + } + }, + "PORT20-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT20-EEPROM", + "device_parent": "MUX5", + "virt_parent": "PORT20" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x25", + "dev_addr": "0x50", + "dev_type": "optoe1" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT20-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT20-CTRL", + "device_parent": "MUX5", + "virt_parent": "PORT20" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x25", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_intr_status", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x16", + "attr_mask": "3", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x12", + "attr_mask": "3", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x42", + "attr_mask": "3", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_lpmode", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x46", + "attr_mask": "3", + "attr_cmpval": "0x8", + "attr_len": "1" + } + ] + } + }, + "PORT21": { + "dev_info": { + "device_type": "QSFP28", + "device_name": "PORT21", + "device_parent": "MUX5" + }, + "dev_attr": { + "dev_idx": "21" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT21-EEPROM" + }, + { + "itf": "control", + "dev": "PORT21-CTRL" + } + ] + } + }, + "PORT21-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT21-EEPROM", + "device_parent": "MUX5", + "virt_parent": "PORT21" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x26", + "dev_addr": "0x50", + "dev_type": "optoe1" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT21-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT21-CTRL", + "device_parent": "MUX5", + "virt_parent": "PORT21" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x26", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_intr_status", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x16", + "attr_mask": "4", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x12", + "attr_mask": "4", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x42", + "attr_mask": "4", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_lpmode", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x46", + "attr_mask": "4", + "attr_cmpval": "0x10", + "attr_len": "1" + } + ] + } + }, + "PORT22": { + "dev_info": { + "device_type": "QSFP28", + "device_name": "PORT22", + "device_parent": "MUX5" + }, + "dev_attr": { + "dev_idx": "22" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT22-EEPROM" + }, + { + "itf": "control", + "dev": "PORT22-CTRL" + } + ] + } + }, + "PORT22-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT22-EEPROM", + "device_parent": "MUX5", + "virt_parent": "PORT22" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x27", + "dev_addr": "0x50", + "dev_type": "optoe1" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT22-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT22-CTRL", + "device_parent": "MUX5", + "virt_parent": "PORT22" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x27", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_intr_status", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x16", + "attr_mask": "5", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x12", + "attr_mask": "5", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x42", + "attr_mask": "5", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_lpmode", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x46", + "attr_mask": "5", + "attr_cmpval": "0x20", + "attr_len": "1" + } + ] + } + }, + "PORT23": { + "dev_info": { + "device_type": "QSFP28", + "device_name": "PORT23", + "device_parent": "MUX5" + }, + "dev_attr": { + "dev_idx": "23" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT23-EEPROM" + }, + { + "itf": "control", + "dev": "PORT23-CTRL" + } + ] + } + }, + "PORT23-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT23-EEPROM", + "device_parent": "MUX5", + "virt_parent": "PORT23" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x28", + "dev_addr": "0x50", + "dev_type": "optoe1" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT23-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT23-CTRL", + "device_parent": "MUX5", + "virt_parent": "PORT23" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x28", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_intr_status", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x16", + "attr_mask": "6", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x12", + "attr_mask": "6", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x42", + "attr_mask": "6", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_lpmode", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x46", + "attr_mask": "6", + "attr_cmpval": "0x40", + "attr_len": "1" + } + ] + } + }, + "PORT24": { + "dev_info": { + "device_type": "QSFP28", + "device_name": "PORT24", + "device_parent": "MUX5" + }, + "dev_attr": { + "dev_idx": "24" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT24-EEPROM" + }, + { + "itf": "control", + "dev": "PORT24-CTRL" + } + ] + } + }, + "PORT24-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT24-EEPROM", + "device_parent": "MUX5", + "virt_parent": "PORT24" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x29", + "dev_addr": "0x50", + "dev_type": "optoe1" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT24-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT24-CTRL", + "device_parent": "MUX5", + "virt_parent": "PORT24" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x29", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_intr_status", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x16", + "attr_mask": "7", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x12", + "attr_mask": "7", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x42", + "attr_mask": "7", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_lpmode", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x46", + "attr_mask": "7", + "attr_cmpval": "0x80", + "attr_len": "1" + } + ] + } + }, + "PORT25": { + "dev_info": { + "device_type": "QSFP28", + "device_name": "PORT25", + "device_parent": "MUX6" + }, + "dev_attr": { + "dev_idx": "25" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT25-EEPROM" + }, + { + "itf": "control", + "dev": "PORT25-CTRL" + } + ] + } + }, + "PORT25-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT25-EEPROM", + "device_parent": "MUX6", + "virt_parent": "PORT25" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x2A", + "dev_addr": "0x50", + "dev_type": "optoe1" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT25-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT25-CTRL", + "device_parent": "MUX6", + "virt_parent": "PORT25" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x2A", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_intr_status", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x17", + "attr_mask": "0", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x13", + "attr_mask": "0", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x43", + "attr_mask": "0", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_lpmode", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x47", + "attr_mask": "0", + "attr_cmpval": "0x1", + "attr_len": "1" + } + ] + } + }, + "PORT26": { + "dev_info": { + "device_type": "QSFP28", + "device_name": "PORT26", + "device_parent": "MUX6" + }, + "dev_attr": { + "dev_idx": "26" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT26-EEPROM" + }, + { + "itf": "control", + "dev": "PORT26-CTRL" + } + ] + } + }, + "PORT26-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT26-EEPROM", + "device_parent": "MUX6", + "virt_parent": "PORT26" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x2B", + "dev_addr": "0x50", + "dev_type": "optoe1" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT26-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT26-CTRL", + "device_parent": "MUX6", + "virt_parent": "PORT26" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x2B", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_intr_status", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x17", + "attr_mask": "1", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x13", + "attr_mask": "1", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x43", + "attr_mask": "1", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_lpmode", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x47", + "attr_mask": "1", + "attr_cmpval": "0x2", + "attr_len": "1" + } + ] + } + }, + "PORT27": { + "dev_info": { + "device_type": "QSFP28", + "device_name": "PORT27", + "device_parent": "MUX6" + }, + "dev_attr": { + "dev_idx": "27" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT27-EEPROM" + }, + { + "itf": "control", + "dev": "PORT27-CTRL" + } + ] + } + }, + "PORT27-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT27-EEPROM", + "device_parent": "MUX6", + "virt_parent": "PORT27" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x2C", + "dev_addr": "0x50", + "dev_type": "optoe1" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT27-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT27-CTRL", + "device_parent": "MUX6", + "virt_parent": "PORT27" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x2C", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_intr_status", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x17", + "attr_mask": "2", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x13", + "attr_mask": "2", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x43", + "attr_mask": "2", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_lpmode", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x47", + "attr_mask": "2", + "attr_cmpval": "0x4", + "attr_len": "1" + } + ] + } + }, + "PORT28": { + "dev_info": { + "device_type": "QSFP28", + "device_name": "PORT28", + "device_parent": "MUX6" + }, + "dev_attr": { + "dev_idx": "28" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT28-EEPROM" + }, + { + "itf": "control", + "dev": "PORT28-CTRL" + } + ] + } + }, + "PORT28-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT28-EEPROM", + "device_parent": "MUX6", + "virt_parent": "PORT28" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x2D", + "dev_addr": "0x50", + "dev_type": "optoe1" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT28-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT28-CTRL", + "device_parent": "MUX6", + "virt_parent": "PORT28" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x2D", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_intr_status", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x17", + "attr_mask": "3", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x13", + "attr_mask": "3", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x43", + "attr_mask": "3", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_lpmode", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x47", + "attr_mask": "3", + "attr_cmpval": "0x8", + "attr_len": "1" + } + ] + } + }, + "PORT29": { + "dev_info": { + "device_type": "QSFP28", + "device_name": "PORT29", + "device_parent": "MUX6" + }, + "dev_attr": { + "dev_idx": "29" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT29-EEPROM" + }, + { + "itf": "control", + "dev": "PORT29-CTRL" + } + ] + } + }, + "PORT29-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT29-EEPROM", + "device_parent": "MUX6", + "virt_parent": "PORT29" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x2E", + "dev_addr": "0x50", + "dev_type": "optoe1" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT29-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT29-CTRL", + "device_parent": "MUX6", + "virt_parent": "PORT29" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x2E", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_intr_status", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x17", + "attr_mask": "4", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x13", + "attr_mask": "4", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x43", + "attr_mask": "4", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_lpmode", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x47", + "attr_mask": "4", + "attr_cmpval": "0x10", + "attr_len": "1" + } + ] + } + }, + "PORT30": { + "dev_info": { + "device_type": "QSFP28", + "device_name": "PORT30", + "device_parent": "MUX6" + }, + "dev_attr": { + "dev_idx": "30" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT30-EEPROM" + }, + { + "itf": "control", + "dev": "PORT30-CTRL" + } + ] + } + }, + "PORT30-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT30-EEPROM", + "device_parent": "MUX6", + "virt_parent": "PORT30" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x2F", + "dev_addr": "0x50", + "dev_type": "optoe1" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT30-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT30-CTRL", + "device_parent": "MUX6", + "virt_parent": "PORT30" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x2F", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_intr_status", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x17", + "attr_mask": "5", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x13", + "attr_mask": "5", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x43", + "attr_mask": "5", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_lpmode", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x47", + "attr_mask": "5", + "attr_cmpval": "0x20", + "attr_len": "1" + } + ] + } + }, + "PORT31": { + "dev_info": { + "device_type": "QSFP28", + "device_name": "PORT31", + "device_parent": "MUX6" + }, + "dev_attr": { + "dev_idx": "31" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT31-EEPROM" + }, + { + "itf": "control", + "dev": "PORT31-CTRL" + } + ] + } + }, + "PORT31-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT31-EEPROM", + "device_parent": "MUX6", + "virt_parent": "PORT31" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x30", + "dev_addr": "0x50", + "dev_type": "optoe1" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT31-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT31-CTRL", + "device_parent": "MUX6", + "virt_parent": "PORT31" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x30", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_intr_status", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x17", + "attr_mask": "6", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x13", + "attr_mask": "6", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x43", + "attr_mask": "6", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_lpmode", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x47", + "attr_mask": "6", + "attr_cmpval": "0x40", + "attr_len": "1" + } + ] + } + }, + "PORT32": { + "dev_info": { + "device_type": "QSFP28", + "device_name": "PORT32", + "device_parent": "MUX6" + }, + "dev_attr": { + "dev_idx": "32" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT32-EEPROM" + }, + { + "itf": "control", + "dev": "PORT32-CTRL" + } + ] + } + }, + "PORT32-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT32-EEPROM", + "device_parent": "MUX6", + "virt_parent": "PORT32" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x31", + "dev_addr": "0x50", + "dev_type": "optoe1" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT32-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT32-CTRL", + "device_parent": "MUX6", + "virt_parent": "PORT32" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x31", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_intr_status", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x17", + "attr_mask": "7", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x13", + "attr_mask": "7", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x43", + "attr_mask": "7", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_lpmode", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x47", + "attr_mask": "7", + "attr_cmpval": "0x80", + "attr_len": "1" + } + ] + } + }, + "PORT33": { + "dev_info": { + "device_type": "SFP", + "device_name": "PORT33", + "device_parent": "MUX7" + }, + "dev_attr": { + "dev_idx": "33" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT33-EEPROM" + }, + { + "itf": "control", + "dev": "PORT33-CTRL" + } + ] + } + }, + "PORT33-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT33", + "device_parent": "MUX7", + "virt_parent": "PORT33" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x33", + "dev_addr": "0x50", + "dev_type": "optoe2" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT33-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT33-CTRL", + "device_parent": "MUX7", + "virt_parent": "PORT33" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x33", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x18", + "attr_mask": "1", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_rxlos", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x19", + "attr_mask": "1", + "attr_cmpval": "0x2", + "attr_len": "1" + }, + { + "attr_name": "xcvr_txfault", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x1A", + "attr_mask": "1", + "attr_cmpval": "0x2", + "attr_len": "1" + }, + { + "attr_name": "xcvr_txdisable", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x48", + "attr_mask": "1", + "attr_cmpval": "0x2", + "attr_len": "1" + } + ] + } + } + +} diff --git a/device/ufispace/x86_64-ufispace_s9110_32x-r0/pddf/pddf-device.json b/device/ufispace/x86_64-ufispace_s9110_32x-r0/pddf/pddf-device.json new file mode 120000 index 0000000000..28f5a10018 --- /dev/null +++ b/device/ufispace/x86_64-ufispace_s9110_32x-r0/pddf/pddf-device.json @@ -0,0 +1 @@ +pddf-device-pvt.json \ No newline at end of file diff --git a/device/ufispace/x86_64-ufispace_s9110_32x-r0/pddf_support b/device/ufispace/x86_64-ufispace_s9110_32x-r0/pddf_support new file mode 100644 index 0000000000..e69de29bb2 diff --git a/device/ufispace/x86_64-ufispace_s9110_32x-r0/platform-beta.json b/device/ufispace/x86_64-ufispace_s9110_32x-r0/platform-beta.json new file mode 100644 index 0000000000..717adf878d --- /dev/null +++ b/device/ufispace/x86_64-ufispace_s9110_32x-r0/platform-beta.json @@ -0,0 +1,596 @@ +{ + "chassis": { + "name": "S9110-32X", + "components": [ + { + "name": "CPLD1" + }, + { + "name": "CPLD2" + }, + { + "name": "BIOS" + }, + { + "name": "BMC" + } + ], + "fans": [ + { + "name": "Fantray1_1" + }, + { + "name": "Fantray1_2" + }, + { + "name": "Fantray2_1" + }, + { + "name": "Fantray2_2" + }, + { + "name": "Fantray3_1" + }, + { + "name": "Fantray3_2" + }, + { + "name": "Fantray4_1" + }, + { + "name": "Fantray4_2" + } + ], + "fan_drawers":[ + { + "name": "Fantray1", + "num_fans" : 2, + "fans": [ + { + "name": "Fantray1_1" + }, + { + "name": "Fantray1_2" + } + ] + }, + { + "name": "Fantray2", + "num_fans" : 2, + "fans": [ + { + "name": "Fantray2_1" + }, + { + "name": "Fantray2_2" + } + ] + }, + { + "name": "Fantray3", + "num_fans" : 2, + "fans": [ + { + "name": "Fantray3_1" + }, + { + "name": "Fantray3_2" + } + ] + } + ], + "psus": [ + { + "name": "PSU1", + "fans": [ + { + "name": "PSU1_FAN1" + } + ], + "thermals": [ + { + "name": "PSU1_TEMP1" + } + ] + }, + { + "name": "PSU2", + "fans": [ + { + "name": "PSU2_FAN1" + } + ], + "thermals": [ + { + "name": "PSU2_TEMP1" + } + ] + } + ], + "thermals": [ + { + "name": "TEMP_MAC" + }, + { + "name": "TEMP_ENV_MACCASE" + }, + { + "name": "TEMP_ENV_SSDCASE" + }, + { + "name": "TEMP_ENV_PSUCASE" + }, + { + "name": "TEMP_ENV_BMC" + }, + { + "name": "TEMP_PSU0_TEMP1" + }, + { + "name": "TEMP_PSU1_TEMP1" + } + ], + "sfps": [ + { + "name": "Ethernet0" + }, + { + "name": "Ethernet4" + }, + { + "name": "Ethernet8" + }, + { + "name": "Ethernet12" + }, + { + "name": "Ethernet16" + }, + { + "name": "Ethernet20" + }, + { + "name": "Ethernet24" + }, + { + "name": "Ethernet28" + }, + { + "name": "Ethernet32" + }, + { + "name": "Ethernet36" + }, + { + "name": "Ethernet40" + }, + { + "name": "Ethernet44" + }, + { + "name": "Ethernet48" + }, + { + "name": "Ethernet52" + }, + { + "name": "Ethernet56" + }, + { + "name": "Ethernet60" + }, + { + "name": "Ethernet64" + }, + { + "name": "Ethernet68" + }, + { + "name": "Ethernet72" + }, + { + "name": "Ethernet76" + }, + { + "name": "Ethernet80" + }, + { + "name": "Ethernet84" + }, + { + "name": "Ethernet88" + }, + { + "name": "Ethernet92" + }, + { + "name": "Ethernet96" + }, + { + "name": "Ethernet100" + }, + { + "name": "Ethernet104" + }, + { + "name": "Ethernet108" + }, + { + "name": "Ethernet112" + }, + { + "name": "Ethernet116" + }, + { + "name": "Ethernet120" + }, + { + "name": "Ethernet124" + }, + { + "name": "Ethernet128" + } + ] + }, + "interfaces": { + "Ethernet0": { + "index": "0,0,0,0", + "lanes": "1,2,3,4", + "breakout_modes": { + "1x100G[40G]": ["Eth0(Port0)"], + "2x50G": ["Eth0/1(Port0)", "Eth0/2(Port0)"], + "4x25G": ["Eth0/1(Port0)", "Eth0/2(Port0)", "Eth0/3(Port0)", "Eth0/4(Port0)"], + "4x10G": ["Eth0/1(Port0)", "Eth0/2(Port0)", "Eth0/3(Port0)", "Eth0/4(Port0)"] + } + }, + + "Ethernet4": { + "index": "1,1,1,1", + "lanes": "5,6,7,8", + "breakout_modes": { + "1x100G[40G]": ["Eth1(Port1)"], + "2x50G": ["Eth1/1(Port1)", "Eth1/2(Port1)"], + "4x25G": ["Eth1/1(Port1)", "Eth1/2(Port1)", "Eth1/3(Port1)", "Eth1/4(Port1)"], + "4x10G": ["Eth1/1(Port1)", "Eth1/2(Port1)", "Eth1/3(Port1)", "Eth1/4(Port1)"] + } + }, + + "Ethernet8": { + "index": "2,2,2,2", + "lanes": "9,10,11,12", + "breakout_modes": { + "1x100G[40G]": ["Eth2(Port2)"], + "2x50G": ["Eth2/1(Port2)", "Eth2/2(Port2)"], + "4x25G": ["Eth2/1(Port2)", "Eth2/2(Port2)", "Eth2/3(Port2)", "Eth2/4(Port2)"], + "4x10G": ["Eth2/1(Port2)", "Eth2/2(Port2)", "Eth2/3(Port2)", "Eth2/4(Port2)"] + } + }, + + "Ethernet12": { + "index": "3,3,3,3", + "lanes": "13,14,15,16", + "breakout_modes": { + "1x100G[40G]": ["Eth3(Port3)"], + "2x50G": ["Eth3/1(Port3)", "Eth3/2(Port3)"], + "4x25G": ["Eth3/1(Port3)", "Eth3/2(Port3)", "Eth3/3(Port3)", "Eth3/4(Port3)"], + "4x10G": ["Eth3/1(Port3)", "Eth3/2(Port3)", "Eth3/3(Port3)", "Eth3/4(Port3)"] + } + }, + + "Ethernet16": { + "index": "4,4,4,4", + "lanes": "17,18,19,20", + "breakout_modes": { + "1x100G[40G]": ["Eth4(Port4)"], + "2x50G": ["Eth4/1(Port4)", "Eth4/2(Port4)"], + "4x25G": ["Eth4/1(Port4)", "Eth4/2(Port4)", "Eth4/3(Port4)", "Eth4/4(Port4)"], + "4x10G": ["Eth4/1(Port4)", "Eth4/2(Port4)", "Eth4/3(Port4)", "Eth4/4(Port4)"] + } + }, + + "Ethernet20": { + "index": "5,5,5,5", + "lanes": "21,22,23,24", + "breakout_modes": { + "1x100G[40G]": ["Eth5(Port5)"], + "2x50G": ["Eth5/1(Port5)", "Eth5/2(Port5)"], + "4x25G": ["Eth5/1(Port5)", "Eth5/2(Port5)", "Eth5/3(Port5)", "Eth5/4(Port5)"], + "4x10G": ["Eth5/1(Port5)", "Eth5/2(Port5)", "Eth5/3(Port5)", "Eth5/4(Port5)"] + } + }, + + "Ethernet24": { + "index": "6,6,6,6", + "lanes": "25,26,27,28", + "breakout_modes": { + "1x100G[40G]": ["Eth6(Port6)"], + "2x50G": ["Eth6/1(Port6)", "Eth6/2(Port6)"], + "4x25G": ["Eth6/1(Port6)", "Eth6/2(Port6)", "Eth6/3(Port6)", "Eth6/4(Port6)"], + "4x10G": ["Eth6/1(Port6)", "Eth6/2(Port6)", "Eth6/3(Port6)", "Eth6/4(Port6)"] + } + }, + + "Ethernet28": { + "index": "7,7,7,7", + "lanes": "29,30,31,32", + "breakout_modes": { + "1x100G[40G]": ["Eth7(Port7)"], + "2x50G": ["Eth7/1(Port7)", "Eth7/2(Port7)"], + "4x25G": ["Eth7/1(Port7)", "Eth7/2(Port7)", "Eth7/3(Port7)", "Eth7/4(Port7)"], + "4x10G": ["Eth7/1(Port7)", "Eth7/2(Port7)", "Eth7/3(Port7)", "Eth7/4(Port7)"] + } + }, + + "Ethernet32": { + "index": "8,8,8,8", + "lanes": "33,34,35,36", + "breakout_modes": { + "1x100G[40G]": ["Eth8(Port8)"], + "2x50G": ["Eth8/1(Port8)", "Eth8/2(Port8)"], + "4x25G": ["Eth8/1(Port8)", "Eth8/2(Port8)", "Eth8/3(Port8)", "Eth8/4(Port8)"], + "4x10G": ["Eth8/1(Port8)", "Eth8/2(Port8)", "Eth8/3(Port8)", "Eth8/4(Port8)"] + } + }, + + "Ethernet36": { + "index": "9,9,9,9", + "lanes": "37,38,39,40", + "breakout_modes": { + "1x100G[40G]": ["Eth9(Port9)"], + "2x50G": ["Eth9/1(Port9)", "Eth9/2(Port9)"], + "4x25G": ["Eth9/1(Port9)", "Eth9/2(Port9)", "Eth9/3(Port9)", "Eth9/4(Port9)"], + "4x10G": ["Eth9/1(Port9)", "Eth9/2(Port9)", "Eth9/3(Port9)", "Eth9/4(Port9)"] + } + }, + + "Ethernet40": { + "index": "10,10,10,10", + "lanes": "41,42,43,44", + "breakout_modes": { + "1x100G[40G]": ["Eth10(Port10)"], + "2x50G": ["Eth10/1(Port10)", "Eth10/2(Port10)"], + "4x25G": ["Eth10/1(Port10)", "Eth10/2(Port10)", "Eth10/3(Port10)", "Eth10/4(Port10)"], + "4x10G": ["Eth10/1(Port10)", "Eth10/2(Port10)", "Eth10/3(Port10)", "Eth10/4(Port10)"] + } + }, + + "Ethernet44": { + "index": "11,11,11,11", + "lanes": "45,46,47,48", + "breakout_modes": { + "1x100G[40G]": ["Eth11(Port11)"], + "2x50G": ["Eth11/1(Port11)", "Eth11/2(Port11)"], + "4x25G": ["Eth11/1(Port11)", "Eth11/2(Port11)", "Eth11/3(Port11)", "Eth11/4(Port11)"], + "4x10G": ["Eth11/1(Port11)", "Eth11/2(Port11)", "Eth11/3(Port11)", "Eth11/4(Port11)"] + } + }, + + "Ethernet48": { + "index": "12,12,12,12", + "lanes": "49,50,51,52", + "breakout_modes": { + "1x100G[40G]": ["Eth12(Port12)"], + "2x50G": ["Eth12/1(Port12)", "Eth12/2(Port12)"], + "4x25G": ["Eth12/1(Port12)", "Eth12/2(Port12)", "Eth12/3(Port12)", "Eth12/4(Port12)"], + "4x10G": ["Eth12/1(Port12)", "Eth12/2(Port12)", "Eth12/3(Port12)", "Eth12/4(Port12)"] + } + }, + + "Ethernet52": { + "index": "13,13,13,13", + "lanes": "53,54,55,56", + "breakout_modes": { + "1x100G[40G]": ["Eth13(Port13)"], + "2x50G": ["Eth13/1(Port13)", "Eth13/2(Port13)"], + "4x25G": ["Eth13/1(Port13)", "Eth13/2(Port13)", "Eth13/3(Port13)", "Eth13/4(Port13)"], + "4x10G": ["Eth13/1(Port13)", "Eth13/2(Port13)", "Eth13/3(Port13)", "Eth13/4(Port13)"] + } + }, + + "Ethernet56": { + "index": "14,14,14,14", + "lanes": "57,58,59,60", + "breakout_modes": { + "1x100G[40G]": ["Eth14(Port14)"], + "2x50G": ["Eth14/1(Port14)", "Eth14/2(Port14)"], + "4x25G": ["Eth14/1(Port14)", "Eth14/2(Port14)", "Eth14/3(Port14)", "Eth14/4(Port14)"], + "4x10G": ["Eth14/1(Port14)", "Eth14/2(Port14)", "Eth14/3(Port14)", "Eth14/4(Port14)"] + } + }, + + "Ethernet60": { + "index": "15,15,15,15", + "lanes": "61,62,63,64", + "breakout_modes": { + "1x100G[40G]": ["Eth15(Port15)"], + "2x50G": ["Eth15/1(Port15)", "Eth15/2(Port15)"], + "4x25G": ["Eth15/1(Port15)", "Eth15/2(Port15)", "Eth15/3(Port15)", "Eth15/4(Port15)"], + "4x10G": ["Eth15/1(Port15)", "Eth15/2(Port15)", "Eth15/3(Port15)", "Eth15/4(Port15)"] + } + }, + + "Ethernet64": { + "index": "16,16,16,16", + "lanes": "69,70,71,72", + "breakout_modes": { + "1x100G[40G]": ["Eth16(Port16)"], + "2x50G": ["Eth16/1(Port16)", "Eth16/2(Port16)"], + "4x25G": ["Eth16/1(Port16)", "Eth16/2(Port16)", "Eth16/3(Port16)", "Eth16/4(Port16)"], + "4x10G": ["Eth16/1(Port16)", "Eth16/2(Port16)", "Eth16/3(Port16)", "Eth16/4(Port16)"] + } + }, + + "Ethernet68": { + "index": "17,17,17,17", + "lanes": "65,66,67,68", + "breakout_modes": { + "1x100G[40G]": ["Eth17(Port17)"], + "2x50G": ["Eth17/1(Port17)", "Eth17/2(Port17)"], + "4x25G": ["Eth17/1(Port17)", "Eth17/2(Port17)", "Eth17/3(Port17)", "Eth17/4(Port17)"], + "4x10G": ["Eth17/1(Port17)", "Eth17/2(Port17)", "Eth17/3(Port17)", "Eth17/4(Port17)"] + } + }, + + "Ethernet72": { + "index": "18,18,18,18", + "lanes": "77,78,79,80", + "breakout_modes": { + "1x100G[40G]": ["Eth18(Port18)"], + "2x50G": ["Eth18/1(Port18)", "Eth18/2(Port18)"], + "4x25G": ["Eth18/1(Port18)", "Eth18/2(Port18)", "Eth18/3(Port18)", "Eth18/4(Port18)"], + "4x10G": ["Eth18/1(Port18)", "Eth18/2(Port18)", "Eth18/3(Port18)", "Eth18/4(Port18)"] + } + }, + + "Ethernet76": { + "index": "19,19,19,19", + "lanes": "73,74,75,76", + "breakout_modes": { + "1x100G[40G]": ["Eth19(Port19)"], + "2x50G": ["Eth19/1(Port19)", "Eth19/2(Port19)"], + "4x25G": ["Eth19/1(Port19)", "Eth19/2(Port19)", "Eth19/3(Port19)", "Eth19/4(Port19)"], + "4x10G": ["Eth19/1(Port19)", "Eth19/2(Port19)", "Eth19/3(Port19)", "Eth19/4(Port19)"] + } + }, + + "Ethernet80": { + "index": "20,20,20,20", + "lanes": "85,86,87,88", + "breakout_modes": { + "1x100G[40G]": ["Eth20(Port20)"], + "2x50G": ["Eth20/1(Port20)", "Eth20/2(Port20)"], + "4x25G": ["Eth20/1(Port20)", "Eth20/2(Port20)", "Eth20/3(Port20)", "Eth20/4(Port20)"], + "4x10G": ["Eth20/1(Port20)", "Eth20/2(Port20)", "Eth20/3(Port20)", "Eth20/4(Port20)"] + } + }, + + "Ethernet84": { + "index": "21,21,21,21", + "lanes": "81,82,83,84", + "breakout_modes": { + "1x100G[40G]": ["Eth21(Port21)"], + "2x50G": ["Eth21/1(Port21)", "Eth21/2(Port21)"], + "4x25G": ["Eth21/1(Port21)", "Eth21/2(Port21)", "Eth21/3(Port21)", "Eth21/4(Port21)"], + "4x10G": ["Eth21/1(Port21)", "Eth21/2(Port21)", "Eth21/3(Port21)", "Eth21/4(Port21)"] + } + }, + + "Ethernet88": { + "index": "22,22,22,22", + "lanes": "93,94,95,96", + "breakout_modes": { + "1x100G[40G]": ["Eth22(Port22)"], + "2x50G": ["Eth22/1(Port22)", "Eth22/2(Port22)"], + "4x25G": ["Eth22/1(Port22)", "Eth22/2(Port22)", "Eth22/3(Port22)", "Eth22/4(Port22)"], + "4x10G": ["Eth22/1(Port22)", "Eth22/2(Port22)", "Eth22/3(Port22)", "Eth22/4(Port22)"] + } + }, + + "Ethernet92": { + "index": "23,23,23,23", + "lanes": "89,90,91,92", + "breakout_modes": { + "1x100G[40G]": ["Eth23(Port23)"], + "2x50G": ["Eth23/1(Port23)", "Eth23/2(Port23)"], + "4x25G": ["Eth23/1(Port23)", "Eth23/2(Port23)", "Eth23/3(Port23)", "Eth23/4(Port23)"], + "4x10G": ["Eth23/1(Port23)", "Eth23/2(Port23)", "Eth23/3(Port23)", "Eth23/4(Port23)"] + } + }, + + "Ethernet96": { + "index": "24,24,24,24", + "lanes": "101,102,103,104", + "breakout_modes": { + "1x100G[40G]": ["Eth24(Port24)"], + "2x50G": ["Eth24/1(Port24)", "Eth24/2(Port24)"], + "4x25G": ["Eth24/1(Port24)", "Eth24/2(Port24)", "Eth24/3(Port24)", "Eth24/4(Port24)"], + "4x10G": ["Eth24/1(Port24)", "Eth24/2(Port24)", "Eth24/3(Port24)", "Eth24/4(Port24)"] + } + }, + + "Ethernet100": { + "index": "25,25,25,25", + "lanes": "97,98,99,100", + "breakout_modes": { + "1x100G[40G]": ["Eth25(Port25)"], + "2x50G": ["Eth25/1(Port25)", "Eth25/2(Port25)"], + "4x25G": ["Eth25/1(Port25)", "Eth25/2(Port25)", "Eth25/3(Port25)", "Eth25/4(Port25)"], + "4x10G": ["Eth25/1(Port25)", "Eth25/2(Port25)", "Eth25/3(Port25)", "Eth25/4(Port25)"] + } + }, + + "Ethernet104": { + "index": "26,26,26,26", + "lanes": "109,110,111,112", + "breakout_modes": { + "1x100G[40G]": ["Eth26(Port26)"], + "2x50G": ["Eth26/1(Port26)", "Eth26/2(Port26)"], + "4x25G": ["Eth26/1(Port26)", "Eth26/2(Port26)", "Eth26/3(Port26)", "Eth26/4(Port26)"], + "4x10G": ["Eth26/1(Port26)", "Eth26/2(Port26)", "Eth26/3(Port26)", "Eth26/4(Port26)"] + } + }, + + "Ethernet108": { + "index": "27,27,27,27", + "lanes": "105,106,107,108", + "breakout_modes": { + "1x100G[40G]": ["Eth27(Port27)"], + "2x50G": ["Eth27/1(Port27)", "Eth27/2(Port27)"], + "4x25G": ["Eth27/1(Port27)", "Eth27/2(Port27)", "Eth27/3(Port27)", "Eth27/4(Port27)"], + "4x10G": ["Eth27/1(Port27)", "Eth27/2(Port27)", "Eth27/3(Port27)", "Eth27/4(Port27)"] + } + }, + + "Ethernet112": { + "index": "28,28,28,28", + "lanes": "117,118,119,120", + "breakout_modes": { + "1x100G[40G]": ["Eth28(Port28)"], + "2x50G": ["Eth28/1(Port28)", "Eth28/2(Port28)"], + "4x25G": ["Eth28/1(Port28)", "Eth28/2(Port28)", "Eth28/3(Port28)", "Eth28/4(Port28)"], + "4x10G": ["Eth28/1(Port28)", "Eth28/2(Port28)", "Eth28/3(Port28)", "Eth28/4(Port28)"] + } + }, + + "Ethernet116": { + "index": "29,29,29,29", + "lanes": "113,114,115,116", + "breakout_modes": { + "1x100G[40G]": ["Eth29(Port29)"], + "2x50G": ["Eth29/1(Port29)", "Eth29/2(Port29)"], + "4x25G": ["Eth29/1(Port29)", "Eth29/2(Port29)", "Eth29/3(Port29)", "Eth29/4(Port29)"], + "4x10G": ["Eth29/1(Port29)", "Eth29/2(Port29)", "Eth29/3(Port29)", "Eth29/4(Port29)"] + } + }, + + "Ethernet120": { + "index": "30,30,30,30", + "lanes": "125,126,127,128", + "breakout_modes": { + "1x100G[40G]": ["Eth30(Port30)"], + "2x50G": ["Eth30/1(Port30)", "Eth30/2(Port30)"], + "4x25G": ["Eth30/1(Port30)", "Eth30/2(Port30)", "Eth30/3(Port30)", "Eth30/4(Port30)"], + "4x10G": ["Eth30/1(Port30)", "Eth30/2(Port30)", "Eth30/3(Port30)", "Eth30/4(Port30)"] + } + }, + + "Ethernet124": { + "index": "31,31,31,31", + "lanes": "121,122,123,124", + "breakout_modes": { + "1x100G[40G]": ["Eth31(Port31)"], + "2x50G": ["Eth31/1(Port31)", "Eth31/2(Port31)"], + "4x25G": ["Eth31/1(Port31)", "Eth31/2(Port31)", "Eth31/3(Port31)", "Eth31/4(Port31)"], + "4x10G": ["Eth31/1(Port31)", "Eth31/2(Port31)", "Eth31/3(Port31)", "Eth31/4(Port31)"] + } + }, + "Ethernet128": { + "index": "32", + "lanes": "129", + "breakout_modes": { + "1x10G": ["Eth32(Port32)"] + } + } + } +} + diff --git a/device/ufispace/x86_64-ufispace_s9110_32x-r0/platform-pvt.json b/device/ufispace/x86_64-ufispace_s9110_32x-r0/platform-pvt.json new file mode 100644 index 0000000000..6114bf5ef4 --- /dev/null +++ b/device/ufispace/x86_64-ufispace_s9110_32x-r0/platform-pvt.json @@ -0,0 +1,590 @@ +{ + "chassis": { + "name": "S9110-32X", + "components": [ + { + "name": "CPLD1" + }, + { + "name": "CPLD2" + }, + { + "name": "BIOS" + }, + { + "name": "BMC" + } + ], + "fans": [ + { + "name": "Fantray1_1" + }, + { + "name": "Fantray1_2" + }, + { + "name": "Fantray2_1" + }, + { + "name": "Fantray2_2" + }, + { + "name": "Fantray3_1" + }, + { + "name": "Fantray3_2" + } + ], + "fan_drawers":[ + { + "name": "Fantray1", + "num_fans" : 2, + "fans": [ + { + "name": "Fantray1_1" + }, + { + "name": "Fantray1_2" + } + ] + }, + { + "name": "Fantray2", + "num_fans" : 2, + "fans": [ + { + "name": "Fantray2_1" + }, + { + "name": "Fantray2_2" + } + ] + }, + { + "name": "Fantray3", + "num_fans" : 2, + "fans": [ + { + "name": "Fantray3_1" + }, + { + "name": "Fantray3_2" + } + ] + } + ], + "psus": [ + { + "name": "PSU1", + "fans": [ + { + "name": "PSU1_FAN1" + } + ], + "thermals": [ + { + "name": "PSU1_TEMP1" + } + ] + }, + { + "name": "PSU2", + "fans": [ + { + "name": "PSU2_FAN1" + } + ], + "thermals": [ + { + "name": "PSU2_TEMP1" + } + ] + } + ], + "thermals": [ + { + "name": "TEMP_MAC" + }, + { + "name": "TEMP_ENV_MACCASE" + }, + { + "name": "TEMP_ENV_SSDCASE" + }, + { + "name": "TEMP_ENV_PSUCASE" + }, + { + "name": "TEMP_ENV_BMC" + }, + { + "name": "TEMP_PSU0_TEMP1" + }, + { + "name": "TEMP_PSU1_TEMP1" + } + ], + "sfps": [ + { + "name": "Ethernet0" + }, + { + "name": "Ethernet4" + }, + { + "name": "Ethernet8" + }, + { + "name": "Ethernet12" + }, + { + "name": "Ethernet16" + }, + { + "name": "Ethernet20" + }, + { + "name": "Ethernet24" + }, + { + "name": "Ethernet28" + }, + { + "name": "Ethernet32" + }, + { + "name": "Ethernet36" + }, + { + "name": "Ethernet40" + }, + { + "name": "Ethernet44" + }, + { + "name": "Ethernet48" + }, + { + "name": "Ethernet52" + }, + { + "name": "Ethernet56" + }, + { + "name": "Ethernet60" + }, + { + "name": "Ethernet64" + }, + { + "name": "Ethernet68" + }, + { + "name": "Ethernet72" + }, + { + "name": "Ethernet76" + }, + { + "name": "Ethernet80" + }, + { + "name": "Ethernet84" + }, + { + "name": "Ethernet88" + }, + { + "name": "Ethernet92" + }, + { + "name": "Ethernet96" + }, + { + "name": "Ethernet100" + }, + { + "name": "Ethernet104" + }, + { + "name": "Ethernet108" + }, + { + "name": "Ethernet112" + }, + { + "name": "Ethernet116" + }, + { + "name": "Ethernet120" + }, + { + "name": "Ethernet124" + }, + { + "name": "Ethernet128" + } + ] + }, + "interfaces": { + "Ethernet0": { + "index": "0,0,0,0", + "lanes": "1,2,3,4", + "breakout_modes": { + "1x100G[40G]": ["Eth0(Port0)"], + "2x50G": ["Eth0/1(Port0)", "Eth0/2(Port0)"], + "4x25G": ["Eth0/1(Port0)", "Eth0/2(Port0)", "Eth0/3(Port0)", "Eth0/4(Port0)"], + "4x10G": ["Eth0/1(Port0)", "Eth0/2(Port0)", "Eth0/3(Port0)", "Eth0/4(Port0)"] + } + }, + + "Ethernet4": { + "index": "1,1,1,1", + "lanes": "5,6,7,8", + "breakout_modes": { + "1x100G[40G]": ["Eth1(Port1)"], + "2x50G": ["Eth1/1(Port1)", "Eth1/2(Port1)"], + "4x25G": ["Eth1/1(Port1)", "Eth1/2(Port1)", "Eth1/3(Port1)", "Eth1/4(Port1)"], + "4x10G": ["Eth1/1(Port1)", "Eth1/2(Port1)", "Eth1/3(Port1)", "Eth1/4(Port1)"] + } + }, + + "Ethernet8": { + "index": "2,2,2,2", + "lanes": "9,10,11,12", + "breakout_modes": { + "1x100G[40G]": ["Eth2(Port2)"], + "2x50G": ["Eth2/1(Port2)", "Eth2/2(Port2)"], + "4x25G": ["Eth2/1(Port2)", "Eth2/2(Port2)", "Eth2/3(Port2)", "Eth2/4(Port2)"], + "4x10G": ["Eth2/1(Port2)", "Eth2/2(Port2)", "Eth2/3(Port2)", "Eth2/4(Port2)"] + } + }, + + "Ethernet12": { + "index": "3,3,3,3", + "lanes": "13,14,15,16", + "breakout_modes": { + "1x100G[40G]": ["Eth3(Port3)"], + "2x50G": ["Eth3/1(Port3)", "Eth3/2(Port3)"], + "4x25G": ["Eth3/1(Port3)", "Eth3/2(Port3)", "Eth3/3(Port3)", "Eth3/4(Port3)"], + "4x10G": ["Eth3/1(Port3)", "Eth3/2(Port3)", "Eth3/3(Port3)", "Eth3/4(Port3)"] + } + }, + + "Ethernet16": { + "index": "4,4,4,4", + "lanes": "17,18,19,20", + "breakout_modes": { + "1x100G[40G]": ["Eth4(Port4)"], + "2x50G": ["Eth4/1(Port4)", "Eth4/2(Port4)"], + "4x25G": ["Eth4/1(Port4)", "Eth4/2(Port4)", "Eth4/3(Port4)", "Eth4/4(Port4)"], + "4x10G": ["Eth4/1(Port4)", "Eth4/2(Port4)", "Eth4/3(Port4)", "Eth4/4(Port4)"] + } + }, + + "Ethernet20": { + "index": "5,5,5,5", + "lanes": "21,22,23,24", + "breakout_modes": { + "1x100G[40G]": ["Eth5(Port5)"], + "2x50G": ["Eth5/1(Port5)", "Eth5/2(Port5)"], + "4x25G": ["Eth5/1(Port5)", "Eth5/2(Port5)", "Eth5/3(Port5)", "Eth5/4(Port5)"], + "4x10G": ["Eth5/1(Port5)", "Eth5/2(Port5)", "Eth5/3(Port5)", "Eth5/4(Port5)"] + } + }, + + "Ethernet24": { + "index": "6,6,6,6", + "lanes": "25,26,27,28", + "breakout_modes": { + "1x100G[40G]": ["Eth6(Port6)"], + "2x50G": ["Eth6/1(Port6)", "Eth6/2(Port6)"], + "4x25G": ["Eth6/1(Port6)", "Eth6/2(Port6)", "Eth6/3(Port6)", "Eth6/4(Port6)"], + "4x10G": ["Eth6/1(Port6)", "Eth6/2(Port6)", "Eth6/3(Port6)", "Eth6/4(Port6)"] + } + }, + + "Ethernet28": { + "index": "7,7,7,7", + "lanes": "29,30,31,32", + "breakout_modes": { + "1x100G[40G]": ["Eth7(Port7)"], + "2x50G": ["Eth7/1(Port7)", "Eth7/2(Port7)"], + "4x25G": ["Eth7/1(Port7)", "Eth7/2(Port7)", "Eth7/3(Port7)", "Eth7/4(Port7)"], + "4x10G": ["Eth7/1(Port7)", "Eth7/2(Port7)", "Eth7/3(Port7)", "Eth7/4(Port7)"] + } + }, + + "Ethernet32": { + "index": "8,8,8,8", + "lanes": "33,34,35,36", + "breakout_modes": { + "1x100G[40G]": ["Eth8(Port8)"], + "2x50G": ["Eth8/1(Port8)", "Eth8/2(Port8)"], + "4x25G": ["Eth8/1(Port8)", "Eth8/2(Port8)", "Eth8/3(Port8)", "Eth8/4(Port8)"], + "4x10G": ["Eth8/1(Port8)", "Eth8/2(Port8)", "Eth8/3(Port8)", "Eth8/4(Port8)"] + } + }, + + "Ethernet36": { + "index": "9,9,9,9", + "lanes": "37,38,39,40", + "breakout_modes": { + "1x100G[40G]": ["Eth9(Port9)"], + "2x50G": ["Eth9/1(Port9)", "Eth9/2(Port9)"], + "4x25G": ["Eth9/1(Port9)", "Eth9/2(Port9)", "Eth9/3(Port9)", "Eth9/4(Port9)"], + "4x10G": ["Eth9/1(Port9)", "Eth9/2(Port9)", "Eth9/3(Port9)", "Eth9/4(Port9)"] + } + }, + + "Ethernet40": { + "index": "10,10,10,10", + "lanes": "41,42,43,44", + "breakout_modes": { + "1x100G[40G]": ["Eth10(Port10)"], + "2x50G": ["Eth10/1(Port10)", "Eth10/2(Port10)"], + "4x25G": ["Eth10/1(Port10)", "Eth10/2(Port10)", "Eth10/3(Port10)", "Eth10/4(Port10)"], + "4x10G": ["Eth10/1(Port10)", "Eth10/2(Port10)", "Eth10/3(Port10)", "Eth10/4(Port10)"] + } + }, + + "Ethernet44": { + "index": "11,11,11,11", + "lanes": "45,46,47,48", + "breakout_modes": { + "1x100G[40G]": ["Eth11(Port11)"], + "2x50G": ["Eth11/1(Port11)", "Eth11/2(Port11)"], + "4x25G": ["Eth11/1(Port11)", "Eth11/2(Port11)", "Eth11/3(Port11)", "Eth11/4(Port11)"], + "4x10G": ["Eth11/1(Port11)", "Eth11/2(Port11)", "Eth11/3(Port11)", "Eth11/4(Port11)"] + } + }, + + "Ethernet48": { + "index": "12,12,12,12", + "lanes": "49,50,51,52", + "breakout_modes": { + "1x100G[40G]": ["Eth12(Port12)"], + "2x50G": ["Eth12/1(Port12)", "Eth12/2(Port12)"], + "4x25G": ["Eth12/1(Port12)", "Eth12/2(Port12)", "Eth12/3(Port12)", "Eth12/4(Port12)"], + "4x10G": ["Eth12/1(Port12)", "Eth12/2(Port12)", "Eth12/3(Port12)", "Eth12/4(Port12)"] + } + }, + + "Ethernet52": { + "index": "13,13,13,13", + "lanes": "53,54,55,56", + "breakout_modes": { + "1x100G[40G]": ["Eth13(Port13)"], + "2x50G": ["Eth13/1(Port13)", "Eth13/2(Port13)"], + "4x25G": ["Eth13/1(Port13)", "Eth13/2(Port13)", "Eth13/3(Port13)", "Eth13/4(Port13)"], + "4x10G": ["Eth13/1(Port13)", "Eth13/2(Port13)", "Eth13/3(Port13)", "Eth13/4(Port13)"] + } + }, + + "Ethernet56": { + "index": "14,14,14,14", + "lanes": "57,58,59,60", + "breakout_modes": { + "1x100G[40G]": ["Eth14(Port14)"], + "2x50G": ["Eth14/1(Port14)", "Eth14/2(Port14)"], + "4x25G": ["Eth14/1(Port14)", "Eth14/2(Port14)", "Eth14/3(Port14)", "Eth14/4(Port14)"], + "4x10G": ["Eth14/1(Port14)", "Eth14/2(Port14)", "Eth14/3(Port14)", "Eth14/4(Port14)"] + } + }, + + "Ethernet60": { + "index": "15,15,15,15", + "lanes": "61,62,63,64", + "breakout_modes": { + "1x100G[40G]": ["Eth15(Port15)"], + "2x50G": ["Eth15/1(Port15)", "Eth15/2(Port15)"], + "4x25G": ["Eth15/1(Port15)", "Eth15/2(Port15)", "Eth15/3(Port15)", "Eth15/4(Port15)"], + "4x10G": ["Eth15/1(Port15)", "Eth15/2(Port15)", "Eth15/3(Port15)", "Eth15/4(Port15)"] + } + }, + + "Ethernet64": { + "index": "16,16,16,16", + "lanes": "69,70,71,72", + "breakout_modes": { + "1x100G[40G]": ["Eth16(Port16)"], + "2x50G": ["Eth16/1(Port16)", "Eth16/2(Port16)"], + "4x25G": ["Eth16/1(Port16)", "Eth16/2(Port16)", "Eth16/3(Port16)", "Eth16/4(Port16)"], + "4x10G": ["Eth16/1(Port16)", "Eth16/2(Port16)", "Eth16/3(Port16)", "Eth16/4(Port16)"] + } + }, + + "Ethernet68": { + "index": "17,17,17,17", + "lanes": "65,66,67,68", + "breakout_modes": { + "1x100G[40G]": ["Eth17(Port17)"], + "2x50G": ["Eth17/1(Port17)", "Eth17/2(Port17)"], + "4x25G": ["Eth17/1(Port17)", "Eth17/2(Port17)", "Eth17/3(Port17)", "Eth17/4(Port17)"], + "4x10G": ["Eth17/1(Port17)", "Eth17/2(Port17)", "Eth17/3(Port17)", "Eth17/4(Port17)"] + } + }, + + "Ethernet72": { + "index": "18,18,18,18", + "lanes": "77,78,79,80", + "breakout_modes": { + "1x100G[40G]": ["Eth18(Port18)"], + "2x50G": ["Eth18/1(Port18)", "Eth18/2(Port18)"], + "4x25G": ["Eth18/1(Port18)", "Eth18/2(Port18)", "Eth18/3(Port18)", "Eth18/4(Port18)"], + "4x10G": ["Eth18/1(Port18)", "Eth18/2(Port18)", "Eth18/3(Port18)", "Eth18/4(Port18)"] + } + }, + + "Ethernet76": { + "index": "19,19,19,19", + "lanes": "73,74,75,76", + "breakout_modes": { + "1x100G[40G]": ["Eth19(Port19)"], + "2x50G": ["Eth19/1(Port19)", "Eth19/2(Port19)"], + "4x25G": ["Eth19/1(Port19)", "Eth19/2(Port19)", "Eth19/3(Port19)", "Eth19/4(Port19)"], + "4x10G": ["Eth19/1(Port19)", "Eth19/2(Port19)", "Eth19/3(Port19)", "Eth19/4(Port19)"] + } + }, + + "Ethernet80": { + "index": "20,20,20,20", + "lanes": "85,86,87,88", + "breakout_modes": { + "1x100G[40G]": ["Eth20(Port20)"], + "2x50G": ["Eth20/1(Port20)", "Eth20/2(Port20)"], + "4x25G": ["Eth20/1(Port20)", "Eth20/2(Port20)", "Eth20/3(Port20)", "Eth20/4(Port20)"], + "4x10G": ["Eth20/1(Port20)", "Eth20/2(Port20)", "Eth20/3(Port20)", "Eth20/4(Port20)"] + } + }, + + "Ethernet84": { + "index": "21,21,21,21", + "lanes": "81,82,83,84", + "breakout_modes": { + "1x100G[40G]": ["Eth21(Port21)"], + "2x50G": ["Eth21/1(Port21)", "Eth21/2(Port21)"], + "4x25G": ["Eth21/1(Port21)", "Eth21/2(Port21)", "Eth21/3(Port21)", "Eth21/4(Port21)"], + "4x10G": ["Eth21/1(Port21)", "Eth21/2(Port21)", "Eth21/3(Port21)", "Eth21/4(Port21)"] + } + }, + + "Ethernet88": { + "index": "22,22,22,22", + "lanes": "93,94,95,96", + "breakout_modes": { + "1x100G[40G]": ["Eth22(Port22)"], + "2x50G": ["Eth22/1(Port22)", "Eth22/2(Port22)"], + "4x25G": ["Eth22/1(Port22)", "Eth22/2(Port22)", "Eth22/3(Port22)", "Eth22/4(Port22)"], + "4x10G": ["Eth22/1(Port22)", "Eth22/2(Port22)", "Eth22/3(Port22)", "Eth22/4(Port22)"] + } + }, + + "Ethernet92": { + "index": "23,23,23,23", + "lanes": "89,90,91,92", + "breakout_modes": { + "1x100G[40G]": ["Eth23(Port23)"], + "2x50G": ["Eth23/1(Port23)", "Eth23/2(Port23)"], + "4x25G": ["Eth23/1(Port23)", "Eth23/2(Port23)", "Eth23/3(Port23)", "Eth23/4(Port23)"], + "4x10G": ["Eth23/1(Port23)", "Eth23/2(Port23)", "Eth23/3(Port23)", "Eth23/4(Port23)"] + } + }, + + "Ethernet96": { + "index": "24,24,24,24", + "lanes": "101,102,103,104", + "breakout_modes": { + "1x100G[40G]": ["Eth24(Port24)"], + "2x50G": ["Eth24/1(Port24)", "Eth24/2(Port24)"], + "4x25G": ["Eth24/1(Port24)", "Eth24/2(Port24)", "Eth24/3(Port24)", "Eth24/4(Port24)"], + "4x10G": ["Eth24/1(Port24)", "Eth24/2(Port24)", "Eth24/3(Port24)", "Eth24/4(Port24)"] + } + }, + + "Ethernet100": { + "index": "25,25,25,25", + "lanes": "97,98,99,100", + "breakout_modes": { + "1x100G[40G]": ["Eth25(Port25)"], + "2x50G": ["Eth25/1(Port25)", "Eth25/2(Port25)"], + "4x25G": ["Eth25/1(Port25)", "Eth25/2(Port25)", "Eth25/3(Port25)", "Eth25/4(Port25)"], + "4x10G": ["Eth25/1(Port25)", "Eth25/2(Port25)", "Eth25/3(Port25)", "Eth25/4(Port25)"] + } + }, + + "Ethernet104": { + "index": "26,26,26,26", + "lanes": "109,110,111,112", + "breakout_modes": { + "1x100G[40G]": ["Eth26(Port26)"], + "2x50G": ["Eth26/1(Port26)", "Eth26/2(Port26)"], + "4x25G": ["Eth26/1(Port26)", "Eth26/2(Port26)", "Eth26/3(Port26)", "Eth26/4(Port26)"], + "4x10G": ["Eth26/1(Port26)", "Eth26/2(Port26)", "Eth26/3(Port26)", "Eth26/4(Port26)"] + } + }, + + "Ethernet108": { + "index": "27,27,27,27", + "lanes": "105,106,107,108", + "breakout_modes": { + "1x100G[40G]": ["Eth27(Port27)"], + "2x50G": ["Eth27/1(Port27)", "Eth27/2(Port27)"], + "4x25G": ["Eth27/1(Port27)", "Eth27/2(Port27)", "Eth27/3(Port27)", "Eth27/4(Port27)"], + "4x10G": ["Eth27/1(Port27)", "Eth27/2(Port27)", "Eth27/3(Port27)", "Eth27/4(Port27)"] + } + }, + + "Ethernet112": { + "index": "28,28,28,28", + "lanes": "117,118,119,120", + "breakout_modes": { + "1x100G[40G]": ["Eth28(Port28)"], + "2x50G": ["Eth28/1(Port28)", "Eth28/2(Port28)"], + "4x25G": ["Eth28/1(Port28)", "Eth28/2(Port28)", "Eth28/3(Port28)", "Eth28/4(Port28)"], + "4x10G": ["Eth28/1(Port28)", "Eth28/2(Port28)", "Eth28/3(Port28)", "Eth28/4(Port28)"] + } + }, + + "Ethernet116": { + "index": "29,29,29,29", + "lanes": "113,114,115,116", + "breakout_modes": { + "1x100G[40G]": ["Eth29(Port29)"], + "2x50G": ["Eth29/1(Port29)", "Eth29/2(Port29)"], + "4x25G": ["Eth29/1(Port29)", "Eth29/2(Port29)", "Eth29/3(Port29)", "Eth29/4(Port29)"], + "4x10G": ["Eth29/1(Port29)", "Eth29/2(Port29)", "Eth29/3(Port29)", "Eth29/4(Port29)"] + } + }, + + "Ethernet120": { + "index": "30,30,30,30", + "lanes": "125,126,127,128", + "breakout_modes": { + "1x100G[40G]": ["Eth30(Port30)"], + "2x50G": ["Eth30/1(Port30)", "Eth30/2(Port30)"], + "4x25G": ["Eth30/1(Port30)", "Eth30/2(Port30)", "Eth30/3(Port30)", "Eth30/4(Port30)"], + "4x10G": ["Eth30/1(Port30)", "Eth30/2(Port30)", "Eth30/3(Port30)", "Eth30/4(Port30)"] + } + }, + + "Ethernet124": { + "index": "31,31,31,31", + "lanes": "121,122,123,124", + "breakout_modes": { + "1x100G[40G]": ["Eth31(Port31)"], + "2x50G": ["Eth31/1(Port31)", "Eth31/2(Port31)"], + "4x25G": ["Eth31/1(Port31)", "Eth31/2(Port31)", "Eth31/3(Port31)", "Eth31/4(Port31)"], + "4x10G": ["Eth31/1(Port31)", "Eth31/2(Port31)", "Eth31/3(Port31)", "Eth31/4(Port31)"] + } + }, + "Ethernet128": { + "index": "32", + "lanes": "129", + "breakout_modes": { + "1x10G": ["Eth32(Port32)"] + } + } + } +} + diff --git a/device/ufispace/x86_64-ufispace_s9110_32x-r0/platform.json b/device/ufispace/x86_64-ufispace_s9110_32x-r0/platform.json new file mode 120000 index 0000000000..bb59660c3c --- /dev/null +++ b/device/ufispace/x86_64-ufispace_s9110_32x-r0/platform.json @@ -0,0 +1 @@ +platform-pvt.json \ No newline at end of file diff --git a/device/ufispace/x86_64-ufispace_s9110_32x-r0/platform_asic b/device/ufispace/x86_64-ufispace_s9110_32x-r0/platform_asic new file mode 100644 index 0000000000..9604676527 --- /dev/null +++ b/device/ufispace/x86_64-ufispace_s9110_32x-r0/platform_asic @@ -0,0 +1 @@ +broadcom diff --git a/device/ufispace/x86_64-ufispace_s9110_32x-r0/platform_components.json b/device/ufispace/x86_64-ufispace_s9110_32x-r0/platform_components.json new file mode 100644 index 0000000000..a5bb2093cb --- /dev/null +++ b/device/ufispace/x86_64-ufispace_s9110_32x-r0/platform_components.json @@ -0,0 +1,12 @@ +{ + "chassis": { + "x86_64-ufispace_s9110_32x-r0": { + "component": { + "CPLD1": { }, + "CPLD2": { }, + "BIOS": { }, + "BMC": {} + } + } + } +} diff --git a/device/ufispace/x86_64-ufispace_s9110_32x-r0/platform_env.conf b/device/ufispace/x86_64-ufispace_s9110_32x-r0/platform_env.conf new file mode 100644 index 0000000000..77fd88ac36 --- /dev/null +++ b/device/ufispace/x86_64-ufispace_s9110_32x-r0/platform_env.conf @@ -0,0 +1 @@ +SYNCD_SHM_SIZE=256m diff --git a/device/ufispace/x86_64-ufispace_s9110_32x-r0/pmon_daemon_control.json b/device/ufispace/x86_64-ufispace_s9110_32x-r0/pmon_daemon_control.json new file mode 100644 index 0000000000..e348e0168f --- /dev/null +++ b/device/ufispace/x86_64-ufispace_s9110_32x-r0/pmon_daemon_control.json @@ -0,0 +1,9 @@ +{ + "skip_pcied": false, + "skip_fancontrol": false, + "skip_thermalctld": false, + "skip_ledd": true, + "skip_xcvrd": false, + "skip_psud": false, + "skip_syseepromd": false +} diff --git a/device/ufispace/x86_64-ufispace_s9110_32x-r0/system_health_monitoring_config.json b/device/ufispace/x86_64-ufispace_s9110_32x-r0/system_health_monitoring_config.json new file mode 100644 index 0000000000..43816ab551 --- /dev/null +++ b/device/ufispace/x86_64-ufispace_s9110_32x-r0/system_health_monitoring_config.json @@ -0,0 +1,15 @@ +{ + "services_to_ignore": [], + "devices_to_ignore": [ + "asic", + "psu", + "fan" + ], + "user_defined_checkers": [], + "polling_interval": 60, + "led_color": { + "fault": "yellow_blink", + "normal": "green", + "booting": "green_blink" + } +} \ No newline at end of file diff --git a/device/ufispace/x86_64-ufispace_s9180_32x-r0/UFISPACE-S9180-32X/port_config.ini b/device/ufispace/x86_64-ufispace_s9180_32x-r0/UFISPACE-S9180-32X/port_config.ini new file mode 100644 index 0000000000..3012ba99dd --- /dev/null +++ b/device/ufispace/x86_64-ufispace_s9180_32x-r0/UFISPACE-S9180-32X/port_config.ini @@ -0,0 +1,35 @@ +# name lanes alias speed autoneg fec index +Ethernet0 0,1,2,3 Ethernet0 100000 off none 0 +Ethernet4 4,5,6,7 Ethernet4 100000 off none 1 +Ethernet8 8,9,10,11 Ethernet8 100000 off none 2 +Ethernet12 12,13,14,15 Ethernet12 100000 off none 3 +Ethernet16 16,17,18,19 Ethernet16 100000 off none 4 +Ethernet20 20,21,22,23 Ethernet20 100000 off none 5 +Ethernet24 24,25,26,27 Ethernet24 100000 off none 6 +Ethernet28 28,29,30,31 Ethernet28 100000 off none 7 +Ethernet32 32,33,34,35 Ethernet32 100000 off none 8 +Ethernet36 36,37,38,39 Ethernet36 100000 off none 9 +Ethernet40 40,41,42,43 Ethernet40 100000 off none 10 +Ethernet44 44,45,46,47 Ethernet44 100000 off none 11 +Ethernet48 48,49,50,51 Ethernet48 100000 off none 12 +Ethernet52 52,53,54,55 Ethernet52 100000 off none 13 +Ethernet56 56,57,58,59 Ethernet56 100000 off none 14 +Ethernet60 60,61,62,63 Ethernet60 100000 off none 15 +Ethernet64 64,65,66,67 Ethernet64 100000 off none 16 +Ethernet68 68,69,70,71 Ethernet68 100000 off none 17 +Ethernet72 72,73,74,75 Ethernet72 100000 off none 18 +Ethernet76 76,77,78,79 Ethernet76 100000 off none 19 +Ethernet80 80,81,82,83 Ethernet80 100000 off none 20 +Ethernet84 84,85,86,87 Ethernet84 100000 off none 21 +Ethernet88 88,89,90,91 Ethernet88 100000 off none 22 +Ethernet92 92,93,94,95 Ethernet92 100000 off none 23 +Ethernet96 96,97,98,99 Ethernet96 100000 off none 24 +Ethernet100 100,101,102,103 Ethernet100 100000 off none 25 +Ethernet104 104,105,106,107 Ethernet104 100000 off none 26 +Ethernet108 108,109,110,111 Ethernet108 100000 off none 27 +Ethernet112 112,113,114,115 Ethernet112 100000 off none 28 +Ethernet116 116,117,118,119 Ethernet116 100000 off none 29 +Ethernet120 120,121,122,123 Ethernet120 100000 off none 30 +Ethernet124 124,125,126,127 Ethernet124 100000 off none 31 +Ethernet128 128 Ethernet128 10000 off none 32 +Ethernet129 129 Ethernet129 10000 off none 33 \ No newline at end of file diff --git a/device/ufispace/x86_64-ufispace_s9180_32x-r0/UFISPACE-S9180-32X/switch-sai.conf b/device/ufispace/x86_64-ufispace_s9180_32x-r0/UFISPACE-S9180-32X/switch-sai.conf new file mode 100644 index 0000000000..c3a384ed07 --- /dev/null +++ b/device/ufispace/x86_64-ufispace_s9180_32x-r0/UFISPACE-S9180-32X/switch-sai.conf @@ -0,0 +1,33 @@ +{ + "chip_list": [ + { + "id": "asic-0", + "chip_family": "Tofino", + "instance": 0, + "pcie_sysfs_prefix": "/sys/devices/pci0000:00/0000:00:03.0/0000:05:00.0", + "pcie_domain": 0, + "pcie_bus": 5, + "pcie_fn": 0, + "pcie_dev": 0, + "pcie_int_mode": 1, + "sds_fw_path": "share/tofino_sds_fw/avago/firmware" + } + ], + "instance": 0, + "p4_program_list": [ + { + "id": "pgm-0", + "instance": 0, + "path": "switch", + "program-name": "switch", + "pd": "lib/tofinopd/switch/libpd.so", + "pd-thrift": "lib/tofinopd/switch/libpdthrift.so", + "table-config": "share/tofinopd/switch/context.json", + "tofino-bin": "share/tofinopd/switch/tofino.bin", + "switchapi": "lib/libswitchapi.so", + "sai": "lib/libsai.so", + "agent0": "lib/platform/x86_64-ufispace_s9180_32x-r0/libpltfm_mgr.so", + "switchapi_port_add": false + } + ] +} diff --git a/device/ufispace/x86_64-ufispace_s9180_32x-r0/UFISPACE-S9180-32X/switch-tna-sai.conf b/device/ufispace/x86_64-ufispace_s9180_32x-r0/UFISPACE-S9180-32X/switch-tna-sai.conf new file mode 100644 index 0000000000..8cd3c6e353 --- /dev/null +++ b/device/ufispace/x86_64-ufispace_s9180_32x-r0/UFISPACE-S9180-32X/switch-tna-sai.conf @@ -0,0 +1,39 @@ +{ + "chip_list": [ + { + "chip_family": "Tofino", + "sds_fw_path": "share/tofino_sds_fw/avago/firmware", + "instance": 0 + } + ], + "p4_devices": [ + { + "device-id": 0, + "agent0": "lib/platform/x86_64-ufispace_s9180_32x-r0/libpltfm_mgr.so", + "p4_programs": [ + { + "p4_pipelines": [ + { + "p4_pipeline_name": "pipe", + "config": "share/switch/pipe/tofino.bin", + "context": "share/switch/pipe/context.json" + } + ], + "program-name": "switch", + "bfrt-config": "share/switch/bf-rt.json", + "model_json_path" : "share/switch/aug_model.json", + "switchapi_port_add": false, + "non_default_port_ppgs": 5 + } + ] + } + ], + "switch_options": [ + { + "device-id": 0, + "model_json_path": "share/switch/aug_model.json", + "non_default_port_ppgs": 5, + "switchapi_port_add": false + } + ] +} diff --git a/device/ufispace/x86_64-ufispace_s9180_32x-r0/default_sku b/device/ufispace/x86_64-ufispace_s9180_32x-r0/default_sku new file mode 100644 index 0000000000..0effd567eb --- /dev/null +++ b/device/ufispace/x86_64-ufispace_s9180_32x-r0/default_sku @@ -0,0 +1 @@ +UFISPACE-S9180-32X t1 diff --git a/device/ufispace/x86_64-ufispace_s9180_32x-r0/fancontrol b/device/ufispace/x86_64-ufispace_s9180_32x-r0/fancontrol new file mode 100644 index 0000000000..1234cd994f --- /dev/null +++ b/device/ufispace/x86_64-ufispace_s9180_32x-r0/fancontrol @@ -0,0 +1,10 @@ +# Configuration file generated by pwmconfig, changes will be lost +INTERVAL=10 +DEVPATH= +DEVNAME= +FCTEMPS= +FCFANS= +MINTEMP= +MAXTEMP= +MINSTART= +MINSTOP= diff --git a/device/ufispace/x86_64-ufispace_s9180_32x-r0/installer.conf b/device/ufispace/x86_64-ufispace_s9180_32x-r0/installer.conf new file mode 100644 index 0000000000..74b02f0766 --- /dev/null +++ b/device/ufispace/x86_64-ufispace_s9180_32x-r0/installer.conf @@ -0,0 +1,4 @@ +CONSOLE_PORT=0x3f8 +CONSOLE_DEV=0 +CONSOLE_SPEED=115200 +ONIE_PLATFORM_EXTRA_CMDLINE_LINUX="modprobe.blacklist=gpio_ich,qat_c3xxx nomodeset pcie_aspm=off" diff --git a/device/ufispace/x86_64-ufispace_s9180_32x-r0/pcie.yaml b/device/ufispace/x86_64-ufispace_s9180_32x-r0/pcie.yaml new file mode 100644 index 0000000000..adafbe61e6 --- /dev/null +++ b/device/ufispace/x86_64-ufispace_s9180_32x-r0/pcie.yaml @@ -0,0 +1,417 @@ +- bus: '00' + dev: '00' + fn: '0' + id: 6f00 + name: 'Host bridge: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon D DMI2 + (rev 03)' +- bus: '00' + dev: '02' + fn: '0' + id: 6f04 + name: 'PCI bridge: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon D PCI + Express Root Port 2 (rev 03)' +- bus: '00' + dev: '02' + fn: '2' + id: 6f06 + name: 'PCI bridge: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon D PCI + Express Root Port 2 (rev 03)' +- bus: '00' + dev: '03' + fn: '0' + id: 6f08 + name: 'PCI bridge: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon D PCI + Express Root Port 3 (rev 03)' +- bus: '00' + dev: '03' + fn: '1' + id: 6f09 + name: 'PCI bridge: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon D PCI + Express Root Port 3 (rev 03)' +- bus: '00' + dev: '03' + fn: '2' + id: 6f0a + name: 'PCI bridge: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon D PCI + Express Root Port 3 (rev 03)' +- bus: '00' + dev: '03' + fn: '3' + id: 6f0b + name: 'PCI bridge: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon D PCI + Express Root Port 3 (rev 03)' +- bus: '00' + dev: '05' + fn: '0' + id: 6f28 + name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon + D Map/VTd_Misc/System Management (rev 03)' +- bus: '00' + dev: '05' + fn: '1' + id: 6f29 + name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon + D IIO Hot Plug (rev 03)' +- bus: '00' + dev: '05' + fn: '2' + id: 6f2a + name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon + D IIO RAS/Control Status/Global Errors (rev 03)' +- bus: '00' + dev: '05' + fn: '4' + id: 6f2c + name: 'PIC: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon D I/O APIC (rev + 03)' +- bus: '00' + dev: '14' + fn: '0' + id: 8c31 + name: 'USB controller: Intel Corporation 8 Series/C220 Series Chipset Family USB + xHCI (rev 05)' +- bus: '00' + dev: 1c + fn: '0' + id: 8c10 + name: 'PCI bridge: Intel Corporation 8 Series/C220 Series Chipset Family PCI Express + Root Port #1 (rev d5)' +- bus: '00' + dev: 1f + fn: '0' + id: 8c54 + name: 'ISA bridge: Intel Corporation C224 Series Chipset Family Server Standard + SKU LPC Controller (rev 05)' +- bus: '00' + dev: 1f + fn: '2' + id: 8c02 + name: 'SATA controller: Intel Corporation 8 Series/C220 Series Chipset Family 6-port + SATA Controller 1 [AHCI mode] (rev 05)' +- bus: '00' + dev: 1f + fn: '3' + id: 8c22 + name: 'SMBus: Intel Corporation 8 Series/C220 Series Chipset Family SMBus Controller + (rev 05)' +- bus: '01' + dev: '00' + fn: '0' + id: 6f50 + name: 'System peripheral: Intel Corporation Xeon Processor D Family QuickData Technology + Register DMA Channel 0' +- bus: '01' + dev: '00' + fn: '1' + id: 6f51 + name: 'System peripheral: Intel Corporation Xeon Processor D Family QuickData Technology + Register DMA Channel 1' +- bus: '01' + dev: '00' + fn: '2' + id: 6f52 + name: 'System peripheral: Intel Corporation Xeon Processor D Family QuickData Technology + Register DMA Channel 2' +- bus: '01' + dev: '00' + fn: '3' + id: 6f53 + name: 'System peripheral: Intel Corporation Xeon Processor D Family QuickData Technology + Register DMA Channel 3' +- bus: '02' + dev: '00' + fn: '0' + id: 15ab + name: 'Ethernet controller: Intel Corporation Ethernet Connection X552 10 GbE Backplane' +- bus: '02' + dev: '00' + fn: '1' + id: 15ab + name: 'Ethernet controller: Intel Corporation Ethernet Connection X552 10 GbE Backplane' +- bus: '04' + dev: '00' + fn: '0' + id: '0010' + name: 'Unassigned class [ff00]: Device 1d1c:0010 (rev 10)' +- bus: 08 + dev: '00' + fn: '0' + id: '1533' + name: 'Ethernet controller: Intel Corporation I210 Gigabit Network Connection (rev + 03)' +- bus: ff + dev: 0b + fn: '0' + id: 6f81 + name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon + D R3 QPI Link 0/1 (rev 03)' +- bus: ff + dev: 0b + fn: '1' + id: 6f36 + name: 'Performance counters: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon + D R3 QPI Link 0/1 (rev 03)' +- bus: ff + dev: 0b + fn: '2' + id: 6f37 + name: 'Performance counters: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon + D R3 QPI Link 0/1 (rev 03)' +- bus: ff + dev: 0b + fn: '3' + id: 6f76 + name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon + D R3 QPI Link Debug (rev 03)' +- bus: ff + dev: 0c + fn: '0' + id: 6fe0 + name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon + D Caching Agent (rev 03)' +- bus: ff + dev: 0c + fn: '1' + id: 6fe1 + name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon + D Caching Agent (rev 03)' +- bus: ff + dev: 0c + fn: '2' + id: 6fe2 + name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon + D Caching Agent (rev 03)' +- bus: ff + dev: 0c + fn: '3' + id: 6fe3 + name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon + D Caching Agent (rev 03)' +- bus: ff + dev: 0f + fn: '0' + id: 6ff8 + name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon + D Caching Agent (rev 03)' +- bus: ff + dev: 0f + fn: '4' + id: 6ffc + name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon + D Caching Agent (rev 03)' +- bus: ff + dev: 0f + fn: '5' + id: 6ffd + name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon + D Caching Agent (rev 03)' +- bus: ff + dev: 0f + fn: '6' + id: 6ffe + name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon + D Caching Agent (rev 03)' +- bus: ff + dev: '10' + fn: '0' + id: 6f1d + name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon + D R2PCIe Agent (rev 03)' +- bus: ff + dev: '10' + fn: '1' + id: 6f34 + name: 'Performance counters: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon + D R2PCIe Agent (rev 03)' +- bus: ff + dev: '10' + fn: '5' + id: 6f1e + name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon + D Ubox (rev 03)' +- bus: ff + dev: '10' + fn: '6' + id: 6f7d + name: 'Performance counters: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon + D Ubox (rev 03)' +- bus: ff + dev: '10' + fn: '7' + id: 6f1f + name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon + D Ubox (rev 03)' +- bus: ff + dev: '12' + fn: '0' + id: 6fa0 + name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon + D Home Agent 0 (rev 03)' +- bus: ff + dev: '12' + fn: '1' + id: 6f30 + name: 'Performance counters: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon + D Home Agent 0 (rev 03)' +- bus: ff + dev: '13' + fn: '0' + id: 6fa8 + name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon + D Memory Controller 0 - Target Address/Thermal/RAS (rev 03)' +- bus: ff + dev: '13' + fn: '1' + id: 6f71 + name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon + D Memory Controller 0 - Target Address/Thermal/RAS (rev 03)' +- bus: ff + dev: '13' + fn: '2' + id: 6faa + name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon + D Memory Controller 0 - Channel Target Address Decoder (rev 03)' +- bus: ff + dev: '13' + fn: '3' + id: 6fab + name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon + D Memory Controller 0 - Channel Target Address Decoder (rev 03)' +- bus: ff + dev: '13' + fn: '4' + id: 6fac + name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon + D Memory Controller 0 - Channel Target Address Decoder (rev 03)' +- bus: ff + dev: '13' + fn: '5' + id: 6fad + name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon + D Memory Controller 0 - Channel Target Address Decoder (rev 03)' +- bus: ff + dev: '13' + fn: '6' + id: 6fae + name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon + D DDRIO Channel 0/1 Broadcast (rev 03)' +- bus: ff + dev: '13' + fn: '7' + id: 6faf + name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon + D DDRIO Global Broadcast (rev 03)' +- bus: ff + dev: '14' + fn: '0' + id: 6fb0 + name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon + D Memory Controller 0 - Channel 0 Thermal Control (rev 03)' +- bus: ff + dev: '14' + fn: '1' + id: 6fb1 + name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon + D Memory Controller 0 - Channel 1 Thermal Control (rev 03)' +- bus: ff + dev: '14' + fn: '2' + id: 6fb2 + name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon + D Memory Controller 0 - Channel 0 Error (rev 03)' +- bus: ff + dev: '14' + fn: '3' + id: 6fb3 + name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon + D Memory Controller 0 - Channel 1 Error (rev 03)' +- bus: ff + dev: '14' + fn: '4' + id: 6fbc + name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon + D DDRIO Channel 0/1 Interface (rev 03)' +- bus: ff + dev: '14' + fn: '5' + id: 6fbd + name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon + D DDRIO Channel 0/1 Interface (rev 03)' +- bus: ff + dev: '14' + fn: '6' + id: 6fbe + name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon + D DDRIO Channel 0/1 Interface (rev 03)' +- bus: ff + dev: '14' + fn: '7' + id: 6fbf + name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon + D DDRIO Channel 0/1 Interface (rev 03)' +- bus: ff + dev: '15' + fn: '0' + id: 6fb4 + name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon + D Memory Controller 0 - Channel 2 Thermal Control (rev 03)' +- bus: ff + dev: '15' + fn: '1' + id: 6fb5 + name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon + D Memory Controller 0 - Channel 3 Thermal Control (rev 03)' +- bus: ff + dev: '15' + fn: '2' + id: 6fb6 + name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon + D Memory Controller 0 - Channel 2 Error (rev 03)' +- bus: ff + dev: '15' + fn: '3' + id: 6fb7 + name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon + D Memory Controller 0 - Channel 3 Error (rev 03)' +- bus: ff + dev: 1e + fn: '0' + id: 6f98 + name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon + D Power Control Unit (rev 03)' +- bus: ff + dev: 1e + fn: '1' + id: 6f99 + name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon + D Power Control Unit (rev 03)' +- bus: ff + dev: 1e + fn: '2' + id: 6f9a + name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon + D Power Control Unit (rev 03)' +- bus: ff + dev: 1e + fn: '3' + id: 6fc0 + name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon + D Power Control Unit (rev 03)' +- bus: ff + dev: 1e + fn: '4' + id: 6f9c + name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon + D Power Control Unit (rev 03)' +- bus: ff + dev: 1f + fn: '0' + id: 6f88 + name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon + D Power Control Unit (rev 03)' +- bus: ff + dev: 1f + fn: '2' + id: 6f8a + name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon + D Power Control Unit (rev 03)' diff --git a/device/ufispace/x86_64-ufispace_s9180_32x-r0/pddf/pd-plugin.json b/device/ufispace/x86_64-ufispace_s9180_32x-r0/pddf/pd-plugin.json new file mode 100644 index 0000000000..f4cde70c8d --- /dev/null +++ b/device/ufispace/x86_64-ufispace_s9180_32x-r0/pddf/pd-plugin.json @@ -0,0 +1,85 @@ +{ + + "XCVR": + { + "xcvr_present": + { + "i2c": + { + "valmap-SFP": {"1":true, "0":false}, + "valmap-QSFP": {"1":true, "0":false} + } + }, + + "plug_status": + { + "inserted": "1", + "removed": "0" + } + }, + "PSU": + { + "psu_present": + { + "i2c": + { + "valmap": { "1":true, "0":false } + }, + "bmc": + { + "valmap": { "Device Present":true, "Device Absent":false } + } + }, + + "psu_power_good": + { + "i2c": + { + "valmap": { "1": true, "0":false } + }, + "bmc": + { + "valmap": { "Device Enabled":true, "Device Absent":false } + } + }, + + "psu_support_list": + [ + {"Manufacturer": "FSP GROUP", "Name": "FSP550-20ERM", "MaxSpd": "PSU_FAN_MAX_SPEED", "Type": "AC"}, + {"Manufacturer": "GW", "Name": "GW-CRPS550", "MaxSpd": "PSU_FAN_MAX_SPEED", "Type": "AC"} + ], + + "valmap": { + "PSU_FAN_MAX_SPEED":"18000", + "DEFAULT_TYPE": "AC" + } + }, + "FAN": + { + "direction": + { + "bmc": + { + "valmap": {"0": "UNKNOWN", "1":"INTAKE", "2":"EXHAUST"} + } + }, + + "present": + { + "i2c": + { + "valmap": {"1":true, "0":false} + }, + "bmc": + { + "valmap": { "Device Present":true, "Device Absent":false} + } + }, + "FAN_R_MAX_SPEED":"22000", + "FAN_F_MAX_SPEED":"22000" + }, + "REBOOT_CAUSE": + { + "reboot_cause_file": "/host/reboot-cause/reboot-cause.txt" + } +} diff --git a/device/ufispace/x86_64-ufispace_s9180_32x-r0/pddf/pddf-device.json b/device/ufispace/x86_64-ufispace_s9180_32x-r0/pddf/pddf-device.json new file mode 100644 index 0000000000..d23f09e2ed --- /dev/null +++ b/device/ufispace/x86_64-ufispace_s9180_32x-r0/pddf/pddf-device.json @@ -0,0 +1,5965 @@ +{ + "PLATFORM": { + "num_psus": 2, + "num_fantrays": 4, + "num_fans_pertray": 2, + "num_ports": 34, + "num_temps": 9, + "pddf_dev_types": { + "description": "PDDF supported devices", + "CPLD": [ + "i2c_cpld" + ], + "PSU": [ + "psu_eeprom", + "psu_pmbus" + ], + "PORT_MODULE": [ + "pddf_xcvr" + ] + }, + "std_perm_kos": [ + "i2c-i801" + ], + "std_kos": [ + "i2c_dev", + "i2c_mux_pca954x", + "optoe", + "lm75", + "gpio-pca953x" + ], + "pddf_kos": [ + "pddf_client_module", + "pddf_cpld_module", + "pddf_cpld_driver", + "pddf_mux_module", + "pddf_xcvr_module", + "pddf_xcvr_driver_module", + "pddf_psu_driver_module", + "pddf_psu_module", + "pddf_fan_driver_module", + "pddf_fan_module", + "pddf_led_module", + "pddf_gpio_module" + ], + "custom_kos": [ + "x86-64-ufispace-s9180-32x-sys-eeprom" + ] + }, + "SYSTEM": { + "dev_info": { + "device_type": "CPU", + "device_name": "ROOT_COMPLEX", + "device_parent": null + }, + "i2c": { + "CONTROLLERS": [ + { + "dev_name": "i2c-0", + "dev": "SMBUS0" + } + ] + } + }, + "SMBUS0": { + "dev_info": { + "device_type": "SMBUS", + "device_name": "SMBUS0", + "device_parent": "SYSTEM" + }, + "i2c": { + "topo_info": { + "dev_addr": "0x0" + }, + "DEVICES": [ + { + "dev": "EEPROM1" + }, + { + "dev": "MUX1" + }, + { + "dev": "GPIO10" + }, + { + "dev": "TEMP1" + } + ] + } + }, + "EEPROM1": { + "dev_info": { + "device_type": "EEPROM", + "device_name": "EEPROM1", + "device_parent": "SMBUS0" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x0", + "dev_addr": "0x51", + "dev_type": "sys_eeprom" + }, + "dev_attr": { + "access_mode": "BLOCK" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "TEMP1": { + "dev_info": { + "device_type": "TEMP_SENSOR", + "device_name": "TEMP1", + "device_parent": "SMBUS0" + }, + "dev_attr": { + "display_name": "Temp_CPU_BOARD" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x0", + "dev_addr": "0x4f", + "dev_type": "tmp75" + }, + "attr_list": [ + { + "attr_name": "temp1_high_crit_threshold", + "drv_attr_name": "temp1_max" + }, + { + "attr_name": "temp1_max_hyst" + }, + { + "attr_name": "temp1_input" + } + ] + } + }, + "TEMP2": { + "dev_info": { + "device_type": "TEMP_SENSOR", + "device_name": "TEMP2", + "device_parent": "SMBUS0" + }, + "dev_attr": { + "display_name": "Temp_BMC" + }, + "bmc": { + "ipmitool": { + "attr_list": [ + { + "attr_name": "temp1_input", + "bmc_cmd": "ipmitool sdr -c get Temp_BMC", + "raw": "0", + "field_name": "Temp_BMC", + "field_pos": "2", + "separator": "," + }, + { + "attr_name": "temp1_high_crit_threshold", + "bmc_cmd": "ipmitool sdr -c get Temp_BMC", + "raw": "0", + "field_name": "Temp_BMC", + "field_pos": "11", + "separator": "," + }, + { + "attr_name": "temp1_high_threshold", + "bmc_cmd": "ipmitool sdr -c get Temp_BMC", + "raw": "0", + "field_name": "Temp_BMC", + "field_pos": "12", + "separator": "," + } + ] + } + } + }, + "TEMP3": { + "dev_info": { + "device_type": "TEMP_SENSOR", + "device_name": "TEMP3", + "device_parent": "SMBUS0" + }, + "dev_attr": { + "display_name": "Temp_MAC" + }, + "bmc": { + "ipmitool": { + "attr_list": [ + { + "attr_name": "temp1_input", + "bmc_cmd": "ipmitool sdr -c get Temp_MAC", + "raw": "0", + "field_name": "Temp_MAC", + "field_pos": "2", + "separator": "," + }, + { + "attr_name": "temp1_high_crit_threshold", + "bmc_cmd": "ipmitool sdr -c get Temp_MAC", + "raw": "0", + "field_name": "Temp_MAC", + "field_pos": "11", + "separator": "," + }, + { + "attr_name": "temp1_high_threshold", + "bmc_cmd": "ipmitool sdr -c get Temp_MAC", + "raw": "0", + "field_name": "Temp_MAC", + "field_pos": "12", + "separator": "," + } + ] + } + } + }, + "TEMP4": { + "dev_info": { + "device_type": "TEMP_SENSOR", + "device_name": "TEMP4", + "device_parent": "SMBUS0" + }, + "dev_attr": { + "display_name": "Temp_MAC_Front" + }, + "bmc": { + "ipmitool": { + "attr_list": [ + { + "attr_name": "temp1_input", + "bmc_cmd": "ipmitool sdr -c get Temp_MAC_Front", + "raw": "0", + "field_name": "Temp_MAC_Front", + "field_pos": "2", + "separator": "," + }, + { + "attr_name": "temp1_high_crit_threshold", + "bmc_cmd": "ipmitool sdr -c get Temp_MAC_Front", + "raw": "0", + "field_name": "Temp_MAC_Front", + "field_pos": "11", + "separator": "," + }, + { + "attr_name": "temp1_high_threshold", + "bmc_cmd": "ipmitool sdr -c get Temp_MAC_Front", + "raw": "0", + "field_name": "Temp_MAC_Front", + "field_pos": "12", + "separator": "," + } + ] + } + } + }, + "TEMP5": { + "dev_info": { + "device_type": "TEMP_SENSOR", + "device_name": "TEMP5", + "device_parent": "SMBUS0" + }, + "dev_attr": { + "display_name": "Temp_MAC_Rear" + }, + "bmc": { + "ipmitool": { + "attr_list": [ + { + "attr_name": "temp1_input", + "bmc_cmd": "ipmitool sdr -c get Temp_MAC_Rear", + "raw": "0", + "field_name": "Temp_MAC_Rear", + "field_pos": "2", + "separator": "," + }, + { + "attr_name": "temp1_high_crit_threshold", + "bmc_cmd": "ipmitool sdr -c get Temp_MAC_Rear", + "raw": "0", + "field_name": "Temp_MAC_Rear", + "field_pos": "11", + "separator": "," + }, + { + "attr_name": "temp1_high_threshold", + "bmc_cmd": "ipmitool sdr -c get Temp_MAC_Rear", + "raw": "0", + "field_name": "Temp_MAC_Rear", + "field_pos": "12", + "separator": "," + } + ] + } + } + }, + "TEMP6": { + "dev_info": { + "device_type": "TEMP_SENSOR", + "device_name": "TEMP6", + "device_parent": "SMBUS0" + }, + "dev_attr": { + "display_name": "Temp_PSU1_AMB" + }, + "bmc": { + "ipmitool": { + "attr_list": [ + { + "attr_name": "temp1_input", + "bmc_cmd": "ipmitool sdr -c get Temp_PSU1_AMB | sed -e 's/,,/,0,/g' -e 's/,,/,0,/g'", + "raw": "0", + "field_name": "Temp_PSU1_AMB", + "field_pos": "2", + "separator": "," + }, + { + "attr_name": "temp1_high_crit_threshold", + "bmc_cmd": "ipmitool sdr -c get Temp_PSU1_AMB | sed -e 's/,,/,0,/g' -e 's/,,/,0,/g'", + "raw": "0", + "field_name": "Temp_PSU1_AMB", + "field_pos": "11", + "separator": "," + }, + { + "attr_name": "temp1_high_threshold", + "bmc_cmd": "ipmitool sdr -c get Temp_PSU1_AMB | sed -e 's/,,/,0,/g' -e 's/,,/,0,/g'", + "raw": "0", + "field_name": "Temp_PSU1_AMB", + "field_pos": "12", + "separator": "," + } + ] + } + } + }, + "TEMP7": { + "dev_info": { + "device_type": "TEMP_SENSOR", + "device_name": "TEMP7", + "device_parent": "SMBUS0" + }, + "dev_attr": { + "display_name": "Temp_PSU1_HS" + }, + "bmc": { + "ipmitool": { + "attr_list": [ + { + "attr_name": "temp1_input", + "bmc_cmd": "ipmitool sdr -c get Temp_PSU1_HS | sed -e 's/,,/,0,/g' -e 's/,,/,0,/g'", + "raw": "0", + "field_name": "Temp_PSU1_HS", + "field_pos": "2", + "separator": "," + }, + { + "attr_name": "temp1_high_crit_threshold", + "bmc_cmd": "ipmitool sdr -c get Temp_PSU1_HS | sed -e 's/,,/,0,/g' -e 's/,,/,0,/g'", + "raw": "0", + "field_name": "Temp_PSU1_HS", + "field_pos": "11", + "separator": "," + }, + { + "attr_name": "temp1_high_threshold", + "bmc_cmd": "ipmitool sdr -c get Temp_PSU1_HS | sed -e 's/,,/,0,/g' -e 's/,,/,0,/g'", + "raw": "0", + "field_name": "Temp_PSU1_HS", + "field_pos": "12", + "separator": "," + } + ] + } + } + }, + "TEMP8": { + "dev_info": { + "device_type": "TEMP_SENSOR", + "device_name": "TEMP8", + "device_parent": "SMBUS0" + }, + "dev_attr": { + "display_name": "Temp_PSU2_AMB" + }, + "bmc": { + "ipmitool": { + "attr_list": [ + { + "attr_name": "temp1_input", + "bmc_cmd": "ipmitool sdr -c get Temp_PSU2_AMB| sed -e 's/,,/,0,/g' -e 's/,,/,0,/g'", + "raw": "0", + "field_name": "Temp_PSU2_AMB", + "field_pos": "2", + "separator": "," + }, + { + "attr_name": "temp1_high_crit_threshold", + "bmc_cmd": "ipmitool sdr -c get Temp_PSU2_AMB| sed -e 's/,,/,0,/g' -e 's/,,/,0,/g'", + "raw": "0", + "field_name": "Temp_PSU2_AMB", + "field_pos": "11", + "separator": "," + }, + { + "attr_name": "temp1_high_threshold", + "bmc_cmd": "ipmitool sdr -c get Temp_PSU2_AMB| sed -e 's/,,/,0,/g' -e 's/,,/,0,/g'", + "raw": "0", + "field_name": "Temp_PSU2_AMB", + "field_pos": "12", + "separator": "," + } + ] + } + } + }, + "TEMP9": { + "dev_info": { + "device_type": "TEMP_SENSOR", + "device_name": "TEMP9", + "device_parent": "SMBUS0" + }, + "dev_attr": { + "display_name": "Temp_PSU2_HS" + }, + "bmc": { + "ipmitool": { + "attr_list": [ + { + "attr_name": "temp1_input", + "bmc_cmd": "ipmitool sdr -c get Temp_PSU2_HS| sed -e 's/,,/,0,/g' -e 's/,,/,0,/g'", + "raw": "0", + "field_name": "Temp_PSU2_HS", + "field_pos": "2", + "separator": "," + }, + { + "attr_name": "temp1_high_crit_threshold", + "bmc_cmd": "ipmitool sdr -c get Temp_PSU2_HS| sed -e 's/,,/,0,/g' -e 's/,,/,0,/g'", + "raw": "0", + "field_name": "Temp_PSU2_HS", + "field_pos": "11", + "separator": "," + }, + { + "attr_name": "temp1_high_threshold", + "bmc_cmd": "ipmitool sdr -c get Temp_PSU2_HS| sed -e 's/,,/,0,/g' -e 's/,,/,0,/g'", + "raw": "0", + "field_name": "Temp_PSU2_HS", + "field_pos": "12", + "separator": "," + } + ] + } + } + }, + "MUX1": { + "dev_info": { + "device_type": "MUX", + "device_name": "MUX1", + "device_parent": "SMBUS0" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x0", + "dev_addr": "0x70", + "dev_type": "pca9548" + }, + "dev_attr": { + "virt_bus": "0x1", + "idle_state": "-2" + }, + "channel": [ + { + "chn": "0", + "dev": "MUX2" + }, + { + "chn": "1", + "dev": "MUX3" + }, + { + "chn": "2", + "dev": "MUX4" + }, + { + "chn": "3", + "dev": "MUX5" + }, + { + "chn": "4", + "dev": "GPIO1" + }, + { + "chn": "4", + "dev": "GPIO2" + }, + { + "chn": "4", + "dev": "GPIO3" + }, + { + "chn": "4", + "dev": "GPIO4" + }, + { + "chn": "4", + "dev": "GPIO5" + }, + { + "chn": "5", + "dev": "GPIO6" + }, + { + "chn": "5", + "dev": "GPIO7" + }, + { + "chn": "5", + "dev": "GPIO8" + }, + { + "chn": "5", + "dev": "GPIO9" + }, + { + "chn": "6", + "dev": "MUX6" + } + ] + } + }, + "MUX2": { + "dev_info": { + "device_type": "MUX", + "device_name": "MUX2", + "device_parent": "MUX1" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x1", + "dev_addr": "0x71", + "dev_type": "pca9548" + }, + "dev_attr": { + "virt_bus": "0x9", + "idle_state": "-2" + }, + "channel": [ + { + "chn": "0", + "dev": "PORT1" + }, + { + "chn": "1", + "dev": "PORT2" + }, + { + "chn": "2", + "dev": "PORT3" + }, + { + "chn": "3", + "dev": "PORT4" + }, + { + "chn": "4", + "dev": "PORT5" + }, + { + "chn": "5", + "dev": "PORT6" + }, + { + "chn": "6", + "dev": "PORT7" + }, + { + "chn": "7", + "dev": "PORT8" + } + ] + } + }, + "MUX3": { + "dev_info": { + "device_type": "MUX", + "device_name": "MUX3", + "device_parent": "MUX1" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x2", + "dev_addr": "0x71", + "dev_type": "pca9548" + }, + "dev_attr": { + "virt_bus": "0x11", + "idle_state": "-2" + }, + "channel": [ + { + "chn": "0", + "dev": "PORT9" + }, + { + "chn": "1", + "dev": "PORT10" + }, + { + "chn": "2", + "dev": "PORT11" + }, + { + "chn": "3", + "dev": "PORT12" + }, + { + "chn": "4", + "dev": "PORT13" + }, + { + "chn": "5", + "dev": "PORT14" + }, + { + "chn": "6", + "dev": "PORT15" + }, + { + "chn": "7", + "dev": "PORT16" + } + ] + } + }, + "MUX4": { + "dev_info": { + "device_type": "MUX", + "device_name": "MUX4", + "device_parent": "MUX1" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x3", + "dev_addr": "0x71", + "dev_type": "pca9548" + }, + "dev_attr": { + "virt_bus": "0x19", + "idle_state": "-2" + }, + "channel": [ + { + "chn": "0", + "dev": "PORT17" + }, + { + "chn": "1", + "dev": "PORT18" + }, + { + "chn": "2", + "dev": "PORT19" + }, + { + "chn": "3", + "dev": "PORT20" + }, + { + "chn": "4", + "dev": "PORT21" + }, + { + "chn": "5", + "dev": "PORT22" + }, + { + "chn": "6", + "dev": "PORT23" + }, + { + "chn": "7", + "dev": "PORT24" + } + ] + } + }, + "MUX5": { + "dev_info": { + "device_type": "MUX", + "device_name": "MUX5", + "device_parent": "MUX1" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x4", + "dev_addr": "0x71", + "dev_type": "pca9548" + }, + "dev_attr": { + "virt_bus": "0x21", + "idle_state": "-2" + }, + "channel": [ + { + "chn": "0", + "dev": "PORT25" + }, + { + "chn": "1", + "dev": "PORT26" + }, + { + "chn": "2", + "dev": "PORT27" + }, + { + "chn": "3", + "dev": "PORT28" + }, + { + "chn": "4", + "dev": "PORT29" + }, + { + "chn": "5", + "dev": "PORT30" + }, + { + "chn": "6", + "dev": "PORT31" + }, + { + "chn": "7", + "dev": "PORT32" + } + ] + } + }, + "MUX6": { + "dev_info": { + "device_type": "MUX", + "device_name": "MUX6", + "device_parent": "MUX1" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x7", + "dev_addr": "0x71", + "dev_type": "pca9548" + }, + "dev_attr": { + "virt_bus": "0x29", + "idle_state": "-2" + }, + "channel": [ + { + "chn": "3", + "dev": "CPLD1" + }, + { + "chn": "4", + "dev": "PORT33" + }, + { + "chn": "5", + "dev": "PORT34" + } + ] + } + }, + "GPIO1": { + "dev_info": { + "device_type": "GPIO", + "device_name": "GPIO1", + "device_parent": "MUX1" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x5", + "dev_addr": "0x20", + "dev_type": "pca9555" + }, + "dev_attr": { + "gpio_base": "0x1f0" + }, + "ports": [ + { + "port_num": "0", + "direction": "in", + "value": "", + "edge": "", + "active_low": "" + }, + { + "port_num": "1", + "direction": "in", + "value": "", + "edge": "", + "active_low": "" + }, + { + "port_num": "2", + "direction": "in", + "value": "", + "edge": "", + "active_low": "" + }, + { + "port_num": "3", + "direction": "in", + "value": "", + "edge": "", + "active_low": "" + }, + { + "port_num": "4", + "direction": "in", + "value": "", + "edge": "", + "active_low": "" + }, + { + "port_num": "5", + "direction": "in", + "value": "", + "edge": "", + "active_low": "" + }, + { + "port_num": "6", + "direction": "in", + "value": "", + "edge": "", + "active_low": "" + }, + { + "port_num": "7", + "direction": "in", + "value": "", + "edge": "", + "active_low": "" + }, + { + "port_num": "8", + "direction": "in", + "value": "", + "edge": "", + "active_low": "" + }, + { + "port_num": "9", + "direction": "in", + "value": "", + "edge": "", + "active_low": "" + }, + { + "port_num": "10", + "direction": "in", + "value": "", + "edge": "", + "active_low": "" + }, + { + "port_num": "11", + "direction": "in", + "value": "", + "edge": "", + "active_low": "" + }, + { + "port_num": "12", + "direction": "in", + "value": "", + "edge": "", + "active_low": "" + }, + { + "port_num": "13", + "direction": "in", + "value": "", + "edge": "", + "active_low": "" + }, + { + "port_num": "14", + "direction": "in", + "value": "", + "edge": "", + "active_low": "" + }, + { + "port_num": "15", + "direction": "in", + "value": "", + "edge": "", + "active_low": "" + } + ] + } + }, + "GPIO2": { + "dev_info": { + "device_type": "GPIO", + "device_name": "GPIO2", + "device_parent": "MUX1" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x5", + "dev_addr": "0x21", + "dev_type": "pca9555" + }, + "dev_attr": { + "gpio_base": "0x1e0" + }, + "ports": [ + { + "port_num": "0", + "direction": "in", + "value": "", + "edge": "", + "active_low": "" + }, + { + "port_num": "1", + "direction": "in", + "value": "", + "edge": "", + "active_low": "" + }, + { + "port_num": "2", + "direction": "in", + "value": "", + "edge": "", + "active_low": "" + }, + { + "port_num": "3", + "direction": "in", + "value": "", + "edge": "", + "active_low": "" + }, + { + "port_num": "4", + "direction": "in", + "value": "", + "edge": "", + "active_low": "" + }, + { + "port_num": "5", + "direction": "in", + "value": "", + "edge": "", + "active_low": "" + }, + { + "port_num": "6", + "direction": "in", + "value": "", + "edge": "", + "active_low": "" + }, + { + "port_num": "7", + "direction": "in", + "value": "", + "edge": "", + "active_low": "" + }, + { + "port_num": "8", + "direction": "in", + "value": "", + "edge": "", + "active_low": "" + }, + { + "port_num": "9", + "direction": "in", + "value": "", + "edge": "", + "active_low": "" + }, + { + "port_num": "10", + "direction": "in", + "value": "", + "edge": "", + "active_low": "" + }, + { + "port_num": "11", + "direction": "in", + "value": "", + "edge": "", + "active_low": "" + }, + { + "port_num": "12", + "direction": "in", + "value": "", + "edge": "", + "active_low": "" + }, + { + "port_num": "13", + "direction": "in", + "value": "", + "edge": "", + "active_low": "" + }, + { + "port_num": "14", + "direction": "in", + "value": "", + "edge": "", + "active_low": "" + }, + { + "port_num": "15", + "direction": "in", + "value": "", + "edge": "", + "active_low": "" + } + ] + } + }, + "GPIO3": { + "dev_info": { + "device_type": "GPIO", + "device_name": "GPIO3", + "device_parent": "MUX1" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x5", + "dev_addr": "0x22", + "dev_type": "pca9555" + }, + "dev_attr": { + "gpio_base": "0x1d0" + }, + "ports": [ + { + "port_num": "0", + "direction": "in", + "value": "", + "edge": "", + "active_low": "" + }, + { + "port_num": "1", + "direction": "in", + "value": "", + "edge": "", + "active_low": "" + }, + { + "port_num": "2", + "direction": "in", + "value": "", + "edge": "", + "active_low": "" + }, + { + "port_num": "3", + "direction": "in", + "value": "", + "edge": "", + "active_low": "" + }, + { + "port_num": "4", + "direction": "in", + "value": "", + "edge": "", + "active_low": "" + }, + { + "port_num": "5", + "direction": "in", + "value": "", + "edge": "", + "active_low": "" + }, + { + "port_num": "6", + "direction": "in", + "value": "", + "edge": "", + "active_low": "" + }, + { + "port_num": "7", + "direction": "in", + "value": "", + "edge": "", + "active_low": "" + }, + { + "port_num": "8", + "direction": "in", + "value": "", + "edge": "", + "active_low": "" + }, + { + "port_num": "9", + "direction": "in", + "value": "", + "edge": "", + "active_low": "" + }, + { + "port_num": "10", + "direction": "in", + "value": "", + "edge": "", + "active_low": "" + }, + { + "port_num": "11", + "direction": "in", + "value": "", + "edge": "", + "active_low": "" + }, + { + "port_num": "12", + "direction": "in", + "value": "", + "edge": "", + "active_low": "" + }, + { + "port_num": "13", + "direction": "in", + "value": "", + "edge": "", + "active_low": "" + }, + { + "port_num": "14", + "direction": "in", + "value": "", + "edge": "", + "active_low": "" + }, + { + "port_num": "15", + "direction": "in", + "value": "", + "edge": "", + "active_low": "" + } + ] + } + }, + "GPIO4": { + "dev_info": { + "device_type": "GPIO", + "device_name": "GPIO4", + "device_parent": "MUX1" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x5", + "dev_addr": "0x23", + "dev_type": "pca9555" + }, + "dev_attr": { + "gpio_base": "0x1c0" + }, + "ports": [ + { + "port_num": "0", + "direction": "in", + "value": "", + "edge": "", + "active_low": "" + }, + { + "port_num": "1", + "direction": "in", + "value": "", + "edge": "", + "active_low": "" + }, + { + "port_num": "2", + "direction": "in", + "value": "", + "edge": "", + "active_low": "" + }, + { + "port_num": "3", + "direction": "in", + "value": "", + "edge": "", + "active_low": "" + }, + { + "port_num": "4", + "direction": "in", + "value": "", + "edge": "", + "active_low": "" + }, + { + "port_num": "5", + "direction": "in", + "value": "", + "edge": "", + "active_low": "" + }, + { + "port_num": "6", + "direction": "in", + "value": "", + "edge": "", + "active_low": "" + }, + { + "port_num": "7", + "direction": "in", + "value": "", + "edge": "", + "active_low": "" + }, + { + "port_num": "8", + "direction": "in", + "value": "", + "edge": "", + "active_low": "" + }, + { + "port_num": "9", + "direction": "in", + "value": "", + "edge": "", + "active_low": "" + }, + { + "port_num": "10", + "direction": "in", + "value": "", + "edge": "", + "active_low": "" + }, + { + "port_num": "11", + "direction": "in", + "value": "", + "edge": "", + "active_low": "" + }, + { + "port_num": "12", + "direction": "in", + "value": "", + "edge": "", + "active_low": "" + }, + { + "port_num": "13", + "direction": "in", + "value": "", + "edge": "", + "active_low": "" + }, + { + "port_num": "14", + "direction": "in", + "value": "", + "edge": "", + "active_low": "" + }, + { + "port_num": "15", + "direction": "in", + "value": "", + "edge": "", + "active_low": "" + } + ] + } + }, + "GPIO5": { + "dev_info": { + "device_type": "GPIO", + "device_name": "GPIO5", + "device_parent": "MUX1" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x5", + "dev_addr": "0x27", + "dev_type": "pca9555" + }, + "dev_attr": { + "gpio_base": "0x1b0" + }, + "ports": [ + { + "port_num": "0", + "direction": "in", + "value": "", + "edge": "", + "active_low": "" + }, + { + "port_num": "1", + "direction": "in", + "value": "", + "edge": "", + "active_low": "" + }, + { + "port_num": "2", + "direction": "in", + "value": "", + "edge": "", + "active_low": "" + }, + { + "port_num": "3", + "direction": "in", + "value": "", + "edge": "", + "active_low": "" + }, + { + "port_num": "4", + "direction": "out", + "value": "0", + "edge": "", + "active_low": "" + }, + { + "port_num": "5", + "direction": "out", + "value": "0", + "edge": "", + "active_low": "" + }, + { + "port_num": "6", + "direction": "in", + "value": "", + "edge": "", + "active_low": "" + }, + { + "port_num": "7", + "direction": "in", + "value": "", + "edge": "", + "active_low": "" + }, + { + "port_num": "8", + "direction": "out", + "value": "0", + "edge": "", + "active_low": "" + }, + { + "port_num": "9", + "direction": "out", + "value": "0", + "edge": "", + "active_low": "" + }, + { + "port_num": "10", + "direction": "out", + "value": "0", + "edge": "", + "active_low": "" + }, + { + "port_num": "11", + "direction": "out", + "value": "0", + "edge": "", + "active_low": "" + }, + { + "port_num": "12", + "direction": "in", + "value": "", + "edge": "", + "active_low": "" + }, + { + "port_num": "13", + "direction": "in", + "value": "", + "edge": "", + "active_low": "" + }, + { + "port_num": "14", + "direction": "in", + "value": "", + "edge": "", + "active_low": "" + }, + { + "port_num": "15", + "direction": "in", + "value": "", + "edge": "", + "active_low": "" + } + ] + } + }, + "GPIO6": { + "dev_info": { + "device_type": "GPIO", + "device_name": "GPIO6", + "device_parent": "MUX1" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x6", + "dev_addr": "0x20", + "dev_type": "pca9555" + }, + "dev_attr": { + "gpio_base": "0x1a0" + }, + "ports": [ + { + "port_num": "0", + "direction": "out", + "value": "0", + "edge": "", + "active_low": "" + }, + { + "port_num": "1", + "direction": "out", + "value": "0", + "edge": "", + "active_low": "" + }, + { + "port_num": "2", + "direction": "out", + "value": "0", + "edge": "", + "active_low": "" + }, + { + "port_num": "3", + "direction": "out", + "value": "0", + "edge": "", + "active_low": "" + }, + { + "port_num": "4", + "direction": "out", + "value": "0", + "edge": "", + "active_low": "" + }, + { + "port_num": "5", + "direction": "out", + "value": "0", + "edge": "", + "active_low": "" + }, + { + "port_num": "6", + "direction": "out", + "value": "0", + "edge": "", + "active_low": "" + }, + { + "port_num": "7", + "direction": "out", + "value": "0", + "edge": "", + "active_low": "" + }, + { + "port_num": "8", + "direction": "out", + "value": "0", + "edge": "", + "active_low": "" + }, + { + "port_num": "9", + "direction": "out", + "value": "0", + "edge": "", + "active_low": "" + }, + { + "port_num": "10", + "direction": "out", + "value": "0", + "edge": "", + "active_low": "" + }, + { + "port_num": "11", + "direction": "out", + "value": "0", + "edge": "", + "active_low": "" + }, + { + "port_num": "12", + "direction": "out", + "value": "0", + "edge": "", + "active_low": "" + }, + { + "port_num": "13", + "direction": "out", + "value": "0", + "edge": "", + "active_low": "" + }, + { + "port_num": "14", + "direction": "out", + "value": "0", + "edge": "", + "active_low": "" + }, + { + "port_num": "15", + "direction": "out", + "value": "0", + "edge": "", + "active_low": "" + } + ] + } + }, + "GPIO7": { + "dev_info": { + "device_type": "GPIO", + "device_name": "GPIO7", + "device_parent": "MUX1" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x6", + "dev_addr": "0x21", + "dev_type": "pca9555" + }, + "dev_attr": { + "gpio_base": "0x190" + }, + "ports": [ + { + "port_num": "0", + "direction": "out", + "value": "0", + "edge": "", + "active_low": "" + }, + { + "port_num": "1", + "direction": "out", + "value": "0", + "edge": "", + "active_low": "" + }, + { + "port_num": "2", + "direction": "out", + "value": "0", + "edge": "", + "active_low": "" + }, + { + "port_num": "3", + "direction": "out", + "value": "0", + "edge": "", + "active_low": "" + }, + { + "port_num": "4", + "direction": "out", + "value": "0", + "edge": "", + "active_low": "" + }, + { + "port_num": "5", + "direction": "out", + "value": "0", + "edge": "", + "active_low": "" + }, + { + "port_num": "6", + "direction": "out", + "value": "0", + "edge": "", + "active_low": "" + }, + { + "port_num": "7", + "direction": "out", + "value": "0", + "edge": "", + "active_low": "" + }, + { + "port_num": "8", + "direction": "out", + "value": "0", + "edge": "", + "active_low": "" + }, + { + "port_num": "9", + "direction": "out", + "value": "0", + "edge": "", + "active_low": "" + }, + { + "port_num": "10", + "direction": "out", + "value": "0", + "edge": "", + "active_low": "" + }, + { + "port_num": "11", + "direction": "out", + "value": "0", + "edge": "", + "active_low": "" + }, + { + "port_num": "12", + "direction": "out", + "value": "0", + "edge": "", + "active_low": "" + }, + { + "port_num": "13", + "direction": "out", + "value": "0", + "edge": "", + "active_low": "" + }, + { + "port_num": "14", + "direction": "out", + "value": "0", + "edge": "", + "active_low": "" + }, + { + "port_num": "15", + "direction": "out", + "value": "0", + "edge": "", + "active_low": "" + } + ] + } + }, + "GPIO8": { + "dev_info": { + "device_type": "GPIO", + "device_name": "GPIO8", + "device_parent": "MUX1" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x6", + "dev_addr": "0x22", + "dev_type": "pca9555" + }, + "dev_attr": { + "gpio_base": "0x180" + }, + "ports": [ + { + "port_num": "0", + "direction": "out", + "value": "1", + "edge": "", + "active_low": "" + }, + { + "port_num": "1", + "direction": "out", + "value": "1", + "edge": "", + "active_low": "" + }, + { + "port_num": "2", + "direction": "out", + "value": "1", + "edge": "", + "active_low": "" + }, + { + "port_num": "3", + "direction": "out", + "value": "1", + "edge": "", + "active_low": "" + }, + { + "port_num": "4", + "direction": "out", + "value": "1", + "edge": "", + "active_low": "" + }, + { + "port_num": "5", + "direction": "out", + "value": "1", + "edge": "", + "active_low": "" + }, + { + "port_num": "6", + "direction": "out", + "value": "1", + "edge": "", + "active_low": "" + }, + { + "port_num": "7", + "direction": "out", + "value": "1", + "edge": "", + "active_low": "" + }, + { + "port_num": "8", + "direction": "out", + "value": "1", + "edge": "", + "active_low": "" + }, + { + "port_num": "9", + "direction": "out", + "value": "1", + "edge": "", + "active_low": "" + }, + { + "port_num": "10", + "direction": "out", + "value": "1", + "edge": "", + "active_low": "" + }, + { + "port_num": "11", + "direction": "out", + "value": "1", + "edge": "", + "active_low": "" + }, + { + "port_num": "12", + "direction": "out", + "value": "1", + "edge": "", + "active_low": "" + }, + { + "port_num": "13", + "direction": "out", + "value": "1", + "edge": "", + "active_low": "" + }, + { + "port_num": "14", + "direction": "out", + "value": "1", + "edge": "", + "active_low": "" + }, + { + "port_num": "15", + "direction": "out", + "value": "1", + "edge": "", + "active_low": "" + } + ] + } + }, + "GPIO9": { + "dev_info": { + "device_type": "GPIO", + "device_name": "GPIO9", + "device_parent": "MUX1" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x6", + "dev_addr": "0x23", + "dev_type": "pca9555" + }, + "dev_attr": { + "gpio_base": "0x170" + }, + "ports": [ + { + "port_num": "0", + "direction": "out", + "value": "1", + "edge": "", + "active_low": "0" + }, + { + "port_num": "1", + "direction": "out", + "value": "1", + "edge": "", + "active_low": "0" + }, + { + "port_num": "2", + "direction": "out", + "value": "1", + "edge": "", + "active_low": "0" + }, + { + "port_num": "3", + "direction": "out", + "value": "1", + "edge": "", + "active_low": "0" + }, + { + "port_num": "4", + "direction": "out", + "value": "1", + "edge": "", + "active_low": "0" + }, + { + "port_num": "5", + "direction": "out", + "value": "1", + "edge": "", + "active_low": "0" + }, + { + "port_num": "6", + "direction": "out", + "value": "1", + "edge": "", + "active_low": "0" + }, + { + "port_num": "7", + "direction": "out", + "value": "1", + "edge": "", + "active_low": "0" + }, + { + "port_num": "8", + "direction": "out", + "value": "1", + "edge": "", + "active_low": "0" + }, + { + "port_num": "9", + "direction": "out", + "value": "1", + "edge": "", + "active_low": "0" + }, + { + "port_num": "10", + "direction": "out", + "value": "1", + "edge": "", + "active_low": "0" + }, + { + "port_num": "11", + "direction": "out", + "value": "1", + "edge": "", + "active_low": "0" + }, + { + "port_num": "12", + "direction": "out", + "value": "1", + "edge": "", + "active_low": "0" + }, + { + "port_num": "13", + "direction": "out", + "value": "1", + "edge": "", + "active_low": "0" + }, + { + "port_num": "14", + "direction": "out", + "value": "1", + "edge": "", + "active_low": "0" + }, + { + "port_num": "15", + "direction": "out", + "value": "1", + "edge": "", + "active_low": "0" + } + ] + } + }, + "GPIO10": { + "dev_info": { + "device_type": "GPIO", + "device_name": "GPIO10", + "device_parent": "SMBUS0" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x0", + "dev_addr": "0x77", + "dev_type": "pca9539" + }, + "dev_attr": { + "gpio_base": "0x160" + }, + "ports": [ + { + "port_num": "0", + "direction": "in", + "value": "", + "edge": "", + "active_low": "" + }, + { + "port_num": "1", + "direction": "in", + "value": "", + "edge": "", + "active_low": "" + }, + { + "port_num": "2", + "direction": "in", + "value": "", + "edge": "", + "active_low": "" + }, + { + "port_num": "3", + "direction": "in", + "value": "", + "edge": "", + "active_low": "" + }, + { + "port_num": "4", + "direction": "in", + "value": "", + "edge": "", + "active_low": "" + }, + { + "port_num": "5", + "direction": "in", + "value": "", + "edge": "", + "active_low": "" + }, + { + "port_num": "6", + "direction": "in", + "value": "", + "edge": "", + "active_low": "" + }, + { + "port_num": "7", + "direction": "in", + "value": "", + "edge": "", + "active_low": "" + }, + { + "port_num": "8", + "direction": "in", + "value": "", + "edge": "", + "active_low": "" + }, + { + "port_num": "9", + "direction": "in", + "value": "", + "edge": "", + "active_low": "" + }, + { + "port_num": "10", + "direction": "in", + "value": "", + "edge": "", + "active_low": "" + }, + { + "port_num": "11", + "direction": "in", + "value": "", + "edge": "", + "active_low": "" + }, + { + "port_num": "12", + "direction": "in", + "value": "", + "edge": "", + "active_low": "" + }, + { + "port_num": "13", + "direction": "in", + "value": "", + "edge": "", + "active_low": "" + }, + { + "port_num": "14", + "direction": "in", + "value": "", + "edge": "", + "active_low": "" + }, + { + "port_num": "15", + "direction": "in", + "value": "", + "edge": "", + "active_low": "" + } + ] + } + }, + "GPIO11": { + "dev_info": { + "device_type": "GPIO", + "device_name": "GPIO11", + "device_parent": "SMBUS0" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x0", + "dev_addr": "0x74", + "dev_type": "pca9539" + }, + "dev_attr": { + "gpio_base": "0x150" + }, + "ports": [ + { + "port_num": "0", + "direction": "out", + "value": "1", + "edge": "", + "active_low": "" + }, + { + "port_num": "1", + "direction": "out", + "value": "1", + "edge": "", + "active_low": "" + }, + { + "port_num": "2", + "direction": "out", + "value": "1", + "edge": "", + "active_low": "" + }, + { + "port_num": "3", + "direction": "in", + "value": "", + "edge": "", + "active_low": "" + }, + { + "port_num": "4", + "direction": "out", + "value": "0", + "edge": "", + "active_low": "" + }, + { + "port_num": "5", + "direction": "out", + "value": "0", + "edge": "", + "active_low": "" + }, + { + "port_num": "6", + "direction": "out", + "value": "0", + "edge": "", + "active_low": "" + }, + { + "port_num": "7", + "direction": "out", + "value": "0", + "edge": "", + "active_low": "" + }, + { + "port_num": "8", + "direction": "in", + "value": "", + "edge": "", + "active_low": "" + }, + { + "port_num": "9", + "direction": "in", + "value": "", + "edge": "", + "active_low": "" + }, + { + "port_num": "10", + "direction": "in", + "value": "", + "edge": "", + "active_low": "" + }, + { + "port_num": "11", + "direction": "in", + "value": "", + "edge": "", + "active_low": "" + }, + { + "port_num": "12", + "direction": "in", + "value": "", + "edge": "", + "active_low": "" + }, + { + "port_num": "13", + "direction": "out", + "value": "0", + "edge": "", + "active_low": "" + }, + { + "port_num": "14", + "direction": "out", + "value": "1", + "edge": "", + "active_low": "" + }, + { + "port_num": "15", + "direction": "out", + "value": "1", + "edge": "", + "active_low": "" + } + ] + } + }, + "CPLD1": { + "dev_info": { + "device_type": "CPLD", + "device_name": "CPLD1", + "device_parent": "MUX1" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x2", + "dev_addr": "0x30", + "dev_type": "i2c_cpld" + }, + "dev_attr": {} + } + }, + "CPLD2": { + "dev_info": { + "device_type": "CPLD", + "device_name": "CPLD2", + "device_parent": "MUX1" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x2", + "dev_addr": "0x31", + "dev_type": "i2c_cpld" + }, + "dev_attr": {} + } + }, + "CPLD3": { + "dev_info": { + "device_type": "CPLD", + "device_name": "CPLD3", + "device_parent": "MUX1" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x2", + "dev_addr": "0x32", + "dev_type": "i2c_cpld" + }, + "dev_attr": {} + } + }, + "PSU1": { + "dev_info": { + "device_type": "PSU", + "device_name": "PSU1", + "device_parent": "SMBUS0" + }, + "dev_attr": { + "dev_idx": "1", + "num_psu_fans": "1" + }, + "i2c": { + "interface": [] + }, + "bmc": { + "ipmitool": { + "attr_list": [ + { + "attr_name": "psu_present", + "bmc_cmd": "ipmitool sdr -c get PSU1_PRSNT", + "raw": "0", + "field_name": "PSU1_PRSNT", + "field_pos": "5", + "separator": "," + }, + { + "attr_name": "psu_power_good", + "bmc_cmd": "ipmitool sdr -c get PSU1_PWROK", + "raw": "0", + "field_name": "PSU1_PWROK", + "field_pos": "5", + "separator": "," + }, + { + "attr_name": "psu_temp1_input", + "bmc_cmd": "ipmitool sdr -c get Temp_PSU1_AMB | sed -e 's/,,/,0,/g' -e 's/,,/,0,/g'", + "raw": "0", + "field_name": "Temp_PSU1_AMB", + "field_pos": "2", + "mult": "1000", + "separator": "," + }, + { + "attr_name": "psu_fan1_speed_rpm", + "bmc_cmd": "ipmitool sdr -c get Fan_PSU1 | sed -e 's/,,/,N\\/A,/g' -e 's/,,/,N\\/A,/g'", + "raw": "0", + "field_name": "Fan_PSU1", + "field_pos": "2", + "separator": "," + }, + { + "attr_name": "psu_v_out", + "bmc_cmd": "ipmitool sdr -c get VOUT_PSU1 | sed -e 's/,,/,N\\/A,/g' -e 's/,,/,N\\/A,/g'", + "raw": "0", + "field_name": "VOUT_PSU1", + "field_pos": "2", + "mult": "1000", + "separator": "," + }, + { + "attr_name": "psu_i_out", + "bmc_cmd": "ipmitool sdr -c get IOUT_PSU1 | sed -e 's/,,/,N\\/A,/g' -e 's/,,/,N\\/A,/g'", + "raw": "0", + "field_name": "IOUT_PSU1", + "field_pos": "2", + "mult": "1000", + "separator": "," + }, + { + "attr_name": "psu_mfr_id", + "bmc_cmd": "_rv=$(ipmitool fru print 1 2>/dev/null | tr -s ' ' | cut -d' ' -f3-5 | grep 'Manufacturer') && echo $_rv || echo 'Manufacturer : N/A'", + "raw": "0", + "separator": ":", + "field_name": "Manufacturer", + "field_pos": "2" + }, + { + "attr_name": "psu_model_name", + "bmc_cmd": "_rv=$(ipmitool fru print 1 2>/dev/null | tr -s ' ' | cut -d' ' -f3-5 | grep 'Name') && echo $_rv || echo 'Name : N/A'", + "raw": "0", + "separator": ":", + "field_name": "Name", + "field_pos": "2" + }, + { + "attr_name": "psu_serial_num", + "bmc_cmd": "_rv=$(ipmitool fru print 1 2>/dev/null | tr -s ' ' | cut -d' ' -f3-5 | grep 'Serial') && echo $_rv || echo 'Serial : N/A'", + "raw": "0", + "separator": ":", + "field_name": "Serial", + "field_pos": "2" + }, + { + "attr_name": "psu_v_in", + "bmc_cmd": "ipmitool sdr get -c VIN_PSU1 | sed -e 's/,,/,N\\/A,/g' -e 's/,,/,N\\/A,/g'", + "raw": "0", + "separator": ",", + "field_name": "VIN_PSU1", + "field_pos": "2", + "mult": "1000" + }, + { + "attr_name": "psu_i_in", + "bmc_cmd": "ipmitool sdr get -c IIN_PSU1 | sed -e 's/,,/,N\\/A,/g' -e 's/,,/,N\\/A,/g'", + "raw": "0", + "separator": ",", + "field_name": "IIN_PSU1", + "field_pos": "2", + "mult": "1000" + } + ] + } + } + }, + "PSU2": { + "dev_info": { + "device_type": "PSU", + "device_name": "PSU2", + "device_parent": "SMBUS0" + }, + "dev_attr": { + "dev_idx": "2", + "num_psu_fans": "1" + }, + "i2c": { + "interface": [] + }, + "bmc": { + "ipmitool": { + "attr_list": [ + { + "attr_name": "psu_present", + "bmc_cmd": "ipmitool sdr -c get PSU2_PRSNT", + "raw": "0", + "field_name": "PSU2_PRSNT", + "field_pos": "5", + "separator": "," + }, + { + "attr_name": "psu_power_good", + "bmc_cmd": "ipmitool sdr -c get PSU2_PWROK", + "raw": "0", + "field_name": "PSU2_PWROK", + "field_pos": "5", + "separator": "," + }, + { + "attr_name": "psu_temp1_input", + "bmc_cmd": "ipmitool sdr -c get Temp_PSU2_AMB | sed -e 's/,,/,N\\/A,/g' -e 's/,,/,N\\/A,/g'", + "raw": "0", + "field_name": "Temp_PSU2_AMB", + "field_pos": "2", + "mult": "1000", + "separator": "," + }, + { + "attr_name": "psu_fan1_speed_rpm", + "bmc_cmd": "ipmitool sdr -c get Fan_PSU2 | sed -e 's/,,/,N\\/A,/g' -e 's/,,/,N\\/A,/g'", + "raw": "0", + "field_name": "Fan_PSU2", + "field_pos": "2", + "separator": "," + }, + { + "attr_name": "psu_v_out", + "bmc_cmd": "ipmitool sdr -c get VOUT_PSU2 | sed -e 's/,,/,N\\/A,/g' -e 's/,,/,N\\/A,/g'", + "raw": "0", + "field_name": "VOUT_PSU2", + "field_pos": "2", + "mult": "1000", + "separator": "," + }, + { + "attr_name": "psu_i_out", + "bmc_cmd": "ipmitool sdr -c get IOUT_PSU2 | sed -e 's/,,/,N\\/A,/g' -e 's/,,/,N\\/A,/g'", + "raw": "0", + "field_name": "IOUT_PSU2", + "field_pos": "2", + "mult": "1000", + "separator": "," + }, + { + "attr_name": "psu_mfr_id", + "bmc_cmd": "_rv=$(ipmitool fru print 2 2>/dev/null | tr -s ' ' | cut -d' ' -f3-5 | grep 'Manufacturer') && echo $_rv || echo 'Manufacturer : N/A'", + "raw": "0", + "separator": ":", + "field_name": "Manufacturer", + "field_pos": "2" + }, + { + "attr_name": "psu_model_name", + "bmc_cmd": "_rv=$(ipmitool fru print 2 2>/dev/null | tr -s ' ' | cut -d' ' -f3-5 | grep 'Name') && echo $_rv || echo 'Name : N/A'", + "raw": "0", + "separator": ":", + "field_name": "Name", + "field_pos": "2" + }, + { + "attr_name": "psu_serial_num", + "bmc_cmd": "_rv=$(ipmitool fru print 2 2>/dev/null | tr -s ' ' | cut -d' ' -f3-5 | grep 'Serial') && echo $_rv || echo 'Serial : N/A'", + "raw": "0", + "separator": ":", + "field_name": "Serial", + "field_pos": "2" + }, + { + "attr_name": "psu_v_in", + "bmc_cmd": "ipmitool sdr get -c VIN_PSU2 | sed -e 's/,,/,N\\/A,/g' -e 's/,,/,N\\/A,/g'", + "raw": "0", + "separator": ",", + "field_name": "VIN_PSU2", + "field_pos": "2", + "mult": "1000" + }, + { + "attr_name": "psu_i_in", + "bmc_cmd": "ipmitool sdr get -c IIN_PSU2 | sed -e 's/,,/,N\\/A,/g' -e 's/,,/,N\\/A,/g'", + "raw": "0", + "separator": ",", + "field_name": "IIN_PSU2", + "field_pos": "2", + "mult": "1000" + } + ] + } + } + }, + "FAN-CTRL": { + "dev_info": { + "device_type": "FAN", + "device_name": "FAN-CTRL", + "device_parent": "" + }, + "bmc": { + "ipmitool": { + "attr_list": [ + { + "attr_name": "fan1_present", + "bmc_cmd": "ipmitool sdr -c get Fan1_PRSNT", + "raw": "0", + "field_name": "Fan1_PRSNT", + "field_pos": "5", + "separator": "," + }, + { + "attr_name": "fan2_present", + "bmc_cmd": "ipmitool sdr -c get Fan2_PRSNT", + "raw": "0", + "field_name": "Fan2_PRSNT", + "field_pos": "5", + "separator": "," + }, + { + "attr_name": "fan3_present", + "bmc_cmd": "ipmitool sdr -c get Fan3_PRSNT", + "raw": "0", + "field_name": "Fan3_PRSNT", + "field_pos": "5", + "separator": "," + }, + { + "attr_name": "fan4_present", + "bmc_cmd": "ipmitool sdr -c get Fan4_PRSNT", + "raw": "0", + "field_name": "Fan4_PRSNT", + "field_pos": "5", + "separator": "," + }, + { + "attr_name": "fan1_f_speed_rpm", + "bmc_cmd": "ipmitool sdr -c get FAN_1_F | sed -e 's/,,/,N\\/A,/g' -e 's/,,/,N\\/A,/g'", + "raw": "0", + "field_name": "FAN_1_F", + "field_pos": "2", + "separator": "," + }, + { + "attr_name": "fan1_r_speed_rpm", + "bmc_cmd": "ipmitool sdr -c get FAN_1_R | sed -e 's/,,/,N\\/A,/g' -e 's/,,/,N\\/A,/g'", + "raw": "0", + "field_name": "FAN_1_R", + "field_pos": "2", + "separator": "," + }, + { + "attr_name": "fan2_f_speed_rpm", + "bmc_cmd": "ipmitool sdr -c get FAN_2_F | sed -e 's/,,/,N\\/A,/g' -e 's/,,/,N\\/A,/g'", + "raw": "0", + "field_name": "FAN_2_F", + "field_pos": "2", + "separator": "," + }, + { + "attr_name": "fan2_r_speed_rpm", + "bmc_cmd": "ipmitool sdr -c get FAN_2_R | sed -e 's/,,/,N\\/A,/g' -e 's/,,/,N\\/A,/g'", + "raw": "0", + "field_name": "FAN_2_R", + "field_pos": "2", + "separator": "," + }, + { + "attr_name": "fan3_f_speed_rpm", + "bmc_cmd": "ipmitool sdr -c get FAN_3_F | sed -e 's/,,/,N\\/A,/g' -e 's/,,/,N\\/A,/g'", + "raw": "0", + "field_name": "FAN_3_F", + "field_pos": "2", + "separator": "," + }, + { + "attr_name": "fan3_r_speed_rpm", + "bmc_cmd": "ipmitool sdr -c get FAN_3_R | sed -e 's/,,/,N\\/A,/g' -e 's/,,/,N\\/A,/g'", + "raw": "0", + "field_name": "FAN_3_R", + "field_pos": "2", + "separator": "," + }, + { + "attr_name": "fan4_f_speed_rpm", + "bmc_cmd": "ipmitool sdr -c get FAN_4_F | sed -e 's/,,/,N\\/A,/g' -e 's/,,/,N\\/A,/g'", + "raw": "0", + "field_name": "FAN_4_F", + "field_pos": "2", + "separator": "," + }, + { + "attr_name": "fan4_r_speed_rpm", + "bmc_cmd": "ipmitool sdr -c get FAN_4_R | sed -e 's/,,/,N\\/A,/g' -e 's/,,/,N\\/A,/g'", + "raw": "0", + "field_name": "FAN_4_R", + "field_pos": "2", + "separator": "," + } + ] + } + } + }, + "PORT1": { + "dev_info": { + "device_type": "QSFP28", + "device_name": "PORT1", + "device_parent": "MUX2" + }, + "dev_attr": { + "dev_idx": "1" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT1-EEPROM" + }, + { + "itf": "control", + "dev": "PORT1-CTRL" + } + ] + } + }, + "PORT1-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT1-EEPROM", + "device_parent": "MUX2", + "virt_parent": "PORT1" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x0a", + "dev_addr": "0x50", + "dev_type": "optoe1" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT1-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT1-CTRL", + "device_parent": "MUX2", + "virt_parent": "PORT1" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x0a", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_intr_status", + "attr_devaddr": "0x22", + "attr_devname": "GPIO3", + "attr_devtype": "gpio", + "attr_offset": "0x1", + "attr_mask": "", + "attr_cmpval": "", + "attr_len": "" + }, + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x20", + "attr_devname": "GPIO1", + "attr_devtype": "gpio", + "attr_offset": "0x1", + "attr_mask": "", + "attr_cmpval": "", + "attr_len": "" + }, + { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x22", + "attr_devname": "GPIO8", + "attr_devtype": "gpio", + "attr_offset": "0x1", + "attr_mask": "", + "attr_cmpval": "", + "attr_len": "" + }, + { + "attr_name": "xcvr_lpmode", + "attr_devaddr": "0x20", + "attr_devname": "GPIO6", + "attr_devtype": "gpio", + "attr_offset": "0x1", + "attr_mask": "", + "attr_cmpval": "", + "attr_len": "" + } + ] + } + }, + "PORT2": { + "dev_info": { + "device_type": "QSFP28", + "device_name": "PORT2", + "device_parent": "MUX2" + }, + "dev_attr": { + "dev_idx": "2" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT2-EEPROM" + }, + { + "itf": "control", + "dev": "PORT2-CTRL" + } + ] + } + }, + "PORT2-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT2-EEPROM", + "device_parent": "MUX2", + "virt_parent": "PORT2" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x09", + "dev_addr": "0x50", + "dev_type": "optoe1" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT2-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT2-CTRL", + "device_parent": "MUX2", + "virt_parent": "PORT2" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x09", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_intr_status", + "attr_devaddr": "0x22", + "attr_devname": "GPIO3", + "attr_devtype": "gpio", + "attr_offset": "0x0", + "attr_mask": "", + "attr_cmpval": "", + "attr_len": "" + }, + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x20", + "attr_devname": "GPIO1", + "attr_devtype": "gpio", + "attr_offset": "0x0", + "attr_mask": "", + "attr_cmpval": "", + "attr_len": "" + }, + { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x22", + "attr_devname": "GPIO8", + "attr_devtype": "gpio", + "attr_offset": "0x0", + "attr_mask": "", + "attr_cmpval": "", + "attr_len": "" + }, + { + "attr_name": "xcvr_lpmode", + "attr_devaddr": "0x20", + "attr_devname": "GPIO6", + "attr_devtype": "gpio", + "attr_offset": "0x0", + "attr_mask": "", + "attr_cmpval": "", + "attr_len": "" + } + ] + } + }, + "PORT3": { + "dev_info": { + "device_type": "QSFP28", + "device_name": "PORT3", + "device_parent": "MUX2" + }, + "dev_attr": { + "dev_idx": "3" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT3-EEPROM" + }, + { + "itf": "control", + "dev": "PORT3-CTRL" + } + ] + } + }, + "PORT3-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT3-EEPROM", + "device_parent": "MUX2", + "virt_parent": "PORT3" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x0c", + "dev_addr": "0x50", + "dev_type": "optoe1" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT3-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT3-CTRL", + "device_parent": "MUX2", + "virt_parent": "PORT3" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x0c", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_intr_status", + "attr_devaddr": "0x22", + "attr_devname": "GPIO3", + "attr_devtype": "gpio", + "attr_offset": "0x3", + "attr_mask": "", + "attr_cmpval": "", + "attr_len": "" + }, + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x20", + "attr_devname": "GPIO1", + "attr_devtype": "gpio", + "attr_offset": "0x3", + "attr_mask": "", + "attr_cmpval": "", + "attr_len": "" + }, + { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x22", + "attr_devname": "GPIO8", + "attr_devtype": "gpio", + "attr_offset": "0x3", + "attr_mask": "", + "attr_cmpval": "", + "attr_len": "" + }, + { + "attr_name": "xcvr_lpmode", + "attr_devaddr": "0x20", + "attr_devname": "GPIO6", + "attr_devtype": "gpio", + "attr_offset": "0x3", + "attr_mask": "", + "attr_cmpval": "", + "attr_len": "" + } + ] + } + }, + "PORT4": { + "dev_info": { + "device_type": "QSFP28", + "device_name": "PORT4", + "device_parent": "MUX2" + }, + "dev_attr": { + "dev_idx": "4" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT4-EEPROM" + }, + { + "itf": "control", + "dev": "PORT4-CTRL" + } + ] + } + }, + "PORT4-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT4-EEPROM", + "device_parent": "MUX2", + "virt_parent": "PORT4" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x0b", + "dev_addr": "0x50", + "dev_type": "optoe1" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT4-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT4-CTRL", + "device_parent": "MUX2", + "virt_parent": "PORT4" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x0b", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_intr_status", + "attr_devaddr": "0x22", + "attr_devname": "GPIO3", + "attr_devtype": "gpio", + "attr_offset": "0x2", + "attr_mask": "", + "attr_cmpval": "", + "attr_len": "" + }, + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x20", + "attr_devname": "GPIO1", + "attr_devtype": "gpio", + "attr_offset": "0x2", + "attr_mask": "", + "attr_cmpval": "", + "attr_len": "" + }, + { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x22", + "attr_devname": "GPIO8", + "attr_devtype": "gpio", + "attr_offset": "0x2", + "attr_mask": "", + "attr_cmpval": "", + "attr_len": "" + }, + { + "attr_name": "xcvr_lpmode", + "attr_devaddr": "0x20", + "attr_devname": "GPIO6", + "attr_devtype": "gpio", + "attr_offset": "0x2", + "attr_mask": "", + "attr_cmpval": "", + "attr_len": "" + } + ] + } + }, + "PORT5": { + "dev_info": { + "device_type": "QSFP28", + "device_name": "PORT5", + "device_parent": "MUX2" + }, + "dev_attr": { + "dev_idx": "5" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT5-EEPROM" + }, + { + "itf": "control", + "dev": "PORT5-CTRL" + } + ] + } + }, + "PORT5-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT5-EEPROM", + "device_parent": "MUX2", + "virt_parent": "PORT5" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x0e", + "dev_addr": "0x50", + "dev_type": "optoe1" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT5-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT5-CTRL", + "device_parent": "MUX2", + "virt_parent": "PORT5" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x0e", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_intr_status", + "attr_devaddr": "0x22", + "attr_devname": "GPIO3", + "attr_devtype": "gpio", + "attr_offset": "0x5", + "attr_mask": "", + "attr_cmpval": "", + "attr_len": "" + }, + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x20", + "attr_devname": "GPIO1", + "attr_devtype": "gpio", + "attr_offset": "0x5", + "attr_mask": "", + "attr_cmpval": "", + "attr_len": "" + }, + { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x22", + "attr_devname": "GPIO8", + "attr_devtype": "gpio", + "attr_offset": "0x5", + "attr_mask": "", + "attr_cmpval": "", + "attr_len": "" + }, + { + "attr_name": "xcvr_lpmode", + "attr_devaddr": "0x20", + "attr_devname": "GPIO6", + "attr_devtype": "gpio", + "attr_offset": "0x5", + "attr_mask": "", + "attr_cmpval": "", + "attr_len": "" + } + ] + } + }, + "PORT6": { + "dev_info": { + "device_type": "QSFP28", + "device_name": "PORT6", + "device_parent": "MUX2" + }, + "dev_attr": { + "dev_idx": "6" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT6-EEPROM" + }, + { + "itf": "control", + "dev": "PORT6-CTRL" + } + ] + } + }, + "PORT6-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT6-EEPROM", + "device_parent": "MUX2", + "virt_parent": "PORT6" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x0d", + "dev_addr": "0x50", + "dev_type": "optoe1" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT6-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT6-CTRL", + "device_parent": "MUX2", + "virt_parent": "PORT6" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x0d", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_intr_status", + "attr_devaddr": "0x22", + "attr_devname": "GPIO3", + "attr_devtype": "gpio", + "attr_offset": "0x4", + "attr_mask": "", + "attr_cmpval": "", + "attr_len": "" + }, + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x20", + "attr_devname": "GPIO1", + "attr_devtype": "gpio", + "attr_offset": "0x4", + "attr_mask": "", + "attr_cmpval": "", + "attr_len": "" + }, + { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x22", + "attr_devname": "GPIO8", + "attr_devtype": "gpio", + "attr_offset": "0x4", + "attr_mask": "", + "attr_cmpval": "", + "attr_len": "" + }, + { + "attr_name": "xcvr_lpmode", + "attr_devaddr": "0x20", + "attr_devname": "GPIO6", + "attr_devtype": "gpio", + "attr_offset": "0x4", + "attr_mask": "", + "attr_cmpval": "", + "attr_len": "" + } + ] + } + }, + "PORT7": { + "dev_info": { + "device_type": "QSFP28", + "device_name": "PORT7", + "device_parent": "MUX2" + }, + "dev_attr": { + "dev_idx": "7" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT7-EEPROM" + }, + { + "itf": "control", + "dev": "PORT7-CTRL" + } + ] + } + }, + "PORT7-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT7-EEPROM", + "device_parent": "MUX2", + "virt_parent": "PORT7" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x10", + "dev_addr": "0x50", + "dev_type": "optoe1" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT7-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT7-CTRL", + "device_parent": "MUX2", + "virt_parent": "PORT7" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x10", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_intr_status", + "attr_devaddr": "0x22", + "attr_devname": "GPIO3", + "attr_devtype": "gpio", + "attr_offset": "0x7", + "attr_mask": "", + "attr_cmpval": "", + "attr_len": "" + }, + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x20", + "attr_devname": "GPIO1", + "attr_devtype": "gpio", + "attr_offset": "0x7", + "attr_mask": "", + "attr_cmpval": "", + "attr_len": "" + }, + { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x22", + "attr_devname": "GPIO8", + "attr_devtype": "gpio", + "attr_offset": "0x7", + "attr_mask": "", + "attr_cmpval": "", + "attr_len": "" + }, + { + "attr_name": "xcvr_lpmode", + "attr_devaddr": "0x20", + "attr_devname": "GPIO6", + "attr_devtype": "gpio", + "attr_offset": "0x7", + "attr_mask": "", + "attr_cmpval": "", + "attr_len": "" + } + ] + } + }, + "PORT8": { + "dev_info": { + "device_type": "QSFP28", + "device_name": "PORT8", + "device_parent": "MUX2" + }, + "dev_attr": { + "dev_idx": "8" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT8-EEPROM" + }, + { + "itf": "control", + "dev": "PORT8-CTRL" + } + ] + } + }, + "PORT8-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT8-EEPROM", + "device_parent": "MUX2", + "virt_parent": "PORT8" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x0f", + "dev_addr": "0x50", + "dev_type": "optoe1" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT8-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT8-CTRL", + "device_parent": "MUX2", + "virt_parent": "PORT8" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x0f", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_intr_status", + "attr_devaddr": "0x22", + "attr_devname": "GPIO3", + "attr_devtype": "gpio", + "attr_offset": "0x6", + "attr_mask": "", + "attr_cmpval": "", + "attr_len": "" + }, + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x20", + "attr_devname": "GPIO1", + "attr_devtype": "gpio", + "attr_offset": "0x6", + "attr_mask": "", + "attr_cmpval": "", + "attr_len": "" + }, + { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x22", + "attr_devname": "GPIO8", + "attr_devtype": "gpio", + "attr_offset": "0x6", + "attr_mask": "", + "attr_cmpval": "", + "attr_len": "" + }, + { + "attr_name": "xcvr_lpmode", + "attr_devaddr": "0x20", + "attr_devname": "GPIO6", + "attr_devtype": "gpio", + "attr_offset": "0x6", + "attr_mask": "", + "attr_cmpval": "", + "attr_len": "" + } + ] + } + }, + "PORT9": { + "dev_info": { + "device_type": "QSFP28", + "device_name": "PORT9", + "device_parent": "MUX3" + }, + "dev_attr": { + "dev_idx": "9" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT9-EEPROM" + }, + { + "itf": "control", + "dev": "PORT9-CTRL" + } + ] + } + }, + "PORT9-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT9-EEPROM", + "device_parent": "MUX3", + "virt_parent": "PORT9" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x12", + "dev_addr": "0x50", + "dev_type": "optoe1" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT9-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT9-CTRL", + "device_parent": "MUX3", + "virt_parent": "PORT9" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x12", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_intr_status", + "attr_devaddr": "0x22", + "attr_devname": "GPIO3", + "attr_devtype": "gpio", + "attr_offset": "0x9", + "attr_mask": "", + "attr_cmpval": "", + "attr_len": "" + }, + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x20", + "attr_devname": "GPIO1", + "attr_devtype": "gpio", + "attr_offset": "0x9", + "attr_mask": "", + "attr_cmpval": "", + "attr_len": "" + }, + { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x22", + "attr_devname": "GPIO8", + "attr_devtype": "gpio", + "attr_offset": "0x9", + "attr_mask": "", + "attr_cmpval": "", + "attr_len": "" + }, + { + "attr_name": "xcvr_lpmode", + "attr_devaddr": "0x20", + "attr_devname": "GPIO6", + "attr_devtype": "gpio", + "attr_offset": "0x9", + "attr_mask": "", + "attr_cmpval": "", + "attr_len": "" + } + ] + } + }, + "PORT10": { + "dev_info": { + "device_type": "QSFP28", + "device_name": "PORT10", + "device_parent": "MUX3" + }, + "dev_attr": { + "dev_idx": "10" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT10-EEPROM" + }, + { + "itf": "control", + "dev": "PORT10-CTRL" + } + ] + } + }, + "PORT10-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT10-EEPROM", + "device_parent": "MUX3", + "virt_parent": "PORT10" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x11", + "dev_addr": "0x50", + "dev_type": "optoe1" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT10-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT10-CTRL", + "device_parent": "MUX3", + "virt_parent": "PORT10" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x11", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_intr_status", + "attr_devaddr": "0x22", + "attr_devname": "GPIO3", + "attr_devtype": "gpio", + "attr_offset": "0x8", + "attr_mask": "", + "attr_cmpval": "", + "attr_len": "" + }, + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x20", + "attr_devname": "GPIO1", + "attr_devtype": "gpio", + "attr_offset": "0x8", + "attr_mask": "", + "attr_cmpval": "", + "attr_len": "" + }, + { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x22", + "attr_devname": "GPIO8", + "attr_devtype": "gpio", + "attr_offset": "0x8", + "attr_mask": "", + "attr_cmpval": "", + "attr_len": "" + }, + { + "attr_name": "xcvr_lpmode", + "attr_devaddr": "0x20", + "attr_devname": "GPIO6", + "attr_devtype": "gpio", + "attr_offset": "0x8", + "attr_mask": "", + "attr_cmpval": "", + "attr_len": "" + } + ] + } + }, + "PORT11": { + "dev_info": { + "device_type": "QSFP28", + "device_name": "PORT11", + "device_parent": "MUX3" + }, + "dev_attr": { + "dev_idx": "11" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT11-EEPROM" + }, + { + "itf": "control", + "dev": "PORT11-CTRL" + } + ] + } + }, + "PORT11-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT11-EEPROM", + "device_parent": "MUX3", + "virt_parent": "PORT11" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x14", + "dev_addr": "0x50", + "dev_type": "optoe1" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT11-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT11-CTRL", + "device_parent": "MUX3", + "virt_parent": "PORT11" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x14", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_intr_status", + "attr_devaddr": "0x22", + "attr_devname": "GPIO3", + "attr_devtype": "gpio", + "attr_offset": "0xb", + "attr_mask": "", + "attr_cmpval": "", + "attr_len": "" + }, + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x20", + "attr_devname": "GPIO1", + "attr_devtype": "gpio", + "attr_offset": "0xb", + "attr_mask": "", + "attr_cmpval": "", + "attr_len": "" + }, + { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x22", + "attr_devname": "GPIO8", + "attr_devtype": "gpio", + "attr_offset": "0xb", + "attr_mask": "", + "attr_cmpval": "", + "attr_len": "" + }, + { + "attr_name": "xcvr_lpmode", + "attr_devaddr": "0x20", + "attr_devname": "GPIO6", + "attr_devtype": "gpio", + "attr_offset": "0xb", + "attr_mask": "", + "attr_cmpval": "", + "attr_len": "" + } + ] + } + }, + "PORT12": { + "dev_info": { + "device_type": "QSFP28", + "device_name": "PORT12", + "device_parent": "MUX3" + }, + "dev_attr": { + "dev_idx": "12" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT12-EEPROM" + }, + { + "itf": "control", + "dev": "PORT12-CTRL" + } + ] + } + }, + "PORT12-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT12-EEPROM", + "device_parent": "MUX3", + "virt_parent": "PORT12" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x13", + "dev_addr": "0x50", + "dev_type": "optoe1" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT12-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT12-CTRL", + "device_parent": "MUX3", + "virt_parent": "PORT12" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x13", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_intr_status", + "attr_devaddr": "0x22", + "attr_devname": "GPIO3", + "attr_devtype": "gpio", + "attr_offset": "0xa", + "attr_mask": "", + "attr_cmpval": "", + "attr_len": "" + }, + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x20", + "attr_devname": "GPIO1", + "attr_devtype": "gpio", + "attr_offset": "0xa", + "attr_mask": "", + "attr_cmpval": "", + "attr_len": "" + }, + { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x22", + "attr_devname": "GPIO8", + "attr_devtype": "gpio", + "attr_offset": "0xa", + "attr_mask": "", + "attr_cmpval": "", + "attr_len": "" + }, + { + "attr_name": "xcvr_lpmode", + "attr_devaddr": "0x20", + "attr_devname": "GPIO6", + "attr_devtype": "gpio", + "attr_offset": "0xa", + "attr_mask": "", + "attr_cmpval": "", + "attr_len": "" + } + ] + } + }, + "PORT13": { + "dev_info": { + "device_type": "QSFP28", + "device_name": "PORT13", + "device_parent": "MUX3" + }, + "dev_attr": { + "dev_idx": "13" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT13-EEPROM" + }, + { + "itf": "control", + "dev": "PORT13-CTRL" + } + ] + } + }, + "PORT13-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT13-EEPROM", + "device_parent": "MUX3", + "virt_parent": "PORT13" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x16", + "dev_addr": "0x50", + "dev_type": "optoe1" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT13-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT13-CTRL", + "device_parent": "MUX3", + "virt_parent": "PORT13" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x16", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_intr_status", + "attr_devaddr": "0x22", + "attr_devname": "GPIO3", + "attr_devtype": "gpio", + "attr_offset": "0xd", + "attr_mask": "", + "attr_cmpval": "", + "attr_len": "" + }, + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x20", + "attr_devname": "GPIO1", + "attr_devtype": "gpio", + "attr_offset": "0xd", + "attr_mask": "", + "attr_cmpval": "", + "attr_len": "" + }, + { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x22", + "attr_devname": "GPIO8", + "attr_devtype": "gpio", + "attr_offset": "0xd", + "attr_mask": "", + "attr_cmpval": "", + "attr_len": "" + }, + { + "attr_name": "xcvr_lpmode", + "attr_devaddr": "0x20", + "attr_devname": "GPIO6", + "attr_devtype": "gpio", + "attr_offset": "0xd", + "attr_mask": "", + "attr_cmpval": "", + "attr_len": "" + } + ] + } + }, + "PORT14": { + "dev_info": { + "device_type": "QSFP28", + "device_name": "PORT14", + "device_parent": "MUX3" + }, + "dev_attr": { + "dev_idx": "14" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT14-EEPROM" + }, + { + "itf": "control", + "dev": "PORT14-CTRL" + } + ] + } + }, + "PORT14-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT14-EEPROM", + "device_parent": "MUX3", + "virt_parent": "PORT14" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x15", + "dev_addr": "0x50", + "dev_type": "optoe1" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT14-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT14-CTRL", + "device_parent": "MUX3", + "virt_parent": "PORT14" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x15", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_intr_status", + "attr_devaddr": "0x22", + "attr_devname": "GPIO3", + "attr_devtype": "gpio", + "attr_offset": "0xc", + "attr_mask": "", + "attr_cmpval": "", + "attr_len": "" + }, + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x20", + "attr_devname": "GPIO1", + "attr_devtype": "gpio", + "attr_offset": "0xc", + "attr_mask": "", + "attr_cmpval": "", + "attr_len": "" + }, + { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x22", + "attr_devname": "GPIO8", + "attr_devtype": "gpio", + "attr_offset": "0xc", + "attr_mask": "", + "attr_cmpval": "", + "attr_len": "" + }, + { + "attr_name": "xcvr_lpmode", + "attr_devaddr": "0x20", + "attr_devname": "GPIO6", + "attr_devtype": "gpio", + "attr_offset": "0xc", + "attr_mask": "", + "attr_cmpval": "", + "attr_len": "" + } + ] + } + }, + "PORT15": { + "dev_info": { + "device_type": "QSFP28", + "device_name": "PORT15", + "device_parent": "MUX3" + }, + "dev_attr": { + "dev_idx": "15" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT15-EEPROM" + }, + { + "itf": "control", + "dev": "PORT15-CTRL" + } + ] + } + }, + "PORT15-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT15-EEPROM", + "device_parent": "MUX3", + "virt_parent": "PORT15" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x18", + "dev_addr": "0x50", + "dev_type": "optoe1" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT15-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT15-CTRL", + "device_parent": "MUX3", + "virt_parent": "PORT15" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x18", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_intr_status", + "attr_devaddr": "0x22", + "attr_devname": "GPIO3", + "attr_devtype": "gpio", + "attr_offset": "0xf", + "attr_mask": "", + "attr_cmpval": "", + "attr_len": "" + }, + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x20", + "attr_devname": "GPIO1", + "attr_devtype": "gpio", + "attr_offset": "0xf", + "attr_mask": "", + "attr_cmpval": "", + "attr_len": "" + }, + { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x22", + "attr_devname": "GPIO8", + "attr_devtype": "gpio", + "attr_offset": "0xf", + "attr_mask": "", + "attr_cmpval": "", + "attr_len": "" + }, + { + "attr_name": "xcvr_lpmode", + "attr_devaddr": "0x20", + "attr_devname": "GPIO6", + "attr_devtype": "gpio", + "attr_offset": "0xf", + "attr_mask": "", + "attr_cmpval": "", + "attr_len": "" + } + ] + } + }, + "PORT16": { + "dev_info": { + "device_type": "QSFP28", + "device_name": "PORT16", + "device_parent": "MUX3" + }, + "dev_attr": { + "dev_idx": "16" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT16-EEPROM" + }, + { + "itf": "control", + "dev": "PORT16-CTRL" + } + ] + } + }, + "PORT16-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT16-EEPROM", + "device_parent": "MUX3", + "virt_parent": "PORT16" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x17", + "dev_addr": "0x50", + "dev_type": "optoe1" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT16-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT16-CTRL", + "device_parent": "MUX3", + "virt_parent": "PORT16" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x17", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_intr_status", + "attr_devaddr": "0x22", + "attr_devname": "GPIO3", + "attr_devtype": "gpio", + "attr_offset": "0xe", + "attr_mask": "", + "attr_cmpval": "", + "attr_len": "" + }, + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x20", + "attr_devname": "GPIO1", + "attr_devtype": "gpio", + "attr_offset": "0xe", + "attr_mask": "", + "attr_cmpval": "", + "attr_len": "" + }, + { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x22", + "attr_devname": "GPIO8", + "attr_devtype": "gpio", + "attr_offset": "0xe", + "attr_mask": "", + "attr_cmpval": "", + "attr_len": "" + }, + { + "attr_name": "xcvr_lpmode", + "attr_devaddr": "0x20", + "attr_devname": "GPIO6", + "attr_devtype": "gpio", + "attr_offset": "0xe", + "attr_mask": "", + "attr_cmpval": "", + "attr_len": "" + } + ] + } + }, + "PORT17": { + "dev_info": { + "device_type": "QSFP28", + "device_name": "PORT17", + "device_parent": "MUX4" + }, + "dev_attr": { + "dev_idx": "17" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT17-EEPROM" + }, + { + "itf": "control", + "dev": "PORT17-CTRL" + } + ] + } + }, + "PORT17-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT17-EEPROM", + "device_parent": "MUX4", + "virt_parent": "PORT17" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x1a", + "dev_addr": "0x50", + "dev_type": "optoe1" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT17-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT17-CTRL", + "device_parent": "MUX4", + "virt_parent": "PORT17" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x1a", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_intr_status", + "attr_devaddr": "0x23", + "attr_devname": "GPIO4", + "attr_devtype": "gpio", + "attr_offset": "0x1", + "attr_mask": "", + "attr_cmpval": "", + "attr_len": "" + }, + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x21", + "attr_devname": "GPIO2", + "attr_devtype": "gpio", + "attr_offset": "0x1", + "attr_mask": "", + "attr_cmpval": "", + "attr_len": "" + }, + { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x23", + "attr_devname": "GPIO9", + "attr_devtype": "gpio", + "attr_offset": "0x1", + "attr_mask": "", + "attr_cmpval": "", + "attr_len": "" + }, + { + "attr_name": "xcvr_lpmode", + "attr_devaddr": "0x21", + "attr_devname": "GPIO7", + "attr_devtype": "gpio", + "attr_offset": "0x1", + "attr_mask": "", + "attr_cmpval": "", + "attr_len": "" + } + ] + } + }, + "PORT18": { + "dev_info": { + "device_type": "QSFP28", + "device_name": "PORT18", + "device_parent": "MUX4" + }, + "dev_attr": { + "dev_idx": "18" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT18-EEPROM" + }, + { + "itf": "control", + "dev": "PORT18-CTRL" + } + ] + } + }, + "PORT18-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT18-EEPROM", + "device_parent": "MUX4", + "virt_parent": "PORT18" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x19", + "dev_addr": "0x50", + "dev_type": "optoe1" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT18-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT18-CTRL", + "device_parent": "MUX4", + "virt_parent": "PORT18" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x19", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_intr_status", + "attr_devaddr": "0x23", + "attr_devname": "GPIO4", + "attr_devtype": "gpio", + "attr_offset": "0x0", + "attr_mask": "", + "attr_cmpval": "", + "attr_len": "" + }, + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x21", + "attr_devname": "GPIO2", + "attr_devtype": "gpio", + "attr_offset": "0x0", + "attr_mask": "", + "attr_cmpval": "", + "attr_len": "" + }, + { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x23", + "attr_devname": "GPIO9", + "attr_devtype": "gpio", + "attr_offset": "0x0", + "attr_mask": "", + "attr_cmpval": "", + "attr_len": "" + }, + { + "attr_name": "xcvr_lpmode", + "attr_devaddr": "0x21", + "attr_devname": "GPIO7", + "attr_devtype": "gpio", + "attr_offset": "0x0", + "attr_mask": "", + "attr_cmpval": "", + "attr_len": "" + } + ] + } + }, + "PORT19": { + "dev_info": { + "device_type": "QSFP28", + "device_name": "PORT19", + "device_parent": "MUX4" + }, + "dev_attr": { + "dev_idx": "19" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT19-EEPROM" + }, + { + "itf": "control", + "dev": "PORT19-CTRL" + } + ] + } + }, + "PORT19-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT19-EEPROM", + "device_parent": "MUX4", + "virt_parent": "PORT19" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x1c", + "dev_addr": "0x50", + "dev_type": "optoe1" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT19-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT19-CTRL", + "device_parent": "MUX4", + "virt_parent": "PORT19" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x1c", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_intr_status", + "attr_devaddr": "0x23", + "attr_devname": "GPIO4", + "attr_devtype": "gpio", + "attr_offset": "0x3", + "attr_mask": "", + "attr_cmpval": "", + "attr_len": "" + }, + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x21", + "attr_devname": "GPIO2", + "attr_devtype": "gpio", + "attr_offset": "0x3", + "attr_mask": "", + "attr_cmpval": "", + "attr_len": "" + }, + { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x23", + "attr_devname": "GPIO9", + "attr_devtype": "gpio", + "attr_offset": "0x3", + "attr_mask": "", + "attr_cmpval": "", + "attr_len": "" + }, + { + "attr_name": "xcvr_lpmode", + "attr_devaddr": "0x21", + "attr_devname": "GPIO7", + "attr_devtype": "gpio", + "attr_offset": "0x3", + "attr_mask": "", + "attr_cmpval": "", + "attr_len": "" + } + ] + } + }, + "PORT20": { + "dev_info": { + "device_type": "QSFP28", + "device_name": "PORT20", + "device_parent": "MUX4" + }, + "dev_attr": { + "dev_idx": "20" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT20-EEPROM" + }, + { + "itf": "control", + "dev": "PORT20-CTRL" + } + ] + } + }, + "PORT20-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT20-EEPROM", + "device_parent": "MUX4", + "virt_parent": "PORT20" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x1b", + "dev_addr": "0x50", + "dev_type": "optoe1" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT20-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT20-CTRL", + "device_parent": "MUX4", + "virt_parent": "PORT20" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x1b", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_intr_status", + "attr_devaddr": "0x23", + "attr_devname": "GPIO4", + "attr_devtype": "gpio", + "attr_offset": "0x2", + "attr_mask": "", + "attr_cmpval": "", + "attr_len": "" + }, + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x21", + "attr_devname": "GPIO2", + "attr_devtype": "gpio", + "attr_offset": "0x2", + "attr_mask": "", + "attr_cmpval": "", + "attr_len": "" + }, + { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x23", + "attr_devname": "GPIO9", + "attr_devtype": "gpio", + "attr_offset": "0x2", + "attr_mask": "", + "attr_cmpval": "", + "attr_len": "" + }, + { + "attr_name": "xcvr_lpmode", + "attr_devaddr": "0x21", + "attr_devname": "GPIO7", + "attr_devtype": "gpio", + "attr_offset": "0x2", + "attr_mask": "", + "attr_cmpval": "", + "attr_len": "" + } + ] + } + }, + "PORT21": { + "dev_info": { + "device_type": "QSFP28", + "device_name": "PORT21", + "device_parent": "MUX4" + }, + "dev_attr": { + "dev_idx": "21" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT21-EEPROM" + }, + { + "itf": "control", + "dev": "PORT21-CTRL" + } + ] + } + }, + "PORT21-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT21-EEPROM", + "device_parent": "MUX4", + "virt_parent": "PORT21" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x1e", + "dev_addr": "0x50", + "dev_type": "optoe1" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT21-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT21-CTRL", + "device_parent": "MUX4", + "virt_parent": "PORT21" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x1e", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_intr_status", + "attr_devaddr": "0x23", + "attr_devname": "GPIO4", + "attr_devtype": "gpio", + "attr_offset": "0x5", + "attr_mask": "", + "attr_cmpval": "", + "attr_len": "" + }, + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x21", + "attr_devname": "GPIO2", + "attr_devtype": "gpio", + "attr_offset": "0x5", + "attr_mask": "", + "attr_cmpval": "", + "attr_len": "" + }, + { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x23", + "attr_devname": "GPIO9", + "attr_devtype": "gpio", + "attr_offset": "0x5", + "attr_mask": "", + "attr_cmpval": "", + "attr_len": "" + }, + { + "attr_name": "xcvr_lpmode", + "attr_devaddr": "0x21", + "attr_devname": "GPIO7", + "attr_devtype": "gpio", + "attr_offset": "0x5", + "attr_mask": "", + "attr_cmpval": "", + "attr_len": "" + } + ] + } + }, + "PORT22": { + "dev_info": { + "device_type": "QSFP28", + "device_name": "PORT22", + "device_parent": "MUX4" + }, + "dev_attr": { + "dev_idx": "22" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT22-EEPROM" + }, + { + "itf": "control", + "dev": "PORT22-CTRL" + } + ] + } + }, + "PORT22-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT22-EEPROM", + "device_parent": "MUX4", + "virt_parent": "PORT22" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x1d", + "dev_addr": "0x50", + "dev_type": "optoe1" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT22-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT22-CTRL", + "device_parent": "MUX4", + "virt_parent": "PORT22" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x1d", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_intr_status", + "attr_devaddr": "0x23", + "attr_devname": "GPIO4", + "attr_devtype": "gpio", + "attr_offset": "0x4", + "attr_mask": "", + "attr_cmpval": "", + "attr_len": "" + }, + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x21", + "attr_devname": "GPIO2", + "attr_devtype": "gpio", + "attr_offset": "0x4", + "attr_mask": "", + "attr_cmpval": "", + "attr_len": "" + }, + { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x23", + "attr_devname": "GPIO9", + "attr_devtype": "gpio", + "attr_offset": "0x4", + "attr_mask": "", + "attr_cmpval": "", + "attr_len": "" + }, + { + "attr_name": "xcvr_lpmode", + "attr_devaddr": "0x21", + "attr_devname": "GPIO7", + "attr_devtype": "gpio", + "attr_offset": "0x4", + "attr_mask": "", + "attr_cmpval": "", + "attr_len": "" + } + ] + } + }, + "PORT23": { + "dev_info": { + "device_type": "QSFP28", + "device_name": "PORT23", + "device_parent": "MUX4" + }, + "dev_attr": { + "dev_idx": "23" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT23-EEPROM" + }, + { + "itf": "control", + "dev": "PORT23-CTRL" + } + ] + } + }, + "PORT23-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT23-EEPROM", + "device_parent": "MUX4", + "virt_parent": "PORT23" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x20", + "dev_addr": "0x50", + "dev_type": "optoe1" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT23-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT23-CTRL", + "device_parent": "MUX4", + "virt_parent": "PORT23" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x20", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_intr_status", + "attr_devaddr": "0x23", + "attr_devname": "GPIO4", + "attr_devtype": "gpio", + "attr_offset": "0x7", + "attr_mask": "", + "attr_cmpval": "", + "attr_len": "" + }, + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x21", + "attr_devname": "GPIO2", + "attr_devtype": "gpio", + "attr_offset": "0x7", + "attr_mask": "", + "attr_cmpval": "", + "attr_len": "" + }, + { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x23", + "attr_devname": "GPIO9", + "attr_devtype": "gpio", + "attr_offset": "0x7", + "attr_mask": "", + "attr_cmpval": "", + "attr_len": "" + }, + { + "attr_name": "xcvr_lpmode", + "attr_devaddr": "0x21", + "attr_devname": "GPIO7", + "attr_devtype": "gpio", + "attr_offset": "0x7", + "attr_mask": "", + "attr_cmpval": "", + "attr_len": "" + } + ] + } + }, + "PORT24": { + "dev_info": { + "device_type": "QSFP28", + "device_name": "PORT24", + "device_parent": "MUX4" + }, + "dev_attr": { + "dev_idx": "24" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT24-EEPROM" + }, + { + "itf": "control", + "dev": "PORT24-CTRL" + } + ] + } + }, + "PORT24-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT24-EEPROM", + "device_parent": "MUX4", + "virt_parent": "PORT24" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x1f", + "dev_addr": "0x50", + "dev_type": "optoe1" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT24-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT24-CTRL", + "device_parent": "MUX4", + "virt_parent": "PORT24" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x1f", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_intr_status", + "attr_devaddr": "0x23", + "attr_devname": "GPIO4", + "attr_devtype": "gpio", + "attr_offset": "0x6", + "attr_mask": "", + "attr_cmpval": "", + "attr_len": "" + }, + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x21", + "attr_devname": "GPIO2", + "attr_devtype": "gpio", + "attr_offset": "0x6", + "attr_mask": "", + "attr_cmpval": "", + "attr_len": "" + }, + { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x23", + "attr_devname": "GPIO9", + "attr_devtype": "gpio", + "attr_offset": "0x6", + "attr_mask": "", + "attr_cmpval": "", + "attr_len": "" + }, + { + "attr_name": "xcvr_lpmode", + "attr_devaddr": "0x21", + "attr_devname": "GPIO7", + "attr_devtype": "gpio", + "attr_offset": "0x6", + "attr_mask": "", + "attr_cmpval": "", + "attr_len": "" + } + ] + } + }, + "PORT25": { + "dev_info": { + "device_type": "QSFP28", + "device_name": "PORT25", + "device_parent": "MUX5" + }, + "dev_attr": { + "dev_idx": "25" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT25-EEPROM" + }, + { + "itf": "control", + "dev": "PORT25-CTRL" + } + ] + } + }, + "PORT25-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT25-EEPROM", + "device_parent": "MUX5", + "virt_parent": "PORT25" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x22", + "dev_addr": "0x50", + "dev_type": "optoe1" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT25-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT25-CTRL", + "device_parent": "MUX5", + "virt_parent": "PORT25" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x22", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_intr_status", + "attr_devaddr": "0x23", + "attr_devname": "GPIO4", + "attr_devtype": "gpio", + "attr_offset": "0x9", + "attr_mask": "", + "attr_cmpval": "", + "attr_len": "" + }, + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x21", + "attr_devname": "GPIO2", + "attr_devtype": "gpio", + "attr_offset": "0x9", + "attr_mask": "", + "attr_cmpval": "", + "attr_len": "" + }, + { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x23", + "attr_devname": "GPIO9", + "attr_devtype": "gpio", + "attr_offset": "0x9", + "attr_mask": "", + "attr_cmpval": "", + "attr_len": "" + }, + { + "attr_name": "xcvr_lpmode", + "attr_devaddr": "0x21", + "attr_devname": "GPIO7", + "attr_devtype": "gpio", + "attr_offset": "0x9", + "attr_mask": "", + "attr_cmpval": "", + "attr_len": "" + } + ] + } + }, + "PORT26": { + "dev_info": { + "device_type": "QSFP28", + "device_name": "PORT26", + "device_parent": "MUX5" + }, + "dev_attr": { + "dev_idx": "26" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT26-EEPROM" + }, + { + "itf": "control", + "dev": "PORT26-CTRL" + } + ] + } + }, + "PORT26-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT26-EEPROM", + "device_parent": "MUX5", + "virt_parent": "PORT26" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x21", + "dev_addr": "0x50", + "dev_type": "optoe1" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT26-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT26-CTRL", + "device_parent": "MUX5", + "virt_parent": "PORT26" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x21", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_intr_status", + "attr_devaddr": "0x23", + "attr_devname": "GPIO4", + "attr_devtype": "gpio", + "attr_offset": "0x8", + "attr_mask": "", + "attr_cmpval": "", + "attr_len": "" + }, + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x21", + "attr_devname": "GPIO2", + "attr_devtype": "gpio", + "attr_offset": "0x8", + "attr_mask": "", + "attr_cmpval": "", + "attr_len": "" + }, + { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x23", + "attr_devname": "GPIO9", + "attr_devtype": "gpio", + "attr_offset": "0x8", + "attr_mask": "", + "attr_cmpval": "", + "attr_len": "" + }, + { + "attr_name": "xcvr_lpmode", + "attr_devaddr": "0x21", + "attr_devname": "GPIO7", + "attr_devtype": "gpio", + "attr_offset": "0x8", + "attr_mask": "", + "attr_cmpval": "", + "attr_len": "" + } + ] + } + }, + "PORT27": { + "dev_info": { + "device_type": "QSFP28", + "device_name": "PORT27", + "device_parent": "MUX5" + }, + "dev_attr": { + "dev_idx": "27" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT27-EEPROM" + }, + { + "itf": "control", + "dev": "PORT27-CTRL" + } + ] + } + }, + "PORT27-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT27-EEPROM", + "device_parent": "MUX5", + "virt_parent": "PORT27" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x24", + "dev_addr": "0x50", + "dev_type": "optoe1" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT27-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT27-CTRL", + "device_parent": "MUX5", + "virt_parent": "PORT27" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x24", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_intr_status", + "attr_devaddr": "0x23", + "attr_devname": "GPIO4", + "attr_devtype": "gpio", + "attr_offset": "0xb", + "attr_mask": "", + "attr_cmpval": "", + "attr_len": "" + }, + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x21", + "attr_devname": "GPIO2", + "attr_devtype": "gpio", + "attr_offset": "0xb", + "attr_mask": "", + "attr_cmpval": "", + "attr_len": "" + }, + { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x23", + "attr_devname": "GPIO9", + "attr_devtype": "gpio", + "attr_offset": "0xb", + "attr_mask": "", + "attr_cmpval": "", + "attr_len": "" + }, + { + "attr_name": "xcvr_lpmode", + "attr_devaddr": "0x21", + "attr_devname": "GPIO7", + "attr_devtype": "gpio", + "attr_offset": "0xb", + "attr_mask": "", + "attr_cmpval": "", + "attr_len": "" + } + ] + } + }, + "PORT28": { + "dev_info": { + "device_type": "QSFP28", + "device_name": "PORT28", + "device_parent": "MUX5" + }, + "dev_attr": { + "dev_idx": "28" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT28-EEPROM" + }, + { + "itf": "control", + "dev": "PORT28-CTRL" + } + ] + } + }, + "PORT28-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT28-EEPROM", + "device_parent": "MUX5", + "virt_parent": "PORT28" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x23", + "dev_addr": "0x50", + "dev_type": "optoe1" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT28-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT28-CTRL", + "device_parent": "MUX5", + "virt_parent": "PORT28" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x23", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_intr_status", + "attr_devaddr": "0x23", + "attr_devname": "GPIO4", + "attr_devtype": "gpio", + "attr_offset": "0xa", + "attr_mask": "", + "attr_cmpval": "", + "attr_len": "" + }, + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x21", + "attr_devname": "GPIO2", + "attr_devtype": "gpio", + "attr_offset": "0xa", + "attr_mask": "", + "attr_cmpval": "", + "attr_len": "" + }, + { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x23", + "attr_devname": "GPIO9", + "attr_devtype": "gpio", + "attr_offset": "0xa", + "attr_mask": "", + "attr_cmpval": "", + "attr_len": "" + }, + { + "attr_name": "xcvr_lpmode", + "attr_devaddr": "0x21", + "attr_devname": "GPIO7", + "attr_devtype": "gpio", + "attr_offset": "0xa", + "attr_mask": "", + "attr_cmpval": "", + "attr_len": "" + } + ] + } + }, + "PORT29": { + "dev_info": { + "device_type": "QSFP28", + "device_name": "PORT29", + "device_parent": "MUX5" + }, + "dev_attr": { + "dev_idx": "29" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT29-EEPROM" + }, + { + "itf": "control", + "dev": "PORT29-CTRL" + } + ] + } + }, + "PORT29-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT29-EEPROM", + "device_parent": "MUX5", + "virt_parent": "PORT29" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x26", + "dev_addr": "0x50", + "dev_type": "optoe1" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT29-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT29-CTRL", + "device_parent": "MUX5", + "virt_parent": "PORT29" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x26", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_intr_status", + "attr_devaddr": "0x23", + "attr_devname": "GPIO4", + "attr_devtype": "gpio", + "attr_offset": "0xd", + "attr_mask": "", + "attr_cmpval": "", + "attr_len": "" + }, + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x21", + "attr_devname": "GPIO2", + "attr_devtype": "gpio", + "attr_offset": "0xd", + "attr_mask": "", + "attr_cmpval": "", + "attr_len": "" + }, + { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x23", + "attr_devname": "GPIO9", + "attr_devtype": "gpio", + "attr_offset": "0xd", + "attr_mask": "", + "attr_cmpval": "", + "attr_len": "" + }, + { + "attr_name": "xcvr_lpmode", + "attr_devaddr": "0x21", + "attr_devname": "GPIO7", + "attr_devtype": "gpio", + "attr_offset": "0xd", + "attr_mask": "", + "attr_cmpval": "", + "attr_len": "" + } + ] + } + }, + "PORT30": { + "dev_info": { + "device_type": "QSFP28", + "device_name": "PORT30", + "device_parent": "MUX5" + }, + "dev_attr": { + "dev_idx": "30" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT30-EEPROM" + }, + { + "itf": "control", + "dev": "PORT30-CTRL" + } + ] + } + }, + "PORT30-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT30-EEPROM", + "device_parent": "MUX5", + "virt_parent": "PORT30" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x25", + "dev_addr": "0x50", + "dev_type": "optoe1" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT30-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT30-CTRL", + "device_parent": "MUX5", + "virt_parent": "PORT30" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x25", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_intr_status", + "attr_devaddr": "0x23", + "attr_devname": "GPIO4", + "attr_devtype": "gpio", + "attr_offset": "0xc", + "attr_mask": "", + "attr_cmpval": "", + "attr_len": "" + }, + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x21", + "attr_devname": "GPIO2", + "attr_devtype": "gpio", + "attr_offset": "0xc", + "attr_mask": "", + "attr_cmpval": "", + "attr_len": "" + }, + { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x23", + "attr_devname": "GPIO9", + "attr_devtype": "gpio", + "attr_offset": "0xc", + "attr_mask": "", + "attr_cmpval": "", + "attr_len": "" + }, + { + "attr_name": "xcvr_lpmode", + "attr_devaddr": "0x21", + "attr_devname": "GPIO7", + "attr_devtype": "gpio", + "attr_offset": "0xc", + "attr_mask": "", + "attr_cmpval": "", + "attr_len": "" + } + ] + } + }, + "PORT31": { + "dev_info": { + "device_type": "QSFP28", + "device_name": "PORT31", + "device_parent": "MUX5" + }, + "dev_attr": { + "dev_idx": "31" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT31-EEPROM" + }, + { + "itf": "control", + "dev": "PORT31-CTRL" + } + ] + } + }, + "PORT31-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT31-EEPROM", + "device_parent": "MUX5", + "virt_parent": "PORT31" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x28", + "dev_addr": "0x50", + "dev_type": "optoe1" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT31-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT31-CTRL", + "device_parent": "MUX5", + "virt_parent": "PORT31" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x28", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_intr_status", + "attr_devaddr": "0x23", + "attr_devname": "GPIO4", + "attr_devtype": "gpio", + "attr_offset": "0xf", + "attr_mask": "", + "attr_cmpval": "", + "attr_len": "" + }, + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x21", + "attr_devname": "GPIO2", + "attr_devtype": "gpio", + "attr_offset": "0xf", + "attr_mask": "", + "attr_cmpval": "", + "attr_len": "" + }, + { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x23", + "attr_devname": "GPIO9", + "attr_devtype": "gpio", + "attr_offset": "0xf", + "attr_mask": "", + "attr_cmpval": "", + "attr_len": "" + }, + { + "attr_name": "xcvr_lpmode", + "attr_devaddr": "0x21", + "attr_devname": "GPIO7", + "attr_devtype": "gpio", + "attr_offset": "0xf", + "attr_mask": "", + "attr_cmpval": "", + "attr_len": "" + } + ] + } + }, + "PORT32": { + "dev_info": { + "device_type": "QSFP28", + "device_name": "PORT32", + "device_parent": "MUX5" + }, + "dev_attr": { + "dev_idx": "32" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT32-EEPROM" + }, + { + "itf": "control", + "dev": "PORT32-CTRL" + } + ] + } + }, + "PORT32-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT32-EEPROM", + "device_parent": "MUX5", + "virt_parent": "PORT32" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x27", + "dev_addr": "0x50", + "dev_type": "optoe1" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT32-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT32-CTRL", + "device_parent": "MUX5", + "virt_parent": "PORT32" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x27", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_intr_status", + "attr_devaddr": "0x23", + "attr_devname": "GPIO4", + "attr_devtype": "gpio", + "attr_offset": "0xe", + "attr_mask": "", + "attr_cmpval": "", + "attr_len": "" + }, + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x21", + "attr_devname": "GPIO2", + "attr_devtype": "gpio", + "attr_offset": "0xe", + "attr_mask": "", + "attr_cmpval": "", + "attr_len": "" + }, + { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x23", + "attr_devname": "GPIO9", + "attr_devtype": "gpio", + "attr_offset": "0xe", + "attr_mask": "", + "attr_cmpval": "", + "attr_len": "" + }, + { + "attr_name": "xcvr_lpmode", + "attr_devaddr": "0x21", + "attr_devname": "GPIO7", + "attr_devtype": "gpio", + "attr_offset": "0xe", + "attr_mask": "", + "attr_cmpval": "", + "attr_len": "" + } + ] + } + }, + + "PORT33": { + "dev_info": { + "device_type": "SFP", + "device_name": "PORT33", + "device_parent": "MUX6" + }, + "dev_attr": { + "dev_idx": "33" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT33-EEPROM" + }, + { + "itf": "control", + "dev": "PORT33-CTRL" + } + ] + } + }, + "PORT33-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT33", + "device_parent": "MUX6", + "virt_parent": "PORT33" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x2d", + "dev_addr": "0x50", + "dev_type": "optoe1" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT33-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT33-CTRL", + "device_parent": "MUX6", + "virt_parent": "PORT33" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x2d", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x27", + "attr_devname": "GPIO5", + "attr_devtype": "gpio", + "attr_offset": "0x0", + "attr_mask": "", + "attr_cmpval": "", + "attr_len": "" + }, + { + "attr_name": "xcvr_rxlos", + "attr_devaddr": "0x27", + "attr_devname": "GPIO5", + "attr_devtype": "gpio", + "attr_offset": "0x6", + "attr_mask": "", + "attr_cmpval": "", + "attr_len": "" + }, + { + "attr_name": "xcvr_txfault", + "attr_devaddr": "0x27", + "attr_devname": "GPIO5", + "attr_devtype": "gpio", + "attr_offset": "0x2", + "attr_mask": "", + "attr_cmpval": "", + "attr_len": "" + }, + { + "attr_name": "xcvr_txdisable", + "attr_devaddr": "0x27", + "attr_devname": "GPIO5", + "attr_devtype": "gpio", + "attr_offset": "0x4", + "attr_mask": "", + "attr_cmpval": "", + "attr_len": "" + } + ] + } + }, + "PORT34": { + "dev_info": { + "device_type": "SFP", + "device_name": "PORT34", + "device_parent": "MUX6" + }, + "dev_attr": { + "dev_idx": "34" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT34-EEPROM" + }, + { + "itf": "control", + "dev": "PORT34-CTRL" + } + ] + } + }, + "PORT34-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT34", + "device_parent": "MUX6", + "virt_parent": "PORT34" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x2e", + "dev_addr": "0x50", + "dev_type": "optoe1" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT34-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT34-CTRL", + "device_parent": "MUX6", + "virt_parent": "PORT34" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x2e", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x27", + "attr_devname": "GPIO5", + "attr_devtype": "gpio", + "attr_offset": "0x1", + "attr_mask": "", + "attr_cmpval": "", + "attr_len": "" + }, + { + "attr_name": "xcvr_rxlos", + "attr_devaddr": "0x27", + "attr_devname": "GPIO5", + "attr_devtype": "gpio", + "attr_offset": "0x7", + "attr_mask": "", + "attr_cmpval": "", + "attr_len": "" + }, + { + "attr_name": "xcvr_txfault", + "attr_devaddr": "0x27", + "attr_devname": "GPIO5", + "attr_devtype": "gpio", + "attr_offset": "0x3", + "attr_mask": "", + "attr_cmpval": "", + "attr_len": "" + }, + { + "attr_name": "xcvr_txdisable", + "attr_devaddr": "0x27", + "attr_devname": "GPIO5", + "attr_devtype": "gpio", + "attr_offset": "0x5", + "attr_mask": "", + "attr_cmpval": "", + "attr_len": "" + } + ] + } + } +} diff --git a/device/ufispace/x86_64-ufispace_s9180_32x-r0/pddf_support b/device/ufispace/x86_64-ufispace_s9180_32x-r0/pddf_support new file mode 100644 index 0000000000..e69de29bb2 diff --git a/device/ufispace/x86_64-ufispace_s9180_32x-r0/platform.json b/device/ufispace/x86_64-ufispace_s9180_32x-r0/platform.json new file mode 100644 index 0000000000..b21674f59f --- /dev/null +++ b/device/ufispace/x86_64-ufispace_s9180_32x-r0/platform.json @@ -0,0 +1,547 @@ +{ + "chassis": { + "name": "S9180-32X", + "components": [ + { + "name": "CPLD1" + }, + { + "name": "BIOS" + }, + { + "name": "BMC" + } + ], + "fans": [ + { + "name": "Fantray1_1" + }, + { + "name": "Fantray1_2" + }, + { + "name": "Fantray2_1" + }, + { + "name": "Fantray2_2" + }, + { + "name": "Fantray3_1" + }, + { + "name": "Fantray3_2" + }, + { + "name": "Fantray4_1" + }, + { + "name": "Fantray4_2" + } + ], + "fan_drawers":[ + { + "name": "Fantray1", + "num_fans" : 2, + "fans": [ + { + "name": "Fantray1_1" + }, + { + "name": "Fantray1_2" + } + ] + }, + { + "name": "Fantray2", + "num_fans" : 2, + "fans": [ + { + "name": "Fantray2_1" + }, + { + "name": "Fantray2_2" + } + ] + }, + { + "name": "Fantray3", + "num_fans" : 2, + "fans": [ + { + "name": "Fantray3_1" + }, + { + "name": "Fantray3_2" + } + ] + }, + { + "name": "Fantray4", + "num_fans" : 2, + "fans": [ + { + "name": "Fantray4_1" + }, + { + "name": "Fantray4_2" + } + ] + } + ], + "psus": [ + { + "name": "PSU1", + "fans": [ + { + "name": "PSU1_FAN1" + } + ], + "thermals": [ + { + "name": "PSU1_TEMP1" + } + ] + }, + { + "name": "PSU2", + "fans": [ + { + "name": "PSU2_FAN1" + } + ], + "thermals": [ + { + "name": "PSU2_TEMP1" + } + ] + } + ], + "thermals": [ + { + "name": "Temp_CPU_BOARD" + }, + { + "name": "Temp_BMC" + }, + { + "name": "Temp_MAC" + }, + { + "name": "Temp_MAC_Front" + }, + { + "name": "Temp_MAC_Rear" + } + ], + "sfps": [ + { + "name": "Ethernet0" + }, + { + "name": "Ethernet4" + }, + { + "name": "Ethernet8" + }, + { + "name": "Ethernet12" + }, + { + "name": "Ethernet16" + }, + { + "name": "Ethernet20" + }, + { + "name": "Ethernet24" + }, + { + "name": "Ethernet28" + }, + { + "name": "Ethernet32" + }, + { + "name": "Ethernet36" + }, + { + "name": "Ethernet40" + }, + { + "name": "Ethernet44" + }, + { + "name": "Ethernet48" + }, + { + "name": "Ethernet52" + }, + { + "name": "Ethernet56" + }, + { + "name": "Ethernet60" + }, + { + "name": "Ethernet64" + }, + { + "name": "Ethernet68" + }, + { + "name": "Ethernet72" + }, + { + "name": "Ethernet76" + }, + { + "name": "Ethernet80" + }, + { + "name": "Ethernet84" + }, + { + "name": "Ethernet88" + }, + { + "name": "Ethernet92" + }, + { + "name": "Ethernet96" + }, + { + "name": "Ethernet100" + }, + { + "name": "Ethernet104" + }, + { + "name": "Ethernet108" + }, + { + "name": "Ethernet112" + }, + { + "name": "Ethernet116" + }, + { + "name": "Ethernet120" + }, + { + "name": "Ethernet124" + }, + { + "name": "Ethernet128" + }, + { + "name": "Ethernet129" + } + ] + }, + "interfaces": { + "Ethernet0": { + "index": "0,0,0,0", + "lanes": "1,2,3,4", + "breakout_modes": { + "1x100G": ["Eth0(Port0)"], + "4x25G": ["Eth0/1(Port0)", "Eth0/2(Port0)", "Eth0/3(Port0)", "Eth0/4(Port0)"] + } + }, + + "Ethernet4": { + "index": "1,1,1,1", + "lanes": "5,6,7,8", + "breakout_modes": { + "1x100G": ["Eth1(Port1)"], + "4x25G": ["Eth1/1(Port1)", "Eth1/2(Port1)", "Eth1/3(Port1)", "Eth1/4(Port1)"] + } + }, + + "Ethernet8": { + "index": "2,2,2,2", + "lanes": "9,10,11,12", + "breakout_modes": { + "1x100G": ["Eth2(Port2)"], + "4x25G": ["Eth2/1(Port2)", "Eth2/2(Port2)", "Eth2/3(Port2)", "Eth2/4(Port2)"] + } + }, + + "Ethernet12": { + "index": "3,3,3,3", + "lanes": "13,14,15,16", + "breakout_modes": { + "1x100G": ["Eth3(Port3)"], + "4x25G": ["Eth3/1(Port3)", "Eth3/2(Port3)", "Eth3/3(Port3)", "Eth3/4(Port3)"] + } + }, + + "Ethernet16": { + "index": "4,4,4,4", + "lanes": "17,18,19,20", + "breakout_modes": { + "1x100G": ["Eth4(Port4)"], + "4x25G": ["Eth4/1(Port4)", "Eth4/2(Port4)", "Eth4/3(Port4)", "Eth4/4(Port4)"] + } + }, + + "Ethernet20": { + "index": "5,5,5,5", + "lanes": ",21,22,23,24", + "breakout_modes": { + "1x100G": ["Eth5(Port5)"], + "4x25G": ["Eth5/1(Port5)", "Eth5/2(Port5)", "Eth5/3(Port5)", "Eth5/4(Port5)"] + } + }, + + "Ethernet24": { + "index": "6,6,6,6", + "lanes": "25,26,27,28", + "breakout_modes": { + "1x100G": ["Eth6(Port6)"], + "4x25G": ["Eth6/1(Port6)", "Eth6/2(Port6)", "Eth6/3(Port6)", "Eth6/4(Port6)"] + } + }, + + "Ethernet28": { + "index": "7,7,7,7", + "lanes": "29,30,31,32", + "breakout_modes": { + "1x100G": ["Eth7(Port7)"], + "4x25G": ["Eth7/1(Port7)", "Eth7/2(Port7)", "Eth7/3(Port7)", "Eth7/4(Port7)"] + } + }, + + "Ethernet32": { + "index": "8,8,8,8", + "lanes": "33,34,35,36", + "breakout_modes": { + "1x100G": ["Eth8(Port8)"], + "4x25G": ["Eth8/1(Port8)", "Eth8/2(Port8)", "Eth8/3(Port8)", "Eth8/4(Port8)"] + } + }, + + "Ethernet36": { + "index": "9,9,9,9", + "lanes": "37,38,39,40", + "breakout_modes": { + "1x100G": ["Eth9(Port9)"], + "4x25G": ["Eth9/1(Port9)", "Eth9/2(Port9)", "Eth9/3(Port9)", "Eth9/4(Port9)"] + } + }, + + "Ethernet40": { + "index": "10,10,10,10", + "lanes": "41,42,43,44", + "breakout_modes": { + "1x100G": ["Eth10(Port10)"], + "4x25G": ["Eth10/1(Port10)", "Eth10/2(Port10)", "Eth10/3(Port10)", "Eth10/4(Port10)"] + } + }, + + "Ethernet44": { + "index": "11,11,11,11", + "lanes": "45,46,47,48", + "breakout_modes": { + "1x100G": ["Eth11(Port11)"], + "4x25G": ["Eth11/1(Port11)", "Eth11/2(Port11)", "Eth11/3(Port11)", "Eth11/4(Port11)"] + } + }, + + "Ethernet48": { + "index": "12,12,12,12", + "lanes": "49,50,51,52", + "breakout_modes": { + "1x100G": ["Eth12(Port12)"], + "4x25G": ["Eth12/1(Port12)", "Eth12/2(Port12)", "Eth12/3(Port12)", "Eth12/4(Port12)"] + } + }, + + "Ethernet52": { + "index": "13,13,13,13", + "lanes": "53,54,55,56", + "breakout_modes": { + "1x100G": ["Eth13(Port13)"], + "4x25G": ["Eth13/1(Port13)", "Eth13/2(Port13)", "Eth13/3(Port13)", "Eth13/4(Port13)"] + } + }, + + "Ethernet56": { + "index": "14,14,14,14", + "lanes": "57,58,59,60", + "breakout_modes": { + "1x100G": ["Eth14(Port14)"], + "4x25G": ["Eth14/1(Port14)", "Eth14/2(Port14)", "Eth14/3(Port14)", "Eth14/4(Port14)"] + } + }, + + "Ethernet60": { + "index": "15,15,15,15", + "lanes": "61,62,63,64", + "breakout_modes": { + "1x100G": ["Eth15(Port15)"], + "4x25G": ["Eth15/1(Port15)", "Eth15/2(Port15)", "Eth15/3(Port15)", "Eth15/4(Port15)"] + } + }, + + "Ethernet64": { + "index": "16,16,16,16", + "lanes": "65,66,67,68", + "breakout_modes": { + "1x100G": ["Eth16(Port16)"], + "4x25G": ["Eth16/1(Port16)", "Eth16/2(Port16)", "Eth16/3(Port16)", "Eth16/4(Port16)"] + } + }, + + "Ethernet68": { + "index": "17,17,17,17", + "lanes": "69,70,71,72", + "breakout_modes": { + "1x100G": ["Eth17(Port17)"], + "4x25G": ["Eth17/1(Port17)", "Eth17/2(Port17)", "Eth17/3(Port17)", "Eth17/4(Port17)"] + } + }, + + "Ethernet72": { + "index": "18,18,18,18", + "lanes": "73,74,75,76", + "breakout_modes": { + "1x100G": ["Eth18(Port18)"], + "4x25G": ["Eth18/1(Port18)", "Eth18/2(Port18)", "Eth18/3(Port18)", "Eth18/4(Port18)"] + } + }, + + "Ethernet76": { + "index": "19,19,19,19", + "lanes": "77,78,79,80", + "breakout_modes": { + "1x100G": ["Eth19(Port19)"], + "4x25G": ["Eth19/1(Port19)", "Eth19/2(Port19)", "Eth19/3(Port19)", "Eth19/4(Port19)"] + } + }, + + "Ethernet80": { + "index": "20,20,20,20", + "lanes": "81,82,83,84", + "breakout_modes": { + "1x100G": ["Eth20(Port20)"], + "4x25G": ["Eth20/1(Port20)", "Eth20/2(Port20)", "Eth20/3(Port20)", "Eth20/4(Port20)"] + } + }, + + "Ethernet84": { + "index": "21,21,21,21", + "lanes": "85,86,87,88", + "breakout_modes": { + "1x100G": ["Eth21(Port21)"], + "4x25G": ["Eth21/1(Port21)", "Eth21/2(Port21)", "Eth21/3(Port21)", "Eth21/4(Port21)"] + } + }, + + "Ethernet88": { + "index": "22,22,22,22", + "lanes": "89,90,91,92", + "breakout_modes": { + "1x100G": ["Eth22(Port22)"], + "4x25G": ["Eth22/1(Port22)", "Eth22/2(Port22)", "Eth22/3(Port22)", "Eth22/4(Port22)"] + } + }, + + "Ethernet92": { + "index": "23,23,23,23", + "lanes": "93,94,95,96", + "breakout_modes": { + "1x100G": ["Eth23(Port23)"], + "4x25G": ["Eth23/1(Port23)", "Eth23/2(Port23)", "Eth23/3(Port23)", "Eth23/4(Port23)"] + } + }, + + "Ethernet96": { + "index": "24,24,24,24", + "lanes": "97,98,99,100", + "breakout_modes": { + "1x100G": ["Eth24(Port24)"], + "4x25G": ["Eth24/1(Port24)", "Eth24/2(Port24)", "Eth24/3(Port24)", "Eth24/4(Port24)"] + } + }, + + "Ethernet100": { + "index": "25,25,25,25", + "lanes": "101,102,103,104", + "breakout_modes": { + "1x100G": ["Eth25(Port25)"], + "4x25G": ["Eth25/1(Port25)", "Eth25/2(Port25)", "Eth25/3(Port25)", "Eth25/4(Port25)"] + } + }, + + "Ethernet104": { + "index": "26,26,26,26", + "lanes": "105,106,107,108", + "breakout_modes": { + "1x100G": ["Eth26(Port26)"], + "4x25G": ["Eth26/1(Port26)", "Eth26/2(Port26)", "Eth26/3(Port26)", "Eth26/4(Port26)"] + } + }, + + "Ethernet108": { + "index": "27,27,27,27", + "lanes": "109,110,111,112", + "breakout_modes": { + "1x100G": ["Eth27(Port27)"], + "4x25G": ["Eth27/1(Port27)", "Eth27/2(Port27)", "Eth27/3(Port27)", "Eth27/4(Port27)"] + } + }, + + "Ethernet112": { + "index": "28,28,28,28", + "lanes": "113,114,115,116", + "breakout_modes": { + "1x100G": ["Eth28(Port28)"], + "4x25G": ["Eth28/1(Port28)", "Eth28/2(Port28)", "Eth28/3(Port28)", "Eth28/4(Port28)"] + } + }, + + "Ethernet116": { + "index": "29,29,29,29", + "lanes": "117,118,119,120", + "breakout_modes": { + "1x100G": ["Eth29(Port29)"], + "4x25G": ["Eth29/1(Port29)", "Eth29/2(Port29)", "Eth29/3(Port29)", "Eth29/4(Port29)"] + } + }, + + "Ethernet120": { + "index": "30,30,30,30", + "lanes": "121,122,123,124", + "breakout_modes": { + "1x100G": ["Eth30(Port30)"], + "4x25G": ["Eth30/1(Port30)", "Eth30/2(Port30)", "Eth30/3(Port30)", "Eth30/4(Port30)"] + } + }, + + "Ethernet124": { + "index": "31,31,31,31", + "lanes": "125,126,127,128", + "breakout_modes": { + "1x100G": ["Eth31(Port31)"], + "4x25G": ["Eth31/1(Port31)", "Eth31/2(Port31)", "Eth31/3(Port31)", "Eth31/4(Port31)"] + } + }, + + "Ethernet128": { + "index": "32", + "lanes": "129", + "breakout_modes": { + "1x10G": ["Eth32(Port32)"] + } + }, + + "Ethernet129": { + "index": "33", + "lanes": "130", + "breakout_modes": { + "1x10G": ["Eth33(Port33)"] + } + } + } +} + diff --git a/device/ufispace/x86_64-ufispace_s9180_32x-r0/platform_asic b/device/ufispace/x86_64-ufispace_s9180_32x-r0/platform_asic new file mode 100644 index 0000000000..88d8811792 --- /dev/null +++ b/device/ufispace/x86_64-ufispace_s9180_32x-r0/platform_asic @@ -0,0 +1 @@ +barefoot diff --git a/device/ufispace/x86_64-ufispace_s9180_32x-r0/pmon_daemon_control.json b/device/ufispace/x86_64-ufispace_s9180_32x-r0/pmon_daemon_control.json new file mode 100644 index 0000000000..e348e0168f --- /dev/null +++ b/device/ufispace/x86_64-ufispace_s9180_32x-r0/pmon_daemon_control.json @@ -0,0 +1,9 @@ +{ + "skip_pcied": false, + "skip_fancontrol": false, + "skip_thermalctld": false, + "skip_ledd": true, + "skip_xcvrd": false, + "skip_psud": false, + "skip_syseepromd": false +} diff --git a/device/ufispace/x86_64-ufispace_s9180_32x-r0/sensors.conf b/device/ufispace/x86_64-ufispace_s9180_32x-r0/sensors.conf new file mode 100644 index 0000000000..7a1c040881 --- /dev/null +++ b/device/ufispace/x86_64-ufispace_s9180_32x-r0/sensors.conf @@ -0,0 +1,9 @@ +# libsensors configuration file + +bus "i2c-0" "I2C I801" +chip "tmp75-i2c-*-4f" + label temp1 "CPU Board Temp" + set temp1_max 70 + set temp1_max_hyst 75 + set temp1_crit 85 + diff --git a/device/ufispace/x86_64-ufispace_s9180_32x-r0/system_health_monitoring_config.json b/device/ufispace/x86_64-ufispace_s9180_32x-r0/system_health_monitoring_config.json new file mode 100644 index 0000000000..6291e81a06 --- /dev/null +++ b/device/ufispace/x86_64-ufispace_s9180_32x-r0/system_health_monitoring_config.json @@ -0,0 +1,15 @@ +{ + "services_to_ignore": [], + "devices_to_ignore": [ + "asic", + "psu", + "fan" + ], + "user_defined_checkers": [], + "polling_interval": 60, + "led_color": { + "fault": "yellow", + "normal": "green", + "booting": "blinking_green" + } +} \ No newline at end of file diff --git a/device/ufispace/x86_64-ufispace_s9300_32d-r0/UFISPACE-S9300-32D/hwsku.json b/device/ufispace/x86_64-ufispace_s9300_32d-r0/UFISPACE-S9300-32D/hwsku.json new file mode 100644 index 0000000000..066985e74d --- /dev/null +++ b/device/ufispace/x86_64-ufispace_s9300_32d-r0/UFISPACE-S9300-32D/hwsku.json @@ -0,0 +1,140 @@ +{ + "interfaces": { + "Ethernet0": { + "default_brkout_mode": "1x400G" + }, + + "Ethernet8": { + "default_brkout_mode": "1x400G" + }, + + "Ethernet16": { + "default_brkout_mode": "1x400G" + }, + + "Ethernet24": { + "default_brkout_mode": "1x400G" + }, + + "Ethernet32": { + "default_brkout_mode": "1x400G" + }, + + "Ethernet40": { + "default_brkout_mode": "1x400G" + }, + + "Ethernet48": { + "default_brkout_mode": "1x400G" + }, + + "Ethernet56": { + "default_brkout_mode": "1x400G" + }, + + "Ethernet64": { + "default_brkout_mode": "1x400G" + }, + + "Ethernet72": { + "default_brkout_mode": "1x400G" + }, + + "Ethernet80": { + "default_brkout_mode": "1x400G" + }, + + "Ethernet88": { + "default_brkout_mode": "1x400G" + }, + + "Ethernet96": { + "default_brkout_mode": "1x400G" + }, + + "Ethernet104": { + "default_brkout_mode": "1x400G" + }, + + "Ethernet112": { + "default_brkout_mode": "1x400G" + }, + + "Ethernet120": { + "default_brkout_mode": "1x400G" + }, + + "Ethernet128": { + "default_brkout_mode": "1x400G" + }, + + "Ethernet136": { + "default_brkout_mode": "1x400G" + }, + + "Ethernet144": { + "default_brkout_mode": "1x400G" + }, + + "Ethernet152": { + "default_brkout_mode": "1x400G" + }, + + "Ethernet160": { + "default_brkout_mode": "1x400G" + }, + + "Ethernet168": { + "default_brkout_mode": "1x400G" + }, + + "Ethernet176": { + "default_brkout_mode": "1x400G" + }, + + "Ethernet184": { + "default_brkout_mode": "1x400G" + }, + + "Ethernet192": { + "default_brkout_mode": "1x400G" + }, + + "Ethernet200": { + "default_brkout_mode": "1x400G" + }, + + "Ethernet208": { + "default_brkout_mode": "1x400G" + }, + + "Ethernet216": { + "default_brkout_mode": "1x400G" + }, + + "Ethernet224": { + "default_brkout_mode": "1x400G" + }, + + "Ethernet232": { + "default_brkout_mode": "1x400G" + }, + + "Ethernet240": { + "default_brkout_mode": "1x400G" + }, + + "Ethernet248": { + "default_brkout_mode": "1x400G" + }, + + "Ethernet256": { + "default_brkout_mode": "1x10G" + }, + + "Ethernet257": { + "default_brkout_mode": "1x10G" + } + } +} + diff --git a/device/ufispace/x86_64-ufispace_s9300_32d-r0/UFISPACE-S9300-32D/port_config.ini b/device/ufispace/x86_64-ufispace_s9300_32d-r0/UFISPACE-S9300-32D/port_config.ini new file mode 100644 index 0000000000..c573702b98 --- /dev/null +++ b/device/ufispace/x86_64-ufispace_s9300_32d-r0/UFISPACE-S9300-32D/port_config.ini @@ -0,0 +1,35 @@ +# name lanes alias index speed +Ethernet0 1,2,3,4,5,6,7,8 Ethernet1/1 0 400000 +Ethernet8 9,10,11,12,13,14,15,16 Ethernet2/1 1 400000 +Ethernet16 17,18,19,20,21,22,23,24 Ethernet3/1 2 400000 +Ethernet24 25,26,27,28,29,30,31,32 Ethernet4/1 3 400000 +Ethernet32 33,34,35,36,37,38,39,40 Ethernet5/1 4 400000 +Ethernet40 41,42,43,44,45,46,47,48 Ethernet6/1 5 400000 +Ethernet48 49,50,51,52,53,54,55,56 Ethernet7/1 6 400000 +Ethernet56 57,58,59,60,61,62,63,64 Ethernet8/1 7 400000 +Ethernet64 65,66,67,68,69,70,71,72 Ethernet9/1 8 400000 +Ethernet72 73,74,75,76,77,78,79,80 Ethernet10/1 9 400000 +Ethernet80 81,82,83,84,85,86,87,88 Ethernet11/1 10 400000 +Ethernet88 89,90,91,92,93,94,95,96 Ethernet12/1 11 400000 +Ethernet96 97,98,99,100,101,102,103,104 Ethernet13/1 12 400000 +Ethernet104 105,106,107,108,109,110,111,112 Ethernet14/1 13 400000 +Ethernet112 113,114,115,116,117,118,119,120 Ethernet15/1 14 400000 +Ethernet120 121,122,123,124,125,126,127,128 Ethernet16/1 15 400000 +Ethernet128 129,130,131,132,133,134,135,136 Ethernet17/1 16 400000 +Ethernet136 137,138,139,140,141,142,143,144 Ethernet18/1 17 400000 +Ethernet144 145,146,147,148,149,150,151,152 Ethernet19/1 18 400000 +Ethernet152 153,154,155,156,157,158,159,160 Ethernet20/1 19 400000 +Ethernet160 161,162,163,164,165,166,167,168 Ethernet21/1 20 400000 +Ethernet168 169,170,171,172,173,174,175,176 Ethernet22/1 21 400000 +Ethernet176 177,178,179,180,181,182,183,184 Ethernet23/1 22 400000 +Ethernet184 185,186,187,188,189,190,191,192 Ethernet24/1 23 400000 +Ethernet192 193,194,195,196,197,198,199,200 Ethernet25/1 24 400000 +Ethernet200 201,202,203,204,205,206,207,208 Ethernet26/1 25 400000 +Ethernet208 209,210,211,212,213,214,215,216 Ethernet27/1 26 400000 +Ethernet216 217,218,219,220,221,222,223,224 Ethernet28/1 27 400000 +Ethernet224 225,226,227,228,229,230,231,232 Ethernet29/1 28 400000 +Ethernet232 233,234,235,236,237,238,239,240 Ethernet30/1 29 400000 +Ethernet240 241,242,243,244,245,246,247,248 Ethernet31/1 30 400000 +Ethernet248 249,250,251,252,253,254,255,256 Ethernet32/1 31 400000 +Ethernet256 257 Ethernet33 32 10000 +Ethernet257 259 Ethernet34 33 10000 diff --git a/device/ufispace/x86_64-ufispace_s9300_32d-r0/UFISPACE-S9300-32D/sai.profile b/device/ufispace/x86_64-ufispace_s9300_32d-r0/UFISPACE-S9300-32D/sai.profile new file mode 100644 index 0000000000..a7036707c0 --- /dev/null +++ b/device/ufispace/x86_64-ufispace_s9300_32d-r0/UFISPACE-S9300-32D/sai.profile @@ -0,0 +1 @@ +SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/td4-s9300-32x400G.config.yml diff --git a/device/ufispace/x86_64-ufispace_s9300_32d-r0/UFISPACE-S9300-32D/td4-s9300-32x400G.config.yml b/device/ufispace/x86_64-ufispace_s9300_32d-r0/UFISPACE-S9300-32D/td4-s9300-32x400G.config.yml new file mode 100644 index 0000000000..a661adfdc4 --- /dev/null +++ b/device/ufispace/x86_64-ufispace_s9300_32d-r0/UFISPACE-S9300-32D/td4-s9300-32x400G.config.yml @@ -0,0 +1,671 @@ +#r1.0.0 +# +# BCM56880 32x400g port configuration. +# +# configuration yaml file +# device: +# : +# : +# ? +# : +# : +# ... +# : +# : +# : +# : +# ... +# : +# + +--- +device: + 0: + DEVICE_CONFIG: + # CORE CLOCK FREQUENCY + CORE_CLK_FREQ: CLK_1350MHZ + # PP CLOCK FREQUENCY + PP_CLK_FREQ: CLK_1350MHZ + VARIANT: DNA_4_9_5_0 +... +--- +device: + 0: + FP_CONFIG: + FP_ING_OPERMODE: GLOBAL_PIPE_AWARE +... +--- +device: + 0: + TM_SCHEDULER_CONFIG: + NUM_MC_Q: NUM_MC_Q_4 +... +--- +bcm_device: + 0: + global: + sai_remap_prio_on_tnl_egress: 1 + global_flexctr_ing_action_num_reserved: 32 + global_flexctr_ing_group_num_reserved: 2 + global_flexctr_ing_pool_num_reserved: 12 + global_flexctr_ing_quant_num_reserved: 2 + global_flexctr_ing_op_profile_num_reserved: 32 + l3_intf_vlan_split_egress: 1 + pktio_mode: 1 + bcm_tunnel_term_compatible_mode: 1 + vlan_flooding_l2mc_num_reserved: 0 + l3_alpm_template: 1 + l3_alpm2_bnk_threshold: 100 + l2_hitbit_enable: 0 + uft_mode: 1 + l3_enable: 1 + ipv6_lpm_128b_enable: 1 + shared_block_mask_section: uc_bc + skip_protocol_default_entries: 1 + sai_tunnel_support: 0 + flexctr_action_reserved_ipmc_hitbit: 1 + sai_nbr_bcast_ifp_optimized: 1 + use_all_splithorizon_groups: 1 + riot_enable: 1 + riot_overlay_l3_intf_mem_size: 8192 + riot_overlay_l3_egress_mem_size: 32768 + l3_ecmp_levels: 2 + riot_overlay_ecmp_resilient_hash_size: 16384 + sai_feat_tail_timestamp: 1 + sai_port_queue_ecn_counter: 1 + sai_field_group_auto_prioritize: 1 +... +--- +device: + 0: + PC_PORT_PHYS_MAP: + ? + # CPU port + PORT_ID: 0 + : + PC_PHYS_PORT_ID: 0 + ? + PORT_ID: 1 + : + PC_PHYS_PORT_ID: 1 + ? + PORT_ID: 2 + : + PC_PHYS_PORT_ID: 9 + ? + PORT_ID: 3 + : + PC_PHYS_PORT_ID: 17 + ? + PORT_ID: 4 + : + PC_PHYS_PORT_ID: 25 + ? + PORT_ID: 20 + : + PC_PHYS_PORT_ID: 33 + ? + PORT_ID: 21 + : + PC_PHYS_PORT_ID: 41 + ? + PORT_ID: 22 + : + PC_PHYS_PORT_ID: 49 + ? + PORT_ID: 23 + : + PC_PHYS_PORT_ID: 57 + ? + PORT_ID: 40 + : + PC_PHYS_PORT_ID: 65 + ? + PORT_ID: 41 + : + PC_PHYS_PORT_ID: 73 + ? + PORT_ID: 42 + : + PC_PHYS_PORT_ID: 81 + ? + PORT_ID: 43 + : + PC_PHYS_PORT_ID: 89 + ? + PORT_ID: 60 + : + PC_PHYS_PORT_ID: 97 + ? + PORT_ID: 61 + : + PC_PHYS_PORT_ID: 105 + ? + PORT_ID: 62 + : + PC_PHYS_PORT_ID: 113 + ? + PORT_ID: 63 + : + PC_PHYS_PORT_ID: 121 + ? + PORT_ID: 80 + : + PC_PHYS_PORT_ID: 129 + ? + PORT_ID: 81 + : + PC_PHYS_PORT_ID: 137 + ? + PORT_ID: 82 + : + PC_PHYS_PORT_ID: 145 + ? + PORT_ID: 83 + : + PC_PHYS_PORT_ID: 153 + ? + PORT_ID: 100 + : + PC_PHYS_PORT_ID: 161 + ? + PORT_ID: 101 + : + PC_PHYS_PORT_ID: 169 + ? + PORT_ID: 102 + : + PC_PHYS_PORT_ID: 177 + ? + PORT_ID: 103 + : + PC_PHYS_PORT_ID: 185 + ? + PORT_ID: 120 + : + PC_PHYS_PORT_ID: 193 + ? + PORT_ID: 121 + : + PC_PHYS_PORT_ID: 201 + ? + PORT_ID: 122 + : + PC_PHYS_PORT_ID: 209 + ? + PORT_ID: 123 + : + PC_PHYS_PORT_ID: 217 + ? + PORT_ID: 140 + : + PC_PHYS_PORT_ID: 225 + ? + PORT_ID: 141 + : + PC_PHYS_PORT_ID: 233 + ? + PORT_ID: 142 + : + PC_PHYS_PORT_ID: 241 + ? + PORT_ID: 143 + : + PC_PHYS_PORT_ID: 249 + ? + # management port + PORT_ID: 38 + : + PC_PHYS_PORT_ID: 257 + ? + # management port + PORT_ID: 118 + : + PC_PHYS_PORT_ID: 259 +... +--- +device: + 0: + PC_PORT: + ? + PORT_ID: 0 + : + &port_mode_10g + ENABLE: 0 + SPEED: 10000 + NUM_LANES: 1 + ? + PORT_ID: [[1, 4], + [20, 23], + [40, 43], + [60, 63], + [80, 83], + [100, 103], + [120, 123], + [140, 143]] + : + &port_mode_400g + ENABLE: 0 + SPEED: 400000 + NUM_LANES: 8 + FEC_MODE: PC_FEC_RS544_2XN + LINK_TRAINING: 1 + MAX_FRAME_SIZE: 9416 + ? + PORT_ID: [38, # Management port 0 (Pipe 1) + 118] # Management port 1 (Pipe 3) + : + &port_mode_10g_xfi + ENABLE: 0 + SPEED: 10000 + NUM_LANES: 1 + MAX_FRAME_SIZE: 9416 +... +--- +device: + 0: + # Per pipe flex counter configuration + CTR_EFLEX_CONFIG: + CTR_ING_EFLEX_OPERMODE_PIPEUNIQUE: 0 + CTR_EGR_EFLEX_OPERMODE_PIPEUNIQUE: 0 +... +# +# $Copyright: (c) 2019 Broadcom. +# Broadcom Proprietary and Confidential. All rights reserved.$ +# +# BCM56880 PC_PM_CORE configuration for K board. +# +# $Copyright:.$ +# + +--- +device: + 0: + PC_PM_CORE: + ? + PC_PM_ID: 1 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x27413065 + TX_LANE_MAP: 0x46270513 + RX_POLARITY_FLIP: 0x0a + TX_POLARITY_FLIP: 0x4d + ? + PC_PM_ID: 2 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x02741365 + TX_LANE_MAP: 0x51306274 + RX_POLARITY_FLIP: 0xfd + TX_POLARITY_FLIP: 0x2c + ? + PC_PM_ID: 3 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x65731402 + TX_LANE_MAP: 0x04731265 + RX_POLARITY_FLIP: 0xf5 + TX_POLARITY_FLIP: 0xba + ? + PC_PM_ID: 4 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x01563427 + TX_LANE_MAP: 0x45231706 + RX_POLARITY_FLIP: 0x35 + TX_POLARITY_FLIP: 0xe4 + ? + PC_PM_ID: 5 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x63047521 + TX_LANE_MAP: 0x41706253 + RX_POLARITY_FLIP: 0xf5 + TX_POLARITY_FLIP: 0xf2 + ? + PC_PM_ID: 6 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x20643175 + TX_LANE_MAP: 0x65237410 + RX_POLARITY_FLIP: 0xff + TX_POLARITY_FLIP: 0x7f + ? + PC_PM_ID: 7 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x64307521 + TX_LANE_MAP: 0x12650437 + RX_POLARITY_FLIP: 0xf5 + TX_POLARITY_FLIP: 0xde + ? + PC_PM_ID: 8 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x23417065 + TX_LANE_MAP: 0x46231705 + RX_POLARITY_FLIP: 0xff + TX_POLARITY_FLIP: 0xb5 + ? + PC_PM_ID: 9 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x32406175 + TX_LANE_MAP: 0x16370425 + RX_POLARITY_FLIP: 0x0a + TX_POLARITY_FLIP: 0x45 + ? + PC_PM_ID: 10 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x74306521 + TX_LANE_MAP: 0x01352674 + RX_POLARITY_FLIP: 0x00 + TX_POLARITY_FLIP: 0x06 + ? + PC_PM_ID: 11 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x21743065 + TX_LANE_MAP: 0x41537062 + RX_POLARITY_FLIP: 0x0a + TX_POLARITY_FLIP: 0x37 + ? + PC_PM_ID: 12 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x67042531 + TX_LANE_MAP: 0x74530162 + RX_POLARITY_FLIP: 0x00 + TX_POLARITY_FLIP: 0x42 + ? + PC_PM_ID: 13 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x10652437 + TX_LANE_MAP: 0x76051324 + RX_POLARITY_FLIP: 0x0a + TX_POLARITY_FLIP: 0xc5 + ? + PC_PM_ID: 14 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x65037412 + TX_LANE_MAP: 0x04731562 + RX_POLARITY_FLIP: 0x00 + TX_POLARITY_FLIP: 0x08 + ? + PC_PM_ID: 15 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x02741365 + TX_LANE_MAP: 0x60425371 + RX_POLARITY_FLIP: 0x0a + TX_POLARITY_FLIP: 0xc4 + ? + PC_PM_ID: 16 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x32506174 + TX_LANE_MAP: 0x01235764 + RX_POLARITY_FLIP: 0xff + TX_POLARITY_FLIP: 0xfc + ? + PC_PM_ID: 17 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x32416075 + TX_LANE_MAP: 0x15430627 + RX_POLARITY_FLIP: 0x0a + TX_POLARITY_FLIP: 0x4d + ? + PC_PM_ID: 18 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x12740365 + TX_LANE_MAP: 0x61405372 + RX_POLARITY_FLIP: 0xff + TX_POLARITY_FLIP: 0x41 + ? + PC_PM_ID: 19 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x65037412 + TX_LANE_MAP: 0x01247653 + RX_POLARITY_FLIP: 0xf5 + TX_POLARITY_FLIP: 0xf6 + ? + PC_PM_ID: 20 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x10652437 + TX_LANE_MAP: 0x41507263 + RX_POLARITY_FLIP: 0xff + TX_POLARITY_FLIP: 0xf7 + ? + PC_PM_ID: 21 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x23561704 + TX_LANE_MAP: 0x62437051 + RX_POLARITY_FLIP: 0xf5 + TX_POLARITY_FLIP: 0x7a + ? + PC_PM_ID: 22 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x20743165 + TX_LANE_MAP: 0x42537160 + RX_POLARITY_FLIP: 0xff + TX_POLARITY_FLIP: 0xf7 + ? + PC_PM_ID: 23 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x74206531 + TX_LANE_MAP: 0x03471562 + RX_POLARITY_FLIP: 0xf5 + TX_POLARITY_FLIP: 0xf9 + ? + PC_PM_ID: 24 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x23406175 + TX_LANE_MAP: 0x60217453 + RX_POLARITY_FLIP: 0xff + TX_POLARITY_FLIP: 0x75 + ? + PC_PM_ID: 25 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x23506174 + TX_LANE_MAP: 0x75243016 + RX_POLARITY_FLIP: 0x0a + TX_POLARITY_FLIP: 0x04 + ? + PC_PM_ID: 26 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x64307521 + TX_LANE_MAP: 0x57134602 + RX_POLARITY_FLIP: 0x00 + TX_POLARITY_FLIP: 0x0e + ? + PC_PM_ID: 27 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x30742165 + TX_LANE_MAP: 0x30645172 + RX_POLARITY_FLIP: 0x0a + TX_POLARITY_FLIP: 0x25 + ? + PC_PM_ID: 28 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x76042531 + TX_LANE_MAP: 0x31657024 + RX_POLARITY_FLIP: 0x00 + TX_POLARITY_FLIP: 0x2a + ? + PC_PM_ID: 29 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x23651407 + TX_LANE_MAP: 0x26034715 + RX_POLARITY_FLIP: 0x0a + TX_POLARITY_FLIP: 0x47 + ? + PC_PM_ID: 30 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x17425603 + TX_LANE_MAP: 0x07431625 + RX_POLARITY_FLIP: 0xaa + TX_POLARITY_FLIP: 0x0c + ? + PC_PM_ID: 31 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x12740365 + TX_LANE_MAP: 0x74503162 + RX_POLARITY_FLIP: 0x0a + TX_POLARITY_FLIP: 0x1f + ? + PC_PM_ID: 32 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x32406175 + TX_LANE_MAP: 0x32147605 + RX_POLARITY_FLIP: 0xff + TX_POLARITY_FLIP: 0x55 +... + + diff --git a/device/ufispace/x86_64-ufispace_s9300_32d-r0/custom_led.bin b/device/ufispace/x86_64-ufispace_s9300_32d-r0/custom_led.bin new file mode 100644 index 0000000000..1cbd43d6a5 Binary files /dev/null and b/device/ufispace/x86_64-ufispace_s9300_32d-r0/custom_led.bin differ diff --git a/device/ufispace/x86_64-ufispace_s9300_32d-r0/default_sku b/device/ufispace/x86_64-ufispace_s9300_32d-r0/default_sku new file mode 100644 index 0000000000..d819eeba26 --- /dev/null +++ b/device/ufispace/x86_64-ufispace_s9300_32d-r0/default_sku @@ -0,0 +1 @@ +UFISPACE-S9300-32D t1 diff --git a/device/ufispace/x86_64-ufispace_s9300_32d-r0/fancontrol b/device/ufispace/x86_64-ufispace_s9300_32d-r0/fancontrol new file mode 100644 index 0000000000..1234cd994f --- /dev/null +++ b/device/ufispace/x86_64-ufispace_s9300_32d-r0/fancontrol @@ -0,0 +1,10 @@ +# Configuration file generated by pwmconfig, changes will be lost +INTERVAL=10 +DEVPATH= +DEVNAME= +FCTEMPS= +FCFANS= +MINTEMP= +MAXTEMP= +MINSTART= +MINSTOP= diff --git a/device/ufispace/x86_64-ufispace_s9300_32d-r0/installer.conf b/device/ufispace/x86_64-ufispace_s9300_32d-r0/installer.conf new file mode 100644 index 0000000000..74b02f0766 --- /dev/null +++ b/device/ufispace/x86_64-ufispace_s9300_32d-r0/installer.conf @@ -0,0 +1,4 @@ +CONSOLE_PORT=0x3f8 +CONSOLE_DEV=0 +CONSOLE_SPEED=115200 +ONIE_PLATFORM_EXTRA_CMDLINE_LINUX="modprobe.blacklist=gpio_ich,qat_c3xxx nomodeset pcie_aspm=off" diff --git a/device/ufispace/x86_64-ufispace_s9300_32d-r0/led_proc_init.soc b/device/ufispace/x86_64-ufispace_s9300_32d-r0/led_proc_init.soc new file mode 100644 index 0000000000..eda09a0dd1 --- /dev/null +++ b/device/ufispace/x86_64-ufispace_s9300_32d-r0/led_proc_init.soc @@ -0,0 +1,4 @@ +led stop +led load /usr/share/sonic/platform/custom_led.bin +led auto on +led start diff --git a/device/ufispace/x86_64-ufispace_s9300_32d-r0/pcie.yaml b/device/ufispace/x86_64-ufispace_s9300_32d-r0/pcie.yaml new file mode 100644 index 0000000000..ce0a45f5d6 --- /dev/null +++ b/device/ufispace/x86_64-ufispace_s9300_32d-r0/pcie.yaml @@ -0,0 +1,742 @@ +- bus: '00' + dev: '00' + fn: '0' + id: '2020' + name: 'Host bridge: Intel Corporation Sky Lake-E DMI3 Registers (rev 04)' +- bus: '00' + dev: '04' + fn: '0' + id: '2021' + name: 'System peripheral: Intel Corporation Sky Lake-E CBDMA Registers (rev 04)' +- bus: '00' + dev: '04' + fn: '1' + id: '2021' + name: 'System peripheral: Intel Corporation Sky Lake-E CBDMA Registers (rev 04)' +- bus: '00' + dev: '04' + fn: '2' + id: '2021' + name: 'System peripheral: Intel Corporation Sky Lake-E CBDMA Registers (rev 04)' +- bus: '00' + dev: '04' + fn: '3' + id: '2021' + name: 'System peripheral: Intel Corporation Sky Lake-E CBDMA Registers (rev 04)' +- bus: '00' + dev: '04' + fn: '4' + id: '2021' + name: 'System peripheral: Intel Corporation Sky Lake-E CBDMA Registers (rev 04)' +- bus: '00' + dev: '04' + fn: '5' + id: '2021' + name: 'System peripheral: Intel Corporation Sky Lake-E CBDMA Registers (rev 04)' +- bus: '00' + dev: '04' + fn: '6' + id: '2021' + name: 'System peripheral: Intel Corporation Sky Lake-E CBDMA Registers (rev 04)' +- bus: '00' + dev: '04' + fn: '7' + id: '2021' + name: 'System peripheral: Intel Corporation Sky Lake-E CBDMA Registers (rev 04)' +- bus: '00' + dev: '05' + fn: '0' + id: '2024' + name: 'System peripheral: Intel Corporation Sky Lake-E MM/Vt-d Configuration Registers + (rev 04)' +- bus: '00' + dev: '05' + fn: '2' + id: '2025' + name: 'System peripheral: Intel Corporation Sky Lake-E RAS (rev 04)' +- bus: '00' + dev: '05' + fn: '4' + id: '2026' + name: 'PIC: Intel Corporation Sky Lake-E IOAPIC (rev 04)' +- bus: '00' + dev: 08 + fn: '0' + id: '2014' + name: 'System peripheral: Intel Corporation Sky Lake-E Ubox Registers (rev 04)' +- bus: '00' + dev: 08 + fn: '1' + id: '2015' + name: 'Performance counters: Intel Corporation Sky Lake-E Ubox Registers (rev 04)' +- bus: '00' + dev: 08 + fn: '2' + id: '2016' + name: 'System peripheral: Intel Corporation Sky Lake-E Ubox Registers (rev 04)' +- bus: '00' + dev: '11' + fn: '0' + id: a1ec + name: 'Unassigned class [ff00]: Intel Corporation C620 Series Chipset Family MROM + 0 (rev 04)' +- bus: '00' + dev: '11' + fn: '1' + id: a1ed + name: 'Unassigned class [ff00]: Intel Corporation C620 Series Chipset Family MROM + 1 (rev 04)' +- bus: '00' + dev: '14' + fn: '0' + id: a1af + name: 'USB controller: Intel Corporation C620 Series Chipset Family USB 3.0 xHCI + Controller (rev 04)' +- bus: '00' + dev: '14' + fn: '2' + id: a1b1 + name: 'Signal processing controller: Intel Corporation C620 Series Chipset Family + Thermal Subsystem (rev 04)' +- bus: '00' + dev: '16' + fn: '0' + id: a1ba + name: 'Communication controller: Intel Corporation C620 Series Chipset Family MEI + Controller #1 (rev 04)' +- bus: '00' + dev: '16' + fn: '4' + id: a1be + name: 'Communication controller: Intel Corporation C620 Series Chipset Family MEI + Controller #3 (rev 04)' +- bus: '00' + dev: 1c + fn: '0' + id: a190 + name: 'PCI bridge: Intel Corporation C620 Series Chipset Family PCI Express Root + Port #1 (rev f4)' +- bus: '00' + dev: 1c + fn: '4' + id: a194 + name: 'PCI bridge: Intel Corporation C620 Series Chipset Family PCI Express Root + Port #5 (rev f4)' +- bus: '00' + dev: 1c + fn: '5' + id: a195 + name: 'PCI bridge: Intel Corporation C620 Series Chipset Family PCI Express Root + Port #6 (rev f4)' +- bus: '00' + dev: 1d + fn: '0' + id: a198 + name: 'PCI bridge: Intel Corporation C620 Series Chipset Family PCI Express Root + Port #9 (rev f4)' +- bus: '00' + dev: 1d + fn: '2' + id: a19a + name: 'PCI bridge: Intel Corporation C620 Series Chipset Family PCI Express Root + Port #11 (rev f4)' +- bus: '00' + dev: 1f + fn: '0' + id: a1c8 + name: 'ISA bridge: Intel Corporation Device a1c8 (rev 04)' +- bus: '00' + dev: 1f + fn: '2' + id: a1a1 + name: 'Memory controller: Intel Corporation C620 Series Chipset Family Power Management + Controller (rev 04)' +- bus: '00' + dev: 1f + fn: '4' + id: a1a3 + name: 'SMBus: Intel Corporation C620 Series Chipset Family SMBus (rev 04)' +- bus: '00' + dev: 1f + fn: '5' + id: a1a4 + name: 'Serial bus controller [0c80]: Intel Corporation C620 Series Chipset Family + SPI Controller (rev 04)' +- bus: '02' + dev: '00' + fn: '0' + id: '1533' + name: 'Ethernet controller: Intel Corporation I210 Gigabit Network Connection (rev + 03)' +- bus: '03' + dev: '00' + fn: '0' + id: '1150' + name: 'PCI bridge: ASPEED Technology, Inc. AST1150 PCI-to-PCI Bridge (rev 03)' +- bus: '04' + dev: '00' + fn: '0' + id: '2000' + name: 'VGA compatible controller: ASPEED Technology, Inc. ASPEED Graphics Family + (rev 30)' +- bus: '06' + dev: '00' + fn: '0' + id: '0625' + name: 'SATA controller: ASMedia Technology Inc. Device 0625 (rev 01)' +- bus: '16' + dev: '00' + fn: '0' + id: '2030' + name: 'PCI bridge: Intel Corporation Sky Lake-E PCI Express Root Port A (rev 04)' +- bus: '16' + dev: '01' + fn: '0' + id: '2031' + name: 'PCI bridge: Intel Corporation Sky Lake-E PCI Express Root Port B (rev 04)' +- bus: '16' + dev: '02' + fn: '0' + id: '2032' + name: 'PCI bridge: Intel Corporation Sky Lake-E PCI Express Root Port C (rev 04)' +- bus: '16' + dev: '03' + fn: '0' + id: '2033' + name: 'PCI bridge: Intel Corporation Sky Lake-E PCI Express Root Port D (rev 04)' +- bus: '16' + dev: '05' + fn: '0' + id: '2034' + name: 'System peripheral: Intel Corporation Sky Lake-E VT-d (rev 04)' +- bus: '16' + dev: '05' + fn: '2' + id: '2035' + name: 'System peripheral: Intel Corporation Sky Lake-E RAS Configuration Registers + (rev 04)' +- bus: '16' + dev: '05' + fn: '4' + id: '2036' + name: 'PIC: Intel Corporation Sky Lake-E IOxAPIC Configuration Registers (rev 04)' +- bus: '16' + dev: 08 + fn: '0' + id: 208d + name: 'System peripheral: Intel Corporation Sky Lake-E CHA Registers (rev 04)' +- bus: '16' + dev: 08 + fn: '1' + id: 208d + name: 'System peripheral: Intel Corporation Sky Lake-E CHA Registers (rev 04)' +- bus: '16' + dev: 08 + fn: '2' + id: 208d + name: 'System peripheral: Intel Corporation Sky Lake-E CHA Registers (rev 04)' +- bus: '16' + dev: 08 + fn: '3' + id: 208d + name: 'System peripheral: Intel Corporation Sky Lake-E CHA Registers (rev 04)' +- bus: '16' + dev: 08 + fn: '4' + id: 208d + name: 'System peripheral: Intel Corporation Sky Lake-E CHA Registers (rev 04)' +- bus: '16' + dev: 08 + fn: '5' + id: 208d + name: 'System peripheral: Intel Corporation Sky Lake-E CHA Registers (rev 04)' +- bus: '16' + dev: 08 + fn: '6' + id: 208d + name: 'System peripheral: Intel Corporation Sky Lake-E CHA Registers (rev 04)' +- bus: '16' + dev: 08 + fn: '7' + id: 208d + name: 'System peripheral: Intel Corporation Sky Lake-E CHA Registers (rev 04)' +- bus: '16' + dev: 09 + fn: '0' + id: 208d + name: 'System peripheral: Intel Corporation Sky Lake-E CHA Registers (rev 04)' +- bus: '16' + dev: 09 + fn: '1' + id: 208d + name: 'System peripheral: Intel Corporation Sky Lake-E CHA Registers (rev 04)' +- bus: '16' + dev: 09 + fn: '2' + id: 208d + name: 'System peripheral: Intel Corporation Sky Lake-E CHA Registers (rev 04)' +- bus: '16' + dev: 09 + fn: '3' + id: 208d + name: 'System peripheral: Intel Corporation Sky Lake-E CHA Registers (rev 04)' +- bus: '16' + dev: 09 + fn: '4' + id: 208d + name: 'System peripheral: Intel Corporation Sky Lake-E CHA Registers (rev 04)' +- bus: '16' + dev: 09 + fn: '5' + id: 208d + name: 'System peripheral: Intel Corporation Sky Lake-E CHA Registers (rev 04)' +- bus: '16' + dev: 09 + fn: '6' + id: 208d + name: 'System peripheral: Intel Corporation Sky Lake-E CHA Registers (rev 04)' +- bus: '16' + dev: 09 + fn: '7' + id: 208d + name: 'System peripheral: Intel Corporation Sky Lake-E CHA Registers (rev 04)' +- bus: '16' + dev: 0a + fn: '0' + id: 208d + name: 'System peripheral: Intel Corporation Sky Lake-E CHA Registers (rev 04)' +- bus: '16' + dev: 0a + fn: '1' + id: 208d + name: 'System peripheral: Intel Corporation Sky Lake-E CHA Registers (rev 04)' +- bus: '16' + dev: 0e + fn: '0' + id: 208e + name: 'System peripheral: Intel Corporation Sky Lake-E CHA Registers (rev 04)' +- bus: '16' + dev: 0e + fn: '1' + id: 208e + name: 'System peripheral: Intel Corporation Sky Lake-E CHA Registers (rev 04)' +- bus: '16' + dev: 0e + fn: '2' + id: 208e + name: 'System peripheral: Intel Corporation Sky Lake-E CHA Registers (rev 04)' +- bus: '16' + dev: 0e + fn: '3' + id: 208e + name: 'System peripheral: Intel Corporation Sky Lake-E CHA Registers (rev 04)' +- bus: '16' + dev: 0e + fn: '4' + id: 208e + name: 'System peripheral: Intel Corporation Sky Lake-E CHA Registers (rev 04)' +- bus: '16' + dev: 0e + fn: '5' + id: 208e + name: 'System peripheral: Intel Corporation Sky Lake-E CHA Registers (rev 04)' +- bus: '16' + dev: 0e + fn: '6' + id: 208e + name: 'System peripheral: Intel Corporation Sky Lake-E CHA Registers (rev 04)' +- bus: '16' + dev: 0e + fn: '7' + id: 208e + name: 'System peripheral: Intel Corporation Sky Lake-E CHA Registers (rev 04)' +- bus: '16' + dev: 0f + fn: '0' + id: 208e + name: 'System peripheral: Intel Corporation Sky Lake-E CHA Registers (rev 04)' +- bus: '16' + dev: 0f + fn: '1' + id: 208e + name: 'System peripheral: Intel Corporation Sky Lake-E CHA Registers (rev 04)' +- bus: '16' + dev: 0f + fn: '2' + id: 208e + name: 'System peripheral: Intel Corporation Sky Lake-E CHA Registers (rev 04)' +- bus: '16' + dev: 0f + fn: '3' + id: 208e + name: 'System peripheral: Intel Corporation Sky Lake-E CHA Registers (rev 04)' +- bus: '16' + dev: 0f + fn: '4' + id: 208e + name: 'System peripheral: Intel Corporation Sky Lake-E CHA Registers (rev 04)' +- bus: '16' + dev: 0f + fn: '5' + id: 208e + name: 'System peripheral: Intel Corporation Sky Lake-E CHA Registers (rev 04)' +- bus: '16' + dev: 0f + fn: '6' + id: 208e + name: 'System peripheral: Intel Corporation Sky Lake-E CHA Registers (rev 04)' +- bus: '16' + dev: 0f + fn: '7' + id: 208e + name: 'System peripheral: Intel Corporation Sky Lake-E CHA Registers (rev 04)' +- bus: '16' + dev: '10' + fn: '0' + id: 208e + name: 'System peripheral: Intel Corporation Sky Lake-E CHA Registers (rev 04)' +- bus: '16' + dev: '10' + fn: '1' + id: 208e + name: 'System peripheral: Intel Corporation Sky Lake-E CHA Registers (rev 04)' +- bus: '16' + dev: 1d + fn: '0' + id: '2054' + name: 'System peripheral: Intel Corporation Sky Lake-E CHA Registers (rev 04)' +- bus: '16' + dev: 1d + fn: '1' + id: '2055' + name: 'System peripheral: Intel Corporation Sky Lake-E CHA Registers (rev 04)' +- bus: '16' + dev: 1d + fn: '2' + id: '2056' + name: 'System peripheral: Intel Corporation Sky Lake-E CHA Registers (rev 04)' +- bus: '16' + dev: 1d + fn: '3' + id: '2057' + name: 'System peripheral: Intel Corporation Sky Lake-E CHA Registers (rev 04)' +- bus: '16' + dev: 1e + fn: '0' + id: '2080' + name: 'System peripheral: Intel Corporation Sky Lake-E PCU Registers (rev 04)' +- bus: '16' + dev: 1e + fn: '1' + id: '2081' + name: 'System peripheral: Intel Corporation Sky Lake-E PCU Registers (rev 04)' +- bus: '16' + dev: 1e + fn: '2' + id: '2082' + name: 'System peripheral: Intel Corporation Sky Lake-E PCU Registers (rev 04)' +- bus: '16' + dev: 1e + fn: '3' + id: '2083' + name: 'System peripheral: Intel Corporation Sky Lake-E PCU Registers (rev 04)' +- bus: '16' + dev: 1e + fn: '4' + id: '2084' + name: 'System peripheral: Intel Corporation Sky Lake-E PCU Registers (rev 04)' +- bus: '16' + dev: 1e + fn: '5' + id: '2085' + name: 'System peripheral: Intel Corporation Sky Lake-E PCU Registers (rev 04)' +- bus: '16' + dev: 1e + fn: '6' + id: '2086' + name: 'System peripheral: Intel Corporation Sky Lake-E PCU Registers (rev 04)' +- bus: '17' + dev: '00' + fn: '0' + id: b880 + name: 'Ethernet controller: Broadcom Inc. and subsidiaries BCM56880 Switch ASIC + (rev 11)' +- bus: '64' + dev: '00' + fn: '0' + id: '2030' + name: 'PCI bridge: Intel Corporation Sky Lake-E PCI Express Root Port A (rev 04)' +- bus: '64' + dev: '01' + fn: '0' + id: '2031' + name: 'PCI bridge: Intel Corporation Sky Lake-E PCI Express Root Port B (rev 04)' +- bus: '64' + dev: '02' + fn: '0' + id: '2032' + name: 'PCI bridge: Intel Corporation Sky Lake-E PCI Express Root Port C (rev 04)' +- bus: '64' + dev: '03' + fn: '0' + id: '2033' + name: 'PCI bridge: Intel Corporation Sky Lake-E PCI Express Root Port D (rev 04)' +- bus: '64' + dev: '05' + fn: '0' + id: '2034' + name: 'System peripheral: Intel Corporation Sky Lake-E VT-d (rev 04)' +- bus: '64' + dev: '05' + fn: '2' + id: '2035' + name: 'System peripheral: Intel Corporation Sky Lake-E RAS Configuration Registers + (rev 04)' +- bus: '64' + dev: '05' + fn: '4' + id: '2036' + name: 'PIC: Intel Corporation Sky Lake-E IOxAPIC Configuration Registers (rev 04)' +- bus: '64' + dev: 08 + fn: '0' + id: '2066' + name: 'System peripheral: Intel Corporation Sky Lake-E Integrated Memory Controller + (rev 04)' +- bus: '64' + dev: 09 + fn: '0' + id: '2066' + name: 'System peripheral: Intel Corporation Sky Lake-E Integrated Memory Controller + (rev 04)' +- bus: '64' + dev: 0a + fn: '0' + id: '2040' + name: 'System peripheral: Intel Corporation Sky Lake-E Integrated Memory Controller + (rev 04)' +- bus: '64' + dev: 0a + fn: '1' + id: '2041' + name: 'System peripheral: Intel Corporation Sky Lake-E Integrated Memory Controller + (rev 04)' +- bus: '64' + dev: 0a + fn: '2' + id: '2042' + name: 'System peripheral: Intel Corporation Sky Lake-E Integrated Memory Controller + (rev 04)' +- bus: '64' + dev: 0a + fn: '3' + id: '2043' + name: 'System peripheral: Intel Corporation Sky Lake-E Integrated Memory Controller + (rev 04)' +- bus: '64' + dev: 0a + fn: '4' + id: '2044' + name: 'System peripheral: Intel Corporation Sky Lake-E Integrated Memory Controller + (rev 04)' +- bus: '64' + dev: 0a + fn: '5' + id: '2045' + name: 'System peripheral: Intel Corporation Sky Lake-E LM Channel 1 (rev 04)' +- bus: '64' + dev: 0a + fn: '6' + id: '2046' + name: 'System peripheral: Intel Corporation Sky Lake-E LMS Channel 1 (rev 04)' +- bus: '64' + dev: 0a + fn: '7' + id: '2047' + name: 'System peripheral: Intel Corporation Sky Lake-E LMDP Channel 1 (rev 04)' +- bus: '64' + dev: 0b + fn: '0' + id: '2048' + name: 'System peripheral: Intel Corporation Sky Lake-E DECS Channel 2 (rev 04)' +- bus: '64' + dev: 0b + fn: '1' + id: '2049' + name: 'System peripheral: Intel Corporation Sky Lake-E LM Channel 2 (rev 04)' +- bus: '64' + dev: 0b + fn: '2' + id: 204a + name: 'System peripheral: Intel Corporation Sky Lake-E LMS Channel 2 (rev 04)' +- bus: '64' + dev: 0b + fn: '3' + id: 204b + name: 'System peripheral: Intel Corporation Sky Lake-E LMDP Channel 2 (rev 04)' +- bus: '64' + dev: 0c + fn: '0' + id: '2040' + name: 'System peripheral: Intel Corporation Sky Lake-E Integrated Memory Controller + (rev 04)' +- bus: '64' + dev: 0c + fn: '1' + id: '2041' + name: 'System peripheral: Intel Corporation Sky Lake-E Integrated Memory Controller + (rev 04)' +- bus: '64' + dev: 0c + fn: '2' + id: '2042' + name: 'System peripheral: Intel Corporation Sky Lake-E Integrated Memory Controller + (rev 04)' +- bus: '64' + dev: 0c + fn: '3' + id: '2043' + name: 'System peripheral: Intel Corporation Sky Lake-E Integrated Memory Controller + (rev 04)' +- bus: '64' + dev: 0c + fn: '4' + id: '2044' + name: 'System peripheral: Intel Corporation Sky Lake-E Integrated Memory Controller + (rev 04)' +- bus: '64' + dev: 0c + fn: '5' + id: '2045' + name: 'System peripheral: Intel Corporation Sky Lake-E LM Channel 1 (rev 04)' +- bus: '64' + dev: 0c + fn: '6' + id: '2046' + name: 'System peripheral: Intel Corporation Sky Lake-E LMS Channel 1 (rev 04)' +- bus: '64' + dev: 0c + fn: '7' + id: '2047' + name: 'System peripheral: Intel Corporation Sky Lake-E LMDP Channel 1 (rev 04)' +- bus: '64' + dev: 0d + fn: '0' + id: '2048' + name: 'System peripheral: Intel Corporation Sky Lake-E DECS Channel 2 (rev 04)' +- bus: '64' + dev: 0d + fn: '1' + id: '2049' + name: 'System peripheral: Intel Corporation Sky Lake-E LM Channel 2 (rev 04)' +- bus: '64' + dev: 0d + fn: '2' + id: 204a + name: 'System peripheral: Intel Corporation Sky Lake-E LMS Channel 2 (rev 04)' +- bus: '64' + dev: 0d + fn: '3' + id: 204b + name: 'System peripheral: Intel Corporation Sky Lake-E LMDP Channel 2 (rev 04)' +- bus: b2 + dev: '00' + fn: '0' + id: '2030' + name: 'PCI bridge: Intel Corporation Sky Lake-E PCI Express Root Port A (rev 04)' +- bus: b2 + dev: '05' + fn: '0' + id: '2034' + name: 'System peripheral: Intel Corporation Sky Lake-E VT-d (rev 04)' +- bus: b2 + dev: '05' + fn: '2' + id: '2035' + name: 'System peripheral: Intel Corporation Sky Lake-E RAS Configuration Registers + (rev 04)' +- bus: b2 + dev: '05' + fn: '4' + id: '2036' + name: 'PIC: Intel Corporation Sky Lake-E IOxAPIC Configuration Registers (rev 04)' +- bus: b2 + dev: '12' + fn: '0' + id: 204c + name: 'Performance counters: Intel Corporation Sky Lake-E M3KTI Registers (rev 04)' +- bus: b2 + dev: '12' + fn: '1' + id: 204d + name: 'Performance counters: Intel Corporation Sky Lake-E M3KTI Registers (rev 04)' +- bus: b2 + dev: '12' + fn: '2' + id: 204e + name: 'System peripheral: Intel Corporation Sky Lake-E M3KTI Registers (rev 04)' +- bus: b2 + dev: '15' + fn: '0' + id: '2018' + name: 'System peripheral: Intel Corporation Sky Lake-E M2PCI Registers (rev 04)' +- bus: b2 + dev: '16' + fn: '0' + id: '2018' + name: 'System peripheral: Intel Corporation Sky Lake-E M2PCI Registers (rev 04)' +- bus: b2 + dev: '16' + fn: '4' + id: '2018' + name: 'System peripheral: Intel Corporation Sky Lake-E M2PCI Registers (rev 04)' +- bus: b2 + dev: '17' + fn: '0' + id: '2018' + name: 'System peripheral: Intel Corporation Sky Lake-E M2PCI Registers (rev 04)' +- bus: b3 + dev: '00' + fn: '0' + id: 37c0 + name: 'PCI bridge: Intel Corporation Device 37c0 (rev 04)' +- bus: b4 + dev: '00' + fn: '0' + id: 37c2 + name: 'PCI bridge: Intel Corporation Device 37c2 (rev 04)' +- bus: b4 + dev: '03' + fn: '0' + id: 37c5 + name: 'PCI bridge: Intel Corporation Device 37c5 (rev 04)' +- bus: b5 + dev: '00' + fn: '0' + id: 37c8 + name: 'Co-processor: Intel Corporation C62x Chipset QuickAssist Technology (rev + 04)' +- bus: b6 + dev: '00' + fn: '0' + id: 37d3 + name: 'Ethernet controller: Intel Corporation Ethernet Connection X722 for 10GbE + SFP+ (rev 04)' +- bus: b6 + dev: '00' + fn: '1' + id: 37d3 + name: 'Ethernet controller: Intel Corporation Ethernet Connection X722 for 10GbE + SFP+ (rev 04)' +- bus: b6 + dev: '00' + fn: '2' + id: 37ce + name: 'Ethernet controller: Intel Corporation Ethernet Connection X722 for 10GbE + backplane (rev 04)' +- bus: b6 + dev: '00' + fn: '3' + id: 37ce + name: 'Ethernet controller: Intel Corporation Ethernet Connection X722 for 10GbE + backplane (rev 04)' diff --git a/device/ufispace/x86_64-ufispace_s9300_32d-r0/pddf/pd-plugin.json b/device/ufispace/x86_64-ufispace_s9300_32d-r0/pddf/pd-plugin.json new file mode 100644 index 0000000000..c741940a1c --- /dev/null +++ b/device/ufispace/x86_64-ufispace_s9300_32d-r0/pddf/pd-plugin.json @@ -0,0 +1,86 @@ +{ + + "XCVR": + { + "xcvr_present": + { + "i2c": + { + "valmap-SFP": {"1":true, "0":false }, + "valmap-QSFP-DD": {"1":true, "0":false} + } + + }, + "plug_status": + { + "inserted": "1", + "removed": "0" + } + }, + "PSU": + { + "psu_present": + { + "i2c": + { + "valmap": { "1":true, "0":false } + }, + "bmc": + { + "valmap": { "Device Present":true, "Device Absent":false } + } + }, + + "psu_power_good": + { + "i2c": + { + "valmap": { "1": true, "0":false } + }, + "bmc": + { + "valmap": { "State Asserted":true, "State Deasserted":false } + } + }, + + "psu_fan_dir": + { + "i2c": + { + "valmap": { "F2B":"EXHAUST", "B2F":"INTAKE" } + } + }, + "DEFAULT_TYPE": "AC", + "PSU_FAN_MAX_SPEED":"30000" + }, + + "FAN": + { + "direction": + { + "bmc": + { + "valmap": {"0": "UNKNOW", "1":"INTAKE", "2":"EXHAUST"} + } + }, + + "present": + { + "i2c": + { + "valmap": {"1":true, "0":false} + }, + "bmc": + { + "valmap": { "0x0280|":true, "0x0180|":false } + } + }, + "FAN_R_MAX_SPEED":"32000", + "FAN_F_MAX_SPEED":"36200" + }, + + "REBOOT_CAUSE": + { + "reboot_cause_file": "/host/reboot-cause/reboot-cause.txt" + } +} diff --git a/device/ufispace/x86_64-ufispace_s9300_32d-r0/pddf/pddf-device.json b/device/ufispace/x86_64-ufispace_s9300_32d-r0/pddf/pddf-device.json new file mode 100644 index 0000000000..28bfa77cf8 --- /dev/null +++ b/device/ufispace/x86_64-ufispace_s9300_32d-r0/pddf/pddf-device.json @@ -0,0 +1,5138 @@ +{ + "PLATFORM": { + "num_psus": 2, + "num_fantrays": 6, + "num_fans_pertray": 2, + "num_ports": 34, + "num_temps": 7, + "pddf_dev_types": { + "description": "PDDF supported devices", + "CPLD": [ + "i2c_cpld" + ], + "PSU": [ + "psu_eeprom", + "psu_pmbus" + ], + "PORT_MODULE": [ + "pddf_xcvr" + ] + }, + "std_perm_kos": [ + "igb", + "i40e" + ], + "std_kos": [ + "i2c_i801", + "i2c_dev", + "i2c_mux_pca954x", + "optoe", + "lm75", + "gpio-pca953x" + ], + "pddf_kos": [ + "pddf_client_module", + "pddf_cpld_module", + "pddf_cpld_driver", + "pddf_mux_module", + "pddf_xcvr_module", + "pddf_xcvr_driver_module", + "pddf_psu_driver_module", + "pddf_psu_module", + "pddf_fan_driver_module", + "pddf_fan_module", + "pddf_led_module", + "pddf_gpio_module" + ], + "custom_kos": [ + "x86-64-ufispace-s9300-32d-lpc", + "x86-64-ufispace-s9300-32d-sys-eeprom", + "pddf_custom_sysstatus_module" + ] + }, + "SYSTEM": { + "dev_info": { + "device_type": "CPU", + "device_name": "ROOT_COMPLEX", + "device_parent": null + }, + "i2c": { + "CONTROLLERS": [ + { + "dev_name": "i2c-0", + "dev": "SMBUS0" + } + ] + } + }, + "SMBUS0": { + "dev_info": { + "device_type": "SMBUS", + "device_name": "SMBUS0", + "device_parent": "SYSTEM" + }, + "i2c": { + "topo_info": { + "dev_addr": "0x0" + }, + "DEVICES": [ + { + "dev": "EEPROM1" + }, + { + "dev": "MUX1" + }, + { + "dev": "MUX2" + }, + { + "dev": "GPIO1" + } + ] + } + }, + "EEPROM1": { + "dev_info": { + "device_type": "EEPROM", + "device_name": "EEPROM1", + "device_parent": "SMBUS0" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x0", + "dev_addr": "0x57", + "dev_type": "sys_eeprom" + }, + "dev_attr": { + "access_mode": "BLOCK" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "TEMP1": { + "dev_info": { + "device_type": "TEMP_SENSOR", + "device_name": "TEMP1", + "device_parent": "SMBUS0" + }, + "dev_attr": { + "display_name": "Temp_CPU_PECI" + }, + "bmc": { + "ipmitool": { + "attr_list": [ + { + "attr_name": "temp1_input", + "bmc_cmd": "ipmitool sensor", + "raw": "0", + "field_name": "TEMP_CPU_PECI", + "field_pos": "3" + }, + { + "attr_name": "temp1_high_crit_threshold", + "bmc_cmd": "ipmitool sensor", + "raw": "0", + "field_name": "TEMP_CPU_PECI", + "field_pos": "20" + }, + { + "attr_name": "temp1_high_threshold", + "bmc_cmd": "ipmitool sensor", + "raw": "0", + "field_name": "TEMP_CPU_PECI", + "field_pos": "18" + }, + { + "attr_name": "temp1_low_threshold", + "bmc_cmd": "ipmitool sensor", + "raw": "0", + "field_name": "TEMP_CPU_PECI", + "field_pos": "16" + } + ] + } + } + }, + "TEMP2": { + "dev_info": { + "device_type": "TEMP_SENSOR", + "device_name": "TEMP2", + "device_parent": "SMBUS0" + }, + "dev_attr": { + "display_name": "Temp_CPU_ENV" + }, + "bmc": { + "ipmitool": { + "attr_list": [ + { + "attr_name": "temp1_input", + "bmc_cmd": "ipmitool sensor", + "raw": "0", + "field_name": "TEMP_CPU_ENV", + "field_pos": "3" + }, + { + "attr_name": "temp1_high_crit_threshold", + "bmc_cmd": "ipmitool sensor", + "raw": "0", + "field_name": "TEMP_CPU_ENV", + "field_pos": "20" + }, + { + "attr_name": "temp1_high_threshold", + "bmc_cmd": "ipmitool sensor", + "raw": "0", + "field_name": "TEMP_CPU_ENV", + "field_pos": "18" + }, + { + "attr_name": "temp1_low_threshold", + "bmc_cmd": "ipmitool sensor", + "raw": "0", + "field_name": "TEMP_CPU_ENV", + "field_pos": "16" + } + ] + } + } + }, + "TEMP3": { + "dev_info": { + "device_type": "TEMP_SENSOR", + "device_name": "TEMP3", + "device_parent": "SMBUS0" + }, + "dev_attr": { + "display_name": "Temp_CPU_ENV2" + }, + "bmc": { + "ipmitool": { + "attr_list": [ + { + "attr_name": "temp1_input", + "bmc_cmd": "ipmitool sensor", + "raw": "0", + "field_name": "TEMP_CPU_ENV_2", + "field_pos": "3" + }, + { + "attr_name": "temp1_high_crit_threshold", + "bmc_cmd": "ipmitool sensor", + "raw": "0", + "field_name": "TEMP_CPU_ENV_2", + "field_pos": "20" + }, + { + "attr_name": "temp1_high_threshold", + "bmc_cmd": "ipmitool sensor", + "raw": "0", + "field_name": "TEMP_CPU_ENV_2", + "field_pos": "18" + }, + { + "attr_name": "temp1_low_threshold", + "bmc_cmd": "ipmitool sensor", + "raw": "0", + "field_name": "TEMP_CPU_ENV_2", + "field_pos": "16" + } + ] + } + } + }, + "TEMP4": { + "dev_info": { + "device_type": "TEMP_SENSOR", + "device_name": "TEMP4", + "device_parent": "SMBUS0" + }, + "dev_attr": { + "display_name": "Temp_MAC_ENV" + }, + "bmc": { + "ipmitool": { + "attr_list": [ + { + "attr_name": "temp1_input", + "bmc_cmd": "ipmitool sensor", + "raw": "0", + "field_name": "TEMP_MAC_ENV", + "field_pos": "3" + }, + { + "attr_name": "temp1_high_crit_threshold", + "bmc_cmd": "ipmitool sensor", + "raw": "0", + "field_name": "TEMP_MAC_ENV", + "field_pos": "20" + }, + { + "attr_name": "temp1_high_threshold", + "bmc_cmd": "ipmitool sensor", + "raw": "0", + "field_name": "TEMP_MAC_ENV", + "field_pos": "18" + }, + { + "attr_name": "temp1_low_threshold", + "bmc_cmd": "ipmitool sensor", + "raw": "0", + "field_name": "TEMP_MAC_ENV", + "field_pos": "16" + } + ] + } + } + }, + "TEMP5": { + "dev_info": { + "device_type": "TEMP_SENSOR", + "device_name": "TEMP5", + "device_parent": "SMBUS0" + }, + "dev_attr": { + "display_name": "Temp_MAC_DIE" + }, + "bmc": { + "ipmitool": { + "attr_list": [ + { + "attr_name": "temp1_input", + "bmc_cmd": "ipmitool sensor", + "raw": "0", + "field_name": "TEMP_MAC_DIE", + "field_pos": "3" + }, + { + "attr_name": "temp1_high_crit_threshold", + "bmc_cmd": "ipmitool sensor", + "raw": "0", + "field_name": "TEMP_MAC_DIE", + "field_pos": "20" + }, + { + "attr_name": "temp1_high_threshold", + "bmc_cmd": "ipmitool sensor", + "raw": "0", + "field_name": "TEMP_MAC_DIE", + "field_pos": "18" + }, + { + "attr_name": "temp1_low_threshold", + "bmc_cmd": "ipmitool sensor", + "raw": "0", + "field_name": "TEMP_MAC_DIE", + "field_pos": "16" + } + ] + } + } + }, + "TEMP6": { + "dev_info": { + "device_type": "TEMP_SENSOR", + "device_name": "TEMP6", + "device_parent": "SMBUS0" + }, + "dev_attr": { + "display_name": "Temp_CAGE" + }, + "bmc": { + "ipmitool": { + "attr_list": [ + { + "attr_name": "temp1_input", + "bmc_cmd": "ipmitool sensor", + "raw": "0", + "field_name": "TEMP_CAGE", + "field_pos": "3" + }, + { + "attr_name": "temp1_high_crit_threshold", + "bmc_cmd": "ipmitool sensor", + "raw": "0", + "field_name": "TEMP_CAGE", + "field_pos": "20" + }, + { + "attr_name": "temp1_high_threshold", + "bmc_cmd": "ipmitool sensor", + "raw": "0", + "field_name": "TEMP_CAGE", + "field_pos": "18" + }, + { + "attr_name": "temp1_low_threshold", + "bmc_cmd": "ipmitool sensor", + "raw": "0", + "field_name": "TEMP_CAGE", + "field_pos": "16" + } + ] + } + } + }, + "TEMP7": { + "dev_info": { + "device_type": "TEMP_SENSOR", + "device_name": "TEMP7", + "device_parent": "SMBUS0" + }, + "dev_attr": { + "display_name": "Temp_PSU_CONNTOR" + }, + "bmc": { + "ipmitool": { + "attr_list": [ + { + "attr_name": "temp1_input", + "bmc_cmd": "ipmitool sensor", + "raw": "0", + "field_name": "TEMP_PSU_CONN", + "field_pos": "3" + }, + { + "attr_name": "temp1_high_crit_threshold", + "bmc_cmd": "ipmitool sensor", + "raw": "0", + "field_name": "TEMP_PSU_CONN", + "field_pos": "20" + }, + { + "attr_name": "temp1_high_threshold", + "bmc_cmd": "ipmitool sensor", + "raw": "0", + "field_name": "TEMP_PSU_CONN", + "field_pos": "18" + }, + { + "attr_name": "temp1_low_threshold", + "bmc_cmd": "ipmitool sensor", + "raw": "0", + "field_name": "TEMP_PSU_CONN", + "field_pos": "16" + } + ] + } + } + }, + "MUX1": { + "dev_info": { + "device_type": "MUX", + "device_name": "MUX1", + "device_parent": "SMBUS0" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x0", + "dev_addr": "0x73", + "dev_type": "pca9548" + }, + "dev_attr": { + "virt_bus": "0x1", + "idle_state": "-2" + }, + "channel": [ + { + "chn": "1", + "dev": "CPLD1" + }, + { + "chn": "1", + "dev": "CPLD2" + }, + { + "chn": "1", + "dev": "CPLD3" + }, + { + "chn": "4", + "dev": "GPIO2" + } + ] + } + }, + "MUX2": { + "dev_info": { + "device_type": "MUX", + "device_name": "MUX2", + "device_parent": "SMBUS0" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x0", + "dev_addr": "0x72", + "dev_type": "pca9548" + }, + "dev_attr": { + "virt_bus": "0x9", + "idle_state": "-2" + }, + "channel": [ + { + "chn": "0", + "dev": "MUX3" + }, + { + "chn": "1", + "dev": "MUX4" + }, + { + "chn": "2", + "dev": "MUX5" + }, + { + "chn": "3", + "dev": "MUX6" + }, + { + "chn": "4", + "dev": "PORT33" + }, + { + "chn": "5", + "dev": "PORT34" + } + ] + } + }, + "MUX3": { + "dev_info": { + "device_type": "MUX", + "device_name": "MUX3", + "device_parent": "MUX2" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x9", + "dev_addr": "0x76", + "dev_type": "pca9548" + }, + "dev_attr": { + "virt_bus": "0x11", + "idle_state": "-2" + }, + "channel": [ + { + "chn": "0", + "dev": "PORT1" + }, + { + "chn": "1", + "dev": "PORT2" + }, + { + "chn": "2", + "dev": "PORT3" + }, + { + "chn": "3", + "dev": "PORT4" + }, + { + "chn": "4", + "dev": "PORT5" + }, + { + "chn": "5", + "dev": "PORT6" + }, + { + "chn": "6", + "dev": "PORT7" + }, + { + "chn": "7", + "dev": "PORT8" + } + ] + } + }, + "MUX4": { + "dev_info": { + "device_type": "MUX", + "device_name": "MUX4", + "device_parent": "MUX2" + }, + "i2c": { + "topo_info": { + "parent_bus": "0xa", + "dev_addr": "0x76", + "dev_type": "pca9548" + }, + "dev_attr": { + "virt_bus": "0x19", + "idle_state": "-2" + }, + "channel": [ + { + "chn": "0", + "dev": "PORT9" + }, + { + "chn": "1", + "dev": "PORT10" + }, + { + "chn": "2", + "dev": "PORT11" + }, + { + "chn": "3", + "dev": "PORT12" + }, + { + "chn": "4", + "dev": "PORT13" + }, + { + "chn": "5", + "dev": "PORT14" + }, + { + "chn": "6", + "dev": "PORT15" + }, + { + "chn": "7", + "dev": "PORT16" + } + ] + } + }, + "MUX5": { + "dev_info": { + "device_type": "MUX", + "device_name": "MUX5", + "device_parent": "MUX2" + }, + "i2c": { + "topo_info": { + "parent_bus": "0xb", + "dev_addr": "0x76", + "dev_type": "pca9548" + }, + "dev_attr": { + "virt_bus": "0x21", + "idle_state": "-2" + }, + "channel": [ + { + "chn": "0", + "dev": "PORT17" + }, + { + "chn": "1", + "dev": "PORT18" + }, + { + "chn": "2", + "dev": "PORT19" + }, + { + "chn": "3", + "dev": "PORT20" + }, + { + "chn": "4", + "dev": "PORT21" + }, + { + "chn": "5", + "dev": "PORT22" + }, + { + "chn": "6", + "dev": "PORT23" + }, + { + "chn": "7", + "dev": "PORT24" + } + ] + } + }, + "MUX6": { + "dev_info": { + "device_type": "MUX", + "device_name": "MUX6", + "device_parent": "MUX2" + }, + "i2c": { + "topo_info": { + "parent_bus": "0xc", + "dev_addr": "0x76", + "dev_type": "pca9548" + }, + "dev_attr": { + "virt_bus": "0x29", + "idle_state": "-2" + }, + "channel": [ + { + "chn": "0", + "dev": "PORT25" + }, + { + "chn": "1", + "dev": "PORT26" + }, + { + "chn": "2", + "dev": "PORT27" + }, + { + "chn": "3", + "dev": "PORT28" + }, + { + "chn": "4", + "dev": "PORT29" + }, + { + "chn": "5", + "dev": "PORT30" + }, + { + "chn": "6", + "dev": "PORT31" + }, + { + "chn": "7", + "dev": "PORT32" + } + ] + } + }, + "GPIO1": { + "dev_info": { + "device_type": "GPIO", + "device_name": "GPIO1", + "device_parent": "SMBUS0" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x0", + "dev_addr": "0x77", + "dev_type": "pca9539" + }, + "dev_attr": { + "gpio_base": "0x1f0" + }, + "ports": [ + { + "port_num": "0", + "direction": "in", + "value": "", + "edge": "", + "active_low": "" + }, + { + "port_num": "1", + "direction": "in", + "value": "", + "edge": "", + "active_low": "" + }, + { + "port_num": "2", + "direction": "in", + "value": "", + "edge": "", + "active_low": "" + }, + { + "port_num": "3", + "direction": "in", + "value": "", + "edge": "", + "active_low": "" + }, + { + "port_num": "4", + "direction": "in", + "value": "", + "edge": "", + "active_low": "" + }, + { + "port_num": "5", + "direction": "in", + "value": "", + "edge": "", + "active_low": "" + }, + { + "port_num": "6", + "direction": "in", + "value": "", + "edge": "", + "active_low": "" + }, + { + "port_num": "7", + "direction": "in", + "value": "", + "edge": "", + "active_low": "" + }, + { + "port_num": "8", + "direction": "in", + "value": "", + "edge": "", + "active_low": "" + }, + { + "port_num": "9", + "direction": "in", + "value": "", + "edge": "", + "active_low": "" + }, + { + "port_num": "10", + "direction": "in", + "value": "", + "edge": "", + "active_low": "" + }, + { + "port_num": "11", + "direction": "in", + "value": "", + "edge": "", + "active_low": "" + }, + { + "port_num": "12", + "direction": "in", + "value": "", + "edge": "", + "active_low": "" + }, + { + "port_num": "13", + "direction": "in", + "value": "", + "edge": "", + "active_low": "" + }, + { + "port_num": "14", + "direction": "in", + "value": "", + "edge": "", + "active_low": "" + }, + { + "port_num": "15", + "direction": "in", + "value": "", + "edge": "", + "active_low": "" + } + ] + } + }, + "GPIO2": { + "dev_info": { + "device_type": "GPIO", + "device_name": "GPIO2", + "device_parent": "MUX1" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x6", + "dev_addr": "0x76", + "dev_type": "pca9539" + }, + "dev_attr": { + "gpio_base": "0x1e0" + }, + "ports": [ + { + "port_num": "0", + "direction": "in", + "value": "", + "edge": "", + "active_low": "" + }, + { + "port_num": "1", + "direction": "in", + "value": "", + "edge": "", + "active_low": "" + }, + { + "port_num": "2", + "direction": "in", + "value": "", + "edge": "", + "active_low": "" + }, + { + "port_num": "3", + "direction": "in", + "value": "", + "edge": "", + "active_low": "" + }, + { + "port_num": "4", + "direction": "in", + "value": "", + "edge": "", + "active_low": "" + }, + { + "port_num": "5", + "direction": "in", + "value": "", + "edge": "", + "active_low": "" + }, + { + "port_num": "6", + "direction": "in", + "value": "", + "edge": "", + "active_low": "" + }, + { + "port_num": "7", + "direction": "in", + "value": "", + "edge": "", + "active_low": "" + }, + { + "port_num": "8", + "direction": "in", + "value": "", + "edge": "", + "active_low": "" + }, + { + "port_num": "9", + "direction": "in", + "value": "", + "edge": "", + "active_low": "" + }, + { + "port_num": "10", + "direction": "in", + "value": "", + "edge": "", + "active_low": "" + }, + { + "port_num": "11", + "direction": "in", + "value": "", + "edge": "", + "active_low": "" + }, + { + "port_num": "12", + "direction": "in", + "value": "", + "edge": "", + "active_low": "" + }, + { + "port_num": "13", + "direction": "in", + "value": "", + "edge": "", + "active_low": "" + }, + { + "port_num": "14", + "direction": "in", + "value": "", + "edge": "", + "active_low": "" + }, + { + "port_num": "15", + "direction": "in", + "value": "", + "edge": "", + "active_low": "" + } + ] + } + }, + "CPLD1": { + "dev_info": { + "device_type": "CPLD", + "device_name": "CPLD1", + "device_parent": "MUX1" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x2", + "dev_addr": "0x30", + "dev_type": "i2c_cpld" + }, + "dev_attr": {} + } + }, + "CPLD2": { + "dev_info": { + "device_type": "CPLD", + "device_name": "CPLD2", + "device_parent": "MUX1" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x2", + "dev_addr": "0x31", + "dev_type": "i2c_cpld" + }, + "dev_attr": {} + } + }, + "CPLD3": { + "dev_info": { + "device_type": "CPLD", + "device_name": "CPLD3", + "device_parent": "MUX1" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x2", + "dev_addr": "0x32", + "dev_type": "i2c_cpld" + }, + "dev_attr": {} + } + }, + "SYSSTATUS": { + "dev_info": { + "device_type": "SYSSTAT", + "device_name": "SYSSTATUS" + }, + "dev_attr": {}, + "attr_list": [ + { + "attr_name": "board_info", + "attr_devaddr": "0x30", + "attr_offset": "0x0", + "attr_mask": "0xff", + "attr_len": "0x1" + }, + { + "attr_name": "cpld1_version", + "attr_devaddr": "0x30", + "attr_offset": "0x2", + "attr_mask": "0xff", + "attr_len": "0x1" + }, + { + "attr_name": "cpld2_version", + "attr_devaddr": "0x31", + "attr_offset": "0x2", + "attr_mask": "0xff", + "attr_len": "0x1" + }, + { + "attr_name": "cpld3_version", + "attr_devaddr": "0x32", + "attr_offset": "0x2", + "attr_mask": "0xff", + "attr_len": "0x1" + }, + { + "attr_name": "mac_reset", + "attr_devaddr": "0x30", + "attr_offset": "0x40", + "attr_mask": "0xff", + "attr_len": "0x1" + }, + { + "attr_name": "mux_reset", + "attr_devaddr": "0x30", + "attr_offset": "0x46", + "attr_mask": "0xff", + "attr_len": "0x1" + }, + { + "attr_name": "psu_status", + "attr_devaddr": "0x30", + "attr_offset": "0x51", + "attr_mask": "0xff", + "attr_len": "0x1" + }, + { + "attr_name": "system_led_0", + "attr_devaddr": "0x30", + "attr_offset": "0x80", + "attr_mask": "0xff", + "attr_len": "0x1" + }, + { + "attr_name": "system_led_1", + "attr_devaddr": "0x30", + "attr_offset": "0x81", + "attr_mask": "0xff", + "attr_len": "0x1" + }, + { + "attr_name": "beacon_led", + "attr_devaddr": "0x30", + "attr_offset": "0x84", + "attr_mask": "0xff", + "attr_len": "0x1" + }, + { + "attr_name": "port_led_clr_ctrl", + "attr_devaddr": "0x30", + "attr_offset": "0x85", + "attr_mask": "0xff", + "attr_len": "0x1" + } + ] + }, + "PSU1": { + "dev_info": { + "device_type": "PSU", + "device_name": "PSU1", + "device_parent": "SMBUS0" + }, + "dev_attr": { + "dev_idx": "1", + "num_psu_fans": "1" + }, + "i2c": { + "interface": [] + }, + "bmc": { + "ipmitool": { + "attr_list": [ + { + "attr_name": "psu_present", + "bmc_cmd": "ipmitool sdr -c get PSU0_PRSNT_L | sed -e 's/,,/,N\\/A,/g' -e 's/,,/,N\\/A,/g'", + "raw": "0", + "field_name": "PSU0_PRSNT_L", + "field_pos": "5", + "separator": "," + }, + { + "attr_name": "psu_power_good", + "bmc_cmd": "ipmitool sdr -c get PSU0_PWROK_H | sed -e 's/,,/,N\\/A,/g' -e 's/,,/,N\\/A,/g'", + "raw": "0", + "field_name": "PSU0_PWROK_H", + "field_pos": "5", + "separator": "," + }, + { + "attr_name": "psu_v_out", + "bmc_cmd": "ipmitool sdr -c get PSU0_VOUT | sed -e 's/,,/,N\\/A,/g' -e 's/,,/,N\\/A,/g'", + "raw": "0", + "field_name": "PSU0_VOUT", + "field_pos": "2", + "mult": "1000", + "separator": "," + }, + { + "attr_name": "psu_i_out", + "bmc_cmd": "ipmitool sdr -c get PSU0_IOUT | sed -e 's/,,/,N\\/A,/g' -e 's/,,/,N\\/A,/g'", + "raw": "0", + "field_name": "PSU0_IOUT", + "field_pos": "2", + "mult": "1000", + "separator": "," + }, + { + "attr_name": "psu_v_in", + "bmc_cmd": "ipmitool sdr get -c PSU0_VIN | sed -e 's/,,/,N\\/A,/g' -e 's/,,/,N\\/A,/g'", + "raw": "0", + "separator": ",", + "field_name": "PSU0_VIN", + "field_pos": "2", + "mult": "1000" + }, + { + "attr_name": "psu_i_in", + "bmc_cmd": "ipmitool sdr get -c PSU0_IIN | sed -e 's/,,/,N\\/A,/g' -e 's/,,/,N\\/A,/g'", + "raw": "0", + "separator": ",", + "field_name": "PSU0_IIN", + "field_pos": "2", + "mult": "1000" + }, + { + "attr_name": "psu_temp1_input", + "bmc_cmd": "ipmitool sdr -c get PSU0_TEMP | sed -e 's/,,/,N\\/A,/g' -e 's/,,/,N\\/A,/g'", + "raw": "0", + "field_name": "PSU0_TEMP", + "field_pos": "2", + "mult": "1000", + "separator": "," + }, + { + "attr_name": "psu_fan1_speed_rpm", + "bmc_cmd": "ipmitool sdr -c get PSU0_FAN1 | sed -e 's/,,/,N\\/A,/g' -e 's/,,/,N\\/A,/g'", + "raw": "0", + "field_name": "PSU0_FAN1", + "field_pos": "2", + "separator": "," + }, + { + "attr_name": "psu_mfr_id", + "bmc_cmd": "_rv=$(ipmitool fru print 1 2>/dev/null | tr -s ' ' | cut -d' ' -f3-5 | grep 'Manufacturer') && echo $_rv || echo 'Manufacturer : N/A'", + "raw": "0", + "separator": ":", + "field_name": "Manufacturer", + "field_pos": "2" + }, + { + "attr_name": "psu_model_name", + "bmc_cmd": "_rv=$(ipmitool fru print 1 2>/dev/null | tr -s ' ' | cut -d' ' -f3-5 | grep 'Name') && echo $_rv || echo 'Name : N/A'", + "raw": "0", + "separator": ":", + "field_name": "Name", + "field_pos": "2" + }, + { + "attr_name": "psu_serial_num", + "bmc_cmd": "_rv=$(ipmitool fru print 1 2>/dev/null | tr -s ' ' | cut -d' ' -f3-5 | grep 'Serial') && echo $_rv || echo 'Serial : N/A'", + "raw": "0", + "separator": ":", + "field_name": "Serial", + "field_pos": "2" + }, + { + "attr_name": "psu_fan1_dir", + "bmc_cmd": "ipmitool raw 0x3c 0x30 0x0 | xargs | cut -d' ' -f1", + "raw": "1", + "type": "raw" + } + ] + } + } + }, + "PSU2": { + "dev_info": { + "device_type": "PSU", + "device_name": "PSU2", + "device_parent": "SMBUS0" + }, + "dev_attr": { + "dev_idx": "2", + "num_psu_fans": "1" + }, + "i2c": { + "interface": [] + }, + "bmc": { + "ipmitool": { + "attr_list": [ + { + "attr_name": "psu_present", + "bmc_cmd": "ipmitool sdr -c get PSU1_PRSNT_L | sed -e 's/,,/,N\\/A,/g' -e 's/,,/,N\\/A,/g'", + "raw": "0", + "field_name": "PSU1_PRSNT_L", + "field_pos": "5", + "separator": "," + }, + { + "attr_name": "psu_power_good", + "bmc_cmd": "ipmitool sdr -c get PSU1_PWROK_H | sed -e 's/,,/,N\\/A,/g' -e 's/,,/,N\\/A,/g'", + "raw": "0", + "field_name": "PSU1_PWROK_H", + "field_pos": "5", + "separator": "," + }, + { + "attr_name": "psu_v_out", + "bmc_cmd": "ipmitool sdr -c get PSU1_VOUT | sed -e 's/,,/,N\\/A,/g' -e 's/,,/,N\\/A,/g'", + "raw": "0", + "field_name": "PSU1_VOUT", + "field_pos": "2", + "mult": "1000", + "separator": "," + }, + { + "attr_name": "psu_i_out", + "bmc_cmd": "ipmitool sdr -c get PSU1_IOUT | sed -e 's/,,/,N\\/A,/g' -e 's/,,/,N\\/A,/g'", + "raw": "0", + "field_name": "PSU1_IOUT", + "field_pos": "2", + "mult": "1000", + "separator": "," + }, + { + "attr_name": "psu_v_in", + "bmc_cmd": "ipmitool sdr get -c PSU1_VIN | sed -e 's/,,/,N\\/A,/g' -e 's/,,/,N\\/A,/g'", + "raw": "0", + "separator": ",", + "field_name": "PSU1_VIN", + "field_pos": "2", + "mult": "1000" + }, + { + "attr_name": "psu_i_in", + "bmc_cmd": "ipmitool sdr get -c PSU1_IIN | sed -e 's/,,/,N\\/A,/g' -e 's/,,/,N\\/A,/g'", + "raw": "0", + "separator": ",", + "field_name": "PSU1_IIN", + "field_pos": "2", + "mult": "1000" + }, + { + "attr_name": "psu_temp1_input", + "bmc_cmd": "ipmitool sdr -c get PSU1_TEMP | sed -e 's/,,/,N\\/A,/g' -e 's/,,/,N\\/A,/g'", + "raw": "0", + "field_name": "PSU1_TEMP", + "field_pos": "2", + "mult": "1000", + "separator": "," + }, + { + "attr_name": "psu_fan1_speed_rpm", + "bmc_cmd": "ipmitool sdr -c get PSU1_FAN1 | sed -e 's/,,/,N\\/A,/g' -e 's/,,/,N\\/A,/g'", + "raw": "0", + "field_name": "PSU1_FAN1", + "field_pos": "2", + "separator": "," + }, + { + "attr_name": "psu_mfr_id", + "bmc_cmd": "_rv=$(ipmitool fru print 2 2>/dev/null | tr -s ' ' | cut -d' ' -f3-5 | grep 'Manufacturer') && echo $_rv || echo 'Manufacturer : N/A'", + "raw": "0", + "separator": ":", + "field_name": "Manufacturer", + "field_pos": "2" + }, + { + "attr_name": "psu_model_name", + "bmc_cmd": "_rv=$(ipmitool fru print 2 2>/dev/null | tr -s ' ' | cut -d' ' -f3-5 | grep 'Name') && echo $_rv || echo 'Name : N/A'", + "raw": "0", + "separator": ":", + "field_name": "Name", + "field_pos": "2" + }, + { + "attr_name": "psu_serial_num", + "bmc_cmd": "_rv=$(ipmitool fru print 2 2>/dev/null | tr -s ' ' | cut -d' ' -f3-5 | grep 'Serial') && echo $_rv || echo 'Serial : N/A'", + "raw": "0", + "separator": ":", + "field_name": "Serial", + "field_pos": "2" + }, + { + "attr_name": "psu_fan1_dir", + "bmc_cmd": "ipmitool raw 0x3c 0x30 0x0 | xargs | cut -d' ' -f2", + "raw": "1", + "type": "raw" + } + ] + } + } + }, + "FAN-CTRL": { + "dev_info": { + "device_type": "FAN", + "device_name": "FAN-CTRL", + "device_parent": "" + }, + "bmc": { + "ipmitool": { + "attr_list": [ + { + "attr_name": "fan1_present", + "bmc_cmd": "ipmitool sensor", + "raw": "0", + "field_name": "FAN0_PSNT_L", + "field_pos": "7" + }, + { + "attr_name": "fan2_present", + "bmc_cmd": "ipmitool sensor", + "raw": "0", + "field_name": "FAN1_PSNT_L", + "field_pos": "7" + }, + { + "attr_name": "fan3_present", + "bmc_cmd": "ipmitool sensor", + "raw": "0", + "field_name": "FAN2_PSNT_L", + "field_pos": "7" + }, + { + "attr_name": "fan4_present", + "bmc_cmd": "ipmitool sensor", + "raw": "0", + "field_name": "FAN3_PSNT_L", + "field_pos": "7" + }, + { + "attr_name": "fan5_present", + "bmc_cmd": "ipmitool sensor", + "raw": "0", + "field_name": "FAN4_PSNT_L", + "field_pos": "7" + }, + { + "attr_name": "fan6_present", + "bmc_cmd": "ipmitool sensor", + "raw": "0", + "field_name": "FAN5_PSNT_L", + "field_pos": "7" + }, + { + "attr_name": "fan1_f_speed_rpm", + "bmc_cmd": "ipmitool sensor", + "raw": "0", + "field_name": "FAN0_RPM_F", + "field_pos": "3" + }, + { + "attr_name": "fan1_r_speed_rpm", + "bmc_cmd": "ipmitool sensor", + "raw": "0", + "field_name": "FAN0_RPM_R", + "field_pos": "3" + }, + { + "attr_name": "fan2_f_speed_rpm", + "bmc_cmd": "ipmitool sensor", + "raw": "0", + "field_name": "FAN1_RPM_F", + "field_pos": "3" + }, + { + "attr_name": "fan2_r_speed_rpm", + "bmc_cmd": "ipmitool sensor", + "raw": "0", + "field_name": "FAN1_RPM_R", + "field_pos": "3" + }, + { + "attr_name": "fan3_f_speed_rpm", + "bmc_cmd": "ipmitool sensor", + "raw": "0", + "field_name": "FAN2_RPM_F", + "field_pos": "3" + }, + { + "attr_name": "fan3_r_speed_rpm", + "bmc_cmd": "ipmitool sensor", + "raw": "0", + "field_name": "FAN2_RPM_R", + "field_pos": "3" + }, + { + "attr_name": "fan4_f_speed_rpm", + "bmc_cmd": "ipmitool sensor", + "raw": "0", + "field_name": "FAN3_RPM_F", + "field_pos": "3" + }, + { + "attr_name": "fan4_r_speed_rpm", + "bmc_cmd": "ipmitool sensor", + "raw": "0", + "field_name": "FAN3_RPM_R", + "field_pos": "3" + }, + { + "attr_name": "fan5_f_speed_rpm", + "bmc_cmd": "ipmitool sensor", + "raw": "0", + "field_name": "FAN4_RPM_F", + "field_pos": "3" + }, + { + "attr_name": "fan5_r_speed_rpm", + "bmc_cmd": "ipmitool sensor", + "raw": "0", + "field_name": "FAN4_RPM_R", + "field_pos": "3" + }, + { + "attr_name": "fan6_f_speed_rpm", + "bmc_cmd": "ipmitool sensor", + "raw": "0", + "field_name": "FAN5_RPM_F", + "field_pos": "3" + }, + { + "attr_name": "fan6_r_speed_rpm", + "bmc_cmd": "ipmitool sensor", + "raw": "0", + "field_name": "FAN5_RPM_R", + "field_pos": "3" + }, + { + "attr_name": "fan1_dir", + "bmc_cmd": "ipmitool raw 0x3c 0x31 0x0 | xargs | cut -d' ' -f1", + "raw": "1", + "type": "raw" + }, + { + "attr_name": "fan2_dir", + "bmc_cmd": "ipmitool raw 0x3c 0x31 0x0 | xargs | cut -d' ' -f2", + "raw": "1", + "type": "raw" + }, + { + "attr_name": "fan3_dir", + "bmc_cmd": "ipmitool raw 0x3c 0x31 0x0 | xargs | cut -d' ' -f3", + "raw": "1", + "type": "raw" + }, + { + "attr_name": "fan4_dir", + "bmc_cmd": "ipmitool raw 0x3c 0x31 0x0 | xargs | cut -d' ' -f4", + "raw": "1", + "type": "raw" + }, + { + "attr_name": "fan5_dir", + "bmc_cmd": "ipmitool raw 0x3c 0x31 0x0 | xargs | cut -d' ' -f5", + "raw": "1", + "type": "raw" + }, + { + "attr_name": "fan6_dir", + "bmc_cmd": "ipmitool raw 0x3c 0x31 0x0 | xargs | cut -d' ' -f6", + "raw": "1", + "type": "raw" + } + ] + } + } + }, + "SYS_LED": { + "dev_info": { + "device_type": "LED", + "device_name": "SYS_LED" + }, + "dev_attr": { + "index": "0", + "flag": "ro" + }, + "i2c": { + "attr_list": [ + { + "attr_name": "green", + "bits": "7:4", + "descr": "Green", + "value": "0x09;0x0b", + "swpld_addr": "0x30", + "swpld_addr_offset": "0x80" + }, + { + "attr_name": "green_blink", + "bits": "7:4", + "descr": "Green Blinking", + "value": "0x0d;0x0f", + "swpld_addr": "0x30", + "swpld_addr_offset": "0x80" + }, + { + "attr_name": "yellow", + "bits": "7:4", + "descr": "Yellow", + "value": "0x08;0x0a", + "swpld_addr": "0x30", + "swpld_addr_offset": "0x80" + }, + { + "attr_name": "yellow_blink", + "bits": "7:4", + "descr": "Yellow Blinking", + "value": "0x0c;0x0e", + "swpld_addr": "0x30", + "swpld_addr_offset": "0x80" + }, + { + "attr_name": "off", + "bits": "7", + "descr": "Off", + "value": "0x0", + "swpld_addr": "0x30", + "swpld_addr_offset": "0x80" + } + ] + } + }, + "FAN_LED": { + "dev_info": { + "device_type": "LED", + "device_name": "FAN_LED" + }, + "dev_attr": { + "index": "0", + "flag": "ro" + }, + "i2c": { + "attr_list": [ + { + "attr_name": "green", + "bits": "3:0", + "descr": "Green", + "value": "0x09;0x0b", + "swpld_addr": "0x30", + "swpld_addr_offset": "0x80" + }, + { + "attr_name": "green_blink", + "bits": "3:0", + "descr": "Green Blinking", + "value": "0x0d;0x0f", + "swpld_addr": "0x30", + "swpld_addr_offset": "0x80" + }, + { + "attr_name": "yellow", + "bits": "3:0", + "descr": "Yellow", + "value": "0x08;0x0a", + "swpld_addr": "0x30", + "swpld_addr_offset": "0x80" + }, + { + "attr_name": "yellow_blink", + "bits": "3:0", + "descr": "Yellow Blinking", + "value": "0x0c;0x0e", + "swpld_addr": "0x30", + "swpld_addr_offset": "0x80" + }, + { + "attr_name": "off", + "bits": "3", + "descr": "Off", + "value": "0x0", + "swpld_addr": "0x30", + "swpld_addr_offset": "0x80" + } + ] + } + }, + "PSU1_LED": { + "dev_info": { + "device_type": "LED", + "device_name": "PSU_LED" + }, + "dev_attr": { + "index": "0", + "flag": "ro" + }, + "i2c": { + "attr_list": [ + { + "attr_name": "green", + "bits": "3:0", + "descr": "Green", + "value": "0x09;0x0b", + "swpld_addr": "0x30", + "swpld_addr_offset": "0x81" + }, + { + "attr_name": "green_blink", + "bits": "3:0", + "descr": "Green Blinking", + "value": "0x0d;0x0f", + "swpld_addr": "0x30", + "swpld_addr_offset": "0x81" + }, + { + "attr_name": "yellow", + "bits": "3:0", + "descr": "Yellow", + "value": "0x08;0x0a", + "swpld_addr": "0x30", + "swpld_addr_offset": "0x81" + }, + { + "attr_name": "yellow_blink", + "bits": "3:0", + "descr": "Yellow Blinking", + "value": "0x0c;0x0e", + "swpld_addr": "0x30", + "swpld_addr_offset": "0x81" + }, + { + "attr_name": "off", + "bits": "3", + "descr": "Off", + "value": "0x0", + "swpld_addr": "0x30", + "swpld_addr_offset": "0x81" + } + ] + } + }, + "PSU2_LED": { + "dev_info": { + "device_type": "LED", + "device_name": "PSU_LED" + }, + "dev_attr": { + "index": "1", + "flag": "ro" + }, + "i2c": { + "attr_list": [ + { + "attr_name": "green", + "bits": "7:4", + "descr": "Green", + "value": "0x09;0x0b", + "swpld_addr": "0x30", + "swpld_addr_offset": "0x81" + }, + { + "attr_name": "green_blink", + "bits": "7:4", + "descr": "Green Blinking", + "value": "0x0d;0x0f", + "swpld_addr": "0x30", + "swpld_addr_offset": "0x81" + }, + { + "attr_name": "yellow", + "bits": "7:4", + "descr": "Yellow", + "value": "0x08;0x0a", + "swpld_addr": "0x30", + "swpld_addr_offset": "0x81" + }, + { + "attr_name": "yellow_blink", + "bits": "7:4", + "descr": "Yellow Blinking", + "value": "0x0c;0x0e", + "swpld_addr": "0x30", + "swpld_addr_offset": "0x81" + }, + { + "attr_name": "off", + "bits": "7", + "descr": "Off", + "value": "0x0", + "swpld_addr": "0x30", + "swpld_addr_offset": "0x81" + } + ] + } + }, + "LOC_LED": { + "dev_info": { + "device_type": "LED", + "device_name": "LOC_LED" + }, + "dev_attr": { + "index": "0", + "flag": "rw" + }, + "i2c": { + "attr_list": [ + { + "attr_name": "blue", + "bits": "2:1", + "descr": "Blue", + "value": "0x02", + "swpld_addr": "0x30", + "swpld_addr_offset": "0x84" + }, + { + "attr_name": "blue_blink", + "bits": "2:1", + "descr": "Blue Blinking", + "value": "0x03", + "swpld_addr": "0x30", + "swpld_addr_offset": "0x84" + }, + { + "attr_name": "off", + "bits": "2", + "descr": "Off", + "value": "0x0", + "swpld_addr": "0x30", + "swpld_addr_offset": "0x84" + } + ] + } + }, + "PORT1": { + "dev_info": { + "device_type": "QSFP-DD", + "device_name": "PORT1", + "device_parent": "MUX3" + }, + "dev_attr": { + "dev_idx": "1" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT1-EEPROM" + }, + { + "itf": "control", + "dev": "PORT1-CTRL" + } + ] + } + }, + "PORT1-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT1-EEPROM", + "device_parent": "MUX3", + "virt_parent": "PORT1" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x11", + "dev_addr": "0x50", + "dev_type": "optoe3" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT1-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT1-CTRL", + "device_parent": "MUX3", + "virt_parent": "PORT1" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x11", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_intr_status", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x10", + "attr_mask": "0", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x14", + "attr_mask": "0", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x40", + "attr_mask": "0", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_lpmode", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x44", + "attr_mask": "0", + "attr_cmpval": "0x1", + "attr_len": "1" + } + ] + } + }, + "PORT2": { + "dev_info": { + "device_type": "QSFP-DD", + "device_name": "PORT2", + "device_parent": "MUX3" + }, + "dev_attr": { + "dev_idx": "2" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT2-EEPROM" + }, + { + "itf": "control", + "dev": "PORT2-CTRL" + } + ] + } + }, + "PORT2-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT2-EEPROM", + "device_parent": "MUX3", + "virt_parent": "PORT2" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x12", + "dev_addr": "0x50", + "dev_type": "optoe3" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT2-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT2-CTRL", + "device_parent": "MUX3", + "virt_parent": "PORT2" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x12", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_intr_status", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x10", + "attr_mask": "1", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x14", + "attr_mask": "1", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x40", + "attr_mask": "1", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_lpmode", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x44", + "attr_mask": "1", + "attr_cmpval": "0x2", + "attr_len": "1" + } + ] + } + }, + "PORT3": { + "dev_info": { + "device_type": "QSFP-DD", + "device_name": "PORT3", + "device_parent": "MUX3" + }, + "dev_attr": { + "dev_idx": "3" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT3-EEPROM" + }, + { + "itf": "control", + "dev": "PORT3-CTRL" + } + ] + } + }, + "PORT3-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT3-EEPROM", + "device_parent": "MUX3", + "virt_parent": "PORT3" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x13", + "dev_addr": "0x50", + "dev_type": "optoe3" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT3-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT3-CTRL", + "device_parent": "MUX3", + "virt_parent": "PORT3" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x13", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_intr_status", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x10", + "attr_mask": "2", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x14", + "attr_mask": "2", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x40", + "attr_mask": "2", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_lpmode", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x44", + "attr_mask": "2", + "attr_cmpval": "0x4", + "attr_len": "1" + } + ] + } + }, + "PORT4": { + "dev_info": { + "device_type": "QSFP-DD", + "device_name": "PORT4", + "device_parent": "MUX3" + }, + "dev_attr": { + "dev_idx": "4" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT4-EEPROM" + }, + { + "itf": "control", + "dev": "PORT4-CTRL" + } + ] + } + }, + "PORT4-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT4-EEPROM", + "device_parent": "MUX3", + "virt_parent": "PORT4" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x14", + "dev_addr": "0x50", + "dev_type": "optoe3" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT4-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT4-CTRL", + "device_parent": "MUX3", + "virt_parent": "PORT4" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x14", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_intr_status", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x10", + "attr_mask": "3", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x14", + "attr_mask": "3", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x40", + "attr_mask": "3", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_lpmode", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x44", + "attr_mask": "3", + "attr_cmpval": "0x8", + "attr_len": "1" + } + ] + } + }, + "PORT5": { + "dev_info": { + "device_type": "QSFP-DD", + "device_name": "PORT5", + "device_parent": "MUX3" + }, + "dev_attr": { + "dev_idx": "5" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT5-EEPROM" + }, + { + "itf": "control", + "dev": "PORT5-CTRL" + } + ] + } + }, + "PORT5-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT5-EEPROM", + "device_parent": "MUX3", + "virt_parent": "PORT5" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x15", + "dev_addr": "0x50", + "dev_type": "optoe3" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT5-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT5-CTRL", + "device_parent": "MUX3", + "virt_parent": "PORT5" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x15", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_intr_status", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x10", + "attr_mask": "4", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x14", + "attr_mask": "4", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x40", + "attr_mask": "4", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_lpmode", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x44", + "attr_mask": "4", + "attr_cmpval": "0x10", + "attr_len": "1" + } + ] + } + }, + "PORT6": { + "dev_info": { + "device_type": "QSFP-DD", + "device_name": "PORT6", + "device_parent": "MUX3" + }, + "dev_attr": { + "dev_idx": "6" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT6-EEPROM" + }, + { + "itf": "control", + "dev": "PORT6-CTRL" + } + ] + } + }, + "PORT6-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT6-EEPROM", + "device_parent": "MUX3", + "virt_parent": "PORT6" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x16", + "dev_addr": "0x50", + "dev_type": "optoe3" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT6-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT6-CTRL", + "device_parent": "MUX3", + "virt_parent": "PORT6" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x16", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_intr_status", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x10", + "attr_mask": "5", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x14", + "attr_mask": "5", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x40", + "attr_mask": "5", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_lpmode", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x44", + "attr_mask": "5", + "attr_cmpval": "0x20", + "attr_len": "1" + } + ] + } + }, + "PORT7": { + "dev_info": { + "device_type": "QSFP-DD", + "device_name": "PORT7", + "device_parent": "MUX3" + }, + "dev_attr": { + "dev_idx": "7" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT7-EEPROM" + }, + { + "itf": "control", + "dev": "PORT7-CTRL" + } + ] + } + }, + "PORT7-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT7-EEPROM", + "device_parent": "MUX3", + "virt_parent": "PORT7" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x17", + "dev_addr": "0x50", + "dev_type": "optoe3" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT7-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT7-CTRL", + "device_parent": "MUX3", + "virt_parent": "PORT7" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x17", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_intr_status", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x10", + "attr_mask": "6", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x14", + "attr_mask": "6", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x40", + "attr_mask": "6", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_lpmode", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x44", + "attr_mask": "6", + "attr_cmpval": "0x40", + "attr_len": "1" + } + ] + } + }, + "PORT8": { + "dev_info": { + "device_type": "QSFP-DD", + "device_name": "PORT8", + "device_parent": "MUX3" + }, + "dev_attr": { + "dev_idx": "8" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT8-EEPROM" + }, + { + "itf": "control", + "dev": "PORT8-CTRL" + } + ] + } + }, + "PORT8-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT8-EEPROM", + "device_parent": "MUX3", + "virt_parent": "PORT8" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x18", + "dev_addr": "0x50", + "dev_type": "optoe3" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT8-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT8-CTRL", + "device_parent": "MUX3", + "virt_parent": "PORT8" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x18", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_intr_status", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x10", + "attr_mask": "7", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x14", + "attr_mask": "7", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x40", + "attr_mask": "7", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_lpmode", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x44", + "attr_mask": "7", + "attr_cmpval": "0x80", + "attr_len": "1" + } + ] + } + }, + "PORT9": { + "dev_info": { + "device_type": "QSFP-DD", + "device_name": "PORT9", + "device_parent": "MUX4" + }, + "dev_attr": { + "dev_idx": "9" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT9-EEPROM" + }, + { + "itf": "control", + "dev": "PORT9-CTRL" + } + ] + } + }, + "PORT9-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT9-EEPROM", + "device_parent": "MUX4", + "virt_parent": "PORT9" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x19", + "dev_addr": "0x50", + "dev_type": "optoe3" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT9-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT9-CTRL", + "device_parent": "MUX4", + "virt_parent": "PORT9" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x19", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_intr_status", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x11", + "attr_mask": "0", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x15", + "attr_mask": "0", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x41", + "attr_mask": "0", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_lpmode", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x45", + "attr_mask": "0", + "attr_cmpval": "0x1", + "attr_len": "1" + } + ] + } + }, + "PORT10": { + "dev_info": { + "device_type": "QSFP-DD", + "device_name": "PORT10", + "device_parent": "MUX4" + }, + "dev_attr": { + "dev_idx": "10" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT10-EEPROM" + }, + { + "itf": "control", + "dev": "PORT10-CTRL" + } + ] + } + }, + "PORT10-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT10-EEPROM", + "device_parent": "MUX4", + "virt_parent": "PORT10" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x1a", + "dev_addr": "0x50", + "dev_type": "optoe3" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT10-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT10-CTRL", + "device_parent": "MUX4", + "virt_parent": "PORT10" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x1a", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_intr_status", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x11", + "attr_mask": "1", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x15", + "attr_mask": "1", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x41", + "attr_mask": "1", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_lpmode", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x45", + "attr_mask": "1", + "attr_cmpval": "0x2", + "attr_len": "1" + } + ] + } + }, + "PORT11": { + "dev_info": { + "device_type": "QSFP-DD", + "device_name": "PORT11", + "device_parent": "MUX4" + }, + "dev_attr": { + "dev_idx": "11" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT11-EEPROM" + }, + { + "itf": "control", + "dev": "PORT11-CTRL" + } + ] + } + }, + "PORT11-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT11-EEPROM", + "device_parent": "MUX4", + "virt_parent": "PORT11" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x1b", + "dev_addr": "0x50", + "dev_type": "optoe3" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT11-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT11-CTRL", + "device_parent": "MUX4", + "virt_parent": "PORT11" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x1b", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_intr_status", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x11", + "attr_mask": "2", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x15", + "attr_mask": "2", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x41", + "attr_mask": "2", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_lpmode", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x45", + "attr_mask": "2", + "attr_cmpval": "0x4", + "attr_len": "1" + } + ] + } + }, + "PORT12": { + "dev_info": { + "device_type": "QSFP-DD", + "device_name": "PORT12", + "device_parent": "MUX4" + }, + "dev_attr": { + "dev_idx": "12" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT12-EEPROM" + }, + { + "itf": "control", + "dev": "PORT12-CTRL" + } + ] + } + }, + "PORT12-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT12-EEPROM", + "device_parent": "MUX4", + "virt_parent": "PORT12" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x1c", + "dev_addr": "0x50", + "dev_type": "optoe3" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT12-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT12-CTRL", + "device_parent": "MUX4", + "virt_parent": "PORT12" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x1c", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_intr_status", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x11", + "attr_mask": "3", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x15", + "attr_mask": "3", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x41", + "attr_mask": "3", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_lpmode", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x45", + "attr_mask": "3", + "attr_cmpval": "0x8", + "attr_len": "1" + } + ] + } + }, + "PORT13": { + "dev_info": { + "device_type": "QSFP-DD", + "device_name": "PORT13", + "device_parent": "MUX4" + }, + "dev_attr": { + "dev_idx": "13" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT13-EEPROM" + }, + { + "itf": "control", + "dev": "PORT13-CTRL" + } + ] + } + }, + "PORT13-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT13-EEPROM", + "device_parent": "MUX4", + "virt_parent": "PORT13" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x1d", + "dev_addr": "0x50", + "dev_type": "optoe3" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT13-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT13-CTRL", + "device_parent": "MUX4", + "virt_parent": "PORT13" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x1d", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_intr_status", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x11", + "attr_mask": "4", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x15", + "attr_mask": "4", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x41", + "attr_mask": "4", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_lpmode", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x45", + "attr_mask": "4", + "attr_cmpval": "0x10", + "attr_len": "1" + } + ] + } + }, + "PORT14": { + "dev_info": { + "device_type": "QSFP-DD", + "device_name": "PORT14", + "device_parent": "MUX4" + }, + "dev_attr": { + "dev_idx": "14" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT14-EEPROM" + }, + { + "itf": "control", + "dev": "PORT14-CTRL" + } + ] + } + }, + "PORT14-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT14-EEPROM", + "device_parent": "MUX4", + "virt_parent": "PORT14" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x1e", + "dev_addr": "0x50", + "dev_type": "optoe3" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT14-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT14-CTRL", + "device_parent": "MUX4", + "virt_parent": "PORT14" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x1e", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_intr_status", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x11", + "attr_mask": "5", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x15", + "attr_mask": "5", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x41", + "attr_mask": "5", + "attr_cmpval": "0x20", + "attr_len": "1" + }, + { + "attr_name": "xcvr_lpmode", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x45", + "attr_mask": "5", + "attr_cmpval": "0x20", + "attr_len": "1" + } + ] + } + }, + "PORT15": { + "dev_info": { + "device_type": "QSFP-DD", + "device_name": "PORT15", + "device_parent": "MUX4" + }, + "dev_attr": { + "dev_idx": "15" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT15-EEPROM" + }, + { + "itf": "control", + "dev": "PORT15-CTRL" + } + ] + } + }, + "PORT15-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT15-EEPROM", + "device_parent": "MUX4", + "virt_parent": "PORT15" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x1f", + "dev_addr": "0x50", + "dev_type": "optoe3" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT15-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT15-CTRL", + "device_parent": "MUX4", + "virt_parent": "PORT15" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x1f", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_intr_status", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x11", + "attr_mask": "6", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x15", + "attr_mask": "6", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x41", + "attr_mask": "6", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_lpmode", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x45", + "attr_mask": "6", + "attr_cmpval": "0x40", + "attr_len": "1" + } + ] + } + }, + "PORT16": { + "dev_info": { + "device_type": "QSFP-DD", + "device_name": "PORT16", + "device_parent": "MUX4" + }, + "dev_attr": { + "dev_idx": "16" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT16-EEPROM" + }, + { + "itf": "control", + "dev": "PORT16-CTRL" + } + ] + } + }, + "PORT16-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT16-EEPROM", + "device_parent": "MUX4", + "virt_parent": "PORT16" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x20", + "dev_addr": "0x50", + "dev_type": "optoe3" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT16-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT16-CTRL", + "device_parent": "MUX4", + "virt_parent": "PORT16" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x20", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_intr_status", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x11", + "attr_mask": "7", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x15", + "attr_mask": "7", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x41", + "attr_mask": "7", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_lpmode", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x45", + "attr_mask": "7", + "attr_cmpval": "0x80", + "attr_len": "1" + } + ] + } + }, + "PORT17": { + "dev_info": { + "device_type": "QSFP-DD", + "device_name": "PORT17", + "device_parent": "MUX5" + }, + "dev_attr": { + "dev_idx": "17" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT17-EEPROM" + }, + { + "itf": "control", + "dev": "PORT17-CTRL" + } + ] + } + }, + "PORT17-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT17-EEPROM", + "device_parent": "MUX5", + "virt_parent": "PORT17" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x21", + "dev_addr": "0x50", + "dev_type": "optoe3" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT17-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT17-CTRL", + "device_parent": "MUX5", + "virt_parent": "PORT17" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x21", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_intr_status", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x12", + "attr_mask": "0", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x16", + "attr_mask": "0", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x42", + "attr_mask": "0", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_lpmode", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x46", + "attr_mask": "0", + "attr_cmpval": "0x1", + "attr_len": "1" + } + ] + } + }, + "PORT18": { + "dev_info": { + "device_type": "QSFP-DD", + "device_name": "PORT18", + "device_parent": "MUX5" + }, + "dev_attr": { + "dev_idx": "18" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT18-EEPROM" + }, + { + "itf": "control", + "dev": "PORT18-CTRL" + } + ] + } + }, + "PORT18-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT18-EEPROM", + "device_parent": "MUX5", + "virt_parent": "PORT18" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x22", + "dev_addr": "0x50", + "dev_type": "optoe3" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT18-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT18-CTRL", + "device_parent": "MUX5", + "virt_parent": "PORT18" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x22", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_intr_status", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x12", + "attr_mask": "1", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x16", + "attr_mask": "1", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x42", + "attr_mask": "1", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_lpmode", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x46", + "attr_mask": "1", + "attr_cmpval": "0x2", + "attr_len": "1" + } + ] + } + }, + "PORT19": { + "dev_info": { + "device_type": "QSFP-DD", + "device_name": "PORT19", + "device_parent": "MUX5" + }, + "dev_attr": { + "dev_idx": "19" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT19-EEPROM" + }, + { + "itf": "control", + "dev": "PORT19-CTRL" + } + ] + } + }, + "PORT19-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT19-EEPROM", + "device_parent": "MUX5", + "virt_parent": "PORT19" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x23", + "dev_addr": "0x50", + "dev_type": "optoe3" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT19-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT19-CTRL", + "device_parent": "MUX5", + "virt_parent": "PORT19" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x23", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_intr_status", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x12", + "attr_mask": "2", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x16", + "attr_mask": "2", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x42", + "attr_mask": "2", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_lpmode", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x46", + "attr_mask": "2", + "attr_cmpval": "0x4", + "attr_len": "1" + } + ] + } + }, + "PORT20": { + "dev_info": { + "device_type": "QSFP-DD", + "device_name": "PORT20", + "device_parent": "MUX5" + }, + "dev_attr": { + "dev_idx": "20" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT20-EEPROM" + }, + { + "itf": "control", + "dev": "PORT20-CTRL" + } + ] + } + }, + "PORT20-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT20-EEPROM", + "device_parent": "MUX5", + "virt_parent": "PORT20" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x24", + "dev_addr": "0x50", + "dev_type": "optoe3" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT20-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT20-CTRL", + "device_parent": "MUX5", + "virt_parent": "PORT20" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x24", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_intr_status", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x12", + "attr_mask": "3", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x16", + "attr_mask": "3", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x42", + "attr_mask": "3", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_lpmode", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x46", + "attr_mask": "3", + "attr_cmpval": "0x8", + "attr_len": "1" + } + ] + } + }, + "PORT21": { + "dev_info": { + "device_type": "QSFP-DD", + "device_name": "PORT21", + "device_parent": "MUX5" + }, + "dev_attr": { + "dev_idx": "21" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT21-EEPROM" + }, + { + "itf": "control", + "dev": "PORT21-CTRL" + } + ] + } + }, + "PORT21-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT21-EEPROM", + "device_parent": "MUX5", + "virt_parent": "PORT21" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x25", + "dev_addr": "0x50", + "dev_type": "optoe3" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT21-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT21-CTRL", + "device_parent": "MUX5", + "virt_parent": "PORT21" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x25", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_intr_status", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x12", + "attr_mask": "4", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x16", + "attr_mask": "4", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x42", + "attr_mask": "4", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_lpmode", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x46", + "attr_mask": "4", + "attr_cmpval": "0x10", + "attr_len": "1" + } + ] + } + }, + "PORT22": { + "dev_info": { + "device_type": "QSFP-DD", + "device_name": "PORT22", + "device_parent": "MUX5" + }, + "dev_attr": { + "dev_idx": "22" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT22-EEPROM" + }, + { + "itf": "control", + "dev": "PORT22-CTRL" + } + ] + } + }, + "PORT22-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT22-EEPROM", + "device_parent": "MUX5", + "virt_parent": "PORT22" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x26", + "dev_addr": "0x50", + "dev_type": "optoe3" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT22-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT22-CTRL", + "device_parent": "MUX5", + "virt_parent": "PORT22" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x26", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_intr_status", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x12", + "attr_mask": "5", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x16", + "attr_mask": "5", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x42", + "attr_mask": "5", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_lpmode", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x46", + "attr_mask": "5", + "attr_cmpval": "0x20", + "attr_len": "1" + } + ] + } + }, + "PORT23": { + "dev_info": { + "device_type": "QSFP-DD", + "device_name": "PORT23", + "device_parent": "MUX5" + }, + "dev_attr": { + "dev_idx": "23" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT23-EEPROM" + }, + { + "itf": "control", + "dev": "PORT23-CTRL" + } + ] + } + }, + "PORT23-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT23-EEPROM", + "device_parent": "MUX5", + "virt_parent": "PORT23" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x27", + "dev_addr": "0x50", + "dev_type": "optoe3" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT23-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT23-CTRL", + "device_parent": "MUX5", + "virt_parent": "PORT23" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x27", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_intr_status", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x12", + "attr_mask": "6", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x16", + "attr_mask": "6", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x42", + "attr_mask": "6", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_lpmode", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x46", + "attr_mask": "6", + "attr_cmpval": "0x40", + "attr_len": "1" + } + ] + } + }, + "PORT24": { + "dev_info": { + "device_type": "QSFP-DD", + "device_name": "PORT24", + "device_parent": "MUX5" + }, + "dev_attr": { + "dev_idx": "24" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT24-EEPROM" + }, + { + "itf": "control", + "dev": "PORT24-CTRL" + } + ] + } + }, + "PORT24-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT24-EEPROM", + "device_parent": "MUX5", + "virt_parent": "PORT24" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x28", + "dev_addr": "0x50", + "dev_type": "optoe3" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT24-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT24-CTRL", + "device_parent": "MUX5", + "virt_parent": "PORT24" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x28", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_intr_status", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x12", + "attr_mask": "7", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x16", + "attr_mask": "7", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x42", + "attr_mask": "7", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_lpmode", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x46", + "attr_mask": "7", + "attr_cmpval": "0x80", + "attr_len": "1" + } + ] + } + }, + "PORT25": { + "dev_info": { + "device_type": "QSFP-DD", + "device_name": "PORT25", + "device_parent": "MUX6" + }, + "dev_attr": { + "dev_idx": "25" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT25-EEPROM" + }, + { + "itf": "control", + "dev": "PORT25-CTRL" + } + ] + } + }, + "PORT25-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT25-EEPROM", + "device_parent": "MUX6", + "virt_parent": "PORT25" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x29", + "dev_addr": "0x50", + "dev_type": "optoe3" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT25-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT25-CTRL", + "device_parent": "MUX6", + "virt_parent": "PORT25" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x29", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_intr_status", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x13", + "attr_mask": "0", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x17", + "attr_mask": "0", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x43", + "attr_mask": "0", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_lpmode", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x47", + "attr_mask": "0", + "attr_cmpval": "0x1", + "attr_len": "1" + } + ] + } + }, + "PORT26": { + "dev_info": { + "device_type": "QSFP-DD", + "device_name": "PORT26", + "device_parent": "MUX6" + }, + "dev_attr": { + "dev_idx": "26" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT26-EEPROM" + }, + { + "itf": "control", + "dev": "PORT26-CTRL" + } + ] + } + }, + "PORT26-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT26-EEPROM", + "device_parent": "MUX6", + "virt_parent": "PORT26" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x2a", + "dev_addr": "0x50", + "dev_type": "optoe3" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT26-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT26-CTRL", + "device_parent": "MUX6", + "virt_parent": "PORT26" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x2a", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_intr_status", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x13", + "attr_mask": "1", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x17", + "attr_mask": "1", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x43", + "attr_mask": "1", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_lpmode", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x47", + "attr_mask": "1", + "attr_cmpval": "0x2", + "attr_len": "1" + } + ] + } + }, + "PORT27": { + "dev_info": { + "device_type": "QSFP-DD", + "device_name": "PORT27", + "device_parent": "MUX6" + }, + "dev_attr": { + "dev_idx": "27" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT27-EEPROM" + }, + { + "itf": "control", + "dev": "PORT27-CTRL" + } + ] + } + }, + "PORT27-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT27-EEPROM", + "device_parent": "MUX6", + "virt_parent": "PORT27" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x2b", + "dev_addr": "0x50", + "dev_type": "optoe3" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT27-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT27-CTRL", + "device_parent": "MUX6", + "virt_parent": "PORT27" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x2b", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_intr_status", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x13", + "attr_mask": "2", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x17", + "attr_mask": "2", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x43", + "attr_mask": "2", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_lpmode", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x47", + "attr_mask": "2", + "attr_cmpval": "0x4", + "attr_len": "1" + } + ] + } + }, + "PORT28": { + "dev_info": { + "device_type": "QSFP-DD", + "device_name": "PORT28", + "device_parent": "MUX6" + }, + "dev_attr": { + "dev_idx": "28" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT28-EEPROM" + }, + { + "itf": "control", + "dev": "PORT28-CTRL" + } + ] + } + }, + "PORT28-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT28-EEPROM", + "device_parent": "MUX6", + "virt_parent": "PORT28" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x2c", + "dev_addr": "0x50", + "dev_type": "optoe3" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT28-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT28-CTRL", + "device_parent": "MUX6", + "virt_parent": "PORT28" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x2c", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_intr_status", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x13", + "attr_mask": "3", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x17", + "attr_mask": "3", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x43", + "attr_mask": "3", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_lpmode", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x47", + "attr_mask": "3", + "attr_cmpval": "0x8", + "attr_len": "1" + } + ] + } + }, + "PORT29": { + "dev_info": { + "device_type": "QSFP-DD", + "device_name": "PORT29", + "device_parent": "MUX6" + }, + "dev_attr": { + "dev_idx": "29" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT29-EEPROM" + }, + { + "itf": "control", + "dev": "PORT29-CTRL" + } + ] + } + }, + "PORT29-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT29-EEPROM", + "device_parent": "MUX6", + "virt_parent": "PORT29" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x2d", + "dev_addr": "0x50", + "dev_type": "optoe3" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT29-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT29-CTRL", + "device_parent": "MUX6", + "virt_parent": "PORT29" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x2d", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_intr_status", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x13", + "attr_mask": "4", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x17", + "attr_mask": "4", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x43", + "attr_mask": "4", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_lpmode", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x47", + "attr_mask": "4", + "attr_cmpval": "0x10", + "attr_len": "1" + } + ] + } + }, + "PORT30": { + "dev_info": { + "device_type": "QSFP-DD", + "device_name": "PORT30", + "device_parent": "MUX6" + }, + "dev_attr": { + "dev_idx": "30" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT30-EEPROM" + }, + { + "itf": "control", + "dev": "PORT30-CTRL" + } + ] + } + }, + "PORT30-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT30-EEPROM", + "device_parent": "MUX6", + "virt_parent": "PORT30" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x2e", + "dev_addr": "0x50", + "dev_type": "optoe3" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT30-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT30-CTRL", + "device_parent": "MUX6", + "virt_parent": "PORT30" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x2e", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_intr_status", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x13", + "attr_mask": "5", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x17", + "attr_mask": "5", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x43", + "attr_mask": "5", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_lpmode", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x47", + "attr_mask": "5", + "attr_cmpval": "0x20", + "attr_len": "1" + } + ] + } + }, + "PORT31": { + "dev_info": { + "device_type": "QSFP-DD", + "device_name": "PORT31", + "device_parent": "MUX6" + }, + "dev_attr": { + "dev_idx": "31" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT31-EEPROM" + }, + { + "itf": "control", + "dev": "PORT31-CTRL" + } + ] + } + }, + "PORT31-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT31-EEPROM", + "device_parent": "MUX6", + "virt_parent": "PORT31" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x2f", + "dev_addr": "0x50", + "dev_type": "optoe3" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT31-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT31-CTRL", + "device_parent": "MUX6", + "virt_parent": "PORT31" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x2f", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_intr_status", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x13", + "attr_mask": "6", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x17", + "attr_mask": "6", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x43", + "attr_mask": "6", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_lpmode", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x47", + "attr_mask": "6", + "attr_cmpval": "0x40", + "attr_len": "1" + } + ] + } + }, + "PORT32": { + "dev_info": { + "device_type": "QSFP-DD", + "device_name": "PORT32", + "device_parent": "MUX6" + }, + "dev_attr": { + "dev_idx": "32" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT32-EEPROM" + }, + { + "itf": "control", + "dev": "PORT32-CTRL" + } + ] + } + }, + "PORT32-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT32-EEPROM", + "device_parent": "MUX6", + "virt_parent": "PORT32" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x30", + "dev_addr": "0x50", + "dev_type": "optoe3" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT32-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT32-CTRL", + "device_parent": "MUX6", + "virt_parent": "PORT32" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x30", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_intr_status", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x13", + "attr_mask": "7", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x17", + "attr_mask": "7", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x43", + "attr_mask": "7", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_lpmode", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x47", + "attr_mask": "7", + "attr_cmpval": "0x80", + "attr_len": "1" + } + ] + } + }, + "PORT33": { + "dev_info": { + "device_type": "SFP", + "device_name": "PORT33", + "device_parent": "MUX2" + }, + "dev_attr": { + "dev_idx": "33" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT33-EEPROM" + }, + { + "itf": "control", + "dev": "PORT33-CTRL" + } + ] + } + }, + "PORT33-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT33", + "device_parent": "MUX2", + "virt_parent": "PORT33" + }, + "i2c": { + "topo_info": { + "parent_bus": "0xd", + "dev_addr": "0x50", + "dev_type": "optoe2" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT33-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT33-CTRL", + "device_parent": "MUX2", + "virt_parent": "PORT33" + }, + "i2c": { + "topo_info": { + "parent_bus": "0xd", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x1e", + "attr_mask": "2", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_rxlos", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x1f", + "attr_mask": "2", + "attr_cmpval": "0x4", + "attr_len": "1" + }, + { + "attr_name": "xcvr_txfault", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x1d", + "attr_mask": "2", + "attr_cmpval": "0x4", + "attr_len": "1" + }, + { + "attr_name": "xcvr_txdisable", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x55", + "attr_mask": "2", + "attr_cmpval": "0x0", + "attr_len": "1" + } + ] + } + }, + "PORT34": { + "dev_info": { + "device_type": "SFP", + "device_name": "PORT34", + "device_parent": "MUX2" + }, + "dev_attr": { + "dev_idx": "34" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT34-EEPROM" + }, + { + "itf": "control", + "dev": "PORT34-CTRL" + } + ] + } + }, + "PORT34-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT34", + "device_parent": "MUX2", + "virt_parent": "PORT34" + }, + "i2c": { + "topo_info": { + "parent_bus": "0xe", + "dev_addr": "0x50", + "dev_type": "optoe2" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT34-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT34-CTRL", + "device_parent": "MUX2", + "virt_parent": "PORT34" + }, + "i2c": { + "topo_info": { + "parent_bus": "0xe", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x1e", + "attr_mask": "3", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_rxlos", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x1f", + "attr_mask": "3", + "attr_cmpval": "0x8", + "attr_len": "1" + }, + { + "attr_name": "xcvr_txfault", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x1d", + "attr_mask": "3", + "attr_cmpval": "0x8", + "attr_len": "1" + }, + { + "attr_name": "xcvr_txdisable", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x55", + "attr_mask": "3", + "attr_cmpval": "0x0", + "attr_len": "1" + } + ] + } + } +} diff --git a/device/ufispace/x86_64-ufispace_s9300_32d-r0/pddf_support b/device/ufispace/x86_64-ufispace_s9300_32d-r0/pddf_support new file mode 100644 index 0000000000..e69de29bb2 diff --git a/device/ufispace/x86_64-ufispace_s9300_32d-r0/platform.json b/device/ufispace/x86_64-ufispace_s9300_32d-r0/platform.json new file mode 100644 index 0000000000..71a41880e6 --- /dev/null +++ b/device/ufispace/x86_64-ufispace_s9300_32d-r0/platform.json @@ -0,0 +1,659 @@ +{ + "chassis": { + "name": "S9300-32D", + "components": [ + { + "name": "CPLD1" + }, + { + "name": "CPLD2" + }, + { + "name": "CPLD3" + }, + { + "name": "BIOS" + }, + { + "name": "BMC" + } + ], + "fans": [ + { + "name": "Fantray1_1" + }, + { + "name": "Fantray1_2" + }, + { + "name": "Fantray2_1" + }, + { + "name": "Fantray2_2" + }, + { + "name": "Fantray3_1" + }, + { + "name": "Fantray3_2" + }, + { + "name": "Fantray4_1" + }, + { + "name": "Fantray4_2" + }, + { + "name": "Fantray5_1" + }, + { + "name": "Fantray5_2" + }, + { + "name": "Fantray6_1" + }, + { + "name": "Fantray6_2" + } + ], + "fan_drawers":[ + { + "name": "Fantray1", + "num_fans" : 2, + "fans": [ + { + "name": "Fantray1_1" + }, + { + "name": "Fantray1_2" + } + ] + }, + { + "name": "Fantray2", + "num_fans" : 2, + "fans": [ + { + "name": "Fantray2_1" + }, + { + "name": "Fantray2_2" + } + ] + }, + { + "name": "Fantray3", + "num_fans" : 2, + "fans": [ + { + "name": "Fantray3_1" + }, + { + "name": "Fantray3_2" + } + ] + }, + { + "name": "Fantray4", + "num_fans" : 2, + "fans": [ + { + "name": "Fantray4_1" + }, + { + "name": "Fantray4_2" + } + ] + }, + { + "name": "Fantray5", + "num_fans" : 2, + "fans": [ + { + "name": "Fantray5_1" + }, + { + "name": "Fantray5_2" + } + ] + }, + { + "name": "Fantray6", + "num_fans" : 2, + "fans": [ + { + "name": "Fantray6_1" + }, + { + "name": "Fantray6_2" + } + ] + } + ], + "psus": [ + { + "name": "PSU1", + "fans": [ + { + "name": "PSU1_FAN1" + } + ], + "thermals": [ + { + "name": "PSU1_TEMP1" + } + ] + }, + { + "name": "PSU2", + "fans": [ + { + "name": "PSU2_FAN1" + } + ], + "thermals": [ + { + "name": "PSU2_TEMP1" + } + ] + } + ], + "thermals": [ + { + "name": "Temp_CPU_PECI" + }, + { + "name": "Temp_CPU_ENV" + }, + { + "name": "Temp_CPU_ENV2" + }, + { + "name": "Temp_CPU_PECI" + }, + { + "name": "Temp_MAC_DIE" + }, + { + "name": "Temp_MAC_ENV" + }, + { + "name": "Temp_PSU_CONNTOR" + } + ], + "sfps": [ + { + "name": "Ethernet0" + }, + { + "name": "Ethernet8" + }, + { + "name": "Ethernet16" + }, + { + "name": "Ethernet24" + }, + { + "name": "Ethernet32" + }, + { + "name": "Ethernet40" + }, + { + "name": "Ethernet48" + }, + { + "name": "Ethernet56" + }, + { + "name": "Ethernet64" + }, + { + "name": "Ethernet72" + }, + { + "name": "Ethernet80" + }, + { + "name": "Ethernet88" + }, + { + "name": "Ethernet96" + }, + { + "name": "Ethernet104" + }, + { + "name": "Ethernet112" + }, + { + "name": "Ethernet120" + }, + { + "name": "Ethernet128" + }, + { + "name": "Ethernet136" + }, + { + "name": "Ethernet144" + }, + { + "name": "Ethernet152" + }, + { + "name": "Ethernet160" + }, + { + "name": "Ethernet168" + }, + { + "name": "Ethernet176" + }, + { + "name": "Ethernet184" + }, + { + "name": "Ethernet192" + }, + { + "name": "Ethernet200" + }, + { + "name": "Ethernet208" + }, + { + "name": "Ethernet216" + }, + { + "name": "Ethernet224" + }, + { + "name": "Ethernet232" + }, + { + "name": "Ethernet240" + }, + { + "name": "Ethernet248" + }, + { + "name": "Ethernet256" + }, + { + "name": "Ethernet257" + } + ] + }, + "interfaces": { + "Ethernet0": { + "index": "0,0,0,0,0,0,0,0", + "lanes": "1,2,3,4,5,6,7,8", + "breakout_modes": { + "1x400G": ["Eth0(Port0)"], + "2x200G": ["Eth0/1(Port0)", "Eth0/2(Port0)"], + "4x100G": ["Eth0/1(Port0)", "Eth0/2(Port0)", "Eth0/3(Port0)", "Eth0/4(Port0)"], + "8x50G": ["Eth0/1(Port0)", "Eth0/2(Port0)", "Eth0/3(Port0)", "Eth0/4(Port0)", "Eth0/5(Port0)", "Eth0/6(Port0)", "Eth0/7(Port0)", "Eth0/8(Port0)"] + } + }, + + "Ethernet8": { + "index": "1,1,1,1,1,1,1,1", + "lanes": "9,10,11,12,13,14,15,16", + "breakout_modes": { + "1x400G": ["Eth1(Port1)"], + "2x200G": ["Eth1/1(Port1)", "Eth1/2(Port1)"], + "4x100G": ["Eth1/1(Port1)", "Eth1/2(Port1)", "Eth1/3(Port1)", "Eth1/4(Port1)"], + "8x50G": ["Eth1/1(Port1)", "Eth1/2(Port1)", "Eth1/3(Port1)", "Eth1/4(Port1)", "Eth1/5(Port1)", "Eth1/6(Port1)", "Eth1/7(Port1)", "Eth1/8(Port1)"] + } + }, + + "Ethernet16": { + "index": "2,2,2,2,2,2,2,2", + "lanes": "17,18,19,20,21,22,23,24", + "breakout_modes": { + "1x400G": ["Eth2(Port2)"], + "2x200G": ["Eth2/1(Port2)", "Eth2/2(Port2)"], + "4x100G": ["Eth2/1(Port2)", "Eth2/2(Port2)", "Eth2/3(Port2)", "Eth2/4(Port2)"], + "8x50G": ["Eth2/1(Port2)", "Eth2/2(Port2)", "Eth2/3(Port2)", "Eth2/4(Port2)", "Eth2/5(Port2)", "Eth2/6(Port2)", "Eth2/7(Port2)", "Eth2/8(Port2)"] + } + }, + + "Ethernet24": { + "index": "3,3,3,3,3,3,3,3", + "lanes": "25,26,27,28,29,30,31,32", + "breakout_modes": { + "1x400G": ["Eth3(Port3)"], + "2x200G": ["Eth3/1(Port3)", "Eth3/2(Port3)"], + "4x100G": ["Eth3/1(Port3)", "Eth3/2(Port3)", "Eth3/3(Port3)", "Eth3/4(Port3)"], + "8x50G": ["Eth3/1(Port3)", "Eth3/2(Port3)", "Eth3/3(Port3)", "Eth3/4(Port3)", "Eth3/5(Port3)", "Eth3/6(Port3)", "Eth3/7(Port3)", "Eth3/8(Port3)"] + } + }, + + "Ethernet32": { + "index": "4,4,4,4,4,4,4,4", + "lanes": "33,34,35,36,37,38,39,40", + "breakout_modes": { + "1x400G": ["Eth4(Port4)"], + "2x200G": ["Eth4/1(Port4)", "Eth4/2(Port4)"], + "4x100G": ["Eth4/1(Port4)", "Eth4/2(Port4)", "Eth4/3(Port4)", "Eth4/4(Port4)"], + "8x50G": ["Eth4/1(Port4)", "Eth4/2(Port4)", "Eth4/3(Port4)", "Eth4/4(Port4)", "Eth4/5(Port4)", "Eth4/6(Port4)", "Eth4/7(Port4)", "Eth4/8(Port4)"] + } + }, + + "Ethernet40": { + "index": "5,5,5,5,5,5,5,5", + "lanes": "41,42,43,44,45,46,47,48", + "breakout_modes": { + "1x400G": ["Eth5(Port5)"], + "2x200G": ["Eth5/1(Port5)", "Eth5/2(Port5)"], + "4x100G": ["Eth5/1(Port5)", "Eth5/2(Port5)", "Eth5/3(Port5)", "Eth5/4(Port5)"], + "8x50G": ["Eth5/1(Port5)", "Eth5/2(Port5)", "Eth5/3(Port5)", "Eth5/4(Port5)", "Eth5/5(Port5)", "Eth5/6(Port5)", "Eth5/7(Port5)", "Eth5/8(Port5)"] + } + }, + + "Ethernet48": { + "index": "6,6,6,6,6,6,6,6", + "lanes": "49,50,51,52,53,54,55,56", + "breakout_modes": { + "1x400G": ["Eth6(Port6)"], + "2x200G": ["Eth6/1(Port6)", "Eth6/2(Port6)"], + "4x100G": ["Eth6/1(Port6)", "Eth6/2(Port6)", "Eth6/3(Port6)", "Eth6/4(Port6)"], + "8x50G": ["Eth6/1(Port6)", "Eth6/2(Port6)", "Eth6/3(Port6)", "Eth6/4(Port6)", "Eth6/5(Port6)", "Eth6/6(Port6)", "Eth6/7(Port6)", "Eth6/8(Port6)"] + } + }, + + "Ethernet56": { + "index": "7,7,7,7,7,7,7,7", + "lanes": "57,58,59,60,61,62,63,64", + "breakout_modes": { + "1x400G": ["Eth7(Port7)"], + "2x200G": ["Eth7/1(Port7)", "Eth7/2(Port7)"], + "4x100G": ["Eth7/1(Port7)", "Eth7/2(Port7)", "Eth7/3(Port7)", "Eth7/4(Port7)"], + "8x50G": ["Eth7/1(Port7)", "Eth7/2(Port7)", "Eth7/3(Port7)", "Eth7/4(Port7)", "Eth7/5(Port7)", "Eth7/6(Port7)", "Eth7/7(Port7)", "Eth7/8(Port7)"] + } + }, + + "Ethernet64": { + "index": "8,8,8,8,8,8,8,8", + "lanes": "65,66,67,68,69,70,71,72", + "breakout_modes": { + "1x400G": ["Eth8(Port8)"], + "2x200G": ["Eth8/1(Port8)", "Eth8/2(Port8)"], + "4x100G": ["Eth8/1(Port8)", "Eth8/2(Port8)", "Eth8/3(Port8)", "Eth8/4(Port8)"], + "8x50G": ["Eth8/1(Port8)", "Eth8/2(Port8)", "Eth8/3(Port8)", "Eth8/4(Port8)", "Eth8/5(Port8)", "Eth8/6(Port8)", "Eth8/7(Port8)", "Eth8/8(Port8)"] + } + }, + + "Ethernet72": { + "index": "9,9,9,9,9,9,9,9", + "lanes": "73,74,75,76,77,78,79,80", + "breakout_modes": { + "1x400G": ["Eth9(Port9)"], + "2x200G": ["Eth9/1(Port9)", "Eth9/2(Port9)"], + "4x100G": ["Eth9/1(Port9)", "Eth9/2(Port9)", "Eth9/3(Port9)", "Eth9/4(Port9)"], + "8x50G": ["Eth9/1(Port9)", "Eth9/2(Port9)", "Eth9/3(Port9)", "Eth9/4(Port9)", "Eth9/5(Port9)", "Eth9/6(Port9)", "Eth9/7(Port9)", "Eth9/8(Port9)"] + } + }, + + "Ethernet80": { + "index": "10,10,10,10,10,10,10,10", + "lanes": "81,82,83,84,85,86,87,88", + "breakout_modes": { + "1x400G": ["Eth10(Port10)"], + "2x200G": ["Eth10/1(Port10)", "Eth10/2(Port10)"], + "4x100G": ["Eth10/1(Port10)", "Eth10/2(Port10)", "Eth10/3(Port10)", "Eth10/4(Port10)"], + "8x50G": ["Eth10/1(Port10)", "Eth10/2(Port10)", "Eth10/3(Port10)", "Eth10/4(Port10)", "Eth10/5(Port10)", "Eth10/6(Port10)", "Eth10/7(Port10)", "Eth10/8(Port10)"] + } + }, + + "Ethernet88": { + "index": "11,11,11,11,11,11,11,11", + "lanes": "89,90,91,92,93,94,95,96", + "breakout_modes": { + "1x400G": ["Eth11(Port11)"], + "2x200G": ["Eth11/1(Port11)", "Eth11/2(Port11)"], + "4x100G": ["Eth11/1(Port11)", "Eth11/2(Port11)", "Eth11/3(Port11)", "Eth11/4(Port11)"], + "8x50G": ["Eth11/1(Port11)", "Eth11/2(Port11)", "Eth11/3(Port11)", "Eth11/4(Port11)", "Eth11/5(Port11)", "Eth11/6(Port11)", "Eth11/7(Port11)", "Eth11/8(Port11)"] + } + }, + + "Ethernet96": { + "index": "12,12,12,12,12,12,12,12", + "lanes": "97,98,99,100,101,102,103,104", + "breakout_modes": { + "1x400G": ["Eth12(Port12)"], + "2x200G": ["Eth12/1(Port12)", "Eth12/2(Port12)"], + "4x100G": ["Eth12/1(Port12)", "Eth12/2(Port12)", "Eth12/3(Port12)", "Eth12/4(Port12)"], + "8x50G": ["Eth12/1(Port12)", "Eth12/2(Port12)", "Eth12/3(Port12)", "Eth12/4(Port12)", "Eth12/5(Port12)", "Eth12/6(Port12)", "Eth12/7(Port12)", "Eth12/8(Port12)"] + } + }, + + "Ethernet104": { + "index": "13,13,13,13,13,13,13,13", + "lanes": "105,106,107,108,109,110,111,112", + "breakout_modes": { + "1x400G": ["Eth13(Port13)"], + "2x200G": ["Eth13/1(Port13)", "Eth13/2(Port13)"], + "4x100G": ["Eth13/1(Port13)", "Eth13/2(Port13)", "Eth13/3(Port13)", "Eth13/4(Port13)"], + "8x50G": ["Eth13/1(Port13)", "Eth13/2(Port13)", "Eth13/3(Port13)", "Eth13/4(Port13)", "Eth13/5(Port13)", "Eth13/6(Port13)", "Eth13/7(Port13)", "Eth13/8(Port13)"] + } + }, + + "Ethernet112": { + "index": "14,14,14,14,14,14,14,14", + "lanes": "113,114,115,116,117,118,119,120", + "breakout_modes": { + "1x400G": ["Eth14(Port14)"], + "2x200G": ["Eth14/1(Port14)", "Eth14/2(Port14)"], + "4x100G": ["Eth14/1(Port14)", "Eth14/2(Port14)", "Eth14/3(Port14)", "Eth14/4(Port14)"], + "8x50G": ["Eth14/1(Port14)", "Eth14/2(Port14)", "Eth14/3(Port14)", "Eth14/4(Port14)", "Eth14/5(Port14)", "Eth14/6(Port14)", "Eth14/7(Port14)", "Eth14/8(Port14)"] + } + }, + + "Ethernet120": { + "index": "15,15,15,15,15,15,15,15", + "lanes": "121,122,123,124,125,126,127,128", + "breakout_modes": { + "1x400G": ["Eth15(Port15)"], + "2x200G": ["Eth15/1(Port15)", "Eth15/2(Port15)"], + "4x100G": ["Eth15/1(Port15)", "Eth15/2(Port15)", "Eth15/3(Port15)", "Eth15/4(Port15)"], + "8x50G": ["Eth15/1(Port15)", "Eth15/2(Port15)", "Eth15/3(Port15)", "Eth15/4(Port15)", "Eth15/5(Port15)", "Eth15/6(Port15)", "Eth15/7(Port15)", "Eth15/8(Port15)"] + } + }, + + "Ethernet128": { + "index": "16,16,16,16,16,16,16,16", + "lanes": "129,130,131,132,133,134,135,136", + "breakout_modes": { + "1x400G": ["Eth16(Port16)"], + "2x200G": ["Eth16/1(Port16)", "Eth16/2(Port16)"], + "4x100G": ["Eth16/1(Port16)", "Eth16/2(Port16)", "Eth16/3(Port16)", "Eth16/4(Port16)"], + "8x50G": ["Eth16/1(Port16)", "Eth16/2(Port16)", "Eth16/3(Port16)", "Eth16/4(Port16)", "Eth16/5(Port16)", "Eth16/6(Port16)", "Eth16/7(Port16)", "Eth16/8(Port16)"] + } + }, + + "Ethernet136": { + "index": "17,17,17,17,17,17,17,17", + "lanes": "137,138,139,140,141,142,143,144", + "breakout_modes": { + "1x400G": ["Eth17(Port17)"], + "2x200G": ["Eth17/1(Port17)", "Eth17/2(Port17)"], + "4x100G": ["Eth17/1(Port17)", "Eth17/2(Port17)", "Eth17/3(Port17)", "Eth17/4(Port17)"], + "8x50G": ["Eth17/1(Port17)", "Eth17/2(Port17)", "Eth17/3(Port17)", "Eth17/4(Port17)", "Eth17/5(Port17)", "Eth17/6(Port17)", "Eth17/7(Port17)", "Eth17/8(Port17)"] + } + }, + + "Ethernet144": { + "index": "18,18,18,18,18,18,18,18", + "lanes": "145,146,147,148,149,150,151,152", + "breakout_modes": { + "1x400G": ["Eth18(Port18)"], + "2x200G": ["Eth18/1(Port18)", "Eth18/2(Port18)"], + "4x100G": ["Eth18/1(Port18)", "Eth18/2(Port18)", "Eth18/3(Port18)", "Eth18/4(Port18)"], + "8x50G": ["Eth18/1(Port18)", "Eth18/2(Port18)", "Eth18/3(Port18)", "Eth18/4(Port18)", "Eth18/5(Port18)", "Eth18/6(Port18)", "Eth18/7(Port18)", "Eth18/8(Port18)"] + } + }, + + "Ethernet152": { + "index": "19,19,19,19,19,19,19,19", + "lanes": "153,154,155,156,157,158,159,160", + "breakout_modes": { + "1x400G": ["Eth19(Port19)"], + "2x200G": ["Eth19/1(Port19)", "Eth19/2(Port19)"], + "4x100G": ["Eth19/1(Port19)", "Eth19/2(Port19)", "Eth19/3(Port19)", "Eth19/4(Port19)"], + "8x50G": ["Eth19/1(Port19)", "Eth19/2(Port19)", "Eth19/3(Port19)", "Eth19/4(Port19)", "Eth19/5(Port19)", "Eth19/6(Port19)", "Eth19/7(Port19)", "Eth19/8(Port19)"] + } + }, + + "Ethernet160": { + "index": "20,20,20,20,20,20,20,20", + "lanes": "161,162,163,164,165,166,167,168", + "breakout_modes": { + "1x400G": ["Eth20(Port20)"], + "2x200G": ["Eth20/1(Port20)", "Eth20/2(Port20)"], + "4x100G": ["Eth20/1(Port20)", "Eth20/2(Port20)", "Eth20/3(Port20)", "Eth20/4(Port20)"], + "8x50G": ["Eth20/1(Port20)", "Eth20/2(Port20)", "Eth20/3(Port20)", "Eth20/4(Port20)", "Eth20/5(Port20)", "Eth20/6(Port20)", "Eth20/7(Port20)", "Eth20/8(Port20)"] + } + }, + + "Ethernet168": { + "index": "21,21,21,21,21,21,21,21", + "lanes": "169,170,171,172,173,174,175,176", + "breakout_modes": { + "1x400G": ["Eth21(Port21)"], + "2x200G": ["Eth21/1(Port21)", "Eth21/2(Port21)"], + "4x100G": ["Eth21/1(Port21)", "Eth21/2(Port21)", "Eth21/3(Port21)", "Eth21/4(Port21)"], + "8x50G": ["Eth21/1(Port21)", "Eth21/2(Port21)", "Eth21/3(Port21)", "Eth21/4(Port21)", "Eth21/5(Port21)", "Eth21/6(Port21)", "Eth21/7(Port21)", "Eth21/8(Port21)"] + } + }, + + "Ethernet176": { + "index": "22,22,22,22,22,22,22,22", + "lanes": "177,178,179,180,181,182,183,184", + "breakout_modes": { + "1x400G": ["Eth22(Port22)"], + "2x200G": ["Eth22/1(Port22)", "Eth22/2(Port22)"], + "4x100G": ["Eth22/1(Port22)", "Eth22/2(Port22)", "Eth22/3(Port22)", "Eth22/4(Port22)"], + "8x50G": ["Eth22/1(Port22)", "Eth22/2(Port22)", "Eth22/3(Port22)", "Eth22/4(Port22)", "Eth22/5(Port22)", "Eth22/6(Port22)", "Eth22/7(Port22)", "Eth22/8(Port22)"] + } + }, + + "Ethernet184": { + "index": "23,23,23,23,23,23,23,23", + "lanes": "185,186,187,188,189,190,191,192", + "breakout_modes": { + "1x400G": ["Eth23(Port23)"], + "2x200G": ["Eth23/1(Port23)", "Eth23/2(Port23)"], + "4x100G": ["Eth23/1(Port23)", "Eth23/2(Port23)", "Eth23/3(Port23)", "Eth23/4(Port23)"], + "8x50G": ["Eth23/1(Port23)", "Eth23/2(Port23)", "Eth23/3(Port23)", "Eth23/4(Port23)", "Eth23/5(Port23)", "Eth23/6(Port23)", "Eth23/7(Port23)", "Eth23/8(Port23)"] + } + }, + + "Ethernet192": { + "index": "24,24,24,24,24,24,24,24", + "lanes": "193,194,195,196,197,198,199,200", + "breakout_modes": { + "1x400G": ["Eth24(Port24)"], + "2x200G": ["Eth24/1(Port24)", "Eth24/2(Port24)"], + "4x100G": ["Eth24/1(Port24)", "Eth24/2(Port24)", "Eth24/3(Port24)", "Eth24/4(Port24)"], + "8x50G": ["Eth24/1(Port24)", "Eth24/2(Port24)", "Eth24/3(Port24)", "Eth24/4(Port24)", "Eth24/5(Port24)", "Eth24/6(Port24)", "Eth24/7(Port24)", "Eth24/8(Port24)"] + } + }, + + "Ethernet200": { + "index": "25,25,25,25,25,25,25,25", + "lanes": "201,202,203,204,205,206,207,208", + "breakout_modes": { + "1x400G": ["Eth25(Port25)"], + "2x200G": ["Eth25/1(Port25)", "Eth25/2(Port25)"], + "4x100G": ["Eth25/1(Port25)", "Eth25/2(Port25)", "Eth25/3(Port25)", "Eth25/4(Port25)"], + "8x50G": ["Eth25/1(Port25)", "Eth25/2(Port25)", "Eth25/3(Port25)", "Eth25/4(Port25)", "Eth25/5(Port25)", "Eth25/6(Port25)", "Eth25/7(Port25)", "Eth25/8(Port25)"] + } + }, + + "Ethernet208": { + "index": "26,26,26,26,26,26,26,26", + "lanes": "209,210,211,212,213,214,215,216", + "breakout_modes": { + "1x400G": ["Eth26(Port26)"], + "2x200G": ["Eth26/1(Port26)", "Eth26/2(Port26)"], + "4x100G": ["Eth26/1(Port26)", "Eth26/2(Port26)", "Eth26/3(Port26)", "Eth26/4(Port26)"], + "8x50G": ["Eth26/1(Port26)", "Eth26/2(Port26)", "Eth26/3(Port26)", "Eth26/4(Port26)", "Eth26/5(Port26)", "Eth26/6(Port26)", "Eth26/7(Port26)", "Eth26/8(Port26)"] + } + }, + + "Ethernet216": { + "index": "27,27,27,27,27,27,27,27", + "lanes": "217,218,219,220,221,222,223,224", + "breakout_modes": { + "1x400G": ["Eth27(Port27)"], + "2x200G": ["Eth27/1(Port27)", "Eth27/2(Port27)"], + "4x100G": ["Eth27/1(Port27)", "Eth27/2(Port27)", "Eth27/3(Port27)", "Eth27/4(Port27)"], + "8x50G": ["Eth27/1(Port27)", "Eth27/2(Port27)", "Eth27/3(Port27)", "Eth27/4(Port27)", "Eth27/5(Port27)", "Eth27/6(Port27)", "Eth27/7(Port27)", "Eth27/8(Port27)"] + } + }, + + "Ethernet224": { + "index": "28,28,28,28,28,28,28,28", + "lanes": "225,226,227,228,229,230,231,232", + "breakout_modes": { + "1x400G": ["Eth28(Port28)"], + "2x200G": ["Eth28/1(Port28)", "Eth28/2(Port28)"], + "4x100G": ["Eth28/1(Port28)", "Eth28/2(Port28)", "Eth28/3(Port28)", "Eth28/4(Port28)"], + "8x50G": ["Eth28/1(Port28)", "Eth28/2(Port28)", "Eth28/3(Port28)", "Eth28/4(Port28)", "Eth28/5(Port28)", "Eth28/6(Port28)", "Eth28/7(Port28)", "Eth28/8(Port28)"] + } + }, + + "Ethernet232": { + "index": "29,29,29,29,29,29,29,29", + "lanes": "233,234,235,236,237,238,239,240", + "breakout_modes": { + "1x400G": ["Eth29(Port29)"], + "2x200G": ["Eth29/1(Port29)", "Eth29/2(Port29)"], + "4x100G": ["Eth29/1(Port29)", "Eth29/2(Port29)", "Eth29/3(Port29)", "Eth29/4(Port29)"], + "8x50G": ["Eth29/1(Port29)", "Eth29/2(Port29)", "Eth29/3(Port29)", "Eth29/4(Port29)", "Eth29/5(Port29)", "Eth29/6(Port29)", "Eth29/7(Port29)", "Eth29/8(Port29)"] + } + }, + + "Ethernet240": { + "index": "30,30,30,30,30,30,30,30", + "lanes": "241,242,243,244,245,246,247,248", + "breakout_modes": { + "1x400G": ["Eth30(Port30)"], + "2x200G": ["Eth30/1(Port30)", "Eth30/2(Port30)"], + "4x100G": ["Eth30/1(Port30)", "Eth30/2(Port30)", "Eth30/3(Port30)", "Eth30/4(Port30)"], + "8x50G": ["Eth30/1(Port30)", "Eth30/2(Port30)", "Eth30/3(Port30)", "Eth30/4(Port30)", "Eth30/5(Port30)", "Eth30/6(Port30)", "Eth30/7(Port30)", "Eth30/8(Port30)"] + } + }, + + "Ethernet248": { + "index": "31,31,31,31,31,31,31,31", + "lanes": "249,250,251,252,253,254,255,256", + "breakout_modes": { + "1x400G": ["Eth31(Port31)"], + "2x200G": ["Eth31/1(Port31)", "Eth31/2(Port31)"], + "4x100G": ["Eth31/1(Port31)", "Eth31/2(Port31)", "Eth31/3(Port31)", "Eth31/4(Port31)"], + "8x50G": ["Eth31/1(Port31)", "Eth31/2(Port31)", "Eth31/3(Port31)", "Eth31/4(Port31)", "Eth31/5(Port31)", "Eth31/6(Port31)", "Eth31/7(Port31)", "Eth31/8(Port31)"] + } + }, + + "Ethernet256": { + "index": "32", + "lanes": "257", + "breakout_modes": { + "1x10G": ["Eth32(Port32)"] + } + }, + + "Ethernet257": { + "index": "33", + "lanes": "259", + "breakout_modes": { + "1x10G": ["Eth33(Port33)"] + } + } + } +} + diff --git a/device/ufispace/x86_64-ufispace_s9300_32d-r0/platform_asic b/device/ufispace/x86_64-ufispace_s9300_32d-r0/platform_asic new file mode 100644 index 0000000000..9604676527 --- /dev/null +++ b/device/ufispace/x86_64-ufispace_s9300_32d-r0/platform_asic @@ -0,0 +1 @@ +broadcom diff --git a/device/ufispace/x86_64-ufispace_s9300_32d-r0/platform_components.json b/device/ufispace/x86_64-ufispace_s9300_32d-r0/platform_components.json new file mode 100644 index 0000000000..30f8635ca8 --- /dev/null +++ b/device/ufispace/x86_64-ufispace_s9300_32d-r0/platform_components.json @@ -0,0 +1,13 @@ +{ + "chassis": { + "x86_64-ufispace_s9300_32d-r0": { + "component": { + "CPLD1": { }, + "CPLD2": { }, + "CPLD3": { }, + "BIOS": { }, + "BMC": {} + } + } + } +} diff --git a/device/ufispace/x86_64-ufispace_s9300_32d-r0/platform_env.conf b/device/ufispace/x86_64-ufispace_s9300_32d-r0/platform_env.conf new file mode 100644 index 0000000000..dd7cf4fe01 --- /dev/null +++ b/device/ufispace/x86_64-ufispace_s9300_32d-r0/platform_env.conf @@ -0,0 +1,2 @@ +SYNCD_SHM_SIZE=512m +is_ltsw_chip=1 diff --git a/device/ufispace/x86_64-ufispace_s9300_32d-r0/pmon_daemon_control.json b/device/ufispace/x86_64-ufispace_s9300_32d-r0/pmon_daemon_control.json new file mode 100644 index 0000000000..e348e0168f --- /dev/null +++ b/device/ufispace/x86_64-ufispace_s9300_32d-r0/pmon_daemon_control.json @@ -0,0 +1,9 @@ +{ + "skip_pcied": false, + "skip_fancontrol": false, + "skip_thermalctld": false, + "skip_ledd": true, + "skip_xcvrd": false, + "skip_psud": false, + "skip_syseepromd": false +} diff --git a/device/ufispace/x86_64-ufispace_s9300_32d-r0/sensors.conf b/device/ufispace/x86_64-ufispace_s9300_32d-r0/sensors.conf new file mode 100644 index 0000000000..7a1c040881 --- /dev/null +++ b/device/ufispace/x86_64-ufispace_s9300_32d-r0/sensors.conf @@ -0,0 +1,9 @@ +# libsensors configuration file + +bus "i2c-0" "I2C I801" +chip "tmp75-i2c-*-4f" + label temp1 "CPU Board Temp" + set temp1_max 70 + set temp1_max_hyst 75 + set temp1_crit 85 + diff --git a/device/ufispace/x86_64-ufispace_s9300_32d-r0/system_health_monitoring_config.json b/device/ufispace/x86_64-ufispace_s9300_32d-r0/system_health_monitoring_config.json new file mode 100644 index 0000000000..6291e81a06 --- /dev/null +++ b/device/ufispace/x86_64-ufispace_s9300_32d-r0/system_health_monitoring_config.json @@ -0,0 +1,15 @@ +{ + "services_to_ignore": [], + "devices_to_ignore": [ + "asic", + "psu", + "fan" + ], + "user_defined_checkers": [], + "polling_interval": 60, + "led_color": { + "fault": "yellow", + "normal": "green", + "booting": "blinking_green" + } +} \ No newline at end of file diff --git a/device/ufispace/x86_64-ufispace_s9301_32d-r0/UFISPACE-S9301-32D/hwsku.json b/device/ufispace/x86_64-ufispace_s9301_32d-r0/UFISPACE-S9301-32D/hwsku.json new file mode 100644 index 0000000000..066985e74d --- /dev/null +++ b/device/ufispace/x86_64-ufispace_s9301_32d-r0/UFISPACE-S9301-32D/hwsku.json @@ -0,0 +1,140 @@ +{ + "interfaces": { + "Ethernet0": { + "default_brkout_mode": "1x400G" + }, + + "Ethernet8": { + "default_brkout_mode": "1x400G" + }, + + "Ethernet16": { + "default_brkout_mode": "1x400G" + }, + + "Ethernet24": { + "default_brkout_mode": "1x400G" + }, + + "Ethernet32": { + "default_brkout_mode": "1x400G" + }, + + "Ethernet40": { + "default_brkout_mode": "1x400G" + }, + + "Ethernet48": { + "default_brkout_mode": "1x400G" + }, + + "Ethernet56": { + "default_brkout_mode": "1x400G" + }, + + "Ethernet64": { + "default_brkout_mode": "1x400G" + }, + + "Ethernet72": { + "default_brkout_mode": "1x400G" + }, + + "Ethernet80": { + "default_brkout_mode": "1x400G" + }, + + "Ethernet88": { + "default_brkout_mode": "1x400G" + }, + + "Ethernet96": { + "default_brkout_mode": "1x400G" + }, + + "Ethernet104": { + "default_brkout_mode": "1x400G" + }, + + "Ethernet112": { + "default_brkout_mode": "1x400G" + }, + + "Ethernet120": { + "default_brkout_mode": "1x400G" + }, + + "Ethernet128": { + "default_brkout_mode": "1x400G" + }, + + "Ethernet136": { + "default_brkout_mode": "1x400G" + }, + + "Ethernet144": { + "default_brkout_mode": "1x400G" + }, + + "Ethernet152": { + "default_brkout_mode": "1x400G" + }, + + "Ethernet160": { + "default_brkout_mode": "1x400G" + }, + + "Ethernet168": { + "default_brkout_mode": "1x400G" + }, + + "Ethernet176": { + "default_brkout_mode": "1x400G" + }, + + "Ethernet184": { + "default_brkout_mode": "1x400G" + }, + + "Ethernet192": { + "default_brkout_mode": "1x400G" + }, + + "Ethernet200": { + "default_brkout_mode": "1x400G" + }, + + "Ethernet208": { + "default_brkout_mode": "1x400G" + }, + + "Ethernet216": { + "default_brkout_mode": "1x400G" + }, + + "Ethernet224": { + "default_brkout_mode": "1x400G" + }, + + "Ethernet232": { + "default_brkout_mode": "1x400G" + }, + + "Ethernet240": { + "default_brkout_mode": "1x400G" + }, + + "Ethernet248": { + "default_brkout_mode": "1x400G" + }, + + "Ethernet256": { + "default_brkout_mode": "1x10G" + }, + + "Ethernet257": { + "default_brkout_mode": "1x10G" + } + } +} + diff --git a/device/ufispace/x86_64-ufispace_s9301_32d-r0/UFISPACE-S9301-32D/port_config.ini b/device/ufispace/x86_64-ufispace_s9301_32d-r0/UFISPACE-S9301-32D/port_config.ini new file mode 100644 index 0000000000..9bbc85e114 --- /dev/null +++ b/device/ufispace/x86_64-ufispace_s9301_32d-r0/UFISPACE-S9301-32D/port_config.ini @@ -0,0 +1,35 @@ +# name lanes alias index speed +Ethernet0 1,2,3,4,5,6,7,8 Ethernet1/1 0 400000 +Ethernet8 9,10,11,12,13,14,15,16 Ethernet2/1 1 400000 +Ethernet16 17,18,19,20,21,22,23,24 Ethernet3/1 2 400000 +Ethernet24 25,26,27,28,29,30,31,32 Ethernet4/1 3 400000 +Ethernet32 33,34,35,36,37,38,39,40 Ethernet5/1 4 400000 +Ethernet40 41,42,43,44,45,46,47,48 Ethernet6/1 5 400000 +Ethernet48 49,50,51,52,53,54,55,56 Ethernet7/1 6 400000 +Ethernet56 57,58,59,60,61,62,63,64 Ethernet8/1 7 400000 +Ethernet64 65,66,67,68,69,70,71,72 Ethernet9/1 8 400000 +Ethernet72 73,74,75,76,77,78,79,80 Ethernet10/1 9 400000 +Ethernet80 81,82,83,84,85,86,87,88 Ethernet11/1 10 400000 +Ethernet88 89,90,91,92,93,94,95,96 Ethernet12/1 11 400000 +Ethernet96 97,98,99,100,101,102,103,104 Ethernet13/1 12 400000 +Ethernet104 105,106,107,108,109,110,111,112 Ethernet14/1 13 400000 +Ethernet112 113,114,115,116,117,118,119,120 Ethernet15/1 14 400000 +Ethernet120 121,122,123,124,125,126,127,128 Ethernet16/1 15 400000 +Ethernet128 129,130,131,132,133,134,135,136 Ethernet17/1 16 400000 +Ethernet136 137,138,139,140,141,142,143,144 Ethernet18/1 17 400000 +Ethernet144 145,146,147,148,149,150,151,152 Ethernet19/1 18 400000 +Ethernet152 153,154,155,156,157,158,159,160 Ethernet20/1 19 400000 +Ethernet160 161,162,163,164,165,166,167,168 Ethernet21/1 20 400000 +Ethernet168 169,170,171,172,173,174,175,176 Ethernet22/1 21 400000 +Ethernet176 177,178,179,180,181,182,183,184 Ethernet23/1 22 400000 +Ethernet184 185,186,187,188,189,190,191,192 Ethernet24/1 23 400000 +Ethernet192 193,194,195,196,197,198,199,200 Ethernet25/1 24 400000 +Ethernet200 201,202,203,204,205,206,207,208 Ethernet26/1 25 400000 +Ethernet208 209,210,211,212,213,214,215,216 Ethernet27/1 26 400000 +Ethernet216 217,218,219,220,221,222,223,224 Ethernet28/1 27 400000 +Ethernet224 225,226,227,228,229,230,231,232 Ethernet29/1 28 400000 +Ethernet232 233,234,235,236,237,238,239,240 Ethernet30/1 29 400000 +Ethernet240 241,242,243,244,245,246,247,248 Ethernet31/1 30 400000 +Ethernet248 249,250,251,252,253,254,255,256 Ethernet32/1 31 400000 +Ethernet256 257 Ethernet33 32 10000 +Ethernet257 258 Ethernet34 33 10000 diff --git a/device/ufispace/x86_64-ufispace_s9301_32d-r0/UFISPACE-S9301-32D/sai.profile b/device/ufispace/x86_64-ufispace_s9301_32d-r0/UFISPACE-S9301-32D/sai.profile new file mode 100644 index 0000000000..19d521413b --- /dev/null +++ b/device/ufispace/x86_64-ufispace_s9301_32d-r0/UFISPACE-S9301-32D/sai.profile @@ -0,0 +1 @@ +SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/th3-s9301-32x400G.config.bcm diff --git a/device/ufispace/x86_64-ufispace_s9301_32d-r0/UFISPACE-S9301-32D/th3-s9301-32x400G.config.bcm b/device/ufispace/x86_64-ufispace_s9301_32d-r0/UFISPACE-S9301-32D/th3-s9301-32x400G.config.bcm new file mode 100644 index 0000000000..6f6e84b4d2 --- /dev/null +++ b/device/ufispace/x86_64-ufispace_s9301_32d-r0/UFISPACE-S9301-32D/th3-s9301-32x400G.config.bcm @@ -0,0 +1,284 @@ +# r1.0.0 +sai_tunnel_global_sip_mask_enable=1 +bcm_tunnel_term_compatible_mode=1 +sai_tunnel_support=0 + +pbmp_xport_xe.0=0x8ffff8ffffcffff8ffff8ffff8ffffcffff9fffe + +ccm_dma_enable=0 +ccmdma_intr_enable=0 +mem_cache_enable=0 +parity_correction=0 +parity_enable=0 +phy_enable=0 +phy_null=1 + +core_clock_frequency=1325 +dpr_clock_frequency=1000 +device_clock_frequency=1325 +port_flex_enable=1 +load_firmware=0x2 + +portmap_1=1:400 +portmap_5=9:400 +portmap_9=17:400 +portmap_13=25:400 + +portmap_19=259:10 + +portmap_20=33:400 +portmap_24=41:400 +portmap_28=49:400 +portmap_32=57:400 + +portmap_38=257:10 +#portmap_38=257:10:1 + +portmap_39=260:10 + +portmap_40=65:400 +portmap_44=73:400 +portmap_48=81:400 +portmap_52=89:400 + +portmap_59=261:10 + +portmap_60=97:400 +portmap_64=105:400 +portmap_68=113:400 +portmap_72=121:400 + +portmap_79=262:10 + +portmap_80=129:400 +portmap_84=137:400 +portmap_88=145:400 +portmap_92=153:400 + +portmap_99=263:10 + +portmap_100=161:400 +portmap_104=169:400 +portmap_108=177:400 +portmap_112=185:400 + +portmap_118=258:10 +#portmap_118=258:10:1 + +portmap_119=264:10 + +portmap_120=193:400 +portmap_124=201:400 +portmap_128=209:400 +portmap_132=217:400 + +portmap_139=265:10 + +portmap_140=225:400 +portmap_144=233:400 +portmap_148=241:400 +portmap_152=249:400 + +portmap_159=266:10 + +port_fec_cd=9 + + +phy_chain_rx_lane_map_physical{1}=0x60357412 +phy_chain_tx_lane_map_physical{1}=0x02537164 +serdes_core_rx_polarity_flip_physical{1}=0x53 +serdes_core_tx_polarity_flip_physical{1}=0xa5 + +phy_chain_rx_lane_map_physical{9}=0x31472056 +phy_chain_tx_lane_map_physical{9}=0x51306274 +serdes_core_rx_polarity_flip_physical{9}=0x1e +serdes_core_tx_polarity_flip_physical{9}=0x7d + +phy_chain_rx_lane_map_physical{17}=0x21347065 +phy_chain_tx_lane_map_physical{17}=0x73046512 +serdes_core_rx_polarity_flip_physical{17}=0x78 +serdes_core_tx_polarity_flip_physical{17}=0x1d + +phy_chain_rx_lane_map_physical{25}=0x36507124 +phy_chain_tx_lane_map_physical{25}=0x45102736 +serdes_core_rx_polarity_flip_physical{25}=0xb0 +serdes_core_tx_polarity_flip_physical{25}=0x46 + +phy_chain_rx_lane_map_physical{33}=0x27603145 +phy_chain_tx_lane_map_physical{33}=0x06372514 +serdes_core_rx_polarity_flip_physical{33}=0x24 +serdes_core_tx_polarity_flip_physical{33}=0x66 + +phy_chain_rx_lane_map_physical{41}=0x20643175 +phy_chain_tx_lane_map_physical{41}=0x65107423 +serdes_core_rx_polarity_flip_physical{41}=0xc3 +serdes_core_tx_polarity_flip_physical{41}=0x5a + +phy_chain_rx_lane_map_physical{49}=0x20653174 +phy_chain_tx_lane_map_physical{49}=0x65217043 +serdes_core_rx_polarity_flip_physical{49}=0x27 +serdes_core_tx_polarity_flip_physical{49}=0x92 + +phy_chain_rx_lane_map_physical{57}=0x23417065 +phy_chain_tx_lane_map_physical{57}=0x46102735 +serdes_core_rx_polarity_flip_physical{57}=0x8d +serdes_core_tx_polarity_flip_physical{57}=0x17 + +phy_chain_rx_lane_map_physical{65}=0x32406175 +phy_chain_tx_lane_map_physical{65}=0x26073415 +serdes_core_rx_polarity_flip_physical{65}=0xa6 +serdes_core_tx_polarity_flip_physical{65}=0x4b + +phy_chain_rx_lane_map_physical{73}=0x30642175 +phy_chain_tx_lane_map_physical{73}=0x76415230 +serdes_core_rx_polarity_flip_physical{73}=0x4b +serdes_core_tx_polarity_flip_physical{73}=0x8f + +phy_chain_rx_lane_map_physical{81}=0x21743065 +phy_chain_tx_lane_map_physical{81}=0x42507361 +serdes_core_rx_polarity_flip_physical{81}=0x50 +serdes_core_tx_polarity_flip_physical{81}=0xb2 + +phy_chain_rx_lane_map_physical{89}=0x23407165 +phy_chain_tx_lane_map_physical{89}=0x30147625 +serdes_core_rx_polarity_flip_physical{89}=0x99 +serdes_core_tx_polarity_flip_physical{89}=0x0b + +phy_chain_rx_lane_map_physical{97}=0x10652437 +phy_chain_tx_lane_map_physical{97}=0x76352014 +serdes_core_rx_polarity_flip_physical{97}=0xac +serdes_core_tx_polarity_flip_physical{97}=0xe6 + +phy_chain_rx_lane_map_physical{105}=0x74306521 +phy_chain_tx_lane_map_physical{105}=0x73046215 +serdes_core_rx_polarity_flip_physical{105}=0x96 +serdes_core_tx_polarity_flip_physical{105}=0xaf + +phy_chain_rx_lane_map_physical{113}=0x02741365 +phy_chain_tx_lane_map_physical{113}=0x60425371 +serdes_core_rx_polarity_flip_physical{113}=0x14 +serdes_core_tx_polarity_flip_physical{113}=0xa5 + +phy_chain_rx_lane_map_physical{121}=0x76241503 +phy_chain_tx_lane_map_physical{121}=0x76541320 +serdes_core_rx_polarity_flip_physical{121}=0x59 +serdes_core_tx_polarity_flip_physical{121}=0x5f + +phy_chain_rx_lane_map_physical{129}=0x67351402 +phy_chain_tx_lane_map_physical{129}=0x61047253 +serdes_core_rx_polarity_flip_physical{129}=0x59 +serdes_core_tx_polarity_flip_physical{129}=0x63 + +phy_chain_rx_lane_map_physical{137}=0x21743065 +phy_chain_tx_lane_map_physical{137}=0x61405372 +serdes_core_rx_polarity_flip_physical{137}=0xa5 +serdes_core_tx_polarity_flip_physical{137}=0x31 + +phy_chain_rx_lane_map_physical{145}=0x21743065 +phy_chain_tx_lane_map_physical{145}=0x76503214 +serdes_core_rx_polarity_flip_physical{145}=0x50 +serdes_core_tx_polarity_flip_physical{145}=0x46 + +phy_chain_rx_lane_map_physical{153}=0x10652437 +phy_chain_tx_lane_map_physical{153}=0x42537160 +serdes_core_rx_polarity_flip_physical{153}=0x59 +serdes_core_tx_polarity_flip_physical{153}=0x63 + +phy_chain_rx_lane_map_physical{161}=0x76125340 +phy_chain_tx_lane_map_physical{161}=0x25043716 +serdes_core_rx_polarity_flip_physical{161}=0x6c +serdes_core_tx_polarity_flip_physical{161}=0x1e + +phy_chain_rx_lane_map_physical{169}=0x20743165 +phy_chain_tx_lane_map_physical{169}=0x41507263 +serdes_core_rx_polarity_flip_physical{169}=0xe1 +serdes_core_tx_polarity_flip_physical{169}=0x36 + +phy_chain_rx_lane_map_physical{177}=0x30742165 +phy_chain_tx_lane_map_physical{177}=0x74036125 +serdes_core_rx_polarity_flip_physical{177}=0x9c +serdes_core_tx_polarity_flip_physical{177}=0x58 + +phy_chain_rx_lane_map_physical{185}=0x23406175 +phy_chain_tx_lane_map_physical{185}=0x63127450 +serdes_core_rx_polarity_flip_physical{185}=0x93 +serdes_core_tx_polarity_flip_physical{185}=0x11 + +phy_chain_rx_lane_map_physical{193}=0x23507164 +phy_chain_tx_lane_map_physical{193}=0x75140326 +serdes_core_rx_polarity_flip_physical{193}=0x4d +serdes_core_tx_polarity_flip_physical{193}=0x30 + +phy_chain_rx_lane_map_physical{201}=0x20743165 +phy_chain_tx_lane_map_physical{201}=0x13640275 +serdes_core_rx_polarity_flip_physical{201}=0xe1 +serdes_core_tx_polarity_flip_physical{201}=0x05 + +phy_chain_rx_lane_map_physical{209}=0x30742165 +phy_chain_tx_lane_map_physical{209}=0x03645271 +serdes_core_rx_polarity_flip_physical{209}=0x9c +serdes_core_tx_polarity_flip_physical{209}=0x74 + +phy_chain_rx_lane_map_physical{217}=0x32604175 +phy_chain_tx_lane_map_physical{217}=0x46213750 +serdes_core_rx_polarity_flip_physical{217}=0x53 +serdes_core_tx_polarity_flip_physical{217}=0x2d + +phy_chain_rx_lane_map_physical{225}=0x23471605 +phy_chain_tx_lane_map_physical{225}=0x16304725 +serdes_core_rx_polarity_flip_physical{225}=0x66 +serdes_core_tx_polarity_flip_physical{225}=0xef + +phy_chain_rx_lane_map_physical{233}=0x63051274 +phy_chain_tx_lane_map_physical{233}=0x73046251 +serdes_core_rx_polarity_flip_physical{233}=0x9c +serdes_core_tx_polarity_flip_physical{233}=0xae + +phy_chain_rx_lane_map_physical{241}=0x21473056 +phy_chain_tx_lane_map_physical{241}=0x74503261 +serdes_core_rx_polarity_flip_physical{241}=0x63 +serdes_core_tx_polarity_flip_physical{241}=0x4e + +phy_chain_rx_lane_map_physical{249}=0x76341502 +phy_chain_tx_lane_map_physical{249}=0x45603271 +serdes_core_rx_polarity_flip_physical{249}=0x78 +serdes_core_tx_polarity_flip_physical{249}=0x03 + + +dport_map_enable=1 + +dport_map_port_1=0 +dport_map_port_5=1 +dport_map_port_9=2 +dport_map_port_13=3 +dport_map_port_20=4 +dport_map_port_24=5 +dport_map_port_28=6 +dport_map_port_32=7 +dport_map_port_40=8 +dport_map_port_44=9 +dport_map_port_48=10 +dport_map_port_52=11 +dport_map_port_60=12 +dport_map_port_64=13 +dport_map_port_68=14 +dport_map_port_72=15 +dport_map_port_80=16 +dport_map_port_84=17 +dport_map_port_88=18 +dport_map_port_92=19 +dport_map_port_100=20 +dport_map_port_104=21 +dport_map_port_108=22 +dport_map_port_112=23 +dport_map_port_120=24 +dport_map_port_124=25 +dport_map_port_128=26 +dport_map_port_132=27 +dport_map_port_140=28 +dport_map_port_144=29 +dport_map_port_148=30 +dport_map_port_152=31 + +dport_map_port_38=32 +dport_map_port_118=33 \ No newline at end of file diff --git a/device/ufispace/x86_64-ufispace_s9301_32d-r0/cmicx_customer_led.bin b/device/ufispace/x86_64-ufispace_s9301_32d-r0/cmicx_customer_led.bin new file mode 100644 index 0000000000..1cbd43d6a5 Binary files /dev/null and b/device/ufispace/x86_64-ufispace_s9301_32d-r0/cmicx_customer_led.bin differ diff --git a/device/ufispace/x86_64-ufispace_s9301_32d-r0/default_sku b/device/ufispace/x86_64-ufispace_s9301_32d-r0/default_sku new file mode 100644 index 0000000000..90501be97b --- /dev/null +++ b/device/ufispace/x86_64-ufispace_s9301_32d-r0/default_sku @@ -0,0 +1 @@ +UFISPACE-S9301-32D t1 diff --git a/device/ufispace/x86_64-ufispace_s9301_32d-r0/fancontrol b/device/ufispace/x86_64-ufispace_s9301_32d-r0/fancontrol new file mode 100644 index 0000000000..1234cd994f --- /dev/null +++ b/device/ufispace/x86_64-ufispace_s9301_32d-r0/fancontrol @@ -0,0 +1,10 @@ +# Configuration file generated by pwmconfig, changes will be lost +INTERVAL=10 +DEVPATH= +DEVNAME= +FCTEMPS= +FCFANS= +MINTEMP= +MAXTEMP= +MINSTART= +MINSTOP= diff --git a/device/ufispace/x86_64-ufispace_s9301_32d-r0/installer.conf b/device/ufispace/x86_64-ufispace_s9301_32d-r0/installer.conf new file mode 100644 index 0000000000..74b02f0766 --- /dev/null +++ b/device/ufispace/x86_64-ufispace_s9301_32d-r0/installer.conf @@ -0,0 +1,4 @@ +CONSOLE_PORT=0x3f8 +CONSOLE_DEV=0 +CONSOLE_SPEED=115200 +ONIE_PLATFORM_EXTRA_CMDLINE_LINUX="modprobe.blacklist=gpio_ich,qat_c3xxx nomodeset pcie_aspm=off" diff --git a/device/ufispace/x86_64-ufispace_s9301_32d-r0/led_proc_init.soc b/device/ufispace/x86_64-ufispace_s9301_32d-r0/led_proc_init.soc new file mode 100644 index 0000000000..1c9cb334d9 --- /dev/null +++ b/device/ufispace/x86_64-ufispace_s9301_32d-r0/led_proc_init.soc @@ -0,0 +1,3 @@ +m0 load 0 0x3800 /usr/share/sonic/platform/cmicx_customer_led.bin +led auto on +led start diff --git a/device/ufispace/x86_64-ufispace_s9301_32d-r0/pcie.yaml b/device/ufispace/x86_64-ufispace_s9301_32d-r0/pcie.yaml new file mode 100644 index 0000000000..ce0a45f5d6 --- /dev/null +++ b/device/ufispace/x86_64-ufispace_s9301_32d-r0/pcie.yaml @@ -0,0 +1,742 @@ +- bus: '00' + dev: '00' + fn: '0' + id: '2020' + name: 'Host bridge: Intel Corporation Sky Lake-E DMI3 Registers (rev 04)' +- bus: '00' + dev: '04' + fn: '0' + id: '2021' + name: 'System peripheral: Intel Corporation Sky Lake-E CBDMA Registers (rev 04)' +- bus: '00' + dev: '04' + fn: '1' + id: '2021' + name: 'System peripheral: Intel Corporation Sky Lake-E CBDMA Registers (rev 04)' +- bus: '00' + dev: '04' + fn: '2' + id: '2021' + name: 'System peripheral: Intel Corporation Sky Lake-E CBDMA Registers (rev 04)' +- bus: '00' + dev: '04' + fn: '3' + id: '2021' + name: 'System peripheral: Intel Corporation Sky Lake-E CBDMA Registers (rev 04)' +- bus: '00' + dev: '04' + fn: '4' + id: '2021' + name: 'System peripheral: Intel Corporation Sky Lake-E CBDMA Registers (rev 04)' +- bus: '00' + dev: '04' + fn: '5' + id: '2021' + name: 'System peripheral: Intel Corporation Sky Lake-E CBDMA Registers (rev 04)' +- bus: '00' + dev: '04' + fn: '6' + id: '2021' + name: 'System peripheral: Intel Corporation Sky Lake-E CBDMA Registers (rev 04)' +- bus: '00' + dev: '04' + fn: '7' + id: '2021' + name: 'System peripheral: Intel Corporation Sky Lake-E CBDMA Registers (rev 04)' +- bus: '00' + dev: '05' + fn: '0' + id: '2024' + name: 'System peripheral: Intel Corporation Sky Lake-E MM/Vt-d Configuration Registers + (rev 04)' +- bus: '00' + dev: '05' + fn: '2' + id: '2025' + name: 'System peripheral: Intel Corporation Sky Lake-E RAS (rev 04)' +- bus: '00' + dev: '05' + fn: '4' + id: '2026' + name: 'PIC: Intel Corporation Sky Lake-E IOAPIC (rev 04)' +- bus: '00' + dev: 08 + fn: '0' + id: '2014' + name: 'System peripheral: Intel Corporation Sky Lake-E Ubox Registers (rev 04)' +- bus: '00' + dev: 08 + fn: '1' + id: '2015' + name: 'Performance counters: Intel Corporation Sky Lake-E Ubox Registers (rev 04)' +- bus: '00' + dev: 08 + fn: '2' + id: '2016' + name: 'System peripheral: Intel Corporation Sky Lake-E Ubox Registers (rev 04)' +- bus: '00' + dev: '11' + fn: '0' + id: a1ec + name: 'Unassigned class [ff00]: Intel Corporation C620 Series Chipset Family MROM + 0 (rev 04)' +- bus: '00' + dev: '11' + fn: '1' + id: a1ed + name: 'Unassigned class [ff00]: Intel Corporation C620 Series Chipset Family MROM + 1 (rev 04)' +- bus: '00' + dev: '14' + fn: '0' + id: a1af + name: 'USB controller: Intel Corporation C620 Series Chipset Family USB 3.0 xHCI + Controller (rev 04)' +- bus: '00' + dev: '14' + fn: '2' + id: a1b1 + name: 'Signal processing controller: Intel Corporation C620 Series Chipset Family + Thermal Subsystem (rev 04)' +- bus: '00' + dev: '16' + fn: '0' + id: a1ba + name: 'Communication controller: Intel Corporation C620 Series Chipset Family MEI + Controller #1 (rev 04)' +- bus: '00' + dev: '16' + fn: '4' + id: a1be + name: 'Communication controller: Intel Corporation C620 Series Chipset Family MEI + Controller #3 (rev 04)' +- bus: '00' + dev: 1c + fn: '0' + id: a190 + name: 'PCI bridge: Intel Corporation C620 Series Chipset Family PCI Express Root + Port #1 (rev f4)' +- bus: '00' + dev: 1c + fn: '4' + id: a194 + name: 'PCI bridge: Intel Corporation C620 Series Chipset Family PCI Express Root + Port #5 (rev f4)' +- bus: '00' + dev: 1c + fn: '5' + id: a195 + name: 'PCI bridge: Intel Corporation C620 Series Chipset Family PCI Express Root + Port #6 (rev f4)' +- bus: '00' + dev: 1d + fn: '0' + id: a198 + name: 'PCI bridge: Intel Corporation C620 Series Chipset Family PCI Express Root + Port #9 (rev f4)' +- bus: '00' + dev: 1d + fn: '2' + id: a19a + name: 'PCI bridge: Intel Corporation C620 Series Chipset Family PCI Express Root + Port #11 (rev f4)' +- bus: '00' + dev: 1f + fn: '0' + id: a1c8 + name: 'ISA bridge: Intel Corporation Device a1c8 (rev 04)' +- bus: '00' + dev: 1f + fn: '2' + id: a1a1 + name: 'Memory controller: Intel Corporation C620 Series Chipset Family Power Management + Controller (rev 04)' +- bus: '00' + dev: 1f + fn: '4' + id: a1a3 + name: 'SMBus: Intel Corporation C620 Series Chipset Family SMBus (rev 04)' +- bus: '00' + dev: 1f + fn: '5' + id: a1a4 + name: 'Serial bus controller [0c80]: Intel Corporation C620 Series Chipset Family + SPI Controller (rev 04)' +- bus: '02' + dev: '00' + fn: '0' + id: '1533' + name: 'Ethernet controller: Intel Corporation I210 Gigabit Network Connection (rev + 03)' +- bus: '03' + dev: '00' + fn: '0' + id: '1150' + name: 'PCI bridge: ASPEED Technology, Inc. AST1150 PCI-to-PCI Bridge (rev 03)' +- bus: '04' + dev: '00' + fn: '0' + id: '2000' + name: 'VGA compatible controller: ASPEED Technology, Inc. ASPEED Graphics Family + (rev 30)' +- bus: '06' + dev: '00' + fn: '0' + id: '0625' + name: 'SATA controller: ASMedia Technology Inc. Device 0625 (rev 01)' +- bus: '16' + dev: '00' + fn: '0' + id: '2030' + name: 'PCI bridge: Intel Corporation Sky Lake-E PCI Express Root Port A (rev 04)' +- bus: '16' + dev: '01' + fn: '0' + id: '2031' + name: 'PCI bridge: Intel Corporation Sky Lake-E PCI Express Root Port B (rev 04)' +- bus: '16' + dev: '02' + fn: '0' + id: '2032' + name: 'PCI bridge: Intel Corporation Sky Lake-E PCI Express Root Port C (rev 04)' +- bus: '16' + dev: '03' + fn: '0' + id: '2033' + name: 'PCI bridge: Intel Corporation Sky Lake-E PCI Express Root Port D (rev 04)' +- bus: '16' + dev: '05' + fn: '0' + id: '2034' + name: 'System peripheral: Intel Corporation Sky Lake-E VT-d (rev 04)' +- bus: '16' + dev: '05' + fn: '2' + id: '2035' + name: 'System peripheral: Intel Corporation Sky Lake-E RAS Configuration Registers + (rev 04)' +- bus: '16' + dev: '05' + fn: '4' + id: '2036' + name: 'PIC: Intel Corporation Sky Lake-E IOxAPIC Configuration Registers (rev 04)' +- bus: '16' + dev: 08 + fn: '0' + id: 208d + name: 'System peripheral: Intel Corporation Sky Lake-E CHA Registers (rev 04)' +- bus: '16' + dev: 08 + fn: '1' + id: 208d + name: 'System peripheral: Intel Corporation Sky Lake-E CHA Registers (rev 04)' +- bus: '16' + dev: 08 + fn: '2' + id: 208d + name: 'System peripheral: Intel Corporation Sky Lake-E CHA Registers (rev 04)' +- bus: '16' + dev: 08 + fn: '3' + id: 208d + name: 'System peripheral: Intel Corporation Sky Lake-E CHA Registers (rev 04)' +- bus: '16' + dev: 08 + fn: '4' + id: 208d + name: 'System peripheral: Intel Corporation Sky Lake-E CHA Registers (rev 04)' +- bus: '16' + dev: 08 + fn: '5' + id: 208d + name: 'System peripheral: Intel Corporation Sky Lake-E CHA Registers (rev 04)' +- bus: '16' + dev: 08 + fn: '6' + id: 208d + name: 'System peripheral: Intel Corporation Sky Lake-E CHA Registers (rev 04)' +- bus: '16' + dev: 08 + fn: '7' + id: 208d + name: 'System peripheral: Intel Corporation Sky Lake-E CHA Registers (rev 04)' +- bus: '16' + dev: 09 + fn: '0' + id: 208d + name: 'System peripheral: Intel Corporation Sky Lake-E CHA Registers (rev 04)' +- bus: '16' + dev: 09 + fn: '1' + id: 208d + name: 'System peripheral: Intel Corporation Sky Lake-E CHA Registers (rev 04)' +- bus: '16' + dev: 09 + fn: '2' + id: 208d + name: 'System peripheral: Intel Corporation Sky Lake-E CHA Registers (rev 04)' +- bus: '16' + dev: 09 + fn: '3' + id: 208d + name: 'System peripheral: Intel Corporation Sky Lake-E CHA Registers (rev 04)' +- bus: '16' + dev: 09 + fn: '4' + id: 208d + name: 'System peripheral: Intel Corporation Sky Lake-E CHA Registers (rev 04)' +- bus: '16' + dev: 09 + fn: '5' + id: 208d + name: 'System peripheral: Intel Corporation Sky Lake-E CHA Registers (rev 04)' +- bus: '16' + dev: 09 + fn: '6' + id: 208d + name: 'System peripheral: Intel Corporation Sky Lake-E CHA Registers (rev 04)' +- bus: '16' + dev: 09 + fn: '7' + id: 208d + name: 'System peripheral: Intel Corporation Sky Lake-E CHA Registers (rev 04)' +- bus: '16' + dev: 0a + fn: '0' + id: 208d + name: 'System peripheral: Intel Corporation Sky Lake-E CHA Registers (rev 04)' +- bus: '16' + dev: 0a + fn: '1' + id: 208d + name: 'System peripheral: Intel Corporation Sky Lake-E CHA Registers (rev 04)' +- bus: '16' + dev: 0e + fn: '0' + id: 208e + name: 'System peripheral: Intel Corporation Sky Lake-E CHA Registers (rev 04)' +- bus: '16' + dev: 0e + fn: '1' + id: 208e + name: 'System peripheral: Intel Corporation Sky Lake-E CHA Registers (rev 04)' +- bus: '16' + dev: 0e + fn: '2' + id: 208e + name: 'System peripheral: Intel Corporation Sky Lake-E CHA Registers (rev 04)' +- bus: '16' + dev: 0e + fn: '3' + id: 208e + name: 'System peripheral: Intel Corporation Sky Lake-E CHA Registers (rev 04)' +- bus: '16' + dev: 0e + fn: '4' + id: 208e + name: 'System peripheral: Intel Corporation Sky Lake-E CHA Registers (rev 04)' +- bus: '16' + dev: 0e + fn: '5' + id: 208e + name: 'System peripheral: Intel Corporation Sky Lake-E CHA Registers (rev 04)' +- bus: '16' + dev: 0e + fn: '6' + id: 208e + name: 'System peripheral: Intel Corporation Sky Lake-E CHA Registers (rev 04)' +- bus: '16' + dev: 0e + fn: '7' + id: 208e + name: 'System peripheral: Intel Corporation Sky Lake-E CHA Registers (rev 04)' +- bus: '16' + dev: 0f + fn: '0' + id: 208e + name: 'System peripheral: Intel Corporation Sky Lake-E CHA Registers (rev 04)' +- bus: '16' + dev: 0f + fn: '1' + id: 208e + name: 'System peripheral: Intel Corporation Sky Lake-E CHA Registers (rev 04)' +- bus: '16' + dev: 0f + fn: '2' + id: 208e + name: 'System peripheral: Intel Corporation Sky Lake-E CHA Registers (rev 04)' +- bus: '16' + dev: 0f + fn: '3' + id: 208e + name: 'System peripheral: Intel Corporation Sky Lake-E CHA Registers (rev 04)' +- bus: '16' + dev: 0f + fn: '4' + id: 208e + name: 'System peripheral: Intel Corporation Sky Lake-E CHA Registers (rev 04)' +- bus: '16' + dev: 0f + fn: '5' + id: 208e + name: 'System peripheral: Intel Corporation Sky Lake-E CHA Registers (rev 04)' +- bus: '16' + dev: 0f + fn: '6' + id: 208e + name: 'System peripheral: Intel Corporation Sky Lake-E CHA Registers (rev 04)' +- bus: '16' + dev: 0f + fn: '7' + id: 208e + name: 'System peripheral: Intel Corporation Sky Lake-E CHA Registers (rev 04)' +- bus: '16' + dev: '10' + fn: '0' + id: 208e + name: 'System peripheral: Intel Corporation Sky Lake-E CHA Registers (rev 04)' +- bus: '16' + dev: '10' + fn: '1' + id: 208e + name: 'System peripheral: Intel Corporation Sky Lake-E CHA Registers (rev 04)' +- bus: '16' + dev: 1d + fn: '0' + id: '2054' + name: 'System peripheral: Intel Corporation Sky Lake-E CHA Registers (rev 04)' +- bus: '16' + dev: 1d + fn: '1' + id: '2055' + name: 'System peripheral: Intel Corporation Sky Lake-E CHA Registers (rev 04)' +- bus: '16' + dev: 1d + fn: '2' + id: '2056' + name: 'System peripheral: Intel Corporation Sky Lake-E CHA Registers (rev 04)' +- bus: '16' + dev: 1d + fn: '3' + id: '2057' + name: 'System peripheral: Intel Corporation Sky Lake-E CHA Registers (rev 04)' +- bus: '16' + dev: 1e + fn: '0' + id: '2080' + name: 'System peripheral: Intel Corporation Sky Lake-E PCU Registers (rev 04)' +- bus: '16' + dev: 1e + fn: '1' + id: '2081' + name: 'System peripheral: Intel Corporation Sky Lake-E PCU Registers (rev 04)' +- bus: '16' + dev: 1e + fn: '2' + id: '2082' + name: 'System peripheral: Intel Corporation Sky Lake-E PCU Registers (rev 04)' +- bus: '16' + dev: 1e + fn: '3' + id: '2083' + name: 'System peripheral: Intel Corporation Sky Lake-E PCU Registers (rev 04)' +- bus: '16' + dev: 1e + fn: '4' + id: '2084' + name: 'System peripheral: Intel Corporation Sky Lake-E PCU Registers (rev 04)' +- bus: '16' + dev: 1e + fn: '5' + id: '2085' + name: 'System peripheral: Intel Corporation Sky Lake-E PCU Registers (rev 04)' +- bus: '16' + dev: 1e + fn: '6' + id: '2086' + name: 'System peripheral: Intel Corporation Sky Lake-E PCU Registers (rev 04)' +- bus: '17' + dev: '00' + fn: '0' + id: b880 + name: 'Ethernet controller: Broadcom Inc. and subsidiaries BCM56880 Switch ASIC + (rev 11)' +- bus: '64' + dev: '00' + fn: '0' + id: '2030' + name: 'PCI bridge: Intel Corporation Sky Lake-E PCI Express Root Port A (rev 04)' +- bus: '64' + dev: '01' + fn: '0' + id: '2031' + name: 'PCI bridge: Intel Corporation Sky Lake-E PCI Express Root Port B (rev 04)' +- bus: '64' + dev: '02' + fn: '0' + id: '2032' + name: 'PCI bridge: Intel Corporation Sky Lake-E PCI Express Root Port C (rev 04)' +- bus: '64' + dev: '03' + fn: '0' + id: '2033' + name: 'PCI bridge: Intel Corporation Sky Lake-E PCI Express Root Port D (rev 04)' +- bus: '64' + dev: '05' + fn: '0' + id: '2034' + name: 'System peripheral: Intel Corporation Sky Lake-E VT-d (rev 04)' +- bus: '64' + dev: '05' + fn: '2' + id: '2035' + name: 'System peripheral: Intel Corporation Sky Lake-E RAS Configuration Registers + (rev 04)' +- bus: '64' + dev: '05' + fn: '4' + id: '2036' + name: 'PIC: Intel Corporation Sky Lake-E IOxAPIC Configuration Registers (rev 04)' +- bus: '64' + dev: 08 + fn: '0' + id: '2066' + name: 'System peripheral: Intel Corporation Sky Lake-E Integrated Memory Controller + (rev 04)' +- bus: '64' + dev: 09 + fn: '0' + id: '2066' + name: 'System peripheral: Intel Corporation Sky Lake-E Integrated Memory Controller + (rev 04)' +- bus: '64' + dev: 0a + fn: '0' + id: '2040' + name: 'System peripheral: Intel Corporation Sky Lake-E Integrated Memory Controller + (rev 04)' +- bus: '64' + dev: 0a + fn: '1' + id: '2041' + name: 'System peripheral: Intel Corporation Sky Lake-E Integrated Memory Controller + (rev 04)' +- bus: '64' + dev: 0a + fn: '2' + id: '2042' + name: 'System peripheral: Intel Corporation Sky Lake-E Integrated Memory Controller + (rev 04)' +- bus: '64' + dev: 0a + fn: '3' + id: '2043' + name: 'System peripheral: Intel Corporation Sky Lake-E Integrated Memory Controller + (rev 04)' +- bus: '64' + dev: 0a + fn: '4' + id: '2044' + name: 'System peripheral: Intel Corporation Sky Lake-E Integrated Memory Controller + (rev 04)' +- bus: '64' + dev: 0a + fn: '5' + id: '2045' + name: 'System peripheral: Intel Corporation Sky Lake-E LM Channel 1 (rev 04)' +- bus: '64' + dev: 0a + fn: '6' + id: '2046' + name: 'System peripheral: Intel Corporation Sky Lake-E LMS Channel 1 (rev 04)' +- bus: '64' + dev: 0a + fn: '7' + id: '2047' + name: 'System peripheral: Intel Corporation Sky Lake-E LMDP Channel 1 (rev 04)' +- bus: '64' + dev: 0b + fn: '0' + id: '2048' + name: 'System peripheral: Intel Corporation Sky Lake-E DECS Channel 2 (rev 04)' +- bus: '64' + dev: 0b + fn: '1' + id: '2049' + name: 'System peripheral: Intel Corporation Sky Lake-E LM Channel 2 (rev 04)' +- bus: '64' + dev: 0b + fn: '2' + id: 204a + name: 'System peripheral: Intel Corporation Sky Lake-E LMS Channel 2 (rev 04)' +- bus: '64' + dev: 0b + fn: '3' + id: 204b + name: 'System peripheral: Intel Corporation Sky Lake-E LMDP Channel 2 (rev 04)' +- bus: '64' + dev: 0c + fn: '0' + id: '2040' + name: 'System peripheral: Intel Corporation Sky Lake-E Integrated Memory Controller + (rev 04)' +- bus: '64' + dev: 0c + fn: '1' + id: '2041' + name: 'System peripheral: Intel Corporation Sky Lake-E Integrated Memory Controller + (rev 04)' +- bus: '64' + dev: 0c + fn: '2' + id: '2042' + name: 'System peripheral: Intel Corporation Sky Lake-E Integrated Memory Controller + (rev 04)' +- bus: '64' + dev: 0c + fn: '3' + id: '2043' + name: 'System peripheral: Intel Corporation Sky Lake-E Integrated Memory Controller + (rev 04)' +- bus: '64' + dev: 0c + fn: '4' + id: '2044' + name: 'System peripheral: Intel Corporation Sky Lake-E Integrated Memory Controller + (rev 04)' +- bus: '64' + dev: 0c + fn: '5' + id: '2045' + name: 'System peripheral: Intel Corporation Sky Lake-E LM Channel 1 (rev 04)' +- bus: '64' + dev: 0c + fn: '6' + id: '2046' + name: 'System peripheral: Intel Corporation Sky Lake-E LMS Channel 1 (rev 04)' +- bus: '64' + dev: 0c + fn: '7' + id: '2047' + name: 'System peripheral: Intel Corporation Sky Lake-E LMDP Channel 1 (rev 04)' +- bus: '64' + dev: 0d + fn: '0' + id: '2048' + name: 'System peripheral: Intel Corporation Sky Lake-E DECS Channel 2 (rev 04)' +- bus: '64' + dev: 0d + fn: '1' + id: '2049' + name: 'System peripheral: Intel Corporation Sky Lake-E LM Channel 2 (rev 04)' +- bus: '64' + dev: 0d + fn: '2' + id: 204a + name: 'System peripheral: Intel Corporation Sky Lake-E LMS Channel 2 (rev 04)' +- bus: '64' + dev: 0d + fn: '3' + id: 204b + name: 'System peripheral: Intel Corporation Sky Lake-E LMDP Channel 2 (rev 04)' +- bus: b2 + dev: '00' + fn: '0' + id: '2030' + name: 'PCI bridge: Intel Corporation Sky Lake-E PCI Express Root Port A (rev 04)' +- bus: b2 + dev: '05' + fn: '0' + id: '2034' + name: 'System peripheral: Intel Corporation Sky Lake-E VT-d (rev 04)' +- bus: b2 + dev: '05' + fn: '2' + id: '2035' + name: 'System peripheral: Intel Corporation Sky Lake-E RAS Configuration Registers + (rev 04)' +- bus: b2 + dev: '05' + fn: '4' + id: '2036' + name: 'PIC: Intel Corporation Sky Lake-E IOxAPIC Configuration Registers (rev 04)' +- bus: b2 + dev: '12' + fn: '0' + id: 204c + name: 'Performance counters: Intel Corporation Sky Lake-E M3KTI Registers (rev 04)' +- bus: b2 + dev: '12' + fn: '1' + id: 204d + name: 'Performance counters: Intel Corporation Sky Lake-E M3KTI Registers (rev 04)' +- bus: b2 + dev: '12' + fn: '2' + id: 204e + name: 'System peripheral: Intel Corporation Sky Lake-E M3KTI Registers (rev 04)' +- bus: b2 + dev: '15' + fn: '0' + id: '2018' + name: 'System peripheral: Intel Corporation Sky Lake-E M2PCI Registers (rev 04)' +- bus: b2 + dev: '16' + fn: '0' + id: '2018' + name: 'System peripheral: Intel Corporation Sky Lake-E M2PCI Registers (rev 04)' +- bus: b2 + dev: '16' + fn: '4' + id: '2018' + name: 'System peripheral: Intel Corporation Sky Lake-E M2PCI Registers (rev 04)' +- bus: b2 + dev: '17' + fn: '0' + id: '2018' + name: 'System peripheral: Intel Corporation Sky Lake-E M2PCI Registers (rev 04)' +- bus: b3 + dev: '00' + fn: '0' + id: 37c0 + name: 'PCI bridge: Intel Corporation Device 37c0 (rev 04)' +- bus: b4 + dev: '00' + fn: '0' + id: 37c2 + name: 'PCI bridge: Intel Corporation Device 37c2 (rev 04)' +- bus: b4 + dev: '03' + fn: '0' + id: 37c5 + name: 'PCI bridge: Intel Corporation Device 37c5 (rev 04)' +- bus: b5 + dev: '00' + fn: '0' + id: 37c8 + name: 'Co-processor: Intel Corporation C62x Chipset QuickAssist Technology (rev + 04)' +- bus: b6 + dev: '00' + fn: '0' + id: 37d3 + name: 'Ethernet controller: Intel Corporation Ethernet Connection X722 for 10GbE + SFP+ (rev 04)' +- bus: b6 + dev: '00' + fn: '1' + id: 37d3 + name: 'Ethernet controller: Intel Corporation Ethernet Connection X722 for 10GbE + SFP+ (rev 04)' +- bus: b6 + dev: '00' + fn: '2' + id: 37ce + name: 'Ethernet controller: Intel Corporation Ethernet Connection X722 for 10GbE + backplane (rev 04)' +- bus: b6 + dev: '00' + fn: '3' + id: 37ce + name: 'Ethernet controller: Intel Corporation Ethernet Connection X722 for 10GbE + backplane (rev 04)' diff --git a/device/ufispace/x86_64-ufispace_s9301_32d-r0/pddf/pd-plugin.json b/device/ufispace/x86_64-ufispace_s9301_32d-r0/pddf/pd-plugin.json new file mode 100644 index 0000000000..24aa151f89 --- /dev/null +++ b/device/ufispace/x86_64-ufispace_s9301_32d-r0/pddf/pd-plugin.json @@ -0,0 +1,86 @@ +{ + + "XCVR": + { + "xcvr_present": + { + "i2c": + { + "valmap-SFP": {"1":true, "0":false }, + "valmap-QSFP-DD": {"1":true, "0":false} + } + + }, + "plug_status": + { + "inserted": "1", + "removed": "0" + } + }, + "PSU": + { + "psu_present": + { + "i2c": + { + "valmap": { "1":true, "0":false } + }, + "bmc": + { + "valmap": { "Device Present":true, "Device Absent":false } + } + }, + + "psu_power_good": + { + "i2c": + { + "valmap": { "1": true, "0":false } + }, + "bmc": + { + "valmap": { "State Asserted":true, "State Deasserted":false } + } + }, + + "psu_fan_dir": + { + "i2c": + { + "valmap": { "F2B":"EXHAUST", "B2F":"INTAKE" } + } + }, + "DEFAULT_TYPE": "AC", + "PSU_FAN_MAX_SPEED":"30000" + }, + + "FAN": + { + "direction": + { + "bmc": + { + "valmap": {"0": "UNKNOW", "1":"INTAKE", "2":"EXHAUST"} + } + }, + + "present": + { + "i2c": + { + "valmap": {"1":true, "0":false} + }, + "bmc": + { + "valmap": { "0x0280|":true, "0x0180|":false } + } + }, + "FAN_R_MAX_SPEED":"32000", + "FAN_F_MAX_SPEED":"36200" + }, + + "REBOOT_CAUSE": + { + "reboot_cause_file": "/host/reboot-cause/reboot-cause.txt" + } +} diff --git a/device/ufispace/x86_64-ufispace_s9301_32d-r0/pddf/pddf-device.json b/device/ufispace/x86_64-ufispace_s9301_32d-r0/pddf/pddf-device.json new file mode 100644 index 0000000000..e23d949c38 --- /dev/null +++ b/device/ufispace/x86_64-ufispace_s9301_32d-r0/pddf/pddf-device.json @@ -0,0 +1,5138 @@ +{ + "PLATFORM": { + "num_psus": 2, + "num_fantrays": 6, + "num_fans_pertray": 2, + "num_ports": 34, + "num_temps": 7, + "pddf_dev_types": { + "description": "PDDF supported devices", + "CPLD": [ + "i2c_cpld" + ], + "PSU": [ + "psu_eeprom", + "psu_pmbus" + ], + "PORT_MODULE": [ + "pddf_xcvr" + ] + }, + "std_perm_kos": [ + "igb", + "i40e" + ], + "std_kos": [ + "i2c_i801", + "i2c_dev", + "i2c_mux_pca954x", + "optoe", + "lm75", + "gpio-pca953x" + ], + "pddf_kos": [ + "pddf_client_module", + "pddf_cpld_module", + "pddf_cpld_driver", + "pddf_mux_module", + "pddf_xcvr_module", + "pddf_xcvr_driver_module", + "pddf_psu_driver_module", + "pddf_psu_module", + "pddf_fan_driver_module", + "pddf_fan_module", + "pddf_led_module", + "pddf_gpio_module" + ], + "custom_kos": [ + "x86-64-ufispace-s9301-32d-lpc", + "x86-64-ufispace-s9301-32d-sys-eeprom", + "pddf_custom_sysstatus_module" + ] + }, + "SYSTEM": { + "dev_info": { + "device_type": "CPU", + "device_name": "ROOT_COMPLEX", + "device_parent": null + }, + "i2c": { + "CONTROLLERS": [ + { + "dev_name": "i2c-0", + "dev": "SMBUS0" + } + ] + } + }, + "SMBUS0": { + "dev_info": { + "device_type": "SMBUS", + "device_name": "SMBUS0", + "device_parent": "SYSTEM" + }, + "i2c": { + "topo_info": { + "dev_addr": "0x0" + }, + "DEVICES": [ + { + "dev": "EEPROM1" + }, + { + "dev": "MUX1" + }, + { + "dev": "MUX2" + }, + { + "dev": "GPIO1" + } + ] + } + }, + "EEPROM1": { + "dev_info": { + "device_type": "EEPROM", + "device_name": "EEPROM1", + "device_parent": "SMBUS0" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x0", + "dev_addr": "0x57", + "dev_type": "sys_eeprom" + }, + "dev_attr": { + "access_mode": "BLOCK" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "TEMP1": { + "dev_info": { + "device_type": "TEMP_SENSOR", + "device_name": "TEMP1", + "device_parent": "SMBUS0" + }, + "dev_attr": { + "display_name": "Temp_CPU_PECI" + }, + "bmc": { + "ipmitool": { + "attr_list": [ + { + "attr_name": "temp1_input", + "bmc_cmd": "ipmitool sensor", + "raw": "0", + "field_name": "TEMP_CPU_PECI", + "field_pos": "3" + }, + { + "attr_name": "temp1_high_crit_threshold", + "bmc_cmd": "ipmitool sensor", + "raw": "0", + "field_name": "TEMP_CPU_PECI", + "field_pos": "20" + }, + { + "attr_name": "temp1_high_threshold", + "bmc_cmd": "ipmitool sensor", + "raw": "0", + "field_name": "TEMP_CPU_PECI", + "field_pos": "18" + }, + { + "attr_name": "temp1_low_threshold", + "bmc_cmd": "ipmitool sensor", + "raw": "0", + "field_name": "TEMP_CPU_PECI", + "field_pos": "16" + } + ] + } + } + }, + "TEMP2": { + "dev_info": { + "device_type": "TEMP_SENSOR", + "device_name": "TEMP2", + "device_parent": "SMBUS0" + }, + "dev_attr": { + "display_name": "Temp_CPU_ENV" + }, + "bmc": { + "ipmitool": { + "attr_list": [ + { + "attr_name": "temp1_input", + "bmc_cmd": "ipmitool sensor", + "raw": "0", + "field_name": "TEMP_CPU_ENV", + "field_pos": "3" + }, + { + "attr_name": "temp1_high_crit_threshold", + "bmc_cmd": "ipmitool sensor", + "raw": "0", + "field_name": "TEMP_CPU_ENV", + "field_pos": "20" + }, + { + "attr_name": "temp1_high_threshold", + "bmc_cmd": "ipmitool sensor", + "raw": "0", + "field_name": "TEMP_CPU_ENV", + "field_pos": "18" + }, + { + "attr_name": "temp1_low_threshold", + "bmc_cmd": "ipmitool sensor", + "raw": "0", + "field_name": "TEMP_CPU_ENV", + "field_pos": "16" + } + ] + } + } + }, + "TEMP3": { + "dev_info": { + "device_type": "TEMP_SENSOR", + "device_name": "TEMP3", + "device_parent": "SMBUS0" + }, + "dev_attr": { + "display_name": "Temp_CPU_ENV2" + }, + "bmc": { + "ipmitool": { + "attr_list": [ + { + "attr_name": "temp1_input", + "bmc_cmd": "ipmitool sensor", + "raw": "0", + "field_name": "TEMP_CPU_ENV_2", + "field_pos": "3" + }, + { + "attr_name": "temp1_high_crit_threshold", + "bmc_cmd": "ipmitool sensor", + "raw": "0", + "field_name": "TEMP_CPU_ENV_2", + "field_pos": "20" + }, + { + "attr_name": "temp1_high_threshold", + "bmc_cmd": "ipmitool sensor", + "raw": "0", + "field_name": "TEMP_CPU_ENV_2", + "field_pos": "18" + }, + { + "attr_name": "temp1_low_threshold", + "bmc_cmd": "ipmitool sensor", + "raw": "0", + "field_name": "TEMP_CPU_ENV_2", + "field_pos": "16" + } + ] + } + } + }, + "TEMP4": { + "dev_info": { + "device_type": "TEMP_SENSOR", + "device_name": "TEMP4", + "device_parent": "SMBUS0" + }, + "dev_attr": { + "display_name": "Temp_MAC_ENV" + }, + "bmc": { + "ipmitool": { + "attr_list": [ + { + "attr_name": "temp1_input", + "bmc_cmd": "ipmitool sensor", + "raw": "0", + "field_name": "TEMP_MAC_ENV", + "field_pos": "3" + }, + { + "attr_name": "temp1_high_crit_threshold", + "bmc_cmd": "ipmitool sensor", + "raw": "0", + "field_name": "TEMP_MAC_ENV", + "field_pos": "20" + }, + { + "attr_name": "temp1_high_threshold", + "bmc_cmd": "ipmitool sensor", + "raw": "0", + "field_name": "TEMP_MAC_ENV", + "field_pos": "18" + }, + { + "attr_name": "temp1_low_threshold", + "bmc_cmd": "ipmitool sensor", + "raw": "0", + "field_name": "TEMP_MAC_ENV", + "field_pos": "16" + } + ] + } + } + }, + "TEMP5": { + "dev_info": { + "device_type": "TEMP_SENSOR", + "device_name": "TEMP5", + "device_parent": "SMBUS0" + }, + "dev_attr": { + "display_name": "Temp_MAC_DIE" + }, + "bmc": { + "ipmitool": { + "attr_list": [ + { + "attr_name": "temp1_input", + "bmc_cmd": "ipmitool sensor", + "raw": "0", + "field_name": "TEMP_MAC_DIE", + "field_pos": "3" + }, + { + "attr_name": "temp1_high_crit_threshold", + "bmc_cmd": "ipmitool sensor", + "raw": "0", + "field_name": "TEMP_MAC_DIE", + "field_pos": "20" + }, + { + "attr_name": "temp1_high_threshold", + "bmc_cmd": "ipmitool sensor", + "raw": "0", + "field_name": "TEMP_MAC_DIE", + "field_pos": "18" + }, + { + "attr_name": "temp1_low_threshold", + "bmc_cmd": "ipmitool sensor", + "raw": "0", + "field_name": "TEMP_MAC_DIE", + "field_pos": "16" + } + ] + } + } + }, + "TEMP6": { + "dev_info": { + "device_type": "TEMP_SENSOR", + "device_name": "TEMP6", + "device_parent": "SMBUS0" + }, + "dev_attr": { + "display_name": "Temp_CAGE" + }, + "bmc": { + "ipmitool": { + "attr_list": [ + { + "attr_name": "temp1_input", + "bmc_cmd": "ipmitool sensor", + "raw": "0", + "field_name": "TEMP_CAGE", + "field_pos": "3" + }, + { + "attr_name": "temp1_high_crit_threshold", + "bmc_cmd": "ipmitool sensor", + "raw": "0", + "field_name": "TEMP_CAGE", + "field_pos": "20" + }, + { + "attr_name": "temp1_high_threshold", + "bmc_cmd": "ipmitool sensor", + "raw": "0", + "field_name": "TEMP_CAGE", + "field_pos": "18" + }, + { + "attr_name": "temp1_low_threshold", + "bmc_cmd": "ipmitool sensor", + "raw": "0", + "field_name": "TEMP_CAGE", + "field_pos": "16" + } + ] + } + } + }, + "TEMP7": { + "dev_info": { + "device_type": "TEMP_SENSOR", + "device_name": "TEMP7", + "device_parent": "SMBUS0" + }, + "dev_attr": { + "display_name": "Temp_PSU_CONNTOR" + }, + "bmc": { + "ipmitool": { + "attr_list": [ + { + "attr_name": "temp1_input", + "bmc_cmd": "ipmitool sensor", + "raw": "0", + "field_name": "TEMP_PSU_CONN", + "field_pos": "3" + }, + { + "attr_name": "temp1_high_crit_threshold", + "bmc_cmd": "ipmitool sensor", + "raw": "0", + "field_name": "TEMP_PSU_CONN", + "field_pos": "20" + }, + { + "attr_name": "temp1_high_threshold", + "bmc_cmd": "ipmitool sensor", + "raw": "0", + "field_name": "TEMP_PSU_CONN", + "field_pos": "18" + }, + { + "attr_name": "temp1_low_threshold", + "bmc_cmd": "ipmitool sensor", + "raw": "0", + "field_name": "TEMP_PSU_CONN", + "field_pos": "16" + } + ] + } + } + }, + "MUX1": { + "dev_info": { + "device_type": "MUX", + "device_name": "MUX1", + "device_parent": "SMBUS0" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x0", + "dev_addr": "0x73", + "dev_type": "pca9548" + }, + "dev_attr": { + "virt_bus": "0x1", + "idle_state": "-2" + }, + "channel": [ + { + "chn": "1", + "dev": "CPLD1" + }, + { + "chn": "1", + "dev": "CPLD2" + }, + { + "chn": "1", + "dev": "CPLD3" + }, + { + "chn": "4", + "dev": "GPIO2" + } + ] + } + }, + "MUX2": { + "dev_info": { + "device_type": "MUX", + "device_name": "MUX2", + "device_parent": "SMBUS0" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x0", + "dev_addr": "0x72", + "dev_type": "pca9548" + }, + "dev_attr": { + "virt_bus": "0x9", + "idle_state": "-2" + }, + "channel": [ + { + "chn": "0", + "dev": "MUX3" + }, + { + "chn": "1", + "dev": "MUX4" + }, + { + "chn": "2", + "dev": "MUX5" + }, + { + "chn": "3", + "dev": "MUX6" + }, + { + "chn": "4", + "dev": "PORT33" + }, + { + "chn": "5", + "dev": "PORT34" + } + ] + } + }, + "MUX3": { + "dev_info": { + "device_type": "MUX", + "device_name": "MUX3", + "device_parent": "MUX2" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x9", + "dev_addr": "0x76", + "dev_type": "pca9548" + }, + "dev_attr": { + "virt_bus": "0x11", + "idle_state": "-2" + }, + "channel": [ + { + "chn": "0", + "dev": "PORT1" + }, + { + "chn": "1", + "dev": "PORT2" + }, + { + "chn": "2", + "dev": "PORT3" + }, + { + "chn": "3", + "dev": "PORT4" + }, + { + "chn": "4", + "dev": "PORT5" + }, + { + "chn": "5", + "dev": "PORT6" + }, + { + "chn": "6", + "dev": "PORT7" + }, + { + "chn": "7", + "dev": "PORT8" + } + ] + } + }, + "MUX4": { + "dev_info": { + "device_type": "MUX", + "device_name": "MUX4", + "device_parent": "MUX2" + }, + "i2c": { + "topo_info": { + "parent_bus": "0xa", + "dev_addr": "0x76", + "dev_type": "pca9548" + }, + "dev_attr": { + "virt_bus": "0x19", + "idle_state": "-2" + }, + "channel": [ + { + "chn": "0", + "dev": "PORT9" + }, + { + "chn": "1", + "dev": "PORT10" + }, + { + "chn": "2", + "dev": "PORT11" + }, + { + "chn": "3", + "dev": "PORT12" + }, + { + "chn": "4", + "dev": "PORT13" + }, + { + "chn": "5", + "dev": "PORT14" + }, + { + "chn": "6", + "dev": "PORT15" + }, + { + "chn": "7", + "dev": "PORT16" + } + ] + } + }, + "MUX5": { + "dev_info": { + "device_type": "MUX", + "device_name": "MUX5", + "device_parent": "MUX2" + }, + "i2c": { + "topo_info": { + "parent_bus": "0xb", + "dev_addr": "0x76", + "dev_type": "pca9548" + }, + "dev_attr": { + "virt_bus": "0x21", + "idle_state": "-2" + }, + "channel": [ + { + "chn": "0", + "dev": "PORT17" + }, + { + "chn": "1", + "dev": "PORT18" + }, + { + "chn": "2", + "dev": "PORT19" + }, + { + "chn": "3", + "dev": "PORT20" + }, + { + "chn": "4", + "dev": "PORT21" + }, + { + "chn": "5", + "dev": "PORT22" + }, + { + "chn": "6", + "dev": "PORT23" + }, + { + "chn": "7", + "dev": "PORT24" + } + ] + } + }, + "MUX6": { + "dev_info": { + "device_type": "MUX", + "device_name": "MUX6", + "device_parent": "MUX2" + }, + "i2c": { + "topo_info": { + "parent_bus": "0xc", + "dev_addr": "0x76", + "dev_type": "pca9548" + }, + "dev_attr": { + "virt_bus": "0x29", + "idle_state": "-2" + }, + "channel": [ + { + "chn": "0", + "dev": "PORT25" + }, + { + "chn": "1", + "dev": "PORT26" + }, + { + "chn": "2", + "dev": "PORT27" + }, + { + "chn": "3", + "dev": "PORT28" + }, + { + "chn": "4", + "dev": "PORT29" + }, + { + "chn": "5", + "dev": "PORT30" + }, + { + "chn": "6", + "dev": "PORT31" + }, + { + "chn": "7", + "dev": "PORT32" + } + ] + } + }, + "GPIO1": { + "dev_info": { + "device_type": "GPIO", + "device_name": "GPIO1", + "device_parent": "SMBUS0" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x0", + "dev_addr": "0x77", + "dev_type": "pca9539" + }, + "dev_attr": { + "gpio_base": "0x1f0" + }, + "ports": [ + { + "port_num": "0", + "direction": "in", + "value": "", + "edge": "", + "active_low": "" + }, + { + "port_num": "1", + "direction": "in", + "value": "", + "edge": "", + "active_low": "" + }, + { + "port_num": "2", + "direction": "in", + "value": "", + "edge": "", + "active_low": "" + }, + { + "port_num": "3", + "direction": "in", + "value": "", + "edge": "", + "active_low": "" + }, + { + "port_num": "4", + "direction": "in", + "value": "", + "edge": "", + "active_low": "" + }, + { + "port_num": "5", + "direction": "in", + "value": "", + "edge": "", + "active_low": "" + }, + { + "port_num": "6", + "direction": "in", + "value": "", + "edge": "", + "active_low": "" + }, + { + "port_num": "7", + "direction": "in", + "value": "", + "edge": "", + "active_low": "" + }, + { + "port_num": "8", + "direction": "in", + "value": "", + "edge": "", + "active_low": "" + }, + { + "port_num": "9", + "direction": "in", + "value": "", + "edge": "", + "active_low": "" + }, + { + "port_num": "10", + "direction": "in", + "value": "", + "edge": "", + "active_low": "" + }, + { + "port_num": "11", + "direction": "in", + "value": "", + "edge": "", + "active_low": "" + }, + { + "port_num": "12", + "direction": "in", + "value": "", + "edge": "", + "active_low": "" + }, + { + "port_num": "13", + "direction": "in", + "value": "", + "edge": "", + "active_low": "" + }, + { + "port_num": "14", + "direction": "in", + "value": "", + "edge": "", + "active_low": "" + }, + { + "port_num": "15", + "direction": "in", + "value": "", + "edge": "", + "active_low": "" + } + ] + } + }, + "GPIO2": { + "dev_info": { + "device_type": "GPIO", + "device_name": "GPIO2", + "device_parent": "MUX1" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x6", + "dev_addr": "0x76", + "dev_type": "pca9539" + }, + "dev_attr": { + "gpio_base": "0x1e0" + }, + "ports": [ + { + "port_num": "0", + "direction": "in", + "value": "", + "edge": "", + "active_low": "" + }, + { + "port_num": "1", + "direction": "in", + "value": "", + "edge": "", + "active_low": "" + }, + { + "port_num": "2", + "direction": "in", + "value": "", + "edge": "", + "active_low": "" + }, + { + "port_num": "3", + "direction": "in", + "value": "", + "edge": "", + "active_low": "" + }, + { + "port_num": "4", + "direction": "in", + "value": "", + "edge": "", + "active_low": "" + }, + { + "port_num": "5", + "direction": "in", + "value": "", + "edge": "", + "active_low": "" + }, + { + "port_num": "6", + "direction": "in", + "value": "", + "edge": "", + "active_low": "" + }, + { + "port_num": "7", + "direction": "in", + "value": "", + "edge": "", + "active_low": "" + }, + { + "port_num": "8", + "direction": "in", + "value": "", + "edge": "", + "active_low": "" + }, + { + "port_num": "9", + "direction": "in", + "value": "", + "edge": "", + "active_low": "" + }, + { + "port_num": "10", + "direction": "in", + "value": "", + "edge": "", + "active_low": "" + }, + { + "port_num": "11", + "direction": "in", + "value": "", + "edge": "", + "active_low": "" + }, + { + "port_num": "12", + "direction": "in", + "value": "", + "edge": "", + "active_low": "" + }, + { + "port_num": "13", + "direction": "in", + "value": "", + "edge": "", + "active_low": "" + }, + { + "port_num": "14", + "direction": "in", + "value": "", + "edge": "", + "active_low": "" + }, + { + "port_num": "15", + "direction": "in", + "value": "", + "edge": "", + "active_low": "" + } + ] + } + }, + "CPLD1": { + "dev_info": { + "device_type": "CPLD", + "device_name": "CPLD1", + "device_parent": "MUX1" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x2", + "dev_addr": "0x30", + "dev_type": "i2c_cpld" + }, + "dev_attr": {} + } + }, + "CPLD2": { + "dev_info": { + "device_type": "CPLD", + "device_name": "CPLD2", + "device_parent": "MUX1" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x2", + "dev_addr": "0x31", + "dev_type": "i2c_cpld" + }, + "dev_attr": {} + } + }, + "CPLD3": { + "dev_info": { + "device_type": "CPLD", + "device_name": "CPLD3", + "device_parent": "MUX1" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x2", + "dev_addr": "0x32", + "dev_type": "i2c_cpld" + }, + "dev_attr": {} + } + }, + "SYSSTATUS": { + "dev_info": { + "device_type": "SYSSTAT", + "device_name": "SYSSTATUS" + }, + "dev_attr": {}, + "attr_list": [ + { + "attr_name": "board_info", + "attr_devaddr": "0x30", + "attr_offset": "0x0", + "attr_mask": "0xff", + "attr_len": "0x1" + }, + { + "attr_name": "cpld1_version", + "attr_devaddr": "0x30", + "attr_offset": "0x2", + "attr_mask": "0xff", + "attr_len": "0x1" + }, + { + "attr_name": "cpld2_version", + "attr_devaddr": "0x31", + "attr_offset": "0x2", + "attr_mask": "0xff", + "attr_len": "0x1" + }, + { + "attr_name": "cpld3_version", + "attr_devaddr": "0x32", + "attr_offset": "0x2", + "attr_mask": "0xff", + "attr_len": "0x1" + }, + { + "attr_name": "mac_reset", + "attr_devaddr": "0x30", + "attr_offset": "0x40", + "attr_mask": "0xff", + "attr_len": "0x1" + }, + { + "attr_name": "mux_reset", + "attr_devaddr": "0x30", + "attr_offset": "0x46", + "attr_mask": "0xff", + "attr_len": "0x1" + }, + { + "attr_name": "psu_status", + "attr_devaddr": "0x30", + "attr_offset": "0x51", + "attr_mask": "0xff", + "attr_len": "0x1" + }, + { + "attr_name": "system_led_0", + "attr_devaddr": "0x30", + "attr_offset": "0x80", + "attr_mask": "0xff", + "attr_len": "0x1" + }, + { + "attr_name": "system_led_1", + "attr_devaddr": "0x30", + "attr_offset": "0x81", + "attr_mask": "0xff", + "attr_len": "0x1" + }, + { + "attr_name": "beacon_led", + "attr_devaddr": "0x30", + "attr_offset": "0x84", + "attr_mask": "0xff", + "attr_len": "0x1" + }, + { + "attr_name": "port_led_clr_ctrl", + "attr_devaddr": "0x30", + "attr_offset": "0x85", + "attr_mask": "0xff", + "attr_len": "0x1" + } + ] + }, + "PSU1": { + "dev_info": { + "device_type": "PSU", + "device_name": "PSU1", + "device_parent": "SMBUS0" + }, + "dev_attr": { + "dev_idx": "1", + "num_psu_fans": "1" + }, + "i2c": { + "interface": [] + }, + "bmc": { + "ipmitool": { + "attr_list": [ + { + "attr_name": "psu_present", + "bmc_cmd": "ipmitool sdr -c get PSU0_PRSNT_L | sed -e 's/,,/,N\\/A,/g' -e 's/,,/,N\\/A,/g'", + "raw": "0", + "field_name": "PSU0_PRSNT_L", + "field_pos": "5", + "separator": "," + }, + { + "attr_name": "psu_power_good", + "bmc_cmd": "ipmitool sdr -c get PSU0_PWROK_H | sed -e 's/,,/,N\\/A,/g' -e 's/,,/,N\\/A,/g'", + "raw": "0", + "field_name": "PSU0_PWROK_H", + "field_pos": "5", + "separator": "," + }, + { + "attr_name": "psu_v_out", + "bmc_cmd": "ipmitool sdr -c get PSU0_VOUT | sed -e 's/,,/,N\\/A,/g' -e 's/,,/,N\\/A,/g'", + "raw": "0", + "field_name": "PSU0_VOUT", + "field_pos": "2", + "mult": "1000", + "separator": "," + }, + { + "attr_name": "psu_i_out", + "bmc_cmd": "ipmitool sdr -c get PSU0_IOUT | sed -e 's/,,/,N\\/A,/g' -e 's/,,/,N\\/A,/g'", + "raw": "0", + "field_name": "PSU0_IOUT", + "field_pos": "2", + "mult": "1000", + "separator": "," + }, + { + "attr_name": "psu_v_in", + "bmc_cmd": "ipmitool sdr get -c PSU0_VIN | sed -e 's/,,/,N\\/A,/g' -e 's/,,/,N\\/A,/g'", + "raw": "0", + "separator": ",", + "field_name": "PSU0_VIN", + "field_pos": "2", + "mult": "1000" + }, + { + "attr_name": "psu_i_in", + "bmc_cmd": "ipmitool sdr get -c PSU0_IIN | sed -e 's/,,/,N\\/A,/g' -e 's/,,/,N\\/A,/g'", + "raw": "0", + "separator": ",", + "field_name": "PSU0_IIN", + "field_pos": "2", + "mult": "1000" + }, + { + "attr_name": "psu_temp1_input", + "bmc_cmd": "ipmitool sdr -c get PSU0_TEMP | sed -e 's/,,/,N\\/A,/g' -e 's/,,/,N\\/A,/g'", + "raw": "0", + "field_name": "PSU0_TEMP", + "field_pos": "2", + "mult": "1000", + "separator": "," + }, + { + "attr_name": "psu_fan1_speed_rpm", + "bmc_cmd": "ipmitool sdr -c get PSU0_FAN1 | sed -e 's/,,/,N\\/A,/g' -e 's/,,/,N\\/A,/g'", + "raw": "0", + "field_name": "PSU0_FAN1", + "field_pos": "2", + "separator": "," + }, + { + "attr_name": "psu_mfr_id", + "bmc_cmd": "_rv=$(ipmitool fru print 1 2>/dev/null | tr -s ' ' | cut -d' ' -f3-5 | grep 'Manufacturer') && echo $_rv || echo 'Manufacturer : N/A'", + "raw": "0", + "separator": ":", + "field_name": "Manufacturer", + "field_pos": "2" + }, + { + "attr_name": "psu_model_name", + "bmc_cmd": "_rv=$(ipmitool fru print 1 2>/dev/null | tr -s ' ' | cut -d' ' -f3-5 | grep 'Name') && echo $_rv || echo 'Name : N/A'", + "raw": "0", + "separator": ":", + "field_name": "Name", + "field_pos": "2" + }, + { + "attr_name": "psu_serial_num", + "bmc_cmd": "_rv=$(ipmitool fru print 1 2>/dev/null | tr -s ' ' | cut -d' ' -f3-5 | grep 'Serial') && echo $_rv || echo 'Serial : N/A'", + "raw": "0", + "separator": ":", + "field_name": "Serial", + "field_pos": "2" + }, + { + "attr_name": "psu_fan1_dir", + "bmc_cmd": "ipmitool raw 0x3c 0x30 0x0 | xargs | cut -d' ' -f1", + "raw": "1", + "type": "raw" + } + ] + } + } + }, + "PSU2": { + "dev_info": { + "device_type": "PSU", + "device_name": "PSU2", + "device_parent": "SMBUS0" + }, + "dev_attr": { + "dev_idx": "2", + "num_psu_fans": "1" + }, + "i2c": { + "interface": [] + }, + "bmc": { + "ipmitool": { + "attr_list": [ + { + "attr_name": "psu_present", + "bmc_cmd": "ipmitool sdr -c get PSU1_PRSNT_L | sed -e 's/,,/,N\\/A,/g' -e 's/,,/,N\\/A,/g'", + "raw": "0", + "field_name": "PSU1_PRSNT_L", + "field_pos": "5", + "separator": "," + }, + { + "attr_name": "psu_power_good", + "bmc_cmd": "ipmitool sdr -c get PSU1_PWROK_H | sed -e 's/,,/,N\\/A,/g' -e 's/,,/,N\\/A,/g'", + "raw": "0", + "field_name": "PSU1_PWROK_H", + "field_pos": "5", + "separator": "," + }, + { + "attr_name": "psu_v_out", + "bmc_cmd": "ipmitool sdr -c get PSU1_VOUT | sed -e 's/,,/,N\\/A,/g' -e 's/,,/,N\\/A,/g'", + "raw": "0", + "field_name": "PSU1_VOUT", + "field_pos": "2", + "mult": "1000", + "separator": "," + }, + { + "attr_name": "psu_i_out", + "bmc_cmd": "ipmitool sdr -c get PSU1_IOUT | sed -e 's/,,/,N\\/A,/g' -e 's/,,/,N\\/A,/g'", + "raw": "0", + "field_name": "PSU1_IOUT", + "field_pos": "2", + "mult": "1000", + "separator": "," + }, + { + "attr_name": "psu_v_in", + "bmc_cmd": "ipmitool sdr get -c PSU1_VIN | sed -e 's/,,/,N\\/A,/g' -e 's/,,/,N\\/A,/g'", + "raw": "0", + "separator": ",", + "field_name": "PSU1_VIN", + "field_pos": "2", + "mult": "1000" + }, + { + "attr_name": "psu_i_in", + "bmc_cmd": "ipmitool sdr get -c PSU1_IIN | sed -e 's/,,/,N\\/A,/g' -e 's/,,/,N\\/A,/g'", + "raw": "0", + "separator": ",", + "field_name": "PSU1_IIN", + "field_pos": "2", + "mult": "1000" + }, + { + "attr_name": "psu_temp1_input", + "bmc_cmd": "ipmitool sdr -c get PSU1_TEMP | sed -e 's/,,/,N\\/A,/g' -e 's/,,/,N\\/A,/g'", + "raw": "0", + "field_name": "PSU1_TEMP", + "field_pos": "2", + "mult": "1000", + "separator": "," + }, + { + "attr_name": "psu_fan1_speed_rpm", + "bmc_cmd": "ipmitool sdr -c get PSU1_FAN1 | sed -e 's/,,/,N\\/A,/g' -e 's/,,/,N\\/A,/g'", + "raw": "0", + "field_name": "PSU1_FAN1", + "field_pos": "2", + "separator": "," + }, + { + "attr_name": "psu_mfr_id", + "bmc_cmd": "_rv=$(ipmitool fru print 2 2>/dev/null | tr -s ' ' | cut -d' ' -f3-5 | grep 'Manufacturer') && echo $_rv || echo 'Manufacturer : N/A'", + "raw": "0", + "separator": ":", + "field_name": "Manufacturer", + "field_pos": "2" + }, + { + "attr_name": "psu_model_name", + "bmc_cmd": "_rv=$(ipmitool fru print 2 2>/dev/null | tr -s ' ' | cut -d' ' -f3-5 | grep 'Name') && echo $_rv || echo 'Name : N/A'", + "raw": "0", + "separator": ":", + "field_name": "Name", + "field_pos": "2" + }, + { + "attr_name": "psu_serial_num", + "bmc_cmd": "_rv=$(ipmitool fru print 2 2>/dev/null | tr -s ' ' | cut -d' ' -f3-5 | grep 'Serial') && echo $_rv || echo 'Serial : N/A'", + "raw": "0", + "separator": ":", + "field_name": "Serial", + "field_pos": "2" + }, + { + "attr_name": "psu_fan1_dir", + "bmc_cmd": "ipmitool raw 0x3c 0x30 0x0 | xargs | cut -d' ' -f2", + "raw": "1", + "type": "raw" + } + ] + } + } + }, + "FAN-CTRL": { + "dev_info": { + "device_type": "FAN", + "device_name": "FAN-CTRL", + "device_parent": "" + }, + "bmc": { + "ipmitool": { + "attr_list": [ + { + "attr_name": "fan1_present", + "bmc_cmd": "ipmitool sensor", + "raw": "0", + "field_name": "FAN0_PSNT_L", + "field_pos": "7" + }, + { + "attr_name": "fan2_present", + "bmc_cmd": "ipmitool sensor", + "raw": "0", + "field_name": "FAN1_PSNT_L", + "field_pos": "7" + }, + { + "attr_name": "fan3_present", + "bmc_cmd": "ipmitool sensor", + "raw": "0", + "field_name": "FAN2_PSNT_L", + "field_pos": "7" + }, + { + "attr_name": "fan4_present", + "bmc_cmd": "ipmitool sensor", + "raw": "0", + "field_name": "FAN3_PSNT_L", + "field_pos": "7" + }, + { + "attr_name": "fan5_present", + "bmc_cmd": "ipmitool sensor", + "raw": "0", + "field_name": "FAN4_PSNT_L", + "field_pos": "7" + }, + { + "attr_name": "fan6_present", + "bmc_cmd": "ipmitool sensor", + "raw": "0", + "field_name": "FAN5_PSNT_L", + "field_pos": "7" + }, + { + "attr_name": "fan1_f_speed_rpm", + "bmc_cmd": "ipmitool sensor", + "raw": "0", + "field_name": "FAN0_RPM_F", + "field_pos": "3" + }, + { + "attr_name": "fan1_r_speed_rpm", + "bmc_cmd": "ipmitool sensor", + "raw": "0", + "field_name": "FAN0_RPM_R", + "field_pos": "3" + }, + { + "attr_name": "fan2_f_speed_rpm", + "bmc_cmd": "ipmitool sensor", + "raw": "0", + "field_name": "FAN1_RPM_F", + "field_pos": "3" + }, + { + "attr_name": "fan2_r_speed_rpm", + "bmc_cmd": "ipmitool sensor", + "raw": "0", + "field_name": "FAN1_RPM_R", + "field_pos": "3" + }, + { + "attr_name": "fan3_f_speed_rpm", + "bmc_cmd": "ipmitool sensor", + "raw": "0", + "field_name": "FAN2_RPM_F", + "field_pos": "3" + }, + { + "attr_name": "fan3_r_speed_rpm", + "bmc_cmd": "ipmitool sensor", + "raw": "0", + "field_name": "FAN2_RPM_R", + "field_pos": "3" + }, + { + "attr_name": "fan4_f_speed_rpm", + "bmc_cmd": "ipmitool sensor", + "raw": "0", + "field_name": "FAN3_RPM_F", + "field_pos": "3" + }, + { + "attr_name": "fan4_r_speed_rpm", + "bmc_cmd": "ipmitool sensor", + "raw": "0", + "field_name": "FAN3_RPM_R", + "field_pos": "3" + }, + { + "attr_name": "fan5_f_speed_rpm", + "bmc_cmd": "ipmitool sensor", + "raw": "0", + "field_name": "FAN4_RPM_F", + "field_pos": "3" + }, + { + "attr_name": "fan5_r_speed_rpm", + "bmc_cmd": "ipmitool sensor", + "raw": "0", + "field_name": "FAN4_RPM_R", + "field_pos": "3" + }, + { + "attr_name": "fan6_f_speed_rpm", + "bmc_cmd": "ipmitool sensor", + "raw": "0", + "field_name": "FAN5_RPM_F", + "field_pos": "3" + }, + { + "attr_name": "fan6_r_speed_rpm", + "bmc_cmd": "ipmitool sensor", + "raw": "0", + "field_name": "FAN5_RPM_R", + "field_pos": "3" + }, + { + "attr_name": "fan1_dir", + "bmc_cmd": "ipmitool raw 0x3c 0x31 0x0 | xargs | cut -d' ' -f1", + "raw": "1", + "type": "raw" + }, + { + "attr_name": "fan2_dir", + "bmc_cmd": "ipmitool raw 0x3c 0x31 0x0 | xargs | cut -d' ' -f2", + "raw": "1", + "type": "raw" + }, + { + "attr_name": "fan3_dir", + "bmc_cmd": "ipmitool raw 0x3c 0x31 0x0 | xargs | cut -d' ' -f3", + "raw": "1", + "type": "raw" + }, + { + "attr_name": "fan4_dir", + "bmc_cmd": "ipmitool raw 0x3c 0x31 0x0 | xargs | cut -d' ' -f4", + "raw": "1", + "type": "raw" + }, + { + "attr_name": "fan5_dir", + "bmc_cmd": "ipmitool raw 0x3c 0x31 0x0 | xargs | cut -d' ' -f5", + "raw": "1", + "type": "raw" + }, + { + "attr_name": "fan6_dir", + "bmc_cmd": "ipmitool raw 0x3c 0x31 0x0 | xargs | cut -d' ' -f6", + "raw": "1", + "type": "raw" + } + ] + } + } + }, + "SYS_LED": { + "dev_info": { + "device_type": "LED", + "device_name": "SYS_LED" + }, + "dev_attr": { + "index": "0", + "flag": "ro" + }, + "i2c": { + "attr_list": [ + { + "attr_name": "green", + "bits": "7:4", + "descr": "Green", + "value": "0x09;0x0b", + "swpld_addr": "0x30", + "swpld_addr_offset": "0x80" + }, + { + "attr_name": "green_blink", + "bits": "7:4", + "descr": "Green Blinking", + "value": "0x0d;0x0f", + "swpld_addr": "0x30", + "swpld_addr_offset": "0x80" + }, + { + "attr_name": "yellow", + "bits": "7:4", + "descr": "Yellow", + "value": "0x08;0x0a", + "swpld_addr": "0x30", + "swpld_addr_offset": "0x80" + }, + { + "attr_name": "yellow_blink", + "bits": "7:4", + "descr": "Yellow Blinking", + "value": "0x0c;0x0e", + "swpld_addr": "0x30", + "swpld_addr_offset": "0x80" + }, + { + "attr_name": "off", + "bits": "7", + "descr": "Off", + "value": "0x0", + "swpld_addr": "0x30", + "swpld_addr_offset": "0x80" + } + ] + } + }, + "FAN_LED": { + "dev_info": { + "device_type": "LED", + "device_name": "FAN_LED" + }, + "dev_attr": { + "index": "0", + "flag": "ro" + }, + "i2c": { + "attr_list": [ + { + "attr_name": "green", + "bits": "3:0", + "descr": "Green", + "value": "0x09;0x0b", + "swpld_addr": "0x30", + "swpld_addr_offset": "0x80" + }, + { + "attr_name": "green_blink", + "bits": "3:0", + "descr": "Green Blinking", + "value": "0x0d;0x0f", + "swpld_addr": "0x30", + "swpld_addr_offset": "0x80" + }, + { + "attr_name": "yellow", + "bits": "3:0", + "descr": "Yellow", + "value": "0x08;0x0a", + "swpld_addr": "0x30", + "swpld_addr_offset": "0x80" + }, + { + "attr_name": "yellow_blink", + "bits": "3:0", + "descr": "Yellow Blinking", + "value": "0x0c;0x0e", + "swpld_addr": "0x30", + "swpld_addr_offset": "0x80" + }, + { + "attr_name": "off", + "bits": "3", + "descr": "Off", + "value": "0x0", + "swpld_addr": "0x30", + "swpld_addr_offset": "0x80" + } + ] + } + }, + "PSU1_LED": { + "dev_info": { + "device_type": "LED", + "device_name": "PSU_LED" + }, + "dev_attr": { + "index": "0", + "flag": "ro" + }, + "i2c": { + "attr_list": [ + { + "attr_name": "green", + "bits": "3:0", + "descr": "Green", + "value": "0x09;0x0b", + "swpld_addr": "0x30", + "swpld_addr_offset": "0x81" + }, + { + "attr_name": "green_blink", + "bits": "3:0", + "descr": "Green Blinking", + "value": "0x0d;0x0f", + "swpld_addr": "0x30", + "swpld_addr_offset": "0x81" + }, + { + "attr_name": "yellow", + "bits": "3:0", + "descr": "Yellow", + "value": "0x08;0x0a", + "swpld_addr": "0x30", + "swpld_addr_offset": "0x81" + }, + { + "attr_name": "yellow_blink", + "bits": "3:0", + "descr": "Yellow Blinking", + "value": "0x0c;0x0e", + "swpld_addr": "0x30", + "swpld_addr_offset": "0x81" + }, + { + "attr_name": "off", + "bits": "3", + "descr": "Off", + "value": "0x0", + "swpld_addr": "0x30", + "swpld_addr_offset": "0x81" + } + ] + } + }, + "PSU2_LED": { + "dev_info": { + "device_type": "LED", + "device_name": "PSU_LED" + }, + "dev_attr": { + "index": "1", + "flag": "ro" + }, + "i2c": { + "attr_list": [ + { + "attr_name": "green", + "bits": "7:4", + "descr": "Green", + "value": "0x09;0x0b", + "swpld_addr": "0x30", + "swpld_addr_offset": "0x81" + }, + { + "attr_name": "green_blink", + "bits": "7:4", + "descr": "Green Blinking", + "value": "0x0d;0x0f", + "swpld_addr": "0x30", + "swpld_addr_offset": "0x81" + }, + { + "attr_name": "yellow", + "bits": "7:4", + "descr": "Yellow", + "value": "0x08;0x0a", + "swpld_addr": "0x30", + "swpld_addr_offset": "0x81" + }, + { + "attr_name": "yellow_blink", + "bits": "7:4", + "descr": "Yellow Blinking", + "value": "0x0c;0x0e", + "swpld_addr": "0x30", + "swpld_addr_offset": "0x81" + }, + { + "attr_name": "off", + "bits": "7", + "descr": "Off", + "value": "0x0", + "swpld_addr": "0x30", + "swpld_addr_offset": "0x81" + } + ] + } + }, + "LOC_LED": { + "dev_info": { + "device_type": "LED", + "device_name": "LOC_LED" + }, + "dev_attr": { + "index": "0", + "flag": "rw" + }, + "i2c": { + "attr_list": [ + { + "attr_name": "blue", + "bits": "2:1", + "descr": "Blue", + "value": "0x02", + "swpld_addr": "0x30", + "swpld_addr_offset": "0x84" + }, + { + "attr_name": "blue_blink", + "bits": "2:1", + "descr": "Blue Blinking", + "value": "0x03", + "swpld_addr": "0x30", + "swpld_addr_offset": "0x84" + }, + { + "attr_name": "off", + "bits": "2", + "descr": "Off", + "value": "0x0", + "swpld_addr": "0x30", + "swpld_addr_offset": "0x84" + } + ] + } + }, + "PORT1": { + "dev_info": { + "device_type": "QSFP-DD", + "device_name": "PORT1", + "device_parent": "MUX3" + }, + "dev_attr": { + "dev_idx": "1" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT1-EEPROM" + }, + { + "itf": "control", + "dev": "PORT1-CTRL" + } + ] + } + }, + "PORT1-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT1-EEPROM", + "device_parent": "MUX3", + "virt_parent": "PORT1" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x11", + "dev_addr": "0x50", + "dev_type": "optoe3" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT1-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT1-CTRL", + "device_parent": "MUX3", + "virt_parent": "PORT1" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x11", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_intr_status", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x10", + "attr_mask": "0", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x14", + "attr_mask": "0", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x40", + "attr_mask": "0", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_lpmode", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x44", + "attr_mask": "0", + "attr_cmpval": "0x1", + "attr_len": "1" + } + ] + } + }, + "PORT2": { + "dev_info": { + "device_type": "QSFP-DD", + "device_name": "PORT2", + "device_parent": "MUX3" + }, + "dev_attr": { + "dev_idx": "2" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT2-EEPROM" + }, + { + "itf": "control", + "dev": "PORT2-CTRL" + } + ] + } + }, + "PORT2-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT2-EEPROM", + "device_parent": "MUX3", + "virt_parent": "PORT2" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x12", + "dev_addr": "0x50", + "dev_type": "optoe3" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT2-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT2-CTRL", + "device_parent": "MUX3", + "virt_parent": "PORT2" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x12", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_intr_status", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x10", + "attr_mask": "1", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x14", + "attr_mask": "1", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x40", + "attr_mask": "1", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_lpmode", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x44", + "attr_mask": "1", + "attr_cmpval": "0x2", + "attr_len": "1" + } + ] + } + }, + "PORT3": { + "dev_info": { + "device_type": "QSFP-DD", + "device_name": "PORT3", + "device_parent": "MUX3" + }, + "dev_attr": { + "dev_idx": "3" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT3-EEPROM" + }, + { + "itf": "control", + "dev": "PORT3-CTRL" + } + ] + } + }, + "PORT3-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT3-EEPROM", + "device_parent": "MUX3", + "virt_parent": "PORT3" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x13", + "dev_addr": "0x50", + "dev_type": "optoe3" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT3-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT3-CTRL", + "device_parent": "MUX3", + "virt_parent": "PORT3" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x13", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_intr_status", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x10", + "attr_mask": "2", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x14", + "attr_mask": "2", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x40", + "attr_mask": "2", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_lpmode", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x44", + "attr_mask": "2", + "attr_cmpval": "0x4", + "attr_len": "1" + } + ] + } + }, + "PORT4": { + "dev_info": { + "device_type": "QSFP-DD", + "device_name": "PORT4", + "device_parent": "MUX3" + }, + "dev_attr": { + "dev_idx": "4" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT4-EEPROM" + }, + { + "itf": "control", + "dev": "PORT4-CTRL" + } + ] + } + }, + "PORT4-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT4-EEPROM", + "device_parent": "MUX3", + "virt_parent": "PORT4" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x14", + "dev_addr": "0x50", + "dev_type": "optoe3" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT4-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT4-CTRL", + "device_parent": "MUX3", + "virt_parent": "PORT4" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x14", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_intr_status", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x10", + "attr_mask": "3", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x14", + "attr_mask": "3", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x40", + "attr_mask": "3", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_lpmode", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x44", + "attr_mask": "3", + "attr_cmpval": "0x8", + "attr_len": "1" + } + ] + } + }, + "PORT5": { + "dev_info": { + "device_type": "QSFP-DD", + "device_name": "PORT5", + "device_parent": "MUX3" + }, + "dev_attr": { + "dev_idx": "5" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT5-EEPROM" + }, + { + "itf": "control", + "dev": "PORT5-CTRL" + } + ] + } + }, + "PORT5-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT5-EEPROM", + "device_parent": "MUX3", + "virt_parent": "PORT5" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x15", + "dev_addr": "0x50", + "dev_type": "optoe3" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT5-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT5-CTRL", + "device_parent": "MUX3", + "virt_parent": "PORT5" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x15", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_intr_status", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x10", + "attr_mask": "4", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x14", + "attr_mask": "4", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x40", + "attr_mask": "4", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_lpmode", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x44", + "attr_mask": "4", + "attr_cmpval": "0x10", + "attr_len": "1" + } + ] + } + }, + "PORT6": { + "dev_info": { + "device_type": "QSFP-DD", + "device_name": "PORT6", + "device_parent": "MUX3" + }, + "dev_attr": { + "dev_idx": "6" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT6-EEPROM" + }, + { + "itf": "control", + "dev": "PORT6-CTRL" + } + ] + } + }, + "PORT6-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT6-EEPROM", + "device_parent": "MUX3", + "virt_parent": "PORT6" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x16", + "dev_addr": "0x50", + "dev_type": "optoe3" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT6-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT6-CTRL", + "device_parent": "MUX3", + "virt_parent": "PORT6" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x16", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_intr_status", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x10", + "attr_mask": "5", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x14", + "attr_mask": "5", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x40", + "attr_mask": "5", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_lpmode", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x44", + "attr_mask": "5", + "attr_cmpval": "0x20", + "attr_len": "1" + } + ] + } + }, + "PORT7": { + "dev_info": { + "device_type": "QSFP-DD", + "device_name": "PORT7", + "device_parent": "MUX3" + }, + "dev_attr": { + "dev_idx": "7" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT7-EEPROM" + }, + { + "itf": "control", + "dev": "PORT7-CTRL" + } + ] + } + }, + "PORT7-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT7-EEPROM", + "device_parent": "MUX3", + "virt_parent": "PORT7" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x17", + "dev_addr": "0x50", + "dev_type": "optoe3" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT7-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT7-CTRL", + "device_parent": "MUX3", + "virt_parent": "PORT7" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x17", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_intr_status", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x10", + "attr_mask": "6", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x14", + "attr_mask": "6", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x40", + "attr_mask": "6", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_lpmode", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x44", + "attr_mask": "6", + "attr_cmpval": "0x40", + "attr_len": "1" + } + ] + } + }, + "PORT8": { + "dev_info": { + "device_type": "QSFP-DD", + "device_name": "PORT8", + "device_parent": "MUX3" + }, + "dev_attr": { + "dev_idx": "8" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT8-EEPROM" + }, + { + "itf": "control", + "dev": "PORT8-CTRL" + } + ] + } + }, + "PORT8-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT8-EEPROM", + "device_parent": "MUX3", + "virt_parent": "PORT8" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x18", + "dev_addr": "0x50", + "dev_type": "optoe3" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT8-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT8-CTRL", + "device_parent": "MUX3", + "virt_parent": "PORT8" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x18", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_intr_status", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x10", + "attr_mask": "7", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x14", + "attr_mask": "7", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x40", + "attr_mask": "7", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_lpmode", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x44", + "attr_mask": "7", + "attr_cmpval": "0x80", + "attr_len": "1" + } + ] + } + }, + "PORT9": { + "dev_info": { + "device_type": "QSFP-DD", + "device_name": "PORT9", + "device_parent": "MUX4" + }, + "dev_attr": { + "dev_idx": "9" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT9-EEPROM" + }, + { + "itf": "control", + "dev": "PORT9-CTRL" + } + ] + } + }, + "PORT9-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT9-EEPROM", + "device_parent": "MUX4", + "virt_parent": "PORT9" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x19", + "dev_addr": "0x50", + "dev_type": "optoe3" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT9-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT9-CTRL", + "device_parent": "MUX4", + "virt_parent": "PORT9" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x19", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_intr_status", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x11", + "attr_mask": "0", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x15", + "attr_mask": "0", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x41", + "attr_mask": "0", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_lpmode", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x45", + "attr_mask": "0", + "attr_cmpval": "0x1", + "attr_len": "1" + } + ] + } + }, + "PORT10": { + "dev_info": { + "device_type": "QSFP-DD", + "device_name": "PORT10", + "device_parent": "MUX4" + }, + "dev_attr": { + "dev_idx": "10" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT10-EEPROM" + }, + { + "itf": "control", + "dev": "PORT10-CTRL" + } + ] + } + }, + "PORT10-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT10-EEPROM", + "device_parent": "MUX4", + "virt_parent": "PORT10" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x1a", + "dev_addr": "0x50", + "dev_type": "optoe3" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT10-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT10-CTRL", + "device_parent": "MUX4", + "virt_parent": "PORT10" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x1a", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_intr_status", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x11", + "attr_mask": "1", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x15", + "attr_mask": "1", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x41", + "attr_mask": "1", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_lpmode", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x45", + "attr_mask": "1", + "attr_cmpval": "0x2", + "attr_len": "1" + } + ] + } + }, + "PORT11": { + "dev_info": { + "device_type": "QSFP-DD", + "device_name": "PORT11", + "device_parent": "MUX4" + }, + "dev_attr": { + "dev_idx": "11" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT11-EEPROM" + }, + { + "itf": "control", + "dev": "PORT11-CTRL" + } + ] + } + }, + "PORT11-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT11-EEPROM", + "device_parent": "MUX4", + "virt_parent": "PORT11" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x1b", + "dev_addr": "0x50", + "dev_type": "optoe3" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT11-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT11-CTRL", + "device_parent": "MUX4", + "virt_parent": "PORT11" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x1b", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_intr_status", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x11", + "attr_mask": "2", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x15", + "attr_mask": "2", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x41", + "attr_mask": "2", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_lpmode", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x45", + "attr_mask": "2", + "attr_cmpval": "0x4", + "attr_len": "1" + } + ] + } + }, + "PORT12": { + "dev_info": { + "device_type": "QSFP-DD", + "device_name": "PORT12", + "device_parent": "MUX4" + }, + "dev_attr": { + "dev_idx": "12" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT12-EEPROM" + }, + { + "itf": "control", + "dev": "PORT12-CTRL" + } + ] + } + }, + "PORT12-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT12-EEPROM", + "device_parent": "MUX4", + "virt_parent": "PORT12" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x1c", + "dev_addr": "0x50", + "dev_type": "optoe3" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT12-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT12-CTRL", + "device_parent": "MUX4", + "virt_parent": "PORT12" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x1c", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_intr_status", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x11", + "attr_mask": "3", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x15", + "attr_mask": "3", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x41", + "attr_mask": "3", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_lpmode", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x45", + "attr_mask": "3", + "attr_cmpval": "0x8", + "attr_len": "1" + } + ] + } + }, + "PORT13": { + "dev_info": { + "device_type": "QSFP-DD", + "device_name": "PORT13", + "device_parent": "MUX4" + }, + "dev_attr": { + "dev_idx": "13" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT13-EEPROM" + }, + { + "itf": "control", + "dev": "PORT13-CTRL" + } + ] + } + }, + "PORT13-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT13-EEPROM", + "device_parent": "MUX4", + "virt_parent": "PORT13" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x1d", + "dev_addr": "0x50", + "dev_type": "optoe3" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT13-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT13-CTRL", + "device_parent": "MUX4", + "virt_parent": "PORT13" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x1d", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_intr_status", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x11", + "attr_mask": "4", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x15", + "attr_mask": "4", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x41", + "attr_mask": "4", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_lpmode", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x45", + "attr_mask": "4", + "attr_cmpval": "0x10", + "attr_len": "1" + } + ] + } + }, + "PORT14": { + "dev_info": { + "device_type": "QSFP-DD", + "device_name": "PORT14", + "device_parent": "MUX4" + }, + "dev_attr": { + "dev_idx": "14" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT14-EEPROM" + }, + { + "itf": "control", + "dev": "PORT14-CTRL" + } + ] + } + }, + "PORT14-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT14-EEPROM", + "device_parent": "MUX4", + "virt_parent": "PORT14" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x1e", + "dev_addr": "0x50", + "dev_type": "optoe3" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT14-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT14-CTRL", + "device_parent": "MUX4", + "virt_parent": "PORT14" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x1e", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_intr_status", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x11", + "attr_mask": "5", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x15", + "attr_mask": "5", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x41", + "attr_mask": "5", + "attr_cmpval": "0x20", + "attr_len": "1" + }, + { + "attr_name": "xcvr_lpmode", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x45", + "attr_mask": "5", + "attr_cmpval": "0x20", + "attr_len": "1" + } + ] + } + }, + "PORT15": { + "dev_info": { + "device_type": "QSFP-DD", + "device_name": "PORT15", + "device_parent": "MUX4" + }, + "dev_attr": { + "dev_idx": "15" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT15-EEPROM" + }, + { + "itf": "control", + "dev": "PORT15-CTRL" + } + ] + } + }, + "PORT15-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT15-EEPROM", + "device_parent": "MUX4", + "virt_parent": "PORT15" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x1f", + "dev_addr": "0x50", + "dev_type": "optoe3" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT15-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT15-CTRL", + "device_parent": "MUX4", + "virt_parent": "PORT15" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x1f", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_intr_status", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x11", + "attr_mask": "6", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x15", + "attr_mask": "6", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x41", + "attr_mask": "6", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_lpmode", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x45", + "attr_mask": "6", + "attr_cmpval": "0x40", + "attr_len": "1" + } + ] + } + }, + "PORT16": { + "dev_info": { + "device_type": "QSFP-DD", + "device_name": "PORT16", + "device_parent": "MUX4" + }, + "dev_attr": { + "dev_idx": "16" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT16-EEPROM" + }, + { + "itf": "control", + "dev": "PORT16-CTRL" + } + ] + } + }, + "PORT16-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT16-EEPROM", + "device_parent": "MUX4", + "virt_parent": "PORT16" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x20", + "dev_addr": "0x50", + "dev_type": "optoe3" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT16-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT16-CTRL", + "device_parent": "MUX4", + "virt_parent": "PORT16" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x20", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_intr_status", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x11", + "attr_mask": "7", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x15", + "attr_mask": "7", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x41", + "attr_mask": "7", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_lpmode", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x45", + "attr_mask": "7", + "attr_cmpval": "0x80", + "attr_len": "1" + } + ] + } + }, + "PORT17": { + "dev_info": { + "device_type": "QSFP-DD", + "device_name": "PORT17", + "device_parent": "MUX5" + }, + "dev_attr": { + "dev_idx": "17" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT17-EEPROM" + }, + { + "itf": "control", + "dev": "PORT17-CTRL" + } + ] + } + }, + "PORT17-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT17-EEPROM", + "device_parent": "MUX5", + "virt_parent": "PORT17" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x21", + "dev_addr": "0x50", + "dev_type": "optoe3" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT17-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT17-CTRL", + "device_parent": "MUX5", + "virt_parent": "PORT17" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x21", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_intr_status", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x12", + "attr_mask": "0", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x16", + "attr_mask": "0", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x42", + "attr_mask": "0", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_lpmode", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x46", + "attr_mask": "0", + "attr_cmpval": "0x1", + "attr_len": "1" + } + ] + } + }, + "PORT18": { + "dev_info": { + "device_type": "QSFP-DD", + "device_name": "PORT18", + "device_parent": "MUX5" + }, + "dev_attr": { + "dev_idx": "18" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT18-EEPROM" + }, + { + "itf": "control", + "dev": "PORT18-CTRL" + } + ] + } + }, + "PORT18-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT18-EEPROM", + "device_parent": "MUX5", + "virt_parent": "PORT18" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x22", + "dev_addr": "0x50", + "dev_type": "optoe3" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT18-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT18-CTRL", + "device_parent": "MUX5", + "virt_parent": "PORT18" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x22", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_intr_status", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x12", + "attr_mask": "1", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x16", + "attr_mask": "1", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x42", + "attr_mask": "1", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_lpmode", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x46", + "attr_mask": "1", + "attr_cmpval": "0x2", + "attr_len": "1" + } + ] + } + }, + "PORT19": { + "dev_info": { + "device_type": "QSFP-DD", + "device_name": "PORT19", + "device_parent": "MUX5" + }, + "dev_attr": { + "dev_idx": "19" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT19-EEPROM" + }, + { + "itf": "control", + "dev": "PORT19-CTRL" + } + ] + } + }, + "PORT19-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT19-EEPROM", + "device_parent": "MUX5", + "virt_parent": "PORT19" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x23", + "dev_addr": "0x50", + "dev_type": "optoe3" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT19-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT19-CTRL", + "device_parent": "MUX5", + "virt_parent": "PORT19" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x23", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_intr_status", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x12", + "attr_mask": "2", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x16", + "attr_mask": "2", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x42", + "attr_mask": "2", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_lpmode", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x46", + "attr_mask": "2", + "attr_cmpval": "0x4", + "attr_len": "1" + } + ] + } + }, + "PORT20": { + "dev_info": { + "device_type": "QSFP-DD", + "device_name": "PORT20", + "device_parent": "MUX5" + }, + "dev_attr": { + "dev_idx": "20" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT20-EEPROM" + }, + { + "itf": "control", + "dev": "PORT20-CTRL" + } + ] + } + }, + "PORT20-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT20-EEPROM", + "device_parent": "MUX5", + "virt_parent": "PORT20" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x24", + "dev_addr": "0x50", + "dev_type": "optoe3" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT20-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT20-CTRL", + "device_parent": "MUX5", + "virt_parent": "PORT20" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x24", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_intr_status", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x12", + "attr_mask": "3", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x16", + "attr_mask": "3", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x42", + "attr_mask": "3", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_lpmode", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x46", + "attr_mask": "3", + "attr_cmpval": "0x8", + "attr_len": "1" + } + ] + } + }, + "PORT21": { + "dev_info": { + "device_type": "QSFP-DD", + "device_name": "PORT21", + "device_parent": "MUX5" + }, + "dev_attr": { + "dev_idx": "21" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT21-EEPROM" + }, + { + "itf": "control", + "dev": "PORT21-CTRL" + } + ] + } + }, + "PORT21-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT21-EEPROM", + "device_parent": "MUX5", + "virt_parent": "PORT21" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x25", + "dev_addr": "0x50", + "dev_type": "optoe3" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT21-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT21-CTRL", + "device_parent": "MUX5", + "virt_parent": "PORT21" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x25", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_intr_status", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x12", + "attr_mask": "4", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x16", + "attr_mask": "4", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x42", + "attr_mask": "4", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_lpmode", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x46", + "attr_mask": "4", + "attr_cmpval": "0x10", + "attr_len": "1" + } + ] + } + }, + "PORT22": { + "dev_info": { + "device_type": "QSFP-DD", + "device_name": "PORT22", + "device_parent": "MUX5" + }, + "dev_attr": { + "dev_idx": "22" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT22-EEPROM" + }, + { + "itf": "control", + "dev": "PORT22-CTRL" + } + ] + } + }, + "PORT22-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT22-EEPROM", + "device_parent": "MUX5", + "virt_parent": "PORT22" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x26", + "dev_addr": "0x50", + "dev_type": "optoe3" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT22-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT22-CTRL", + "device_parent": "MUX5", + "virt_parent": "PORT22" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x26", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_intr_status", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x12", + "attr_mask": "5", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x16", + "attr_mask": "5", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x42", + "attr_mask": "5", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_lpmode", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x46", + "attr_mask": "5", + "attr_cmpval": "0x20", + "attr_len": "1" + } + ] + } + }, + "PORT23": { + "dev_info": { + "device_type": "QSFP-DD", + "device_name": "PORT23", + "device_parent": "MUX5" + }, + "dev_attr": { + "dev_idx": "23" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT23-EEPROM" + }, + { + "itf": "control", + "dev": "PORT23-CTRL" + } + ] + } + }, + "PORT23-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT23-EEPROM", + "device_parent": "MUX5", + "virt_parent": "PORT23" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x27", + "dev_addr": "0x50", + "dev_type": "optoe3" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT23-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT23-CTRL", + "device_parent": "MUX5", + "virt_parent": "PORT23" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x27", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_intr_status", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x12", + "attr_mask": "6", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x16", + "attr_mask": "6", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x42", + "attr_mask": "6", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_lpmode", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x46", + "attr_mask": "6", + "attr_cmpval": "0x40", + "attr_len": "1" + } + ] + } + }, + "PORT24": { + "dev_info": { + "device_type": "QSFP-DD", + "device_name": "PORT24", + "device_parent": "MUX5" + }, + "dev_attr": { + "dev_idx": "24" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT24-EEPROM" + }, + { + "itf": "control", + "dev": "PORT24-CTRL" + } + ] + } + }, + "PORT24-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT24-EEPROM", + "device_parent": "MUX5", + "virt_parent": "PORT24" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x28", + "dev_addr": "0x50", + "dev_type": "optoe3" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT24-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT24-CTRL", + "device_parent": "MUX5", + "virt_parent": "PORT24" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x28", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_intr_status", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x12", + "attr_mask": "7", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x16", + "attr_mask": "7", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x42", + "attr_mask": "7", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_lpmode", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x46", + "attr_mask": "7", + "attr_cmpval": "0x80", + "attr_len": "1" + } + ] + } + }, + "PORT25": { + "dev_info": { + "device_type": "QSFP-DD", + "device_name": "PORT25", + "device_parent": "MUX6" + }, + "dev_attr": { + "dev_idx": "25" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT25-EEPROM" + }, + { + "itf": "control", + "dev": "PORT25-CTRL" + } + ] + } + }, + "PORT25-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT25-EEPROM", + "device_parent": "MUX6", + "virt_parent": "PORT25" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x29", + "dev_addr": "0x50", + "dev_type": "optoe3" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT25-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT25-CTRL", + "device_parent": "MUX6", + "virt_parent": "PORT25" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x29", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_intr_status", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x13", + "attr_mask": "0", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x17", + "attr_mask": "0", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x43", + "attr_mask": "0", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_lpmode", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x47", + "attr_mask": "0", + "attr_cmpval": "0x1", + "attr_len": "1" + } + ] + } + }, + "PORT26": { + "dev_info": { + "device_type": "QSFP-DD", + "device_name": "PORT26", + "device_parent": "MUX6" + }, + "dev_attr": { + "dev_idx": "26" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT26-EEPROM" + }, + { + "itf": "control", + "dev": "PORT26-CTRL" + } + ] + } + }, + "PORT26-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT26-EEPROM", + "device_parent": "MUX6", + "virt_parent": "PORT26" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x2a", + "dev_addr": "0x50", + "dev_type": "optoe3" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT26-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT26-CTRL", + "device_parent": "MUX6", + "virt_parent": "PORT26" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x2a", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_intr_status", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x13", + "attr_mask": "1", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x17", + "attr_mask": "1", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x43", + "attr_mask": "1", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_lpmode", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x47", + "attr_mask": "1", + "attr_cmpval": "0x2", + "attr_len": "1" + } + ] + } + }, + "PORT27": { + "dev_info": { + "device_type": "QSFP-DD", + "device_name": "PORT27", + "device_parent": "MUX6" + }, + "dev_attr": { + "dev_idx": "27" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT27-EEPROM" + }, + { + "itf": "control", + "dev": "PORT27-CTRL" + } + ] + } + }, + "PORT27-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT27-EEPROM", + "device_parent": "MUX6", + "virt_parent": "PORT27" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x2b", + "dev_addr": "0x50", + "dev_type": "optoe3" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT27-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT27-CTRL", + "device_parent": "MUX6", + "virt_parent": "PORT27" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x2b", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_intr_status", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x13", + "attr_mask": "2", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x17", + "attr_mask": "2", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x43", + "attr_mask": "2", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_lpmode", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x47", + "attr_mask": "2", + "attr_cmpval": "0x4", + "attr_len": "1" + } + ] + } + }, + "PORT28": { + "dev_info": { + "device_type": "QSFP-DD", + "device_name": "PORT28", + "device_parent": "MUX6" + }, + "dev_attr": { + "dev_idx": "28" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT28-EEPROM" + }, + { + "itf": "control", + "dev": "PORT28-CTRL" + } + ] + } + }, + "PORT28-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT28-EEPROM", + "device_parent": "MUX6", + "virt_parent": "PORT28" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x2c", + "dev_addr": "0x50", + "dev_type": "optoe3" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT28-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT28-CTRL", + "device_parent": "MUX6", + "virt_parent": "PORT28" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x2c", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_intr_status", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x13", + "attr_mask": "3", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x17", + "attr_mask": "3", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x43", + "attr_mask": "3", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_lpmode", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x47", + "attr_mask": "3", + "attr_cmpval": "0x8", + "attr_len": "1" + } + ] + } + }, + "PORT29": { + "dev_info": { + "device_type": "QSFP-DD", + "device_name": "PORT29", + "device_parent": "MUX6" + }, + "dev_attr": { + "dev_idx": "29" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT29-EEPROM" + }, + { + "itf": "control", + "dev": "PORT29-CTRL" + } + ] + } + }, + "PORT29-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT29-EEPROM", + "device_parent": "MUX6", + "virt_parent": "PORT29" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x2d", + "dev_addr": "0x50", + "dev_type": "optoe3" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT29-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT29-CTRL", + "device_parent": "MUX6", + "virt_parent": "PORT29" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x2d", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_intr_status", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x13", + "attr_mask": "4", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x17", + "attr_mask": "4", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x43", + "attr_mask": "4", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_lpmode", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x47", + "attr_mask": "4", + "attr_cmpval": "0x10", + "attr_len": "1" + } + ] + } + }, + "PORT30": { + "dev_info": { + "device_type": "QSFP-DD", + "device_name": "PORT30", + "device_parent": "MUX6" + }, + "dev_attr": { + "dev_idx": "30" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT30-EEPROM" + }, + { + "itf": "control", + "dev": "PORT30-CTRL" + } + ] + } + }, + "PORT30-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT30-EEPROM", + "device_parent": "MUX6", + "virt_parent": "PORT30" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x2e", + "dev_addr": "0x50", + "dev_type": "optoe3" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT30-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT30-CTRL", + "device_parent": "MUX6", + "virt_parent": "PORT30" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x2e", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_intr_status", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x13", + "attr_mask": "5", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x17", + "attr_mask": "5", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x43", + "attr_mask": "5", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_lpmode", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x47", + "attr_mask": "5", + "attr_cmpval": "0x20", + "attr_len": "1" + } + ] + } + }, + "PORT31": { + "dev_info": { + "device_type": "QSFP-DD", + "device_name": "PORT31", + "device_parent": "MUX6" + }, + "dev_attr": { + "dev_idx": "31" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT31-EEPROM" + }, + { + "itf": "control", + "dev": "PORT31-CTRL" + } + ] + } + }, + "PORT31-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT31-EEPROM", + "device_parent": "MUX6", + "virt_parent": "PORT31" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x2f", + "dev_addr": "0x50", + "dev_type": "optoe3" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT31-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT31-CTRL", + "device_parent": "MUX6", + "virt_parent": "PORT31" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x2f", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_intr_status", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x13", + "attr_mask": "6", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x17", + "attr_mask": "6", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x43", + "attr_mask": "6", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_lpmode", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x47", + "attr_mask": "6", + "attr_cmpval": "0x40", + "attr_len": "1" + } + ] + } + }, + "PORT32": { + "dev_info": { + "device_type": "QSFP-DD", + "device_name": "PORT32", + "device_parent": "MUX6" + }, + "dev_attr": { + "dev_idx": "32" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT32-EEPROM" + }, + { + "itf": "control", + "dev": "PORT32-CTRL" + } + ] + } + }, + "PORT32-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT32-EEPROM", + "device_parent": "MUX6", + "virt_parent": "PORT32" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x30", + "dev_addr": "0x50", + "dev_type": "optoe3" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT32-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT32-CTRL", + "device_parent": "MUX6", + "virt_parent": "PORT32" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x30", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_intr_status", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x13", + "attr_mask": "7", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x17", + "attr_mask": "7", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x43", + "attr_mask": "7", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_lpmode", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x47", + "attr_mask": "7", + "attr_cmpval": "0x80", + "attr_len": "1" + } + ] + } + }, + "PORT33": { + "dev_info": { + "device_type": "SFP", + "device_name": "PORT33", + "device_parent": "MUX2" + }, + "dev_attr": { + "dev_idx": "33" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT33-EEPROM" + }, + { + "itf": "control", + "dev": "PORT33-CTRL" + } + ] + } + }, + "PORT33-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT33", + "device_parent": "MUX2", + "virt_parent": "PORT33" + }, + "i2c": { + "topo_info": { + "parent_bus": "0xd", + "dev_addr": "0x50", + "dev_type": "optoe2" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT33-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT33-CTRL", + "device_parent": "MUX2", + "virt_parent": "PORT33" + }, + "i2c": { + "topo_info": { + "parent_bus": "0xd", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x1e", + "attr_mask": "2", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_rxlos", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x1f", + "attr_mask": "2", + "attr_cmpval": "0x4", + "attr_len": "1" + }, + { + "attr_name": "xcvr_txfault", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x1d", + "attr_mask": "2", + "attr_cmpval": "0x4", + "attr_len": "1" + }, + { + "attr_name": "xcvr_txdisable", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x55", + "attr_mask": "2", + "attr_cmpval": "0x0", + "attr_len": "1" + } + ] + } + }, + "PORT34": { + "dev_info": { + "device_type": "SFP", + "device_name": "PORT34", + "device_parent": "MUX2" + }, + "dev_attr": { + "dev_idx": "34" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT34-EEPROM" + }, + { + "itf": "control", + "dev": "PORT34-CTRL" + } + ] + } + }, + "PORT34-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT34", + "device_parent": "MUX2", + "virt_parent": "PORT34" + }, + "i2c": { + "topo_info": { + "parent_bus": "0xe", + "dev_addr": "0x50", + "dev_type": "optoe2" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT34-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT34-CTRL", + "device_parent": "MUX2", + "virt_parent": "PORT34" + }, + "i2c": { + "topo_info": { + "parent_bus": "0xe", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x1e", + "attr_mask": "3", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_rxlos", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x1f", + "attr_mask": "3", + "attr_cmpval": "0x8", + "attr_len": "1" + }, + { + "attr_name": "xcvr_txfault", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x1d", + "attr_mask": "3", + "attr_cmpval": "0x8", + "attr_len": "1" + }, + { + "attr_name": "xcvr_txdisable", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x55", + "attr_mask": "3", + "attr_cmpval": "0x0", + "attr_len": "1" + } + ] + } + } +} diff --git a/device/ufispace/x86_64-ufispace_s9301_32d-r0/pddf_support b/device/ufispace/x86_64-ufispace_s9301_32d-r0/pddf_support new file mode 100644 index 0000000000..e69de29bb2 diff --git a/device/ufispace/x86_64-ufispace_s9301_32d-r0/platform.json b/device/ufispace/x86_64-ufispace_s9301_32d-r0/platform.json new file mode 100644 index 0000000000..de873b4d56 --- /dev/null +++ b/device/ufispace/x86_64-ufispace_s9301_32d-r0/platform.json @@ -0,0 +1,659 @@ +{ + "chassis": { + "name": "S9301-32D", + "components": [ + { + "name": "CPLD1" + }, + { + "name": "CPLD2" + }, + { + "name": "CPLD3" + }, + { + "name": "BIOS" + }, + { + "name": "BMC" + } + ], + "fans": [ + { + "name": "Fantray1_1" + }, + { + "name": "Fantray1_2" + }, + { + "name": "Fantray2_1" + }, + { + "name": "Fantray2_2" + }, + { + "name": "Fantray3_1" + }, + { + "name": "Fantray3_2" + }, + { + "name": "Fantray4_1" + }, + { + "name": "Fantray4_2" + }, + { + "name": "Fantray5_1" + }, + { + "name": "Fantray5_2" + }, + { + "name": "Fantray6_1" + }, + { + "name": "Fantray6_2" + } + ], + "fan_drawers":[ + { + "name": "Fantray1", + "num_fans" : 2, + "fans": [ + { + "name": "Fantray1_1" + }, + { + "name": "Fantray1_2" + } + ] + }, + { + "name": "Fantray2", + "num_fans" : 2, + "fans": [ + { + "name": "Fantray2_1" + }, + { + "name": "Fantray2_2" + } + ] + }, + { + "name": "Fantray3", + "num_fans" : 2, + "fans": [ + { + "name": "Fantray3_1" + }, + { + "name": "Fantray3_2" + } + ] + }, + { + "name": "Fantray4", + "num_fans" : 2, + "fans": [ + { + "name": "Fantray4_1" + }, + { + "name": "Fantray4_2" + } + ] + }, + { + "name": "Fantray5", + "num_fans" : 2, + "fans": [ + { + "name": "Fantray5_1" + }, + { + "name": "Fantray5_2" + } + ] + }, + { + "name": "Fantray6", + "num_fans" : 2, + "fans": [ + { + "name": "Fantray6_1" + }, + { + "name": "Fantray6_2" + } + ] + } + ], + "psus": [ + { + "name": "PSU1", + "fans": [ + { + "name": "PSU1_FAN1" + } + ], + "thermals": [ + { + "name": "PSU1_TEMP1" + } + ] + }, + { + "name": "PSU2", + "fans": [ + { + "name": "PSU2_FAN1" + } + ], + "thermals": [ + { + "name": "PSU2_TEMP1" + } + ] + } + ], + "thermals": [ + { + "name": "Temp_CPU_PECI" + }, + { + "name": "Temp_CPU_ENV" + }, + { + "name": "Temp_CPU_ENV2" + }, + { + "name": "Temp_CPU_PECI" + }, + { + "name": "Temp_MAC_DIE" + }, + { + "name": "Temp_MAC_ENV" + }, + { + "name": "Temp_PSU_CONNTOR" + } + ], + "sfps": [ + { + "name": "Ethernet0" + }, + { + "name": "Ethernet8" + }, + { + "name": "Ethernet16" + }, + { + "name": "Ethernet24" + }, + { + "name": "Ethernet32" + }, + { + "name": "Ethernet40" + }, + { + "name": "Ethernet48" + }, + { + "name": "Ethernet56" + }, + { + "name": "Ethernet64" + }, + { + "name": "Ethernet72" + }, + { + "name": "Ethernet80" + }, + { + "name": "Ethernet88" + }, + { + "name": "Ethernet96" + }, + { + "name": "Ethernet104" + }, + { + "name": "Ethernet112" + }, + { + "name": "Ethernet120" + }, + { + "name": "Ethernet128" + }, + { + "name": "Ethernet136" + }, + { + "name": "Ethernet144" + }, + { + "name": "Ethernet152" + }, + { + "name": "Ethernet160" + }, + { + "name": "Ethernet168" + }, + { + "name": "Ethernet176" + }, + { + "name": "Ethernet184" + }, + { + "name": "Ethernet192" + }, + { + "name": "Ethernet200" + }, + { + "name": "Ethernet208" + }, + { + "name": "Ethernet216" + }, + { + "name": "Ethernet224" + }, + { + "name": "Ethernet232" + }, + { + "name": "Ethernet240" + }, + { + "name": "Ethernet248" + }, + { + "name": "Ethernet256" + }, + { + "name": "Ethernet257" + } + ] + }, + "interfaces": { + "Ethernet0": { + "index": "0,0,0,0,0,0,0,0", + "lanes": "1,2,3,4,5,6,7,8", + "breakout_modes": { + "1x400G": ["Eth0(Port0)"], + "2x200G": ["Eth0/1(Port0)", "Eth0/2(Port0)"], + "4x100G": ["Eth0/1(Port0)", "Eth0/2(Port0)", "Eth0/3(Port0)", "Eth0/4(Port0)"], + "8x50G": ["Eth0/1(Port0)", "Eth0/2(Port0)", "Eth0/3(Port0)", "Eth0/4(Port0)", "Eth0/5(Port0)", "Eth0/6(Port0)", "Eth0/7(Port0)", "Eth0/8(Port0)"] + } + }, + + "Ethernet8": { + "index": "1,1,1,1,1,1,1,1", + "lanes": "9,10,11,12,13,14,15,16", + "breakout_modes": { + "1x400G": ["Eth1(Port1)"], + "2x200G": ["Eth1/1(Port1)", "Eth1/2(Port1)"], + "4x100G": ["Eth1/1(Port1)", "Eth1/2(Port1)", "Eth1/3(Port1)", "Eth1/4(Port1)"], + "8x50G": ["Eth1/1(Port1)", "Eth1/2(Port1)", "Eth1/3(Port1)", "Eth1/4(Port1)", "Eth1/5(Port1)", "Eth1/6(Port1)", "Eth1/7(Port1)", "Eth1/8(Port1)"] + } + }, + + "Ethernet16": { + "index": "2,2,2,2,2,2,2,2", + "lanes": "17,18,19,20,21,22,23,24", + "breakout_modes": { + "1x400G": ["Eth2(Port2)"], + "2x200G": ["Eth2/1(Port2)", "Eth2/2(Port2)"], + "4x100G": ["Eth2/1(Port2)", "Eth2/2(Port2)", "Eth2/3(Port2)", "Eth2/4(Port2)"], + "8x50G": ["Eth2/1(Port2)", "Eth2/2(Port2)", "Eth2/3(Port2)", "Eth2/4(Port2)", "Eth2/5(Port2)", "Eth2/6(Port2)", "Eth2/7(Port2)", "Eth2/8(Port2)"] + } + }, + + "Ethernet24": { + "index": "3,3,3,3,3,3,3,3", + "lanes": "25,26,27,28,29,30,31,32", + "breakout_modes": { + "1x400G": ["Eth3(Port3)"], + "2x200G": ["Eth3/1(Port3)", "Eth3/2(Port3)"], + "4x100G": ["Eth3/1(Port3)", "Eth3/2(Port3)", "Eth3/3(Port3)", "Eth3/4(Port3)"], + "8x50G": ["Eth3/1(Port3)", "Eth3/2(Port3)", "Eth3/3(Port3)", "Eth3/4(Port3)", "Eth3/5(Port3)", "Eth3/6(Port3)", "Eth3/7(Port3)", "Eth3/8(Port3)"] + } + }, + + "Ethernet32": { + "index": "4,4,4,4,4,4,4,4", + "lanes": "33,34,35,36,37,38,39,40", + "breakout_modes": { + "1x400G": ["Eth4(Port4)"], + "2x200G": ["Eth4/1(Port4)", "Eth4/2(Port4)"], + "4x100G": ["Eth4/1(Port4)", "Eth4/2(Port4)", "Eth4/3(Port4)", "Eth4/4(Port4)"], + "8x50G": ["Eth4/1(Port4)", "Eth4/2(Port4)", "Eth4/3(Port4)", "Eth4/4(Port4)", "Eth4/5(Port4)", "Eth4/6(Port4)", "Eth4/7(Port4)", "Eth4/8(Port4)"] + } + }, + + "Ethernet40": { + "index": "5,5,5,5,5,5,5,5", + "lanes": "41,42,43,44,45,46,47,48", + "breakout_modes": { + "1x400G": ["Eth5(Port5)"], + "2x200G": ["Eth5/1(Port5)", "Eth5/2(Port5)"], + "4x100G": ["Eth5/1(Port5)", "Eth5/2(Port5)", "Eth5/3(Port5)", "Eth5/4(Port5)"], + "8x50G": ["Eth5/1(Port5)", "Eth5/2(Port5)", "Eth5/3(Port5)", "Eth5/4(Port5)", "Eth5/5(Port5)", "Eth5/6(Port5)", "Eth5/7(Port5)", "Eth5/8(Port5)"] + } + }, + + "Ethernet48": { + "index": "6,6,6,6,6,6,6,6", + "lanes": "49,50,51,52,53,54,55,56", + "breakout_modes": { + "1x400G": ["Eth6(Port6)"], + "2x200G": ["Eth6/1(Port6)", "Eth6/2(Port6)"], + "4x100G": ["Eth6/1(Port6)", "Eth6/2(Port6)", "Eth6/3(Port6)", "Eth6/4(Port6)"], + "8x50G": ["Eth6/1(Port6)", "Eth6/2(Port6)", "Eth6/3(Port6)", "Eth6/4(Port6)", "Eth6/5(Port6)", "Eth6/6(Port6)", "Eth6/7(Port6)", "Eth6/8(Port6)"] + } + }, + + "Ethernet56": { + "index": "7,7,7,7,7,7,7,7", + "lanes": "57,58,59,60,61,62,63,64", + "breakout_modes": { + "1x400G": ["Eth7(Port7)"], + "2x200G": ["Eth7/1(Port7)", "Eth7/2(Port7)"], + "4x100G": ["Eth7/1(Port7)", "Eth7/2(Port7)", "Eth7/3(Port7)", "Eth7/4(Port7)"], + "8x50G": ["Eth7/1(Port7)", "Eth7/2(Port7)", "Eth7/3(Port7)", "Eth7/4(Port7)", "Eth7/5(Port7)", "Eth7/6(Port7)", "Eth7/7(Port7)", "Eth7/8(Port7)"] + } + }, + + "Ethernet64": { + "index": "8,8,8,8,8,8,8,8", + "lanes": "65,66,67,68,69,70,71,72", + "breakout_modes": { + "1x400G": ["Eth8(Port8)"], + "2x200G": ["Eth8/1(Port8)", "Eth8/2(Port8)"], + "4x100G": ["Eth8/1(Port8)", "Eth8/2(Port8)", "Eth8/3(Port8)", "Eth8/4(Port8)"], + "8x50G": ["Eth8/1(Port8)", "Eth8/2(Port8)", "Eth8/3(Port8)", "Eth8/4(Port8)", "Eth8/5(Port8)", "Eth8/6(Port8)", "Eth8/7(Port8)", "Eth8/8(Port8)"] + } + }, + + "Ethernet72": { + "index": "9,9,9,9,9,9,9,9", + "lanes": "73,74,75,76,77,78,79,80", + "breakout_modes": { + "1x400G": ["Eth9(Port9)"], + "2x200G": ["Eth9/1(Port9)", "Eth9/2(Port9)"], + "4x100G": ["Eth9/1(Port9)", "Eth9/2(Port9)", "Eth9/3(Port9)", "Eth9/4(Port9)"], + "8x50G": ["Eth9/1(Port9)", "Eth9/2(Port9)", "Eth9/3(Port9)", "Eth9/4(Port9)", "Eth9/5(Port9)", "Eth9/6(Port9)", "Eth9/7(Port9)", "Eth9/8(Port9)"] + } + }, + + "Ethernet80": { + "index": "10,10,10,10,10,10,10,10", + "lanes": "81,82,83,84,85,86,87,88", + "breakout_modes": { + "1x400G": ["Eth10(Port10)"], + "2x200G": ["Eth10/1(Port10)", "Eth10/2(Port10)"], + "4x100G": ["Eth10/1(Port10)", "Eth10/2(Port10)", "Eth10/3(Port10)", "Eth10/4(Port10)"], + "8x50G": ["Eth10/1(Port10)", "Eth10/2(Port10)", "Eth10/3(Port10)", "Eth10/4(Port10)", "Eth10/5(Port10)", "Eth10/6(Port10)", "Eth10/7(Port10)", "Eth10/8(Port10)"] + } + }, + + "Ethernet88": { + "index": "11,11,11,11,11,11,11,11", + "lanes": "89,90,91,92,93,94,95,96", + "breakout_modes": { + "1x400G": ["Eth11(Port11)"], + "2x200G": ["Eth11/1(Port11)", "Eth11/2(Port11)"], + "4x100G": ["Eth11/1(Port11)", "Eth11/2(Port11)", "Eth11/3(Port11)", "Eth11/4(Port11)"], + "8x50G": ["Eth11/1(Port11)", "Eth11/2(Port11)", "Eth11/3(Port11)", "Eth11/4(Port11)", "Eth11/5(Port11)", "Eth11/6(Port11)", "Eth11/7(Port11)", "Eth11/8(Port11)"] + } + }, + + "Ethernet96": { + "index": "12,12,12,12,12,12,12,12", + "lanes": "97,98,99,100,101,102,103,104", + "breakout_modes": { + "1x400G": ["Eth12(Port12)"], + "2x200G": ["Eth12/1(Port12)", "Eth12/2(Port12)"], + "4x100G": ["Eth12/1(Port12)", "Eth12/2(Port12)", "Eth12/3(Port12)", "Eth12/4(Port12)"], + "8x50G": ["Eth12/1(Port12)", "Eth12/2(Port12)", "Eth12/3(Port12)", "Eth12/4(Port12)", "Eth12/5(Port12)", "Eth12/6(Port12)", "Eth12/7(Port12)", "Eth12/8(Port12)"] + } + }, + + "Ethernet104": { + "index": "13,13,13,13,13,13,13,13", + "lanes": "105,106,107,108,109,110,111,112", + "breakout_modes": { + "1x400G": ["Eth13(Port13)"], + "2x200G": ["Eth13/1(Port13)", "Eth13/2(Port13)"], + "4x100G": ["Eth13/1(Port13)", "Eth13/2(Port13)", "Eth13/3(Port13)", "Eth13/4(Port13)"], + "8x50G": ["Eth13/1(Port13)", "Eth13/2(Port13)", "Eth13/3(Port13)", "Eth13/4(Port13)", "Eth13/5(Port13)", "Eth13/6(Port13)", "Eth13/7(Port13)", "Eth13/8(Port13)"] + } + }, + + "Ethernet112": { + "index": "14,14,14,14,14,14,14,14", + "lanes": "113,114,115,116,117,118,119,120", + "breakout_modes": { + "1x400G": ["Eth14(Port14)"], + "2x200G": ["Eth14/1(Port14)", "Eth14/2(Port14)"], + "4x100G": ["Eth14/1(Port14)", "Eth14/2(Port14)", "Eth14/3(Port14)", "Eth14/4(Port14)"], + "8x50G": ["Eth14/1(Port14)", "Eth14/2(Port14)", "Eth14/3(Port14)", "Eth14/4(Port14)", "Eth14/5(Port14)", "Eth14/6(Port14)", "Eth14/7(Port14)", "Eth14/8(Port14)"] + } + }, + + "Ethernet120": { + "index": "15,15,15,15,15,15,15,15", + "lanes": "121,122,123,124,125,126,127,128", + "breakout_modes": { + "1x400G": ["Eth15(Port15)"], + "2x200G": ["Eth15/1(Port15)", "Eth15/2(Port15)"], + "4x100G": ["Eth15/1(Port15)", "Eth15/2(Port15)", "Eth15/3(Port15)", "Eth15/4(Port15)"], + "8x50G": ["Eth15/1(Port15)", "Eth15/2(Port15)", "Eth15/3(Port15)", "Eth15/4(Port15)", "Eth15/5(Port15)", "Eth15/6(Port15)", "Eth15/7(Port15)", "Eth15/8(Port15)"] + } + }, + + "Ethernet128": { + "index": "16,16,16,16,16,16,16,16", + "lanes": "129,130,131,132,133,134,135,136", + "breakout_modes": { + "1x400G": ["Eth16(Port16)"], + "2x200G": ["Eth16/1(Port16)", "Eth16/2(Port16)"], + "4x100G": ["Eth16/1(Port16)", "Eth16/2(Port16)", "Eth16/3(Port16)", "Eth16/4(Port16)"], + "8x50G": ["Eth16/1(Port16)", "Eth16/2(Port16)", "Eth16/3(Port16)", "Eth16/4(Port16)", "Eth16/5(Port16)", "Eth16/6(Port16)", "Eth16/7(Port16)", "Eth16/8(Port16)"] + } + }, + + "Ethernet136": { + "index": "17,17,17,17,17,17,17,17", + "lanes": "137,138,139,140,141,142,143,144", + "breakout_modes": { + "1x400G": ["Eth17(Port17)"], + "2x200G": ["Eth17/1(Port17)", "Eth17/2(Port17)"], + "4x100G": ["Eth17/1(Port17)", "Eth17/2(Port17)", "Eth17/3(Port17)", "Eth17/4(Port17)"], + "8x50G": ["Eth17/1(Port17)", "Eth17/2(Port17)", "Eth17/3(Port17)", "Eth17/4(Port17)", "Eth17/5(Port17)", "Eth17/6(Port17)", "Eth17/7(Port17)", "Eth17/8(Port17)"] + } + }, + + "Ethernet144": { + "index": "18,18,18,18,18,18,18,18", + "lanes": "145,146,147,148,149,150,151,152", + "breakout_modes": { + "1x400G": ["Eth18(Port18)"], + "2x200G": ["Eth18/1(Port18)", "Eth18/2(Port18)"], + "4x100G": ["Eth18/1(Port18)", "Eth18/2(Port18)", "Eth18/3(Port18)", "Eth18/4(Port18)"], + "8x50G": ["Eth18/1(Port18)", "Eth18/2(Port18)", "Eth18/3(Port18)", "Eth18/4(Port18)", "Eth18/5(Port18)", "Eth18/6(Port18)", "Eth18/7(Port18)", "Eth18/8(Port18)"] + } + }, + + "Ethernet152": { + "index": "19,19,19,19,19,19,19,19", + "lanes": "153,154,155,156,157,158,159,160", + "breakout_modes": { + "1x400G": ["Eth19(Port19)"], + "2x200G": ["Eth19/1(Port19)", "Eth19/2(Port19)"], + "4x100G": ["Eth19/1(Port19)", "Eth19/2(Port19)", "Eth19/3(Port19)", "Eth19/4(Port19)"], + "8x50G": ["Eth19/1(Port19)", "Eth19/2(Port19)", "Eth19/3(Port19)", "Eth19/4(Port19)", "Eth19/5(Port19)", "Eth19/6(Port19)", "Eth19/7(Port19)", "Eth19/8(Port19)"] + } + }, + + "Ethernet160": { + "index": "20,20,20,20,20,20,20,20", + "lanes": "161,162,163,164,165,166,167,168", + "breakout_modes": { + "1x400G": ["Eth20(Port20)"], + "2x200G": ["Eth20/1(Port20)", "Eth20/2(Port20)"], + "4x100G": ["Eth20/1(Port20)", "Eth20/2(Port20)", "Eth20/3(Port20)", "Eth20/4(Port20)"], + "8x50G": ["Eth20/1(Port20)", "Eth20/2(Port20)", "Eth20/3(Port20)", "Eth20/4(Port20)", "Eth20/5(Port20)", "Eth20/6(Port20)", "Eth20/7(Port20)", "Eth20/8(Port20)"] + } + }, + + "Ethernet168": { + "index": "21,21,21,21,21,21,21,21", + "lanes": "169,170,171,172,173,174,175,176", + "breakout_modes": { + "1x400G": ["Eth21(Port21)"], + "2x200G": ["Eth21/1(Port21)", "Eth21/2(Port21)"], + "4x100G": ["Eth21/1(Port21)", "Eth21/2(Port21)", "Eth21/3(Port21)", "Eth21/4(Port21)"], + "8x50G": ["Eth21/1(Port21)", "Eth21/2(Port21)", "Eth21/3(Port21)", "Eth21/4(Port21)", "Eth21/5(Port21)", "Eth21/6(Port21)", "Eth21/7(Port21)", "Eth21/8(Port21)"] + } + }, + + "Ethernet176": { + "index": "22,22,22,22,22,22,22,22", + "lanes": "177,178,179,180,181,182,183,184", + "breakout_modes": { + "1x400G": ["Eth22(Port22)"], + "2x200G": ["Eth22/1(Port22)", "Eth22/2(Port22)"], + "4x100G": ["Eth22/1(Port22)", "Eth22/2(Port22)", "Eth22/3(Port22)", "Eth22/4(Port22)"], + "8x50G": ["Eth22/1(Port22)", "Eth22/2(Port22)", "Eth22/3(Port22)", "Eth22/4(Port22)", "Eth22/5(Port22)", "Eth22/6(Port22)", "Eth22/7(Port22)", "Eth22/8(Port22)"] + } + }, + + "Ethernet184": { + "index": "23,23,23,23,23,23,23,23", + "lanes": "185,186,187,188,189,190,191,192", + "breakout_modes": { + "1x400G": ["Eth23(Port23)"], + "2x200G": ["Eth23/1(Port23)", "Eth23/2(Port23)"], + "4x100G": ["Eth23/1(Port23)", "Eth23/2(Port23)", "Eth23/3(Port23)", "Eth23/4(Port23)"], + "8x50G": ["Eth23/1(Port23)", "Eth23/2(Port23)", "Eth23/3(Port23)", "Eth23/4(Port23)", "Eth23/5(Port23)", "Eth23/6(Port23)", "Eth23/7(Port23)", "Eth23/8(Port23)"] + } + }, + + "Ethernet192": { + "index": "24,24,24,24,24,24,24,24", + "lanes": "193,194,195,196,197,198,199,200", + "breakout_modes": { + "1x400G": ["Eth24(Port24)"], + "2x200G": ["Eth24/1(Port24)", "Eth24/2(Port24)"], + "4x100G": ["Eth24/1(Port24)", "Eth24/2(Port24)", "Eth24/3(Port24)", "Eth24/4(Port24)"], + "8x50G": ["Eth24/1(Port24)", "Eth24/2(Port24)", "Eth24/3(Port24)", "Eth24/4(Port24)", "Eth24/5(Port24)", "Eth24/6(Port24)", "Eth24/7(Port24)", "Eth24/8(Port24)"] + } + }, + + "Ethernet200": { + "index": "25,25,25,25,25,25,25,25", + "lanes": "201,202,203,204,205,206,207,208", + "breakout_modes": { + "1x400G": ["Eth25(Port25)"], + "2x200G": ["Eth25/1(Port25)", "Eth25/2(Port25)"], + "4x100G": ["Eth25/1(Port25)", "Eth25/2(Port25)", "Eth25/3(Port25)", "Eth25/4(Port25)"], + "8x50G": ["Eth25/1(Port25)", "Eth25/2(Port25)", "Eth25/3(Port25)", "Eth25/4(Port25)", "Eth25/5(Port25)", "Eth25/6(Port25)", "Eth25/7(Port25)", "Eth25/8(Port25)"] + } + }, + + "Ethernet208": { + "index": "26,26,26,26,26,26,26,26", + "lanes": "209,210,211,212,213,214,215,216", + "breakout_modes": { + "1x400G": ["Eth26(Port26)"], + "2x200G": ["Eth26/1(Port26)", "Eth26/2(Port26)"], + "4x100G": ["Eth26/1(Port26)", "Eth26/2(Port26)", "Eth26/3(Port26)", "Eth26/4(Port26)"], + "8x50G": ["Eth26/1(Port26)", "Eth26/2(Port26)", "Eth26/3(Port26)", "Eth26/4(Port26)", "Eth26/5(Port26)", "Eth26/6(Port26)", "Eth26/7(Port26)", "Eth26/8(Port26)"] + } + }, + + "Ethernet216": { + "index": "27,27,27,27,27,27,27,27", + "lanes": "217,218,219,220,221,222,223,224", + "breakout_modes": { + "1x400G": ["Eth27(Port27)"], + "2x200G": ["Eth27/1(Port27)", "Eth27/2(Port27)"], + "4x100G": ["Eth27/1(Port27)", "Eth27/2(Port27)", "Eth27/3(Port27)", "Eth27/4(Port27)"], + "8x50G": ["Eth27/1(Port27)", "Eth27/2(Port27)", "Eth27/3(Port27)", "Eth27/4(Port27)", "Eth27/5(Port27)", "Eth27/6(Port27)", "Eth27/7(Port27)", "Eth27/8(Port27)"] + } + }, + + "Ethernet224": { + "index": "28,28,28,28,28,28,28,28", + "lanes": "225,226,227,228,229,230,231,232", + "breakout_modes": { + "1x400G": ["Eth28(Port28)"], + "2x200G": ["Eth28/1(Port28)", "Eth28/2(Port28)"], + "4x100G": ["Eth28/1(Port28)", "Eth28/2(Port28)", "Eth28/3(Port28)", "Eth28/4(Port28)"], + "8x50G": ["Eth28/1(Port28)", "Eth28/2(Port28)", "Eth28/3(Port28)", "Eth28/4(Port28)", "Eth28/5(Port28)", "Eth28/6(Port28)", "Eth28/7(Port28)", "Eth28/8(Port28)"] + } + }, + + "Ethernet232": { + "index": "29,29,29,29,29,29,29,29", + "lanes": "233,234,235,236,237,238,239,240", + "breakout_modes": { + "1x400G": ["Eth29(Port29)"], + "2x200G": ["Eth29/1(Port29)", "Eth29/2(Port29)"], + "4x100G": ["Eth29/1(Port29)", "Eth29/2(Port29)", "Eth29/3(Port29)", "Eth29/4(Port29)"], + "8x50G": ["Eth29/1(Port29)", "Eth29/2(Port29)", "Eth29/3(Port29)", "Eth29/4(Port29)", "Eth29/5(Port29)", "Eth29/6(Port29)", "Eth29/7(Port29)", "Eth29/8(Port29)"] + } + }, + + "Ethernet240": { + "index": "30,30,30,30,30,30,30,30", + "lanes": "241,242,243,244,245,246,247,248", + "breakout_modes": { + "1x400G": ["Eth30(Port30)"], + "2x200G": ["Eth30/1(Port30)", "Eth30/2(Port30)"], + "4x100G": ["Eth30/1(Port30)", "Eth30/2(Port30)", "Eth30/3(Port30)", "Eth30/4(Port30)"], + "8x50G": ["Eth30/1(Port30)", "Eth30/2(Port30)", "Eth30/3(Port30)", "Eth30/4(Port30)", "Eth30/5(Port30)", "Eth30/6(Port30)", "Eth30/7(Port30)", "Eth30/8(Port30)"] + } + }, + + "Ethernet248": { + "index": "31,31,31,31,31,31,31,31", + "lanes": "249,250,251,252,253,254,255,256", + "breakout_modes": { + "1x400G": ["Eth31(Port31)"], + "2x200G": ["Eth31/1(Port31)", "Eth31/2(Port31)"], + "4x100G": ["Eth31/1(Port31)", "Eth31/2(Port31)", "Eth31/3(Port31)", "Eth31/4(Port31)"], + "8x50G": ["Eth31/1(Port31)", "Eth31/2(Port31)", "Eth31/3(Port31)", "Eth31/4(Port31)", "Eth31/5(Port31)", "Eth31/6(Port31)", "Eth31/7(Port31)", "Eth31/8(Port31)"] + } + }, + + "Ethernet256": { + "index": "32", + "lanes": "257", + "breakout_modes": { + "1x10G": ["Eth32(Port32)"] + } + }, + + "Ethernet257": { + "index": "33", + "lanes": "258", + "breakout_modes": { + "1x10G": ["Eth33(Port33)"] + } + } + } +} + diff --git a/device/ufispace/x86_64-ufispace_s9301_32d-r0/platform_asic b/device/ufispace/x86_64-ufispace_s9301_32d-r0/platform_asic new file mode 100644 index 0000000000..9604676527 --- /dev/null +++ b/device/ufispace/x86_64-ufispace_s9301_32d-r0/platform_asic @@ -0,0 +1 @@ +broadcom diff --git a/device/ufispace/x86_64-ufispace_s9301_32d-r0/platform_components.json b/device/ufispace/x86_64-ufispace_s9301_32d-r0/platform_components.json new file mode 100644 index 0000000000..af225f80cc --- /dev/null +++ b/device/ufispace/x86_64-ufispace_s9301_32d-r0/platform_components.json @@ -0,0 +1,13 @@ +{ + "chassis": { + "x86_64-ufispace_s9301_32d-r0": { + "component": { + "CPLD1": { }, + "CPLD2": { }, + "CPLD3": { }, + "BIOS": { }, + "BMC": {} + } + } + } +} diff --git a/device/ufispace/x86_64-ufispace_s9301_32d-r0/platform_env.conf b/device/ufispace/x86_64-ufispace_s9301_32d-r0/platform_env.conf new file mode 100644 index 0000000000..03a43af978 --- /dev/null +++ b/device/ufispace/x86_64-ufispace_s9301_32d-r0/platform_env.conf @@ -0,0 +1 @@ +SYNCD_SHM_SIZE=512m diff --git a/device/ufispace/x86_64-ufispace_s9301_32d-r0/pmon_daemon_control.json b/device/ufispace/x86_64-ufispace_s9301_32d-r0/pmon_daemon_control.json new file mode 100644 index 0000000000..e348e0168f --- /dev/null +++ b/device/ufispace/x86_64-ufispace_s9301_32d-r0/pmon_daemon_control.json @@ -0,0 +1,9 @@ +{ + "skip_pcied": false, + "skip_fancontrol": false, + "skip_thermalctld": false, + "skip_ledd": true, + "skip_xcvrd": false, + "skip_psud": false, + "skip_syseepromd": false +} diff --git a/device/ufispace/x86_64-ufispace_s9301_32d-r0/sensors.conf b/device/ufispace/x86_64-ufispace_s9301_32d-r0/sensors.conf new file mode 100644 index 0000000000..7a1c040881 --- /dev/null +++ b/device/ufispace/x86_64-ufispace_s9301_32d-r0/sensors.conf @@ -0,0 +1,9 @@ +# libsensors configuration file + +bus "i2c-0" "I2C I801" +chip "tmp75-i2c-*-4f" + label temp1 "CPU Board Temp" + set temp1_max 70 + set temp1_max_hyst 75 + set temp1_crit 85 + diff --git a/device/ufispace/x86_64-ufispace_s9301_32d-r0/system_health_monitoring_config.json b/device/ufispace/x86_64-ufispace_s9301_32d-r0/system_health_monitoring_config.json new file mode 100644 index 0000000000..6291e81a06 --- /dev/null +++ b/device/ufispace/x86_64-ufispace_s9301_32d-r0/system_health_monitoring_config.json @@ -0,0 +1,15 @@ +{ + "services_to_ignore": [], + "devices_to_ignore": [ + "asic", + "psu", + "fan" + ], + "user_defined_checkers": [], + "polling_interval": 60, + "led_color": { + "fault": "yellow", + "normal": "green", + "booting": "blinking_green" + } +} \ No newline at end of file diff --git a/device/ufispace/x86_64-ufispace_s9301_32db-r0/UFISPACE-S9301-32DB/hwsku.json b/device/ufispace/x86_64-ufispace_s9301_32db-r0/UFISPACE-S9301-32DB/hwsku.json new file mode 100644 index 0000000000..51691efaa8 --- /dev/null +++ b/device/ufispace/x86_64-ufispace_s9301_32db-r0/UFISPACE-S9301-32DB/hwsku.json @@ -0,0 +1,132 @@ +{ + "interfaces": { + "Ethernet0": { + "default_brkout_mode": "1x200G" + }, + + "Ethernet8": { + "default_brkout_mode": "1x200G" + }, + + "Ethernet16": { + "default_brkout_mode": "1x200G" + }, + + "Ethernet24": { + "default_brkout_mode": "1x200G" + }, + + "Ethernet32": { + "default_brkout_mode": "1x200G" + }, + + "Ethernet40": { + "default_brkout_mode": "1x200G" + }, + + "Ethernet48": { + "default_brkout_mode": "1x200G" + }, + + "Ethernet56": { + "default_brkout_mode": "1x200G" + }, + + "Ethernet64": { + "default_brkout_mode": "1x200G" + }, + + "Ethernet72": { + "default_brkout_mode": "1x200G" + }, + + "Ethernet80": { + "default_brkout_mode": "1x200G" + }, + + "Ethernet88": { + "default_brkout_mode": "1x200G" + }, + + "Ethernet96": { + "default_brkout_mode": "1x200G" + }, + + "Ethernet104": { + "default_brkout_mode": "1x200G" + }, + + "Ethernet112": { + "default_brkout_mode": "1x200G" + }, + + "Ethernet120": { + "default_brkout_mode": "1x200G" + }, + + "Ethernet128": { + "default_brkout_mode": "1x200G" + }, + + "Ethernet136": { + "default_brkout_mode": "1x200G" + }, + + "Ethernet144": { + "default_brkout_mode": "1x200G" + }, + + "Ethernet152": { + "default_brkout_mode": "1x200G" + }, + + "Ethernet160": { + "default_brkout_mode": "1x200G" + }, + + "Ethernet168": { + "default_brkout_mode": "1x200G" + }, + + "Ethernet176": { + "default_brkout_mode": "1x200G" + }, + + "Ethernet184": { + "default_brkout_mode": "1x200G" + }, + + "Ethernet192": { + "default_brkout_mode": "1x400G" + }, + + "Ethernet200": { + "default_brkout_mode": "1x400G" + }, + + "Ethernet208": { + "default_brkout_mode": "1x400G" + }, + + "Ethernet216": { + "default_brkout_mode": "1x400G" + }, + + "Ethernet224": { + "default_brkout_mode": "1x400G" + }, + + "Ethernet232": { + "default_brkout_mode": "1x400G" + }, + + "Ethernet240": { + "default_brkout_mode": "1x400G" + }, + + "Ethernet248": { + "default_brkout_mode": "1x400G" + } + } +} + diff --git a/device/ufispace/x86_64-ufispace_s9301_32db-r0/UFISPACE-S9301-32DB/port_config.ini b/device/ufispace/x86_64-ufispace_s9301_32db-r0/UFISPACE-S9301-32DB/port_config.ini new file mode 100644 index 0000000000..8ca94c616c --- /dev/null +++ b/device/ufispace/x86_64-ufispace_s9301_32db-r0/UFISPACE-S9301-32DB/port_config.ini @@ -0,0 +1,33 @@ +# name lanes alias index speed +Ethernet0 1,2,3,4,5,6,7,8 Ethernet1/1 0 200000 +Ethernet8 9,10,11,12,13,14,15,16 Ethernet2/1 1 200000 +Ethernet16 17,18,19,20,21,22,23,24 Ethernet3/1 2 200000 +Ethernet24 25,26,27,28,29,30,31,32 Ethernet4/1 3 200000 +Ethernet32 33,34,35,36,37,38,39,40 Ethernet5/1 4 200000 +Ethernet40 41,42,43,44,45,46,47,48 Ethernet6/1 5 200000 +Ethernet48 49,50,51,52,53,54,55,56 Ethernet7/1 6 200000 +Ethernet56 57,58,59,60,61,62,63,64 Ethernet8/1 7 200000 +Ethernet64 65,66,67,68,69,70,71,72 Ethernet9/1 8 200000 +Ethernet72 73,74,75,76,77,78,79,80 Ethernet10/1 9 200000 +Ethernet80 81,82,83,84,85,86,87,88 Ethernet11/1 10 200000 +Ethernet88 89,90,91,92,93,94,95,96 Ethernet12/1 11 200000 +Ethernet96 97,98,99,100,101,102,103,104 Ethernet13/1 12 200000 +Ethernet104 105,106,107,108,109,110,111,112 Ethernet14/1 13 200000 +Ethernet112 113,114,115,116,117,118,119,120 Ethernet15/1 14 200000 +Ethernet120 121,122,123,124,125,126,127,128 Ethernet16/1 15 200000 +Ethernet128 129,130,131,132,133,134,135,136 Ethernet17/1 16 200000 +Ethernet136 137,138,139,140,141,142,143,144 Ethernet18/1 17 200000 +Ethernet144 145,146,147,148,149,150,151,152 Ethernet19/1 18 200000 +Ethernet152 153,154,155,156,157,158,159,160 Ethernet20/1 19 200000 +Ethernet160 161,162,163,164,165,166,167,168 Ethernet21/1 20 200000 +Ethernet168 169,170,171,172,173,174,175,176 Ethernet22/1 21 200000 +Ethernet176 177,178,179,180,181,182,183,184 Ethernet23/1 22 200000 +Ethernet184 185,186,187,188,189,190,191,192 Ethernet24/1 23 200000 +Ethernet192 193,194,195,196,197,198,199,200 Ethernet25/1 24 400000 +Ethernet200 201,202,203,204,205,206,207,208 Ethernet26/1 25 400000 +Ethernet208 209,210,211,212,213,214,215,216 Ethernet27/1 26 400000 +Ethernet216 217,218,219,220,221,222,223,224 Ethernet28/1 27 400000 +Ethernet224 225,226,227,228,229,230,231,232 Ethernet29/1 28 400000 +Ethernet232 233,234,235,236,237,238,239,240 Ethernet30/1 29 400000 +Ethernet240 241,242,243,244,245,246,247,248 Ethernet31/1 30 400000 +Ethernet248 249,250,251,252,253,254,255,256 Ethernet32/1 31 400000 \ No newline at end of file diff --git a/device/ufispace/x86_64-ufispace_s9301_32db-r0/UFISPACE-S9301-32DB/sai.profile b/device/ufispace/x86_64-ufispace_s9301_32db-r0/UFISPACE-S9301-32DB/sai.profile new file mode 100644 index 0000000000..f0f4767208 --- /dev/null +++ b/device/ufispace/x86_64-ufispace_s9301_32db-r0/UFISPACE-S9301-32DB/sai.profile @@ -0,0 +1 @@ +SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/td4-s9301-24x200G-8x400G.config.yml diff --git a/device/ufispace/x86_64-ufispace_s9301_32db-r0/UFISPACE-S9301-32DB/td4-s9301-24x200G-8x400G.config.yml b/device/ufispace/x86_64-ufispace_s9301_32db-r0/UFISPACE-S9301-32DB/td4-s9301-24x200G-8x400G.config.yml new file mode 100644 index 0000000000..a661adfdc4 --- /dev/null +++ b/device/ufispace/x86_64-ufispace_s9301_32db-r0/UFISPACE-S9301-32DB/td4-s9301-24x200G-8x400G.config.yml @@ -0,0 +1,671 @@ +#r1.0.0 +# +# BCM56880 32x400g port configuration. +# +# configuration yaml file +# device: +# : +#
: +# ? +# : +# : +# ... +# : +# : +# : +# : +# ... +# : +# + +--- +device: + 0: + DEVICE_CONFIG: + # CORE CLOCK FREQUENCY + CORE_CLK_FREQ: CLK_1350MHZ + # PP CLOCK FREQUENCY + PP_CLK_FREQ: CLK_1350MHZ + VARIANT: DNA_4_9_5_0 +... +--- +device: + 0: + FP_CONFIG: + FP_ING_OPERMODE: GLOBAL_PIPE_AWARE +... +--- +device: + 0: + TM_SCHEDULER_CONFIG: + NUM_MC_Q: NUM_MC_Q_4 +... +--- +bcm_device: + 0: + global: + sai_remap_prio_on_tnl_egress: 1 + global_flexctr_ing_action_num_reserved: 32 + global_flexctr_ing_group_num_reserved: 2 + global_flexctr_ing_pool_num_reserved: 12 + global_flexctr_ing_quant_num_reserved: 2 + global_flexctr_ing_op_profile_num_reserved: 32 + l3_intf_vlan_split_egress: 1 + pktio_mode: 1 + bcm_tunnel_term_compatible_mode: 1 + vlan_flooding_l2mc_num_reserved: 0 + l3_alpm_template: 1 + l3_alpm2_bnk_threshold: 100 + l2_hitbit_enable: 0 + uft_mode: 1 + l3_enable: 1 + ipv6_lpm_128b_enable: 1 + shared_block_mask_section: uc_bc + skip_protocol_default_entries: 1 + sai_tunnel_support: 0 + flexctr_action_reserved_ipmc_hitbit: 1 + sai_nbr_bcast_ifp_optimized: 1 + use_all_splithorizon_groups: 1 + riot_enable: 1 + riot_overlay_l3_intf_mem_size: 8192 + riot_overlay_l3_egress_mem_size: 32768 + l3_ecmp_levels: 2 + riot_overlay_ecmp_resilient_hash_size: 16384 + sai_feat_tail_timestamp: 1 + sai_port_queue_ecn_counter: 1 + sai_field_group_auto_prioritize: 1 +... +--- +device: + 0: + PC_PORT_PHYS_MAP: + ? + # CPU port + PORT_ID: 0 + : + PC_PHYS_PORT_ID: 0 + ? + PORT_ID: 1 + : + PC_PHYS_PORT_ID: 1 + ? + PORT_ID: 2 + : + PC_PHYS_PORT_ID: 9 + ? + PORT_ID: 3 + : + PC_PHYS_PORT_ID: 17 + ? + PORT_ID: 4 + : + PC_PHYS_PORT_ID: 25 + ? + PORT_ID: 20 + : + PC_PHYS_PORT_ID: 33 + ? + PORT_ID: 21 + : + PC_PHYS_PORT_ID: 41 + ? + PORT_ID: 22 + : + PC_PHYS_PORT_ID: 49 + ? + PORT_ID: 23 + : + PC_PHYS_PORT_ID: 57 + ? + PORT_ID: 40 + : + PC_PHYS_PORT_ID: 65 + ? + PORT_ID: 41 + : + PC_PHYS_PORT_ID: 73 + ? + PORT_ID: 42 + : + PC_PHYS_PORT_ID: 81 + ? + PORT_ID: 43 + : + PC_PHYS_PORT_ID: 89 + ? + PORT_ID: 60 + : + PC_PHYS_PORT_ID: 97 + ? + PORT_ID: 61 + : + PC_PHYS_PORT_ID: 105 + ? + PORT_ID: 62 + : + PC_PHYS_PORT_ID: 113 + ? + PORT_ID: 63 + : + PC_PHYS_PORT_ID: 121 + ? + PORT_ID: 80 + : + PC_PHYS_PORT_ID: 129 + ? + PORT_ID: 81 + : + PC_PHYS_PORT_ID: 137 + ? + PORT_ID: 82 + : + PC_PHYS_PORT_ID: 145 + ? + PORT_ID: 83 + : + PC_PHYS_PORT_ID: 153 + ? + PORT_ID: 100 + : + PC_PHYS_PORT_ID: 161 + ? + PORT_ID: 101 + : + PC_PHYS_PORT_ID: 169 + ? + PORT_ID: 102 + : + PC_PHYS_PORT_ID: 177 + ? + PORT_ID: 103 + : + PC_PHYS_PORT_ID: 185 + ? + PORT_ID: 120 + : + PC_PHYS_PORT_ID: 193 + ? + PORT_ID: 121 + : + PC_PHYS_PORT_ID: 201 + ? + PORT_ID: 122 + : + PC_PHYS_PORT_ID: 209 + ? + PORT_ID: 123 + : + PC_PHYS_PORT_ID: 217 + ? + PORT_ID: 140 + : + PC_PHYS_PORT_ID: 225 + ? + PORT_ID: 141 + : + PC_PHYS_PORT_ID: 233 + ? + PORT_ID: 142 + : + PC_PHYS_PORT_ID: 241 + ? + PORT_ID: 143 + : + PC_PHYS_PORT_ID: 249 + ? + # management port + PORT_ID: 38 + : + PC_PHYS_PORT_ID: 257 + ? + # management port + PORT_ID: 118 + : + PC_PHYS_PORT_ID: 259 +... +--- +device: + 0: + PC_PORT: + ? + PORT_ID: 0 + : + &port_mode_10g + ENABLE: 0 + SPEED: 10000 + NUM_LANES: 1 + ? + PORT_ID: [[1, 4], + [20, 23], + [40, 43], + [60, 63], + [80, 83], + [100, 103], + [120, 123], + [140, 143]] + : + &port_mode_400g + ENABLE: 0 + SPEED: 400000 + NUM_LANES: 8 + FEC_MODE: PC_FEC_RS544_2XN + LINK_TRAINING: 1 + MAX_FRAME_SIZE: 9416 + ? + PORT_ID: [38, # Management port 0 (Pipe 1) + 118] # Management port 1 (Pipe 3) + : + &port_mode_10g_xfi + ENABLE: 0 + SPEED: 10000 + NUM_LANES: 1 + MAX_FRAME_SIZE: 9416 +... +--- +device: + 0: + # Per pipe flex counter configuration + CTR_EFLEX_CONFIG: + CTR_ING_EFLEX_OPERMODE_PIPEUNIQUE: 0 + CTR_EGR_EFLEX_OPERMODE_PIPEUNIQUE: 0 +... +# +# $Copyright: (c) 2019 Broadcom. +# Broadcom Proprietary and Confidential. All rights reserved.$ +# +# BCM56880 PC_PM_CORE configuration for K board. +# +# $Copyright:.$ +# + +--- +device: + 0: + PC_PM_CORE: + ? + PC_PM_ID: 1 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x27413065 + TX_LANE_MAP: 0x46270513 + RX_POLARITY_FLIP: 0x0a + TX_POLARITY_FLIP: 0x4d + ? + PC_PM_ID: 2 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x02741365 + TX_LANE_MAP: 0x51306274 + RX_POLARITY_FLIP: 0xfd + TX_POLARITY_FLIP: 0x2c + ? + PC_PM_ID: 3 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x65731402 + TX_LANE_MAP: 0x04731265 + RX_POLARITY_FLIP: 0xf5 + TX_POLARITY_FLIP: 0xba + ? + PC_PM_ID: 4 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x01563427 + TX_LANE_MAP: 0x45231706 + RX_POLARITY_FLIP: 0x35 + TX_POLARITY_FLIP: 0xe4 + ? + PC_PM_ID: 5 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x63047521 + TX_LANE_MAP: 0x41706253 + RX_POLARITY_FLIP: 0xf5 + TX_POLARITY_FLIP: 0xf2 + ? + PC_PM_ID: 6 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x20643175 + TX_LANE_MAP: 0x65237410 + RX_POLARITY_FLIP: 0xff + TX_POLARITY_FLIP: 0x7f + ? + PC_PM_ID: 7 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x64307521 + TX_LANE_MAP: 0x12650437 + RX_POLARITY_FLIP: 0xf5 + TX_POLARITY_FLIP: 0xde + ? + PC_PM_ID: 8 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x23417065 + TX_LANE_MAP: 0x46231705 + RX_POLARITY_FLIP: 0xff + TX_POLARITY_FLIP: 0xb5 + ? + PC_PM_ID: 9 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x32406175 + TX_LANE_MAP: 0x16370425 + RX_POLARITY_FLIP: 0x0a + TX_POLARITY_FLIP: 0x45 + ? + PC_PM_ID: 10 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x74306521 + TX_LANE_MAP: 0x01352674 + RX_POLARITY_FLIP: 0x00 + TX_POLARITY_FLIP: 0x06 + ? + PC_PM_ID: 11 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x21743065 + TX_LANE_MAP: 0x41537062 + RX_POLARITY_FLIP: 0x0a + TX_POLARITY_FLIP: 0x37 + ? + PC_PM_ID: 12 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x67042531 + TX_LANE_MAP: 0x74530162 + RX_POLARITY_FLIP: 0x00 + TX_POLARITY_FLIP: 0x42 + ? + PC_PM_ID: 13 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x10652437 + TX_LANE_MAP: 0x76051324 + RX_POLARITY_FLIP: 0x0a + TX_POLARITY_FLIP: 0xc5 + ? + PC_PM_ID: 14 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x65037412 + TX_LANE_MAP: 0x04731562 + RX_POLARITY_FLIP: 0x00 + TX_POLARITY_FLIP: 0x08 + ? + PC_PM_ID: 15 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x02741365 + TX_LANE_MAP: 0x60425371 + RX_POLARITY_FLIP: 0x0a + TX_POLARITY_FLIP: 0xc4 + ? + PC_PM_ID: 16 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x32506174 + TX_LANE_MAP: 0x01235764 + RX_POLARITY_FLIP: 0xff + TX_POLARITY_FLIP: 0xfc + ? + PC_PM_ID: 17 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x32416075 + TX_LANE_MAP: 0x15430627 + RX_POLARITY_FLIP: 0x0a + TX_POLARITY_FLIP: 0x4d + ? + PC_PM_ID: 18 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x12740365 + TX_LANE_MAP: 0x61405372 + RX_POLARITY_FLIP: 0xff + TX_POLARITY_FLIP: 0x41 + ? + PC_PM_ID: 19 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x65037412 + TX_LANE_MAP: 0x01247653 + RX_POLARITY_FLIP: 0xf5 + TX_POLARITY_FLIP: 0xf6 + ? + PC_PM_ID: 20 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x10652437 + TX_LANE_MAP: 0x41507263 + RX_POLARITY_FLIP: 0xff + TX_POLARITY_FLIP: 0xf7 + ? + PC_PM_ID: 21 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x23561704 + TX_LANE_MAP: 0x62437051 + RX_POLARITY_FLIP: 0xf5 + TX_POLARITY_FLIP: 0x7a + ? + PC_PM_ID: 22 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x20743165 + TX_LANE_MAP: 0x42537160 + RX_POLARITY_FLIP: 0xff + TX_POLARITY_FLIP: 0xf7 + ? + PC_PM_ID: 23 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x74206531 + TX_LANE_MAP: 0x03471562 + RX_POLARITY_FLIP: 0xf5 + TX_POLARITY_FLIP: 0xf9 + ? + PC_PM_ID: 24 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x23406175 + TX_LANE_MAP: 0x60217453 + RX_POLARITY_FLIP: 0xff + TX_POLARITY_FLIP: 0x75 + ? + PC_PM_ID: 25 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x23506174 + TX_LANE_MAP: 0x75243016 + RX_POLARITY_FLIP: 0x0a + TX_POLARITY_FLIP: 0x04 + ? + PC_PM_ID: 26 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x64307521 + TX_LANE_MAP: 0x57134602 + RX_POLARITY_FLIP: 0x00 + TX_POLARITY_FLIP: 0x0e + ? + PC_PM_ID: 27 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x30742165 + TX_LANE_MAP: 0x30645172 + RX_POLARITY_FLIP: 0x0a + TX_POLARITY_FLIP: 0x25 + ? + PC_PM_ID: 28 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x76042531 + TX_LANE_MAP: 0x31657024 + RX_POLARITY_FLIP: 0x00 + TX_POLARITY_FLIP: 0x2a + ? + PC_PM_ID: 29 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x23651407 + TX_LANE_MAP: 0x26034715 + RX_POLARITY_FLIP: 0x0a + TX_POLARITY_FLIP: 0x47 + ? + PC_PM_ID: 30 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x17425603 + TX_LANE_MAP: 0x07431625 + RX_POLARITY_FLIP: 0xaa + TX_POLARITY_FLIP: 0x0c + ? + PC_PM_ID: 31 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x12740365 + TX_LANE_MAP: 0x74503162 + RX_POLARITY_FLIP: 0x0a + TX_POLARITY_FLIP: 0x1f + ? + PC_PM_ID: 32 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x32406175 + TX_LANE_MAP: 0x32147605 + RX_POLARITY_FLIP: 0xff + TX_POLARITY_FLIP: 0x55 +... + + diff --git a/device/ufispace/x86_64-ufispace_s9301_32db-r0/custom_led.bin b/device/ufispace/x86_64-ufispace_s9301_32db-r0/custom_led.bin new file mode 100644 index 0000000000..1cbd43d6a5 Binary files /dev/null and b/device/ufispace/x86_64-ufispace_s9301_32db-r0/custom_led.bin differ diff --git a/device/ufispace/x86_64-ufispace_s9301_32db-r0/default_sku b/device/ufispace/x86_64-ufispace_s9301_32db-r0/default_sku new file mode 100644 index 0000000000..0125446bfe --- /dev/null +++ b/device/ufispace/x86_64-ufispace_s9301_32db-r0/default_sku @@ -0,0 +1 @@ +UFISPACE-S9301-32DB t1 diff --git a/device/ufispace/x86_64-ufispace_s9301_32db-r0/fancontrol b/device/ufispace/x86_64-ufispace_s9301_32db-r0/fancontrol new file mode 100644 index 0000000000..1234cd994f --- /dev/null +++ b/device/ufispace/x86_64-ufispace_s9301_32db-r0/fancontrol @@ -0,0 +1,10 @@ +# Configuration file generated by pwmconfig, changes will be lost +INTERVAL=10 +DEVPATH= +DEVNAME= +FCTEMPS= +FCFANS= +MINTEMP= +MAXTEMP= +MINSTART= +MINSTOP= diff --git a/device/ufispace/x86_64-ufispace_s9301_32db-r0/installer.conf b/device/ufispace/x86_64-ufispace_s9301_32db-r0/installer.conf new file mode 100644 index 0000000000..74b02f0766 --- /dev/null +++ b/device/ufispace/x86_64-ufispace_s9301_32db-r0/installer.conf @@ -0,0 +1,4 @@ +CONSOLE_PORT=0x3f8 +CONSOLE_DEV=0 +CONSOLE_SPEED=115200 +ONIE_PLATFORM_EXTRA_CMDLINE_LINUX="modprobe.blacklist=gpio_ich,qat_c3xxx nomodeset pcie_aspm=off" diff --git a/device/ufispace/x86_64-ufispace_s9301_32db-r0/led_proc_init.soc b/device/ufispace/x86_64-ufispace_s9301_32db-r0/led_proc_init.soc new file mode 100644 index 0000000000..eda09a0dd1 --- /dev/null +++ b/device/ufispace/x86_64-ufispace_s9301_32db-r0/led_proc_init.soc @@ -0,0 +1,4 @@ +led stop +led load /usr/share/sonic/platform/custom_led.bin +led auto on +led start diff --git a/device/ufispace/x86_64-ufispace_s9301_32db-r0/pcie.yaml b/device/ufispace/x86_64-ufispace_s9301_32db-r0/pcie.yaml new file mode 100644 index 0000000000..131d552226 --- /dev/null +++ b/device/ufispace/x86_64-ufispace_s9301_32db-r0/pcie.yaml @@ -0,0 +1,741 @@ +- bus: '00' + dev: '00' + fn: '0' + id: '2020' + name: 'Host bridge: Intel Corporation Sky Lake-E DMI3 Registers (rev 04)' +- bus: '00' + dev: '04' + fn: '0' + id: '2021' + name: 'System peripheral: Intel Corporation Sky Lake-E CBDMA Registers (rev 04)' +- bus: '00' + dev: '04' + fn: '1' + id: '2021' + name: 'System peripheral: Intel Corporation Sky Lake-E CBDMA Registers (rev 04)' +- bus: '00' + dev: '04' + fn: '2' + id: '2021' + name: 'System peripheral: Intel Corporation Sky Lake-E CBDMA Registers (rev 04)' +- bus: '00' + dev: '04' + fn: '3' + id: '2021' + name: 'System peripheral: Intel Corporation Sky Lake-E CBDMA Registers (rev 04)' +- bus: '00' + dev: '04' + fn: '4' + id: '2021' + name: 'System peripheral: Intel Corporation Sky Lake-E CBDMA Registers (rev 04)' +- bus: '00' + dev: '04' + fn: '5' + id: '2021' + name: 'System peripheral: Intel Corporation Sky Lake-E CBDMA Registers (rev 04)' +- bus: '00' + dev: '04' + fn: '6' + id: '2021' + name: 'System peripheral: Intel Corporation Sky Lake-E CBDMA Registers (rev 04)' +- bus: '00' + dev: '04' + fn: '7' + id: '2021' + name: 'System peripheral: Intel Corporation Sky Lake-E CBDMA Registers (rev 04)' +- bus: '00' + dev: '05' + fn: '0' + id: '2024' + name: 'System peripheral: Intel Corporation Sky Lake-E MM/Vt-d Configuration Registers + (rev 04)' +- bus: '00' + dev: '05' + fn: '2' + id: '2025' + name: 'System peripheral: Intel Corporation Sky Lake-E RAS (rev 04)' +- bus: '00' + dev: '05' + fn: '4' + id: '2026' + name: 'PIC: Intel Corporation Sky Lake-E IOAPIC (rev 04)' +- bus: '00' + dev: 08 + fn: '0' + id: '2014' + name: 'System peripheral: Intel Corporation Sky Lake-E Ubox Registers (rev 04)' +- bus: '00' + dev: 08 + fn: '1' + id: '2015' + name: 'Performance counters: Intel Corporation Sky Lake-E Ubox Registers (rev 04)' +- bus: '00' + dev: 08 + fn: '2' + id: '2016' + name: 'System peripheral: Intel Corporation Sky Lake-E Ubox Registers (rev 04)' +- bus: '00' + dev: '11' + fn: '0' + id: a1ec + name: 'Unassigned class [ff00]: Intel Corporation C620 Series Chipset Family MROM + 0 (rev 04)' +- bus: '00' + dev: '11' + fn: '1' + id: a1ed + name: 'Unassigned class [ff00]: Intel Corporation C620 Series Chipset Family MROM + 1 (rev 04)' +- bus: '00' + dev: '14' + fn: '0' + id: a1af + name: 'USB controller: Intel Corporation C620 Series Chipset Family USB 3.0 xHCI + Controller (rev 04)' +- bus: '00' + dev: '14' + fn: '2' + id: a1b1 + name: 'Signal processing controller: Intel Corporation C620 Series Chipset Family + Thermal Subsystem (rev 04)' +- bus: '00' + dev: '16' + fn: '0' + id: a1ba + name: 'Communication controller: Intel Corporation C620 Series Chipset Family MEI + Controller #1 (rev 04)' +- bus: '00' + dev: '16' + fn: '4' + id: a1be + name: 'Communication controller: Intel Corporation C620 Series Chipset Family MEI + Controller #3 (rev 04)' +- bus: '00' + dev: 1c + fn: '0' + id: a190 + name: 'PCI bridge: Intel Corporation C620 Series Chipset Family PCI Express Root + Port #1 (rev f4)' +- bus: '00' + dev: 1c + fn: '4' + id: a194 + name: 'PCI bridge: Intel Corporation C620 Series Chipset Family PCI Express Root + Port #5 (rev f4)' +- bus: '00' + dev: 1c + fn: '5' + id: a195 + name: 'PCI bridge: Intel Corporation C620 Series Chipset Family PCI Express Root + Port #6 (rev f4)' +- bus: '00' + dev: 1d + fn: '0' + id: a198 + name: 'PCI bridge: Intel Corporation C620 Series Chipset Family PCI Express Root + Port #9 (rev f4)' +- bus: '00' + dev: 1d + fn: '2' + id: a19a + name: 'PCI bridge: Intel Corporation C620 Series Chipset Family PCI Express Root + Port #11 (rev f4)' +- bus: '00' + dev: 1f + fn: '0' + id: a1c8 + name: 'ISA bridge: Intel Corporation Device a1c8 (rev 04)' +- bus: '00' + dev: 1f + fn: '2' + id: a1a1 + name: 'Memory controller: Intel Corporation C620 Series Chipset Family Power Management + Controller (rev 04)' +- bus: '00' + dev: 1f + fn: '4' + id: a1a3 + name: 'SMBus: Intel Corporation C620 Series Chipset Family SMBus (rev 04)' +- bus: '00' + dev: 1f + fn: '5' + id: a1a4 + name: 'Serial bus controller [0c80]: Intel Corporation C620 Series Chipset Family + SPI Controller (rev 04)' +- bus: '02' + dev: '00' + fn: '0' + id: '1533' + name: 'Ethernet controller: Intel Corporation I210 Gigabit Network Connection (rev + 03)' +- bus: '03' + dev: '00' + fn: '0' + id: '1150' + name: 'PCI bridge: ASPEED Technology, Inc. AST1150 PCI-to-PCI Bridge (rev 03)' +- bus: '04' + dev: '00' + fn: '0' + id: '2000' + name: 'VGA compatible controller: ASPEED Technology, Inc. ASPEED Graphics Family + (rev 30)' +- bus: '06' + dev: '00' + fn: '0' + id: '0625' + name: 'SATA controller: ASMedia Technology Inc. Device 0625 (rev 01)' +- bus: '16' + dev: '00' + fn: '0' + id: '2030' + name: 'PCI bridge: Intel Corporation Sky Lake-E PCI Express Root Port A (rev 04)' +- bus: '16' + dev: '01' + fn: '0' + id: '2031' + name: 'PCI bridge: Intel Corporation Sky Lake-E PCI Express Root Port B (rev 04)' +- bus: '16' + dev: '02' + fn: '0' + id: '2032' + name: 'PCI bridge: Intel Corporation Sky Lake-E PCI Express Root Port C (rev 04)' +- bus: '16' + dev: '03' + fn: '0' + id: '2033' + name: 'PCI bridge: Intel Corporation Sky Lake-E PCI Express Root Port D (rev 04)' +- bus: '16' + dev: '05' + fn: '0' + id: '2034' + name: 'System peripheral: Intel Corporation Sky Lake-E VT-d (rev 04)' +- bus: '16' + dev: '05' + fn: '2' + id: '2035' + name: 'System peripheral: Intel Corporation Sky Lake-E RAS Configuration Registers + (rev 04)' +- bus: '16' + dev: '05' + fn: '4' + id: '2036' + name: 'PIC: Intel Corporation Sky Lake-E IOxAPIC Configuration Registers (rev 04)' +- bus: '16' + dev: 08 + fn: '0' + id: 208d + name: 'System peripheral: Intel Corporation Sky Lake-E CHA Registers (rev 04)' +- bus: '16' + dev: 08 + fn: '1' + id: 208d + name: 'System peripheral: Intel Corporation Sky Lake-E CHA Registers (rev 04)' +- bus: '16' + dev: 08 + fn: '2' + id: 208d + name: 'System peripheral: Intel Corporation Sky Lake-E CHA Registers (rev 04)' +- bus: '16' + dev: 08 + fn: '3' + id: 208d + name: 'System peripheral: Intel Corporation Sky Lake-E CHA Registers (rev 04)' +- bus: '16' + dev: 08 + fn: '4' + id: 208d + name: 'System peripheral: Intel Corporation Sky Lake-E CHA Registers (rev 04)' +- bus: '16' + dev: 08 + fn: '5' + id: 208d + name: 'System peripheral: Intel Corporation Sky Lake-E CHA Registers (rev 04)' +- bus: '16' + dev: 08 + fn: '6' + id: 208d + name: 'System peripheral: Intel Corporation Sky Lake-E CHA Registers (rev 04)' +- bus: '16' + dev: 08 + fn: '7' + id: 208d + name: 'System peripheral: Intel Corporation Sky Lake-E CHA Registers (rev 04)' +- bus: '16' + dev: 09 + fn: '0' + id: 208d + name: 'System peripheral: Intel Corporation Sky Lake-E CHA Registers (rev 04)' +- bus: '16' + dev: 09 + fn: '1' + id: 208d + name: 'System peripheral: Intel Corporation Sky Lake-E CHA Registers (rev 04)' +- bus: '16' + dev: 09 + fn: '2' + id: 208d + name: 'System peripheral: Intel Corporation Sky Lake-E CHA Registers (rev 04)' +- bus: '16' + dev: 09 + fn: '3' + id: 208d + name: 'System peripheral: Intel Corporation Sky Lake-E CHA Registers (rev 04)' +- bus: '16' + dev: 09 + fn: '4' + id: 208d + name: 'System peripheral: Intel Corporation Sky Lake-E CHA Registers (rev 04)' +- bus: '16' + dev: 09 + fn: '5' + id: 208d + name: 'System peripheral: Intel Corporation Sky Lake-E CHA Registers (rev 04)' +- bus: '16' + dev: 09 + fn: '6' + id: 208d + name: 'System peripheral: Intel Corporation Sky Lake-E CHA Registers (rev 04)' +- bus: '16' + dev: 09 + fn: '7' + id: 208d + name: 'System peripheral: Intel Corporation Sky Lake-E CHA Registers (rev 04)' +- bus: '16' + dev: 0a + fn: '0' + id: 208d + name: 'System peripheral: Intel Corporation Sky Lake-E CHA Registers (rev 04)' +- bus: '16' + dev: 0a + fn: '1' + id: 208d + name: 'System peripheral: Intel Corporation Sky Lake-E CHA Registers (rev 04)' +- bus: '16' + dev: 0e + fn: '0' + id: 208e + name: 'System peripheral: Intel Corporation Sky Lake-E CHA Registers (rev 04)' +- bus: '16' + dev: 0e + fn: '1' + id: 208e + name: 'System peripheral: Intel Corporation Sky Lake-E CHA Registers (rev 04)' +- bus: '16' + dev: 0e + fn: '2' + id: 208e + name: 'System peripheral: Intel Corporation Sky Lake-E CHA Registers (rev 04)' +- bus: '16' + dev: 0e + fn: '3' + id: 208e + name: 'System peripheral: Intel Corporation Sky Lake-E CHA Registers (rev 04)' +- bus: '16' + dev: 0e + fn: '4' + id: 208e + name: 'System peripheral: Intel Corporation Sky Lake-E CHA Registers (rev 04)' +- bus: '16' + dev: 0e + fn: '5' + id: 208e + name: 'System peripheral: Intel Corporation Sky Lake-E CHA Registers (rev 04)' +- bus: '16' + dev: 0e + fn: '6' + id: 208e + name: 'System peripheral: Intel Corporation Sky Lake-E CHA Registers (rev 04)' +- bus: '16' + dev: 0e + fn: '7' + id: 208e + name: 'System peripheral: Intel Corporation Sky Lake-E CHA Registers (rev 04)' +- bus: '16' + dev: 0f + fn: '0' + id: 208e + name: 'System peripheral: Intel Corporation Sky Lake-E CHA Registers (rev 04)' +- bus: '16' + dev: 0f + fn: '1' + id: 208e + name: 'System peripheral: Intel Corporation Sky Lake-E CHA Registers (rev 04)' +- bus: '16' + dev: 0f + fn: '2' + id: 208e + name: 'System peripheral: Intel Corporation Sky Lake-E CHA Registers (rev 04)' +- bus: '16' + dev: 0f + fn: '3' + id: 208e + name: 'System peripheral: Intel Corporation Sky Lake-E CHA Registers (rev 04)' +- bus: '16' + dev: 0f + fn: '4' + id: 208e + name: 'System peripheral: Intel Corporation Sky Lake-E CHA Registers (rev 04)' +- bus: '16' + dev: 0f + fn: '5' + id: 208e + name: 'System peripheral: Intel Corporation Sky Lake-E CHA Registers (rev 04)' +- bus: '16' + dev: 0f + fn: '6' + id: 208e + name: 'System peripheral: Intel Corporation Sky Lake-E CHA Registers (rev 04)' +- bus: '16' + dev: 0f + fn: '7' + id: 208e + name: 'System peripheral: Intel Corporation Sky Lake-E CHA Registers (rev 04)' +- bus: '16' + dev: '10' + fn: '0' + id: 208e + name: 'System peripheral: Intel Corporation Sky Lake-E CHA Registers (rev 04)' +- bus: '16' + dev: '10' + fn: '1' + id: 208e + name: 'System peripheral: Intel Corporation Sky Lake-E CHA Registers (rev 04)' +- bus: '16' + dev: 1d + fn: '0' + id: '2054' + name: 'System peripheral: Intel Corporation Sky Lake-E CHA Registers (rev 04)' +- bus: '16' + dev: 1d + fn: '1' + id: '2055' + name: 'System peripheral: Intel Corporation Sky Lake-E CHA Registers (rev 04)' +- bus: '16' + dev: 1d + fn: '2' + id: '2056' + name: 'System peripheral: Intel Corporation Sky Lake-E CHA Registers (rev 04)' +- bus: '16' + dev: 1d + fn: '3' + id: '2057' + name: 'System peripheral: Intel Corporation Sky Lake-E CHA Registers (rev 04)' +- bus: '16' + dev: 1e + fn: '0' + id: '2080' + name: 'System peripheral: Intel Corporation Sky Lake-E PCU Registers (rev 04)' +- bus: '16' + dev: 1e + fn: '1' + id: '2081' + name: 'System peripheral: Intel Corporation Sky Lake-E PCU Registers (rev 04)' +- bus: '16' + dev: 1e + fn: '2' + id: '2082' + name: 'System peripheral: Intel Corporation Sky Lake-E PCU Registers (rev 04)' +- bus: '16' + dev: 1e + fn: '3' + id: '2083' + name: 'System peripheral: Intel Corporation Sky Lake-E PCU Registers (rev 04)' +- bus: '16' + dev: 1e + fn: '4' + id: '2084' + name: 'System peripheral: Intel Corporation Sky Lake-E PCU Registers (rev 04)' +- bus: '16' + dev: 1e + fn: '5' + id: '2085' + name: 'System peripheral: Intel Corporation Sky Lake-E PCU Registers (rev 04)' +- bus: '16' + dev: 1e + fn: '6' + id: '2086' + name: 'System peripheral: Intel Corporation Sky Lake-E PCU Registers (rev 04)' +- bus: '17' + dev: '00' + fn: '0' + id: b780 + name: 'Ethernet controller: Broadcom Inc. and subsidiaries Device b780 (rev 01)' +- bus: '64' + dev: '00' + fn: '0' + id: '2030' + name: 'PCI bridge: Intel Corporation Sky Lake-E PCI Express Root Port A (rev 04)' +- bus: '64' + dev: '01' + fn: '0' + id: '2031' + name: 'PCI bridge: Intel Corporation Sky Lake-E PCI Express Root Port B (rev 04)' +- bus: '64' + dev: '02' + fn: '0' + id: '2032' + name: 'PCI bridge: Intel Corporation Sky Lake-E PCI Express Root Port C (rev 04)' +- bus: '64' + dev: '03' + fn: '0' + id: '2033' + name: 'PCI bridge: Intel Corporation Sky Lake-E PCI Express Root Port D (rev 04)' +- bus: '64' + dev: '05' + fn: '0' + id: '2034' + name: 'System peripheral: Intel Corporation Sky Lake-E VT-d (rev 04)' +- bus: '64' + dev: '05' + fn: '2' + id: '2035' + name: 'System peripheral: Intel Corporation Sky Lake-E RAS Configuration Registers + (rev 04)' +- bus: '64' + dev: '05' + fn: '4' + id: '2036' + name: 'PIC: Intel Corporation Sky Lake-E IOxAPIC Configuration Registers (rev 04)' +- bus: '64' + dev: 08 + fn: '0' + id: '2066' + name: 'System peripheral: Intel Corporation Sky Lake-E Integrated Memory Controller + (rev 04)' +- bus: '64' + dev: 09 + fn: '0' + id: '2066' + name: 'System peripheral: Intel Corporation Sky Lake-E Integrated Memory Controller + (rev 04)' +- bus: '64' + dev: 0a + fn: '0' + id: '2040' + name: 'System peripheral: Intel Corporation Sky Lake-E Integrated Memory Controller + (rev 04)' +- bus: '64' + dev: 0a + fn: '1' + id: '2041' + name: 'System peripheral: Intel Corporation Sky Lake-E Integrated Memory Controller + (rev 04)' +- bus: '64' + dev: 0a + fn: '2' + id: '2042' + name: 'System peripheral: Intel Corporation Sky Lake-E Integrated Memory Controller + (rev 04)' +- bus: '64' + dev: 0a + fn: '3' + id: '2043' + name: 'System peripheral: Intel Corporation Sky Lake-E Integrated Memory Controller + (rev 04)' +- bus: '64' + dev: 0a + fn: '4' + id: '2044' + name: 'System peripheral: Intel Corporation Sky Lake-E Integrated Memory Controller + (rev 04)' +- bus: '64' + dev: 0a + fn: '5' + id: '2045' + name: 'System peripheral: Intel Corporation Sky Lake-E LM Channel 1 (rev 04)' +- bus: '64' + dev: 0a + fn: '6' + id: '2046' + name: 'System peripheral: Intel Corporation Sky Lake-E LMS Channel 1 (rev 04)' +- bus: '64' + dev: 0a + fn: '7' + id: '2047' + name: 'System peripheral: Intel Corporation Sky Lake-E LMDP Channel 1 (rev 04)' +- bus: '64' + dev: 0b + fn: '0' + id: '2048' + name: 'System peripheral: Intel Corporation Sky Lake-E DECS Channel 2 (rev 04)' +- bus: '64' + dev: 0b + fn: '1' + id: '2049' + name: 'System peripheral: Intel Corporation Sky Lake-E LM Channel 2 (rev 04)' +- bus: '64' + dev: 0b + fn: '2' + id: 204a + name: 'System peripheral: Intel Corporation Sky Lake-E LMS Channel 2 (rev 04)' +- bus: '64' + dev: 0b + fn: '3' + id: 204b + name: 'System peripheral: Intel Corporation Sky Lake-E LMDP Channel 2 (rev 04)' +- bus: '64' + dev: 0c + fn: '0' + id: '2040' + name: 'System peripheral: Intel Corporation Sky Lake-E Integrated Memory Controller + (rev 04)' +- bus: '64' + dev: 0c + fn: '1' + id: '2041' + name: 'System peripheral: Intel Corporation Sky Lake-E Integrated Memory Controller + (rev 04)' +- bus: '64' + dev: 0c + fn: '2' + id: '2042' + name: 'System peripheral: Intel Corporation Sky Lake-E Integrated Memory Controller + (rev 04)' +- bus: '64' + dev: 0c + fn: '3' + id: '2043' + name: 'System peripheral: Intel Corporation Sky Lake-E Integrated Memory Controller + (rev 04)' +- bus: '64' + dev: 0c + fn: '4' + id: '2044' + name: 'System peripheral: Intel Corporation Sky Lake-E Integrated Memory Controller + (rev 04)' +- bus: '64' + dev: 0c + fn: '5' + id: '2045' + name: 'System peripheral: Intel Corporation Sky Lake-E LM Channel 1 (rev 04)' +- bus: '64' + dev: 0c + fn: '6' + id: '2046' + name: 'System peripheral: Intel Corporation Sky Lake-E LMS Channel 1 (rev 04)' +- bus: '64' + dev: 0c + fn: '7' + id: '2047' + name: 'System peripheral: Intel Corporation Sky Lake-E LMDP Channel 1 (rev 04)' +- bus: '64' + dev: 0d + fn: '0' + id: '2048' + name: 'System peripheral: Intel Corporation Sky Lake-E DECS Channel 2 (rev 04)' +- bus: '64' + dev: 0d + fn: '1' + id: '2049' + name: 'System peripheral: Intel Corporation Sky Lake-E LM Channel 2 (rev 04)' +- bus: '64' + dev: 0d + fn: '2' + id: 204a + name: 'System peripheral: Intel Corporation Sky Lake-E LMS Channel 2 (rev 04)' +- bus: '64' + dev: 0d + fn: '3' + id: 204b + name: 'System peripheral: Intel Corporation Sky Lake-E LMDP Channel 2 (rev 04)' +- bus: b2 + dev: '00' + fn: '0' + id: '2030' + name: 'PCI bridge: Intel Corporation Sky Lake-E PCI Express Root Port A (rev 04)' +- bus: b2 + dev: '05' + fn: '0' + id: '2034' + name: 'System peripheral: Intel Corporation Sky Lake-E VT-d (rev 04)' +- bus: b2 + dev: '05' + fn: '2' + id: '2035' + name: 'System peripheral: Intel Corporation Sky Lake-E RAS Configuration Registers + (rev 04)' +- bus: b2 + dev: '05' + fn: '4' + id: '2036' + name: 'PIC: Intel Corporation Sky Lake-E IOxAPIC Configuration Registers (rev 04)' +- bus: b2 + dev: '12' + fn: '0' + id: 204c + name: 'Performance counters: Intel Corporation Sky Lake-E M3KTI Registers (rev 04)' +- bus: b2 + dev: '12' + fn: '1' + id: 204d + name: 'Performance counters: Intel Corporation Sky Lake-E M3KTI Registers (rev 04)' +- bus: b2 + dev: '12' + fn: '2' + id: 204e + name: 'System peripheral: Intel Corporation Sky Lake-E M3KTI Registers (rev 04)' +- bus: b2 + dev: '15' + fn: '0' + id: '2018' + name: 'System peripheral: Intel Corporation Sky Lake-E M2PCI Registers (rev 04)' +- bus: b2 + dev: '16' + fn: '0' + id: '2018' + name: 'System peripheral: Intel Corporation Sky Lake-E M2PCI Registers (rev 04)' +- bus: b2 + dev: '16' + fn: '4' + id: '2018' + name: 'System peripheral: Intel Corporation Sky Lake-E M2PCI Registers (rev 04)' +- bus: b2 + dev: '17' + fn: '0' + id: '2018' + name: 'System peripheral: Intel Corporation Sky Lake-E M2PCI Registers (rev 04)' +- bus: b3 + dev: '00' + fn: '0' + id: 37c0 + name: 'PCI bridge: Intel Corporation Device 37c0 (rev 04)' +- bus: b4 + dev: '02' + fn: '0' + id: 37c4 + name: 'PCI bridge: Intel Corporation Device 37c4 (rev 04)' +- bus: b4 + dev: '03' + fn: '0' + id: 37c5 + name: 'PCI bridge: Intel Corporation Device 37c5 (rev 04)' +- bus: b5 + dev: '00' + fn: '0' + id: 37c8 + name: 'Co-processor: Intel Corporation C62x Chipset QuickAssist Technology (rev + 04)' +- bus: b6 + dev: '00' + fn: '0' + id: 37d3 + name: 'Ethernet controller: Intel Corporation Ethernet Connection X722 for 10GbE + SFP+ (rev 04)' +- bus: b6 + dev: '00' + fn: '1' + id: 37d3 + name: 'Ethernet controller: Intel Corporation Ethernet Connection X722 for 10GbE + SFP+ (rev 04)' +- bus: b6 + dev: '00' + fn: '2' + id: 37ce + name: 'Ethernet controller: Intel Corporation Ethernet Connection X722 for 10GbE + backplane (rev 04)' +- bus: b6 + dev: '00' + fn: '3' + id: 37ce + name: 'Ethernet controller: Intel Corporation Ethernet Connection X722 for 10GbE + backplane (rev 04)' diff --git a/device/ufispace/x86_64-ufispace_s9301_32db-r0/pddf/pd-plugin.json b/device/ufispace/x86_64-ufispace_s9301_32db-r0/pddf/pd-plugin.json new file mode 100644 index 0000000000..76096d82e3 --- /dev/null +++ b/device/ufispace/x86_64-ufispace_s9301_32db-r0/pddf/pd-plugin.json @@ -0,0 +1,86 @@ +{ + + "XCVR": + { + "xcvr_present": + { + "i2c": + { + "valmap-QSFP28": {"1":true, "0":false }, + "valmap-QSFP-DD": {"1":true, "0":false} + } + + }, + "plug_status": + { + "inserted": "1", + "removed": "0" + } + }, + "PSU": + { + "psu_present": + { + "i2c": + { + "valmap": { "1":true, "0":false } + }, + "bmc": + { + "valmap": { "Device Present":true, "Device Absent":false } + } + }, + + "psu_power_good": + { + "i2c": + { + "valmap": { "1": true, "0":false } + }, + "bmc": + { + "valmap": { "State Asserted":true, "State Deasserted":false } + } + }, + + "psu_fan_dir": + { + "i2c": + { + "valmap": { "F2B":"EXHAUST", "B2F":"INTAKE" } + } + }, + "DEFAULT_TYPE": "AC", + "PSU_FAN_MAX_SPEED":"30000" + }, + + "FAN": + { + "direction": + { + "bmc": + { + "valmap": {"0": "UNKNOW", "1":"INTAKE", "2":"EXHAUST"} + } + }, + + "present": + { + "i2c": + { + "valmap": {"1":true, "0":false} + }, + "bmc": + { + "valmap": { "0x0280|":true, "0x0180|":false } + } + }, + "FAN_R_MAX_SPEED":"32000", + "FAN_F_MAX_SPEED":"36200" + }, + + "REBOOT_CAUSE": + { + "reboot_cause_file": "/host/reboot-cause/reboot-cause.txt" + } +} diff --git a/device/ufispace/x86_64-ufispace_s9301_32db-r0/pddf/pddf-device.json b/device/ufispace/x86_64-ufispace_s9301_32db-r0/pddf/pddf-device.json new file mode 100644 index 0000000000..1abc66b386 --- /dev/null +++ b/device/ufispace/x86_64-ufispace_s9301_32db-r0/pddf/pddf-device.json @@ -0,0 +1,4932 @@ +{ + "PLATFORM": { + "num_psus": 2, + "num_fantrays": 6, + "num_fans_pertray": 2, + "num_ports": 32, + "num_temps": 7, + "pddf_dev_types": { + "description": "PDDF supported devices", + "CPLD": [ + "i2c_cpld" + ], + "PSU": [ + "psu_eeprom", + "psu_pmbus" + ], + "PORT_MODULE": [ + "pddf_xcvr" + ] + }, + "std_perm_kos": [ + "igb", + "i40e" + ], + "std_kos": [ + "i2c_i801", + "i2c_dev", + "i2c_mux_pca954x", + "optoe", + "lm75", + "gpio-pca953x" + ], + "pddf_kos": [ + "pddf_client_module", + "pddf_cpld_module", + "pddf_cpld_driver", + "pddf_mux_module", + "pddf_xcvr_module", + "pddf_xcvr_driver_module", + "pddf_psu_driver_module", + "pddf_psu_module", + "pddf_fan_driver_module", + "pddf_fan_module", + "pddf_led_module", + "pddf_gpio_module" + ], + "custom_kos": [ + "x86-64-ufispace-s9301-32db-lpc", + "x86-64-ufispace-s9301-32db-sys-eeprom", + "pddf_custom_sysstatus_module" + ] + }, + "SYSTEM": { + "dev_info": { + "device_type": "CPU", + "device_name": "ROOT_COMPLEX", + "device_parent": null + }, + "i2c": { + "CONTROLLERS": [ + { + "dev_name": "i2c-0", + "dev": "SMBUS0" + } + ] + } + }, + "SMBUS0": { + "dev_info": { + "device_type": "SMBUS", + "device_name": "SMBUS0", + "device_parent": "SYSTEM" + }, + "i2c": { + "topo_info": { + "dev_addr": "0x0" + }, + "DEVICES": [ + { + "dev": "EEPROM1" + }, + { + "dev": "MUX1" + }, + { + "dev": "MUX2" + }, + { + "dev": "GPIO1" + } + ] + } + }, + "EEPROM1": { + "dev_info": { + "device_type": "EEPROM", + "device_name": "EEPROM1", + "device_parent": "SMBUS0" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x0", + "dev_addr": "0x57", + "dev_type": "sys_eeprom" + }, + "dev_attr": { + "access_mode": "BLOCK" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "TEMP1": { + "dev_info": { + "device_type": "TEMP_SENSOR", + "device_name": "TEMP1", + "device_parent": "SMBUS0" + }, + "dev_attr": { + "display_name": "Temp_CPU_PECI" + }, + "bmc": { + "ipmitool": { + "attr_list": [ + { + "attr_name": "temp1_input", + "bmc_cmd": "ipmitool sensor", + "raw": "0", + "field_name": "TEMP_CPU_PECI", + "field_pos": "3" + }, + { + "attr_name": "temp1_high_crit_threshold", + "bmc_cmd": "ipmitool sensor", + "raw": "0", + "field_name": "TEMP_CPU_PECI", + "field_pos": "20" + }, + { + "attr_name": "temp1_high_threshold", + "bmc_cmd": "ipmitool sensor", + "raw": "0", + "field_name": "TEMP_CPU_PECI", + "field_pos": "18" + }, + { + "attr_name": "temp1_low_threshold", + "bmc_cmd": "ipmitool sensor", + "raw": "0", + "field_name": "TEMP_CPU_PECI", + "field_pos": "16" + } + ] + } + } + }, + "TEMP2": { + "dev_info": { + "device_type": "TEMP_SENSOR", + "device_name": "TEMP2", + "device_parent": "SMBUS0" + }, + "dev_attr": { + "display_name": "Temp_CPU_ENV" + }, + "bmc": { + "ipmitool": { + "attr_list": [ + { + "attr_name": "temp1_input", + "bmc_cmd": "ipmitool sensor", + "raw": "0", + "field_name": "TEMP_CPU_ENV", + "field_pos": "3" + }, + { + "attr_name": "temp1_high_crit_threshold", + "bmc_cmd": "ipmitool sensor", + "raw": "0", + "field_name": "TEMP_CPU_ENV", + "field_pos": "20" + }, + { + "attr_name": "temp1_high_threshold", + "bmc_cmd": "ipmitool sensor", + "raw": "0", + "field_name": "TEMP_CPU_ENV", + "field_pos": "18" + }, + { + "attr_name": "temp1_low_threshold", + "bmc_cmd": "ipmitool sensor", + "raw": "0", + "field_name": "TEMP_CPU_ENV", + "field_pos": "16" + } + ] + } + } + }, + "TEMP3": { + "dev_info": { + "device_type": "TEMP_SENSOR", + "device_name": "TEMP3", + "device_parent": "SMBUS0" + }, + "dev_attr": { + "display_name": "Temp_CPU_ENV2" + }, + "bmc": { + "ipmitool": { + "attr_list": [ + { + "attr_name": "temp1_input", + "bmc_cmd": "ipmitool sensor", + "raw": "0", + "field_name": "TEMP_CPU_ENV_2", + "field_pos": "3" + }, + { + "attr_name": "temp1_high_crit_threshold", + "bmc_cmd": "ipmitool sensor", + "raw": "0", + "field_name": "TEMP_CPU_ENV_2", + "field_pos": "20" + }, + { + "attr_name": "temp1_high_threshold", + "bmc_cmd": "ipmitool sensor", + "raw": "0", + "field_name": "TEMP_CPU_ENV_2", + "field_pos": "18" + }, + { + "attr_name": "temp1_low_threshold", + "bmc_cmd": "ipmitool sensor", + "raw": "0", + "field_name": "TEMP_CPU_ENV_2", + "field_pos": "16" + } + ] + } + } + }, + "TEMP4": { + "dev_info": { + "device_type": "TEMP_SENSOR", + "device_name": "TEMP4", + "device_parent": "SMBUS0" + }, + "dev_attr": { + "display_name": "Temp_MAC_ENV" + }, + "bmc": { + "ipmitool": { + "attr_list": [ + { + "attr_name": "temp1_input", + "bmc_cmd": "ipmitool sensor", + "raw": "0", + "field_name": "TEMP_MAC_ENV", + "field_pos": "3" + }, + { + "attr_name": "temp1_high_crit_threshold", + "bmc_cmd": "ipmitool sensor", + "raw": "0", + "field_name": "TEMP_MAC_ENV", + "field_pos": "20" + }, + { + "attr_name": "temp1_high_threshold", + "bmc_cmd": "ipmitool sensor", + "raw": "0", + "field_name": "TEMP_MAC_ENV", + "field_pos": "18" + }, + { + "attr_name": "temp1_low_threshold", + "bmc_cmd": "ipmitool sensor", + "raw": "0", + "field_name": "TEMP_MAC_ENV", + "field_pos": "16" + } + ] + } + } + }, + "TEMP5": { + "dev_info": { + "device_type": "TEMP_SENSOR", + "device_name": "TEMP5", + "device_parent": "SMBUS0" + }, + "dev_attr": { + "display_name": "Temp_MAC_DIE" + }, + "bmc": { + "ipmitool": { + "attr_list": [ + { + "attr_name": "temp1_input", + "bmc_cmd": "ipmitool sensor", + "raw": "0", + "field_name": "TEMP_MAC_DIE", + "field_pos": "3" + }, + { + "attr_name": "temp1_high_crit_threshold", + "bmc_cmd": "ipmitool sensor", + "raw": "0", + "field_name": "TEMP_MAC_DIE", + "field_pos": "20" + }, + { + "attr_name": "temp1_high_threshold", + "bmc_cmd": "ipmitool sensor", + "raw": "0", + "field_name": "TEMP_MAC_DIE", + "field_pos": "18" + }, + { + "attr_name": "temp1_low_threshold", + "bmc_cmd": "ipmitool sensor", + "raw": "0", + "field_name": "TEMP_MAC_DIE", + "field_pos": "16" + } + ] + } + } + }, + "TEMP6": { + "dev_info": { + "device_type": "TEMP_SENSOR", + "device_name": "TEMP6", + "device_parent": "SMBUS0" + }, + "dev_attr": { + "display_name": "Temp_CAGE" + }, + "bmc": { + "ipmitool": { + "attr_list": [ + { + "attr_name": "temp1_input", + "bmc_cmd": "ipmitool sensor", + "raw": "0", + "field_name": "TEMP_CAGE", + "field_pos": "3" + }, + { + "attr_name": "temp1_high_crit_threshold", + "bmc_cmd": "ipmitool sensor", + "raw": "0", + "field_name": "TEMP_CAGE", + "field_pos": "20" + }, + { + "attr_name": "temp1_high_threshold", + "bmc_cmd": "ipmitool sensor", + "raw": "0", + "field_name": "TEMP_CAGE", + "field_pos": "18" + }, + { + "attr_name": "temp1_low_threshold", + "bmc_cmd": "ipmitool sensor", + "raw": "0", + "field_name": "TEMP_CAGE", + "field_pos": "16" + } + ] + } + } + }, + "TEMP7": { + "dev_info": { + "device_type": "TEMP_SENSOR", + "device_name": "TEMP7", + "device_parent": "SMBUS0" + }, + "dev_attr": { + "display_name": "Temp_PSU_CONNTOR" + }, + "bmc": { + "ipmitool": { + "attr_list": [ + { + "attr_name": "temp1_input", + "bmc_cmd": "ipmitool sensor", + "raw": "0", + "field_name": "TEMP_PSU_CONN", + "field_pos": "3" + }, + { + "attr_name": "temp1_high_crit_threshold", + "bmc_cmd": "ipmitool sensor", + "raw": "0", + "field_name": "TEMP_PSU_CONN", + "field_pos": "20" + }, + { + "attr_name": "temp1_high_threshold", + "bmc_cmd": "ipmitool sensor", + "raw": "0", + "field_name": "TEMP_PSU_CONN", + "field_pos": "18" + }, + { + "attr_name": "temp1_low_threshold", + "bmc_cmd": "ipmitool sensor", + "raw": "0", + "field_name": "TEMP_PSU_CONN", + "field_pos": "16" + } + ] + } + } + }, + "MUX1": { + "dev_info": { + "device_type": "MUX", + "device_name": "MUX1", + "device_parent": "SMBUS0" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x0", + "dev_addr": "0x73", + "dev_type": "pca9548" + }, + "dev_attr": { + "virt_bus": "0x1", + "idle_state": "-2" + }, + "channel": [ + { + "chn": "1", + "dev": "CPLD1" + }, + { + "chn": "1", + "dev": "CPLD2" + }, + { + "chn": "1", + "dev": "CPLD3" + }, + { + "chn": "4", + "dev": "GPIO2" + } + ] + } + }, + "MUX2": { + "dev_info": { + "device_type": "MUX", + "device_name": "MUX2", + "device_parent": "SMBUS0" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x0", + "dev_addr": "0x72", + "dev_type": "pca9548" + }, + "dev_attr": { + "virt_bus": "0x9", + "idle_state": "-2" + }, + "channel": [ + { + "chn": "0", + "dev": "MUX3" + }, + { + "chn": "1", + "dev": "MUX4" + }, + { + "chn": "2", + "dev": "MUX5" + }, + { + "chn": "3", + "dev": "MUX6" + } + ] + } + }, + "MUX3": { + "dev_info": { + "device_type": "MUX", + "device_name": "MUX3", + "device_parent": "MUX2" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x9", + "dev_addr": "0x76", + "dev_type": "pca9548" + }, + "dev_attr": { + "virt_bus": "0x11", + "idle_state": "-2" + }, + "channel": [ + { + "chn": "0", + "dev": "PORT1" + }, + { + "chn": "1", + "dev": "PORT2" + }, + { + "chn": "2", + "dev": "PORT3" + }, + { + "chn": "3", + "dev": "PORT4" + }, + { + "chn": "4", + "dev": "PORT5" + }, + { + "chn": "5", + "dev": "PORT6" + }, + { + "chn": "6", + "dev": "PORT7" + }, + { + "chn": "7", + "dev": "PORT8" + } + ] + } + }, + "MUX4": { + "dev_info": { + "device_type": "MUX", + "device_name": "MUX4", + "device_parent": "MUX2" + }, + "i2c": { + "topo_info": { + "parent_bus": "0xa", + "dev_addr": "0x76", + "dev_type": "pca9548" + }, + "dev_attr": { + "virt_bus": "0x19", + "idle_state": "-2" + }, + "channel": [ + { + "chn": "0", + "dev": "PORT9" + }, + { + "chn": "1", + "dev": "PORT10" + }, + { + "chn": "2", + "dev": "PORT11" + }, + { + "chn": "3", + "dev": "PORT12" + }, + { + "chn": "4", + "dev": "PORT13" + }, + { + "chn": "5", + "dev": "PORT14" + }, + { + "chn": "6", + "dev": "PORT15" + }, + { + "chn": "7", + "dev": "PORT16" + } + ] + } + }, + "MUX5": { + "dev_info": { + "device_type": "MUX", + "device_name": "MUX5", + "device_parent": "MUX2" + }, + "i2c": { + "topo_info": { + "parent_bus": "0xb", + "dev_addr": "0x76", + "dev_type": "pca9548" + }, + "dev_attr": { + "virt_bus": "0x21", + "idle_state": "-2" + }, + "channel": [ + { + "chn": "0", + "dev": "PORT17" + }, + { + "chn": "1", + "dev": "PORT18" + }, + { + "chn": "2", + "dev": "PORT19" + }, + { + "chn": "3", + "dev": "PORT20" + }, + { + "chn": "4", + "dev": "PORT21" + }, + { + "chn": "5", + "dev": "PORT22" + }, + { + "chn": "6", + "dev": "PORT23" + }, + { + "chn": "7", + "dev": "PORT24" + } + ] + } + }, + "MUX6": { + "dev_info": { + "device_type": "MUX", + "device_name": "MUX6", + "device_parent": "MUX2" + }, + "i2c": { + "topo_info": { + "parent_bus": "0xc", + "dev_addr": "0x76", + "dev_type": "pca9548" + }, + "dev_attr": { + "virt_bus": "0x29", + "idle_state": "-2" + }, + "channel": [ + { + "chn": "0", + "dev": "PORT25" + }, + { + "chn": "1", + "dev": "PORT26" + }, + { + "chn": "2", + "dev": "PORT27" + }, + { + "chn": "3", + "dev": "PORT28" + }, + { + "chn": "4", + "dev": "PORT29" + }, + { + "chn": "5", + "dev": "PORT30" + }, + { + "chn": "6", + "dev": "PORT31" + }, + { + "chn": "7", + "dev": "PORT32" + } + ] + } + }, + "GPIO1": { + "dev_info": { + "device_type": "GPIO", + "device_name": "GPIO1", + "device_parent": "SMBUS0" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x0", + "dev_addr": "0x77", + "dev_type": "pca9539" + }, + "dev_attr": { + "gpio_base": "0x1f0" + }, + "ports": [ + { + "port_num": "0", + "direction": "in", + "value": "", + "edge": "", + "active_low": "" + }, + { + "port_num": "1", + "direction": "in", + "value": "", + "edge": "", + "active_low": "" + }, + { + "port_num": "2", + "direction": "in", + "value": "", + "edge": "", + "active_low": "" + }, + { + "port_num": "3", + "direction": "in", + "value": "", + "edge": "", + "active_low": "" + }, + { + "port_num": "4", + "direction": "in", + "value": "", + "edge": "", + "active_low": "" + }, + { + "port_num": "5", + "direction": "in", + "value": "", + "edge": "", + "active_low": "" + }, + { + "port_num": "6", + "direction": "in", + "value": "", + "edge": "", + "active_low": "" + }, + { + "port_num": "7", + "direction": "in", + "value": "", + "edge": "", + "active_low": "" + }, + { + "port_num": "8", + "direction": "in", + "value": "", + "edge": "", + "active_low": "" + }, + { + "port_num": "9", + "direction": "in", + "value": "", + "edge": "", + "active_low": "" + }, + { + "port_num": "10", + "direction": "in", + "value": "", + "edge": "", + "active_low": "" + }, + { + "port_num": "11", + "direction": "in", + "value": "", + "edge": "", + "active_low": "" + }, + { + "port_num": "12", + "direction": "in", + "value": "", + "edge": "", + "active_low": "" + }, + { + "port_num": "13", + "direction": "in", + "value": "", + "edge": "", + "active_low": "" + }, + { + "port_num": "14", + "direction": "in", + "value": "", + "edge": "", + "active_low": "" + }, + { + "port_num": "15", + "direction": "in", + "value": "", + "edge": "", + "active_low": "" + } + ] + } + }, + "GPIO2": { + "dev_info": { + "device_type": "GPIO", + "device_name": "GPIO2", + "device_parent": "MUX1" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x6", + "dev_addr": "0x76", + "dev_type": "pca9539" + }, + "dev_attr": { + "gpio_base": "0x1e0" + }, + "ports": [ + { + "port_num": "0", + "direction": "in", + "value": "", + "edge": "", + "active_low": "" + }, + { + "port_num": "1", + "direction": "in", + "value": "", + "edge": "", + "active_low": "" + }, + { + "port_num": "2", + "direction": "in", + "value": "", + "edge": "", + "active_low": "" + }, + { + "port_num": "3", + "direction": "in", + "value": "", + "edge": "", + "active_low": "" + }, + { + "port_num": "4", + "direction": "in", + "value": "", + "edge": "", + "active_low": "" + }, + { + "port_num": "5", + "direction": "in", + "value": "", + "edge": "", + "active_low": "" + }, + { + "port_num": "6", + "direction": "in", + "value": "", + "edge": "", + "active_low": "" + }, + { + "port_num": "7", + "direction": "in", + "value": "", + "edge": "", + "active_low": "" + }, + { + "port_num": "8", + "direction": "in", + "value": "", + "edge": "", + "active_low": "" + }, + { + "port_num": "9", + "direction": "in", + "value": "", + "edge": "", + "active_low": "" + }, + { + "port_num": "10", + "direction": "in", + "value": "", + "edge": "", + "active_low": "" + }, + { + "port_num": "11", + "direction": "in", + "value": "", + "edge": "", + "active_low": "" + }, + { + "port_num": "12", + "direction": "in", + "value": "", + "edge": "", + "active_low": "" + }, + { + "port_num": "13", + "direction": "in", + "value": "", + "edge": "", + "active_low": "" + }, + { + "port_num": "14", + "direction": "in", + "value": "", + "edge": "", + "active_low": "" + }, + { + "port_num": "15", + "direction": "in", + "value": "", + "edge": "", + "active_low": "" + } + ] + } + }, + "CPLD1": { + "dev_info": { + "device_type": "CPLD", + "device_name": "CPLD1", + "device_parent": "MUX1" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x2", + "dev_addr": "0x30", + "dev_type": "i2c_cpld" + }, + "dev_attr": {} + } + }, + "CPLD2": { + "dev_info": { + "device_type": "CPLD", + "device_name": "CPLD2", + "device_parent": "MUX1" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x2", + "dev_addr": "0x31", + "dev_type": "i2c_cpld" + }, + "dev_attr": {} + } + }, + "CPLD3": { + "dev_info": { + "device_type": "CPLD", + "device_name": "CPLD3", + "device_parent": "MUX1" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x2", + "dev_addr": "0x32", + "dev_type": "i2c_cpld" + }, + "dev_attr": {} + } + }, + "SYSSTATUS": { + "dev_info": { + "device_type": "SYSSTAT", + "device_name": "SYSSTATUS" + }, + "dev_attr": {}, + "attr_list": [ + { + "attr_name": "board_info", + "attr_devaddr": "0x30", + "attr_offset": "0x0", + "attr_mask": "0xff", + "attr_len": "0x1" + }, + { + "attr_name": "cpld1_version", + "attr_devaddr": "0x30", + "attr_offset": "0x2", + "attr_mask": "0xff", + "attr_len": "0x1" + }, + { + "attr_name": "cpld2_version", + "attr_devaddr": "0x31", + "attr_offset": "0x2", + "attr_mask": "0xff", + "attr_len": "0x1" + }, + { + "attr_name": "cpld3_version", + "attr_devaddr": "0x32", + "attr_offset": "0x2", + "attr_mask": "0xff", + "attr_len": "0x1" + }, + { + "attr_name": "mac_reset", + "attr_devaddr": "0x30", + "attr_offset": "0x40", + "attr_mask": "0xff", + "attr_len": "0x1" + }, + { + "attr_name": "mux_reset", + "attr_devaddr": "0x30", + "attr_offset": "0x46", + "attr_mask": "0xff", + "attr_len": "0x1" + }, + { + "attr_name": "psu_status", + "attr_devaddr": "0x30", + "attr_offset": "0x51", + "attr_mask": "0xff", + "attr_len": "0x1" + }, + { + "attr_name": "system_led_0", + "attr_devaddr": "0x30", + "attr_offset": "0x80", + "attr_mask": "0xff", + "attr_len": "0x1" + }, + { + "attr_name": "system_led_1", + "attr_devaddr": "0x30", + "attr_offset": "0x81", + "attr_mask": "0xff", + "attr_len": "0x1" + }, + { + "attr_name": "beacon_led", + "attr_devaddr": "0x30", + "attr_offset": "0x84", + "attr_mask": "0xff", + "attr_len": "0x1" + }, + { + "attr_name": "port_led_clr_ctrl", + "attr_devaddr": "0x30", + "attr_offset": "0x85", + "attr_mask": "0xff", + "attr_len": "0x1" + } + ] + }, + "PSU1": { + "dev_info": { + "device_type": "PSU", + "device_name": "PSU1", + "device_parent": "SMBUS0" + }, + "dev_attr": { + "dev_idx": "1", + "num_psu_fans": "1" + }, + "i2c": { + "interface": [] + }, + "bmc": { + "ipmitool": { + "attr_list": [ + { + "attr_name": "psu_present", + "bmc_cmd": "ipmitool sdr -c get PSU0_PRSNT_L | sed -e 's/,,/,N\\/A,/g' -e 's/,,/,N\\/A,/g'", + "raw": "0", + "field_name": "PSU0_PRSNT_L", + "field_pos": "5", + "separator": "," + }, + { + "attr_name": "psu_power_good", + "bmc_cmd": "ipmitool sdr -c get PSU0_PWROK_H | sed -e 's/,,/,N\\/A,/g' -e 's/,,/,N\\/A,/g'", + "raw": "0", + "field_name": "PSU0_PWROK_H", + "field_pos": "5", + "separator": "," + }, + { + "attr_name": "psu_v_out", + "bmc_cmd": "ipmitool sdr -c get PSU0_VOUT | sed -e 's/,,/,N\\/A,/g' -e 's/,,/,N\\/A,/g'", + "raw": "0", + "field_name": "PSU0_VOUT", + "field_pos": "2", + "mult": "1000", + "separator": "," + }, + { + "attr_name": "psu_i_out", + "bmc_cmd": "ipmitool sdr -c get PSU0_IOUT | sed -e 's/,,/,N\\/A,/g' -e 's/,,/,N\\/A,/g'", + "raw": "0", + "field_name": "PSU0_IOUT", + "field_pos": "2", + "mult": "1000", + "separator": "," + }, + { + "attr_name": "psu_v_in", + "bmc_cmd": "ipmitool sdr get -c PSU0_VIN | sed -e 's/,,/,N\\/A,/g' -e 's/,,/,N\\/A,/g'", + "raw": "0", + "separator": ",", + "field_name": "PSU0_VIN", + "field_pos": "2", + "mult": "1000" + }, + { + "attr_name": "psu_i_in", + "bmc_cmd": "ipmitool sdr get -c PSU0_IIN | sed -e 's/,,/,N\\/A,/g' -e 's/,,/,N\\/A,/g'", + "raw": "0", + "separator": ",", + "field_name": "PSU0_IIN", + "field_pos": "2", + "mult": "1000" + }, + { + "attr_name": "psu_temp1_input", + "bmc_cmd": "ipmitool sdr -c get PSU0_TEMP | sed -e 's/,,/,N\\/A,/g' -e 's/,,/,N\\/A,/g'", + "raw": "0", + "field_name": "PSU0_TEMP", + "field_pos": "2", + "mult": "1000", + "separator": "," + }, + { + "attr_name": "psu_fan1_speed_rpm", + "bmc_cmd": "ipmitool sdr -c get PSU0_FAN1 | sed -e 's/,,/,N\\/A,/g' -e 's/,,/,N\\/A,/g'", + "raw": "0", + "field_name": "PSU0_FAN1", + "field_pos": "2", + "separator": "," + }, + { + "attr_name": "psu_mfr_id", + "bmc_cmd": "_rv=$(ipmitool fru print 1 2>/dev/null | tr -s ' ' | cut -d' ' -f3-5 | grep 'Manufacturer') && echo $_rv || echo 'Manufacturer : N/A'", + "raw": "0", + "separator": ":", + "field_name": "Manufacturer", + "field_pos": "2" + }, + { + "attr_name": "psu_model_name", + "bmc_cmd": "_rv=$(ipmitool fru print 1 2>/dev/null | tr -s ' ' | cut -d' ' -f3-5 | grep 'Name') && echo $_rv || echo 'Name : N/A'", + "raw": "0", + "separator": ":", + "field_name": "Name", + "field_pos": "2" + }, + { + "attr_name": "psu_serial_num", + "bmc_cmd": "_rv=$(ipmitool fru print 1 2>/dev/null | tr -s ' ' | cut -d' ' -f3-5 | grep 'Serial') && echo $_rv || echo 'Serial : N/A'", + "raw": "0", + "separator": ":", + "field_name": "Serial", + "field_pos": "2" + }, + { + "attr_name": "psu_fan1_dir", + "bmc_cmd": "ipmitool raw 0x3c 0x30 0x0 | xargs | cut -d' ' -f1", + "raw": "1", + "type": "raw" + } + ] + } + } + }, + "PSU2": { + "dev_info": { + "device_type": "PSU", + "device_name": "PSU2", + "device_parent": "SMBUS0" + }, + "dev_attr": { + "dev_idx": "2", + "num_psu_fans": "1" + }, + "i2c": { + "interface": [] + }, + "bmc": { + "ipmitool": { + "attr_list": [ + { + "attr_name": "psu_present", + "bmc_cmd": "ipmitool sdr -c get PSU1_PRSNT_L | sed -e 's/,,/,N\\/A,/g' -e 's/,,/,N\\/A,/g'", + "raw": "0", + "field_name": "PSU1_PRSNT_L", + "field_pos": "5", + "separator": "," + }, + { + "attr_name": "psu_power_good", + "bmc_cmd": "ipmitool sdr -c get PSU1_PWROK_H | sed -e 's/,,/,N\\/A,/g' -e 's/,,/,N\\/A,/g'", + "raw": "0", + "field_name": "PSU1_PWROK_H", + "field_pos": "5", + "separator": "," + }, + { + "attr_name": "psu_v_out", + "bmc_cmd": "ipmitool sdr -c get PSU1_VOUT | sed -e 's/,,/,N\\/A,/g' -e 's/,,/,N\\/A,/g'", + "raw": "0", + "field_name": "PSU1_VOUT", + "field_pos": "2", + "mult": "1000", + "separator": "," + }, + { + "attr_name": "psu_i_out", + "bmc_cmd": "ipmitool sdr -c get PSU1_IOUT | sed -e 's/,,/,N\\/A,/g' -e 's/,,/,N\\/A,/g'", + "raw": "0", + "field_name": "PSU1_IOUT", + "field_pos": "2", + "mult": "1000", + "separator": "," + }, + { + "attr_name": "psu_v_in", + "bmc_cmd": "ipmitool sdr get -c PSU1_VIN | sed -e 's/,,/,N\\/A,/g' -e 's/,,/,N\\/A,/g'", + "raw": "0", + "separator": ",", + "field_name": "PSU1_VIN", + "field_pos": "2", + "mult": "1000" + }, + { + "attr_name": "psu_i_in", + "bmc_cmd": "ipmitool sdr get -c PSU1_IIN | sed -e 's/,,/,N\\/A,/g' -e 's/,,/,N\\/A,/g'", + "raw": "0", + "separator": ",", + "field_name": "PSU1_IIN", + "field_pos": "2", + "mult": "1000" + }, + { + "attr_name": "psu_temp1_input", + "bmc_cmd": "ipmitool sdr -c get PSU1_TEMP | sed -e 's/,,/,N\\/A,/g' -e 's/,,/,N\\/A,/g'", + "raw": "0", + "field_name": "PSU1_TEMP", + "field_pos": "2", + "mult": "1000", + "separator": "," + }, + { + "attr_name": "psu_fan1_speed_rpm", + "bmc_cmd": "ipmitool sdr -c get PSU1_FAN1 | sed -e 's/,,/,N\\/A,/g' -e 's/,,/,N\\/A,/g'", + "raw": "0", + "field_name": "PSU1_FAN1", + "field_pos": "2", + "separator": "," + }, + { + "attr_name": "psu_mfr_id", + "bmc_cmd": "_rv=$(ipmitool fru print 2 2>/dev/null | tr -s ' ' | cut -d' ' -f3-5 | grep 'Manufacturer') && echo $_rv || echo 'Manufacturer : N/A'", + "raw": "0", + "separator": ":", + "field_name": "Manufacturer", + "field_pos": "2" + }, + { + "attr_name": "psu_model_name", + "bmc_cmd": "_rv=$(ipmitool fru print 2 2>/dev/null | tr -s ' ' | cut -d' ' -f3-5 | grep 'Name') && echo $_rv || echo 'Name : N/A'", + "raw": "0", + "separator": ":", + "field_name": "Name", + "field_pos": "2" + }, + { + "attr_name": "psu_serial_num", + "bmc_cmd": "_rv=$(ipmitool fru print 2 2>/dev/null | tr -s ' ' | cut -d' ' -f3-5 | grep 'Serial') && echo $_rv || echo 'Serial : N/A'", + "raw": "0", + "separator": ":", + "field_name": "Serial", + "field_pos": "2" + }, + { + "attr_name": "psu_fan1_dir", + "bmc_cmd": "ipmitool raw 0x3c 0x30 0x0 | xargs | cut -d' ' -f2", + "raw": "1", + "type": "raw" + } + ] + } + } + }, + "FAN-CTRL": { + "dev_info": { + "device_type": "FAN", + "device_name": "FAN-CTRL", + "device_parent": "" + }, + "bmc": { + "ipmitool": { + "attr_list": [ + { + "attr_name": "fan1_present", + "bmc_cmd": "ipmitool sensor", + "raw": "0", + "field_name": "FAN0_PSNT_L", + "field_pos": "7" + }, + { + "attr_name": "fan2_present", + "bmc_cmd": "ipmitool sensor", + "raw": "0", + "field_name": "FAN1_PSNT_L", + "field_pos": "7" + }, + { + "attr_name": "fan3_present", + "bmc_cmd": "ipmitool sensor", + "raw": "0", + "field_name": "FAN2_PSNT_L", + "field_pos": "7" + }, + { + "attr_name": "fan4_present", + "bmc_cmd": "ipmitool sensor", + "raw": "0", + "field_name": "FAN3_PSNT_L", + "field_pos": "7" + }, + { + "attr_name": "fan5_present", + "bmc_cmd": "ipmitool sensor", + "raw": "0", + "field_name": "FAN4_PSNT_L", + "field_pos": "7" + }, + { + "attr_name": "fan6_present", + "bmc_cmd": "ipmitool sensor", + "raw": "0", + "field_name": "FAN5_PSNT_L", + "field_pos": "7" + }, + { + "attr_name": "fan1_f_speed_rpm", + "bmc_cmd": "ipmitool sensor", + "raw": "0", + "field_name": "FAN0_RPM_F", + "field_pos": "3" + }, + { + "attr_name": "fan1_r_speed_rpm", + "bmc_cmd": "ipmitool sensor", + "raw": "0", + "field_name": "FAN0_RPM_R", + "field_pos": "3" + }, + { + "attr_name": "fan2_f_speed_rpm", + "bmc_cmd": "ipmitool sensor", + "raw": "0", + "field_name": "FAN1_RPM_F", + "field_pos": "3" + }, + { + "attr_name": "fan2_r_speed_rpm", + "bmc_cmd": "ipmitool sensor", + "raw": "0", + "field_name": "FAN1_RPM_R", + "field_pos": "3" + }, + { + "attr_name": "fan3_f_speed_rpm", + "bmc_cmd": "ipmitool sensor", + "raw": "0", + "field_name": "FAN2_RPM_F", + "field_pos": "3" + }, + { + "attr_name": "fan3_r_speed_rpm", + "bmc_cmd": "ipmitool sensor", + "raw": "0", + "field_name": "FAN2_RPM_R", + "field_pos": "3" + }, + { + "attr_name": "fan4_f_speed_rpm", + "bmc_cmd": "ipmitool sensor", + "raw": "0", + "field_name": "FAN3_RPM_F", + "field_pos": "3" + }, + { + "attr_name": "fan4_r_speed_rpm", + "bmc_cmd": "ipmitool sensor", + "raw": "0", + "field_name": "FAN3_RPM_R", + "field_pos": "3" + }, + { + "attr_name": "fan5_f_speed_rpm", + "bmc_cmd": "ipmitool sensor", + "raw": "0", + "field_name": "FAN4_RPM_F", + "field_pos": "3" + }, + { + "attr_name": "fan5_r_speed_rpm", + "bmc_cmd": "ipmitool sensor", + "raw": "0", + "field_name": "FAN4_RPM_R", + "field_pos": "3" + }, + { + "attr_name": "fan6_f_speed_rpm", + "bmc_cmd": "ipmitool sensor", + "raw": "0", + "field_name": "FAN5_RPM_F", + "field_pos": "3" + }, + { + "attr_name": "fan6_r_speed_rpm", + "bmc_cmd": "ipmitool sensor", + "raw": "0", + "field_name": "FAN5_RPM_R", + "field_pos": "3" + }, + { + "attr_name": "fan1_dir", + "bmc_cmd": "ipmitool raw 0x3c 0x31 0x0 | xargs | cut -d' ' -f1", + "raw": "1", + "type": "raw" + }, + { + "attr_name": "fan2_dir", + "bmc_cmd": "ipmitool raw 0x3c 0x31 0x0 | xargs | cut -d' ' -f2", + "raw": "1", + "type": "raw" + }, + { + "attr_name": "fan3_dir", + "bmc_cmd": "ipmitool raw 0x3c 0x31 0x0 | xargs | cut -d' ' -f3", + "raw": "1", + "type": "raw" + }, + { + "attr_name": "fan4_dir", + "bmc_cmd": "ipmitool raw 0x3c 0x31 0x0 | xargs | cut -d' ' -f4", + "raw": "1", + "type": "raw" + }, + { + "attr_name": "fan5_dir", + "bmc_cmd": "ipmitool raw 0x3c 0x31 0x0 | xargs | cut -d' ' -f5", + "raw": "1", + "type": "raw" + }, + { + "attr_name": "fan6_dir", + "bmc_cmd": "ipmitool raw 0x3c 0x31 0x0 | xargs | cut -d' ' -f6", + "raw": "1", + "type": "raw" + } + ] + } + } + }, + "SYS_LED": { + "dev_info": { + "device_type": "LED", + "device_name": "SYS_LED" + }, + "dev_attr": { + "index": "0", + "flag": "ro" + }, + "i2c": { + "attr_list": [ + { + "attr_name": "green", + "bits": "7:4", + "descr": "Green", + "value": "0x09;0x0b", + "swpld_addr": "0x30", + "swpld_addr_offset": "0x80" + }, + { + "attr_name": "green_blink", + "bits": "7:4", + "descr": "Green Blinking", + "value": "0x0d;0x0f", + "swpld_addr": "0x30", + "swpld_addr_offset": "0x80" + }, + { + "attr_name": "yellow", + "bits": "7:4", + "descr": "Yellow", + "value": "0x08;0x0a", + "swpld_addr": "0x30", + "swpld_addr_offset": "0x80" + }, + { + "attr_name": "yellow_blink", + "bits": "7:4", + "descr": "Yellow Blinking", + "value": "0x0c;0x0e", + "swpld_addr": "0x30", + "swpld_addr_offset": "0x80" + }, + { + "attr_name": "off", + "bits": "7", + "descr": "Off", + "value": "0x0", + "swpld_addr": "0x30", + "swpld_addr_offset": "0x80" + } + ] + } + }, + "FAN_LED": { + "dev_info": { + "device_type": "LED", + "device_name": "FAN_LED" + }, + "dev_attr": { + "index": "0", + "flag": "ro" + }, + "i2c": { + "attr_list": [ + { + "attr_name": "green", + "bits": "3:0", + "descr": "Green", + "value": "0x09;0x0b", + "swpld_addr": "0x30", + "swpld_addr_offset": "0x80" + }, + { + "attr_name": "green_blink", + "bits": "3:0", + "descr": "Green Blinking", + "value": "0x0d;0x0f", + "swpld_addr": "0x30", + "swpld_addr_offset": "0x80" + }, + { + "attr_name": "yellow", + "bits": "3:0", + "descr": "Yellow", + "value": "0x08;0x0a", + "swpld_addr": "0x30", + "swpld_addr_offset": "0x80" + }, + { + "attr_name": "yellow_blink", + "bits": "3:0", + "descr": "Yellow Blinking", + "value": "0x0c;0x0e", + "swpld_addr": "0x30", + "swpld_addr_offset": "0x80" + }, + { + "attr_name": "off", + "bits": "3", + "descr": "Off", + "value": "0x0", + "swpld_addr": "0x30", + "swpld_addr_offset": "0x80" + } + ] + } + }, + "PSU1_LED": { + "dev_info": { + "device_type": "LED", + "device_name": "PSU_LED" + }, + "dev_attr": { + "index": "0", + "flag": "ro" + }, + "i2c": { + "attr_list": [ + { + "attr_name": "green", + "bits": "3:0", + "descr": "Green", + "value": "0x09;0x0b", + "swpld_addr": "0x30", + "swpld_addr_offset": "0x81" + }, + { + "attr_name": "green_blink", + "bits": "3:0", + "descr": "Green Blinking", + "value": "0x0d;0x0f", + "swpld_addr": "0x30", + "swpld_addr_offset": "0x81" + }, + { + "attr_name": "yellow", + "bits": "3:0", + "descr": "Yellow", + "value": "0x08;0x0a", + "swpld_addr": "0x30", + "swpld_addr_offset": "0x81" + }, + { + "attr_name": "yellow_blink", + "bits": "3:0", + "descr": "Yellow Blinking", + "value": "0x0c;0x0e", + "swpld_addr": "0x30", + "swpld_addr_offset": "0x81" + }, + { + "attr_name": "off", + "bits": "3", + "descr": "Off", + "value": "0x0", + "swpld_addr": "0x30", + "swpld_addr_offset": "0x81" + } + ] + } + }, + "PSU2_LED": { + "dev_info": { + "device_type": "LED", + "device_name": "PSU_LED" + }, + "dev_attr": { + "index": "1", + "flag": "ro" + }, + "i2c": { + "attr_list": [ + { + "attr_name": "green", + "bits": "7:4", + "descr": "Green", + "value": "0x09;0x0b", + "swpld_addr": "0x30", + "swpld_addr_offset": "0x81" + }, + { + "attr_name": "green_blink", + "bits": "7:4", + "descr": "Green Blinking", + "value": "0x0d;0x0f", + "swpld_addr": "0x30", + "swpld_addr_offset": "0x81" + }, + { + "attr_name": "yellow", + "bits": "7:4", + "descr": "Yellow", + "value": "0x08;0x0a", + "swpld_addr": "0x30", + "swpld_addr_offset": "0x81" + }, + { + "attr_name": "yellow_blink", + "bits": "7:4", + "descr": "Yellow Blinking", + "value": "0x0c;0x0e", + "swpld_addr": "0x30", + "swpld_addr_offset": "0x81" + }, + { + "attr_name": "off", + "bits": "7", + "descr": "Off", + "value": "0x0", + "swpld_addr": "0x30", + "swpld_addr_offset": "0x81" + } + ] + } + }, + "LOC_LED": { + "dev_info": { + "device_type": "LED", + "device_name": "LOC_LED" + }, + "dev_attr": { + "index": "0", + "flag": "rw" + }, + "i2c": { + "attr_list": [ + { + "attr_name": "blue", + "bits": "2:1", + "descr": "Blue", + "value": "0x02", + "swpld_addr": "0x30", + "swpld_addr_offset": "0x84" + }, + { + "attr_name": "blue_blink", + "bits": "2:1", + "descr": "Blue Blinking", + "value": "0x03", + "swpld_addr": "0x30", + "swpld_addr_offset": "0x84" + }, + { + "attr_name": "off", + "bits": "2", + "descr": "Off", + "value": "0x0", + "swpld_addr": "0x30", + "swpld_addr_offset": "0x84" + } + ] + } + }, + "PORT1": { + "dev_info": { + "device_type": "QSFP28", + "device_name": "PORT1", + "device_parent": "MUX3" + }, + "dev_attr": { + "dev_idx": "1" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT1-EEPROM" + }, + { + "itf": "control", + "dev": "PORT1-CTRL" + } + ] + } + }, + "PORT1-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT1-EEPROM", + "device_parent": "MUX3", + "virt_parent": "PORT1" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x11", + "dev_addr": "0x50", + "dev_type": "optoe3" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT1-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT1-CTRL", + "device_parent": "MUX3", + "virt_parent": "PORT1" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x11", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_intr_status", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x10", + "attr_mask": "0", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x14", + "attr_mask": "0", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x40", + "attr_mask": "0", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_lpmode", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x44", + "attr_mask": "0", + "attr_cmpval": "0x1", + "attr_len": "1" + } + ] + } + }, + "PORT2": { + "dev_info": { + "device_type": "QSFP28", + "device_name": "PORT2", + "device_parent": "MUX3" + }, + "dev_attr": { + "dev_idx": "2" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT2-EEPROM" + }, + { + "itf": "control", + "dev": "PORT2-CTRL" + } + ] + } + }, + "PORT2-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT2-EEPROM", + "device_parent": "MUX3", + "virt_parent": "PORT2" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x12", + "dev_addr": "0x50", + "dev_type": "optoe3" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT2-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT2-CTRL", + "device_parent": "MUX3", + "virt_parent": "PORT2" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x12", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_intr_status", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x10", + "attr_mask": "1", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x14", + "attr_mask": "1", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x40", + "attr_mask": "1", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_lpmode", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x44", + "attr_mask": "1", + "attr_cmpval": "0x2", + "attr_len": "1" + } + ] + } + }, + "PORT3": { + "dev_info": { + "device_type": "QSFP28", + "device_name": "PORT3", + "device_parent": "MUX3" + }, + "dev_attr": { + "dev_idx": "3" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT3-EEPROM" + }, + { + "itf": "control", + "dev": "PORT3-CTRL" + } + ] + } + }, + "PORT3-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT3-EEPROM", + "device_parent": "MUX3", + "virt_parent": "PORT3" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x13", + "dev_addr": "0x50", + "dev_type": "optoe3" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT3-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT3-CTRL", + "device_parent": "MUX3", + "virt_parent": "PORT3" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x13", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_intr_status", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x10", + "attr_mask": "2", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x14", + "attr_mask": "2", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x40", + "attr_mask": "2", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_lpmode", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x44", + "attr_mask": "2", + "attr_cmpval": "0x4", + "attr_len": "1" + } + ] + } + }, + "PORT4": { + "dev_info": { + "device_type": "QSFP28", + "device_name": "PORT4", + "device_parent": "MUX3" + }, + "dev_attr": { + "dev_idx": "4" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT4-EEPROM" + }, + { + "itf": "control", + "dev": "PORT4-CTRL" + } + ] + } + }, + "PORT4-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT4-EEPROM", + "device_parent": "MUX3", + "virt_parent": "PORT4" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x14", + "dev_addr": "0x50", + "dev_type": "optoe3" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT4-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT4-CTRL", + "device_parent": "MUX3", + "virt_parent": "PORT4" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x14", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_intr_status", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x10", + "attr_mask": "3", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x14", + "attr_mask": "3", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x40", + "attr_mask": "3", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_lpmode", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x44", + "attr_mask": "3", + "attr_cmpval": "0x8", + "attr_len": "1" + } + ] + } + }, + "PORT5": { + "dev_info": { + "device_type": "QSFP28", + "device_name": "PORT5", + "device_parent": "MUX3" + }, + "dev_attr": { + "dev_idx": "5" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT5-EEPROM" + }, + { + "itf": "control", + "dev": "PORT5-CTRL" + } + ] + } + }, + "PORT5-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT5-EEPROM", + "device_parent": "MUX3", + "virt_parent": "PORT5" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x15", + "dev_addr": "0x50", + "dev_type": "optoe3" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT5-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT5-CTRL", + "device_parent": "MUX3", + "virt_parent": "PORT5" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x15", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_intr_status", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x10", + "attr_mask": "4", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x14", + "attr_mask": "4", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x40", + "attr_mask": "4", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_lpmode", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x44", + "attr_mask": "4", + "attr_cmpval": "0x10", + "attr_len": "1" + } + ] + } + }, + "PORT6": { + "dev_info": { + "device_type": "QSFP28", + "device_name": "PORT6", + "device_parent": "MUX3" + }, + "dev_attr": { + "dev_idx": "6" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT6-EEPROM" + }, + { + "itf": "control", + "dev": "PORT6-CTRL" + } + ] + } + }, + "PORT6-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT6-EEPROM", + "device_parent": "MUX3", + "virt_parent": "PORT6" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x16", + "dev_addr": "0x50", + "dev_type": "optoe3" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT6-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT6-CTRL", + "device_parent": "MUX3", + "virt_parent": "PORT6" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x16", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_intr_status", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x10", + "attr_mask": "5", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x14", + "attr_mask": "5", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x40", + "attr_mask": "5", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_lpmode", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x44", + "attr_mask": "5", + "attr_cmpval": "0x20", + "attr_len": "1" + } + ] + } + }, + "PORT7": { + "dev_info": { + "device_type": "QSFP28", + "device_name": "PORT7", + "device_parent": "MUX3" + }, + "dev_attr": { + "dev_idx": "7" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT7-EEPROM" + }, + { + "itf": "control", + "dev": "PORT7-CTRL" + } + ] + } + }, + "PORT7-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT7-EEPROM", + "device_parent": "MUX3", + "virt_parent": "PORT7" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x17", + "dev_addr": "0x50", + "dev_type": "optoe3" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT7-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT7-CTRL", + "device_parent": "MUX3", + "virt_parent": "PORT7" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x17", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_intr_status", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x10", + "attr_mask": "6", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x14", + "attr_mask": "6", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x40", + "attr_mask": "6", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_lpmode", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x44", + "attr_mask": "6", + "attr_cmpval": "0x40", + "attr_len": "1" + } + ] + } + }, + "PORT8": { + "dev_info": { + "device_type": "QSFP28", + "device_name": "PORT8", + "device_parent": "MUX3" + }, + "dev_attr": { + "dev_idx": "8" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT8-EEPROM" + }, + { + "itf": "control", + "dev": "PORT8-CTRL" + } + ] + } + }, + "PORT8-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT8-EEPROM", + "device_parent": "MUX3", + "virt_parent": "PORT8" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x18", + "dev_addr": "0x50", + "dev_type": "optoe3" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT8-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT8-CTRL", + "device_parent": "MUX3", + "virt_parent": "PORT8" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x18", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_intr_status", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x10", + "attr_mask": "7", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x14", + "attr_mask": "7", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x40", + "attr_mask": "7", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_lpmode", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x44", + "attr_mask": "7", + "attr_cmpval": "0x80", + "attr_len": "1" + } + ] + } + }, + "PORT9": { + "dev_info": { + "device_type": "QSFP28", + "device_name": "PORT9", + "device_parent": "MUX4" + }, + "dev_attr": { + "dev_idx": "9" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT9-EEPROM" + }, + { + "itf": "control", + "dev": "PORT9-CTRL" + } + ] + } + }, + "PORT9-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT9-EEPROM", + "device_parent": "MUX4", + "virt_parent": "PORT9" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x19", + "dev_addr": "0x50", + "dev_type": "optoe3" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT9-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT9-CTRL", + "device_parent": "MUX4", + "virt_parent": "PORT9" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x19", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_intr_status", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x11", + "attr_mask": "0", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x15", + "attr_mask": "0", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x41", + "attr_mask": "0", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_lpmode", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x45", + "attr_mask": "0", + "attr_cmpval": "0x1", + "attr_len": "1" + } + ] + } + }, + "PORT10": { + "dev_info": { + "device_type": "QSFP28", + "device_name": "PORT10", + "device_parent": "MUX4" + }, + "dev_attr": { + "dev_idx": "10" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT10-EEPROM" + }, + { + "itf": "control", + "dev": "PORT10-CTRL" + } + ] + } + }, + "PORT10-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT10-EEPROM", + "device_parent": "MUX4", + "virt_parent": "PORT10" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x1a", + "dev_addr": "0x50", + "dev_type": "optoe3" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT10-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT10-CTRL", + "device_parent": "MUX4", + "virt_parent": "PORT10" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x1a", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_intr_status", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x11", + "attr_mask": "1", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x15", + "attr_mask": "1", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x41", + "attr_mask": "1", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_lpmode", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x45", + "attr_mask": "1", + "attr_cmpval": "0x2", + "attr_len": "1" + } + ] + } + }, + "PORT11": { + "dev_info": { + "device_type": "QSFP28", + "device_name": "PORT11", + "device_parent": "MUX4" + }, + "dev_attr": { + "dev_idx": "11" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT11-EEPROM" + }, + { + "itf": "control", + "dev": "PORT11-CTRL" + } + ] + } + }, + "PORT11-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT11-EEPROM", + "device_parent": "MUX4", + "virt_parent": "PORT11" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x1b", + "dev_addr": "0x50", + "dev_type": "optoe3" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT11-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT11-CTRL", + "device_parent": "MUX4", + "virt_parent": "PORT11" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x1b", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_intr_status", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x11", + "attr_mask": "2", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x15", + "attr_mask": "2", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x41", + "attr_mask": "2", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_lpmode", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x45", + "attr_mask": "2", + "attr_cmpval": "0x4", + "attr_len": "1" + } + ] + } + }, + "PORT12": { + "dev_info": { + "device_type": "QSFP28", + "device_name": "PORT12", + "device_parent": "MUX4" + }, + "dev_attr": { + "dev_idx": "12" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT12-EEPROM" + }, + { + "itf": "control", + "dev": "PORT12-CTRL" + } + ] + } + }, + "PORT12-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT12-EEPROM", + "device_parent": "MUX4", + "virt_parent": "PORT12" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x1c", + "dev_addr": "0x50", + "dev_type": "optoe3" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT12-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT12-CTRL", + "device_parent": "MUX4", + "virt_parent": "PORT12" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x1c", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_intr_status", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x11", + "attr_mask": "3", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x15", + "attr_mask": "3", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x41", + "attr_mask": "3", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_lpmode", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x45", + "attr_mask": "3", + "attr_cmpval": "0x8", + "attr_len": "1" + } + ] + } + }, + "PORT13": { + "dev_info": { + "device_type": "QSFP28", + "device_name": "PORT13", + "device_parent": "MUX4" + }, + "dev_attr": { + "dev_idx": "13" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT13-EEPROM" + }, + { + "itf": "control", + "dev": "PORT13-CTRL" + } + ] + } + }, + "PORT13-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT13-EEPROM", + "device_parent": "MUX4", + "virt_parent": "PORT13" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x1d", + "dev_addr": "0x50", + "dev_type": "optoe3" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT13-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT13-CTRL", + "device_parent": "MUX4", + "virt_parent": "PORT13" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x1d", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_intr_status", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x11", + "attr_mask": "4", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x15", + "attr_mask": "4", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x41", + "attr_mask": "4", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_lpmode", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x45", + "attr_mask": "4", + "attr_cmpval": "0x10", + "attr_len": "1" + } + ] + } + }, + "PORT14": { + "dev_info": { + "device_type": "QSFP28", + "device_name": "PORT14", + "device_parent": "MUX4" + }, + "dev_attr": { + "dev_idx": "14" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT14-EEPROM" + }, + { + "itf": "control", + "dev": "PORT14-CTRL" + } + ] + } + }, + "PORT14-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT14-EEPROM", + "device_parent": "MUX4", + "virt_parent": "PORT14" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x1e", + "dev_addr": "0x50", + "dev_type": "optoe3" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT14-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT14-CTRL", + "device_parent": "MUX4", + "virt_parent": "PORT14" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x1e", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_intr_status", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x11", + "attr_mask": "5", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x15", + "attr_mask": "5", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x41", + "attr_mask": "5", + "attr_cmpval": "0x20", + "attr_len": "1" + }, + { + "attr_name": "xcvr_lpmode", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x45", + "attr_mask": "5", + "attr_cmpval": "0x20", + "attr_len": "1" + } + ] + } + }, + "PORT15": { + "dev_info": { + "device_type": "QSFP28", + "device_name": "PORT15", + "device_parent": "MUX4" + }, + "dev_attr": { + "dev_idx": "15" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT15-EEPROM" + }, + { + "itf": "control", + "dev": "PORT15-CTRL" + } + ] + } + }, + "PORT15-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT15-EEPROM", + "device_parent": "MUX4", + "virt_parent": "PORT15" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x1f", + "dev_addr": "0x50", + "dev_type": "optoe3" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT15-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT15-CTRL", + "device_parent": "MUX4", + "virt_parent": "PORT15" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x1f", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_intr_status", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x11", + "attr_mask": "6", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x15", + "attr_mask": "6", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x41", + "attr_mask": "6", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_lpmode", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x45", + "attr_mask": "6", + "attr_cmpval": "0x40", + "attr_len": "1" + } + ] + } + }, + "PORT16": { + "dev_info": { + "device_type": "QSFP28", + "device_name": "PORT16", + "device_parent": "MUX4" + }, + "dev_attr": { + "dev_idx": "16" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT16-EEPROM" + }, + { + "itf": "control", + "dev": "PORT16-CTRL" + } + ] + } + }, + "PORT16-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT16-EEPROM", + "device_parent": "MUX4", + "virt_parent": "PORT16" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x20", + "dev_addr": "0x50", + "dev_type": "optoe3" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT16-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT16-CTRL", + "device_parent": "MUX4", + "virt_parent": "PORT16" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x20", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_intr_status", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x11", + "attr_mask": "7", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x15", + "attr_mask": "7", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x41", + "attr_mask": "7", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_lpmode", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x45", + "attr_mask": "7", + "attr_cmpval": "0x80", + "attr_len": "1" + } + ] + } + }, + "PORT17": { + "dev_info": { + "device_type": "QSFP28", + "device_name": "PORT17", + "device_parent": "MUX5" + }, + "dev_attr": { + "dev_idx": "17" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT17-EEPROM" + }, + { + "itf": "control", + "dev": "PORT17-CTRL" + } + ] + } + }, + "PORT17-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT17-EEPROM", + "device_parent": "MUX5", + "virt_parent": "PORT17" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x21", + "dev_addr": "0x50", + "dev_type": "optoe3" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT17-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT17-CTRL", + "device_parent": "MUX5", + "virt_parent": "PORT17" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x21", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_intr_status", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x12", + "attr_mask": "0", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x16", + "attr_mask": "0", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x42", + "attr_mask": "0", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_lpmode", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x46", + "attr_mask": "0", + "attr_cmpval": "0x1", + "attr_len": "1" + } + ] + } + }, + "PORT18": { + "dev_info": { + "device_type": "QSFP28", + "device_name": "PORT18", + "device_parent": "MUX5" + }, + "dev_attr": { + "dev_idx": "18" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT18-EEPROM" + }, + { + "itf": "control", + "dev": "PORT18-CTRL" + } + ] + } + }, + "PORT18-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT18-EEPROM", + "device_parent": "MUX5", + "virt_parent": "PORT18" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x22", + "dev_addr": "0x50", + "dev_type": "optoe3" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT18-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT18-CTRL", + "device_parent": "MUX5", + "virt_parent": "PORT18" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x22", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_intr_status", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x12", + "attr_mask": "1", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x16", + "attr_mask": "1", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x42", + "attr_mask": "1", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_lpmode", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x46", + "attr_mask": "1", + "attr_cmpval": "0x2", + "attr_len": "1" + } + ] + } + }, + "PORT19": { + "dev_info": { + "device_type": "QSFP28", + "device_name": "PORT19", + "device_parent": "MUX5" + }, + "dev_attr": { + "dev_idx": "19" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT19-EEPROM" + }, + { + "itf": "control", + "dev": "PORT19-CTRL" + } + ] + } + }, + "PORT19-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT19-EEPROM", + "device_parent": "MUX5", + "virt_parent": "PORT19" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x23", + "dev_addr": "0x50", + "dev_type": "optoe3" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT19-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT19-CTRL", + "device_parent": "MUX5", + "virt_parent": "PORT19" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x23", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_intr_status", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x12", + "attr_mask": "2", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x16", + "attr_mask": "2", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x42", + "attr_mask": "2", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_lpmode", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x46", + "attr_mask": "2", + "attr_cmpval": "0x4", + "attr_len": "1" + } + ] + } + }, + "PORT20": { + "dev_info": { + "device_type": "QSFP28", + "device_name": "PORT20", + "device_parent": "MUX5" + }, + "dev_attr": { + "dev_idx": "20" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT20-EEPROM" + }, + { + "itf": "control", + "dev": "PORT20-CTRL" + } + ] + } + }, + "PORT20-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT20-EEPROM", + "device_parent": "MUX5", + "virt_parent": "PORT20" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x24", + "dev_addr": "0x50", + "dev_type": "optoe3" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT20-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT20-CTRL", + "device_parent": "MUX5", + "virt_parent": "PORT20" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x24", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_intr_status", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x12", + "attr_mask": "3", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x16", + "attr_mask": "3", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x42", + "attr_mask": "3", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_lpmode", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x46", + "attr_mask": "3", + "attr_cmpval": "0x8", + "attr_len": "1" + } + ] + } + }, + "PORT21": { + "dev_info": { + "device_type": "QSFP28", + "device_name": "PORT21", + "device_parent": "MUX5" + }, + "dev_attr": { + "dev_idx": "21" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT21-EEPROM" + }, + { + "itf": "control", + "dev": "PORT21-CTRL" + } + ] + } + }, + "PORT21-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT21-EEPROM", + "device_parent": "MUX5", + "virt_parent": "PORT21" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x25", + "dev_addr": "0x50", + "dev_type": "optoe3" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT21-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT21-CTRL", + "device_parent": "MUX5", + "virt_parent": "PORT21" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x25", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_intr_status", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x12", + "attr_mask": "4", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x16", + "attr_mask": "4", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x42", + "attr_mask": "4", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_lpmode", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x46", + "attr_mask": "4", + "attr_cmpval": "0x10", + "attr_len": "1" + } + ] + } + }, + "PORT22": { + "dev_info": { + "device_type": "QSFP28", + "device_name": "PORT22", + "device_parent": "MUX5" + }, + "dev_attr": { + "dev_idx": "22" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT22-EEPROM" + }, + { + "itf": "control", + "dev": "PORT22-CTRL" + } + ] + } + }, + "PORT22-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT22-EEPROM", + "device_parent": "MUX5", + "virt_parent": "PORT22" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x26", + "dev_addr": "0x50", + "dev_type": "optoe3" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT22-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT22-CTRL", + "device_parent": "MUX5", + "virt_parent": "PORT22" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x26", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_intr_status", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x12", + "attr_mask": "5", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x16", + "attr_mask": "5", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x42", + "attr_mask": "5", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_lpmode", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x46", + "attr_mask": "5", + "attr_cmpval": "0x20", + "attr_len": "1" + } + ] + } + }, + "PORT23": { + "dev_info": { + "device_type": "QSFP28", + "device_name": "PORT23", + "device_parent": "MUX5" + }, + "dev_attr": { + "dev_idx": "23" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT23-EEPROM" + }, + { + "itf": "control", + "dev": "PORT23-CTRL" + } + ] + } + }, + "PORT23-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT23-EEPROM", + "device_parent": "MUX5", + "virt_parent": "PORT23" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x27", + "dev_addr": "0x50", + "dev_type": "optoe3" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT23-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT23-CTRL", + "device_parent": "MUX5", + "virt_parent": "PORT23" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x27", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_intr_status", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x12", + "attr_mask": "6", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x16", + "attr_mask": "6", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x42", + "attr_mask": "6", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_lpmode", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x46", + "attr_mask": "6", + "attr_cmpval": "0x40", + "attr_len": "1" + } + ] + } + }, + "PORT24": { + "dev_info": { + "device_type": "QSFP28", + "device_name": "PORT24", + "device_parent": "MUX5" + }, + "dev_attr": { + "dev_idx": "24" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT24-EEPROM" + }, + { + "itf": "control", + "dev": "PORT24-CTRL" + } + ] + } + }, + "PORT24-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT24-EEPROM", + "device_parent": "MUX5", + "virt_parent": "PORT24" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x28", + "dev_addr": "0x50", + "dev_type": "optoe3" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT24-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT24-CTRL", + "device_parent": "MUX5", + "virt_parent": "PORT24" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x28", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_intr_status", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x12", + "attr_mask": "7", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x16", + "attr_mask": "7", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x42", + "attr_mask": "7", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_lpmode", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x46", + "attr_mask": "7", + "attr_cmpval": "0x80", + "attr_len": "1" + } + ] + } + }, + "PORT25": { + "dev_info": { + "device_type": "QSFP-DD", + "device_name": "PORT25", + "device_parent": "MUX6" + }, + "dev_attr": { + "dev_idx": "25" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT25-EEPROM" + }, + { + "itf": "control", + "dev": "PORT25-CTRL" + } + ] + } + }, + "PORT25-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT25-EEPROM", + "device_parent": "MUX6", + "virt_parent": "PORT25" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x29", + "dev_addr": "0x50", + "dev_type": "optoe3" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT25-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT25-CTRL", + "device_parent": "MUX6", + "virt_parent": "PORT25" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x29", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_intr_status", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x13", + "attr_mask": "0", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x17", + "attr_mask": "0", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x43", + "attr_mask": "0", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_lpmode", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x47", + "attr_mask": "0", + "attr_cmpval": "0x1", + "attr_len": "1" + } + ] + } + }, + "PORT26": { + "dev_info": { + "device_type": "QSFP-DD", + "device_name": "PORT26", + "device_parent": "MUX6" + }, + "dev_attr": { + "dev_idx": "26" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT26-EEPROM" + }, + { + "itf": "control", + "dev": "PORT26-CTRL" + } + ] + } + }, + "PORT26-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT26-EEPROM", + "device_parent": "MUX6", + "virt_parent": "PORT26" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x2a", + "dev_addr": "0x50", + "dev_type": "optoe3" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT26-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT26-CTRL", + "device_parent": "MUX6", + "virt_parent": "PORT26" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x2a", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_intr_status", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x13", + "attr_mask": "1", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x17", + "attr_mask": "1", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x43", + "attr_mask": "1", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_lpmode", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x47", + "attr_mask": "1", + "attr_cmpval": "0x2", + "attr_len": "1" + } + ] + } + }, + "PORT27": { + "dev_info": { + "device_type": "QSFP-DD", + "device_name": "PORT27", + "device_parent": "MUX6" + }, + "dev_attr": { + "dev_idx": "27" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT27-EEPROM" + }, + { + "itf": "control", + "dev": "PORT27-CTRL" + } + ] + } + }, + "PORT27-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT27-EEPROM", + "device_parent": "MUX6", + "virt_parent": "PORT27" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x2b", + "dev_addr": "0x50", + "dev_type": "optoe3" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT27-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT27-CTRL", + "device_parent": "MUX6", + "virt_parent": "PORT27" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x2b", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_intr_status", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x13", + "attr_mask": "2", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x17", + "attr_mask": "2", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x43", + "attr_mask": "2", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_lpmode", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x47", + "attr_mask": "2", + "attr_cmpval": "0x4", + "attr_len": "1" + } + ] + } + }, + "PORT28": { + "dev_info": { + "device_type": "QSFP-DD", + "device_name": "PORT28", + "device_parent": "MUX6" + }, + "dev_attr": { + "dev_idx": "28" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT28-EEPROM" + }, + { + "itf": "control", + "dev": "PORT28-CTRL" + } + ] + } + }, + "PORT28-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT28-EEPROM", + "device_parent": "MUX6", + "virt_parent": "PORT28" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x2c", + "dev_addr": "0x50", + "dev_type": "optoe3" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT28-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT28-CTRL", + "device_parent": "MUX6", + "virt_parent": "PORT28" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x2c", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_intr_status", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x13", + "attr_mask": "3", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x17", + "attr_mask": "3", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x43", + "attr_mask": "3", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_lpmode", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x47", + "attr_mask": "3", + "attr_cmpval": "0x8", + "attr_len": "1" + } + ] + } + }, + "PORT29": { + "dev_info": { + "device_type": "QSFP-DD", + "device_name": "PORT29", + "device_parent": "MUX6" + }, + "dev_attr": { + "dev_idx": "29" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT29-EEPROM" + }, + { + "itf": "control", + "dev": "PORT29-CTRL" + } + ] + } + }, + "PORT29-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT29-EEPROM", + "device_parent": "MUX6", + "virt_parent": "PORT29" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x2d", + "dev_addr": "0x50", + "dev_type": "optoe3" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT29-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT29-CTRL", + "device_parent": "MUX6", + "virt_parent": "PORT29" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x2d", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_intr_status", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x13", + "attr_mask": "4", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x17", + "attr_mask": "4", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x43", + "attr_mask": "4", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_lpmode", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x47", + "attr_mask": "4", + "attr_cmpval": "0x10", + "attr_len": "1" + } + ] + } + }, + "PORT30": { + "dev_info": { + "device_type": "QSFP-DD", + "device_name": "PORT30", + "device_parent": "MUX6" + }, + "dev_attr": { + "dev_idx": "30" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT30-EEPROM" + }, + { + "itf": "control", + "dev": "PORT30-CTRL" + } + ] + } + }, + "PORT30-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT30-EEPROM", + "device_parent": "MUX6", + "virt_parent": "PORT30" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x2e", + "dev_addr": "0x50", + "dev_type": "optoe3" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT30-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT30-CTRL", + "device_parent": "MUX6", + "virt_parent": "PORT30" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x2e", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_intr_status", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x13", + "attr_mask": "5", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x17", + "attr_mask": "5", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x43", + "attr_mask": "5", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_lpmode", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x47", + "attr_mask": "5", + "attr_cmpval": "0x20", + "attr_len": "1" + } + ] + } + }, + "PORT31": { + "dev_info": { + "device_type": "QSFP-DD", + "device_name": "PORT31", + "device_parent": "MUX6" + }, + "dev_attr": { + "dev_idx": "31" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT31-EEPROM" + }, + { + "itf": "control", + "dev": "PORT31-CTRL" + } + ] + } + }, + "PORT31-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT31-EEPROM", + "device_parent": "MUX6", + "virt_parent": "PORT31" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x2f", + "dev_addr": "0x50", + "dev_type": "optoe3" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT31-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT31-CTRL", + "device_parent": "MUX6", + "virt_parent": "PORT31" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x2f", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_intr_status", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x13", + "attr_mask": "6", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x17", + "attr_mask": "6", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x43", + "attr_mask": "6", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_lpmode", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x47", + "attr_mask": "6", + "attr_cmpval": "0x40", + "attr_len": "1" + } + ] + } + }, + "PORT32": { + "dev_info": { + "device_type": "QSFP-DD", + "device_name": "PORT32", + "device_parent": "MUX6" + }, + "dev_attr": { + "dev_idx": "32" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT32-EEPROM" + }, + { + "itf": "control", + "dev": "PORT32-CTRL" + } + ] + } + }, + "PORT32-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT32-EEPROM", + "device_parent": "MUX6", + "virt_parent": "PORT32" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x30", + "dev_addr": "0x50", + "dev_type": "optoe3" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT32-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT32-CTRL", + "device_parent": "MUX6", + "virt_parent": "PORT32" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x30", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_intr_status", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x13", + "attr_mask": "7", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x17", + "attr_mask": "7", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x43", + "attr_mask": "7", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_lpmode", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x47", + "attr_mask": "7", + "attr_cmpval": "0x80", + "attr_len": "1" + } + ] + } + } +} diff --git a/device/ufispace/x86_64-ufispace_s9301_32db-r0/pddf_support b/device/ufispace/x86_64-ufispace_s9301_32db-r0/pddf_support new file mode 100644 index 0000000000..e69de29bb2 diff --git a/device/ufispace/x86_64-ufispace_s9301_32db-r0/platform.json b/device/ufispace/x86_64-ufispace_s9301_32db-r0/platform.json new file mode 100644 index 0000000000..4c45922fd5 --- /dev/null +++ b/device/ufispace/x86_64-ufispace_s9301_32db-r0/platform.json @@ -0,0 +1,637 @@ +{ + "chassis": { + "name": "S9301-32DB", + "components": [ + { + "name": "CPLD1" + }, + { + "name": "CPLD2" + }, + { + "name": "CPLD3" + }, + { + "name": "BIOS" + }, + { + "name": "BMC" + } + ], + "fans": [ + { + "name": "Fantray1_1" + }, + { + "name": "Fantray1_2" + }, + { + "name": "Fantray2_1" + }, + { + "name": "Fantray2_2" + }, + { + "name": "Fantray3_1" + }, + { + "name": "Fantray3_2" + }, + { + "name": "Fantray4_1" + }, + { + "name": "Fantray4_2" + }, + { + "name": "Fantray5_1" + }, + { + "name": "Fantray5_2" + }, + { + "name": "Fantray6_1" + }, + { + "name": "Fantray6_2" + } + ], + "fan_drawers":[ + { + "name": "Fantray1", + "num_fans" : 2, + "fans": [ + { + "name": "Fantray1_1" + }, + { + "name": "Fantray1_2" + } + ] + }, + { + "name": "Fantray2", + "num_fans" : 2, + "fans": [ + { + "name": "Fantray2_1" + }, + { + "name": "Fantray2_2" + } + ] + }, + { + "name": "Fantray3", + "num_fans" : 2, + "fans": [ + { + "name": "Fantray3_1" + }, + { + "name": "Fantray3_2" + } + ] + }, + { + "name": "Fantray4", + "num_fans" : 2, + "fans": [ + { + "name": "Fantray4_1" + }, + { + "name": "Fantray4_2" + } + ] + }, + { + "name": "Fantray5", + "num_fans" : 2, + "fans": [ + { + "name": "Fantray5_1" + }, + { + "name": "Fantray5_2" + } + ] + }, + { + "name": "Fantray6", + "num_fans" : 2, + "fans": [ + { + "name": "Fantray6_1" + }, + { + "name": "Fantray6_2" + } + ] + } + ], + "psus": [ + { + "name": "PSU1", + "fans": [ + { + "name": "PSU1_FAN1" + } + ], + "thermals": [ + { + "name": "PSU1_TEMP1" + } + ] + }, + { + "name": "PSU2", + "fans": [ + { + "name": "PSU2_FAN1" + } + ], + "thermals": [ + { + "name": "PSU2_TEMP1" + } + ] + } + ], + "thermals": [ + { + "name": "Temp_CPU_PECI" + }, + { + "name": "Temp_CPU_ENV" + }, + { + "name": "Temp_CPU_ENV2" + }, + { + "name": "Temp_CPU_PECI" + }, + { + "name": "Temp_MAC_DIE" + }, + { + "name": "Temp_MAC_ENV" + }, + { + "name": "Temp_PSU_CONNTOR" + } + ], + "sfps": [ + { + "name": "Ethernet0" + }, + { + "name": "Ethernet8" + }, + { + "name": "Ethernet16" + }, + { + "name": "Ethernet24" + }, + { + "name": "Ethernet32" + }, + { + "name": "Ethernet40" + }, + { + "name": "Ethernet48" + }, + { + "name": "Ethernet56" + }, + { + "name": "Ethernet64" + }, + { + "name": "Ethernet72" + }, + { + "name": "Ethernet80" + }, + { + "name": "Ethernet88" + }, + { + "name": "Ethernet96" + }, + { + "name": "Ethernet104" + }, + { + "name": "Ethernet112" + }, + { + "name": "Ethernet120" + }, + { + "name": "Ethernet128" + }, + { + "name": "Ethernet136" + }, + { + "name": "Ethernet144" + }, + { + "name": "Ethernet152" + }, + { + "name": "Ethernet160" + }, + { + "name": "Ethernet168" + }, + { + "name": "Ethernet176" + }, + { + "name": "Ethernet184" + }, + { + "name": "Ethernet192" + }, + { + "name": "Ethernet200" + }, + { + "name": "Ethernet208" + }, + { + "name": "Ethernet216" + }, + { + "name": "Ethernet224" + }, + { + "name": "Ethernet232" + }, + { + "name": "Ethernet240" + }, + { + "name": "Ethernet248" + } + ] + }, + "interfaces": { + "Ethernet0": { + "index": "0,0,0,0,0,0,0,0", + "lanes": "1,2,3,4,5,6,7,8", + "breakout_modes": { + "1x200G": ["Eth0(Port0)"], + "2x100G": ["Eth0/1(Port0)", "Eth0/2(Port0)"], + "4x50G": ["Eth0/1(Port0)", "Eth0/2(Port0)", "Eth0/3(Port0)", "Eth0/4(Port0)"], + "8x25G": ["Eth0/1(Port0)", "Eth0/2(Port0)", "Eth0/3(Port0)", "Eth0/4(Port0)", "Eth0/5(Port0)", "Eth0/6(Port0)", "Eth0/7(Port0)", "Eth0/8(Port0)"] + } + }, + + "Ethernet8": { + "index": "1,1,1,1,1,1,1,1", + "lanes": "9,10,11,12,13,14,15,16", + "breakout_modes": { + "1x200G": ["Eth1(Port1)"], + "2x100G": ["Eth1/1(Port1)", "Eth1/2(Port1)"], + "4x50G": ["Eth1/1(Port1)", "Eth1/2(Port1)", "Eth1/3(Port1)", "Eth1/4(Port1)"], + "8x25G": ["Eth1/1(Port1)", "Eth1/2(Port1)", "Eth1/3(Port1)", "Eth1/4(Port1)", "Eth1/5(Port1)", "Eth1/6(Port1)", "Eth1/7(Port1)", "Eth1/8(Port1)"] + } + }, + + "Ethernet16": { + "index": "2,2,2,2,2,2,2,2", + "lanes": "17,18,19,20,21,22,23,24", + "breakout_modes": { + "1x200G": ["Eth2(Port2)"], + "2x100G": ["Eth2/1(Port2)", "Eth2/2(Port2)"], + "4x50G": ["Eth2/1(Port2)", "Eth2/2(Port2)", "Eth2/3(Port2)", "Eth2/4(Port2)"], + "8x25G": ["Eth2/1(Port2)", "Eth2/2(Port2)", "Eth2/3(Port2)", "Eth2/4(Port2)", "Eth2/5(Port2)", "Eth2/6(Port2)", "Eth2/7(Port2)", "Eth2/8(Port2)"] + } + }, + + "Ethernet24": { + "index": "3,3,3,3,3,3,3,3", + "lanes": "25,26,27,28,29,30,31,32", + "breakout_modes": { + "1x200G": ["Eth3(Port3)"], + "2x100G": ["Eth3/1(Port3)", "Eth3/2(Port3)"], + "4x50G": ["Eth3/1(Port3)", "Eth3/2(Port3)", "Eth3/3(Port3)", "Eth3/4(Port3)"], + "8x25G": ["Eth3/1(Port3)", "Eth3/2(Port3)", "Eth3/3(Port3)", "Eth3/4(Port3)", "Eth3/5(Port3)", "Eth3/6(Port3)", "Eth3/7(Port3)", "Eth3/8(Port3)"] + } + }, + + "Ethernet32": { + "index": "4,4,4,4,4,4,4,4", + "lanes": "33,34,35,36,37,38,39,40", + "breakout_modes": { + "1x200G": ["Eth4(Port4)"], + "2x100G": ["Eth4/1(Port4)", "Eth4/2(Port4)"], + "4x50G": ["Eth4/1(Port4)", "Eth4/2(Port4)", "Eth4/3(Port4)", "Eth4/4(Port4)"], + "8x25G": ["Eth4/1(Port4)", "Eth4/2(Port4)", "Eth4/3(Port4)", "Eth4/4(Port4)", "Eth4/5(Port4)", "Eth4/6(Port4)", "Eth4/7(Port4)", "Eth4/8(Port4)"] + } + }, + + "Ethernet40": { + "index": "5,5,5,5,5,5,5,5", + "lanes": "41,42,43,44,45,46,47,48", + "breakout_modes": { + "1x200G": ["Eth5(Port5)"], + "2x100G": ["Eth5/1(Port5)", "Eth5/2(Port5)"], + "4x50G": ["Eth5/1(Port5)", "Eth5/2(Port5)", "Eth5/3(Port5)", "Eth5/4(Port5)"], + "8x25G": ["Eth5/1(Port5)", "Eth5/2(Port5)", "Eth5/3(Port5)", "Eth5/4(Port5)", "Eth5/5(Port5)", "Eth5/6(Port5)", "Eth5/7(Port5)", "Eth5/8(Port5)"] + } + }, + + "Ethernet48": { + "index": "6,6,6,6,6,6,6,6", + "lanes": "49,50,51,52,53,54,55,56", + "breakout_modes": { + "1x200G": ["Eth6(Port6)"], + "2x100G": ["Eth6/1(Port6)", "Eth6/2(Port6)"], + "4x50G": ["Eth6/1(Port6)", "Eth6/2(Port6)", "Eth6/3(Port6)", "Eth6/4(Port6)"], + "8x25G": ["Eth6/1(Port6)", "Eth6/2(Port6)", "Eth6/3(Port6)", "Eth6/4(Port6)", "Eth6/5(Port6)", "Eth6/6(Port6)", "Eth6/7(Port6)", "Eth6/8(Port6)"] + } + }, + + "Ethernet56": { + "index": "7,7,7,7,7,7,7,7", + "lanes": "57,58,59,60,61,62,63,64", + "breakout_modes": { + "1x200G": ["Eth7(Port7)"], + "2x100G": ["Eth7/1(Port7)", "Eth7/2(Port7)"], + "4x50G": ["Eth7/1(Port7)", "Eth7/2(Port7)", "Eth7/3(Port7)", "Eth7/4(Port7)"], + "8x25G": ["Eth7/1(Port7)", "Eth7/2(Port7)", "Eth7/3(Port7)", "Eth7/4(Port7)", "Eth7/5(Port7)", "Eth7/6(Port7)", "Eth7/7(Port7)", "Eth7/8(Port7)"] + } + }, + + "Ethernet64": { + "index": "8,8,8,8,8,8,8,8", + "lanes": "65,66,67,68,69,70,71,72", + "breakout_modes": { + "1x200G": ["Eth8(Port8)"], + "2x100G": ["Eth8/1(Port8)", "Eth8/2(Port8)"], + "4x50G": ["Eth8/1(Port8)", "Eth8/2(Port8)", "Eth8/3(Port8)", "Eth8/4(Port8)"], + "8x25G": ["Eth8/1(Port8)", "Eth8/2(Port8)", "Eth8/3(Port8)", "Eth8/4(Port8)", "Eth8/5(Port8)", "Eth8/6(Port8)", "Eth8/7(Port8)", "Eth8/8(Port8)"] + } + }, + + "Ethernet72": { + "index": "9,9,9,9,9,9,9,9", + "lanes": "73,74,75,76,77,78,79,80", + "breakout_modes": { + "1x200G": ["Eth9(Port9)"], + "2x100G": ["Eth9/1(Port9)", "Eth9/2(Port9)"], + "4x50G": ["Eth9/1(Port9)", "Eth9/2(Port9)", "Eth9/3(Port9)", "Eth9/4(Port9)"], + "8x25G": ["Eth9/1(Port9)", "Eth9/2(Port9)", "Eth9/3(Port9)", "Eth9/4(Port9)", "Eth9/5(Port9)", "Eth9/6(Port9)", "Eth9/7(Port9)", "Eth9/8(Port9)"] + } + }, + + "Ethernet80": { + "index": "10,10,10,10,10,10,10,10", + "lanes": "81,82,83,84,85,86,87,88", + "breakout_modes": { + "1x200G": ["Eth10(Port10)"], + "2x100G": ["Eth10/1(Port10)", "Eth10/2(Port10)"], + "4x50G": ["Eth10/1(Port10)", "Eth10/2(Port10)", "Eth10/3(Port10)", "Eth10/4(Port10)"], + "8x25G": ["Eth10/1(Port10)", "Eth10/2(Port10)", "Eth10/3(Port10)", "Eth10/4(Port10)", "Eth10/5(Port10)", "Eth10/6(Port10)", "Eth10/7(Port10)", "Eth10/8(Port10)"] + } + }, + + "Ethernet88": { + "index": "11,11,11,11,11,11,11,11", + "lanes": "89,90,91,92,93,94,95,96", + "breakout_modes": { + "1x200G": ["Eth11(Port11)"], + "2x100G": ["Eth11/1(Port11)", "Eth11/2(Port11)"], + "4x50G": ["Eth11/1(Port11)", "Eth11/2(Port11)", "Eth11/3(Port11)", "Eth11/4(Port11)"], + "8x25G": ["Eth11/1(Port11)", "Eth11/2(Port11)", "Eth11/3(Port11)", "Eth11/4(Port11)", "Eth11/5(Port11)", "Eth11/6(Port11)", "Eth11/7(Port11)", "Eth11/8(Port11)"] + } + }, + + "Ethernet96": { + "index": "12,12,12,12,12,12,12,12", + "lanes": "97,98,99,100,101,102,103,104", + "breakout_modes": { + "1x200G": ["Eth12(Port12)"], + "2x100G": ["Eth12/1(Port12)", "Eth12/2(Port12)"], + "4x50G": ["Eth12/1(Port12)", "Eth12/2(Port12)", "Eth12/3(Port12)", "Eth12/4(Port12)"], + "8x25G": ["Eth12/1(Port12)", "Eth12/2(Port12)", "Eth12/3(Port12)", "Eth12/4(Port12)", "Eth12/5(Port12)", "Eth12/6(Port12)", "Eth12/7(Port12)", "Eth12/8(Port12)"] + } + }, + + "Ethernet104": { + "index": "13,13,13,13,13,13,13,13", + "lanes": "105,106,107,108,109,110,111,112", + "breakout_modes": { + "1x200G": ["Eth13(Port13)"], + "2x100G": ["Eth13/1(Port13)", "Eth13/2(Port13)"], + "4x50G": ["Eth13/1(Port13)", "Eth13/2(Port13)", "Eth13/3(Port13)", "Eth13/4(Port13)"], + "8x25G": ["Eth13/1(Port13)", "Eth13/2(Port13)", "Eth13/3(Port13)", "Eth13/4(Port13)", "Eth13/5(Port13)", "Eth13/6(Port13)", "Eth13/7(Port13)", "Eth13/8(Port13)"] + } + }, + + "Ethernet112": { + "index": "14,14,14,14,14,14,14,14", + "lanes": "113,114,115,116,117,118,119,120", + "breakout_modes": { + "1x200G": ["Eth14(Port14)"], + "2x100G": ["Eth14/1(Port14)", "Eth14/2(Port14)"], + "4x50G": ["Eth14/1(Port14)", "Eth14/2(Port14)", "Eth14/3(Port14)", "Eth14/4(Port14)"], + "8x25G": ["Eth14/1(Port14)", "Eth14/2(Port14)", "Eth14/3(Port14)", "Eth14/4(Port14)", "Eth14/5(Port14)", "Eth14/6(Port14)", "Eth14/7(Port14)", "Eth14/8(Port14)"] + } + }, + + "Ethernet120": { + "index": "15,15,15,15,15,15,15,15", + "lanes": "121,122,123,124,125,126,127,128", + "breakout_modes": { + "1x200G": ["Eth15(Port15)"], + "2x100G": ["Eth15/1(Port15)", "Eth15/2(Port15)"], + "4x50G": ["Eth15/1(Port15)", "Eth15/2(Port15)", "Eth15/3(Port15)", "Eth15/4(Port15)"], + "8x25G": ["Eth15/1(Port15)", "Eth15/2(Port15)", "Eth15/3(Port15)", "Eth15/4(Port15)", "Eth15/5(Port15)", "Eth15/6(Port15)", "Eth15/7(Port15)", "Eth15/8(Port15)"] + } + }, + + "Ethernet128": { + "index": "16,16,16,16,16,16,16,16", + "lanes": "129,130,131,132,133,134,135,136", + "breakout_modes": { + "1x200G": ["Eth16(Port16)"], + "2x100G": ["Eth16/1(Port16)", "Eth16/2(Port16)"], + "4x50G": ["Eth16/1(Port16)", "Eth16/2(Port16)", "Eth16/3(Port16)", "Eth16/4(Port16)"], + "8x25G": ["Eth16/1(Port16)", "Eth16/2(Port16)", "Eth16/3(Port16)", "Eth16/4(Port16)", "Eth16/5(Port16)", "Eth16/6(Port16)", "Eth16/7(Port16)", "Eth16/8(Port16)"] + } + }, + + "Ethernet136": { + "index": "17,17,17,17,17,17,17,17", + "lanes": "137,138,139,140,141,142,143,144", + "breakout_modes": { + "1x200G": ["Eth17(Port17)"], + "2x100G": ["Eth17/1(Port17)", "Eth17/2(Port17)"], + "4x50G": ["Eth17/1(Port17)", "Eth17/2(Port17)", "Eth17/3(Port17)", "Eth17/4(Port17)"], + "8x25G": ["Eth17/1(Port17)", "Eth17/2(Port17)", "Eth17/3(Port17)", "Eth17/4(Port17)", "Eth17/5(Port17)", "Eth17/6(Port17)", "Eth17/7(Port17)", "Eth17/8(Port17)"] + } + }, + + "Ethernet144": { + "index": "18,18,18,18,18,18,18,18", + "lanes": "145,146,147,148,149,150,151,152", + "breakout_modes": { + "1x200G": ["Eth18(Port18)"], + "2x100G": ["Eth18/1(Port18)", "Eth18/2(Port18)"], + "4x50G": ["Eth18/1(Port18)", "Eth18/2(Port18)", "Eth18/3(Port18)", "Eth18/4(Port18)"], + "8x25G": ["Eth18/1(Port18)", "Eth18/2(Port18)", "Eth18/3(Port18)", "Eth18/4(Port18)", "Eth18/5(Port18)", "Eth18/6(Port18)", "Eth18/7(Port18)", "Eth18/8(Port18)"] + } + }, + + "Ethernet152": { + "index": "19,19,19,19,19,19,19,19", + "lanes": "153,154,155,156,157,158,159,160", + "breakout_modes": { + "1x200G": ["Eth19(Port19)"], + "2x100G": ["Eth19/1(Port19)", "Eth19/2(Port19)"], + "4x50G": ["Eth19/1(Port19)", "Eth19/2(Port19)", "Eth19/3(Port19)", "Eth19/4(Port19)"], + "8x25G": ["Eth19/1(Port19)", "Eth19/2(Port19)", "Eth19/3(Port19)", "Eth19/4(Port19)", "Eth19/5(Port19)", "Eth19/6(Port19)", "Eth19/7(Port19)", "Eth19/8(Port19)"] + } + }, + + "Ethernet160": { + "index": "20,20,20,20,20,20,20,20", + "lanes": "161,162,163,164,165,166,167,168", + "breakout_modes": { + "1x200G": ["Eth20(Port20)"], + "2x100G": ["Eth20/1(Port20)", "Eth20/2(Port20)"], + "4x50G": ["Eth20/1(Port20)", "Eth20/2(Port20)", "Eth20/3(Port20)", "Eth20/4(Port20)"], + "8x25G": ["Eth20/1(Port20)", "Eth20/2(Port20)", "Eth20/3(Port20)", "Eth20/4(Port20)", "Eth20/5(Port20)", "Eth20/6(Port20)", "Eth20/7(Port20)", "Eth20/8(Port20)"] + } + }, + + "Ethernet168": { + "index": "21,21,21,21,21,21,21,21", + "lanes": "169,170,171,172,173,174,175,176", + "breakout_modes": { + "1x200G": ["Eth21(Port21)"], + "2x100G": ["Eth21/1(Port21)", "Eth21/2(Port21)"], + "4x50G": ["Eth21/1(Port21)", "Eth21/2(Port21)", "Eth21/3(Port21)", "Eth21/4(Port21)"], + "8x25G": ["Eth21/1(Port21)", "Eth21/2(Port21)", "Eth21/3(Port21)", "Eth21/4(Port21)", "Eth21/5(Port21)", "Eth21/6(Port21)", "Eth21/7(Port21)", "Eth21/8(Port21)"] + } + }, + + "Ethernet176": { + "index": "22,22,22,22,22,22,22,22", + "lanes": "177,178,179,180,181,182,183,184", + "breakout_modes": { + "1x200G": ["Eth22(Port22)"], + "2x100G": ["Eth22/1(Port22)", "Eth22/2(Port22)"], + "4x50G": ["Eth22/1(Port22)", "Eth22/2(Port22)", "Eth22/3(Port22)", "Eth22/4(Port22)"], + "8x25G": ["Eth22/1(Port22)", "Eth22/2(Port22)", "Eth22/3(Port22)", "Eth22/4(Port22)", "Eth22/5(Port22)", "Eth22/6(Port22)", "Eth22/7(Port22)", "Eth22/8(Port22)"] + } + }, + + "Ethernet184": { + "index": "23,23,23,23,23,23,23,23", + "lanes": "185,186,187,188,189,190,191,192", + "breakout_modes": { + "1x200G": ["Eth23(Port23)"], + "2x100G": ["Eth23/1(Port23)", "Eth23/2(Port23)"], + "4x50G": ["Eth23/1(Port23)", "Eth23/2(Port23)", "Eth23/3(Port23)", "Eth23/4(Port23)"], + "8x25G": ["Eth23/1(Port23)", "Eth23/2(Port23)", "Eth23/3(Port23)", "Eth23/4(Port23)", "Eth23/5(Port23)", "Eth23/6(Port23)", "Eth23/7(Port23)", "Eth23/8(Port23)"] + } + }, + + "Ethernet192": { + "index": "24,24,24,24,24,24,24,24", + "lanes": "193,194,195,196,197,198,199,200", + "breakout_modes": { + "1x400G": ["Eth24(Port24)"], + "2x200G": ["Eth24/1(Port24)", "Eth24/2(Port24)"], + "4x100G": ["Eth24/1(Port24)", "Eth24/2(Port24)", "Eth24/3(Port24)", "Eth24/4(Port24)"], + "8x50G": ["Eth24/1(Port24)", "Eth24/2(Port24)", "Eth24/3(Port24)", "Eth24/4(Port24)", "Eth24/5(Port24)", "Eth24/6(Port24)", "Eth24/7(Port24)", "Eth24/8(Port24)"] + } + }, + + "Ethernet200": { + "index": "25,25,25,25,25,25,25,25", + "lanes": "201,202,203,204,205,206,207,208", + "breakout_modes": { + "1x400G": ["Eth25(Port25)"], + "2x200G": ["Eth25/1(Port25)", "Eth25/2(Port25)"], + "4x100G": ["Eth25/1(Port25)", "Eth25/2(Port25)", "Eth25/3(Port25)", "Eth25/4(Port25)"], + "8x50G": ["Eth25/1(Port25)", "Eth25/2(Port25)", "Eth25/3(Port25)", "Eth25/4(Port25)", "Eth25/5(Port25)", "Eth25/6(Port25)", "Eth25/7(Port25)", "Eth25/8(Port25)"] + } + }, + + "Ethernet208": { + "index": "26,26,26,26,26,26,26,26", + "lanes": "209,210,211,212,213,214,215,216", + "breakout_modes": { + "1x400G": ["Eth26(Port26)"], + "2x200G": ["Eth26/1(Port26)", "Eth26/2(Port26)"], + "4x100G": ["Eth26/1(Port26)", "Eth26/2(Port26)", "Eth26/3(Port26)", "Eth26/4(Port26)"], + "8x50G": ["Eth26/1(Port26)", "Eth26/2(Port26)", "Eth26/3(Port26)", "Eth26/4(Port26)", "Eth26/5(Port26)", "Eth26/6(Port26)", "Eth26/7(Port26)", "Eth26/8(Port26)"] + } + }, + + "Ethernet216": { + "index": "27,27,27,27,27,27,27,27", + "lanes": "217,218,219,220,221,222,223,224", + "breakout_modes": { + "1x400G": ["Eth27(Port27)"], + "2x200G": ["Eth27/1(Port27)", "Eth27/2(Port27)"], + "4x100G": ["Eth27/1(Port27)", "Eth27/2(Port27)", "Eth27/3(Port27)", "Eth27/4(Port27)"], + "8x50G": ["Eth27/1(Port27)", "Eth27/2(Port27)", "Eth27/3(Port27)", "Eth27/4(Port27)", "Eth27/5(Port27)", "Eth27/6(Port27)", "Eth27/7(Port27)", "Eth27/8(Port27)"] + } + }, + + "Ethernet224": { + "index": "28,28,28,28,28,28,28,28", + "lanes": "225,226,227,228,229,230,231,232", + "breakout_modes": { + "1x400G": ["Eth28(Port28)"], + "2x200G": ["Eth28/1(Port28)", "Eth28/2(Port28)"], + "4x100G": ["Eth28/1(Port28)", "Eth28/2(Port28)", "Eth28/3(Port28)", "Eth28/4(Port28)"], + "8x50G": ["Eth28/1(Port28)", "Eth28/2(Port28)", "Eth28/3(Port28)", "Eth28/4(Port28)", "Eth28/5(Port28)", "Eth28/6(Port28)", "Eth28/7(Port28)", "Eth28/8(Port28)"] + } + }, + + "Ethernet232": { + "index": "29,29,29,29,29,29,29,29", + "lanes": "233,234,235,236,237,238,239,240", + "breakout_modes": { + "1x400G": ["Eth29(Port29)"], + "2x200G": ["Eth29/1(Port29)", "Eth29/2(Port29)"], + "4x100G": ["Eth29/1(Port29)", "Eth29/2(Port29)", "Eth29/3(Port29)", "Eth29/4(Port29)"], + "8x50G": ["Eth29/1(Port29)", "Eth29/2(Port29)", "Eth29/3(Port29)", "Eth29/4(Port29)", "Eth29/5(Port29)", "Eth29/6(Port29)", "Eth29/7(Port29)", "Eth29/8(Port29)"] + } + }, + + "Ethernet240": { + "index": "30,30,30,30,30,30,30,30", + "lanes": "241,242,243,244,245,246,247,248", + "breakout_modes": { + "1x400G": ["Eth30(Port30)"], + "2x200G": ["Eth30/1(Port30)", "Eth30/2(Port30)"], + "4x100G": ["Eth30/1(Port30)", "Eth30/2(Port30)", "Eth30/3(Port30)", "Eth30/4(Port30)"], + "8x50G": ["Eth30/1(Port30)", "Eth30/2(Port30)", "Eth30/3(Port30)", "Eth30/4(Port30)", "Eth30/5(Port30)", "Eth30/6(Port30)", "Eth30/7(Port30)", "Eth30/8(Port30)"] + } + }, + + "Ethernet248": { + "index": "31,31,31,31,31,31,31,31", + "lanes": "249,250,251,252,253,254,255,256", + "breakout_modes": { + "1x400G": ["Eth31(Port31)"], + "2x200G": ["Eth31/1(Port31)", "Eth31/2(Port31)"], + "4x100G": ["Eth31/1(Port31)", "Eth31/2(Port31)", "Eth31/3(Port31)", "Eth31/4(Port31)"], + "8x50G": ["Eth31/1(Port31)", "Eth31/2(Port31)", "Eth31/3(Port31)", "Eth31/4(Port31)", "Eth31/5(Port31)", "Eth31/6(Port31)", "Eth31/7(Port31)", "Eth31/8(Port31)"] + } + } + } +} + diff --git a/device/ufispace/x86_64-ufispace_s9301_32db-r0/platform_asic b/device/ufispace/x86_64-ufispace_s9301_32db-r0/platform_asic new file mode 100644 index 0000000000..9604676527 --- /dev/null +++ b/device/ufispace/x86_64-ufispace_s9301_32db-r0/platform_asic @@ -0,0 +1 @@ +broadcom diff --git a/device/ufispace/x86_64-ufispace_s9301_32db-r0/platform_components.json b/device/ufispace/x86_64-ufispace_s9301_32db-r0/platform_components.json new file mode 100644 index 0000000000..4274a79774 --- /dev/null +++ b/device/ufispace/x86_64-ufispace_s9301_32db-r0/platform_components.json @@ -0,0 +1,13 @@ +{ + "chassis": { + "x86_64-ufispace_s9301_32db-r0": { + "component": { + "CPLD1": { }, + "CPLD2": { }, + "CPLD3": { }, + "BIOS": { }, + "BMC": {} + } + } + } +} diff --git a/device/ufispace/x86_64-ufispace_s9301_32db-r0/platform_env.conf b/device/ufispace/x86_64-ufispace_s9301_32db-r0/platform_env.conf new file mode 100644 index 0000000000..dd7cf4fe01 --- /dev/null +++ b/device/ufispace/x86_64-ufispace_s9301_32db-r0/platform_env.conf @@ -0,0 +1,2 @@ +SYNCD_SHM_SIZE=512m +is_ltsw_chip=1 diff --git a/device/ufispace/x86_64-ufispace_s9301_32db-r0/pmon_daemon_control.json b/device/ufispace/x86_64-ufispace_s9301_32db-r0/pmon_daemon_control.json new file mode 100644 index 0000000000..e348e0168f --- /dev/null +++ b/device/ufispace/x86_64-ufispace_s9301_32db-r0/pmon_daemon_control.json @@ -0,0 +1,9 @@ +{ + "skip_pcied": false, + "skip_fancontrol": false, + "skip_thermalctld": false, + "skip_ledd": true, + "skip_xcvrd": false, + "skip_psud": false, + "skip_syseepromd": false +} diff --git a/device/ufispace/x86_64-ufispace_s9301_32db-r0/sensors.conf b/device/ufispace/x86_64-ufispace_s9301_32db-r0/sensors.conf new file mode 100644 index 0000000000..7a1c040881 --- /dev/null +++ b/device/ufispace/x86_64-ufispace_s9301_32db-r0/sensors.conf @@ -0,0 +1,9 @@ +# libsensors configuration file + +bus "i2c-0" "I2C I801" +chip "tmp75-i2c-*-4f" + label temp1 "CPU Board Temp" + set temp1_max 70 + set temp1_max_hyst 75 + set temp1_crit 85 + diff --git a/device/ufispace/x86_64-ufispace_s9301_32db-r0/system_health_monitoring_config.json b/device/ufispace/x86_64-ufispace_s9301_32db-r0/system_health_monitoring_config.json new file mode 100644 index 0000000000..6291e81a06 --- /dev/null +++ b/device/ufispace/x86_64-ufispace_s9301_32db-r0/system_health_monitoring_config.json @@ -0,0 +1,15 @@ +{ + "services_to_ignore": [], + "devices_to_ignore": [ + "asic", + "psu", + "fan" + ], + "user_defined_checkers": [], + "polling_interval": 60, + "led_color": { + "fault": "yellow", + "normal": "green", + "booting": "blinking_green" + } +} \ No newline at end of file diff --git a/platform/barefoot/bfn-platform-ufispace.mk b/platform/barefoot/bfn-platform-ufispace.mk new file mode 100644 index 0000000000..fd3dced686 --- /dev/null +++ b/platform/barefoot/bfn-platform-ufispace.mk @@ -0,0 +1,5 @@ +BFN_UFISPACE_PLATFORM = bfnplatform-ufispace_1.0.0_amd64.deb +$(BFN_UFISPACE_PLATFORM)_URL = "https://github.com/ufispace-dev/bf_sde_bsp/raw/master/sonic/9.12.0/$(BFN_UFISPACE_PLATFORM)" + +SONIC_ONLINE_DEBS += $(BFN_UFISPACE_PLATFORM) # $(BFN_SAI_DEV) +$(BFN_SAI_DEV)_DEPENDS += $(BFN_UFISPACE_PLATFORM) diff --git a/platform/barefoot/docker-saiserver-bfn.mk b/platform/barefoot/docker-saiserver-bfn.mk index dde7e8888a..26abf7c53b 100644 --- a/platform/barefoot/docker-saiserver-bfn.mk +++ b/platform/barefoot/docker-saiserver-bfn.mk @@ -12,7 +12,7 @@ SONIC_COPY_FILES += $(SYNCD_INIT_COMMON_SCRIPT) $(DOCKER_SAISERVER_BFN)_DEPENDS += $(SAISERVER) # Install syncd for reuse the config fun #$(DOCKER_SAISERVER_BFN)_DEPENDS += $(SYNCD) -$(DOCKER_SAISERVER_BFN)_DEPENDS += $(BFN_SAI) $(BFN_INGRASYS_PLATFORM) $(BFN_PLATFORM) $(LIBTHRIFT_0_14_1) +$(DOCKER_SAISERVER_BFN)_DEPENDS += $(BFN_SAI) $(BFN_INGRASYS_PLATFORM) $(BFN_UFISPACE_PLATFORM) $(BFN_PLATFORM) $(LIBTHRIFT_0_14_1) $(DOCKER_SAISERVER_BFN)_FILES += $(SYNCD_INIT_COMMON_SCRIPT) # Same dependence as ENABLE_SYNCD_RPC @@ -20,7 +20,7 @@ $(DOCKER_SAISERVER_BFN)_DEPENDS += $(LIBSAITHRIFT_DEV) $(LIBTHRIFT_0_14_1_DEV) # Runtime dependency on sai is set only for syncd #$(SYNCD)_RDEPENDS += $(BFN_SAI) $(WNC_OSW1800_PLATFORM) $(BFN_INGRASYS_PLATFORM) $(BFN_PLATFORM) -$(DOCKER_SAISERVER_BFN)_RDEPENDS += $(BFN_SAI) $(BFN_INGRASYS_PLATFORM) $(BFN_PLATFORM) +$(DOCKER_SAISERVER_BFN)_RDEPENDS += $(BFN_SAI) $(BFN_INGRASYS_PLATFORM) $(BFN_UFISPACE_PLATFORM) $(BFN_PLATFORM) $(DOCKER_SAISERVER_BFN)_LOAD_DOCKERS += $(DOCKER_CONFIG_ENGINE_BULLSEYE) diff --git a/platform/barefoot/one-image.mk b/platform/barefoot/one-image.mk index d282fec564..d77eb0af79 100644 --- a/platform/barefoot/one-image.mk +++ b/platform/barefoot/one-image.mk @@ -5,6 +5,7 @@ $(SONIC_ONE_IMAGE)_MACHINE = barefoot $(SONIC_ONE_IMAGE)_IMAGE_TYPE = onie $(SONIC_ONE_IMAGE)_INSTALLS += $(BFN_MODULE) $(SONIC_ONE_IMAGE)_INSTALLS += $(SYSTEMD_SONIC_GENERATOR) +$(SONIC_ONE_IMAGE)_INSTALLS += $(PDDF_PLATFORM_MODULE) $(SONIC_ONE_IMAGE)_LAZY_INSTALLS += $(BFN_PLATFORM_MODULE) $(SONIC_ONE_IMAGE)_LAZY_INSTALLS += $(BFN_MONTARA_PLATFORM_MODULE) $(SONIC_ONE_IMAGE)_LAZY_INSTALLS += $(BFN_NEWPORT_PLATFORM_MODULE) @@ -14,6 +15,7 @@ $(SONIC_ONE_IMAGE)_LAZY_INSTALLS += $(INGRASYS_S9180_32X_PLATFORM_MODULE) $(SONIC_ONE_IMAGE)_LAZY_INSTALLS += $(INGRASYS_S9280_64X_PLATFORM_MODULE) $(SONIC_ONE_IMAGE)_LAZY_INSTALLS += $(BFN_MONTARA_QS_PLATFORM_MODULE) $(SONIC_ONE_IMAGE)_LAZY_INSTALLS += $(NETBERG_AURORA_610_PLATFORM_MODULE) +$(SONIC_ONE_IMAGE)_LAZY_INSTALLS += $(UFISPACE_S9180_32X_PLATFORM_MODULE) ifeq ($(INSTALL_DEBUG_TOOLS),y) $(SONIC_ONE_IMAGE)_DOCKERS += $(SONIC_INSTALL_DOCKER_DBG_IMAGES) $(SONIC_ONE_IMAGE)_DOCKERS += $(filter-out $(patsubst %-$(DBG_IMAGE_MARK).gz,%.gz, $(SONIC_INSTALL_DOCKER_DBG_IMAGES)), $(SONIC_INSTALL_DOCKER_IMAGES)) diff --git a/platform/barefoot/platform-modules-ufispace.mk b/platform/barefoot/platform-modules-ufispace.mk new file mode 100644 index 0000000000..717d730f5a --- /dev/null +++ b/platform/barefoot/platform-modules-ufispace.mk @@ -0,0 +1,14 @@ +# Ufispace S9180-32X Platform modules + +UFISPACE_S9180_32X_PLATFORM_MODULE_VERSION = 1.1.0 + +export UFISPACE_S9180_32X_PLATFORM_MODULE_VERSION + +UFISPACE_S9180_32X_PLATFORM_MODULE = sonic-platform-ufispace-s9180-32x_$(UFISPACE_S9180_32X_PLATFORM_MODULE_VERSION)_amd64.deb +$(UFISPACE_S9180_32X_PLATFORM_MODULE)_SRC_PATH = $(PLATFORM_PATH)/sonic-platform-modules-ufispace +$(UFISPACE_S9180_32X_PLATFORM_MODULE)_DEPENDS += $(LINUX_HEADERS) $(LINUX_HEADERS_COMMON) $(PDDF_PLATFORM_MODULE_SYM) +$(UFISPACE_S9180_32X_PLATFORM_MODULE)_PLATFORM = x86_64-ufispace_s9180_32x-r0 +SONIC_DPKG_DEBS += $(UFISPACE_S9180_32X_PLATFORM_MODULE) + +$(eval $(call add_extra_package,$(UFISPACE_S9180_32X_PLATFORM_MODULE))) + diff --git a/platform/barefoot/rules.mk b/platform/barefoot/rules.mk index 58f52f5ffd..0a4339ce71 100644 --- a/platform/barefoot/rules.mk +++ b/platform/barefoot/rules.mk @@ -6,6 +6,7 @@ include $(PLATFORM_PATH)/platform-modules-bfn-newport.mk include $(PLATFORM_PATH)/platform-modules-wnc-osw1800.mk include $(PLATFORM_PATH)/platform-modules-ingrasys.mk include $(PLATFORM_PATH)/platform-modules-netberg.mk +include $(PLATFORM_PATH)/platform-modules-ufispace.mk include $(PLATFORM_PATH)/bfn-sai.mk include $(PLATFORM_PATH)/docker-syncd-bfn.mk include $(PLATFORM_PATH)/docker-syncd-bfn-rpc.mk @@ -15,6 +16,7 @@ include $(PLATFORM_PATH)/libsaithrift-dev.mk include $(PLATFORM_PATH)/bfn-platform.mk #include $(PLATFORM_PATH)/bfn-platform-wnc.mk #include $(PLATFORM_PATH)/bfn-platform-ingrasys.mk +include $(PLATFORM_PATH)/bfn-platform-ufispace.mk include $(PLATFORM_PATH)/bfn-modules.mk include $(PLATFORM_PATH)/docker-saiserver-bfn.mk @@ -23,7 +25,7 @@ SONIC_ALL += $(SONIC_ONE_IMAGE) $(SONIC_ONE_ABOOT) \ # Inject sai into syncd #$(SYNCD)_DEPENDS += $(BFN_SAI) $(WNC_OSW1800_PLATFORM) $(BFN_INGRASYS_PLATFORM) $(BFN_PLATFORM) -$(SYNCD)_DEPENDS += $(BFN_SAI) $(BFN_INGRASYS_PLATFORM) $(BFN_PLATFORM) +$(SYNCD)_DEPENDS += $(BFN_SAI) $(BFN_INGRASYS_PLATFORM) $(BFN_UFISPACE_PLATFORM) $(BFN_PLATFORM) $(SYNCD)_UNINSTALLS += $(BFN_SAI) ifeq ($(ENABLE_SYNCD_RPC),y) @@ -33,6 +35,6 @@ endif # Runtime dependency on sai is set only for syncd #$(SYNCD)_RDEPENDS += $(BFN_SAI) $(WNC_OSW1800_PLATFORM) $(BFN_INGRASYS_PLATFORM) $(BFN_PLATFORM) -$(SYNCD)_RDEPENDS += $(BFN_SAI) $(BFN_INGRASYS_PLATFORM) $(BFN_PLATFORM) +$(SYNCD)_RDEPENDS += $(BFN_SAI) $(BFN_INGRASYS_PLATFORM) $(BFN_UFISPACE_PLATFORM) $(BFN_PLATFORM) export SONIC_BUFFER_MODEL=dynamic diff --git a/platform/barefoot/sonic-platform-modules-ufispace/LICENSE b/platform/barefoot/sonic-platform-modules-ufispace/LICENSE new file mode 100644 index 0000000000..9cecc1d466 --- /dev/null +++ b/platform/barefoot/sonic-platform-modules-ufispace/LICENSE @@ -0,0 +1,674 @@ + GNU GENERAL PUBLIC LICENSE + Version 3, 29 June 2007 + + Copyright (C) 2007 Free Software Foundation, Inc. + Everyone is permitted to copy and distribute verbatim copies + of this license document, but changing it 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If not, see . + +Also add information on how to contact you by electronic and paper mail. + + If the program does terminal interaction, make it output a short +notice like this when it starts in an interactive mode: + + {project} Copyright (C) {year} {fullname} + This program comes with ABSOLUTELY NO WARRANTY; for details type `show w'. + This is free software, and you are welcome to redistribute it + under certain conditions; type `show c' for details. + +The hypothetical commands `show w' and `show c' should show the appropriate +parts of the General Public License. Of course, your program's commands +might be different; for a GUI interface, you would use an "about box". + + You should also get your employer (if you work as a programmer) or school, +if any, to sign a "copyright disclaimer" for the program, if necessary. +For more information on this, and how to apply and follow the GNU GPL, see +. + + The GNU General Public License does not permit incorporating your program +into proprietary programs. If your program is a subroutine library, you +may consider it more useful to permit linking proprietary applications with +the library. If this is what you want to do, use the GNU Lesser General +Public License instead of this License. But first, please read +. diff --git a/platform/barefoot/sonic-platform-modules-ufispace/debian/changelog b/platform/barefoot/sonic-platform-modules-ufispace/debian/changelog new file mode 100644 index 0000000000..0b4a98329e --- /dev/null +++ b/platform/barefoot/sonic-platform-modules-ufispace/debian/changelog @@ -0,0 +1,5 @@ +sonic-ufispace-platform-modules (1.1.0) unstable; urgency=low + + * Add support for S9180-32X. + + -- Ufispace Tue, 19 Apr 2022 17:10:58 +0800 diff --git a/platform/barefoot/sonic-platform-modules-ufispace/debian/compat b/platform/barefoot/sonic-platform-modules-ufispace/debian/compat new file mode 100644 index 0000000000..ec635144f6 --- /dev/null +++ b/platform/barefoot/sonic-platform-modules-ufispace/debian/compat @@ -0,0 +1 @@ +9 diff --git a/platform/barefoot/sonic-platform-modules-ufispace/debian/control b/platform/barefoot/sonic-platform-modules-ufispace/debian/control new file mode 100644 index 0000000000..cc98343cf0 --- /dev/null +++ b/platform/barefoot/sonic-platform-modules-ufispace/debian/control @@ -0,0 +1,10 @@ +Source: sonic-ufispace-platform-modules +Section: main +Priority: extra +Maintainer: Leo Lin , Jason Tsai +Build-Depends: debhelper (>= 9), bzip2 +Standards-Version: 1.0.0 + +Package: sonic-platform-ufispace-s9180-32x +Architecture: amd64 +Description: This package contains s9180-32x platform driver utility for SONiC project. diff --git a/platform/barefoot/sonic-platform-modules-ufispace/debian/rules b/platform/barefoot/sonic-platform-modules-ufispace/debian/rules new file mode 100755 index 0000000000..552cc61f8f --- /dev/null +++ b/platform/barefoot/sonic-platform-modules-ufispace/debian/rules @@ -0,0 +1,88 @@ +#!/usr/bin/make -f +# -*- makefile -*- +# Sample debian/rules that uses debhelper. +# This file was originally written by Joey Hess and Craig Small. +# As a special exception, when this file is copied by dh-make into a +# dh-make output file, you may use that output file without restriction. +# This special exception was added by Craig Small in version 0.37 of dh-make. + +include /usr/share/dpkg/pkg-info.mk + +# Uncomment this to turn on verbose mode. +#export DH_VERBOSE=1 + +export INSTALL_MOD_DIR:=extra + +PYTHON3 ?= python3 + +PACKAGE_PRE_NAME := sonic-platform-ufispace +KVERSION ?= $(shell uname -r) +KERNEL_SRC := /lib/modules/$(KVERSION) +MOD_SRC_DIR:= $(shell pwd) +MODULE_DIRS:= s9180-32x +MODULE_DIR := modules +UTILS_DIR := utils +SERVICE_DIR := service +CONF_DIR := conf + +%: + dh $@ --with systemd,python3 --buildsystem=pybuild + +clean: + dh_testdir + dh_testroot + dh_clean + (for mod in $(MODULE_DIRS); do \ + make -C $(KERNEL_SRC)/build M=$(MOD_SRC_DIR)/$${mod}/modules clean; \ + done) + + + +build: + (for mod in $(MODULE_DIRS); do \ + make modules -C $(KERNEL_SRC)/build M=$(MOD_SRC_DIR)/$${mod}/modules; \ + cd -; \ + cd $(MOD_SRC_DIR)/$${mod}; \ + if [ -f sonic_platform_setup.py ]; then \ + $(PYTHON3) sonic_platform_setup.py bdist_wheel -d $(MOD_SRC_DIR)/$${mod}; \ + echo "Finished makig whl package for $$mod"; \ + fi; \ + cd -; \ + done) + +binary: binary-arch binary-indep + +binary-arch: + +binary-indep: + dh_testdir + dh_installdirs + (for mod in $(MODULE_DIRS); do \ + dh_installdirs -p$(PACKAGE_PRE_NAME)-$${mod} $(KERNEL_SRC)/$(INSTALL_MOD_DIR); \ + cp $(MOD_SRC_DIR)/$${mod}/$(MODULE_DIR)/*.ko debian/$(PACKAGE_PRE_NAME)-$${mod}/$(KERNEL_SRC)/$(INSTALL_MOD_DIR); \ + dh_installdirs -p$(PACKAGE_PRE_NAME)-$${mod} usr/local/bin; \ + cp $(MOD_SRC_DIR)/$${mod}/$(UTILS_DIR)/* debian/$(PACKAGE_PRE_NAME)-$${mod}/usr/local/bin; \ + dh_installdirs -p$(PACKAGE_PRE_NAME)-$${mod} lib/systemd/system; \ + cp $(MOD_SRC_DIR)/$${mod}/$(SERVICE_DIR)/*.service debian/$(PACKAGE_PRE_NAME)-$${mod}/lib/systemd/system; \ + cd $(MOD_SRC_DIR)/$${mod}; \ + cd -; \ + done) + + # Resuming debhelper scripts + dh_testroot + dh_install + dh_installchangelogs + dh_installdocs + dh_systemd_enable + dh_installinit + dh_systemd_start + dh_link + dh_fixperms + dh_compress + dh_strip + dh_installdeb + dh_gencontrol + dh_md5sums + dh_builddeb + +.PHONY: build binary binary-arch binary-indep clean diff --git a/platform/barefoot/sonic-platform-modules-ufispace/debian/sonic-platform-ufispace-s9180-32x.install b/platform/barefoot/sonic-platform-modules-ufispace/debian/sonic-platform-ufispace-s9180-32x.install new file mode 100644 index 0000000000..b6968a0a3a --- /dev/null +++ b/platform/barefoot/sonic-platform-modules-ufispace/debian/sonic-platform-ufispace-s9180-32x.install @@ -0,0 +1 @@ +s9180-32x/sonic_platform-1.0-py3-none-any.whl usr/share/sonic/device/x86_64-ufispace_s9180_32x-r0/pddf diff --git a/platform/barefoot/sonic-platform-modules-ufispace/debian/sonic-platform-ufispace-s9180-32x.postinst b/platform/barefoot/sonic-platform-modules-ufispace/debian/sonic-platform-ufispace-s9180-32x.postinst new file mode 100644 index 0000000000..c5d8d8f0ab --- /dev/null +++ b/platform/barefoot/sonic-platform-modules-ufispace/debian/sonic-platform-ufispace-s9180-32x.postinst @@ -0,0 +1,5 @@ +depmod -a +systemctl enable pddf-platform-init.service +systemctl start pddf-platform-init.service +systemctl enable platform-swss-restart.service +systemctl start --no-block platform-swss-restart.service diff --git a/platform/barefoot/sonic-platform-modules-ufispace/debian/sonic-platform-ufispace-s9180-32x.prerm b/platform/barefoot/sonic-platform-modules-ufispace/debian/sonic-platform-ufispace-s9180-32x.prerm new file mode 100644 index 0000000000..4b887ab38a --- /dev/null +++ b/platform/barefoot/sonic-platform-modules-ufispace/debian/sonic-platform-ufispace-s9180-32x.prerm @@ -0,0 +1,2 @@ +systemctl stop pddf-platform-init.service +systemctl disable pddf-platform-init.service \ No newline at end of file diff --git a/platform/barefoot/sonic-platform-modules-ufispace/s9180-32x/modules/Makefile b/platform/barefoot/sonic-platform-modules-ufispace/s9180-32x/modules/Makefile new file mode 100644 index 0000000000..f5b3bc4213 --- /dev/null +++ b/platform/barefoot/sonic-platform-modules-ufispace/s9180-32x/modules/Makefile @@ -0,0 +1,5 @@ +MODULE_NAME = x86-64-ufispace-s9180-32x-sys-eeprom.o i2c-smbus.o +obj-m := $(MODULE_NAME) + +CFLAGS_pddf_custom_sysstatus_module.o := -I$(M)/../../../../pddf/i2c/modules/include +KBUILD_EXTRA_SYMBOLS := $(M)/../../../../pddf/i2c/Module.symvers.PDDF diff --git a/platform/barefoot/sonic-platform-modules-ufispace/s9180-32x/modules/i2c-smbus.c b/platform/barefoot/sonic-platform-modules-ufispace/s9180-32x/modules/i2c-smbus.c new file mode 100644 index 0000000000..e04fcb8467 --- /dev/null +++ b/platform/barefoot/sonic-platform-modules-ufispace/s9180-32x/modules/i2c-smbus.c @@ -0,0 +1,433 @@ +// SPDX-License-Identifier: GPL-2.0-or-later +/* + * i2c-smbus.c - SMBus extensions to the I2C protocol + * + * Copyright (C) 2008 David Brownell + * Copyright (C) 2010-2019 Jean Delvare + */ + +#define __STDC_WANT_LIB_EXT1__ 1 +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#define _memset(s, c, n) memset(s, c, n) + +static int disable_i2c_register_spd = 1; +module_param(disable_i2c_register_spd, int, 0); + +struct i2c_smbus_alert { + struct work_struct alert; + struct i2c_client *ara; /* Alert response address */ +}; + +struct alert_data { + unsigned short addr; + enum i2c_alert_protocol type; + unsigned int data; +}; + +/* If this is the alerting device, notify its driver */ +static int smbus_do_alert(struct device *dev, void *addrp) +{ + struct i2c_client *client = i2c_verify_client(dev); + struct alert_data *data = addrp; + struct i2c_driver *driver; + + if (!client || client->addr != data->addr) + return 0; + if (client->flags & I2C_CLIENT_TEN) + return 0; + + /* + * Drivers should either disable alerts, or provide at least + * a minimal handler. Lock so the driver won't change. + */ + device_lock(dev); + if (client->dev.driver) { + driver = to_i2c_driver(client->dev.driver); + if (driver->alert) + driver->alert(client, data->type, data->data); + else + dev_warn(&client->dev, "no driver alert()!\n"); + } else + dev_dbg(&client->dev, "alert with no driver\n"); + device_unlock(dev); + + /* Stop iterating after we find the device */ + return -EBUSY; +} + +/* + * The alert IRQ handler needs to hand work off to a task which can issue + * SMBus calls, because those sleeping calls can't be made in IRQ context. + */ +static irqreturn_t smbus_alert(int irq, void *d) +{ + struct i2c_smbus_alert *alert = d; + struct i2c_client *ara; + + ara = alert->ara; + + for (;;) { + s32 status; + struct alert_data data; + + /* + * Devices with pending alerts reply in address order, low + * to high, because of slave transmit arbitration. After + * responding, an SMBus device stops asserting SMBALERT#. + * + * Note that SMBus 2.0 reserves 10-bit addresses for future + * use. We neither handle them, nor try to use PEC here. + */ + status = i2c_smbus_read_byte(ara); + if (status < 0) + break; + + data.data = status & 1; + data.addr = status >> 1; + data.type = I2C_PROTOCOL_SMBUS_ALERT; + + dev_dbg(&ara->dev, "SMBALERT# from dev 0x%02x, flag %d\n", + data.addr, data.data); + + /* Notify driver for the device which issued the alert */ + device_for_each_child(&ara->adapter->dev, &data, + smbus_do_alert); + } + + return IRQ_HANDLED; +} + +static void smbalert_work(struct work_struct *work) +{ + struct i2c_smbus_alert *alert; + + alert = container_of(work, struct i2c_smbus_alert, alert); + + smbus_alert(0, alert); + +} + +/* Setup SMBALERT# infrastructure */ +static int smbalert_probe(struct i2c_client *ara, + const struct i2c_device_id *id) +{ + struct i2c_smbus_alert_setup *setup = dev_get_platdata(&ara->dev); + struct i2c_smbus_alert *alert; + struct i2c_adapter *adapter = ara->adapter; + int res, irq; + + alert = devm_kzalloc(&ara->dev, sizeof(struct i2c_smbus_alert), + GFP_KERNEL); + if (!alert) + return -ENOMEM; + + if (setup) { + irq = setup->irq; + } else { + irq = of_irq_get_byname(adapter->dev.of_node, "smbus_alert"); + if (irq <= 0) + return irq; + } + + INIT_WORK(&alert->alert, smbalert_work); + alert->ara = ara; + + if (irq > 0) { + res = devm_request_threaded_irq(&ara->dev, irq, + NULL, smbus_alert, + IRQF_SHARED | IRQF_ONESHOT, + "smbus_alert", alert); + if (res) + return res; + } + + i2c_set_clientdata(ara, alert); + dev_info(&adapter->dev, "supports SMBALERT#\n"); + + return 0; +} + +/* IRQ and memory resources are managed so they are freed automatically */ +#if LINUX_VERSION_CODE < KERNEL_VERSION(6, 1, 0) +static int +#else +static void +#endif +smbalert_remove(struct i2c_client *ara) +{ + struct i2c_smbus_alert *alert = i2c_get_clientdata(ara); + + cancel_work_sync(&alert->alert); +#if LINUX_VERSION_CODE < KERNEL_VERSION(6, 1, 0) + return 0; +#endif +} + +static const struct i2c_device_id smbalert_ids[] = { + { "smbus_alert", 0 }, + { /* LIST END */ } +}; +MODULE_DEVICE_TABLE(i2c, smbalert_ids); + +static struct i2c_driver smbalert_driver = { + .driver = { + .name = "smbus_alert", + }, + .probe = smbalert_probe, + .remove = smbalert_remove, + .id_table = smbalert_ids, +}; + +/** + * i2c_handle_smbus_alert - Handle an SMBus alert + * @ara: the ARA client on the relevant adapter + * Context: can't sleep + * + * Helper function to be called from an I2C bus driver's interrupt + * handler. It will schedule the alert work, in turn calling the + * corresponding I2C device driver's alert function. + * + * It is assumed that ara is a valid i2c client previously returned by + * i2c_new_smbus_alert_device(). + */ +int i2c_handle_smbus_alert(struct i2c_client *ara) +{ + struct i2c_smbus_alert *alert = i2c_get_clientdata(ara); + + return schedule_work(&alert->alert); +} +EXPORT_SYMBOL_GPL(i2c_handle_smbus_alert); + +module_i2c_driver(smbalert_driver); + +#if IS_ENABLED(CONFIG_I2C_SLAVE) +#define SMBUS_HOST_NOTIFY_LEN 3 +struct i2c_slave_host_notify_status { + u8 index; + u8 addr; +}; + +static int i2c_slave_host_notify_cb(struct i2c_client *client, + enum i2c_slave_event event, u8 *val) +{ + struct i2c_slave_host_notify_status *status = client->dev.platform_data; + + switch (event) { + case I2C_SLAVE_WRITE_RECEIVED: + /* We only retrieve the first byte received (addr) + * since there is currently no support to retrieve the data + * parameter from the client. + */ + if (status->index == 0) + status->addr = *val; + if (status->index < U8_MAX) + status->index++; + break; + case I2C_SLAVE_STOP: + if (status->index == SMBUS_HOST_NOTIFY_LEN) + i2c_handle_smbus_host_notify(client->adapter, + status->addr); + fallthrough; + case I2C_SLAVE_WRITE_REQUESTED: + status->index = 0; + break; + case I2C_SLAVE_READ_REQUESTED: + case I2C_SLAVE_READ_PROCESSED: + *val = 0xff; + break; + } + + return 0; +} + +/** + * i2c_new_slave_host_notify_device - get a client for SMBus host-notify support + * @adapter: the target adapter + * Context: can sleep + * + * Setup handling of the SMBus host-notify protocol on a given I2C bus segment. + * + * Handling is done by creating a device and its callback and handling data + * received via the SMBus host-notify address (0x8) + * + * This returns the client, which should be ultimately freed using + * i2c_free_slave_host_notify_device(); or an ERRPTR to indicate an error. + */ +struct i2c_client *i2c_new_slave_host_notify_device(struct i2c_adapter *adapter) +{ + struct i2c_board_info host_notify_board_info = { + I2C_BOARD_INFO("smbus_host_notify", 0x08), + .flags = I2C_CLIENT_SLAVE, + }; + struct i2c_slave_host_notify_status *status; + struct i2c_client *client; + int ret; + + status = kzalloc(sizeof(struct i2c_slave_host_notify_status), + GFP_KERNEL); + if (!status) + return ERR_PTR(-ENOMEM); + + host_notify_board_info.platform_data = status; + + client = i2c_new_client_device(adapter, &host_notify_board_info); + if (IS_ERR(client)) { + kfree(status); + return client; + } + + ret = i2c_slave_register(client, i2c_slave_host_notify_cb); + if (ret) { + i2c_unregister_device(client); + kfree(status); + return ERR_PTR(ret); + } + + return client; +} +EXPORT_SYMBOL_GPL(i2c_new_slave_host_notify_device); + +/** + * i2c_free_slave_host_notify_device - free the client for SMBus host-notify + * support + * @client: the client to free + * Context: can sleep + * + * Free the i2c_client allocated via i2c_new_slave_host_notify_device + */ +void i2c_free_slave_host_notify_device(struct i2c_client *client) +{ + if (IS_ERR_OR_NULL(client)) + return; + + i2c_slave_unregister(client); + kfree(client->dev.platform_data); + i2c_unregister_device(client); +} +EXPORT_SYMBOL_GPL(i2c_free_slave_host_notify_device); +#endif + +/* + * SPD is not part of SMBus but we include it here for convenience as the + * target systems are the same. + * Restrictions to automatic SPD instantiation: + * - Only works if all filled slots have the same memory type + * - Only works for DDR2, DDR3 and DDR4 for now + * - Only works on systems with 1 to 4 memory slots + */ +#if IS_ENABLED(CONFIG_DMI) +void i2c_register_spd(struct i2c_adapter *adap) +{ + int n, slot_count = 0, dimm_count = 0; + u16 handle; + u8 common_mem_type = 0x0, mem_type; + u64 mem_size; + const char *name; + + //disable spd scan to prevent address conflict between spd and sys eeprom + if (disable_i2c_register_spd == 1) { + return; + } + + while ((handle = dmi_memdev_handle(slot_count)) != 0xffff) { + slot_count++; + + /* Skip empty slots */ + mem_size = dmi_memdev_size(handle); + if (!mem_size) + continue; + + /* Skip undefined memory type */ + mem_type = dmi_memdev_type(handle); + if (mem_type <= 0x02) /* Invalid, Other, Unknown */ + continue; + + if (!common_mem_type) { + /* First filled slot */ + common_mem_type = mem_type; + } else { + /* Check that all filled slots have the same type */ + if (mem_type != common_mem_type) { + dev_warn(&adap->dev, + "Different memory types mixed, not instantiating SPD\n"); + return; + } + } + dimm_count++; + } + + /* No useful DMI data, bail out */ + if (!dimm_count) + return; + + dev_info(&adap->dev, "%d/%d memory slots populated (from DMI)\n", + dimm_count, slot_count); + + if (slot_count > 4) { + dev_warn(&adap->dev, + "Systems with more than 4 memory slots not supported yet, not instantiating SPD\n"); + return; + } + + switch (common_mem_type) { + case 0x13: /* DDR2 */ + case 0x18: /* DDR3 */ + case 0x1C: /* LPDDR2 */ + case 0x1D: /* LPDDR3 */ + name = "spd"; + break; + case 0x1A: /* DDR4 */ + case 0x1E: /* LPDDR4 */ + name = "ee1004"; + break; + default: + dev_info(&adap->dev, + "Memory type 0x%02x not supported yet, not instantiating SPD\n", + common_mem_type); + return; + } + + /* + * We don't know in which slots the memory modules are. We could + * try to guess from the slot names, but that would be rather complex + * and unreliable, so better probe all possible addresses until we + * have found all memory modules. + */ + for (n = 0; n < slot_count && dimm_count; n++) { + struct i2c_board_info info; + unsigned short addr_list[2]; + +#ifdef __STDC_LIB_EXT1__ + memset_s(&info, sizeof(struct i2c_board_info), 0, sizeof(struct i2c_board_info)); +#else + _memset(&info, 0, sizeof(struct i2c_board_info)); +#endif + strlcpy(info.type, name, I2C_NAME_SIZE); + addr_list[0] = 0x50 + n; + addr_list[1] = I2C_CLIENT_END; + + if (!IS_ERR(i2c_new_scanned_device(adap, &info, addr_list, NULL))) { + dev_info(&adap->dev, + "Successfully instantiated SPD at 0x%hx\n", + addr_list[0]); + dimm_count--; + } + } +} +EXPORT_SYMBOL_GPL(i2c_register_spd); +#endif + +MODULE_AUTHOR("Jean Delvare "); +MODULE_DESCRIPTION("SMBus protocol extensions support"); +MODULE_LICENSE("GPL"); diff --git a/platform/barefoot/sonic-platform-modules-ufispace/s9180-32x/modules/x86-64-ufispace-s9180-32x-sys-eeprom.c b/platform/barefoot/sonic-platform-modules-ufispace/s9180-32x/modules/x86-64-ufispace-s9180-32x-sys-eeprom.c new file mode 100644 index 0000000000..f2f27cb0ae --- /dev/null +++ b/platform/barefoot/sonic-platform-modules-ufispace/s9180-32x/modules/x86-64-ufispace-s9180-32x-sys-eeprom.c @@ -0,0 +1,282 @@ +/* + * Copyright (C) 1998, 1999 Frodo Looijaard and + * Philip Edelbrock + * Copyright (C) 2003 Greg Kroah-Hartman + * Copyright (C) 2003 IBM Corp. + * Copyright (C) 2004 Jean Delvare + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +/* enable dev_dbg print out */ +//#define DEBUG + +#define __STDC_WANT_LIB_EXT1__ 1 +#include +#include +#include +#include +#include +#include +#include +#include + +#define _memset(s, c, n) memset(s, c, n) + +/* Addresses to scan */ +static const unsigned short normal_i2c[] = { /*0x50, 0x51, 0x52, 0x53, 0x54, + 0x55, 0x56, 0x57,*/ I2C_CLIENT_END }; + +/* Size of EEPROM in bytes */ +#define EEPROM_SIZE 512 + +#define SLICE_BITS (6) +#define SLICE_SIZE (1 << SLICE_BITS) +#define SLICE_NUM (EEPROM_SIZE/SLICE_SIZE) + +/* Each client has this additional data */ +struct eeprom_data { + struct mutex update_lock; + u8 valid; /* bitfield, bit!=0 if slice is valid */ + unsigned long last_updated[SLICE_NUM]; /* In jiffies, 8 slices */ + u8 data[EEPROM_SIZE]; /* Register values */ +}; + + +static void sys_eeprom_update_client(struct i2c_client *client, u8 slice) +{ + struct eeprom_data *data = i2c_get_clientdata(client); + int i, j; + int ret; + int addr; + + mutex_lock(&data->update_lock); + + if (!(data->valid & (1 << slice)) || + time_after(jiffies, data->last_updated[slice] + 300 * HZ)) { + dev_dbg(&client->dev, "Starting eeprom update, slice %u\n", slice); + + addr = slice << SLICE_BITS; + + ret = i2c_smbus_write_byte_data(client, (u8)((addr >> 8) & 0xFF), (u8)(addr & 0xFF)); + /* select the eeprom address */ + if (ret < 0) { + dev_err(&client->dev, "address set failed\n"); + goto exit; + } + + if (!i2c_check_functionality(client->adapter, I2C_FUNC_SMBUS_READ_BYTE)) { + goto exit; + } + + for (i = slice << SLICE_BITS; i < (slice + 1) << SLICE_BITS; i+= SLICE_SIZE) { + for (j = i; j < (i+SLICE_SIZE); j++) { + int res; + + res = i2c_smbus_read_byte(client); + if (res < 0) { + goto exit; + } + + data->data[j] = res & 0xFF; + } + } + + data->last_updated[slice] = jiffies; + data->valid |= (1 << slice); + } +exit: + mutex_unlock(&data->update_lock); +} + +static ssize_t sys_eeprom_read(struct file *filp, struct kobject *kobj, + struct bin_attribute *bin_attr, + char *buf, loff_t off, size_t count) +{ + struct i2c_client *client = to_i2c_client(container_of(kobj, struct device, kobj)); + struct eeprom_data *data = i2c_get_clientdata(client); + u8 slice; + + if (off > EEPROM_SIZE) { + return 0; + } + if (off + count > EEPROM_SIZE) { + count = EEPROM_SIZE - off; + } + if (count == 0) { + return 0; + } + + /* Only refresh slices which contain requested bytes */ + for (slice = off >> SLICE_BITS; slice <= (off + count - 1) >> SLICE_BITS; slice++) { + sys_eeprom_update_client(client, slice); + } + + memcpy(buf, &data->data[off], count); + + return count; +} + +static ssize_t sys_eeprom_write(struct file *filp, struct kobject *kobj, + struct bin_attribute *bin_attr, + char *buf, loff_t off, size_t count) +{ + struct i2c_client *client = to_i2c_client(container_of(kobj, struct device, kobj)); + struct eeprom_data *data = i2c_get_clientdata(client); + int ret; + int i; + u8 cmd; + u16 value16; + + dev_dbg(&client->dev, "sys_eeprom_write off=%d, count=%d\n", (int)off, (int)count); + + if (off > EEPROM_SIZE) { + return 0; + } + if (off + count > EEPROM_SIZE) { + count = EEPROM_SIZE - off; + } + if (count == 0) { + return 0; + } + + mutex_lock(&data->update_lock); + + for(i=0; i < count; i++) { + /* write command */ + cmd = (off >> 8) & 0xff; + value16 = off & 0xff; + value16 |= buf[i] << 8; + ret = i2c_smbus_write_word_data(client, cmd, value16); + + if (ret < 0) { + dev_err(&client->dev, "write address failed at %d \n", (int)off); + goto exit; + } + + off++; + + /* need to wait for write complete */ + udelay(10000); + } +exit: + mutex_unlock(&data->update_lock); + /* force to update client when reading */ + for(i=0; i < SLICE_NUM; i++) { + data->last_updated[i] = 0; + } + + return count; +} + +static struct bin_attribute sys_eeprom_attr = { + .attr = { + .name = "eeprom", + .mode = S_IRUGO | S_IWUSR, + }, + .size = EEPROM_SIZE, + .read = sys_eeprom_read, + .write = sys_eeprom_write, +}; + +/* Return 0 if detection is successful, -ENODEV otherwise */ +static int sys_eeprom_detect(struct i2c_client *client, struct i2c_board_info *info) +{ + struct i2c_adapter *adapter = client->adapter; + + /* EDID EEPROMs are often 24C00 EEPROMs, which answer to all + addresses 0x50-0x57, but we only care about 0x51 and 0x55. So decline + attaching to addresses >= 0x56 on DDC buses */ + if (!(adapter->class & I2C_CLASS_SPD) && client->addr >= 0x56) { + return -ENODEV; + } + + if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_READ_BYTE) + && !i2c_check_functionality(adapter, I2C_FUNC_SMBUS_WRITE_BYTE_DATA)) { + return -ENODEV; + } + + strlcpy(info->type, "eeprom", I2C_NAME_SIZE); + + return 0; +} + +static int sys_eeprom_probe(struct i2c_client *client, + const struct i2c_device_id *id) +{ + struct eeprom_data *data; + int err; + + if (!(data = kzalloc(sizeof(struct eeprom_data), GFP_KERNEL))) { + err = -ENOMEM; + goto exit; + } + +#ifdef __STDC_LIB_EXT1__ + memset_s(data->data, EEPROM_SIZE, 0xff, EEPROM_SIZE); +#else + _memset(data->data, 0xff, EEPROM_SIZE); +#endif + i2c_set_clientdata(client, data); + mutex_init(&data->update_lock); + + /* create the sysfs eeprom file */ + err = sysfs_create_bin_file(&client->dev.kobj, &sys_eeprom_attr); + if (err) { + goto exit_kfree; + } + + return 0; + +exit_kfree: + kfree(data); +exit: + return err; +} + +#if LINUX_VERSION_CODE < KERNEL_VERSION(6, 1, 0) +static int +#else +static void +#endif +sys_eeprom_remove(struct i2c_client *client) +{ + sysfs_remove_bin_file(&client->dev.kobj, &sys_eeprom_attr); + kfree(i2c_get_clientdata(client)); + +#if LINUX_VERSION_CODE < KERNEL_VERSION(6, 1, 0) + return 0; +#endif +} + +static const struct i2c_device_id sys_eeprom_id[] = { + { "sys_eeprom", 0 }, + { } +}; + +static struct i2c_driver sys_eeprom_driver = { + .driver = { + .name = "sys_eeprom", + }, + .probe = sys_eeprom_probe, + .remove = sys_eeprom_remove, + .id_table = sys_eeprom_id, + + .class = I2C_CLASS_DDC | I2C_CLASS_SPD, + .detect = sys_eeprom_detect, + .address_list = normal_i2c, +}; + +module_i2c_driver(sys_eeprom_driver); + +MODULE_AUTHOR("Jason "); +MODULE_DESCRIPTION("UfiSpace System EEPROM driver"); +MODULE_LICENSE("GPL"); diff --git a/platform/barefoot/sonic-platform-modules-ufispace/s9180-32x/service/pddf-platform-init.service b/platform/barefoot/sonic-platform-modules-ufispace/s9180-32x/service/pddf-platform-init.service new file mode 120000 index 0000000000..0fd9f25b6c --- /dev/null +++ b/platform/barefoot/sonic-platform-modules-ufispace/s9180-32x/service/pddf-platform-init.service @@ -0,0 +1 @@ +../../../../pddf/i2c/service/pddf-platform-init.service \ No newline at end of file diff --git a/platform/barefoot/sonic-platform-modules-ufispace/s9180-32x/service/platform-swss-restart.service b/platform/barefoot/sonic-platform-modules-ufispace/s9180-32x/service/platform-swss-restart.service new file mode 100644 index 0000000000..323a4b827c --- /dev/null +++ b/platform/barefoot/sonic-platform-modules-ufispace/s9180-32x/service/platform-swss-restart.service @@ -0,0 +1,13 @@ +[Unit] +Description=SWSS restart service +After=swss.service +DefaultDependencies=no + +[Service] +Type=oneshot +ExecStart=/usr/local/bin/platform_swss_restart.sh +RemainAfterExit=yes + +[Install] +WantedBy=multi-user.target + diff --git a/platform/barefoot/sonic-platform-modules-ufispace/s9180-32x/sonic_platform/__init__.py b/platform/barefoot/sonic-platform-modules-ufispace/s9180-32x/sonic_platform/__init__.py new file mode 100644 index 0000000000..593867d31c --- /dev/null +++ b/platform/barefoot/sonic-platform-modules-ufispace/s9180-32x/sonic_platform/__init__.py @@ -0,0 +1,4 @@ +# All the derived classes for PDDF +__all__ = ["platform", "chassis", "sfp", "psu", "thermal", "fan"] +from . import platform + diff --git a/platform/barefoot/sonic-platform-modules-ufispace/s9180-32x/sonic_platform/chassis.py b/platform/barefoot/sonic-platform-modules-ufispace/s9180-32x/sonic_platform/chassis.py new file mode 100644 index 0000000000..698356fa88 --- /dev/null +++ b/platform/barefoot/sonic-platform-modules-ufispace/s9180-32x/sonic_platform/chassis.py @@ -0,0 +1,256 @@ +#!/usr/bin/env python + +############################################################################# +# PDDF +# Module contains an implementation of SONiC Chassis API +# +############################################################################# + +try: + import time + import subprocess + from sonic_platform_pddf_base.pddf_chassis import PddfChassis +except ImportError as e: + raise ImportError(str(e) + "- required module not found") + +NUM_COMPONENT = 2 + +class Chassis(PddfChassis): + """ + PDDF Platform-specific Chassis class + """ + + SYSLED_DEV_NAME = "SYS_LED" + port_dict = {} + + def __init__(self, pddf_data=None, pddf_plugin_data=None): + PddfChassis.__init__(self, pddf_data, pddf_plugin_data) + self._initialize_components() + + def _initialize_components(self): + from sonic_platform.component import Component + for index in range(NUM_COMPONENT): + component = Component(index) + self._component_list.append(component) + + # Provide the functions/variables below for which implementation is to be overwritten + def get_name(self): + """ + Retrieves the name of the chassis + Returns: + string: The name of the chassis + """ + # return device_info.get_hwsku() + return self._eeprom.platform_name_str() + + def initizalize_system_led(self): + return True + + def get_status_led(self): + return self.get_system_led(self.SYSLED_DEV_NAME) + + def get_system_led(self, led_device_name): + ipmi_cmd_sys_led = "ipmitool raw 0x3c 0x20 0x0" + ipmi_cmd_fantray_led = "ipmitool raw 0x3c 0x21 0x0" + + led_dict = {"SYS_LED": { + "ipmi_cmd": ipmi_cmd_sys_led, + "index": 0}, + "FAN_LED": { + "ipmi_cmd": ipmi_cmd_sys_led, + "index": 1}, + "PSU1_LED": { + "ipmi_cmd": ipmi_cmd_sys_led, + "index": 2}, + "PSU2_LED": { + "ipmi_cmd": ipmi_cmd_sys_led, + "index": 3}, + "FANTRAY1_LED": { + "ipmi_cmd": ipmi_cmd_fantray_led, + "index": 0}, + "FANTRAY2_LED": { + "ipmi_cmd": ipmi_cmd_fantray_led, + "index": 1}, + "FANTRAY3_LED": { + "ipmi_cmd": ipmi_cmd_fantray_led, + "index": 2}, + "FANTRAY4_LED": { + "ipmi_cmd": ipmi_cmd_fantray_led, + "index": 3} + } + color_dict = {0: "off", + 1: "yellow", + 2: "green"} + + if led_device_name not in led_dict.keys(): + status = "[FAILED] " + led_device_name + " is not configured" + return (status) + + ipmi_cmd = led_dict[led_device_name]["ipmi_cmd"] + index = led_dict[led_device_name]["index"] + status, output = subprocess.getstatusoutput(ipmi_cmd) + + if status != 0: + return ("ipmi_cmd error, cmd={}, status={}".format(ipmi_cmd, status)) + + color_raw = int(output.split()[index]) + + if color_raw not in color_dict.keys(): + color = "unknown" + else: + color = color_dict[color_raw] + + return (color) + + def get_change_event(self, timeout=0): + """ + Returns a nested dictionary containing all devices which have + experienced a change at chassis level + Args: + timeout: Timeout in milliseconds (optional). If timeout == 0, + this method will block until a change is detected. + Returns: + (bool, dict): + - bool: True if call successful, False if not; + - dict: A nested dictionary where key is a device type, + value is a dictionary with key:value pairs in the format of + {'device_id':'device_event'}, where device_id is the device ID + for this device and device_event. + The known devices's device_id and device_event was defined as table below. + ----------------------------------------------------------------- + device | device_id | device_event | annotate + ----------------------------------------------------------------- + 'fan' '' '0' Fan removed + '1' Fan inserted + 'sfp' '' '0' Sfp removed + '1' Sfp inserted + '2' I2C bus stuck + '3' Bad eeprom + '4' Unsupported cable + '5' High Temperature + '6' Bad cable + 'voltage' '' '0' Vout normal + '1' Vout abnormal + -------------------------------------------------------------------- + Ex. {'fan':{'0':'0', '2':'1'}, 'sfp':{'11':'0', '12':'1'}, + 'voltage':{'U20':'0', 'U21':'1'}} + Indicates that: + fan 0 has been removed, fan 2 has been inserted. + sfp 11 has been removed, sfp 12 has been inserted. + monitored voltage U20 became normal, voltage U21 became abnormal. + Note: For sfp, when event 3-6 happened, the module will not be avalaible, + XCVRD shall stop to read eeprom before SFP recovered from error status. + """ + + change_event_dict = {"fan": {}, "sfp": {}, "voltage": {}} + + start_time = time.time() + forever = False + + if timeout == 0: + forever = True + elif timeout > 0: + timeout = timeout / float(1000) # Convert to secs + else: + print("get_change_event:Invalid timeout value", timeout) + return False, change_event_dict + + end_time = start_time + timeout + if start_time > end_time: + print( + "get_change_event:" "time wrap / invalid timeout value", + timeout, + ) + return False, change_event_dict # Time wrap or possibly incorrect timeout + try: + while timeout >= 0: + # check for sfp + sfp_change_dict = self.get_transceiver_change_event() + # check for fan + # fan_change_dict = self.get_fan_change_event() + # check for voltage + # voltage_change_dict = self.get_voltage_change_event() + + if sfp_change_dict: + change_event_dict["sfp"] = sfp_change_dict + # change_event_dict["fan"] = fan_change_dict + # change_event_dict["voltage"] = voltage_change_dict + return True, change_event_dict + if forever: + time.sleep(1) + else: + timeout = end_time - time.time() + if timeout >= 1: + time.sleep(1) # We poll at 1 second granularity + else: + if timeout > 0: + time.sleep(timeout) + return True, change_event_dict + except Exception as e: + print(e) + print("get_change_event: Should not reach here.") + return False, change_event_dict + + def get_transceiver_change_event(self): + current_port_dict = {} + ret_dict = {} + + # Check for OIR events and return ret_dict + for index in range(self.platform_inventory['num_ports']): + if self._sfp_list[index].get_presence(): + current_port_dict[index] = self.plugin_data['XCVR']['plug_status']['inserted'] + else: + current_port_dict[index] = self.plugin_data['XCVR']['plug_status']['removed'] + + if len(self.port_dict) == 0: # first time + self.port_dict = current_port_dict + return {} + + if current_port_dict == self.port_dict: + return {} + + # Update reg value + for index, status in current_port_dict.items(): + if self.port_dict[index] != status: + ret_dict[index] = status + #ret_dict[str(index)] = status + self.port_dict = current_port_dict + for index, status in ret_dict.items(): + if int(status) == 1: + pass + #self._sfp_list[int(index)].check_sfp_optoe_type() + return ret_dict + + def get_reboot_cause(self): + """ + Retrieves the cause of the previous reboot + + Returns: + A tuple (string, string) where the first element is a string + containing the cause of the previous reboot. This string must be + one of the predefined strings in this class. If the first string + is "REBOOT_CAUSE_HARDWARE_OTHER", the second string can be used + to pass a description of the reboot cause. + """ + + reboot_cause_path = self.plugin_data['REBOOT_CAUSE']['reboot_cause_file'] + + try: + with open(reboot_cause_path, 'r', errors='replace') as fd: + data = fd.read() + sw_reboot_cause = data.strip() + except IOError: + sw_reboot_cause = "Unknown" + + return ('REBOOT_CAUSE_NON_HARDWARE', sw_reboot_cause) + + def get_serial_number(self): + """ + Retrieves the hardware serial number for the chassis + + Returns: + A string containing the hardware serial number for this + chassis. + """ + + return self.get_serial() \ No newline at end of file diff --git a/platform/barefoot/sonic-platform-modules-ufispace/s9180-32x/sonic_platform/component.py b/platform/barefoot/sonic-platform-modules-ufispace/s9180-32x/sonic_platform/component.py new file mode 100644 index 0000000000..8a60c0135b --- /dev/null +++ b/platform/barefoot/sonic-platform-modules-ufispace/s9180-32x/sonic_platform/component.py @@ -0,0 +1,105 @@ +############################################################################# +# +# Component contains an implementation of SONiC Platform Base API and +# provides the components firmware management function +# +############################################################################# + +try: + import subprocess + from sonic_platform_base.component_base import ComponentBase +except ImportError as e: + raise ImportError(str(e) + "- required module not found") + +BMC_CMDS = { + "BMC": "bash -c 'tmp=$(ipmitool raw 0x6 0x1) && r=($(echo \"$tmp\" | cut -d \" \" -f 4,5,16,15,14)) && echo ${r[0]}.${r[1]}.${r[4]}.${r[3]}${r[2]}'", +} + +BIOS_VERSION_PATH = "/sys/class/dmi/id/bios_version" +COMPONENT_LIST= [ + ("BIOS", "Basic Input/Output System"), + ("BMC", "BMC"), + +] + +class Component(ComponentBase): + """Platform-specific Component class""" + + DEVICE_TYPE = "component" + + def __init__(self, component_index=0): + self.index = component_index + self.name = self.get_name() + + def _run_command(self, command): + # Run bash command and print output to stdout + try: + process = subprocess.Popen( + shlex.split(command), stdout=subprocess.PIPE) + while True: + output = process.stdout.readline() + if output == '' and process.poll() is not None: + break + rc = process.poll() + if rc != 0: + return False + except Exception: + return False + return True + + def _get_bios_version(self): + # Retrieves the BIOS firmware version + try: + with open(BIOS_VERSION_PATH, 'r') as fd: + bios_version = fd.read() + return bios_version.strip() + except Exception as e: + return None + + def _get_bmc_version(self): + # Retrieves the BMC firmware version + status, value = subprocess.getstatusoutput(BMC_CMDS["BMC"]) + if not status: + return value + else: + return None + + def get_name(self): + """ + Retrieves the name of the component + Returns: + A string containing the name of the component + """ + return COMPONENT_LIST[self.index][0] + + def get_description(self): + """ + Retrieves the description of the component + Returns: + A string containing the description of the component + """ + return COMPONENT_LIST[self.index][1] + + def get_firmware_version(self): + """ + Retrieves the firmware version of module + Returns: + string: The firmware versions of the module + """ + fw_version = None + + if self.name == "BIOS": + fw_version = self._get_bios_version() + elif self.name == "BMC": + fw_version = self._get_bmc_version() + return fw_version + + def install_firmware(self, image_path): + """ + Install firmware to module + Args: + image_path: A string, path to firmware image + Returns: + A boolean, True if install successfully, False if not + """ + raise NotImplementedError diff --git a/platform/barefoot/sonic-platform-modules-ufispace/s9180-32x/sonic_platform/eeprom.py b/platform/barefoot/sonic-platform-modules-ufispace/s9180-32x/sonic_platform/eeprom.py new file mode 100644 index 0000000000..90ab1c779a --- /dev/null +++ b/platform/barefoot/sonic-platform-modules-ufispace/s9180-32x/sonic_platform/eeprom.py @@ -0,0 +1,21 @@ +#!/usr/bin/env python + +try: + from sonic_platform_pddf_base.pddf_eeprom import PddfEeprom +except ImportError as e: + raise ImportError(str(e) + "- required module not found") + + +class Eeprom(PddfEeprom): + + def __init__(self, pddf_data=None, pddf_plugin_data=None): + PddfEeprom.__init__(self, pddf_data, pddf_plugin_data) + + # Provide the functions/variables below for which implementation is to be overwritten + + def platform_name_str(self): + (is_valid, results) = self.get_tlv_field(self.eeprom_data, self._TLV_CODE_PLATFORM_NAME) + if not is_valid: + return "N/A" + + return results[2].decode('ascii') \ No newline at end of file diff --git a/platform/barefoot/sonic-platform-modules-ufispace/s9180-32x/sonic_platform/fan.py b/platform/barefoot/sonic-platform-modules-ufispace/s9180-32x/sonic_platform/fan.py new file mode 100644 index 0000000000..ab7a7a8e1b --- /dev/null +++ b/platform/barefoot/sonic-platform-modules-ufispace/s9180-32x/sonic_platform/fan.py @@ -0,0 +1,147 @@ +#!/usr/bin/env python + + +try: + from sonic_platform_pddf_base.pddf_fan import PddfFan +except ImportError as e: + raise ImportError(str(e) + "- required module not found") + + +class Fan(PddfFan): + """PDDF Platform-Specific Fan class""" + + def __init__(self, tray_idx, fan_idx=0, pddf_data=None, pddf_plugin_data=None, is_psu_fan=False, psu_index=0): + # idx is 0-based + PddfFan.__init__(self, tray_idx, fan_idx, pddf_data, pddf_plugin_data, is_psu_fan, psu_index) + + # Provide the functions/variables below for which implementation is to be overwritten + # Since psu_fan airflow direction cant be read from sysfs, it is fixed as 'F2B' or 'intake' + + def get_speed(self): + """ + Retrieves the speed of fan as a percentage of full speed + + Returns: + An integer, the percentage of full fan speed, in the range 0 (off) + to 100 (full speed) + """ + speed_percentage = 0 + if self.is_psu_fan: + attr = "psu_fan{}_speed_rpm".format(self.fan_index) + device = "PSU{}".format(self.fans_psu_index) + max_speed = int(self.plugin_data['PSU']['valmap']['PSU_FAN_MAX_SPEED']) + else: + if self.fan_index == 1: + pos = "f" + max_speed = int(self.plugin_data['FAN']['FAN_F_MAX_SPEED']) + else: + pos = "r" + max_speed = int(self.plugin_data['FAN']['FAN_R_MAX_SPEED']) + attr = "fan{}_{}_speed_rpm".format(self.fantray_index, pos) + device = "FAN-CTRL" + + output = self.pddf_obj.get_attr_name_output(device, attr) + if not output: + return speed_percentage + + output['status'] = output['status'].rstrip() + if output['status'].isalpha(): + return speed_percentage + else: + speed = int(float(output['status'])) + + speed_percentage = round((speed*100)/max_speed) + + return min(speed_percentage, 100) + + def get_speed_rpm(self): + """ + Retrieves the speed of fan in RPM + + Returns: + An integer, Speed of fan in RPM + """ + rpm_speed = 0 + if self.is_psu_fan: + attr = "psu_fan{}_speed_rpm".format(self.fan_index) + device = "PSU{}".format(self.fans_psu_index) + else: + if self.fan_index == 1: + pos = "f" + else: + pos = "r" + attr = "fan{}_{}_speed_rpm".format(self.fantray_index, pos) + device = "FAN-CTRL" + + output = self.pddf_obj.get_attr_name_output(device, attr) + + if output is None: + return rpm_speed + + output['status'] = output['status'].rstrip() + if output['status'].isalpha(): + return rpm_speed + else: + rpm_speed = int(float(output['status'])) + + return rpm_speed + + def get_direction(self): + """ + Retrieves the direction of fan + Returns: + A string, either FAN_DIRECTION_INTAKE or FAN_DIRECTION_EXHAUST + depending on fan direction + """ + + return self.FAN_DIRECTION_EXHAUST + + def get_presence(self): + """ + Retrieves the presence of the device + Returns: + bool: True if device is present, False if not + """ + presence = False + if self.is_psu_fan: + attr = "psu_present" + device = "PSU{}".format(self.fans_psu_index) + else: + attr = "fan{}_present".format(self.fantray_index) + device = "FAN-CTRL" + + output = self.pddf_obj.get_attr_name_output(device, attr) + if not output: + return presence + + + mode = output['mode'] + val = output['status'].strip() + vmap = self.plugin_data['FAN']['present'][mode]['valmap'] + + if val in vmap: + presence = vmap[val] + + return presence + + def get_status(self): + """ + Retrieves the operational status of the device + + Returns: + A boolean value, True if device is operating properly, False if not + """ + speed = self.get_speed_rpm() + status = True if (speed != 0) else False + return status + + def get_target_speed(self): + """ + Retrieves the target (expected) speed of the fan + Returns: + An integer, the percentage of full fan speed, in the range 0 (off) + to 100 (full speed) + """ + + return self.get_speed() + diff --git a/platform/barefoot/sonic-platform-modules-ufispace/s9180-32x/sonic_platform/fan_drawer.py b/platform/barefoot/sonic-platform-modules-ufispace/s9180-32x/sonic_platform/fan_drawer.py new file mode 100644 index 0000000000..3b9bb607f6 --- /dev/null +++ b/platform/barefoot/sonic-platform-modules-ufispace/s9180-32x/sonic_platform/fan_drawer.py @@ -0,0 +1,17 @@ +#!/usr/bin/env python + + +try: + from sonic_platform_pddf_base.pddf_fan_drawer import PddfFanDrawer +except ImportError as e: + raise ImportError(str(e) + "- required module not found") + + +class FanDrawer(PddfFanDrawer): + """PDDF Platform-Specific Fan-Drawer class""" + + def __init__(self, tray_idx, pddf_data=None, pddf_plugin_data=None): + # idx is 0-based + PddfFanDrawer.__init__(self, tray_idx, pddf_data, pddf_plugin_data) + + # Provide the functions/variables below for which implementation is to be overwritten diff --git a/platform/barefoot/sonic-platform-modules-ufispace/s9180-32x/sonic_platform/platform.py b/platform/barefoot/sonic-platform-modules-ufispace/s9180-32x/sonic_platform/platform.py new file mode 100644 index 0000000000..406b1179ae --- /dev/null +++ b/platform/barefoot/sonic-platform-modules-ufispace/s9180-32x/sonic_platform/platform.py @@ -0,0 +1,25 @@ +#!/usr/bin/env python + +############################################################################# +# PDDF +# Module contains an implementation of SONiC Platform Base API and +# provides the platform information +# +############################################################################# + + +try: + from sonic_platform_pddf_base.pddf_platform import PddfPlatform +except ImportError as e: + raise ImportError(str(e) + "- required module not found") + + +class Platform(PddfPlatform): + """ + PDDF Platform-Specific Platform Class + """ + + def __init__(self): + PddfPlatform.__init__(self) + + # Provide the functions/variables below for which implementation is to be overwritten diff --git a/platform/barefoot/sonic-platform-modules-ufispace/s9180-32x/sonic_platform/psu.py b/platform/barefoot/sonic-platform-modules-ufispace/s9180-32x/sonic_platform/psu.py new file mode 100644 index 0000000000..9092483516 --- /dev/null +++ b/platform/barefoot/sonic-platform-modules-ufispace/s9180-32x/sonic_platform/psu.py @@ -0,0 +1,67 @@ +#!/usr/bin/env python + + +try: + from sonic_platform_pddf_base.pddf_psu import PddfPsu +except ImportError as e: + raise ImportError (str(e) + "- required module not found") + + +class Psu(PddfPsu): + """PDDF Platform-Specific PSU class""" + + PLATFORM_PSU_CAPACITY = 550 + + def __init__(self, index, pddf_data=None, pddf_plugin_data=None): + PddfPsu.__init__(self, index, pddf_data, pddf_plugin_data) + + # Provide the functions/variables below for which implementation is to be overwritten + def get_maximum_supplied_power(self): + """ + Retrieves the maximum supplied power by PSU (or PSU capacity) + Returns: + A float number, the maximum power output in Watts. + e.g. 1200.1 + """ + return float(self.PLATFORM_PSU_CAPACITY) + + def get_power(self): + """ + Retrieves current energy supplied by PSU + + Returns: + A float number, the power in watts, + e.g. 302.6 + """ + + # power is returned in micro watts + return round(float(self.get_voltage()*self.get_current()), 2) + + def get_capacity(self): + """ + Retrieves the maximum supplied power by PSU (or PSU capacity) + Returns: + A float number, the maximum power output in Watts. + e.g. 1200.1 + """ + return self.get_maximum_supplied_power() + + def get_type(self): + """ + Gets the type of the PSU + + Returns: + A string, the type of PSU (AC/DC) + """ + mfr = self.get_mfr_id() + model = self.get_model() + ptype = self.plugin_data['PSU']['valmap']['DEFAULT_TYPE'] + + if mfr and model : + for dev in self.plugin_data['PSU']['psu_support_list']: + if dev['Manufacturer'] == mfr and dev['Name'] == model: + ptype = dev['Type'] + break + + + return ptype diff --git a/platform/barefoot/sonic-platform-modules-ufispace/s9180-32x/sonic_platform/sfp.py b/platform/barefoot/sonic-platform-modules-ufispace/s9180-32x/sonic_platform/sfp.py new file mode 100644 index 0000000000..d9b6e491be --- /dev/null +++ b/platform/barefoot/sonic-platform-modules-ufispace/s9180-32x/sonic_platform/sfp.py @@ -0,0 +1,17 @@ +#!/usr/bin/env python + +try: + from sonic_platform_pddf_base.pddf_sfp import PddfSfp +except ImportError as e: + raise ImportError (str(e) + "- required module not found") + + +class Sfp(PddfSfp): + """ + PDDF Platform-Specific Sfp class + """ + + def __init__(self, index, pddf_data=None, pddf_plugin_data=None): + PddfSfp.__init__(self, index, pddf_data, pddf_plugin_data) + + # Provide the functions/variables below for which implementation is to be overwritten diff --git a/platform/barefoot/sonic-platform-modules-ufispace/s9180-32x/sonic_platform/thermal.py b/platform/barefoot/sonic-platform-modules-ufispace/s9180-32x/sonic_platform/thermal.py new file mode 100644 index 0000000000..77d6ec7ae8 --- /dev/null +++ b/platform/barefoot/sonic-platform-modules-ufispace/s9180-32x/sonic_platform/thermal.py @@ -0,0 +1,17 @@ +#!/usr/bin/env python + + +try: + from sonic_platform_pddf_base.pddf_thermal import PddfThermal +except ImportError as e: + raise ImportError(str(e) + "- required module not found") + + + +class Thermal(PddfThermal): + """PDDF Platform-Specific Thermal class""" + + def __init__(self, index, pddf_data=None, pddf_plugin_data=None, is_psu_thermal=False, psu_index=0): + PddfThermal.__init__(self, index, pddf_data, pddf_plugin_data, is_psu_thermal, psu_index) + + # Provide the functions/variables below for which implementation is to be overwritten diff --git a/platform/barefoot/sonic-platform-modules-ufispace/s9180-32x/sonic_platform_setup.py b/platform/barefoot/sonic-platform-modules-ufispace/s9180-32x/sonic_platform_setup.py new file mode 100644 index 0000000000..3661c84a0c --- /dev/null +++ b/platform/barefoot/sonic-platform-modules-ufispace/s9180-32x/sonic_platform_setup.py @@ -0,0 +1,27 @@ +from setuptools import setup + +setup( + name='sonic-platform', + version='1.0', + description='SONiC platform API implementation on ufispace platform', + license='Apache 2.0', + author='SONiC Team', + author_email='linuxnetdev@microsoft.com', + url='https://github.com/Azure/sonic-buildimage', + maintainer='Leo Lin', + maintainer_email='leo.yt.lin@ufispace.com', + packages=['sonic_platform'], + classifiers=[ + 'Development Status :: 3 - Alpha', + 'Environment :: Plugins', + 'Intended Audience :: Developers', + 'Intended Audience :: Information Technology', + 'Intended Audience :: System Administrators', + 'License :: OSI Approved :: Apache Software License', + 'Natural Language :: English', + 'Operating System :: POSIX :: Linux', + 'Programming Language :: Python :: 3.7', + 'Topic :: Utilities', + ], + keywords='sonic SONiC platform PLATFORM', +) diff --git a/platform/barefoot/sonic-platform-modules-ufispace/s9180-32x/utils/pddf_post_device_create.sh b/platform/barefoot/sonic-platform-modules-ufispace/s9180-32x/utils/pddf_post_device_create.sh new file mode 100755 index 0000000000..91cda13dc5 --- /dev/null +++ b/platform/barefoot/sonic-platform-modules-ufispace/s9180-32x/utils/pddf_post_device_create.sh @@ -0,0 +1,96 @@ +#!/bin/bash + +# init Host GPIO 0x74 +i2cset -f -y -r 0 0x74 4 0x00 +i2cset -f -y -r 0 0x74 5 0x00 +i2cset -f -y -r 0 0x74 2 0x0F +i2cset -f -y -r 0 0x74 3 0xDF +i2cset -f -y -r 0 0x74 6 0x08 +i2cset -f -y -r 0 0x74 7 0x1F + +gpio_base=511 + +# gpio sysfs active_low - ABS Port 0-31 +# gpio 480-511 +start=$((gpio_base-31)) +end=$gpio_base +for (( i=$start; i<=$end; i++ )) +do + echo 1 > /sys/class/gpio/gpio${i}/active_low +done + +# gpio sysfs active_low - Intr Port 0-31 +# gpio 448-479 +start=$((gpio_base-63)) +end=$((gpio_base-32)) +for (( i=$start; i<=$end; i++ )) +do + echo 1 > /sys/class/gpio/gpio${i}/active_low +done + + +# gpio sysfs active_low - SFP Port +# gpio 432-447 +sfp_active_low_array=(1 1 1 1 0 0 1 1 \ + 0 0 0 0 1 1 1 1) +start=$((gpio_base-79)) +end=$((gpio_base-64)) +for (( i=$start; i<=$end; i++ )) +do + echo ${sfp_active_low_array[$((i-start))]} > /sys/class/gpio/gpio${i}/active_low +done + +# gpio sysfs active_low - LP Mode Mode Port 0-31 +# gpio 400-431 +start=$((gpio_base-111)) +end=$((gpio_base-80)) +for (( i=$start; i<=$end; i++ )) +do + echo 0 > /sys/class/gpio/gpio${i}/active_low +done + +# gpio sysfs active_low - RST Mode Port 0-31 +# gpio 368-399 +start=$((gpio_base-143)) +end=$((gpio_base-112)) +for (( i=$start; i<=$end; i++ )) +do + echo 1 > /sys/class/gpio/gpio${i}/active_low + echo 0 > /sys/class/gpio/gpio${i}/value +done + +# init QSFP port name +qsfp_bus_array=(10 9 12 11 14 13 16 15 18 17 \ + 20 19 22 21 24 23 26 25 28 27 \ + 30 29 32 31 34 33 36 35 38 37 \ + 40 39) +for i in {0..31}; +do + echo $((i + 1)) > /sys/bus/i2c/devices/${qsfp_bus_array[i]}-0050/port_name + #echo "echo $((i + 1)) > /sys/bus/i2c/devices/${qsfp_bus_array[i]}-0050/port_name" +done + +# init SFP port name +sfp_bus_array=(45 46) +for i in {0..1}; +do + echo $((i + 33)) > /sys/bus/i2c/devices/${sfp_bus_array[i]}-0050/port_name +done + +# _mac_vdd_init +# vid to mac vdd value mapping +vdd_val_array=( 0.85 0.82 0.77 0.87 0.74 0.84 0.79 0.89 ) +# vid to rov reg value mapping +rov_reg_array=( 0x24 0x21 0x1C 0x26 0x19 0x23 0x1E 0x28 ) + +reg_val=$(eval "i2cget -f -y 44 0x33 0x42 2>/dev/null") +vid=$(($reg_val & 0x7)) +mac_vdd_val=${vdd_val_array[vid]} +rov_reg=${rov_reg_array[vid]} +i2cset -f -y -r 8 0x22 0x21 ${rov_reg} w 2>/dev/null + +#disable bmc watchdog +timeout 3 ipmitool mc watchdog off + +echo "PDDF device post-create completed" + diff --git a/platform/barefoot/sonic-platform-modules-ufispace/s9180-32x/utils/pddf_post_driver_install.sh b/platform/barefoot/sonic-platform-modules-ufispace/s9180-32x/utils/pddf_post_driver_install.sh new file mode 100755 index 0000000000..ed2559977e --- /dev/null +++ b/platform/barefoot/sonic-platform-modules-ufispace/s9180-32x/utils/pddf_post_driver_install.sh @@ -0,0 +1,2 @@ +#!/bin/bash +echo "PDDF driver post-install completed" diff --git a/platform/barefoot/sonic-platform-modules-ufispace/s9180-32x/utils/pddf_pre_driver_install.sh b/platform/barefoot/sonic-platform-modules-ufispace/s9180-32x/utils/pddf_pre_driver_install.sh new file mode 100755 index 0000000000..a82d23333b --- /dev/null +++ b/platform/barefoot/sonic-platform-modules-ufispace/s9180-32x/utils/pddf_pre_driver_install.sh @@ -0,0 +1,5 @@ +#!/bin/bash +#rmmod gpio_ich +modprobe -rq i2c_i801 +modprobe -rq i2c_smbus +echo "PDDF driver pre-install completed" diff --git a/platform/barefoot/sonic-platform-modules-ufispace/s9180-32x/utils/pddf_switch_svc.py b/platform/barefoot/sonic-platform-modules-ufispace/s9180-32x/utils/pddf_switch_svc.py new file mode 100755 index 0000000000..f2b3645ba6 --- /dev/null +++ b/platform/barefoot/sonic-platform-modules-ufispace/s9180-32x/utils/pddf_switch_svc.py @@ -0,0 +1,55 @@ +#!/usr/bin/env python +# Script to stop and start the respective platforms default services. +# This will be used while switching the pddf->non-pddf mode and vice versa +import commands + +def check_pddf_support(): + return True + +def stop_platform_svc(): + + ''' + status, output = commands.getstatusoutput("/usr/local/bin/platform_utility.py deinit") + if status: + print "platform_utility.py deinit command failed %d"%status + return False + ''' + + # HACK , stop the pddf-platform-init service if it is active + status, output = commands.getstatusoutput("systemctl stop pddf-platform-init.service") + if status: + print "Stop pddf-platform-init.service along with other platform serives failed %d"%status + return False + + return True + +def start_platform_svc(): + + ''' + status, output = commands.getstatusoutput("/usr/local/bin/platform_utility.py init") + if status: + print "platform_utility.py init command failed %d"%status + return False + + return True + ''' + return True + +def start_platform_pddf(): + + status, output = commands.getstatusoutput("systemctl start pddf-platform-init.service") + if status: + print "Start pddf-platform-init.service failed %d"%status + return False + + return True + +def stop_platform_pddf(): + + status, output = commands.getstatusoutput("systemctl stop pddf-platform-init.service") + if status: + print "Stop pddf-platform-init.service failed %d"%status + return False + + return True + diff --git a/platform/barefoot/sonic-platform-modules-ufispace/s9180-32x/utils/platform_swss_restart.sh b/platform/barefoot/sonic-platform-modules-ufispace/s9180-32x/utils/platform_swss_restart.sh new file mode 100755 index 0000000000..2509e36929 --- /dev/null +++ b/platform/barefoot/sonic-platform-modules-ufispace/s9180-32x/utils/platform_swss_restart.sh @@ -0,0 +1,5 @@ +#!/bin/bash + +service swss restart +echo "SWSS service restarted" + diff --git a/platform/broadcom/one-image.mk b/platform/broadcom/one-image.mk index 6c668ee689..059d71f64f 100755 --- a/platform/broadcom/one-image.mk +++ b/platform/broadcom/one-image.mk @@ -83,7 +83,14 @@ $(SONIC_ONE_IMAGE)_LAZY_INSTALLS += $(DELL_S6000_PLATFORM_MODULE) \ $(RAGILE_RA_B6920_4S_PLATFORM_MODULE) \ $(NOKIA_IXR7250_PLATFORM_MODULE) \ $(TENCENT_TCS8400_PLATFORM_MODULE) \ - $(TENCENT_TCS9400_PLATFORM_MODULE) + $(TENCENT_TCS9400_PLATFORM_MODULE) \ + $(UFISPACE_S9300_32D_PLATFORM_MODULE) \ + $(UFISPACE_S9301_32D_PLATFORM_MODULE) \ + $(UFISPACE_S9110_32X_PLATFORM_MODULE) \ + $(UFISPACE_S8901_54XC_PLATFORM_MODULE) \ + $(UFISPACE_S7801_54XS_PLATFORM_MODULE) \ + $(UFISPACE_S6301_56ST_PLATFORM_MODULE) \ + $(UFISPACE_S9301_32DB_PLATFORM_MODULE) $(SONIC_ONE_IMAGE)_LAZY_BUILD_INSTALLS = $(BRCM_OPENNSL_KERNEL) $(BRCM_DNX_OPENNSL_KERNEL) ifeq ($(INSTALL_DEBUG_TOOLS),y) $(SONIC_ONE_IMAGE)_DOCKERS += $(SONIC_INSTALL_DOCKER_DBG_IMAGES) diff --git a/platform/broadcom/platform-modules-ufispace.dep b/platform/broadcom/platform-modules-ufispace.dep new file mode 100644 index 0000000000..a6609b3c6f --- /dev/null +++ b/platform/broadcom/platform-modules-ufispace.dep @@ -0,0 +1,10 @@ + +MPATH := $($(UFISPACE_S9300_32D_PLATFORM_MODULE)_SRC_PATH) +DEP_FILES := $(SONIC_COMMON_FILES_LIST) platform/broadcom/platform-modules-ufispace.mk platform/broadcom/platform-modules-ufispace.dep +DEP_FILES += $(SONIC_COMMON_BASE_FILES_LIST) +DEP_FILES += $(shell git ls-files $(MPATH)) + +$(UFISPACE_S9300_32D_PLATFORM_MODULE)_CACHE_MODE := GIT_CONTENT_SHA +$(UFISPACE_S9300_32D_PLATFORM_MODULE)_DEP_FLAGS := $(SONIC_COMMON_FLAGS_LIST) +$(UFISPACE_S9300_32D_PLATFORM_MODULE)_DEP_FILES := $(DEP_FILES) + diff --git a/platform/broadcom/platform-modules-ufispace.mk b/platform/broadcom/platform-modules-ufispace.mk new file mode 100644 index 0000000000..15874bcd71 --- /dev/null +++ b/platform/broadcom/platform-modules-ufispace.mk @@ -0,0 +1,47 @@ +# UfiSpace Platform modules + +UFISPACE_S9300_32D_PLATFORM_MODULE_VERSION = 1.0.0 +UFISPACE_S9301_32D_PLATFORM_MODULE_VERSION = 1.0.0 +UFISPACE_S9301_32DB_PLATFORM_MODULE_VERSION = 1.0.0 +UFISPACE_S9110_32X_PLATFORM_MODULE_VERSION = 1.0.0 +UFISPACE_S8901_54XC_PLATFORM_MODULE_VERSION = 1.0.0 +UFISPACE_S7801_54XS_PLATFORM_MODULE_VERSION = 1.0.0 +UFISPACE_S6301_56ST_PLATFORM_MODULE_VERSION = 1.0.0 + +export UFISPACE_S9300_32D_PLATFORM_MODULE_VERSION +export UFISPACE_S9301_32D_PLATFORM_MODULE_VERSION +export UFISPACE_S9301_32DB_PLATFORM_MODULE_VERSION +export UFISPACE_S9110_32X_PLATFORM_MODULE_VERSION +export UFISPACE_S8901_54XC_PLATFORM_MODULE_VERSION +export UFISPACE_S7801_54XS_PLATFORM_MODULE_VERSION +export UFISPACE_S6301_56ST_PLATFORM_MODULE_VERSION + +UFISPACE_S9300_32D_PLATFORM_MODULE = sonic-platform-ufispace-s9300-32d_$(UFISPACE_S9300_32D_PLATFORM_MODULE_VERSION)_amd64.deb +$(UFISPACE_S9300_32D_PLATFORM_MODULE)_SRC_PATH = $(PLATFORM_PATH)/sonic-platform-modules-ufispace +$(UFISPACE_S9300_32D_PLATFORM_MODULE)_DEPENDS += $(LINUX_HEADERS) $(LINUX_HEADERS_COMMON) $(PDDF_PLATFORM_MODULE_SYM) +$(UFISPACE_S9300_32D_PLATFORM_MODULE)_PLATFORM = x86_64-ufispace_s9300_32d-r0 +SONIC_DPKG_DEBS += $(UFISPACE_S9300_32D_PLATFORM_MODULE) + +UFISPACE_S9301_32D_PLATFORM_MODULE = sonic-platform-ufispace-s9301-32d_$(UFISPACE_S9301_32D_PLATFORM_MODULE_VERSION)_amd64.deb +$(UFISPACE_S9301_32D_PLATFORM_MODULE)_PLATFORM = x86_64-ufispace_s9301_32d-r0 +$(eval $(call add_extra_package,$(UFISPACE_S9300_32D_PLATFORM_MODULE),$(UFISPACE_S9301_32D_PLATFORM_MODULE))) + +UFISPACE_S9301_32DB_PLATFORM_MODULE = sonic-platform-ufispace-s9301-32db_$(UFISPACE_S9301_32DB_PLATFORM_MODULE_VERSION)_amd64.deb +$(UFISPACE_S9301_32DB_PLATFORM_MODULE)_PLATFORM = x86_64-ufispace_s9301_32db-r0 +$(eval $(call add_extra_package,$(UFISPACE_S9300_32D_PLATFORM_MODULE),$(UFISPACE_S9301_32DB_PLATFORM_MODULE))) + +UFISPACE_S9110_32X_PLATFORM_MODULE = sonic-platform-ufispace-s9110-32x_$(UFISPACE_S9110_32X_PLATFORM_MODULE_VERSION)_amd64.deb +$(UFISPACE_S9110_32X_PLATFORM_MODULE)_PLATFORM = x86_64-ufispace_s9110_32x-r0 +$(eval $(call add_extra_package,$(UFISPACE_S9300_32D_PLATFORM_MODULE),$(UFISPACE_S9110_32X_PLATFORM_MODULE))) + +UFISPACE_S8901_54XC_PLATFORM_MODULE = sonic-platform-ufispace-s8901-54xc_$(UFISPACE_S8901_54XC_PLATFORM_MODULE_VERSION)_amd64.deb +$(UFISPACE_S8901_54XC_PLATFORM_MODULE)_PLATFORM = x86_64-ufispace_s8901_54xc-r0 +$(eval $(call add_extra_package,$(UFISPACE_S9300_32D_PLATFORM_MODULE),$(UFISPACE_S8901_54XC_PLATFORM_MODULE))) + +UFISPACE_S7801_54XS_PLATFORM_MODULE = sonic-platform-ufispace-s7801-54xs_$(UFISPACE_S7801_54XS_PLATFORM_MODULE_VERSION)_amd64.deb +$(UFISPACE_S7801_54XS_PLATFORM_MODULE)_PLATFORM = x86_64-ufispace_s7801_54xs-r0 +$(eval $(call add_extra_package,$(UFISPACE_S9300_32D_PLATFORM_MODULE),$(UFISPACE_S7801_54XS_PLATFORM_MODULE))) + +UFISPACE_S6301_56ST_PLATFORM_MODULE = sonic-platform-ufispace-s6301-56st_$(UFISPACE_S6301_56ST_PLATFORM_MODULE_VERSION)_amd64.deb +$(UFISPACE_S6301_56ST_PLATFORM_MODULE)_PLATFORM = x86_64-ufispace_s6301_56st-r0 +$(eval $(call add_extra_package,$(UFISPACE_S9300_32D_PLATFORM_MODULE),$(UFISPACE_S6301_56ST_PLATFORM_MODULE))) diff --git a/platform/broadcom/rules.dep b/platform/broadcom/rules.dep index 47f7f849ed..64fb334a82 100644 --- a/platform/broadcom/rules.dep +++ b/platform/broadcom/rules.dep @@ -16,6 +16,7 @@ include $(PLATFORM_PATH)/platform-modules-juniper.dep include $(PLATFORM_PATH)/platform-modules-ragile.dep include $(PLATFORM_PATH)/platform-modules-ruijie.dep include $(PLATFORM_PATH)/platform-modules-brcm-xlr-gts.dep +include $(PLATFORM_PATH)/platform-modules-ufispace.dep include $(PLATFORM_PATH)/docker-syncd-brcm.dep include $(PLATFORM_PATH)/docker-syncd-brcm-rpc.dep include $(PLATFORM_PATH)/docker-saiserver-brcm.dep diff --git a/platform/broadcom/rules.mk b/platform/broadcom/rules.mk index 9aa9c84a9e..33d3195b66 100755 --- a/platform/broadcom/rules.mk +++ b/platform/broadcom/rules.mk @@ -16,6 +16,7 @@ include $(PLATFORM_PATH)/platform-modules-juniper.mk #include $(PLATFORM_PATH)/platform-modules-ruijie.mk include $(PLATFORM_PATH)/platform-modules-ragile.mk #include $(PLATFORM_PATH)/platform-modules-tencent.mk +include $(PLATFORM_PATH)/platform-modules-ufispace.mk include $(PLATFORM_PATH)/docker-syncd-brcm.mk include $(PLATFORM_PATH)/docker-syncd-brcm-rpc.mk include $(PLATFORM_PATH)/docker-saiserver-brcm.mk diff --git a/platform/broadcom/sonic-platform-modules-ufispace/LICENSE b/platform/broadcom/sonic-platform-modules-ufispace/LICENSE new file mode 100644 index 0000000000..9cecc1d466 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ufispace/LICENSE @@ -0,0 +1,674 @@ + GNU GENERAL PUBLIC LICENSE + Version 3, 29 June 2007 + + Copyright (C) 2007 Free Software Foundation, Inc. + Everyone is permitted to copy and distribute verbatim copies + of this license document, but changing it is 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It is safest +to attach them to the start of each source file to most effectively +state the exclusion of warranty; and each file should have at least +the "copyright" line and a pointer to where the full notice is found. + + {one line to give the program's name and a brief idea of what it does.} + Copyright (C) {year} {name of author} + + This program is free software: you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation, either version 3 of the License, or + (at your option) any later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . + +Also add information on how to contact you by electronic and paper mail. + + If the program does terminal interaction, make it output a short +notice like this when it starts in an interactive mode: + + {project} Copyright (C) {year} {fullname} + This program comes with ABSOLUTELY NO WARRANTY; for details type `show w'. + This is free software, and you are welcome to redistribute it + under certain conditions; type `show c' for details. + +The hypothetical commands `show w' and `show c' should show the appropriate +parts of the General Public License. Of course, your program's commands +might be different; for a GUI interface, you would use an "about box". + + You should also get your employer (if you work as a programmer) or school, +if any, to sign a "copyright disclaimer" for the program, if necessary. +For more information on this, and how to apply and follow the GNU GPL, see +. + + The GNU General Public License does not permit incorporating your program +into proprietary programs. If your program is a subroutine library, you +may consider it more useful to permit linking proprietary applications with +the library. If this is what you want to do, use the GNU Lesser General +Public License instead of this License. But first, please read +. diff --git a/platform/broadcom/sonic-platform-modules-ufispace/debian/changelog b/platform/broadcom/sonic-platform-modules-ufispace/debian/changelog new file mode 100644 index 0000000000..007eec5c02 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ufispace/debian/changelog @@ -0,0 +1,41 @@ +sonic-ufispace-platform-modules (1.0.0) unstable; urgency=low + + * Add support for S9301-32DB + + -- Ufispace Thu, 9 Sep 2023 15:50:23 +0800 + +sonic-ufispace-platform-modules (1.0.0) unstable; urgency=low + + * Add support for S6301-56ST + + -- Ufispace Thu, 27 Jul 2023 15:50:23 +0800 + +sonic-ufispace-platform-modules (1.0.0) unstable; urgency=low + + * Add support for S7801-54XS + + -- Ufispace Thu, 27 Jul 2023 11:49:07 +0800 + +sonic-ufispace-platform-modules (1.0.0) unstable; urgency=low + + * Add support for S8901-54XC + + -- Ufispace Thu, 27 Jul 2023 11:12:21 +0800 + +sonic-ufispace-platform-modules (1.0.0) unstable; urgency=low + + * Add support for S9110-32X. + + -- Ufispace Wed, 26 Jul 2023 18:03:14 +0800 + +sonic-ufispace-platform-modules (1.0.0) unstable; urgency=low + + * Add support for S9300-32D. + + -- Ufispace Thur, 27 Apr 2023 17:10:58 +0800 + +sonic-ufispace-platform-modules (1.0.0) unstable; urgency=low + + * Add support for S9301-32D. + + -- Ufispace Tue, 19 Apr 2022 17:10:58 +0800 diff --git a/platform/broadcom/sonic-platform-modules-ufispace/debian/compat b/platform/broadcom/sonic-platform-modules-ufispace/debian/compat new file mode 100644 index 0000000000..ec635144f6 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ufispace/debian/compat @@ -0,0 +1 @@ +9 diff --git a/platform/broadcom/sonic-platform-modules-ufispace/debian/control b/platform/broadcom/sonic-platform-modules-ufispace/debian/control new file mode 100644 index 0000000000..2c39dd2f48 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ufispace/debian/control @@ -0,0 +1,34 @@ +Source: sonic-ufispace-platform-modules +Section: main +Priority: extra +Maintainer: Leo Lin , Nonodark Huang , Jason Tsai +Build-Depends: debhelper (>= 9), bzip2 +Standards-Version: 1.0.0 + +Package: sonic-platform-ufispace-s9300-32d +Architecture: amd64 +Description: This package contains s9300-32d platform driver utility for SONiC project. + +Package: sonic-platform-ufispace-s9301-32d +Architecture: amd64 +Description: This package contains s9301-32d platform driver utility for SONiC project. + +Package: sonic-platform-ufispace-s9301-32db +Architecture: amd64 +Description: This package contains s9301-32db platform driver utility for SONiC project. + +Package: sonic-platform-ufispace-s9110-32x +Architecture: amd64 +Description: This package contains s9110-32x platform driver utility for SONiC project. + +Package: sonic-platform-ufispace-s8901-54xc +Architecture: amd64 +Description: This package contains s8901-54xc platform driver utility for SONiC project. + +Package: sonic-platform-ufispace-s7801-54xs +Architecture: amd64 +Description: This package contains s7801-54xs platform driver utility for SONiC project. + +Package: sonic-platform-ufispace-s6301-56st +Architecture: amd64 +Description: This package contains s6301-56st platform driver utility for SONiC project. diff --git a/platform/broadcom/sonic-platform-modules-ufispace/debian/rules b/platform/broadcom/sonic-platform-modules-ufispace/debian/rules new file mode 100755 index 0000000000..092bbb5bbc --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ufispace/debian/rules @@ -0,0 +1,94 @@ +#!/usr/bin/make -f +# -*- makefile -*- +# Sample debian/rules that uses debhelper. +# This file was originally written by Joey Hess and Craig Small. +# As a special exception, when this file is copied by dh-make into a +# dh-make output file, you may use that output file without restriction. +# This special exception was added by Craig Small in version 0.37 of dh-make. + +include /usr/share/dpkg/pkg-info.mk + +# Uncomment this to turn on verbose mode. +#export DH_VERBOSE=1 + +export INSTALL_MOD_DIR:=extra + +PYTHON3 ?= python3 + +PACKAGE_PRE_NAME := sonic-platform-ufispace +KVERSION ?= $(shell uname -r) +KERNEL_SRC := /lib/modules/$(KVERSION) +MOD_SRC_DIR:= $(shell pwd) +MODULE_DIRS := s9300-32d +MODULE_DIRS += s9301-32d +MODULE_DIRS += s9301-32db +MODULE_DIRS += s9110-32x +MODULE_DIRS += s8901-54xc +MODULE_DIRS += s7801-54xs +MODULE_DIRS += s6301-56st +MODULE_DIR := modules +UTILS_DIR := utils +SERVICE_DIR := service +CONF_DIR := conf + +%: + dh $@ --with systemd,python3 --buildsystem=pybuild + +clean: + dh_testdir + dh_testroot + dh_clean + (for mod in $(MODULE_DIRS); do \ + make -C $(KERNEL_SRC)/build M=$(MOD_SRC_DIR)/$${mod}/modules clean; \ + done) + + + +build: + (for mod in $(MODULE_DIRS); do \ + make modules -C $(KERNEL_SRC)/build M=$(MOD_SRC_DIR)/$${mod}/modules; \ + cd -; \ + cd $(MOD_SRC_DIR)/$${mod}; \ + if [ -f sonic_platform_setup.py ]; then \ + $(PYTHON3) sonic_platform_setup.py bdist_wheel -d $(MOD_SRC_DIR)/$${mod}; \ + echo "Finished makig whl package for $$mod"; \ + fi; \ + cd -; \ + done) + +binary: binary-arch binary-indep + +binary-arch: + +binary-indep: + dh_testdir + dh_installdirs + (for mod in $(MODULE_DIRS); do \ + dh_installdirs -p$(PACKAGE_PRE_NAME)-$${mod} $(KERNEL_SRC)/$(INSTALL_MOD_DIR); \ + cp $(MOD_SRC_DIR)/$${mod}/$(MODULE_DIR)/*.ko debian/$(PACKAGE_PRE_NAME)-$${mod}/$(KERNEL_SRC)/$(INSTALL_MOD_DIR); \ + dh_installdirs -p$(PACKAGE_PRE_NAME)-$${mod} usr/local/bin; \ + cp $(MOD_SRC_DIR)/$${mod}/$(UTILS_DIR)/* debian/$(PACKAGE_PRE_NAME)-$${mod}/usr/local/bin; \ + dh_installdirs -p$(PACKAGE_PRE_NAME)-$${mod} lib/systemd/system; \ + cp $(MOD_SRC_DIR)/$${mod}/$(SERVICE_DIR)/*.service debian/$(PACKAGE_PRE_NAME)-$${mod}/lib/systemd/system; \ + cd $(MOD_SRC_DIR)/$${mod}; \ + cd -; \ + done) + + # Resuming debhelper scripts + dh_testroot + dh_install + dh_installchangelogs + dh_installdocs + dh_systemd_enable + dh_installinit + dh_systemd_start + dh_link + dh_fixperms + dh_compress + dh_strip + dh_installdeb + dh_gencontrol + dh_md5sums + dh_builddeb + +.PHONY: build binary binary-arch binary-indep clean diff --git a/platform/broadcom/sonic-platform-modules-ufispace/debian/sonic-platform-ufispace-s6301-56st.install b/platform/broadcom/sonic-platform-modules-ufispace/debian/sonic-platform-ufispace-s6301-56st.install new file mode 100644 index 0000000000..869c48e4a1 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ufispace/debian/sonic-platform-ufispace-s6301-56st.install @@ -0,0 +1 @@ +s6301-56st/sonic_platform-1.0-py3-none-any.whl usr/share/sonic/device/x86_64-ufispace_s6301_56st-r0/pddf diff --git a/platform/broadcom/sonic-platform-modules-ufispace/debian/sonic-platform-ufispace-s6301-56st.postinst b/platform/broadcom/sonic-platform-modules-ufispace/debian/sonic-platform-ufispace-s6301-56st.postinst new file mode 100644 index 0000000000..01666039ca --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ufispace/debian/sonic-platform-ufispace-s6301-56st.postinst @@ -0,0 +1,3 @@ +depmod -a +systemctl enable pddf-platform-init.service +systemctl start pddf-platform-init.service diff --git a/platform/broadcom/sonic-platform-modules-ufispace/debian/sonic-platform-ufispace-s6301-56st.prerm b/platform/broadcom/sonic-platform-modules-ufispace/debian/sonic-platform-ufispace-s6301-56st.prerm new file mode 100644 index 0000000000..f9fe8c017a --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ufispace/debian/sonic-platform-ufispace-s6301-56st.prerm @@ -0,0 +1,2 @@ +systemctl stop pddf-platform-init.service +systemctl disable pddf-platform-init.service diff --git a/platform/broadcom/sonic-platform-modules-ufispace/debian/sonic-platform-ufispace-s7801-54xs.install b/platform/broadcom/sonic-platform-modules-ufispace/debian/sonic-platform-ufispace-s7801-54xs.install new file mode 100644 index 0000000000..3c1b791bbf --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ufispace/debian/sonic-platform-ufispace-s7801-54xs.install @@ -0,0 +1 @@ +s7801-54xs/sonic_platform-1.0-py3-none-any.whl usr/share/sonic/device/x86_64-ufispace_s7801_54xs-r0/pddf diff --git a/platform/broadcom/sonic-platform-modules-ufispace/debian/sonic-platform-ufispace-s7801-54xs.postinst b/platform/broadcom/sonic-platform-modules-ufispace/debian/sonic-platform-ufispace-s7801-54xs.postinst new file mode 100644 index 0000000000..01666039ca --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ufispace/debian/sonic-platform-ufispace-s7801-54xs.postinst @@ -0,0 +1,3 @@ +depmod -a +systemctl enable pddf-platform-init.service +systemctl start pddf-platform-init.service diff --git a/platform/broadcom/sonic-platform-modules-ufispace/debian/sonic-platform-ufispace-s7801-54xs.prerm b/platform/broadcom/sonic-platform-modules-ufispace/debian/sonic-platform-ufispace-s7801-54xs.prerm new file mode 100644 index 0000000000..4b887ab38a --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ufispace/debian/sonic-platform-ufispace-s7801-54xs.prerm @@ -0,0 +1,2 @@ +systemctl stop pddf-platform-init.service +systemctl disable pddf-platform-init.service \ No newline at end of file diff --git a/platform/broadcom/sonic-platform-modules-ufispace/debian/sonic-platform-ufispace-s8901-54xc.install b/platform/broadcom/sonic-platform-modules-ufispace/debian/sonic-platform-ufispace-s8901-54xc.install new file mode 100644 index 0000000000..685e023830 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ufispace/debian/sonic-platform-ufispace-s8901-54xc.install @@ -0,0 +1 @@ +s8901-54xc/sonic_platform-1.0-py3-none-any.whl usr/share/sonic/device/x86_64-ufispace_s8901_54xc-r0/pddf diff --git a/platform/broadcom/sonic-platform-modules-ufispace/debian/sonic-platform-ufispace-s8901-54xc.postinst b/platform/broadcom/sonic-platform-modules-ufispace/debian/sonic-platform-ufispace-s8901-54xc.postinst new file mode 100644 index 0000000000..01666039ca --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ufispace/debian/sonic-platform-ufispace-s8901-54xc.postinst @@ -0,0 +1,3 @@ +depmod -a +systemctl enable pddf-platform-init.service +systemctl start pddf-platform-init.service diff --git a/platform/broadcom/sonic-platform-modules-ufispace/debian/sonic-platform-ufispace-s8901-54xc.prerm b/platform/broadcom/sonic-platform-modules-ufispace/debian/sonic-platform-ufispace-s8901-54xc.prerm new file mode 100644 index 0000000000..4b887ab38a --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ufispace/debian/sonic-platform-ufispace-s8901-54xc.prerm @@ -0,0 +1,2 @@ +systemctl stop pddf-platform-init.service +systemctl disable pddf-platform-init.service \ No newline at end of file diff --git a/platform/broadcom/sonic-platform-modules-ufispace/debian/sonic-platform-ufispace-s9110-32x.install b/platform/broadcom/sonic-platform-modules-ufispace/debian/sonic-platform-ufispace-s9110-32x.install new file mode 100644 index 0000000000..6982e6b196 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ufispace/debian/sonic-platform-ufispace-s9110-32x.install @@ -0,0 +1 @@ +s9110-32x/sonic_platform-1.0-py3-none-any.whl usr/share/sonic/device/x86_64-ufispace_s9110_32x-r0/pddf diff --git a/platform/broadcom/sonic-platform-modules-ufispace/debian/sonic-platform-ufispace-s9110-32x.postinst b/platform/broadcom/sonic-platform-modules-ufispace/debian/sonic-platform-ufispace-s9110-32x.postinst new file mode 100644 index 0000000000..01666039ca --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ufispace/debian/sonic-platform-ufispace-s9110-32x.postinst @@ -0,0 +1,3 @@ +depmod -a +systemctl enable pddf-platform-init.service +systemctl start pddf-platform-init.service diff --git a/platform/broadcom/sonic-platform-modules-ufispace/debian/sonic-platform-ufispace-s9110-32x.prerm b/platform/broadcom/sonic-platform-modules-ufispace/debian/sonic-platform-ufispace-s9110-32x.prerm new file mode 100644 index 0000000000..4b887ab38a --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ufispace/debian/sonic-platform-ufispace-s9110-32x.prerm @@ -0,0 +1,2 @@ +systemctl stop pddf-platform-init.service +systemctl disable pddf-platform-init.service \ No newline at end of file diff --git a/platform/broadcom/sonic-platform-modules-ufispace/debian/sonic-platform-ufispace-s9300-32d.install b/platform/broadcom/sonic-platform-modules-ufispace/debian/sonic-platform-ufispace-s9300-32d.install new file mode 100644 index 0000000000..259b3fc53a --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ufispace/debian/sonic-platform-ufispace-s9300-32d.install @@ -0,0 +1 @@ +s9300-32d/sonic_platform-1.0-py3-none-any.whl usr/share/sonic/device/x86_64-ufispace_s9300_32d-r0/pddf diff --git a/platform/broadcom/sonic-platform-modules-ufispace/debian/sonic-platform-ufispace-s9300-32d.postinst b/platform/broadcom/sonic-platform-modules-ufispace/debian/sonic-platform-ufispace-s9300-32d.postinst new file mode 100644 index 0000000000..01666039ca --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ufispace/debian/sonic-platform-ufispace-s9300-32d.postinst @@ -0,0 +1,3 @@ +depmod -a +systemctl enable pddf-platform-init.service +systemctl start pddf-platform-init.service diff --git a/platform/broadcom/sonic-platform-modules-ufispace/debian/sonic-platform-ufispace-s9300-32d.prerm b/platform/broadcom/sonic-platform-modules-ufispace/debian/sonic-platform-ufispace-s9300-32d.prerm new file mode 100644 index 0000000000..f9fe8c017a --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ufispace/debian/sonic-platform-ufispace-s9300-32d.prerm @@ -0,0 +1,2 @@ +systemctl stop pddf-platform-init.service +systemctl disable pddf-platform-init.service diff --git a/platform/broadcom/sonic-platform-modules-ufispace/debian/sonic-platform-ufispace-s9301-32d.install b/platform/broadcom/sonic-platform-modules-ufispace/debian/sonic-platform-ufispace-s9301-32d.install new file mode 100644 index 0000000000..fa71db5ecc --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ufispace/debian/sonic-platform-ufispace-s9301-32d.install @@ -0,0 +1 @@ +s9301-32d/sonic_platform-1.0-py3-none-any.whl usr/share/sonic/device/x86_64-ufispace_s9301_32d-r0/pddf diff --git a/platform/broadcom/sonic-platform-modules-ufispace/debian/sonic-platform-ufispace-s9301-32d.postinst b/platform/broadcom/sonic-platform-modules-ufispace/debian/sonic-platform-ufispace-s9301-32d.postinst new file mode 100644 index 0000000000..01666039ca --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ufispace/debian/sonic-platform-ufispace-s9301-32d.postinst @@ -0,0 +1,3 @@ +depmod -a +systemctl enable pddf-platform-init.service +systemctl start pddf-platform-init.service diff --git a/platform/broadcom/sonic-platform-modules-ufispace/debian/sonic-platform-ufispace-s9301-32d.prerm b/platform/broadcom/sonic-platform-modules-ufispace/debian/sonic-platform-ufispace-s9301-32d.prerm new file mode 100644 index 0000000000..f9fe8c017a --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ufispace/debian/sonic-platform-ufispace-s9301-32d.prerm @@ -0,0 +1,2 @@ +systemctl stop pddf-platform-init.service +systemctl disable pddf-platform-init.service diff --git a/platform/broadcom/sonic-platform-modules-ufispace/debian/sonic-platform-ufispace-s9301-32db.install b/platform/broadcom/sonic-platform-modules-ufispace/debian/sonic-platform-ufispace-s9301-32db.install new file mode 100644 index 0000000000..64349db9aa --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ufispace/debian/sonic-platform-ufispace-s9301-32db.install @@ -0,0 +1 @@ +s9301-32db/sonic_platform-1.0-py3-none-any.whl usr/share/sonic/device/x86_64-ufispace_s9301_32db-r0/pddf diff --git a/platform/broadcom/sonic-platform-modules-ufispace/debian/sonic-platform-ufispace-s9301-32db.postinst b/platform/broadcom/sonic-platform-modules-ufispace/debian/sonic-platform-ufispace-s9301-32db.postinst new file mode 100644 index 0000000000..01666039ca --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ufispace/debian/sonic-platform-ufispace-s9301-32db.postinst @@ -0,0 +1,3 @@ +depmod -a +systemctl enable pddf-platform-init.service +systemctl start pddf-platform-init.service diff --git a/platform/broadcom/sonic-platform-modules-ufispace/debian/sonic-platform-ufispace-s9301-32db.prerm b/platform/broadcom/sonic-platform-modules-ufispace/debian/sonic-platform-ufispace-s9301-32db.prerm new file mode 100644 index 0000000000..f9fe8c017a --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ufispace/debian/sonic-platform-ufispace-s9301-32db.prerm @@ -0,0 +1,2 @@ +systemctl stop pddf-platform-init.service +systemctl disable pddf-platform-init.service diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s6301-56st/modules/Makefile b/platform/broadcom/sonic-platform-modules-ufispace/s6301-56st/modules/Makefile new file mode 100644 index 0000000000..e27865a9be --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ufispace/s6301-56st/modules/Makefile @@ -0,0 +1,6 @@ + +MODULE_NAME = x86-64-ufispace-s6301-56st-sys-eeprom.o x86-64-ufispace-s6301-56st-lpc.o pddf_custom_psu.o +obj-m := $(MODULE_NAME) + +CFLAGS_pddf_custom_sysstatus_module.o := -I$(M)/../../../../pddf/i2c/modules/include +KBUILD_EXTRA_SYMBOLS := $(M)/../../../../pddf/i2c/Module.symvers.PDDF diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s6301-56st/modules/pddf_custom_psu.c b/platform/broadcom/sonic-platform-modules-ufispace/s6301-56st/modules/pddf_custom_psu.c new file mode 100644 index 0000000000..b71f0b90b0 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ufispace/s6301-56st/modules/pddf_custom_psu.c @@ -0,0 +1,124 @@ +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include "../../../../pddf/i2c/modules/include/pddf_psu_defs.h" + +#define PSU_REG_VOUT_MODE 0x20 +#define PSU_REG_READ_VOUT 0x8b + +ssize_t pddf_show_custom_psu_v_out(struct device *dev, struct device_attribute *da, char *buf); +extern PSU_SYSFS_ATTR_DATA access_psu_v_out; + +static int two_complement_to_int(u16 data, u8 valid_bit, int mask) +{ + u16 valid_data = data & mask; + bool is_negative = valid_data >> (valid_bit - 1); + + return is_negative ? (-(((~valid_data) & mask) + 1)) : valid_data; +} + +static u8 psu_get_vout_mode(struct i2c_client *client) +{ + u8 status = 0, retry = 10; + uint8_t offset = PSU_REG_VOUT_MODE; + + while (retry) { + status = i2c_smbus_read_byte_data((struct i2c_client *)client, offset); + if (unlikely(status < 0)) { + msleep(60); + retry--; + continue; + } + break; + } + + if (status < 0) + { + printk(KERN_ERR "%s: Get PSU Vout mode failed\n", __func__); + return 0; + } + else + { + /*printk(KERN_ERR "%s: vout_mode reg value 0x%x\n", __func__, status);*/ + return status; + } +} + +static u16 psu_get_v_out(struct i2c_client *client) +{ + u16 status = 0, retry = 10; + uint8_t offset = PSU_REG_READ_VOUT; + + while (retry) { + status = i2c_smbus_read_word_data((struct i2c_client *)client, offset); + if (unlikely(status < 0)) { + msleep(60); + retry--; + continue; + } + break; + } + + if (status < 0) + { + printk(KERN_ERR "%s: Get PSU Vout failed\n", __func__); + return 0; + } + else + { + /*printk(KERN_ERR "%s: vout reg value 0x%x\n", __func__, status);*/ + return status; + } +} + +ssize_t pddf_show_custom_psu_v_out(struct device *dev, struct device_attribute *da, char *buf) +{ + struct i2c_client *client = to_i2c_client(dev); + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + int exponent, mantissa; + int multiplier = 1000; + + u16 value = psu_get_v_out(client); + u8 vout_mode = psu_get_vout_mode(client); + + if ((vout_mode >> 5) == 0) + exponent = two_complement_to_int(vout_mode & 0x1f, 5, 0x1f); + else + { + /*printk(KERN_ERR "%s: Only support linear mode for vout mode\n", __func__);*/ + exponent = 0; + } + mantissa = value; + if (exponent >= 0) + return sprintf(buf, "%d\n", (mantissa << exponent) * multiplier); + else + return sprintf(buf, "%d\n", (mantissa * multiplier) / (1 << -exponent)); +} + +static int __init pddf_custom_psu_init(void) +{ + access_psu_v_out.show = pddf_show_custom_psu_v_out; + access_psu_v_out.do_get = NULL; + return 0; +} + +static void __exit pddf_custom_psu_exit(void) +{ + return; +} + +MODULE_AUTHOR("Broadcom"); +MODULE_DESCRIPTION("pddf custom psu api"); +MODULE_LICENSE("GPL"); + +module_init(pddf_custom_psu_init); +module_exit(pddf_custom_psu_exit); + diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s6301-56st/modules/x86-64-ufispace-s6301-56st-lpc.c b/platform/broadcom/sonic-platform-modules-ufispace/s6301-56st/modules/x86-64-ufispace-s6301-56st-lpc.c new file mode 100644 index 0000000000..067101dd31 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ufispace/s6301-56st/modules/x86-64-ufispace-s6301-56st-lpc.c @@ -0,0 +1,829 @@ +/* + * A lpc driver for the ufispace_s6301_56st + * + * Copyright (C) 2017-2020 UfiSpace Technology Corporation. + * Jason Tsai + * Leo Lin + * + * Based on ad7414.c + * Copyright 2006 Stefan Roese , DENX Software Engineering + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. + */ +#include +#include +#include +#include +#include +#include +#include + +#define BSP_LOG_R(fmt, args...) \ + _bsp_log (LOG_READ, KERN_INFO "%s:%s[%d]: " fmt "\r\n", \ + __FILE__, __func__, __LINE__, ##args) +#define BSP_LOG_W(fmt, args...) \ + _bsp_log (LOG_WRITE, KERN_INFO "%s:%s[%d]: " fmt "\r\n", \ + __FILE__, __func__, __LINE__, ##args) + +#define BSP_PR(level, fmt, args...) _bsp_log (LOG_SYS, level "[BSP]" fmt "\r\n", ##args) +#define DRIVER_NAME "x86_64_ufispace_s6301_56st_lpc" + +/* LPC registers */ + +#define REG_BASE_CPU 0x600 +#define REG_BASE_MB 0x700 + +//MB CPLD +#define REG_MB_BRD_ID_0 (REG_BASE_MB + 0x00) +#define REG_MB_BRD_ID_1 (REG_BASE_MB + 0x01) +#define REG_MB_CPLD_VERSION (REG_BASE_MB + 0x02) +#define REG_MB_CPLD_BUILD (REG_BASE_MB + 0x04) +#define REG_MB_EXTEND_ID (REG_BASE_MB + 0x06) +#define REG_MB_MUX_RESET (REG_BASE_MB + 0x43) +#define REG_MB_FAN_STATUS (REG_BASE_MB + 0x55) +#define REG_MB_PSU_STATUS (REG_BASE_MB + 0x59) +#define REG_MB_PORT_LED_CLR (REG_BASE_MB + 0x80) +#define REG_MB_SYS_LED_CTRL_1 (REG_BASE_MB + 0x81) +#define REG_MB_SYS_LED_STATUS_1 (REG_BASE_MB + 0x82) +#define REG_MB_SYS_LED_STATUS_2 (REG_BASE_MB + 0x83) +#define REG_MB_SYS_LED_STATUS_3 (REG_BASE_MB + 0x84) + +#define MASK_ALL (0xFF) + +#define MDELAY_LPC (5) +#define MDELAY_RESET_INTERVAL (100) +#define MDELAY_RESET_FINISH (500) + +#define MULTIBIT_SET(addr, mask, value) (((addr)&((0xff)^(mask)))|((value)&(mask))) + + +/* LPC sysfs attributes index */ +enum lpc_sysfs_attributes { + //MB CPLD + ATT_MB_BRD_ID_0, + ATT_MB_BRD_ID_1, + ATT_MB_CPLD_1_VERSION, + ATT_MB_CPLD_1_VERSION_H, + ATT_MB_BRD_SKU_ID, + ATT_MB_BRD_HW_ID, + ATT_MB_BRD_ID_TYPE, + ATT_MB_BRD_BUILD_ID, + ATT_MB_BRD_DEPH_ID, + ATT_MB_BRD_EXT_ID, + ATT_MB_MUX_RESET, + ATT_MB_FAN_STATUS, + ATT_MB_PSU_STATUS, + ATT_MB_PORT_LED_CLR, + ATT_MB_LED_SYS, + ATT_MB_LED_ID, + ATT_MB_LED_POE, + ATT_MB_LED_SPD, + ATT_MB_LED_FAN, + ATT_MB_LED_LNK, + ATT_MB_LED_PWR0, + ATT_MB_LED_PWR1, + //BSP + ATT_BSP_VERSION, + ATT_BSP_DEBUG, + ATT_BSP_PR_INFO, + ATT_BSP_PR_ERR, + ATT_BSP_REG, + ATT_BSP_REG_VALUE, + ATT_BSP_GPIO_MAX, + ATT_MAX +}; + +enum bases { + BASE_DEC, + BASE_HEX, + BASE_NONE + +}; + +enum bsp_log_types { + LOG_NONE, + LOG_RW, + LOG_READ, + LOG_WRITE, + LOG_SYS +}; + +enum bsp_log_ctrl { + LOG_DISABLE, + LOG_ENABLE +}; + +struct lpc_data_s { + struct mutex access_lock; +}; + +struct lpc_data_s *lpc_data; +char bsp_version[16]; +char bsp_debug[32]; +char bsp_reg[8]="0x0"; +u8 enable_log_read=LOG_DISABLE; +u8 enable_log_write=LOG_DISABLE; +u8 enable_log_sys=LOG_ENABLE; + +/* mask len and shift */ +static void _get_len_shift(u8 mask, u8 *len, u8 *shift) +{ + int i; + bool found=false; + *len=0; + *shift=0; + + for(i=0; i<8; ++i) { + if(mask & 1) { + *len = *len + 1; + if(!found) { + *shift = i; + found = true; + } + } + mask >>= 1; + } +} + +/* reg mask and shift */ +static u8 _mask_shift(u8 val, u8 mask) +{ + u8 shift=0; + u8 len; + + _get_len_shift(mask, &len, &shift); + + return (val & mask) >> shift; +} + +static u8 _bit_operation(u8 reg_val, u8 bit, u8 bit_val) +{ + if(bit_val == 0) + reg_val = reg_val & ~(1 << bit); + else + reg_val = reg_val | (1 << bit); + return reg_val; +} + +static int _bsp_log(u8 log_type, char *fmt, ...) +{ + if((log_type==LOG_READ && enable_log_read) || + (log_type==LOG_WRITE && enable_log_write) || + (log_type==LOG_SYS && enable_log_sys) ) { + va_list args; + int r; + + va_start(args, fmt); + r = vprintk(fmt, args); + va_end(args); + + return r; + } else { + return 0; + } +} + +static int _config_bsp_log(u8 log_type) +{ + switch(log_type) { + case LOG_NONE: + enable_log_read = LOG_DISABLE; + enable_log_write = LOG_DISABLE; + break; + case LOG_RW: + enable_log_read = LOG_ENABLE; + enable_log_write = LOG_ENABLE; + break; + case LOG_READ: + enable_log_read = LOG_ENABLE; + enable_log_write = LOG_DISABLE; + break; + case LOG_WRITE: + enable_log_read = LOG_DISABLE; + enable_log_write = LOG_ENABLE; + break; + default: + return -EINVAL; + } + return 0; +} + +/* get lpc register value */ +static u8 _read_lpc_reg(u16 reg, u8 mask) +{ + u8 reg_val=0x0, reg_mk_shf_val=0x0; + + mutex_lock(&lpc_data->access_lock); + reg_val = inb(reg); + mutex_unlock(&lpc_data->access_lock); + + reg_mk_shf_val = _mask_shift(reg_val, mask); + + BSP_LOG_R("reg=0x%03x, reg_val=0x%02x, mask=0x%02x, reg_mk_shf_val=0x%02x", reg, reg_val, mask, reg_mk_shf_val); + + return reg_mk_shf_val; +} + +/* get lpc register value */ +static ssize_t read_lpc_reg(u16 reg, u8 mask, u8 base, char *buf) +{ + u8 reg_val; + int len=0; + + reg_val = _read_lpc_reg(reg, mask); + if(base == BASE_HEX) { + len=sprintf(buf, "0x%02x\n", reg_val); + } else { + len=sprintf(buf,"%d\n", reg_val); + } + + return len; +} + +/* set lpc register value */ +static ssize_t write_lpc_reg(u16 reg, u8 mask, const char *buf, size_t count) +{ + u8 reg_val, reg_val_now, shift, mask_len; + + if(kstrtou8(buf, 0, ®_val) < 0) + return -EINVAL; + + _get_len_shift(mask, &mask_len, &shift); + + // set signal bit + if(mask_len == 1) { + reg_val_now = _read_lpc_reg(reg, MASK_ALL); + reg_val = _bit_operation(reg_val_now, shift, reg_val); + // set multi bit + } else if (mask_len > 1) { + reg_val_now = _read_lpc_reg(reg, MASK_ALL); + reg_val = MULTIBIT_SET(reg_val_now, mask, reg_val<access_lock); + + outb(reg_val, reg); + mdelay(MDELAY_LPC); + + mutex_unlock(&lpc_data->access_lock); + + BSP_LOG_W("reg=0x%03x, reg_val=0x%02x, mask=0x%02x", reg, reg_val, mask); + + return count; +} + +/* get bsp value */ +static ssize_t read_bsp(char *buf, char *str) +{ + ssize_t len=0; + + mutex_lock(&lpc_data->access_lock); + len=sprintf(buf, "%s", str); + mutex_unlock(&lpc_data->access_lock); + + BSP_LOG_R("reg_val=%s", str); + + return len; +} + +/* set bsp value */ +static ssize_t write_bsp(const char *buf, char *str, size_t str_len, size_t count) +{ + mutex_lock(&lpc_data->access_lock); + snprintf(str, str_len, "%s", buf); + mutex_unlock(&lpc_data->access_lock); + + BSP_LOG_W("reg_val=%s", str); + + return count; +} + +/* get mb cpld version in human readable format */ +static ssize_t read_mb_cpld_1_version_h(struct device *dev, + struct device_attribute *da, char *buf) +{ + ssize_t len=0; + u16 reg = REG_MB_CPLD_VERSION; + u8 mask = MASK_ALL; + u8 mask_major = 0b11000000; + u8 mask_minor = 0b00111111; + u8 reg_val; + u8 major, minor, build; + + mutex_lock(&lpc_data->access_lock); + reg_val = _mask_shift(inb(reg), mask); + mutex_unlock(&lpc_data->access_lock); + major = _mask_shift(reg_val, mask_major); + minor = _mask_shift(reg_val, mask_minor); + BSP_LOG_R("reg=0x%03x, reg_val=0x%02x", reg, reg_val); + + reg = REG_MB_CPLD_BUILD; + mutex_lock(&lpc_data->access_lock); + reg_val = _mask_shift(inb(reg), mask); + mutex_unlock(&lpc_data->access_lock); + build = reg_val; + BSP_LOG_R("reg=0x%03x, reg_val=0x%02x", reg, reg_val); + + len=sprintf(buf, "%d.%02d.%03d\n", major, minor, build); + return len; +} + +/* set mb_mux_reset register value */ +static ssize_t write_mb_mux_reset(struct device *dev, + struct device_attribute *da, const char *buf, size_t count) +{ + u8 val = 0; + u8 reg_val = 0; + static int mux_reset_flag = 0; + + if(kstrtou8(buf, 0, &val) < 0) + return -EINVAL; + + if(mux_reset_flag == 0) { + if(val == 0) { + mutex_lock(&lpc_data->access_lock); + mux_reset_flag = 1; + printk(KERN_INFO "i2c mux reset is triggered...\n"); + reg_val = inb(REG_MB_MUX_RESET); + outb((reg_val & 0b11111000), REG_MB_MUX_RESET); + mdelay(100); + outb((reg_val | 0b00000111), REG_MB_MUX_RESET); + mdelay(500); + mux_reset_flag = 0; + mutex_unlock(&lpc_data->access_lock); + } else { + return -EINVAL; + } + } else { + printk(KERN_INFO "i2c mux is resetting... (ignore)\n"); + mutex_lock(&lpc_data->access_lock); + mutex_unlock(&lpc_data->access_lock); + } + + return count; +} + +/* get lpc register value */ +static ssize_t read_lpc_callback(struct device *dev, + struct device_attribute *da, char *buf) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + u16 reg = 0; + u8 mask = MASK_ALL; + u8 base = BASE_DEC; + + switch (attr->index) { + //MB CPLD + case ATT_MB_BRD_ID_0: + reg = REG_MB_BRD_ID_0; + break; + case ATT_MB_BRD_ID_1: + reg = REG_MB_BRD_ID_1; + break; + case ATT_MB_CPLD_1_VERSION: + reg = REG_MB_CPLD_VERSION; + break; + case ATT_MB_BRD_SKU_ID: + reg = REG_MB_BRD_ID_0; + mask = 0xFF; + break; + case ATT_MB_BRD_HW_ID: + reg = REG_MB_BRD_ID_1; + mask = 0x3; + break; + case ATT_MB_BRD_ID_TYPE: + reg = REG_MB_BRD_ID_1; + mask = 0x80; + break; + case ATT_MB_BRD_BUILD_ID: + reg = REG_MB_BRD_ID_1; + mask = 0x18; + break; + case ATT_MB_BRD_DEPH_ID: + reg = REG_MB_BRD_ID_1; + mask = 0x4; + break; + case ATT_MB_BRD_EXT_ID: + reg = REG_MB_EXTEND_ID; + mask = 0x07; + break; + case ATT_MB_MUX_RESET: + reg = REG_MB_MUX_RESET; + mask = 0x07; + base = BASE_HEX; + break; + case ATT_MB_FAN_STATUS: + reg = REG_MB_FAN_STATUS; + base = BASE_HEX; + break; + case ATT_MB_PSU_STATUS: + reg = REG_MB_PSU_STATUS; + base = BASE_HEX; + break; + case ATT_MB_PORT_LED_CLR: + reg = REG_MB_PORT_LED_CLR; + mask = 0x1; + base = BASE_HEX; + break; + case ATT_MB_LED_SYS: + reg = REG_MB_SYS_LED_CTRL_1; + mask = 0xF0; + base = BASE_HEX; + break; + case ATT_MB_LED_ID: + reg = REG_MB_SYS_LED_CTRL_1; + mask = 0xF; + base = BASE_HEX; + break; + case ATT_MB_LED_POE: + reg = REG_MB_SYS_LED_STATUS_1; + mask = 0xF0; + base = BASE_HEX; + break; + case ATT_MB_LED_SPD: + reg = REG_MB_SYS_LED_STATUS_1; + mask = 0xF; + base = BASE_HEX; + break; + case ATT_MB_LED_FAN: + reg = REG_MB_SYS_LED_STATUS_2; + mask = 0xF0; + base = BASE_HEX; + break; + case ATT_MB_LED_LNK: + reg = REG_MB_SYS_LED_STATUS_2; + mask = 0xF; + base = BASE_HEX; + break; + case ATT_MB_LED_PWR1: + reg = REG_MB_SYS_LED_STATUS_3; + mask = 0xF0; + base = BASE_HEX; + break; + case ATT_MB_LED_PWR0: + reg = REG_MB_SYS_LED_STATUS_3; + mask = 0xF; + base = BASE_HEX; + break; + //BSP + case ATT_BSP_REG_VALUE: + if (kstrtou16(bsp_reg, 0, ®) < 0) + return -EINVAL; + + mask = MASK_ALL; + break; + default: + return -EINVAL; + } + return read_lpc_reg(reg, mask, base, buf); +} + +/* set lpc register value */ +static ssize_t write_lpc_callback(struct device *dev, + struct device_attribute *da, const char *buf, size_t count) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + u16 reg = 0; + u8 mask = MASK_ALL; + + switch (attr->index) { + case ATT_MB_PORT_LED_CLR: + reg = REG_MB_PORT_LED_CLR; + mask = 0x1; + break; + case ATT_MB_LED_SYS: + reg = REG_MB_SYS_LED_CTRL_1; + mask = 0xF0; + break; + case ATT_MB_LED_ID: + reg = REG_MB_SYS_LED_CTRL_1; + mask = 0xF; + break; + default: + return -EINVAL; + } + return write_lpc_reg(reg, mask, buf, count); +} + +/* get bsp parameter value */ +static ssize_t read_bsp_callback(struct device *dev, + struct device_attribute *da, char *buf) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + int str_len=0; + char *str=NULL; + + switch (attr->index) { + case ATT_BSP_VERSION: + str = bsp_version; + str_len = sizeof(bsp_version); + break; + case ATT_BSP_DEBUG: + str = bsp_debug; + str_len = sizeof(bsp_debug); + break; + case ATT_BSP_REG: + str = bsp_reg; + str_len = sizeof(bsp_reg); + break; + default: + return -EINVAL; + } + return read_bsp(buf, str); +} + +/* set bsp parameter value */ +static ssize_t write_bsp_callback(struct device *dev, + struct device_attribute *da, const char *buf, size_t count) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + int str_len=0; + char *str=NULL; + u16 reg = 0; + u8 bsp_debug_u8 = 0; + + switch (attr->index) { + case ATT_BSP_VERSION: + str = bsp_version; + str_len = sizeof(str); + break; + case ATT_BSP_DEBUG: + str = bsp_debug; + str_len = sizeof(str); + break; + case ATT_BSP_REG: + if(kstrtou16(buf, 0, ®) < 0) + return -EINVAL; + + str = bsp_reg; + str_len = sizeof(str); + break; + default: + return -EINVAL; + } + + if(attr->index == ATT_BSP_DEBUG) { + if(kstrtou8(buf, 0, &bsp_debug_u8) < 0) { + return -EINVAL; + } else if (_config_bsp_log(bsp_debug_u8) < 0) { + return -EINVAL; + } + } + + return write_bsp(buf, str, str_len, count); +} + +static ssize_t write_bsp_pr_callback(struct device *dev, + struct device_attribute *da, const char *buf, size_t count) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + int str_len = strlen(buf); + + if(str_len <= 0) + return str_len; + + switch (attr->index) { + case ATT_BSP_PR_INFO: + BSP_PR(KERN_INFO, "%s", buf); + break; + case ATT_BSP_PR_ERR: + BSP_PR(KERN_ERR, "%s", buf); + break; + default: + return -EINVAL; + } + + return str_len; +} + +/* get gpio max value */ +static ssize_t read_gpio_max_callback(struct device *dev, + struct device_attribute *da, + char *buf) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + + if (attr->index == ATT_BSP_GPIO_MAX) { + return sprintf(buf, "%d\n", ARCH_NR_GPIOS-1); + } + return -1; +} + +//SENSOR_DEVICE_ATTR - MB +static SENSOR_DEVICE_ATTR(board_id_0, S_IRUGO, read_lpc_callback, NULL, ATT_MB_BRD_ID_0); +static SENSOR_DEVICE_ATTR(board_id_1, S_IRUGO, read_lpc_callback, NULL, ATT_MB_BRD_ID_1); +static SENSOR_DEVICE_ATTR(mb_cpld_1_version, S_IRUGO, read_lpc_callback, NULL, ATT_MB_CPLD_1_VERSION); +static SENSOR_DEVICE_ATTR(mb_cpld_1_version_h, S_IRUGO, read_mb_cpld_1_version_h, NULL, ATT_MB_CPLD_1_VERSION_H); +static SENSOR_DEVICE_ATTR(board_sku_id, S_IRUGO, read_lpc_callback, NULL, ATT_MB_BRD_SKU_ID); +static SENSOR_DEVICE_ATTR(board_hw_id, S_IRUGO, read_lpc_callback, NULL, ATT_MB_BRD_HW_ID); +static SENSOR_DEVICE_ATTR(board_id_type, S_IRUGO, read_lpc_callback, NULL, ATT_MB_BRD_ID_TYPE); +static SENSOR_DEVICE_ATTR(board_build_id, S_IRUGO, read_lpc_callback, NULL, ATT_MB_BRD_BUILD_ID); +static SENSOR_DEVICE_ATTR(board_deph_id, S_IRUGO, read_lpc_callback, NULL, ATT_MB_BRD_DEPH_ID); +static SENSOR_DEVICE_ATTR(board_ext_id, S_IRUGO, read_lpc_callback, NULL, ATT_MB_BRD_EXT_ID); +static SENSOR_DEVICE_ATTR(mux_reset, S_IRUGO | S_IWUSR, read_lpc_callback, write_mb_mux_reset, ATT_MB_MUX_RESET); +static SENSOR_DEVICE_ATTR(fan_status, S_IRUGO, read_lpc_callback, NULL, ATT_MB_FAN_STATUS); +static SENSOR_DEVICE_ATTR(psu_status, S_IRUGO, read_lpc_callback, NULL, ATT_MB_PSU_STATUS); +static SENSOR_DEVICE_ATTR(port_led_clear, S_IRUGO | S_IWUSR, read_lpc_callback, write_lpc_callback, ATT_MB_PORT_LED_CLR); +static SENSOR_DEVICE_ATTR(led_sys, S_IRUGO | S_IWUSR, read_lpc_callback, write_lpc_callback, ATT_MB_LED_SYS); +static SENSOR_DEVICE_ATTR(led_id, S_IRUGO | S_IWUSR, read_lpc_callback, write_lpc_callback, ATT_MB_LED_ID); +static SENSOR_DEVICE_ATTR(led_poe, S_IRUGO, read_lpc_callback, NULL, ATT_MB_LED_POE); +static SENSOR_DEVICE_ATTR(led_spd, S_IRUGO, read_lpc_callback, NULL, ATT_MB_LED_SPD); +static SENSOR_DEVICE_ATTR(led_fan, S_IRUGO, read_lpc_callback, NULL, ATT_MB_LED_FAN); +static SENSOR_DEVICE_ATTR(led_lnk, S_IRUGO, read_lpc_callback, NULL, ATT_MB_LED_LNK); +static SENSOR_DEVICE_ATTR(led_pwr1, S_IRUGO, read_lpc_callback, NULL, ATT_MB_LED_PWR1); +static SENSOR_DEVICE_ATTR(led_pwr0, S_IRUGO, read_lpc_callback, NULL, ATT_MB_LED_PWR0); + +//SENSOR_DEVICE_ATTR - BSP +static SENSOR_DEVICE_ATTR(bsp_version , S_IRUGO | S_IWUSR, read_bsp_callback, write_bsp_callback, ATT_BSP_VERSION); +static SENSOR_DEVICE_ATTR(bsp_debug , S_IRUGO | S_IWUSR, read_bsp_callback, write_bsp_callback, ATT_BSP_DEBUG); +static SENSOR_DEVICE_ATTR(bsp_pr_info , S_IWUSR , NULL , write_bsp_pr_callback, ATT_BSP_PR_INFO); +static SENSOR_DEVICE_ATTR(bsp_pr_err , S_IWUSR , NULL , write_bsp_pr_callback, ATT_BSP_PR_ERR); +static SENSOR_DEVICE_ATTR(bsp_reg , S_IRUGO | S_IWUSR, read_lpc_callback, write_bsp_callback, ATT_BSP_REG); +static SENSOR_DEVICE_ATTR(bsp_reg_value, S_IRUGO , read_lpc_callback, NULL, ATT_BSP_REG_VALUE); +static SENSOR_DEVICE_ATTR(bsp_gpio_max, S_IRUGO , read_gpio_max_callback, NULL, ATT_BSP_GPIO_MAX); + + +static struct attribute *mb_cpld_attrs[] = { + &sensor_dev_attr_board_id_0.dev_attr.attr, + &sensor_dev_attr_board_id_1.dev_attr.attr, + &sensor_dev_attr_mb_cpld_1_version.dev_attr.attr, + &sensor_dev_attr_mb_cpld_1_version_h.dev_attr.attr, + &sensor_dev_attr_board_sku_id.dev_attr.attr, + &sensor_dev_attr_board_hw_id.dev_attr.attr, + &sensor_dev_attr_board_id_type.dev_attr.attr, + &sensor_dev_attr_board_build_id.dev_attr.attr, + &sensor_dev_attr_board_deph_id.dev_attr.attr, + &sensor_dev_attr_board_ext_id.dev_attr.attr, + &sensor_dev_attr_mux_reset.dev_attr.attr, + &sensor_dev_attr_fan_status.dev_attr.attr, + &sensor_dev_attr_psu_status.dev_attr.attr, + &sensor_dev_attr_port_led_clear.dev_attr.attr, + &sensor_dev_attr_led_sys.dev_attr.attr, + &sensor_dev_attr_led_id.dev_attr.attr, + &sensor_dev_attr_led_poe.dev_attr.attr, + &sensor_dev_attr_led_spd.dev_attr.attr, + &sensor_dev_attr_led_fan.dev_attr.attr, + &sensor_dev_attr_led_lnk.dev_attr.attr, + &sensor_dev_attr_led_pwr0.dev_attr.attr, + &sensor_dev_attr_led_pwr1.dev_attr.attr, + NULL, +}; + +static struct attribute *bsp_attrs[] = { + &sensor_dev_attr_bsp_version.dev_attr.attr, + &sensor_dev_attr_bsp_debug.dev_attr.attr, + &sensor_dev_attr_bsp_pr_info.dev_attr.attr, + &sensor_dev_attr_bsp_pr_err.dev_attr.attr, + &sensor_dev_attr_bsp_reg.dev_attr.attr, + &sensor_dev_attr_bsp_reg_value.dev_attr.attr, + &sensor_dev_attr_bsp_gpio_max.dev_attr.attr, + NULL, +}; + +static struct attribute_group mb_cpld_attr_grp = { + .name = "mb_cpld", + .attrs = mb_cpld_attrs, +}; + +static struct attribute_group bsp_attr_grp = { + .name = "bsp", + .attrs = bsp_attrs, +}; + +static void lpc_dev_release( struct device * dev) +{ + return; +} + +static struct platform_device lpc_dev = { + .name = DRIVER_NAME, + .id = -1, + .dev = { + .release = lpc_dev_release, + } +}; + +static int lpc_drv_probe(struct platform_device *pdev) +{ + int i = 0, grp_num = 2; + int err[5] = {0}; + struct attribute_group *grp; + + lpc_data = devm_kzalloc(&pdev->dev, sizeof(struct lpc_data_s), + GFP_KERNEL); + if(!lpc_data) + return -ENOMEM; + + mutex_init(&lpc_data->access_lock); + + for (i=0; idev.kobj, grp); + if(err[i]) { + printk(KERN_ERR "Cannot create sysfs for group %s\n", grp->name); + goto exit; + } else { + continue; + } + } + + return 0; + +exit: + for (i=0; idev.kobj, grp); + if(!err[i]) { + //remove previous successful cases + continue; + } else { + //remove first failed case, then return + return err[i]; + } + } + return 0; +} + +static int lpc_drv_remove(struct platform_device *pdev) +{ + sysfs_remove_group(&pdev->dev.kobj, &mb_cpld_attr_grp); + sysfs_remove_group(&pdev->dev.kobj, &bsp_attr_grp); + + return 0; +} + +static struct platform_driver lpc_drv = { + .probe = lpc_drv_probe, + .remove = __exit_p(lpc_drv_remove), + .driver = { + .name = DRIVER_NAME, + }, +}; + +int lpc_init(void) +{ + int err = 0; + + err = platform_driver_register(&lpc_drv); + if(err) { + printk(KERN_ERR "%s(#%d): platform_driver_register failed(%d)\n", + __func__, __LINE__, err); + + return err; + } + + err = platform_device_register(&lpc_dev); + if(err) { + printk(KERN_ERR "%s(#%d): platform_device_register failed(%d)\n", + __func__, __LINE__, err); + platform_driver_unregister(&lpc_drv); + return err; + } + + return err; +} + +void lpc_exit(void) +{ + platform_driver_unregister(&lpc_drv); + platform_device_unregister(&lpc_dev); +} + +MODULE_AUTHOR("Leo Lin "); +MODULE_DESCRIPTION("x86_64_ufispace_s6301_56st_lpc driver"); +MODULE_LICENSE("GPL"); + +module_init(lpc_init); +module_exit(lpc_exit); diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s6301-56st/modules/x86-64-ufispace-s6301-56st-sys-eeprom.c b/platform/broadcom/sonic-platform-modules-ufispace/s6301-56st/modules/x86-64-ufispace-s6301-56st-sys-eeprom.c new file mode 100644 index 0000000000..f1d0bbc450 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ufispace/s6301-56st/modules/x86-64-ufispace-s6301-56st-sys-eeprom.c @@ -0,0 +1,283 @@ +/* + * Copyright (C) 1998, 1999 Frodo Looijaard and + * Philip Edelbrock + * Copyright (C) 2003 Greg Kroah-Hartman + * Copyright (C) 2003 IBM Corp. + * Copyright (C) 2004 Jean Delvare + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +/* enable dev_dbg print out */ +//#define DEBUG + +#define __STDC_WANT_LIB_EXT1__ 1 +#include +#include +#include +#include +#include +#include +#include +#include + +#define _memset(s, c, n) memset(s, c, n) + +/* Addresses to scan */ +static const unsigned short normal_i2c[] = { /*0x50, 0x51, 0x52, 0x53, 0x54, + 0x55, 0x56, 0x57,*/ I2C_CLIENT_END }; + +/* Size of EEPROM in bytes */ +#define EEPROM_SIZE 512 + +#define SLICE_BITS (6) +#define SLICE_SIZE (1 << SLICE_BITS) +#define SLICE_NUM (EEPROM_SIZE/SLICE_SIZE) + +/* Each client has this additional data */ +struct eeprom_data { + struct mutex update_lock; + u8 valid; /* bitfield, bit!=0 if slice is valid */ + unsigned long last_updated[SLICE_NUM]; /* In jiffies, 8 slices */ + u8 data[EEPROM_SIZE]; /* Register values */ +}; + + +static void sys_eeprom_update_client(struct i2c_client *client, u8 slice) +{ + struct eeprom_data *data = i2c_get_clientdata(client); + int i, j; + int ret; + int addr; + + mutex_lock(&data->update_lock); + + if (!(data->valid & (1 << slice)) || + time_after(jiffies, data->last_updated[slice] + 300 * HZ)) { + dev_dbg(&client->dev, "Starting eeprom update, slice %u\n", slice); + + addr = slice << SLICE_BITS; + + ret = i2c_smbus_write_byte_data(client, (u8)((addr >> 8) & 0xFF), (u8)(addr & 0xFF)); + /* select the eeprom address */ + if (ret < 0) { + dev_err(&client->dev, "address set failed\n"); + goto exit; + } + + if (!i2c_check_functionality(client->adapter, I2C_FUNC_SMBUS_READ_BYTE)) { + goto exit; + } + + for (i = slice << SLICE_BITS; i < (slice + 1) << SLICE_BITS; i+= SLICE_SIZE) { + for (j = i; j < (i+SLICE_SIZE); j++) { + int res; + + res = i2c_smbus_read_byte(client); + if (res < 0) { + goto exit; + } + + data->data[j] = res & 0xFF; + } + } + + data->last_updated[slice] = jiffies; + data->valid |= (1 << slice); + } +exit: + mutex_unlock(&data->update_lock); +} + +static ssize_t sys_eeprom_read(struct file *filp, struct kobject *kobj, + struct bin_attribute *bin_attr, + char *buf, loff_t off, size_t count) +{ + struct i2c_client *client = to_i2c_client(container_of(kobj, struct device, kobj)); + struct eeprom_data *data = i2c_get_clientdata(client); + u8 slice; + + if (off > EEPROM_SIZE) { + return 0; + } + if (off + count > EEPROM_SIZE) { + count = EEPROM_SIZE - off; + } + if (count == 0) { + return 0; + } + + /* Only refresh slices which contain requested bytes */ + for (slice = off >> SLICE_BITS; slice <= (off + count - 1) >> SLICE_BITS; slice++) { + sys_eeprom_update_client(client, slice); + } + + memcpy(buf, &data->data[off], count); + + return count; +} + +static ssize_t sys_eeprom_write(struct file *filp, struct kobject *kobj, + struct bin_attribute *bin_attr, + char *buf, loff_t off, size_t count) +{ + struct i2c_client *client = to_i2c_client(container_of(kobj, struct device, kobj)); + struct eeprom_data *data = i2c_get_clientdata(client); + int ret; + int i; + u8 cmd; + u16 value16; + + dev_dbg(&client->dev, "sys_eeprom_write off=%d, count=%d\n", (int)off, (int)count); + + if (off > EEPROM_SIZE) { + return 0; + } + if (off + count > EEPROM_SIZE) { + count = EEPROM_SIZE - off; + } + if (count == 0) { + return 0; + } + + mutex_lock(&data->update_lock); + + for(i=0; i < count; i++) { + /* write command */ + cmd = (off >> 8) & 0xff; + value16 = off & 0xff; + value16 |= buf[i] << 8; + ret = i2c_smbus_write_word_data(client, cmd, value16); + + if (ret < 0) { + dev_err(&client->dev, "write address failed at %d \n", (int)off); + goto exit; + } + + off++; + + /* need to wait for write complete */ + udelay(10000); + } +exit: + mutex_unlock(&data->update_lock); + /* force to update client when reading */ + for(i=0; i < SLICE_NUM; i++) { + data->last_updated[i] = 0; + } + + return count; +} + +static struct bin_attribute sys_eeprom_attr = { + .attr = { + .name = "eeprom", + .mode = S_IRUGO | S_IWUSR, + }, + .size = EEPROM_SIZE, + .read = sys_eeprom_read, + .write = sys_eeprom_write, +}; + +/* Return 0 if detection is successful, -ENODEV otherwise */ +static int sys_eeprom_detect(struct i2c_client *client, struct i2c_board_info *info) +{ + struct i2c_adapter *adapter = client->adapter; + + /* EDID EEPROMs are often 24C00 EEPROMs, which answer to all + addresses 0x50-0x57, but we only care about 0x51 and 0x55. So decline + attaching to addresses >= 0x56 on DDC buses */ + if (!(adapter->class & I2C_CLASS_SPD) && client->addr >= 0x56) { + return -ENODEV; + } + + if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_READ_BYTE) + && !i2c_check_functionality(adapter, I2C_FUNC_SMBUS_WRITE_BYTE_DATA)) { + return -ENODEV; + } + + strlcpy(info->type, "eeprom", I2C_NAME_SIZE); + + return 0; +} + +static int sys_eeprom_probe(struct i2c_client *client, + const struct i2c_device_id *id) +{ + struct eeprom_data *data; + int err; + + if (!(data = kzalloc(sizeof(struct eeprom_data), GFP_KERNEL))) { + err = -ENOMEM; + goto exit; + } + +#ifdef __STDC_LIB_EXT1__ + memset_s(data->data, EEPROM_SIZE, 0xff, EEPROM_SIZE); +#else + _memset(data->data, 0xff, EEPROM_SIZE); +#endif + + i2c_set_clientdata(client, data); + mutex_init(&data->update_lock); + + /* create the sysfs eeprom file */ + err = sysfs_create_bin_file(&client->dev.kobj, &sys_eeprom_attr); + if (err) { + goto exit_kfree; + } + + return 0; + +exit_kfree: + kfree(data); +exit: + return err; +} + +#if LINUX_VERSION_CODE < KERNEL_VERSION(6, 1, 0) +static int +#else +static void +#endif +sys_eeprom_remove(struct i2c_client *client) +{ + sysfs_remove_bin_file(&client->dev.kobj, &sys_eeprom_attr); + kfree(i2c_get_clientdata(client)); + +#if LINUX_VERSION_CODE < KERNEL_VERSION(6, 1, 0) + return 0; +#endif +} + +static const struct i2c_device_id sys_eeprom_id[] = { + { "sys_eeprom", 0 }, + { } +}; + +static struct i2c_driver sys_eeprom_driver = { + .driver = { + .name = "sys_eeprom", + }, + .probe = sys_eeprom_probe, + .remove = sys_eeprom_remove, + .id_table = sys_eeprom_id, + + .class = I2C_CLASS_DDC | I2C_CLASS_SPD, + .detect = sys_eeprom_detect, + .address_list = normal_i2c, +}; + +module_i2c_driver(sys_eeprom_driver); + +MODULE_AUTHOR("Leo Lin "); +MODULE_DESCRIPTION("UfiSpace System EEPROM driver"); +MODULE_LICENSE("GPL"); diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s6301-56st/service/pddf-platform-init.service b/platform/broadcom/sonic-platform-modules-ufispace/s6301-56st/service/pddf-platform-init.service new file mode 120000 index 0000000000..0fd9f25b6c --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ufispace/s6301-56st/service/pddf-platform-init.service @@ -0,0 +1 @@ +../../../../pddf/i2c/service/pddf-platform-init.service \ No newline at end of file diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s6301-56st/sonic_platform/__init__.py b/platform/broadcom/sonic-platform-modules-ufispace/s6301-56st/sonic_platform/__init__.py new file mode 100644 index 0000000000..593867d31c --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ufispace/s6301-56st/sonic_platform/__init__.py @@ -0,0 +1,4 @@ +# All the derived classes for PDDF +__all__ = ["platform", "chassis", "sfp", "psu", "thermal", "fan"] +from . import platform + diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s6301-56st/sonic_platform/chassis.py b/platform/broadcom/sonic-platform-modules-ufispace/s6301-56st/sonic_platform/chassis.py new file mode 100644 index 0000000000..a2f1dab648 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ufispace/s6301-56st/sonic_platform/chassis.py @@ -0,0 +1,212 @@ +#!/usr/bin/env python + +############################################################################# +# PDDF +# Module contains an implementation of SONiC Chassis API +# +############################################################################# + +try: + import time + from sonic_platform_pddf_base.pddf_chassis import PddfChassis + from sonic_py_common import device_info +except ImportError as e: + raise ImportError(str(e) + "- required module not found") + +NUM_COMPONENT = 2 + +class Chassis(PddfChassis): + """ + PDDF Platform-specific Chassis class + """ + + port_dict = {} + + def __init__(self, pddf_data=None, pddf_plugin_data=None): + PddfChassis.__init__(self, pddf_data, pddf_plugin_data) + self._initialize_components() + + def _initialize_components(self): + from sonic_platform.component import Component + for index in range(NUM_COMPONENT): + component = Component(index) + self._component_list.append(component) + + # Provide the functions/variables below for which implementation is to be overwritten + def get_name(self): + """ + Retrieves the name of the chassis + Returns: + string: The name of the chassis + """ + return self._eeprom.platform_name_str() + + def initizalize_system_led(self): + return True + + def get_status_led(self): + return self.get_system_led("SYS_LED") + + def get_change_event(self, timeout=0): + """ + Returns a nested dictionary containing all devices which have + experienced a change at chassis level + Args: + timeout: Timeout in milliseconds (optional). If timeout == 0, + this method will block until a change is detected. + Returns: + (bool, dict): + - bool: True if call successful, False if not; + - dict: A nested dictionary where key is a device type, + value is a dictionary with key:value pairs in the format of + {'device_id':'device_event'}, where device_id is the device ID + for this device and device_event. + The known devices's device_id and device_event was defined as table below. + ----------------------------------------------------------------- + device | device_id | device_event | annotate + ----------------------------------------------------------------- + 'sfp' '' '0' Sfp removed + '1' Sfp inserted + '2' I2C bus stuck + '3' Bad eeprom + '4' Unsupported cable + '5' High Temperature + '6' Bad cable + -------------------------------------------------------------------- + Ex. 'sfp':{'11':'0', '12':'1'}, + Indicates that: + sfp 11 has been removed, sfp 12 has been inserted. + Note: For sfp, when event 3-6 happened, the module will not be avalaible, + XCVRD shall stop to read eeprom before SFP recovered from error status. + """ + + change_event_dict = {"sfp": {}} + + start_time = time.time() + forever = False + + if timeout == 0: + forever = True + elif timeout > 0: + timeout = timeout / float(1000) # Convert to secs + else: + print("get_change_event:Invalid timeout value", timeout) + return False, change_event_dict + + end_time = start_time + timeout + if start_time > end_time: + print( + "get_change_event:" "time wrap / invalid timeout value", + timeout, + ) + return False, change_event_dict # Time wrap or possibly incorrect timeout + try: + while timeout >= 0: + # check for sfp + sfp_change_dict = self.get_transceiver_change_event() + + if sfp_change_dict: + change_event_dict["sfp"] = sfp_change_dict + return True, change_event_dict + if forever: + time.sleep(1) + else: + timeout = end_time - time.time() + if timeout >= 1: + time.sleep(1) # We poll at 1 second granularity + else: + if timeout > 0: + time.sleep(timeout) + return True, change_event_dict + except Exception as e: + print(e) + print("get_change_event: Should not reach here.") + return False, change_event_dict + + def get_transceiver_change_event(self, timeout=0): + current_port_dict = {} + ret_dict = {} + + # Check for OIR events and return ret_dict + for index in range(self.platform_inventory['num_ports']): + if self._sfp_list[index].get_presence(): + current_port_dict[index] = self.plugin_data['XCVR']['plug_status']['inserted'] + else: + current_port_dict[index] = self.plugin_data['XCVR']['plug_status']['removed'] + + if len(self.port_dict) == 0: # first time + self.port_dict = current_port_dict + return {} + + if current_port_dict == self.port_dict: + return {} + + # Update reg value + for index, status in current_port_dict.items(): + if self.port_dict[index] != status: + ret_dict[index] = status + #ret_dict[str(index)] = status + self.port_dict = current_port_dict + for index, status in ret_dict.items(): + if int(status) == 1: + pass + #self._sfp_list[int(index)].check_sfp_optoe_type() + return ret_dict + + def get_sfp(self, index): + """ + Retrieves sfp represented by (1-based) index + + Args: + index: An integer, the index (1-based) of the sfp to retrieve. + The index should be the sequence of a physical port in a chassis, + starting from 1. + For example, 1 for Ethernet0, 2 for Ethernet4 and so on. + + Returns: + An object derived from SfpBase representing the specified sfp + """ + sfp = None + + try: + # The index will start from 1 + # sfputil already convert to physical port index according to config + sfp = self._sfp_list[index] + except IndexError: + sys.stderr.write("SFP index {} out of range (1-{})\n".format( + index, len(self._sfp_list))) + return sfp + + def get_reboot_cause(self): + """ + Retrieves the cause of the previous reboot + + Returns: + A tuple (string, string) where the first element is a string + containing the cause of the previous reboot. This string must be + one of the predefined strings in this class. If the first string + is "REBOOT_CAUSE_HARDWARE_OTHER", the second string can be used + to pass a description of the reboot cause. + """ + + reboot_cause_path = self.plugin_data['REBOOT_CAUSE']['reboot_cause_file'] + + try: + with open(reboot_cause_path, 'r', errors='replace') as fd: + data = fd.read() + sw_reboot_cause = data.strip() + except IOError: + sw_reboot_cause = "Unknown" + + return ('REBOOT_CAUSE_NON_HARDWARE', sw_reboot_cause) + + def get_serial_number(self): + """ + Retrieves the hardware serial number for the chassis + + Returns: + A string containing the hardware serial number for this + chassis. + """ + + return self.get_serial() \ No newline at end of file diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s6301-56st/sonic_platform/component.py b/platform/broadcom/sonic-platform-modules-ufispace/s6301-56st/sonic_platform/component.py new file mode 100644 index 0000000000..c0b7816d4a --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ufispace/s6301-56st/sonic_platform/component.py @@ -0,0 +1,108 @@ +############################################################################# +# +# Component contains an implementation of SONiC Platform Base API and +# provides the components firmware management function +# +############################################################################# + +try: + import subprocess + from sonic_platform_base.component_base import ComponentBase +except ImportError as e: + raise ImportError(str(e) + "- required module not found") + +CPLD_SYSFS = { + "CPLD1": "/sys/devices/platform/x86_64_ufispace_s6301_56st_lpc/mb_cpld/mb_cpld_1_version_h", +} + +BIOS_VERSION_PATH = "/sys/class/dmi/id/bios_version" +COMPONENT_LIST= [ + ("CPLD1", "CPLD 1"), + ("BIOS", "Basic Input/Output System"), +] + +class Component(ComponentBase): + """Platform-specific Component class""" + + DEVICE_TYPE = "component" + + def __init__(self, component_index=0): + self.index = component_index + self.name = self.get_name() + + def _run_command(self, command): + # Run bash command and print output to stdout + try: + process = subprocess.Popen( + shlex.split(command), stdout=subprocess.PIPE) + while True: + output = process.stdout.readline() + if output == '' and process.poll() is not None: + break + rc = process.poll() + if rc != 0: + return False + except Exception: + return False + return True + + def _get_bios_version(self): + # Retrieves the BIOS firmware version + try: + with open(BIOS_VERSION_PATH, 'r') as fd: + bios_version = fd.read() + return bios_version.strip() + except Exception as e: + return None + + def _get_cpld_version(self): + # Retrieves the CPLD firmware version + cpld_version = dict() + for cpld_name in CPLD_SYSFS: + cmd = "cat {}".format(CPLD_SYSFS[cpld_name]) + status, value = subprocess.getstatusoutput(cmd) + if not status: + cpld_version[cpld_name] = value.rstrip() + + return cpld_version + + def get_name(self): + """ + Retrieves the name of the component + Returns: + A string containing the name of the component + """ + return COMPONENT_LIST[self.index][0] + + def get_description(self): + """ + Retrieves the description of the component + Returns: + A string containing the description of the component + """ + return COMPONENT_LIST[self.index][1] + + def get_firmware_version(self): + """ + Retrieves the firmware version of module + Returns: + string: The firmware versions of the module + """ + fw_version = None + + if self.name == "BIOS": + fw_version = self._get_bios_version() + elif "CPLD" in self.name: + cpld_version = self._get_cpld_version() + fw_version = cpld_version.get(self.name) + return fw_version + + def install_firmware(self, image_path): + """ + Install firmware to module + Args: + image_path: A string, path to firmware image + Returns: + A boolean, True if install successfully, False if not + """ + raise NotImplementedError diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s6301-56st/sonic_platform/eeprom.py b/platform/broadcom/sonic-platform-modules-ufispace/s6301-56st/sonic_platform/eeprom.py new file mode 100644 index 0000000000..90ab1c779a --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ufispace/s6301-56st/sonic_platform/eeprom.py @@ -0,0 +1,21 @@ +#!/usr/bin/env python + +try: + from sonic_platform_pddf_base.pddf_eeprom import PddfEeprom +except ImportError as e: + raise ImportError(str(e) + "- required module not found") + + +class Eeprom(PddfEeprom): + + def __init__(self, pddf_data=None, pddf_plugin_data=None): + PddfEeprom.__init__(self, pddf_data, pddf_plugin_data) + + # Provide the functions/variables below for which implementation is to be overwritten + + def platform_name_str(self): + (is_valid, results) = self.get_tlv_field(self.eeprom_data, self._TLV_CODE_PLATFORM_NAME) + if not is_valid: + return "N/A" + + return results[2].decode('ascii') \ No newline at end of file diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s6301-56st/sonic_platform/fan.py b/platform/broadcom/sonic-platform-modules-ufispace/s6301-56st/sonic_platform/fan.py new file mode 100644 index 0000000000..adadd97d2d --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ufispace/s6301-56st/sonic_platform/fan.py @@ -0,0 +1,170 @@ +#!/usr/bin/env python + +import os + +try: + from sonic_platform_pddf_base.pddf_fan import PddfFan + from sonic_platform.psu_fru import PsuFru +except ImportError as e: + raise ImportError(str(e) + "- required module not found") + + +class Fan(PddfFan): + """PDDF Platform-Specific Fan class""" + + def __init__(self, tray_idx, fan_idx=0, pddf_data=None, pddf_plugin_data=None, is_psu_fan=False, psu_index=0): + # idx is 0-based + PddfFan.__init__(self, tray_idx, fan_idx, pddf_data, pddf_plugin_data, is_psu_fan, psu_index) + + # Provide the functions/variables below for which implementation is to be overwritten + # Since psu_fan airflow direction cant be read from sysfs, it is fixed as 'F2B' or 'intake' + + def get_max_speed(self): + """ + Retrieves the max speed + + Returns: + An Integer, the max speed + """ + if self.is_psu_fan: + psu_fru = PsuFru(self.fans_psu_index) + max_speed = int(self.plugin_data['PSU']['valmap']['PSU_FAN_MAX_SPEED']) + for dev in self.plugin_data['PSU']['psu_support_list']: + if dev['Manufacturer'] == psu_fru.mfr_id and dev['Name'] == psu_fru.model: + max_speed = int(self.plugin_data['PSU']['valmap'][dev['MaxSpd']]) + break + else: + max_speed = int(self.plugin_data['FAN']['FAN_MAX_SPEED']) + + return max_speed + + def get_speed(self): + """ + Retrieves the speed of fan as a percentage of full speed + + Returns: + An integer, the percentage of full fan speed, in the range 0 (off) + to 100 (full speed) + """ + speed_percentage = 0 + + max_speed = self.get_max_speed() + speed = int(self.get_speed_rpm()) + + speed_percentage = round((speed*100)/max_speed) + + return min(speed_percentage, 100) + + def get_speed_rpm(self): + """ + Retrieves the speed of fan in RPM + + Returns: + An integer, Speed of fan in RPM + """ + rpm_speed = 0 + if self.is_psu_fan: + attr = "psu_fan{}_speed_rpm".format(self.fan_index) + device = "PSU{}".format(self.fans_psu_index) + output = self.pddf_obj.get_attr_name_output(device, attr) + if output is None: + return rpm_speed + + output['status'] = output['status'].rstrip() + if output['status'].isalpha(): + return rpm_speed + else: + rpm_speed = int(float(output['status'])) + else: + ucd_path = "/sys/bus/i2c/devices/5-0034/hwmon/" + if os.path.exists(ucd_path): + hwmon_dir = os.listdir(ucd_path) + with open("{}/{}/fan{}_input".format(ucd_path, hwmon_dir[0], self.fantray_index), "rb") as f: + rpm_speed = int(f.read().strip()) + + return rpm_speed + + def get_direction(self): + """ + Retrieves the direction of fan + Returns: + A string, either FAN_DIRECTION_INTAKE or FAN_DIRECTION_EXHAUST + depending on fan direction + """ + direction = self.FAN_DIRECTION_NOT_APPLICABLE + if self.is_psu_fan: + psu_fru = PsuFru(self.fans_psu_index) + if psu_fru.mfr_id == "not available": + return direction + for dev in self.plugin_data['PSU']['psu_support_list']: + if dev['Manufacturer'] == psu_fru.mfr_id and dev['Name'] == psu_fru.model: + dir = dev['Dir'] + break + else: + attr = "fan{}_direction".format(self.fantray_index) + device = "FAN-CTRL" + output = self.pddf_obj.get_attr_name_output(device, attr) + if not output: + return direction + mode = output['mode'] + val = output['status'].strip() + vmap = self.plugin_data['FAN']['direction'][mode]['valmap'] + if val in vmap: + dir = vmap[val] + + return dir + + def get_presence(self): + """ + Retrieves the presence of the device + Returns: + bool: True if device is present, False if not + """ + presence = False + if self.is_psu_fan: + attr = "psu_present" + device = "PSU{}".format(self.fans_psu_index) + else: + idx = (self.fantray_index-1)*self.platform['num_fans_pertray'] + self.fan_index + attr = "fan" + str(idx) + "_present" + device = "FAN-CTRL" + + output = self.pddf_obj.get_attr_name_output(device, attr) + if not output: + return presence + + + mode = output['mode'] + val = output['status'].strip() + vmap = self.plugin_data['FAN']['present'][mode]['valmap'] + + if val in vmap: + presence = vmap[val] + + return presence + + def get_target_speed(self): + """ + Retrieves the target (expected) speed of the fan + Returns: + An integer, the percentage of full fan speed, in the range 0 (off) + to 100 (full speed) + """ + + return self.get_speed() + + def set_speed(self, speed): + """ + Sets the fan speed + + Args: + speed: An integer, the percentage of full fan speed to set fan to, + in the range 0 (off) to 100 (full speed) + + Returns: + A boolean, True if speed is set successfully, False if not + """ + + print("Setting Fan speed is not allowed") + return False + diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s6301-56st/sonic_platform/fan_drawer.py b/platform/broadcom/sonic-platform-modules-ufispace/s6301-56st/sonic_platform/fan_drawer.py new file mode 100644 index 0000000000..3b9bb607f6 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ufispace/s6301-56st/sonic_platform/fan_drawer.py @@ -0,0 +1,17 @@ +#!/usr/bin/env python + + +try: + from sonic_platform_pddf_base.pddf_fan_drawer import PddfFanDrawer +except ImportError as e: + raise ImportError(str(e) + "- required module not found") + + +class FanDrawer(PddfFanDrawer): + """PDDF Platform-Specific Fan-Drawer class""" + + def __init__(self, tray_idx, pddf_data=None, pddf_plugin_data=None): + # idx is 0-based + PddfFanDrawer.__init__(self, tray_idx, pddf_data, pddf_plugin_data) + + # Provide the functions/variables below for which implementation is to be overwritten diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s6301-56st/sonic_platform/platform.py b/platform/broadcom/sonic-platform-modules-ufispace/s6301-56st/sonic_platform/platform.py new file mode 100644 index 0000000000..406b1179ae --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ufispace/s6301-56st/sonic_platform/platform.py @@ -0,0 +1,25 @@ +#!/usr/bin/env python + +############################################################################# +# PDDF +# Module contains an implementation of SONiC Platform Base API and +# provides the platform information +# +############################################################################# + + +try: + from sonic_platform_pddf_base.pddf_platform import PddfPlatform +except ImportError as e: + raise ImportError(str(e) + "- required module not found") + + +class Platform(PddfPlatform): + """ + PDDF Platform-Specific Platform Class + """ + + def __init__(self): + PddfPlatform.__init__(self) + + # Provide the functions/variables below for which implementation is to be overwritten diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s6301-56st/sonic_platform/psu.py b/platform/broadcom/sonic-platform-modules-ufispace/s6301-56st/sonic_platform/psu.py new file mode 100644 index 0000000000..fff8de4aa9 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ufispace/s6301-56st/sonic_platform/psu.py @@ -0,0 +1,87 @@ +#!/usr/bin/env python + + +try: + from sonic_platform_pddf_base.pddf_psu import PddfPsu + from sonic_platform.psu_fru import PsuFru +except ImportError as e: + raise ImportError(str(e) + "- required module not found") + + +class Psu(PddfPsu): + """PDDF Platform-Specific PSU class""" + + def __init__(self, index, pddf_data=None, pddf_plugin_data=None): + PddfPsu.__init__(self, index, pddf_data, pddf_plugin_data) + self.psu_fru = PsuFru(self.psu_index) + + # Provide the functions/variables below for which implementation is to be overwritten + def get_power(self): + """ + Retrieves current energy supplied by PSU + + Returns: + A float number, the power in watts, + e.g. 302.6 + """ + + # power is returned in micro watts + return round(float(self.get_voltage()*self.get_current()), 2) + + def get_mfr_id(self): + """ + Retrieves the manufacturer's name (or id) of the device + + Returns: + string: Manufacturer's id of device + """ + return self.psu_fru.mfr_id.rstrip() + + def get_model(self): + """ + Retrieves the model number (or part number) of the device + + Returns: + string: Model/part number of device + """ + return self.psu_fru.model.rstrip() + + def get_serial(self): + """ + Retrieves the serial number of the device + + Returns: + string: Serial number of device + """ + return self.psu_fru.serial.rstrip() + + def get_capacity(self): + """ + Retrieves the maximum supplied power by PSU (or PSU capacity) + Returns: + A float number, the maximum power output in Watts. + e.g. 1200.1 + """ + return self.get_maximum_supplied_power() + + def get_type(self): + """ + Gets the type of the PSU + + Returns: + A string, the type of PSU (AC/DC) + """ + mfr = self.get_mfr_id() + model = self.get_model() + ptype = self.plugin_data['PSU']['valmap']['DEFAULT_TYPE'] + + if mfr and model : + for dev in self.plugin_data['PSU']['psu_support_list']: + if dev['Manufacturer'] == mfr and dev['Name'] == model: + ptype = dev['Type'] + break + + + return ptype + + diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s6301-56st/sonic_platform/psu_fru.py b/platform/broadcom/sonic-platform-modules-ufispace/s6301-56st/sonic_platform/psu_fru.py new file mode 100644 index 0000000000..7f640352be --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ufispace/s6301-56st/sonic_platform/psu_fru.py @@ -0,0 +1,52 @@ +#!/usr/bin/env python + +class PsuFru: + """PSU FRU class""" + eeprom = "" + mfr_id = "not available" + model = "not available" + serial = "not available" + + def __init__(self, psu_index): + self.psu_index = psu_index + self.eeprom = "/sys/bus/i2c/devices/2-00{}/eeprom".format(49 + psu_index) + self._parse_fru_eeprom() + + def _parse_fru_eeprom(self): + """ + Parsing eeprom fru content of PSU + """ + try: + with open(self.eeprom, 'rb') as eeprom: + data = eeprom.read() + + # check if dummy content + if data[0] == 0xff: + return + + i = 11 + + data_len = (data[i]&0x3f) + i += 1 + self.mfr_id = data[i:i+data_len].decode('utf-8') + i += data_len + + data_len = (data[i]&0x3f) + i += 1 + i += data_len + + data_len = (data[i]&0x3f) + i += 1 + self.model = data[i:i+data_len].decode('utf-8') + i += data_len + + data_len = (data[i]&0x3f) + i += 1 + i += data_len + + data_len = (data[i]&0x3f) + i += 1 + self.serial = data[i:i+data_len].decode('utf-8') + except Exception as e: + return + diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s6301-56st/sonic_platform/sfp.py b/platform/broadcom/sonic-platform-modules-ufispace/s6301-56st/sonic_platform/sfp.py new file mode 100644 index 0000000000..22229484ae --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ufispace/s6301-56st/sonic_platform/sfp.py @@ -0,0 +1,40 @@ +#!/usr/bin/env python + +try: + from sonic_platform_pddf_base.pddf_sfp import PddfSfp +except ImportError as e: + raise ImportError (str(e) + "- required module not found") + + +class Sfp(PddfSfp): + """ + PDDF Platform-Specific Sfp class + """ + + def __init__(self, index, pddf_data=None, pddf_plugin_data=None): + PddfSfp.__init__(self, index, pddf_data, pddf_plugin_data) + self.index = index + + # Provide the functions/variables below for which implementation is to be overwritten + + def get_error_description(self): + """ + Retrives the error descriptions of the SFP module + Returns: + String that represents the current error descriptions of vendor specific errors + In case there are multiple errors, they should be joined by '|', + like: "Bad EEPROM|Unsupported cable" + """ + if not self.get_presence(): + return self.SFP_STATUS_UNPLUGGED + + return self.SFP_STATUS_OK + + def get_lpmode(self): + return False + + def set_lpmode(self, lpmode): + return False + + def reset(self): + return False diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s6301-56st/sonic_platform/thermal.py b/platform/broadcom/sonic-platform-modules-ufispace/s6301-56st/sonic_platform/thermal.py new file mode 100644 index 0000000000..77d6ec7ae8 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ufispace/s6301-56st/sonic_platform/thermal.py @@ -0,0 +1,17 @@ +#!/usr/bin/env python + + +try: + from sonic_platform_pddf_base.pddf_thermal import PddfThermal +except ImportError as e: + raise ImportError(str(e) + "- required module not found") + + + +class Thermal(PddfThermal): + """PDDF Platform-Specific Thermal class""" + + def __init__(self, index, pddf_data=None, pddf_plugin_data=None, is_psu_thermal=False, psu_index=0): + PddfThermal.__init__(self, index, pddf_data, pddf_plugin_data, is_psu_thermal, psu_index) + + # Provide the functions/variables below for which implementation is to be overwritten diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s6301-56st/sonic_platform_setup.py b/platform/broadcom/sonic-platform-modules-ufispace/s6301-56st/sonic_platform_setup.py new file mode 100644 index 0000000000..3661c84a0c --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ufispace/s6301-56st/sonic_platform_setup.py @@ -0,0 +1,27 @@ +from setuptools import setup + +setup( + name='sonic-platform', + version='1.0', + description='SONiC platform API implementation on ufispace platform', + license='Apache 2.0', + author='SONiC Team', + author_email='linuxnetdev@microsoft.com', + url='https://github.com/Azure/sonic-buildimage', + maintainer='Leo Lin', + maintainer_email='leo.yt.lin@ufispace.com', + packages=['sonic_platform'], + classifiers=[ + 'Development Status :: 3 - Alpha', + 'Environment :: Plugins', + 'Intended Audience :: Developers', + 'Intended Audience :: Information Technology', + 'Intended Audience :: System Administrators', + 'License :: OSI Approved :: Apache Software License', + 'Natural Language :: English', + 'Operating System :: POSIX :: Linux', + 'Programming Language :: Python :: 3.7', + 'Topic :: Utilities', + ], + keywords='sonic SONiC platform PLATFORM', +) diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s6301-56st/utils/pddf_post_device_create.sh b/platform/broadcom/sonic-platform-modules-ufispace/s6301-56st/utils/pddf_post_device_create.sh new file mode 100755 index 0000000000..5905a4e14b --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ufispace/s6301-56st/utils/pddf_post_device_create.sh @@ -0,0 +1,11 @@ +#!/bin/bash +echo "Reset port led" +echo 0 > /sys/devices/platform/x86_64_ufispace_s6301_56st_lpc//mb_cpld/port_led_clear +sleep 0.5 +echo 1 > /sys/devices/platform/x86_64_ufispace_s6301_56st_lpc//mb_cpld/port_led_clear + +curr_led=$(pddf_ledutil getstatusled SYS_LED) +pddf_ledutil setstatusled SYS_LED green +echo "Set System $curr_led to green" + +echo "PDDF device post-create completed" diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s6301-56st/utils/pddf_post_driver_install.sh b/platform/broadcom/sonic-platform-modules-ufispace/s6301-56st/utils/pddf_post_driver_install.sh new file mode 100755 index 0000000000..ed2559977e --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ufispace/s6301-56st/utils/pddf_post_driver_install.sh @@ -0,0 +1,2 @@ +#!/bin/bash +echo "PDDF driver post-install completed" diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s6301-56st/utils/pddf_switch_svc.py b/platform/broadcom/sonic-platform-modules-ufispace/s6301-56st/utils/pddf_switch_svc.py new file mode 100644 index 0000000000..88c1a3b3e5 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ufispace/s6301-56st/utils/pddf_switch_svc.py @@ -0,0 +1,86 @@ +#!/usr/bin/env python +# Script to stop and start the respective platforms default services. +# This will be used while switching the pddf->non-pddf mode and vice versa +import commands + +def check_pddf_support(): + return True + +def stop_platform_svc(): + + ''' + status, output = commands.getstatusoutput("systemctl stop s6301-56st-platform-monitor-fan.service") + if status: + print "Stop s6301-56st-platform-fan.service failed %d"%status + return False + + status, output = commands.getstatusoutput("systemctl stop s6301-56st-platform-monitor-psu.service") + if status: + print "Stop s6301-56st-platform-psu.service failed %d"%status + return False + + status, output = commands.getstatusoutput("systemctl stop s6301-56st-platform-monitor.service") + if status: + print "Stop s6301-56st-platform-init.service failed %d"%status + return False + status, output = commands.getstatusoutput("systemctl disable s6301-56st-platform-monitor.service") + if status: + print "Disable s6301-56st-platform-monitor.service failed %d"%status + return False + ''' + + status, output = commands.getstatusoutput("/usr/local/bin/platform_utility.py deinit") + if status: + print "platform_utility.py deinit command failed %d"%status + return False + + # HACK , stop the pddf-platform-init service if it is active + status, output = commands.getstatusoutput("systemctl stop pddf-platform-init.service") + if status: + print "Stop pddf-platform-init.service along with other platform serives failed %d"%status + return False + + return True + +def start_platform_svc(): + + status, output = commands.getstatusoutput("/usr/local/bin/platform_utility.py init") + if status: + print "platform_utility.py init command failed %d"%status + return False + + ''' + status, output = commands.getstatusoutput("systemctl enable s6301-56st-platform-monitor.service") + if status: + print "Enable s6301-56st-platform-monitor.service failed %d"%status + return False + status, output = commands.getstatusoutput("systemctl start s6301-56st-platform-monitor-fan.service") + if status: + print "Start s6301-56st-platform-monitor-fan.service failed %d"%status + return False + + status, output = commands.getstatusoutput("systemctl start s6301-56st-platform-monitor-psu.service") + if status: + print "Start s6301-56st-platform-monitor-psu.service failed %d"%status + return False + ''' + return True + +def start_platform_pddf(): + + status, output = commands.getstatusoutput("systemctl start pddf-platform-init.service") + if status: + print "Start pddf-platform-init.service failed %d"%status + return False + + return True + +def stop_platform_pddf(): + + status, output = commands.getstatusoutput("systemctl stop pddf-platform-init.service") + if status: + print "Stop pddf-platform-init.service failed %d"%status + return False + + return True + diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s7801-54xs/modules/Makefile b/platform/broadcom/sonic-platform-modules-ufispace/s7801-54xs/modules/Makefile new file mode 100644 index 0000000000..314b48792a --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ufispace/s7801-54xs/modules/Makefile @@ -0,0 +1,7 @@ + +MODULE_NAME = x86-64-ufispace-s7801-54xs-cpld.o x86-64-ufispace-s7801-54xs-sys-eeprom.o x86-64-ufispace-s7801-54xs-lpc.o pddf_custom_gpio_module.o pddf_custom_sysstatus_module.o +obj-m := $(MODULE_NAME) + +CFLAGS_pddf_custom_gpio_module.o := -I$(M)/../../../../pddf/i2c/modules/include +CFLAGS_pddf_custom_sysstatus_module.o := -I$(M)/../../../../pddf/i2c/modules/include +KBUILD_EXTRA_SYMBOLS := $(M)/../../../../pddf/i2c/Module.symvers.PDDF diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s7801-54xs/modules/pddf_custom_gpio_module.c b/platform/broadcom/sonic-platform-modules-ufispace/s7801-54xs/modules/pddf_custom_gpio_module.c new file mode 100644 index 0000000000..adfcbe7884 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ufispace/s7801-54xs/modules/pddf_custom_gpio_module.c @@ -0,0 +1,236 @@ +/* + * Copyright 2019 Broadcom. + * The term “Broadcom” refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * + * PDDF generic kernle module to create the I2C client for pca955x type of GPIO module + */ + +#define __STDC_WANT_LIB_EXT1__ 1 +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include "pddf_client_defs.h" +#include "pddf_gpio_defs.h" + +#define _memset(s, c, n) memset(s, c, n) + +static ssize_t do_device_operation(struct device *dev, struct device_attribute *da, const char *buf, size_t count); +extern void* get_device_table(char *name); +extern void delete_device_table(char *name); + +static int base_gpio_num = 0xf0; +GPIO_DATA gpio_data = {0}; + +/* GPIO CLIENT DATA */ +PDDF_DATA_ATTR(gpio_base, S_IWUSR|S_IRUGO, show_pddf_data, store_pddf_data, PDDF_INT_HEX, sizeof(int), (void*)&gpio_data.gpio_base, NULL); +PDDF_DATA_ATTR(dev_ops, S_IWUSR, NULL, do_device_operation, PDDF_CHAR, 8, (void*)&gpio_data, (void*)&pddf_data); + + + +static struct attribute *gpio_attributes[] = { + &attr_gpio_base.dev_attr.attr, + &attr_dev_ops.dev_attr.attr, + NULL +}; + +static const struct attribute_group pddf_gpio_client_data_group = { + .attrs = gpio_attributes, +}; + + +struct i2c_board_info *i2c_get_gpio_board_info(GPIO_DATA* mdata, NEW_DEV_ATTR *device_data) +{ + static struct i2c_board_info board_info; + struct pca953x_platform_data *gpio_platform_data=NULL; + int def_num_gpios, base; + + gpio_platform_data = (struct pca953x_platform_data *)kzalloc(sizeof (struct pca953x_platform_data), GFP_KERNEL); + + if (strncmp(device_data->dev_type, "pca9554", strlen("pca9554")) == 0 || + strncmp(device_data->dev_type, "pca9534", strlen("pca9534")) == 0 || + strncmp(device_data->dev_type, "pca9538", strlen("pca9538")) == 0) + def_num_gpios = 0x8; + else if (strncmp(device_data->dev_type, "pca9555", strlen("pca9555")) == 0 || + strncmp(device_data->dev_type, "pca9535", strlen("pca9535")) == 0 || + strncmp(device_data->dev_type, "pca9539", strlen("pca9539")) == 0 || + strncmp(device_data->dev_type, "pca9575", strlen("pca9575")) == 0) + def_num_gpios = 0x10; + else if (strncmp(device_data->dev_type, "pca9698", strlen("pca9698")) == 0 || + strncmp(device_data->dev_type, "pca9505", strlen("pca9505")) == 0) + def_num_gpios = 0x28; + else if (strncmp(device_data->dev_type, "tca6424", strlen("tca6424")) == 0) + def_num_gpios = 0x18; + else + { + printk(KERN_ERR "%s: Unknown type of gpio device\n", __FUNCTION__); + return NULL; + } + + if(mdata->gpio_base == 0) { + base = base_gpio_num; + base_gpio_num += def_num_gpios; + } + else { + base = mdata->gpio_base; + } + + gpio_platform_data->gpio_base = base; + + board_info = (struct i2c_board_info) { + .platform_data = gpio_platform_data, + }; + + board_info.addr = device_data->dev_addr; + strcpy(board_info.type, device_data->dev_type); + + return &board_info; +} + + +static ssize_t do_device_operation(struct device *dev, struct device_attribute *da, const char *buf, size_t count) +{ + PDDF_ATTR *ptr = (PDDF_ATTR *)da; + GPIO_DATA *gpio_ptr = (GPIO_DATA *)(ptr->addr); + NEW_DEV_ATTR *device_ptr = (NEW_DEV_ATTR *)(ptr->data); + struct i2c_adapter *adapter; + struct i2c_board_info *board_info; + struct i2c_client *client_ptr; + + if (strncmp(buf, "add", strlen(buf)-1)==0) + { + adapter = i2c_get_adapter(device_ptr->parent_bus); + board_info = i2c_get_gpio_board_info(gpio_ptr, device_ptr); + + /*pddf_dbg(KERN_ERR "Creating a client %s on 0x%x, platform_data 0x%x\n", board_info->type, board_info->addr, board_info->platform_data);*/ + client_ptr = i2c_new_client_device(adapter, board_info); + + i2c_put_adapter(adapter); + if (!IS_ERR(client_ptr)) + { + pddf_dbg(GPIO, KERN_ERR "Created %s client: 0x%p\n", device_ptr->i2c_name, (void *)client_ptr); + add_device_table(device_ptr->i2c_name, (void*)client_ptr); + } + else + { + kfree(board_info); + goto free_data; + } + } + else if (strncmp(buf, "delete", strlen(buf)-1)==0) + { + /*Get the i2c_client handle for the created client*/ + client_ptr = (struct i2c_client *)get_device_table(device_ptr->i2c_name); + if (client_ptr) + { + struct pca953x_platform_data *gpio_platform_data = (struct pca953x_platform_data *)client_ptr->dev.platform_data; + pddf_dbg(GPIO, KERN_ERR "Removing %s client: 0x%p\n", device_ptr->i2c_name, (void *)client_ptr); + i2c_unregister_device(client_ptr); + /*TODO: Nullyfy the platform data*/ + if (gpio_platform_data) + kfree(gpio_platform_data); + delete_device_table(device_ptr->i2c_name); + } + else + { + printk(KERN_ERR "Unable to get the client handle for %s\n", device_ptr->i2c_name); + } + } + else + { + printk(KERN_ERR "PDDF_ERROR: %s: Invalid value for dev_ops %s", __FUNCTION__, buf); + } + +free_data: + +#ifdef __STDC_LIB_EXT1__ + memset_s(gpio_ptr, sizeof(GPIO_DATA), 0, sizeof(GPIO_DATA)); +#else + _memset(gpio_ptr, 0, sizeof(GPIO_DATA)); +#endif + /*TODO: free the device_ptr->data is dynamically allocated*/ +#ifdef __STDC_LIB_EXT1__ + memset_s(device_ptr, sizeof(NEW_DEV_ATTR), 0 , sizeof(NEW_DEV_ATTR)); +#else + _memset(device_ptr, 0 , sizeof(NEW_DEV_ATTR)); +#endif + + return count; +} + + +static struct kobject *gpio_kobj; + +int __init gpio_data_init(void) +{ + struct kobject *device_kobj; + int ret = 0; + + + pddf_dbg(GPIO, "GPIO_DATA MODULE.. init\n"); + + device_kobj = get_device_i2c_kobj(); + if(!device_kobj) + return -ENOMEM; + + gpio_kobj = kobject_create_and_add("gpio", device_kobj); + if(!gpio_kobj) + return -ENOMEM; + + + ret = sysfs_create_group(gpio_kobj, &pddf_clients_data_group); + if (ret) + { + kobject_put(gpio_kobj); + return ret; + } + pddf_dbg(GPIO, "CREATED PDDF I2C CLIENTS CREATION SYSFS GROUP\n"); + + ret = sysfs_create_group(gpio_kobj, &pddf_gpio_client_data_group); + if (ret) + { + sysfs_remove_group(gpio_kobj, &pddf_clients_data_group); + kobject_put(gpio_kobj); + return ret; + } + pddf_dbg(GPIO, "CREATED GPIO DATA SYSFS GROUP\n"); + + return ret; +} + +void __exit gpio_data_exit(void) +{ + pddf_dbg(GPIO, "GPIO_DATA MODULE.. exit\n"); + sysfs_remove_group(gpio_kobj, &pddf_gpio_client_data_group); + sysfs_remove_group(gpio_kobj, &pddf_clients_data_group); + kobject_put(gpio_kobj); + pddf_dbg(GPIO, KERN_ERR "%s: Removed the kobjects for 'gpio'\n",__FUNCTION__); + return; +} + +module_init(gpio_data_init); +module_exit(gpio_data_exit); + +MODULE_AUTHOR("Broadcom"); +MODULE_DESCRIPTION("gpio platform data"); +MODULE_LICENSE("GPL"); diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s7801-54xs/modules/pddf_custom_sysstatus_module.c b/platform/broadcom/sonic-platform-modules-ufispace/s7801-54xs/modules/pddf_custom_sysstatus_module.c new file mode 100644 index 0000000000..3be3941277 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ufispace/s7801-54xs/modules/pddf_custom_sysstatus_module.c @@ -0,0 +1,278 @@ +/* + * Copyright 2019 Broadcom. + * The term ��Broadcom�� refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * + * A pddf kernel module for system status registers + */ + +#define __STDC_WANT_LIB_EXT1__ 1 +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include "../../../../pddf/i2c/modules/include/pddf_client_defs.h" +#include "../../../../pddf/i2c/modules/include/pddf_sysstatus_defs.h" + +#define _memset(s, c, n) memset(s, c, n) + +SYSSTATUS_DATA sysstatus_data = {0}; + +extern int board_i2c_cpld_read(unsigned short cpld_addr, u8 reg); +extern int board_i2c_cpld_write(unsigned short cpld_addr, u8 reg, u8 value); + +static ssize_t do_attr_operation(struct device *dev, struct device_attribute *da, const char *buf, size_t count); +ssize_t show_sysstatus_data(struct device *dev, struct device_attribute *da, char *buf); +ssize_t store_sysstatus_data(struct device *dev, struct device_attribute *da, const char *buf, size_t count); + + +PDDF_DATA_ATTR(attr_name, S_IWUSR|S_IRUGO, show_pddf_data, store_pddf_data, PDDF_CHAR, 32, + (void*)&sysstatus_data.sysstatus_addr_attr.aname, NULL); +PDDF_DATA_ATTR(attr_devaddr, S_IWUSR|S_IRUGO, show_pddf_data, store_pddf_data, PDDF_UINT32, + sizeof(uint32_t), (void*)&sysstatus_data.sysstatus_addr_attr.devaddr , NULL); +PDDF_DATA_ATTR(attr_offset, S_IWUSR|S_IRUGO, show_pddf_data, store_pddf_data, PDDF_UINT32, + sizeof(uint32_t), (void*)&sysstatus_data.sysstatus_addr_attr.offset, NULL); +PDDF_DATA_ATTR(attr_mask, S_IWUSR|S_IRUGO, show_pddf_data, store_pddf_data, PDDF_UINT32, + sizeof(uint32_t), (void*)&sysstatus_data.sysstatus_addr_attr.mask , NULL); +PDDF_DATA_ATTR(attr_len, S_IWUSR|S_IRUGO, show_pddf_data, store_pddf_data, PDDF_UINT32, + sizeof(uint32_t), (void*)&sysstatus_data.sysstatus_addr_attr.len , NULL); +PDDF_DATA_ATTR(attr_ops, S_IWUSR, NULL, do_attr_operation, PDDF_CHAR, 8, (void*)&sysstatus_data, NULL); + + + +static struct attribute *sysstatus_addr_attributes[] = { + &attr_attr_name.dev_attr.attr, + &attr_attr_devaddr.dev_attr.attr, + &attr_attr_offset.dev_attr.attr, + &attr_attr_mask.dev_attr.attr, + &attr_attr_len.dev_attr.attr, + &attr_attr_ops.dev_attr.attr, + NULL +}; + +PDDF_DATA_ATTR(board_sku_id , S_IRUGO, show_sysstatus_data, NULL, PDDF_UCHAR, sizeof(u8), NULL, NULL); +PDDF_DATA_ATTR(board_hw_id , S_IRUGO, show_sysstatus_data, NULL, PDDF_UCHAR, sizeof(u8), NULL, NULL); +PDDF_DATA_ATTR(board_deph_id , S_IRUGO, show_sysstatus_data, NULL, PDDF_UCHAR, sizeof(u8), NULL, NULL); +PDDF_DATA_ATTR(board_build_id , S_IRUGO, show_sysstatus_data, NULL, PDDF_UCHAR, sizeof(u8), NULL, NULL); +PDDF_DATA_ATTR(cpld1_major_ver, S_IRUGO, show_sysstatus_data, NULL, PDDF_UCHAR, sizeof(u8), NULL, NULL); +PDDF_DATA_ATTR(cpld1_minor_ver, S_IRUGO, show_sysstatus_data, NULL, PDDF_UCHAR, sizeof(u8), NULL, NULL); +PDDF_DATA_ATTR(cpld1_build , S_IRUGO, show_sysstatus_data, NULL, PDDF_UCHAR, sizeof(u8), NULL, NULL); +PDDF_DATA_ATTR(cpld2_major_ver, S_IRUGO, show_sysstatus_data, NULL, PDDF_UCHAR, sizeof(u8), NULL, NULL); +PDDF_DATA_ATTR(cpld2_minor_ver, S_IRUGO, show_sysstatus_data, NULL, PDDF_UCHAR, sizeof(u8), NULL, NULL); +PDDF_DATA_ATTR(cpld2_build , S_IRUGO, show_sysstatus_data, NULL, PDDF_UCHAR, sizeof(u8), NULL, NULL); +PDDF_DATA_ATTR(psu_status , S_IRUGO, show_sysstatus_data, NULL, PDDF_UCHAR, sizeof(u8), NULL, NULL); +PDDF_DATA_ATTR(system_led_psu , S_IRUGO, show_sysstatus_data, NULL, PDDF_UCHAR, sizeof(u8), NULL, NULL); +PDDF_DATA_ATTR(system_led_sys , S_IWUSR|S_IRUGO, show_sysstatus_data, store_sysstatus_data, PDDF_UCHAR, sizeof(u8), NULL, NULL); +PDDF_DATA_ATTR(system_led_sync, S_IRUGO, show_sysstatus_data, NULL, PDDF_UCHAR, sizeof(u8), NULL, NULL); +PDDF_DATA_ATTR(system_led_fan , S_IRUGO, show_sysstatus_data, NULL, PDDF_UCHAR, sizeof(u8), NULL, NULL); +PDDF_DATA_ATTR(system_led_id , S_IWUSR|S_IRUGO, show_sysstatus_data, store_sysstatus_data, PDDF_UCHAR, sizeof(u8), NULL, NULL); + +static struct attribute *sysstatus_data_attributes[] = { + &attr_board_sku_id.dev_attr.attr, + &attr_board_hw_id.dev_attr.attr, + &attr_board_deph_id.dev_attr.attr, + &attr_board_build_id.dev_attr.attr, + &attr_cpld1_major_ver.dev_attr.attr, + &attr_cpld1_minor_ver.dev_attr.attr, + &attr_cpld1_build.dev_attr.attr, + &attr_cpld2_major_ver.dev_attr.attr, + &attr_cpld2_minor_ver.dev_attr.attr, + &attr_cpld2_build.dev_attr.attr, + &attr_psu_status.dev_attr.attr, + &attr_system_led_psu.dev_attr.attr, + &attr_system_led_sys.dev_attr.attr, + &attr_system_led_sync.dev_attr.attr, + &attr_system_led_fan.dev_attr.attr, + &attr_system_led_id.dev_attr.attr, + NULL +}; + + +static const struct attribute_group pddf_sysstatus_addr_group = { + .attrs = sysstatus_addr_attributes, +}; + + +static const struct attribute_group pddf_sysstatus_data_group = { + .attrs = sysstatus_data_attributes, +}; + + +static struct kobject *sysstatus_addr_kobj; +static struct kobject *sysstatus_data_kobj; + + + +ssize_t show_sysstatus_data(struct device *dev, struct device_attribute *da, char *buf) +{ + + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + + SYSSTATUS_DATA *data = &sysstatus_data; + struct SYSSTATUS_ADDR_ATTR *sysstatus_addr_attrs = NULL; + int i, status ; + + + for (i=0;isysstatus_addr_attrs[i].aname, attr->dev_attr.attr.name) == 0 ) + { + sysstatus_addr_attrs = &data->sysstatus_addr_attrs[i]; + + } + } + + if (sysstatus_addr_attrs==NULL ) + { + printk(KERN_DEBUG "%s is not supported attribute for this client\n",attr->dev_attr.attr.name); + status = 0; + return sprintf(buf, "0x%x\n", status); + } + else + { + status = board_i2c_cpld_read( sysstatus_addr_attrs->devaddr, sysstatus_addr_attrs->offset); + } + + return sprintf(buf, "0x%x\n", (status&sysstatus_addr_attrs->mask)); + +} + +ssize_t store_sysstatus_data(struct device *dev, struct device_attribute *da, const char *buf, size_t count) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + + SYSSTATUS_DATA *data = &sysstatus_data; + struct SYSSTATUS_ADDR_ATTR *sysstatus_addr_attrs = NULL; + int i, status ; + u8 reg_val; + + for (i=0;isysstatus_addr_attrs[i].aname, attr->dev_attr.attr.name) == 0 ) + { + sysstatus_addr_attrs = &data->sysstatus_addr_attrs[i]; + } + } + + if (sysstatus_addr_attrs==NULL) + { + printk(KERN_DEBUG "%s is not supported attribute for this client\n",attr->dev_attr.attr.name); + return -EINVAL; + } + else + { + if (kstrtou8(buf, 0, ®_val) < 0) + return -EINVAL; + + status = board_i2c_cpld_write(sysstatus_addr_attrs->devaddr, sysstatus_addr_attrs->offset, reg_val); + + if (status!=0) + { + printk(KERN_DEBUG "store_sysstatus_data() %s failed, status=%d\n",data->sysstatus_addr_attrs[i].aname, status); + return status; + } + } + + return count; +} + + + +static ssize_t do_attr_operation(struct device *dev, struct device_attribute *da, const char *buf, size_t count) +{ + PDDF_ATTR *ptr = (PDDF_ATTR *)da; + SYSSTATUS_DATA *pdata = (SYSSTATUS_DATA *)(ptr->addr); + + pdata->sysstatus_addr_attrs[pdata->len] = pdata->sysstatus_addr_attr; + pdata->len++; + pddf_dbg(SYSSTATUS, KERN_ERR "%s: Populating the data for %s\n", __FUNCTION__, pdata->sysstatus_addr_attr.aname); + +#ifdef __STDC_LIB_EXT1__ + memset_s(&pdata->sysstatus_addr_attr, sizeof(pdata->sysstatus_addr_attr, 0, sizeof(pdata->sysstatus_addr_attr)); +#else + _memset(&pdata->sysstatus_addr_attr, 0, sizeof(pdata->sysstatus_addr_attr)); +#endif + + return count; +} + + + + +int __init sysstatus_data_init(void) +{ + struct kobject *device_kobj; + int ret = 0; + + + pddf_dbg(SYSSTATUS, "PDDF SYSSTATUS MODULE.. init\n"); + + device_kobj = get_device_i2c_kobj(); + if(!device_kobj) + return -ENOMEM; + + sysstatus_addr_kobj = kobject_create_and_add("sysstatus", device_kobj); + if(!sysstatus_addr_kobj) + return -ENOMEM; + + sysstatus_data_kobj = kobject_create_and_add("sysstatus_data", sysstatus_addr_kobj); + if(!sysstatus_data_kobj) + return -ENOMEM; + + + ret = sysfs_create_group(sysstatus_addr_kobj, &pddf_sysstatus_addr_group); + if (ret) + { + kobject_put(sysstatus_addr_kobj); + return ret; + } + + ret = sysfs_create_group(sysstatus_data_kobj, &pddf_sysstatus_data_group); + if (ret) + { + sysfs_remove_group(sysstatus_addr_kobj, &pddf_sysstatus_addr_group); + kobject_put(sysstatus_data_kobj); + kobject_put(sysstatus_addr_kobj); + return ret; + } + + + return ret; +} + +void __exit sysstatus_data_exit(void) +{ + pddf_dbg(SYSSTATUS, "PDDF SYSSTATUS MODULE.. exit\n"); + sysfs_remove_group(sysstatus_data_kobj, &pddf_sysstatus_data_group); + sysfs_remove_group(sysstatus_addr_kobj, &pddf_sysstatus_addr_group); + kobject_put(sysstatus_data_kobj); + kobject_put(sysstatus_addr_kobj); + pddf_dbg(SYSSTATUS, KERN_ERR "%s: Removed the kobjects for 'SYSSTATUS'\n",__FUNCTION__); + return; +} + +module_init(sysstatus_data_init); +module_exit(sysstatus_data_exit); + +MODULE_AUTHOR("Broadcom"); +MODULE_DESCRIPTION("SYSSTATUS platform data"); +MODULE_LICENSE("GPL"); diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s7801-54xs/modules/x86-64-ufispace-s7801-54xs-cpld.c b/platform/broadcom/sonic-platform-modules-ufispace/s7801-54xs/modules/x86-64-ufispace-s7801-54xs-cpld.c new file mode 100644 index 0000000000..de1cc1e59b --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ufispace/s7801-54xs/modules/x86-64-ufispace-s7801-54xs-cpld.c @@ -0,0 +1,1520 @@ +/* + * A i2c cpld driver for the ufispace_s7801_54xs + * + * Copyright (C) 2017-2022 UfiSpace Technology Corporation. + * Jason Tsai + * + * Based on ad7414.c + * Copyright 2006 Stefan Roese , DENX Software Engineering + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. + */ +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include "x86-64-ufispace-s7801-54xs-cpld.h" + +#ifdef DEBUG +#define DEBUG_PRINT(fmt, args...) \ + printk(KERN_INFO "%s:%s[%d]: " fmt "\r\n", \ + __FILE__, __func__, __LINE__, ##args) +#else +#define DEBUG_PRINT(fmt, args...) +#endif + +#define BSP_LOG_R(fmt, args...) \ + _bsp_log (LOG_READ, KERN_INFO "%s:%s[%d]: " fmt "\r\n", \ + __FILE__, __func__, __LINE__, ##args) +#define BSP_LOG_W(fmt, args...) \ + _bsp_log (LOG_WRITE, KERN_INFO "%s:%s[%d]: " fmt "\r\n", \ + __FILE__, __func__, __LINE__, ##args) + +#define I2C_READ_BYTE_DATA(ret, lock, i2c_client, reg) \ +{ \ + mutex_lock(lock); \ + ret = i2c_smbus_read_byte_data(i2c_client, reg); \ + mutex_unlock(lock); \ + BSP_LOG_R("cpld[%d], reg=0x%03x, reg_val=0x%02x", data->index, reg, ret); \ +} + +#define I2C_WRITE_BYTE_DATA(ret, lock, i2c_client, reg, val) \ +{ \ + mutex_lock(lock); \ + ret = i2c_smbus_write_byte_data(i2c_client, reg, val); \ + mutex_unlock(lock); \ + BSP_LOG_W("cpld[%d], reg=0x%03x, reg_val=0x%02x", data->index, reg, val); \ +} + +#define _SENSOR_DEVICE_ATTR_RO(_name, _func, _index) \ + SENSOR_DEVICE_ATTR(_name, S_IRUGO, read_##_func, NULL, _index) + +#define _SENSOR_DEVICE_ATTR_WO(_name, _func, _index) \ + SENSOR_DEVICE_ATTR(_name, S_IWUSR, NULL, write_##_func, _index) + +#define _SENSOR_DEVICE_ATTR_RW(_name, _func, _index) \ + SENSOR_DEVICE_ATTR(_name, S_IRUGO | S_IWUSR, read_##_func, write_##_func, _index) + +#define _DEVICE_ATTR(_name) \ + &sensor_dev_attr_##_name.dev_attr.attr + +#define I2C_RW_RETRY_COUNT 3 +#define I2C_RW_RETRY_INTERVAL 60 + +/* CPLD sysfs attributes index */ +enum cpld_sysfs_attributes { + //CPLD 1 + + CPLD_BOARD_ID_0, + CPLD_BOARD_ID_1, + CPLD_ID, + CPLD_CHIP, + CPLD_SKU_EXT, + + CPLD_MAJOR_VER, + CPLD_MINOR_VER, + CPLD_BUILD_VER, + CPLD_VERSION_H, + + CPLD_MAC_INTR, + CPLD_HWM_INTR, + CPLD_CPLD2_INTR, + CPLD_NTM_INTR, + CPLD_FAN_PSU_INTR, + CPLD_SFP_IOEXP_INTR, + CPLD_CPU_NMI_INTR, + CPLD_PTP_INTR, + CPLD_SYSTEM_INTR, + + CPLD_MAC_MASK, + CPLD_HWM_MASK, + CPLD_CPLD2_MASK, + CPLD_NTM_MASK, + CPLD_FAN_PSU_MASK, + CPLD_SFP_IOEXP_MASK, + CPLD_CPU_NMI_MASK, + CPLD_PTP_MASK, + CPLD_SYSTEM_MASK, + + CPLD_MAC_EVT, + CPLD_HWM_EVT, + CPLD_CPLD2_EVT, + CPLD_NTM_EVT, + CPLD_FAN_PSU_EVT, + CPLD_SFP_IOEXP_EVT, + CPLD_CPU_NMI_EVT, + CPLD_PTP_EVT, + + CPLD_EVT_CTRL, + + CPLD_MAC_RESET, + CPLD_SYSTEM_RESET, + CPLD_BMC_NTM_RESET, + CPLD_USB_RESET, + CPLD_I2C_MUX_RESET, + CPLD_I2C_MUX_RESET_2, + CPLD_MISC_RESET, + + CPLD_BRD_PRESENT, + CPLD_PSU_STATUS, + CPLD_SYSTEM_PWR, + CPLD_MAC_SYNCE, + CPLD_MAC_AVS, + CPLD_SYSTEM_STATUS, + CPLD_FAN_PRESENT, + CPLD_WATCHDOG, + CPLD_BOOT_SELECT, + CPLD_MUX_CTRL, + CPLD_MISC_CTRL_1, + CPLD_MISC_CTRL_2, + CPLD_TIMING_CTRL, + + CPLD_MAC_TEMP, + + CPLD_SYSTEM_LED_SYNC, + CPLD_SYSTEM_LED_SYS, + CPLD_SYSTEM_LED_FAN, + CPLD_SYSTEM_LED_PSU_0, + CPLD_SYSTEM_LED_PSU_1, + CPLD_SYSTEM_LED_ID, + + DBG_CPLD_MAC_INTR, + DBG_CPLD_HWM_INTR, + DBG_CPLD_CPLD2_INTR, + DBG_CPLD_NTM_INTR, + DBG_CPLD_FAN_PSU_INTR, + DBG_CPLD_SFP_IOEXP_INTR, + DBG_CPLD_PTP_INTR, + + //CPLD 2 + + //interrupt status + CPLD_SFP_INTR_PRESENT_0_7, + CPLD_SFP_INTR_PRESENT_8_15, + CPLD_SFP_INTR_PRESENT_16_23, + CPLD_SFP_INTR_PRESENT_24_31, + CPLD_SFP_INTR_PRESENT_32_39, + CPLD_SFP_INTR_PRESENT_40_47, + CPLD_QSFP_INTR_PRESENT_48_53, + CPLD_QSFP_INTR_PORT_48_53, + + //interrupt mask + CPLD_SFP_MASK_PRESENT_0_7, + CPLD_SFP_MASK_PRESENT_8_15, + CPLD_SFP_MASK_PRESENT_16_23, + CPLD_SFP_MASK_PRESENT_24_31, + CPLD_SFP_MASK_PRESENT_32_39, + CPLD_SFP_MASK_PRESENT_40_47, + CPLD_QSFP_MASK_PRESENT_48_53, + CPLD_QSFP_MASK_PORT_48_53, + + //interrupt event + CPLD_SFP_EVT_PRESENT_0_7, + CPLD_SFP_EVT_PRESENT_8_15, + CPLD_SFP_EVT_PRESENT_16_23, + CPLD_SFP_EVT_PRESENT_24_31, + CPLD_SFP_EVT_PRESENT_32_39, + CPLD_SFP_EVT_PRESENT_40_47, + CPLD_QSFP_EVT_PRESENT_48_53, + CPLD_QSFP_EVT_PORT_48_53, + + CPLD_SFP_INTR_RX_LOS_0_7, + CPLD_SFP_INTR_RX_LOS_8_15, + CPLD_SFP_INTR_RX_LOS_16_23, + CPLD_SFP_INTR_RX_LOS_24_31, + CPLD_SFP_INTR_RX_LOS_32_39, + CPLD_SFP_INTR_RX_LOS_40_47, + + CPLD_SFP_INTR_TX_FAULT_0_7, + CPLD_SFP_INTR_TX_FAULT_8_15, + CPLD_SFP_INTR_TX_FAULT_16_23, + CPLD_SFP_INTR_TX_FAULT_24_31, + CPLD_SFP_INTR_TX_FAULT_32_39, + CPLD_SFP_INTR_TX_FAULT_40_47, + + CPLD_SFP_MASK_RX_LOS_0_7, + CPLD_SFP_MASK_RX_LOS_8_15, + CPLD_SFP_MASK_RX_LOS_16_23, + CPLD_SFP_MASK_RX_LOS_24_31, + CPLD_SFP_MASK_RX_LOS_32_39, + CPLD_SFP_MASK_RX_LOS_40_47, + + CPLD_SFP_MASK_TX_FAULT_0_7, + CPLD_SFP_MASK_TX_FAULT_8_15, + CPLD_SFP_MASK_TX_FAULT_16_23, + CPLD_SFP_MASK_TX_FAULT_24_31, + CPLD_SFP_MASK_TX_FAULT_32_39, + CPLD_SFP_MASK_TX_FAULT_40_47, + + CPLD_SFP_EVT_RX_LOS_0_7, + CPLD_SFP_EVT_RX_LOS_8_15, + CPLD_SFP_EVT_RX_LOS_16_23, + CPLD_SFP_EVT_RX_LOS_24_31, + CPLD_SFP_EVT_RX_LOS_32_39, + CPLD_SFP_EVT_RX_LOS_40_47, + + CPLD_SFP_EVT_TX_FAULT_0_7, + CPLD_SFP_EVT_TX_FAULT_8_15, + CPLD_SFP_EVT_TX_FAULT_16_23, + CPLD_SFP_EVT_TX_FAULT_24_31, + CPLD_SFP_EVT_TX_FAULT_32_39, + CPLD_SFP_EVT_TX_FAULT_40_47, + + CPLD_SFP_TX_DISABLE_0_7, + CPLD_SFP_TX_DISABLE_8_15, + CPLD_SFP_TX_DISABLE_16_23, + CPLD_SFP_TX_DISABLE_24_31, + CPLD_SFP_TX_DISABLE_32_39, + CPLD_SFP_TX_DISABLE_40_47, + + CPLD_QSFP_RESET_48_53, + CPLD_QSFP_LPMODE_48_53, + + //debug interrupt status + DBG_CPLD_SFP_INTR_PRESENT_0_7, + DBG_CPLD_SFP_INTR_PRESENT_8_15, + DBG_CPLD_SFP_INTR_PRESENT_16_23, + DBG_CPLD_SFP_INTR_PRESENT_24_31, + DBG_CPLD_SFP_INTR_PRESENT_32_39, + DBG_CPLD_SFP_INTR_PRESENT_40_47, + DBG_CPLD_QSFP_INTR_PRESENT_48_53, + DBG_CPLD_QSFP_INTR_PORT_48_53, + + //debug interrupt mask + DBG_CPLD_SFP_INTR_RX_LOS_0_7, + DBG_CPLD_SFP_INTR_RX_LOS_8_15, + DBG_CPLD_SFP_INTR_RX_LOS_16_23, + DBG_CPLD_SFP_INTR_RX_LOS_24_31, + DBG_CPLD_SFP_INTR_RX_LOS_32_39, + DBG_CPLD_SFP_INTR_RX_LOS_40_47, + + DBG_CPLD_SFP_INTR_TX_FAULT_0_7, + DBG_CPLD_SFP_INTR_TX_FAULT_8_15, + DBG_CPLD_SFP_INTR_TX_FAULT_16_23, + DBG_CPLD_SFP_INTR_TX_FAULT_24_31, + DBG_CPLD_SFP_INTR_TX_FAULT_32_39, + DBG_CPLD_SFP_INTR_TX_FAULT_40_47, + + //BSP DEBUG + BSP_DEBUG +}; + +enum bsp_log_types { + LOG_NONE, + LOG_RW, + LOG_READ, + LOG_WRITE +}; + +enum bsp_log_ctrl { + LOG_DISABLE, + LOG_ENABLE +}; + +/* CPLD sysfs attributes hook functions */ +static ssize_t read_cpld_callback(struct device *dev, + struct device_attribute *da, char *buf); +static ssize_t write_cpld_callback(struct device *dev, + struct device_attribute *da, const char *buf, size_t count); +static u8 _read_cpld_reg(struct device *dev, u8 reg, u8 mask); +static ssize_t read_cpld_reg(struct device *dev, char *buf, u8 reg, u8 mask); +static ssize_t write_cpld_reg(struct device *dev, const char *buf, size_t count, u8 reg, u8 mask); +static ssize_t read_bsp(char *buf, char *str); +static ssize_t write_bsp(const char *buf, char *str, size_t str_len, size_t count); +static ssize_t read_bsp_callback(struct device *dev, + struct device_attribute *da, char *buf); +static ssize_t write_bsp_callback(struct device *dev, + struct device_attribute *da, const char *buf, size_t count); +static ssize_t read_cpld_version_h(struct device *dev, + struct device_attribute *da, + char *buf); + +static LIST_HEAD(cpld_client_list); /* client list for cpld */ +static struct mutex list_lock; /* mutex for client list */ + +struct cpld_client_node { + struct i2c_client *client; + struct list_head list; +}; + +struct cpld_data { + int index; /* CPLD index */ + struct mutex access_lock; /* mutex for cpld access */ + u8 access_reg; /* register to access */ +}; + +typedef struct sysfs_info_s +{ + u8 reg; + u8 mask; + u8 permission; +} sysfs_info_t; + +static sysfs_info_t sysfs_info[] = { + //CPLD 1 + + [CPLD_BOARD_ID_0] = {CPLD_BOARD_ID_0_REG, MASK_ALL, PERM_R}, + [CPLD_BOARD_ID_1] = {CPLD_BOARD_ID_1_REG, MASK_ALL, PERM_R}, + [CPLD_ID] = {CPLD_ID_REG, MASK_ALL, PERM_R}, + [CPLD_CHIP] = {CPLD_CHIP_REG, MASK_ALL, PERM_R}, + [CPLD_SKU_EXT] = {CPLD_SKU_EXT_REG, MASK_ALL, PERM_R}, + + [CPLD_MAJOR_VER] = {CPLD_VERSION_REG, MASK_CPLD_MAJOR_VER, PERM_R}, + [CPLD_MINOR_VER] = {CPLD_VERSION_REG, MASK_CPLD_MINOR_VER, PERM_R}, + [CPLD_BUILD_VER] = {CPLD_BUILD_REG, MASK_ALL, PERM_R}, + [CPLD_VERSION_H] = {CPLD_VERSION_REG, MASK_ALL, PERM_R}, + + [CPLD_MAC_INTR] = {CPLD_MAC_INTR_REG, MASK_ALL, PERM_R}, + [CPLD_HWM_INTR] = {CPLD_HWM_INTR_REG, MASK_ALL, PERM_R}, + [CPLD_CPLD2_INTR] = {CPLD_CPLD2_INTR_REG, MASK_ALL, PERM_R}, + [CPLD_NTM_INTR] = {CPLD_NTM_INTR_REG, MASK_ALL, PERM_R}, + [CPLD_FAN_PSU_INTR] = {CPLD_FAN_PSU_INTR_REG, MASK_ALL, PERM_R}, + [CPLD_SFP_IOEXP_INTR] = {CPLD_SFP_IOEXP_INTR_REG, MASK_ALL, PERM_R}, + [CPLD_CPU_NMI_INTR] = {CPLD_CPU_NMI_INTR_REG, MASK_ALL, PERM_R}, + [CPLD_PTP_INTR] = {CPLD_PTP_INTR_REG, MASK_ALL, PERM_R}, + [CPLD_SYSTEM_INTR] = {CPLD_SYSTEM_INTR_REG, MASK_ALL, PERM_R}, + + [CPLD_MAC_MASK] = {CPLD_MAC_MASK_REG, MASK_ALL, PERM_RW}, + [CPLD_HWM_MASK] = {CPLD_HWM_MASK_REG, MASK_ALL, PERM_RW}, + [CPLD_CPLD2_MASK] = {CPLD_CPLD2_MASK_REG, MASK_ALL, PERM_RW}, + [CPLD_NTM_MASK] = {CPLD_NTM_MASK_REG, MASK_ALL, PERM_RW}, + [CPLD_FAN_PSU_MASK] = {CPLD_FAN_PSU_MASK_REG, MASK_ALL, PERM_RW}, + [CPLD_SFP_IOEXP_MASK] = {CPLD_SFP_IOEXP_MASK_REG, MASK_ALL, PERM_RW}, + [CPLD_CPU_NMI_MASK] = {CPLD_CPU_NMI_MASK_REG, MASK_ALL, PERM_RW}, + [CPLD_PTP_MASK] = {CPLD_PTP_MASK_REG, MASK_ALL, PERM_RW}, + [CPLD_SYSTEM_MASK] = {CPLD_SYSTEM_MASK_REG, MASK_ALL, PERM_RW}, + + [CPLD_MAC_EVT] = {CPLD_MAC_EVT_REG, MASK_ALL, PERM_R}, + [CPLD_HWM_EVT] = {CPLD_HWM_EVT_REG, MASK_ALL, PERM_R}, + [CPLD_CPLD2_EVT] = {CPLD_CPLD2_EVT_REG, MASK_ALL, PERM_R}, + [CPLD_NTM_EVT] = {CPLD_NTM_EVT_REG, MASK_ALL, PERM_R}, + [CPLD_FAN_PSU_EVT] = {CPLD_FAN_PSU_EVT_REG, MASK_ALL, PERM_R}, + [CPLD_SFP_IOEXP_EVT] = {CPLD_SFP_IOEXP_EVT_REG, MASK_ALL, PERM_R}, + [CPLD_CPU_NMI_EVT] = {CPLD_CPU_NMI_EVT_REG, MASK_ALL, PERM_R}, + [CPLD_PTP_EVT] = {CPLD_PTP_EVT_REG, MASK_ALL, PERM_R}, + + [CPLD_EVT_CTRL] = {CPLD_EVT_CTRL_REG, MASK_ALL, PERM_RW}, + + [CPLD_MAC_RESET] = {CPLD_MAC_RESET_REG, MASK_ALL, PERM_RW}, + [CPLD_SYSTEM_RESET] = {CPLD_SYSTEM_RESET_REG, MASK_ALL, PERM_RW}, + [CPLD_BMC_NTM_RESET] = {CPLD_BMC_NTM_RESET_REG, MASK_ALL, PERM_RW}, + [CPLD_USB_RESET] = {CPLD_USB_RESET_REG, MASK_ALL, PERM_RW}, + [CPLD_I2C_MUX_RESET] = {CPLD_I2C_MUX_RESET_REG, MASK_ALL, PERM_RW}, + [CPLD_I2C_MUX_RESET_2] = {CPLD_I2C_MUX_RESET_2_REG, MASK_ALL, PERM_RW}, + [CPLD_MISC_RESET] = {CPLD_MISC_RESET_REG, MASK_ALL, PERM_RW}, + + [CPLD_BRD_PRESENT] = {CPLD_BRD_PRESENT_REG, MASK_ALL, PERM_R}, + [CPLD_PSU_STATUS] = {CPLD_PSU_STATUS_REG, MASK_ALL, PERM_R}, + [CPLD_SYSTEM_PWR] = {CPLD_SYSTEM_PWR_REG, MASK_ALL, PERM_R}, + [CPLD_MAC_SYNCE] = {CPLD_MAC_SYNCE_REG, MASK_ALL, PERM_R}, + [CPLD_MAC_AVS] = {CPLD_MAC_AVS_REG, MASK_ALL, PERM_R}, + [CPLD_SYSTEM_STATUS] = {CPLD_SYSTEM_STATUS_REG, MASK_ALL, PERM_R}, + [CPLD_FAN_PRESENT] = {CPLD_FAN_PRESENT_REG, MASK_ALL, PERM_R}, + [CPLD_WATCHDOG] = {CPLD_WATCHDOG_REG, MASK_ALL, PERM_RW}, + [CPLD_BOOT_SELECT] = {CPLD_BOOT_SELECT_REG, MASK_ALL, PERM_RW}, + [CPLD_MUX_CTRL] = {CPLD_MUX_CTRL_REG, MASK_ALL, PERM_RW}, + [CPLD_MISC_CTRL_1] = {CPLD_MISC_CTRL_1_REG, MASK_ALL, PERM_RW}, + [CPLD_MISC_CTRL_2] = {CPLD_MISC_CTRL_2_REG, MASK_ALL, PERM_RW}, + [CPLD_TIMING_CTRL] = {CPLD_TIMING_CTRL_REG, MASK_ALL, PERM_RW}, + + [CPLD_MAC_TEMP] = {CPLD_MAC_TEMP_REG, MASK_ALL, PERM_R}, + + [CPLD_SYSTEM_LED_SYNC] = {CPLD_SYSTEM_LED_SYNC_REG, CPLD_SYSTEM_LED_SYNC_MASK, PERM_RW}, + [CPLD_SYSTEM_LED_SYS] = {CPLD_SYSTEM_LED_SYS_REG, CPLD_SYSTEM_LED_SYS_MASK, PERM_RW}, + [CPLD_SYSTEM_LED_FAN] = {CPLD_SYSTEM_LED_FAN_REG, CPLD_SYSTEM_LED_FAN_MASK, PERM_RW}, + [CPLD_SYSTEM_LED_PSU_0] = {CPLD_SYSTEM_LED_PSU_REG, CPLD_SYSTEM_LED_PSU_0_MASK, PERM_RW}, + [CPLD_SYSTEM_LED_PSU_1] = {CPLD_SYSTEM_LED_PSU_REG, CPLD_SYSTEM_LED_PSU_1_MASK, PERM_RW}, + [CPLD_SYSTEM_LED_ID] = {CPLD_SYSTEM_LED_ID_REG, CPLD_SYSTEM_LED_ID_MASK, PERM_RW}, + + [DBG_CPLD_MAC_INTR] = {DBG_CPLD_MAC_INTR_REG, MASK_ALL, PERM_RW}, + [DBG_CPLD_HWM_INTR] = {DBG_CPLD_HWM_INTR_REG, MASK_ALL, PERM_RW}, + [DBG_CPLD_CPLD2_INTR] = {DBG_CPLD_CPLD2_INTR_REG, MASK_ALL, PERM_RW}, + [DBG_CPLD_NTM_INTR] = {DBG_CPLD_NTM_INTR_REG, MASK_ALL, PERM_RW}, + [DBG_CPLD_FAN_PSU_INTR] = {DBG_CPLD_FAN_PSU_INTR_REG, MASK_ALL, PERM_RW}, + [DBG_CPLD_SFP_IOEXP_INTR] = {DBG_CPLD_SFP_IOEXP_INTR_REG, MASK_ALL, PERM_RW}, + [DBG_CPLD_PTP_INTR] = {DBG_CPLD_PTP_INTR_REG, MASK_ALL, PERM_RW}, + + //CPLD 2 + + //interrupt status + [CPLD_SFP_INTR_PRESENT_0_7] = {CPLD_SFP_INTR_PRESENT_0_7_REG, MASK_ALL, PERM_R}, + [CPLD_SFP_INTR_PRESENT_8_15] = {CPLD_SFP_INTR_PRESENT_8_15_REG, MASK_ALL, PERM_R}, + [CPLD_SFP_INTR_PRESENT_16_23] = {CPLD_SFP_INTR_PRESENT_16_23_REG, MASK_ALL, PERM_R}, + [CPLD_SFP_INTR_PRESENT_24_31] = {CPLD_SFP_INTR_PRESENT_24_31_REG, MASK_ALL, PERM_R}, + [CPLD_SFP_INTR_PRESENT_32_39] = {CPLD_SFP_INTR_PRESENT_32_39_REG, MASK_ALL, PERM_R}, + [CPLD_SFP_INTR_PRESENT_40_47] = {CPLD_SFP_INTR_PRESENT_40_47_REG, MASK_ALL, PERM_R}, + [CPLD_QSFP_INTR_PRESENT_48_53] = {CPLD_QSFP_INTR_PRESENT_48_53_REG, MASK_ALL, PERM_R}, + [CPLD_QSFP_INTR_PORT_48_53] = {CPLD_QSFP_INTR_PORT_48_53_REG, MASK_ALL, PERM_R}, + + //interrupt mask + [CPLD_SFP_MASK_PRESENT_0_7] = {CPLD_SFP_MASK_PRESENT_0_7_REG, MASK_ALL, PERM_RW}, + [CPLD_SFP_MASK_PRESENT_8_15] = {CPLD_SFP_MASK_PRESENT_8_15_REG, MASK_ALL, PERM_RW}, + [CPLD_SFP_MASK_PRESENT_16_23] = {CPLD_SFP_MASK_PRESENT_16_23_REG, MASK_ALL, PERM_RW}, + [CPLD_SFP_MASK_PRESENT_24_31] = {CPLD_SFP_MASK_PRESENT_24_31_REG, MASK_ALL, PERM_RW}, + [CPLD_SFP_MASK_PRESENT_32_39] = {CPLD_SFP_MASK_PRESENT_32_39_REG, MASK_ALL, PERM_RW}, + [CPLD_SFP_MASK_PRESENT_40_47] = {CPLD_SFP_MASK_PRESENT_40_47_REG, MASK_ALL, PERM_RW}, + [CPLD_QSFP_MASK_PRESENT_48_53] = {CPLD_QSFP_MASK_PRESENT_48_53_REG, MASK_ALL, PERM_RW}, + [CPLD_QSFP_MASK_PORT_48_53] = {CPLD_QSFP_MASK_PORT_48_53_REG, MASK_ALL, PERM_RW}, + + //interrupt event + [CPLD_SFP_EVT_PRESENT_0_7] = {CPLD_SFP_EVT_PRESENT_0_7_REG, MASK_ALL, PERM_R}, + [CPLD_SFP_EVT_PRESENT_8_15] = {CPLD_SFP_EVT_PRESENT_8_15_REG, MASK_ALL, PERM_R}, + [CPLD_SFP_EVT_PRESENT_16_23] = {CPLD_SFP_EVT_PRESENT_16_23_REG, MASK_ALL, PERM_R}, + [CPLD_SFP_EVT_PRESENT_24_31] = {CPLD_SFP_EVT_PRESENT_24_31_REG, MASK_ALL, PERM_R}, + [CPLD_SFP_EVT_PRESENT_32_39] = {CPLD_SFP_EVT_PRESENT_32_39_REG, MASK_ALL, PERM_R}, + [CPLD_SFP_EVT_PRESENT_40_47] = {CPLD_SFP_EVT_PRESENT_40_47_REG, MASK_ALL, PERM_R}, + [CPLD_QSFP_EVT_PRESENT_48_53] = {CPLD_QSFP_EVT_PRESENT_48_53_REG, MASK_ALL, PERM_R}, + [CPLD_QSFP_EVT_PORT_48_53] = {CPLD_QSFP_EVT_PORT_48_53_REG, MASK_ALL, PERM_R}, + + [CPLD_SFP_INTR_RX_LOS_0_7] = {CPLD_SFP_INTR_RX_LOS_0_7_REG, MASK_ALL, PERM_R}, + [CPLD_SFP_INTR_RX_LOS_8_15] = {CPLD_SFP_INTR_RX_LOS_8_15_REG, MASK_ALL, PERM_R}, + [CPLD_SFP_INTR_RX_LOS_16_23] = {CPLD_SFP_INTR_RX_LOS_16_23_REG, MASK_ALL, PERM_R}, + [CPLD_SFP_INTR_RX_LOS_24_31] = {CPLD_SFP_INTR_RX_LOS_24_31_REG, MASK_ALL, PERM_R}, + [CPLD_SFP_INTR_RX_LOS_32_39] = {CPLD_SFP_INTR_RX_LOS_32_39_REG, MASK_ALL, PERM_R}, + [CPLD_SFP_INTR_RX_LOS_40_47] = {CPLD_SFP_INTR_RX_LOS_40_47_REG, MASK_ALL, PERM_R}, + + [CPLD_SFP_INTR_TX_FAULT_0_7] = {CPLD_SFP_INTR_TX_FAULT_0_7_REG, MASK_ALL, PERM_R}, + [CPLD_SFP_INTR_TX_FAULT_8_15] = {CPLD_SFP_INTR_TX_FAULT_8_15_REG, MASK_ALL, PERM_R}, + [CPLD_SFP_INTR_TX_FAULT_16_23] = {CPLD_SFP_INTR_TX_FAULT_16_23_REG, MASK_ALL, PERM_R}, + [CPLD_SFP_INTR_TX_FAULT_24_31] = {CPLD_SFP_INTR_TX_FAULT_24_31_REG, MASK_ALL, PERM_R}, + [CPLD_SFP_INTR_TX_FAULT_32_39] = {CPLD_SFP_INTR_TX_FAULT_32_39_REG, MASK_ALL, PERM_R}, + [CPLD_SFP_INTR_TX_FAULT_40_47] = {CPLD_SFP_INTR_TX_FAULT_40_47_REG, MASK_ALL, PERM_R}, + + [CPLD_SFP_MASK_RX_LOS_0_7] = {CPLD_SFP_MASK_RX_LOS_0_7_REG, MASK_ALL, PERM_RW}, + [CPLD_SFP_MASK_RX_LOS_8_15] = {CPLD_SFP_MASK_RX_LOS_8_15_REG, MASK_ALL, PERM_RW}, + [CPLD_SFP_MASK_RX_LOS_16_23] = {CPLD_SFP_MASK_RX_LOS_16_23_REG, MASK_ALL, PERM_RW}, + [CPLD_SFP_MASK_RX_LOS_24_31] = {CPLD_SFP_MASK_RX_LOS_24_31_REG, MASK_ALL, PERM_RW}, + [CPLD_SFP_MASK_RX_LOS_32_39] = {CPLD_SFP_MASK_RX_LOS_32_39_REG, MASK_ALL, PERM_RW}, + [CPLD_SFP_MASK_RX_LOS_40_47] = {CPLD_SFP_MASK_RX_LOS_40_47_REG, MASK_ALL, PERM_RW}, + + [CPLD_SFP_MASK_TX_FAULT_0_7] = {CPLD_SFP_MASK_TX_FAULT_0_7_REG, MASK_ALL, PERM_RW}, + [CPLD_SFP_MASK_TX_FAULT_8_15] = {CPLD_SFP_MASK_TX_FAULT_8_15_REG, MASK_ALL, PERM_RW}, + [CPLD_SFP_MASK_TX_FAULT_16_23] = {CPLD_SFP_MASK_TX_FAULT_16_23_REG, MASK_ALL, PERM_RW}, + [CPLD_SFP_MASK_TX_FAULT_24_31] = {CPLD_SFP_MASK_TX_FAULT_24_31_REG, MASK_ALL, PERM_RW}, + [CPLD_SFP_MASK_TX_FAULT_32_39] = {CPLD_SFP_MASK_TX_FAULT_32_39_REG, MASK_ALL, PERM_RW}, + [CPLD_SFP_MASK_TX_FAULT_40_47] = {CPLD_SFP_MASK_TX_FAULT_40_47_REG, MASK_ALL, PERM_RW}, + + [CPLD_SFP_EVT_RX_LOS_0_7] = {CPLD_SFP_EVT_RX_LOS_0_7_REG, MASK_ALL, PERM_R}, + [CPLD_SFP_EVT_RX_LOS_8_15] = {CPLD_SFP_EVT_RX_LOS_8_15_REG, MASK_ALL, PERM_R}, + [CPLD_SFP_EVT_RX_LOS_16_23] = {CPLD_SFP_EVT_RX_LOS_16_23_REG, MASK_ALL, PERM_R}, + [CPLD_SFP_EVT_RX_LOS_24_31] = {CPLD_SFP_EVT_RX_LOS_24_31_REG, MASK_ALL, PERM_R}, + [CPLD_SFP_EVT_RX_LOS_32_39] = {CPLD_SFP_EVT_RX_LOS_32_39_REG, MASK_ALL, PERM_R}, + [CPLD_SFP_EVT_RX_LOS_40_47] = {CPLD_SFP_EVT_RX_LOS_40_47_REG, MASK_ALL, PERM_R}, + + [CPLD_SFP_EVT_TX_FAULT_0_7] = {CPLD_SFP_EVT_TX_FAULT_0_7_REG, MASK_ALL, PERM_R}, + [CPLD_SFP_EVT_TX_FAULT_8_15] = {CPLD_SFP_EVT_TX_FAULT_8_15_REG, MASK_ALL, PERM_R}, + [CPLD_SFP_EVT_TX_FAULT_16_23] = {CPLD_SFP_EVT_TX_FAULT_16_23_REG, MASK_ALL, PERM_R}, + [CPLD_SFP_EVT_TX_FAULT_24_31] = {CPLD_SFP_EVT_TX_FAULT_24_31_REG, MASK_ALL, PERM_R}, + [CPLD_SFP_EVT_TX_FAULT_32_39] = {CPLD_SFP_EVT_TX_FAULT_32_39_REG, MASK_ALL, PERM_R}, + [CPLD_SFP_EVT_TX_FAULT_40_47] = {CPLD_SFP_EVT_TX_FAULT_40_47_REG, MASK_ALL, PERM_R}, + + [CPLD_SFP_TX_DISABLE_0_7] = {CPLD_SFP_TX_DISABLE_0_7_REG, MASK_ALL, PERM_RW}, + [CPLD_SFP_TX_DISABLE_8_15] = {CPLD_SFP_TX_DISABLE_8_15_REG, MASK_ALL, PERM_RW}, + [CPLD_SFP_TX_DISABLE_16_23] = {CPLD_SFP_TX_DISABLE_16_23_REG, MASK_ALL, PERM_RW}, + [CPLD_SFP_TX_DISABLE_24_31] = {CPLD_SFP_TX_DISABLE_24_31_REG, MASK_ALL, PERM_RW}, + [CPLD_SFP_TX_DISABLE_32_39] = {CPLD_SFP_TX_DISABLE_32_39_REG, MASK_ALL, PERM_RW}, + [CPLD_SFP_TX_DISABLE_40_47] = {CPLD_SFP_TX_DISABLE_40_47_REG, MASK_ALL, PERM_RW}, + + [CPLD_QSFP_RESET_48_53] = {CPLD_QSFP_RESET_48_53_REG, MASK_ALL, PERM_RW}, + [CPLD_QSFP_LPMODE_48_53] = {CPLD_QSFP_LPMODE_48_53_REG, MASK_ALL, PERM_RW}, + + //debug interrupt status + [DBG_CPLD_SFP_INTR_PRESENT_0_7] = {DBG_CPLD_SFP_INTR_PRESENT_0_7_REG, MASK_ALL, PERM_R}, + [DBG_CPLD_SFP_INTR_PRESENT_8_15] = {DBG_CPLD_SFP_INTR_PRESENT_8_15_REG, MASK_ALL, PERM_R}, + [DBG_CPLD_SFP_INTR_PRESENT_16_23] = {DBG_CPLD_SFP_INTR_PRESENT_16_23_REG, MASK_ALL, PERM_R}, + [DBG_CPLD_SFP_INTR_PRESENT_24_31] = {DBG_CPLD_SFP_INTR_PRESENT_24_31_REG, MASK_ALL, PERM_R}, + [DBG_CPLD_SFP_INTR_PRESENT_32_39] = {DBG_CPLD_SFP_INTR_PRESENT_32_39_REG, MASK_ALL, PERM_R}, + [DBG_CPLD_SFP_INTR_PRESENT_40_47] = {DBG_CPLD_SFP_INTR_PRESENT_40_47_REG, MASK_ALL, PERM_R}, + [DBG_CPLD_QSFP_INTR_PRESENT_48_53] = {DBG_CPLD_QSFP_INTR_PRESENT_48_53_REG, MASK_ALL, PERM_R}, + [DBG_CPLD_QSFP_INTR_PORT_48_53] = {DBG_CPLD_QSFP_INTR_PORT_48_53_REG, MASK_ALL, PERM_R}, + + //debug interrupt mask + [DBG_CPLD_SFP_INTR_RX_LOS_0_7] = {DBG_CPLD_SFP_INTR_RX_LOS_0_7_REG, MASK_ALL, PERM_R}, + [DBG_CPLD_SFP_INTR_RX_LOS_8_15] = {DBG_CPLD_SFP_INTR_RX_LOS_8_15_REG, MASK_ALL, PERM_R}, + [DBG_CPLD_SFP_INTR_RX_LOS_16_23] = {DBG_CPLD_SFP_INTR_RX_LOS_16_23_REG, MASK_ALL, PERM_R}, + [DBG_CPLD_SFP_INTR_RX_LOS_24_31] = {DBG_CPLD_SFP_INTR_RX_LOS_24_31_REG, MASK_ALL, PERM_R}, + [DBG_CPLD_SFP_INTR_RX_LOS_32_39] = {DBG_CPLD_SFP_INTR_RX_LOS_32_39_REG, MASK_ALL, PERM_R}, + [DBG_CPLD_SFP_INTR_RX_LOS_40_47] = {DBG_CPLD_SFP_INTR_RX_LOS_40_47_REG, MASK_ALL, PERM_R}, + + [DBG_CPLD_SFP_INTR_TX_FAULT_0_7] = {DBG_CPLD_SFP_INTR_TX_FAULT_0_7_REG, MASK_ALL, PERM_R}, + [DBG_CPLD_SFP_INTR_TX_FAULT_8_15] = {DBG_CPLD_SFP_INTR_TX_FAULT_8_15_REG, MASK_ALL, PERM_R}, + [DBG_CPLD_SFP_INTR_TX_FAULT_16_23] = {DBG_CPLD_SFP_INTR_TX_FAULT_16_23_REG, MASK_ALL, PERM_R}, + [DBG_CPLD_SFP_INTR_TX_FAULT_24_31] = {DBG_CPLD_SFP_INTR_TX_FAULT_24_31_REG, MASK_ALL, PERM_R}, + [DBG_CPLD_SFP_INTR_TX_FAULT_32_39] = {DBG_CPLD_SFP_INTR_TX_FAULT_32_39_REG, MASK_ALL, PERM_R}, + [DBG_CPLD_SFP_INTR_TX_FAULT_40_47] = {DBG_CPLD_SFP_INTR_TX_FAULT_40_47_REG, MASK_ALL, PERM_R}, +}; + +/* CPLD device id and data */ +static const struct i2c_device_id cpld_id[] = { + { "s7801_54xs_cpld1", cpld1 }, + { "s7801_54xs_cpld2", cpld2 }, + {} +}; + +char bsp_debug[2]="0"; +u8 enable_log_read=LOG_DISABLE; +u8 enable_log_write=LOG_DISABLE; + +/* Addresses scanned for cpld */ +static const unsigned short cpld_i2c_addr[] = { 0x30, 0x31, I2C_CLIENT_END }; + +/* define all support register access of cpld in attribute */ + +// CPLD common +static _SENSOR_DEVICE_ATTR_RO(cpld_board_id_0, cpld_callback, CPLD_BOARD_ID_0); +static _SENSOR_DEVICE_ATTR_RO(cpld_board_id_1, cpld_callback, CPLD_BOARD_ID_1); +static _SENSOR_DEVICE_ATTR_RO(cpld_id, cpld_callback, CPLD_ID); +static _SENSOR_DEVICE_ATTR_RO(cpld_chip, cpld_callback, CPLD_CHIP); +static _SENSOR_DEVICE_ATTR_RO(cpld_sku_ext, cpld_callback, CPLD_SKU_EXT); + +static _SENSOR_DEVICE_ATTR_RO(cpld_major_ver, cpld_callback, CPLD_MAJOR_VER); +static _SENSOR_DEVICE_ATTR_RO(cpld_minor_ver, cpld_callback, CPLD_MINOR_VER); +static _SENSOR_DEVICE_ATTR_RO(cpld_build_ver, cpld_callback, CPLD_BUILD_VER); +static _SENSOR_DEVICE_ATTR_RO(cpld_version_h, cpld_version_h, CPLD_VERSION_H); + +static _SENSOR_DEVICE_ATTR_RW(cpld_evt_ctrl, cpld_callback, CPLD_EVT_CTRL); + +//CPLD 1 +static _SENSOR_DEVICE_ATTR_RO(cpld_mac_intr, cpld_callback, CPLD_MAC_INTR); +static _SENSOR_DEVICE_ATTR_RO(cpld_hwm_intr, cpld_callback, CPLD_HWM_INTR); +static _SENSOR_DEVICE_ATTR_RO(cpld_cpld2_intr, cpld_callback, CPLD_CPLD2_INTR); +static _SENSOR_DEVICE_ATTR_RO(cpld_ntm_intr, cpld_callback, CPLD_NTM_INTR); +static _SENSOR_DEVICE_ATTR_RO(cpld_fan_psu_intr, cpld_callback, CPLD_FAN_PSU_INTR); +static _SENSOR_DEVICE_ATTR_RO(cpld_sfp_ioexp_intr, cpld_callback, CPLD_SFP_IOEXP_INTR); +static _SENSOR_DEVICE_ATTR_RO(cpld_cpu_nmi_intr, cpld_callback, CPLD_CPU_NMI_INTR); +static _SENSOR_DEVICE_ATTR_RO(cpld_ptp_intr, cpld_callback, CPLD_PTP_INTR); +static _SENSOR_DEVICE_ATTR_RO(cpld_system_intr, cpld_callback, CPLD_SYSTEM_INTR); + +static _SENSOR_DEVICE_ATTR_RW(cpld_mac_mask, cpld_callback, CPLD_MAC_MASK); +static _SENSOR_DEVICE_ATTR_RW(cpld_hwm_mask, cpld_callback, CPLD_HWM_MASK); +static _SENSOR_DEVICE_ATTR_RW(cpld_cpld2_mask, cpld_callback, CPLD_CPLD2_MASK); +static _SENSOR_DEVICE_ATTR_RW(cpld_ntm_mask, cpld_callback, CPLD_NTM_MASK); +static _SENSOR_DEVICE_ATTR_RW(cpld_fan_psu_mask, cpld_callback, CPLD_FAN_PSU_MASK); +static _SENSOR_DEVICE_ATTR_RW(cpld_sfp_ioexp_mask, cpld_callback, CPLD_SFP_IOEXP_MASK); +static _SENSOR_DEVICE_ATTR_RW(cpld_cpu_nmi_mask, cpld_callback, CPLD_CPU_NMI_MASK); +static _SENSOR_DEVICE_ATTR_RW(cpld_ptp_mask, cpld_callback, CPLD_PTP_MASK); +static _SENSOR_DEVICE_ATTR_RW(cpld_system_mask, cpld_callback, CPLD_SYSTEM_MASK); + +static _SENSOR_DEVICE_ATTR_RO(cpld_mac_evt, cpld_callback, CPLD_MAC_EVT); +static _SENSOR_DEVICE_ATTR_RO(cpld_hwm_evt, cpld_callback, CPLD_HWM_EVT); +static _SENSOR_DEVICE_ATTR_RO(cpld_cpld2_evt, cpld_callback, CPLD_CPLD2_EVT); +static _SENSOR_DEVICE_ATTR_RO(cpld_ntm_evt, cpld_callback, CPLD_NTM_EVT); +static _SENSOR_DEVICE_ATTR_RO(cpld_fan_psu_evt, cpld_callback, CPLD_FAN_PSU_EVT); +static _SENSOR_DEVICE_ATTR_RO(cpld_sfp_ioexp_evt, cpld_callback, CPLD_SFP_IOEXP_EVT); +static _SENSOR_DEVICE_ATTR_RO(cpld_cpu_nmi_evt, cpld_callback, CPLD_CPU_NMI_EVT); +static _SENSOR_DEVICE_ATTR_RO(cpld_ptp_evt, cpld_callback, CPLD_PTP_EVT); + +static _SENSOR_DEVICE_ATTR_RW(cpld_mac_reset, cpld_callback, CPLD_MAC_RESET); +static _SENSOR_DEVICE_ATTR_RW(cpld_system_reset, cpld_callback, CPLD_SYSTEM_RESET); +static _SENSOR_DEVICE_ATTR_RW(cpld_bmc_ntm_reset, cpld_callback, CPLD_BMC_NTM_RESET); +static _SENSOR_DEVICE_ATTR_RW(cpld_usb_reset, cpld_callback, CPLD_USB_RESET); +static _SENSOR_DEVICE_ATTR_RW(cpld_i2c_mux_reset, cpld_callback, CPLD_I2C_MUX_RESET); +static _SENSOR_DEVICE_ATTR_RW(cpld_i2c_mux_reset_2, cpld_callback, CPLD_I2C_MUX_RESET_2); +static _SENSOR_DEVICE_ATTR_RW(cpld_misc_reset, cpld_callback, CPLD_MISC_RESET); + +static _SENSOR_DEVICE_ATTR_RO(cpld_psu_status, cpld_callback, CPLD_PSU_STATUS); +static _SENSOR_DEVICE_ATTR_RO(cpld_mac_synce, cpld_callback, CPLD_MAC_SYNCE); +static _SENSOR_DEVICE_ATTR_RO(cpld_fan_present, cpld_callback, CPLD_FAN_PRESENT); +static _SENSOR_DEVICE_ATTR_RW(cpld_mux_ctrl, cpld_callback, CPLD_MUX_CTRL); + +static _SENSOR_DEVICE_ATTR_RW(cpld_system_led_sync, cpld_callback, CPLD_SYSTEM_LED_SYNC); +static _SENSOR_DEVICE_ATTR_RW(cpld_system_led_sys, cpld_callback, CPLD_SYSTEM_LED_SYS); +static _SENSOR_DEVICE_ATTR_RW(cpld_system_led_fan, cpld_callback, CPLD_SYSTEM_LED_FAN); +static _SENSOR_DEVICE_ATTR_RW(cpld_system_led_psu_0, cpld_callback, CPLD_SYSTEM_LED_PSU_0); +static _SENSOR_DEVICE_ATTR_RW(cpld_system_led_psu_1, cpld_callback, CPLD_SYSTEM_LED_PSU_1); +static _SENSOR_DEVICE_ATTR_RW(cpld_system_led_id, cpld_callback, CPLD_SYSTEM_LED_ID); + +static _SENSOR_DEVICE_ATTR_RW(dbg_cpld_mac_intr, cpld_callback, DBG_CPLD_MAC_INTR); +static _SENSOR_DEVICE_ATTR_RW(dbg_cpld_hwm_intr, cpld_callback, DBG_CPLD_HWM_INTR); +static _SENSOR_DEVICE_ATTR_RW(dbg_cpld_cpld2_intr, cpld_callback, DBG_CPLD_CPLD2_INTR); +static _SENSOR_DEVICE_ATTR_RW(dbg_cpld_ntm_intr, cpld_callback, DBG_CPLD_NTM_INTR); +static _SENSOR_DEVICE_ATTR_RW(dbg_cpld_fan_psu_intr, cpld_callback, DBG_CPLD_FAN_PSU_INTR); +static _SENSOR_DEVICE_ATTR_RW(dbg_cpld_sfp_ioexp_intr, cpld_callback, DBG_CPLD_SFP_IOEXP_INTR); +static _SENSOR_DEVICE_ATTR_RW(dbg_cpld_ptp_intr, cpld_callback, DBG_CPLD_PTP_INTR); + +//CPLD 2 +static _SENSOR_DEVICE_ATTR_RO(cpld_sfp_intr_present_0_7, cpld_callback, CPLD_SFP_INTR_PRESENT_0_7); +static _SENSOR_DEVICE_ATTR_RO(cpld_sfp_intr_present_8_15, cpld_callback, CPLD_SFP_INTR_PRESENT_8_15); +static _SENSOR_DEVICE_ATTR_RO(cpld_sfp_intr_present_16_23, cpld_callback, CPLD_SFP_INTR_PRESENT_16_23); +static _SENSOR_DEVICE_ATTR_RO(cpld_sfp_intr_present_24_31, cpld_callback, CPLD_SFP_INTR_PRESENT_24_31); +static _SENSOR_DEVICE_ATTR_RO(cpld_sfp_intr_present_32_39, cpld_callback, CPLD_SFP_INTR_PRESENT_32_39); +static _SENSOR_DEVICE_ATTR_RO(cpld_sfp_intr_present_40_47, cpld_callback, CPLD_SFP_INTR_PRESENT_40_47); + +static _SENSOR_DEVICE_ATTR_RO(cpld_qsfp_intr_present_48_53, cpld_callback, CPLD_QSFP_INTR_PRESENT_48_53); +static _SENSOR_DEVICE_ATTR_RO(cpld_qsfp_intr_port_48_53, cpld_callback, CPLD_QSFP_INTR_PORT_48_53); + +static _SENSOR_DEVICE_ATTR_RW(cpld_sfp_mask_present_0_7, cpld_callback, CPLD_SFP_MASK_PRESENT_0_7); +static _SENSOR_DEVICE_ATTR_RW(cpld_sfp_mask_present_8_15, cpld_callback, CPLD_SFP_MASK_PRESENT_8_15); +static _SENSOR_DEVICE_ATTR_RW(cpld_sfp_mask_present_16_23, cpld_callback, CPLD_SFP_MASK_PRESENT_16_23); +static _SENSOR_DEVICE_ATTR_RW(cpld_sfp_mask_present_24_31, cpld_callback, CPLD_SFP_MASK_PRESENT_24_31); +static _SENSOR_DEVICE_ATTR_RW(cpld_sfp_mask_present_32_39, cpld_callback, CPLD_SFP_MASK_PRESENT_32_39); +static _SENSOR_DEVICE_ATTR_RW(cpld_sfp_mask_present_40_47, cpld_callback, CPLD_SFP_MASK_PRESENT_40_47); + +static _SENSOR_DEVICE_ATTR_RW(cpld_qsfp_mask_present_48_53, cpld_callback, CPLD_QSFP_MASK_PRESENT_48_53); +static _SENSOR_DEVICE_ATTR_RW(cpld_qsfp_mask_port_48_53, cpld_callback, CPLD_QSFP_MASK_PORT_48_53); + +static _SENSOR_DEVICE_ATTR_RO(cpld_sfp_evt_present_0_7, cpld_callback, CPLD_SFP_EVT_PRESENT_0_7); +static _SENSOR_DEVICE_ATTR_RO(cpld_sfp_evt_present_8_15, cpld_callback, CPLD_SFP_EVT_PRESENT_8_15); +static _SENSOR_DEVICE_ATTR_RO(cpld_sfp_evt_present_16_23, cpld_callback, CPLD_SFP_EVT_PRESENT_16_23); +static _SENSOR_DEVICE_ATTR_RO(cpld_sfp_evt_present_24_31, cpld_callback, CPLD_SFP_EVT_PRESENT_24_31); +static _SENSOR_DEVICE_ATTR_RO(cpld_sfp_evt_present_32_39, cpld_callback, CPLD_SFP_EVT_PRESENT_32_39); +static _SENSOR_DEVICE_ATTR_RO(cpld_sfp_evt_present_40_47, cpld_callback, CPLD_SFP_EVT_PRESENT_40_47); + +static _SENSOR_DEVICE_ATTR_RO(cpld_qsfp_evt_present_48_53, cpld_callback, CPLD_QSFP_EVT_PRESENT_48_53); +static _SENSOR_DEVICE_ATTR_RO(cpld_qsfp_evt_port_48_53, cpld_callback, CPLD_QSFP_EVT_PORT_48_53); + +static _SENSOR_DEVICE_ATTR_RO(cpld_sfp_intr_rx_los_0_7, cpld_callback, CPLD_SFP_INTR_RX_LOS_0_7); +static _SENSOR_DEVICE_ATTR_RO(cpld_sfp_intr_rx_los_8_15, cpld_callback, CPLD_SFP_INTR_RX_LOS_8_15); +static _SENSOR_DEVICE_ATTR_RO(cpld_sfp_intr_rx_los_16_23, cpld_callback, CPLD_SFP_INTR_RX_LOS_16_23); +static _SENSOR_DEVICE_ATTR_RO(cpld_sfp_intr_rx_los_24_31, cpld_callback, CPLD_SFP_INTR_RX_LOS_24_31); +static _SENSOR_DEVICE_ATTR_RO(cpld_sfp_intr_rx_los_32_39, cpld_callback, CPLD_SFP_INTR_RX_LOS_32_39); +static _SENSOR_DEVICE_ATTR_RO(cpld_sfp_intr_rx_los_40_47, cpld_callback, CPLD_SFP_INTR_RX_LOS_40_47); + +static _SENSOR_DEVICE_ATTR_RO(cpld_sfp_intr_tx_fault_0_7, cpld_callback, CPLD_SFP_INTR_TX_FAULT_0_7); +static _SENSOR_DEVICE_ATTR_RO(cpld_sfp_intr_tx_fault_8_15, cpld_callback, CPLD_SFP_INTR_TX_FAULT_8_15); +static _SENSOR_DEVICE_ATTR_RO(cpld_sfp_intr_tx_fault_16_23, cpld_callback, CPLD_SFP_INTR_TX_FAULT_16_23); +static _SENSOR_DEVICE_ATTR_RO(cpld_sfp_intr_tx_fault_24_31, cpld_callback, CPLD_SFP_INTR_TX_FAULT_24_31); +static _SENSOR_DEVICE_ATTR_RO(cpld_sfp_intr_tx_fault_32_39, cpld_callback, CPLD_SFP_INTR_TX_FAULT_32_39); +static _SENSOR_DEVICE_ATTR_RO(cpld_sfp_intr_tx_fault_40_47, cpld_callback, CPLD_SFP_INTR_TX_FAULT_40_47); + +static _SENSOR_DEVICE_ATTR_RW(cpld_sfp_mask_rx_los_0_7, cpld_callback, CPLD_SFP_MASK_RX_LOS_0_7); +static _SENSOR_DEVICE_ATTR_RW(cpld_sfp_mask_rx_los_8_15, cpld_callback, CPLD_SFP_MASK_RX_LOS_8_15); +static _SENSOR_DEVICE_ATTR_RW(cpld_sfp_mask_rx_los_16_23, cpld_callback, CPLD_SFP_MASK_RX_LOS_16_23); +static _SENSOR_DEVICE_ATTR_RW(cpld_sfp_mask_rx_los_24_31, cpld_callback, CPLD_SFP_MASK_RX_LOS_24_31); +static _SENSOR_DEVICE_ATTR_RW(cpld_sfp_mask_rx_los_32_39, cpld_callback, CPLD_SFP_MASK_RX_LOS_32_39); +static _SENSOR_DEVICE_ATTR_RW(cpld_sfp_mask_rx_los_40_47, cpld_callback, CPLD_SFP_MASK_RX_LOS_40_47); + +static _SENSOR_DEVICE_ATTR_RW(cpld_sfp_mask_tx_fault_0_7, cpld_callback, CPLD_SFP_MASK_TX_FAULT_0_7); +static _SENSOR_DEVICE_ATTR_RW(cpld_sfp_mask_tx_fault_8_15, cpld_callback, CPLD_SFP_MASK_TX_FAULT_8_15); +static _SENSOR_DEVICE_ATTR_RW(cpld_sfp_mask_tx_fault_16_23, cpld_callback, CPLD_SFP_MASK_TX_FAULT_16_23); +static _SENSOR_DEVICE_ATTR_RW(cpld_sfp_mask_tx_fault_24_31, cpld_callback, CPLD_SFP_MASK_TX_FAULT_24_31); +static _SENSOR_DEVICE_ATTR_RW(cpld_sfp_mask_tx_fault_32_39, cpld_callback, CPLD_SFP_MASK_TX_FAULT_32_39); +static _SENSOR_DEVICE_ATTR_RW(cpld_sfp_mask_tx_fault_40_47, cpld_callback, CPLD_SFP_MASK_TX_FAULT_40_47); + +static _SENSOR_DEVICE_ATTR_RO(cpld_sfp_evt_rx_los_0_7, cpld_callback, CPLD_SFP_EVT_RX_LOS_0_7); +static _SENSOR_DEVICE_ATTR_RO(cpld_sfp_evt_rx_los_8_15, cpld_callback, CPLD_SFP_EVT_RX_LOS_8_15); +static _SENSOR_DEVICE_ATTR_RO(cpld_sfp_evt_rx_los_16_23, cpld_callback, CPLD_SFP_EVT_RX_LOS_16_23); +static _SENSOR_DEVICE_ATTR_RO(cpld_sfp_evt_rx_los_24_31, cpld_callback, CPLD_SFP_EVT_RX_LOS_24_31); +static _SENSOR_DEVICE_ATTR_RO(cpld_sfp_evt_rx_los_32_39, cpld_callback, CPLD_SFP_EVT_RX_LOS_32_39); +static _SENSOR_DEVICE_ATTR_RO(cpld_sfp_evt_rx_los_40_47, cpld_callback, CPLD_SFP_EVT_RX_LOS_40_47); + +static _SENSOR_DEVICE_ATTR_RO(cpld_sfp_evt_tx_fault_0_7, cpld_callback, CPLD_SFP_EVT_TX_FAULT_0_7); +static _SENSOR_DEVICE_ATTR_RO(cpld_sfp_evt_tx_fault_8_15, cpld_callback, CPLD_SFP_EVT_TX_FAULT_8_15); +static _SENSOR_DEVICE_ATTR_RO(cpld_sfp_evt_tx_fault_16_23, cpld_callback, CPLD_SFP_EVT_TX_FAULT_16_23); +static _SENSOR_DEVICE_ATTR_RO(cpld_sfp_evt_tx_fault_24_31, cpld_callback, CPLD_SFP_EVT_TX_FAULT_24_31); +static _SENSOR_DEVICE_ATTR_RO(cpld_sfp_evt_tx_fault_32_39, cpld_callback, CPLD_SFP_EVT_TX_FAULT_32_39); +static _SENSOR_DEVICE_ATTR_RO(cpld_sfp_evt_tx_fault_40_47, cpld_callback, CPLD_SFP_EVT_TX_FAULT_40_47); + +static _SENSOR_DEVICE_ATTR_RW(cpld_sfp_tx_disable_0_7, cpld_callback, CPLD_SFP_TX_DISABLE_0_7); +static _SENSOR_DEVICE_ATTR_RW(cpld_sfp_tx_disable_8_15, cpld_callback, CPLD_SFP_TX_DISABLE_8_15); +static _SENSOR_DEVICE_ATTR_RW(cpld_sfp_tx_disable_16_23, cpld_callback, CPLD_SFP_TX_DISABLE_16_23); +static _SENSOR_DEVICE_ATTR_RW(cpld_sfp_tx_disable_24_31, cpld_callback, CPLD_SFP_TX_DISABLE_24_31); +static _SENSOR_DEVICE_ATTR_RW(cpld_sfp_tx_disable_32_39, cpld_callback, CPLD_SFP_TX_DISABLE_32_39); +static _SENSOR_DEVICE_ATTR_RW(cpld_sfp_tx_disable_40_47, cpld_callback, CPLD_SFP_TX_DISABLE_40_47); + +static _SENSOR_DEVICE_ATTR_RW(cpld_qsfp_reset_48_53, cpld_callback, CPLD_QSFP_RESET_48_53); +static _SENSOR_DEVICE_ATTR_RW(cpld_qsfp_lpmode_48_53, cpld_callback, CPLD_QSFP_LPMODE_48_53); + +static _SENSOR_DEVICE_ATTR_RW(dbg_cpld_sfp_intr_present_0_7, cpld_callback, DBG_CPLD_SFP_INTR_PRESENT_0_7); +static _SENSOR_DEVICE_ATTR_RW(dbg_cpld_sfp_intr_present_8_15, cpld_callback, DBG_CPLD_SFP_INTR_PRESENT_8_15); +static _SENSOR_DEVICE_ATTR_RW(dbg_cpld_sfp_intr_present_16_23, cpld_callback, DBG_CPLD_SFP_INTR_PRESENT_16_23); +static _SENSOR_DEVICE_ATTR_RW(dbg_cpld_sfp_intr_present_24_31, cpld_callback, DBG_CPLD_SFP_INTR_PRESENT_24_31); +static _SENSOR_DEVICE_ATTR_RW(dbg_cpld_sfp_intr_present_32_39, cpld_callback, DBG_CPLD_SFP_INTR_PRESENT_32_39); +static _SENSOR_DEVICE_ATTR_RW(dbg_cpld_sfp_intr_present_40_47, cpld_callback, DBG_CPLD_SFP_INTR_PRESENT_40_47); + +static _SENSOR_DEVICE_ATTR_RW(dbg_cpld_qsfp_intr_present_48_53, cpld_callback, DBG_CPLD_QSFP_INTR_PRESENT_48_53); +static _SENSOR_DEVICE_ATTR_RW(dbg_cpld_qsfp_intr_port_48_53, cpld_callback, DBG_CPLD_QSFP_INTR_PORT_48_53); + +static _SENSOR_DEVICE_ATTR_RW(dbg_cpld_sfp_intr_rx_los_0_7, cpld_callback, DBG_CPLD_SFP_INTR_RX_LOS_0_7); +static _SENSOR_DEVICE_ATTR_RW(dbg_cpld_sfp_intr_rx_los_8_15, cpld_callback, DBG_CPLD_SFP_INTR_RX_LOS_8_15); +static _SENSOR_DEVICE_ATTR_RW(dbg_cpld_sfp_intr_rx_los_16_23, cpld_callback, DBG_CPLD_SFP_INTR_RX_LOS_16_23); +static _SENSOR_DEVICE_ATTR_RW(dbg_cpld_sfp_intr_rx_los_24_31, cpld_callback, DBG_CPLD_SFP_INTR_RX_LOS_24_31); +static _SENSOR_DEVICE_ATTR_RW(dbg_cpld_sfp_intr_rx_los_32_39, cpld_callback, DBG_CPLD_SFP_INTR_RX_LOS_32_39); +static _SENSOR_DEVICE_ATTR_RW(dbg_cpld_sfp_intr_rx_los_40_47, cpld_callback, DBG_CPLD_SFP_INTR_RX_LOS_40_47); + +static _SENSOR_DEVICE_ATTR_RW(dbg_cpld_sfp_intr_tx_fault_0_7, cpld_callback, DBG_CPLD_SFP_INTR_TX_FAULT_0_7); +static _SENSOR_DEVICE_ATTR_RW(dbg_cpld_sfp_intr_tx_fault_8_15, cpld_callback, DBG_CPLD_SFP_INTR_TX_FAULT_8_15); +static _SENSOR_DEVICE_ATTR_RW(dbg_cpld_sfp_intr_tx_fault_16_23, cpld_callback, DBG_CPLD_SFP_INTR_TX_FAULT_16_23); +static _SENSOR_DEVICE_ATTR_RW(dbg_cpld_sfp_intr_tx_fault_24_31, cpld_callback, DBG_CPLD_SFP_INTR_TX_FAULT_24_31); +static _SENSOR_DEVICE_ATTR_RW(dbg_cpld_sfp_intr_tx_fault_32_39, cpld_callback, DBG_CPLD_SFP_INTR_TX_FAULT_32_39); +static _SENSOR_DEVICE_ATTR_RW(dbg_cpld_sfp_intr_tx_fault_40_47, cpld_callback, DBG_CPLD_SFP_INTR_TX_FAULT_40_47); + +//BSP DEBUG +static _SENSOR_DEVICE_ATTR_RW(bsp_debug, bsp_callback, BSP_DEBUG); + +/* define support attributes of cpldx */ + +/* cpld 1 */ +static struct attribute *cpld1_attributes[] = { + _DEVICE_ATTR(cpld_board_id_0), + _DEVICE_ATTR(cpld_board_id_1), + + _DEVICE_ATTR(cpld_id), + _DEVICE_ATTR(cpld_chip), + _DEVICE_ATTR(cpld_sku_ext), + + _DEVICE_ATTR(cpld_major_ver), + _DEVICE_ATTR(cpld_minor_ver), + _DEVICE_ATTR(cpld_build_ver), + _DEVICE_ATTR(cpld_version_h), + + _DEVICE_ATTR(cpld_mac_intr), + _DEVICE_ATTR(cpld_hwm_intr), + _DEVICE_ATTR(cpld_cpld2_intr), + _DEVICE_ATTR(cpld_ntm_intr), + _DEVICE_ATTR(cpld_fan_psu_intr), + _DEVICE_ATTR(cpld_sfp_ioexp_intr), + _DEVICE_ATTR(cpld_cpu_nmi_intr), + _DEVICE_ATTR(cpld_ptp_intr), + _DEVICE_ATTR(cpld_system_intr), + + _DEVICE_ATTR(cpld_mac_mask), + _DEVICE_ATTR(cpld_hwm_mask), + _DEVICE_ATTR(cpld_cpld2_mask), + _DEVICE_ATTR(cpld_ntm_mask), + _DEVICE_ATTR(cpld_fan_psu_mask), + _DEVICE_ATTR(cpld_sfp_ioexp_mask), + _DEVICE_ATTR(cpld_cpu_nmi_mask), + _DEVICE_ATTR(cpld_ptp_mask), + _DEVICE_ATTR(cpld_system_mask), + + _DEVICE_ATTR(cpld_mac_evt), + _DEVICE_ATTR(cpld_hwm_evt), + _DEVICE_ATTR(cpld_cpld2_evt), + _DEVICE_ATTR(cpld_ntm_evt), + _DEVICE_ATTR(cpld_fan_psu_evt), + _DEVICE_ATTR(cpld_sfp_ioexp_evt), + _DEVICE_ATTR(cpld_cpu_nmi_evt), + _DEVICE_ATTR(cpld_ptp_evt), + + _DEVICE_ATTR(cpld_evt_ctrl), + + _DEVICE_ATTR(cpld_mac_reset), + _DEVICE_ATTR(cpld_system_reset), + _DEVICE_ATTR(cpld_bmc_ntm_reset), + _DEVICE_ATTR(cpld_usb_reset), + _DEVICE_ATTR(cpld_i2c_mux_reset), + _DEVICE_ATTR(cpld_i2c_mux_reset_2), + _DEVICE_ATTR(cpld_misc_reset), + + _DEVICE_ATTR(cpld_psu_status), + _DEVICE_ATTR(cpld_mac_synce), + _DEVICE_ATTR(cpld_fan_present), + _DEVICE_ATTR(cpld_mux_ctrl), + + _DEVICE_ATTR(cpld_system_led_sync), + _DEVICE_ATTR(cpld_system_led_sys), + _DEVICE_ATTR(cpld_system_led_fan), + _DEVICE_ATTR(cpld_system_led_psu_0), + _DEVICE_ATTR(cpld_system_led_psu_1), + _DEVICE_ATTR(cpld_system_led_id), + + _DEVICE_ATTR(dbg_cpld_mac_intr), + _DEVICE_ATTR(dbg_cpld_hwm_intr), + _DEVICE_ATTR(dbg_cpld_cpld2_intr), + _DEVICE_ATTR(dbg_cpld_ntm_intr), + _DEVICE_ATTR(dbg_cpld_fan_psu_intr), + _DEVICE_ATTR(dbg_cpld_sfp_ioexp_intr), + _DEVICE_ATTR(dbg_cpld_ptp_intr), + + _DEVICE_ATTR(bsp_debug), + + NULL +}; + +/* cpld 2 */ +static struct attribute *cpld2_attributes[] = { + _DEVICE_ATTR(cpld_id), + _DEVICE_ATTR(cpld_chip), + + _DEVICE_ATTR(cpld_major_ver), + _DEVICE_ATTR(cpld_minor_ver), + _DEVICE_ATTR(cpld_build_ver), + _DEVICE_ATTR(cpld_version_h), + + _DEVICE_ATTR(cpld_sfp_intr_present_0_7), + _DEVICE_ATTR(cpld_sfp_intr_present_8_15), + _DEVICE_ATTR(cpld_sfp_intr_present_16_23), + _DEVICE_ATTR(cpld_sfp_intr_present_24_31), + _DEVICE_ATTR(cpld_sfp_intr_present_32_39), + _DEVICE_ATTR(cpld_sfp_intr_present_40_47), + + _DEVICE_ATTR(cpld_qsfp_intr_present_48_53), + _DEVICE_ATTR(cpld_qsfp_intr_port_48_53), + + _DEVICE_ATTR(cpld_sfp_mask_present_0_7), + _DEVICE_ATTR(cpld_sfp_mask_present_8_15), + _DEVICE_ATTR(cpld_sfp_mask_present_16_23), + _DEVICE_ATTR(cpld_sfp_mask_present_24_31), + _DEVICE_ATTR(cpld_sfp_mask_present_32_39), + _DEVICE_ATTR(cpld_sfp_mask_present_40_47), + + _DEVICE_ATTR(cpld_qsfp_mask_present_48_53), + _DEVICE_ATTR(cpld_qsfp_mask_port_48_53), + + _DEVICE_ATTR(cpld_sfp_evt_present_0_7), + _DEVICE_ATTR(cpld_sfp_evt_present_8_15), + _DEVICE_ATTR(cpld_sfp_evt_present_16_23), + _DEVICE_ATTR(cpld_sfp_evt_present_24_31), + _DEVICE_ATTR(cpld_sfp_evt_present_32_39), + _DEVICE_ATTR(cpld_sfp_evt_present_40_47), + + _DEVICE_ATTR(cpld_qsfp_evt_present_48_53), + _DEVICE_ATTR(cpld_qsfp_evt_port_48_53), + + _DEVICE_ATTR(cpld_evt_ctrl), + + _DEVICE_ATTR(cpld_sfp_intr_rx_los_0_7), + _DEVICE_ATTR(cpld_sfp_intr_rx_los_8_15), + _DEVICE_ATTR(cpld_sfp_intr_rx_los_16_23), + _DEVICE_ATTR(cpld_sfp_intr_rx_los_24_31), + _DEVICE_ATTR(cpld_sfp_intr_rx_los_32_39), + _DEVICE_ATTR(cpld_sfp_intr_rx_los_40_47), + + _DEVICE_ATTR(cpld_sfp_intr_tx_fault_0_7), + _DEVICE_ATTR(cpld_sfp_intr_tx_fault_8_15), + _DEVICE_ATTR(cpld_sfp_intr_tx_fault_16_23), + _DEVICE_ATTR(cpld_sfp_intr_tx_fault_24_31), + _DEVICE_ATTR(cpld_sfp_intr_tx_fault_32_39), + _DEVICE_ATTR(cpld_sfp_intr_tx_fault_40_47), + + _DEVICE_ATTR(cpld_sfp_mask_rx_los_0_7), + _DEVICE_ATTR(cpld_sfp_mask_rx_los_8_15), + _DEVICE_ATTR(cpld_sfp_mask_rx_los_16_23), + _DEVICE_ATTR(cpld_sfp_mask_rx_los_24_31), + _DEVICE_ATTR(cpld_sfp_mask_rx_los_32_39), + _DEVICE_ATTR(cpld_sfp_mask_rx_los_40_47), + + _DEVICE_ATTR(cpld_sfp_mask_tx_fault_0_7), + _DEVICE_ATTR(cpld_sfp_mask_tx_fault_8_15), + _DEVICE_ATTR(cpld_sfp_mask_tx_fault_16_23), + _DEVICE_ATTR(cpld_sfp_mask_tx_fault_24_31), + _DEVICE_ATTR(cpld_sfp_mask_tx_fault_32_39), + _DEVICE_ATTR(cpld_sfp_mask_tx_fault_40_47), + + _DEVICE_ATTR(cpld_sfp_evt_rx_los_0_7), + _DEVICE_ATTR(cpld_sfp_evt_rx_los_8_15), + _DEVICE_ATTR(cpld_sfp_evt_rx_los_16_23), + _DEVICE_ATTR(cpld_sfp_evt_rx_los_24_31), + _DEVICE_ATTR(cpld_sfp_evt_rx_los_32_39), + _DEVICE_ATTR(cpld_sfp_evt_rx_los_40_47), + + _DEVICE_ATTR(cpld_sfp_evt_tx_fault_0_7), + _DEVICE_ATTR(cpld_sfp_evt_tx_fault_8_15), + _DEVICE_ATTR(cpld_sfp_evt_tx_fault_16_23), + _DEVICE_ATTR(cpld_sfp_evt_tx_fault_24_31), + _DEVICE_ATTR(cpld_sfp_evt_tx_fault_32_39), + _DEVICE_ATTR(cpld_sfp_evt_tx_fault_40_47), + + _DEVICE_ATTR(cpld_sfp_tx_disable_0_7), + _DEVICE_ATTR(cpld_sfp_tx_disable_8_15), + _DEVICE_ATTR(cpld_sfp_tx_disable_16_23), + _DEVICE_ATTR(cpld_sfp_tx_disable_24_31), + _DEVICE_ATTR(cpld_sfp_tx_disable_32_39), + _DEVICE_ATTR(cpld_sfp_tx_disable_40_47), + + _DEVICE_ATTR(cpld_qsfp_reset_48_53), + _DEVICE_ATTR(cpld_qsfp_lpmode_48_53), + + _DEVICE_ATTR(dbg_cpld_sfp_intr_present_0_7), + _DEVICE_ATTR(dbg_cpld_sfp_intr_present_8_15), + _DEVICE_ATTR(dbg_cpld_sfp_intr_present_16_23), + _DEVICE_ATTR(dbg_cpld_sfp_intr_present_24_31), + _DEVICE_ATTR(dbg_cpld_sfp_intr_present_32_39), + _DEVICE_ATTR(dbg_cpld_sfp_intr_present_40_47), + + _DEVICE_ATTR(dbg_cpld_qsfp_intr_present_48_53), + _DEVICE_ATTR(dbg_cpld_qsfp_intr_port_48_53), + + _DEVICE_ATTR(dbg_cpld_sfp_intr_rx_los_0_7), + _DEVICE_ATTR(dbg_cpld_sfp_intr_rx_los_8_15), + _DEVICE_ATTR(dbg_cpld_sfp_intr_rx_los_16_23), + _DEVICE_ATTR(dbg_cpld_sfp_intr_rx_los_24_31), + _DEVICE_ATTR(dbg_cpld_sfp_intr_rx_los_32_39), + _DEVICE_ATTR(dbg_cpld_sfp_intr_rx_los_40_47), + + _DEVICE_ATTR(dbg_cpld_sfp_intr_tx_fault_0_7), + _DEVICE_ATTR(dbg_cpld_sfp_intr_tx_fault_8_15), + _DEVICE_ATTR(dbg_cpld_sfp_intr_tx_fault_16_23), + _DEVICE_ATTR(dbg_cpld_sfp_intr_tx_fault_24_31), + _DEVICE_ATTR(dbg_cpld_sfp_intr_tx_fault_32_39), + _DEVICE_ATTR(dbg_cpld_sfp_intr_tx_fault_40_47), + + NULL +}; + +/* cpld 1 attributes group */ +static const struct attribute_group cpld1_group = { + .attrs = cpld1_attributes, +}; + +/* cpld 2 attributes group */ +static const struct attribute_group cpld2_group = { + .attrs = cpld2_attributes, +}; + +/* reg shift */ +static u8 _shift(u8 mask) +{ + int i=0, mask_one=1; + + for(i=0; i<8; ++i) { + if ((mask & mask_one) == 1) + return i; + else + mask >>= 1; + } + + return -1; +} + +/* reg mask and shift */ +static u8 _mask_shift(u8 val, u8 mask) +{ + int shift=0; + + shift = _shift(mask); + + return (val & mask) >> shift; +} + +static int _bsp_log(u8 log_type, char *fmt, ...) +{ + if ((log_type==LOG_READ && enable_log_read) || + (log_type==LOG_WRITE && enable_log_write)) { + va_list args; + int r; + + va_start(args, fmt); + r = vprintk(fmt, args); + va_end(args); + + return r; + } else { + return 0; + } +} + +static int _config_bsp_log(u8 log_type) +{ + switch(log_type) { + case LOG_NONE: + enable_log_read = LOG_DISABLE; + enable_log_write = LOG_DISABLE; + break; + case LOG_RW: + enable_log_read = LOG_ENABLE; + enable_log_write = LOG_ENABLE; + break; + case LOG_READ: + enable_log_read = LOG_ENABLE; + enable_log_write = LOG_DISABLE; + break; + case LOG_WRITE: + enable_log_read = LOG_DISABLE; + enable_log_write = LOG_ENABLE; + break; + default: + return -EINVAL; + } + return 0; +} + +/* get bsp value */ +static ssize_t read_bsp(char *buf, char *str) +{ + ssize_t len=0; + + len=sprintf(buf, "%s", str); + BSP_LOG_R("reg_val=%s", str); + + return len; +} + +/* set bsp value */ +static ssize_t write_bsp(const char *buf, char *str, size_t str_len, size_t count) +{ + snprintf(str, str_len, "%s", buf); + BSP_LOG_W("reg_val=%s", str); + + return count; +} + +/* get bsp parameter value */ +static ssize_t read_bsp_callback(struct device *dev, + struct device_attribute *da, char *buf) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + int str_len=0; + char *str=NULL; + + switch (attr->index) { + case BSP_DEBUG: + str = bsp_debug; + str_len = sizeof(bsp_debug); + break; + default: + return -EINVAL; + } + return read_bsp(buf, str); +} + +/* set bsp parameter value */ +static ssize_t write_bsp_callback(struct device *dev, + struct device_attribute *da, const char *buf, size_t count) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + int str_len=0; + char *str=NULL; + ssize_t ret = 0; + u8 bsp_debug_u8 = 0; + + switch (attr->index) { + case BSP_DEBUG: + str = bsp_debug; + str_len = sizeof(str); + ret = write_bsp(buf, str, str_len, count); + + if (kstrtou8(buf, 0, &bsp_debug_u8) < 0) { + return -EINVAL; + } else if (_config_bsp_log(bsp_debug_u8) < 0) { + return -EINVAL; + } + return ret; + default: + return -EINVAL; + } + return 0; +} + +/* get cpld register value */ +static ssize_t read_cpld_callback(struct device *dev, + struct device_attribute *da, char *buf) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + u8 reg = 0; + u8 mask = MASK_ALL; + + if (IS_PERM_R(sysfs_info[attr->index].permission)) { + reg = sysfs_info[attr->index].reg; + mask = sysfs_info[attr->index].mask; + } else { + dev_err(dev, "%s() error, attr->index=%d\n", __func__, attr->index); + return -EINVAL; + } + + return read_cpld_reg(dev, buf, reg, mask); +} + +/* set cpld register value */ +static ssize_t write_cpld_callback(struct device *dev, + struct device_attribute *da, const char *buf, size_t count) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + u8 reg = 0; + u8 mask = MASK_ALL; + + if (IS_PERM_W(sysfs_info[attr->index].permission)) { + reg = sysfs_info[attr->index].reg; + mask = sysfs_info[attr->index].mask; + } else { + dev_err(dev, "%s() error, attr->index=%d\n", __func__, attr->index); + return -EINVAL; + } + + return write_cpld_reg(dev, buf, count, reg, mask); +} + +/* get cpld register value */ +static u8 _read_cpld_reg(struct device *dev, + u8 reg, + u8 mask) +{ + struct i2c_client *client = to_i2c_client(dev); + struct cpld_data *data = i2c_get_clientdata(client); + int reg_val; + + I2C_READ_BYTE_DATA(reg_val, &data->access_lock, client, reg); + + if (unlikely(reg_val < 0)) { + return reg_val; + } else { + reg_val=_mask_shift(reg_val, mask); + return reg_val; + } +} + +/* get cpld register value */ +static ssize_t read_cpld_reg(struct device *dev, + char *buf, + u8 reg, + u8 mask) +{ + int reg_val; + + reg_val = _read_cpld_reg(dev, reg, mask); + if (unlikely(reg_val < 0)) { + dev_err(dev, "read_cpld_reg() error, reg_val=%d\n", reg_val); + return reg_val; + } else { + return sprintf(buf, "0x%02x\n", reg_val); + } +} + +/* set cpld register value */ +static ssize_t write_cpld_reg(struct device *dev, + const char *buf, + size_t count, + u8 reg, + u8 mask) +{ + struct i2c_client *client = to_i2c_client(dev); + struct cpld_data *data = i2c_get_clientdata(client); + u8 reg_val, reg_val_now, shift; + int ret = 0; + + if (kstrtou8(buf, 0, ®_val) < 0) + return -EINVAL; + + //apply continuous bits operation if mask is specified, discontinuous bits are not supported + if (mask != MASK_ALL) { + reg_val_now = _read_cpld_reg(dev, reg, MASK_ALL); + if (unlikely(reg_val_now < 0)) { + dev_err(dev, "write_cpld_reg() error, reg_val_now=%d\n", reg_val_now); + return reg_val_now; + } else { + //clear bits in reg_val_now by the mask + reg_val_now &= ~mask; + //get bit shift by the mask + shift = _shift(mask); + //calculate new reg_val + reg_val = reg_val_now | (reg_val << shift); + } + } + + I2C_WRITE_BYTE_DATA(ret, &data->access_lock, + client, reg, reg_val); + + if (unlikely(ret < 0)) { + dev_err(dev, "write_cpld_reg() error, return=%d\n", ret); + return ret; + } + + return count; +} + +/* get qsfp port config register value */ +static ssize_t read_cpld_version_h(struct device *dev, + struct device_attribute *da, + char *buf) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + + if (attr->index >= CPLD_VERSION_H) { + return sprintf(buf, "%d.%02d.%03d", + _read_cpld_reg(dev, CPLD_VERSION_REG, MASK_CPLD_MAJOR_VER), + _read_cpld_reg(dev, CPLD_VERSION_REG, MASK_CPLD_MINOR_VER), + _read_cpld_reg(dev, CPLD_BUILD_REG, MASK_ALL)); + } + return -1; +} + +/* add valid cpld client to list */ +static void cpld_add_client(struct i2c_client *client) +{ + struct cpld_client_node *node = NULL; + + node = kzalloc(sizeof(struct cpld_client_node), GFP_KERNEL); + if (!node) { + dev_info(&client->dev, + "Can't allocate cpld_client_node for index %d\n", + client->addr); + return; + } + + node->client = client; + + mutex_lock(&list_lock); + list_add(&node->list, &cpld_client_list); + mutex_unlock(&list_lock); +} + +/* remove exist cpld client in list */ +static void cpld_remove_client(struct i2c_client *client) +{ + struct list_head *list_node = NULL; + struct cpld_client_node *cpld_node = NULL; + int found = 0; + + mutex_lock(&list_lock); + list_for_each(list_node, &cpld_client_list) { + cpld_node = list_entry(list_node, + struct cpld_client_node, list); + + if (cpld_node->client == client) { + found = 1; + break; + } + } + + if (found) { + list_del(list_node); + kfree(cpld_node); + } + mutex_unlock(&list_lock); +} + +/* cpld drvier probe */ +static int cpld_probe(struct i2c_client *client, + const struct i2c_device_id *dev_id) +{ + int status; + struct cpld_data *data = NULL; + int ret = -EPERM; + + data = kzalloc(sizeof(struct cpld_data), GFP_KERNEL); + if (!data) + return -ENOMEM; + + /* init cpld data for client */ + i2c_set_clientdata(client, data); + mutex_init(&data->access_lock); + + if (!i2c_check_functionality(client->adapter, + I2C_FUNC_SMBUS_BYTE_DATA)) { + dev_info(&client->dev, + "i2c_check_functionality failed (0x%x)\n", + client->addr); + status = -EIO; + goto exit; + } + + /* get cpld id from device */ + ret = i2c_smbus_read_byte_data(client, CPLD_ID_REG); + + if (ret < 0) { + dev_info(&client->dev, + "fail to get cpld id (0x%x) at addr (0x%x)\n", + CPLD_ID_REG, client->addr); + status = -EIO; + goto exit; + } + + if (INVALID(ret, cpld1, cpld2)) { + dev_info(&client->dev, + "cpld id %d(device) not valid\n", ret); + //status = -EPERM; + //goto exit; + } + +#if 0 + /* change client name for each cpld with index */ + snprintf(client->name, sizeof(client->name), "%s_%d", client->name, + data->index); +#endif + + data->index = dev_id->driver_data; + + /* register sysfs hooks for different cpld group */ + dev_info(&client->dev, "probe cpld with index %d\n", data->index); + switch (data->index) { + case cpld1: + status = sysfs_create_group(&client->dev.kobj, + &cpld1_group); + break; + case cpld2: + status = sysfs_create_group(&client->dev.kobj, + &cpld2_group); + break; + default: + status = -EINVAL; + } + + if (status) + goto exit; + + dev_info(&client->dev, "chip found\n"); + + /* add probe chip to client list */ + cpld_add_client(client); + + return 0; +exit: + switch (data->index) { + case cpld1: + sysfs_remove_group(&client->dev.kobj, &cpld1_group); + break; + case cpld2: + sysfs_remove_group(&client->dev.kobj, &cpld2_group); + break; + default: + break; + } + return status; +} + +/* cpld drvier remove */ +#if LINUX_VERSION_CODE < KERNEL_VERSION(6, 1, 0) +static int +#else +static void +#endif +cpld_remove(struct i2c_client *client) +{ + struct cpld_data *data = i2c_get_clientdata(client); + + switch (data->index) { + case cpld1: + sysfs_remove_group(&client->dev.kobj, &cpld1_group); + break; + case cpld2: + sysfs_remove_group(&client->dev.kobj, &cpld2_group); + break; + } + + cpld_remove_client(client); +#if LINUX_VERSION_CODE < KERNEL_VERSION(6, 1, 0) + return 0; +#endif +} + +static int s7801_54xs_cpld_read_internal(struct i2c_client *client, u8 reg) +{ + int retry = I2C_RW_RETRY_COUNT; + int reg_val = 0; + struct cpld_data *data = i2c_get_clientdata(client); + + while (retry) { + I2C_READ_BYTE_DATA(reg_val, &data->access_lock, client, reg); + if (unlikely(reg_val < 0)) { + msleep(I2C_RW_RETRY_INTERVAL); + retry--; + + if (retry == 0) { + dev_err(&client->dev, "%s() retry %d times but still failed, reg=%x\n", __func__, I2C_RW_RETRY_COUNT, reg); + } + + continue; + } + + break; + } + + return reg_val; +} + +static int s7801_54xs_cpld_write_internal(struct i2c_client *client, u8 reg, u8 value) +{ + int ret = 0, retry = I2C_RW_RETRY_COUNT; + struct cpld_data *data = i2c_get_clientdata(client); + + while (retry) { + I2C_WRITE_BYTE_DATA(ret, &data->access_lock, client, reg, value); + if (unlikely(ret < 0)) { + msleep(I2C_RW_RETRY_INTERVAL); + retry--; + + if (retry == 0) { + dev_err(&client->dev, "%s() retry %d times but still failed, reg=%x\n", __func__, I2C_RW_RETRY_COUNT, reg); + } + + continue; + } + break; + } + + return ret; +} + +/* +int s7801_54xs_cpld_write(unsigned short cpld_addr, u8 reg, u8 value) +{ + struct list_head *list_node = NULL; + struct cpld_client_node *cpld_node = NULL; + int ret = -EIO; + + mutex_lock(&list_lock); + + list_for_each(list_node, &cpld_client_list) + { + cpld_node = list_entry(list_node, struct cpld_client_node, list); + + if (cpld_node->client->addr == cpld_addr) { + ret = s7801_54xs_cpld_write_internal(cpld_node->client, reg, value); + break; + } else { + pr_err("cpld_node->client->addr=%x, cpld_addr=%x\n", cpld_node->client->addr, cpld_addr); + } + } + + mutex_unlock(&list_lock); + + return ret; +} +EXPORT_SYMBOL(s7801_54xs_cpld_write); +*/ + +int s7801_54xs_cpld_psu_mux_sel(u8 mux_sel) +{ + unsigned short cpld_addr = cpld_i2c_addr[0]; + u8 reg = CPLD_MUX_CTRL_REG; + u8 reg_val = 0; + u8 psu_mux_mask = 0x06; + u8 mux_sel_val = 0; + + struct list_head *list_node = NULL; + struct cpld_client_node *cpld_node = NULL; + int ret = -EIO; + + switch(mux_sel) { + case 0: + //psu 0 + mux_sel_val = 0x04; + break; + case 1: + //psu 1 + mux_sel_val = 0x02; + break; + default: + //bmc + mux_sel_val = psu_mux_mask; + break; + } + + mutex_lock(&list_lock); + + list_for_each(list_node, &cpld_client_list) + { + cpld_node = list_entry(list_node, struct cpld_client_node, list); + + if (cpld_node->client->addr == cpld_addr) { + //read current reg value + reg_val = s7801_54xs_cpld_read_internal(cpld_node->client, reg); + //clear psu_mux_sel bits (bit 1 and 2) + reg_val &= ~psu_mux_mask; + //modify psu_mux_sel bits (bit 1 and 2) + reg_val |= mux_sel_val; + //write reg value + s7801_54xs_cpld_write_internal(cpld_node->client, reg, reg_val); + + break; + } else { + pr_err("cpld_node->client->addr=%x, cpld_addr=%x\n", cpld_node->client->addr, cpld_addr); + } + } + + mutex_unlock(&list_lock); + + return ret; +} +EXPORT_SYMBOL(s7801_54xs_cpld_psu_mux_sel); + +MODULE_DEVICE_TABLE(i2c, cpld_id); + +static struct i2c_driver cpld_driver = { + .class = I2C_CLASS_HWMON, + .driver = { + .name = "x86_64_ufispace_s7801_54xs_cpld", + }, + .probe = cpld_probe, + .remove = cpld_remove, + .id_table = cpld_id, + .address_list = cpld_i2c_addr, +}; + +static int __init cpld_init(void) +{ + mutex_init(&list_lock); + return i2c_add_driver(&cpld_driver); +} + +static void __exit cpld_exit(void) +{ + i2c_del_driver(&cpld_driver); +} + +MODULE_AUTHOR("Jason Tsai "); +MODULE_DESCRIPTION("x86_64_ufispace_s7801_54xs_cpld driver"); +MODULE_LICENSE("GPL"); + +module_init(cpld_init); +module_exit(cpld_exit); diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s7801-54xs/modules/x86-64-ufispace-s7801-54xs-cpld.h b/platform/broadcom/sonic-platform-modules-ufispace/s7801-54xs/modules/x86-64-ufispace-s7801-54xs-cpld.h new file mode 100644 index 0000000000..3e9c457095 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ufispace/s7801-54xs/modules/x86-64-ufispace-s7801-54xs-cpld.h @@ -0,0 +1,269 @@ +/* header file for i2c cpld driver of ufispace_s7801_54xs + * + * Copyright (C) 2022 UfiSpace Technology Corporation. + * Jason Tsai + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. + */ + +#ifndef UFISPACE_s7801_54xs_CPLD_H +#define UFISPACE_s7801_54xs_CPLD_H + +/* CPLD device index value */ +enum cpld_id { + cpld1, + cpld2 +}; + +/* CPLD common registers */ +#define CPLD_VERSION_REG 0x02 +#define CPLD_ID_REG 0x03 +#define CPLD_BUILD_REG 0x04 +#define CPLD_CHIP_REG 0x05 + +#define CPLD_EVT_CTRL_REG 0x3F + +/* CPLD 1 registers */ +#define CPLD_BOARD_ID_0_REG 0x00 +#define CPLD_BOARD_ID_1_REG 0x01 +#define CPLD_SKU_EXT_REG 0x06 + +#define CPLD_MAC_INTR_REG 0x10 +#define CPLD_HWM_INTR_REG 0x13 +#define CPLD_CPLD2_INTR_REG 0x14 +#define CPLD_NTM_INTR_REG 0x15 +#define CPLD_FAN_PSU_INTR_REG 0x16 +#define CPLD_SFP_IOEXP_INTR_REG 0x18 +#define CPLD_CPU_NMI_INTR_REG 0x19 +#define CPLD_PTP_INTR_REG 0x1B +#define CPLD_SYSTEM_INTR_REG 0x1C + +#define CPLD_MAC_MASK_REG 0x20 +#define CPLD_HWM_MASK_REG 0x23 +#define CPLD_CPLD2_MASK_REG 0x24 +#define CPLD_NTM_MASK_REG 0x25 +#define CPLD_FAN_PSU_MASK_REG 0x26 +#define CPLD_SFP_IOEXP_MASK_REG 0x28 +#define CPLD_CPU_NMI_MASK_REG 0x29 +#define CPLD_PTP_MASK_REG 0x2B +#define CPLD_SYSTEM_MASK_REG 0x2C + +#define CPLD_MAC_EVT_REG 0x30 +#define CPLD_HWM_EVT_REG 0x33 +#define CPLD_CPLD2_EVT_REG 0x34 +#define CPLD_NTM_EVT_REG 0x35 +#define CPLD_FAN_PSU_EVT_REG 0x36 +#define CPLD_SFP_IOEXP_EVT_REG 0x38 +#define CPLD_CPU_NMI_EVT_REG 0x39 +#define CPLD_PTP_EVT_REG 0x3B + +#define CPLD_MAC_RESET_REG 0x40 +#define CPLD_SYSTEM_RESET_REG 0x41 +#define CPLD_BMC_NTM_RESET_REG 0x43 +#define CPLD_USB_RESET_REG 0x44 +#define CPLD_I2C_MUX_RESET_REG 0x46 +#define CPLD_I2C_MUX_RESET_2_REG 0x47 +#define CPLD_MISC_RESET_REG 0x48 + +#define CPLD_BRD_PRESENT_REG 0x50 +#define CPLD_PSU_STATUS_REG 0x51 +#define CPLD_SYSTEM_PWR_REG 0x52 +#define CPLD_MAC_SYNCE_REG 0x53 +#define CPLD_MAC_AVS_REG 0x54 +#define CPLD_SYSTEM_STATUS_REG 0x55 +#define CPLD_FAN_PRESENT_REG 0x56 +#define CPLD_WATCHDOG_REG 0x5A +#define CPLD_BOOT_SELECT_REG 0x5B +#define CPLD_MUX_CTRL_REG 0x5C +#define CPLD_MISC_CTRL_1_REG 0x5D +#define CPLD_MISC_CTRL_2_REG 0x5E +#define CPLD_TIMING_CTRL_REG 0x5F + +#define CPLD_MAC_TEMP_REG 0x61 + +/* +#define CPLD_SYSTEM_LED_SYS_FAN_REG 0x80 +#define CPLD_SYSTEM_LED_PSU_REG 0x81 +#define CPLD_SYSTEM_LED_SYNC_REG 0x82 +#define CPLD_SYSTEM_LED_ID_REG 0x84 +*/ +#define CPLD_SYSTEM_LED_PSU_REG 0x80 +#define CPLD_SYSTEM_LED_SYS_REG 0x81 +#define CPLD_SYSTEM_LED_SYNC_REG 0x82 +#define CPLD_SYSTEM_LED_FAN_REG 0x83 +#define CPLD_SYSTEM_LED_ID_REG 0x84 + +#define CPLD_MAC_PG_REG 0x90 +#define CPLD_MISC_PG_REG 0x92 +#define CPLD_MAC_PG_EN_REG 0x93 +#define CPLD_MISC_PG_EN_REG 0x95 + +#define DBG_CPLD_MAC_INTR_REG 0xE0 +#define DBG_CPLD_HWM_INTR_REG 0xE3 +#define DBG_CPLD_CPLD2_INTR_REG 0xE4 +#define DBG_CPLD_NTM_INTR_REG 0xE5 +#define DBG_CPLD_FAN_PSU_INTR_REG 0xE6 +#define DBG_CPLD_SFP_IOEXP_INTR_REG 0xE8 +#define DBG_CPLD_PTP_INTR_REG 0xEB + +#define CPLD_UPG_RESET_REG 0xF0 + +/* CPLD 2*/ + +//interrupt status +#define CPLD_SFP_INTR_PRESENT_0_7_REG 0x10 +#define CPLD_SFP_INTR_PRESENT_8_15_REG 0x11 +#define CPLD_SFP_INTR_PRESENT_16_23_REG 0x12 +#define CPLD_SFP_INTR_PRESENT_24_31_REG 0x13 +#define CPLD_SFP_INTR_PRESENT_32_39_REG 0x14 +#define CPLD_SFP_INTR_PRESENT_40_47_REG 0x15 +#define CPLD_QSFP_INTR_PRESENT_48_53_REG 0x16 +#define CPLD_QSFP_INTR_PORT_48_53_REG 0x17 + +//interrupt mask +#define CPLD_SFP_MASK_PRESENT_0_7_REG 0x20 +#define CPLD_SFP_MASK_PRESENT_8_15_REG 0x21 +#define CPLD_SFP_MASK_PRESENT_16_23_REG 0x22 +#define CPLD_SFP_MASK_PRESENT_24_31_REG 0x23 +#define CPLD_SFP_MASK_PRESENT_32_39_REG 0x24 +#define CPLD_SFP_MASK_PRESENT_40_47_REG 0x25 +#define CPLD_QSFP_MASK_PRESENT_48_53_REG 0x26 +#define CPLD_QSFP_MASK_PORT_48_53_REG 0x27 + +//interrupt event +#define CPLD_SFP_EVT_PRESENT_0_7_REG 0x30 +#define CPLD_SFP_EVT_PRESENT_8_15_REG 0x31 +#define CPLD_SFP_EVT_PRESENT_16_23_REG 0x32 +#define CPLD_SFP_EVT_PRESENT_24_31_REG 0x33 +#define CPLD_SFP_EVT_PRESENT_32_39_REG 0x34 +#define CPLD_SFP_EVT_PRESENT_40_47_REG 0x35 +#define CPLD_QSFP_EVT_PRESENT_48_53_REG 0x36 +#define CPLD_QSFP_EVT_PORT_48_53_REG 0x37 + +#define CPLD_SFP_INTR_RX_LOS_0_7_REG 0x40 +#define CPLD_SFP_INTR_RX_LOS_8_15_REG 0x41 +#define CPLD_SFP_INTR_RX_LOS_16_23_REG 0x42 +#define CPLD_SFP_INTR_RX_LOS_24_31_REG 0x43 +#define CPLD_SFP_INTR_RX_LOS_32_39_REG 0x44 +#define CPLD_SFP_INTR_RX_LOS_40_47_REG 0x45 + +#define CPLD_SFP_INTR_TX_FAULT_0_7_REG 0x46 +#define CPLD_SFP_INTR_TX_FAULT_8_15_REG 0x47 +#define CPLD_SFP_INTR_TX_FAULT_16_23_REG 0x48 +#define CPLD_SFP_INTR_TX_FAULT_24_31_REG 0x49 +#define CPLD_SFP_INTR_TX_FAULT_32_39_REG 0x4A +#define CPLD_SFP_INTR_TX_FAULT_40_47_REG 0x4B + +//#define CPLD_SFP_RX_LOS_BASE_REG 0x40 +//#define CPLD_SFP_TX_FAULT_BASE_REG 0x46 + +#define CPLD_SFP_MASK_RX_LOS_0_7_REG 0x50 +#define CPLD_SFP_MASK_RX_LOS_8_15_REG 0x51 +#define CPLD_SFP_MASK_RX_LOS_16_23_REG 0x52 +#define CPLD_SFP_MASK_RX_LOS_24_31_REG 0x53 +#define CPLD_SFP_MASK_RX_LOS_32_39_REG 0x54 +#define CPLD_SFP_MASK_RX_LOS_40_47_REG 0x55 + +#define CPLD_SFP_MASK_TX_FAULT_0_7_REG 0x56 +#define CPLD_SFP_MASK_TX_FAULT_8_15_REG 0x57 +#define CPLD_SFP_MASK_TX_FAULT_16_23_REG 0x58 +#define CPLD_SFP_MASK_TX_FAULT_24_31_REG 0x59 +#define CPLD_SFP_MASK_TX_FAULT_32_39_REG 0x5A +#define CPLD_SFP_MASK_TX_FAULT_40_47_REG 0x5B + +//#define CPLD_SFP_RX_LOS_MASK_BASE_REG 0x50 +//#define CPLD_SFP_TX_FAULT_MASK_BASE_REG 0x56 + +#define CPLD_SFP_EVT_RX_LOS_0_7_REG 0x60 +#define CPLD_SFP_EVT_RX_LOS_8_15_REG 0x61 +#define CPLD_SFP_EVT_RX_LOS_16_23_REG 0x62 +#define CPLD_SFP_EVT_RX_LOS_24_31_REG 0x63 +#define CPLD_SFP_EVT_RX_LOS_32_39_REG 0x64 +#define CPLD_SFP_EVT_RX_LOS_40_47_REG 0x65 + +#define CPLD_SFP_EVT_TX_FAULT_0_7_REG 0x66 +#define CPLD_SFP_EVT_TX_FAULT_8_15_REG 0x67 +#define CPLD_SFP_EVT_TX_FAULT_16_23_REG 0x68 +#define CPLD_SFP_EVT_TX_FAULT_24_31_REG 0x69 +#define CPLD_SFP_EVT_TX_FAULT_32_39_REG 0x6A +#define CPLD_SFP_EVT_TX_FAULT_40_47_REG 0x6B + +//#define CPLD_SFP_RX_LOS_EVT_BASE_REG 0x60 +//#define CPLD_SFP_TX_FAULT_EVT_BASE_REG 0x66 + +#define CPLD_SFP_TX_DISABLE_0_7_REG 0x70 +#define CPLD_SFP_TX_DISABLE_8_15_REG 0x71 +#define CPLD_SFP_TX_DISABLE_16_23_REG 0x72 +#define CPLD_SFP_TX_DISABLE_24_31_REG 0x73 +#define CPLD_SFP_TX_DISABLE_32_39_REG 0x74 +#define CPLD_SFP_TX_DISABLE_40_47_REG 0x75 + +//#define CPLD_SFP_TX_DISABLE_BASE_REG 0x70 +#define CPLD_QSFP_RESET_48_53_REG 0x76 +#define CPLD_QSFP_LPMODE_48_53_REG 0x77 + +//debug interrupt status +#define DBG_CPLD_SFP_INTR_PRESENT_BASE_REG 0xD0 +#define DBG_CPLD_SFP_INTR_PRESENT_0_7_REG 0xD0 +#define DBG_CPLD_SFP_INTR_PRESENT_8_15_REG 0xD1 +#define DBG_CPLD_SFP_INTR_PRESENT_16_23_REG 0xD2 +#define DBG_CPLD_SFP_INTR_PRESENT_24_31_REG 0xD3 +#define DBG_CPLD_SFP_INTR_PRESENT_32_39_REG 0xD4 +#define DBG_CPLD_SFP_INTR_PRESENT_40_47_REG 0xD5 +#define DBG_CPLD_QSFP_INTR_PRESENT_48_53_REG 0xD6 +#define DBG_CPLD_QSFP_INTR_PORT_48_53_REG 0xD7 + +//debug interrupt mask +#define DBG_CPLD_SFP_INTR_RX_LOS_0_7_REG 0xE0 +#define DBG_CPLD_SFP_INTR_RX_LOS_8_15_REG 0xE1 +#define DBG_CPLD_SFP_INTR_RX_LOS_16_23_REG 0xE2 +#define DBG_CPLD_SFP_INTR_RX_LOS_24_31_REG 0xE3 +#define DBG_CPLD_SFP_INTR_RX_LOS_32_39_REG 0xE4 +#define DBG_CPLD_SFP_INTR_RX_LOS_40_47_REG 0xE5 + +#define DBG_CPLD_SFP_INTR_TX_FAULT_0_7_REG 0xE6 +#define DBG_CPLD_SFP_INTR_TX_FAULT_8_15_REG 0xE7 +#define DBG_CPLD_SFP_INTR_TX_FAULT_16_23_REG 0xE8 +#define DBG_CPLD_SFP_INTR_TX_FAULT_24_31_REG 0xE9 +#define DBG_CPLD_SFP_INTR_TX_FAULT_32_39_REG 0xEA +#define DBG_CPLD_SFP_INTR_TX_FAULT_40_47_REG 0xEB + +//#define DBG_CPLD_SFP_RX_LOS_BASE_REG 0xE0 +//#define DBG_CPLD_SFP_TX_FAULT_BASE_REG 0xE6 + +//MASK +#define MASK_ALL (0xFF) +#define MASK_HB (0b11110000) +#define MASK_LB (0b00001111) +#define MASK_CPLD_MAJOR_VER (0b11000000) +#define MASK_CPLD_MINOR_VER (0b00111111) +#define CPLD_SYSTEM_LED_SYS_MASK MASK_HB +#define CPLD_SYSTEM_LED_FAN_MASK MASK_LB +#define CPLD_SYSTEM_LED_PSU_0_MASK MASK_LB +#define CPLD_SYSTEM_LED_PSU_1_MASK MASK_HB +#define CPLD_SYSTEM_LED_SYNC_MASK MASK_LB +#define CPLD_SYSTEM_LED_ID_MASK MASK_LB +#define CPLD_SFP_LED_MASK_0 (0b00000011) +#define CPLD_SFP_LED_MASK_1 (0b00001100) +#define PERM_R (0b00000001) +#define PERM_W (0b00000010) +#define PERM_RW (PERM_R | PERM_W) +#define IS_PERM_R(perm) (perm & PERM_R ? 1u : 0u) +#define IS_PERM_W(perm) (perm & PERM_W ? 1u : 0u) + +/* common manipulation */ +#define INVALID(i, min, max) ((i < min) || (i > max) ? 1u : 0u) + +#endif diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s7801-54xs/modules/x86-64-ufispace-s7801-54xs-lpc.c b/platform/broadcom/sonic-platform-modules-ufispace/s7801-54xs/modules/x86-64-ufispace-s7801-54xs-lpc.c new file mode 100644 index 0000000000..397604f6de --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ufispace/s7801-54xs/modules/x86-64-ufispace-s7801-54xs-lpc.c @@ -0,0 +1,883 @@ +/* + * A lpc driver for the ufispace_s7801_54xs + * + * Copyright (C) 2017-2022 UfiSpace Technology Corporation. + * Jason Tsai + * + * Based on ad7414.c + * Copyright 2006 Stefan Roese , DENX Software Engineering + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. + */ +#include +#include +#include +#include +#include +#include + +#define BSP_LOG_R(fmt, args...) \ + _bsp_log (LOG_READ, KERN_INFO "%s:%s[%d]: " fmt "\r\n", \ + __FILE__, __func__, __LINE__, ##args) +#define BSP_LOG_W(fmt, args...) \ + _bsp_log (LOG_WRITE, KERN_INFO "%s:%s[%d]: " fmt "\r\n", \ + __FILE__, __func__, __LINE__, ##args) +#define BSP_PR(level, fmt, args...) _bsp_log (LOG_SYS, level "[BSP]" fmt "\r\n", ##args) + +#define _SENSOR_DEVICE_ATTR_RO(_name, _func, _index) \ + SENSOR_DEVICE_ATTR(_name, S_IRUGO, read_##_func, NULL, _index) + +#define _SENSOR_DEVICE_ATTR_WO(_name, _func, _index) \ + SENSOR_DEVICE_ATTR(_name, S_IWUSR, NULL, write_##_func, _index) + +#define _SENSOR_DEVICE_ATTR_RW(_name, _func, _index) \ + SENSOR_DEVICE_ATTR(_name, S_IRUGO | S_IWUSR, read_##_func, write_##_func, _index) + +#define _DEVICE_ATTR(_name) \ + &sensor_dev_attr_##_name.dev_attr.attr + +#define BSP_PR(level, fmt, args...) _bsp_log (LOG_SYS, level "[BSP]" fmt "\r\n", ##args) + +#define DRIVER_NAME "x86_64_ufispace_s7801_54xs_lpc" + +/* LPC registers */ + +#define REG_BASE_MB 0x700 +#define REG_BASE_EC 0xE300 + +#define REG_NONE 0x00 +//MB CPLD +#define REG_BRD_ID_0 (REG_BASE_MB + 0x00) +#define REG_BRD_ID_1 (REG_BASE_MB + 0x01) +#define REG_CPLD_VERSION (REG_BASE_MB + 0x02) +#define REG_CPLD_ID (REG_BASE_MB + 0x03) +#define REG_CPLD_BUILD (REG_BASE_MB + 0x04) +#define REG_CPLD_CHIP (REG_BASE_MB + 0x05) +#define REG_BRD_EXT_ID (REG_BASE_MB + 0x06) +#define REG_I2C_MUX_RESET (REG_BASE_MB + 0x46) +#define REG_I2C_MUX_RESET_2 (REG_BASE_MB + 0x47) +#define REG_MUX_CTRL (REG_BASE_MB + 0x5C) +#define REG_MISC_CTRL (REG_BASE_MB + 0x5D) +#define REG_MISC_CTRL_2 (REG_BASE_MB + 0x5E) + +//EC +#define REG_BIOS_BOOT (REG_BASE_EC + 0x0C) +#define REG_CPU_REV (REG_BASE_EC + 0x17) + +// BMC mailbox +#define REG_TEMP_MAC_HWM (REG_BASE_MB + 0xC0) + +//MASK +#define MASK_ALL (0xFF) +#define MASK_CPLD_MAJOR_VER (0b11000000) +#define MASK_CPLD_MINOR_VER (0b00111111) +#define MASK_HW_ID (0b00000011) +#define MASK_DEPH_ID (0b00000100) +#define MASK_BUILD_ID (0b00011000) +#define MASK_EXT_ID (0b00000111) +#define MASK_MUX_RESET_ALL (0x37) // 2#00110111 +#define MASK_MUX_RESET (MASK_ALL) +#define MASK_BIOS_BOOT_ROM (0b01000000) + +#define LPC_MDELAY (5) +#define MDELAY_RESET_INTERVAL (100) +#define MDELAY_RESET_FINISH (500) + +/* LPC sysfs attributes index */ +enum lpc_sysfs_attributes { + //MB CPLD + ATT_BRD_ID_0, + ATT_BRD_ID_1, + ATT_BRD_SKU_ID, + ATT_BRD_HW_ID, + ATT_BRD_DEPH_ID, + ATT_BRD_BUILD_ID, + ATT_BRD_EXT_ID, + + ATT_CPLD_ID, + ATT_CPLD_BUILD, + ATT_CPLD_CHIP, + + ATT_CPLD_VERSION_MAJOR, + ATT_CPLD_VERSION_MINOR, + ATT_CPLD_VERSION_BUILD, + ATT_CPLD_VERSION_H, + + ATT_MUX_RESET, + ATT_MUX_CTRL, + + //EC + ATT_CPU_HW_ID, + ATT_CPU_DEPH_ID, + ATT_CPU_BUILD_ID, + ATT_BIOS_BOOT_ROM, + //BMC mailbox + ATT_TEMP_MAC_HWM, + + //BSP + ATT_BSP_VERSION, + ATT_BSP_DEBUG, + ATT_BSP_PR_INFO, + ATT_BSP_PR_ERR, + ATT_BSP_REG, + ATT_BSP_GPIO_MAX, + ATT_MAX +}; + +enum data_type { + DATA_HEX, + DATA_DEC, + DATA_S_DEC, + DATA_UNK, +}; + +enum bsp_log_types { + LOG_NONE, + LOG_RW, + LOG_READ, + LOG_WRITE, + LOG_SYS +}; + +enum bsp_log_ctrl { + LOG_DISABLE, + LOG_ENABLE +}; + +struct lpc_data_s { + struct mutex access_lock; +}; + +typedef struct sysfs_info_s +{ + u16 reg; + u8 mask; + u8 data_type; +} sysfs_info_t; + +static sysfs_info_t sysfs_info[] = { + [ATT_BRD_ID_0] = {REG_BRD_ID_0, MASK_ALL, DATA_HEX}, + [ATT_BRD_ID_1] = {REG_BRD_ID_1, MASK_ALL, DATA_HEX}, + [ATT_BRD_SKU_ID] = {REG_BRD_ID_0, MASK_ALL, DATA_DEC}, + [ATT_BRD_HW_ID] = {REG_BRD_ID_1, MASK_HW_ID, DATA_DEC}, + [ATT_BRD_DEPH_ID] = {REG_BRD_ID_1, MASK_DEPH_ID, DATA_DEC}, + [ATT_BRD_BUILD_ID] = {REG_BRD_ID_1, MASK_BUILD_ID, DATA_DEC}, + [ATT_BRD_EXT_ID] = {REG_BRD_EXT_ID, MASK_EXT_ID, DATA_DEC}, + + [ATT_CPLD_ID] = {REG_CPLD_ID, MASK_ALL, DATA_DEC}, + [ATT_CPLD_BUILD] = {REG_CPLD_BUILD, MASK_ALL, DATA_DEC}, + [ATT_CPLD_CHIP] = {REG_CPLD_CHIP, MASK_ALL, DATA_DEC}, + + [ATT_CPLD_VERSION_MAJOR] = {REG_CPLD_VERSION, MASK_CPLD_MAJOR_VER, DATA_DEC}, + [ATT_CPLD_VERSION_MINOR] = {REG_CPLD_VERSION, MASK_CPLD_MINOR_VER, DATA_DEC}, + [ATT_CPLD_VERSION_BUILD] = {REG_CPLD_BUILD, MASK_ALL, DATA_DEC}, + [ATT_CPLD_VERSION_H] = {REG_CPLD_VERSION, MASK_ALL, DATA_UNK}, + + [ATT_MUX_RESET] = {REG_NONE, MASK_ALL, DATA_DEC}, + [ATT_MUX_CTRL] = {REG_MUX_CTRL, MASK_ALL, DATA_HEX}, + + //EC + [ATT_CPU_HW_ID] = {REG_CPU_REV, MASK_HW_ID, DATA_DEC}, + [ATT_CPU_DEPH_ID] = {REG_CPU_REV, MASK_DEPH_ID, DATA_DEC}, + [ATT_CPU_BUILD_ID] = {REG_CPU_REV, MASK_BUILD_ID, DATA_DEC}, + [ATT_BIOS_BOOT_ROM] = {REG_BIOS_BOOT, MASK_BIOS_BOOT_ROM, DATA_DEC}, + + //BMC mailbox + [ATT_TEMP_MAC_HWM] = {REG_TEMP_MAC_HWM , MASK_ALL, DATA_S_DEC}, + + //BSP + [ATT_BSP_VERSION] = {REG_NONE, MASK_ALL, DATA_UNK}, + [ATT_BSP_DEBUG] = {REG_NONE, MASK_ALL, DATA_UNK}, + [ATT_BSP_PR_INFO] = {REG_NONE, MASK_ALL, DATA_UNK}, + [ATT_BSP_PR_ERR] = {REG_NONE, MASK_ALL, DATA_UNK}, + [ATT_BSP_REG] = {REG_NONE, MASK_ALL, DATA_HEX}, +}; + +struct lpc_data_s *lpc_data; +char bsp_version[16]=""; +char bsp_debug[2]="0"; +char bsp_reg[8]="0x0"; +u8 enable_log_read = LOG_DISABLE; +u8 enable_log_write = LOG_DISABLE; +u8 enable_log_sys = LOG_ENABLE; +u8 mailbox_inited=0; + +/* reg shift */ +static u8 _shift(u8 mask) +{ + int i=0, mask_one=1; + + for(i=0; i<8; ++i) { + if ((mask & mask_one) == 1) + return i; + else + mask >>= 1; + } + + return -1; +} + +/* reg mask and shift */ +static u8 _mask_shift(u8 val, u8 mask) +{ + int shift=0; + + shift = _shift(mask); + + return (val & mask) >> shift; +} + +static u8 _parse_data(char *buf, unsigned int data, u8 data_type) +{ + if(buf == NULL) { + return -1; + } + + if(data_type == DATA_HEX) { + return sprintf(buf, "0x%02x", data); + } else if(data_type == DATA_DEC) { + return sprintf(buf, "%u", data); + } else { + return -1; + } + return 0; +} + +static int _bsp_log(u8 log_type, char *fmt, ...) +{ + if ((log_type==LOG_READ && enable_log_read) || + (log_type==LOG_WRITE && enable_log_write) || + (log_type==LOG_SYS && enable_log_sys) ) { + va_list args; + int r; + + va_start(args, fmt); + r = vprintk(fmt, args); + va_end(args); + + return r; + } else { + return 0; + } +} + +static int _config_bsp_log(u8 log_type) +{ + switch(log_type) { + case LOG_NONE: + enable_log_read = LOG_DISABLE; + enable_log_write = LOG_DISABLE; + break; + case LOG_RW: + enable_log_read = LOG_ENABLE; + enable_log_write = LOG_ENABLE; + break; + case LOG_READ: + enable_log_read = LOG_ENABLE; + enable_log_write = LOG_DISABLE; + break; + case LOG_WRITE: + enable_log_read = LOG_DISABLE; + enable_log_write = LOG_ENABLE; + break; + default: + return -EINVAL; + } + return 0; +} + +static void _outb(u8 data, u16 port) +{ + outb(data, port); + mdelay(LPC_MDELAY); +} + +/* init bmc mailbox, get from BMC team */ +static int bmc_mailbox_init(void) +{ + if (mailbox_inited) { + return mailbox_inited; + } + + //Enable super io writing + _outb(0xa5, 0x2e); + _outb(0xa5, 0x2e); + + //Logic device number + _outb(0x07, 0x2e); + _outb(0x0e, 0x2f); + + //Disable mailbox + _outb(0x30, 0x2e); + _outb(0x00, 0x2f); + + //Set base address bit + _outb(0x60, 0x2e); + _outb(0x07, 0x2f); + _outb(0x61, 0x2e); + _outb(0xc0, 0x2f); + + //Select bit[3:0] of SIRQ + _outb(0x70, 0x2e); + _outb(0x07, 0x2f); + + //Low level trigger + _outb(0x71, 0x2e); + _outb(0x01, 0x2f); + + //Enable mailbox + _outb(0x30, 0x2e); + _outb(0x01, 0x2f); + + //Disable super io writing + _outb(0xaa, 0x2e); + + //Mailbox initial + _outb(0x00, 0x786); + _outb(0x00, 0x787); + + //set mailbox_inited + mailbox_inited = 1; + + return mailbox_inited; +} + +/* get lpc register value */ +static u8 _read_lpc_reg(u16 reg, u8 mask) +{ + u8 reg_val=0x0, reg_mk_shf_val = 0x0; + + mutex_lock(&lpc_data->access_lock); + reg_val = inb(reg); + mutex_unlock(&lpc_data->access_lock); + + reg_mk_shf_val = _mask_shift(reg_val, mask); + + BSP_LOG_R("reg=0x%03x, reg_val=0x%02x, mask=0x%02x, reg_mk_shf_val=0x%02x", reg, reg_val, mask, reg_mk_shf_val); + + return reg_mk_shf_val; +} + +/* get lpc register value */ +static ssize_t read_lpc_reg(u16 reg, u8 mask, char *buf, u8 data_type) +{ + u8 reg_val; + int len=0; + + reg_val = _read_lpc_reg(reg, mask); + + // may need to change to hex value ? + len=_parse_data(buf, reg_val, data_type); + + return len; +} + +/* set lpc register value */ +static ssize_t write_lpc_reg(u16 reg, u8 mask, const char *buf, size_t count, u8 data_type) +{ + u8 reg_val, reg_val_now, shift; + + if (kstrtou8(buf, 0, ®_val) < 0) { + if(data_type == DATA_S_DEC) { + if (kstrtos8(buf, 0, ®_val) < 0) { + return -EINVAL; + } + } else { + return -EINVAL; + } + } + + //apply continuous bits operation if mask is specified, discontinuous bits are not supported + if (mask != MASK_ALL) { + reg_val_now = _read_lpc_reg(reg, MASK_ALL); + //clear bits in reg_val_now by the mask + reg_val_now &= ~mask; + //get bit shift by the mask + shift = _shift(mask); + //calculate new reg_val + reg_val = reg_val_now | (reg_val << shift); + } + + mutex_lock(&lpc_data->access_lock); + + _outb(reg_val, reg); + + mutex_unlock(&lpc_data->access_lock); + + BSP_LOG_W("reg=0x%03x, reg_val=0x%02x, mask=0x%02x", reg, reg_val, mask); + + return count; +} + +/* get bsp value */ +static ssize_t read_bsp(char *buf, char *str) +{ + ssize_t len=0; + + mutex_lock(&lpc_data->access_lock); + len=sprintf(buf, "%s", str); + mutex_unlock(&lpc_data->access_lock); + + BSP_LOG_R("reg_val=%s", str); + + return len; +} + +/* set bsp value */ +static ssize_t write_bsp(const char *buf, char *str, size_t str_len, size_t count) +{ + mutex_lock(&lpc_data->access_lock); + snprintf(str, str_len, "%s", buf); + mutex_unlock(&lpc_data->access_lock); + + BSP_LOG_W("reg_val=%s", str); + + return count; +} + +/* get gpio max value */ +static ssize_t read_gpio_max(struct device *dev, + struct device_attribute *da, + char *buf) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + + if (attr->index == ATT_BSP_GPIO_MAX) { + return sprintf(buf, "%d\n", ARCH_NR_GPIOS-1); + } + return -1; +} + +/* get mb cpld version in human readable format */ +static ssize_t read_mb_cpld_version_h(struct device *dev, + struct device_attribute *da, char *buf) +{ + ssize_t len=0; + u8 major = 0, minor = 0, build = 0; + major = _read_lpc_reg(REG_CPLD_VERSION, MASK_CPLD_MAJOR_VER); + minor = _read_lpc_reg(REG_CPLD_VERSION, MASK_CPLD_MINOR_VER); + build = _read_lpc_reg(REG_CPLD_BUILD, MASK_ALL); + len=sprintf(buf, "%u.%02u.%03u", major, minor, build); + + return len; +} + +/* get lpc register value */ +static ssize_t read_lpc_callback(struct device *dev, + struct device_attribute *da, char *buf) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + u16 reg = 0; + u8 mask = MASK_ALL; + u8 data_type = DATA_UNK; + + if (attr->index == ATT_BSP_REG) { + //copy value from bsp_reg + if (kstrtou16(bsp_reg, 0, ®) < 0) + return -EINVAL; + + data_type = sysfs_info[attr->index].data_type; + } else { + reg = sysfs_info[attr->index].reg; + mask = sysfs_info[attr->index].mask; + data_type = sysfs_info[attr->index].data_type; + } + + return read_lpc_reg(reg, mask, buf, data_type); +} + +/* set lpc register value */ +static ssize_t write_lpc_callback(struct device *dev, + struct device_attribute *da, const char *buf, size_t count) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + u16 reg = 0; + u8 mask = MASK_ALL; + u8 data_type = DATA_UNK; + + reg = sysfs_info[attr->index].reg; + mask = sysfs_info[attr->index].mask; + data_type = sysfs_info[attr->index].data_type; + + if(attr->index == ATT_TEMP_MAC_HWM) { + bmc_mailbox_init(); + } + + return write_lpc_reg(reg, mask, buf, count, data_type); +} + +/* get bsp parameter value */ +static ssize_t read_bsp_callback(struct device *dev, + struct device_attribute *da, char *buf) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + char *str=NULL; + + switch (attr->index) { + case ATT_BSP_VERSION: + str = bsp_version; + break; + case ATT_BSP_DEBUG: + str = bsp_debug; + break; + case ATT_BSP_REG: + str = bsp_reg; + break; + default: + return -EINVAL; + } + return read_bsp(buf, str); +} + +/* set bsp parameter value */ +static ssize_t write_bsp_callback(struct device *dev, + struct device_attribute *da, const char *buf, size_t count) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + int str_len=0; + char *str=NULL; + u16 reg = 0; + u8 bsp_debug_u8 = 0; + + switch (attr->index) { + case ATT_BSP_VERSION: + str = bsp_version; + str_len = sizeof(bsp_version); + break; + case ATT_BSP_DEBUG: + str = bsp_debug; + str_len = sizeof(bsp_debug); + break; + case ATT_BSP_REG: + if (kstrtou16(buf, 0, ®) < 0) + return -EINVAL; + + str = bsp_reg; + str_len = sizeof(bsp_reg); + break; + default: + return -EINVAL; + } + + if (attr->index == ATT_BSP_DEBUG) { + if (kstrtou8(buf, 0, &bsp_debug_u8) < 0) { + return -EINVAL; + } else if (_config_bsp_log(bsp_debug_u8) < 0) { + return -EINVAL; + } + } + + return write_bsp(buf, str, str_len, count); +} + +static ssize_t write_bsp_pr_callback(struct device *dev, + struct device_attribute *da, const char *buf, size_t count) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + int str_len = strlen(buf); + + if(str_len <= 0) + return str_len; + + switch (attr->index) { + case ATT_BSP_PR_INFO: + BSP_PR(KERN_INFO, "%s", buf); + break; + case ATT_BSP_PR_ERR: + BSP_PR(KERN_ERR, "%s", buf); + break; + default: + return -EINVAL; + } + + return str_len; +} + +/* set mux_reset register value */ +static ssize_t write_mux_reset(struct device *dev, + struct device_attribute *da, const char *buf, size_t count) +{ + u16 reg = REG_I2C_MUX_RESET; + u8 val = 0; + u8 mux_reset_reg_val = 0; + static int mux_reset_flag = 0; + + if (kstrtou8(buf, 0, &val) < 0) + return -EINVAL; + + if (mux_reset_flag == 0) { + if (val == 0) { + mutex_lock(&lpc_data->access_lock); + mux_reset_flag = 1; + BSP_LOG_W("i2c mux reset is triggered..."); + + //reset mux on SFP/QSFP ports + mux_reset_reg_val = inb(reg); + _outb((mux_reset_reg_val & (u8) (~MASK_MUX_RESET)), reg); + BSP_LOG_W("reg=0x%03x, reg_val=0x%02x", reg, mux_reset_reg_val & 0x0); + + //unset mux on SFP/QSFP ports + outb((mux_reset_reg_val | MASK_MUX_RESET), reg); + mdelay(500); + BSP_LOG_W("reg=0x%03x, reg_val=0x%02x", reg, mux_reset_reg_val | 0xFF); + + mux_reset_flag = 0; + mutex_unlock(&lpc_data->access_lock); + } else { + return -EINVAL; + } + } else { + BSP_LOG_W("i2c mux is resetting... (ignore)"); + mutex_lock(&lpc_data->access_lock); + mutex_unlock(&lpc_data->access_lock); + } + + return count; +} + +//SENSOR_DEVICE_ATTR - MB +static _SENSOR_DEVICE_ATTR_RO(board_id_0, lpc_callback, ATT_BRD_ID_0); +static _SENSOR_DEVICE_ATTR_RO(board_id_1, lpc_callback, ATT_BRD_ID_1); +static _SENSOR_DEVICE_ATTR_RO(board_sku_id, lpc_callback, ATT_BRD_SKU_ID); +static _SENSOR_DEVICE_ATTR_RO(board_hw_id, lpc_callback, ATT_BRD_HW_ID); +static _SENSOR_DEVICE_ATTR_RO(board_deph_id, lpc_callback, ATT_BRD_DEPH_ID); +static _SENSOR_DEVICE_ATTR_RO(board_build_id, lpc_callback, ATT_BRD_BUILD_ID); +static _SENSOR_DEVICE_ATTR_RO(board_ext_id, lpc_callback, ATT_BRD_EXT_ID); +static _SENSOR_DEVICE_ATTR_RO(cpld_version_major, lpc_callback, ATT_CPLD_VERSION_MAJOR); +static _SENSOR_DEVICE_ATTR_RO(cpld_version_minor, lpc_callback, ATT_CPLD_VERSION_MINOR); +static _SENSOR_DEVICE_ATTR_RO(cpld_version_build, lpc_callback, ATT_CPLD_VERSION_BUILD); +static _SENSOR_DEVICE_ATTR_RO(cpld_version_h, mb_cpld_version_h, ATT_CPLD_VERSION_H); +static _SENSOR_DEVICE_ATTR_RO(cpld_id, lpc_callback, ATT_CPLD_ID); + +static _SENSOR_DEVICE_ATTR_WO(mux_reset, mux_reset, ATT_MUX_RESET); +static _SENSOR_DEVICE_ATTR_RW(mux_ctrl, lpc_callback, ATT_MUX_CTRL); + +//SENSOR_DEVICE_ATTR - BMC mailbox +static _SENSOR_DEVICE_ATTR_WO(temp_mac_hwm , lpc_callback , ATT_TEMP_MAC_HWM); + +//SENSOR_DEVICE_ATTR - EC +static _SENSOR_DEVICE_ATTR_RO(cpu_hw_id, lpc_callback, ATT_CPU_HW_ID); +static _SENSOR_DEVICE_ATTR_RO(cpu_deph_id, lpc_callback, ATT_CPU_DEPH_ID); +static _SENSOR_DEVICE_ATTR_RO(cpu_build_id, lpc_callback, ATT_CPU_BUILD_ID); +static _SENSOR_DEVICE_ATTR_RO(bios_boot_rom, lpc_callback, ATT_BIOS_BOOT_ROM); + +//SENSOR_DEVICE_ATTR - BSP +static _SENSOR_DEVICE_ATTR_RW(bsp_version, bsp_callback, ATT_BSP_VERSION); +static _SENSOR_DEVICE_ATTR_RW(bsp_debug, bsp_callback, ATT_BSP_DEBUG); +static _SENSOR_DEVICE_ATTR_WO(bsp_pr_info, bsp_pr_callback, ATT_BSP_PR_INFO); +static _SENSOR_DEVICE_ATTR_WO(bsp_pr_err, bsp_pr_callback, ATT_BSP_PR_ERR); +static SENSOR_DEVICE_ATTR(bsp_reg, S_IRUGO | S_IWUSR, read_lpc_callback, write_bsp_callback, ATT_BSP_REG); +static SENSOR_DEVICE_ATTR(bsp_gpio_max, S_IRUGO, read_gpio_max, NULL, ATT_BSP_GPIO_MAX); + +static struct attribute *mb_cpld_attrs[] = { + _DEVICE_ATTR(board_id_0), + _DEVICE_ATTR(board_id_1), + _DEVICE_ATTR(board_sku_id), + _DEVICE_ATTR(board_hw_id), + _DEVICE_ATTR(board_deph_id), + _DEVICE_ATTR(board_build_id), + _DEVICE_ATTR(board_ext_id), + _DEVICE_ATTR(cpld_version_major), + _DEVICE_ATTR(cpld_version_minor), + _DEVICE_ATTR(cpld_version_build), + _DEVICE_ATTR(cpld_version_h), + _DEVICE_ATTR(cpld_id), + _DEVICE_ATTR(mux_reset), + _DEVICE_ATTR(mux_ctrl), + NULL, +}; + +static struct attribute *bsp_attrs[] = { + _DEVICE_ATTR(bsp_version), + _DEVICE_ATTR(bsp_debug), + _DEVICE_ATTR(bsp_pr_info), + _DEVICE_ATTR(bsp_pr_err), + _DEVICE_ATTR(bsp_reg), + _DEVICE_ATTR(bsp_gpio_max), + NULL, +}; + +static struct attribute *ec_attrs[] = { + _DEVICE_ATTR(cpu_hw_id), + _DEVICE_ATTR(cpu_deph_id), + _DEVICE_ATTR(cpu_build_id), + _DEVICE_ATTR(bios_boot_rom), + NULL, +}; + +static struct attribute *bmc_mailbox_attrs[] = { + _DEVICE_ATTR(temp_mac_hwm), + NULL, +}; + +static struct attribute_group mb_cpld_attr_grp = { + .name = "mb_cpld", + .attrs = mb_cpld_attrs, +}; + +static struct attribute_group bsp_attr_grp = { + .name = "bsp", + .attrs = bsp_attrs, +}; + +static struct attribute_group ec_attr_grp = { + .name = "ec", + .attrs = ec_attrs, +}; + +static struct attribute_group bmc_mailbox_attr_grp = { + .name = "bmc_mailbox", + .attrs = bmc_mailbox_attrs, +}; + +static void lpc_dev_release( struct device * dev) +{ + return; +} + +static struct platform_device lpc_dev = { + .name = DRIVER_NAME, + .id = -1, + .dev = { + .release = lpc_dev_release, + } +}; + +static int lpc_drv_probe(struct platform_device *pdev) +{ + int i = 0, grp_num = 4; + int err[4] = {0}; + struct attribute_group *grp; + + lpc_data = devm_kzalloc(&pdev->dev, sizeof(struct lpc_data_s), + GFP_KERNEL); + if (!lpc_data) + return -ENOMEM; + + mutex_init(&lpc_data->access_lock); + + for (i=0; idev.kobj, grp); + if (err[i]) { + printk(KERN_ERR "Cannot create sysfs for group %s\n", grp->name); + goto exit; + } else { + continue; + } + } + + return 0; + +exit: + for (i=0; idev.kobj, grp); + if (!err[i]) { + //remove previous successful cases + continue; + } else { + //remove first failed case, then return + return err[i]; + } + } + return 0; +} + +static int lpc_drv_remove(struct platform_device *pdev) +{ + sysfs_remove_group(&pdev->dev.kobj, &mb_cpld_attr_grp); + sysfs_remove_group(&pdev->dev.kobj, &bmc_mailbox_attr_grp); + sysfs_remove_group(&pdev->dev.kobj, &bsp_attr_grp); + sysfs_remove_group(&pdev->dev.kobj, &ec_attr_grp); + + return 0; +} + +static struct platform_driver lpc_drv = { + .probe = lpc_drv_probe, + .remove = __exit_p(lpc_drv_remove), + .driver = { + .name = DRIVER_NAME, + }, +}; + +int lpc_init(void) +{ + int err = 0; + + err = platform_driver_register(&lpc_drv); + if (err) { + printk(KERN_ERR "%s(#%d): platform_driver_register failed(%d)\n", + __func__, __LINE__, err); + + return err; + } + + err = platform_device_register(&lpc_dev); + if (err) { + printk(KERN_ERR "%s(#%d): platform_device_register failed(%d)\n", + __func__, __LINE__, err); + platform_driver_unregister(&lpc_drv); + return err; + } + + return err; +} + +void lpc_exit(void) +{ + platform_driver_unregister(&lpc_drv); + platform_device_unregister(&lpc_dev); +} + +MODULE_AUTHOR("Jason Tsai "); +MODULE_DESCRIPTION("x86_64_ufispace_s7801_54xs_lpc driver"); +MODULE_LICENSE("GPL"); + +module_init(lpc_init); +module_exit(lpc_exit); diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s7801-54xs/modules/x86-64-ufispace-s7801-54xs-sys-eeprom.c b/platform/broadcom/sonic-platform-modules-ufispace/s7801-54xs/modules/x86-64-ufispace-s7801-54xs-sys-eeprom.c new file mode 100644 index 0000000000..f2f27cb0ae --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ufispace/s7801-54xs/modules/x86-64-ufispace-s7801-54xs-sys-eeprom.c @@ -0,0 +1,282 @@ +/* + * Copyright (C) 1998, 1999 Frodo Looijaard and + * Philip Edelbrock + * Copyright (C) 2003 Greg Kroah-Hartman + * Copyright (C) 2003 IBM Corp. + * Copyright (C) 2004 Jean Delvare + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +/* enable dev_dbg print out */ +//#define DEBUG + +#define __STDC_WANT_LIB_EXT1__ 1 +#include +#include +#include +#include +#include +#include +#include +#include + +#define _memset(s, c, n) memset(s, c, n) + +/* Addresses to scan */ +static const unsigned short normal_i2c[] = { /*0x50, 0x51, 0x52, 0x53, 0x54, + 0x55, 0x56, 0x57,*/ I2C_CLIENT_END }; + +/* Size of EEPROM in bytes */ +#define EEPROM_SIZE 512 + +#define SLICE_BITS (6) +#define SLICE_SIZE (1 << SLICE_BITS) +#define SLICE_NUM (EEPROM_SIZE/SLICE_SIZE) + +/* Each client has this additional data */ +struct eeprom_data { + struct mutex update_lock; + u8 valid; /* bitfield, bit!=0 if slice is valid */ + unsigned long last_updated[SLICE_NUM]; /* In jiffies, 8 slices */ + u8 data[EEPROM_SIZE]; /* Register values */ +}; + + +static void sys_eeprom_update_client(struct i2c_client *client, u8 slice) +{ + struct eeprom_data *data = i2c_get_clientdata(client); + int i, j; + int ret; + int addr; + + mutex_lock(&data->update_lock); + + if (!(data->valid & (1 << slice)) || + time_after(jiffies, data->last_updated[slice] + 300 * HZ)) { + dev_dbg(&client->dev, "Starting eeprom update, slice %u\n", slice); + + addr = slice << SLICE_BITS; + + ret = i2c_smbus_write_byte_data(client, (u8)((addr >> 8) & 0xFF), (u8)(addr & 0xFF)); + /* select the eeprom address */ + if (ret < 0) { + dev_err(&client->dev, "address set failed\n"); + goto exit; + } + + if (!i2c_check_functionality(client->adapter, I2C_FUNC_SMBUS_READ_BYTE)) { + goto exit; + } + + for (i = slice << SLICE_BITS; i < (slice + 1) << SLICE_BITS; i+= SLICE_SIZE) { + for (j = i; j < (i+SLICE_SIZE); j++) { + int res; + + res = i2c_smbus_read_byte(client); + if (res < 0) { + goto exit; + } + + data->data[j] = res & 0xFF; + } + } + + data->last_updated[slice] = jiffies; + data->valid |= (1 << slice); + } +exit: + mutex_unlock(&data->update_lock); +} + +static ssize_t sys_eeprom_read(struct file *filp, struct kobject *kobj, + struct bin_attribute *bin_attr, + char *buf, loff_t off, size_t count) +{ + struct i2c_client *client = to_i2c_client(container_of(kobj, struct device, kobj)); + struct eeprom_data *data = i2c_get_clientdata(client); + u8 slice; + + if (off > EEPROM_SIZE) { + return 0; + } + if (off + count > EEPROM_SIZE) { + count = EEPROM_SIZE - off; + } + if (count == 0) { + return 0; + } + + /* Only refresh slices which contain requested bytes */ + for (slice = off >> SLICE_BITS; slice <= (off + count - 1) >> SLICE_BITS; slice++) { + sys_eeprom_update_client(client, slice); + } + + memcpy(buf, &data->data[off], count); + + return count; +} + +static ssize_t sys_eeprom_write(struct file *filp, struct kobject *kobj, + struct bin_attribute *bin_attr, + char *buf, loff_t off, size_t count) +{ + struct i2c_client *client = to_i2c_client(container_of(kobj, struct device, kobj)); + struct eeprom_data *data = i2c_get_clientdata(client); + int ret; + int i; + u8 cmd; + u16 value16; + + dev_dbg(&client->dev, "sys_eeprom_write off=%d, count=%d\n", (int)off, (int)count); + + if (off > EEPROM_SIZE) { + return 0; + } + if (off + count > EEPROM_SIZE) { + count = EEPROM_SIZE - off; + } + if (count == 0) { + return 0; + } + + mutex_lock(&data->update_lock); + + for(i=0; i < count; i++) { + /* write command */ + cmd = (off >> 8) & 0xff; + value16 = off & 0xff; + value16 |= buf[i] << 8; + ret = i2c_smbus_write_word_data(client, cmd, value16); + + if (ret < 0) { + dev_err(&client->dev, "write address failed at %d \n", (int)off); + goto exit; + } + + off++; + + /* need to wait for write complete */ + udelay(10000); + } +exit: + mutex_unlock(&data->update_lock); + /* force to update client when reading */ + for(i=0; i < SLICE_NUM; i++) { + data->last_updated[i] = 0; + } + + return count; +} + +static struct bin_attribute sys_eeprom_attr = { + .attr = { + .name = "eeprom", + .mode = S_IRUGO | S_IWUSR, + }, + .size = EEPROM_SIZE, + .read = sys_eeprom_read, + .write = sys_eeprom_write, +}; + +/* Return 0 if detection is successful, -ENODEV otherwise */ +static int sys_eeprom_detect(struct i2c_client *client, struct i2c_board_info *info) +{ + struct i2c_adapter *adapter = client->adapter; + + /* EDID EEPROMs are often 24C00 EEPROMs, which answer to all + addresses 0x50-0x57, but we only care about 0x51 and 0x55. So decline + attaching to addresses >= 0x56 on DDC buses */ + if (!(adapter->class & I2C_CLASS_SPD) && client->addr >= 0x56) { + return -ENODEV; + } + + if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_READ_BYTE) + && !i2c_check_functionality(adapter, I2C_FUNC_SMBUS_WRITE_BYTE_DATA)) { + return -ENODEV; + } + + strlcpy(info->type, "eeprom", I2C_NAME_SIZE); + + return 0; +} + +static int sys_eeprom_probe(struct i2c_client *client, + const struct i2c_device_id *id) +{ + struct eeprom_data *data; + int err; + + if (!(data = kzalloc(sizeof(struct eeprom_data), GFP_KERNEL))) { + err = -ENOMEM; + goto exit; + } + +#ifdef __STDC_LIB_EXT1__ + memset_s(data->data, EEPROM_SIZE, 0xff, EEPROM_SIZE); +#else + _memset(data->data, 0xff, EEPROM_SIZE); +#endif + i2c_set_clientdata(client, data); + mutex_init(&data->update_lock); + + /* create the sysfs eeprom file */ + err = sysfs_create_bin_file(&client->dev.kobj, &sys_eeprom_attr); + if (err) { + goto exit_kfree; + } + + return 0; + +exit_kfree: + kfree(data); +exit: + return err; +} + +#if LINUX_VERSION_CODE < KERNEL_VERSION(6, 1, 0) +static int +#else +static void +#endif +sys_eeprom_remove(struct i2c_client *client) +{ + sysfs_remove_bin_file(&client->dev.kobj, &sys_eeprom_attr); + kfree(i2c_get_clientdata(client)); + +#if LINUX_VERSION_CODE < KERNEL_VERSION(6, 1, 0) + return 0; +#endif +} + +static const struct i2c_device_id sys_eeprom_id[] = { + { "sys_eeprom", 0 }, + { } +}; + +static struct i2c_driver sys_eeprom_driver = { + .driver = { + .name = "sys_eeprom", + }, + .probe = sys_eeprom_probe, + .remove = sys_eeprom_remove, + .id_table = sys_eeprom_id, + + .class = I2C_CLASS_DDC | I2C_CLASS_SPD, + .detect = sys_eeprom_detect, + .address_list = normal_i2c, +}; + +module_i2c_driver(sys_eeprom_driver); + +MODULE_AUTHOR("Jason "); +MODULE_DESCRIPTION("UfiSpace System EEPROM driver"); +MODULE_LICENSE("GPL"); diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s7801-54xs/service/pddf-platform-init.service b/platform/broadcom/sonic-platform-modules-ufispace/s7801-54xs/service/pddf-platform-init.service new file mode 120000 index 0000000000..0fd9f25b6c --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ufispace/s7801-54xs/service/pddf-platform-init.service @@ -0,0 +1 @@ +../../../../pddf/i2c/service/pddf-platform-init.service \ No newline at end of file diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s7801-54xs/sonic_platform/__init__.py b/platform/broadcom/sonic-platform-modules-ufispace/s7801-54xs/sonic_platform/__init__.py new file mode 100644 index 0000000000..593867d31c --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ufispace/s7801-54xs/sonic_platform/__init__.py @@ -0,0 +1,4 @@ +# All the derived classes for PDDF +__all__ = ["platform", "chassis", "sfp", "psu", "thermal", "fan"] +from . import platform + diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s7801-54xs/sonic_platform/chassis.py b/platform/broadcom/sonic-platform-modules-ufispace/s7801-54xs/sonic_platform/chassis.py new file mode 100644 index 0000000000..0b02f9a834 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ufispace/s7801-54xs/sonic_platform/chassis.py @@ -0,0 +1,204 @@ +#!/usr/bin/env python + +############################################################################# +# PDDF +# Module contains an implementation of SONiC Chassis API +# +############################################################################# + +try: + import time + from sonic_platform_pddf_base.pddf_chassis import PddfChassis +except ImportError as e: + raise ImportError(str(e) + "- required module not found") + +NUM_COMPONENT = 4 + +class Chassis(PddfChassis): + """ + PDDF Platform-specific Chassis class + """ + + SYSLED_DEV_NAME = "SYS_LED" + port_dict = {} + + def __init__(self, pddf_data=None, pddf_plugin_data=None): + PddfChassis.__init__(self, pddf_data, pddf_plugin_data) + self._initialize_components() + + def _initialize_components(self): + from sonic_platform.component import Component + for index in range(NUM_COMPONENT): + component = Component(index) + self._component_list.append(component) + + # Provide the functions/variables below for which implementation is to be overwritten + def get_name(self): + """ + Retrieves the name of the chassis + Returns: + string: The name of the chassis + """ + # return device_info.get_hwsku() + return self._eeprom.platform_name_str() + + def initizalize_system_led(self): + return True + + def get_status_led(self): + return self.get_system_led(self.SYSLED_DEV_NAME) + + def get_change_event(self, timeout=0): + """ + Returns a nested dictionary containing all devices which have + experienced a change at chassis level + Args: + timeout: Timeout in milliseconds (optional). If timeout == 0, + this method will block until a change is detected. + Returns: + (bool, dict): + - bool: True if call successful, False if not; + - dict: A nested dictionary where key is a device type, + value is a dictionary with key:value pairs in the format of + {'device_id':'device_event'}, where device_id is the device ID + for this device and device_event. + The known devices's device_id and device_event was defined as table below. + ----------------------------------------------------------------- + device | device_id | device_event | annotate + ----------------------------------------------------------------- + 'fan' '' '0' Fan removed + '1' Fan inserted + 'sfp' '' '0' Sfp removed + '1' Sfp inserted + '2' I2C bus stuck + '3' Bad eeprom + '4' Unsupported cable + '5' High Temperature + '6' Bad cable + 'voltage' '' '0' Vout normal + '1' Vout abnormal + -------------------------------------------------------------------- + Ex. {'fan':{'0':'0', '2':'1'}, 'sfp':{'11':'0', '12':'1'}, + 'voltage':{'U20':'0', 'U21':'1'}} + Indicates that: + fan 0 has been removed, fan 2 has been inserted. + sfp 11 has been removed, sfp 12 has been inserted. + monitored voltage U20 became normal, voltage U21 became abnormal. + Note: For sfp, when event 3-6 happened, the module will not be avalaible, + XCVRD shall stop to read eeprom before SFP recovered from error status. + """ + + change_event_dict = {"fan": {}, "sfp": {}, "voltage": {}} + + start_time = time.time() + forever = False + + if timeout == 0: + forever = True + elif timeout > 0: + timeout = timeout / float(1000) # Convert to secs + else: + print("get_change_event:Invalid timeout value", timeout) + return False, change_event_dict + + end_time = start_time + timeout + if start_time > end_time: + print( + "get_change_event:" "time wrap / invalid timeout value", + timeout, + ) + return False, change_event_dict # Time wrap or possibly incorrect timeout + try: + while timeout >= 0: + # check for sfp + sfp_change_dict = self.get_transceiver_change_event() + # check for fan + # fan_change_dict = self.get_fan_change_event() + # check for voltage + # voltage_change_dict = self.get_voltage_change_event() + + if sfp_change_dict: + change_event_dict["sfp"] = sfp_change_dict + # change_event_dict["fan"] = fan_change_dict + # change_event_dict["voltage"] = voltage_change_dict + return True, change_event_dict + if forever: + time.sleep(1) + else: + timeout = end_time - time.time() + if timeout >= 1: + time.sleep(1) # We poll at 1 second granularity + else: + if timeout > 0: + time.sleep(timeout) + return True, change_event_dict + except Exception as e: + print(e) + print("get_change_event: Should not reach here.") + return False, change_event_dict + + def get_transceiver_change_event(self): + current_port_dict = {} + ret_dict = {} + + # Check for OIR events and return ret_dict + for index in range(self.platform_inventory['num_ports']): + if self._sfp_list[index].get_presence(): + #current_port_dict[index] = self.STATUS_INSERTED + current_port_dict[index] = self.plugin_data['XCVR']['plug_status']['inserted'] + else: + #current_port_dict[index] = self.STATUS_REMOVED + current_port_dict[index] = self.plugin_data['XCVR']['plug_status']['removed'] + + if len(self.port_dict) == 0: # first time + self.port_dict = current_port_dict + return {} + + if current_port_dict == self.port_dict: + return {} + + # Update reg value + for index, status in current_port_dict.items(): + if self.port_dict[index] != status: + ret_dict[index] = status + #ret_dict[str(index)] = status + self.port_dict = current_port_dict + for index, status in ret_dict.items(): + if int(status) == 1: + pass + #self._sfp_list[int(index)].check_sfp_optoe_type() + return ret_dict + + def get_reboot_cause(self): + """ + Retrieves the cause of the previous reboot + + Returns: + A tuple (string, string) where the first element is a string + containing the cause of the previous reboot. This string must be + one of the predefined strings in this class. If the first string + is "REBOOT_CAUSE_HARDWARE_OTHER", the second string can be used + to pass a description of the reboot cause. + """ + + reboot_cause_path = self.plugin_data['REBOOT_CAUSE']['reboot_cause_file'] + + try: + with open(reboot_cause_path, 'r', errors='replace') as fd: + data = fd.read() + sw_reboot_cause = data.strip() + except IOError: + sw_reboot_cause = "Unknown" + + return ('REBOOT_CAUSE_NON_HARDWARE', sw_reboot_cause) + + def get_serial_number(self): + """ + Retrieves the hardware serial number for the chassis + + Returns: + A string containing the hardware serial number for this + chassis. + """ + + return self.get_serial() \ No newline at end of file diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s7801-54xs/sonic_platform/component.py b/platform/broadcom/sonic-platform-modules-ufispace/s7801-54xs/sonic_platform/component.py new file mode 100644 index 0000000000..d5d8d8226f --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ufispace/s7801-54xs/sonic_platform/component.py @@ -0,0 +1,117 @@ +############################################################################# +# +# Component contains an implementation of SONiC Platform Base API and +# provides the components firmware management function +# +############################################################################# + +try: + import subprocess + from sonic_platform_base.component_base import ComponentBase + from sonic_platform_pddf_base import pddfapi +except ImportError as e: + raise ImportError(str(e) + "- required module not found") + +CPLD_SYSFS = { + "CPLD1": {"major": "cpld1_major_ver", "minor": "cpld1_minor_ver", "build": "cpld1_build"}, + "CPLD2": {"major": "cpld2_major_ver", "minor": "cpld2_minor_ver", "build": "cpld2_build"}, +} + +BMC_CMDS = { + "BMC": "bash -c 'tmp=$(ipmitool raw 0x6 0x1) && r=($(echo \"$tmp\" | cut -d \" \" -f 4,5,16,15,14)) && echo ${r[0]}.${r[1]}.${r[4]}.${r[3]}${r[2]}'", +} + +BIOS_VERSION_PATH = "/sys/class/dmi/id/bios_version" +COMPONENT_LIST= [ + ("CPLD1", "CPLD 1"), + ("CPLD2", "CPLD 2"), + ("BIOS", "Basic Input/Output System"), + ("BMC", "BMC"), +] + +class Component(ComponentBase): + """Platform-specific Component class""" + + DEVICE_TYPE = "component" + + def __init__(self, component_index=0): + self.pddf_obj = pddfapi.PddfApi() + self.index = component_index + self.name = self.get_name() + + def _get_bios_version(self): + # Retrieves the BIOS firmware version + try: + with open(BIOS_VERSION_PATH, 'r') as fd: + bios_version = fd.read() + return bios_version.strip() + except Exception as e: + return None + + def _get_cpld_version(self): + # Retrieves the CPLD firmware version + cpld_version = dict() + for cpld_name, elem in CPLD_SYSFS.items(): + device = "SYSSTATUS" + major = self.pddf_obj.get_attr_name_output(device, elem["major"]) + minor = self.pddf_obj.get_attr_name_output(device, elem["minor"]) + build = self.pddf_obj.get_attr_name_output(device, elem["build"]) + if major and minor and build: + major = int(major['status'].rstrip(),0) + minor = int(minor['status'].rstrip(),0) + build = int(build['status'].rstrip(),0) + cpld_version[cpld_name] = "{}.{:02d}.{:03d}".format(major, minor, build) + else: + cpld_version[cpld_name] = "N/A" + return cpld_version + + def _get_bmc_version(self): + # Retrieves the BMC firmware version + status, value = subprocess.getstatusoutput(BMC_CMDS["BMC"]) + if not status: + return value + else: + return None + + def get_name(self): + """ + Retrieves the name of the component + Returns: + A string containing the name of the component + """ + return COMPONENT_LIST[self.index][0] + + def get_description(self): + """ + Retrieves the description of the component + Returns: + A string containing the description of the component + """ + return COMPONENT_LIST[self.index][1] + + def get_firmware_version(self): + """ + Retrieves the firmware version of module + Returns: + string: The firmware versions of the module + """ + fw_version = None + + if self.name == "BIOS": + fw_version = self._get_bios_version() + elif "CPLD" in self.name: + cpld_version = self._get_cpld_version() + fw_version = cpld_version.get(self.name) + elif self.name == "BMC": + fw_version = self._get_bmc_version() + return fw_version + + def install_firmware(self, image_path): + """ + Install firmware to module + Args: + image_path: A string, path to firmware image + Returns: + A boolean, True if install successfully, False if not + """ + raise NotImplementedError diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s7801-54xs/sonic_platform/eeprom.py b/platform/broadcom/sonic-platform-modules-ufispace/s7801-54xs/sonic_platform/eeprom.py new file mode 100644 index 0000000000..90ab1c779a --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ufispace/s7801-54xs/sonic_platform/eeprom.py @@ -0,0 +1,21 @@ +#!/usr/bin/env python + +try: + from sonic_platform_pddf_base.pddf_eeprom import PddfEeprom +except ImportError as e: + raise ImportError(str(e) + "- required module not found") + + +class Eeprom(PddfEeprom): + + def __init__(self, pddf_data=None, pddf_plugin_data=None): + PddfEeprom.__init__(self, pddf_data, pddf_plugin_data) + + # Provide the functions/variables below for which implementation is to be overwritten + + def platform_name_str(self): + (is_valid, results) = self.get_tlv_field(self.eeprom_data, self._TLV_CODE_PLATFORM_NAME) + if not is_valid: + return "N/A" + + return results[2].decode('ascii') \ No newline at end of file diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s7801-54xs/sonic_platform/fan.py b/platform/broadcom/sonic-platform-modules-ufispace/s7801-54xs/sonic_platform/fan.py new file mode 100644 index 0000000000..c3cb875646 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ufispace/s7801-54xs/sonic_platform/fan.py @@ -0,0 +1,158 @@ +#!/usr/bin/env python + + +try: + from sonic_platform_pddf_base.pddf_fan import PddfFan +except ImportError as e: + raise ImportError(str(e) + "- required module not found") + + +class Fan(PddfFan): + """PDDF Platform-Specific Fan class""" + + def __init__(self, tray_idx, fan_idx=0, pddf_data=None, pddf_plugin_data=None, is_psu_fan=False, psu_index=0): + # idx is 0-based + PddfFan.__init__(self, tray_idx, fan_idx, pddf_data, pddf_plugin_data, is_psu_fan, psu_index) + + # Provide the functions/variables below for which implementation is to be overwritten + # Since psu_fan airflow direction cant be read from sysfs, it is fixed as 'F2B' or 'intake' + + def get_mfr_id(self): + """ + Retrieves the manufacturer id of the device + + Returns: + string: Manufacturer Id of device + """ + if self.is_psu_fan: + device = "PSU{}".format(self.fans_psu_index) + output = self.pddf_obj.get_attr_name_output(device, "psu_mfr_id") + else: + raise NotImplementedError + + if not output: + return None + + mfr = output['status'] + + # strip_non_ascii + stripped = (c for c in mfr if 0 < ord(c) < 127) + mfr = ''.join(stripped) + + return mfr.rstrip('\n') + + def get_model(self): + """ + Retrieves the model number (or part number) of the device + + Returns: + string: Model/part number of device + """ + if self.is_psu_fan: + device = "PSU{}".format(self.fans_psu_index) + output = self.pddf_obj.get_attr_name_output(device, "psu_model_name") + else: + raise NotImplementedError + + if not output: + return None + + model = output['status'] + + # strip_non_ascii + stripped = (c for c in model if 0 < ord(c) < 127) + model = ''.join(stripped) + + return model.rstrip('\n') + + def get_max_speed(self): + """ + Retrieves the max speed + + Returns: + An Integer, the max speed + """ + if self.is_psu_fan: + mfr = self.get_mfr_id() + model = self.get_model() + + max_speed = int(self.plugin_data['PSU']['valmap']['PSU_FAN_MAX_SPEED_AC']) + if mfr and model : + for dev in self.plugin_data['PSU']['psu_support_list']: + if dev['Manufacturer'] == mfr and dev['Name'] == model: + max_speed = int(self.plugin_data['PSU']['valmap'][dev['MaxSpd']]) + break + else: + max_speed = int(self.plugin_data['FAN']['FAN_MAX_SPEED']) + + return max_speed + + def get_speed(self): + """ + Retrieves the speed of fan as a percentage of full speed + + Returns: + An integer, the percentage of full fan speed, in the range 0 (off) + to 100 (full speed) + """ + speed_percentage = 0 + + max_speed = self.get_max_speed() + rpm_speed = self.get_speed_rpm() + + speed_percentage = round((rpm_speed*100)/max_speed) + + return min(speed_percentage, 100) + + def get_presence(self): + """ + Retrieves the presence of the device + Returns: + bool: True if device is present, False if not + """ + if self.is_psu_fan: + attr_name = "psu_present" + device = "PSU{}".format(self.fans_psu_index) + else: + idx = (self.fantray_index-1)*self.platform['num_fans_pertray'] + self.fan_index + attr_name = "fan" + str(idx) + "_present" + device = "FAN-CTRL" + + output = self.pddf_obj.get_attr_name_output(device, attr_name) + if not output: + return False + + mode = output['mode'] + presence = output['status'].rstrip() + vmap = self.plugin_data['FAN']['present'][mode]['valmap'] + + if presence in vmap: + status = vmap[presence] + else: + status = False + + return status + + def get_target_speed(self): + """ + Retrieves the target (expected) speed of the fan + Returns: + An integer, the percentage of full fan speed, in the range 0 (off) + to 100 (full speed) + """ + return self.get_speed() + + def set_speed(self, speed): + """ + Sets the fan speed + + Args: + speed: An integer, the percentage of full fan speed to set fan to, + in the range 0 (off) to 100 (full speed) + + Returns: + A boolean, True if speed is set successfully, False if not + """ + + print("Setting Fan speed is not allowed") + return False diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s7801-54xs/sonic_platform/fan_drawer.py b/platform/broadcom/sonic-platform-modules-ufispace/s7801-54xs/sonic_platform/fan_drawer.py new file mode 100644 index 0000000000..3b9bb607f6 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ufispace/s7801-54xs/sonic_platform/fan_drawer.py @@ -0,0 +1,17 @@ +#!/usr/bin/env python + + +try: + from sonic_platform_pddf_base.pddf_fan_drawer import PddfFanDrawer +except ImportError as e: + raise ImportError(str(e) + "- required module not found") + + +class FanDrawer(PddfFanDrawer): + """PDDF Platform-Specific Fan-Drawer class""" + + def __init__(self, tray_idx, pddf_data=None, pddf_plugin_data=None): + # idx is 0-based + PddfFanDrawer.__init__(self, tray_idx, pddf_data, pddf_plugin_data) + + # Provide the functions/variables below for which implementation is to be overwritten diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s7801-54xs/sonic_platform/platform.py b/platform/broadcom/sonic-platform-modules-ufispace/s7801-54xs/sonic_platform/platform.py new file mode 100644 index 0000000000..406b1179ae --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ufispace/s7801-54xs/sonic_platform/platform.py @@ -0,0 +1,25 @@ +#!/usr/bin/env python + +############################################################################# +# PDDF +# Module contains an implementation of SONiC Platform Base API and +# provides the platform information +# +############################################################################# + + +try: + from sonic_platform_pddf_base.pddf_platform import PddfPlatform +except ImportError as e: + raise ImportError(str(e) + "- required module not found") + + +class Platform(PddfPlatform): + """ + PDDF Platform-Specific Platform Class + """ + + def __init__(self): + PddfPlatform.__init__(self) + + # Provide the functions/variables below for which implementation is to be overwritten diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s7801-54xs/sonic_platform/psu.py b/platform/broadcom/sonic-platform-modules-ufispace/s7801-54xs/sonic_platform/psu.py new file mode 100644 index 0000000000..92917d9461 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ufispace/s7801-54xs/sonic_platform/psu.py @@ -0,0 +1,67 @@ +#!/usr/bin/env python + + +try: + from sonic_platform_pddf_base.pddf_psu import PddfPsu +except ImportError as e: + raise ImportError (str(e) + "- required module not found") + + +class Psu(PddfPsu): + """PDDF Platform-Specific PSU class""" + + PLATFORM_PSU_CAPACITY = 450 + + def __init__(self, index, pddf_data=None, pddf_plugin_data=None): + PddfPsu.__init__(self, index, pddf_data, pddf_plugin_data) + + # Provide the functions/variables below for which implementation is to be overwritten + def get_maximum_supplied_power(self): + """ + Retrieves the maximum supplied power by PSU (or PSU capacity) + Returns: + A float number, the maximum power output in Watts. + e.g. 1200.1 + """ + return float(self.PLATFORM_PSU_CAPACITY) + + def get_power(self): + """ + Retrieves current energy supplied by PSU + + Returns: + A float number, the power in watts, + e.g. 302.6 + """ + + # power is returned in micro watts + return round(float(self.get_voltage()*self.get_current()), 2) + + def get_capacity(self): + """ + Retrieves the maximum supplied power by PSU (or PSU capacity) + Returns: + A float number, the maximum power output in Watts. + e.g. 1200.1 + """ + return self.get_maximum_supplied_power() + + def get_type(self): + """ + Gets the type of the PSU + + Returns: + A string, the type of PSU (AC/DC) + """ + mfr = self.get_mfr_id() + model = self.get_model() + ptype = self.plugin_data['PSU']['valmap']['DEFAULT_TYPE'] + + if mfr and model : + for dev in self.plugin_data['PSU']['psu_support_list']: + if dev['Manufacturer'] == mfr and dev['Name'] == model: + ptype = dev['Type'] + break + + + return ptype diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s7801-54xs/sonic_platform/sfp.py b/platform/broadcom/sonic-platform-modules-ufispace/s7801-54xs/sonic_platform/sfp.py new file mode 100644 index 0000000000..8ab43117d5 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ufispace/s7801-54xs/sonic_platform/sfp.py @@ -0,0 +1,49 @@ +#!/usr/bin/env python + +try: + from sonic_platform_pddf_base.pddf_sfp import PddfSfp +except ImportError as e: + raise ImportError (str(e) + "- required module not found") + + +class Sfp(PddfSfp): + """ + PDDF Platform-Specific Sfp class + """ + + def __init__(self, index, pddf_data=None, pddf_plugin_data=None): + PddfSfp.__init__(self, index, pddf_data, pddf_plugin_data) + self.index = index + + # Provide the functions/variables below for which implementation is to be overwritten + + def get_lpmode(self): + if self.sfp_type == "QSFP28": + return super().get_lpmode() + else: + return False + + def set_lpmode(self, lpmode): + if self.sfp_type == "QSFP28": + return super().set_lpmode(lpmode) + else: + return False + + def reset(self): + if self.sfp_type == "QSFP28": + return super().reset() + else: + return False + + def get_error_description(self): + """ + Retrives the error descriptions of the SFP module + Returns: + String that represents the current error descriptions of vendor specific errors + In case there are multiple errors, they should be joined by '|', + like: "Bad EEPROM|Unsupported cable" + """ + if not self.get_presence(): + return self.SFP_STATUS_UNPLUGGED + + return self.SFP_STATUS_OK diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s7801-54xs/sonic_platform/thermal.py b/platform/broadcom/sonic-platform-modules-ufispace/s7801-54xs/sonic_platform/thermal.py new file mode 100644 index 0000000000..77d6ec7ae8 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ufispace/s7801-54xs/sonic_platform/thermal.py @@ -0,0 +1,17 @@ +#!/usr/bin/env python + + +try: + from sonic_platform_pddf_base.pddf_thermal import PddfThermal +except ImportError as e: + raise ImportError(str(e) + "- required module not found") + + + +class Thermal(PddfThermal): + """PDDF Platform-Specific Thermal class""" + + def __init__(self, index, pddf_data=None, pddf_plugin_data=None, is_psu_thermal=False, psu_index=0): + PddfThermal.__init__(self, index, pddf_data, pddf_plugin_data, is_psu_thermal, psu_index) + + # Provide the functions/variables below for which implementation is to be overwritten diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s7801-54xs/sonic_platform_setup.py b/platform/broadcom/sonic-platform-modules-ufispace/s7801-54xs/sonic_platform_setup.py new file mode 100644 index 0000000000..c0a485320c --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ufispace/s7801-54xs/sonic_platform_setup.py @@ -0,0 +1,27 @@ +from setuptools import setup + +setup( + name='sonic-platform', + version='1.0', + description='SONiC platform API implementation on ufispace platform', + license='Apache 2.0', + author='SONiC Team', + author_email='linuxnetdev@microsoft.com', + url='https://github.com/Azure/sonic-buildimage', + maintainer='Jason Tsai', + maintainer_email='jason.cy.tsai@ufispace.com', + packages=['sonic_platform'], + classifiers=[ + 'Development Status :: 3 - Alpha', + 'Environment :: Plugins', + 'Intended Audience :: Developers', + 'Intended Audience :: Information Technology', + 'Intended Audience :: System Administrators', + 'License :: OSI Approved :: Apache Software License', + 'Natural Language :: English', + 'Operating System :: POSIX :: Linux', + 'Programming Language :: Python :: 3.7', + 'Topic :: Utilities', + ], + keywords='sonic SONiC platform PLATFORM', +) diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s7801-54xs/utils/pddf_post_device_create.sh b/platform/broadcom/sonic-platform-modules-ufispace/s7801-54xs/utils/pddf_post_device_create.sh new file mode 100755 index 0000000000..c6fe10aba3 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ufispace/s7801-54xs/utils/pddf_post_device_create.sh @@ -0,0 +1,16 @@ +#!/bin/bash + +#disable bmc watchdog +echo "Disable BMC watchdog" +timeout 3 ipmitool mc watchdog off + +pddf_ledutil setstatusled SYNC_LED off +pddf_ledutil setstatusled SYS_LED off +pddf_ledutil setstatusled LOC_LED off + +#set status led to green to indicate platform init done +curr_led=$(pddf_ledutil getstatusled SYS_LED) +pddf_ledutil setstatusled SYS_LED green +echo "Set SYS_LED from $curr_led to green" + +echo "PDDF device post-create completed" diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s7801-54xs/utils/pddf_post_driver_install.sh b/platform/broadcom/sonic-platform-modules-ufispace/s7801-54xs/utils/pddf_post_driver_install.sh new file mode 100755 index 0000000000..ed2559977e --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ufispace/s7801-54xs/utils/pddf_post_driver_install.sh @@ -0,0 +1,2 @@ +#!/bin/bash +echo "PDDF driver post-install completed" diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s7801-54xs/utils/pddf_switch_svc.py b/platform/broadcom/sonic-platform-modules-ufispace/s7801-54xs/utils/pddf_switch_svc.py new file mode 100755 index 0000000000..ca34fe9442 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ufispace/s7801-54xs/utils/pddf_switch_svc.py @@ -0,0 +1,50 @@ +#!/usr/bin/env python +# Script to stop and start the respective platforms default services. +# This will be used while switching the pddf->non-pddf mode and vice versa +import commands + +def check_pddf_support(): + return True + +def stop_platform_svc(): + + status, output = commands.getstatusoutput("/usr/local/bin/platform_utility.py deinit") + if status: + print "platform_utility.py deinit command failed %d"%status + return False + + # HACK , stop the pddf-platform-init service if it is active + status, output = commands.getstatusoutput("systemctl stop pddf-platform-init.service") + if status: + print "Stop pddf-platform-init.service along with other platform serives failed %d"%status + return False + + return True + +def start_platform_svc(): + + status, output = commands.getstatusoutput("/usr/local/bin/platform_utility.py init") + if status: + print "platform_utility.py init command failed %d"%status + return False + + return True + +def start_platform_pddf(): + + status, output = commands.getstatusoutput("systemctl start pddf-platform-init.service") + if status: + print "Start pddf-platform-init.service failed %d"%status + return False + + return True + +def stop_platform_pddf(): + + status, output = commands.getstatusoutput("systemctl stop pddf-platform-init.service") + if status: + print "Stop pddf-platform-init.service failed %d"%status + return False + + return True + diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s8901-54xc/modules/Makefile b/platform/broadcom/sonic-platform-modules-ufispace/s8901-54xc/modules/Makefile new file mode 100644 index 0000000000..b6a4d45f75 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ufispace/s8901-54xc/modules/Makefile @@ -0,0 +1,7 @@ + +MODULE_NAME = x86-64-ufispace-s8901-54xc-cpld.o x86-64-ufispace-s8901-54xc-sys-eeprom.o x86-64-ufispace-s8901-54xc-lpc.o pddf_custom_gpio_module.o pddf_custom_sysstatus_module.o +obj-m := $(MODULE_NAME) + +CFLAGS_pddf_custom_gpio_module.o := -I$(M)/../../../../pddf/i2c/modules/include +CFLAGS_pddf_custom_sysstatus_module.o := -I$(M)/../../../../pddf/i2c/modules/include +KBUILD_EXTRA_SYMBOLS := $(M)/../../../../pddf/i2c/Module.symvers.PDDF diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s8901-54xc/modules/pddf_custom_gpio_module.c b/platform/broadcom/sonic-platform-modules-ufispace/s8901-54xc/modules/pddf_custom_gpio_module.c new file mode 100644 index 0000000000..adfcbe7884 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ufispace/s8901-54xc/modules/pddf_custom_gpio_module.c @@ -0,0 +1,236 @@ +/* + * Copyright 2019 Broadcom. + * The term “Broadcom” refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * + * PDDF generic kernle module to create the I2C client for pca955x type of GPIO module + */ + +#define __STDC_WANT_LIB_EXT1__ 1 +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include "pddf_client_defs.h" +#include "pddf_gpio_defs.h" + +#define _memset(s, c, n) memset(s, c, n) + +static ssize_t do_device_operation(struct device *dev, struct device_attribute *da, const char *buf, size_t count); +extern void* get_device_table(char *name); +extern void delete_device_table(char *name); + +static int base_gpio_num = 0xf0; +GPIO_DATA gpio_data = {0}; + +/* GPIO CLIENT DATA */ +PDDF_DATA_ATTR(gpio_base, S_IWUSR|S_IRUGO, show_pddf_data, store_pddf_data, PDDF_INT_HEX, sizeof(int), (void*)&gpio_data.gpio_base, NULL); +PDDF_DATA_ATTR(dev_ops, S_IWUSR, NULL, do_device_operation, PDDF_CHAR, 8, (void*)&gpio_data, (void*)&pddf_data); + + + +static struct attribute *gpio_attributes[] = { + &attr_gpio_base.dev_attr.attr, + &attr_dev_ops.dev_attr.attr, + NULL +}; + +static const struct attribute_group pddf_gpio_client_data_group = { + .attrs = gpio_attributes, +}; + + +struct i2c_board_info *i2c_get_gpio_board_info(GPIO_DATA* mdata, NEW_DEV_ATTR *device_data) +{ + static struct i2c_board_info board_info; + struct pca953x_platform_data *gpio_platform_data=NULL; + int def_num_gpios, base; + + gpio_platform_data = (struct pca953x_platform_data *)kzalloc(sizeof (struct pca953x_platform_data), GFP_KERNEL); + + if (strncmp(device_data->dev_type, "pca9554", strlen("pca9554")) == 0 || + strncmp(device_data->dev_type, "pca9534", strlen("pca9534")) == 0 || + strncmp(device_data->dev_type, "pca9538", strlen("pca9538")) == 0) + def_num_gpios = 0x8; + else if (strncmp(device_data->dev_type, "pca9555", strlen("pca9555")) == 0 || + strncmp(device_data->dev_type, "pca9535", strlen("pca9535")) == 0 || + strncmp(device_data->dev_type, "pca9539", strlen("pca9539")) == 0 || + strncmp(device_data->dev_type, "pca9575", strlen("pca9575")) == 0) + def_num_gpios = 0x10; + else if (strncmp(device_data->dev_type, "pca9698", strlen("pca9698")) == 0 || + strncmp(device_data->dev_type, "pca9505", strlen("pca9505")) == 0) + def_num_gpios = 0x28; + else if (strncmp(device_data->dev_type, "tca6424", strlen("tca6424")) == 0) + def_num_gpios = 0x18; + else + { + printk(KERN_ERR "%s: Unknown type of gpio device\n", __FUNCTION__); + return NULL; + } + + if(mdata->gpio_base == 0) { + base = base_gpio_num; + base_gpio_num += def_num_gpios; + } + else { + base = mdata->gpio_base; + } + + gpio_platform_data->gpio_base = base; + + board_info = (struct i2c_board_info) { + .platform_data = gpio_platform_data, + }; + + board_info.addr = device_data->dev_addr; + strcpy(board_info.type, device_data->dev_type); + + return &board_info; +} + + +static ssize_t do_device_operation(struct device *dev, struct device_attribute *da, const char *buf, size_t count) +{ + PDDF_ATTR *ptr = (PDDF_ATTR *)da; + GPIO_DATA *gpio_ptr = (GPIO_DATA *)(ptr->addr); + NEW_DEV_ATTR *device_ptr = (NEW_DEV_ATTR *)(ptr->data); + struct i2c_adapter *adapter; + struct i2c_board_info *board_info; + struct i2c_client *client_ptr; + + if (strncmp(buf, "add", strlen(buf)-1)==0) + { + adapter = i2c_get_adapter(device_ptr->parent_bus); + board_info = i2c_get_gpio_board_info(gpio_ptr, device_ptr); + + /*pddf_dbg(KERN_ERR "Creating a client %s on 0x%x, platform_data 0x%x\n", board_info->type, board_info->addr, board_info->platform_data);*/ + client_ptr = i2c_new_client_device(adapter, board_info); + + i2c_put_adapter(adapter); + if (!IS_ERR(client_ptr)) + { + pddf_dbg(GPIO, KERN_ERR "Created %s client: 0x%p\n", device_ptr->i2c_name, (void *)client_ptr); + add_device_table(device_ptr->i2c_name, (void*)client_ptr); + } + else + { + kfree(board_info); + goto free_data; + } + } + else if (strncmp(buf, "delete", strlen(buf)-1)==0) + { + /*Get the i2c_client handle for the created client*/ + client_ptr = (struct i2c_client *)get_device_table(device_ptr->i2c_name); + if (client_ptr) + { + struct pca953x_platform_data *gpio_platform_data = (struct pca953x_platform_data *)client_ptr->dev.platform_data; + pddf_dbg(GPIO, KERN_ERR "Removing %s client: 0x%p\n", device_ptr->i2c_name, (void *)client_ptr); + i2c_unregister_device(client_ptr); + /*TODO: Nullyfy the platform data*/ + if (gpio_platform_data) + kfree(gpio_platform_data); + delete_device_table(device_ptr->i2c_name); + } + else + { + printk(KERN_ERR "Unable to get the client handle for %s\n", device_ptr->i2c_name); + } + } + else + { + printk(KERN_ERR "PDDF_ERROR: %s: Invalid value for dev_ops %s", __FUNCTION__, buf); + } + +free_data: + +#ifdef __STDC_LIB_EXT1__ + memset_s(gpio_ptr, sizeof(GPIO_DATA), 0, sizeof(GPIO_DATA)); +#else + _memset(gpio_ptr, 0, sizeof(GPIO_DATA)); +#endif + /*TODO: free the device_ptr->data is dynamically allocated*/ +#ifdef __STDC_LIB_EXT1__ + memset_s(device_ptr, sizeof(NEW_DEV_ATTR), 0 , sizeof(NEW_DEV_ATTR)); +#else + _memset(device_ptr, 0 , sizeof(NEW_DEV_ATTR)); +#endif + + return count; +} + + +static struct kobject *gpio_kobj; + +int __init gpio_data_init(void) +{ + struct kobject *device_kobj; + int ret = 0; + + + pddf_dbg(GPIO, "GPIO_DATA MODULE.. init\n"); + + device_kobj = get_device_i2c_kobj(); + if(!device_kobj) + return -ENOMEM; + + gpio_kobj = kobject_create_and_add("gpio", device_kobj); + if(!gpio_kobj) + return -ENOMEM; + + + ret = sysfs_create_group(gpio_kobj, &pddf_clients_data_group); + if (ret) + { + kobject_put(gpio_kobj); + return ret; + } + pddf_dbg(GPIO, "CREATED PDDF I2C CLIENTS CREATION SYSFS GROUP\n"); + + ret = sysfs_create_group(gpio_kobj, &pddf_gpio_client_data_group); + if (ret) + { + sysfs_remove_group(gpio_kobj, &pddf_clients_data_group); + kobject_put(gpio_kobj); + return ret; + } + pddf_dbg(GPIO, "CREATED GPIO DATA SYSFS GROUP\n"); + + return ret; +} + +void __exit gpio_data_exit(void) +{ + pddf_dbg(GPIO, "GPIO_DATA MODULE.. exit\n"); + sysfs_remove_group(gpio_kobj, &pddf_gpio_client_data_group); + sysfs_remove_group(gpio_kobj, &pddf_clients_data_group); + kobject_put(gpio_kobj); + pddf_dbg(GPIO, KERN_ERR "%s: Removed the kobjects for 'gpio'\n",__FUNCTION__); + return; +} + +module_init(gpio_data_init); +module_exit(gpio_data_exit); + +MODULE_AUTHOR("Broadcom"); +MODULE_DESCRIPTION("gpio platform data"); +MODULE_LICENSE("GPL"); diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s8901-54xc/modules/pddf_custom_sysstatus_module.c b/platform/broadcom/sonic-platform-modules-ufispace/s8901-54xc/modules/pddf_custom_sysstatus_module.c new file mode 100644 index 0000000000..3be3941277 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ufispace/s8901-54xc/modules/pddf_custom_sysstatus_module.c @@ -0,0 +1,278 @@ +/* + * Copyright 2019 Broadcom. + * The term ��Broadcom�� refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * + * A pddf kernel module for system status registers + */ + +#define __STDC_WANT_LIB_EXT1__ 1 +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include "../../../../pddf/i2c/modules/include/pddf_client_defs.h" +#include "../../../../pddf/i2c/modules/include/pddf_sysstatus_defs.h" + +#define _memset(s, c, n) memset(s, c, n) + +SYSSTATUS_DATA sysstatus_data = {0}; + +extern int board_i2c_cpld_read(unsigned short cpld_addr, u8 reg); +extern int board_i2c_cpld_write(unsigned short cpld_addr, u8 reg, u8 value); + +static ssize_t do_attr_operation(struct device *dev, struct device_attribute *da, const char *buf, size_t count); +ssize_t show_sysstatus_data(struct device *dev, struct device_attribute *da, char *buf); +ssize_t store_sysstatus_data(struct device *dev, struct device_attribute *da, const char *buf, size_t count); + + +PDDF_DATA_ATTR(attr_name, S_IWUSR|S_IRUGO, show_pddf_data, store_pddf_data, PDDF_CHAR, 32, + (void*)&sysstatus_data.sysstatus_addr_attr.aname, NULL); +PDDF_DATA_ATTR(attr_devaddr, S_IWUSR|S_IRUGO, show_pddf_data, store_pddf_data, PDDF_UINT32, + sizeof(uint32_t), (void*)&sysstatus_data.sysstatus_addr_attr.devaddr , NULL); +PDDF_DATA_ATTR(attr_offset, S_IWUSR|S_IRUGO, show_pddf_data, store_pddf_data, PDDF_UINT32, + sizeof(uint32_t), (void*)&sysstatus_data.sysstatus_addr_attr.offset, NULL); +PDDF_DATA_ATTR(attr_mask, S_IWUSR|S_IRUGO, show_pddf_data, store_pddf_data, PDDF_UINT32, + sizeof(uint32_t), (void*)&sysstatus_data.sysstatus_addr_attr.mask , NULL); +PDDF_DATA_ATTR(attr_len, S_IWUSR|S_IRUGO, show_pddf_data, store_pddf_data, PDDF_UINT32, + sizeof(uint32_t), (void*)&sysstatus_data.sysstatus_addr_attr.len , NULL); +PDDF_DATA_ATTR(attr_ops, S_IWUSR, NULL, do_attr_operation, PDDF_CHAR, 8, (void*)&sysstatus_data, NULL); + + + +static struct attribute *sysstatus_addr_attributes[] = { + &attr_attr_name.dev_attr.attr, + &attr_attr_devaddr.dev_attr.attr, + &attr_attr_offset.dev_attr.attr, + &attr_attr_mask.dev_attr.attr, + &attr_attr_len.dev_attr.attr, + &attr_attr_ops.dev_attr.attr, + NULL +}; + +PDDF_DATA_ATTR(board_sku_id , S_IRUGO, show_sysstatus_data, NULL, PDDF_UCHAR, sizeof(u8), NULL, NULL); +PDDF_DATA_ATTR(board_hw_id , S_IRUGO, show_sysstatus_data, NULL, PDDF_UCHAR, sizeof(u8), NULL, NULL); +PDDF_DATA_ATTR(board_deph_id , S_IRUGO, show_sysstatus_data, NULL, PDDF_UCHAR, sizeof(u8), NULL, NULL); +PDDF_DATA_ATTR(board_build_id , S_IRUGO, show_sysstatus_data, NULL, PDDF_UCHAR, sizeof(u8), NULL, NULL); +PDDF_DATA_ATTR(cpld1_major_ver, S_IRUGO, show_sysstatus_data, NULL, PDDF_UCHAR, sizeof(u8), NULL, NULL); +PDDF_DATA_ATTR(cpld1_minor_ver, S_IRUGO, show_sysstatus_data, NULL, PDDF_UCHAR, sizeof(u8), NULL, NULL); +PDDF_DATA_ATTR(cpld1_build , S_IRUGO, show_sysstatus_data, NULL, PDDF_UCHAR, sizeof(u8), NULL, NULL); +PDDF_DATA_ATTR(cpld2_major_ver, S_IRUGO, show_sysstatus_data, NULL, PDDF_UCHAR, sizeof(u8), NULL, NULL); +PDDF_DATA_ATTR(cpld2_minor_ver, S_IRUGO, show_sysstatus_data, NULL, PDDF_UCHAR, sizeof(u8), NULL, NULL); +PDDF_DATA_ATTR(cpld2_build , S_IRUGO, show_sysstatus_data, NULL, PDDF_UCHAR, sizeof(u8), NULL, NULL); +PDDF_DATA_ATTR(psu_status , S_IRUGO, show_sysstatus_data, NULL, PDDF_UCHAR, sizeof(u8), NULL, NULL); +PDDF_DATA_ATTR(system_led_psu , S_IRUGO, show_sysstatus_data, NULL, PDDF_UCHAR, sizeof(u8), NULL, NULL); +PDDF_DATA_ATTR(system_led_sys , S_IWUSR|S_IRUGO, show_sysstatus_data, store_sysstatus_data, PDDF_UCHAR, sizeof(u8), NULL, NULL); +PDDF_DATA_ATTR(system_led_sync, S_IRUGO, show_sysstatus_data, NULL, PDDF_UCHAR, sizeof(u8), NULL, NULL); +PDDF_DATA_ATTR(system_led_fan , S_IRUGO, show_sysstatus_data, NULL, PDDF_UCHAR, sizeof(u8), NULL, NULL); +PDDF_DATA_ATTR(system_led_id , S_IWUSR|S_IRUGO, show_sysstatus_data, store_sysstatus_data, PDDF_UCHAR, sizeof(u8), NULL, NULL); + +static struct attribute *sysstatus_data_attributes[] = { + &attr_board_sku_id.dev_attr.attr, + &attr_board_hw_id.dev_attr.attr, + &attr_board_deph_id.dev_attr.attr, + &attr_board_build_id.dev_attr.attr, + &attr_cpld1_major_ver.dev_attr.attr, + &attr_cpld1_minor_ver.dev_attr.attr, + &attr_cpld1_build.dev_attr.attr, + &attr_cpld2_major_ver.dev_attr.attr, + &attr_cpld2_minor_ver.dev_attr.attr, + &attr_cpld2_build.dev_attr.attr, + &attr_psu_status.dev_attr.attr, + &attr_system_led_psu.dev_attr.attr, + &attr_system_led_sys.dev_attr.attr, + &attr_system_led_sync.dev_attr.attr, + &attr_system_led_fan.dev_attr.attr, + &attr_system_led_id.dev_attr.attr, + NULL +}; + + +static const struct attribute_group pddf_sysstatus_addr_group = { + .attrs = sysstatus_addr_attributes, +}; + + +static const struct attribute_group pddf_sysstatus_data_group = { + .attrs = sysstatus_data_attributes, +}; + + +static struct kobject *sysstatus_addr_kobj; +static struct kobject *sysstatus_data_kobj; + + + +ssize_t show_sysstatus_data(struct device *dev, struct device_attribute *da, char *buf) +{ + + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + + SYSSTATUS_DATA *data = &sysstatus_data; + struct SYSSTATUS_ADDR_ATTR *sysstatus_addr_attrs = NULL; + int i, status ; + + + for (i=0;isysstatus_addr_attrs[i].aname, attr->dev_attr.attr.name) == 0 ) + { + sysstatus_addr_attrs = &data->sysstatus_addr_attrs[i]; + + } + } + + if (sysstatus_addr_attrs==NULL ) + { + printk(KERN_DEBUG "%s is not supported attribute for this client\n",attr->dev_attr.attr.name); + status = 0; + return sprintf(buf, "0x%x\n", status); + } + else + { + status = board_i2c_cpld_read( sysstatus_addr_attrs->devaddr, sysstatus_addr_attrs->offset); + } + + return sprintf(buf, "0x%x\n", (status&sysstatus_addr_attrs->mask)); + +} + +ssize_t store_sysstatus_data(struct device *dev, struct device_attribute *da, const char *buf, size_t count) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + + SYSSTATUS_DATA *data = &sysstatus_data; + struct SYSSTATUS_ADDR_ATTR *sysstatus_addr_attrs = NULL; + int i, status ; + u8 reg_val; + + for (i=0;isysstatus_addr_attrs[i].aname, attr->dev_attr.attr.name) == 0 ) + { + sysstatus_addr_attrs = &data->sysstatus_addr_attrs[i]; + } + } + + if (sysstatus_addr_attrs==NULL) + { + printk(KERN_DEBUG "%s is not supported attribute for this client\n",attr->dev_attr.attr.name); + return -EINVAL; + } + else + { + if (kstrtou8(buf, 0, ®_val) < 0) + return -EINVAL; + + status = board_i2c_cpld_write(sysstatus_addr_attrs->devaddr, sysstatus_addr_attrs->offset, reg_val); + + if (status!=0) + { + printk(KERN_DEBUG "store_sysstatus_data() %s failed, status=%d\n",data->sysstatus_addr_attrs[i].aname, status); + return status; + } + } + + return count; +} + + + +static ssize_t do_attr_operation(struct device *dev, struct device_attribute *da, const char *buf, size_t count) +{ + PDDF_ATTR *ptr = (PDDF_ATTR *)da; + SYSSTATUS_DATA *pdata = (SYSSTATUS_DATA *)(ptr->addr); + + pdata->sysstatus_addr_attrs[pdata->len] = pdata->sysstatus_addr_attr; + pdata->len++; + pddf_dbg(SYSSTATUS, KERN_ERR "%s: Populating the data for %s\n", __FUNCTION__, pdata->sysstatus_addr_attr.aname); + +#ifdef __STDC_LIB_EXT1__ + memset_s(&pdata->sysstatus_addr_attr, sizeof(pdata->sysstatus_addr_attr, 0, sizeof(pdata->sysstatus_addr_attr)); +#else + _memset(&pdata->sysstatus_addr_attr, 0, sizeof(pdata->sysstatus_addr_attr)); +#endif + + return count; +} + + + + +int __init sysstatus_data_init(void) +{ + struct kobject *device_kobj; + int ret = 0; + + + pddf_dbg(SYSSTATUS, "PDDF SYSSTATUS MODULE.. init\n"); + + device_kobj = get_device_i2c_kobj(); + if(!device_kobj) + return -ENOMEM; + + sysstatus_addr_kobj = kobject_create_and_add("sysstatus", device_kobj); + if(!sysstatus_addr_kobj) + return -ENOMEM; + + sysstatus_data_kobj = kobject_create_and_add("sysstatus_data", sysstatus_addr_kobj); + if(!sysstatus_data_kobj) + return -ENOMEM; + + + ret = sysfs_create_group(sysstatus_addr_kobj, &pddf_sysstatus_addr_group); + if (ret) + { + kobject_put(sysstatus_addr_kobj); + return ret; + } + + ret = sysfs_create_group(sysstatus_data_kobj, &pddf_sysstatus_data_group); + if (ret) + { + sysfs_remove_group(sysstatus_addr_kobj, &pddf_sysstatus_addr_group); + kobject_put(sysstatus_data_kobj); + kobject_put(sysstatus_addr_kobj); + return ret; + } + + + return ret; +} + +void __exit sysstatus_data_exit(void) +{ + pddf_dbg(SYSSTATUS, "PDDF SYSSTATUS MODULE.. exit\n"); + sysfs_remove_group(sysstatus_data_kobj, &pddf_sysstatus_data_group); + sysfs_remove_group(sysstatus_addr_kobj, &pddf_sysstatus_addr_group); + kobject_put(sysstatus_data_kobj); + kobject_put(sysstatus_addr_kobj); + pddf_dbg(SYSSTATUS, KERN_ERR "%s: Removed the kobjects for 'SYSSTATUS'\n",__FUNCTION__); + return; +} + +module_init(sysstatus_data_init); +module_exit(sysstatus_data_exit); + +MODULE_AUTHOR("Broadcom"); +MODULE_DESCRIPTION("SYSSTATUS platform data"); +MODULE_LICENSE("GPL"); diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s8901-54xc/modules/x86-64-ufispace-s8901-54xc-cpld.c b/platform/broadcom/sonic-platform-modules-ufispace/s8901-54xc/modules/x86-64-ufispace-s8901-54xc-cpld.c new file mode 100644 index 0000000000..daa5aa88c2 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ufispace/s8901-54xc/modules/x86-64-ufispace-s8901-54xc-cpld.c @@ -0,0 +1,1520 @@ +/* + * A i2c cpld driver for the ufispace_s8901_54xc + * + * Copyright (C) 2017-2022 UfiSpace Technology Corporation. + * Jason Tsai + * + * Based on ad7414.c + * Copyright 2006 Stefan Roese , DENX Software Engineering + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. + */ +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include "x86-64-ufispace-s8901-54xc-cpld.h" + +#ifdef DEBUG +#define DEBUG_PRINT(fmt, args...) \ + printk(KERN_INFO "%s:%s[%d]: " fmt "\r\n", \ + __FILE__, __func__, __LINE__, ##args) +#else +#define DEBUG_PRINT(fmt, args...) +#endif + +#define BSP_LOG_R(fmt, args...) \ + _bsp_log (LOG_READ, KERN_INFO "%s:%s[%d]: " fmt "\r\n", \ + __FILE__, __func__, __LINE__, ##args) +#define BSP_LOG_W(fmt, args...) \ + _bsp_log (LOG_WRITE, KERN_INFO "%s:%s[%d]: " fmt "\r\n", \ + __FILE__, __func__, __LINE__, ##args) + +#define I2C_READ_BYTE_DATA(ret, lock, i2c_client, reg) \ +{ \ + mutex_lock(lock); \ + ret = i2c_smbus_read_byte_data(i2c_client, reg); \ + mutex_unlock(lock); \ + BSP_LOG_R("cpld[%d], reg=0x%03x, reg_val=0x%02x", data->index, reg, ret); \ +} + +#define I2C_WRITE_BYTE_DATA(ret, lock, i2c_client, reg, val) \ +{ \ + mutex_lock(lock); \ + ret = i2c_smbus_write_byte_data(i2c_client, reg, val); \ + mutex_unlock(lock); \ + BSP_LOG_W("cpld[%d], reg=0x%03x, reg_val=0x%02x", data->index, reg, val); \ +} + +#define _SENSOR_DEVICE_ATTR_RO(_name, _func, _index) \ + SENSOR_DEVICE_ATTR(_name, S_IRUGO, read_##_func, NULL, _index) + +#define _SENSOR_DEVICE_ATTR_WO(_name, _func, _index) \ + SENSOR_DEVICE_ATTR(_name, S_IWUSR, NULL, write_##_func, _index) + +#define _SENSOR_DEVICE_ATTR_RW(_name, _func, _index) \ + SENSOR_DEVICE_ATTR(_name, S_IRUGO | S_IWUSR, read_##_func, write_##_func, _index) + +#define _DEVICE_ATTR(_name) \ + &sensor_dev_attr_##_name.dev_attr.attr + +#define I2C_RW_RETRY_COUNT 3 +#define I2C_RW_RETRY_INTERVAL 60 + +/* CPLD sysfs attributes index */ +enum cpld_sysfs_attributes { + //CPLD 1 + + CPLD_BOARD_ID_0, + CPLD_BOARD_ID_1, + CPLD_ID, + CPLD_CHIP, + CPLD_SKU_EXT, + + CPLD_MAJOR_VER, + CPLD_MINOR_VER, + CPLD_BUILD_VER, + CPLD_VERSION_H, + + CPLD_MAC_INTR, + CPLD_HWM_INTR, + CPLD_CPLD2_INTR, + CPLD_NTM_INTR, + CPLD_FAN_PSU_INTR, + CPLD_SFP_IOEXP_INTR, + CPLD_CPU_NMI_INTR, + CPLD_PTP_INTR, + CPLD_SYSTEM_INTR, + + CPLD_MAC_MASK, + CPLD_HWM_MASK, + CPLD_CPLD2_MASK, + CPLD_NTM_MASK, + CPLD_FAN_PSU_MASK, + CPLD_SFP_IOEXP_MASK, + CPLD_CPU_NMI_MASK, + CPLD_PTP_MASK, + CPLD_SYSTEM_MASK, + + CPLD_MAC_EVT, + CPLD_HWM_EVT, + CPLD_CPLD2_EVT, + CPLD_NTM_EVT, + CPLD_FAN_PSU_EVT, + CPLD_SFP_IOEXP_EVT, + CPLD_CPU_NMI_EVT, + CPLD_PTP_EVT, + + CPLD_EVT_CTRL, + + CPLD_MAC_RESET, + CPLD_SYSTEM_RESET, + CPLD_BMC_NTM_RESET, + CPLD_USB_RESET, + CPLD_I2C_MUX_RESET, + CPLD_I2C_MUX_RESET_2, + CPLD_MISC_RESET, + + CPLD_BRD_PRESENT, + CPLD_PSU_STATUS, + CPLD_SYSTEM_PWR, + CPLD_MAC_SYNCE, + CPLD_MAC_AVS, + CPLD_SYSTEM_STATUS, + CPLD_FAN_PRESENT, + CPLD_WATCHDOG, + CPLD_BOOT_SELECT, + CPLD_MUX_CTRL, + CPLD_MISC_CTRL_1, + CPLD_MISC_CTRL_2, + CPLD_TIMING_CTRL, + + CPLD_MAC_TEMP, + + CPLD_SYSTEM_LED_SYNC, + CPLD_SYSTEM_LED_SYS, + CPLD_SYSTEM_LED_FAN, + CPLD_SYSTEM_LED_PSU_0, + CPLD_SYSTEM_LED_PSU_1, + CPLD_SYSTEM_LED_ID, + + DBG_CPLD_MAC_INTR, + DBG_CPLD_HWM_INTR, + DBG_CPLD_CPLD2_INTR, + DBG_CPLD_NTM_INTR, + DBG_CPLD_FAN_PSU_INTR, + DBG_CPLD_SFP_IOEXP_INTR, + DBG_CPLD_PTP_INTR, + + //CPLD 2 + + //interrupt status + CPLD_SFP_INTR_PRESENT_0_7, + CPLD_SFP_INTR_PRESENT_8_15, + CPLD_SFP_INTR_PRESENT_16_23, + CPLD_SFP_INTR_PRESENT_24_31, + CPLD_SFP_INTR_PRESENT_32_39, + CPLD_SFP_INTR_PRESENT_40_47, + CPLD_QSFP_INTR_PRESENT_48_53, + CPLD_QSFP_INTR_PORT_48_53, + + //interrupt mask + CPLD_SFP_MASK_PRESENT_0_7, + CPLD_SFP_MASK_PRESENT_8_15, + CPLD_SFP_MASK_PRESENT_16_23, + CPLD_SFP_MASK_PRESENT_24_31, + CPLD_SFP_MASK_PRESENT_32_39, + CPLD_SFP_MASK_PRESENT_40_47, + CPLD_QSFP_MASK_PRESENT_48_53, + CPLD_QSFP_MASK_PORT_48_53, + + //interrupt event + CPLD_SFP_EVT_PRESENT_0_7, + CPLD_SFP_EVT_PRESENT_8_15, + CPLD_SFP_EVT_PRESENT_16_23, + CPLD_SFP_EVT_PRESENT_24_31, + CPLD_SFP_EVT_PRESENT_32_39, + CPLD_SFP_EVT_PRESENT_40_47, + CPLD_QSFP_EVT_PRESENT_48_53, + CPLD_QSFP_EVT_PORT_48_53, + + CPLD_SFP_INTR_RX_LOS_0_7, + CPLD_SFP_INTR_RX_LOS_8_15, + CPLD_SFP_INTR_RX_LOS_16_23, + CPLD_SFP_INTR_RX_LOS_24_31, + CPLD_SFP_INTR_RX_LOS_32_39, + CPLD_SFP_INTR_RX_LOS_40_47, + + CPLD_SFP_INTR_TX_FAULT_0_7, + CPLD_SFP_INTR_TX_FAULT_8_15, + CPLD_SFP_INTR_TX_FAULT_16_23, + CPLD_SFP_INTR_TX_FAULT_24_31, + CPLD_SFP_INTR_TX_FAULT_32_39, + CPLD_SFP_INTR_TX_FAULT_40_47, + + CPLD_SFP_MASK_RX_LOS_0_7, + CPLD_SFP_MASK_RX_LOS_8_15, + CPLD_SFP_MASK_RX_LOS_16_23, + CPLD_SFP_MASK_RX_LOS_24_31, + CPLD_SFP_MASK_RX_LOS_32_39, + CPLD_SFP_MASK_RX_LOS_40_47, + + CPLD_SFP_MASK_TX_FAULT_0_7, + CPLD_SFP_MASK_TX_FAULT_8_15, + CPLD_SFP_MASK_TX_FAULT_16_23, + CPLD_SFP_MASK_TX_FAULT_24_31, + CPLD_SFP_MASK_TX_FAULT_32_39, + CPLD_SFP_MASK_TX_FAULT_40_47, + + CPLD_SFP_EVT_RX_LOS_0_7, + CPLD_SFP_EVT_RX_LOS_8_15, + CPLD_SFP_EVT_RX_LOS_16_23, + CPLD_SFP_EVT_RX_LOS_24_31, + CPLD_SFP_EVT_RX_LOS_32_39, + CPLD_SFP_EVT_RX_LOS_40_47, + + CPLD_SFP_EVT_TX_FAULT_0_7, + CPLD_SFP_EVT_TX_FAULT_8_15, + CPLD_SFP_EVT_TX_FAULT_16_23, + CPLD_SFP_EVT_TX_FAULT_24_31, + CPLD_SFP_EVT_TX_FAULT_32_39, + CPLD_SFP_EVT_TX_FAULT_40_47, + + CPLD_SFP_TX_DISABLE_0_7, + CPLD_SFP_TX_DISABLE_8_15, + CPLD_SFP_TX_DISABLE_16_23, + CPLD_SFP_TX_DISABLE_24_31, + CPLD_SFP_TX_DISABLE_32_39, + CPLD_SFP_TX_DISABLE_40_47, + + CPLD_QSFP_RESET_48_53, + CPLD_QSFP_LPMODE_48_53, + + //debug interrupt status + DBG_CPLD_SFP_INTR_PRESENT_0_7, + DBG_CPLD_SFP_INTR_PRESENT_8_15, + DBG_CPLD_SFP_INTR_PRESENT_16_23, + DBG_CPLD_SFP_INTR_PRESENT_24_31, + DBG_CPLD_SFP_INTR_PRESENT_32_39, + DBG_CPLD_SFP_INTR_PRESENT_40_47, + DBG_CPLD_QSFP_INTR_PRESENT_48_53, + DBG_CPLD_QSFP_INTR_PORT_48_53, + + //debug interrupt mask + DBG_CPLD_SFP_INTR_RX_LOS_0_7, + DBG_CPLD_SFP_INTR_RX_LOS_8_15, + DBG_CPLD_SFP_INTR_RX_LOS_16_23, + DBG_CPLD_SFP_INTR_RX_LOS_24_31, + DBG_CPLD_SFP_INTR_RX_LOS_32_39, + DBG_CPLD_SFP_INTR_RX_LOS_40_47, + + DBG_CPLD_SFP_INTR_TX_FAULT_0_7, + DBG_CPLD_SFP_INTR_TX_FAULT_8_15, + DBG_CPLD_SFP_INTR_TX_FAULT_16_23, + DBG_CPLD_SFP_INTR_TX_FAULT_24_31, + DBG_CPLD_SFP_INTR_TX_FAULT_32_39, + DBG_CPLD_SFP_INTR_TX_FAULT_40_47, + + //BSP DEBUG + BSP_DEBUG +}; + +enum bsp_log_types { + LOG_NONE, + LOG_RW, + LOG_READ, + LOG_WRITE +}; + +enum bsp_log_ctrl { + LOG_DISABLE, + LOG_ENABLE +}; + +/* CPLD sysfs attributes hook functions */ +static ssize_t read_cpld_callback(struct device *dev, + struct device_attribute *da, char *buf); +static ssize_t write_cpld_callback(struct device *dev, + struct device_attribute *da, const char *buf, size_t count); +static u8 _read_cpld_reg(struct device *dev, u8 reg, u8 mask); +static ssize_t read_cpld_reg(struct device *dev, char *buf, u8 reg, u8 mask); +static ssize_t write_cpld_reg(struct device *dev, const char *buf, size_t count, u8 reg, u8 mask); +static ssize_t read_bsp(char *buf, char *str); +static ssize_t write_bsp(const char *buf, char *str, size_t str_len, size_t count); +static ssize_t read_bsp_callback(struct device *dev, + struct device_attribute *da, char *buf); +static ssize_t write_bsp_callback(struct device *dev, + struct device_attribute *da, const char *buf, size_t count); +static ssize_t read_cpld_version_h(struct device *dev, + struct device_attribute *da, + char *buf); + +static LIST_HEAD(cpld_client_list); /* client list for cpld */ +static struct mutex list_lock; /* mutex for client list */ + +struct cpld_client_node { + struct i2c_client *client; + struct list_head list; +}; + +struct cpld_data { + int index; /* CPLD index */ + struct mutex access_lock; /* mutex for cpld access */ + u8 access_reg; /* register to access */ +}; + +typedef struct sysfs_info_s +{ + u8 reg; + u8 mask; + u8 permission; +} sysfs_info_t; + +static sysfs_info_t sysfs_info[] = { + //CPLD 1 + + [CPLD_BOARD_ID_0] = {CPLD_BOARD_ID_0_REG, MASK_ALL, PERM_R}, + [CPLD_BOARD_ID_1] = {CPLD_BOARD_ID_1_REG, MASK_ALL, PERM_R}, + [CPLD_ID] = {CPLD_ID_REG, MASK_ALL, PERM_R}, + [CPLD_CHIP] = {CPLD_CHIP_REG, MASK_ALL, PERM_R}, + [CPLD_SKU_EXT] = {CPLD_SKU_EXT_REG, MASK_ALL, PERM_R}, + + [CPLD_MAJOR_VER] = {CPLD_VERSION_REG, MASK_CPLD_MAJOR_VER, PERM_R}, + [CPLD_MINOR_VER] = {CPLD_VERSION_REG, MASK_CPLD_MINOR_VER, PERM_R}, + [CPLD_BUILD_VER] = {CPLD_BUILD_REG, MASK_ALL, PERM_R}, + [CPLD_VERSION_H] = {CPLD_VERSION_REG, MASK_ALL, PERM_R}, + + [CPLD_MAC_INTR] = {CPLD_MAC_INTR_REG, MASK_ALL, PERM_R}, + [CPLD_HWM_INTR] = {CPLD_HWM_INTR_REG, MASK_ALL, PERM_R}, + [CPLD_CPLD2_INTR] = {CPLD_CPLD2_INTR_REG, MASK_ALL, PERM_R}, + [CPLD_NTM_INTR] = {CPLD_NTM_INTR_REG, MASK_ALL, PERM_R}, + [CPLD_FAN_PSU_INTR] = {CPLD_FAN_PSU_INTR_REG, MASK_ALL, PERM_R}, + [CPLD_SFP_IOEXP_INTR] = {CPLD_SFP_IOEXP_INTR_REG, MASK_ALL, PERM_R}, + [CPLD_CPU_NMI_INTR] = {CPLD_CPU_NMI_INTR_REG, MASK_ALL, PERM_R}, + [CPLD_PTP_INTR] = {CPLD_PTP_INTR_REG, MASK_ALL, PERM_R}, + [CPLD_SYSTEM_INTR] = {CPLD_SYSTEM_INTR_REG, MASK_ALL, PERM_R}, + + [CPLD_MAC_MASK] = {CPLD_MAC_MASK_REG, MASK_ALL, PERM_RW}, + [CPLD_HWM_MASK] = {CPLD_HWM_MASK_REG, MASK_ALL, PERM_RW}, + [CPLD_CPLD2_MASK] = {CPLD_CPLD2_MASK_REG, MASK_ALL, PERM_RW}, + [CPLD_NTM_MASK] = {CPLD_NTM_MASK_REG, MASK_ALL, PERM_RW}, + [CPLD_FAN_PSU_MASK] = {CPLD_FAN_PSU_MASK_REG, MASK_ALL, PERM_RW}, + [CPLD_SFP_IOEXP_MASK] = {CPLD_SFP_IOEXP_MASK_REG, MASK_ALL, PERM_RW}, + [CPLD_CPU_NMI_MASK] = {CPLD_CPU_NMI_MASK_REG, MASK_ALL, PERM_RW}, + [CPLD_PTP_MASK] = {CPLD_PTP_MASK_REG, MASK_ALL, PERM_RW}, + [CPLD_SYSTEM_MASK] = {CPLD_SYSTEM_MASK_REG, MASK_ALL, PERM_RW}, + + [CPLD_MAC_EVT] = {CPLD_MAC_EVT_REG, MASK_ALL, PERM_R}, + [CPLD_HWM_EVT] = {CPLD_HWM_EVT_REG, MASK_ALL, PERM_R}, + [CPLD_CPLD2_EVT] = {CPLD_CPLD2_EVT_REG, MASK_ALL, PERM_R}, + [CPLD_NTM_EVT] = {CPLD_NTM_EVT_REG, MASK_ALL, PERM_R}, + [CPLD_FAN_PSU_EVT] = {CPLD_FAN_PSU_EVT_REG, MASK_ALL, PERM_R}, + [CPLD_SFP_IOEXP_EVT] = {CPLD_SFP_IOEXP_EVT_REG, MASK_ALL, PERM_R}, + [CPLD_CPU_NMI_EVT] = {CPLD_CPU_NMI_EVT_REG, MASK_ALL, PERM_R}, + [CPLD_PTP_EVT] = {CPLD_PTP_EVT_REG, MASK_ALL, PERM_R}, + + [CPLD_EVT_CTRL] = {CPLD_EVT_CTRL_REG, MASK_ALL, PERM_RW}, + + [CPLD_MAC_RESET] = {CPLD_MAC_RESET_REG, MASK_ALL, PERM_RW}, + [CPLD_SYSTEM_RESET] = {CPLD_SYSTEM_RESET_REG, MASK_ALL, PERM_RW}, + [CPLD_BMC_NTM_RESET] = {CPLD_BMC_NTM_RESET_REG, MASK_ALL, PERM_RW}, + [CPLD_USB_RESET] = {CPLD_USB_RESET_REG, MASK_ALL, PERM_RW}, + [CPLD_I2C_MUX_RESET] = {CPLD_I2C_MUX_RESET_REG, MASK_ALL, PERM_RW}, + [CPLD_I2C_MUX_RESET_2] = {CPLD_I2C_MUX_RESET_2_REG, MASK_ALL, PERM_RW}, + [CPLD_MISC_RESET] = {CPLD_MISC_RESET_REG, MASK_ALL, PERM_RW}, + + [CPLD_BRD_PRESENT] = {CPLD_BRD_PRESENT_REG, MASK_ALL, PERM_R}, + [CPLD_PSU_STATUS] = {CPLD_PSU_STATUS_REG, MASK_ALL, PERM_R}, + [CPLD_SYSTEM_PWR] = {CPLD_SYSTEM_PWR_REG, MASK_ALL, PERM_R}, + [CPLD_MAC_SYNCE] = {CPLD_MAC_SYNCE_REG, MASK_ALL, PERM_R}, + [CPLD_MAC_AVS] = {CPLD_MAC_AVS_REG, MASK_ALL, PERM_R}, + [CPLD_SYSTEM_STATUS] = {CPLD_SYSTEM_STATUS_REG, MASK_ALL, PERM_R}, + [CPLD_FAN_PRESENT] = {CPLD_FAN_PRESENT_REG, MASK_ALL, PERM_R}, + [CPLD_WATCHDOG] = {CPLD_WATCHDOG_REG, MASK_ALL, PERM_RW}, + [CPLD_BOOT_SELECT] = {CPLD_BOOT_SELECT_REG, MASK_ALL, PERM_RW}, + [CPLD_MUX_CTRL] = {CPLD_MUX_CTRL_REG, MASK_ALL, PERM_RW}, + [CPLD_MISC_CTRL_1] = {CPLD_MISC_CTRL_1_REG, MASK_ALL, PERM_RW}, + [CPLD_MISC_CTRL_2] = {CPLD_MISC_CTRL_2_REG, MASK_ALL, PERM_RW}, + [CPLD_TIMING_CTRL] = {CPLD_TIMING_CTRL_REG, MASK_ALL, PERM_RW}, + + [CPLD_MAC_TEMP] = {CPLD_MAC_TEMP_REG, MASK_ALL, PERM_R}, + + [CPLD_SYSTEM_LED_SYNC] = {CPLD_SYSTEM_LED_SYNC_REG, CPLD_SYSTEM_LED_SYNC_MASK, PERM_RW}, + [CPLD_SYSTEM_LED_SYS] = {CPLD_SYSTEM_LED_SYS_REG, CPLD_SYSTEM_LED_SYS_MASK, PERM_RW}, + [CPLD_SYSTEM_LED_FAN] = {CPLD_SYSTEM_LED_FAN_REG, CPLD_SYSTEM_LED_FAN_MASK, PERM_RW}, + [CPLD_SYSTEM_LED_PSU_0] = {CPLD_SYSTEM_LED_PSU_REG, CPLD_SYSTEM_LED_PSU_0_MASK, PERM_RW}, + [CPLD_SYSTEM_LED_PSU_1] = {CPLD_SYSTEM_LED_PSU_REG, CPLD_SYSTEM_LED_PSU_1_MASK, PERM_RW}, + [CPLD_SYSTEM_LED_ID] = {CPLD_SYSTEM_LED_ID_REG, CPLD_SYSTEM_LED_ID_MASK, PERM_RW}, + + [DBG_CPLD_MAC_INTR] = {DBG_CPLD_MAC_INTR_REG, MASK_ALL, PERM_RW}, + [DBG_CPLD_HWM_INTR] = {DBG_CPLD_HWM_INTR_REG, MASK_ALL, PERM_RW}, + [DBG_CPLD_CPLD2_INTR] = {DBG_CPLD_CPLD2_INTR_REG, MASK_ALL, PERM_RW}, + [DBG_CPLD_NTM_INTR] = {DBG_CPLD_NTM_INTR_REG, MASK_ALL, PERM_RW}, + [DBG_CPLD_FAN_PSU_INTR] = {DBG_CPLD_FAN_PSU_INTR_REG, MASK_ALL, PERM_RW}, + [DBG_CPLD_SFP_IOEXP_INTR] = {DBG_CPLD_SFP_IOEXP_INTR_REG, MASK_ALL, PERM_RW}, + [DBG_CPLD_PTP_INTR] = {DBG_CPLD_PTP_INTR_REG, MASK_ALL, PERM_RW}, + + //CPLD 2 + + //interrupt status + [CPLD_SFP_INTR_PRESENT_0_7] = {CPLD_SFP_INTR_PRESENT_0_7_REG, MASK_ALL, PERM_R}, + [CPLD_SFP_INTR_PRESENT_8_15] = {CPLD_SFP_INTR_PRESENT_8_15_REG, MASK_ALL, PERM_R}, + [CPLD_SFP_INTR_PRESENT_16_23] = {CPLD_SFP_INTR_PRESENT_16_23_REG, MASK_ALL, PERM_R}, + [CPLD_SFP_INTR_PRESENT_24_31] = {CPLD_SFP_INTR_PRESENT_24_31_REG, MASK_ALL, PERM_R}, + [CPLD_SFP_INTR_PRESENT_32_39] = {CPLD_SFP_INTR_PRESENT_32_39_REG, MASK_ALL, PERM_R}, + [CPLD_SFP_INTR_PRESENT_40_47] = {CPLD_SFP_INTR_PRESENT_40_47_REG, MASK_ALL, PERM_R}, + [CPLD_QSFP_INTR_PRESENT_48_53] = {CPLD_QSFP_INTR_PRESENT_48_53_REG, MASK_ALL, PERM_R}, + [CPLD_QSFP_INTR_PORT_48_53] = {CPLD_QSFP_INTR_PORT_48_53_REG, MASK_ALL, PERM_R}, + + //interrupt mask + [CPLD_SFP_MASK_PRESENT_0_7] = {CPLD_SFP_MASK_PRESENT_0_7_REG, MASK_ALL, PERM_RW}, + [CPLD_SFP_MASK_PRESENT_8_15] = {CPLD_SFP_MASK_PRESENT_8_15_REG, MASK_ALL, PERM_RW}, + [CPLD_SFP_MASK_PRESENT_16_23] = {CPLD_SFP_MASK_PRESENT_16_23_REG, MASK_ALL, PERM_RW}, + [CPLD_SFP_MASK_PRESENT_24_31] = {CPLD_SFP_MASK_PRESENT_24_31_REG, MASK_ALL, PERM_RW}, + [CPLD_SFP_MASK_PRESENT_32_39] = {CPLD_SFP_MASK_PRESENT_32_39_REG, MASK_ALL, PERM_RW}, + [CPLD_SFP_MASK_PRESENT_40_47] = {CPLD_SFP_MASK_PRESENT_40_47_REG, MASK_ALL, PERM_RW}, + [CPLD_QSFP_MASK_PRESENT_48_53] = {CPLD_QSFP_MASK_PRESENT_48_53_REG, MASK_ALL, PERM_RW}, + [CPLD_QSFP_MASK_PORT_48_53] = {CPLD_QSFP_MASK_PORT_48_53_REG, MASK_ALL, PERM_RW}, + + //interrupt event + [CPLD_SFP_EVT_PRESENT_0_7] = {CPLD_SFP_EVT_PRESENT_0_7_REG, MASK_ALL, PERM_R}, + [CPLD_SFP_EVT_PRESENT_8_15] = {CPLD_SFP_EVT_PRESENT_8_15_REG, MASK_ALL, PERM_R}, + [CPLD_SFP_EVT_PRESENT_16_23] = {CPLD_SFP_EVT_PRESENT_16_23_REG, MASK_ALL, PERM_R}, + [CPLD_SFP_EVT_PRESENT_24_31] = {CPLD_SFP_EVT_PRESENT_24_31_REG, MASK_ALL, PERM_R}, + [CPLD_SFP_EVT_PRESENT_32_39] = {CPLD_SFP_EVT_PRESENT_32_39_REG, MASK_ALL, PERM_R}, + [CPLD_SFP_EVT_PRESENT_40_47] = {CPLD_SFP_EVT_PRESENT_40_47_REG, MASK_ALL, PERM_R}, + [CPLD_QSFP_EVT_PRESENT_48_53] = {CPLD_QSFP_EVT_PRESENT_48_53_REG, MASK_ALL, PERM_R}, + [CPLD_QSFP_EVT_PORT_48_53] = {CPLD_QSFP_EVT_PORT_48_53_REG, MASK_ALL, PERM_R}, + + [CPLD_SFP_INTR_RX_LOS_0_7] = {CPLD_SFP_INTR_RX_LOS_0_7_REG, MASK_ALL, PERM_R}, + [CPLD_SFP_INTR_RX_LOS_8_15] = {CPLD_SFP_INTR_RX_LOS_8_15_REG, MASK_ALL, PERM_R}, + [CPLD_SFP_INTR_RX_LOS_16_23] = {CPLD_SFP_INTR_RX_LOS_16_23_REG, MASK_ALL, PERM_R}, + [CPLD_SFP_INTR_RX_LOS_24_31] = {CPLD_SFP_INTR_RX_LOS_24_31_REG, MASK_ALL, PERM_R}, + [CPLD_SFP_INTR_RX_LOS_32_39] = {CPLD_SFP_INTR_RX_LOS_32_39_REG, MASK_ALL, PERM_R}, + [CPLD_SFP_INTR_RX_LOS_40_47] = {CPLD_SFP_INTR_RX_LOS_40_47_REG, MASK_ALL, PERM_R}, + + [CPLD_SFP_INTR_TX_FAULT_0_7] = {CPLD_SFP_INTR_TX_FAULT_0_7_REG, MASK_ALL, PERM_R}, + [CPLD_SFP_INTR_TX_FAULT_8_15] = {CPLD_SFP_INTR_TX_FAULT_8_15_REG, MASK_ALL, PERM_R}, + [CPLD_SFP_INTR_TX_FAULT_16_23] = {CPLD_SFP_INTR_TX_FAULT_16_23_REG, MASK_ALL, PERM_R}, + [CPLD_SFP_INTR_TX_FAULT_24_31] = {CPLD_SFP_INTR_TX_FAULT_24_31_REG, MASK_ALL, PERM_R}, + [CPLD_SFP_INTR_TX_FAULT_32_39] = {CPLD_SFP_INTR_TX_FAULT_32_39_REG, MASK_ALL, PERM_R}, + [CPLD_SFP_INTR_TX_FAULT_40_47] = {CPLD_SFP_INTR_TX_FAULT_40_47_REG, MASK_ALL, PERM_R}, + + [CPLD_SFP_MASK_RX_LOS_0_7] = {CPLD_SFP_MASK_RX_LOS_0_7_REG, MASK_ALL, PERM_RW}, + [CPLD_SFP_MASK_RX_LOS_8_15] = {CPLD_SFP_MASK_RX_LOS_8_15_REG, MASK_ALL, PERM_RW}, + [CPLD_SFP_MASK_RX_LOS_16_23] = {CPLD_SFP_MASK_RX_LOS_16_23_REG, MASK_ALL, PERM_RW}, + [CPLD_SFP_MASK_RX_LOS_24_31] = {CPLD_SFP_MASK_RX_LOS_24_31_REG, MASK_ALL, PERM_RW}, + [CPLD_SFP_MASK_RX_LOS_32_39] = {CPLD_SFP_MASK_RX_LOS_32_39_REG, MASK_ALL, PERM_RW}, + [CPLD_SFP_MASK_RX_LOS_40_47] = {CPLD_SFP_MASK_RX_LOS_40_47_REG, MASK_ALL, PERM_RW}, + + [CPLD_SFP_MASK_TX_FAULT_0_7] = {CPLD_SFP_MASK_TX_FAULT_0_7_REG, MASK_ALL, PERM_RW}, + [CPLD_SFP_MASK_TX_FAULT_8_15] = {CPLD_SFP_MASK_TX_FAULT_8_15_REG, MASK_ALL, PERM_RW}, + [CPLD_SFP_MASK_TX_FAULT_16_23] = {CPLD_SFP_MASK_TX_FAULT_16_23_REG, MASK_ALL, PERM_RW}, + [CPLD_SFP_MASK_TX_FAULT_24_31] = {CPLD_SFP_MASK_TX_FAULT_24_31_REG, MASK_ALL, PERM_RW}, + [CPLD_SFP_MASK_TX_FAULT_32_39] = {CPLD_SFP_MASK_TX_FAULT_32_39_REG, MASK_ALL, PERM_RW}, + [CPLD_SFP_MASK_TX_FAULT_40_47] = {CPLD_SFP_MASK_TX_FAULT_40_47_REG, MASK_ALL, PERM_RW}, + + [CPLD_SFP_EVT_RX_LOS_0_7] = {CPLD_SFP_EVT_RX_LOS_0_7_REG, MASK_ALL, PERM_R}, + [CPLD_SFP_EVT_RX_LOS_8_15] = {CPLD_SFP_EVT_RX_LOS_8_15_REG, MASK_ALL, PERM_R}, + [CPLD_SFP_EVT_RX_LOS_16_23] = {CPLD_SFP_EVT_RX_LOS_16_23_REG, MASK_ALL, PERM_R}, + [CPLD_SFP_EVT_RX_LOS_24_31] = {CPLD_SFP_EVT_RX_LOS_24_31_REG, MASK_ALL, PERM_R}, + [CPLD_SFP_EVT_RX_LOS_32_39] = {CPLD_SFP_EVT_RX_LOS_32_39_REG, MASK_ALL, PERM_R}, + [CPLD_SFP_EVT_RX_LOS_40_47] = {CPLD_SFP_EVT_RX_LOS_40_47_REG, MASK_ALL, PERM_R}, + + [CPLD_SFP_EVT_TX_FAULT_0_7] = {CPLD_SFP_EVT_TX_FAULT_0_7_REG, MASK_ALL, PERM_R}, + [CPLD_SFP_EVT_TX_FAULT_8_15] = {CPLD_SFP_EVT_TX_FAULT_8_15_REG, MASK_ALL, PERM_R}, + [CPLD_SFP_EVT_TX_FAULT_16_23] = {CPLD_SFP_EVT_TX_FAULT_16_23_REG, MASK_ALL, PERM_R}, + [CPLD_SFP_EVT_TX_FAULT_24_31] = {CPLD_SFP_EVT_TX_FAULT_24_31_REG, MASK_ALL, PERM_R}, + [CPLD_SFP_EVT_TX_FAULT_32_39] = {CPLD_SFP_EVT_TX_FAULT_32_39_REG, MASK_ALL, PERM_R}, + [CPLD_SFP_EVT_TX_FAULT_40_47] = {CPLD_SFP_EVT_TX_FAULT_40_47_REG, MASK_ALL, PERM_R}, + + [CPLD_SFP_TX_DISABLE_0_7] = {CPLD_SFP_TX_DISABLE_0_7_REG, MASK_ALL, PERM_RW}, + [CPLD_SFP_TX_DISABLE_8_15] = {CPLD_SFP_TX_DISABLE_8_15_REG, MASK_ALL, PERM_RW}, + [CPLD_SFP_TX_DISABLE_16_23] = {CPLD_SFP_TX_DISABLE_16_23_REG, MASK_ALL, PERM_RW}, + [CPLD_SFP_TX_DISABLE_24_31] = {CPLD_SFP_TX_DISABLE_24_31_REG, MASK_ALL, PERM_RW}, + [CPLD_SFP_TX_DISABLE_32_39] = {CPLD_SFP_TX_DISABLE_32_39_REG, MASK_ALL, PERM_RW}, + [CPLD_SFP_TX_DISABLE_40_47] = {CPLD_SFP_TX_DISABLE_40_47_REG, MASK_ALL, PERM_RW}, + + [CPLD_QSFP_RESET_48_53] = {CPLD_QSFP_RESET_48_53_REG, MASK_ALL, PERM_RW}, + [CPLD_QSFP_LPMODE_48_53] = {CPLD_QSFP_LPMODE_48_53_REG, MASK_ALL, PERM_RW}, + + //debug interrupt status + [DBG_CPLD_SFP_INTR_PRESENT_0_7] = {DBG_CPLD_SFP_INTR_PRESENT_0_7_REG, MASK_ALL, PERM_R}, + [DBG_CPLD_SFP_INTR_PRESENT_8_15] = {DBG_CPLD_SFP_INTR_PRESENT_8_15_REG, MASK_ALL, PERM_R}, + [DBG_CPLD_SFP_INTR_PRESENT_16_23] = {DBG_CPLD_SFP_INTR_PRESENT_16_23_REG, MASK_ALL, PERM_R}, + [DBG_CPLD_SFP_INTR_PRESENT_24_31] = {DBG_CPLD_SFP_INTR_PRESENT_24_31_REG, MASK_ALL, PERM_R}, + [DBG_CPLD_SFP_INTR_PRESENT_32_39] = {DBG_CPLD_SFP_INTR_PRESENT_32_39_REG, MASK_ALL, PERM_R}, + [DBG_CPLD_SFP_INTR_PRESENT_40_47] = {DBG_CPLD_SFP_INTR_PRESENT_40_47_REG, MASK_ALL, PERM_R}, + [DBG_CPLD_QSFP_INTR_PRESENT_48_53] = {DBG_CPLD_QSFP_INTR_PRESENT_48_53_REG, MASK_ALL, PERM_R}, + [DBG_CPLD_QSFP_INTR_PORT_48_53] = {DBG_CPLD_QSFP_INTR_PORT_48_53_REG, MASK_ALL, PERM_R}, + + //debug interrupt mask + [DBG_CPLD_SFP_INTR_RX_LOS_0_7] = {DBG_CPLD_SFP_INTR_RX_LOS_0_7_REG, MASK_ALL, PERM_R}, + [DBG_CPLD_SFP_INTR_RX_LOS_8_15] = {DBG_CPLD_SFP_INTR_RX_LOS_8_15_REG, MASK_ALL, PERM_R}, + [DBG_CPLD_SFP_INTR_RX_LOS_16_23] = {DBG_CPLD_SFP_INTR_RX_LOS_16_23_REG, MASK_ALL, PERM_R}, + [DBG_CPLD_SFP_INTR_RX_LOS_24_31] = {DBG_CPLD_SFP_INTR_RX_LOS_24_31_REG, MASK_ALL, PERM_R}, + [DBG_CPLD_SFP_INTR_RX_LOS_32_39] = {DBG_CPLD_SFP_INTR_RX_LOS_32_39_REG, MASK_ALL, PERM_R}, + [DBG_CPLD_SFP_INTR_RX_LOS_40_47] = {DBG_CPLD_SFP_INTR_RX_LOS_40_47_REG, MASK_ALL, PERM_R}, + + [DBG_CPLD_SFP_INTR_TX_FAULT_0_7] = {DBG_CPLD_SFP_INTR_TX_FAULT_0_7_REG, MASK_ALL, PERM_R}, + [DBG_CPLD_SFP_INTR_TX_FAULT_8_15] = {DBG_CPLD_SFP_INTR_TX_FAULT_8_15_REG, MASK_ALL, PERM_R}, + [DBG_CPLD_SFP_INTR_TX_FAULT_16_23] = {DBG_CPLD_SFP_INTR_TX_FAULT_16_23_REG, MASK_ALL, PERM_R}, + [DBG_CPLD_SFP_INTR_TX_FAULT_24_31] = {DBG_CPLD_SFP_INTR_TX_FAULT_24_31_REG, MASK_ALL, PERM_R}, + [DBG_CPLD_SFP_INTR_TX_FAULT_32_39] = {DBG_CPLD_SFP_INTR_TX_FAULT_32_39_REG, MASK_ALL, PERM_R}, + [DBG_CPLD_SFP_INTR_TX_FAULT_40_47] = {DBG_CPLD_SFP_INTR_TX_FAULT_40_47_REG, MASK_ALL, PERM_R}, +}; + +/* CPLD device id and data */ +static const struct i2c_device_id cpld_id[] = { + { "s8901_54xc_cpld1", cpld1 }, + { "s8901_54xc_cpld2", cpld2 }, + {} +}; + +char bsp_debug[2]="0"; +u8 enable_log_read=LOG_DISABLE; +u8 enable_log_write=LOG_DISABLE; + +/* Addresses scanned for cpld */ +static const unsigned short cpld_i2c_addr[] = { 0x30, 0x31, I2C_CLIENT_END }; + +/* define all support register access of cpld in attribute */ + +// CPLD common +static _SENSOR_DEVICE_ATTR_RO(cpld_board_id_0, cpld_callback, CPLD_BOARD_ID_0); +static _SENSOR_DEVICE_ATTR_RO(cpld_board_id_1, cpld_callback, CPLD_BOARD_ID_1); +static _SENSOR_DEVICE_ATTR_RO(cpld_id, cpld_callback, CPLD_ID); +static _SENSOR_DEVICE_ATTR_RO(cpld_chip, cpld_callback, CPLD_CHIP); +static _SENSOR_DEVICE_ATTR_RO(cpld_sku_ext, cpld_callback, CPLD_SKU_EXT); + +static _SENSOR_DEVICE_ATTR_RO(cpld_major_ver, cpld_callback, CPLD_MAJOR_VER); +static _SENSOR_DEVICE_ATTR_RO(cpld_minor_ver, cpld_callback, CPLD_MINOR_VER); +static _SENSOR_DEVICE_ATTR_RO(cpld_build_ver, cpld_callback, CPLD_BUILD_VER); +static _SENSOR_DEVICE_ATTR_RO(cpld_version_h, cpld_version_h, CPLD_VERSION_H); + +static _SENSOR_DEVICE_ATTR_RW(cpld_evt_ctrl, cpld_callback, CPLD_EVT_CTRL); + +//CPLD 1 +static _SENSOR_DEVICE_ATTR_RO(cpld_mac_intr, cpld_callback, CPLD_MAC_INTR); +static _SENSOR_DEVICE_ATTR_RO(cpld_hwm_intr, cpld_callback, CPLD_HWM_INTR); +static _SENSOR_DEVICE_ATTR_RO(cpld_cpld2_intr, cpld_callback, CPLD_CPLD2_INTR); +static _SENSOR_DEVICE_ATTR_RO(cpld_ntm_intr, cpld_callback, CPLD_NTM_INTR); +static _SENSOR_DEVICE_ATTR_RO(cpld_fan_psu_intr, cpld_callback, CPLD_FAN_PSU_INTR); +static _SENSOR_DEVICE_ATTR_RO(cpld_sfp_ioexp_intr, cpld_callback, CPLD_SFP_IOEXP_INTR); +static _SENSOR_DEVICE_ATTR_RO(cpld_cpu_nmi_intr, cpld_callback, CPLD_CPU_NMI_INTR); +static _SENSOR_DEVICE_ATTR_RO(cpld_ptp_intr, cpld_callback, CPLD_PTP_INTR); +static _SENSOR_DEVICE_ATTR_RO(cpld_system_intr, cpld_callback, CPLD_SYSTEM_INTR); + +static _SENSOR_DEVICE_ATTR_RW(cpld_mac_mask, cpld_callback, CPLD_MAC_MASK); +static _SENSOR_DEVICE_ATTR_RW(cpld_hwm_mask, cpld_callback, CPLD_HWM_MASK); +static _SENSOR_DEVICE_ATTR_RW(cpld_cpld2_mask, cpld_callback, CPLD_CPLD2_MASK); +static _SENSOR_DEVICE_ATTR_RW(cpld_ntm_mask, cpld_callback, CPLD_NTM_MASK); +static _SENSOR_DEVICE_ATTR_RW(cpld_fan_psu_mask, cpld_callback, CPLD_FAN_PSU_MASK); +static _SENSOR_DEVICE_ATTR_RW(cpld_sfp_ioexp_mask, cpld_callback, CPLD_SFP_IOEXP_MASK); +static _SENSOR_DEVICE_ATTR_RW(cpld_cpu_nmi_mask, cpld_callback, CPLD_CPU_NMI_MASK); +static _SENSOR_DEVICE_ATTR_RW(cpld_ptp_mask, cpld_callback, CPLD_PTP_MASK); +static _SENSOR_DEVICE_ATTR_RW(cpld_system_mask, cpld_callback, CPLD_SYSTEM_MASK); + +static _SENSOR_DEVICE_ATTR_RO(cpld_mac_evt, cpld_callback, CPLD_MAC_EVT); +static _SENSOR_DEVICE_ATTR_RO(cpld_hwm_evt, cpld_callback, CPLD_HWM_EVT); +static _SENSOR_DEVICE_ATTR_RO(cpld_cpld2_evt, cpld_callback, CPLD_CPLD2_EVT); +static _SENSOR_DEVICE_ATTR_RO(cpld_ntm_evt, cpld_callback, CPLD_NTM_EVT); +static _SENSOR_DEVICE_ATTR_RO(cpld_fan_psu_evt, cpld_callback, CPLD_FAN_PSU_EVT); +static _SENSOR_DEVICE_ATTR_RO(cpld_sfp_ioexp_evt, cpld_callback, CPLD_SFP_IOEXP_EVT); +static _SENSOR_DEVICE_ATTR_RO(cpld_cpu_nmi_evt, cpld_callback, CPLD_CPU_NMI_EVT); +static _SENSOR_DEVICE_ATTR_RO(cpld_ptp_evt, cpld_callback, CPLD_PTP_EVT); + +static _SENSOR_DEVICE_ATTR_RW(cpld_mac_reset, cpld_callback, CPLD_MAC_RESET); +static _SENSOR_DEVICE_ATTR_RW(cpld_system_reset, cpld_callback, CPLD_SYSTEM_RESET); +static _SENSOR_DEVICE_ATTR_RW(cpld_bmc_ntm_reset, cpld_callback, CPLD_BMC_NTM_RESET); +static _SENSOR_DEVICE_ATTR_RW(cpld_usb_reset, cpld_callback, CPLD_USB_RESET); +static _SENSOR_DEVICE_ATTR_RW(cpld_i2c_mux_reset, cpld_callback, CPLD_I2C_MUX_RESET); +static _SENSOR_DEVICE_ATTR_RW(cpld_i2c_mux_reset_2, cpld_callback, CPLD_I2C_MUX_RESET_2); +static _SENSOR_DEVICE_ATTR_RW(cpld_misc_reset, cpld_callback, CPLD_MISC_RESET); + +static _SENSOR_DEVICE_ATTR_RO(cpld_psu_status, cpld_callback, CPLD_PSU_STATUS); +static _SENSOR_DEVICE_ATTR_RO(cpld_mac_synce, cpld_callback, CPLD_MAC_SYNCE); +static _SENSOR_DEVICE_ATTR_RO(cpld_fan_present, cpld_callback, CPLD_FAN_PRESENT); +static _SENSOR_DEVICE_ATTR_RW(cpld_mux_ctrl, cpld_callback, CPLD_MUX_CTRL); + +static _SENSOR_DEVICE_ATTR_RW(cpld_system_led_sync, cpld_callback, CPLD_SYSTEM_LED_SYNC); +static _SENSOR_DEVICE_ATTR_RW(cpld_system_led_sys, cpld_callback, CPLD_SYSTEM_LED_SYS); +static _SENSOR_DEVICE_ATTR_RW(cpld_system_led_fan, cpld_callback, CPLD_SYSTEM_LED_FAN); +static _SENSOR_DEVICE_ATTR_RW(cpld_system_led_psu_0, cpld_callback, CPLD_SYSTEM_LED_PSU_0); +static _SENSOR_DEVICE_ATTR_RW(cpld_system_led_psu_1, cpld_callback, CPLD_SYSTEM_LED_PSU_1); +static _SENSOR_DEVICE_ATTR_RW(cpld_system_led_id, cpld_callback, CPLD_SYSTEM_LED_ID); + +static _SENSOR_DEVICE_ATTR_RW(dbg_cpld_mac_intr, cpld_callback, DBG_CPLD_MAC_INTR); +static _SENSOR_DEVICE_ATTR_RW(dbg_cpld_hwm_intr, cpld_callback, DBG_CPLD_HWM_INTR); +static _SENSOR_DEVICE_ATTR_RW(dbg_cpld_cpld2_intr, cpld_callback, DBG_CPLD_CPLD2_INTR); +static _SENSOR_DEVICE_ATTR_RW(dbg_cpld_ntm_intr, cpld_callback, DBG_CPLD_NTM_INTR); +static _SENSOR_DEVICE_ATTR_RW(dbg_cpld_fan_psu_intr, cpld_callback, DBG_CPLD_FAN_PSU_INTR); +static _SENSOR_DEVICE_ATTR_RW(dbg_cpld_sfp_ioexp_intr, cpld_callback, DBG_CPLD_SFP_IOEXP_INTR); +static _SENSOR_DEVICE_ATTR_RW(dbg_cpld_ptp_intr, cpld_callback, DBG_CPLD_PTP_INTR); + +//CPLD 2 +static _SENSOR_DEVICE_ATTR_RO(cpld_sfp_intr_present_0_7, cpld_callback, CPLD_SFP_INTR_PRESENT_0_7); +static _SENSOR_DEVICE_ATTR_RO(cpld_sfp_intr_present_8_15, cpld_callback, CPLD_SFP_INTR_PRESENT_8_15); +static _SENSOR_DEVICE_ATTR_RO(cpld_sfp_intr_present_16_23, cpld_callback, CPLD_SFP_INTR_PRESENT_16_23); +static _SENSOR_DEVICE_ATTR_RO(cpld_sfp_intr_present_24_31, cpld_callback, CPLD_SFP_INTR_PRESENT_24_31); +static _SENSOR_DEVICE_ATTR_RO(cpld_sfp_intr_present_32_39, cpld_callback, CPLD_SFP_INTR_PRESENT_32_39); +static _SENSOR_DEVICE_ATTR_RO(cpld_sfp_intr_present_40_47, cpld_callback, CPLD_SFP_INTR_PRESENT_40_47); + +static _SENSOR_DEVICE_ATTR_RO(cpld_qsfp_intr_present_48_53, cpld_callback, CPLD_QSFP_INTR_PRESENT_48_53); +static _SENSOR_DEVICE_ATTR_RO(cpld_qsfp_intr_port_48_53, cpld_callback, CPLD_QSFP_INTR_PORT_48_53); + +static _SENSOR_DEVICE_ATTR_RW(cpld_sfp_mask_present_0_7, cpld_callback, CPLD_SFP_MASK_PRESENT_0_7); +static _SENSOR_DEVICE_ATTR_RW(cpld_sfp_mask_present_8_15, cpld_callback, CPLD_SFP_MASK_PRESENT_8_15); +static _SENSOR_DEVICE_ATTR_RW(cpld_sfp_mask_present_16_23, cpld_callback, CPLD_SFP_MASK_PRESENT_16_23); +static _SENSOR_DEVICE_ATTR_RW(cpld_sfp_mask_present_24_31, cpld_callback, CPLD_SFP_MASK_PRESENT_24_31); +static _SENSOR_DEVICE_ATTR_RW(cpld_sfp_mask_present_32_39, cpld_callback, CPLD_SFP_MASK_PRESENT_32_39); +static _SENSOR_DEVICE_ATTR_RW(cpld_sfp_mask_present_40_47, cpld_callback, CPLD_SFP_MASK_PRESENT_40_47); + +static _SENSOR_DEVICE_ATTR_RW(cpld_qsfp_mask_present_48_53, cpld_callback, CPLD_QSFP_MASK_PRESENT_48_53); +static _SENSOR_DEVICE_ATTR_RW(cpld_qsfp_mask_port_48_53, cpld_callback, CPLD_QSFP_MASK_PORT_48_53); + +static _SENSOR_DEVICE_ATTR_RO(cpld_sfp_evt_present_0_7, cpld_callback, CPLD_SFP_EVT_PRESENT_0_7); +static _SENSOR_DEVICE_ATTR_RO(cpld_sfp_evt_present_8_15, cpld_callback, CPLD_SFP_EVT_PRESENT_8_15); +static _SENSOR_DEVICE_ATTR_RO(cpld_sfp_evt_present_16_23, cpld_callback, CPLD_SFP_EVT_PRESENT_16_23); +static _SENSOR_DEVICE_ATTR_RO(cpld_sfp_evt_present_24_31, cpld_callback, CPLD_SFP_EVT_PRESENT_24_31); +static _SENSOR_DEVICE_ATTR_RO(cpld_sfp_evt_present_32_39, cpld_callback, CPLD_SFP_EVT_PRESENT_32_39); +static _SENSOR_DEVICE_ATTR_RO(cpld_sfp_evt_present_40_47, cpld_callback, CPLD_SFP_EVT_PRESENT_40_47); + +static _SENSOR_DEVICE_ATTR_RO(cpld_qsfp_evt_present_48_53, cpld_callback, CPLD_QSFP_EVT_PRESENT_48_53); +static _SENSOR_DEVICE_ATTR_RO(cpld_qsfp_evt_port_48_53, cpld_callback, CPLD_QSFP_EVT_PORT_48_53); + +static _SENSOR_DEVICE_ATTR_RO(cpld_sfp_intr_rx_los_0_7, cpld_callback, CPLD_SFP_INTR_RX_LOS_0_7); +static _SENSOR_DEVICE_ATTR_RO(cpld_sfp_intr_rx_los_8_15, cpld_callback, CPLD_SFP_INTR_RX_LOS_8_15); +static _SENSOR_DEVICE_ATTR_RO(cpld_sfp_intr_rx_los_16_23, cpld_callback, CPLD_SFP_INTR_RX_LOS_16_23); +static _SENSOR_DEVICE_ATTR_RO(cpld_sfp_intr_rx_los_24_31, cpld_callback, CPLD_SFP_INTR_RX_LOS_24_31); +static _SENSOR_DEVICE_ATTR_RO(cpld_sfp_intr_rx_los_32_39, cpld_callback, CPLD_SFP_INTR_RX_LOS_32_39); +static _SENSOR_DEVICE_ATTR_RO(cpld_sfp_intr_rx_los_40_47, cpld_callback, CPLD_SFP_INTR_RX_LOS_40_47); + +static _SENSOR_DEVICE_ATTR_RO(cpld_sfp_intr_tx_fault_0_7, cpld_callback, CPLD_SFP_INTR_TX_FAULT_0_7); +static _SENSOR_DEVICE_ATTR_RO(cpld_sfp_intr_tx_fault_8_15, cpld_callback, CPLD_SFP_INTR_TX_FAULT_8_15); +static _SENSOR_DEVICE_ATTR_RO(cpld_sfp_intr_tx_fault_16_23, cpld_callback, CPLD_SFP_INTR_TX_FAULT_16_23); +static _SENSOR_DEVICE_ATTR_RO(cpld_sfp_intr_tx_fault_24_31, cpld_callback, CPLD_SFP_INTR_TX_FAULT_24_31); +static _SENSOR_DEVICE_ATTR_RO(cpld_sfp_intr_tx_fault_32_39, cpld_callback, CPLD_SFP_INTR_TX_FAULT_32_39); +static _SENSOR_DEVICE_ATTR_RO(cpld_sfp_intr_tx_fault_40_47, cpld_callback, CPLD_SFP_INTR_TX_FAULT_40_47); + +static _SENSOR_DEVICE_ATTR_RW(cpld_sfp_mask_rx_los_0_7, cpld_callback, CPLD_SFP_MASK_RX_LOS_0_7); +static _SENSOR_DEVICE_ATTR_RW(cpld_sfp_mask_rx_los_8_15, cpld_callback, CPLD_SFP_MASK_RX_LOS_8_15); +static _SENSOR_DEVICE_ATTR_RW(cpld_sfp_mask_rx_los_16_23, cpld_callback, CPLD_SFP_MASK_RX_LOS_16_23); +static _SENSOR_DEVICE_ATTR_RW(cpld_sfp_mask_rx_los_24_31, cpld_callback, CPLD_SFP_MASK_RX_LOS_24_31); +static _SENSOR_DEVICE_ATTR_RW(cpld_sfp_mask_rx_los_32_39, cpld_callback, CPLD_SFP_MASK_RX_LOS_32_39); +static _SENSOR_DEVICE_ATTR_RW(cpld_sfp_mask_rx_los_40_47, cpld_callback, CPLD_SFP_MASK_RX_LOS_40_47); + +static _SENSOR_DEVICE_ATTR_RW(cpld_sfp_mask_tx_fault_0_7, cpld_callback, CPLD_SFP_MASK_TX_FAULT_0_7); +static _SENSOR_DEVICE_ATTR_RW(cpld_sfp_mask_tx_fault_8_15, cpld_callback, CPLD_SFP_MASK_TX_FAULT_8_15); +static _SENSOR_DEVICE_ATTR_RW(cpld_sfp_mask_tx_fault_16_23, cpld_callback, CPLD_SFP_MASK_TX_FAULT_16_23); +static _SENSOR_DEVICE_ATTR_RW(cpld_sfp_mask_tx_fault_24_31, cpld_callback, CPLD_SFP_MASK_TX_FAULT_24_31); +static _SENSOR_DEVICE_ATTR_RW(cpld_sfp_mask_tx_fault_32_39, cpld_callback, CPLD_SFP_MASK_TX_FAULT_32_39); +static _SENSOR_DEVICE_ATTR_RW(cpld_sfp_mask_tx_fault_40_47, cpld_callback, CPLD_SFP_MASK_TX_FAULT_40_47); + +static _SENSOR_DEVICE_ATTR_RO(cpld_sfp_evt_rx_los_0_7, cpld_callback, CPLD_SFP_EVT_RX_LOS_0_7); +static _SENSOR_DEVICE_ATTR_RO(cpld_sfp_evt_rx_los_8_15, cpld_callback, CPLD_SFP_EVT_RX_LOS_8_15); +static _SENSOR_DEVICE_ATTR_RO(cpld_sfp_evt_rx_los_16_23, cpld_callback, CPLD_SFP_EVT_RX_LOS_16_23); +static _SENSOR_DEVICE_ATTR_RO(cpld_sfp_evt_rx_los_24_31, cpld_callback, CPLD_SFP_EVT_RX_LOS_24_31); +static _SENSOR_DEVICE_ATTR_RO(cpld_sfp_evt_rx_los_32_39, cpld_callback, CPLD_SFP_EVT_RX_LOS_32_39); +static _SENSOR_DEVICE_ATTR_RO(cpld_sfp_evt_rx_los_40_47, cpld_callback, CPLD_SFP_EVT_RX_LOS_40_47); + +static _SENSOR_DEVICE_ATTR_RO(cpld_sfp_evt_tx_fault_0_7, cpld_callback, CPLD_SFP_EVT_TX_FAULT_0_7); +static _SENSOR_DEVICE_ATTR_RO(cpld_sfp_evt_tx_fault_8_15, cpld_callback, CPLD_SFP_EVT_TX_FAULT_8_15); +static _SENSOR_DEVICE_ATTR_RO(cpld_sfp_evt_tx_fault_16_23, cpld_callback, CPLD_SFP_EVT_TX_FAULT_16_23); +static _SENSOR_DEVICE_ATTR_RO(cpld_sfp_evt_tx_fault_24_31, cpld_callback, CPLD_SFP_EVT_TX_FAULT_24_31); +static _SENSOR_DEVICE_ATTR_RO(cpld_sfp_evt_tx_fault_32_39, cpld_callback, CPLD_SFP_EVT_TX_FAULT_32_39); +static _SENSOR_DEVICE_ATTR_RO(cpld_sfp_evt_tx_fault_40_47, cpld_callback, CPLD_SFP_EVT_TX_FAULT_40_47); + +static _SENSOR_DEVICE_ATTR_RW(cpld_sfp_tx_disable_0_7, cpld_callback, CPLD_SFP_TX_DISABLE_0_7); +static _SENSOR_DEVICE_ATTR_RW(cpld_sfp_tx_disable_8_15, cpld_callback, CPLD_SFP_TX_DISABLE_8_15); +static _SENSOR_DEVICE_ATTR_RW(cpld_sfp_tx_disable_16_23, cpld_callback, CPLD_SFP_TX_DISABLE_16_23); +static _SENSOR_DEVICE_ATTR_RW(cpld_sfp_tx_disable_24_31, cpld_callback, CPLD_SFP_TX_DISABLE_24_31); +static _SENSOR_DEVICE_ATTR_RW(cpld_sfp_tx_disable_32_39, cpld_callback, CPLD_SFP_TX_DISABLE_32_39); +static _SENSOR_DEVICE_ATTR_RW(cpld_sfp_tx_disable_40_47, cpld_callback, CPLD_SFP_TX_DISABLE_40_47); + +static _SENSOR_DEVICE_ATTR_RW(cpld_qsfp_reset_48_53, cpld_callback, CPLD_QSFP_RESET_48_53); +static _SENSOR_DEVICE_ATTR_RW(cpld_qsfp_lpmode_48_53, cpld_callback, CPLD_QSFP_LPMODE_48_53); + +static _SENSOR_DEVICE_ATTR_RW(dbg_cpld_sfp_intr_present_0_7, cpld_callback, DBG_CPLD_SFP_INTR_PRESENT_0_7); +static _SENSOR_DEVICE_ATTR_RW(dbg_cpld_sfp_intr_present_8_15, cpld_callback, DBG_CPLD_SFP_INTR_PRESENT_8_15); +static _SENSOR_DEVICE_ATTR_RW(dbg_cpld_sfp_intr_present_16_23, cpld_callback, DBG_CPLD_SFP_INTR_PRESENT_16_23); +static _SENSOR_DEVICE_ATTR_RW(dbg_cpld_sfp_intr_present_24_31, cpld_callback, DBG_CPLD_SFP_INTR_PRESENT_24_31); +static _SENSOR_DEVICE_ATTR_RW(dbg_cpld_sfp_intr_present_32_39, cpld_callback, DBG_CPLD_SFP_INTR_PRESENT_32_39); +static _SENSOR_DEVICE_ATTR_RW(dbg_cpld_sfp_intr_present_40_47, cpld_callback, DBG_CPLD_SFP_INTR_PRESENT_40_47); + +static _SENSOR_DEVICE_ATTR_RW(dbg_cpld_qsfp_intr_present_48_53, cpld_callback, DBG_CPLD_QSFP_INTR_PRESENT_48_53); +static _SENSOR_DEVICE_ATTR_RW(dbg_cpld_qsfp_intr_port_48_53, cpld_callback, DBG_CPLD_QSFP_INTR_PORT_48_53); + +static _SENSOR_DEVICE_ATTR_RW(dbg_cpld_sfp_intr_rx_los_0_7, cpld_callback, DBG_CPLD_SFP_INTR_RX_LOS_0_7); +static _SENSOR_DEVICE_ATTR_RW(dbg_cpld_sfp_intr_rx_los_8_15, cpld_callback, DBG_CPLD_SFP_INTR_RX_LOS_8_15); +static _SENSOR_DEVICE_ATTR_RW(dbg_cpld_sfp_intr_rx_los_16_23, cpld_callback, DBG_CPLD_SFP_INTR_RX_LOS_16_23); +static _SENSOR_DEVICE_ATTR_RW(dbg_cpld_sfp_intr_rx_los_24_31, cpld_callback, DBG_CPLD_SFP_INTR_RX_LOS_24_31); +static _SENSOR_DEVICE_ATTR_RW(dbg_cpld_sfp_intr_rx_los_32_39, cpld_callback, DBG_CPLD_SFP_INTR_RX_LOS_32_39); +static _SENSOR_DEVICE_ATTR_RW(dbg_cpld_sfp_intr_rx_los_40_47, cpld_callback, DBG_CPLD_SFP_INTR_RX_LOS_40_47); + +static _SENSOR_DEVICE_ATTR_RW(dbg_cpld_sfp_intr_tx_fault_0_7, cpld_callback, DBG_CPLD_SFP_INTR_TX_FAULT_0_7); +static _SENSOR_DEVICE_ATTR_RW(dbg_cpld_sfp_intr_tx_fault_8_15, cpld_callback, DBG_CPLD_SFP_INTR_TX_FAULT_8_15); +static _SENSOR_DEVICE_ATTR_RW(dbg_cpld_sfp_intr_tx_fault_16_23, cpld_callback, DBG_CPLD_SFP_INTR_TX_FAULT_16_23); +static _SENSOR_DEVICE_ATTR_RW(dbg_cpld_sfp_intr_tx_fault_24_31, cpld_callback, DBG_CPLD_SFP_INTR_TX_FAULT_24_31); +static _SENSOR_DEVICE_ATTR_RW(dbg_cpld_sfp_intr_tx_fault_32_39, cpld_callback, DBG_CPLD_SFP_INTR_TX_FAULT_32_39); +static _SENSOR_DEVICE_ATTR_RW(dbg_cpld_sfp_intr_tx_fault_40_47, cpld_callback, DBG_CPLD_SFP_INTR_TX_FAULT_40_47); + +//BSP DEBUG +static _SENSOR_DEVICE_ATTR_RW(bsp_debug, bsp_callback, BSP_DEBUG); + +/* define support attributes of cpldx */ + +/* cpld 1 */ +static struct attribute *cpld1_attributes[] = { + _DEVICE_ATTR(cpld_board_id_0), + _DEVICE_ATTR(cpld_board_id_1), + + _DEVICE_ATTR(cpld_id), + _DEVICE_ATTR(cpld_chip), + _DEVICE_ATTR(cpld_sku_ext), + + _DEVICE_ATTR(cpld_major_ver), + _DEVICE_ATTR(cpld_minor_ver), + _DEVICE_ATTR(cpld_build_ver), + _DEVICE_ATTR(cpld_version_h), + + _DEVICE_ATTR(cpld_mac_intr), + _DEVICE_ATTR(cpld_hwm_intr), + _DEVICE_ATTR(cpld_cpld2_intr), + _DEVICE_ATTR(cpld_ntm_intr), + _DEVICE_ATTR(cpld_fan_psu_intr), + _DEVICE_ATTR(cpld_sfp_ioexp_intr), + _DEVICE_ATTR(cpld_cpu_nmi_intr), + _DEVICE_ATTR(cpld_ptp_intr), + _DEVICE_ATTR(cpld_system_intr), + + _DEVICE_ATTR(cpld_mac_mask), + _DEVICE_ATTR(cpld_hwm_mask), + _DEVICE_ATTR(cpld_cpld2_mask), + _DEVICE_ATTR(cpld_ntm_mask), + _DEVICE_ATTR(cpld_fan_psu_mask), + _DEVICE_ATTR(cpld_sfp_ioexp_mask), + _DEVICE_ATTR(cpld_cpu_nmi_mask), + _DEVICE_ATTR(cpld_ptp_mask), + _DEVICE_ATTR(cpld_system_mask), + + _DEVICE_ATTR(cpld_mac_evt), + _DEVICE_ATTR(cpld_hwm_evt), + _DEVICE_ATTR(cpld_cpld2_evt), + _DEVICE_ATTR(cpld_ntm_evt), + _DEVICE_ATTR(cpld_fan_psu_evt), + _DEVICE_ATTR(cpld_sfp_ioexp_evt), + _DEVICE_ATTR(cpld_cpu_nmi_evt), + _DEVICE_ATTR(cpld_ptp_evt), + + _DEVICE_ATTR(cpld_evt_ctrl), + + _DEVICE_ATTR(cpld_mac_reset), + _DEVICE_ATTR(cpld_system_reset), + _DEVICE_ATTR(cpld_bmc_ntm_reset), + _DEVICE_ATTR(cpld_usb_reset), + _DEVICE_ATTR(cpld_i2c_mux_reset), + _DEVICE_ATTR(cpld_i2c_mux_reset_2), + _DEVICE_ATTR(cpld_misc_reset), + + _DEVICE_ATTR(cpld_psu_status), + _DEVICE_ATTR(cpld_mac_synce), + _DEVICE_ATTR(cpld_fan_present), + _DEVICE_ATTR(cpld_mux_ctrl), + + _DEVICE_ATTR(cpld_system_led_sync), + _DEVICE_ATTR(cpld_system_led_sys), + _DEVICE_ATTR(cpld_system_led_fan), + _DEVICE_ATTR(cpld_system_led_psu_0), + _DEVICE_ATTR(cpld_system_led_psu_1), + _DEVICE_ATTR(cpld_system_led_id), + + _DEVICE_ATTR(dbg_cpld_mac_intr), + _DEVICE_ATTR(dbg_cpld_hwm_intr), + _DEVICE_ATTR(dbg_cpld_cpld2_intr), + _DEVICE_ATTR(dbg_cpld_ntm_intr), + _DEVICE_ATTR(dbg_cpld_fan_psu_intr), + _DEVICE_ATTR(dbg_cpld_sfp_ioexp_intr), + _DEVICE_ATTR(dbg_cpld_ptp_intr), + + _DEVICE_ATTR(bsp_debug), + + NULL +}; + +/* cpld 2 */ +static struct attribute *cpld2_attributes[] = { + _DEVICE_ATTR(cpld_id), + _DEVICE_ATTR(cpld_chip), + + _DEVICE_ATTR(cpld_major_ver), + _DEVICE_ATTR(cpld_minor_ver), + _DEVICE_ATTR(cpld_build_ver), + _DEVICE_ATTR(cpld_version_h), + + _DEVICE_ATTR(cpld_sfp_intr_present_0_7), + _DEVICE_ATTR(cpld_sfp_intr_present_8_15), + _DEVICE_ATTR(cpld_sfp_intr_present_16_23), + _DEVICE_ATTR(cpld_sfp_intr_present_24_31), + _DEVICE_ATTR(cpld_sfp_intr_present_32_39), + _DEVICE_ATTR(cpld_sfp_intr_present_40_47), + + _DEVICE_ATTR(cpld_qsfp_intr_present_48_53), + _DEVICE_ATTR(cpld_qsfp_intr_port_48_53), + + _DEVICE_ATTR(cpld_sfp_mask_present_0_7), + _DEVICE_ATTR(cpld_sfp_mask_present_8_15), + _DEVICE_ATTR(cpld_sfp_mask_present_16_23), + _DEVICE_ATTR(cpld_sfp_mask_present_24_31), + _DEVICE_ATTR(cpld_sfp_mask_present_32_39), + _DEVICE_ATTR(cpld_sfp_mask_present_40_47), + + _DEVICE_ATTR(cpld_qsfp_mask_present_48_53), + _DEVICE_ATTR(cpld_qsfp_mask_port_48_53), + + _DEVICE_ATTR(cpld_sfp_evt_present_0_7), + _DEVICE_ATTR(cpld_sfp_evt_present_8_15), + _DEVICE_ATTR(cpld_sfp_evt_present_16_23), + _DEVICE_ATTR(cpld_sfp_evt_present_24_31), + _DEVICE_ATTR(cpld_sfp_evt_present_32_39), + _DEVICE_ATTR(cpld_sfp_evt_present_40_47), + + _DEVICE_ATTR(cpld_qsfp_evt_present_48_53), + _DEVICE_ATTR(cpld_qsfp_evt_port_48_53), + + _DEVICE_ATTR(cpld_evt_ctrl), + + _DEVICE_ATTR(cpld_sfp_intr_rx_los_0_7), + _DEVICE_ATTR(cpld_sfp_intr_rx_los_8_15), + _DEVICE_ATTR(cpld_sfp_intr_rx_los_16_23), + _DEVICE_ATTR(cpld_sfp_intr_rx_los_24_31), + _DEVICE_ATTR(cpld_sfp_intr_rx_los_32_39), + _DEVICE_ATTR(cpld_sfp_intr_rx_los_40_47), + + _DEVICE_ATTR(cpld_sfp_intr_tx_fault_0_7), + _DEVICE_ATTR(cpld_sfp_intr_tx_fault_8_15), + _DEVICE_ATTR(cpld_sfp_intr_tx_fault_16_23), + _DEVICE_ATTR(cpld_sfp_intr_tx_fault_24_31), + _DEVICE_ATTR(cpld_sfp_intr_tx_fault_32_39), + _DEVICE_ATTR(cpld_sfp_intr_tx_fault_40_47), + + _DEVICE_ATTR(cpld_sfp_mask_rx_los_0_7), + _DEVICE_ATTR(cpld_sfp_mask_rx_los_8_15), + _DEVICE_ATTR(cpld_sfp_mask_rx_los_16_23), + _DEVICE_ATTR(cpld_sfp_mask_rx_los_24_31), + _DEVICE_ATTR(cpld_sfp_mask_rx_los_32_39), + _DEVICE_ATTR(cpld_sfp_mask_rx_los_40_47), + + _DEVICE_ATTR(cpld_sfp_mask_tx_fault_0_7), + _DEVICE_ATTR(cpld_sfp_mask_tx_fault_8_15), + _DEVICE_ATTR(cpld_sfp_mask_tx_fault_16_23), + _DEVICE_ATTR(cpld_sfp_mask_tx_fault_24_31), + _DEVICE_ATTR(cpld_sfp_mask_tx_fault_32_39), + _DEVICE_ATTR(cpld_sfp_mask_tx_fault_40_47), + + _DEVICE_ATTR(cpld_sfp_evt_rx_los_0_7), + _DEVICE_ATTR(cpld_sfp_evt_rx_los_8_15), + _DEVICE_ATTR(cpld_sfp_evt_rx_los_16_23), + _DEVICE_ATTR(cpld_sfp_evt_rx_los_24_31), + _DEVICE_ATTR(cpld_sfp_evt_rx_los_32_39), + _DEVICE_ATTR(cpld_sfp_evt_rx_los_40_47), + + _DEVICE_ATTR(cpld_sfp_evt_tx_fault_0_7), + _DEVICE_ATTR(cpld_sfp_evt_tx_fault_8_15), + _DEVICE_ATTR(cpld_sfp_evt_tx_fault_16_23), + _DEVICE_ATTR(cpld_sfp_evt_tx_fault_24_31), + _DEVICE_ATTR(cpld_sfp_evt_tx_fault_32_39), + _DEVICE_ATTR(cpld_sfp_evt_tx_fault_40_47), + + _DEVICE_ATTR(cpld_sfp_tx_disable_0_7), + _DEVICE_ATTR(cpld_sfp_tx_disable_8_15), + _DEVICE_ATTR(cpld_sfp_tx_disable_16_23), + _DEVICE_ATTR(cpld_sfp_tx_disable_24_31), + _DEVICE_ATTR(cpld_sfp_tx_disable_32_39), + _DEVICE_ATTR(cpld_sfp_tx_disable_40_47), + + _DEVICE_ATTR(cpld_qsfp_reset_48_53), + _DEVICE_ATTR(cpld_qsfp_lpmode_48_53), + + _DEVICE_ATTR(dbg_cpld_sfp_intr_present_0_7), + _DEVICE_ATTR(dbg_cpld_sfp_intr_present_8_15), + _DEVICE_ATTR(dbg_cpld_sfp_intr_present_16_23), + _DEVICE_ATTR(dbg_cpld_sfp_intr_present_24_31), + _DEVICE_ATTR(dbg_cpld_sfp_intr_present_32_39), + _DEVICE_ATTR(dbg_cpld_sfp_intr_present_40_47), + + _DEVICE_ATTR(dbg_cpld_qsfp_intr_present_48_53), + _DEVICE_ATTR(dbg_cpld_qsfp_intr_port_48_53), + + _DEVICE_ATTR(dbg_cpld_sfp_intr_rx_los_0_7), + _DEVICE_ATTR(dbg_cpld_sfp_intr_rx_los_8_15), + _DEVICE_ATTR(dbg_cpld_sfp_intr_rx_los_16_23), + _DEVICE_ATTR(dbg_cpld_sfp_intr_rx_los_24_31), + _DEVICE_ATTR(dbg_cpld_sfp_intr_rx_los_32_39), + _DEVICE_ATTR(dbg_cpld_sfp_intr_rx_los_40_47), + + _DEVICE_ATTR(dbg_cpld_sfp_intr_tx_fault_0_7), + _DEVICE_ATTR(dbg_cpld_sfp_intr_tx_fault_8_15), + _DEVICE_ATTR(dbg_cpld_sfp_intr_tx_fault_16_23), + _DEVICE_ATTR(dbg_cpld_sfp_intr_tx_fault_24_31), + _DEVICE_ATTR(dbg_cpld_sfp_intr_tx_fault_32_39), + _DEVICE_ATTR(dbg_cpld_sfp_intr_tx_fault_40_47), + + NULL +}; + +/* cpld 1 attributes group */ +static const struct attribute_group cpld1_group = { + .attrs = cpld1_attributes, +}; + +/* cpld 2 attributes group */ +static const struct attribute_group cpld2_group = { + .attrs = cpld2_attributes, +}; + +/* reg shift */ +static u8 _shift(u8 mask) +{ + int i=0, mask_one=1; + + for(i=0; i<8; ++i) { + if ((mask & mask_one) == 1) + return i; + else + mask >>= 1; + } + + return -1; +} + +/* reg mask and shift */ +static u8 _mask_shift(u8 val, u8 mask) +{ + int shift=0; + + shift = _shift(mask); + + return (val & mask) >> shift; +} + +static int _bsp_log(u8 log_type, char *fmt, ...) +{ + if ((log_type==LOG_READ && enable_log_read) || + (log_type==LOG_WRITE && enable_log_write)) { + va_list args; + int r; + + va_start(args, fmt); + r = vprintk(fmt, args); + va_end(args); + + return r; + } else { + return 0; + } +} + +static int _config_bsp_log(u8 log_type) +{ + switch(log_type) { + case LOG_NONE: + enable_log_read = LOG_DISABLE; + enable_log_write = LOG_DISABLE; + break; + case LOG_RW: + enable_log_read = LOG_ENABLE; + enable_log_write = LOG_ENABLE; + break; + case LOG_READ: + enable_log_read = LOG_ENABLE; + enable_log_write = LOG_DISABLE; + break; + case LOG_WRITE: + enable_log_read = LOG_DISABLE; + enable_log_write = LOG_ENABLE; + break; + default: + return -EINVAL; + } + return 0; +} + +/* get bsp value */ +static ssize_t read_bsp(char *buf, char *str) +{ + ssize_t len=0; + + len=sprintf(buf, "%s", str); + BSP_LOG_R("reg_val=%s", str); + + return len; +} + +/* set bsp value */ +static ssize_t write_bsp(const char *buf, char *str, size_t str_len, size_t count) +{ + snprintf(str, str_len, "%s", buf); + BSP_LOG_W("reg_val=%s", str); + + return count; +} + +/* get bsp parameter value */ +static ssize_t read_bsp_callback(struct device *dev, + struct device_attribute *da, char *buf) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + int str_len=0; + char *str=NULL; + + switch (attr->index) { + case BSP_DEBUG: + str = bsp_debug; + str_len = sizeof(bsp_debug); + break; + default: + return -EINVAL; + } + return read_bsp(buf, str); +} + +/* set bsp parameter value */ +static ssize_t write_bsp_callback(struct device *dev, + struct device_attribute *da, const char *buf, size_t count) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + int str_len=0; + char *str=NULL; + ssize_t ret = 0; + u8 bsp_debug_u8 = 0; + + switch (attr->index) { + case BSP_DEBUG: + str = bsp_debug; + str_len = sizeof(str); + ret = write_bsp(buf, str, str_len, count); + + if (kstrtou8(buf, 0, &bsp_debug_u8) < 0) { + return -EINVAL; + } else if (_config_bsp_log(bsp_debug_u8) < 0) { + return -EINVAL; + } + return ret; + default: + return -EINVAL; + } + return 0; +} + +/* get cpld register value */ +static ssize_t read_cpld_callback(struct device *dev, + struct device_attribute *da, char *buf) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + u8 reg = 0; + u8 mask = MASK_ALL; + + if (IS_PERM_R(sysfs_info[attr->index].permission)) { + reg = sysfs_info[attr->index].reg; + mask = sysfs_info[attr->index].mask; + } else { + dev_err(dev, "%s() error, attr->index=%d\n", __func__, attr->index); + return -EINVAL; + } + + return read_cpld_reg(dev, buf, reg, mask); +} + +/* set cpld register value */ +static ssize_t write_cpld_callback(struct device *dev, + struct device_attribute *da, const char *buf, size_t count) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + u8 reg = 0; + u8 mask = MASK_ALL; + + if (IS_PERM_W(sysfs_info[attr->index].permission)) { + reg = sysfs_info[attr->index].reg; + mask = sysfs_info[attr->index].mask; + } else { + dev_err(dev, "%s() error, attr->index=%d\n", __func__, attr->index); + return -EINVAL; + } + + return write_cpld_reg(dev, buf, count, reg, mask); +} + +/* get cpld register value */ +static u8 _read_cpld_reg(struct device *dev, + u8 reg, + u8 mask) +{ + struct i2c_client *client = to_i2c_client(dev); + struct cpld_data *data = i2c_get_clientdata(client); + int reg_val; + + I2C_READ_BYTE_DATA(reg_val, &data->access_lock, client, reg); + + if (unlikely(reg_val < 0)) { + return reg_val; + } else { + reg_val=_mask_shift(reg_val, mask); + return reg_val; + } +} + +/* get cpld register value */ +static ssize_t read_cpld_reg(struct device *dev, + char *buf, + u8 reg, + u8 mask) +{ + int reg_val; + + reg_val = _read_cpld_reg(dev, reg, mask); + if (unlikely(reg_val < 0)) { + dev_err(dev, "read_cpld_reg() error, reg_val=%d\n", reg_val); + return reg_val; + } else { + return sprintf(buf, "0x%02x\n", reg_val); + } +} + +/* set cpld register value */ +static ssize_t write_cpld_reg(struct device *dev, + const char *buf, + size_t count, + u8 reg, + u8 mask) +{ + struct i2c_client *client = to_i2c_client(dev); + struct cpld_data *data = i2c_get_clientdata(client); + u8 reg_val, reg_val_now, shift; + int ret = 0; + + if (kstrtou8(buf, 0, ®_val) < 0) + return -EINVAL; + + //apply continuous bits operation if mask is specified, discontinuous bits are not supported + if (mask != MASK_ALL) { + reg_val_now = _read_cpld_reg(dev, reg, MASK_ALL); + if (unlikely(reg_val_now < 0)) { + dev_err(dev, "write_cpld_reg() error, reg_val_now=%d\n", reg_val_now); + return reg_val_now; + } else { + //clear bits in reg_val_now by the mask + reg_val_now &= ~mask; + //get bit shift by the mask + shift = _shift(mask); + //calculate new reg_val + reg_val = reg_val_now | (reg_val << shift); + } + } + + I2C_WRITE_BYTE_DATA(ret, &data->access_lock, + client, reg, reg_val); + + if (unlikely(ret < 0)) { + dev_err(dev, "write_cpld_reg() error, return=%d\n", ret); + return ret; + } + + return count; +} + +/* get qsfp port config register value */ +static ssize_t read_cpld_version_h(struct device *dev, + struct device_attribute *da, + char *buf) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + + if (attr->index >= CPLD_VERSION_H) { + return sprintf(buf, "%d.%02d.%03d", + _read_cpld_reg(dev, CPLD_VERSION_REG, MASK_CPLD_MAJOR_VER), + _read_cpld_reg(dev, CPLD_VERSION_REG, MASK_CPLD_MINOR_VER), + _read_cpld_reg(dev, CPLD_BUILD_REG, MASK_ALL)); + } + return -1; +} + +/* add valid cpld client to list */ +static void cpld_add_client(struct i2c_client *client) +{ + struct cpld_client_node *node = NULL; + + node = kzalloc(sizeof(struct cpld_client_node), GFP_KERNEL); + if (!node) { + dev_info(&client->dev, + "Can't allocate cpld_client_node for index %d\n", + client->addr); + return; + } + + node->client = client; + + mutex_lock(&list_lock); + list_add(&node->list, &cpld_client_list); + mutex_unlock(&list_lock); +} + +/* remove exist cpld client in list */ +static void cpld_remove_client(struct i2c_client *client) +{ + struct list_head *list_node = NULL; + struct cpld_client_node *cpld_node = NULL; + int found = 0; + + mutex_lock(&list_lock); + list_for_each(list_node, &cpld_client_list) { + cpld_node = list_entry(list_node, + struct cpld_client_node, list); + + if (cpld_node->client == client) { + found = 1; + break; + } + } + + if (found) { + list_del(list_node); + kfree(cpld_node); + } + mutex_unlock(&list_lock); +} + +/* cpld drvier probe */ +static int cpld_probe(struct i2c_client *client, + const struct i2c_device_id *dev_id) +{ + int status; + struct cpld_data *data = NULL; + int ret = -EPERM; + + data = kzalloc(sizeof(struct cpld_data), GFP_KERNEL); + if (!data) + return -ENOMEM; + + /* init cpld data for client */ + i2c_set_clientdata(client, data); + mutex_init(&data->access_lock); + + if (!i2c_check_functionality(client->adapter, + I2C_FUNC_SMBUS_BYTE_DATA)) { + dev_info(&client->dev, + "i2c_check_functionality failed (0x%x)\n", + client->addr); + status = -EIO; + goto exit; + } + + /* get cpld id from device */ + ret = i2c_smbus_read_byte_data(client, CPLD_ID_REG); + + if (ret < 0) { + dev_info(&client->dev, + "fail to get cpld id (0x%x) at addr (0x%x)\n", + CPLD_ID_REG, client->addr); + status = -EIO; + goto exit; + } + + if (INVALID(ret, cpld1, cpld2)) { + dev_info(&client->dev, + "cpld id %d(device) not valid\n", ret); + //status = -EPERM; + //goto exit; + } + +#if 0 + /* change client name for each cpld with index */ + snprintf(client->name, sizeof(client->name), "%s_%d", client->name, + data->index); +#endif + + data->index = dev_id->driver_data; + + /* register sysfs hooks for different cpld group */ + dev_info(&client->dev, "probe cpld with index %d\n", data->index); + switch (data->index) { + case cpld1: + status = sysfs_create_group(&client->dev.kobj, + &cpld1_group); + break; + case cpld2: + status = sysfs_create_group(&client->dev.kobj, + &cpld2_group); + break; + default: + status = -EINVAL; + } + + if (status) + goto exit; + + dev_info(&client->dev, "chip found\n"); + + /* add probe chip to client list */ + cpld_add_client(client); + + return 0; +exit: + switch (data->index) { + case cpld1: + sysfs_remove_group(&client->dev.kobj, &cpld1_group); + break; + case cpld2: + sysfs_remove_group(&client->dev.kobj, &cpld2_group); + break; + default: + break; + } + return status; +} + +/* cpld drvier remove */ +#if LINUX_VERSION_CODE < KERNEL_VERSION(6, 1, 0) +static int +#else +static void +#endif +cpld_remove(struct i2c_client *client) +{ + struct cpld_data *data = i2c_get_clientdata(client); + + switch (data->index) { + case cpld1: + sysfs_remove_group(&client->dev.kobj, &cpld1_group); + break; + case cpld2: + sysfs_remove_group(&client->dev.kobj, &cpld2_group); + break; + } + + cpld_remove_client(client); +#if LINUX_VERSION_CODE < KERNEL_VERSION(6, 1, 0) + return 0; +#endif +} + +static int s8901_54xc_cpld_read_internal(struct i2c_client *client, u8 reg) +{ + int retry = I2C_RW_RETRY_COUNT; + int reg_val = 0; + struct cpld_data *data = i2c_get_clientdata(client); + + while (retry) { + I2C_READ_BYTE_DATA(reg_val, &data->access_lock, client, reg); + if (unlikely(reg_val < 0)) { + msleep(I2C_RW_RETRY_INTERVAL); + retry--; + + if (retry == 0) { + dev_err(&client->dev, "%s() retry %d times but still failed, reg=%x\n", __func__, I2C_RW_RETRY_COUNT, reg); + } + + continue; + } + + break; + } + + return reg_val; +} + +static int s8901_54xc_cpld_write_internal(struct i2c_client *client, u8 reg, u8 value) +{ + int ret = 0, retry = I2C_RW_RETRY_COUNT; + struct cpld_data *data = i2c_get_clientdata(client); + + while (retry) { + I2C_WRITE_BYTE_DATA(ret, &data->access_lock, client, reg, value); + if (unlikely(ret < 0)) { + msleep(I2C_RW_RETRY_INTERVAL); + retry--; + + if (retry == 0) { + dev_err(&client->dev, "%s() retry %d times but still failed, reg=%x\n", __func__, I2C_RW_RETRY_COUNT, reg); + } + + continue; + } + break; + } + + return ret; +} + +/* +int s8901_54xc_cpld_write(unsigned short cpld_addr, u8 reg, u8 value) +{ + struct list_head *list_node = NULL; + struct cpld_client_node *cpld_node = NULL; + int ret = -EIO; + + mutex_lock(&list_lock); + + list_for_each(list_node, &cpld_client_list) + { + cpld_node = list_entry(list_node, struct cpld_client_node, list); + + if (cpld_node->client->addr == cpld_addr) { + ret = s8901_54xc_cpld_write_internal(cpld_node->client, reg, value); + break; + } else { + pr_err("cpld_node->client->addr=%x, cpld_addr=%x\n", cpld_node->client->addr, cpld_addr); + } + } + + mutex_unlock(&list_lock); + + return ret; +} +EXPORT_SYMBOL(s8901_54xc_cpld_write); +*/ + +int s8901_54xc_cpld_psu_mux_sel(u8 mux_sel) +{ + unsigned short cpld_addr = cpld_i2c_addr[0]; + u8 reg = CPLD_MUX_CTRL_REG; + u8 reg_val = 0; + u8 psu_mux_mask = 0x06; + u8 mux_sel_val = 0; + + struct list_head *list_node = NULL; + struct cpld_client_node *cpld_node = NULL; + int ret = -EIO; + + switch(mux_sel) { + case 0: + //psu 0 + mux_sel_val = 0x04; + break; + case 1: + //psu 1 + mux_sel_val = 0x02; + break; + default: + //bmc + mux_sel_val = psu_mux_mask; + break; + } + + mutex_lock(&list_lock); + + list_for_each(list_node, &cpld_client_list) + { + cpld_node = list_entry(list_node, struct cpld_client_node, list); + + if (cpld_node->client->addr == cpld_addr) { + //read current reg value + reg_val = s8901_54xc_cpld_read_internal(cpld_node->client, reg); + //clear psu_mux_sel bits (bit 1 and 2) + reg_val &= ~psu_mux_mask; + //modify psu_mux_sel bits (bit 1 and 2) + reg_val |= mux_sel_val; + //write reg value + s8901_54xc_cpld_write_internal(cpld_node->client, reg, reg_val); + + break; + } else { + pr_err("cpld_node->client->addr=%x, cpld_addr=%x\n", cpld_node->client->addr, cpld_addr); + } + } + + mutex_unlock(&list_lock); + + return ret; +} +EXPORT_SYMBOL(s8901_54xc_cpld_psu_mux_sel); + +MODULE_DEVICE_TABLE(i2c, cpld_id); + +static struct i2c_driver cpld_driver = { + .class = I2C_CLASS_HWMON, + .driver = { + .name = "x86_64_ufispace_s8901_54xc_cpld", + }, + .probe = cpld_probe, + .remove = cpld_remove, + .id_table = cpld_id, + .address_list = cpld_i2c_addr, +}; + +static int __init cpld_init(void) +{ + mutex_init(&list_lock); + return i2c_add_driver(&cpld_driver); +} + +static void __exit cpld_exit(void) +{ + i2c_del_driver(&cpld_driver); +} + +MODULE_AUTHOR("Jason Tsai "); +MODULE_DESCRIPTION("x86_64_ufispace_s8901_54xc_cpld driver"); +MODULE_LICENSE("GPL"); + +module_init(cpld_init); +module_exit(cpld_exit); diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s8901-54xc/modules/x86-64-ufispace-s8901-54xc-cpld.h b/platform/broadcom/sonic-platform-modules-ufispace/s8901-54xc/modules/x86-64-ufispace-s8901-54xc-cpld.h new file mode 100644 index 0000000000..36521635fd --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ufispace/s8901-54xc/modules/x86-64-ufispace-s8901-54xc-cpld.h @@ -0,0 +1,269 @@ +/* header file for i2c cpld driver of ufispace_s8901_54xc + * + * Copyright (C) 2022 UfiSpace Technology Corporation. + * Jason Tsai + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. + */ + +#ifndef UFISPACE_S8901_54XC_CPLD_H +#define UFISPACE_S8901_54XC_CPLD_H + +/* CPLD device index value */ +enum cpld_id { + cpld1, + cpld2 +}; + +/* CPLD common registers */ +#define CPLD_VERSION_REG 0x02 +#define CPLD_ID_REG 0x03 +#define CPLD_BUILD_REG 0x04 +#define CPLD_CHIP_REG 0x05 + +#define CPLD_EVT_CTRL_REG 0x3F + +/* CPLD 1 registers */ +#define CPLD_BOARD_ID_0_REG 0x00 +#define CPLD_BOARD_ID_1_REG 0x01 +#define CPLD_SKU_EXT_REG 0x06 + +#define CPLD_MAC_INTR_REG 0x10 +#define CPLD_HWM_INTR_REG 0x13 +#define CPLD_CPLD2_INTR_REG 0x14 +#define CPLD_NTM_INTR_REG 0x15 +#define CPLD_FAN_PSU_INTR_REG 0x16 +#define CPLD_SFP_IOEXP_INTR_REG 0x18 +#define CPLD_CPU_NMI_INTR_REG 0x19 +#define CPLD_PTP_INTR_REG 0x1B +#define CPLD_SYSTEM_INTR_REG 0x1C + +#define CPLD_MAC_MASK_REG 0x20 +#define CPLD_HWM_MASK_REG 0x23 +#define CPLD_CPLD2_MASK_REG 0x24 +#define CPLD_NTM_MASK_REG 0x25 +#define CPLD_FAN_PSU_MASK_REG 0x26 +#define CPLD_SFP_IOEXP_MASK_REG 0x28 +#define CPLD_CPU_NMI_MASK_REG 0x29 +#define CPLD_PTP_MASK_REG 0x2B +#define CPLD_SYSTEM_MASK_REG 0x2C + +#define CPLD_MAC_EVT_REG 0x30 +#define CPLD_HWM_EVT_REG 0x33 +#define CPLD_CPLD2_EVT_REG 0x34 +#define CPLD_NTM_EVT_REG 0x35 +#define CPLD_FAN_PSU_EVT_REG 0x36 +#define CPLD_SFP_IOEXP_EVT_REG 0x38 +#define CPLD_CPU_NMI_EVT_REG 0x39 +#define CPLD_PTP_EVT_REG 0x3B + +#define CPLD_MAC_RESET_REG 0x40 +#define CPLD_SYSTEM_RESET_REG 0x41 +#define CPLD_BMC_NTM_RESET_REG 0x43 +#define CPLD_USB_RESET_REG 0x44 +#define CPLD_I2C_MUX_RESET_REG 0x46 +#define CPLD_I2C_MUX_RESET_2_REG 0x47 +#define CPLD_MISC_RESET_REG 0x48 + +#define CPLD_BRD_PRESENT_REG 0x50 +#define CPLD_PSU_STATUS_REG 0x51 +#define CPLD_SYSTEM_PWR_REG 0x52 +#define CPLD_MAC_SYNCE_REG 0x53 +#define CPLD_MAC_AVS_REG 0x54 +#define CPLD_SYSTEM_STATUS_REG 0x55 +#define CPLD_FAN_PRESENT_REG 0x56 +#define CPLD_WATCHDOG_REG 0x5A +#define CPLD_BOOT_SELECT_REG 0x5B +#define CPLD_MUX_CTRL_REG 0x5C +#define CPLD_MISC_CTRL_1_REG 0x5D +#define CPLD_MISC_CTRL_2_REG 0x5E +#define CPLD_TIMING_CTRL_REG 0x5F + +#define CPLD_MAC_TEMP_REG 0x61 + +/* +#define CPLD_SYSTEM_LED_SYS_FAN_REG 0x80 +#define CPLD_SYSTEM_LED_PSU_REG 0x81 +#define CPLD_SYSTEM_LED_SYNC_REG 0x82 +#define CPLD_SYSTEM_LED_ID_REG 0x84 +*/ +#define CPLD_SYSTEM_LED_PSU_REG 0x80 +#define CPLD_SYSTEM_LED_SYS_REG 0x81 +#define CPLD_SYSTEM_LED_SYNC_REG 0x82 +#define CPLD_SYSTEM_LED_FAN_REG 0x83 +#define CPLD_SYSTEM_LED_ID_REG 0x84 + +#define CPLD_MAC_PG_REG 0x90 +#define CPLD_MISC_PG_REG 0x92 +#define CPLD_MAC_PG_EN_REG 0x93 +#define CPLD_MISC_PG_EN_REG 0x95 + +#define DBG_CPLD_MAC_INTR_REG 0xE0 +#define DBG_CPLD_HWM_INTR_REG 0xE3 +#define DBG_CPLD_CPLD2_INTR_REG 0xE4 +#define DBG_CPLD_NTM_INTR_REG 0xE5 +#define DBG_CPLD_FAN_PSU_INTR_REG 0xE6 +#define DBG_CPLD_SFP_IOEXP_INTR_REG 0xE8 +#define DBG_CPLD_PTP_INTR_REG 0xEB + +#define CPLD_UPG_RESET_REG 0xF0 + +/* CPLD 2*/ + +//interrupt status +#define CPLD_SFP_INTR_PRESENT_0_7_REG 0x10 +#define CPLD_SFP_INTR_PRESENT_8_15_REG 0x11 +#define CPLD_SFP_INTR_PRESENT_16_23_REG 0x12 +#define CPLD_SFP_INTR_PRESENT_24_31_REG 0x13 +#define CPLD_SFP_INTR_PRESENT_32_39_REG 0x14 +#define CPLD_SFP_INTR_PRESENT_40_47_REG 0x15 +#define CPLD_QSFP_INTR_PRESENT_48_53_REG 0x16 +#define CPLD_QSFP_INTR_PORT_48_53_REG 0x17 + +//interrupt mask +#define CPLD_SFP_MASK_PRESENT_0_7_REG 0x20 +#define CPLD_SFP_MASK_PRESENT_8_15_REG 0x21 +#define CPLD_SFP_MASK_PRESENT_16_23_REG 0x22 +#define CPLD_SFP_MASK_PRESENT_24_31_REG 0x23 +#define CPLD_SFP_MASK_PRESENT_32_39_REG 0x24 +#define CPLD_SFP_MASK_PRESENT_40_47_REG 0x25 +#define CPLD_QSFP_MASK_PRESENT_48_53_REG 0x26 +#define CPLD_QSFP_MASK_PORT_48_53_REG 0x27 + +//interrupt event +#define CPLD_SFP_EVT_PRESENT_0_7_REG 0x30 +#define CPLD_SFP_EVT_PRESENT_8_15_REG 0x31 +#define CPLD_SFP_EVT_PRESENT_16_23_REG 0x32 +#define CPLD_SFP_EVT_PRESENT_24_31_REG 0x33 +#define CPLD_SFP_EVT_PRESENT_32_39_REG 0x34 +#define CPLD_SFP_EVT_PRESENT_40_47_REG 0x35 +#define CPLD_QSFP_EVT_PRESENT_48_53_REG 0x36 +#define CPLD_QSFP_EVT_PORT_48_53_REG 0x37 + +#define CPLD_SFP_INTR_RX_LOS_0_7_REG 0x40 +#define CPLD_SFP_INTR_RX_LOS_8_15_REG 0x41 +#define CPLD_SFP_INTR_RX_LOS_16_23_REG 0x42 +#define CPLD_SFP_INTR_RX_LOS_24_31_REG 0x43 +#define CPLD_SFP_INTR_RX_LOS_32_39_REG 0x44 +#define CPLD_SFP_INTR_RX_LOS_40_47_REG 0x45 + +#define CPLD_SFP_INTR_TX_FAULT_0_7_REG 0x46 +#define CPLD_SFP_INTR_TX_FAULT_8_15_REG 0x47 +#define CPLD_SFP_INTR_TX_FAULT_16_23_REG 0x48 +#define CPLD_SFP_INTR_TX_FAULT_24_31_REG 0x49 +#define CPLD_SFP_INTR_TX_FAULT_32_39_REG 0x4A +#define CPLD_SFP_INTR_TX_FAULT_40_47_REG 0x4B + +//#define CPLD_SFP_RX_LOS_BASE_REG 0x40 +//#define CPLD_SFP_TX_FAULT_BASE_REG 0x46 + +#define CPLD_SFP_MASK_RX_LOS_0_7_REG 0x50 +#define CPLD_SFP_MASK_RX_LOS_8_15_REG 0x51 +#define CPLD_SFP_MASK_RX_LOS_16_23_REG 0x52 +#define CPLD_SFP_MASK_RX_LOS_24_31_REG 0x53 +#define CPLD_SFP_MASK_RX_LOS_32_39_REG 0x54 +#define CPLD_SFP_MASK_RX_LOS_40_47_REG 0x55 + +#define CPLD_SFP_MASK_TX_FAULT_0_7_REG 0x56 +#define CPLD_SFP_MASK_TX_FAULT_8_15_REG 0x57 +#define CPLD_SFP_MASK_TX_FAULT_16_23_REG 0x58 +#define CPLD_SFP_MASK_TX_FAULT_24_31_REG 0x59 +#define CPLD_SFP_MASK_TX_FAULT_32_39_REG 0x5A +#define CPLD_SFP_MASK_TX_FAULT_40_47_REG 0x5B + +//#define CPLD_SFP_RX_LOS_MASK_BASE_REG 0x50 +//#define CPLD_SFP_TX_FAULT_MASK_BASE_REG 0x56 + +#define CPLD_SFP_EVT_RX_LOS_0_7_REG 0x60 +#define CPLD_SFP_EVT_RX_LOS_8_15_REG 0x61 +#define CPLD_SFP_EVT_RX_LOS_16_23_REG 0x62 +#define CPLD_SFP_EVT_RX_LOS_24_31_REG 0x63 +#define CPLD_SFP_EVT_RX_LOS_32_39_REG 0x64 +#define CPLD_SFP_EVT_RX_LOS_40_47_REG 0x65 + +#define CPLD_SFP_EVT_TX_FAULT_0_7_REG 0x66 +#define CPLD_SFP_EVT_TX_FAULT_8_15_REG 0x67 +#define CPLD_SFP_EVT_TX_FAULT_16_23_REG 0x68 +#define CPLD_SFP_EVT_TX_FAULT_24_31_REG 0x69 +#define CPLD_SFP_EVT_TX_FAULT_32_39_REG 0x6A +#define CPLD_SFP_EVT_TX_FAULT_40_47_REG 0x6B + +//#define CPLD_SFP_RX_LOS_EVT_BASE_REG 0x60 +//#define CPLD_SFP_TX_FAULT_EVT_BASE_REG 0x66 + +#define CPLD_SFP_TX_DISABLE_0_7_REG 0x70 +#define CPLD_SFP_TX_DISABLE_8_15_REG 0x71 +#define CPLD_SFP_TX_DISABLE_16_23_REG 0x72 +#define CPLD_SFP_TX_DISABLE_24_31_REG 0x73 +#define CPLD_SFP_TX_DISABLE_32_39_REG 0x74 +#define CPLD_SFP_TX_DISABLE_40_47_REG 0x75 + +//#define CPLD_SFP_TX_DISABLE_BASE_REG 0x70 +#define CPLD_QSFP_RESET_48_53_REG 0x76 +#define CPLD_QSFP_LPMODE_48_53_REG 0x77 + +//debug interrupt status +#define DBG_CPLD_SFP_INTR_PRESENT_BASE_REG 0xD0 +#define DBG_CPLD_SFP_INTR_PRESENT_0_7_REG 0xD0 +#define DBG_CPLD_SFP_INTR_PRESENT_8_15_REG 0xD1 +#define DBG_CPLD_SFP_INTR_PRESENT_16_23_REG 0xD2 +#define DBG_CPLD_SFP_INTR_PRESENT_24_31_REG 0xD3 +#define DBG_CPLD_SFP_INTR_PRESENT_32_39_REG 0xD4 +#define DBG_CPLD_SFP_INTR_PRESENT_40_47_REG 0xD5 +#define DBG_CPLD_QSFP_INTR_PRESENT_48_53_REG 0xD6 +#define DBG_CPLD_QSFP_INTR_PORT_48_53_REG 0xD7 + +//debug interrupt mask +#define DBG_CPLD_SFP_INTR_RX_LOS_0_7_REG 0xE0 +#define DBG_CPLD_SFP_INTR_RX_LOS_8_15_REG 0xE1 +#define DBG_CPLD_SFP_INTR_RX_LOS_16_23_REG 0xE2 +#define DBG_CPLD_SFP_INTR_RX_LOS_24_31_REG 0xE3 +#define DBG_CPLD_SFP_INTR_RX_LOS_32_39_REG 0xE4 +#define DBG_CPLD_SFP_INTR_RX_LOS_40_47_REG 0xE5 + +#define DBG_CPLD_SFP_INTR_TX_FAULT_0_7_REG 0xE6 +#define DBG_CPLD_SFP_INTR_TX_FAULT_8_15_REG 0xE7 +#define DBG_CPLD_SFP_INTR_TX_FAULT_16_23_REG 0xE8 +#define DBG_CPLD_SFP_INTR_TX_FAULT_24_31_REG 0xE9 +#define DBG_CPLD_SFP_INTR_TX_FAULT_32_39_REG 0xEA +#define DBG_CPLD_SFP_INTR_TX_FAULT_40_47_REG 0xEB + +//#define DBG_CPLD_SFP_RX_LOS_BASE_REG 0xE0 +//#define DBG_CPLD_SFP_TX_FAULT_BASE_REG 0xE6 + +//MASK +#define MASK_ALL (0xFF) +#define MASK_HB (0b11110000) +#define MASK_LB (0b00001111) +#define MASK_CPLD_MAJOR_VER (0b11000000) +#define MASK_CPLD_MINOR_VER (0b00111111) +#define CPLD_SYSTEM_LED_SYS_MASK MASK_HB +#define CPLD_SYSTEM_LED_FAN_MASK MASK_LB +#define CPLD_SYSTEM_LED_PSU_0_MASK MASK_LB +#define CPLD_SYSTEM_LED_PSU_1_MASK MASK_HB +#define CPLD_SYSTEM_LED_SYNC_MASK MASK_LB +#define CPLD_SYSTEM_LED_ID_MASK MASK_LB +#define CPLD_SFP_LED_MASK_0 (0b00000011) +#define CPLD_SFP_LED_MASK_1 (0b00001100) +#define PERM_R (0b00000001) +#define PERM_W (0b00000010) +#define PERM_RW (PERM_R | PERM_W) +#define IS_PERM_R(perm) (perm & PERM_R ? 1u : 0u) +#define IS_PERM_W(perm) (perm & PERM_W ? 1u : 0u) + +/* common manipulation */ +#define INVALID(i, min, max) ((i < min) || (i > max) ? 1u : 0u) + +#endif diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s8901-54xc/modules/x86-64-ufispace-s8901-54xc-lpc.c b/platform/broadcom/sonic-platform-modules-ufispace/s8901-54xc/modules/x86-64-ufispace-s8901-54xc-lpc.c new file mode 100644 index 0000000000..72de01c48c --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ufispace/s8901-54xc/modules/x86-64-ufispace-s8901-54xc-lpc.c @@ -0,0 +1,883 @@ +/* + * A lpc driver for the ufispace_s8901_54xc + * + * Copyright (C) 2017-2022 UfiSpace Technology Corporation. + * Jason Tsai + * + * Based on ad7414.c + * Copyright 2006 Stefan Roese , DENX Software Engineering + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. + */ +#include +#include +#include +#include +#include +#include + +#define BSP_LOG_R(fmt, args...) \ + _bsp_log (LOG_READ, KERN_INFO "%s:%s[%d]: " fmt "\r\n", \ + __FILE__, __func__, __LINE__, ##args) +#define BSP_LOG_W(fmt, args...) \ + _bsp_log (LOG_WRITE, KERN_INFO "%s:%s[%d]: " fmt "\r\n", \ + __FILE__, __func__, __LINE__, ##args) +#define BSP_PR(level, fmt, args...) _bsp_log (LOG_SYS, level "[BSP]" fmt "\r\n", ##args) + +#define _SENSOR_DEVICE_ATTR_RO(_name, _func, _index) \ + SENSOR_DEVICE_ATTR(_name, S_IRUGO, read_##_func, NULL, _index) + +#define _SENSOR_DEVICE_ATTR_WO(_name, _func, _index) \ + SENSOR_DEVICE_ATTR(_name, S_IWUSR, NULL, write_##_func, _index) + +#define _SENSOR_DEVICE_ATTR_RW(_name, _func, _index) \ + SENSOR_DEVICE_ATTR(_name, S_IRUGO | S_IWUSR, read_##_func, write_##_func, _index) + +#define _DEVICE_ATTR(_name) \ + &sensor_dev_attr_##_name.dev_attr.attr + +#define BSP_PR(level, fmt, args...) _bsp_log (LOG_SYS, level "[BSP]" fmt "\r\n", ##args) + +#define DRIVER_NAME "x86_64_ufispace_s8901_54xc_lpc" + +/* LPC registers */ + +#define REG_BASE_MB 0x700 +#define REG_BASE_EC 0xE300 + +#define REG_NONE 0x00 +//MB CPLD +#define REG_BRD_ID_0 (REG_BASE_MB + 0x00) +#define REG_BRD_ID_1 (REG_BASE_MB + 0x01) +#define REG_CPLD_VERSION (REG_BASE_MB + 0x02) +#define REG_CPLD_ID (REG_BASE_MB + 0x03) +#define REG_CPLD_BUILD (REG_BASE_MB + 0x04) +#define REG_CPLD_CHIP (REG_BASE_MB + 0x05) +#define REG_BRD_EXT_ID (REG_BASE_MB + 0x06) +#define REG_I2C_MUX_RESET (REG_BASE_MB + 0x46) +#define REG_I2C_MUX_RESET_2 (REG_BASE_MB + 0x47) +#define REG_MUX_CTRL (REG_BASE_MB + 0x5C) +#define REG_MISC_CTRL (REG_BASE_MB + 0x5D) +#define REG_MISC_CTRL_2 (REG_BASE_MB + 0x5E) + +//EC +#define REG_BIOS_BOOT (REG_BASE_EC + 0x0C) +#define REG_CPU_REV (REG_BASE_EC + 0x17) + +// BMC mailbox +#define REG_TEMP_MAC_HWM (REG_BASE_MB + 0xC0) + +//MASK +#define MASK_ALL (0xFF) +#define MASK_CPLD_MAJOR_VER (0b11000000) +#define MASK_CPLD_MINOR_VER (0b00111111) +#define MASK_HW_ID (0b00000011) +#define MASK_DEPH_ID (0b00000100) +#define MASK_BUILD_ID (0b00011000) +#define MASK_EXT_ID (0b00000111) +#define MASK_MUX_RESET_ALL (0x37) // 2#00110111 +#define MASK_MUX_RESET (MASK_ALL) +#define MASK_BIOS_BOOT_ROM (0b01000000) + +#define LPC_MDELAY (5) +#define MDELAY_RESET_INTERVAL (100) +#define MDELAY_RESET_FINISH (500) + +/* LPC sysfs attributes index */ +enum lpc_sysfs_attributes { + //MB CPLD + ATT_BRD_ID_0, + ATT_BRD_ID_1, + ATT_BRD_SKU_ID, + ATT_BRD_HW_ID, + ATT_BRD_DEPH_ID, + ATT_BRD_BUILD_ID, + ATT_BRD_EXT_ID, + + ATT_CPLD_ID, + ATT_CPLD_BUILD, + ATT_CPLD_CHIP, + + ATT_CPLD_VERSION_MAJOR, + ATT_CPLD_VERSION_MINOR, + ATT_CPLD_VERSION_BUILD, + ATT_CPLD_VERSION_H, + + ATT_MUX_RESET, + ATT_MUX_CTRL, + + //EC + ATT_CPU_HW_ID, + ATT_CPU_DEPH_ID, + ATT_CPU_BUILD_ID, + ATT_BIOS_BOOT_ROM, + //BMC mailbox + ATT_TEMP_MAC_HWM, + + //BSP + ATT_BSP_VERSION, + ATT_BSP_DEBUG, + ATT_BSP_PR_INFO, + ATT_BSP_PR_ERR, + ATT_BSP_REG, + ATT_BSP_GPIO_MAX, + ATT_MAX +}; + +enum data_type { + DATA_HEX, + DATA_DEC, + DATA_S_DEC, + DATA_UNK, +}; + +enum bsp_log_types { + LOG_NONE, + LOG_RW, + LOG_READ, + LOG_WRITE, + LOG_SYS +}; + +enum bsp_log_ctrl { + LOG_DISABLE, + LOG_ENABLE +}; + +struct lpc_data_s { + struct mutex access_lock; +}; + +typedef struct sysfs_info_s +{ + u16 reg; + u8 mask; + u8 data_type; +} sysfs_info_t; + +static sysfs_info_t sysfs_info[] = { + [ATT_BRD_ID_0] = {REG_BRD_ID_0, MASK_ALL, DATA_HEX}, + [ATT_BRD_ID_1] = {REG_BRD_ID_1, MASK_ALL, DATA_HEX}, + [ATT_BRD_SKU_ID] = {REG_BRD_ID_0, MASK_ALL, DATA_DEC}, + [ATT_BRD_HW_ID] = {REG_BRD_ID_1, MASK_HW_ID, DATA_DEC}, + [ATT_BRD_DEPH_ID] = {REG_BRD_ID_1, MASK_DEPH_ID, DATA_DEC}, + [ATT_BRD_BUILD_ID] = {REG_BRD_ID_1, MASK_BUILD_ID, DATA_DEC}, + [ATT_BRD_EXT_ID] = {REG_BRD_EXT_ID, MASK_EXT_ID, DATA_DEC}, + + [ATT_CPLD_ID] = {REG_CPLD_ID, MASK_ALL, DATA_DEC}, + [ATT_CPLD_BUILD] = {REG_CPLD_BUILD, MASK_ALL, DATA_DEC}, + [ATT_CPLD_CHIP] = {REG_CPLD_CHIP, MASK_ALL, DATA_DEC}, + + [ATT_CPLD_VERSION_MAJOR] = {REG_CPLD_VERSION, MASK_CPLD_MAJOR_VER, DATA_DEC}, + [ATT_CPLD_VERSION_MINOR] = {REG_CPLD_VERSION, MASK_CPLD_MINOR_VER, DATA_DEC}, + [ATT_CPLD_VERSION_BUILD] = {REG_CPLD_BUILD, MASK_ALL, DATA_DEC}, + [ATT_CPLD_VERSION_H] = {REG_CPLD_VERSION, MASK_ALL, DATA_UNK}, + + [ATT_MUX_RESET] = {REG_NONE, MASK_ALL, DATA_DEC}, + [ATT_MUX_CTRL] = {REG_MUX_CTRL, MASK_ALL, DATA_HEX}, + + //EC + [ATT_CPU_HW_ID] = {REG_CPU_REV, MASK_HW_ID, DATA_DEC}, + [ATT_CPU_DEPH_ID] = {REG_CPU_REV, MASK_DEPH_ID, DATA_DEC}, + [ATT_CPU_BUILD_ID] = {REG_CPU_REV, MASK_BUILD_ID, DATA_DEC}, + [ATT_BIOS_BOOT_ROM] = {REG_BIOS_BOOT, MASK_BIOS_BOOT_ROM, DATA_DEC}, + + //BMC mailbox + [ATT_TEMP_MAC_HWM] = {REG_TEMP_MAC_HWM , MASK_ALL, DATA_S_DEC}, + + //BSP + [ATT_BSP_VERSION] = {REG_NONE, MASK_ALL, DATA_UNK}, + [ATT_BSP_DEBUG] = {REG_NONE, MASK_ALL, DATA_UNK}, + [ATT_BSP_PR_INFO] = {REG_NONE, MASK_ALL, DATA_UNK}, + [ATT_BSP_PR_ERR] = {REG_NONE, MASK_ALL, DATA_UNK}, + [ATT_BSP_REG] = {REG_NONE, MASK_ALL, DATA_HEX}, +}; + +struct lpc_data_s *lpc_data; +char bsp_version[16]=""; +char bsp_debug[2]="0"; +char bsp_reg[8]="0x0"; +u8 enable_log_read = LOG_DISABLE; +u8 enable_log_write = LOG_DISABLE; +u8 enable_log_sys = LOG_ENABLE; +u8 mailbox_inited=0; + +/* reg shift */ +static u8 _shift(u8 mask) +{ + int i=0, mask_one=1; + + for(i=0; i<8; ++i) { + if ((mask & mask_one) == 1) + return i; + else + mask >>= 1; + } + + return -1; +} + +/* reg mask and shift */ +static u8 _mask_shift(u8 val, u8 mask) +{ + int shift=0; + + shift = _shift(mask); + + return (val & mask) >> shift; +} + +static u8 _parse_data(char *buf, unsigned int data, u8 data_type) +{ + if(buf == NULL) { + return -1; + } + + if(data_type == DATA_HEX) { + return sprintf(buf, "0x%02x", data); + } else if(data_type == DATA_DEC) { + return sprintf(buf, "%u", data); + } else { + return -1; + } + return 0; +} + +static int _bsp_log(u8 log_type, char *fmt, ...) +{ + if ((log_type==LOG_READ && enable_log_read) || + (log_type==LOG_WRITE && enable_log_write) || + (log_type==LOG_SYS && enable_log_sys) ) { + va_list args; + int r; + + va_start(args, fmt); + r = vprintk(fmt, args); + va_end(args); + + return r; + } else { + return 0; + } +} + +static int _config_bsp_log(u8 log_type) +{ + switch(log_type) { + case LOG_NONE: + enable_log_read = LOG_DISABLE; + enable_log_write = LOG_DISABLE; + break; + case LOG_RW: + enable_log_read = LOG_ENABLE; + enable_log_write = LOG_ENABLE; + break; + case LOG_READ: + enable_log_read = LOG_ENABLE; + enable_log_write = LOG_DISABLE; + break; + case LOG_WRITE: + enable_log_read = LOG_DISABLE; + enable_log_write = LOG_ENABLE; + break; + default: + return -EINVAL; + } + return 0; +} + +static void _outb(u8 data, u16 port) +{ + outb(data, port); + mdelay(LPC_MDELAY); +} + +/* init bmc mailbox, get from BMC team */ +static int bmc_mailbox_init(void) +{ + if (mailbox_inited) { + return mailbox_inited; + } + + //Enable super io writing + _outb(0xa5, 0x2e); + _outb(0xa5, 0x2e); + + //Logic device number + _outb(0x07, 0x2e); + _outb(0x0e, 0x2f); + + //Disable mailbox + _outb(0x30, 0x2e); + _outb(0x00, 0x2f); + + //Set base address bit + _outb(0x60, 0x2e); + _outb(0x07, 0x2f); + _outb(0x61, 0x2e); + _outb(0xc0, 0x2f); + + //Select bit[3:0] of SIRQ + _outb(0x70, 0x2e); + _outb(0x07, 0x2f); + + //Low level trigger + _outb(0x71, 0x2e); + _outb(0x01, 0x2f); + + //Enable mailbox + _outb(0x30, 0x2e); + _outb(0x01, 0x2f); + + //Disable super io writing + _outb(0xaa, 0x2e); + + //Mailbox initial + _outb(0x00, 0x786); + _outb(0x00, 0x787); + + //set mailbox_inited + mailbox_inited = 1; + + return mailbox_inited; +} + +/* get lpc register value */ +static u8 _read_lpc_reg(u16 reg, u8 mask) +{ + u8 reg_val=0x0, reg_mk_shf_val = 0x0; + + mutex_lock(&lpc_data->access_lock); + reg_val = inb(reg); + mutex_unlock(&lpc_data->access_lock); + + reg_mk_shf_val = _mask_shift(reg_val, mask); + + BSP_LOG_R("reg=0x%03x, reg_val=0x%02x, mask=0x%02x, reg_mk_shf_val=0x%02x", reg, reg_val, mask, reg_mk_shf_val); + + return reg_mk_shf_val; +} + +/* get lpc register value */ +static ssize_t read_lpc_reg(u16 reg, u8 mask, char *buf, u8 data_type) +{ + u8 reg_val; + int len=0; + + reg_val = _read_lpc_reg(reg, mask); + + // may need to change to hex value ? + len=_parse_data(buf, reg_val, data_type); + + return len; +} + +/* set lpc register value */ +static ssize_t write_lpc_reg(u16 reg, u8 mask, const char *buf, size_t count, u8 data_type) +{ + u8 reg_val, reg_val_now, shift; + + if (kstrtou8(buf, 0, ®_val) < 0) { + if(data_type == DATA_S_DEC) { + if (kstrtos8(buf, 0, ®_val) < 0) { + return -EINVAL; + } + } else { + return -EINVAL; + } + } + + //apply continuous bits operation if mask is specified, discontinuous bits are not supported + if (mask != MASK_ALL) { + reg_val_now = _read_lpc_reg(reg, MASK_ALL); + //clear bits in reg_val_now by the mask + reg_val_now &= ~mask; + //get bit shift by the mask + shift = _shift(mask); + //calculate new reg_val + reg_val = reg_val_now | (reg_val << shift); + } + + mutex_lock(&lpc_data->access_lock); + + _outb(reg_val, reg); + + mutex_unlock(&lpc_data->access_lock); + + BSP_LOG_W("reg=0x%03x, reg_val=0x%02x, mask=0x%02x", reg, reg_val, mask); + + return count; +} + +/* get bsp value */ +static ssize_t read_bsp(char *buf, char *str) +{ + ssize_t len=0; + + mutex_lock(&lpc_data->access_lock); + len=sprintf(buf, "%s", str); + mutex_unlock(&lpc_data->access_lock); + + BSP_LOG_R("reg_val=%s", str); + + return len; +} + +/* set bsp value */ +static ssize_t write_bsp(const char *buf, char *str, size_t str_len, size_t count) +{ + mutex_lock(&lpc_data->access_lock); + snprintf(str, str_len, "%s", buf); + mutex_unlock(&lpc_data->access_lock); + + BSP_LOG_W("reg_val=%s", str); + + return count; +} + +/* get gpio max value */ +static ssize_t read_gpio_max(struct device *dev, + struct device_attribute *da, + char *buf) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + + if (attr->index == ATT_BSP_GPIO_MAX) { + return sprintf(buf, "%d\n", ARCH_NR_GPIOS-1); + } + return -1; +} + +/* get mb cpld version in human readable format */ +static ssize_t read_mb_cpld_version_h(struct device *dev, + struct device_attribute *da, char *buf) +{ + ssize_t len=0; + u8 major = 0, minor = 0, build = 0; + major = _read_lpc_reg(REG_CPLD_VERSION, MASK_CPLD_MAJOR_VER); + minor = _read_lpc_reg(REG_CPLD_VERSION, MASK_CPLD_MINOR_VER); + build = _read_lpc_reg(REG_CPLD_BUILD, MASK_ALL); + len=sprintf(buf, "%u.%02u.%03u", major, minor, build); + + return len; +} + +/* get lpc register value */ +static ssize_t read_lpc_callback(struct device *dev, + struct device_attribute *da, char *buf) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + u16 reg = 0; + u8 mask = MASK_ALL; + u8 data_type = DATA_UNK; + + if (attr->index == ATT_BSP_REG) { + //copy value from bsp_reg + if (kstrtou16(bsp_reg, 0, ®) < 0) + return -EINVAL; + + data_type = sysfs_info[attr->index].data_type; + } else { + reg = sysfs_info[attr->index].reg; + mask = sysfs_info[attr->index].mask; + data_type = sysfs_info[attr->index].data_type; + } + + return read_lpc_reg(reg, mask, buf, data_type); +} + +/* set lpc register value */ +static ssize_t write_lpc_callback(struct device *dev, + struct device_attribute *da, const char *buf, size_t count) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + u16 reg = 0; + u8 mask = MASK_ALL; + u8 data_type = DATA_UNK; + + reg = sysfs_info[attr->index].reg; + mask = sysfs_info[attr->index].mask; + data_type = sysfs_info[attr->index].data_type; + + if(attr->index == ATT_TEMP_MAC_HWM) { + bmc_mailbox_init(); + } + + return write_lpc_reg(reg, mask, buf, count, data_type); +} + +/* get bsp parameter value */ +static ssize_t read_bsp_callback(struct device *dev, + struct device_attribute *da, char *buf) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + char *str=NULL; + + switch (attr->index) { + case ATT_BSP_VERSION: + str = bsp_version; + break; + case ATT_BSP_DEBUG: + str = bsp_debug; + break; + case ATT_BSP_REG: + str = bsp_reg; + break; + default: + return -EINVAL; + } + return read_bsp(buf, str); +} + +/* set bsp parameter value */ +static ssize_t write_bsp_callback(struct device *dev, + struct device_attribute *da, const char *buf, size_t count) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + int str_len=0; + char *str=NULL; + u16 reg = 0; + u8 bsp_debug_u8 = 0; + + switch (attr->index) { + case ATT_BSP_VERSION: + str = bsp_version; + str_len = sizeof(bsp_version); + break; + case ATT_BSP_DEBUG: + str = bsp_debug; + str_len = sizeof(bsp_debug); + break; + case ATT_BSP_REG: + if (kstrtou16(buf, 0, ®) < 0) + return -EINVAL; + + str = bsp_reg; + str_len = sizeof(bsp_reg); + break; + default: + return -EINVAL; + } + + if (attr->index == ATT_BSP_DEBUG) { + if (kstrtou8(buf, 0, &bsp_debug_u8) < 0) { + return -EINVAL; + } else if (_config_bsp_log(bsp_debug_u8) < 0) { + return -EINVAL; + } + } + + return write_bsp(buf, str, str_len, count); +} + +static ssize_t write_bsp_pr_callback(struct device *dev, + struct device_attribute *da, const char *buf, size_t count) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + int str_len = strlen(buf); + + if(str_len <= 0) + return str_len; + + switch (attr->index) { + case ATT_BSP_PR_INFO: + BSP_PR(KERN_INFO, "%s", buf); + break; + case ATT_BSP_PR_ERR: + BSP_PR(KERN_ERR, "%s", buf); + break; + default: + return -EINVAL; + } + + return str_len; +} + +/* set mux_reset register value */ +static ssize_t write_mux_reset(struct device *dev, + struct device_attribute *da, const char *buf, size_t count) +{ + u16 reg = REG_I2C_MUX_RESET; + u8 val = 0; + u8 mux_reset_reg_val = 0; + static int mux_reset_flag = 0; + + if (kstrtou8(buf, 0, &val) < 0) + return -EINVAL; + + if (mux_reset_flag == 0) { + if (val == 0) { + mutex_lock(&lpc_data->access_lock); + mux_reset_flag = 1; + BSP_LOG_W("i2c mux reset is triggered..."); + + //reset mux on SFP/QSFP ports + mux_reset_reg_val = inb(reg); + _outb((mux_reset_reg_val & (u8) (~MASK_MUX_RESET)), reg); + BSP_LOG_W("reg=0x%03x, reg_val=0x%02x", reg, mux_reset_reg_val & 0x0); + + //unset mux on SFP/QSFP ports + outb((mux_reset_reg_val | MASK_MUX_RESET), reg); + mdelay(500); + BSP_LOG_W("reg=0x%03x, reg_val=0x%02x", reg, mux_reset_reg_val | 0xFF); + + mux_reset_flag = 0; + mutex_unlock(&lpc_data->access_lock); + } else { + return -EINVAL; + } + } else { + BSP_LOG_W("i2c mux is resetting... (ignore)"); + mutex_lock(&lpc_data->access_lock); + mutex_unlock(&lpc_data->access_lock); + } + + return count; +} + +//SENSOR_DEVICE_ATTR - MB +static _SENSOR_DEVICE_ATTR_RO(board_id_0, lpc_callback, ATT_BRD_ID_0); +static _SENSOR_DEVICE_ATTR_RO(board_id_1, lpc_callback, ATT_BRD_ID_1); +static _SENSOR_DEVICE_ATTR_RO(board_sku_id, lpc_callback, ATT_BRD_SKU_ID); +static _SENSOR_DEVICE_ATTR_RO(board_hw_id, lpc_callback, ATT_BRD_HW_ID); +static _SENSOR_DEVICE_ATTR_RO(board_deph_id, lpc_callback, ATT_BRD_DEPH_ID); +static _SENSOR_DEVICE_ATTR_RO(board_build_id, lpc_callback, ATT_BRD_BUILD_ID); +static _SENSOR_DEVICE_ATTR_RO(board_ext_id, lpc_callback, ATT_BRD_EXT_ID); +static _SENSOR_DEVICE_ATTR_RO(cpld_version_major, lpc_callback, ATT_CPLD_VERSION_MAJOR); +static _SENSOR_DEVICE_ATTR_RO(cpld_version_minor, lpc_callback, ATT_CPLD_VERSION_MINOR); +static _SENSOR_DEVICE_ATTR_RO(cpld_version_build, lpc_callback, ATT_CPLD_VERSION_BUILD); +static _SENSOR_DEVICE_ATTR_RO(cpld_version_h, mb_cpld_version_h, ATT_CPLD_VERSION_H); +static _SENSOR_DEVICE_ATTR_RO(cpld_id, lpc_callback, ATT_CPLD_ID); + +static _SENSOR_DEVICE_ATTR_WO(mux_reset, mux_reset, ATT_MUX_RESET); +static _SENSOR_DEVICE_ATTR_RW(mux_ctrl, lpc_callback, ATT_MUX_CTRL); + +//SENSOR_DEVICE_ATTR - BMC mailbox +static _SENSOR_DEVICE_ATTR_WO(temp_mac_hwm , lpc_callback , ATT_TEMP_MAC_HWM); + +//SENSOR_DEVICE_ATTR - EC +static _SENSOR_DEVICE_ATTR_RO(cpu_hw_id, lpc_callback, ATT_CPU_HW_ID); +static _SENSOR_DEVICE_ATTR_RO(cpu_deph_id, lpc_callback, ATT_CPU_DEPH_ID); +static _SENSOR_DEVICE_ATTR_RO(cpu_build_id, lpc_callback, ATT_CPU_BUILD_ID); +static _SENSOR_DEVICE_ATTR_RO(bios_boot_rom, lpc_callback, ATT_BIOS_BOOT_ROM); + +//SENSOR_DEVICE_ATTR - BSP +static _SENSOR_DEVICE_ATTR_RW(bsp_version, bsp_callback, ATT_BSP_VERSION); +static _SENSOR_DEVICE_ATTR_RW(bsp_debug, bsp_callback, ATT_BSP_DEBUG); +static _SENSOR_DEVICE_ATTR_WO(bsp_pr_info, bsp_pr_callback, ATT_BSP_PR_INFO); +static _SENSOR_DEVICE_ATTR_WO(bsp_pr_err, bsp_pr_callback, ATT_BSP_PR_ERR); +static SENSOR_DEVICE_ATTR(bsp_reg, S_IRUGO | S_IWUSR, read_lpc_callback, write_bsp_callback, ATT_BSP_REG); +static SENSOR_DEVICE_ATTR(bsp_gpio_max, S_IRUGO, read_gpio_max, NULL, ATT_BSP_GPIO_MAX); + +static struct attribute *mb_cpld_attrs[] = { + _DEVICE_ATTR(board_id_0), + _DEVICE_ATTR(board_id_1), + _DEVICE_ATTR(board_sku_id), + _DEVICE_ATTR(board_hw_id), + _DEVICE_ATTR(board_deph_id), + _DEVICE_ATTR(board_build_id), + _DEVICE_ATTR(board_ext_id), + _DEVICE_ATTR(cpld_version_major), + _DEVICE_ATTR(cpld_version_minor), + _DEVICE_ATTR(cpld_version_build), + _DEVICE_ATTR(cpld_version_h), + _DEVICE_ATTR(cpld_id), + _DEVICE_ATTR(mux_reset), + _DEVICE_ATTR(mux_ctrl), + NULL, +}; + +static struct attribute *bsp_attrs[] = { + _DEVICE_ATTR(bsp_version), + _DEVICE_ATTR(bsp_debug), + _DEVICE_ATTR(bsp_pr_info), + _DEVICE_ATTR(bsp_pr_err), + _DEVICE_ATTR(bsp_reg), + _DEVICE_ATTR(bsp_gpio_max), + NULL, +}; + +static struct attribute *ec_attrs[] = { + _DEVICE_ATTR(cpu_hw_id), + _DEVICE_ATTR(cpu_deph_id), + _DEVICE_ATTR(cpu_build_id), + _DEVICE_ATTR(bios_boot_rom), + NULL, +}; + +static struct attribute *bmc_mailbox_attrs[] = { + _DEVICE_ATTR(temp_mac_hwm), + NULL, +}; + +static struct attribute_group mb_cpld_attr_grp = { + .name = "mb_cpld", + .attrs = mb_cpld_attrs, +}; + +static struct attribute_group bsp_attr_grp = { + .name = "bsp", + .attrs = bsp_attrs, +}; + +static struct attribute_group ec_attr_grp = { + .name = "ec", + .attrs = ec_attrs, +}; + +static struct attribute_group bmc_mailbox_attr_grp = { + .name = "bmc_mailbox", + .attrs = bmc_mailbox_attrs, +}; + +static void lpc_dev_release( struct device * dev) +{ + return; +} + +static struct platform_device lpc_dev = { + .name = DRIVER_NAME, + .id = -1, + .dev = { + .release = lpc_dev_release, + } +}; + +static int lpc_drv_probe(struct platform_device *pdev) +{ + int i = 0, grp_num = 4; + int err[4] = {0}; + struct attribute_group *grp; + + lpc_data = devm_kzalloc(&pdev->dev, sizeof(struct lpc_data_s), + GFP_KERNEL); + if (!lpc_data) + return -ENOMEM; + + mutex_init(&lpc_data->access_lock); + + for (i=0; idev.kobj, grp); + if (err[i]) { + printk(KERN_ERR "Cannot create sysfs for group %s\n", grp->name); + goto exit; + } else { + continue; + } + } + + return 0; + +exit: + for (i=0; idev.kobj, grp); + if (!err[i]) { + //remove previous successful cases + continue; + } else { + //remove first failed case, then return + return err[i]; + } + } + return 0; +} + +static int lpc_drv_remove(struct platform_device *pdev) +{ + sysfs_remove_group(&pdev->dev.kobj, &mb_cpld_attr_grp); + sysfs_remove_group(&pdev->dev.kobj, &bmc_mailbox_attr_grp); + sysfs_remove_group(&pdev->dev.kobj, &bsp_attr_grp); + sysfs_remove_group(&pdev->dev.kobj, &ec_attr_grp); + + return 0; +} + +static struct platform_driver lpc_drv = { + .probe = lpc_drv_probe, + .remove = __exit_p(lpc_drv_remove), + .driver = { + .name = DRIVER_NAME, + }, +}; + +int lpc_init(void) +{ + int err = 0; + + err = platform_driver_register(&lpc_drv); + if (err) { + printk(KERN_ERR "%s(#%d): platform_driver_register failed(%d)\n", + __func__, __LINE__, err); + + return err; + } + + err = platform_device_register(&lpc_dev); + if (err) { + printk(KERN_ERR "%s(#%d): platform_device_register failed(%d)\n", + __func__, __LINE__, err); + platform_driver_unregister(&lpc_drv); + return err; + } + + return err; +} + +void lpc_exit(void) +{ + platform_driver_unregister(&lpc_drv); + platform_device_unregister(&lpc_dev); +} + +MODULE_AUTHOR("Jason Tsai "); +MODULE_DESCRIPTION("x86_64_ufispace_s8901_54xc_lpc driver"); +MODULE_LICENSE("GPL"); + +module_init(lpc_init); +module_exit(lpc_exit); diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s8901-54xc/modules/x86-64-ufispace-s8901-54xc-sys-eeprom.c b/platform/broadcom/sonic-platform-modules-ufispace/s8901-54xc/modules/x86-64-ufispace-s8901-54xc-sys-eeprom.c new file mode 100644 index 0000000000..f2f27cb0ae --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ufispace/s8901-54xc/modules/x86-64-ufispace-s8901-54xc-sys-eeprom.c @@ -0,0 +1,282 @@ +/* + * Copyright (C) 1998, 1999 Frodo Looijaard and + * Philip Edelbrock + * Copyright (C) 2003 Greg Kroah-Hartman + * Copyright (C) 2003 IBM Corp. + * Copyright (C) 2004 Jean Delvare + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +/* enable dev_dbg print out */ +//#define DEBUG + +#define __STDC_WANT_LIB_EXT1__ 1 +#include +#include +#include +#include +#include +#include +#include +#include + +#define _memset(s, c, n) memset(s, c, n) + +/* Addresses to scan */ +static const unsigned short normal_i2c[] = { /*0x50, 0x51, 0x52, 0x53, 0x54, + 0x55, 0x56, 0x57,*/ I2C_CLIENT_END }; + +/* Size of EEPROM in bytes */ +#define EEPROM_SIZE 512 + +#define SLICE_BITS (6) +#define SLICE_SIZE (1 << SLICE_BITS) +#define SLICE_NUM (EEPROM_SIZE/SLICE_SIZE) + +/* Each client has this additional data */ +struct eeprom_data { + struct mutex update_lock; + u8 valid; /* bitfield, bit!=0 if slice is valid */ + unsigned long last_updated[SLICE_NUM]; /* In jiffies, 8 slices */ + u8 data[EEPROM_SIZE]; /* Register values */ +}; + + +static void sys_eeprom_update_client(struct i2c_client *client, u8 slice) +{ + struct eeprom_data *data = i2c_get_clientdata(client); + int i, j; + int ret; + int addr; + + mutex_lock(&data->update_lock); + + if (!(data->valid & (1 << slice)) || + time_after(jiffies, data->last_updated[slice] + 300 * HZ)) { + dev_dbg(&client->dev, "Starting eeprom update, slice %u\n", slice); + + addr = slice << SLICE_BITS; + + ret = i2c_smbus_write_byte_data(client, (u8)((addr >> 8) & 0xFF), (u8)(addr & 0xFF)); + /* select the eeprom address */ + if (ret < 0) { + dev_err(&client->dev, "address set failed\n"); + goto exit; + } + + if (!i2c_check_functionality(client->adapter, I2C_FUNC_SMBUS_READ_BYTE)) { + goto exit; + } + + for (i = slice << SLICE_BITS; i < (slice + 1) << SLICE_BITS; i+= SLICE_SIZE) { + for (j = i; j < (i+SLICE_SIZE); j++) { + int res; + + res = i2c_smbus_read_byte(client); + if (res < 0) { + goto exit; + } + + data->data[j] = res & 0xFF; + } + } + + data->last_updated[slice] = jiffies; + data->valid |= (1 << slice); + } +exit: + mutex_unlock(&data->update_lock); +} + +static ssize_t sys_eeprom_read(struct file *filp, struct kobject *kobj, + struct bin_attribute *bin_attr, + char *buf, loff_t off, size_t count) +{ + struct i2c_client *client = to_i2c_client(container_of(kobj, struct device, kobj)); + struct eeprom_data *data = i2c_get_clientdata(client); + u8 slice; + + if (off > EEPROM_SIZE) { + return 0; + } + if (off + count > EEPROM_SIZE) { + count = EEPROM_SIZE - off; + } + if (count == 0) { + return 0; + } + + /* Only refresh slices which contain requested bytes */ + for (slice = off >> SLICE_BITS; slice <= (off + count - 1) >> SLICE_BITS; slice++) { + sys_eeprom_update_client(client, slice); + } + + memcpy(buf, &data->data[off], count); + + return count; +} + +static ssize_t sys_eeprom_write(struct file *filp, struct kobject *kobj, + struct bin_attribute *bin_attr, + char *buf, loff_t off, size_t count) +{ + struct i2c_client *client = to_i2c_client(container_of(kobj, struct device, kobj)); + struct eeprom_data *data = i2c_get_clientdata(client); + int ret; + int i; + u8 cmd; + u16 value16; + + dev_dbg(&client->dev, "sys_eeprom_write off=%d, count=%d\n", (int)off, (int)count); + + if (off > EEPROM_SIZE) { + return 0; + } + if (off + count > EEPROM_SIZE) { + count = EEPROM_SIZE - off; + } + if (count == 0) { + return 0; + } + + mutex_lock(&data->update_lock); + + for(i=0; i < count; i++) { + /* write command */ + cmd = (off >> 8) & 0xff; + value16 = off & 0xff; + value16 |= buf[i] << 8; + ret = i2c_smbus_write_word_data(client, cmd, value16); + + if (ret < 0) { + dev_err(&client->dev, "write address failed at %d \n", (int)off); + goto exit; + } + + off++; + + /* need to wait for write complete */ + udelay(10000); + } +exit: + mutex_unlock(&data->update_lock); + /* force to update client when reading */ + for(i=0; i < SLICE_NUM; i++) { + data->last_updated[i] = 0; + } + + return count; +} + +static struct bin_attribute sys_eeprom_attr = { + .attr = { + .name = "eeprom", + .mode = S_IRUGO | S_IWUSR, + }, + .size = EEPROM_SIZE, + .read = sys_eeprom_read, + .write = sys_eeprom_write, +}; + +/* Return 0 if detection is successful, -ENODEV otherwise */ +static int sys_eeprom_detect(struct i2c_client *client, struct i2c_board_info *info) +{ + struct i2c_adapter *adapter = client->adapter; + + /* EDID EEPROMs are often 24C00 EEPROMs, which answer to all + addresses 0x50-0x57, but we only care about 0x51 and 0x55. So decline + attaching to addresses >= 0x56 on DDC buses */ + if (!(adapter->class & I2C_CLASS_SPD) && client->addr >= 0x56) { + return -ENODEV; + } + + if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_READ_BYTE) + && !i2c_check_functionality(adapter, I2C_FUNC_SMBUS_WRITE_BYTE_DATA)) { + return -ENODEV; + } + + strlcpy(info->type, "eeprom", I2C_NAME_SIZE); + + return 0; +} + +static int sys_eeprom_probe(struct i2c_client *client, + const struct i2c_device_id *id) +{ + struct eeprom_data *data; + int err; + + if (!(data = kzalloc(sizeof(struct eeprom_data), GFP_KERNEL))) { + err = -ENOMEM; + goto exit; + } + +#ifdef __STDC_LIB_EXT1__ + memset_s(data->data, EEPROM_SIZE, 0xff, EEPROM_SIZE); +#else + _memset(data->data, 0xff, EEPROM_SIZE); +#endif + i2c_set_clientdata(client, data); + mutex_init(&data->update_lock); + + /* create the sysfs eeprom file */ + err = sysfs_create_bin_file(&client->dev.kobj, &sys_eeprom_attr); + if (err) { + goto exit_kfree; + } + + return 0; + +exit_kfree: + kfree(data); +exit: + return err; +} + +#if LINUX_VERSION_CODE < KERNEL_VERSION(6, 1, 0) +static int +#else +static void +#endif +sys_eeprom_remove(struct i2c_client *client) +{ + sysfs_remove_bin_file(&client->dev.kobj, &sys_eeprom_attr); + kfree(i2c_get_clientdata(client)); + +#if LINUX_VERSION_CODE < KERNEL_VERSION(6, 1, 0) + return 0; +#endif +} + +static const struct i2c_device_id sys_eeprom_id[] = { + { "sys_eeprom", 0 }, + { } +}; + +static struct i2c_driver sys_eeprom_driver = { + .driver = { + .name = "sys_eeprom", + }, + .probe = sys_eeprom_probe, + .remove = sys_eeprom_remove, + .id_table = sys_eeprom_id, + + .class = I2C_CLASS_DDC | I2C_CLASS_SPD, + .detect = sys_eeprom_detect, + .address_list = normal_i2c, +}; + +module_i2c_driver(sys_eeprom_driver); + +MODULE_AUTHOR("Jason "); +MODULE_DESCRIPTION("UfiSpace System EEPROM driver"); +MODULE_LICENSE("GPL"); diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s8901-54xc/service/pddf-platform-init.service b/platform/broadcom/sonic-platform-modules-ufispace/s8901-54xc/service/pddf-platform-init.service new file mode 120000 index 0000000000..0fd9f25b6c --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ufispace/s8901-54xc/service/pddf-platform-init.service @@ -0,0 +1 @@ +../../../../pddf/i2c/service/pddf-platform-init.service \ No newline at end of file diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s8901-54xc/sonic_platform/__init__.py b/platform/broadcom/sonic-platform-modules-ufispace/s8901-54xc/sonic_platform/__init__.py new file mode 100644 index 0000000000..593867d31c --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ufispace/s8901-54xc/sonic_platform/__init__.py @@ -0,0 +1,4 @@ +# All the derived classes for PDDF +__all__ = ["platform", "chassis", "sfp", "psu", "thermal", "fan"] +from . import platform + diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s8901-54xc/sonic_platform/chassis.py b/platform/broadcom/sonic-platform-modules-ufispace/s8901-54xc/sonic_platform/chassis.py new file mode 100644 index 0000000000..0b02f9a834 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ufispace/s8901-54xc/sonic_platform/chassis.py @@ -0,0 +1,204 @@ +#!/usr/bin/env python + +############################################################################# +# PDDF +# Module contains an implementation of SONiC Chassis API +# +############################################################################# + +try: + import time + from sonic_platform_pddf_base.pddf_chassis import PddfChassis +except ImportError as e: + raise ImportError(str(e) + "- required module not found") + +NUM_COMPONENT = 4 + +class Chassis(PddfChassis): + """ + PDDF Platform-specific Chassis class + """ + + SYSLED_DEV_NAME = "SYS_LED" + port_dict = {} + + def __init__(self, pddf_data=None, pddf_plugin_data=None): + PddfChassis.__init__(self, pddf_data, pddf_plugin_data) + self._initialize_components() + + def _initialize_components(self): + from sonic_platform.component import Component + for index in range(NUM_COMPONENT): + component = Component(index) + self._component_list.append(component) + + # Provide the functions/variables below for which implementation is to be overwritten + def get_name(self): + """ + Retrieves the name of the chassis + Returns: + string: The name of the chassis + """ + # return device_info.get_hwsku() + return self._eeprom.platform_name_str() + + def initizalize_system_led(self): + return True + + def get_status_led(self): + return self.get_system_led(self.SYSLED_DEV_NAME) + + def get_change_event(self, timeout=0): + """ + Returns a nested dictionary containing all devices which have + experienced a change at chassis level + Args: + timeout: Timeout in milliseconds (optional). If timeout == 0, + this method will block until a change is detected. + Returns: + (bool, dict): + - bool: True if call successful, False if not; + - dict: A nested dictionary where key is a device type, + value is a dictionary with key:value pairs in the format of + {'device_id':'device_event'}, where device_id is the device ID + for this device and device_event. + The known devices's device_id and device_event was defined as table below. + ----------------------------------------------------------------- + device | device_id | device_event | annotate + ----------------------------------------------------------------- + 'fan' '' '0' Fan removed + '1' Fan inserted + 'sfp' '' '0' Sfp removed + '1' Sfp inserted + '2' I2C bus stuck + '3' Bad eeprom + '4' Unsupported cable + '5' High Temperature + '6' Bad cable + 'voltage' '' '0' Vout normal + '1' Vout abnormal + -------------------------------------------------------------------- + Ex. {'fan':{'0':'0', '2':'1'}, 'sfp':{'11':'0', '12':'1'}, + 'voltage':{'U20':'0', 'U21':'1'}} + Indicates that: + fan 0 has been removed, fan 2 has been inserted. + sfp 11 has been removed, sfp 12 has been inserted. + monitored voltage U20 became normal, voltage U21 became abnormal. + Note: For sfp, when event 3-6 happened, the module will not be avalaible, + XCVRD shall stop to read eeprom before SFP recovered from error status. + """ + + change_event_dict = {"fan": {}, "sfp": {}, "voltage": {}} + + start_time = time.time() + forever = False + + if timeout == 0: + forever = True + elif timeout > 0: + timeout = timeout / float(1000) # Convert to secs + else: + print("get_change_event:Invalid timeout value", timeout) + return False, change_event_dict + + end_time = start_time + timeout + if start_time > end_time: + print( + "get_change_event:" "time wrap / invalid timeout value", + timeout, + ) + return False, change_event_dict # Time wrap or possibly incorrect timeout + try: + while timeout >= 0: + # check for sfp + sfp_change_dict = self.get_transceiver_change_event() + # check for fan + # fan_change_dict = self.get_fan_change_event() + # check for voltage + # voltage_change_dict = self.get_voltage_change_event() + + if sfp_change_dict: + change_event_dict["sfp"] = sfp_change_dict + # change_event_dict["fan"] = fan_change_dict + # change_event_dict["voltage"] = voltage_change_dict + return True, change_event_dict + if forever: + time.sleep(1) + else: + timeout = end_time - time.time() + if timeout >= 1: + time.sleep(1) # We poll at 1 second granularity + else: + if timeout > 0: + time.sleep(timeout) + return True, change_event_dict + except Exception as e: + print(e) + print("get_change_event: Should not reach here.") + return False, change_event_dict + + def get_transceiver_change_event(self): + current_port_dict = {} + ret_dict = {} + + # Check for OIR events and return ret_dict + for index in range(self.platform_inventory['num_ports']): + if self._sfp_list[index].get_presence(): + #current_port_dict[index] = self.STATUS_INSERTED + current_port_dict[index] = self.plugin_data['XCVR']['plug_status']['inserted'] + else: + #current_port_dict[index] = self.STATUS_REMOVED + current_port_dict[index] = self.plugin_data['XCVR']['plug_status']['removed'] + + if len(self.port_dict) == 0: # first time + self.port_dict = current_port_dict + return {} + + if current_port_dict == self.port_dict: + return {} + + # Update reg value + for index, status in current_port_dict.items(): + if self.port_dict[index] != status: + ret_dict[index] = status + #ret_dict[str(index)] = status + self.port_dict = current_port_dict + for index, status in ret_dict.items(): + if int(status) == 1: + pass + #self._sfp_list[int(index)].check_sfp_optoe_type() + return ret_dict + + def get_reboot_cause(self): + """ + Retrieves the cause of the previous reboot + + Returns: + A tuple (string, string) where the first element is a string + containing the cause of the previous reboot. This string must be + one of the predefined strings in this class. If the first string + is "REBOOT_CAUSE_HARDWARE_OTHER", the second string can be used + to pass a description of the reboot cause. + """ + + reboot_cause_path = self.plugin_data['REBOOT_CAUSE']['reboot_cause_file'] + + try: + with open(reboot_cause_path, 'r', errors='replace') as fd: + data = fd.read() + sw_reboot_cause = data.strip() + except IOError: + sw_reboot_cause = "Unknown" + + return ('REBOOT_CAUSE_NON_HARDWARE', sw_reboot_cause) + + def get_serial_number(self): + """ + Retrieves the hardware serial number for the chassis + + Returns: + A string containing the hardware serial number for this + chassis. + """ + + return self.get_serial() \ No newline at end of file diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s8901-54xc/sonic_platform/component.py b/platform/broadcom/sonic-platform-modules-ufispace/s8901-54xc/sonic_platform/component.py new file mode 100644 index 0000000000..d5d8d8226f --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ufispace/s8901-54xc/sonic_platform/component.py @@ -0,0 +1,117 @@ +############################################################################# +# +# Component contains an implementation of SONiC Platform Base API and +# provides the components firmware management function +# +############################################################################# + +try: + import subprocess + from sonic_platform_base.component_base import ComponentBase + from sonic_platform_pddf_base import pddfapi +except ImportError as e: + raise ImportError(str(e) + "- required module not found") + +CPLD_SYSFS = { + "CPLD1": {"major": "cpld1_major_ver", "minor": "cpld1_minor_ver", "build": "cpld1_build"}, + "CPLD2": {"major": "cpld2_major_ver", "minor": "cpld2_minor_ver", "build": "cpld2_build"}, +} + +BMC_CMDS = { + "BMC": "bash -c 'tmp=$(ipmitool raw 0x6 0x1) && r=($(echo \"$tmp\" | cut -d \" \" -f 4,5,16,15,14)) && echo ${r[0]}.${r[1]}.${r[4]}.${r[3]}${r[2]}'", +} + +BIOS_VERSION_PATH = "/sys/class/dmi/id/bios_version" +COMPONENT_LIST= [ + ("CPLD1", "CPLD 1"), + ("CPLD2", "CPLD 2"), + ("BIOS", "Basic Input/Output System"), + ("BMC", "BMC"), +] + +class Component(ComponentBase): + """Platform-specific Component class""" + + DEVICE_TYPE = "component" + + def __init__(self, component_index=0): + self.pddf_obj = pddfapi.PddfApi() + self.index = component_index + self.name = self.get_name() + + def _get_bios_version(self): + # Retrieves the BIOS firmware version + try: + with open(BIOS_VERSION_PATH, 'r') as fd: + bios_version = fd.read() + return bios_version.strip() + except Exception as e: + return None + + def _get_cpld_version(self): + # Retrieves the CPLD firmware version + cpld_version = dict() + for cpld_name, elem in CPLD_SYSFS.items(): + device = "SYSSTATUS" + major = self.pddf_obj.get_attr_name_output(device, elem["major"]) + minor = self.pddf_obj.get_attr_name_output(device, elem["minor"]) + build = self.pddf_obj.get_attr_name_output(device, elem["build"]) + if major and minor and build: + major = int(major['status'].rstrip(),0) + minor = int(minor['status'].rstrip(),0) + build = int(build['status'].rstrip(),0) + cpld_version[cpld_name] = "{}.{:02d}.{:03d}".format(major, minor, build) + else: + cpld_version[cpld_name] = "N/A" + return cpld_version + + def _get_bmc_version(self): + # Retrieves the BMC firmware version + status, value = subprocess.getstatusoutput(BMC_CMDS["BMC"]) + if not status: + return value + else: + return None + + def get_name(self): + """ + Retrieves the name of the component + Returns: + A string containing the name of the component + """ + return COMPONENT_LIST[self.index][0] + + def get_description(self): + """ + Retrieves the description of the component + Returns: + A string containing the description of the component + """ + return COMPONENT_LIST[self.index][1] + + def get_firmware_version(self): + """ + Retrieves the firmware version of module + Returns: + string: The firmware versions of the module + """ + fw_version = None + + if self.name == "BIOS": + fw_version = self._get_bios_version() + elif "CPLD" in self.name: + cpld_version = self._get_cpld_version() + fw_version = cpld_version.get(self.name) + elif self.name == "BMC": + fw_version = self._get_bmc_version() + return fw_version + + def install_firmware(self, image_path): + """ + Install firmware to module + Args: + image_path: A string, path to firmware image + Returns: + A boolean, True if install successfully, False if not + """ + raise NotImplementedError diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s8901-54xc/sonic_platform/eeprom.py b/platform/broadcom/sonic-platform-modules-ufispace/s8901-54xc/sonic_platform/eeprom.py new file mode 100644 index 0000000000..90ab1c779a --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ufispace/s8901-54xc/sonic_platform/eeprom.py @@ -0,0 +1,21 @@ +#!/usr/bin/env python + +try: + from sonic_platform_pddf_base.pddf_eeprom import PddfEeprom +except ImportError as e: + raise ImportError(str(e) + "- required module not found") + + +class Eeprom(PddfEeprom): + + def __init__(self, pddf_data=None, pddf_plugin_data=None): + PddfEeprom.__init__(self, pddf_data, pddf_plugin_data) + + # Provide the functions/variables below for which implementation is to be overwritten + + def platform_name_str(self): + (is_valid, results) = self.get_tlv_field(self.eeprom_data, self._TLV_CODE_PLATFORM_NAME) + if not is_valid: + return "N/A" + + return results[2].decode('ascii') \ No newline at end of file diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s8901-54xc/sonic_platform/fan.py b/platform/broadcom/sonic-platform-modules-ufispace/s8901-54xc/sonic_platform/fan.py new file mode 100644 index 0000000000..c3cb875646 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ufispace/s8901-54xc/sonic_platform/fan.py @@ -0,0 +1,158 @@ +#!/usr/bin/env python + + +try: + from sonic_platform_pddf_base.pddf_fan import PddfFan +except ImportError as e: + raise ImportError(str(e) + "- required module not found") + + +class Fan(PddfFan): + """PDDF Platform-Specific Fan class""" + + def __init__(self, tray_idx, fan_idx=0, pddf_data=None, pddf_plugin_data=None, is_psu_fan=False, psu_index=0): + # idx is 0-based + PddfFan.__init__(self, tray_idx, fan_idx, pddf_data, pddf_plugin_data, is_psu_fan, psu_index) + + # Provide the functions/variables below for which implementation is to be overwritten + # Since psu_fan airflow direction cant be read from sysfs, it is fixed as 'F2B' or 'intake' + + def get_mfr_id(self): + """ + Retrieves the manufacturer id of the device + + Returns: + string: Manufacturer Id of device + """ + if self.is_psu_fan: + device = "PSU{}".format(self.fans_psu_index) + output = self.pddf_obj.get_attr_name_output(device, "psu_mfr_id") + else: + raise NotImplementedError + + if not output: + return None + + mfr = output['status'] + + # strip_non_ascii + stripped = (c for c in mfr if 0 < ord(c) < 127) + mfr = ''.join(stripped) + + return mfr.rstrip('\n') + + def get_model(self): + """ + Retrieves the model number (or part number) of the device + + Returns: + string: Model/part number of device + """ + if self.is_psu_fan: + device = "PSU{}".format(self.fans_psu_index) + output = self.pddf_obj.get_attr_name_output(device, "psu_model_name") + else: + raise NotImplementedError + + if not output: + return None + + model = output['status'] + + # strip_non_ascii + stripped = (c for c in model if 0 < ord(c) < 127) + model = ''.join(stripped) + + return model.rstrip('\n') + + def get_max_speed(self): + """ + Retrieves the max speed + + Returns: + An Integer, the max speed + """ + if self.is_psu_fan: + mfr = self.get_mfr_id() + model = self.get_model() + + max_speed = int(self.plugin_data['PSU']['valmap']['PSU_FAN_MAX_SPEED_AC']) + if mfr and model : + for dev in self.plugin_data['PSU']['psu_support_list']: + if dev['Manufacturer'] == mfr and dev['Name'] == model: + max_speed = int(self.plugin_data['PSU']['valmap'][dev['MaxSpd']]) + break + else: + max_speed = int(self.plugin_data['FAN']['FAN_MAX_SPEED']) + + return max_speed + + def get_speed(self): + """ + Retrieves the speed of fan as a percentage of full speed + + Returns: + An integer, the percentage of full fan speed, in the range 0 (off) + to 100 (full speed) + """ + speed_percentage = 0 + + max_speed = self.get_max_speed() + rpm_speed = self.get_speed_rpm() + + speed_percentage = round((rpm_speed*100)/max_speed) + + return min(speed_percentage, 100) + + def get_presence(self): + """ + Retrieves the presence of the device + Returns: + bool: True if device is present, False if not + """ + if self.is_psu_fan: + attr_name = "psu_present" + device = "PSU{}".format(self.fans_psu_index) + else: + idx = (self.fantray_index-1)*self.platform['num_fans_pertray'] + self.fan_index + attr_name = "fan" + str(idx) + "_present" + device = "FAN-CTRL" + + output = self.pddf_obj.get_attr_name_output(device, attr_name) + if not output: + return False + + mode = output['mode'] + presence = output['status'].rstrip() + vmap = self.plugin_data['FAN']['present'][mode]['valmap'] + + if presence in vmap: + status = vmap[presence] + else: + status = False + + return status + + def get_target_speed(self): + """ + Retrieves the target (expected) speed of the fan + Returns: + An integer, the percentage of full fan speed, in the range 0 (off) + to 100 (full speed) + """ + return self.get_speed() + + def set_speed(self, speed): + """ + Sets the fan speed + + Args: + speed: An integer, the percentage of full fan speed to set fan to, + in the range 0 (off) to 100 (full speed) + + Returns: + A boolean, True if speed is set successfully, False if not + """ + + print("Setting Fan speed is not allowed") + return False diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s8901-54xc/sonic_platform/fan_drawer.py b/platform/broadcom/sonic-platform-modules-ufispace/s8901-54xc/sonic_platform/fan_drawer.py new file mode 100644 index 0000000000..3b9bb607f6 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ufispace/s8901-54xc/sonic_platform/fan_drawer.py @@ -0,0 +1,17 @@ +#!/usr/bin/env python + + +try: + from sonic_platform_pddf_base.pddf_fan_drawer import PddfFanDrawer +except ImportError as e: + raise ImportError(str(e) + "- required module not found") + + +class FanDrawer(PddfFanDrawer): + """PDDF Platform-Specific Fan-Drawer class""" + + def __init__(self, tray_idx, pddf_data=None, pddf_plugin_data=None): + # idx is 0-based + PddfFanDrawer.__init__(self, tray_idx, pddf_data, pddf_plugin_data) + + # Provide the functions/variables below for which implementation is to be overwritten diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s8901-54xc/sonic_platform/platform.py b/platform/broadcom/sonic-platform-modules-ufispace/s8901-54xc/sonic_platform/platform.py new file mode 100644 index 0000000000..406b1179ae --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ufispace/s8901-54xc/sonic_platform/platform.py @@ -0,0 +1,25 @@ +#!/usr/bin/env python + +############################################################################# +# PDDF +# Module contains an implementation of SONiC Platform Base API and +# provides the platform information +# +############################################################################# + + +try: + from sonic_platform_pddf_base.pddf_platform import PddfPlatform +except ImportError as e: + raise ImportError(str(e) + "- required module not found") + + +class Platform(PddfPlatform): + """ + PDDF Platform-Specific Platform Class + """ + + def __init__(self): + PddfPlatform.__init__(self) + + # Provide the functions/variables below for which implementation is to be overwritten diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s8901-54xc/sonic_platform/psu.py b/platform/broadcom/sonic-platform-modules-ufispace/s8901-54xc/sonic_platform/psu.py new file mode 100644 index 0000000000..cae5832540 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ufispace/s8901-54xc/sonic_platform/psu.py @@ -0,0 +1,67 @@ +#!/usr/bin/env python + + +try: + from sonic_platform_pddf_base.pddf_psu import PddfPsu +except ImportError as e: + raise ImportError (str(e) + "- required module not found") + + +class Psu(PddfPsu): + """PDDF Platform-Specific PSU class""" + + PLATFORM_PSU_CAPACITY = 450 + + def __init__(self, index, pddf_data=None, pddf_plugin_data=None): + PddfPsu.__init__(self, index, pddf_data, pddf_plugin_data) + + # Provide the functions/variables below for which implementation is to be overwritten + def get_maximum_supplied_power(self): + """ + Retrieves the maximum supplied power by PSU (or PSU capacity) + Returns: + A float number, the maximum power output in Watts. + e.g. 1200.1 + """ + return float(self.PLATFORM_PSU_CAPACITY) + + def get_power(self): + """ + Retrieves current energy supplied by PSU + + Returns: + A float number, the power in watts, + e.g. 302.6 + """ + + # power is returned in micro watts + return round(float(self.get_voltage()*self.get_current()), 2) + + def get_capacity(self): + """ + Retrieves the maximum supplied power by PSU (or PSU capacity) + Returns: + A float number, the maximum power output in Watts. + e.g. 1200.1 + """ + return self.get_maximum_supplied_power() + + def get_type(self): + """ + Gets the type of the PSU + + Returns: + A string, the type of PSU (AC/DC) + """ + mfr = self.get_mfr_id() + model = self.get_model() + ptype = self.plugin_data['PSU']['valmap']['DEFAULT_TYPE'] + + if mfr and model : + for dev in self.plugin_data['PSU']['psu_support_list']: + if dev['Manufacturer'] == mfr and dev['Name'] == model: + ptype = dev['Type'] + break + + + return ptype \ No newline at end of file diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s8901-54xc/sonic_platform/sfp.py b/platform/broadcom/sonic-platform-modules-ufispace/s8901-54xc/sonic_platform/sfp.py new file mode 100644 index 0000000000..8ab43117d5 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ufispace/s8901-54xc/sonic_platform/sfp.py @@ -0,0 +1,49 @@ +#!/usr/bin/env python + +try: + from sonic_platform_pddf_base.pddf_sfp import PddfSfp +except ImportError as e: + raise ImportError (str(e) + "- required module not found") + + +class Sfp(PddfSfp): + """ + PDDF Platform-Specific Sfp class + """ + + def __init__(self, index, pddf_data=None, pddf_plugin_data=None): + PddfSfp.__init__(self, index, pddf_data, pddf_plugin_data) + self.index = index + + # Provide the functions/variables below for which implementation is to be overwritten + + def get_lpmode(self): + if self.sfp_type == "QSFP28": + return super().get_lpmode() + else: + return False + + def set_lpmode(self, lpmode): + if self.sfp_type == "QSFP28": + return super().set_lpmode(lpmode) + else: + return False + + def reset(self): + if self.sfp_type == "QSFP28": + return super().reset() + else: + return False + + def get_error_description(self): + """ + Retrives the error descriptions of the SFP module + Returns: + String that represents the current error descriptions of vendor specific errors + In case there are multiple errors, they should be joined by '|', + like: "Bad EEPROM|Unsupported cable" + """ + if not self.get_presence(): + return self.SFP_STATUS_UNPLUGGED + + return self.SFP_STATUS_OK diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s8901-54xc/sonic_platform/thermal.py b/platform/broadcom/sonic-platform-modules-ufispace/s8901-54xc/sonic_platform/thermal.py new file mode 100644 index 0000000000..77d6ec7ae8 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ufispace/s8901-54xc/sonic_platform/thermal.py @@ -0,0 +1,17 @@ +#!/usr/bin/env python + + +try: + from sonic_platform_pddf_base.pddf_thermal import PddfThermal +except ImportError as e: + raise ImportError(str(e) + "- required module not found") + + + +class Thermal(PddfThermal): + """PDDF Platform-Specific Thermal class""" + + def __init__(self, index, pddf_data=None, pddf_plugin_data=None, is_psu_thermal=False, psu_index=0): + PddfThermal.__init__(self, index, pddf_data, pddf_plugin_data, is_psu_thermal, psu_index) + + # Provide the functions/variables below for which implementation is to be overwritten diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s8901-54xc/sonic_platform_setup.py b/platform/broadcom/sonic-platform-modules-ufispace/s8901-54xc/sonic_platform_setup.py new file mode 100644 index 0000000000..c0a485320c --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ufispace/s8901-54xc/sonic_platform_setup.py @@ -0,0 +1,27 @@ +from setuptools import setup + +setup( + name='sonic-platform', + version='1.0', + description='SONiC platform API implementation on ufispace platform', + license='Apache 2.0', + author='SONiC Team', + author_email='linuxnetdev@microsoft.com', + url='https://github.com/Azure/sonic-buildimage', + maintainer='Jason Tsai', + maintainer_email='jason.cy.tsai@ufispace.com', + packages=['sonic_platform'], + classifiers=[ + 'Development Status :: 3 - Alpha', + 'Environment :: Plugins', + 'Intended Audience :: Developers', + 'Intended Audience :: Information Technology', + 'Intended Audience :: System Administrators', + 'License :: OSI Approved :: Apache Software License', + 'Natural Language :: English', + 'Operating System :: POSIX :: Linux', + 'Programming Language :: Python :: 3.7', + 'Topic :: Utilities', + ], + keywords='sonic SONiC platform PLATFORM', +) diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s8901-54xc/utils/pddf_post_device_create.sh b/platform/broadcom/sonic-platform-modules-ufispace/s8901-54xc/utils/pddf_post_device_create.sh new file mode 100755 index 0000000000..c6fe10aba3 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ufispace/s8901-54xc/utils/pddf_post_device_create.sh @@ -0,0 +1,16 @@ +#!/bin/bash + +#disable bmc watchdog +echo "Disable BMC watchdog" +timeout 3 ipmitool mc watchdog off + +pddf_ledutil setstatusled SYNC_LED off +pddf_ledutil setstatusled SYS_LED off +pddf_ledutil setstatusled LOC_LED off + +#set status led to green to indicate platform init done +curr_led=$(pddf_ledutil getstatusled SYS_LED) +pddf_ledutil setstatusled SYS_LED green +echo "Set SYS_LED from $curr_led to green" + +echo "PDDF device post-create completed" diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s8901-54xc/utils/pddf_post_driver_install.sh b/platform/broadcom/sonic-platform-modules-ufispace/s8901-54xc/utils/pddf_post_driver_install.sh new file mode 100755 index 0000000000..ed2559977e --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ufispace/s8901-54xc/utils/pddf_post_driver_install.sh @@ -0,0 +1,2 @@ +#!/bin/bash +echo "PDDF driver post-install completed" diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s8901-54xc/utils/pddf_switch_svc.py b/platform/broadcom/sonic-platform-modules-ufispace/s8901-54xc/utils/pddf_switch_svc.py new file mode 100755 index 0000000000..ca34fe9442 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ufispace/s8901-54xc/utils/pddf_switch_svc.py @@ -0,0 +1,50 @@ +#!/usr/bin/env python +# Script to stop and start the respective platforms default services. +# This will be used while switching the pddf->non-pddf mode and vice versa +import commands + +def check_pddf_support(): + return True + +def stop_platform_svc(): + + status, output = commands.getstatusoutput("/usr/local/bin/platform_utility.py deinit") + if status: + print "platform_utility.py deinit command failed %d"%status + return False + + # HACK , stop the pddf-platform-init service if it is active + status, output = commands.getstatusoutput("systemctl stop pddf-platform-init.service") + if status: + print "Stop pddf-platform-init.service along with other platform serives failed %d"%status + return False + + return True + +def start_platform_svc(): + + status, output = commands.getstatusoutput("/usr/local/bin/platform_utility.py init") + if status: + print "platform_utility.py init command failed %d"%status + return False + + return True + +def start_platform_pddf(): + + status, output = commands.getstatusoutput("systemctl start pddf-platform-init.service") + if status: + print "Start pddf-platform-init.service failed %d"%status + return False + + return True + +def stop_platform_pddf(): + + status, output = commands.getstatusoutput("systemctl stop pddf-platform-init.service") + if status: + print "Stop pddf-platform-init.service failed %d"%status + return False + + return True + diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s9110-32x/modules/Makefile b/platform/broadcom/sonic-platform-modules-ufispace/s9110-32x/modules/Makefile new file mode 100644 index 0000000000..93d0f3e46f --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ufispace/s9110-32x/modules/Makefile @@ -0,0 +1,6 @@ + +MODULE_NAME = x86-64-ufispace-s9110-32x-cpld.o x86-64-ufispace-s9110-32x-sys-eeprom.o x86-64-ufispace-s9110-32x-lpc.o pddf_custom_sysstatus_module.o +obj-m := $(MODULE_NAME) + +CFLAGS_pddf_custom_sysstatus_module.o := -I$(M)/../../../../pddf/i2c/modules/include +KBUILD_EXTRA_SYMBOLS := $(M)/../../../../pddf/i2c/Module.symvers.PDDF diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s9110-32x/modules/pddf_custom_sysstatus_module.c b/platform/broadcom/sonic-platform-modules-ufispace/s9110-32x/modules/pddf_custom_sysstatus_module.c new file mode 100644 index 0000000000..a2c85f8500 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ufispace/s9110-32x/modules/pddf_custom_sysstatus_module.c @@ -0,0 +1,276 @@ +/* + * Copyright 2019 Broadcom. + * The term ��Broadcom�� refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * + * A pddf kernel module for system status registers + */ + +#define __STDC_WANT_LIB_EXT1__ 1 +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include "../../../../pddf/i2c/modules/include/pddf_client_defs.h" +#include "../../../../pddf/i2c/modules/include/pddf_sysstatus_defs.h" + +#define _memset(s, c, n) memset(s, c, n) + +SYSSTATUS_DATA sysstatus_data = {0}; + +extern int board_i2c_cpld_read(unsigned short cpld_addr, u8 reg); +extern int board_i2c_cpld_write(unsigned short cpld_addr, u8 reg, u8 value); + +static ssize_t do_attr_operation(struct device *dev, struct device_attribute *da, const char *buf, size_t count); +ssize_t show_sysstatus_data(struct device *dev, struct device_attribute *da, char *buf); +ssize_t store_sysstatus_data(struct device *dev, struct device_attribute *da, const char *buf, size_t count); + + +PDDF_DATA_ATTR(attr_name, S_IWUSR|S_IRUGO, show_pddf_data, store_pddf_data, PDDF_CHAR, 32, + (void*)&sysstatus_data.sysstatus_addr_attr.aname, NULL); +PDDF_DATA_ATTR(attr_devaddr, S_IWUSR|S_IRUGO, show_pddf_data, store_pddf_data, PDDF_UINT32, + sizeof(uint32_t), (void*)&sysstatus_data.sysstatus_addr_attr.devaddr , NULL); +PDDF_DATA_ATTR(attr_offset, S_IWUSR|S_IRUGO, show_pddf_data, store_pddf_data, PDDF_UINT32, + sizeof(uint32_t), (void*)&sysstatus_data.sysstatus_addr_attr.offset, NULL); +PDDF_DATA_ATTR(attr_mask, S_IWUSR|S_IRUGO, show_pddf_data, store_pddf_data, PDDF_UINT32, + sizeof(uint32_t), (void*)&sysstatus_data.sysstatus_addr_attr.mask , NULL); +PDDF_DATA_ATTR(attr_len, S_IWUSR|S_IRUGO, show_pddf_data, store_pddf_data, PDDF_UINT32, + sizeof(uint32_t), (void*)&sysstatus_data.sysstatus_addr_attr.len , NULL); +PDDF_DATA_ATTR(attr_ops, S_IWUSR, NULL, do_attr_operation, PDDF_CHAR, 8, (void*)&sysstatus_data, NULL); + + + +static struct attribute *sysstatus_addr_attributes[] = { + &attr_attr_name.dev_attr.attr, + &attr_attr_devaddr.dev_attr.attr, + &attr_attr_offset.dev_attr.attr, + &attr_attr_mask.dev_attr.attr, + &attr_attr_len.dev_attr.attr, + &attr_attr_ops.dev_attr.attr, + NULL +}; + +PDDF_DATA_ATTR(board_sku_id , S_IRUGO, show_sysstatus_data, NULL, PDDF_UCHAR, sizeof(u8), NULL, NULL); +PDDF_DATA_ATTR(board_hw_id , S_IRUGO, show_sysstatus_data, NULL, PDDF_UCHAR, sizeof(u8), NULL, NULL); +PDDF_DATA_ATTR(board_deph_id , S_IRUGO, show_sysstatus_data, NULL, PDDF_UCHAR, sizeof(u8), NULL, NULL); +PDDF_DATA_ATTR(board_build_id , S_IRUGO, show_sysstatus_data, NULL, PDDF_UCHAR, sizeof(u8), NULL, NULL); +PDDF_DATA_ATTR(cpld1_major_ver, S_IRUGO, show_sysstatus_data, NULL, PDDF_UCHAR, sizeof(u8), NULL, NULL); +PDDF_DATA_ATTR(cpld1_minor_ver, S_IRUGO, show_sysstatus_data, NULL, PDDF_UCHAR, sizeof(u8), NULL, NULL); +PDDF_DATA_ATTR(cpld1_build , S_IRUGO, show_sysstatus_data, NULL, PDDF_UCHAR, sizeof(u8), NULL, NULL); +PDDF_DATA_ATTR(cpld2_major_ver, S_IRUGO, show_sysstatus_data, NULL, PDDF_UCHAR, sizeof(u8), NULL, NULL); +PDDF_DATA_ATTR(cpld2_minor_ver, S_IRUGO, show_sysstatus_data, NULL, PDDF_UCHAR, sizeof(u8), NULL, NULL); +PDDF_DATA_ATTR(cpld2_build , S_IRUGO, show_sysstatus_data, NULL, PDDF_UCHAR, sizeof(u8), NULL, NULL); +PDDF_DATA_ATTR(psu_status , S_IRUGO, show_sysstatus_data, NULL, PDDF_UCHAR, sizeof(u8), NULL, NULL); +PDDF_DATA_ATTR(system_led_psu , S_IRUGO, show_sysstatus_data, NULL, PDDF_UCHAR, sizeof(u8), NULL, NULL); +PDDF_DATA_ATTR(system_led_sys , S_IWUSR|S_IRUGO, show_sysstatus_data, store_sysstatus_data, PDDF_UCHAR, sizeof(u8), NULL, NULL); +PDDF_DATA_ATTR(system_led_fan , S_IRUGO, show_sysstatus_data, NULL, PDDF_UCHAR, sizeof(u8), NULL, NULL); +PDDF_DATA_ATTR(system_led_id , S_IWUSR|S_IRUGO, show_sysstatus_data, store_sysstatus_data, PDDF_UCHAR, sizeof(u8), NULL, NULL); + +static struct attribute *sysstatus_data_attributes[] = { + &attr_board_sku_id.dev_attr.attr, + &attr_board_hw_id.dev_attr.attr, + &attr_board_deph_id.dev_attr.attr, + &attr_board_build_id.dev_attr.attr, + &attr_cpld1_major_ver.dev_attr.attr, + &attr_cpld1_minor_ver.dev_attr.attr, + &attr_cpld1_build.dev_attr.attr, + &attr_cpld2_major_ver.dev_attr.attr, + &attr_cpld2_minor_ver.dev_attr.attr, + &attr_cpld2_build.dev_attr.attr, + &attr_psu_status.dev_attr.attr, + &attr_system_led_psu.dev_attr.attr, + &attr_system_led_sys.dev_attr.attr, + &attr_system_led_fan.dev_attr.attr, + &attr_system_led_id.dev_attr.attr, + NULL +}; + + +static const struct attribute_group pddf_sysstatus_addr_group = { + .attrs = sysstatus_addr_attributes, +}; + + +static const struct attribute_group pddf_sysstatus_data_group = { + .attrs = sysstatus_data_attributes, +}; + + +static struct kobject *sysstatus_addr_kobj; +static struct kobject *sysstatus_data_kobj; + + + +ssize_t show_sysstatus_data(struct device *dev, struct device_attribute *da, char *buf) +{ + + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + + SYSSTATUS_DATA *data = &sysstatus_data; + struct SYSSTATUS_ADDR_ATTR *sysstatus_addr_attrs = NULL; + int i, status ; + + + for (i=0;isysstatus_addr_attrs[i].aname, attr->dev_attr.attr.name) == 0 ) + { + sysstatus_addr_attrs = &data->sysstatus_addr_attrs[i]; + + } + } + + if (sysstatus_addr_attrs==NULL ) + { + printk(KERN_DEBUG "%s is not supported attribute for this client\n",attr->dev_attr.attr.name); + status = 0; + return sprintf(buf, "0x%x\n", status); + } + else + { + status = board_i2c_cpld_read( sysstatus_addr_attrs->devaddr, sysstatus_addr_attrs->offset); + } + + return sprintf(buf, "0x%x\n", (status&sysstatus_addr_attrs->mask)); + +} + +ssize_t store_sysstatus_data(struct device *dev, struct device_attribute *da, const char *buf, size_t count) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + + SYSSTATUS_DATA *data = &sysstatus_data; + struct SYSSTATUS_ADDR_ATTR *sysstatus_addr_attrs = NULL; + int i, status ; + u8 reg_val; + + for (i=0;isysstatus_addr_attrs[i].aname, attr->dev_attr.attr.name) == 0 ) + { + sysstatus_addr_attrs = &data->sysstatus_addr_attrs[i]; + } + } + + if (sysstatus_addr_attrs==NULL) + { + printk(KERN_DEBUG "%s is not supported attribute for this client\n",attr->dev_attr.attr.name); + return -EINVAL; + } + else + { + if (kstrtou8(buf, 0, ®_val) < 0) + return -EINVAL; + + status = board_i2c_cpld_write(sysstatus_addr_attrs->devaddr, sysstatus_addr_attrs->offset, reg_val); + + if (status!=0) + { + printk(KERN_DEBUG "store_sysstatus_data() %s failed, status=%d\n",data->sysstatus_addr_attrs[i].aname, status); + return status; + } + } + + return count; +} + + + +static ssize_t do_attr_operation(struct device *dev, struct device_attribute *da, const char *buf, size_t count) +{ + PDDF_ATTR *ptr = (PDDF_ATTR *)da; + SYSSTATUS_DATA *pdata = (SYSSTATUS_DATA *)(ptr->addr); + + pdata->sysstatus_addr_attrs[pdata->len] = pdata->sysstatus_addr_attr; + pdata->len++; + pddf_dbg(SYSSTATUS, KERN_ERR "%s: Populating the data for %s\n", __FUNCTION__, pdata->sysstatus_addr_attr.aname); + +#ifdef __STDC_LIB_EXT1__ + memset_s(&pdata->sysstatus_addr_attr, sizeof(pdata->sysstatus_addr_attr, 0, sizeof(pdata->sysstatus_addr_attr)); +#else + _memset(&pdata->sysstatus_addr_attr, 0, sizeof(pdata->sysstatus_addr_attr)); +#endif + + return count; +} + + + + +int __init sysstatus_data_init(void) +{ + struct kobject *device_kobj; + int ret = 0; + + + pddf_dbg(SYSSTATUS, "PDDF SYSSTATUS MODULE.. init\n"); + + device_kobj = get_device_i2c_kobj(); + if(!device_kobj) + return -ENOMEM; + + sysstatus_addr_kobj = kobject_create_and_add("sysstatus", device_kobj); + if(!sysstatus_addr_kobj) + return -ENOMEM; + + sysstatus_data_kobj = kobject_create_and_add("sysstatus_data", sysstatus_addr_kobj); + if(!sysstatus_data_kobj) + return -ENOMEM; + + + ret = sysfs_create_group(sysstatus_addr_kobj, &pddf_sysstatus_addr_group); + if (ret) + { + kobject_put(sysstatus_addr_kobj); + return ret; + } + + ret = sysfs_create_group(sysstatus_data_kobj, &pddf_sysstatus_data_group); + if (ret) + { + sysfs_remove_group(sysstatus_addr_kobj, &pddf_sysstatus_addr_group); + kobject_put(sysstatus_data_kobj); + kobject_put(sysstatus_addr_kobj); + return ret; + } + + + return ret; +} + +void __exit sysstatus_data_exit(void) +{ + pddf_dbg(SYSSTATUS, "PDDF SYSSTATUS MODULE.. exit\n"); + sysfs_remove_group(sysstatus_data_kobj, &pddf_sysstatus_data_group); + sysfs_remove_group(sysstatus_addr_kobj, &pddf_sysstatus_addr_group); + kobject_put(sysstatus_data_kobj); + kobject_put(sysstatus_addr_kobj); + pddf_dbg(SYSSTATUS, KERN_ERR "%s: Removed the kobjects for 'SYSSTATUS'\n",__FUNCTION__); + return; +} + +module_init(sysstatus_data_init); +module_exit(sysstatus_data_exit); + +MODULE_AUTHOR("Broadcom"); +MODULE_DESCRIPTION("SYSSTATUS platform data"); +MODULE_LICENSE("GPL"); diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s9110-32x/modules/x86-64-ufispace-s9110-32x-cpld.c b/platform/broadcom/sonic-platform-modules-ufispace/s9110-32x/modules/x86-64-ufispace-s9110-32x-cpld.c new file mode 100644 index 0000000000..39ee360987 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ufispace/s9110-32x/modules/x86-64-ufispace-s9110-32x-cpld.c @@ -0,0 +1,1483 @@ +/* + * A i2c cpld driver for the ufispace_s9110_32x + * + * Copyright (C) 2022 UfiSpace Technology Corporation. + * Nonodark Huang + * + * Based on ad7414.c + * Copyright 2006 Stefan Roese , DENX Software Engineering + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. + */ +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include "x86-64-ufispace-s9110-32x-cpld.h" + +#if !defined(SENSOR_DEVICE_ATTR_RO) +#define SENSOR_DEVICE_ATTR_RO(_name, _func, _index) \ + SENSOR_DEVICE_ATTR(_name, 0444, _func##_show, NULL, _index) +#endif + +#if !defined(SENSOR_DEVICE_ATTR_RW) +#define SENSOR_DEVICE_ATTR_RW(_name, _func, _index) \ + SENSOR_DEVICE_ATTR(_name, 0644, _func##_show, _func##_store, _index) + +#endif + +#if !defined(SENSOR_DEVICE_ATTR_WO) +#define SENSOR_DEVICE_ATTR_WO(_name, _func, _index) \ + SENSOR_DEVICE_ATTR(_name, 0200, NULL, _func##_store, _index) +#endif + + +#ifdef DEBUG +#define DEBUG_PRINT(fmt, args...) \ + printk(KERN_INFO "%s:%s[%d]: " fmt "\r\n", \ + __FILE__, __func__, __LINE__, ##args) +#else +#define DEBUG_PRINT(fmt, args...) +#endif + +#define BSP_LOG_R(fmt, args...) \ + _bsp_log (LOG_READ, KERN_INFO "%s:%s[%d]: " fmt "\r\n", \ + __FILE__, __func__, __LINE__, ##args) +#define BSP_LOG_W(fmt, args...) \ + _bsp_log (LOG_WRITE, KERN_INFO "%s:%s[%d]: " fmt "\r\n", \ + __FILE__, __func__, __LINE__, ##args) + +#define I2C_READ_BYTE_DATA(ret, lock, i2c_client, reg) \ +{ \ + mutex_lock(lock); \ + ret = i2c_smbus_read_byte_data(i2c_client, reg); \ + mutex_unlock(lock); \ + BSP_LOG_R("cpld[%d], reg=0x%03x, reg_val=0x%02x", data->index, reg, ret); \ +} + +#define I2C_WRITE_BYTE_DATA(ret, lock, i2c_client, reg, val) \ +{ \ + mutex_lock(lock); \ + ret = i2c_smbus_write_byte_data(i2c_client, reg, val); \ + mutex_unlock(lock); \ + BSP_LOG_W("cpld[%d], reg=0x%03x, reg_val=0x%02x", data->index, reg, val); \ +} + +#define _DEVICE_ATTR(_name) \ + &sensor_dev_attr_##_name.dev_attr.attr + + +/* CPLD sysfs attributes index */ +enum cpld_sysfs_attributes { + //CPLD 1 & CPLD 2 + CPLD_MAJOR_VER, + CPLD_MINOR_VER, + CPLD_ID, + CPLD_BUILD, + CPLD_VERSION_H, + CPLD_CHIP, + CPLD_EVT_CTRL, + + //CPLD 1 + CPLD_BOARD_ID_0, + CPLD_BOARD_ID_1, + CPLD_SKU_EXT, + + CPLD_MAC_INTR, + CPLD_HWM_INTR, + CPLD_CPLD2_INTR, + CPLD_PTP_INTR, + CPLD_SYSTEM_INTR, + + CPLD_MAC_MASK, + CPLD_HWM_MASK, + CPLD_CPLD2_MASK, + CPLD_PTP_MASK, + CPLD_SYSTEM_MASK, + + CPLD_MAC_EVT, + CPLD_HWM_EVT, + CPLD_CPLD2_EVT, + + CPLD_MAC_RESET, + CPLD_SYSTEM_RESET, + CPLD_BMC_NTM_RESET, + CPLD_USB_RESET, + CPLD_I2C_MUX_RESET, + CPLD_MISC_RESET, + + CPLD_BRD_PRESENT, + CPLD_PSU_STATUS, + CPLD_SYSTEM_PWR, + CPLD_MAC_SYNCE, + CPLD_MAC_AVS, + CPLD_SYSTEM_STATUS, + CPLD_WATCHDOG, + CPLD_BOOT_SELECT, + CPLD_MUX_CTRL, + CPLD_MISC_CTRL_1, + CPLD_MISC_CTRL_2, + CPLD_MAC_TEMP, + + CPLD_SYSTEM_LED_PSU, + CPLD_SYSTEM_LED_SYS, + CPLD_SYSTEM_LED_FAN, + CPLD_SYSTEM_LED_ID, + + DBG_CPLD_MAC_INTR, + DBG_CPLD_HWM_INTR, + DBG_CPLD_CPLD2_INTR, + DBG_CPLD_PTP_INTR, + + //CPLD 2 + CPLD_QSFP_ABS_0_7, + CPLD_QSFP_ABS_8_15, + CPLD_QSFP_ABS_16_23, + CPLD_QSFP_ABS_24_31, + + CPLD_QSFP_INTR_0_7, + CPLD_QSFP_INTR_8_15, + CPLD_QSFP_INTR_16_23, + CPLD_QSFP_INTR_24_31, + + CPLD_SFP_ABS_0_1, + CPLD_SFP_RXLOS_0_1, + CPLD_SFP_TXFLT_0_1, + + CPLD_QSFP_MASK_ABS_0_7, + CPLD_QSFP_MASK_ABS_8_15, + CPLD_QSFP_MASK_ABS_16_23, + CPLD_QSFP_MASK_ABS_24_31, + + CPLD_QSFP_MASK_INTR_0_7, + CPLD_QSFP_MASK_INTR_8_15, + CPLD_QSFP_MASK_INTR_16_23, + CPLD_QSFP_MASK_INTR_24_31, + + CPLD_SFP_MASK_ABS_0_1, + CPLD_SFP_MASK_RXLOS_0_1, + CPLD_SFP_MASK_TXFLT_0_1, + + CPLD_QSFP_EVT_ABS_0_7, + CPLD_QSFP_EVT_ABS_8_15, + CPLD_QSFP_EVT_ABS_16_23, + CPLD_QSFP_EVT_ABS_24_31, + + CPLD_QSFP_EVT_INTR_0_7, + CPLD_QSFP_EVT_INTR_8_15, + CPLD_QSFP_EVT_INTR_16_23, + CPLD_QSFP_EVT_INTR_24_31, + + CPLD_SFP_EVT_ABS_0_1, + CPLD_SFP_EVT_RXLOS_0_1, + CPLD_SFP_EVT_TXFLT_0_1, + + CPLD_QSFP_RESET_0_7, + CPLD_QSFP_RESET_8_15, + CPLD_QSFP_RESET_16_23, + CPLD_QSFP_RESET_24_31, + + CPLD_QSFP_LPMODE_0_7, + CPLD_QSFP_LPMODE_8_15, + CPLD_QSFP_LPMODE_16_23, + CPLD_QSFP_LPMODE_24_31, + + CPLD_SFP_TXDIS_0_1, + CPLD_SFP_TS_0_1, + CPLD_SFP_RS_0_1, + + DBG_CPLD_QSFP_ABS_0_7, + DBG_CPLD_QSFP_ABS_8_15, + DBG_CPLD_QSFP_ABS_16_23, + DBG_CPLD_QSFP_ABS_24_31, + + DBG_CPLD_QSFP_INTR_0_7, + DBG_CPLD_QSFP_INTR_8_15, + DBG_CPLD_QSFP_INTR_16_23, + DBG_CPLD_QSFP_INTR_24_31, + + DBG_CPLD_SFP_ABS_0_1, + DBG_CPLD_SFP_RXLOS_0_1, + DBG_CPLD_SFP_TXFLT_0_1, + + //BSP DEBUG + BSP_DEBUG +}; + +enum data_type { + DATA_HEX, + DATA_DEC, + DATA_UNK, +}; + +typedef struct { + u8 reg; + u8 mask; + u8 data_type; +} attr_reg_map_t; + +static attr_reg_map_t attr_reg[]= { + + //CPLD 1 & CPLD 2 + [CPLD_MAJOR_VER] = {CPLD_VERSION_REG , MASK_1100_0000, DATA_DEC}, + [CPLD_MINOR_VER] = {CPLD_VERSION_REG , MASK_0011_1111, DATA_DEC}, + [CPLD_ID] = {CPLD_ID_REG , MASK_0000_0111, DATA_DEC}, + [CPLD_BUILD] = {CPLD_BUILD_REG , MASK_ALL , DATA_DEC}, + [CPLD_VERSION_H] = {CPLD_NONE_REG , MASK_NONE , DATA_UNK}, + [CPLD_CHIP] = {CPLD_CHIP_REG , MASK_ALL , DATA_HEX}, + [CPLD_EVT_CTRL] = {CPLD_EVT_CTRL_REG , MASK_ALL , DATA_HEX}, + + //CPLD 1 + [CPLD_BOARD_ID_0] = {CPLD_BOARD_ID_0_REG , MASK_ALL , DATA_HEX}, + [CPLD_BOARD_ID_1] = {CPLD_BOARD_ID_1_REG , MASK_ALL , DATA_HEX}, + [CPLD_SKU_EXT] = {CPLD_SKU_EXT_REG , MASK_ALL , DATA_DEC}, + + [CPLD_MAC_INTR] = {CPLD_MAC_INTR_REG , MASK_ALL , DATA_HEX}, + [CPLD_HWM_INTR] = {CPLD_HWM_INTR_REG , MASK_ALL , DATA_HEX}, + [CPLD_CPLD2_INTR] = {CPLD_CPLD2_INTR_REG , MASK_ALL , DATA_HEX}, + [CPLD_PTP_INTR] = {CPLD_PTP_INTR_REG , MASK_ALL , DATA_HEX}, + [CPLD_SYSTEM_INTR] = {CPLD_SYSTEM_INTR_REG , MASK_ALL , DATA_HEX}, + + [CPLD_MAC_MASK] = {CPLD_MAC_MASK_REG , MASK_ALL , DATA_HEX}, + [CPLD_HWM_MASK] = {CPLD_HWM_MASK_REG , MASK_ALL , DATA_HEX}, + [CPLD_CPLD2_MASK] = {CPLD_CPLD2_MASK_REG , MASK_ALL , DATA_HEX}, + [CPLD_PTP_MASK] = {CPLD_PTP_MASK_REG , MASK_ALL , DATA_HEX}, + [CPLD_SYSTEM_MASK] = {CPLD_SYSTEM_MASK_REG , MASK_ALL , DATA_HEX}, + + [CPLD_MAC_EVT] = {CPLD_MAC_EVT_REG , MASK_ALL , DATA_HEX}, + [CPLD_HWM_EVT] = {CPLD_HWM_EVT_REG , MASK_ALL , DATA_HEX}, + [CPLD_CPLD2_EVT] = {CPLD_CPLD2_EVT_REG , MASK_ALL , DATA_HEX}, + + [CPLD_MAC_RESET] = {CPLD_MAC_RESET_REG , MASK_ALL , DATA_HEX}, + [CPLD_SYSTEM_RESET] = {CPLD_SYSTEM_RESET_REG , MASK_ALL , DATA_HEX}, + [CPLD_BMC_NTM_RESET] = {CPLD_BMC_NTM_RESET_REG , MASK_ALL , DATA_HEX}, + [CPLD_USB_RESET] = {CPLD_USB_RESET_REG , MASK_ALL , DATA_HEX}, + [CPLD_I2C_MUX_RESET] = {CPLD_I2C_MUX_RESET_REG , MASK_ALL , DATA_HEX}, + [CPLD_MISC_RESET] = {CPLD_MISC_RESET_REG , MASK_ALL , DATA_HEX}, + + [CPLD_BRD_PRESENT] = {CPLD_BRD_PRESENT_REG , MASK_ALL , DATA_HEX}, + [CPLD_PSU_STATUS] = {CPLD_PSU_STATUS_REG , MASK_ALL , DATA_HEX}, + [CPLD_SYSTEM_PWR] = {CPLD_SYSTEM_PWR_REG , MASK_ALL , DATA_HEX}, + [CPLD_MAC_SYNCE] = {CPLD_MAC_SYNCE_REG , MASK_ALL , DATA_HEX}, + [CPLD_MAC_AVS] = {CPLD_MAC_AVS_REG , MASK_ALL , DATA_HEX}, + [CPLD_SYSTEM_STATUS] = {CPLD_SYSTEM_STATUS_REG , MASK_ALL , DATA_HEX}, + [CPLD_WATCHDOG] = {CPLD_WATCHDOG_REG , MASK_ALL , DATA_HEX}, + [CPLD_BOOT_SELECT] = {CPLD_BOOT_SELECT_REG , MASK_ALL , DATA_HEX}, + [CPLD_MUX_CTRL] = {CPLD_MUX_CTRL_REG , MASK_ALL , DATA_HEX}, + [CPLD_MISC_CTRL_1] = {CPLD_MISC_CTRL_1_REG , MASK_ALL , DATA_HEX}, + [CPLD_MISC_CTRL_2] = {CPLD_MISC_CTRL_2_REG , MASK_ALL , DATA_HEX}, + [CPLD_MAC_TEMP] = {CPLD_MAC_TEMP_REG , MASK_ALL , DATA_HEX}, + + [CPLD_SYSTEM_LED_PSU] = {CPLD_SYSTEM_LED_PSU_REG , MASK_ALL , DATA_HEX}, + [CPLD_SYSTEM_LED_SYS] = {CPLD_SYSTEM_LED_SYS_REG , MASK_ALL , DATA_HEX}, + [CPLD_SYSTEM_LED_FAN] = {CPLD_SYSTEM_LED_FAN_REG , MASK_ALL , DATA_HEX}, + [CPLD_SYSTEM_LED_ID] = {CPLD_SYSTEM_LED_ID_REG , MASK_ALL , DATA_HEX}, + + [DBG_CPLD_MAC_INTR] = {DBG_CPLD_MAC_INTR_REG , MASK_ALL , DATA_HEX}, + [DBG_CPLD_HWM_INTR] = {DBG_CPLD_HWM_INTR_REG , MASK_ALL , DATA_HEX}, + [DBG_CPLD_CPLD2_INTR] = {DBG_CPLD_CPLD2_INTR_REG , MASK_ALL , DATA_HEX}, + [DBG_CPLD_PTP_INTR] = {DBG_CPLD_PTP_INTR_REG , MASK_ALL , DATA_HEX}, + + //CPLD 2 + [CPLD_QSFP_ABS_0_7] = {CPLD_QSFP_ABS_0_7_REG , MASK_ALL , DATA_HEX}, + [CPLD_QSFP_ABS_8_15] = {CPLD_QSFP_ABS_8_15_REG , MASK_ALL , DATA_HEX}, + [CPLD_QSFP_ABS_16_23] = {CPLD_QSFP_ABS_16_23_REG , MASK_ALL , DATA_HEX}, + [CPLD_QSFP_ABS_24_31] = {CPLD_QSFP_ABS_24_31_REG , MASK_ALL , DATA_HEX}, + + [CPLD_QSFP_INTR_0_7] = {CPLD_QSFP_INTR_0_7_REG , MASK_ALL , DATA_HEX}, + [CPLD_QSFP_INTR_8_15] = {CPLD_QSFP_INTR_8_15_REG , MASK_ALL , DATA_HEX}, + [CPLD_QSFP_INTR_16_23] = {CPLD_QSFP_INTR_16_23_REG , MASK_ALL , DATA_HEX}, + [CPLD_QSFP_INTR_24_31] = {CPLD_QSFP_INTR_24_31_REG , MASK_ALL , DATA_HEX}, + + [CPLD_SFP_ABS_0_1] = {CPLD_SFP_ABS_0_1_REG , MASK_ALL , DATA_HEX}, + [CPLD_SFP_RXLOS_0_1] = {CPLD_SFP_RXLOS_0_1_REG , MASK_ALL , DATA_HEX}, + [CPLD_SFP_TXFLT_0_1] = {CPLD_SFP_TXFLT_0_1_REG , MASK_ALL , DATA_HEX}, + + [CPLD_QSFP_MASK_ABS_0_7] = {CPLD_QSFP_MASK_ABS_0_7_REG , MASK_ALL , DATA_HEX}, + [CPLD_QSFP_MASK_ABS_8_15] = {CPLD_QSFP_MASK_ABS_8_15_REG , MASK_ALL , DATA_HEX}, + [CPLD_QSFP_MASK_ABS_16_23] = {CPLD_QSFP_MASK_ABS_16_23_REG , MASK_ALL , DATA_HEX}, + [CPLD_QSFP_MASK_ABS_24_31] = {CPLD_QSFP_MASK_ABS_24_31_REG , MASK_ALL , DATA_HEX}, + + [CPLD_QSFP_MASK_INTR_0_7] = {CPLD_QSFP_MASK_INTR_0_7_REG , MASK_ALL , DATA_HEX}, + [CPLD_QSFP_MASK_INTR_8_15] = {CPLD_QSFP_MASK_INTR_8_15_REG , MASK_ALL , DATA_HEX}, + [CPLD_QSFP_MASK_INTR_16_23]= {CPLD_QSFP_MASK_INTR_16_23_REG , MASK_ALL , DATA_HEX}, + [CPLD_QSFP_MASK_INTR_24_31]= {CPLD_QSFP_MASK_INTR_24_31_REG , MASK_ALL , DATA_HEX}, + + [CPLD_SFP_MASK_ABS_0_1] = {CPLD_SFP_MASK_ABS_0_1_REG , MASK_ALL , DATA_HEX}, + [CPLD_SFP_MASK_RXLOS_0_1] = {CPLD_SFP_MASK_RXLOS_0_1_REG , MASK_ALL , DATA_HEX}, + [CPLD_SFP_MASK_TXFLT_0_1] = {CPLD_SFP_MASK_TXFLT_0_1_REG , MASK_ALL , DATA_HEX}, + + [CPLD_QSFP_EVT_ABS_0_7] = {CPLD_QSFP_EVT_ABS_0_7_REG , MASK_ALL , DATA_HEX}, + [CPLD_QSFP_EVT_ABS_8_15] = {CPLD_QSFP_EVT_ABS_8_15_REG , MASK_ALL , DATA_HEX}, + [CPLD_QSFP_EVT_ABS_16_23] = {CPLD_QSFP_EVT_ABS_16_23_REG , MASK_ALL , DATA_HEX}, + [CPLD_QSFP_EVT_ABS_24_31] = {CPLD_QSFP_EVT_ABS_24_31_REG , MASK_ALL , DATA_HEX}, + + [CPLD_QSFP_EVT_INTR_0_7] = {CPLD_QSFP_EVT_INTR_0_7_REG , MASK_ALL , DATA_HEX}, + [CPLD_QSFP_EVT_INTR_8_15] = {CPLD_QSFP_EVT_INTR_8_15_REG , MASK_ALL , DATA_HEX}, + [CPLD_QSFP_EVT_INTR_16_23] = {CPLD_QSFP_EVT_INTR_16_23_REG , MASK_ALL , DATA_HEX}, + [CPLD_QSFP_EVT_INTR_24_31] = {CPLD_QSFP_EVT_INTR_24_31_REG , MASK_ALL , DATA_HEX}, + + [CPLD_SFP_EVT_ABS_0_1] = {CPLD_SFP_EVT_ABS_0_1_REG , MASK_ALL , DATA_HEX}, + [CPLD_SFP_EVT_RXLOS_0_1] = {CPLD_SFP_EVT_RXLOS_0_1_REG , MASK_ALL , DATA_HEX}, + [CPLD_SFP_EVT_TXFLT_0_1] = {CPLD_SFP_EVT_TXFLT_0_1_REG , MASK_ALL , DATA_HEX}, + + [CPLD_QSFP_RESET_0_7] = {CPLD_QSFP_RESET_0_7_REG , MASK_ALL , DATA_HEX}, + [CPLD_QSFP_RESET_8_15] = {CPLD_QSFP_RESET_8_15_REG , MASK_ALL , DATA_HEX}, + [CPLD_QSFP_RESET_16_23] = {CPLD_QSFP_RESET_16_23_REG , MASK_ALL , DATA_HEX}, + [CPLD_QSFP_RESET_24_31] = {CPLD_QSFP_RESET_24_31_REG , MASK_ALL , DATA_HEX}, + + [CPLD_QSFP_LPMODE_0_7] = {CPLD_QSFP_LPMODE_0_7_REG , MASK_ALL , DATA_HEX}, + [CPLD_QSFP_LPMODE_8_15] = {CPLD_QSFP_LPMODE_8_15_REG , MASK_ALL , DATA_HEX}, + [CPLD_QSFP_LPMODE_16_23] = {CPLD_QSFP_LPMODE_16_23_REG , MASK_ALL , DATA_HEX}, + [CPLD_QSFP_LPMODE_24_31] = {CPLD_QSFP_LPMODE_24_31_REG , MASK_ALL , DATA_HEX}, + + [CPLD_SFP_TXDIS_0_1] = {CPLD_SFP_TXDIS_0_1_REG , MASK_ALL , DATA_HEX}, + [CPLD_SFP_TS_0_1] = {CPLD_SFP_TS_0_1_REG , MASK_ALL , DATA_HEX}, + [CPLD_SFP_RS_0_1] = {CPLD_SFP_RS_0_1_REG , MASK_ALL , DATA_HEX}, + + [DBG_CPLD_QSFP_ABS_0_7] = {DBG_CPLD_QSFP_ABS_0_7_REG , MASK_ALL , DATA_HEX}, + [DBG_CPLD_QSFP_ABS_8_15] = {DBG_CPLD_QSFP_ABS_8_15_REG , MASK_ALL , DATA_HEX}, + [DBG_CPLD_QSFP_ABS_16_23] = {DBG_CPLD_QSFP_ABS_16_23_REG , MASK_ALL , DATA_HEX}, + [DBG_CPLD_QSFP_ABS_24_31] = {DBG_CPLD_QSFP_ABS_24_31_REG , MASK_ALL , DATA_HEX}, + + [DBG_CPLD_QSFP_INTR_0_7] = {DBG_CPLD_QSFP_INTR_0_7_REG , MASK_ALL , DATA_HEX}, + [DBG_CPLD_QSFP_INTR_8_15] = {DBG_CPLD_QSFP_INTR_8_15_REG , MASK_ALL , DATA_HEX}, + [DBG_CPLD_QSFP_INTR_16_23] = {DBG_CPLD_QSFP_INTR_16_23_REG , MASK_ALL , DATA_HEX}, + [DBG_CPLD_QSFP_INTR_24_31] = {DBG_CPLD_QSFP_INTR_24_31_REG , MASK_ALL , DATA_HEX}, + + [DBG_CPLD_SFP_ABS_0_1] = {DBG_CPLD_SFP_ABS_0_1_REG , MASK_ALL , DATA_HEX}, + [DBG_CPLD_SFP_RXLOS_0_1] = {DBG_CPLD_SFP_RXLOS_0_1_REG , MASK_ALL , DATA_HEX}, + [DBG_CPLD_SFP_TXFLT_0_1] = {DBG_CPLD_SFP_TXFLT_0_1_REG , MASK_ALL , DATA_HEX}, + + //BSP DEBUG + [BSP_DEBUG] = {CPLD_NONE_REG , MASK_NONE , DATA_UNK}, +}; + +enum bsp_log_types { + LOG_NONE, + LOG_RW, + LOG_READ, + LOG_WRITE +}; + +enum bsp_log_ctrl { + LOG_DISABLE, + LOG_ENABLE +}; + +/* CPLD sysfs attributes hook functions */ +static ssize_t cpld_show(struct device *dev, + struct device_attribute *da, char *buf); +static ssize_t cpld_store(struct device *dev, + struct device_attribute *da, const char *buf, size_t count); +static u8 _cpld_reg_read(struct device *dev, u8 reg, u8 mask); +static ssize_t cpld_reg_read(struct device *dev, char *buf, u8 reg, u8 mask, u8 data_type); +static ssize_t cpld_reg_write(struct device *dev, const char *buf, size_t count, u8 reg, u8 mask); +static ssize_t bsp_read(char *buf, char *str); +static ssize_t bsp_write(const char *buf, char *str, size_t str_len, size_t count); +static ssize_t bsp_callback_show(struct device *dev, + struct device_attribute *da, char *buf); +static ssize_t bsp_callback_store(struct device *dev, + struct device_attribute *da, const char *buf, size_t count); +static ssize_t cpld_version_h_show(struct device *dev, + struct device_attribute *da, + char *buf); + +static LIST_HEAD(cpld_client_list); /* client list for cpld */ +static struct mutex list_lock; /* mutex for client list */ + +struct cpld_client_node { + struct i2c_client *client; + struct list_head list; +}; + +struct cpld_data { + int index; /* CPLD index */ + struct mutex access_lock; /* mutex for cpld access */ + u8 access_reg; /* register to access */ +}; + +/* CPLD device id and data */ +static const struct i2c_device_id cpld_id[] = { + { "s9110_32x_cpld1", cpld1 }, + { "s9110_32x_cpld2", cpld2 }, + {} +}; + +char bsp_debug[2]="0"; +u8 enable_log_read=LOG_DISABLE; +u8 enable_log_write=LOG_DISABLE; + +/* Addresses scanned for cpld */ +static const unsigned short cpld_i2c_addr[] = { 0x30, 0x31, I2C_CLIENT_END }; + +/* define all support register access of cpld in attribute */ + +// CPLD 1 & CPLD2 +static SENSOR_DEVICE_ATTR_RO(cpld_major_ver , cpld, CPLD_MAJOR_VER); +static SENSOR_DEVICE_ATTR_RO(cpld_minor_ver , cpld, CPLD_MINOR_VER); +static SENSOR_DEVICE_ATTR_RO(cpld_id , cpld, CPLD_ID); +static SENSOR_DEVICE_ATTR_RO(cpld_build , cpld, CPLD_BUILD); +static SENSOR_DEVICE_ATTR_RO(cpld_version_h , cpld_version_h, CPLD_VERSION_H); +static SENSOR_DEVICE_ATTR_RO(cpld_chip , cpld, CPLD_CHIP); +static SENSOR_DEVICE_ATTR_RW(cpld_evt_ctrl , cpld, CPLD_EVT_CTRL); + +//CPLD 1 +static SENSOR_DEVICE_ATTR_RO(cpld_board_id_0 , cpld, CPLD_BOARD_ID_0); +static SENSOR_DEVICE_ATTR_RO(cpld_board_id_1 , cpld, CPLD_BOARD_ID_1); +static SENSOR_DEVICE_ATTR_RO(cpld_sku_ext , cpld, CPLD_SKU_EXT); + +static SENSOR_DEVICE_ATTR_RO(cpld_mac_intr , cpld, CPLD_MAC_INTR); +static SENSOR_DEVICE_ATTR_RO(cpld_hwm_intr , cpld, CPLD_HWM_INTR); +static SENSOR_DEVICE_ATTR_RO(cpld_cpld2_intr , cpld, CPLD_CPLD2_INTR); +static SENSOR_DEVICE_ATTR_RO(cpld_ptp_intr , cpld, CPLD_PTP_INTR); +static SENSOR_DEVICE_ATTR_RO(cpld_system_intr , cpld, CPLD_SYSTEM_INTR); + +static SENSOR_DEVICE_ATTR_RW(cpld_mac_mask , cpld, CPLD_MAC_MASK); +static SENSOR_DEVICE_ATTR_RW(cpld_hwm_mask , cpld, CPLD_HWM_MASK); +static SENSOR_DEVICE_ATTR_RW(cpld_cpld2_mask , cpld, CPLD_CPLD2_MASK); +static SENSOR_DEVICE_ATTR_RW(cpld_ptp_mask , cpld, CPLD_PTP_MASK); +static SENSOR_DEVICE_ATTR_RW(cpld_system_mask , cpld, CPLD_SYSTEM_MASK); + +static SENSOR_DEVICE_ATTR_RO(cpld_mac_evt , cpld, CPLD_MAC_EVT); +static SENSOR_DEVICE_ATTR_RO(cpld_hwm_evt , cpld, CPLD_HWM_EVT); +static SENSOR_DEVICE_ATTR_RO(cpld_cpld2_evt , cpld, CPLD_CPLD2_EVT); + +static SENSOR_DEVICE_ATTR_RW(cpld_mac_reset , cpld, CPLD_MAC_RESET); +static SENSOR_DEVICE_ATTR_RW(cpld_system_reset , cpld, CPLD_SYSTEM_RESET); +static SENSOR_DEVICE_ATTR_RW(cpld_bmc_ntm_reset , cpld, CPLD_BMC_NTM_RESET); +static SENSOR_DEVICE_ATTR_RW(cpld_usb_reset , cpld, CPLD_USB_RESET); +static SENSOR_DEVICE_ATTR_RW(cpld_i2c_mux_reset , cpld, CPLD_I2C_MUX_RESET); +static SENSOR_DEVICE_ATTR_RW(cpld_misc_reset , cpld, CPLD_MISC_RESET); + +static SENSOR_DEVICE_ATTR_RO(cpld_brd_present , cpld, CPLD_BRD_PRESENT); +static SENSOR_DEVICE_ATTR_RO(cpld_psu_status , cpld, CPLD_PSU_STATUS); +static SENSOR_DEVICE_ATTR_RO(cpld_system_pwr , cpld, CPLD_SYSTEM_PWR); +static SENSOR_DEVICE_ATTR_RO(cpld_mac_synce , cpld, CPLD_MAC_SYNCE); +static SENSOR_DEVICE_ATTR_RO(cpld_mac_avs , cpld, CPLD_MAC_AVS); +static SENSOR_DEVICE_ATTR_RO(cpld_system_status , cpld, CPLD_SYSTEM_STATUS); +static SENSOR_DEVICE_ATTR_RO(cpld_watchdog , cpld, CPLD_WATCHDOG); +static SENSOR_DEVICE_ATTR_RW(cpld_boot_select , cpld, CPLD_BOOT_SELECT); +static SENSOR_DEVICE_ATTR_RW(cpld_mux_ctrl , cpld, CPLD_MUX_CTRL); +static SENSOR_DEVICE_ATTR_RW(cpld_misc_ctrl_1 , cpld, CPLD_MISC_CTRL_1); +static SENSOR_DEVICE_ATTR_RW(cpld_misc_ctrl_2 , cpld, CPLD_MISC_CTRL_2); +static SENSOR_DEVICE_ATTR_RO(cpld_mac_temp , cpld, CPLD_MAC_TEMP); + +static SENSOR_DEVICE_ATTR_RO(cpld_system_led_psu , cpld, CPLD_SYSTEM_LED_PSU); +static SENSOR_DEVICE_ATTR_RW(cpld_system_led_sys , cpld, CPLD_SYSTEM_LED_SYS); +static SENSOR_DEVICE_ATTR_RO(cpld_system_led_fan , cpld, CPLD_SYSTEM_LED_FAN); +static SENSOR_DEVICE_ATTR_RW(cpld_system_led_id , cpld, CPLD_SYSTEM_LED_ID); + +static SENSOR_DEVICE_ATTR_RO(dbg_cpld_mac_intr , cpld, DBG_CPLD_MAC_INTR); +static SENSOR_DEVICE_ATTR_RO(dbg_cpld_hwm_intr , cpld, DBG_CPLD_HWM_INTR); +static SENSOR_DEVICE_ATTR_RO(dbg_cpld_cpld2_intr , cpld, DBG_CPLD_CPLD2_INTR); +static SENSOR_DEVICE_ATTR_RO(dbg_cpld_ptp_intr , cpld, DBG_CPLD_PTP_INTR); + +//CPLD 2 +static SENSOR_DEVICE_ATTR_RO(cpld_qsfp_abs_0_7 , cpld, CPLD_QSFP_ABS_0_7); +static SENSOR_DEVICE_ATTR_RO(cpld_qsfp_abs_8_15 , cpld, CPLD_QSFP_ABS_8_15); +static SENSOR_DEVICE_ATTR_RO(cpld_qsfp_abs_16_23 , cpld, CPLD_QSFP_ABS_16_23); +static SENSOR_DEVICE_ATTR_RO(cpld_qsfp_abs_24_31 , cpld, CPLD_QSFP_ABS_24_31); + +static SENSOR_DEVICE_ATTR_RO(cpld_qsfp_intr_0_7 , cpld, CPLD_QSFP_INTR_0_7); +static SENSOR_DEVICE_ATTR_RO(cpld_qsfp_intr_8_15 , cpld, CPLD_QSFP_INTR_8_15); +static SENSOR_DEVICE_ATTR_RO(cpld_qsfp_intr_16_23 , cpld, CPLD_QSFP_INTR_16_23); +static SENSOR_DEVICE_ATTR_RO(cpld_qsfp_intr_24_31 , cpld, CPLD_QSFP_INTR_24_31); + +static SENSOR_DEVICE_ATTR_RO(cpld_sfp_abs_0_1 , cpld, CPLD_SFP_ABS_0_1); +static SENSOR_DEVICE_ATTR_RO(cpld_sfp_rxlos_0_1 , cpld, CPLD_SFP_RXLOS_0_1); +static SENSOR_DEVICE_ATTR_RO(cpld_sfp_txflt_0_1 , cpld, CPLD_SFP_TXFLT_0_1); + +static SENSOR_DEVICE_ATTR_RW(cpld_qsfp_mask_abs_0_7 , cpld, CPLD_QSFP_MASK_ABS_0_7); +static SENSOR_DEVICE_ATTR_RW(cpld_qsfp_mask_abs_8_15 , cpld, CPLD_QSFP_MASK_ABS_8_15); +static SENSOR_DEVICE_ATTR_RW(cpld_qsfp_mask_abs_16_23 , cpld, CPLD_QSFP_MASK_ABS_16_23); +static SENSOR_DEVICE_ATTR_RW(cpld_qsfp_mask_abs_24_31 , cpld, CPLD_QSFP_MASK_ABS_24_31); + +static SENSOR_DEVICE_ATTR_RW(cpld_qsfp_mask_intr_0_7 , cpld, CPLD_QSFP_MASK_INTR_0_7); +static SENSOR_DEVICE_ATTR_RW(cpld_qsfp_mask_intr_8_15 , cpld, CPLD_QSFP_MASK_INTR_8_15); +static SENSOR_DEVICE_ATTR_RW(cpld_qsfp_mask_intr_16_23, cpld, CPLD_QSFP_MASK_INTR_16_23); +static SENSOR_DEVICE_ATTR_RW(cpld_qsfp_mask_intr_24_31, cpld, CPLD_QSFP_MASK_INTR_24_31); + +static SENSOR_DEVICE_ATTR_RW(cpld_sfp_mask_abs_0_1 , cpld, CPLD_SFP_MASK_ABS_0_1); +static SENSOR_DEVICE_ATTR_RW(cpld_sfp_mask_rxlos_0_1 , cpld, CPLD_SFP_MASK_RXLOS_0_1); +static SENSOR_DEVICE_ATTR_RW(cpld_sfp_mask_txflt_0_1 , cpld, CPLD_SFP_MASK_TXFLT_0_1); + +static SENSOR_DEVICE_ATTR_RO(cpld_qsfp_evt_abs_0_7 , cpld, CPLD_QSFP_EVT_ABS_0_7); +static SENSOR_DEVICE_ATTR_RO(cpld_qsfp_evt_abs_8_15 , cpld, CPLD_QSFP_EVT_ABS_8_15); +static SENSOR_DEVICE_ATTR_RO(cpld_qsfp_evt_abs_16_23 , cpld, CPLD_QSFP_EVT_ABS_16_23); +static SENSOR_DEVICE_ATTR_RO(cpld_qsfp_evt_abs_24_31 , cpld, CPLD_QSFP_EVT_ABS_24_31); + +static SENSOR_DEVICE_ATTR_RO(cpld_qsfp_evt_intr_0_7 , cpld, CPLD_QSFP_EVT_INTR_0_7); +static SENSOR_DEVICE_ATTR_RO(cpld_qsfp_evt_intr_8_15 , cpld, CPLD_QSFP_EVT_INTR_8_15); +static SENSOR_DEVICE_ATTR_RO(cpld_qsfp_evt_intr_16_23 , cpld, CPLD_QSFP_EVT_INTR_16_23); +static SENSOR_DEVICE_ATTR_RO(cpld_qsfp_evt_intr_24_31 , cpld, CPLD_QSFP_EVT_INTR_24_31); + +static SENSOR_DEVICE_ATTR_RO(cpld_sfp_evt_abs_0_1 , cpld, CPLD_SFP_EVT_ABS_0_1); +static SENSOR_DEVICE_ATTR_RO(cpld_sfp_evt_rxlos_0_1 , cpld, CPLD_SFP_EVT_RXLOS_0_1); +static SENSOR_DEVICE_ATTR_RO(cpld_sfp_evt_txflt_0_1 , cpld, CPLD_SFP_EVT_TXFLT_0_1); + +static SENSOR_DEVICE_ATTR_RW(cpld_qsfp_reset_0_7 , cpld, CPLD_QSFP_RESET_0_7); +static SENSOR_DEVICE_ATTR_RW(cpld_qsfp_reset_8_15 , cpld, CPLD_QSFP_RESET_8_15); +static SENSOR_DEVICE_ATTR_RW(cpld_qsfp_reset_16_23 , cpld, CPLD_QSFP_RESET_16_23); +static SENSOR_DEVICE_ATTR_RW(cpld_qsfp_reset_24_31 , cpld, CPLD_QSFP_RESET_24_31); + +static SENSOR_DEVICE_ATTR_RW(cpld_qsfp_lpmode_0_7 , cpld, CPLD_QSFP_LPMODE_0_7); +static SENSOR_DEVICE_ATTR_RW(cpld_qsfp_lpmode_8_15 , cpld, CPLD_QSFP_LPMODE_8_15); +static SENSOR_DEVICE_ATTR_RW(cpld_qsfp_lpmode_16_23 , cpld, CPLD_QSFP_LPMODE_16_23); +static SENSOR_DEVICE_ATTR_RW(cpld_qsfp_lpmode_24_31 , cpld, CPLD_QSFP_LPMODE_24_31); + +static SENSOR_DEVICE_ATTR_RW(cpld_sfp_txdis_0_1 , cpld, CPLD_SFP_TXDIS_0_1); +static SENSOR_DEVICE_ATTR_RW(cpld_sfp_ts_0_1 , cpld, CPLD_SFP_TS_0_1); +static SENSOR_DEVICE_ATTR_RW(cpld_sfp_rs_0_1 , cpld, CPLD_SFP_RS_0_1); + +static SENSOR_DEVICE_ATTR_RO(dbg_cpld_qsfp_abs_0_7 , cpld, DBG_CPLD_QSFP_ABS_0_7); +static SENSOR_DEVICE_ATTR_RO(dbg_cpld_qsfp_abs_8_15 , cpld, DBG_CPLD_QSFP_ABS_8_15); +static SENSOR_DEVICE_ATTR_RO(dbg_cpld_qsfp_abs_16_23 , cpld, DBG_CPLD_QSFP_ABS_16_23); +static SENSOR_DEVICE_ATTR_RO(dbg_cpld_qsfp_abs_24_31 , cpld, DBG_CPLD_QSFP_ABS_24_31); + +static SENSOR_DEVICE_ATTR_RO(dbg_cpld_qsfp_intr_0_7 , cpld, DBG_CPLD_QSFP_INTR_0_7); +static SENSOR_DEVICE_ATTR_RO(dbg_cpld_qsfp_intr_8_15 , cpld, DBG_CPLD_QSFP_INTR_8_15); +static SENSOR_DEVICE_ATTR_RO(dbg_cpld_qsfp_intr_16_23 , cpld, DBG_CPLD_QSFP_INTR_16_23); +static SENSOR_DEVICE_ATTR_RO(dbg_cpld_qsfp_intr_24_31 , cpld, DBG_CPLD_QSFP_INTR_24_31); + +static SENSOR_DEVICE_ATTR_RO(dbg_cpld_sfp_abs_0_1 , cpld, DBG_CPLD_SFP_ABS_0_1); +static SENSOR_DEVICE_ATTR_RO(dbg_cpld_sfp_rxlos_0_1 , cpld, DBG_CPLD_SFP_RXLOS_0_1); +static SENSOR_DEVICE_ATTR_RO(dbg_cpld_sfp_txflt_0_1 , cpld, DBG_CPLD_SFP_TXFLT_0_1); + +//BSP DEBUG +static SENSOR_DEVICE_ATTR_RW(bsp_debug , bsp_callback, BSP_DEBUG); + +/* define support attributes of cpldx */ + +/* cpld 1 */ +static struct attribute *cpld1_attributes[] = { + _DEVICE_ATTR(cpld_board_id_0), + _DEVICE_ATTR(cpld_board_id_1), + _DEVICE_ATTR(cpld_sku_ext), + + _DEVICE_ATTR(cpld_major_ver), + _DEVICE_ATTR(cpld_minor_ver), + _DEVICE_ATTR(cpld_id), + _DEVICE_ATTR(cpld_build), + _DEVICE_ATTR(cpld_version_h), + _DEVICE_ATTR(cpld_chip), + + _DEVICE_ATTR(cpld_mac_intr), + _DEVICE_ATTR(cpld_hwm_intr), + _DEVICE_ATTR(cpld_cpld2_intr), + _DEVICE_ATTR(cpld_ptp_intr), + _DEVICE_ATTR(cpld_system_intr), + + _DEVICE_ATTR(cpld_mac_mask), + _DEVICE_ATTR(cpld_hwm_mask), + _DEVICE_ATTR(cpld_cpld2_mask), + _DEVICE_ATTR(cpld_ptp_mask), + _DEVICE_ATTR(cpld_system_mask), + + _DEVICE_ATTR(cpld_mac_evt), + _DEVICE_ATTR(cpld_hwm_evt), + _DEVICE_ATTR(cpld_cpld2_evt), + + _DEVICE_ATTR(cpld_evt_ctrl), + + _DEVICE_ATTR(cpld_mac_reset), + _DEVICE_ATTR(cpld_system_reset), + _DEVICE_ATTR(cpld_bmc_ntm_reset), + _DEVICE_ATTR(cpld_usb_reset), + _DEVICE_ATTR(cpld_i2c_mux_reset), + _DEVICE_ATTR(cpld_misc_reset), + + _DEVICE_ATTR(cpld_brd_present), + _DEVICE_ATTR(cpld_psu_status), + _DEVICE_ATTR(cpld_system_pwr), + _DEVICE_ATTR(cpld_mac_synce), + _DEVICE_ATTR(cpld_mac_avs), + _DEVICE_ATTR(cpld_system_status), + _DEVICE_ATTR(cpld_watchdog), + _DEVICE_ATTR(cpld_boot_select), + _DEVICE_ATTR(cpld_mux_ctrl), + _DEVICE_ATTR(cpld_misc_ctrl_1), + _DEVICE_ATTR(cpld_misc_ctrl_2), + _DEVICE_ATTR(cpld_mac_temp), + + _DEVICE_ATTR(cpld_system_led_psu), + _DEVICE_ATTR(cpld_system_led_sys), + _DEVICE_ATTR(cpld_system_led_fan), + _DEVICE_ATTR(cpld_system_led_id), + + _DEVICE_ATTR(dbg_cpld_mac_intr), + _DEVICE_ATTR(dbg_cpld_hwm_intr), + _DEVICE_ATTR(dbg_cpld_cpld2_intr), + _DEVICE_ATTR(dbg_cpld_ptp_intr), + + _DEVICE_ATTR(bsp_debug), + + NULL +}; + +/* cpld 2 */ +static struct attribute *cpld2_attributes[] = { + + _DEVICE_ATTR(cpld_major_ver), + _DEVICE_ATTR(cpld_minor_ver), + _DEVICE_ATTR(cpld_id), + _DEVICE_ATTR(cpld_build), + _DEVICE_ATTR(cpld_version_h), + _DEVICE_ATTR(cpld_chip), + + _DEVICE_ATTR(cpld_qsfp_abs_0_7), + _DEVICE_ATTR(cpld_qsfp_abs_8_15), + _DEVICE_ATTR(cpld_qsfp_abs_16_23), + _DEVICE_ATTR(cpld_qsfp_abs_24_31), + + _DEVICE_ATTR(cpld_qsfp_intr_0_7), + _DEVICE_ATTR(cpld_qsfp_intr_8_15), + _DEVICE_ATTR(cpld_qsfp_intr_16_23), + _DEVICE_ATTR(cpld_qsfp_intr_24_31), + + _DEVICE_ATTR(cpld_sfp_abs_0_1), + _DEVICE_ATTR(cpld_sfp_rxlos_0_1), + _DEVICE_ATTR(cpld_sfp_txflt_0_1), + + _DEVICE_ATTR(cpld_qsfp_mask_abs_0_7), + _DEVICE_ATTR(cpld_qsfp_mask_abs_8_15), + _DEVICE_ATTR(cpld_qsfp_mask_abs_16_23), + _DEVICE_ATTR(cpld_qsfp_mask_abs_24_31), + + _DEVICE_ATTR(cpld_qsfp_mask_intr_0_7), + _DEVICE_ATTR(cpld_qsfp_mask_intr_8_15), + _DEVICE_ATTR(cpld_qsfp_mask_intr_16_23), + _DEVICE_ATTR(cpld_qsfp_mask_intr_24_31), + + _DEVICE_ATTR(cpld_sfp_mask_abs_0_1), + _DEVICE_ATTR(cpld_sfp_mask_rxlos_0_1), + _DEVICE_ATTR(cpld_sfp_mask_txflt_0_1), + + _DEVICE_ATTR(cpld_qsfp_evt_abs_0_7), + _DEVICE_ATTR(cpld_qsfp_evt_abs_8_15), + _DEVICE_ATTR(cpld_qsfp_evt_abs_16_23), + _DEVICE_ATTR(cpld_qsfp_evt_abs_24_31), + + _DEVICE_ATTR(cpld_qsfp_evt_intr_0_7), + _DEVICE_ATTR(cpld_qsfp_evt_intr_8_15), + _DEVICE_ATTR(cpld_qsfp_evt_intr_16_23), + _DEVICE_ATTR(cpld_qsfp_evt_intr_24_31), + + _DEVICE_ATTR(cpld_sfp_evt_abs_0_1), + _DEVICE_ATTR(cpld_sfp_evt_rxlos_0_1), + _DEVICE_ATTR(cpld_sfp_evt_txflt_0_1), + + _DEVICE_ATTR(cpld_evt_ctrl), + + _DEVICE_ATTR(cpld_qsfp_reset_0_7), + _DEVICE_ATTR(cpld_qsfp_reset_8_15), + _DEVICE_ATTR(cpld_qsfp_reset_16_23), + _DEVICE_ATTR(cpld_qsfp_reset_24_31), + + _DEVICE_ATTR(cpld_qsfp_lpmode_0_7), + _DEVICE_ATTR(cpld_qsfp_lpmode_8_15), + _DEVICE_ATTR(cpld_qsfp_lpmode_16_23), + _DEVICE_ATTR(cpld_qsfp_lpmode_24_31), + + _DEVICE_ATTR(cpld_sfp_txdis_0_1), + _DEVICE_ATTR(cpld_sfp_ts_0_1), + _DEVICE_ATTR(cpld_sfp_rs_0_1), + + _DEVICE_ATTR(dbg_cpld_qsfp_abs_0_7), + _DEVICE_ATTR(dbg_cpld_qsfp_abs_8_15), + _DEVICE_ATTR(dbg_cpld_qsfp_abs_16_23), + _DEVICE_ATTR(dbg_cpld_qsfp_abs_24_31), + + _DEVICE_ATTR(dbg_cpld_qsfp_intr_0_7), + _DEVICE_ATTR(dbg_cpld_qsfp_intr_8_15), + _DEVICE_ATTR(dbg_cpld_qsfp_intr_16_23), + _DEVICE_ATTR(dbg_cpld_qsfp_intr_24_31), + + _DEVICE_ATTR(dbg_cpld_sfp_abs_0_1), + _DEVICE_ATTR(dbg_cpld_sfp_rxlos_0_1), + _DEVICE_ATTR(dbg_cpld_sfp_txflt_0_1), + + NULL +}; + +/* cpld 1 attributes group */ +static const struct attribute_group cpld1_group = { + .attrs = cpld1_attributes, +}; + +/* cpld 2 attributes group */ +static const struct attribute_group cpld2_group = { + .attrs = cpld2_attributes, +}; + +/* reg shift */ +static u8 _shift(u8 mask) +{ + int i=0, mask_one=1; + + for(i=0; i<8; ++i) { + if ((mask & mask_one) == 1) + return i; + else + mask >>= 1; + } + + return -1; +} + +/* reg mask and shift */ +static u8 _mask_shift(u8 val, u8 mask) +{ + int shift=0; + + shift = _shift(mask); + + return (val & mask) >> shift; +} + +static u8 _parse_data(char *buf, unsigned int data, u8 data_type) +{ + if(buf == NULL) { + return -1; + } + + if(data_type == DATA_HEX) { + return sprintf(buf, "0x%02x", data); + } else if(data_type == DATA_DEC) { + return sprintf(buf, "%u", data); + } else { + return -1; + } + return 0; +} + +static int _bsp_log(u8 log_type, char *fmt, ...) +{ + if ((log_type==LOG_READ && enable_log_read) || + (log_type==LOG_WRITE && enable_log_write)) { + va_list args; + int r; + + va_start(args, fmt); + r = vprintk(fmt, args); + va_end(args); + + return r; + } else { + return 0; + } +} + +static int _config_bsp_log(u8 log_type) +{ + switch(log_type) { + case LOG_NONE: + enable_log_read = LOG_DISABLE; + enable_log_write = LOG_DISABLE; + break; + case LOG_RW: + enable_log_read = LOG_ENABLE; + enable_log_write = LOG_ENABLE; + break; + case LOG_READ: + enable_log_read = LOG_ENABLE; + enable_log_write = LOG_DISABLE; + break; + case LOG_WRITE: + enable_log_read = LOG_DISABLE; + enable_log_write = LOG_ENABLE; + break; + default: + return -EINVAL; + } + return 0; +} + +/* get bsp value */ +static ssize_t bsp_read(char *buf, char *str) +{ + ssize_t len=0; + + len=sprintf(buf, "%s", str); + BSP_LOG_R("reg_val=%s", str); + + return len; +} + +/* set bsp value */ +static ssize_t bsp_write(const char *buf, char *str, size_t str_len, size_t count) +{ + snprintf(str, str_len, "%s", buf); + BSP_LOG_W("reg_val=%s", str); + + return count; +} + +/* get bsp parameter value */ +static ssize_t bsp_callback_show(struct device *dev, + struct device_attribute *da, char *buf) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + int str_len=0; + char *str=NULL; + + switch (attr->index) { + case BSP_DEBUG: + str = bsp_debug; + str_len = sizeof(bsp_debug); + break; + default: + return -EINVAL; + } + return bsp_read(buf, str); +} + +/* set bsp parameter value */ +static ssize_t bsp_callback_store(struct device *dev, + struct device_attribute *da, const char *buf, size_t count) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + int str_len=0; + char *str=NULL; + ssize_t ret = 0; + u8 bsp_debug_u8 = 0; + + switch (attr->index) { + case BSP_DEBUG: + str = bsp_debug; + str_len = sizeof(str); + ret = bsp_write(buf, str, str_len, count); + + if (kstrtou8(buf, 0, &bsp_debug_u8) < 0) { + return -EINVAL; + } else if (_config_bsp_log(bsp_debug_u8) < 0) { + return -EINVAL; + } + return ret; + default: + return -EINVAL; + } + return 0; +} + +/* get cpld register value */ +static ssize_t cpld_show(struct device *dev, + struct device_attribute *da, char *buf) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + u8 reg = 0; + u8 mask = MASK_NONE; + u8 data_type=DATA_UNK; + + switch (attr->index) { + //CPLD 1 & CPLD 2 + case CPLD_MAJOR_VER: + case CPLD_MINOR_VER: + case CPLD_ID: + case CPLD_BUILD: + case CPLD_CHIP: + case CPLD_EVT_CTRL: + + //CPLD 1 + case CPLD_BOARD_ID_0: + case CPLD_BOARD_ID_1: + case CPLD_SKU_EXT: + + case CPLD_MAC_INTR: + case CPLD_HWM_INTR: + case CPLD_CPLD2_INTR: + case CPLD_PTP_INTR: + case CPLD_SYSTEM_INTR: + + case CPLD_MAC_MASK: + case CPLD_HWM_MASK: + case CPLD_CPLD2_MASK: + case CPLD_PTP_MASK: + case CPLD_SYSTEM_MASK: + + case CPLD_MAC_EVT: + case CPLD_HWM_EVT: + case CPLD_CPLD2_EVT: + + case CPLD_MAC_RESET: + case CPLD_SYSTEM_RESET: + case CPLD_BMC_NTM_RESET: + case CPLD_USB_RESET: + case CPLD_I2C_MUX_RESET: + case CPLD_MISC_RESET: + + case CPLD_BRD_PRESENT: + case CPLD_PSU_STATUS: + case CPLD_SYSTEM_PWR: + case CPLD_MAC_SYNCE: + case CPLD_MAC_AVS: + case CPLD_SYSTEM_STATUS: + case CPLD_WATCHDOG: + case CPLD_BOOT_SELECT: + case CPLD_MUX_CTRL: + case CPLD_MISC_CTRL_1: + case CPLD_MISC_CTRL_2: + case CPLD_MAC_TEMP: + + case CPLD_SYSTEM_LED_PSU: + case CPLD_SYSTEM_LED_SYS: + case CPLD_SYSTEM_LED_FAN: + case CPLD_SYSTEM_LED_ID: + + case DBG_CPLD_MAC_INTR: + case DBG_CPLD_HWM_INTR: + case DBG_CPLD_CPLD2_INTR: + case DBG_CPLD_PTP_INTR: + + //CPLD 2 + case CPLD_QSFP_ABS_0_7: + case CPLD_QSFP_ABS_8_15: + case CPLD_QSFP_ABS_16_23: + case CPLD_QSFP_ABS_24_31: + + case CPLD_QSFP_INTR_0_7: + case CPLD_QSFP_INTR_8_15: + case CPLD_QSFP_INTR_16_23: + case CPLD_QSFP_INTR_24_31: + + case CPLD_SFP_ABS_0_1: + case CPLD_SFP_RXLOS_0_1: + case CPLD_SFP_TXFLT_0_1: + + case CPLD_QSFP_MASK_ABS_0_7: + case CPLD_QSFP_MASK_ABS_8_15: + case CPLD_QSFP_MASK_ABS_16_23: + case CPLD_QSFP_MASK_ABS_24_31: + + case CPLD_QSFP_MASK_INTR_0_7: + case CPLD_QSFP_MASK_INTR_8_15: + case CPLD_QSFP_MASK_INTR_16_23: + case CPLD_QSFP_MASK_INTR_24_31: + + case CPLD_SFP_MASK_ABS_0_1: + case CPLD_SFP_MASK_RXLOS_0_1: + case CPLD_SFP_MASK_TXFLT_0_1: + + case CPLD_QSFP_EVT_ABS_0_7: + case CPLD_QSFP_EVT_ABS_8_15: + case CPLD_QSFP_EVT_ABS_16_23: + case CPLD_QSFP_EVT_ABS_24_31: + + case CPLD_QSFP_EVT_INTR_0_7: + case CPLD_QSFP_EVT_INTR_8_15: + case CPLD_QSFP_EVT_INTR_16_23: + case CPLD_QSFP_EVT_INTR_24_31: + + case CPLD_SFP_EVT_ABS_0_1: + case CPLD_SFP_EVT_RXLOS_0_1: + case CPLD_SFP_EVT_TXFLT_0_1: + + case CPLD_QSFP_RESET_0_7: + case CPLD_QSFP_RESET_8_15: + case CPLD_QSFP_RESET_16_23: + case CPLD_QSFP_RESET_24_31: + + case CPLD_QSFP_LPMODE_0_7: + case CPLD_QSFP_LPMODE_8_15: + case CPLD_QSFP_LPMODE_16_23: + case CPLD_QSFP_LPMODE_24_31: + + case CPLD_SFP_TXDIS_0_1: + case CPLD_SFP_TS_0_1: + case CPLD_SFP_RS_0_1: + + case DBG_CPLD_QSFP_ABS_0_7: + case DBG_CPLD_QSFP_ABS_8_15: + case DBG_CPLD_QSFP_ABS_16_23: + case DBG_CPLD_QSFP_ABS_24_31: + + case DBG_CPLD_QSFP_INTR_0_7: + case DBG_CPLD_QSFP_INTR_8_15: + case DBG_CPLD_QSFP_INTR_16_23: + case DBG_CPLD_QSFP_INTR_24_31: + + case DBG_CPLD_SFP_ABS_0_1: + case DBG_CPLD_SFP_RXLOS_0_1: + case DBG_CPLD_SFP_TXFLT_0_1: + reg = attr_reg[attr->index].reg; + mask= attr_reg[attr->index].mask; + data_type = attr_reg[attr->index].data_type; + break; + default: + return -EINVAL; + } + return cpld_reg_read(dev, buf, reg, mask, data_type); +} + +/* set cpld register value */ +static ssize_t cpld_store(struct device *dev, + struct device_attribute *da, const char *buf, size_t count) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + u8 reg = 0; + u8 mask = MASK_NONE; + + switch (attr->index) { + + // CPLD 1 & CPLD2 + case CPLD_EVT_CTRL: + + //CPLD 1 + case CPLD_MAC_MASK: + case CPLD_HWM_MASK: + case CPLD_CPLD2_MASK: + case CPLD_PTP_MASK: + case CPLD_SYSTEM_MASK: + case CPLD_MAC_RESET: + case CPLD_SYSTEM_RESET: + case CPLD_BMC_NTM_RESET: + case CPLD_USB_RESET: + case CPLD_I2C_MUX_RESET: + case CPLD_MISC_RESET: + case CPLD_BOOT_SELECT: + case CPLD_MUX_CTRL: + case CPLD_MISC_CTRL_1: + case CPLD_MISC_CTRL_2: + case CPLD_SYSTEM_LED_PSU: + case CPLD_SYSTEM_LED_SYS: + case CPLD_SYSTEM_LED_FAN: + case CPLD_SYSTEM_LED_ID: + + //CPLD 2 + case CPLD_QSFP_MASK_ABS_0_7: + case CPLD_QSFP_MASK_ABS_8_15: + case CPLD_QSFP_MASK_ABS_16_23: + case CPLD_QSFP_MASK_ABS_24_31: + case CPLD_QSFP_MASK_INTR_0_7: + case CPLD_QSFP_MASK_INTR_8_15: + case CPLD_QSFP_MASK_INTR_16_23: + case CPLD_QSFP_MASK_INTR_24_31: + case CPLD_SFP_MASK_ABS_0_1: + case CPLD_SFP_MASK_RXLOS_0_1: + case CPLD_SFP_MASK_TXFLT_0_1: + case CPLD_QSFP_RESET_0_7: + case CPLD_QSFP_RESET_8_15: + case CPLD_QSFP_RESET_16_23: + case CPLD_QSFP_RESET_24_31: + case CPLD_QSFP_LPMODE_0_7: + case CPLD_QSFP_LPMODE_8_15: + case CPLD_QSFP_LPMODE_16_23: + case CPLD_QSFP_LPMODE_24_31: + case CPLD_SFP_TXDIS_0_1: + case CPLD_SFP_TS_0_1: + case CPLD_SFP_RS_0_1: + reg = attr_reg[attr->index].reg; + mask= attr_reg[attr->index].mask; + break; + default: + return -EINVAL; + } + return cpld_reg_write(dev, buf, count, reg, mask); +} + +/* get cpld register value */ +static u8 _cpld_reg_read(struct device *dev, + u8 reg, + u8 mask) +{ + struct i2c_client *client = to_i2c_client(dev); + struct cpld_data *data = i2c_get_clientdata(client); + int reg_val; + + I2C_READ_BYTE_DATA(reg_val, &data->access_lock, client, reg); + + if (unlikely(reg_val < 0)) { + return reg_val; + } else { + reg_val=_mask_shift(reg_val, mask); + return reg_val; + } +} + +/* get cpld register value */ +static ssize_t cpld_reg_read(struct device *dev, + char *buf, + u8 reg, + u8 mask, + u8 data_type) +{ + int reg_val; + + reg_val = _cpld_reg_read(dev, reg, mask); + if (unlikely(reg_val < 0)) { + dev_err(dev, "cpld_reg_read() error, reg_val=%d\n", reg_val); + return reg_val; + } else { + return _parse_data(buf, reg_val, data_type); + } +} + +/* set cpld register value */ +static ssize_t cpld_reg_write(struct device *dev, + const char *buf, + size_t count, + u8 reg, + u8 mask) +{ + struct i2c_client *client = to_i2c_client(dev); + struct cpld_data *data = i2c_get_clientdata(client); + u8 reg_val, reg_val_now, shift; + int ret = 0; + + if (kstrtou8(buf, 0, ®_val) < 0) + return -EINVAL; + + //apply continuous bits operation if mask is specified, discontinuous bits are not supported + if (mask != MASK_ALL) { + reg_val_now = _cpld_reg_read(dev, reg, MASK_ALL); + if (unlikely(reg_val_now < 0)) { + dev_err(dev, "cpld_reg_write() error, reg_val_now=%d\n", reg_val_now); + return reg_val_now; + } else { + //clear bits in reg_val_now by the mask + reg_val_now &= ~mask; + //get bit shift by the mask + shift = _shift(mask); + //calculate new reg_val + reg_val = reg_val_now | (reg_val << shift); + } + } + + I2C_WRITE_BYTE_DATA(ret, &data->access_lock, + client, reg, reg_val); + + if (unlikely(ret < 0)) { + dev_err(dev, "cpld_reg_write() error, return=%d\n", ret); + return ret; + } + + return count; +} + +/* get qsfp port config register value */ +static ssize_t cpld_version_h_show(struct device *dev, + struct device_attribute *da, + char *buf) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + + if (attr->index == CPLD_VERSION_H) { + return sprintf(buf, "%d.%02d.%03d", + _cpld_reg_read(dev, attr_reg[CPLD_MAJOR_VER].reg, attr_reg[CPLD_MAJOR_VER].mask), + _cpld_reg_read(dev, attr_reg[CPLD_MINOR_VER].reg, attr_reg[CPLD_MINOR_VER].mask), + _cpld_reg_read(dev, attr_reg[CPLD_BUILD].reg, attr_reg[CPLD_BUILD].mask)); + } + return -1; +} + +/* add valid cpld client to list */ +static void cpld_add_client(struct i2c_client *client) +{ + struct cpld_client_node *node = NULL; + + node = kzalloc(sizeof(struct cpld_client_node), GFP_KERNEL); + if (!node) { + dev_info(&client->dev, + "Can't allocate cpld_client_node for index %d\n", + client->addr); + return; + } + + node->client = client; + + mutex_lock(&list_lock); + list_add(&node->list, &cpld_client_list); + mutex_unlock(&list_lock); +} + +/* remove exist cpld client in list */ +static void cpld_remove_client(struct i2c_client *client) +{ + struct list_head *list_node = NULL; + struct cpld_client_node *cpld_node = NULL; + int found = 0; + + mutex_lock(&list_lock); + list_for_each(list_node, &cpld_client_list) { + cpld_node = list_entry(list_node, + struct cpld_client_node, list); + + if (cpld_node->client == client) { + found = 1; + break; + } + } + + if (found) { + list_del(list_node); + kfree(cpld_node); + } + mutex_unlock(&list_lock); +} + +/* cpld drvier probe */ +static int cpld_probe(struct i2c_client *client, + const struct i2c_device_id *dev_id) +{ + int status; + struct cpld_data *data = NULL; + int ret = -EPERM; + + data = kzalloc(sizeof(struct cpld_data), GFP_KERNEL); + if (!data) + return -ENOMEM; + + /* init cpld data for client */ + i2c_set_clientdata(client, data); + mutex_init(&data->access_lock); + + if (!i2c_check_functionality(client->adapter, + I2C_FUNC_SMBUS_BYTE_DATA)) { + dev_info(&client->dev, + "i2c_check_functionality failed (0x%x)\n", + client->addr); + status = -EIO; + goto exit; + } + + /* get cpld id from device */ + ret = i2c_smbus_read_byte_data(client, CPLD_ID_REG); + + if (ret < 0) { + dev_info(&client->dev, + "fail to get cpld id (0x%x) at addr (0x%x)\n", + CPLD_ID_REG, client->addr); + status = -EIO; + goto exit; + } + + if (INVALID(ret, cpld1, cpld2)) { + dev_info(&client->dev, + "cpld id %d(device) not valid\n", ret); + //status = -EPERM; + //goto exit; + } + + data->index = dev_id->driver_data; + + /* register sysfs hooks for different cpld group */ + dev_info(&client->dev, "probe cpld with index %d\n", data->index); + switch (data->index) { + case cpld1: + status = sysfs_create_group(&client->dev.kobj, + &cpld1_group); + break; + case cpld2: + status = sysfs_create_group(&client->dev.kobj, + &cpld2_group); + break; + default: + status = -EINVAL; + } + + if (status) + goto exit; + + dev_info(&client->dev, "chip found\n"); + + /* add probe chip to client list */ + cpld_add_client(client); + + return 0; +exit: + switch (data->index) { + case cpld1: + sysfs_remove_group(&client->dev.kobj, &cpld1_group); + break; + case cpld2: + sysfs_remove_group(&client->dev.kobj, &cpld2_group); + break; + default: + break; + } + return status; +} + +/* cpld drvier remove */ +#if LINUX_VERSION_CODE < KERNEL_VERSION(6, 1, 0) +static int +#else +static void +#endif +cpld_remove(struct i2c_client *client) +{ + struct cpld_data *data = i2c_get_clientdata(client); + + switch (data->index) { + case cpld1: + sysfs_remove_group(&client->dev.kobj, &cpld1_group); + break; + case cpld2: + sysfs_remove_group(&client->dev.kobj, &cpld2_group); + break; + } + + cpld_remove_client(client); +#if LINUX_VERSION_CODE < KERNEL_VERSION(6, 1, 0) + return 0; +#endif +} + +#if 0 /* FIXME */ +#define I2C_RW_RETRY_COUNT 3 +#define I2C_RW_RETRY_INTERVAL 60 + +static int s9110_32x_cpld_read_internal(struct i2c_client *client, u8 reg) +{ + int retry = I2C_RW_RETRY_COUNT; + int reg_val = 0; + struct cpld_data *data = i2c_get_clientdata(client); + + while (retry) { + I2C_READ_BYTE_DATA(reg_val, &data->access_lock, client, reg); + if (unlikely(reg_val < 0)) { + msleep(I2C_RW_RETRY_INTERVAL); + retry--; + + if (retry == 0) { + dev_err(&client->dev, "%s() retry %d times but still failed, reg=%x\n", __func__, I2C_RW_RETRY_COUNT, reg); + } + + continue; + } + + break; + } + + return reg_val; +} + +static int s9110_32x_cpld_write_internal(struct i2c_client *client, u8 reg, u8 value) +{ + int ret = 0, retry = I2C_RW_RETRY_COUNT; + struct cpld_data *data = i2c_get_clientdata(client); + + while (retry) { + I2C_WRITE_BYTE_DATA(ret, &data->access_lock, client, reg, value); + if (unlikely(ret < 0)) { + msleep(I2C_RW_RETRY_INTERVAL); + retry--; + + if (retry == 0) { + dev_err(&client->dev, "%s() retry %d times but still failed, reg=%x\n", __func__, I2C_RW_RETRY_COUNT, reg); + } + + continue; + } + break; + } + + return ret; +} + + +int s9110_32x_cpld_psu_mux_sel(u8 mux_sel) +{ + unsigned short cpld_addr = cpld_i2c_addr[0]; + u8 reg = CPLD_MUX_CTRL_REG; + u8 reg_val = 0; + u8 psu_mux_mask = 0x06; + u8 mux_sel_val = 0; + + struct list_head *list_node = NULL; + struct cpld_client_node *cpld_node = NULL; + int ret = -EIO; + + switch(mux_sel) { + case 0: + //psu 0 + mux_sel_val = 0x04; + break; + case 1: + //psu 1 + mux_sel_val = 0x02; + break; + default: + //bmc + mux_sel_val = psu_mux_mask; + break; + } + + mutex_lock(&list_lock); + + list_for_each(list_node, &cpld_client_list) + { + cpld_node = list_entry(list_node, struct cpld_client_node, list); + + if (cpld_node->client->addr == cpld_addr) { + //read current reg value + reg_val = s9110_32x_cpld_read_internal(cpld_node->client, reg); + //clear psu_mux_sel bits (bit 1 and 2) + reg_val &= ~psu_mux_mask; + //modify psu_mux_sel bits (bit 1 and 2) + reg_val |= mux_sel_val; + //write reg value + s9110_32x_cpld_write_internal(cpld_node->client, reg, reg_val); + + break; + } else { + pr_err("cpld_node->client->addr=%x, cpld_addr=%x\n", cpld_node->client->addr, cpld_addr); + } + } + + mutex_unlock(&list_lock); + + return ret; +} +EXPORT_SYMBOL(s9110_32x_cpld_psu_mux_sel); +#endif + +MODULE_DEVICE_TABLE(i2c, cpld_id); + +static struct i2c_driver cpld_driver = { + .class = I2C_CLASS_HWMON, + .driver = { + .name = "x86_64_ufispace_s9110_32x_cpld", + }, + .probe = cpld_probe, + .remove = cpld_remove, + .id_table = cpld_id, + .address_list = cpld_i2c_addr, +}; + +static int __init cpld_init(void) +{ + mutex_init(&list_lock); + return i2c_add_driver(&cpld_driver); +} + +static void __exit cpld_exit(void) +{ + i2c_del_driver(&cpld_driver); +} + +MODULE_AUTHOR("Nonodark Huang "); +MODULE_DESCRIPTION("x86_64_ufispace_s9110_32x_cpld driver"); +MODULE_LICENSE("GPL"); + +module_init(cpld_init); +module_exit(cpld_exit); diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s9110-32x/modules/x86-64-ufispace-s9110-32x-cpld.h b/platform/broadcom/sonic-platform-modules-ufispace/s9110-32x/modules/x86-64-ufispace-s9110-32x-cpld.h new file mode 100644 index 0000000000..74db9cab4a --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ufispace/s9110-32x/modules/x86-64-ufispace-s9110-32x-cpld.h @@ -0,0 +1,149 @@ +/* header file for i2c cpld driver of ufispace_s9110_32x + * + * Copyright (C) 2022 UfiSpace Technology Corporation. + * Jason Tsai + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. + */ + +#ifndef UFISPACE_S9110_32X_CPLD_H +#define UFISPACE_S9110_32X_CPLD_H + +/* CPLD device index value */ +enum cpld_id { + cpld1, + cpld2 +}; + +/* CPLD 1 & CPLD 2 registers */ +#define CPLD_NONE_REG 0x00 +#define CPLD_VERSION_REG 0x02 +#define CPLD_ID_REG 0x03 +#define CPLD_BUILD_REG 0x04 +#define CPLD_CHIP_REG 0x05 +#define CPLD_EVT_CTRL_REG 0x3F + +/* CPLD 1 registers */ +#define CPLD_BOARD_ID_0_REG 0x00 +#define CPLD_BOARD_ID_1_REG 0x01 +#define CPLD_SKU_EXT_REG 0x06 +#define CPLD_MAC_INTR_REG 0x10 +#define CPLD_HWM_INTR_REG 0x13 +#define CPLD_CPLD2_INTR_REG 0x14 +#define CPLD_PTP_INTR_REG 0x1B +#define CPLD_SYSTEM_INTR_REG 0x1C +#define CPLD_MAC_MASK_REG 0x20 +#define CPLD_HWM_MASK_REG 0x23 +#define CPLD_CPLD2_MASK_REG 0x24 +#define CPLD_PTP_MASK_REG 0x2B +#define CPLD_SYSTEM_MASK_REG 0x2C +#define CPLD_MAC_EVT_REG 0x30 +#define CPLD_HWM_EVT_REG 0x33 +#define CPLD_CPLD2_EVT_REG 0x34 +#define CPLD_MAC_RESET_REG 0x40 +#define CPLD_SYSTEM_RESET_REG 0x41 +#define CPLD_BMC_NTM_RESET_REG 0x43 +#define CPLD_USB_RESET_REG 0x44 +#define CPLD_I2C_MUX_RESET_REG 0x46 +#define CPLD_MISC_RESET_REG 0x48 +#define CPLD_BRD_PRESENT_REG 0x50 +#define CPLD_PSU_STATUS_REG 0x51 +#define CPLD_SYSTEM_PWR_REG 0x52 +#define CPLD_MAC_SYNCE_REG 0x53 +#define CPLD_MAC_AVS_REG 0x54 +#define CPLD_SYSTEM_STATUS_REG 0x55 +#define CPLD_WATCHDOG_REG 0x5A +#define CPLD_BOOT_SELECT_REG 0x5B +#define CPLD_MUX_CTRL_REG 0x5C +#define CPLD_MISC_CTRL_1_REG 0x5D +#define CPLD_MISC_CTRL_2_REG 0x5E +#define CPLD_MAC_TEMP_REG 0x61 +#define CPLD_SYSTEM_LED_PSU_REG 0x80 +#define CPLD_SYSTEM_LED_SYS_REG 0x81 +#define CPLD_SYSTEM_LED_FAN_REG 0x83 +#define CPLD_SYSTEM_LED_ID_REG 0x84 +#define DBG_CPLD_MAC_INTR_REG 0xE0 +#define DBG_CPLD_HWM_INTR_REG 0xE3 +#define DBG_CPLD_CPLD2_INTR_REG 0xE4 +#define DBG_CPLD_PTP_INTR_REG 0xEB + +/* CPLD 2*/ +#define CPLD_QSFP_ABS_0_7_REG 0x10 +#define CPLD_QSFP_ABS_8_15_REG 0x11 +#define CPLD_QSFP_ABS_16_23_REG 0x12 +#define CPLD_QSFP_ABS_24_31_REG 0x13 +#define CPLD_QSFP_INTR_0_7_REG 0x14 +#define CPLD_QSFP_INTR_8_15_REG 0x15 +#define CPLD_QSFP_INTR_16_23_REG 0x16 +#define CPLD_QSFP_INTR_24_31_REG 0x17 +#define CPLD_SFP_ABS_0_1_REG 0x18 +#define CPLD_SFP_RXLOS_0_1_REG 0x19 +#define CPLD_SFP_TXFLT_0_1_REG 0x1a +#define CPLD_QSFP_MASK_ABS_0_7_REG 0x20 +#define CPLD_QSFP_MASK_ABS_8_15_REG 0x21 +#define CPLD_QSFP_MASK_ABS_16_23_REG 0x22 +#define CPLD_QSFP_MASK_ABS_24_31_REG 0x23 +#define CPLD_QSFP_MASK_INTR_0_7_REG 0x24 +#define CPLD_QSFP_MASK_INTR_8_15_REG 0x25 +#define CPLD_QSFP_MASK_INTR_16_23_REG 0x26 +#define CPLD_QSFP_MASK_INTR_24_31_REG 0x27 +#define CPLD_SFP_MASK_ABS_0_1_REG 0x28 +#define CPLD_SFP_MASK_RXLOS_0_1_REG 0x29 +#define CPLD_SFP_MASK_TXFLT_0_1_REG 0x2A +#define CPLD_QSFP_EVT_ABS_0_7_REG 0x30 +#define CPLD_QSFP_EVT_ABS_8_15_REG 0x31 +#define CPLD_QSFP_EVT_ABS_16_23_REG 0x32 +#define CPLD_QSFP_EVT_ABS_24_31_REG 0x33 +#define CPLD_QSFP_EVT_INTR_0_7_REG 0x34 +#define CPLD_QSFP_EVT_INTR_8_15_REG 0x35 +#define CPLD_QSFP_EVT_INTR_16_23_REG 0x36 +#define CPLD_QSFP_EVT_INTR_24_31_REG 0x37 +#define CPLD_SFP_EVT_ABS_0_1_REG 0x38 +#define CPLD_SFP_EVT_RXLOS_0_1_REG 0x39 +#define CPLD_SFP_EVT_TXFLT_0_1_REG 0x3A +#define CPLD_QSFP_RESET_0_7_REG 0x40 +#define CPLD_QSFP_RESET_8_15_REG 0x41 +#define CPLD_QSFP_RESET_16_23_REG 0x42 +#define CPLD_QSFP_RESET_24_31_REG 0x43 +#define CPLD_QSFP_LPMODE_0_7_REG 0x44 +#define CPLD_QSFP_LPMODE_8_15_REG 0x45 +#define CPLD_QSFP_LPMODE_16_23_REG 0x46 +#define CPLD_QSFP_LPMODE_24_31_REG 0x47 +#define CPLD_SFP_TXDIS_0_1_REG 0x48 +#define CPLD_SFP_TS_0_1_REG 0x49 +#define CPLD_SFP_RS_0_1_REG 0x4A +#define DBG_CPLD_QSFP_ABS_0_7_REG 0xD0 +#define DBG_CPLD_QSFP_ABS_8_15_REG 0xD1 +#define DBG_CPLD_QSFP_ABS_16_23_REG 0xD2 +#define DBG_CPLD_QSFP_ABS_24_31_REG 0xD3 +#define DBG_CPLD_QSFP_INTR_0_7_REG 0xD4 +#define DBG_CPLD_QSFP_INTR_8_15_REG 0xD5 +#define DBG_CPLD_QSFP_INTR_16_23_REG 0xD6 +#define DBG_CPLD_QSFP_INTR_24_31_REG 0xD7 +#define DBG_CPLD_SFP_ABS_0_1_REG 0xD8 +#define DBG_CPLD_SFP_RXLOS_0_1_REG 0xD9 +#define DBG_CPLD_SFP_TXFLT_0_1_REG 0xDA + +//MASK +#define MASK_ALL (0xFF) +#define MASK_NONE (0x00) +#define MASK_0000_0111 (0x07) +#define MASK_0011_1111 (0x3F) +#define MASK_1100_0000 (0xC0) + +/* common manipulation */ +#define INVALID(i, min, max) ((i < min) || (i > max) ? 1u : 0u) + +#endif diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s9110-32x/modules/x86-64-ufispace-s9110-32x-lpc.c b/platform/broadcom/sonic-platform-modules-ufispace/s9110-32x/modules/x86-64-ufispace-s9110-32x-lpc.c new file mode 100644 index 0000000000..14d7c7ec6e --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ufispace/s9110-32x/modules/x86-64-ufispace-s9110-32x-lpc.c @@ -0,0 +1,981 @@ +/* + * A lpc driver for the ufispace_s9110_32x + * + * Copyright (C) 2022 UfiSpace Technology Corporation. + * Nonodark Huang + * + * Based on ad7414.c + * Copyright 2006 Stefan Roese , DENX Software Engineering + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. + */ +#include +#include +#include +#include +#include +#include + +#if !defined(SENSOR_DEVICE_ATTR_RO) +#define SENSOR_DEVICE_ATTR_RO(_name, _func, _index) \ + SENSOR_DEVICE_ATTR(_name, 0444, _func##_show, NULL, _index) +#endif + +#if !defined(SENSOR_DEVICE_ATTR_RW) +#define SENSOR_DEVICE_ATTR_RW(_name, _func, _index) \ + SENSOR_DEVICE_ATTR(_name, 0644, _func##_show, _func##_store, _index) + +#endif + +#if !defined(SENSOR_DEVICE_ATTR_WO) +#define SENSOR_DEVICE_ATTR_WO(_name, _func, _index) \ + SENSOR_DEVICE_ATTR(_name, 0200, NULL, _func##_store, _index) +#endif + +#define BSP_LOG_R(fmt, args...) \ + _bsp_log (LOG_READ, KERN_INFO "%s:%s[%d]: " fmt "\r\n", \ + __FILE__, __func__, __LINE__, ##args) +#define BSP_LOG_W(fmt, args...) \ + _bsp_log (LOG_WRITE, KERN_INFO "%s:%s[%d]: " fmt "\r\n", \ + __FILE__, __func__, __LINE__, ##args) + +#define _DEVICE_ATTR(_name) \ + &sensor_dev_attr_##_name.dev_attr.attr + +#define BSP_PR(level, fmt, args...) _bsp_log (LOG_SYS, level "[BSP]" fmt "\r\n", ##args) + +#define DRIVER_NAME "x86_64_ufispace_s9110_32x_lpc" + +/* LPC registers */ + +#define REG_BASE_MB 0x700 +#define REG_BASE_EC 0xE300 + +#define REG_NONE 0x00 +//MB CPLD +#define REG_BRD_ID_0 (REG_BASE_MB + 0x00) +#define REG_BRD_ID_1 (REG_BASE_MB + 0x01) +#define REG_CPLD_VERSION (REG_BASE_MB + 0x02) +#define REG_CPLD_ID (REG_BASE_MB + 0x03) +#define REG_CPLD_BUILD (REG_BASE_MB + 0x04) +#define REG_CPLD_CHIP (REG_BASE_MB + 0x05) +#define REG_BRD_EXT_ID (REG_BASE_MB + 0x06) +#define REG_I2C_MUX_RESET (REG_BASE_MB + 0x46) +#define REG_MUX_CTRL (REG_BASE_MB + 0x5C) +#define REG_CPLD1_MISC_CTRL (REG_BASE_MB + 0x5D) +#define REG_CPLD1_MISC_CTRL_2 (REG_BASE_MB + 0x5E) + +//EC +#define REG_MISC_CTRL (REG_BASE_EC + 0x0C) +#define REG_CPU_REV (REG_BASE_EC + 0x17) + +// BMC mailbox +#define REG_TEMP_MAC_HWM (REG_BASE_MB + 0xC0) + +#define MASK_ALL (0xFF) +#define MASK_NONE (0x00) +#define MASK_0000_0011 (0x03) +#define MASK_0000_0100 (0x04) +#define MASK_0000_0111 (0x07) +#define MASK_0001_1000 (0x18) +#define MASK_0010_0000 (0x20) +#define MASK_0011_0111 (0x37) +#define MASK_0011_1111 (0x3F) +#define MASK_0100_0000 (0x40) +#define MASK_1000_0000 (0x80) +#define MASK_1100_0000 (0xC0) + +#define LPC_MDELAY (5) +#define MDELAY_RESET_INTERVAL (100) +#define MDELAY_RESET_FINISH (500) + +/* LPC sysfs attributes index */ +enum lpc_sysfs_attributes { + //MB CPLD + ATT_BRD_ID_0, + ATT_BRD_SKU_ID, + ATT_BRD_ID_1, + ATT_BRD_HW_ID, + ATT_BRD_DEPH_ID, + ATT_BRD_BUILD_ID, + ATT_BRD_BIT_SEL, + ATT_BRD_CPLD_ID_TYPE, + ATT_CPLD_VERSION_MAJOR, + ATT_CPLD_VERSION_MINOR, + ATT_CPLD_ID, + ATT_CPLD_BUILD, + ATT_CPLD_VERSION_H, + ATT_CPLD_CHIP, + ATT_BRD_EXT_ID, + ATT_MUX_RESET_ALL, + ATT_MUX_CTRL, + ATT_UART_CTRL, + ATT_USB_CTRL, + + //EC + ATT_BIOS_BOOT_SEL, + ATT_CPU_REV_HW_REV, + ATT_CPU_REV_DEV_PHASE, + ATT_CPU_REV_BUILD_ID, + + //BMC mailbox + ATT_TEMP_MAC_HWM, + + //BSP + ATT_BSP_VERSION, + ATT_BSP_DEBUG, + ATT_BSP_PR_INFO, + ATT_BSP_PR_ERR, + ATT_BSP_REG, + ATT_BSP_REG_VALUE, + ATT_BSP_GPIO_MAX, + ATT_MAX +}; + +enum data_type { + DATA_HEX, + DATA_DEC, + DATA_S_DEC, + DATA_UNK, +}; + +typedef struct { + u16 reg; + u8 mask; + u8 data_type; +} attr_reg_map_t; + +attr_reg_map_t attr_reg[]= { + + //MB CPLD + [ATT_BRD_ID_0] = {REG_BRD_ID_0 , MASK_ALL , DATA_HEX}, + [ATT_BRD_SKU_ID] = {REG_BRD_ID_0 , MASK_ALL , DATA_DEC}, + [ATT_BRD_ID_1] = {REG_BRD_ID_1 , MASK_ALL , DATA_HEX}, + [ATT_BRD_HW_ID] = {REG_BRD_ID_1 , MASK_0000_0011, DATA_DEC}, + [ATT_BRD_DEPH_ID] = {REG_BRD_ID_1 , MASK_0000_0100, DATA_DEC}, + [ATT_BRD_BUILD_ID] = {REG_BRD_ID_1 , MASK_0001_1000, DATA_DEC}, + [ATT_BRD_BIT_SEL] = {REG_BRD_ID_1 , MASK_0010_0000, DATA_DEC}, + [ATT_BRD_CPLD_ID_TYPE] = {REG_BRD_ID_1 , MASK_1000_0000, DATA_DEC}, + [ATT_CPLD_VERSION_MAJOR] = {REG_CPLD_VERSION , MASK_1100_0000, DATA_DEC}, + [ATT_CPLD_VERSION_MINOR] = {REG_CPLD_VERSION , MASK_0011_1111, DATA_DEC}, + [ATT_CPLD_ID] = {REG_CPLD_ID , MASK_0000_0111, DATA_DEC}, + [ATT_CPLD_BUILD] = {REG_CPLD_BUILD , MASK_ALL , DATA_DEC}, + [ATT_CPLD_VERSION_H] = {REG_NONE , MASK_NONE , DATA_UNK}, + [ATT_CPLD_CHIP] = {REG_CPLD_CHIP , MASK_0000_0011, DATA_DEC}, + [ATT_BRD_EXT_ID] = {REG_BRD_EXT_ID , MASK_0000_0111, DATA_DEC}, + [ATT_MUX_RESET_ALL] = {REG_I2C_MUX_RESET, MASK_0011_1111, DATA_DEC}, + [ATT_MUX_CTRL] = {REG_MUX_CTRL , MASK_ALL , DATA_HEX}, + [ATT_UART_CTRL] = {REG_MUX_CTRL , MASK_0010_0000, DATA_DEC}, + [ATT_USB_CTRL] = {REG_MUX_CTRL , MASK_1000_0000, DATA_DEC}, + + //EC + [ATT_BIOS_BOOT_SEL] = {REG_MISC_CTRL , MASK_0100_0000, DATA_DEC}, + [ATT_CPU_REV_HW_REV] = {REG_CPU_REV , MASK_0000_0011, DATA_DEC}, + [ATT_CPU_REV_DEV_PHASE] = {REG_CPU_REV , MASK_0000_0100, DATA_DEC}, + [ATT_CPU_REV_BUILD_ID] = {REG_CPU_REV , MASK_0001_1000, DATA_DEC}, + + //BMC mailbox + [ATT_TEMP_MAC_HWM] = {REG_TEMP_MAC_HWM , MASK_ALL , DATA_S_DEC}, + + //BSP + [ATT_BSP_VERSION] = {REG_NONE , MASK_NONE , DATA_UNK}, + [ATT_BSP_DEBUG] = {REG_NONE , MASK_NONE , DATA_UNK}, + [ATT_BSP_PR_INFO] = {REG_NONE , MASK_NONE , DATA_UNK}, + [ATT_BSP_PR_ERR] = {REG_NONE , MASK_NONE , DATA_UNK}, + [ATT_BSP_REG] = {REG_NONE , MASK_NONE , DATA_UNK}, + [ATT_BSP_REG_VALUE] = {REG_NONE , MASK_NONE , DATA_HEX}, + [ATT_BSP_GPIO_MAX] = {REG_NONE , MASK_NONE , DATA_DEC}, +}; + +enum bsp_log_types { + LOG_NONE, + LOG_RW, + LOG_READ, + LOG_WRITE, + LOG_SYS +}; + +enum bsp_log_ctrl { + LOG_DISABLE, + LOG_ENABLE +}; + +struct lpc_data_s { + struct mutex access_lock; +}; + +struct lpc_data_s *lpc_data; +char bsp_version[16]=""; +char bsp_debug[2]="0"; +char bsp_reg[8]="0x0"; +u8 enable_log_read = LOG_DISABLE; +u8 enable_log_write = LOG_DISABLE; +u8 enable_log_sys = LOG_ENABLE; +u8 mailbox_inited=0; + +/* reg shift */ +static u8 _shift(u8 mask) +{ + int i=0, mask_one=1; + + for(i=0; i<8; ++i) { + if ((mask & mask_one) == 1) + return i; + else + mask >>= 1; + } + + return -1; +} + +/* reg mask and shift */ +static u8 _mask_shift(u8 val, u8 mask) +{ + int shift=0; + + shift = _shift(mask); + + return (val & mask) >> shift; +} + +static u8 _bit_operation(u8 reg_val, u8 bit, u8 bit_val) +{ + if (bit_val == 0) + reg_val = reg_val & ~(1 << bit); + else + reg_val = reg_val | (1 << bit); + return reg_val; +} + +static u8 _parse_data(char *buf, unsigned int data, u8 data_type) +{ + if(buf == NULL) { + return -1; + } + + if(data_type == DATA_HEX) { + return sprintf(buf, "0x%02x", data); + } else if(data_type == DATA_DEC) { + return sprintf(buf, "%u", data); + } else { + return -1; + } + return 0; +} + +static int _bsp_log(u8 log_type, char *fmt, ...) +{ + if ((log_type==LOG_READ && enable_log_read) || + (log_type==LOG_WRITE && enable_log_write) || + (log_type==LOG_SYS && enable_log_sys) ) { + va_list args; + int r; + + va_start(args, fmt); + r = vprintk(fmt, args); + va_end(args); + + return r; + } else { + return 0; + } +} + +static int _bsp_log_config(u8 log_type) +{ + switch(log_type) { + case LOG_NONE: + enable_log_read = LOG_DISABLE; + enable_log_write = LOG_DISABLE; + break; + case LOG_RW: + enable_log_read = LOG_ENABLE; + enable_log_write = LOG_ENABLE; + break; + case LOG_READ: + enable_log_read = LOG_ENABLE; + enable_log_write = LOG_DISABLE; + break; + case LOG_WRITE: + enable_log_read = LOG_DISABLE; + enable_log_write = LOG_ENABLE; + break; + default: + return -EINVAL; + } + return 0; +} + +static void _outb(u8 data, u16 port) +{ + outb(data, port); + mdelay(LPC_MDELAY); +} + +/* init bmc mailbox, get from BMC team */ +static int bmc_mailbox_init(void) +{ + if (mailbox_inited) { + return mailbox_inited; + } + + //Enable super io writing + _outb(0xa5, 0x2e); + _outb(0xa5, 0x2e); + + //Logic device number + _outb(0x07, 0x2e); + _outb(0x0e, 0x2f); + + //Disable mailbox + _outb(0x30, 0x2e); + _outb(0x00, 0x2f); + + //Set base address bit + _outb(0x60, 0x2e); + _outb(0x07, 0x2f); + _outb(0x61, 0x2e); + _outb(0xc0, 0x2f); + + //Select bit[3:0] of SIRQ + _outb(0x70, 0x2e); + _outb(0x07, 0x2f); + + //Low level trigger + _outb(0x71, 0x2e); + _outb(0x01, 0x2f); + + //Enable mailbox + _outb(0x30, 0x2e); + _outb(0x01, 0x2f); + + //Disable super io writing + _outb(0xaa, 0x2e); + + //Mailbox initial + _outb(0x00, 0x786); + _outb(0x00, 0x787); + + //set mailbox_inited + mailbox_inited = 1; + + return mailbox_inited; +} + +/* get lpc register value */ +static u8 _lpc_reg_read(u16 reg, u8 mask) +{ + u8 reg_val=0x0, reg_mk_shf_val = 0x0; + + mutex_lock(&lpc_data->access_lock); + reg_val = inb(reg); + mutex_unlock(&lpc_data->access_lock); + + reg_mk_shf_val = _mask_shift(reg_val, mask); + + BSP_LOG_R("reg=0x%03x, reg_val=0x%02x, mask=0x%02x, reg_mk_shf_val=0x%02x", reg, reg_val, mask, reg_mk_shf_val); + + return reg_mk_shf_val; +} + +/* get lpc register value */ +static ssize_t lpc_reg_read(u16 reg, u8 mask, char *buf, u8 data_type) +{ + u8 reg_val; + int len=0; + + reg_val = _lpc_reg_read(reg, mask); + + // may need to change to hex value ? + len=_parse_data(buf, reg_val, data_type); + + return len; +} + +/* set lpc register value */ +static ssize_t lpc_reg_write(u16 reg, u8 mask, const char *buf, size_t count, u8 data_type) +{ + u8 reg_val, reg_val_now, shift; + + if (kstrtou8(buf, 0, ®_val) < 0) { + if(data_type == DATA_S_DEC) { + if (kstrtos8(buf, 0, ®_val) < 0) { + return -EINVAL; + } + } else { + return -EINVAL; + } + } + + //apply continuous bits operation if mask is specified, discontinuous bits are not supported + if (mask != MASK_ALL) { + reg_val_now = _lpc_reg_read(reg, MASK_ALL); + //clear bits in reg_val_now by the mask + reg_val_now &= ~mask; + //get bit shift by the mask + shift = _shift(mask); + //calculate new reg_val + reg_val = _bit_operation(reg_val_now, shift, reg_val); + } + + mutex_lock(&lpc_data->access_lock); + + _outb(reg_val, reg); + + mutex_unlock(&lpc_data->access_lock); + + BSP_LOG_W("reg=0x%03x, reg_val=0x%02x, mask=0x%02x", reg, reg_val, mask); + + return count; +} + +/* get bsp value */ +static ssize_t bsp_read(char *buf, char *str) +{ + ssize_t len=0; + + mutex_lock(&lpc_data->access_lock); + len=sprintf(buf, "%s", str); + mutex_unlock(&lpc_data->access_lock); + + BSP_LOG_R("reg_val=%s", str); + + return len; +} + +/* set bsp value */ +static ssize_t bsp_write(const char *buf, char *str, size_t str_len, size_t count) +{ + mutex_lock(&lpc_data->access_lock); + snprintf(str, str_len, "%s", buf); + mutex_unlock(&lpc_data->access_lock); + + BSP_LOG_W("reg_val=%s", str); + + return count; +} + +/* get gpio max value */ +static ssize_t gpio_max_show(struct device *dev, + struct device_attribute *da, + char *buf) +{ + u8 data_type=DATA_UNK; + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + + if (attr->index == ATT_BSP_GPIO_MAX) { + data_type = attr_reg[attr->index].data_type; + return _parse_data(buf, ARCH_NR_GPIOS-1, data_type); + } + return -1; +} + +/* get mb cpld version in human readable format */ +static ssize_t mb_cpld_version_h_show(struct device *dev, + struct device_attribute *da, char *buf) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + + unsigned int attr_major = 0; + unsigned int attr_minor = 0; + unsigned int attr_build = 0; + + switch (attr->index) { + case ATT_CPLD_VERSION_H: + attr_major = ATT_CPLD_VERSION_MAJOR; + attr_minor = ATT_CPLD_VERSION_MINOR; + attr_build = ATT_CPLD_BUILD; + break; + default: + return -1; + } + + return sprintf(buf, "%d.%02d.%03d", _lpc_reg_read(attr_reg[attr_major].reg, attr_reg[attr_major].mask), + _lpc_reg_read(attr_reg[attr_minor].reg, attr_reg[attr_minor].mask), + _lpc_reg_read(attr_reg[attr_build].reg, attr_reg[attr_build].mask)); + +} + +/* get lpc register value */ +static ssize_t lpc_callback_show(struct device *dev, + struct device_attribute *da, char *buf) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + u16 reg = 0; + u8 mask = MASK_NONE; + u8 data_type=DATA_UNK; + + switch (attr->index) { + // MB CPLD + case ATT_BRD_ID_0: + case ATT_BRD_SKU_ID: + case ATT_BRD_ID_1: + case ATT_BRD_HW_ID: + case ATT_BRD_DEPH_ID: + case ATT_BRD_BUILD_ID: + case ATT_BRD_BIT_SEL: + case ATT_BRD_CPLD_ID_TYPE: + case ATT_CPLD_VERSION_MAJOR: + case ATT_CPLD_VERSION_MINOR: + case ATT_CPLD_ID: + case ATT_CPLD_BUILD: + case ATT_CPLD_VERSION_H: + case ATT_CPLD_CHIP: + case ATT_BRD_EXT_ID: + case ATT_MUX_RESET_ALL: + case ATT_MUX_CTRL: + case ATT_UART_CTRL: + case ATT_USB_CTRL: + + // EC + case ATT_BIOS_BOOT_SEL: + case ATT_CPU_REV_HW_REV: + case ATT_CPU_REV_DEV_PHASE: + case ATT_CPU_REV_BUILD_ID: + + //BSP + case ATT_BSP_GPIO_MAX: + reg = attr_reg[attr->index].reg; + mask= attr_reg[attr->index].mask; + data_type = attr_reg[attr->index].data_type; + break; + case ATT_BSP_REG_VALUE: + if (kstrtou16(bsp_reg, 0, ®) < 0) + return -EINVAL; + + mask = MASK_ALL; + break; + default: + return -EINVAL; + } + return lpc_reg_read(reg, mask, buf, data_type); +} + +/* set lpc register value */ +static ssize_t lpc_callback_store(struct device *dev, + struct device_attribute *da, const char *buf, size_t count) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + u16 reg = 0; + u8 mask = MASK_NONE; + u8 data_type=DATA_UNK; + + switch (attr->index) { + //MB CPLD + case ATT_MUX_CTRL: + case ATT_UART_CTRL: + case ATT_USB_CTRL: + + //BMC mailbox + case ATT_TEMP_MAC_HWM: + reg = attr_reg[attr->index].reg; + mask= attr_reg[attr->index].mask; + data_type = attr_reg[attr->index].data_type; + break; + default: + return -EINVAL; + } + + if(attr->index == ATT_TEMP_MAC_HWM) { + bmc_mailbox_init(); + } + + return lpc_reg_write(reg, mask, buf, count, data_type); + +} + +/* get bsp parameter value */ +static ssize_t bsp_callback_show(struct device *dev, + struct device_attribute *da, char *buf) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + char *str=NULL; + + switch (attr->index) { + case ATT_BSP_VERSION: + str = bsp_version; + break; + case ATT_BSP_DEBUG: + str = bsp_debug; + break; + case ATT_BSP_REG: + str = bsp_reg; + break; + default: + return -EINVAL; + } + return bsp_read(buf, str); +} + +/* set bsp parameter value */ +static ssize_t bsp_callback_store(struct device *dev, + struct device_attribute *da, const char *buf, size_t count) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + int str_len=0; + char *str=NULL; + u16 reg = 0; + u8 bsp_debug_u8 = 0; + + switch (attr->index) { + case ATT_BSP_VERSION: + str = bsp_version; + str_len = sizeof(bsp_version); + break; + case ATT_BSP_DEBUG: + if (kstrtou8(buf, 0, &bsp_debug_u8) < 0) { + return -EINVAL; + } else if (_bsp_log_config(bsp_debug_u8) < 0) { + return -EINVAL; + } + + str = bsp_debug; + str_len = sizeof(bsp_debug); + break; + case ATT_BSP_REG: + if (kstrtou16(buf, 0, ®) < 0) + return -EINVAL; + + str = bsp_reg; + str_len = sizeof(bsp_reg); + break; + default: + return -EINVAL; + } + + return bsp_write(buf, str, str_len, count); +} + +static ssize_t bsp_pr_callback_store(struct device *dev, + struct device_attribute *da, const char *buf, size_t count) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + int str_len = strlen(buf); + + if(str_len <= 0) + return str_len; + + switch (attr->index) { + case ATT_BSP_PR_INFO: + BSP_PR(KERN_INFO, "%s", buf); + break; + case ATT_BSP_PR_ERR: + BSP_PR(KERN_ERR, "%s", buf); + break; + default: + return -EINVAL; + } + + return str_len; +} + +/* set mux_reset register value */ +static ssize_t mux_reset_all_store(struct device *dev, + struct device_attribute *da, const char *buf, size_t count) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + u16 reg = 0; + u8 mask = MASK_NONE; + u8 val = 0; + u8 mux_reset_reg_val = 0; + static int mux_reset_flag = 0; + + switch (attr->index) { + case ATT_MUX_RESET_ALL: + reg = attr_reg[attr->index].reg; + mask= attr_reg[attr->index].mask; + break; + default: + return -EINVAL; + } + + if (kstrtou8(buf, 0, &val) < 0) + return -EINVAL; + + if (mux_reset_flag == 0) { + if (val == 0) { + mutex_lock(&lpc_data->access_lock); + mux_reset_flag = 1; + BSP_LOG_W("i2c mux reset is triggered..."); + + //reset mux on ports + mux_reset_reg_val = inb(reg); + outb((mux_reset_reg_val & (u8)(~mask)), reg); + BSP_LOG_W("reg=0x%03x, reg_val=0x%02x", reg, mux_reset_reg_val & (u8)(~mask)); + + mdelay(MDELAY_RESET_INTERVAL); + + //unset mux on ports + outb((mux_reset_reg_val | mask), reg); + BSP_LOG_W("reg=0x%03x, reg_val=0x%02x", reg, mux_reset_reg_val | mask); + mdelay(MDELAY_RESET_FINISH); + mux_reset_flag = 0; + mutex_unlock(&lpc_data->access_lock); + } else { + return -EINVAL; + } + } else { + BSP_LOG_W("i2c mux is resetting... (ignore)"); + mutex_lock(&lpc_data->access_lock); + mutex_unlock(&lpc_data->access_lock); + } + return count; +} + +//SENSOR_DEVICE_ATTR - MB +static SENSOR_DEVICE_ATTR_RO(board_id_0 , lpc_callback , ATT_BRD_ID_0); +static SENSOR_DEVICE_ATTR_RO(board_sku_id , lpc_callback , ATT_BRD_SKU_ID); +static SENSOR_DEVICE_ATTR_RO(board_id_1 , lpc_callback , ATT_BRD_ID_1); +static SENSOR_DEVICE_ATTR_RO(board_hw_id , lpc_callback , ATT_BRD_HW_ID); +static SENSOR_DEVICE_ATTR_RO(board_deph_id , lpc_callback , ATT_BRD_DEPH_ID); +static SENSOR_DEVICE_ATTR_RO(board_build_id , lpc_callback , ATT_BRD_BUILD_ID); +static SENSOR_DEVICE_ATTR_RO(board_bit_sel , lpc_callback , ATT_BRD_BIT_SEL); +static SENSOR_DEVICE_ATTR_RO(board_cpld_id_type , lpc_callback , ATT_BRD_CPLD_ID_TYPE); +static SENSOR_DEVICE_ATTR_RO(cpld_version_major , lpc_callback , ATT_CPLD_VERSION_MAJOR); +static SENSOR_DEVICE_ATTR_RO(cpld_version_minor , lpc_callback , ATT_CPLD_VERSION_MINOR); +static SENSOR_DEVICE_ATTR_RO(cpld_id , lpc_callback , ATT_CPLD_ID); +static SENSOR_DEVICE_ATTR_RO(cpld_build , lpc_callback , ATT_CPLD_BUILD); +static SENSOR_DEVICE_ATTR_RO(cpld_version_h , mb_cpld_version_h, ATT_CPLD_VERSION_H); +static SENSOR_DEVICE_ATTR_RO(cpld_chip , lpc_callback , ATT_CPLD_CHIP); +static SENSOR_DEVICE_ATTR_RO(board_ext_id , lpc_callback , ATT_BRD_EXT_ID); +static SENSOR_DEVICE_ATTR_WO(mux_reset_all , mux_reset_all , ATT_MUX_RESET_ALL); +static SENSOR_DEVICE_ATTR_RW(mux_ctrl , lpc_callback , ATT_MUX_CTRL); +static SENSOR_DEVICE_ATTR_RW(uart_ctrl , lpc_callback , ATT_UART_CTRL); +static SENSOR_DEVICE_ATTR_RW(usb_ctrl , lpc_callback , ATT_USB_CTRL); + +//SENSOR_DEVICE_ATTR - EC +static SENSOR_DEVICE_ATTR_RO(bios_boot_sel , lpc_callback , ATT_BIOS_BOOT_SEL); +static SENSOR_DEVICE_ATTR_RO(cpu_rev_hw_rev , lpc_callback , ATT_CPU_REV_HW_REV); +static SENSOR_DEVICE_ATTR_RO(cpu_rev_dev_phase , lpc_callback , ATT_CPU_REV_DEV_PHASE); +static SENSOR_DEVICE_ATTR_RO(cpu_rev_build_id , lpc_callback , ATT_CPU_REV_BUILD_ID); + +//SENSOR_DEVICE_ATTR - BMC mailbox +static SENSOR_DEVICE_ATTR_WO(temp_mac_hwm , lpc_callback , ATT_TEMP_MAC_HWM); + +//SENSOR_DEVICE_ATTR - BSP +static SENSOR_DEVICE_ATTR_RW(bsp_version , bsp_callback , ATT_BSP_VERSION); +static SENSOR_DEVICE_ATTR_RW(bsp_debug , bsp_callback , ATT_BSP_DEBUG); +static SENSOR_DEVICE_ATTR_WO(bsp_pr_info , bsp_pr_callback , ATT_BSP_PR_INFO); +static SENSOR_DEVICE_ATTR_WO(bsp_pr_err , bsp_pr_callback , ATT_BSP_PR_ERR); +static SENSOR_DEVICE_ATTR_RW(bsp_reg , bsp_callback , ATT_BSP_REG); +static SENSOR_DEVICE_ATTR_RO(bsp_reg_value , lpc_callback , ATT_BSP_REG_VALUE); +static SENSOR_DEVICE_ATTR_RO(bsp_gpio_max , gpio_max , ATT_BSP_GPIO_MAX); + +static struct attribute *mb_cpld_attrs[] = { + _DEVICE_ATTR(board_id_0), + _DEVICE_ATTR(board_sku_id), + _DEVICE_ATTR(board_id_1), + _DEVICE_ATTR(board_hw_id), + _DEVICE_ATTR(board_deph_id), + _DEVICE_ATTR(board_build_id), + _DEVICE_ATTR(board_bit_sel), + _DEVICE_ATTR(board_cpld_id_type), + _DEVICE_ATTR(cpld_version_major), + _DEVICE_ATTR(cpld_version_minor), + _DEVICE_ATTR(cpld_id), + _DEVICE_ATTR(cpld_build), + _DEVICE_ATTR(cpld_version_h), + _DEVICE_ATTR(cpld_chip), + _DEVICE_ATTR(board_ext_id), + _DEVICE_ATTR(mux_reset_all), + _DEVICE_ATTR(mux_ctrl), + _DEVICE_ATTR(uart_ctrl), + _DEVICE_ATTR(usb_ctrl), + NULL, +}; + +static struct attribute *ec_attrs[] = { + _DEVICE_ATTR(bios_boot_sel), + _DEVICE_ATTR(cpu_rev_hw_rev), + _DEVICE_ATTR(cpu_rev_dev_phase), + _DEVICE_ATTR(cpu_rev_build_id), + NULL, +}; + + +static struct attribute *bmc_mailbox_attrs[] = { + _DEVICE_ATTR(temp_mac_hwm), + NULL, +}; + +static struct attribute *bsp_attrs[] = { + _DEVICE_ATTR(bsp_version), + _DEVICE_ATTR(bsp_debug), + _DEVICE_ATTR(bsp_pr_info), + _DEVICE_ATTR(bsp_pr_err), + _DEVICE_ATTR(bsp_reg), + _DEVICE_ATTR(bsp_reg_value), + _DEVICE_ATTR(bsp_gpio_max), + NULL, +}; + +static struct attribute_group mb_cpld_attr_grp = { + .name = "mb_cpld", + .attrs = mb_cpld_attrs, +}; + +static struct attribute_group bsp_attr_grp = { + .name = "bsp", + .attrs = bsp_attrs, +}; + +static struct attribute_group ec_attr_grp = { + .name = "ec", + .attrs = ec_attrs, +}; + +static struct attribute_group bmc_mailbox_attr_grp = { + .name = "bmc_mailbox", + .attrs = bmc_mailbox_attrs, +}; + +static void lpc_dev_release( struct device * dev) +{ + return; +} + +static struct platform_device lpc_dev = { + .name = DRIVER_NAME, + .id = -1, + .dev = { + .release = lpc_dev_release, + } +}; + +static int lpc_drv_probe(struct platform_device *pdev) +{ + int i = 0, grp_num = 4; + int err[4] = {0}; + struct attribute_group *grp; + + lpc_data = devm_kzalloc(&pdev->dev, sizeof(struct lpc_data_s), + GFP_KERNEL); + if (!lpc_data) + return -ENOMEM; + + mutex_init(&lpc_data->access_lock); + + for (i=0; idev.kobj, grp); + if (err[i]) { + printk(KERN_ERR "Cannot create sysfs for group %s\n", grp->name); + goto exit; + } else { + continue; + } + } + + return 0; + +exit: + for (i=0; idev.kobj, grp); + if (!err[i]) { + //remove previous successful cases + continue; + } else { + //remove first failed case, then return + return err[i]; + } + } + return 0; +} + +static int lpc_drv_remove(struct platform_device *pdev) +{ + sysfs_remove_group(&pdev->dev.kobj, &mb_cpld_attr_grp); + sysfs_remove_group(&pdev->dev.kobj, &bsp_attr_grp); + sysfs_remove_group(&pdev->dev.kobj, &ec_attr_grp); + sysfs_remove_group(&pdev->dev.kobj, &bmc_mailbox_attr_grp); + return 0; +} + +static struct platform_driver lpc_drv = { + .probe = lpc_drv_probe, + .remove = __exit_p(lpc_drv_remove), + .driver = { + .name = DRIVER_NAME, + }, +}; + +int lpc_init(void) +{ + int err = 0; + + err = platform_driver_register(&lpc_drv); + if (err) { + printk(KERN_ERR "%s(#%d): platform_driver_register failed(%d)\n", + __func__, __LINE__, err); + + return err; + } + + err = platform_device_register(&lpc_dev); + if (err) { + printk(KERN_ERR "%s(#%d): platform_device_register failed(%d)\n", + __func__, __LINE__, err); + platform_driver_unregister(&lpc_drv); + return err; + } + + return err; +} + +void lpc_exit(void) +{ + platform_driver_unregister(&lpc_drv); + platform_device_unregister(&lpc_dev); +} + +MODULE_AUTHOR("Nonodark Huang "); +MODULE_DESCRIPTION("x86_64_ufispace_s9110_32x_lpc driver"); +MODULE_LICENSE("GPL"); + +module_init(lpc_init); +module_exit(lpc_exit); diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s9110-32x/modules/x86-64-ufispace-s9110-32x-sys-eeprom.c b/platform/broadcom/sonic-platform-modules-ufispace/s9110-32x/modules/x86-64-ufispace-s9110-32x-sys-eeprom.c new file mode 100644 index 0000000000..c0b3ac20f0 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ufispace/s9110-32x/modules/x86-64-ufispace-s9110-32x-sys-eeprom.c @@ -0,0 +1,282 @@ +/* + * Copyright (C) 1998, 1999 Frodo Looijaard and + * Philip Edelbrock + * Copyright (C) 2003 Greg Kroah-Hartman + * Copyright (C) 2003 IBM Corp. + * Copyright (C) 2004 Jean Delvare + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +/* enable dev_dbg print out */ +//#define DEBUG + +#define __STDC_WANT_LIB_EXT1__ 1 +#include +#include +#include +#include +#include +#include +#include +#include + +#define _memset(s, c, n) memset(s, c, n) + +/* Addresses to scan */ +static const unsigned short normal_i2c[] = { /*0x50, 0x51, 0x52, 0x53, 0x54, + 0x55, 0x56, 0x57,*/ I2C_CLIENT_END }; + +/* Size of EEPROM in bytes */ +#define EEPROM_SIZE 512 + +#define SLICE_BITS (6) +#define SLICE_SIZE (1 << SLICE_BITS) +#define SLICE_NUM (EEPROM_SIZE/SLICE_SIZE) + +/* Each client has this additional data */ +struct eeprom_data { + struct mutex update_lock; + u8 valid; /* bitfield, bit!=0 if slice is valid */ + unsigned long last_updated[SLICE_NUM]; /* In jiffies, 8 slices */ + u8 data[EEPROM_SIZE]; /* Register values */ +}; + + +static void sys_eeprom_update_client(struct i2c_client *client, u8 slice) +{ + struct eeprom_data *data = i2c_get_clientdata(client); + int i, j; + int ret; + int addr; + + mutex_lock(&data->update_lock); + + if (!(data->valid & (1 << slice)) || + time_after(jiffies, data->last_updated[slice] + 300 * HZ)) { + dev_dbg(&client->dev, "Starting eeprom update, slice %u\n", slice); + + addr = slice << SLICE_BITS; + + ret = i2c_smbus_write_byte_data(client, (u8)((addr >> 8) & 0xFF), (u8)(addr & 0xFF)); + /* select the eeprom address */ + if (ret < 0) { + dev_err(&client->dev, "address set failed\n"); + goto exit; + } + + if (!i2c_check_functionality(client->adapter, I2C_FUNC_SMBUS_READ_BYTE)) { + goto exit; + } + + for (i = slice << SLICE_BITS; i < (slice + 1) << SLICE_BITS; i+= SLICE_SIZE) { + for (j = i; j < (i+SLICE_SIZE); j++) { + int res; + + res = i2c_smbus_read_byte(client); + if (res < 0) { + goto exit; + } + + data->data[j] = res & 0xFF; + } + } + + data->last_updated[slice] = jiffies; + data->valid |= (1 << slice); + } +exit: + mutex_unlock(&data->update_lock); +} + +static ssize_t sys_eeprom_read(struct file *filp, struct kobject *kobj, + struct bin_attribute *bin_attr, + char *buf, loff_t off, size_t count) +{ + struct i2c_client *client = to_i2c_client(container_of(kobj, struct device, kobj)); + struct eeprom_data *data = i2c_get_clientdata(client); + u8 slice; + + if (off > EEPROM_SIZE) { + return 0; + } + if (off + count > EEPROM_SIZE) { + count = EEPROM_SIZE - off; + } + if (count == 0) { + return 0; + } + + /* Only refresh slices which contain requested bytes */ + for (slice = off >> SLICE_BITS; slice <= (off + count - 1) >> SLICE_BITS; slice++) { + sys_eeprom_update_client(client, slice); + } + + memcpy(buf, &data->data[off], count); + + return count; +} + +static ssize_t sys_eeprom_write(struct file *filp, struct kobject *kobj, + struct bin_attribute *bin_attr, + char *buf, loff_t off, size_t count) +{ + struct i2c_client *client = to_i2c_client(container_of(kobj, struct device, kobj)); + struct eeprom_data *data = i2c_get_clientdata(client); + int ret; + int i; + u8 cmd; + u16 value16; + + dev_dbg(&client->dev, "sys_eeprom_write off=%d, count=%d\n", (int)off, (int)count); + + if (off > EEPROM_SIZE) { + return 0; + } + if (off + count > EEPROM_SIZE) { + count = EEPROM_SIZE - off; + } + if (count == 0) { + return 0; + } + + mutex_lock(&data->update_lock); + + for(i=0; i < count; i++) { + /* write command */ + cmd = (off >> 8) & 0xff; + value16 = off & 0xff; + value16 |= buf[i] << 8; + ret = i2c_smbus_write_word_data(client, cmd, value16); + + if (ret < 0) { + dev_err(&client->dev, "write address failed at %d \n", (int)off); + goto exit; + } + + off++; + + /* need to wait for write complete */ + udelay(10000); + } +exit: + mutex_unlock(&data->update_lock); + /* force to update client when reading */ + for(i=0; i < SLICE_NUM; i++) { + data->last_updated[i] = 0; + } + + return count; +} + +static struct bin_attribute sys_eeprom_attr = { + .attr = { + .name = "eeprom", + .mode = S_IRUGO | S_IWUSR, + }, + .size = EEPROM_SIZE, + .read = sys_eeprom_read, + .write = sys_eeprom_write, +}; + +/* Return 0 if detection is successful, -ENODEV otherwise */ +static int sys_eeprom_detect(struct i2c_client *client, struct i2c_board_info *info) +{ + struct i2c_adapter *adapter = client->adapter; + + /* EDID EEPROMs are often 24C00 EEPROMs, which answer to all + addresses 0x50-0x57, but we only care about 0x51 and 0x55. So decline + attaching to addresses >= 0x56 on DDC buses */ + if (!(adapter->class & I2C_CLASS_SPD) && client->addr >= 0x56) { + return -ENODEV; + } + + if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_READ_BYTE) + && !i2c_check_functionality(adapter, I2C_FUNC_SMBUS_WRITE_BYTE_DATA)) { + return -ENODEV; + } + + strlcpy(info->type, "eeprom", I2C_NAME_SIZE); + + return 0; +} + +static int sys_eeprom_probe(struct i2c_client *client, + const struct i2c_device_id *id) +{ + struct eeprom_data *data; + int err; + + if (!(data = kzalloc(sizeof(struct eeprom_data), GFP_KERNEL))) { + err = -ENOMEM; + goto exit; + } + +#ifdef __STDC_LIB_EXT1__ + memset_s(data->data, EEPROM_SIZE, 0xff, EEPROM_SIZE); +#else + _memset(data->data, 0xff, EEPROM_SIZE); +#endif + i2c_set_clientdata(client, data); + mutex_init(&data->update_lock); + + /* create the sysfs eeprom file */ + err = sysfs_create_bin_file(&client->dev.kobj, &sys_eeprom_attr); + if (err) { + goto exit_kfree; + } + + return 0; + +exit_kfree: + kfree(data); +exit: + return err; +} + +#if LINUX_VERSION_CODE < KERNEL_VERSION(6, 1, 0) +static int +#else +static void +#endif +sys_eeprom_remove(struct i2c_client *client) +{ + sysfs_remove_bin_file(&client->dev.kobj, &sys_eeprom_attr); + kfree(i2c_get_clientdata(client)); + +#if LINUX_VERSION_CODE < KERNEL_VERSION(6, 1, 0) + return 0; +#endif +} + +static const struct i2c_device_id sys_eeprom_id[] = { + { "sys_eeprom", 0 }, + { } +}; + +static struct i2c_driver sys_eeprom_driver = { + .driver = { + .name = "sys_eeprom", + }, + .probe = sys_eeprom_probe, + .remove = sys_eeprom_remove, + .id_table = sys_eeprom_id, + + .class = I2C_CLASS_DDC | I2C_CLASS_SPD, + .detect = sys_eeprom_detect, + .address_list = normal_i2c, +}; + +module_i2c_driver(sys_eeprom_driver); + +MODULE_AUTHOR("Nonodark Huang "); +MODULE_DESCRIPTION("UfiSpace System EEPROM driver"); +MODULE_LICENSE("GPL"); diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s9110-32x/service/pddf-platform-init.service b/platform/broadcom/sonic-platform-modules-ufispace/s9110-32x/service/pddf-platform-init.service new file mode 120000 index 0000000000..0fd9f25b6c --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ufispace/s9110-32x/service/pddf-platform-init.service @@ -0,0 +1 @@ +../../../../pddf/i2c/service/pddf-platform-init.service \ No newline at end of file diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s9110-32x/sonic_platform/__init__.py b/platform/broadcom/sonic-platform-modules-ufispace/s9110-32x/sonic_platform/__init__.py new file mode 100644 index 0000000000..593867d31c --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ufispace/s9110-32x/sonic_platform/__init__.py @@ -0,0 +1,4 @@ +# All the derived classes for PDDF +__all__ = ["platform", "chassis", "sfp", "psu", "thermal", "fan"] +from . import platform + diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s9110-32x/sonic_platform/chassis.py b/platform/broadcom/sonic-platform-modules-ufispace/s9110-32x/sonic_platform/chassis.py new file mode 100644 index 0000000000..78a3d9d410 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ufispace/s9110-32x/sonic_platform/chassis.py @@ -0,0 +1,202 @@ +#!/usr/bin/env python + +############################################################################# +# PDDF +# Module contains an implementation of SONiC Chassis API +# +############################################################################# + +try: + import time + from sonic_platform_pddf_base.pddf_chassis import PddfChassis + # from sonic_py_common import device_info +except ImportError as e: + raise ImportError(str(e) + "- required module not found") + +NUM_COMPONENT = 4 + +class Chassis(PddfChassis): + """ + PDDF Platform-specific Chassis class + """ + + port_dict = {} + + def __init__(self, pddf_data=None, pddf_plugin_data=None): + PddfChassis.__init__(self, pddf_data, pddf_plugin_data) + self._initialize_components() + + def _initialize_components(self): + from sonic_platform.component import Component + for index in range(NUM_COMPONENT): + component = Component(index) + self._component_list.append(component) + + # Provide the functions/variables below for which implementation is to be overwritten + def get_name(self): + """ + Retrieves the name of the chassis + Returns: + string: The name of the chassis + """ + # return device_info.get_hwsku() + return self._eeprom.platform_name_str() + + def initizalize_system_led(self): + return True + + def get_status_led(self): + return self.get_system_led("SYS_LED") + + def get_change_event(self, timeout=0): + """ + Returns a nested dictionary containing all devices which have + experienced a change at chassis level + Args: + timeout: Timeout in milliseconds (optional). If timeout == 0, + this method will block until a change is detected. + Returns: + (bool, dict): + - bool: True if call successful, False if not; + - dict: A nested dictionary where key is a device type, + value is a dictionary with key:value pairs in the format of + {'device_id':'device_event'}, where device_id is the device ID + for this device and device_event. + The known devices's device_id and device_event was defined as table below. + ----------------------------------------------------------------- + device | device_id | device_event | annotate + ----------------------------------------------------------------- + 'fan' '' '0' Fan removed + '1' Fan inserted + 'sfp' '' '0' Sfp removed + '1' Sfp inserted + '2' I2C bus stuck + '3' Bad eeprom + '4' Unsupported cable + '5' High Temperature + '6' Bad cable + 'voltage' '' '0' Vout normal + '1' Vout abnormal + -------------------------------------------------------------------- + Ex. {'fan':{'0':'0', '2':'1'}, 'sfp':{'11':'0', '12':'1'}, + 'voltage':{'U20':'0', 'U21':'1'}} + Indicates that: + fan 0 has been removed, fan 2 has been inserted. + sfp 11 has been removed, sfp 12 has been inserted. + monitored voltage U20 became normal, voltage U21 became abnormal. + Note: For sfp, when event 3-6 happened, the module will not be avalaible, + XCVRD shall stop to read eeprom before SFP recovered from error status. + """ + + change_event_dict = {"fan": {}, "sfp": {}, "voltage": {}} + + start_time = time.time() + forever = False + + if timeout == 0: + forever = True + elif timeout > 0: + timeout = timeout / float(1000) # Convert to secs + else: + print("get_change_event:Invalid timeout value", timeout) + return False, change_event_dict + + end_time = start_time + timeout + if start_time > end_time: + print( + "get_change_event:" "time wrap / invalid timeout value", + timeout, + ) + return False, change_event_dict # Time wrap or possibly incorrect timeout + try: + while timeout >= 0: + # check for sfp + sfp_change_dict = self.get_transceiver_change_event() + # check for fan + # fan_change_dict = self.get_fan_change_event() + # check for voltage + # voltage_change_dict = self.get_voltage_change_event() + + if sfp_change_dict: + change_event_dict["sfp"] = sfp_change_dict + # change_event_dict["fan"] = fan_change_dict + # change_event_dict["voltage"] = voltage_change_dict + return True, change_event_dict + if forever: + time.sleep(1) + else: + timeout = end_time - time.time() + if timeout >= 1: + time.sleep(1) # We poll at 1 second granularity + else: + if timeout > 0: + time.sleep(timeout) + return True, change_event_dict + except Exception as e: + print(e) + print("get_change_event: Should not reach here.") + return False, change_event_dict + + def get_transceiver_change_event(self): + current_port_dict = {} + ret_dict = {} + + # Check for OIR events and return ret_dict + for index in range(0, self.platform_inventory['num_ports']): + if self._sfp_list[index].get_presence(): + current_port_dict[index] = self.plugin_data["XCVR"]["status"]["inserted"] + else: + current_port_dict[index] = self.plugin_data["XCVR"]["status"]["removed"] + + if len(self.port_dict) == 0: # first time + self.port_dict = current_port_dict + return {} + + if current_port_dict == self.port_dict: + return {} + + # Update reg value + for index, status in current_port_dict.items(): + if self.port_dict[index] != status: + ret_dict[index] = status + #ret_dict[str(index)] = status + self.port_dict = current_port_dict + for index, status in ret_dict.items(): + if int(status) == 1: + pass + #self._sfp_list[int(index)].check_sfp_optoe_type() + return ret_dict + + def get_reboot_cause(self): + """ + Retrieves the cause of the previous reboot + + Returns: + A tuple (string, string) where the first element is a string + containing the cause of the previous reboot. This string must be + one of the predefined strings in this class. If the first string + is "REBOOT_CAUSE_HARDWARE_OTHER", the second string can be used + to pass a description of the reboot cause. + """ + + reboot_cause_path = self.plugin_data['REBOOT_CAUSE']['reboot_cause_file'] + + try: + with open(reboot_cause_path, 'r', errors='replace') as fd: + data = fd.read() + sw_reboot_cause = data.strip() + except IOError: + sw_reboot_cause = "Unknown" + + return ('REBOOT_CAUSE_NON_HARDWARE', sw_reboot_cause) + + def get_serial_number(self): + """ + Retrieves the hardware serial number for the chassis + + Returns: + A string containing the hardware serial number for this + chassis. + """ + + return self.get_serial() \ No newline at end of file diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s9110-32x/sonic_platform/component.py b/platform/broadcom/sonic-platform-modules-ufispace/s9110-32x/sonic_platform/component.py new file mode 100644 index 0000000000..d5d8d8226f --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ufispace/s9110-32x/sonic_platform/component.py @@ -0,0 +1,117 @@ +############################################################################# +# +# Component contains an implementation of SONiC Platform Base API and +# provides the components firmware management function +# +############################################################################# + +try: + import subprocess + from sonic_platform_base.component_base import ComponentBase + from sonic_platform_pddf_base import pddfapi +except ImportError as e: + raise ImportError(str(e) + "- required module not found") + +CPLD_SYSFS = { + "CPLD1": {"major": "cpld1_major_ver", "minor": "cpld1_minor_ver", "build": "cpld1_build"}, + "CPLD2": {"major": "cpld2_major_ver", "minor": "cpld2_minor_ver", "build": "cpld2_build"}, +} + +BMC_CMDS = { + "BMC": "bash -c 'tmp=$(ipmitool raw 0x6 0x1) && r=($(echo \"$tmp\" | cut -d \" \" -f 4,5,16,15,14)) && echo ${r[0]}.${r[1]}.${r[4]}.${r[3]}${r[2]}'", +} + +BIOS_VERSION_PATH = "/sys/class/dmi/id/bios_version" +COMPONENT_LIST= [ + ("CPLD1", "CPLD 1"), + ("CPLD2", "CPLD 2"), + ("BIOS", "Basic Input/Output System"), + ("BMC", "BMC"), +] + +class Component(ComponentBase): + """Platform-specific Component class""" + + DEVICE_TYPE = "component" + + def __init__(self, component_index=0): + self.pddf_obj = pddfapi.PddfApi() + self.index = component_index + self.name = self.get_name() + + def _get_bios_version(self): + # Retrieves the BIOS firmware version + try: + with open(BIOS_VERSION_PATH, 'r') as fd: + bios_version = fd.read() + return bios_version.strip() + except Exception as e: + return None + + def _get_cpld_version(self): + # Retrieves the CPLD firmware version + cpld_version = dict() + for cpld_name, elem in CPLD_SYSFS.items(): + device = "SYSSTATUS" + major = self.pddf_obj.get_attr_name_output(device, elem["major"]) + minor = self.pddf_obj.get_attr_name_output(device, elem["minor"]) + build = self.pddf_obj.get_attr_name_output(device, elem["build"]) + if major and minor and build: + major = int(major['status'].rstrip(),0) + minor = int(minor['status'].rstrip(),0) + build = int(build['status'].rstrip(),0) + cpld_version[cpld_name] = "{}.{:02d}.{:03d}".format(major, minor, build) + else: + cpld_version[cpld_name] = "N/A" + return cpld_version + + def _get_bmc_version(self): + # Retrieves the BMC firmware version + status, value = subprocess.getstatusoutput(BMC_CMDS["BMC"]) + if not status: + return value + else: + return None + + def get_name(self): + """ + Retrieves the name of the component + Returns: + A string containing the name of the component + """ + return COMPONENT_LIST[self.index][0] + + def get_description(self): + """ + Retrieves the description of the component + Returns: + A string containing the description of the component + """ + return COMPONENT_LIST[self.index][1] + + def get_firmware_version(self): + """ + Retrieves the firmware version of module + Returns: + string: The firmware versions of the module + """ + fw_version = None + + if self.name == "BIOS": + fw_version = self._get_bios_version() + elif "CPLD" in self.name: + cpld_version = self._get_cpld_version() + fw_version = cpld_version.get(self.name) + elif self.name == "BMC": + fw_version = self._get_bmc_version() + return fw_version + + def install_firmware(self, image_path): + """ + Install firmware to module + Args: + image_path: A string, path to firmware image + Returns: + A boolean, True if install successfully, False if not + """ + raise NotImplementedError diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s9110-32x/sonic_platform/eeprom.py b/platform/broadcom/sonic-platform-modules-ufispace/s9110-32x/sonic_platform/eeprom.py new file mode 100644 index 0000000000..90ab1c779a --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ufispace/s9110-32x/sonic_platform/eeprom.py @@ -0,0 +1,21 @@ +#!/usr/bin/env python + +try: + from sonic_platform_pddf_base.pddf_eeprom import PddfEeprom +except ImportError as e: + raise ImportError(str(e) + "- required module not found") + + +class Eeprom(PddfEeprom): + + def __init__(self, pddf_data=None, pddf_plugin_data=None): + PddfEeprom.__init__(self, pddf_data, pddf_plugin_data) + + # Provide the functions/variables below for which implementation is to be overwritten + + def platform_name_str(self): + (is_valid, results) = self.get_tlv_field(self.eeprom_data, self._TLV_CODE_PLATFORM_NAME) + if not is_valid: + return "N/A" + + return results[2].decode('ascii') \ No newline at end of file diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s9110-32x/sonic_platform/fan.py b/platform/broadcom/sonic-platform-modules-ufispace/s9110-32x/sonic_platform/fan.py new file mode 100644 index 0000000000..3705fae2bf --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ufispace/s9110-32x/sonic_platform/fan.py @@ -0,0 +1,146 @@ +#!/usr/bin/env python + + +try: + from sonic_platform_pddf_base.pddf_fan import PddfFan +except ImportError as e: + raise ImportError(str(e) + "- required module not found") + + +class Fan(PddfFan): + """PDDF Platform-Specific Fan class""" + + def __init__(self, tray_idx, fan_idx=0, pddf_data=None, pddf_plugin_data=None, is_psu_fan=False, psu_index=0): + # idx is 0-based + PddfFan.__init__(self, tray_idx, fan_idx, pddf_data, pddf_plugin_data, is_psu_fan, psu_index) + + # Provide the functions/variables below for which implementation is to be overwritten + # Since psu_fan airflow direction cant be read from sysfs, it is fixed as 'F2B' or 'intake' + + def get_mfr_id(self): + """ + Retrieves the manufacturer id of the device + + Returns: + string: Manufacturer Id of device + """ + if self.is_psu_fan: + device = "PSU{}".format(self.fans_psu_index) + output = self.pddf_obj.get_attr_name_output(device, "psu_mfr_id") + else: + raise NotImplementedError + + if not output: + return None + + mfr = output['status'] + + # strip_non_ascii + stripped = (c for c in mfr if 0 < ord(c) < 127) + mfr = ''.join(stripped) + + return mfr.rstrip('\n') + + def get_model(self): + """ + Retrieves the model number (or part number) of the device + + Returns: + string: Model/part number of device + """ + if self.is_psu_fan: + device = "PSU{}".format(self.fans_psu_index) + output = self.pddf_obj.get_attr_name_output(device, "psu_model_name") + else: + raise NotImplementedError + + if not output: + return None + + model = output['status'] + + # strip_non_ascii + stripped = (c for c in model if 0 < ord(c) < 127) + model = ''.join(stripped) + + return model.rstrip('\n') + + def get_max_speed(self): + """ + Retrieves the model name + + Returns: + An string, the model name + """ + if self.is_psu_fan: + mfr = self.get_mfr_id() + model = self.get_model() + + max_speed = int(self.plugin_data['PSU']['valmap']['PSU_AC_FAN_MAX_SPEED']) + if mfr and model : + for dev in self.plugin_data['PSU']['psu_support_list']: + if dev['Manufacturer'] == mfr and dev['Name'] == model: + max_speed = int(self.plugin_data['PSU']['valmap'][dev['MaxSpd']]) + break + else: + if self.fan_index == 1: + max_speed = int(self.plugin_data['FAN']['FAN_F_MAX_SPEED']) + else: + max_speed = int(self.plugin_data['FAN']['FAN_R_MAX_SPEED']) + + return max_speed + + def get_presence(self): + """ + Retrieves the presence of the device + Returns: + bool: True if device is present, False if not + """ + if self.is_psu_fan: + attr_name = "psu_present" + device = "PSU{}".format(self.fans_psu_index) + else: + idx = (self.fantray_index-1)*self.platform['num_fans_pertray'] + self.fan_index + attr_name = "fan" + str(idx) + "_present" + device = "FAN-CTRL" + + output = self.pddf_obj.get_attr_name_output(device, attr_name) + if not output: + return False + + mode = output['mode'] + presence = output['status'].rstrip() + vmap = self.plugin_data['FAN']['present'][mode]['valmap'] + + if presence in vmap: + status = vmap[presence] + else: + status = False + + return status + + def get_speed(self): + """ + Retrieves the speed of fan as a percentage of full speed + + Returns: + An integer, the percentage of full fan speed, in the range 0 (off) + to 100 (full speed) + """ + speed_percentage = 0 + + max_speed = self.get_max_speed() + rpm_speed = self.get_speed_rpm() + + speed_percentage = round((rpm_speed*100)/max_speed) + + return min(speed_percentage, 100) + + def get_target_speed(self): + """ + Retrieves the target (expected) speed of the fan + Returns: + An integer, the percentage of full fan speed, in the range 0 (off) + to 100 (full speed) + """ + return self.get_speed() \ No newline at end of file diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s9110-32x/sonic_platform/fan_drawer.py b/platform/broadcom/sonic-platform-modules-ufispace/s9110-32x/sonic_platform/fan_drawer.py new file mode 100644 index 0000000000..3b9bb607f6 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ufispace/s9110-32x/sonic_platform/fan_drawer.py @@ -0,0 +1,17 @@ +#!/usr/bin/env python + + +try: + from sonic_platform_pddf_base.pddf_fan_drawer import PddfFanDrawer +except ImportError as e: + raise ImportError(str(e) + "- required module not found") + + +class FanDrawer(PddfFanDrawer): + """PDDF Platform-Specific Fan-Drawer class""" + + def __init__(self, tray_idx, pddf_data=None, pddf_plugin_data=None): + # idx is 0-based + PddfFanDrawer.__init__(self, tray_idx, pddf_data, pddf_plugin_data) + + # Provide the functions/variables below for which implementation is to be overwritten diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s9110-32x/sonic_platform/platform.py b/platform/broadcom/sonic-platform-modules-ufispace/s9110-32x/sonic_platform/platform.py new file mode 100644 index 0000000000..406b1179ae --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ufispace/s9110-32x/sonic_platform/platform.py @@ -0,0 +1,25 @@ +#!/usr/bin/env python + +############################################################################# +# PDDF +# Module contains an implementation of SONiC Platform Base API and +# provides the platform information +# +############################################################################# + + +try: + from sonic_platform_pddf_base.pddf_platform import PddfPlatform +except ImportError as e: + raise ImportError(str(e) + "- required module not found") + + +class Platform(PddfPlatform): + """ + PDDF Platform-Specific Platform Class + """ + + def __init__(self): + PddfPlatform.__init__(self) + + # Provide the functions/variables below for which implementation is to be overwritten diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s9110-32x/sonic_platform/psu.py b/platform/broadcom/sonic-platform-modules-ufispace/s9110-32x/sonic_platform/psu.py new file mode 100644 index 0000000000..0919267883 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ufispace/s9110-32x/sonic_platform/psu.py @@ -0,0 +1,67 @@ +#!/usr/bin/env python + + +try: + from sonic_platform_pddf_base.pddf_psu import PddfPsu +except ImportError as e: + raise ImportError (str(e) + "- required module not found") + + +class Psu(PddfPsu): + """PDDF Platform-Specific PSU class""" + + PLATFORM_PSU_CAPACITY = 750 + + def __init__(self, index, pddf_data=None, pddf_plugin_data=None): + PddfPsu.__init__(self, index, pddf_data, pddf_plugin_data) + + # Provide the functions/variables below for which implementation is to be overwritten + def get_power(self): + """ + Retrieves current energy supplied by PSU + + Returns: + A float number, the power in watts, + e.g. 302.6 + """ + + # power is returned in micro watts + return round(float(self.get_voltage()*self.get_current()), 2) + + def get_maximum_supplied_power(self): + """ + Retrieves the maximum supplied power by PSU (or PSU capacity) + Returns: + A float number, the maximum power output in Watts. + e.g. 1200.1 + """ + return float(self.PLATFORM_PSU_CAPACITY) + + def get_capacity(self): + """ + Retrieves the maximum supplied power by PSU (or PSU capacity) + Returns: + A float number, the maximum power output in Watts. + e.g. 1200.1 + """ + return self.get_maximum_supplied_power() + + def get_type(self): + """ + Gets the type of the PSU + + Returns: + A string, the type of PSU (AC/DC) + """ + mfr = self.get_mfr_id() + model = self.get_model() + ptype = self.plugin_data['PSU']['valmap']['DEFAULT_TYPE'] + + if mfr and model : + for dev in self.plugin_data['PSU']['psu_support_list']: + if dev['Manufacturer'] == mfr and dev['Name'] == model: + ptype = dev['Type'] + break + + + return ptype \ No newline at end of file diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s9110-32x/sonic_platform/sfp.py b/platform/broadcom/sonic-platform-modules-ufispace/s9110-32x/sonic_platform/sfp.py new file mode 100644 index 0000000000..c7919482f6 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ufispace/s9110-32x/sonic_platform/sfp.py @@ -0,0 +1,31 @@ +#!/usr/bin/env python + +try: + from sonic_platform_pddf_base.pddf_sfp import PddfSfp +except ImportError as e: + raise ImportError (str(e) + "- required module not found") + + +class Sfp(PddfSfp): + """ + PDDF Platform-Specific Sfp class + """ + + def __init__(self, index, pddf_data=None, pddf_plugin_data=None): + PddfSfp.__init__(self, index, pddf_data, pddf_plugin_data) + self.index = index + + # Provide the functions/variables below for which implementation is to be overwritten + + def get_error_description(self): + """ + Retrives the error descriptions of the SFP module + Returns: + String that represents the current error descriptions of vendor specific errors + In case there are multiple errors, they should be joined by '|', + like: "Bad EEPROM|Unsupported cable" + """ + if not self.get_presence(): + return self.SFP_STATUS_UNPLUGGED + + return self.SFP_STATUS_OK diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s9110-32x/sonic_platform/thermal.py b/platform/broadcom/sonic-platform-modules-ufispace/s9110-32x/sonic_platform/thermal.py new file mode 100644 index 0000000000..77d6ec7ae8 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ufispace/s9110-32x/sonic_platform/thermal.py @@ -0,0 +1,17 @@ +#!/usr/bin/env python + + +try: + from sonic_platform_pddf_base.pddf_thermal import PddfThermal +except ImportError as e: + raise ImportError(str(e) + "- required module not found") + + + +class Thermal(PddfThermal): + """PDDF Platform-Specific Thermal class""" + + def __init__(self, index, pddf_data=None, pddf_plugin_data=None, is_psu_thermal=False, psu_index=0): + PddfThermal.__init__(self, index, pddf_data, pddf_plugin_data, is_psu_thermal, psu_index) + + # Provide the functions/variables below for which implementation is to be overwritten diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s9110-32x/sonic_platform_setup.py b/platform/broadcom/sonic-platform-modules-ufispace/s9110-32x/sonic_platform_setup.py new file mode 100644 index 0000000000..2152c64d42 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ufispace/s9110-32x/sonic_platform_setup.py @@ -0,0 +1,27 @@ +from setuptools import setup + +setup( + name='sonic-platform', + version='1.0', + description='SONiC platform API implementation on ufispace platform', + license='Apache 2.0', + author='SONiC Team', + author_email='linuxnetdev@microsoft.com', + url='https://github.com/Azure/sonic-buildimage', + maintainer='Nonodark Huangn', + maintainer_email='nonodark.huang@ufispace.com', + packages=['sonic_platform'], + classifiers=[ + 'Development Status :: 3 - Alpha', + 'Environment :: Plugins', + 'Intended Audience :: Developers', + 'Intended Audience :: Information Technology', + 'Intended Audience :: System Administrators', + 'License :: OSI Approved :: Apache Software License', + 'Natural Language :: English', + 'Operating System :: POSIX :: Linux', + 'Programming Language :: Python :: 3.7', + 'Topic :: Utilities', + ], + keywords='sonic SONiC platform PLATFORM', +) diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s9110-32x/utils/pddf_post_device_create.sh b/platform/broadcom/sonic-platform-modules-ufispace/s9110-32x/utils/pddf_post_device_create.sh new file mode 100755 index 0000000000..f38d420267 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ufispace/s9110-32x/utils/pddf_post_device_create.sh @@ -0,0 +1,14 @@ +#!/bin/bash + +#disable bmc watchdog +echo "Disable BMC watchdog" +timeout 3 ipmitool mc watchdog off + +pddf_ledutil setstatusled SYS_LED off +pddf_ledutil setstatusled LOC_LED off + +curr_led=$(pddf_ledutil getstatusled SYS_LED) +pddf_ledutil setstatusled SYS_LED green +echo "Set System $curr_led to green" + +echo "PDDF device post-create completed" diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s9110-32x/utils/pddf_post_driver_install.sh b/platform/broadcom/sonic-platform-modules-ufispace/s9110-32x/utils/pddf_post_driver_install.sh new file mode 100755 index 0000000000..ed2559977e --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ufispace/s9110-32x/utils/pddf_post_driver_install.sh @@ -0,0 +1,2 @@ +#!/bin/bash +echo "PDDF driver post-install completed" diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s9110-32x/utils/pddf_pre_device_create.sh b/platform/broadcom/sonic-platform-modules-ufispace/s9110-32x/utils/pddf_pre_device_create.sh new file mode 100755 index 0000000000..df19dd9338 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ufispace/s9110-32x/utils/pddf_pre_device_create.sh @@ -0,0 +1,74 @@ +#!/bin/bash + +# import sonic env +[ -f /etc/sonic/sonic-environment ] && . /etc/sonic/sonic-environment + +TRUE=0 +FALSE=1 + +PROTO=0 +ALPHA=1 +BETA=2 +PVT=3 + +PLATFORM=${PLATFORM:-x86_64-ufispace_s9110_32x-r0} +PLAT_CONF_PATH="/usr/share/sonic/device/$PLATFORM" +PLAT_CONF_FILE="/usr/share/sonic/device/$PLATFORM/platform.json" +PDDF_DEV_PATH="/usr/share/sonic/device/$PLATFORM/pddf" +PDDF_DEV_FILE="/usr/share/sonic/device/$PLATFORM/pddf/pddf-device.json" +IO_PORT_FILE="/dev/port" + +function _check_filepath { + filepath=$1 + if [ -z "${filepath}" ]; then + echo "[ERR] the ipnut string is empty!!!" + return ${FALSE} + elif [ ! -f "$filepath" ] && [ ! -c "$filepath" ]; then + echo "[ERR] No such file: ${filepath}" + return ${FALSE} + else + return ${TRUE} + fi +} + +if _check_filepath "$IO_PORT_FILE" ; then + MASK=2#00000011 + REG="0x$(xxd -s 0x701 -p -l 1 -c 1 /dev/port)" + HW_REV_ID=$(( $REG & $MASK )) +else + HW_REV_ID=$PVT +fi + +if [ "$HW_REV_ID" = "$BETA" ]; then + + src="$PDDF_DEV_PATH/pddf-device-beta.json" + if _check_filepath $src; then + ln -rsf "$src" "$PDDF_DEV_FILE" + fi + + src="$PLAT_CONF_PATH/platform-beta.json" + if _check_filepath $src; then + ln -rsf $src "$PLAT_CONF_FILE" + fi + +elif [ "$HW_REV_ID" -ge "$PVT" ]; then + src="$PDDF_DEV_PATH/pddf-device-pvt.json" + if _check_filepath $src; then + ln -rsf "$src" "$PDDF_DEV_FILE" + fi + + src="$PLAT_CONF_PATH/platform-pvt.json" + if _check_filepath $src; then + ln -rsf $src "$PLAT_CONF_FILE" + fi +else + src="$PDDF_DEV_PATH/pddf-device-pvt.json" + if _check_filepath $src; then + ln -rsf "$src" "$PDDF_DEV_FILE" + fi + + src="$PLAT_CONF_PATH/platform-pvt.json" + if _check_filepath $src; then + ln -rsf $src "$PLAT_CONF_FILE" + fi +fi diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s9110-32x/utils/pddf_switch_svc.py b/platform/broadcom/sonic-platform-modules-ufispace/s9110-32x/utils/pddf_switch_svc.py new file mode 100755 index 0000000000..c556d77f1c --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ufispace/s9110-32x/utils/pddf_switch_svc.py @@ -0,0 +1,86 @@ +#!/usr/bin/env python +# Script to stop and start the respective platforms default services. +# This will be used while switching the pddf->non-pddf mode and vice versa +import commands + +def check_pddf_support(): + return True + +def stop_platform_svc(): + + ''' + status, output = commands.getstatusoutput("systemctl stop s9110-32x-platform-monitor-fan.service") + if status: + print "Stop s9110-32x-platform-fan.service failed %d"%status + return False + + status, output = commands.getstatusoutput("systemctl stop s9110-32x-platform-monitor-psu.service") + if status: + print "Stop s9110-32x-platform-psu.service failed %d"%status + return False + + status, output = commands.getstatusoutput("systemctl stop s9110-32x-platform-monitor.service") + if status: + print "Stop s9110-32x-platform-init.service failed %d"%status + return False + status, output = commands.getstatusoutput("systemctl disable s9110-32x-platform-monitor.service") + if status: + print "Disable s9110-32x-platform-monitor.service failed %d"%status + return False + ''' + + status, output = commands.getstatusoutput("/usr/local/bin/platform_utility.py deinit") + if status: + print "platform_utility.py deinit command failed %d"%status + return False + + # HACK , stop the pddf-platform-init service if it is active + status, output = commands.getstatusoutput("systemctl stop pddf-platform-init.service") + if status: + print "Stop pddf-platform-init.service along with other platform serives failed %d"%status + return False + + return True + +def start_platform_svc(): + + status, output = commands.getstatusoutput("/usr/local/bin/platform_utility.py init") + if status: + print "platform_utility.py init command failed %d"%status + return False + + ''' + status, output = commands.getstatusoutput("systemctl enable s9110-32x-platform-monitor.service") + if status: + print "Enable s9110-32x-platform-monitor.service failed %d"%status + return False + status, output = commands.getstatusoutput("systemctl start s9110-32x-platform-monitor-fan.service") + if status: + print "Start s9110-32x-platform-monitor-fan.service failed %d"%status + return False + + status, output = commands.getstatusoutput("systemctl start s9110-32x-platform-monitor-psu.service") + if status: + print "Start s9110-32x-platform-monitor-psu.service failed %d"%status + return False + ''' + return True + +def start_platform_pddf(): + + status, output = commands.getstatusoutput("systemctl start pddf-platform-init.service") + if status: + print "Start pddf-platform-init.service failed %d"%status + return False + + return True + +def stop_platform_pddf(): + + status, output = commands.getstatusoutput("systemctl stop pddf-platform-init.service") + if status: + print "Stop pddf-platform-init.service failed %d"%status + return False + + return True + diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s9300-32d/modules/Makefile b/platform/broadcom/sonic-platform-modules-ufispace/s9300-32d/modules/Makefile new file mode 100644 index 0000000000..4db5a53a1f --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ufispace/s9300-32d/modules/Makefile @@ -0,0 +1,6 @@ + +MODULE_NAME = x86-64-ufispace-s9300-32d-cpld.o x86-64-ufispace-s9300-32d-sys-eeprom.o x86-64-ufispace-s9300-32d-lpc.o pddf_custom_sysstatus_module.o +obj-m := $(MODULE_NAME) + +CFLAGS_pddf_custom_sysstatus_module.o := -I$(M)/../../../../pddf/i2c/modules/include +KBUILD_EXTRA_SYMBOLS := $(M)/../../../../pddf/i2c/Module.symvers.PDDF diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s9300-32d/modules/pddf_custom_sysstatus_module.c b/platform/broadcom/sonic-platform-modules-ufispace/s9300-32d/modules/pddf_custom_sysstatus_module.c new file mode 100644 index 0000000000..40db6aba66 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ufispace/s9300-32d/modules/pddf_custom_sysstatus_module.c @@ -0,0 +1,266 @@ +/* + * Copyright 2019 Broadcom. + * The term Broadcom refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * + * A pddf kernel module for system status registers + */ + +#define __STDC_WANT_LIB_EXT1__ 1 +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include "../../../../pddf/i2c/modules/include/pddf_client_defs.h" +#include "../../../../pddf/i2c/modules/include/pddf_sysstatus_defs.h" + +#define _memset(s, c, n) memset(s, c, n) + +SYSSTATUS_DATA sysstatus_data = {0}; + +extern int board_i2c_cpld_read(unsigned short cpld_addr, u8 reg); +extern int board_i2c_cpld_write(unsigned short cpld_addr, u8 reg, u8 value); + +static ssize_t do_attr_operation(struct device *dev, struct device_attribute *da, const char *buf, size_t count); +ssize_t show_sysstatus_data(struct device *dev, struct device_attribute *da, char *buf); +ssize_t store_sysstatus_data(struct device *dev, struct device_attribute *da, const char *buf, size_t count); + + +PDDF_DATA_ATTR(attr_name, S_IWUSR|S_IRUGO, show_pddf_data, store_pddf_data, PDDF_CHAR, 32, + (void*)&sysstatus_data.sysstatus_addr_attr.aname, NULL); +PDDF_DATA_ATTR(attr_devaddr, S_IWUSR|S_IRUGO, show_pddf_data, store_pddf_data, PDDF_UINT32, + sizeof(uint32_t), (void*)&sysstatus_data.sysstatus_addr_attr.devaddr , NULL); +PDDF_DATA_ATTR(attr_offset, S_IWUSR|S_IRUGO, show_pddf_data, store_pddf_data, PDDF_UINT32, + sizeof(uint32_t), (void*)&sysstatus_data.sysstatus_addr_attr.offset, NULL); +PDDF_DATA_ATTR(attr_mask, S_IWUSR|S_IRUGO, show_pddf_data, store_pddf_data, PDDF_UINT32, + sizeof(uint32_t), (void*)&sysstatus_data.sysstatus_addr_attr.mask , NULL); +PDDF_DATA_ATTR(attr_len, S_IWUSR|S_IRUGO, show_pddf_data, store_pddf_data, PDDF_UINT32, + sizeof(uint32_t), (void*)&sysstatus_data.sysstatus_addr_attr.len , NULL); +PDDF_DATA_ATTR(attr_ops, S_IWUSR, NULL, do_attr_operation, PDDF_CHAR, 8, (void*)&sysstatus_data, NULL); + + + +static struct attribute *sysstatus_addr_attributes[] = { + &attr_attr_name.dev_attr.attr, + &attr_attr_devaddr.dev_attr.attr, + &attr_attr_offset.dev_attr.attr, + &attr_attr_mask.dev_attr.attr, + &attr_attr_len.dev_attr.attr, + &attr_attr_ops.dev_attr.attr, + NULL +}; + +PDDF_DATA_ATTR(board_info, S_IRUGO, show_sysstatus_data, NULL, PDDF_UCHAR, sizeof(u8), NULL, NULL); +PDDF_DATA_ATTR(cpld1_version, S_IRUGO, show_sysstatus_data, NULL, PDDF_UCHAR, sizeof(u8), NULL, NULL); +PDDF_DATA_ATTR(cpld2_version, S_IRUGO, show_sysstatus_data, NULL, PDDF_UCHAR, sizeof(u8), NULL, NULL); +PDDF_DATA_ATTR(cpld3_version, S_IRUGO, show_sysstatus_data, NULL, PDDF_UCHAR, sizeof(u8), NULL, NULL); +PDDF_DATA_ATTR(mac_reset, S_IWUSR|S_IRUGO, show_sysstatus_data, store_sysstatus_data, PDDF_UCHAR, sizeof(u8), NULL, NULL); +PDDF_DATA_ATTR(mux_reset, S_IWUSR|S_IRUGO, show_sysstatus_data, store_sysstatus_data, PDDF_UCHAR, sizeof(u8), NULL, NULL); +PDDF_DATA_ATTR(psu_status, S_IRUGO, show_sysstatus_data, NULL, PDDF_UCHAR, sizeof(u8), NULL, NULL); +PDDF_DATA_ATTR(system_led_0, S_IRUGO, show_sysstatus_data, NULL, PDDF_UCHAR, sizeof(u8), NULL, NULL); +PDDF_DATA_ATTR(system_led_1, S_IRUGO, show_sysstatus_data, NULL, PDDF_UCHAR, sizeof(u8), NULL, NULL); +PDDF_DATA_ATTR(beacon_led, S_IWUSR|S_IRUGO, show_sysstatus_data, store_sysstatus_data, PDDF_UCHAR, sizeof(u8), NULL, NULL); +PDDF_DATA_ATTR(port_led_clr_ctrl, S_IWUSR|S_IRUGO, show_sysstatus_data, store_sysstatus_data, PDDF_UCHAR, sizeof(u8), NULL, NULL); + +static struct attribute *sysstatus_data_attributes[] = { + &attr_board_info.dev_attr.attr, + &attr_cpld1_version.dev_attr.attr, + &attr_cpld2_version.dev_attr.attr, + &attr_cpld3_version.dev_attr.attr, + &attr_mac_reset.dev_attr.attr, + &attr_mux_reset.dev_attr.attr, + &attr_psu_status.dev_attr.attr, + &attr_system_led_0.dev_attr.attr, + &attr_system_led_1.dev_attr.attr, + &attr_beacon_led.dev_attr.attr, + &attr_port_led_clr_ctrl.dev_attr.attr, + NULL +}; + + +static const struct attribute_group pddf_sysstatus_addr_group = { + .attrs = sysstatus_addr_attributes, +}; + + +static const struct attribute_group pddf_sysstatus_data_group = { + .attrs = sysstatus_data_attributes, +}; + + +static struct kobject *sysstatus_addr_kobj; +static struct kobject *sysstatus_data_kobj; + + + +ssize_t show_sysstatus_data(struct device *dev, struct device_attribute *da, char *buf) +{ + + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + + SYSSTATUS_DATA *data = &sysstatus_data; + struct SYSSTATUS_ADDR_ATTR *sysstatus_addr_attrs = NULL; + int i, status ; + + + for (i=0;isysstatus_addr_attrs[i].aname, attr->dev_attr.attr.name) == 0 ) + { + sysstatus_addr_attrs = &data->sysstatus_addr_attrs[i]; + + } + } + + if (sysstatus_addr_attrs==NULL ) + { + printk(KERN_DEBUG "%s is not supported attribute for this client\n",attr->dev_attr.attr.name); + status = 0; + } + else + { + status = board_i2c_cpld_read( sysstatus_addr_attrs->devaddr, sysstatus_addr_attrs->offset); + } + + return sprintf(buf, "0x%x\n", (status&sysstatus_addr_attrs->mask)); + +} + +ssize_t store_sysstatus_data(struct device *dev, struct device_attribute *da, const char *buf, size_t count) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + + SYSSTATUS_DATA *data = &sysstatus_data; + struct SYSSTATUS_ADDR_ATTR *sysstatus_addr_attrs = NULL; + int i, status ; + u8 reg_val; + + for (i=0;isysstatus_addr_attrs[i].aname, attr->dev_attr.attr.name) == 0 ) + { + sysstatus_addr_attrs = &data->sysstatus_addr_attrs[i]; + } + } + + if (sysstatus_addr_attrs==NULL) + { + printk(KERN_DEBUG "%s is not supported attribute for this client\n",attr->dev_attr.attr.name); + return -EINVAL; + } + else + { + if (kstrtou8(buf, 0, ®_val) < 0) + return -EINVAL; + + status = board_i2c_cpld_write(sysstatus_addr_attrs->devaddr, sysstatus_addr_attrs->offset, reg_val); + + if (status!=0) + { + printk(KERN_DEBUG "store_sysstatus_data() %s failed, status=%d\n",data->sysstatus_addr_attrs[i].aname, status); + return status; + } + } + + return count; +} + + + +static ssize_t do_attr_operation(struct device *dev, struct device_attribute *da, const char *buf, size_t count) +{ + PDDF_ATTR *ptr = (PDDF_ATTR *)da; + SYSSTATUS_DATA *pdata = (SYSSTATUS_DATA *)(ptr->addr); + + pdata->sysstatus_addr_attrs[pdata->len] = pdata->sysstatus_addr_attr; + pdata->len++; + pddf_dbg(SYSSTATUS, KERN_ERR "%s: Populating the data for %s\n", __FUNCTION__, pdata->sysstatus_addr_attr.aname); +#ifdef __STDC_LIB_EXT1__ + memset_s(&pdata->sysstatus_addr_attr, sizeof(pdata->sysstatus_addr_attr), 0, sizeof(pdata->sysstatus_addr_attr)); +#else + _memset(&pdata->sysstatus_addr_attr, 0, sizeof(pdata->sysstatus_addr_attr)); +#endif + + return count; +} + + + + +int __init sysstatus_data_init(void) +{ + struct kobject *device_kobj; + int ret = 0; + + + pddf_dbg(SYSSTATUS, "PDDF SYSSTATUS MODULE.. init\n"); + + device_kobj = get_device_i2c_kobj(); + if(!device_kobj) + return -ENOMEM; + + sysstatus_addr_kobj = kobject_create_and_add("sysstatus", device_kobj); + if(!sysstatus_addr_kobj) + return -ENOMEM; + + sysstatus_data_kobj = kobject_create_and_add("sysstatus_data", sysstatus_addr_kobj); + if(!sysstatus_data_kobj) + return -ENOMEM; + + + ret = sysfs_create_group(sysstatus_addr_kobj, &pddf_sysstatus_addr_group); + if (ret) + { + kobject_put(sysstatus_addr_kobj); + return ret; + } + + ret = sysfs_create_group(sysstatus_data_kobj, &pddf_sysstatus_data_group); + if (ret) + { + sysfs_remove_group(sysstatus_addr_kobj, &pddf_sysstatus_addr_group); + kobject_put(sysstatus_data_kobj); + kobject_put(sysstatus_addr_kobj); + return ret; + } + + + return ret; +} + +void __exit sysstatus_data_exit(void) +{ + pddf_dbg(SYSSTATUS, "PDDF SYSSTATUS MODULE.. exit\n"); + sysfs_remove_group(sysstatus_data_kobj, &pddf_sysstatus_data_group); + sysfs_remove_group(sysstatus_addr_kobj, &pddf_sysstatus_addr_group); + kobject_put(sysstatus_data_kobj); + kobject_put(sysstatus_addr_kobj); + pddf_dbg(SYSSTATUS, KERN_ERR "%s: Removed the kobjects for 'SYSSTATUS'\n",__FUNCTION__); + return; +} + +module_init(sysstatus_data_init); +module_exit(sysstatus_data_exit); + +MODULE_AUTHOR("Broadcom"); +MODULE_DESCRIPTION("SYSSTATUS platform data"); +MODULE_LICENSE("GPL"); diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s9300-32d/modules/x86-64-ufispace-s9300-32d-cpld.c b/platform/broadcom/sonic-platform-modules-ufispace/s9300-32d/modules/x86-64-ufispace-s9300-32d-cpld.c new file mode 100644 index 0000000000..785c9b200e --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ufispace/s9300-32d/modules/x86-64-ufispace-s9300-32d-cpld.c @@ -0,0 +1,1646 @@ +/* + * A i2c cpld driver for the ufispace_s9300_32d + * + * Copyright (C) 2017-2019 UfiSpace Technology Corporation. + * Jason Tsai + * + * Based on ad7414.c + * Copyright 2006 Stefan Roese , DENX Software Engineering + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. + */ +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include "x86-64-ufispace-s9300-32d-cpld.h" + +#ifdef DEBUG +#define DEBUG_PRINT(fmt, args...) \ + printk(KERN_INFO "%s:%s[%d]: " fmt "\r\n", \ + __FILE__, __func__, __LINE__, ##args) +#else +#define DEBUG_PRINT(fmt, args...) +#endif + +#define BSP_LOG_R(fmt, args...) \ + _bsp_log (LOG_READ, KERN_INFO "%s:%s[%d]: " fmt "\r\n", \ + __FILE__, __func__, __LINE__, ##args) +#define BSP_LOG_W(fmt, args...) \ + _bsp_log (LOG_WRITE, KERN_INFO "%s:%s[%d]: " fmt "\r\n", \ + __FILE__, __func__, __LINE__, ##args) + +#define I2C_READ_BYTE_DATA(ret, lock, i2c_client, reg) \ +{ \ + mutex_lock(lock); \ + ret = i2c_smbus_read_byte_data(i2c_client, reg); \ + mutex_unlock(lock); \ + BSP_LOG_R("cpld[%d], reg=0x%03x, reg_val=0x%02x", data->index, reg, ret); \ +} +#define I2C_WRITE_BYTE_DATA(ret, lock, i2c_client, reg, val) \ +{ \ + mutex_lock(lock); \ + ret = i2c_smbus_write_byte_data(i2c_client, reg, val); \ + mutex_unlock(lock); \ + BSP_LOG_W("cpld[%d], reg=0x%03x, reg_val=0x%02x", data->index, reg, val); \ +} + +/* CPLD sysfs attributes index */ +enum s9300_cpld_sysfs_attributes { + /* CPLD1 */ + CPLD_ACCESS_REG, + CPLD_REGISTER_VAL, + CPLD_SKU_ID, + CPLD_HW_REV, + CPLD_DEPH_REV, + CPLD_BUILD_REV, + CPLD_ID_TYPE, + CPLD_MAJOR_VER, + CPLD_MINOR_VER, + CPLD_BUILD_VER, + CPLD_VERION_H, + CPLD_ID, + CPLD_MAC_INTR, + CPLD_10G_PHY_INTR, + CPLD_CPLD_FRU_INTR, + CPLD_THERMAL_ALERT_INTR, + CPLD_MISC_INTR, + CPLD_SYSTEM_INTR, + CPLD_MAC_INTR_MASK, + CPLD_10G_PHY_INTR_MASK, + CPLD_CPLD_FRU_INTR_MASK, + CPLD_THERMAL_ALERT_INTR_MASK, + CPLD_MISC_INTR_MASK, + CPLD_MAC_INTR_EVENT, + CPLD_10G_PHY_INTR_EVENT, + CPLD_CPLD_FRU_INTR_EVENT, + CPLD_THERMAL_ALERT_INTR_EVENT, + CPLD_MISC_INTR_EVENT, + CPLD_MAC_RST, + CPLD_10G_PHY_RST, + CPLD_BMC_RST, + CPLD_USB_RST, + CPLD_MUX_RST, + CPLD_MISC_RST, + CPLD_BMC_WATCHDOG, + CPLD_DAU_BD_PRES, + CPLD_PSU_STATUS, + CPLD_SYS_PW_STATUS, + CPLD_MISC, + CPLD_MUX_CTRL, + CPLD_MAC_QSFP_SEL_CTRL, + CPLD_SYS_LED_CTRL_1, + CPLD_SYS_LED_CTRL_2, + CPLD_BEACON_LED_CTRL, + CPLD_PORT_LED_CLR_CTRL, + CPLD_EVENT_DETECT_CTRL, + /* CPLD2 */ + CPLD_QSFPDD_MOD_INT_G0, + CPLD_QSFPDD_MOD_INT_G1, + CPLD_QSFPDD_MOD_INT_G2, + CPLD_QSFPDD_MOD_INT_G3, + CPLD_QSFPDD_PRES_G0, + CPLD_QSFPDD_PRES_G1, + CPLD_QSFPDD_PRES_G2, + CPLD_QSFPDD_PRES_G3, + CPLD_QSFPDD_FUSE_INT_G0, + CPLD_QSFPDD_FUSE_INT_G1, + CPLD_QSFPDD_FUSE_INT_G2, + CPLD_QSFPDD_FUSE_INT_G3, + CPLD_SFP_TXFAULT, + CPLD_SFP_ABS, + CPLD_SFP_RXLOS, + CPLD_QSFPDD_MOD_INT_MASK_G0, + CPLD_QSFPDD_MOD_INT_MASK_G1, + CPLD_QSFPDD_MOD_INT_MASK_G2, + CPLD_QSFPDD_MOD_INT_MASK_G3, + CPLD_QSFPDD_PRES_MASK_G0, + CPLD_QSFPDD_PRES_MASK_G1, + CPLD_QSFPDD_PRES_MASK_G2, + CPLD_QSFPDD_PRES_MASK_G3, + CPLD_QSFPDD_FUSE_INT_MASK_G0, + CPLD_QSFPDD_FUSE_INT_MASK_G1, + CPLD_QSFPDD_FUSE_INT_MASK_G2, + CPLD_QSFPDD_FUSE_INT_MASK_G3, + CPLD_SFP_TXFAULT_MASK, + CPLD_SFP_ABS_MASK, + CPLD_SFP_RXLOS_MASK, + CPLD_QSFPDD_MOD_INT_EVENT_G0, + CPLD_QSFPDD_MOD_INT_EVENT_G1, + CPLD_QSFPDD_MOD_INT_EVENT_G2, + CPLD_QSFPDD_MOD_INT_EVENT_G3, + CPLD_QSFPDD_PRES_EVENT_G0, + CPLD_QSFPDD_PRES_EVENT_G1, + CPLD_QSFPDD_PRES_EVENT_G2, + CPLD_QSFPDD_PRES_EVENT_G3, + CPLD_QSFPDD_FUSE_INT_EVENT_G0, + CPLD_QSFPDD_FUSE_INT_EVENT_G1, + CPLD_QSFPDD_FUSE_INT_EVENT_G2, + CPLD_QSFPDD_FUSE_INT_EVENT_G3, + CPLD_SFP_TXFAULT_EVENT, + CPLD_SFP_ABS_EVENT, + CPLD_SFP_RXLOS_EVENT, + CPLD_QSFPDD_RESET_CTRL_G0, + CPLD_QSFPDD_RESET_CTRL_G1, + CPLD_QSFPDD_RESET_CTRL_G2, + CPLD_QSFPDD_RESET_CTRL_G3, + CPLD_QSFPDD_LP_MODE_G0, + CPLD_QSFPDD_LP_MODE_G1, + CPLD_QSFPDD_LP_MODE_G2, + CPLD_QSFPDD_LP_MODE_G3, + CPLD_SFP_TX_DIS, + CPLD_SFP_RS, + CPLD_SFP_TS, + CPLD_PORT_INT_STATUS, + + //BSP DEBUG + BSP_DEBUG +}; + +enum bsp_log_types { + LOG_NONE, + LOG_RW, + LOG_READ, + LOG_WRITE +}; + +enum bsp_log_ctrl { + LOG_DISABLE, + LOG_ENABLE +}; + +/* CPLD sysfs attributes hook functions */ +static ssize_t read_access_register(struct device *dev, + struct device_attribute *da, char *buf); +static ssize_t write_access_register(struct device *dev, + struct device_attribute *da, const char *buf, size_t count); +static ssize_t read_register_value(struct device *dev, + struct device_attribute *da, char *buf); +static ssize_t write_register_value(struct device *dev, + struct device_attribute *da, const char *buf, size_t count); +static ssize_t read_hw_rev_cb(struct device *dev, + struct device_attribute *da, char *buf); +static ssize_t read_cpld_version_cb(struct device *dev, + struct device_attribute *da, char *buf); +static ssize_t read_cpld_callback(struct device *dev, + struct device_attribute *da, char *buf); +static ssize_t write_cpld_callback(struct device *dev, + struct device_attribute *da, const char *buf, size_t count); +static ssize_t read_cpld_version_h_cb(struct device *dev, + struct device_attribute *da, char *buf); +// cpld access api +static ssize_t read_cpld_reg(struct device *dev, char *buf, u8 reg); +static ssize_t write_cpld_reg(struct device *dev, const char *buf, size_t count, u8 reg); +static bool read_cpld_reg_raw_byte(struct device *dev, u8 reg, u8 *val, int *errno); +static bool read_cpld_reg_raw_int(struct device *dev, u8 reg, int *val); +// bsp debug api +static ssize_t read_bsp(char *buf, char *str); +static ssize_t write_bsp(const char *buf, char *str, size_t str_len, size_t count); +static ssize_t read_bsp_callback(struct device *dev, + struct device_attribute *da, char *buf); +static ssize_t write_bsp_callback(struct device *dev, + struct device_attribute *da, const char *buf, size_t count); + +static LIST_HEAD(cpld_client_list); /* client list for cpld */ +static struct mutex list_lock; /* mutex for client list */ + +struct cpld_client_node { + struct i2c_client *client; + struct list_head list; +}; + +struct cpld_data { + int index; /* CPLD index */ + struct mutex access_lock; /* mutex for cpld access */ + u8 access_reg; /* register to access */ +}; + +/* CPLD device id and data */ +static const struct i2c_device_id s9300_cpld_id[] = { + { "s9300_32d_cpld1", cpld1 }, + { "s9300_32d_cpld2", cpld2 }, + { "s9300_32d_cpld3", cpld3 }, + {} +}; + +char bsp_debug[2]="0"; +u8 enable_log_read=LOG_DISABLE; +u8 enable_log_write=LOG_DISABLE; + +/* Addresses scanned for s9300_cpld */ +static const unsigned short cpld_i2c_addr[] = { 0x30, 0x31, 0x32, I2C_CLIENT_END }; + +/* define all support register access of cpld in attribute */ +/* CPLD1 */ +static SENSOR_DEVICE_ATTR(cpld_access_register, S_IWUSR | S_IRUGO, \ + read_access_register, write_access_register, CPLD_ACCESS_REG); +static SENSOR_DEVICE_ATTR(cpld_register_value, S_IWUSR | S_IRUGO, \ + read_register_value, write_register_value, CPLD_REGISTER_VAL); +static SENSOR_DEVICE_ATTR(cpld_sku_id, S_IRUGO, \ + read_cpld_callback, NULL, CPLD_SKU_ID); +static SENSOR_DEVICE_ATTR(cpld_hw_rev, S_IRUGO, \ + read_hw_rev_cb, NULL, CPLD_HW_REV); +static SENSOR_DEVICE_ATTR(cpld_deph_rev, S_IRUGO, \ + read_hw_rev_cb, NULL, CPLD_DEPH_REV); +static SENSOR_DEVICE_ATTR(cpld_build_rev, S_IRUGO, \ + read_hw_rev_cb, NULL, CPLD_BUILD_REV); +static SENSOR_DEVICE_ATTR(cpld_id_type, S_IRUGO, \ + read_hw_rev_cb, NULL, CPLD_ID_TYPE); +static SENSOR_DEVICE_ATTR(cpld_major_ver, S_IRUGO, \ + read_cpld_version_cb, NULL, CPLD_MAJOR_VER); +static SENSOR_DEVICE_ATTR(cpld_minor_ver, S_IRUGO, \ + read_cpld_version_cb, NULL, CPLD_MINOR_VER); +static SENSOR_DEVICE_ATTR(cpld_build_ver, S_IRUGO, \ + read_cpld_callback, NULL, CPLD_BUILD_VER); +static SENSOR_DEVICE_ATTR(cpld_version_h, S_IRUGO, \ + read_cpld_version_h_cb, NULL, CPLD_VERION_H); +static SENSOR_DEVICE_ATTR(cpld_id, S_IRUGO, \ + read_cpld_callback, NULL, CPLD_ID); +static SENSOR_DEVICE_ATTR(cpld_mac_intr, S_IRUGO, \ + read_cpld_callback, NULL, CPLD_MAC_INTR); +static SENSOR_DEVICE_ATTR(cpld_10g_phy_intr, S_IRUGO, \ + read_cpld_callback, NULL, CPLD_10G_PHY_INTR); +static SENSOR_DEVICE_ATTR(cpld_cpld_fru_intr, S_IRUGO, \ + read_cpld_callback, NULL, CPLD_CPLD_FRU_INTR); +static SENSOR_DEVICE_ATTR(cpld_thermal_alert_intr, S_IRUGO, \ + read_cpld_callback, NULL, CPLD_THERMAL_ALERT_INTR); +static SENSOR_DEVICE_ATTR(cpld_misc_intr, S_IRUGO, \ + read_cpld_callback, NULL, CPLD_MISC_INTR); +static SENSOR_DEVICE_ATTR(cpld_system_intr, S_IRUGO, \ + read_cpld_callback, NULL, CPLD_SYSTEM_INTR); +static SENSOR_DEVICE_ATTR(cpld_mac_intr_mask, S_IWUSR | S_IRUGO, \ + read_cpld_callback, write_cpld_callback, CPLD_MAC_INTR_MASK); +static SENSOR_DEVICE_ATTR(cpld_10g_phy_intr_mask, S_IWUSR | S_IRUGO, \ + read_cpld_callback, write_cpld_callback, CPLD_10G_PHY_INTR_MASK); +static SENSOR_DEVICE_ATTR(cpld_cpld_fru_intr_mask, S_IWUSR | S_IRUGO, \ + read_cpld_callback, write_cpld_callback, CPLD_CPLD_FRU_INTR_MASK); +static SENSOR_DEVICE_ATTR(cpld_thermal_alert_intr_mask, S_IWUSR | S_IRUGO, \ + read_cpld_callback, write_cpld_callback, CPLD_THERMAL_ALERT_INTR_MASK); +static SENSOR_DEVICE_ATTR(cpld_misc_intr_mask, S_IWUSR | S_IRUGO, \ + read_cpld_callback, write_cpld_callback, CPLD_MISC_INTR_MASK); +static SENSOR_DEVICE_ATTR(cpld_mac_intr_event, S_IRUGO, \ + read_cpld_callback, NULL, CPLD_MAC_INTR_EVENT); +static SENSOR_DEVICE_ATTR(cpld_10g_phy_intr_event, S_IRUGO, \ + read_cpld_callback, NULL, CPLD_10G_PHY_INTR_EVENT); +static SENSOR_DEVICE_ATTR(cpld_cpld_fru_intr_event, S_IRUGO, \ + read_cpld_callback, NULL, CPLD_CPLD_FRU_INTR_EVENT); +static SENSOR_DEVICE_ATTR(cpld_thermal_alert_intr_event, S_IRUGO, \ + read_cpld_callback, NULL, CPLD_THERMAL_ALERT_INTR_EVENT); +static SENSOR_DEVICE_ATTR(cpld_misc_intr_event, S_IRUGO, \ + read_cpld_callback, NULL, CPLD_MISC_INTR_EVENT); +static SENSOR_DEVICE_ATTR(cpld_mac_rst, S_IWUSR | S_IRUGO, \ + read_cpld_callback, write_cpld_callback, CPLD_MAC_RST); +static SENSOR_DEVICE_ATTR(cpld_10g_phy_rst, S_IWUSR | S_IRUGO, \ + read_cpld_callback, write_cpld_callback, CPLD_10G_PHY_RST); +static SENSOR_DEVICE_ATTR(cpld_bmc_rst, S_IWUSR | S_IRUGO, \ + read_cpld_callback, write_cpld_callback, CPLD_BMC_RST); +static SENSOR_DEVICE_ATTR(cpld_usb_rst, S_IWUSR | S_IRUGO, \ + read_cpld_callback, write_cpld_callback, CPLD_USB_RST); +static SENSOR_DEVICE_ATTR(cpld_mux_rst, S_IWUSR | S_IRUGO, \ + read_cpld_callback, write_cpld_callback, CPLD_MUX_RST); +static SENSOR_DEVICE_ATTR(cpld_misc_rst, S_IWUSR | S_IRUGO, \ + read_cpld_callback, write_cpld_callback, CPLD_MISC_RST); +static SENSOR_DEVICE_ATTR(cpld_bmc_watchdog, S_IWUSR | S_IRUGO, \ + read_cpld_callback, write_cpld_callback, CPLD_BMC_WATCHDOG); +static SENSOR_DEVICE_ATTR(cpld_dau_bd_pres, S_IRUGO, \ + read_cpld_callback, NULL, CPLD_DAU_BD_PRES); +static SENSOR_DEVICE_ATTR(cpld_psu_status, S_IRUGO, \ + read_cpld_callback, NULL, CPLD_PSU_STATUS); +static SENSOR_DEVICE_ATTR(cpld_sys_pw_status, S_IRUGO, \ + read_cpld_callback, NULL, CPLD_SYS_PW_STATUS); +static SENSOR_DEVICE_ATTR(cpld_misc, S_IRUGO, \ + read_cpld_callback, NULL, CPLD_MISC); +static SENSOR_DEVICE_ATTR(cpld_mux_ctrl, S_IWUSR | S_IRUGO, \ + read_cpld_callback, write_cpld_callback, CPLD_MUX_CTRL); +static SENSOR_DEVICE_ATTR(cpld_mac_qsfp_sel_ctrl, S_IWUSR | S_IRUGO, \ + read_cpld_callback, write_cpld_callback, CPLD_MAC_QSFP_SEL_CTRL); +static SENSOR_DEVICE_ATTR(cpld_sys_led_ctrl_1, S_IRUGO, \ + read_cpld_callback, NULL, CPLD_SYS_LED_CTRL_1); +static SENSOR_DEVICE_ATTR(cpld_sys_led_ctrl_2, S_IRUGO, \ + read_cpld_callback, NULL, CPLD_SYS_LED_CTRL_2); +static SENSOR_DEVICE_ATTR(cpld_beacon_led_ctrl, S_IWUSR | S_IRUGO, \ + read_cpld_callback, write_cpld_callback, CPLD_BEACON_LED_CTRL); +static SENSOR_DEVICE_ATTR(cpld_port_led_clr_ctrl, S_IWUSR | S_IRUGO, \ + read_cpld_callback, write_cpld_callback, CPLD_PORT_LED_CLR_CTRL); +static SENSOR_DEVICE_ATTR(cpld_event_detect_ctrl, S_IWUSR | S_IRUGO, \ + read_cpld_callback, write_cpld_callback, CPLD_EVENT_DETECT_CTRL); +/* CPLD2 */ +static SENSOR_DEVICE_ATTR(cpld_qsfpdd_mod_int_g0, S_IRUGO, \ + read_cpld_callback, NULL, CPLD_QSFPDD_MOD_INT_G0); +static SENSOR_DEVICE_ATTR(cpld_qsfpdd_mod_int_g1, S_IRUGO, \ + read_cpld_callback, NULL, CPLD_QSFPDD_MOD_INT_G1); +static SENSOR_DEVICE_ATTR(cpld_qsfpdd_mod_int_g2, S_IRUGO, \ + read_cpld_callback, NULL, CPLD_QSFPDD_MOD_INT_G2); +static SENSOR_DEVICE_ATTR(cpld_qsfpdd_mod_int_g3, S_IRUGO, \ + read_cpld_callback, NULL, CPLD_QSFPDD_MOD_INT_G3); +static SENSOR_DEVICE_ATTR(cpld_qsfpdd_pres_g0, S_IRUGO, \ + read_cpld_callback, NULL, CPLD_QSFPDD_PRES_G0); +static SENSOR_DEVICE_ATTR(cpld_qsfpdd_pres_g1, S_IRUGO, \ + read_cpld_callback, NULL, CPLD_QSFPDD_PRES_G1); +static SENSOR_DEVICE_ATTR(cpld_qsfpdd_pres_g2, S_IRUGO, \ + read_cpld_callback, NULL, CPLD_QSFPDD_PRES_G2); +static SENSOR_DEVICE_ATTR(cpld_qsfpdd_pres_g3, S_IRUGO, \ + read_cpld_callback, NULL, CPLD_QSFPDD_PRES_G3); +static SENSOR_DEVICE_ATTR(cpld_qsfpdd_fuse_int_g0, S_IRUGO, \ + read_cpld_callback, NULL, CPLD_QSFPDD_FUSE_INT_G0); +static SENSOR_DEVICE_ATTR(cpld_qsfpdd_fuse_int_g1, S_IRUGO, \ + read_cpld_callback, NULL, CPLD_QSFPDD_FUSE_INT_G1); +static SENSOR_DEVICE_ATTR(cpld_qsfpdd_fuse_int_g2, S_IRUGO, \ + read_cpld_callback, NULL, CPLD_QSFPDD_FUSE_INT_G2); +static SENSOR_DEVICE_ATTR(cpld_qsfpdd_fuse_int_g3, S_IRUGO, \ + read_cpld_callback, NULL, CPLD_QSFPDD_FUSE_INT_G3); +static SENSOR_DEVICE_ATTR(cpld_sfp_txfault, S_IRUGO, \ + read_cpld_callback, NULL, CPLD_SFP_TXFAULT); +static SENSOR_DEVICE_ATTR(cpld_sfp_abs, S_IRUGO, \ + read_cpld_callback, NULL, CPLD_SFP_ABS); +static SENSOR_DEVICE_ATTR(cpld_sfp_rxlos, S_IRUGO, \ + read_cpld_callback, NULL, CPLD_SFP_RXLOS); +static SENSOR_DEVICE_ATTR(cpld_qsfpdd_mod_int_mask_g0, S_IWUSR | S_IRUGO, \ + read_cpld_callback, write_cpld_callback, CPLD_QSFPDD_MOD_INT_MASK_G0); +static SENSOR_DEVICE_ATTR(cpld_qsfpdd_mod_int_mask_g1, S_IWUSR | S_IRUGO, \ + read_cpld_callback, write_cpld_callback, CPLD_QSFPDD_MOD_INT_MASK_G1); +static SENSOR_DEVICE_ATTR(cpld_qsfpdd_mod_int_mask_g2, S_IWUSR | S_IRUGO, \ + read_cpld_callback, write_cpld_callback, CPLD_QSFPDD_MOD_INT_MASK_G2); +static SENSOR_DEVICE_ATTR(cpld_qsfpdd_mod_int_mask_g3, S_IWUSR | S_IRUGO, \ + read_cpld_callback, write_cpld_callback, CPLD_QSFPDD_MOD_INT_MASK_G3); +static SENSOR_DEVICE_ATTR(cpld_qsfpdd_pres_mask_g0, S_IWUSR | S_IRUGO, \ + read_cpld_callback, write_cpld_callback, CPLD_QSFPDD_PRES_MASK_G0); +static SENSOR_DEVICE_ATTR(cpld_qsfpdd_pres_mask_g1, S_IWUSR | S_IRUGO, \ + read_cpld_callback, write_cpld_callback, CPLD_QSFPDD_PRES_MASK_G1); +static SENSOR_DEVICE_ATTR(cpld_qsfpdd_pres_mask_g2, S_IWUSR | S_IRUGO, \ + read_cpld_callback, write_cpld_callback, CPLD_QSFPDD_PRES_MASK_G2); +static SENSOR_DEVICE_ATTR(cpld_qsfpdd_pres_mask_g3, S_IWUSR | S_IRUGO, \ + read_cpld_callback, write_cpld_callback, CPLD_QSFPDD_PRES_MASK_G3); +static SENSOR_DEVICE_ATTR(cpld_qsfpdd_fuse_int_mask_g0, S_IWUSR | S_IRUGO, \ + read_cpld_callback, write_cpld_callback, CPLD_QSFPDD_FUSE_INT_MASK_G0); +static SENSOR_DEVICE_ATTR(cpld_qsfpdd_fuse_int_mask_g1, S_IWUSR | S_IRUGO, \ + read_cpld_callback, write_cpld_callback, CPLD_QSFPDD_FUSE_INT_MASK_G1); +static SENSOR_DEVICE_ATTR(cpld_qsfpdd_fuse_int_mask_g2, S_IWUSR | S_IRUGO, \ + read_cpld_callback, write_cpld_callback, CPLD_QSFPDD_FUSE_INT_MASK_G2); +static SENSOR_DEVICE_ATTR(cpld_qsfpdd_fuse_int_mask_g3, S_IWUSR | S_IRUGO, \ + read_cpld_callback, write_cpld_callback, CPLD_QSFPDD_FUSE_INT_MASK_G3); +static SENSOR_DEVICE_ATTR(cpld_sfp_txfault_mask, S_IWUSR | S_IRUGO, \ + read_cpld_callback, write_cpld_callback, CPLD_SFP_TXFAULT_MASK); +static SENSOR_DEVICE_ATTR(cpld_sfp_abs_mask, S_IWUSR | S_IRUGO, \ + read_cpld_callback, write_cpld_callback, CPLD_SFP_ABS_MASK); +static SENSOR_DEVICE_ATTR(cpld_sfp_rxlos_mask, S_IWUSR | S_IRUGO, \ + read_cpld_callback, write_cpld_callback, CPLD_SFP_RXLOS_MASK); +static SENSOR_DEVICE_ATTR(cpld_qsfpdd_mod_int_event_g0, S_IRUGO, \ + read_cpld_callback, NULL, CPLD_QSFPDD_MOD_INT_EVENT_G0); +static SENSOR_DEVICE_ATTR(cpld_qsfpdd_mod_int_event_g1, S_IRUGO, \ + read_cpld_callback, NULL, CPLD_QSFPDD_MOD_INT_EVENT_G1); +static SENSOR_DEVICE_ATTR(cpld_qsfpdd_mod_int_event_g2, S_IRUGO, \ + read_cpld_callback, NULL, CPLD_QSFPDD_MOD_INT_EVENT_G2); +static SENSOR_DEVICE_ATTR(cpld_qsfpdd_mod_int_event_g3, S_IRUGO, \ + read_cpld_callback, NULL, CPLD_QSFPDD_MOD_INT_EVENT_G3); +static SENSOR_DEVICE_ATTR(cpld_qsfpdd_pres_event_g0, S_IRUGO, \ + read_cpld_callback, NULL, CPLD_QSFPDD_PRES_EVENT_G0); +static SENSOR_DEVICE_ATTR(cpld_qsfpdd_pres_event_g1, S_IRUGO, \ + read_cpld_callback, NULL, CPLD_QSFPDD_PRES_EVENT_G1); +static SENSOR_DEVICE_ATTR(cpld_qsfpdd_pres_event_g2, S_IRUGO, \ + read_cpld_callback, NULL, CPLD_QSFPDD_PRES_EVENT_G2); +static SENSOR_DEVICE_ATTR(cpld_qsfpdd_pres_event_g3, S_IRUGO, \ + read_cpld_callback, NULL, CPLD_QSFPDD_PRES_EVENT_G3); +static SENSOR_DEVICE_ATTR(cpld_qsfpdd_fuse_int_event_g0, S_IRUGO, \ + read_cpld_callback, NULL, CPLD_QSFPDD_FUSE_INT_EVENT_G0); +static SENSOR_DEVICE_ATTR(cpld_qsfpdd_fuse_int_event_g1, S_IRUGO, \ + read_cpld_callback, NULL, CPLD_QSFPDD_FUSE_INT_EVENT_G1); +static SENSOR_DEVICE_ATTR(cpld_qsfpdd_fuse_int_event_g2, S_IRUGO, \ + read_cpld_callback, NULL, CPLD_QSFPDD_FUSE_INT_EVENT_G2); +static SENSOR_DEVICE_ATTR(cpld_qsfpdd_fuse_int_event_g3, S_IRUGO, \ + read_cpld_callback, NULL, CPLD_QSFPDD_FUSE_INT_EVENT_G3); +static SENSOR_DEVICE_ATTR(cpld_sfp_txfault_event, S_IRUGO, \ + read_cpld_callback, NULL, CPLD_SFP_TXFAULT_EVENT); +static SENSOR_DEVICE_ATTR(cpld_sfp_abs_event, S_IRUGO, \ + read_cpld_callback, NULL, CPLD_SFP_ABS_EVENT); +static SENSOR_DEVICE_ATTR(cpld_sfp_rxlos_event, S_IRUGO, \ + read_cpld_callback, NULL, CPLD_SFP_RXLOS_EVENT); +static SENSOR_DEVICE_ATTR(cpld_qsfpdd_reset_ctrl_g0, \ + S_IWUSR | S_IRUGO, \ + read_cpld_callback, write_cpld_callback, \ + CPLD_QSFPDD_RESET_CTRL_G0); +static SENSOR_DEVICE_ATTR(cpld_qsfpdd_reset_ctrl_g1, \ + S_IWUSR | S_IRUGO, \ + read_cpld_callback, write_cpld_callback, \ + CPLD_QSFPDD_RESET_CTRL_G1); +static SENSOR_DEVICE_ATTR(cpld_qsfpdd_reset_ctrl_g2, \ + S_IWUSR | S_IRUGO, \ + read_cpld_callback, write_cpld_callback, \ + CPLD_QSFPDD_RESET_CTRL_G2); +static SENSOR_DEVICE_ATTR(cpld_qsfpdd_reset_ctrl_g3, \ + S_IWUSR | S_IRUGO, \ + read_cpld_callback, write_cpld_callback, \ + CPLD_QSFPDD_RESET_CTRL_G3); +static SENSOR_DEVICE_ATTR(cpld_qsfpdd_lp_mode_g0, \ + S_IWUSR | S_IRUGO, \ + read_cpld_callback, write_cpld_callback, \ + CPLD_QSFPDD_LP_MODE_G0); +static SENSOR_DEVICE_ATTR(cpld_qsfpdd_lp_mode_g1, \ + S_IWUSR | S_IRUGO, \ + read_cpld_callback, write_cpld_callback, \ + CPLD_QSFPDD_LP_MODE_G1); +static SENSOR_DEVICE_ATTR(cpld_qsfpdd_lp_mode_g2, \ + S_IWUSR | S_IRUGO, \ + read_cpld_callback, write_cpld_callback, \ + CPLD_QSFPDD_LP_MODE_G2); +static SENSOR_DEVICE_ATTR(cpld_qsfpdd_lp_mode_g3, \ + S_IWUSR | S_IRUGO, \ + read_cpld_callback, write_cpld_callback, \ + CPLD_QSFPDD_LP_MODE_G3); +static SENSOR_DEVICE_ATTR(cpld_sfp_tx_dis, S_IWUSR | S_IRUGO, \ + read_cpld_callback, write_cpld_callback, CPLD_SFP_TX_DIS); +static SENSOR_DEVICE_ATTR(cpld_sfp_rs, S_IWUSR | S_IRUGO, \ + read_cpld_callback, write_cpld_callback, CPLD_SFP_RS); +static SENSOR_DEVICE_ATTR(cpld_sfp_ts, S_IWUSR | S_IRUGO, \ + read_cpld_callback, write_cpld_callback, CPLD_SFP_TS); +static SENSOR_DEVICE_ATTR(cpld_port_int_status, S_IRUGO, \ + read_cpld_callback, NULL, CPLD_PORT_INT_STATUS); +//BSP DEBUG +static SENSOR_DEVICE_ATTR(bsp_debug, S_IRUGO | S_IWUSR, \ + read_bsp_callback, write_bsp_callback, BSP_DEBUG); + +/* define support attributes of cpldx , total 3 */ +/* cpld 1 */ +static struct attribute *s9300_cpld1_attributes[] = { + &sensor_dev_attr_cpld_access_register.dev_attr.attr, + &sensor_dev_attr_cpld_register_value.dev_attr.attr, + &sensor_dev_attr_cpld_sku_id.dev_attr.attr, + &sensor_dev_attr_cpld_hw_rev.dev_attr.attr, + &sensor_dev_attr_cpld_deph_rev.dev_attr.attr, + &sensor_dev_attr_cpld_build_rev.dev_attr.attr, + &sensor_dev_attr_cpld_id_type.dev_attr.attr, + &sensor_dev_attr_cpld_major_ver.dev_attr.attr, + &sensor_dev_attr_cpld_minor_ver.dev_attr.attr, + &sensor_dev_attr_cpld_build_ver.dev_attr.attr, + &sensor_dev_attr_cpld_version_h.dev_attr.attr, + &sensor_dev_attr_cpld_id.dev_attr.attr, + &sensor_dev_attr_cpld_mac_intr.dev_attr.attr, + &sensor_dev_attr_cpld_10g_phy_intr.dev_attr.attr, + &sensor_dev_attr_cpld_cpld_fru_intr.dev_attr.attr, + &sensor_dev_attr_cpld_thermal_alert_intr.dev_attr.attr, + &sensor_dev_attr_cpld_misc_intr.dev_attr.attr, + &sensor_dev_attr_cpld_system_intr.dev_attr.attr, + &sensor_dev_attr_cpld_mac_intr_mask.dev_attr.attr, + &sensor_dev_attr_cpld_10g_phy_intr_mask.dev_attr.attr, + &sensor_dev_attr_cpld_cpld_fru_intr_mask.dev_attr.attr, + &sensor_dev_attr_cpld_thermal_alert_intr_mask.dev_attr.attr, + &sensor_dev_attr_cpld_misc_intr_mask.dev_attr.attr, + &sensor_dev_attr_cpld_mac_intr_event.dev_attr.attr, + &sensor_dev_attr_cpld_10g_phy_intr_event.dev_attr.attr, + &sensor_dev_attr_cpld_cpld_fru_intr_event.dev_attr.attr, + &sensor_dev_attr_cpld_thermal_alert_intr_event.dev_attr.attr, + &sensor_dev_attr_cpld_misc_intr_event.dev_attr.attr, + &sensor_dev_attr_cpld_mac_rst.dev_attr.attr, + &sensor_dev_attr_cpld_10g_phy_rst.dev_attr.attr, + &sensor_dev_attr_cpld_bmc_rst.dev_attr.attr, + &sensor_dev_attr_cpld_usb_rst.dev_attr.attr, + &sensor_dev_attr_cpld_mux_rst.dev_attr.attr, + &sensor_dev_attr_cpld_misc_rst.dev_attr.attr, + &sensor_dev_attr_cpld_bmc_watchdog.dev_attr.attr, + &sensor_dev_attr_cpld_dau_bd_pres.dev_attr.attr, + &sensor_dev_attr_cpld_psu_status.dev_attr.attr, + &sensor_dev_attr_cpld_sys_pw_status.dev_attr.attr, + &sensor_dev_attr_cpld_misc.dev_attr.attr, + &sensor_dev_attr_cpld_mux_ctrl.dev_attr.attr, + &sensor_dev_attr_cpld_mac_qsfp_sel_ctrl.dev_attr.attr, + &sensor_dev_attr_cpld_sys_led_ctrl_1.dev_attr.attr, + &sensor_dev_attr_cpld_sys_led_ctrl_2.dev_attr.attr, + &sensor_dev_attr_cpld_beacon_led_ctrl.dev_attr.attr, + &sensor_dev_attr_cpld_port_led_clr_ctrl.dev_attr.attr, + &sensor_dev_attr_cpld_event_detect_ctrl.dev_attr.attr, + &sensor_dev_attr_bsp_debug.dev_attr.attr, + NULL +}; + +/* cpld 2 */ +static struct attribute *s9300_cpld2_attributes[] = { + &sensor_dev_attr_cpld_access_register.dev_attr.attr, + &sensor_dev_attr_cpld_register_value.dev_attr.attr, + &sensor_dev_attr_cpld_major_ver.dev_attr.attr, + &sensor_dev_attr_cpld_minor_ver.dev_attr.attr, + &sensor_dev_attr_cpld_build_ver.dev_attr.attr, + &sensor_dev_attr_cpld_version_h.dev_attr.attr, + &sensor_dev_attr_cpld_id.dev_attr.attr, + &sensor_dev_attr_cpld_qsfpdd_mod_int_g0.dev_attr.attr, + &sensor_dev_attr_cpld_qsfpdd_mod_int_g1.dev_attr.attr, + &sensor_dev_attr_cpld_qsfpdd_mod_int_g2.dev_attr.attr, + &sensor_dev_attr_cpld_qsfpdd_mod_int_g3.dev_attr.attr, + &sensor_dev_attr_cpld_qsfpdd_pres_g0.dev_attr.attr, + &sensor_dev_attr_cpld_qsfpdd_pres_g1.dev_attr.attr, + &sensor_dev_attr_cpld_qsfpdd_pres_g2.dev_attr.attr, + &sensor_dev_attr_cpld_qsfpdd_pres_g3.dev_attr.attr, + &sensor_dev_attr_cpld_qsfpdd_fuse_int_g0.dev_attr.attr, + &sensor_dev_attr_cpld_qsfpdd_fuse_int_g1.dev_attr.attr, + &sensor_dev_attr_cpld_qsfpdd_fuse_int_g2.dev_attr.attr, + &sensor_dev_attr_cpld_qsfpdd_fuse_int_g3.dev_attr.attr, + &sensor_dev_attr_cpld_sfp_txfault.dev_attr.attr, + &sensor_dev_attr_cpld_sfp_abs.dev_attr.attr, + &sensor_dev_attr_cpld_sfp_rxlos.dev_attr.attr, + &sensor_dev_attr_cpld_qsfpdd_mod_int_mask_g0.dev_attr.attr, + &sensor_dev_attr_cpld_qsfpdd_mod_int_mask_g1.dev_attr.attr, + &sensor_dev_attr_cpld_qsfpdd_mod_int_mask_g2.dev_attr.attr, + &sensor_dev_attr_cpld_qsfpdd_mod_int_mask_g3.dev_attr.attr, + &sensor_dev_attr_cpld_qsfpdd_pres_mask_g0.dev_attr.attr, + &sensor_dev_attr_cpld_qsfpdd_pres_mask_g1.dev_attr.attr, + &sensor_dev_attr_cpld_qsfpdd_pres_mask_g2.dev_attr.attr, + &sensor_dev_attr_cpld_qsfpdd_pres_mask_g3.dev_attr.attr, + &sensor_dev_attr_cpld_qsfpdd_fuse_int_mask_g0.dev_attr.attr, + &sensor_dev_attr_cpld_qsfpdd_fuse_int_mask_g1.dev_attr.attr, + &sensor_dev_attr_cpld_qsfpdd_fuse_int_mask_g2.dev_attr.attr, + &sensor_dev_attr_cpld_qsfpdd_fuse_int_mask_g3.dev_attr.attr, + &sensor_dev_attr_cpld_sfp_txfault_mask.dev_attr.attr, + &sensor_dev_attr_cpld_sfp_abs_mask.dev_attr.attr, + &sensor_dev_attr_cpld_sfp_rxlos_mask.dev_attr.attr, + &sensor_dev_attr_cpld_qsfpdd_mod_int_event_g0.dev_attr.attr, + &sensor_dev_attr_cpld_qsfpdd_mod_int_event_g1.dev_attr.attr, + &sensor_dev_attr_cpld_qsfpdd_mod_int_event_g2.dev_attr.attr, + &sensor_dev_attr_cpld_qsfpdd_mod_int_event_g3.dev_attr.attr, + &sensor_dev_attr_cpld_qsfpdd_pres_event_g0.dev_attr.attr, + &sensor_dev_attr_cpld_qsfpdd_pres_event_g1.dev_attr.attr, + &sensor_dev_attr_cpld_qsfpdd_pres_event_g2.dev_attr.attr, + &sensor_dev_attr_cpld_qsfpdd_pres_event_g3.dev_attr.attr, + &sensor_dev_attr_cpld_qsfpdd_fuse_int_event_g0.dev_attr.attr, + &sensor_dev_attr_cpld_qsfpdd_fuse_int_event_g1.dev_attr.attr, + &sensor_dev_attr_cpld_qsfpdd_fuse_int_event_g2.dev_attr.attr, + &sensor_dev_attr_cpld_qsfpdd_fuse_int_event_g3.dev_attr.attr, + &sensor_dev_attr_cpld_sfp_txfault_event.dev_attr.attr, + &sensor_dev_attr_cpld_sfp_abs_event.dev_attr.attr, + &sensor_dev_attr_cpld_sfp_rxlos_event.dev_attr.attr, + &sensor_dev_attr_cpld_qsfpdd_reset_ctrl_g0.dev_attr.attr, + &sensor_dev_attr_cpld_qsfpdd_reset_ctrl_g1.dev_attr.attr, + &sensor_dev_attr_cpld_qsfpdd_reset_ctrl_g2.dev_attr.attr, + &sensor_dev_attr_cpld_qsfpdd_reset_ctrl_g3.dev_attr.attr, + &sensor_dev_attr_cpld_qsfpdd_lp_mode_g0.dev_attr.attr, + &sensor_dev_attr_cpld_qsfpdd_lp_mode_g1.dev_attr.attr, + &sensor_dev_attr_cpld_qsfpdd_lp_mode_g2.dev_attr.attr, + &sensor_dev_attr_cpld_qsfpdd_lp_mode_g3.dev_attr.attr, + &sensor_dev_attr_cpld_sfp_tx_dis.dev_attr.attr, + &sensor_dev_attr_cpld_sfp_rs.dev_attr.attr, + &sensor_dev_attr_cpld_sfp_ts.dev_attr.attr, + &sensor_dev_attr_cpld_port_int_status.dev_attr.attr, + NULL +}; + +/* cpld 3 */ +static struct attribute *s9300_cpld3_attributes[] = { + &sensor_dev_attr_cpld_access_register.dev_attr.attr, + &sensor_dev_attr_cpld_register_value.dev_attr.attr, + &sensor_dev_attr_cpld_major_ver.dev_attr.attr, + &sensor_dev_attr_cpld_minor_ver.dev_attr.attr, + &sensor_dev_attr_cpld_build_ver.dev_attr.attr, + &sensor_dev_attr_cpld_version_h.dev_attr.attr, + &sensor_dev_attr_cpld_id.dev_attr.attr, + NULL +}; + +/* cpld 1 attributes group */ +static const struct attribute_group s9300_cpld1_group = { + .attrs = s9300_cpld1_attributes, +}; +/* cpld 2 attributes group */ +static const struct attribute_group s9300_cpld2_group = { + .attrs = s9300_cpld2_attributes, +}; +/* cpld 3 attributes group */ +static const struct attribute_group s9300_cpld3_group = { + .attrs = s9300_cpld3_attributes, +}; + +static int _bsp_log(u8 log_type, char *fmt, ...) +{ + if ((log_type==LOG_READ && enable_log_read) || + (log_type==LOG_WRITE && enable_log_write)) { + va_list args; + int r; + + va_start(args, fmt); + r = vprintk(fmt, args); + va_end(args); + + return r; + } else { + return 0; + } +} + +static int _config_bsp_log(u8 log_type) +{ + switch(log_type) { + case LOG_NONE: + enable_log_read = LOG_DISABLE; + enable_log_write = LOG_DISABLE; + break; + case LOG_RW: + enable_log_read = LOG_ENABLE; + enable_log_write = LOG_ENABLE; + break; + case LOG_READ: + enable_log_read = LOG_ENABLE; + enable_log_write = LOG_DISABLE; + break; + case LOG_WRITE: + enable_log_read = LOG_DISABLE; + enable_log_write = LOG_ENABLE; + break; + default: + return -EINVAL; + } + return 0; +} + +/* get bsp value */ +static ssize_t read_bsp(char *buf, char *str) +{ + ssize_t len=0; + + len=sprintf(buf, "%s", str); + BSP_LOG_R("reg_val=%s", str); + + return len; +} + +/* set bsp value */ +static ssize_t write_bsp(const char *buf, char *str, size_t str_len, size_t count) +{ + snprintf(str, str_len, "%s", buf); + BSP_LOG_W("reg_val=%s", str); + + return count; +} + +/* get bsp parameter value */ +static ssize_t read_bsp_callback(struct device *dev, + struct device_attribute *da, char *buf) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + int str_len=0; + char *str=NULL; + + switch (attr->index) { + case BSP_DEBUG: + str = bsp_debug; + str_len = sizeof(bsp_debug); + break; + default: + return -EINVAL; + } + return read_bsp(buf, str); +} + +/* set bsp parameter value */ +static ssize_t write_bsp_callback(struct device *dev, + struct device_attribute *da, const char *buf, size_t count) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + int str_len=0; + char *str=NULL; + ssize_t ret = 0; + u8 bsp_debug_u8 = 0; + + switch (attr->index) { + case BSP_DEBUG: + str = bsp_debug; + str_len = sizeof(str); + ret = write_bsp(buf, str, str_len, count); + + if (kstrtou8(buf, 0, &bsp_debug_u8) < 0) { + return -EINVAL; + } else if (_config_bsp_log(bsp_debug_u8) < 0) { + return -EINVAL; + } + return ret; + default: + return -EINVAL; + } + return 0; +} + +/* read access register from cpld data */ +static ssize_t read_access_register(struct device *dev, + struct device_attribute *da, + char *buf) +{ + struct i2c_client *client = to_i2c_client(dev); + struct cpld_data *data = i2c_get_clientdata(client); + u8 reg = data->access_reg; + + return sprintf(buf, "0x%x\n", reg); +} + +/* write access register to cpld data */ +static ssize_t write_access_register(struct device *dev, + struct device_attribute *da, + const char *buf, + size_t count) +{ + struct i2c_client *client = to_i2c_client(dev); + struct cpld_data *data = i2c_get_clientdata(client); + u8 reg; + + if (kstrtou8(buf, 0, ®) < 0) + return -EINVAL; + + data->access_reg = reg; + return count; +} + +/* read the value of access register in cpld data */ +static ssize_t read_register_value(struct device *dev, + struct device_attribute *da, + char *buf) +{ + struct i2c_client *client = to_i2c_client(dev); + struct cpld_data *data = i2c_get_clientdata(client); + u8 reg = data->access_reg; + int reg_val; + + I2C_READ_BYTE_DATA(reg_val, &data->access_lock, client, reg); + + if (reg_val < 0) + return reg_val; + + return sprintf(buf, "0x%x\n", reg_val); +} + +/* wrtie the value to access register in cpld data */ +static ssize_t write_register_value(struct device *dev, + struct device_attribute *da, + const char *buf, + size_t count) +{ + struct i2c_client *client = to_i2c_client(dev); + struct cpld_data *data = i2c_get_clientdata(client); + int ret = -EIO; + u8 reg = data->access_reg; + u8 reg_val; + + if (kstrtou8(buf, 0, ®_val) < 0) + return -EINVAL; + + I2C_WRITE_BYTE_DATA(ret, &data->access_lock, client, reg, reg_val); + + if (unlikely(ret < 0)) { + dev_err(dev, "I2C_WRITE_BYTE_DATA error, return=%d\n", ret); + return ret; + } + + return count; +} + +/* get cpld register value */ +static ssize_t read_cpld_reg(struct device *dev, + char *buf, + u8 reg) +{ + int reg_val; + + if (read_cpld_reg_raw_int(dev, reg, ®_val)) + return sprintf(buf, "0x%02x\n", reg_val); + else + return reg_val; +} + +static bool read_cpld_reg_raw_int(struct device *dev, u8 reg, int *val) +{ + struct i2c_client *client = to_i2c_client(dev); + struct cpld_data *data = i2c_get_clientdata(client); + I2C_READ_BYTE_DATA(*val, &data->access_lock, client, reg); + if (unlikely(*val < 0)) { + dev_err(dev, "read_cpld_reg_raw_int() error, return=%d\n", *val); + return false; + } + return true; +} + +static bool read_cpld_reg_raw_byte(struct device *dev, u8 reg, u8 *val, int *errno) +{ + int reg_val; + + if (read_cpld_reg_raw_int(dev, reg, ®_val)) { + *val = (u8)reg_val; + return true; + } else { + *errno = reg_val; + return false; + } +} + +/* handle read for attributes */ +static ssize_t read_cpld_callback(struct device *dev, + struct device_attribute *da, char *buf) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + u8 reg = 0; + + switch (attr->index) { + case CPLD_SKU_ID: + reg = CPLD_SKU_ID_REG; + break; + case CPLD_ID: + reg = CPLD_ID_REG; + break; + case CPLD_BUILD_VER: + reg = CPLD_BUILD_VER_REG; + break; + case CPLD_MAC_INTR: + reg = CPLD_MAC_INTR_REG; + break; + case CPLD_10G_PHY_INTR: + reg = CPLD_10G_PHY_INTR_REG; + break; + case CPLD_CPLD_FRU_INTR: + reg = CPLD_CPLD_FRU_INTR_REG; + break; + case CPLD_THERMAL_ALERT_INTR: + reg = CPLD_THERMAL_ALERT_INTR_REG; + break; + case CPLD_MISC_INTR: + reg = CPLD_MISC_INTR_REG; + break; + case CPLD_SYSTEM_INTR: + reg = CPLD_SYSTEM_INTR_REG; + break; + case CPLD_MAC_INTR_MASK: + reg = CPLD_MAC_INTR_MASK_REG; + break; + case CPLD_10G_PHY_INTR_MASK: + reg = CPLD_10G_PHY_INTR_MASK_REG; + break; + case CPLD_CPLD_FRU_INTR_MASK: + reg = CPLD_CPLD_FRU_INTR_MASK_REG; + break; + case CPLD_THERMAL_ALERT_INTR_MASK: + reg = CPLD_THERMAL_ALERT_INTR_MASK_REG; + break; + case CPLD_MISC_INTR_MASK: + reg = CPLD_MISC_INTR_MASK_REG; + break; + case CPLD_MAC_INTR_EVENT: + reg = CPLD_MAC_INTR_EVENT_REG; + break; + case CPLD_10G_PHY_INTR_EVENT: + reg = CPLD_10G_PHY_INTR_EVENT_REG; + break; + case CPLD_CPLD_FRU_INTR_EVENT: + reg = CPLD_CPLD_FRU_INTR_EVENT_REG; + break; + case CPLD_THERMAL_ALERT_INTR_EVENT: + reg = CPLD_THERMAL_ALERT_INTR_EVENT_REG; + break; + case CPLD_MISC_INTR_EVENT: + reg = CPLD_MISC_INTR_EVENT_REG; + break; + case CPLD_MAC_RST: + reg = CPLD_MAC_RST_REG; + break; + case CPLD_10G_PHY_RST: + reg = CPLD_10G_PHY_RST_REG; + break; + case CPLD_BMC_RST: + reg = CPLD_BMC_RST_REG; + break; + case CPLD_USB_RST: + reg = CPLD_USB_RST_REG; + break; + case CPLD_MUX_RST: + reg = CPLD_MUX_RST_REG; + break; + case CPLD_MISC_RST: + reg = CPLD_MISC_RST_REG; + break; + case CPLD_BMC_WATCHDOG: + reg = CPLD_BMC_WATCHDOG_REG; + break; + case CPLD_DAU_BD_PRES: + reg = CPLD_DAU_BD_PRES_REG; + break; + case CPLD_PSU_STATUS: + reg = CPLD_PSU_STATUS_REG; + break; + case CPLD_SYS_PW_STATUS: + reg = CPLD_SYS_PW_STATUS_REG; + break; + case CPLD_MISC: + reg = CPLD_MISC_REG; + break; + case CPLD_MUX_CTRL: + reg = CPLD_MUX_CTRL_REG; + break; + case CPLD_MAC_QSFP_SEL_CTRL: + reg = CPLD_MAC_QSFP_SEL_CTRL_REG; + break; + case CPLD_SYS_LED_CTRL_1: + reg = CPLD_SYS_LED_CTRL_1_REG; + break; + case CPLD_SYS_LED_CTRL_2: + reg = CPLD_SYS_LED_CTRL_2_REG; + break; + case CPLD_BEACON_LED_CTRL: + reg = CPLD_BEACON_LED_CTRL_REG; + break; + case CPLD_PORT_LED_CLR_CTRL: + reg = CPLD_PORT_LED_CLR_CTRL_REG; + break; + case CPLD_EVENT_DETECT_CTRL: + reg = CPLD_EVENT_DETECT_CTRL_REG; + break; + case CPLD_QSFPDD_MOD_INT_G0: + reg = CPLD_QSFPDD_MOD_INT_G0_REG; + break; + case CPLD_QSFPDD_MOD_INT_G1: + reg = CPLD_QSFPDD_MOD_INT_G1_REG; + break; + case CPLD_QSFPDD_MOD_INT_G2: + reg = CPLD_QSFPDD_MOD_INT_G2_REG; + break; + case CPLD_QSFPDD_MOD_INT_G3: + reg = CPLD_QSFPDD_MOD_INT_G3_REG; + break; + case CPLD_QSFPDD_PRES_G0: + reg = CPLD_QSFPDD_PRES_G0_REG; + break; + case CPLD_QSFPDD_PRES_G1: + reg = CPLD_QSFPDD_PRES_G1_REG; + break; + case CPLD_QSFPDD_PRES_G2: + reg = CPLD_QSFPDD_PRES_G2_REG; + break; + case CPLD_QSFPDD_PRES_G3: + reg = CPLD_QSFPDD_PRES_G3_REG; + break; + case CPLD_QSFPDD_FUSE_INT_G0: + reg = CPLD_QSFPDD_FUSE_INT_G0_REG; + break; + case CPLD_QSFPDD_FUSE_INT_G1: + reg = CPLD_QSFPDD_FUSE_INT_G1_REG; + break; + case CPLD_QSFPDD_FUSE_INT_G2: + reg = CPLD_QSFPDD_FUSE_INT_G2_REG; + break; + case CPLD_QSFPDD_FUSE_INT_G3: + reg = CPLD_QSFPDD_FUSE_INT_G3_REG; + break; + case CPLD_SFP_TXFAULT: + reg = CPLD_SFP_TXFAULT_REG; + break; + case CPLD_SFP_ABS: + reg = CPLD_SFP_ABS_REG; + break; + case CPLD_SFP_RXLOS: + reg = CPLD_SFP_RXLOS_REG; + break; + case CPLD_QSFPDD_MOD_INT_MASK_G0: + reg = CPLD_QSFPDD_MOD_INT_MASK_G0_REG; + break; + case CPLD_QSFPDD_MOD_INT_MASK_G1: + reg = CPLD_QSFPDD_MOD_INT_MASK_G1_REG; + break; + case CPLD_QSFPDD_MOD_INT_MASK_G2: + reg = CPLD_QSFPDD_MOD_INT_MASK_G2_REG; + break; + case CPLD_QSFPDD_MOD_INT_MASK_G3: + reg = CPLD_QSFPDD_MOD_INT_MASK_G3_REG; + break; + case CPLD_QSFPDD_PRES_MASK_G0: + reg = CPLD_QSFPDD_PRES_MASK_G0_REG; + break; + case CPLD_QSFPDD_PRES_MASK_G1: + reg = CPLD_QSFPDD_PRES_MASK_G1_REG; + break; + case CPLD_QSFPDD_PRES_MASK_G2: + reg = CPLD_QSFPDD_PRES_MASK_G2_REG; + break; + case CPLD_QSFPDD_PRES_MASK_G3: + reg = CPLD_QSFPDD_PRES_MASK_G3_REG; + break; + case CPLD_QSFPDD_FUSE_INT_MASK_G0: + reg = CPLD_QSFPDD_FUSE_INT_MASK_G0_REG; + break; + case CPLD_QSFPDD_FUSE_INT_MASK_G1: + reg = CPLD_QSFPDD_FUSE_INT_MASK_G1_REG; + break; + case CPLD_QSFPDD_FUSE_INT_MASK_G2: + reg = CPLD_QSFPDD_FUSE_INT_MASK_G2_REG; + break; + case CPLD_QSFPDD_FUSE_INT_MASK_G3: + reg = CPLD_QSFPDD_FUSE_INT_MASK_G3_REG; + break; + case CPLD_SFP_TXFAULT_MASK: + reg = CPLD_SFP_TXFAULT_MASK_REG; + break; + case CPLD_SFP_ABS_MASK: + reg = CPLD_SFP_ABS_MASK_REG; + break; + case CPLD_SFP_RXLOS_MASK: + reg = CPLD_SFP_RXLOS_MASK_REG; + break; + case CPLD_QSFPDD_MOD_INT_EVENT_G0: + reg = CPLD_QSFPDD_MOD_INT_EVENT_G0_REG; + break; + case CPLD_QSFPDD_MOD_INT_EVENT_G1: + reg = CPLD_QSFPDD_MOD_INT_EVENT_G1_REG; + break; + case CPLD_QSFPDD_MOD_INT_EVENT_G2: + reg = CPLD_QSFPDD_MOD_INT_EVENT_G2_REG; + break; + case CPLD_QSFPDD_MOD_INT_EVENT_G3: + reg = CPLD_QSFPDD_MOD_INT_EVENT_G3_REG; + break; + case CPLD_QSFPDD_PRES_EVENT_G0: + reg = CPLD_QSFPDD_PRES_EVENT_G0_REG; + break; + case CPLD_QSFPDD_PRES_EVENT_G1: + reg = CPLD_QSFPDD_PRES_EVENT_G1_REG; + break; + case CPLD_QSFPDD_PRES_EVENT_G2: + reg = CPLD_QSFPDD_PRES_EVENT_G2_REG; + break; + case CPLD_QSFPDD_PRES_EVENT_G3: + reg = CPLD_QSFPDD_PRES_EVENT_G3_REG; + break; + case CPLD_QSFPDD_FUSE_INT_EVENT_G0: + reg = CPLD_QSFPDD_FUSE_INT_EVENT_G0_REG; + break; + case CPLD_QSFPDD_FUSE_INT_EVENT_G1: + reg = CPLD_QSFPDD_FUSE_INT_EVENT_G1_REG; + break; + case CPLD_QSFPDD_FUSE_INT_EVENT_G2: + reg = CPLD_QSFPDD_FUSE_INT_EVENT_G2_REG; + break; + case CPLD_QSFPDD_FUSE_INT_EVENT_G3: + reg = CPLD_QSFPDD_FUSE_INT_EVENT_G3_REG; + break; + case CPLD_SFP_TXFAULT_EVENT: + reg = CPLD_SFP_TXFAULT_EVENT_REG; + break; + case CPLD_SFP_ABS_EVENT: + reg = CPLD_SFP_ABS_EVENT_REG; + break; + case CPLD_SFP_RXLOS_EVENT: + reg = CPLD_SFP_RXLOS_EVENT_REG; + break; + case CPLD_QSFPDD_RESET_CTRL_G0: + reg = CPLD_QSFPDD_RESET_CTRL_G0_REG; + break; + case CPLD_QSFPDD_RESET_CTRL_G1: + reg = CPLD_QSFPDD_RESET_CTRL_G1_REG; + break; + case CPLD_QSFPDD_RESET_CTRL_G2: + reg = CPLD_QSFPDD_RESET_CTRL_G2_REG; + break; + case CPLD_QSFPDD_RESET_CTRL_G3: + reg = CPLD_QSFPDD_RESET_CTRL_G3_REG; + break; + case CPLD_QSFPDD_LP_MODE_G0: + reg = CPLD_QSFPDD_LP_MODE_G0_REG; + break; + case CPLD_QSFPDD_LP_MODE_G1: + reg = CPLD_QSFPDD_LP_MODE_G1_REG; + break; + case CPLD_QSFPDD_LP_MODE_G2: + reg = CPLD_QSFPDD_LP_MODE_G2_REG; + break; + case CPLD_QSFPDD_LP_MODE_G3: + reg = CPLD_QSFPDD_LP_MODE_G3_REG; + break; + case CPLD_SFP_TX_DIS: + reg = CPLD_SFP_TX_DIS_REG; + break; + case CPLD_SFP_RS: + reg = CPLD_SFP_RS_REG; + break; + case CPLD_SFP_TS: + reg = CPLD_SFP_TS_REG; + break; + case CPLD_PORT_INT_STATUS: + reg = CPLD_PORT_INT_STATUS_REG; + break; + default: + return -EINVAL; + } + return read_cpld_reg(dev, buf, reg); +} + +/* handle read for hw_rev attributes */ +static ssize_t read_hw_rev_cb(struct device *dev, + struct device_attribute *da, char *buf) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + u8 reg = CPLD_HW_REV_REG; + u8 reg_val = 0; + int errno = 0; + u8 res; + + if (!read_cpld_reg_raw_byte(dev, reg, ®_val, &errno)) + return errno; + + switch (attr->index) { + case CPLD_HW_REV: + HW_REV_GET(reg_val, res); + break; + case CPLD_DEPH_REV: + DEPH_REV_GET(reg_val, res); + break; + case CPLD_BUILD_REV: + BUILD_REV_GET(reg_val, res); + break; + case CPLD_ID_TYPE: + ID_TYPE_GET(reg_val, res); + break; + default: + return -EINVAL; + } + return sprintf(buf, "0x%02x\n", res); +} + +/* handle read for cpld_version attributes */ +static ssize_t read_cpld_version_cb(struct device *dev, + struct device_attribute *da, char *buf) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + u8 reg = CPLD_VERSION_REG; + u8 reg_val = 0; + int errno = 0; + u8 res; + + if (!read_cpld_reg_raw_byte(dev, reg, ®_val, &errno)) + return errno; + + switch (attr->index) { + case CPLD_MAJOR_VER: + CPLD_MAJOR_VERSION_GET(reg_val, res); + break; + case CPLD_MINOR_VER: + CPLD_MINOR_VERSION_GET(reg_val, res); + break; + default: + return -EINVAL; + } + return sprintf(buf, "0x%02x\n", res); +} + +/* handle read human-readable string for cpld_version attributes */ +static ssize_t read_cpld_version_h_cb(struct device *dev, + struct device_attribute *da, char *buf) +{ + u8 reg = CPLD_VERSION_REG; + u8 reg_val = 0; + int errno = 0; + u8 major, minor, build; + + //get major/minor register value + if(!read_cpld_reg_raw_byte(dev, reg, ®_val, &errno)) + return errno; + CPLD_MAJOR_VERSION_GET(reg_val, major); + CPLD_MINOR_VERSION_GET(reg_val, minor); + + //get build register value + reg = CPLD_BUILD_VER_REG; + if(!read_cpld_reg_raw_byte(dev, reg, &build, &errno)) + return errno; + + //version string format : xx.xx.xxx + return sprintf(buf, "%d.%02d.%03d\n", major, minor, build); +} + +/* handle write for attributes */ +static ssize_t write_cpld_callback(struct device *dev, + struct device_attribute *da, const char *buf, size_t count) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + u8 reg = 0; + + switch (attr->index) { + case CPLD_MAC_INTR_MASK: + reg = CPLD_MAC_INTR_MASK_REG; + break; + case CPLD_10G_PHY_INTR_MASK: + reg = CPLD_10G_PHY_INTR_MASK_REG; + break; + case CPLD_CPLD_FRU_INTR_MASK: + reg = CPLD_CPLD_FRU_INTR_MASK_REG; + break; + case CPLD_THERMAL_ALERT_INTR_MASK: + reg = CPLD_THERMAL_ALERT_INTR_MASK_REG; + break; + case CPLD_MISC_INTR_MASK: + reg = CPLD_MISC_INTR_MASK_REG; + break; + case CPLD_MAC_RST: + reg = CPLD_MAC_RST_REG; + break; + case CPLD_10G_PHY_RST: + reg = CPLD_10G_PHY_RST_REG; + break; + case CPLD_BMC_RST: + reg = CPLD_BMC_RST_REG; + break; + case CPLD_USB_RST: + reg = CPLD_USB_RST_REG; + break; + case CPLD_MUX_RST: + reg = CPLD_MUX_RST_REG; + break; + case CPLD_MISC_RST: + reg = CPLD_MISC_RST_REG; + break; + case CPLD_BMC_WATCHDOG: + reg = CPLD_BMC_WATCHDOG_REG; + break; + case CPLD_MUX_CTRL: + reg = CPLD_MUX_CTRL_REG; + break; + case CPLD_MAC_QSFP_SEL_CTRL: + reg = CPLD_MAC_QSFP_SEL_CTRL_REG; + break; + case CPLD_BEACON_LED_CTRL: + reg = CPLD_BEACON_LED_CTRL_REG; + break; + case CPLD_PORT_LED_CLR_CTRL: + reg = CPLD_PORT_LED_CLR_CTRL_REG; + break; + case CPLD_EVENT_DETECT_CTRL: + reg = CPLD_EVENT_DETECT_CTRL_REG; + break; + case CPLD_QSFPDD_MOD_INT_MASK_G0: + reg = CPLD_QSFPDD_MOD_INT_MASK_G0_REG; + break; + case CPLD_QSFPDD_MOD_INT_MASK_G1: + reg = CPLD_QSFPDD_MOD_INT_MASK_G1_REG; + break; + case CPLD_QSFPDD_MOD_INT_MASK_G2: + reg = CPLD_QSFPDD_MOD_INT_MASK_G2_REG; + break; + case CPLD_QSFPDD_MOD_INT_MASK_G3: + reg = CPLD_QSFPDD_MOD_INT_MASK_G3_REG; + break; + case CPLD_QSFPDD_PRES_MASK_G0: + reg = CPLD_QSFPDD_PRES_MASK_G0_REG; + break; + case CPLD_QSFPDD_PRES_MASK_G1: + reg = CPLD_QSFPDD_PRES_MASK_G1_REG; + break; + case CPLD_QSFPDD_PRES_MASK_G2: + reg = CPLD_QSFPDD_PRES_MASK_G2_REG; + break; + case CPLD_QSFPDD_PRES_MASK_G3: + reg = CPLD_QSFPDD_PRES_MASK_G3_REG; + break; + case CPLD_QSFPDD_FUSE_INT_MASK_G0: + reg = CPLD_QSFPDD_FUSE_INT_MASK_G0_REG; + break; + case CPLD_QSFPDD_FUSE_INT_MASK_G1: + reg = CPLD_QSFPDD_FUSE_INT_MASK_G1_REG; + break; + case CPLD_QSFPDD_FUSE_INT_MASK_G2: + reg = CPLD_QSFPDD_FUSE_INT_MASK_G2_REG; + break; + case CPLD_QSFPDD_FUSE_INT_MASK_G3: + reg = CPLD_QSFPDD_FUSE_INT_MASK_G3_REG; + break; + case CPLD_SFP_TXFAULT_MASK: + reg = CPLD_SFP_TXFAULT_MASK_REG; + break; + case CPLD_SFP_ABS_MASK: + reg = CPLD_SFP_ABS_MASK_REG; + break; + case CPLD_SFP_RXLOS_MASK: + reg = CPLD_SFP_RXLOS_MASK_REG; + break; + case CPLD_QSFPDD_RESET_CTRL_G0: + reg = CPLD_QSFPDD_RESET_CTRL_G0_REG; + break; + case CPLD_QSFPDD_RESET_CTRL_G1: + reg = CPLD_QSFPDD_RESET_CTRL_G1_REG; + break; + case CPLD_QSFPDD_RESET_CTRL_G2: + reg = CPLD_QSFPDD_RESET_CTRL_G2_REG; + break; + case CPLD_QSFPDD_RESET_CTRL_G3: + reg = CPLD_QSFPDD_RESET_CTRL_G3_REG; + break; + case CPLD_QSFPDD_LP_MODE_G0: + reg = CPLD_QSFPDD_LP_MODE_G0_REG; + break; + case CPLD_QSFPDD_LP_MODE_G1: + reg = CPLD_QSFPDD_LP_MODE_G1_REG; + break; + case CPLD_QSFPDD_LP_MODE_G2: + reg = CPLD_QSFPDD_LP_MODE_G2_REG; + break; + case CPLD_QSFPDD_LP_MODE_G3: + reg = CPLD_QSFPDD_LP_MODE_G3_REG; + break; + case CPLD_SFP_TX_DIS: + reg = CPLD_SFP_TX_DIS_REG; + break; + case CPLD_SFP_RS: + reg = CPLD_SFP_RS_REG; + break; + case CPLD_SFP_TS: + reg = CPLD_SFP_TS_REG; + break; + default: + return -EINVAL; + } + return write_cpld_reg(dev, buf, count, reg); +} + +/* set cpld register value */ +static ssize_t write_cpld_reg(struct device *dev, + const char *buf, + size_t count, + u8 reg) +{ + struct i2c_client *client = to_i2c_client(dev); + struct cpld_data *data = i2c_get_clientdata(client); + u8 reg_val; + int ret; + + if (kstrtou8(buf, 0, ®_val) < 0) + return -EINVAL; + + I2C_WRITE_BYTE_DATA(ret, &data->access_lock, + client, reg, reg_val); + + if (unlikely(ret < 0)) { + dev_err(dev, "I2C_WRITE_BYTE_DATA error, return=%d\n", ret); + return ret; + } + + return count; +} + +/* add valid cpld client to list */ +static void s9300_cpld_add_client(struct i2c_client *client) +{ + struct cpld_client_node *node = NULL; + + node = kzalloc(sizeof(struct cpld_client_node), GFP_KERNEL); + if (!node) { + dev_info(&client->dev, + "Can't allocate cpld_client_node for index %d\n", + client->addr); + return; + } + + node->client = client; + + mutex_lock(&list_lock); + list_add(&node->list, &cpld_client_list); + mutex_unlock(&list_lock); +} + +/* remove exist cpld client in list */ +static void s9300_cpld_remove_client(struct i2c_client *client) +{ + struct list_head *list_node = NULL; + struct cpld_client_node *cpld_node = NULL; + int found = 0; + + mutex_lock(&list_lock); + list_for_each(list_node, &cpld_client_list) { + cpld_node = list_entry(list_node, + struct cpld_client_node, list); + + if (cpld_node->client == client) { + found = 1; + break; + } + } + + if (found) { + list_del(list_node); + kfree(cpld_node); + } + mutex_unlock(&list_lock); +} + +/* cpld drvier probe */ +static int s9300_cpld_probe(struct i2c_client *client, + const struct i2c_device_id *dev_id) +{ + int status; + struct cpld_data *data = NULL; + int ret = -EPERM; + int idx; + + data = kzalloc(sizeof(struct cpld_data), GFP_KERNEL); + if (!data) + return -ENOMEM; + + /* init cpld data for client */ + i2c_set_clientdata(client, data); + mutex_init(&data->access_lock); + + if (!i2c_check_functionality(client->adapter, + I2C_FUNC_SMBUS_BYTE_DATA)) { + dev_info(&client->dev, + "i2c_check_functionality failed (0x%x)\n", + client->addr); + status = -EIO; + goto exit; + } + + /* get cpld id from device */ + ret = i2c_smbus_read_byte_data(client, CPLD_ID_REG); + + if (ret < 0) { + dev_info(&client->dev, + "fail to get cpld id (0x%x) at addr (0x%x)\n", + CPLD_ID_REG, client->addr); + status = -EIO; + goto exit; + } + + CPLD_ID_ID_GET(ret, idx); + + if (INVALID(idx, cpld1, cpld3)) { + dev_info(&client->dev, + "cpld id %d(device) not valid\n", idx); + //status = -EPERM; + //goto exit; + } + + data->index = dev_id->driver_data; + + /* register sysfs hooks for different cpld group */ + dev_info(&client->dev, "probe cpld with index %d\n", data->index); + switch (data->index) { + case cpld1: + status = sysfs_create_group(&client->dev.kobj, + &s9300_cpld1_group); + break; + case cpld2: + status = sysfs_create_group(&client->dev.kobj, + &s9300_cpld2_group); + break; + case cpld3: + status = sysfs_create_group(&client->dev.kobj, + &s9300_cpld3_group); + break; + default: + status = -EINVAL; + } + + if (status) + goto exit; + + dev_info(&client->dev, "chip found\n"); + + /* add probe chip to client list */ + s9300_cpld_add_client(client); + + return 0; +exit: + switch (data->index) { + case cpld1: + sysfs_remove_group(&client->dev.kobj, &s9300_cpld1_group); + break; + case cpld2: + sysfs_remove_group(&client->dev.kobj, &s9300_cpld2_group); + break; + case cpld3: + sysfs_remove_group(&client->dev.kobj, &s9300_cpld3_group); + break; + default: + break; + } + return status; +} + +/* cpld drvier remove */ +#if LINUX_VERSION_CODE < KERNEL_VERSION(6, 1, 0) +static int +#else +static void +#endif +s9300_cpld_remove(struct i2c_client *client) +{ + struct cpld_data *data = i2c_get_clientdata(client); + + switch (data->index) { + case cpld1: + sysfs_remove_group(&client->dev.kobj, &s9300_cpld1_group); + break; + case cpld2: + sysfs_remove_group(&client->dev.kobj, &s9300_cpld2_group); + break; + case cpld3: + sysfs_remove_group(&client->dev.kobj, &s9300_cpld3_group); + break; + } + + s9300_cpld_remove_client(client); +#if LINUX_VERSION_CODE < KERNEL_VERSION(6, 1, 0) + return 0; +#endif +} + +MODULE_DEVICE_TABLE(i2c, s9300_cpld_id); + +static struct i2c_driver s9300_cpld_driver = { + .class = I2C_CLASS_HWMON, + .driver = { + .name = "x86_64_ufispace_s9300_32d_cpld", + }, + .probe = s9300_cpld_probe, + .remove = s9300_cpld_remove, + .id_table = s9300_cpld_id, + .address_list = cpld_i2c_addr, +}; + +/* provide cpld register read */ +/* cpld_idx indicate the index of cpld device */ +int s9300_cpld_read(u8 cpld_idx, + u8 reg) +{ + struct list_head *list_node = NULL; + struct cpld_client_node *cpld_node = NULL; + int ret = -EPERM; + struct cpld_data *data; + + list_for_each(list_node, &cpld_client_list) { + cpld_node = list_entry(list_node, + struct cpld_client_node, list); + data = i2c_get_clientdata(cpld_node->client); + if (data->index == cpld_idx) { + DEBUG_PRINT("cpld_idx=%d, read reg 0x%02x", + cpld_idx, reg); + I2C_READ_BYTE_DATA(ret, &data->access_lock, + cpld_node->client, reg); + DEBUG_PRINT("cpld_idx=%d, read reg 0x%02x = 0x%02x", + cpld_idx, reg, ret); + break; + } + } + + return ret; +} +EXPORT_SYMBOL(s9300_cpld_read); + +/* provide cpld register write */ +/* cpld_idx indicate the index of cpld device */ +int s9300_cpld_write(u8 cpld_idx, + u8 reg, + u8 value) +{ + struct list_head *list_node = NULL; + struct cpld_client_node *cpld_node = NULL; + int ret = -EIO; + struct cpld_data *data; + + list_for_each(list_node, &cpld_client_list) { + cpld_node = list_entry(list_node, + struct cpld_client_node, list); + data = i2c_get_clientdata(cpld_node->client); + + if (data->index == cpld_idx) { + I2C_WRITE_BYTE_DATA(ret, &data->access_lock, + cpld_node->client, + reg, value); + DEBUG_PRINT("cpld_idx=%d, write reg 0x%02x val 0x%02x, ret=%d", + cpld_idx, reg, value, ret); + break; + } + } + + return ret; +} +EXPORT_SYMBOL(s9300_cpld_write); + +static int __init s9300_cpld_init(void) +{ + mutex_init(&list_lock); + return i2c_add_driver(&s9300_cpld_driver); +} + +static void __exit s9300_cpld_exit(void) +{ + i2c_del_driver(&s9300_cpld_driver); +} + +MODULE_AUTHOR("Leo Lin "); +MODULE_DESCRIPTION("x86_64_ufispace_s9300_cpld driver"); +MODULE_LICENSE("GPL"); + +module_init(s9300_cpld_init); +module_exit(s9300_cpld_exit); diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s9300-32d/modules/x86-64-ufispace-s9300-32d-cpld.h b/platform/broadcom/sonic-platform-modules-ufispace/s9300-32d/modules/x86-64-ufispace-s9300-32d-cpld.h new file mode 100644 index 0000000000..e2fd7e44a7 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ufispace/s9300-32d/modules/x86-64-ufispace-s9300-32d-cpld.h @@ -0,0 +1,251 @@ +/* header file for i2c cpld driver of ufispace_s9300_32d + * + * Copyright (C) 2017 UfiSpace Technology Corporation. + * Leo Lin + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. + */ + +#ifndef UFISPACE_S9300_I2C_CPLD_H +#define UFISPACE_S9300_I2C_CPLD_H + +/* CPLD device index value */ +enum cpld_id { + cpld1, + cpld2, + cpld3, +}; + +enum LED_BLINK { + NOBLINK, + BLINK, +}; + +enum LED_BLINK_SPEED { + BLINK_1X, // 0.5hz + BLINK_4X, // 2hz +}; + +enum LED_STATUS { + OFF, + ON, +}; + +enum LED_YELLOW { + YELLOW_OFF, + YELLOW_ON, +}; + +enum LED_GREEN { + GREEN_OFF, + GREEN_ON, +}; + +/* QSFPDD port number */ +#define QSFPDD_MAX_PORT_NUM 32 +#define QSFPDD_MIN_PORT_NUM 1 + +/* SFP+ port number */ +#define SFP_MAX_PORT_NUM 4 +#define SFP_MIN_PORT_NUM 1 + + +/* CPLD registers */ +/* CPLD 1 */ +#define CPLD_SKU_ID_REG 0x00 +#define CPLD_HW_REV_REG 0x01 +#define CPLD_VERSION_REG 0x02 +#define CPLD_ID_REG 0x03 +#define CPLD_BUILD_VER_REG 0x04 +// Interrupt status +#define CPLD_MAC_INTR_REG 0x10 +#define CPLD_10G_PHY_INTR_REG 0x13 +#define CPLD_CPLD_FRU_INTR_REG 0x14 +#define CPLD_THERMAL_ALERT_INTR_REG 0x16 +#define CPLD_MISC_INTR_REG 0x1B +#define CPLD_SYSTEM_INTR_REG 0x1D +// Interrupt mask +#define CPLD_MAC_INTR_MASK_REG 0x20 +#define CPLD_10G_PHY_INTR_MASK_REG 0x23 +#define CPLD_CPLD_FRU_INTR_MASK_REG 0x24 +#define CPLD_THERMAL_ALERT_INTR_MASK_REG 0x26 +#define CPLD_MISC_INTR_MASK_REG 0x2B +// Interrupt event +#define CPLD_MAC_INTR_EVENT_REG 0x30 +#define CPLD_10G_PHY_INTR_EVENT_REG 0x33 +#define CPLD_CPLD_FRU_INTR_EVENT_REG 0x14 +#define CPLD_THERMAL_ALERT_INTR_EVENT_REG 0x16 +#define CPLD_MISC_INTR_EVENT_REG 0x1B +// Reset ctrl +#define CPLD_MAC_RST_REG 0x40 +#define CPLD_10G_PHY_RST_REG 0x42 +#define CPLD_BMC_RST_REG 0x43 +#define CPLD_USB_RST_REG 0x44 +#define CPLD_MUX_RST_REG 0x46 +#define CPLD_MISC_RST_REG 0x48 +#define CPLD_BMC_WATCHDOG_REG 0x4D +// Sys status +#define CPLD_DAU_BD_PRES_REG 0x50 +#define CPLD_PSU_STATUS_REG 0x51 +#define CPLD_SYS_PW_STATUS_REG 0x52 +#define CPLD_MISC_REG 0x5B +// Mux ctrl +#define CPLD_MUX_CTRL_REG 0x5C +#define CPLD_MAC_QSFP_SEL_CTRL_REG 0x5F +// Led ctrl +#define CPLD_SYS_LED_CTRL_1_REG 0x80 +#define CPLD_SYS_LED_CTRL_2_REG 0x81 +#define CPLD_BEACON_LED_CTRL_REG 0x84 +#define CPLD_PORT_LED_CLR_CTRL_REG 0x85 +// Event Detect Ctrl +#define CPLD_EVENT_DETECT_CTRL_REG 0x5D + +/* CPLD 2 */ +/* G0 - port 0 ~ 7 + G1 - port 8 ~ 15 + G2 - port 16 ~ 23 + G3 - port 24 ~ 31 + */ +// Interrupt status +#define CPLD_QSFPDD_MOD_INT_G0_REG 0x10 +#define CPLD_QSFPDD_MOD_INT_G1_REG 0x11 +#define CPLD_QSFPDD_MOD_INT_G2_REG 0x12 +#define CPLD_QSFPDD_MOD_INT_G3_REG 0x13 +#define CPLD_QSFPDD_PRES_G0_REG 0x14 +#define CPLD_QSFPDD_PRES_G1_REG 0x15 +#define CPLD_QSFPDD_PRES_G2_REG 0x16 +#define CPLD_QSFPDD_PRES_G3_REG 0x17 +#define CPLD_QSFPDD_FUSE_INT_G0_REG 0x18 +#define CPLD_QSFPDD_FUSE_INT_G1_REG 0x19 +#define CPLD_QSFPDD_FUSE_INT_G2_REG 0x1A +#define CPLD_QSFPDD_FUSE_INT_G3_REG 0x1B +#define CPLD_SFP_TXFAULT_REG 0x1D +#define CPLD_SFP_ABS_REG 0x1E +#define CPLD_SFP_RXLOS_REG 0x1F +// Interrupt mask +#define CPLD_QSFPDD_MOD_INT_MASK_G0_REG 0x20 +#define CPLD_QSFPDD_MOD_INT_MASK_G1_REG 0x21 +#define CPLD_QSFPDD_MOD_INT_MASK_G2_REG 0x22 +#define CPLD_QSFPDD_MOD_INT_MASK_G3_REG 0x23 +#define CPLD_QSFPDD_PRES_MASK_G0_REG 0x24 +#define CPLD_QSFPDD_PRES_MASK_G1_REG 0x25 +#define CPLD_QSFPDD_PRES_MASK_G2_REG 0x26 +#define CPLD_QSFPDD_PRES_MASK_G3_REG 0x27 +#define CPLD_QSFPDD_FUSE_INT_MASK_G0_REG 0x28 +#define CPLD_QSFPDD_FUSE_INT_MASK_G1_REG 0x29 +#define CPLD_QSFPDD_FUSE_INT_MASK_G2_REG 0x2A +#define CPLD_QSFPDD_FUSE_INT_MASK_G3_REG 0x2B +#define CPLD_SFP_TXFAULT_MASK_REG 0x2D +#define CPLD_SFP_ABS_MASK_REG 0x2E +#define CPLD_SFP_RXLOS_MASK_REG 0x2F +// Interrupt event +#define CPLD_QSFPDD_MOD_INT_EVENT_G0_REG 0x30 +#define CPLD_QSFPDD_MOD_INT_EVENT_G1_REG 0x31 +#define CPLD_QSFPDD_MOD_INT_EVENT_G2_REG 0x32 +#define CPLD_QSFPDD_MOD_INT_EVENT_G3_REG 0x33 +#define CPLD_QSFPDD_PRES_EVENT_G0_REG 0x34 +#define CPLD_QSFPDD_PRES_EVENT_G1_REG 0x35 +#define CPLD_QSFPDD_PRES_EVENT_G2_REG 0x36 +#define CPLD_QSFPDD_PRES_EVENT_G3_REG 0x37 +#define CPLD_QSFPDD_FUSE_INT_EVENT_G0_REG 0x38 +#define CPLD_QSFPDD_FUSE_INT_EVENT_G1_REG 0x39 +#define CPLD_QSFPDD_FUSE_INT_EVENT_G2_REG 0x3A +#define CPLD_QSFPDD_FUSE_INT_EVENT_G3_REG 0x3B +#define CPLD_SFP_TXFAULT_EVENT_REG 0x3D +#define CPLD_SFP_ABS_EVENT_REG 0x3E +#define CPLD_SFP_RXLOS_EVENT_REG 0x3F +// Port ctrl +#define CPLD_QSFPDD_RESET_CTRL_G0_REG 0x40 +#define CPLD_QSFPDD_RESET_CTRL_G1_REG 0x41 +#define CPLD_QSFPDD_RESET_CTRL_G2_REG 0x42 +#define CPLD_QSFPDD_RESET_CTRL_G3_REG 0x43 +#define CPLD_QSFPDD_LP_MODE_G0_REG 0x44 +#define CPLD_QSFPDD_LP_MODE_G1_REG 0x45 +#define CPLD_QSFPDD_LP_MODE_G2_REG 0x46 +#define CPLD_QSFPDD_LP_MODE_G3_REG 0x47 +#define CPLD_SFP_TX_DIS_REG 0x55 +#define CPLD_SFP_RS_REG 0x56 +#define CPLD_SFP_TS_REG 0x57 +// Port status +#define CPLD_PORT_INT_STATUS_REG 0x58 + + +/* bit field structure for register value */ +struct cpld_reg_sku_id_t { + u8 model_id:8; +}; + +struct cpld_reg_hw_rev_t { + u8 hw_rev:2; + u8 deph_rev:1; + u8 build_rev:3; + u8 reserved:1; + u8 id_type:1; +}; + +struct cpld_reg_version_t { + u8 minor:6; + u8 major:2; +}; + +struct cpld_reg_id_t { + u8 id:3; + u8 release:5; +}; + +struct cpld_reg_beacon_led_ctrl_t { + u8 reserve:5; + u8 speed:1; + u8 blink:1; + u8 onoff:1; +}; + +/* common manipulation */ +#define INVALID(i, min, max) ((i < min) || (i > max) ? 1u : 0u) +#define READ_BIT(val, bit) ((0u == (val & (1<bf_name) +#define READ_BF_1(bf_struct, val, bf_name, bf_value) \ + bf_struct bf; \ + bf.data = val; \ + bf_value = bf.bf_name +#define HW_REV_GET(val, res) \ + READ_BF(cpld_reg_hw_rev_t, val, hw_rev, res) +#define DEPH_REV_GET(val, res) \ + READ_BF(cpld_reg_hw_rev_t, val, deph_rev, res) +#define BUILD_REV_GET(val, res) \ + READ_BF(cpld_reg_hw_rev_t, val, build_rev, res) +#define ID_TYPE_GET(val, res) \ + READ_BF(cpld_reg_hw_rev_t, val, id_type, res) +#define CPLD_MAJOR_VERSION_GET(val, res) \ + READ_BF(cpld_reg_version_t, val, major, res) +#define CPLD_MINOR_VERSION_GET(val, res) \ + READ_BF(cpld_reg_version_t, val, minor, res) +#define CPLD_ID_ID_GET(val, res) \ + READ_BF(cpld_reg_id_t, val, id, res) + +/* CPLD access functions */ +extern int s9300_cpld_read(u8 cpld_idx, u8 reg); +extern int s9300_cpld_write(u8 cpld_idx, u8 reg, u8 value); + +#endif + diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s9300-32d/modules/x86-64-ufispace-s9300-32d-lpc.c b/platform/broadcom/sonic-platform-modules-ufispace/s9300-32d/modules/x86-64-ufispace-s9300-32d-lpc.c new file mode 100644 index 0000000000..fe444aecb2 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ufispace/s9300-32d/modules/x86-64-ufispace-s9300-32d-lpc.c @@ -0,0 +1,816 @@ +/* + * A lpc driver for the ufispace_s9300_32d + * + * Copyright (C) 2017-2020 UfiSpace Technology Corporation. + * Jason Tsai + * + * Based on ad7414.c + * Copyright 2006 Stefan Roese , DENX Software Engineering + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. + */ +#include +#include +#include +#include +#include + +#define BSP_LOG_R(fmt, args...) \ + _bsp_log (LOG_READ, KERN_INFO "%s:%s[%d]: " fmt "\r\n", \ + __FILE__, __func__, __LINE__, ##args) +#define BSP_LOG_W(fmt, args...) \ + _bsp_log (LOG_WRITE, KERN_INFO "%s:%s[%d]: " fmt "\r\n", \ + __FILE__, __func__, __LINE__, ##args) + +#define DRIVER_NAME "x86_64_ufispace_s9300_32d_lpc" +#define CPU_BDE 0 +#define CPU_SKY 1 +#define CPU_TYPE CPU_SKY + +/* LPC registers */ + +#define REG_BASE_CPU 0x600 + +#if CPU_TYPE == CPU_SKY +#define REG_BASE_MB 0xE00 +#define REG_BASE_I2C_ALERT 0x700 +#else +#define REG_BASE_MB 0x700 +#define REG_BASE_I2C_ALERT 0xF000 +#endif + +//CPU CPLD +#define REG_CPU_CPLD_VERSION (REG_BASE_CPU + 0x00) +#define REG_CPU_STATUS_0 (REG_BASE_CPU + 0x01) +#define REG_CPU_STATUS_1 (REG_BASE_CPU + 0x02) +#define REG_CPU_CTRL_0 (REG_BASE_CPU + 0x03) +#define REG_CPU_CTRL_1 (REG_BASE_CPU + 0x04) +#define REG_CPU_CPLD_BUILD (REG_BASE_CPU + 0xE0) + +//MB CPLD +//TBD, need to change after CPLD spec release +#define REG_MB_BRD_ID_0 (REG_BASE_MB + 0x00) +#define REG_MB_BRD_ID_1 (REG_BASE_MB + 0x01) +#define REG_MB_CPLD_VERSION (REG_BASE_MB + 0x02) +#define REG_MB_CPLD_BUILD (REG_BASE_MB + 0x04) +#define REG_MB_MUX_RESET (REG_BASE_MB + 0x46) +#define REG_MB_MUX_CTRL (REG_BASE_MB + 0x5c) + +//I2C Alert +#if CPU_TYPE == CPU_SKY +#define REG_ALERT_STATUS (REG_BASE_I2C_ALERT + 0x80) +#else +#define REG_ALERT_STATUS (REG_BASE_I2C_ALERT + 0x00) +#define REG_ALERT_DISABLE (REG_BASE_I2C_ALERT + 0x11) +#endif + +#define MASK_ALL (0xFF) +#define LPC_MDELAY (5) + +/* LPC sysfs attributes index */ +enum lpc_sysfs_attributes { + //CPU CPLD + ATT_CPU_CPLD_VERSION, + ATT_CPU_CPLD_VERSION_H, + ATT_CPU_BIOS_BOOT_ROM, + ATT_CPU_BIOS_BOOT_CFG, + ATT_CPU_CPLD_BUILD, + //MB CPLD + ATT_MB_BRD_ID_0, + ATT_MB_BRD_ID_1, + ATT_MB_CPLD_1_VERSION, + ATT_MB_CPLD_1_VERSION_H, + ATT_MB_CPLD_1_BUILD, + ATT_MB_MUX_CTRL, + ATT_MB_MUX_RESET, + ATT_MB_BRD_SKU_ID, + ATT_MB_BRD_HW_ID, + ATT_MB_BRD_ID_TYPE, + ATT_MB_BRD_BUILD_ID, + ATT_MB_BRD_DEPH_ID, + //I2C Alert + ATT_ALERT_STATUS, +#if CPU_TYPE == CPU_BDE + ATT_ALERT_DISABLE, +#endif + //BSP + ATT_BSP_VERSION, + ATT_BSP_DEBUG, + ATT_BSP_REG, + ATT_MAX +}; + +enum bsp_log_types { + LOG_NONE, + LOG_RW, + LOG_READ, + LOG_WRITE +}; + +enum bsp_log_ctrl { + LOG_DISABLE, + LOG_ENABLE +}; + +struct lpc_data_s { + struct mutex access_lock; +}; + +struct lpc_data_s *lpc_data; +char bsp_version[16]=""; +char bsp_debug[2]="0"; +char bsp_reg[8]="0x0"; +u8 enable_log_read=LOG_DISABLE; +u8 enable_log_write=LOG_DISABLE; + +/* reg shift */ +static u8 _shift(u8 mask) +{ + int i=0, mask_one=1; + + for(i=0; i<8; ++i) { + if ((mask & mask_one) == 1) + return i; + else + mask >>= 1; + } + + return -1; +} + +/* reg mask and shift */ +static u8 _mask_shift(u8 val, u8 mask) +{ + int shift=0; + + shift = _shift(mask); + + return (val & mask) >> shift; +} + +static u8 _bit_operation(u8 reg_val, u8 bit, u8 bit_val) +{ + if (bit_val == 0) + reg_val = reg_val & ~(1 << bit); + else + reg_val = reg_val | (1 << bit); + return reg_val; +} + +static int _bsp_log(u8 log_type, char *fmt, ...) +{ + if ((log_type==LOG_READ && enable_log_read) || + (log_type==LOG_WRITE && enable_log_write)) { + va_list args; + int r; + + va_start(args, fmt); + r = vprintk(fmt, args); + va_end(args); + + return r; + } else { + return 0; + } +} + +static int _config_bsp_log(u8 log_type) +{ + switch(log_type) { + case LOG_NONE: + enable_log_read = LOG_DISABLE; + enable_log_write = LOG_DISABLE; + break; + case LOG_RW: + enable_log_read = LOG_ENABLE; + enable_log_write = LOG_ENABLE; + break; + case LOG_READ: + enable_log_read = LOG_ENABLE; + enable_log_write = LOG_DISABLE; + break; + case LOG_WRITE: + enable_log_read = LOG_DISABLE; + enable_log_write = LOG_ENABLE; + break; + default: + return -EINVAL; + } + return 0; +} + +/* get lpc register value */ +static u8 _read_lpc_reg(u16 reg, u8 mask) +{ + u8 reg_val; + + mutex_lock(&lpc_data->access_lock); + reg_val=_mask_shift(inb(reg), mask); + mutex_unlock(&lpc_data->access_lock); + + BSP_LOG_R("reg=0x%03x, reg_val=0x%02x", reg, reg_val); + + return reg_val; +} + +/* get lpc register value */ +static ssize_t read_lpc_reg(u16 reg, u8 mask, char *buf) +{ + u8 reg_val; + int len=0; + + reg_val = _read_lpc_reg(reg, mask); + len=sprintf(buf,"0x%x\n", reg_val); + + return len; +} + +/* set lpc register value */ +static ssize_t write_lpc_reg(u16 reg, u8 mask, const char *buf, size_t count) +{ + u8 reg_val, reg_val_now, shift; + + if (kstrtou8(buf, 0, ®_val) < 0) + return -EINVAL; + + //apply SINGLE BIT operation if mask is specified, multiple bits are not supported + if (mask != MASK_ALL) { + reg_val_now = _read_lpc_reg(reg, 0x0); + shift = _shift(mask); + reg_val = _bit_operation(reg_val_now, shift, reg_val); + } + + mutex_lock(&lpc_data->access_lock); + + outb(reg_val, reg); + mdelay(LPC_MDELAY); + + mutex_unlock(&lpc_data->access_lock); + + BSP_LOG_W("reg=0x%03x, reg_val=0x%02x", reg, reg_val); + + return count; +} + +/* get bsp value */ +static ssize_t read_bsp(char *buf, char *str) +{ + ssize_t len=0; + + mutex_lock(&lpc_data->access_lock); + len=sprintf(buf, "%s", str); + mutex_unlock(&lpc_data->access_lock); + + BSP_LOG_R("reg_val=%s", str); + + return len; +} + +/* set bsp value */ +static ssize_t write_bsp(const char *buf, char *str, size_t str_len, size_t count) +{ + mutex_lock(&lpc_data->access_lock); + snprintf(str, str_len, "%s", buf); + mutex_unlock(&lpc_data->access_lock); + + BSP_LOG_W("reg_val=%s", str); + + return count; +} + +/* get cpu cpld version in human readable format */ +static ssize_t read_cpu_cpld_version_h(struct device *dev, + struct device_attribute *da, char *buf) +{ + ssize_t len=0; + u16 reg = REG_CPU_CPLD_VERSION; + u8 mask = MASK_ALL; + u8 mask_major = 0b11000000; + u8 mask_minor = 0b00111111; + u8 reg_val; + u8 major, minor, build; + + mutex_lock(&lpc_data->access_lock); + reg_val = _mask_shift(inb(reg), mask); + major = _mask_shift(reg_val, mask_major); + minor = _mask_shift(reg_val, mask_minor); + reg = REG_CPU_CPLD_BUILD; + build = _mask_shift(inb(reg), mask); + len = sprintf(buf, "%d.%02d.%03d\n", major, minor, build); + mutex_unlock(&lpc_data->access_lock); + + BSP_LOG_R("reg=0x%03x, reg_val=0x%02x", reg, reg_val); + + return len; +} + +/* get mb cpld version in human readable format */ +static ssize_t read_mb_cpld_1_version_h(struct device *dev, + struct device_attribute *da, char *buf) +{ + ssize_t len=0; + u16 reg = REG_MB_CPLD_VERSION; + u8 mask = MASK_ALL; + u8 mask_major = 0b11000000; + u8 mask_minor = 0b00111111; + u8 reg_val; + u8 major, minor, build; + + mutex_lock(&lpc_data->access_lock); + reg_val = _mask_shift(inb(reg), mask); + major = _mask_shift(reg_val, mask_major); + minor = _mask_shift(reg_val, mask_minor); + reg = REG_MB_CPLD_BUILD; + build = _mask_shift(inb(reg), mask); + len = sprintf(buf, "%d.%02d.%03d\n", major, minor, build); + mutex_unlock(&lpc_data->access_lock); + + BSP_LOG_R("reg=0x%03x, reg_val=0x%02x", reg, reg_val); + + return len; +} + +/* get mux_reset register value */ +static ssize_t read_mux_reset_callback(struct device *dev, + struct device_attribute *da, char *buf) +{ + int len = 0; + u16 reg = REG_MB_MUX_RESET; + u8 mask = 0b00011111; + u8 reg_val; + + mutex_lock(&lpc_data->access_lock); + reg_val=_mask_shift(inb(reg), mask); + BSP_LOG_R("reg=0x%03x, reg_val=0x%02x", reg, reg_val); + len=sprintf(buf, "%d\n", reg_val); + mutex_unlock(&lpc_data->access_lock); + + return len; +} + +/* set mux_reset register value */ +static ssize_t write_mux_reset_callback(struct device *dev, + struct device_attribute *da, const char *buf, size_t count) +{ + u8 val = 0; + u16 reg = REG_MB_MUX_RESET; + u8 reg_val = 0; + u8 mask = 0b00011111; + static int mux_reset_flag = 0; + + if (kstrtou8(buf, 0, &val) < 0) + return -EINVAL; + + if (mux_reset_flag == 0) { + if (val == 0) { + mutex_lock(&lpc_data->access_lock); + mux_reset_flag = 1; + BSP_LOG_W("i2c mux reset is triggered..."); + + reg_val = inb(reg); + outb((reg_val & ~mask), reg); + mdelay(LPC_MDELAY); + BSP_LOG_W("reg=0x%03x, reg_val=0x%02x", reg, reg_val & ~mask); + mdelay(500); + outb((reg_val | mask), reg); + mdelay(LPC_MDELAY); + BSP_LOG_W("reg=0x%03x, reg_val=0x%02x", reg, reg_val | mask); + mdelay(500); + mux_reset_flag = 0; + mutex_unlock(&lpc_data->access_lock); + } else { + return -EINVAL; + } + } else { + BSP_LOG_W("i2c mux is resetting... (ignore)"); + mutex_lock(&lpc_data->access_lock); + mutex_unlock(&lpc_data->access_lock); + } + + return count; +} + +/* get lpc register value */ +static ssize_t read_lpc_callback(struct device *dev, + struct device_attribute *da, char *buf) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + u16 reg = 0; + u8 mask = MASK_ALL; + + switch (attr->index) { + //CPU CPLD + case ATT_CPU_CPLD_VERSION: + reg = REG_CPU_CPLD_VERSION; + break; + case ATT_CPU_BIOS_BOOT_ROM: + reg = REG_CPU_STATUS_1; + mask = 0x80; + break; + case ATT_CPU_BIOS_BOOT_CFG: + reg = REG_CPU_CTRL_1; + mask = 0x80; + break; + case ATT_CPU_CPLD_BUILD: + reg = REG_CPU_CPLD_BUILD; + break; + //MB CPLD + case ATT_MB_BRD_ID_0: + reg = REG_MB_BRD_ID_0; + break; + case ATT_MB_BRD_ID_1: + reg = REG_MB_BRD_ID_1; + break; + case ATT_MB_CPLD_1_VERSION: + reg = REG_MB_CPLD_VERSION; + break; + case ATT_MB_CPLD_1_BUILD: + reg = REG_MB_CPLD_BUILD; + break; + case ATT_MB_BRD_SKU_ID: + reg = REG_MB_BRD_ID_0; + mask = 0xFF; + break; + case ATT_MB_BRD_HW_ID: + reg = REG_MB_BRD_ID_1; + mask = 0x03; + break; + case ATT_MB_BRD_ID_TYPE: + reg = REG_MB_BRD_ID_1; + mask = 0x80; + break; + case ATT_MB_BRD_BUILD_ID: + reg = REG_MB_BRD_ID_1; + mask = 0x38; + break; + case ATT_MB_BRD_DEPH_ID: + reg = REG_MB_BRD_ID_1; + mask = 0x04; + break; + case ATT_MB_MUX_CTRL: + reg = REG_MB_MUX_CTRL; + break; + //I2C Alert + case ATT_ALERT_STATUS: + reg = REG_ALERT_STATUS; + mask = 0x20; + break; +#if CPU_TYPE == CPU_BDE + case ATT_ALERT_DISABLE: + reg = REG_ALERT_DISABLE; + mask = 0x04; + break; +#endif + //BSP + case ATT_BSP_REG: + if (kstrtou16(bsp_reg, 0, ®) < 0) + return -EINVAL; + break; + default: + return -EINVAL; + } + return read_lpc_reg(reg, mask, buf); +} + +/* set lpc register value */ +static ssize_t write_lpc_callback(struct device *dev, + struct device_attribute *da, const char *buf, size_t count) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + u16 reg = 0; + u8 mask = MASK_ALL; + + switch (attr->index) { + case ATT_MB_MUX_CTRL: + reg = REG_MB_MUX_CTRL; + break; + default: + return -EINVAL; + } + return write_lpc_reg(reg, mask, buf, count); +} + +/* get bsp parameter value */ +static ssize_t read_bsp_callback(struct device *dev, + struct device_attribute *da, char *buf) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + int str_len=0; + char *str=NULL; + + switch (attr->index) { + case ATT_BSP_VERSION: + str = bsp_version; + str_len = sizeof(bsp_version); + break; + case ATT_BSP_DEBUG: + str = bsp_debug; + str_len = sizeof(bsp_debug); + break; + case ATT_BSP_REG: + str = bsp_reg; + str_len = sizeof(bsp_reg); + break; + default: + return -EINVAL; + } + return read_bsp(buf, str); +} + +/* set bsp parameter value */ +static ssize_t write_bsp_callback(struct device *dev, + struct device_attribute *da, const char *buf, size_t count) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + int str_len=0; + char *str=NULL; + u16 reg = 0; + u8 bsp_debug_u8 = 0; + + switch (attr->index) { + case ATT_BSP_VERSION: + str = bsp_version; + str_len = sizeof(str); + break; + case ATT_BSP_DEBUG: + str = bsp_debug; + str_len = sizeof(str); + break; + case ATT_BSP_REG: + if (kstrtou16(buf, 0, ®) < 0) + return -EINVAL; + + str = bsp_reg; + str_len = sizeof(str); + break; + default: + return -EINVAL; + } + + if (attr->index == ATT_BSP_DEBUG) { + if (kstrtou8(buf, 0, &bsp_debug_u8) < 0) { + return -EINVAL; + } else if (_config_bsp_log(bsp_debug_u8) < 0) { + return -EINVAL; + } + } + + return write_bsp(buf, str, str_len, count); +} + +//SENSOR_DEVICE_ATTR - CPU +static SENSOR_DEVICE_ATTR(cpu_cpld_version, S_IRUGO, read_lpc_callback, NULL, ATT_CPU_CPLD_VERSION); +static SENSOR_DEVICE_ATTR(cpu_cpld_version_h, S_IRUGO, read_cpu_cpld_version_h, NULL, ATT_CPU_CPLD_VERSION_H); +static SENSOR_DEVICE_ATTR(boot_rom, S_IRUGO, read_lpc_callback, NULL, ATT_CPU_BIOS_BOOT_ROM); +static SENSOR_DEVICE_ATTR(boot_cfg, S_IRUGO, read_lpc_callback, NULL, ATT_CPU_BIOS_BOOT_CFG); +static SENSOR_DEVICE_ATTR(cpu_cpld_build, S_IRUGO, read_lpc_callback, NULL, ATT_CPU_CPLD_BUILD); +//SENSOR_DEVICE_ATTR - MB +static SENSOR_DEVICE_ATTR(board_id_0, S_IRUGO, read_lpc_callback, NULL, ATT_MB_BRD_ID_0); +static SENSOR_DEVICE_ATTR(board_id_1, S_IRUGO, read_lpc_callback, NULL, ATT_MB_BRD_ID_1); +static SENSOR_DEVICE_ATTR(mb_cpld_1_version, S_IRUGO, read_lpc_callback, NULL, ATT_MB_CPLD_1_VERSION); +static SENSOR_DEVICE_ATTR(mb_cpld_1_version_h, S_IRUGO, read_mb_cpld_1_version_h, NULL, ATT_MB_CPLD_1_VERSION_H); +static SENSOR_DEVICE_ATTR(mb_cpld_1_build, S_IRUGO, read_lpc_callback, NULL, ATT_MB_CPLD_1_BUILD); +static SENSOR_DEVICE_ATTR(mux_ctrl, S_IRUGO | S_IWUSR, read_lpc_callback, write_lpc_callback, ATT_MB_MUX_CTRL); +static SENSOR_DEVICE_ATTR(mux_reset, S_IRUGO | S_IWUSR, read_mux_reset_callback, write_mux_reset_callback, ATT_MB_MUX_RESET); +static SENSOR_DEVICE_ATTR(board_sku_id, S_IRUGO, read_lpc_callback, NULL, ATT_MB_BRD_SKU_ID); +static SENSOR_DEVICE_ATTR(board_hw_id, S_IRUGO, read_lpc_callback, NULL, ATT_MB_BRD_HW_ID); +static SENSOR_DEVICE_ATTR(board_id_type, S_IRUGO, read_lpc_callback, NULL, ATT_MB_BRD_ID_TYPE); +static SENSOR_DEVICE_ATTR(board_build_id, S_IRUGO, read_lpc_callback, NULL, ATT_MB_BRD_BUILD_ID); +static SENSOR_DEVICE_ATTR(board_deph_id, S_IRUGO, read_lpc_callback, NULL, ATT_MB_BRD_DEPH_ID); +//SENSOR_DEVICE_ATTR - I2C Alert +static SENSOR_DEVICE_ATTR(alert_status, S_IRUGO, read_lpc_callback, NULL, ATT_ALERT_STATUS); +#if CPU_TYPE == CPU_BDE +static SENSOR_DEVICE_ATTR(alert_disable, S_IRUGO, read_lpc_callback, NULL, ATT_ALERT_DISABLE); +#endif +//SENSOR_DEVICE_ATTR - BSP +static SENSOR_DEVICE_ATTR(bsp_version, S_IRUGO | S_IWUSR, read_bsp_callback, write_bsp_callback, ATT_BSP_VERSION); +static SENSOR_DEVICE_ATTR(bsp_debug, S_IRUGO | S_IWUSR, read_bsp_callback, write_bsp_callback, ATT_BSP_DEBUG); +static SENSOR_DEVICE_ATTR(bsp_reg, S_IRUGO | S_IWUSR, read_lpc_callback, write_bsp_callback, ATT_BSP_REG); + +static struct attribute *cpu_cpld_attrs[] = { + &sensor_dev_attr_cpu_cpld_version.dev_attr.attr, + &sensor_dev_attr_cpu_cpld_version_h.dev_attr.attr, + &sensor_dev_attr_cpu_cpld_build.dev_attr.attr, + NULL, +}; + +static struct attribute *mb_cpld_attrs[] = { + &sensor_dev_attr_board_id_0.dev_attr.attr, + &sensor_dev_attr_board_id_1.dev_attr.attr, + &sensor_dev_attr_mb_cpld_1_version.dev_attr.attr, + &sensor_dev_attr_mb_cpld_1_version_h.dev_attr.attr, + &sensor_dev_attr_mb_cpld_1_build.dev_attr.attr, + &sensor_dev_attr_board_sku_id.dev_attr.attr, + &sensor_dev_attr_board_hw_id.dev_attr.attr, + &sensor_dev_attr_board_id_type.dev_attr.attr, + &sensor_dev_attr_board_build_id.dev_attr.attr, + &sensor_dev_attr_board_deph_id.dev_attr.attr, + &sensor_dev_attr_mux_ctrl.dev_attr.attr, + &sensor_dev_attr_mux_reset.dev_attr.attr, + NULL, +}; + +static struct attribute *bios_attrs[] = { + &sensor_dev_attr_boot_rom.dev_attr.attr, + &sensor_dev_attr_boot_cfg.dev_attr.attr, + NULL, +}; + +static struct attribute *i2c_alert_attrs[] = { + &sensor_dev_attr_alert_status.dev_attr.attr, +#if CPU_TYPE == CPU_BDE + &sensor_dev_attr_alert_disable.dev_attr.attr, +#endif + NULL, +}; + +static struct attribute *bsp_attrs[] = { + &sensor_dev_attr_bsp_version.dev_attr.attr, + &sensor_dev_attr_bsp_debug.dev_attr.attr, + &sensor_dev_attr_bsp_reg.dev_attr.attr, + NULL, +}; + +static struct attribute_group cpu_cpld_attr_grp = { + .name = "cpu_cpld", + .attrs = cpu_cpld_attrs, +}; + +static struct attribute_group mb_cpld_attr_grp = { + .name = "mb_cpld", + .attrs = mb_cpld_attrs, +}; + +static struct attribute_group bios_attr_grp = { + .name = "bios", + .attrs = bios_attrs, +}; + +static struct attribute_group i2c_alert_attr_grp = { + .name = "i2c_alert", + .attrs = i2c_alert_attrs, +}; + +static struct attribute_group bsp_attr_grp = { + .name = "bsp", + .attrs = bsp_attrs, +}; + +static void lpc_dev_release( struct device * dev) +{ + return; +} + +static struct platform_device lpc_dev = { + .name = DRIVER_NAME, + .id = -1, + .dev = { + .release = lpc_dev_release, + } +}; + +static int lpc_drv_probe(struct platform_device *pdev) +{ + int i = 0, grp_num = 5; + int err[5] = {0}; + struct attribute_group *grp; + + lpc_data = devm_kzalloc(&pdev->dev, sizeof(struct lpc_data_s), + GFP_KERNEL); + if (!lpc_data) + return -ENOMEM; + + mutex_init(&lpc_data->access_lock); + + for (i=0; idev.kobj, grp); + if (err[i]) { + printk(KERN_ERR "Cannot create sysfs for group %s\n", grp->name); + goto exit; + } else { + continue; + } + } + + return 0; + +exit: + for (i=0; idev.kobj, grp); + if (!err[i]) { + //remove previous successful cases + continue; + } else { + //remove first failed case, then return + return err[i]; + } + } + return 0; +} + +static int lpc_drv_remove(struct platform_device *pdev) +{ + sysfs_remove_group(&pdev->dev.kobj, &cpu_cpld_attr_grp); + sysfs_remove_group(&pdev->dev.kobj, &mb_cpld_attr_grp); + sysfs_remove_group(&pdev->dev.kobj, &bios_attr_grp); + sysfs_remove_group(&pdev->dev.kobj, &i2c_alert_attr_grp); + sysfs_remove_group(&pdev->dev.kobj, &bsp_attr_grp); + + return 0; +} + +static struct platform_driver lpc_drv = { + .probe = lpc_drv_probe, + .remove = __exit_p(lpc_drv_remove), + .driver = { + .name = DRIVER_NAME, + }, +}; + +int lpc_init(void) +{ + int err = 0; + + err = platform_driver_register(&lpc_drv); + if (err) { + printk(KERN_ERR "%s(#%d): platform_driver_register failed(%d)\n", + __func__, __LINE__, err); + + return err; + } + + err = platform_device_register(&lpc_dev); + if (err) { + printk(KERN_ERR "%s(#%d): platform_device_register failed(%d)\n", + __func__, __LINE__, err); + platform_driver_unregister(&lpc_drv); + return err; + } + + return err; +} + +void lpc_exit(void) +{ + platform_driver_unregister(&lpc_drv); + platform_device_unregister(&lpc_dev); +} + +MODULE_AUTHOR("Leo Lin "); +MODULE_DESCRIPTION("x86_64_ufispace_s9300_32d_lpc driver"); +MODULE_LICENSE("GPL"); + +module_init(lpc_init); +module_exit(lpc_exit); diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s9300-32d/modules/x86-64-ufispace-s9300-32d-sys-eeprom.c b/platform/broadcom/sonic-platform-modules-ufispace/s9300-32d/modules/x86-64-ufispace-s9300-32d-sys-eeprom.c new file mode 100644 index 0000000000..3fa3ae4c96 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ufispace/s9300-32d/modules/x86-64-ufispace-s9300-32d-sys-eeprom.c @@ -0,0 +1,283 @@ +/* + * Copyright (C) 1998, 1999 Frodo Looijaard and + * Philip Edelbrock + * Copyright (C) 2003 Greg Kroah-Hartman + * Copyright (C) 2003 IBM Corp. + * Copyright (C) 2004 Jean Delvare + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +/* enable dev_dbg print out */ +//#define DEBUG + +#define __STDC_WANT_LIB_EXT1__ 1 +#include +#include +#include +#include +#include +#include +#include +#include + +#define _memset(s, c, n) memset(s, c, n) + +/* Addresses to scan */ +static const unsigned short normal_i2c[] = { /*0x50, 0x51, 0x52, 0x53, 0x54, + 0x55, 0x56, 0x57,*/ I2C_CLIENT_END }; + +/* Size of EEPROM in bytes */ +#define EEPROM_SIZE 512 + +#define SLICE_BITS (6) +#define SLICE_SIZE (1 << SLICE_BITS) +#define SLICE_NUM (EEPROM_SIZE/SLICE_SIZE) + +/* Each client has this additional data */ +struct eeprom_data { + struct mutex update_lock; + u8 valid; /* bitfield, bit!=0 if slice is valid */ + unsigned long last_updated[SLICE_NUM]; /* In jiffies, 8 slices */ + u8 data[EEPROM_SIZE]; /* Register values */ +}; + + +static void sys_eeprom_update_client(struct i2c_client *client, u8 slice) +{ + struct eeprom_data *data = i2c_get_clientdata(client); + int i, j; + int ret; + int addr; + + mutex_lock(&data->update_lock); + + if (!(data->valid & (1 << slice)) || + time_after(jiffies, data->last_updated[slice] + 300 * HZ)) { + dev_dbg(&client->dev, "Starting eeprom update, slice %u\n", slice); + + addr = slice << SLICE_BITS; + + ret = i2c_smbus_write_byte_data(client, (u8)((addr >> 8) & 0xFF), (u8)(addr & 0xFF)); + /* select the eeprom address */ + if (ret < 0) { + dev_err(&client->dev, "address set failed\n"); + goto exit; + } + + if (!i2c_check_functionality(client->adapter, I2C_FUNC_SMBUS_READ_BYTE)) { + goto exit; + } + + for (i = slice << SLICE_BITS; i < (slice + 1) << SLICE_BITS; i+= SLICE_SIZE) { + for (j = i; j < (i+SLICE_SIZE); j++) { + int res; + + res = i2c_smbus_read_byte(client); + if (res < 0) { + goto exit; + } + + data->data[j] = res & 0xFF; + } + } + + data->last_updated[slice] = jiffies; + data->valid |= (1 << slice); + } +exit: + mutex_unlock(&data->update_lock); +} + +static ssize_t sys_eeprom_read(struct file *filp, struct kobject *kobj, + struct bin_attribute *bin_attr, + char *buf, loff_t off, size_t count) +{ + struct i2c_client *client = to_i2c_client(container_of(kobj, struct device, kobj)); + struct eeprom_data *data = i2c_get_clientdata(client); + u8 slice; + + if (off > EEPROM_SIZE) { + return 0; + } + if (off + count > EEPROM_SIZE) { + count = EEPROM_SIZE - off; + } + if (count == 0) { + return 0; + } + + /* Only refresh slices which contain requested bytes */ + for (slice = off >> SLICE_BITS; slice <= (off + count - 1) >> SLICE_BITS; slice++) { + sys_eeprom_update_client(client, slice); + } + + memcpy(buf, &data->data[off], count); + + return count; +} + +static ssize_t sys_eeprom_write(struct file *filp, struct kobject *kobj, + struct bin_attribute *bin_attr, + char *buf, loff_t off, size_t count) +{ + struct i2c_client *client = to_i2c_client(container_of(kobj, struct device, kobj)); + struct eeprom_data *data = i2c_get_clientdata(client); + int ret; + int i; + u8 cmd; + u16 value16; + + dev_dbg(&client->dev, "sys_eeprom_write off=%d, count=%d\n", (int)off, (int)count); + + if (off > EEPROM_SIZE) { + return 0; + } + if (off + count > EEPROM_SIZE) { + count = EEPROM_SIZE - off; + } + if (count == 0) { + return 0; + } + + mutex_lock(&data->update_lock); + + for(i=0; i < count; i++) { + /* write command */ + cmd = (off >> 8) & 0xff; + value16 = off & 0xff; + value16 |= buf[i] << 8; + ret = i2c_smbus_write_word_data(client, cmd, value16); + + if (ret < 0) { + dev_err(&client->dev, "write address failed at %d \n", (int)off); + goto exit; + } + + off++; + + /* need to wait for write complete */ + udelay(10000); + } +exit: + mutex_unlock(&data->update_lock); + /* force to update client when reading */ + for(i=0; i < SLICE_NUM; i++) { + data->last_updated[i] = 0; + } + + return count; +} + +static struct bin_attribute sys_eeprom_attr = { + .attr = { + .name = "eeprom", + .mode = S_IRUGO | S_IWUSR, + }, + .size = EEPROM_SIZE, + .read = sys_eeprom_read, + .write = sys_eeprom_write, +}; + +/* Return 0 if detection is successful, -ENODEV otherwise */ +static int sys_eeprom_detect(struct i2c_client *client, struct i2c_board_info *info) +{ + struct i2c_adapter *adapter = client->adapter; + + /* EDID EEPROMs are often 24C00 EEPROMs, which answer to all + addresses 0x50-0x57, but we only care about 0x51 and 0x55. So decline + attaching to addresses >= 0x56 on DDC buses */ + if (!(adapter->class & I2C_CLASS_SPD) && client->addr >= 0x56) { + return -ENODEV; + } + + if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_READ_BYTE) + && !i2c_check_functionality(adapter, I2C_FUNC_SMBUS_WRITE_BYTE_DATA)) { + return -ENODEV; + } + + strlcpy(info->type, "eeprom", I2C_NAME_SIZE); + + return 0; +} + +static int sys_eeprom_probe(struct i2c_client *client, + const struct i2c_device_id *id) +{ + struct eeprom_data *data; + int err; + + if (!(data = kzalloc(sizeof(struct eeprom_data), GFP_KERNEL))) { + err = -ENOMEM; + goto exit; + } + +#ifdef __STDC_LIB_EXT1__ + memset_s(data->data, EEPROM_SIZE, 0xff, EEPROM_SIZE); +#else + _memset(data->data, 0xff, EEPROM_SIZE); +#endif + + i2c_set_clientdata(client, data); + mutex_init(&data->update_lock); + + /* create the sysfs eeprom file */ + err = sysfs_create_bin_file(&client->dev.kobj, &sys_eeprom_attr); + if (err) { + goto exit_kfree; + } + + return 0; + +exit_kfree: + kfree(data); +exit: + return err; +} + +#if LINUX_VERSION_CODE < KERNEL_VERSION(6, 1, 0) +static int +#else +static void +#endif +sys_eeprom_remove(struct i2c_client *client) +{ + sysfs_remove_bin_file(&client->dev.kobj, &sys_eeprom_attr); + kfree(i2c_get_clientdata(client)); + +#if LINUX_VERSION_CODE < KERNEL_VERSION(6, 1, 0) + return 0; +#endif +} + +static const struct i2c_device_id sys_eeprom_id[] = { + { "sys_eeprom", 0 }, + { } +}; + +static struct i2c_driver sys_eeprom_driver = { + .driver = { + .name = "sys_eeprom", + }, + .probe = sys_eeprom_probe, + .remove = sys_eeprom_remove, + .id_table = sys_eeprom_id, + + .class = I2C_CLASS_DDC | I2C_CLASS_SPD, + .detect = sys_eeprom_detect, + .address_list = normal_i2c, +}; + +module_i2c_driver(sys_eeprom_driver); + +MODULE_AUTHOR("Wade "); +MODULE_DESCRIPTION("UfiSpace Mother Board EEPROM driver"); +MODULE_LICENSE("GPL"); diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s9300-32d/service/pddf-platform-init.service b/platform/broadcom/sonic-platform-modules-ufispace/s9300-32d/service/pddf-platform-init.service new file mode 120000 index 0000000000..0fd9f25b6c --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ufispace/s9300-32d/service/pddf-platform-init.service @@ -0,0 +1 @@ +../../../../pddf/i2c/service/pddf-platform-init.service \ No newline at end of file diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s9300-32d/sonic_platform/__init__.py b/platform/broadcom/sonic-platform-modules-ufispace/s9300-32d/sonic_platform/__init__.py new file mode 100644 index 0000000000..593867d31c --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ufispace/s9300-32d/sonic_platform/__init__.py @@ -0,0 +1,4 @@ +# All the derived classes for PDDF +__all__ = ["platform", "chassis", "sfp", "psu", "thermal", "fan"] +from . import platform + diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s9300-32d/sonic_platform/chassis.py b/platform/broadcom/sonic-platform-modules-ufispace/s9300-32d/sonic_platform/chassis.py new file mode 100644 index 0000000000..3f02f73daa --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ufispace/s9300-32d/sonic_platform/chassis.py @@ -0,0 +1,189 @@ +#!/usr/bin/env python + +############################################################################# +# PDDF +# Module contains an implementation of SONiC Chassis API +# +############################################################################# + +try: + import time + from sonic_platform_pddf_base.pddf_chassis import PddfChassis + from sonic_py_common import device_info +except ImportError as e: + raise ImportError(str(e) + "- required module not found") + +NUM_COMPONENT = 5 + +class Chassis(PddfChassis): + """ + PDDF Platform-specific Chassis class + """ + + port_dict = {} + + def __init__(self, pddf_data=None, pddf_plugin_data=None): + PddfChassis.__init__(self, pddf_data, pddf_plugin_data) + self._initialize_components() + + def _initialize_components(self): + from sonic_platform.component import Component + for index in range(NUM_COMPONENT): + component = Component(index) + self._component_list.append(component) + + # Provide the functions/variables below for which implementation is to be overwritten + + def get_name(self): + """ + Retrieves the name of the chassis + Returns: + string: The name of the chassis + """ + return self._eeprom.platform_name_str() + + def initizalize_system_led(self): + return True + + def get_status_led(self): + return self.get_system_led("SYS_LED") + + def get_change_event(self, timeout=0): + """ + Returns a nested dictionary containing all devices which have + experienced a change at chassis level + Args: + timeout: Timeout in milliseconds (optional). If timeout == 0, + this method will block until a change is detected. + Returns: + (bool, dict): + - bool: True if call successful, False if not; + - dict: A nested dictionary where key is a device type, + value is a dictionary with key:value pairs in the format of + {'device_id':'device_event'}, where device_id is the device ID + for this device and device_event. + The known devices's device_id and device_event was defined as table below. + ----------------------------------------------------------------- + device | device_id | device_event | annotate + ----------------------------------------------------------------- + 'sfp' '' '0' Sfp removed + '1' Sfp inserted + '2' I2C bus stuck + '3' Bad eeprom + '4' Unsupported cable + '5' High Temperature + '6' Bad cable + -------------------------------------------------------------------- + Ex. 'sfp':{'11':'0', '12':'1'}, + Indicates that: + sfp 11 has been removed, sfp 12 has been inserted. + Note: For sfp, when event 3-6 happened, the module will not be avalaible, + XCVRD shall stop to read eeprom before SFP recovered from error status. + """ + + change_event_dict = {"sfp": {}} + + start_time = time.time() + forever = False + + if timeout == 0: + forever = True + elif timeout > 0: + timeout = timeout / float(1000) # Convert to secs + else: + print("get_change_event:Invalid timeout value", timeout) + return False, change_event_dict + + end_time = start_time + timeout + if start_time > end_time: + print( + "get_change_event:" "time wrap / invalid timeout value", + timeout, + ) + return False, change_event_dict # Time wrap or possibly incorrect timeout + try: + while timeout >= 0: + # check for sfp + sfp_change_dict = self.get_transceiver_change_event() + + if sfp_change_dict: + change_event_dict["sfp"] = sfp_change_dict + return True, change_event_dict + if forever: + time.sleep(1) + else: + timeout = end_time - time.time() + if timeout >= 1: + time.sleep(1) # We poll at 1 second granularity + else: + if timeout > 0: + time.sleep(timeout) + return True, change_event_dict + except Exception as e: + print(e) + print("get_change_event: Should not reach here.") + return False, change_event_dict + + def get_transceiver_change_event(self, timeout=0): + current_port_dict = {} + ret_dict = {} + + # Check for OIR events and return ret_dict + for index in range(self.platform_inventory['num_ports']): + if self._sfp_list[index].get_presence(): + current_port_dict[index] = self.plugin_data['XCVR']['plug_status']['inserted'] + else: + current_port_dict[index] = self.plugin_data['XCVR']['plug_status']['removed'] + + if len(self.port_dict) == 0: # first time + self.port_dict = current_port_dict + return {} + + if current_port_dict == self.port_dict: + return {} + + # Update reg value + for index, status in current_port_dict.items(): + if self.port_dict[index] != status: + ret_dict[index] = status + #ret_dict[str(index)] = status + self.port_dict = current_port_dict + for index, status in ret_dict.items(): + if int(status) == 1: + pass + #self._sfp_list[int(index)].check_sfp_optoe_type() + return ret_dict + + def get_reboot_cause(self): + """ + Retrieves the cause of the previous reboot + + Returns: + A tuple (string, string) where the first element is a string + containing the cause of the previous reboot. This string must be + one of the predefined strings in this class. If the first string + is "REBOOT_CAUSE_HARDWARE_OTHER", the second string can be used + to pass a description of the reboot cause. + """ + + reboot_cause_path = self.plugin_data['REBOOT_CAUSE']['reboot_cause_file'] + + try: + with open(reboot_cause_path, 'r', errors='replace') as fd: + data = fd.read() + sw_reboot_cause = data.strip() + except IOError: + sw_reboot_cause = "Unknown" + + return ('REBOOT_CAUSE_NON_HARDWARE', sw_reboot_cause) + + def get_serial_number(self): + """ + Retrieves the hardware serial number for the chassis + + Returns: + A string containing the hardware serial number for this + chassis. + """ + + return self.get_serial() \ No newline at end of file diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s9300-32d/sonic_platform/component.py b/platform/broadcom/sonic-platform-modules-ufispace/s9300-32d/sonic_platform/component.py new file mode 100644 index 0000000000..b94a10d616 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ufispace/s9300-32d/sonic_platform/component.py @@ -0,0 +1,131 @@ +############################################################################# +# +# Component contains an implementation of SONiC Platform Base API and +# provides the components firmware management function +# +############################################################################# + +try: + import subprocess + from sonic_platform_base.component_base import ComponentBase +except ImportError as e: + raise ImportError(str(e) + "- required module not found") + +CPLD_SYSFS = { + "CPLD1": "/sys/kernel/pddf/devices/sysstatus/sysstatus_data/cpld1_version", + "CPLD2": "/sys/kernel/pddf/devices/sysstatus/sysstatus_data/cpld2_version", + "CPLD3": "/sys/kernel/pddf/devices/sysstatus/sysstatus_data/cpld3_version", +} + +BMC_CMDS = { + "BMC": "bash -c 'tmp=$(ipmitool raw 0x6 0x1) && r=($(echo \"$tmp\" | cut -d \" \" -f 4,5,16,15,14)) && echo ${r[0]}.${r[1]}.${r[4]}.${r[3]}${r[2]}'", +} + +BIOS_VERSION_PATH = "/sys/class/dmi/id/bios_version" +COMPONENT_LIST= [ + ("CPLD1", "CPLD 1"), + ("CPLD2", "CPLD 2"), + ("CPLD3", "CPLD 3"), + ("BIOS", "Basic Input/Output System"), + ("BMC", "BMC"), + +] + +class Component(ComponentBase): + """Platform-specific Component class""" + + DEVICE_TYPE = "component" + + def __init__(self, component_index=0): + self.index = component_index + self.name = self.get_name() + + def _run_command(self, command): + # Run bash command and print output to stdout + try: + process = subprocess.Popen( + shlex.split(command), stdout=subprocess.PIPE) + while True: + output = process.stdout.readline() + if output == '' and process.poll() is not None: + break + rc = process.poll() + if rc != 0: + return False + except Exception: + return False + return True + + def _get_bios_version(self): + # Retrieves the BIOS firmware version + try: + with open(BIOS_VERSION_PATH, 'r') as fd: + bios_version = fd.read() + return bios_version.strip() + except Exception as e: + return None + + def _get_cpld_version(self): + # Retrieves the CPLD firmware version + cpld_version = dict() + for cpld_name in CPLD_SYSFS: + cmd = "cat {}".format(CPLD_SYSFS[cpld_name]) + status, value = subprocess.getstatusoutput(cmd) + if not status: + cpld_version_raw = value.rstrip() + cpld_version_int = int(cpld_version_raw,16) + cpld_version[cpld_name] = "{}.{:02d}".format(cpld_version_int >> 6, + cpld_version_int & 0b00111111) + + return cpld_version + + def _get_bmc_version(self): + # Retrieves the BMC firmware version + status, value = subprocess.getstatusoutput(BMC_CMDS["BMC"]) + if not status: + return value + else: + return None + + def get_name(self): + """ + Retrieves the name of the component + Returns: + A string containing the name of the component + """ + return COMPONENT_LIST[self.index][0] + + def get_description(self): + """ + Retrieves the description of the component + Returns: + A string containing the description of the component + """ + return COMPONENT_LIST[self.index][1] + + def get_firmware_version(self): + """ + Retrieves the firmware version of module + Returns: + string: The firmware versions of the module + """ + fw_version = None + + if self.name == "BIOS": + fw_version = self._get_bios_version() + elif "CPLD" in self.name: + cpld_version = self._get_cpld_version() + fw_version = cpld_version.get(self.name) + elif self.name == "BMC": + fw_version = self._get_bmc_version() + return fw_version + + def install_firmware(self, image_path): + """ + Install firmware to module + Args: + image_path: A string, path to firmware image + Returns: + A boolean, True if install successfully, False if not + """ + raise NotImplementedError diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s9300-32d/sonic_platform/eeprom.py b/platform/broadcom/sonic-platform-modules-ufispace/s9300-32d/sonic_platform/eeprom.py new file mode 100644 index 0000000000..90ab1c779a --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ufispace/s9300-32d/sonic_platform/eeprom.py @@ -0,0 +1,21 @@ +#!/usr/bin/env python + +try: + from sonic_platform_pddf_base.pddf_eeprom import PddfEeprom +except ImportError as e: + raise ImportError(str(e) + "- required module not found") + + +class Eeprom(PddfEeprom): + + def __init__(self, pddf_data=None, pddf_plugin_data=None): + PddfEeprom.__init__(self, pddf_data, pddf_plugin_data) + + # Provide the functions/variables below for which implementation is to be overwritten + + def platform_name_str(self): + (is_valid, results) = self.get_tlv_field(self.eeprom_data, self._TLV_CODE_PLATFORM_NAME) + if not is_valid: + return "N/A" + + return results[2].decode('ascii') \ No newline at end of file diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s9300-32d/sonic_platform/fan.py b/platform/broadcom/sonic-platform-modules-ufispace/s9300-32d/sonic_platform/fan.py new file mode 100644 index 0000000000..a2ef7be037 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ufispace/s9300-32d/sonic_platform/fan.py @@ -0,0 +1,172 @@ +#!/usr/bin/env python + + +try: + from sonic_platform_pddf_base.pddf_fan import PddfFan +except ImportError as e: + raise ImportError(str(e) + "- required module not found") + + +class Fan(PddfFan): + """PDDF Platform-Specific Fan class""" + + def __init__(self, tray_idx, fan_idx=0, pddf_data=None, pddf_plugin_data=None, is_psu_fan=False, psu_index=0): + # idx is 0-based + PddfFan.__init__(self, tray_idx, fan_idx, pddf_data, pddf_plugin_data, is_psu_fan, psu_index) + + # Provide the functions/variables below for which implementation is to be overwritten + # Since psu_fan airflow direction cant be read from sysfs, it is fixed as 'F2B' or 'intake' + + def get_speed(self): + """ + Retrieves the speed of fan as a percentage of full speed + + Returns: + An integer, the percentage of full fan speed, in the range 0 (off) + to 100 (full speed) + """ + speed_percentage = 0 + if self.is_psu_fan: + attr = "psu_fan{}_speed_rpm".format(self.fan_index) + device = "PSU{}".format(self.fans_psu_index) + max_speed = int(self.plugin_data['PSU']['PSU_FAN_MAX_SPEED']) + else: + if self.fan_index == 1: + pos = "f" + max_speed = int(self.plugin_data['FAN']['FAN_F_MAX_SPEED']) + else: + pos = "r" + max_speed = int(self.plugin_data['FAN']['FAN_R_MAX_SPEED']) + attr = "fan{}_{}_speed_rpm".format(self.fantray_index, pos) + device = "FAN-CTRL" + + output = self.pddf_obj.get_attr_name_output(device, attr) + if not output: + return speed_percentage + + output['status'] = output['status'].rstrip() + if output['status'].isalpha(): + return speed_percentage + else: + speed = int(float(output['status'])) + + speed_percentage = round((speed*100)/max_speed) + + return min(speed_percentage, 100) + + def get_speed_rpm(self): + """ + Retrieves the speed of fan in RPM + + Returns: + An integer, Speed of fan in RPM + """ + rpm_speed = 0 + if self.is_psu_fan: + attr = "psu_fan{}_speed_rpm".format(self.fan_index) + device = "PSU{}".format(self.fans_psu_index) + else: + if self.fan_index == 1: + pos = "f" + else: + pos = "r" + attr = "fan{}_{}_speed_rpm".format(self.fantray_index, pos) + device = "FAN-CTRL" + + output = self.pddf_obj.get_attr_name_output(device, attr) + + if output is None: + return rpm_speed + + output['status'] = output['status'].rstrip() + if output['status'].isalpha(): + return rpm_speed + else: + rpm_speed = int(float(output['status'])) + + return rpm_speed + + def get_direction(self): + """ + Retrieves the direction of fan + Returns: + A string, either FAN_DIRECTION_INTAKE or FAN_DIRECTION_EXHAUST + depending on fan direction + """ + direction = self.FAN_DIRECTION_INTAKE + if self.is_psu_fan: + attr = "psu_fan{}_dir".format(self.fan_index) + device = "PSU{}".format(self.fans_psu_index) + else: + attr = "fan{}_dir".format(self.fantray_index) + device = "FAN-CTRL" + + output = self.pddf_obj.get_attr_name_output(device, attr) + if not output: + return direction + + mode = output['mode'] + val = output['status'].strip() + vmap = self.plugin_data['FAN']['direction'][mode]['valmap'] + + if val in vmap: + direction = vmap[val] + + return direction + + def get_presence(self): + """ + Retrieves the presence of the device + Returns: + bool: True if device is present, False if not + """ + presence = False + if self.is_psu_fan: + attr = "psu_present" + device = "PSU{}".format(self.fans_psu_index) + else: + attr = "fan{}_present".format(self.fantray_index) + device = "FAN-CTRL" + + output = self.pddf_obj.get_attr_name_output(device, attr) + if not output: + return presence + + + mode = output['mode'] + val = output['status'].strip() + + if self.is_psu_fan: + vmap = self.plugin_data['PSU']['psu_present'][mode]['valmap'] + else: + vmap = self.plugin_data['FAN']['present'][mode]['valmap'] + + if val in vmap: + presence = vmap[val] + + return presence + + def get_target_speed(self): + """ + Retrieves the target (expected) speed of the fan + Returns: + An integer, the percentage of full fan speed, in the range 0 (off) + to 100 (full speed) + """ + return self.get_speed() + + def set_speed(self, speed): + """ + Sets the fan speed + + Args: + speed: An integer, the percentage of full fan speed to set fan to, + in the range 0 (off) to 100 (full speed) + + Returns: + A boolean, True if speed is set successfully, False if not + """ + + print("Setting Fan speed is not allowed") + return False + diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s9300-32d/sonic_platform/fan_drawer.py b/platform/broadcom/sonic-platform-modules-ufispace/s9300-32d/sonic_platform/fan_drawer.py new file mode 100644 index 0000000000..3b9bb607f6 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ufispace/s9300-32d/sonic_platform/fan_drawer.py @@ -0,0 +1,17 @@ +#!/usr/bin/env python + + +try: + from sonic_platform_pddf_base.pddf_fan_drawer import PddfFanDrawer +except ImportError as e: + raise ImportError(str(e) + "- required module not found") + + +class FanDrawer(PddfFanDrawer): + """PDDF Platform-Specific Fan-Drawer class""" + + def __init__(self, tray_idx, pddf_data=None, pddf_plugin_data=None): + # idx is 0-based + PddfFanDrawer.__init__(self, tray_idx, pddf_data, pddf_plugin_data) + + # Provide the functions/variables below for which implementation is to be overwritten diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s9300-32d/sonic_platform/platform.py b/platform/broadcom/sonic-platform-modules-ufispace/s9300-32d/sonic_platform/platform.py new file mode 100644 index 0000000000..406b1179ae --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ufispace/s9300-32d/sonic_platform/platform.py @@ -0,0 +1,25 @@ +#!/usr/bin/env python + +############################################################################# +# PDDF +# Module contains an implementation of SONiC Platform Base API and +# provides the platform information +# +############################################################################# + + +try: + from sonic_platform_pddf_base.pddf_platform import PddfPlatform +except ImportError as e: + raise ImportError(str(e) + "- required module not found") + + +class Platform(PddfPlatform): + """ + PDDF Platform-Specific Platform Class + """ + + def __init__(self): + PddfPlatform.__init__(self) + + # Provide the functions/variables below for which implementation is to be overwritten diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s9300-32d/sonic_platform/psu.py b/platform/broadcom/sonic-platform-modules-ufispace/s9300-32d/sonic_platform/psu.py new file mode 100644 index 0000000000..3e213415f3 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ufispace/s9300-32d/sonic_platform/psu.py @@ -0,0 +1,56 @@ +#!/usr/bin/env python + + +try: + from sonic_platform_pddf_base.pddf_psu import PddfPsu +except ImportError as e: + raise ImportError (str(e) + "- required module not found") + + +class Psu(PddfPsu): + """PDDF Platform-Specific PSU class""" + + PLATFORM_PSU_CAPACITY = 1300 + + def __init__(self, index, pddf_data=None, pddf_plugin_data=None): + PddfPsu.__init__(self, index, pddf_data, pddf_plugin_data) + + # Provide the functions/variables below for which implementation is to be overwritten + def get_maximum_supplied_power(self): + """ + Retrieves the maximum supplied power by PSU (or PSU capacity) + Returns: + A float number, the maximum power output in Watts. + e.g. 1200.1 + """ + return float(self.PLATFORM_PSU_CAPACITY) + + def get_power(self): + """ + Retrieves current energy supplied by PSU + + Returns: + A float number, the power in watts, + e.g. 302.6 + """ + + # power is returned in micro watts + return round(float(self.get_voltage()*self.get_current()), 2) + + def get_capacity(self): + """ + Retrieves the maximum supplied power by PSU (or PSU capacity) + Returns: + A float number, the maximum power output in Watts. + e.g. 1200.1 + """ + return self.get_maximum_supplied_power() + + def get_type(self): + """ + Gets the type of the PSU + + Returns: + A string, the type of PSU (AC/DC) + """ + return self.plugin_data['PSU']['DEFAULT_TYPE'] \ No newline at end of file diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s9300-32d/sonic_platform/sfp.py b/platform/broadcom/sonic-platform-modules-ufispace/s9300-32d/sonic_platform/sfp.py new file mode 100644 index 0000000000..c7919482f6 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ufispace/s9300-32d/sonic_platform/sfp.py @@ -0,0 +1,31 @@ +#!/usr/bin/env python + +try: + from sonic_platform_pddf_base.pddf_sfp import PddfSfp +except ImportError as e: + raise ImportError (str(e) + "- required module not found") + + +class Sfp(PddfSfp): + """ + PDDF Platform-Specific Sfp class + """ + + def __init__(self, index, pddf_data=None, pddf_plugin_data=None): + PddfSfp.__init__(self, index, pddf_data, pddf_plugin_data) + self.index = index + + # Provide the functions/variables below for which implementation is to be overwritten + + def get_error_description(self): + """ + Retrives the error descriptions of the SFP module + Returns: + String that represents the current error descriptions of vendor specific errors + In case there are multiple errors, they should be joined by '|', + like: "Bad EEPROM|Unsupported cable" + """ + if not self.get_presence(): + return self.SFP_STATUS_UNPLUGGED + + return self.SFP_STATUS_OK diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s9300-32d/sonic_platform/thermal.py b/platform/broadcom/sonic-platform-modules-ufispace/s9300-32d/sonic_platform/thermal.py new file mode 100644 index 0000000000..77d6ec7ae8 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ufispace/s9300-32d/sonic_platform/thermal.py @@ -0,0 +1,17 @@ +#!/usr/bin/env python + + +try: + from sonic_platform_pddf_base.pddf_thermal import PddfThermal +except ImportError as e: + raise ImportError(str(e) + "- required module not found") + + + +class Thermal(PddfThermal): + """PDDF Platform-Specific Thermal class""" + + def __init__(self, index, pddf_data=None, pddf_plugin_data=None, is_psu_thermal=False, psu_index=0): + PddfThermal.__init__(self, index, pddf_data, pddf_plugin_data, is_psu_thermal, psu_index) + + # Provide the functions/variables below for which implementation is to be overwritten diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s9300-32d/sonic_platform_setup.py b/platform/broadcom/sonic-platform-modules-ufispace/s9300-32d/sonic_platform_setup.py new file mode 100644 index 0000000000..3661c84a0c --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ufispace/s9300-32d/sonic_platform_setup.py @@ -0,0 +1,27 @@ +from setuptools import setup + +setup( + name='sonic-platform', + version='1.0', + description='SONiC platform API implementation on ufispace platform', + license='Apache 2.0', + author='SONiC Team', + author_email='linuxnetdev@microsoft.com', + url='https://github.com/Azure/sonic-buildimage', + maintainer='Leo Lin', + maintainer_email='leo.yt.lin@ufispace.com', + packages=['sonic_platform'], + classifiers=[ + 'Development Status :: 3 - Alpha', + 'Environment :: Plugins', + 'Intended Audience :: Developers', + 'Intended Audience :: Information Technology', + 'Intended Audience :: System Administrators', + 'License :: OSI Approved :: Apache Software License', + 'Natural Language :: English', + 'Operating System :: POSIX :: Linux', + 'Programming Language :: Python :: 3.7', + 'Topic :: Utilities', + ], + keywords='sonic SONiC platform PLATFORM', +) diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s9300-32d/utils/pddf_post_device_create.sh b/platform/broadcom/sonic-platform-modules-ufispace/s9300-32d/utils/pddf_post_device_create.sh new file mode 100755 index 0000000000..e4de7ae366 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ufispace/s9300-32d/utils/pddf_post_device_create.sh @@ -0,0 +1,6 @@ +#!/bin/bash +#disable bmc watchdog +timeout 3 ipmitool mc watchdog off + +echo 1 > /sys/kernel/pddf/devices/sysstatus/sysstatus_data/port_led_clr_ctrl +echo "PDDF device post-create completed" diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s9300-32d/utils/pddf_post_driver_install.sh b/platform/broadcom/sonic-platform-modules-ufispace/s9300-32d/utils/pddf_post_driver_install.sh new file mode 100755 index 0000000000..ed2559977e --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ufispace/s9300-32d/utils/pddf_post_driver_install.sh @@ -0,0 +1,2 @@ +#!/bin/bash +echo "PDDF driver post-install completed" diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s9300-32d/utils/pddf_switch_svc.py b/platform/broadcom/sonic-platform-modules-ufispace/s9300-32d/utils/pddf_switch_svc.py new file mode 100755 index 0000000000..0a226ae66a --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ufispace/s9300-32d/utils/pddf_switch_svc.py @@ -0,0 +1,86 @@ +#!/usr/bin/env python +# Script to stop and start the respective platforms default services. +# This will be used while switching the pddf->non-pddf mode and vice versa +import commands + +def check_pddf_support(): + return True + +def stop_platform_svc(): + + ''' + status, output = commands.getstatusoutput("systemctl stop s9300-32d-platform-monitor-fan.service") + if status: + print "Stop s9300-32d-platform-fan.service failed %d"%status + return False + + status, output = commands.getstatusoutput("systemctl stop s9300-32d-platform-monitor-psu.service") + if status: + print "Stop s9300-32d-platform-psu.service failed %d"%status + return False + + status, output = commands.getstatusoutput("systemctl stop s9300-32d-platform-monitor.service") + if status: + print "Stop s9300-32d-platform-init.service failed %d"%status + return False + status, output = commands.getstatusoutput("systemctl disable s9300-32d-platform-monitor.service") + if status: + print "Disable s9300-32d-platform-monitor.service failed %d"%status + return False + ''' + + status, output = commands.getstatusoutput("/usr/local/bin/platform_utility.py deinit") + if status: + print "platform_utility.py deinit command failed %d"%status + return False + + # HACK , stop the pddf-platform-init service if it is active + status, output = commands.getstatusoutput("systemctl stop pddf-platform-init.service") + if status: + print "Stop pddf-platform-init.service along with other platform serives failed %d"%status + return False + + return True + +def start_platform_svc(): + + status, output = commands.getstatusoutput("/usr/local/bin/platform_utility.py init") + if status: + print "platform_utility.py init command failed %d"%status + return False + + ''' + status, output = commands.getstatusoutput("systemctl enable s9300-32d-platform-monitor.service") + if status: + print "Enable s9300-32d-platform-monitor.service failed %d"%status + return False + status, output = commands.getstatusoutput("systemctl start s9300-32d-platform-monitor-fan.service") + if status: + print "Start s9300-32d-platform-monitor-fan.service failed %d"%status + return False + + status, output = commands.getstatusoutput("systemctl start s9300-32d-platform-monitor-psu.service") + if status: + print "Start s9300-32d-platform-monitor-psu.service failed %d"%status + return False + ''' + return True + +def start_platform_pddf(): + + status, output = commands.getstatusoutput("systemctl start pddf-platform-init.service") + if status: + print "Start pddf-platform-init.service failed %d"%status + return False + + return True + +def stop_platform_pddf(): + + status, output = commands.getstatusoutput("systemctl stop pddf-platform-init.service") + if status: + print "Stop pddf-platform-init.service failed %d"%status + return False + + return True + diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s9301-32d/modules/Makefile b/platform/broadcom/sonic-platform-modules-ufispace/s9301-32d/modules/Makefile new file mode 100644 index 0000000000..0f44e14f03 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ufispace/s9301-32d/modules/Makefile @@ -0,0 +1,6 @@ + +MODULE_NAME = x86-64-ufispace-s9301-32d-cpld.o x86-64-ufispace-s9301-32d-sys-eeprom.o x86-64-ufispace-s9301-32d-lpc.o pddf_custom_sysstatus_module.o +obj-m := $(MODULE_NAME) + +CFLAGS_pddf_custom_sysstatus_module.o := -I$(M)/../../../../pddf/i2c/modules/include +KBUILD_EXTRA_SYMBOLS := $(M)/../../../../pddf/i2c/Module.symvers.PDDF diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s9301-32d/modules/pddf_custom_sysstatus_module.c b/platform/broadcom/sonic-platform-modules-ufispace/s9301-32d/modules/pddf_custom_sysstatus_module.c new file mode 100644 index 0000000000..40db6aba66 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ufispace/s9301-32d/modules/pddf_custom_sysstatus_module.c @@ -0,0 +1,266 @@ +/* + * Copyright 2019 Broadcom. + * The term Broadcom refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * + * A pddf kernel module for system status registers + */ + +#define __STDC_WANT_LIB_EXT1__ 1 +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include "../../../../pddf/i2c/modules/include/pddf_client_defs.h" +#include "../../../../pddf/i2c/modules/include/pddf_sysstatus_defs.h" + +#define _memset(s, c, n) memset(s, c, n) + +SYSSTATUS_DATA sysstatus_data = {0}; + +extern int board_i2c_cpld_read(unsigned short cpld_addr, u8 reg); +extern int board_i2c_cpld_write(unsigned short cpld_addr, u8 reg, u8 value); + +static ssize_t do_attr_operation(struct device *dev, struct device_attribute *da, const char *buf, size_t count); +ssize_t show_sysstatus_data(struct device *dev, struct device_attribute *da, char *buf); +ssize_t store_sysstatus_data(struct device *dev, struct device_attribute *da, const char *buf, size_t count); + + +PDDF_DATA_ATTR(attr_name, S_IWUSR|S_IRUGO, show_pddf_data, store_pddf_data, PDDF_CHAR, 32, + (void*)&sysstatus_data.sysstatus_addr_attr.aname, NULL); +PDDF_DATA_ATTR(attr_devaddr, S_IWUSR|S_IRUGO, show_pddf_data, store_pddf_data, PDDF_UINT32, + sizeof(uint32_t), (void*)&sysstatus_data.sysstatus_addr_attr.devaddr , NULL); +PDDF_DATA_ATTR(attr_offset, S_IWUSR|S_IRUGO, show_pddf_data, store_pddf_data, PDDF_UINT32, + sizeof(uint32_t), (void*)&sysstatus_data.sysstatus_addr_attr.offset, NULL); +PDDF_DATA_ATTR(attr_mask, S_IWUSR|S_IRUGO, show_pddf_data, store_pddf_data, PDDF_UINT32, + sizeof(uint32_t), (void*)&sysstatus_data.sysstatus_addr_attr.mask , NULL); +PDDF_DATA_ATTR(attr_len, S_IWUSR|S_IRUGO, show_pddf_data, store_pddf_data, PDDF_UINT32, + sizeof(uint32_t), (void*)&sysstatus_data.sysstatus_addr_attr.len , NULL); +PDDF_DATA_ATTR(attr_ops, S_IWUSR, NULL, do_attr_operation, PDDF_CHAR, 8, (void*)&sysstatus_data, NULL); + + + +static struct attribute *sysstatus_addr_attributes[] = { + &attr_attr_name.dev_attr.attr, + &attr_attr_devaddr.dev_attr.attr, + &attr_attr_offset.dev_attr.attr, + &attr_attr_mask.dev_attr.attr, + &attr_attr_len.dev_attr.attr, + &attr_attr_ops.dev_attr.attr, + NULL +}; + +PDDF_DATA_ATTR(board_info, S_IRUGO, show_sysstatus_data, NULL, PDDF_UCHAR, sizeof(u8), NULL, NULL); +PDDF_DATA_ATTR(cpld1_version, S_IRUGO, show_sysstatus_data, NULL, PDDF_UCHAR, sizeof(u8), NULL, NULL); +PDDF_DATA_ATTR(cpld2_version, S_IRUGO, show_sysstatus_data, NULL, PDDF_UCHAR, sizeof(u8), NULL, NULL); +PDDF_DATA_ATTR(cpld3_version, S_IRUGO, show_sysstatus_data, NULL, PDDF_UCHAR, sizeof(u8), NULL, NULL); +PDDF_DATA_ATTR(mac_reset, S_IWUSR|S_IRUGO, show_sysstatus_data, store_sysstatus_data, PDDF_UCHAR, sizeof(u8), NULL, NULL); +PDDF_DATA_ATTR(mux_reset, S_IWUSR|S_IRUGO, show_sysstatus_data, store_sysstatus_data, PDDF_UCHAR, sizeof(u8), NULL, NULL); +PDDF_DATA_ATTR(psu_status, S_IRUGO, show_sysstatus_data, NULL, PDDF_UCHAR, sizeof(u8), NULL, NULL); +PDDF_DATA_ATTR(system_led_0, S_IRUGO, show_sysstatus_data, NULL, PDDF_UCHAR, sizeof(u8), NULL, NULL); +PDDF_DATA_ATTR(system_led_1, S_IRUGO, show_sysstatus_data, NULL, PDDF_UCHAR, sizeof(u8), NULL, NULL); +PDDF_DATA_ATTR(beacon_led, S_IWUSR|S_IRUGO, show_sysstatus_data, store_sysstatus_data, PDDF_UCHAR, sizeof(u8), NULL, NULL); +PDDF_DATA_ATTR(port_led_clr_ctrl, S_IWUSR|S_IRUGO, show_sysstatus_data, store_sysstatus_data, PDDF_UCHAR, sizeof(u8), NULL, NULL); + +static struct attribute *sysstatus_data_attributes[] = { + &attr_board_info.dev_attr.attr, + &attr_cpld1_version.dev_attr.attr, + &attr_cpld2_version.dev_attr.attr, + &attr_cpld3_version.dev_attr.attr, + &attr_mac_reset.dev_attr.attr, + &attr_mux_reset.dev_attr.attr, + &attr_psu_status.dev_attr.attr, + &attr_system_led_0.dev_attr.attr, + &attr_system_led_1.dev_attr.attr, + &attr_beacon_led.dev_attr.attr, + &attr_port_led_clr_ctrl.dev_attr.attr, + NULL +}; + + +static const struct attribute_group pddf_sysstatus_addr_group = { + .attrs = sysstatus_addr_attributes, +}; + + +static const struct attribute_group pddf_sysstatus_data_group = { + .attrs = sysstatus_data_attributes, +}; + + +static struct kobject *sysstatus_addr_kobj; +static struct kobject *sysstatus_data_kobj; + + + +ssize_t show_sysstatus_data(struct device *dev, struct device_attribute *da, char *buf) +{ + + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + + SYSSTATUS_DATA *data = &sysstatus_data; + struct SYSSTATUS_ADDR_ATTR *sysstatus_addr_attrs = NULL; + int i, status ; + + + for (i=0;isysstatus_addr_attrs[i].aname, attr->dev_attr.attr.name) == 0 ) + { + sysstatus_addr_attrs = &data->sysstatus_addr_attrs[i]; + + } + } + + if (sysstatus_addr_attrs==NULL ) + { + printk(KERN_DEBUG "%s is not supported attribute for this client\n",attr->dev_attr.attr.name); + status = 0; + } + else + { + status = board_i2c_cpld_read( sysstatus_addr_attrs->devaddr, sysstatus_addr_attrs->offset); + } + + return sprintf(buf, "0x%x\n", (status&sysstatus_addr_attrs->mask)); + +} + +ssize_t store_sysstatus_data(struct device *dev, struct device_attribute *da, const char *buf, size_t count) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + + SYSSTATUS_DATA *data = &sysstatus_data; + struct SYSSTATUS_ADDR_ATTR *sysstatus_addr_attrs = NULL; + int i, status ; + u8 reg_val; + + for (i=0;isysstatus_addr_attrs[i].aname, attr->dev_attr.attr.name) == 0 ) + { + sysstatus_addr_attrs = &data->sysstatus_addr_attrs[i]; + } + } + + if (sysstatus_addr_attrs==NULL) + { + printk(KERN_DEBUG "%s is not supported attribute for this client\n",attr->dev_attr.attr.name); + return -EINVAL; + } + else + { + if (kstrtou8(buf, 0, ®_val) < 0) + return -EINVAL; + + status = board_i2c_cpld_write(sysstatus_addr_attrs->devaddr, sysstatus_addr_attrs->offset, reg_val); + + if (status!=0) + { + printk(KERN_DEBUG "store_sysstatus_data() %s failed, status=%d\n",data->sysstatus_addr_attrs[i].aname, status); + return status; + } + } + + return count; +} + + + +static ssize_t do_attr_operation(struct device *dev, struct device_attribute *da, const char *buf, size_t count) +{ + PDDF_ATTR *ptr = (PDDF_ATTR *)da; + SYSSTATUS_DATA *pdata = (SYSSTATUS_DATA *)(ptr->addr); + + pdata->sysstatus_addr_attrs[pdata->len] = pdata->sysstatus_addr_attr; + pdata->len++; + pddf_dbg(SYSSTATUS, KERN_ERR "%s: Populating the data for %s\n", __FUNCTION__, pdata->sysstatus_addr_attr.aname); +#ifdef __STDC_LIB_EXT1__ + memset_s(&pdata->sysstatus_addr_attr, sizeof(pdata->sysstatus_addr_attr), 0, sizeof(pdata->sysstatus_addr_attr)); +#else + _memset(&pdata->sysstatus_addr_attr, 0, sizeof(pdata->sysstatus_addr_attr)); +#endif + + return count; +} + + + + +int __init sysstatus_data_init(void) +{ + struct kobject *device_kobj; + int ret = 0; + + + pddf_dbg(SYSSTATUS, "PDDF SYSSTATUS MODULE.. init\n"); + + device_kobj = get_device_i2c_kobj(); + if(!device_kobj) + return -ENOMEM; + + sysstatus_addr_kobj = kobject_create_and_add("sysstatus", device_kobj); + if(!sysstatus_addr_kobj) + return -ENOMEM; + + sysstatus_data_kobj = kobject_create_and_add("sysstatus_data", sysstatus_addr_kobj); + if(!sysstatus_data_kobj) + return -ENOMEM; + + + ret = sysfs_create_group(sysstatus_addr_kobj, &pddf_sysstatus_addr_group); + if (ret) + { + kobject_put(sysstatus_addr_kobj); + return ret; + } + + ret = sysfs_create_group(sysstatus_data_kobj, &pddf_sysstatus_data_group); + if (ret) + { + sysfs_remove_group(sysstatus_addr_kobj, &pddf_sysstatus_addr_group); + kobject_put(sysstatus_data_kobj); + kobject_put(sysstatus_addr_kobj); + return ret; + } + + + return ret; +} + +void __exit sysstatus_data_exit(void) +{ + pddf_dbg(SYSSTATUS, "PDDF SYSSTATUS MODULE.. exit\n"); + sysfs_remove_group(sysstatus_data_kobj, &pddf_sysstatus_data_group); + sysfs_remove_group(sysstatus_addr_kobj, &pddf_sysstatus_addr_group); + kobject_put(sysstatus_data_kobj); + kobject_put(sysstatus_addr_kobj); + pddf_dbg(SYSSTATUS, KERN_ERR "%s: Removed the kobjects for 'SYSSTATUS'\n",__FUNCTION__); + return; +} + +module_init(sysstatus_data_init); +module_exit(sysstatus_data_exit); + +MODULE_AUTHOR("Broadcom"); +MODULE_DESCRIPTION("SYSSTATUS platform data"); +MODULE_LICENSE("GPL"); diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s9301-32d/modules/x86-64-ufispace-s9301-32d-cpld.c b/platform/broadcom/sonic-platform-modules-ufispace/s9301-32d/modules/x86-64-ufispace-s9301-32d-cpld.c new file mode 100644 index 0000000000..a0972df8bd --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ufispace/s9301-32d/modules/x86-64-ufispace-s9301-32d-cpld.c @@ -0,0 +1,1646 @@ +/* + * A i2c cpld driver for the ufispace_s9301_32d + * + * Copyright (C) 2017-2019 UfiSpace Technology Corporation. + * Jason Tsai + * + * Based on ad7414.c + * Copyright 2006 Stefan Roese , DENX Software Engineering + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. + */ +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include "x86-64-ufispace-s9301-32d-cpld.h" + +#ifdef DEBUG +#define DEBUG_PRINT(fmt, args...) \ + printk(KERN_INFO "%s:%s[%d]: " fmt "\r\n", \ + __FILE__, __func__, __LINE__, ##args) +#else +#define DEBUG_PRINT(fmt, args...) +#endif + +#define BSP_LOG_R(fmt, args...) \ + _bsp_log (LOG_READ, KERN_INFO "%s:%s[%d]: " fmt "\r\n", \ + __FILE__, __func__, __LINE__, ##args) +#define BSP_LOG_W(fmt, args...) \ + _bsp_log (LOG_WRITE, KERN_INFO "%s:%s[%d]: " fmt "\r\n", \ + __FILE__, __func__, __LINE__, ##args) + +#define I2C_READ_BYTE_DATA(ret, lock, i2c_client, reg) \ +{ \ + mutex_lock(lock); \ + ret = i2c_smbus_read_byte_data(i2c_client, reg); \ + mutex_unlock(lock); \ + BSP_LOG_R("cpld[%d], reg=0x%03x, reg_val=0x%02x", data->index, reg, ret); \ +} +#define I2C_WRITE_BYTE_DATA(ret, lock, i2c_client, reg, val) \ +{ \ + mutex_lock(lock); \ + ret = i2c_smbus_write_byte_data(i2c_client, reg, val); \ + mutex_unlock(lock); \ + BSP_LOG_W("cpld[%d], reg=0x%03x, reg_val=0x%02x", data->index, reg, val); \ +} + +/* CPLD sysfs attributes index */ +enum s9301_cpld_sysfs_attributes { + /* CPLD1 */ + CPLD_ACCESS_REG, + CPLD_REGISTER_VAL, + CPLD_SKU_ID, + CPLD_HW_REV, + CPLD_DEPH_REV, + CPLD_BUILD_REV, + CPLD_ID_TYPE, + CPLD_MAJOR_VER, + CPLD_MINOR_VER, + CPLD_BUILD_VER, + CPLD_VERION_H, + CPLD_ID, + CPLD_MAC_INTR, + CPLD_10G_PHY_INTR, + CPLD_CPLD_FRU_INTR, + CPLD_THERMAL_ALERT_INTR, + CPLD_MISC_INTR, + CPLD_SYSTEM_INTR, + CPLD_MAC_INTR_MASK, + CPLD_10G_PHY_INTR_MASK, + CPLD_CPLD_FRU_INTR_MASK, + CPLD_THERMAL_ALERT_INTR_MASK, + CPLD_MISC_INTR_MASK, + CPLD_MAC_INTR_EVENT, + CPLD_10G_PHY_INTR_EVENT, + CPLD_CPLD_FRU_INTR_EVENT, + CPLD_THERMAL_ALERT_INTR_EVENT, + CPLD_MISC_INTR_EVENT, + CPLD_MAC_RST, + CPLD_10G_PHY_RST, + CPLD_BMC_RST, + CPLD_USB_RST, + CPLD_MUX_RST, + CPLD_MISC_RST, + CPLD_BMC_WATCHDOG, + CPLD_DAU_BD_PRES, + CPLD_PSU_STATUS, + CPLD_SYS_PW_STATUS, + CPLD_MISC, + CPLD_MUX_CTRL, + CPLD_MAC_QSFP_SEL_CTRL, + CPLD_SYS_LED_CTRL_1, + CPLD_SYS_LED_CTRL_2, + CPLD_BEACON_LED_CTRL, + CPLD_PORT_LED_CLR_CTRL, + CPLD_EVENT_DETECT_CTRL, + /* CPLD2 */ + CPLD_QSFPDD_MOD_INT_G0, + CPLD_QSFPDD_MOD_INT_G1, + CPLD_QSFPDD_MOD_INT_G2, + CPLD_QSFPDD_MOD_INT_G3, + CPLD_QSFPDD_PRES_G0, + CPLD_QSFPDD_PRES_G1, + CPLD_QSFPDD_PRES_G2, + CPLD_QSFPDD_PRES_G3, + CPLD_QSFPDD_FUSE_INT_G0, + CPLD_QSFPDD_FUSE_INT_G1, + CPLD_QSFPDD_FUSE_INT_G2, + CPLD_QSFPDD_FUSE_INT_G3, + CPLD_SFP_TXFAULT, + CPLD_SFP_ABS, + CPLD_SFP_RXLOS, + CPLD_QSFPDD_MOD_INT_MASK_G0, + CPLD_QSFPDD_MOD_INT_MASK_G1, + CPLD_QSFPDD_MOD_INT_MASK_G2, + CPLD_QSFPDD_MOD_INT_MASK_G3, + CPLD_QSFPDD_PRES_MASK_G0, + CPLD_QSFPDD_PRES_MASK_G1, + CPLD_QSFPDD_PRES_MASK_G2, + CPLD_QSFPDD_PRES_MASK_G3, + CPLD_QSFPDD_FUSE_INT_MASK_G0, + CPLD_QSFPDD_FUSE_INT_MASK_G1, + CPLD_QSFPDD_FUSE_INT_MASK_G2, + CPLD_QSFPDD_FUSE_INT_MASK_G3, + CPLD_SFP_TXFAULT_MASK, + CPLD_SFP_ABS_MASK, + CPLD_SFP_RXLOS_MASK, + CPLD_QSFPDD_MOD_INT_EVENT_G0, + CPLD_QSFPDD_MOD_INT_EVENT_G1, + CPLD_QSFPDD_MOD_INT_EVENT_G2, + CPLD_QSFPDD_MOD_INT_EVENT_G3, + CPLD_QSFPDD_PRES_EVENT_G0, + CPLD_QSFPDD_PRES_EVENT_G1, + CPLD_QSFPDD_PRES_EVENT_G2, + CPLD_QSFPDD_PRES_EVENT_G3, + CPLD_QSFPDD_FUSE_INT_EVENT_G0, + CPLD_QSFPDD_FUSE_INT_EVENT_G1, + CPLD_QSFPDD_FUSE_INT_EVENT_G2, + CPLD_QSFPDD_FUSE_INT_EVENT_G3, + CPLD_SFP_TXFAULT_EVENT, + CPLD_SFP_ABS_EVENT, + CPLD_SFP_RXLOS_EVENT, + CPLD_QSFPDD_RESET_CTRL_G0, + CPLD_QSFPDD_RESET_CTRL_G1, + CPLD_QSFPDD_RESET_CTRL_G2, + CPLD_QSFPDD_RESET_CTRL_G3, + CPLD_QSFPDD_LP_MODE_G0, + CPLD_QSFPDD_LP_MODE_G1, + CPLD_QSFPDD_LP_MODE_G2, + CPLD_QSFPDD_LP_MODE_G3, + CPLD_SFP_TX_DIS, + CPLD_SFP_RS, + CPLD_SFP_TS, + CPLD_PORT_INT_STATUS, + + //BSP DEBUG + BSP_DEBUG +}; + +enum bsp_log_types { + LOG_NONE, + LOG_RW, + LOG_READ, + LOG_WRITE +}; + +enum bsp_log_ctrl { + LOG_DISABLE, + LOG_ENABLE +}; + +/* CPLD sysfs attributes hook functions */ +static ssize_t read_access_register(struct device *dev, + struct device_attribute *da, char *buf); +static ssize_t write_access_register(struct device *dev, + struct device_attribute *da, const char *buf, size_t count); +static ssize_t read_register_value(struct device *dev, + struct device_attribute *da, char *buf); +static ssize_t write_register_value(struct device *dev, + struct device_attribute *da, const char *buf, size_t count); +static ssize_t read_hw_rev_cb(struct device *dev, + struct device_attribute *da, char *buf); +static ssize_t read_cpld_version_cb(struct device *dev, + struct device_attribute *da, char *buf); +static ssize_t read_cpld_callback(struct device *dev, + struct device_attribute *da, char *buf); +static ssize_t write_cpld_callback(struct device *dev, + struct device_attribute *da, const char *buf, size_t count); +static ssize_t read_cpld_version_h_cb(struct device *dev, + struct device_attribute *da, char *buf); +// cpld access api +static ssize_t read_cpld_reg(struct device *dev, char *buf, u8 reg); +static ssize_t write_cpld_reg(struct device *dev, const char *buf, size_t count, u8 reg); +static bool read_cpld_reg_raw_byte(struct device *dev, u8 reg, u8 *val, int *errno); +static bool read_cpld_reg_raw_int(struct device *dev, u8 reg, int *val); +// bsp debug api +static ssize_t read_bsp(char *buf, char *str); +static ssize_t write_bsp(const char *buf, char *str, size_t str_len, size_t count); +static ssize_t read_bsp_callback(struct device *dev, + struct device_attribute *da, char *buf); +static ssize_t write_bsp_callback(struct device *dev, + struct device_attribute *da, const char *buf, size_t count); + +static LIST_HEAD(cpld_client_list); /* client list for cpld */ +static struct mutex list_lock; /* mutex for client list */ + +struct cpld_client_node { + struct i2c_client *client; + struct list_head list; +}; + +struct cpld_data { + int index; /* CPLD index */ + struct mutex access_lock; /* mutex for cpld access */ + u8 access_reg; /* register to access */ +}; + +/* CPLD device id and data */ +static const struct i2c_device_id s9301_cpld_id[] = { + { "s9301_32d_cpld1", cpld1 }, + { "s9301_32d_cpld2", cpld2 }, + { "s9301_32d_cpld3", cpld3 }, + {} +}; + +char bsp_debug[2]="0"; +u8 enable_log_read=LOG_DISABLE; +u8 enable_log_write=LOG_DISABLE; + +/* Addresses scanned for s9301_cpld */ +static const unsigned short cpld_i2c_addr[] = { 0x30, 0x31, 0x32, I2C_CLIENT_END }; + +/* define all support register access of cpld in attribute */ +/* CPLD1 */ +static SENSOR_DEVICE_ATTR(cpld_access_register, S_IWUSR | S_IRUGO, \ + read_access_register, write_access_register, CPLD_ACCESS_REG); +static SENSOR_DEVICE_ATTR(cpld_register_value, S_IWUSR | S_IRUGO, \ + read_register_value, write_register_value, CPLD_REGISTER_VAL); +static SENSOR_DEVICE_ATTR(cpld_sku_id, S_IRUGO, \ + read_cpld_callback, NULL, CPLD_SKU_ID); +static SENSOR_DEVICE_ATTR(cpld_hw_rev, S_IRUGO, \ + read_hw_rev_cb, NULL, CPLD_HW_REV); +static SENSOR_DEVICE_ATTR(cpld_deph_rev, S_IRUGO, \ + read_hw_rev_cb, NULL, CPLD_DEPH_REV); +static SENSOR_DEVICE_ATTR(cpld_build_rev, S_IRUGO, \ + read_hw_rev_cb, NULL, CPLD_BUILD_REV); +static SENSOR_DEVICE_ATTR(cpld_id_type, S_IRUGO, \ + read_hw_rev_cb, NULL, CPLD_ID_TYPE); +static SENSOR_DEVICE_ATTR(cpld_major_ver, S_IRUGO, \ + read_cpld_version_cb, NULL, CPLD_MAJOR_VER); +static SENSOR_DEVICE_ATTR(cpld_minor_ver, S_IRUGO, \ + read_cpld_version_cb, NULL, CPLD_MINOR_VER); +static SENSOR_DEVICE_ATTR(cpld_build_ver, S_IRUGO, \ + read_cpld_callback, NULL, CPLD_BUILD_VER); +static SENSOR_DEVICE_ATTR(cpld_version_h, S_IRUGO, \ + read_cpld_version_h_cb, NULL, CPLD_VERION_H); +static SENSOR_DEVICE_ATTR(cpld_id, S_IRUGO, \ + read_cpld_callback, NULL, CPLD_ID); +static SENSOR_DEVICE_ATTR(cpld_mac_intr, S_IRUGO, \ + read_cpld_callback, NULL, CPLD_MAC_INTR); +static SENSOR_DEVICE_ATTR(cpld_10g_phy_intr, S_IRUGO, \ + read_cpld_callback, NULL, CPLD_10G_PHY_INTR); +static SENSOR_DEVICE_ATTR(cpld_cpld_fru_intr, S_IRUGO, \ + read_cpld_callback, NULL, CPLD_CPLD_FRU_INTR); +static SENSOR_DEVICE_ATTR(cpld_thermal_alert_intr, S_IRUGO, \ + read_cpld_callback, NULL, CPLD_THERMAL_ALERT_INTR); +static SENSOR_DEVICE_ATTR(cpld_misc_intr, S_IRUGO, \ + read_cpld_callback, NULL, CPLD_MISC_INTR); +static SENSOR_DEVICE_ATTR(cpld_system_intr, S_IRUGO, \ + read_cpld_callback, NULL, CPLD_SYSTEM_INTR); +static SENSOR_DEVICE_ATTR(cpld_mac_intr_mask, S_IWUSR | S_IRUGO, \ + read_cpld_callback, write_cpld_callback, CPLD_MAC_INTR_MASK); +static SENSOR_DEVICE_ATTR(cpld_10g_phy_intr_mask, S_IWUSR | S_IRUGO, \ + read_cpld_callback, write_cpld_callback, CPLD_10G_PHY_INTR_MASK); +static SENSOR_DEVICE_ATTR(cpld_cpld_fru_intr_mask, S_IWUSR | S_IRUGO, \ + read_cpld_callback, write_cpld_callback, CPLD_CPLD_FRU_INTR_MASK); +static SENSOR_DEVICE_ATTR(cpld_thermal_alert_intr_mask, S_IWUSR | S_IRUGO, \ + read_cpld_callback, write_cpld_callback, CPLD_THERMAL_ALERT_INTR_MASK); +static SENSOR_DEVICE_ATTR(cpld_misc_intr_mask, S_IWUSR | S_IRUGO, \ + read_cpld_callback, write_cpld_callback, CPLD_MISC_INTR_MASK); +static SENSOR_DEVICE_ATTR(cpld_mac_intr_event, S_IRUGO, \ + read_cpld_callback, NULL, CPLD_MAC_INTR_EVENT); +static SENSOR_DEVICE_ATTR(cpld_10g_phy_intr_event, S_IRUGO, \ + read_cpld_callback, NULL, CPLD_10G_PHY_INTR_EVENT); +static SENSOR_DEVICE_ATTR(cpld_cpld_fru_intr_event, S_IRUGO, \ + read_cpld_callback, NULL, CPLD_CPLD_FRU_INTR_EVENT); +static SENSOR_DEVICE_ATTR(cpld_thermal_alert_intr_event, S_IRUGO, \ + read_cpld_callback, NULL, CPLD_THERMAL_ALERT_INTR_EVENT); +static SENSOR_DEVICE_ATTR(cpld_misc_intr_event, S_IRUGO, \ + read_cpld_callback, NULL, CPLD_MISC_INTR_EVENT); +static SENSOR_DEVICE_ATTR(cpld_mac_rst, S_IWUSR | S_IRUGO, \ + read_cpld_callback, write_cpld_callback, CPLD_MAC_RST); +static SENSOR_DEVICE_ATTR(cpld_10g_phy_rst, S_IWUSR | S_IRUGO, \ + read_cpld_callback, write_cpld_callback, CPLD_10G_PHY_RST); +static SENSOR_DEVICE_ATTR(cpld_bmc_rst, S_IWUSR | S_IRUGO, \ + read_cpld_callback, write_cpld_callback, CPLD_BMC_RST); +static SENSOR_DEVICE_ATTR(cpld_usb_rst, S_IWUSR | S_IRUGO, \ + read_cpld_callback, write_cpld_callback, CPLD_USB_RST); +static SENSOR_DEVICE_ATTR(cpld_mux_rst, S_IWUSR | S_IRUGO, \ + read_cpld_callback, write_cpld_callback, CPLD_MUX_RST); +static SENSOR_DEVICE_ATTR(cpld_misc_rst, S_IWUSR | S_IRUGO, \ + read_cpld_callback, write_cpld_callback, CPLD_MISC_RST); +static SENSOR_DEVICE_ATTR(cpld_bmc_watchdog, S_IWUSR | S_IRUGO, \ + read_cpld_callback, write_cpld_callback, CPLD_BMC_WATCHDOG); +static SENSOR_DEVICE_ATTR(cpld_dau_bd_pres, S_IRUGO, \ + read_cpld_callback, NULL, CPLD_DAU_BD_PRES); +static SENSOR_DEVICE_ATTR(cpld_psu_status, S_IRUGO, \ + read_cpld_callback, NULL, CPLD_PSU_STATUS); +static SENSOR_DEVICE_ATTR(cpld_sys_pw_status, S_IRUGO, \ + read_cpld_callback, NULL, CPLD_SYS_PW_STATUS); +static SENSOR_DEVICE_ATTR(cpld_misc, S_IRUGO, \ + read_cpld_callback, NULL, CPLD_MISC); +static SENSOR_DEVICE_ATTR(cpld_mux_ctrl, S_IWUSR | S_IRUGO, \ + read_cpld_callback, write_cpld_callback, CPLD_MUX_CTRL); +static SENSOR_DEVICE_ATTR(cpld_mac_qsfp_sel_ctrl, S_IWUSR | S_IRUGO, \ + read_cpld_callback, write_cpld_callback, CPLD_MAC_QSFP_SEL_CTRL); +static SENSOR_DEVICE_ATTR(cpld_sys_led_ctrl_1, S_IRUGO, \ + read_cpld_callback, NULL, CPLD_SYS_LED_CTRL_1); +static SENSOR_DEVICE_ATTR(cpld_sys_led_ctrl_2, S_IRUGO, \ + read_cpld_callback, NULL, CPLD_SYS_LED_CTRL_2); +static SENSOR_DEVICE_ATTR(cpld_beacon_led_ctrl, S_IWUSR | S_IRUGO, \ + read_cpld_callback, write_cpld_callback, CPLD_BEACON_LED_CTRL); +static SENSOR_DEVICE_ATTR(cpld_port_led_clr_ctrl, S_IWUSR | S_IRUGO, \ + read_cpld_callback, write_cpld_callback, CPLD_PORT_LED_CLR_CTRL); +static SENSOR_DEVICE_ATTR(cpld_event_detect_ctrl, S_IWUSR | S_IRUGO, \ + read_cpld_callback, write_cpld_callback, CPLD_EVENT_DETECT_CTRL); +/* CPLD2 */ +static SENSOR_DEVICE_ATTR(cpld_qsfpdd_mod_int_g0, S_IRUGO, \ + read_cpld_callback, NULL, CPLD_QSFPDD_MOD_INT_G0); +static SENSOR_DEVICE_ATTR(cpld_qsfpdd_mod_int_g1, S_IRUGO, \ + read_cpld_callback, NULL, CPLD_QSFPDD_MOD_INT_G1); +static SENSOR_DEVICE_ATTR(cpld_qsfpdd_mod_int_g2, S_IRUGO, \ + read_cpld_callback, NULL, CPLD_QSFPDD_MOD_INT_G2); +static SENSOR_DEVICE_ATTR(cpld_qsfpdd_mod_int_g3, S_IRUGO, \ + read_cpld_callback, NULL, CPLD_QSFPDD_MOD_INT_G3); +static SENSOR_DEVICE_ATTR(cpld_qsfpdd_pres_g0, S_IRUGO, \ + read_cpld_callback, NULL, CPLD_QSFPDD_PRES_G0); +static SENSOR_DEVICE_ATTR(cpld_qsfpdd_pres_g1, S_IRUGO, \ + read_cpld_callback, NULL, CPLD_QSFPDD_PRES_G1); +static SENSOR_DEVICE_ATTR(cpld_qsfpdd_pres_g2, S_IRUGO, \ + read_cpld_callback, NULL, CPLD_QSFPDD_PRES_G2); +static SENSOR_DEVICE_ATTR(cpld_qsfpdd_pres_g3, S_IRUGO, \ + read_cpld_callback, NULL, CPLD_QSFPDD_PRES_G3); +static SENSOR_DEVICE_ATTR(cpld_qsfpdd_fuse_int_g0, S_IRUGO, \ + read_cpld_callback, NULL, CPLD_QSFPDD_FUSE_INT_G0); +static SENSOR_DEVICE_ATTR(cpld_qsfpdd_fuse_int_g1, S_IRUGO, \ + read_cpld_callback, NULL, CPLD_QSFPDD_FUSE_INT_G1); +static SENSOR_DEVICE_ATTR(cpld_qsfpdd_fuse_int_g2, S_IRUGO, \ + read_cpld_callback, NULL, CPLD_QSFPDD_FUSE_INT_G2); +static SENSOR_DEVICE_ATTR(cpld_qsfpdd_fuse_int_g3, S_IRUGO, \ + read_cpld_callback, NULL, CPLD_QSFPDD_FUSE_INT_G3); +static SENSOR_DEVICE_ATTR(cpld_sfp_txfault, S_IRUGO, \ + read_cpld_callback, NULL, CPLD_SFP_TXFAULT); +static SENSOR_DEVICE_ATTR(cpld_sfp_abs, S_IRUGO, \ + read_cpld_callback, NULL, CPLD_SFP_ABS); +static SENSOR_DEVICE_ATTR(cpld_sfp_rxlos, S_IRUGO, \ + read_cpld_callback, NULL, CPLD_SFP_RXLOS); +static SENSOR_DEVICE_ATTR(cpld_qsfpdd_mod_int_mask_g0, S_IWUSR | S_IRUGO, \ + read_cpld_callback, write_cpld_callback, CPLD_QSFPDD_MOD_INT_MASK_G0); +static SENSOR_DEVICE_ATTR(cpld_qsfpdd_mod_int_mask_g1, S_IWUSR | S_IRUGO, \ + read_cpld_callback, write_cpld_callback, CPLD_QSFPDD_MOD_INT_MASK_G1); +static SENSOR_DEVICE_ATTR(cpld_qsfpdd_mod_int_mask_g2, S_IWUSR | S_IRUGO, \ + read_cpld_callback, write_cpld_callback, CPLD_QSFPDD_MOD_INT_MASK_G2); +static SENSOR_DEVICE_ATTR(cpld_qsfpdd_mod_int_mask_g3, S_IWUSR | S_IRUGO, \ + read_cpld_callback, write_cpld_callback, CPLD_QSFPDD_MOD_INT_MASK_G3); +static SENSOR_DEVICE_ATTR(cpld_qsfpdd_pres_mask_g0, S_IWUSR | S_IRUGO, \ + read_cpld_callback, write_cpld_callback, CPLD_QSFPDD_PRES_MASK_G0); +static SENSOR_DEVICE_ATTR(cpld_qsfpdd_pres_mask_g1, S_IWUSR | S_IRUGO, \ + read_cpld_callback, write_cpld_callback, CPLD_QSFPDD_PRES_MASK_G1); +static SENSOR_DEVICE_ATTR(cpld_qsfpdd_pres_mask_g2, S_IWUSR | S_IRUGO, \ + read_cpld_callback, write_cpld_callback, CPLD_QSFPDD_PRES_MASK_G2); +static SENSOR_DEVICE_ATTR(cpld_qsfpdd_pres_mask_g3, S_IWUSR | S_IRUGO, \ + read_cpld_callback, write_cpld_callback, CPLD_QSFPDD_PRES_MASK_G3); +static SENSOR_DEVICE_ATTR(cpld_qsfpdd_fuse_int_mask_g0, S_IWUSR | S_IRUGO, \ + read_cpld_callback, write_cpld_callback, CPLD_QSFPDD_FUSE_INT_MASK_G0); +static SENSOR_DEVICE_ATTR(cpld_qsfpdd_fuse_int_mask_g1, S_IWUSR | S_IRUGO, \ + read_cpld_callback, write_cpld_callback, CPLD_QSFPDD_FUSE_INT_MASK_G1); +static SENSOR_DEVICE_ATTR(cpld_qsfpdd_fuse_int_mask_g2, S_IWUSR | S_IRUGO, \ + read_cpld_callback, write_cpld_callback, CPLD_QSFPDD_FUSE_INT_MASK_G2); +static SENSOR_DEVICE_ATTR(cpld_qsfpdd_fuse_int_mask_g3, S_IWUSR | S_IRUGO, \ + read_cpld_callback, write_cpld_callback, CPLD_QSFPDD_FUSE_INT_MASK_G3); +static SENSOR_DEVICE_ATTR(cpld_sfp_txfault_mask, S_IWUSR | S_IRUGO, \ + read_cpld_callback, write_cpld_callback, CPLD_SFP_TXFAULT_MASK); +static SENSOR_DEVICE_ATTR(cpld_sfp_abs_mask, S_IWUSR | S_IRUGO, \ + read_cpld_callback, write_cpld_callback, CPLD_SFP_ABS_MASK); +static SENSOR_DEVICE_ATTR(cpld_sfp_rxlos_mask, S_IWUSR | S_IRUGO, \ + read_cpld_callback, write_cpld_callback, CPLD_SFP_RXLOS_MASK); +static SENSOR_DEVICE_ATTR(cpld_qsfpdd_mod_int_event_g0, S_IRUGO, \ + read_cpld_callback, NULL, CPLD_QSFPDD_MOD_INT_EVENT_G0); +static SENSOR_DEVICE_ATTR(cpld_qsfpdd_mod_int_event_g1, S_IRUGO, \ + read_cpld_callback, NULL, CPLD_QSFPDD_MOD_INT_EVENT_G1); +static SENSOR_DEVICE_ATTR(cpld_qsfpdd_mod_int_event_g2, S_IRUGO, \ + read_cpld_callback, NULL, CPLD_QSFPDD_MOD_INT_EVENT_G2); +static SENSOR_DEVICE_ATTR(cpld_qsfpdd_mod_int_event_g3, S_IRUGO, \ + read_cpld_callback, NULL, CPLD_QSFPDD_MOD_INT_EVENT_G3); +static SENSOR_DEVICE_ATTR(cpld_qsfpdd_pres_event_g0, S_IRUGO, \ + read_cpld_callback, NULL, CPLD_QSFPDD_PRES_EVENT_G0); +static SENSOR_DEVICE_ATTR(cpld_qsfpdd_pres_event_g1, S_IRUGO, \ + read_cpld_callback, NULL, CPLD_QSFPDD_PRES_EVENT_G1); +static SENSOR_DEVICE_ATTR(cpld_qsfpdd_pres_event_g2, S_IRUGO, \ + read_cpld_callback, NULL, CPLD_QSFPDD_PRES_EVENT_G2); +static SENSOR_DEVICE_ATTR(cpld_qsfpdd_pres_event_g3, S_IRUGO, \ + read_cpld_callback, NULL, CPLD_QSFPDD_PRES_EVENT_G3); +static SENSOR_DEVICE_ATTR(cpld_qsfpdd_fuse_int_event_g0, S_IRUGO, \ + read_cpld_callback, NULL, CPLD_QSFPDD_FUSE_INT_EVENT_G0); +static SENSOR_DEVICE_ATTR(cpld_qsfpdd_fuse_int_event_g1, S_IRUGO, \ + read_cpld_callback, NULL, CPLD_QSFPDD_FUSE_INT_EVENT_G1); +static SENSOR_DEVICE_ATTR(cpld_qsfpdd_fuse_int_event_g2, S_IRUGO, \ + read_cpld_callback, NULL, CPLD_QSFPDD_FUSE_INT_EVENT_G2); +static SENSOR_DEVICE_ATTR(cpld_qsfpdd_fuse_int_event_g3, S_IRUGO, \ + read_cpld_callback, NULL, CPLD_QSFPDD_FUSE_INT_EVENT_G3); +static SENSOR_DEVICE_ATTR(cpld_sfp_txfault_event, S_IRUGO, \ + read_cpld_callback, NULL, CPLD_SFP_TXFAULT_EVENT); +static SENSOR_DEVICE_ATTR(cpld_sfp_abs_event, S_IRUGO, \ + read_cpld_callback, NULL, CPLD_SFP_ABS_EVENT); +static SENSOR_DEVICE_ATTR(cpld_sfp_rxlos_event, S_IRUGO, \ + read_cpld_callback, NULL, CPLD_SFP_RXLOS_EVENT); +static SENSOR_DEVICE_ATTR(cpld_qsfpdd_reset_ctrl_g0, \ + S_IWUSR | S_IRUGO, \ + read_cpld_callback, write_cpld_callback, \ + CPLD_QSFPDD_RESET_CTRL_G0); +static SENSOR_DEVICE_ATTR(cpld_qsfpdd_reset_ctrl_g1, \ + S_IWUSR | S_IRUGO, \ + read_cpld_callback, write_cpld_callback, \ + CPLD_QSFPDD_RESET_CTRL_G1); +static SENSOR_DEVICE_ATTR(cpld_qsfpdd_reset_ctrl_g2, \ + S_IWUSR | S_IRUGO, \ + read_cpld_callback, write_cpld_callback, \ + CPLD_QSFPDD_RESET_CTRL_G2); +static SENSOR_DEVICE_ATTR(cpld_qsfpdd_reset_ctrl_g3, \ + S_IWUSR | S_IRUGO, \ + read_cpld_callback, write_cpld_callback, \ + CPLD_QSFPDD_RESET_CTRL_G3); +static SENSOR_DEVICE_ATTR(cpld_qsfpdd_lp_mode_g0, \ + S_IWUSR | S_IRUGO, \ + read_cpld_callback, write_cpld_callback, \ + CPLD_QSFPDD_LP_MODE_G0); +static SENSOR_DEVICE_ATTR(cpld_qsfpdd_lp_mode_g1, \ + S_IWUSR | S_IRUGO, \ + read_cpld_callback, write_cpld_callback, \ + CPLD_QSFPDD_LP_MODE_G1); +static SENSOR_DEVICE_ATTR(cpld_qsfpdd_lp_mode_g2, \ + S_IWUSR | S_IRUGO, \ + read_cpld_callback, write_cpld_callback, \ + CPLD_QSFPDD_LP_MODE_G2); +static SENSOR_DEVICE_ATTR(cpld_qsfpdd_lp_mode_g3, \ + S_IWUSR | S_IRUGO, \ + read_cpld_callback, write_cpld_callback, \ + CPLD_QSFPDD_LP_MODE_G3); +static SENSOR_DEVICE_ATTR(cpld_sfp_tx_dis, S_IWUSR | S_IRUGO, \ + read_cpld_callback, write_cpld_callback, CPLD_SFP_TX_DIS); +static SENSOR_DEVICE_ATTR(cpld_sfp_rs, S_IWUSR | S_IRUGO, \ + read_cpld_callback, write_cpld_callback, CPLD_SFP_RS); +static SENSOR_DEVICE_ATTR(cpld_sfp_ts, S_IWUSR | S_IRUGO, \ + read_cpld_callback, write_cpld_callback, CPLD_SFP_TS); +static SENSOR_DEVICE_ATTR(cpld_port_int_status, S_IRUGO, \ + read_cpld_callback, NULL, CPLD_PORT_INT_STATUS); +//BSP DEBUG +static SENSOR_DEVICE_ATTR(bsp_debug, S_IRUGO | S_IWUSR, \ + read_bsp_callback, write_bsp_callback, BSP_DEBUG); + +/* define support attributes of cpldx , total 3 */ +/* cpld 1 */ +static struct attribute *s9301_cpld1_attributes[] = { + &sensor_dev_attr_cpld_access_register.dev_attr.attr, + &sensor_dev_attr_cpld_register_value.dev_attr.attr, + &sensor_dev_attr_cpld_sku_id.dev_attr.attr, + &sensor_dev_attr_cpld_hw_rev.dev_attr.attr, + &sensor_dev_attr_cpld_deph_rev.dev_attr.attr, + &sensor_dev_attr_cpld_build_rev.dev_attr.attr, + &sensor_dev_attr_cpld_id_type.dev_attr.attr, + &sensor_dev_attr_cpld_major_ver.dev_attr.attr, + &sensor_dev_attr_cpld_minor_ver.dev_attr.attr, + &sensor_dev_attr_cpld_build_ver.dev_attr.attr, + &sensor_dev_attr_cpld_version_h.dev_attr.attr, + &sensor_dev_attr_cpld_id.dev_attr.attr, + &sensor_dev_attr_cpld_mac_intr.dev_attr.attr, + &sensor_dev_attr_cpld_10g_phy_intr.dev_attr.attr, + &sensor_dev_attr_cpld_cpld_fru_intr.dev_attr.attr, + &sensor_dev_attr_cpld_thermal_alert_intr.dev_attr.attr, + &sensor_dev_attr_cpld_misc_intr.dev_attr.attr, + &sensor_dev_attr_cpld_system_intr.dev_attr.attr, + &sensor_dev_attr_cpld_mac_intr_mask.dev_attr.attr, + &sensor_dev_attr_cpld_10g_phy_intr_mask.dev_attr.attr, + &sensor_dev_attr_cpld_cpld_fru_intr_mask.dev_attr.attr, + &sensor_dev_attr_cpld_thermal_alert_intr_mask.dev_attr.attr, + &sensor_dev_attr_cpld_misc_intr_mask.dev_attr.attr, + &sensor_dev_attr_cpld_mac_intr_event.dev_attr.attr, + &sensor_dev_attr_cpld_10g_phy_intr_event.dev_attr.attr, + &sensor_dev_attr_cpld_cpld_fru_intr_event.dev_attr.attr, + &sensor_dev_attr_cpld_thermal_alert_intr_event.dev_attr.attr, + &sensor_dev_attr_cpld_misc_intr_event.dev_attr.attr, + &sensor_dev_attr_cpld_mac_rst.dev_attr.attr, + &sensor_dev_attr_cpld_10g_phy_rst.dev_attr.attr, + &sensor_dev_attr_cpld_bmc_rst.dev_attr.attr, + &sensor_dev_attr_cpld_usb_rst.dev_attr.attr, + &sensor_dev_attr_cpld_mux_rst.dev_attr.attr, + &sensor_dev_attr_cpld_misc_rst.dev_attr.attr, + &sensor_dev_attr_cpld_bmc_watchdog.dev_attr.attr, + &sensor_dev_attr_cpld_dau_bd_pres.dev_attr.attr, + &sensor_dev_attr_cpld_psu_status.dev_attr.attr, + &sensor_dev_attr_cpld_sys_pw_status.dev_attr.attr, + &sensor_dev_attr_cpld_misc.dev_attr.attr, + &sensor_dev_attr_cpld_mux_ctrl.dev_attr.attr, + &sensor_dev_attr_cpld_mac_qsfp_sel_ctrl.dev_attr.attr, + &sensor_dev_attr_cpld_sys_led_ctrl_1.dev_attr.attr, + &sensor_dev_attr_cpld_sys_led_ctrl_2.dev_attr.attr, + &sensor_dev_attr_cpld_beacon_led_ctrl.dev_attr.attr, + &sensor_dev_attr_cpld_port_led_clr_ctrl.dev_attr.attr, + &sensor_dev_attr_cpld_event_detect_ctrl.dev_attr.attr, + &sensor_dev_attr_bsp_debug.dev_attr.attr, + NULL +}; + +/* cpld 2 */ +static struct attribute *s9301_cpld2_attributes[] = { + &sensor_dev_attr_cpld_access_register.dev_attr.attr, + &sensor_dev_attr_cpld_register_value.dev_attr.attr, + &sensor_dev_attr_cpld_major_ver.dev_attr.attr, + &sensor_dev_attr_cpld_minor_ver.dev_attr.attr, + &sensor_dev_attr_cpld_build_ver.dev_attr.attr, + &sensor_dev_attr_cpld_version_h.dev_attr.attr, + &sensor_dev_attr_cpld_id.dev_attr.attr, + &sensor_dev_attr_cpld_qsfpdd_mod_int_g0.dev_attr.attr, + &sensor_dev_attr_cpld_qsfpdd_mod_int_g1.dev_attr.attr, + &sensor_dev_attr_cpld_qsfpdd_mod_int_g2.dev_attr.attr, + &sensor_dev_attr_cpld_qsfpdd_mod_int_g3.dev_attr.attr, + &sensor_dev_attr_cpld_qsfpdd_pres_g0.dev_attr.attr, + &sensor_dev_attr_cpld_qsfpdd_pres_g1.dev_attr.attr, + &sensor_dev_attr_cpld_qsfpdd_pres_g2.dev_attr.attr, + &sensor_dev_attr_cpld_qsfpdd_pres_g3.dev_attr.attr, + &sensor_dev_attr_cpld_qsfpdd_fuse_int_g0.dev_attr.attr, + &sensor_dev_attr_cpld_qsfpdd_fuse_int_g1.dev_attr.attr, + &sensor_dev_attr_cpld_qsfpdd_fuse_int_g2.dev_attr.attr, + &sensor_dev_attr_cpld_qsfpdd_fuse_int_g3.dev_attr.attr, + &sensor_dev_attr_cpld_sfp_txfault.dev_attr.attr, + &sensor_dev_attr_cpld_sfp_abs.dev_attr.attr, + &sensor_dev_attr_cpld_sfp_rxlos.dev_attr.attr, + &sensor_dev_attr_cpld_qsfpdd_mod_int_mask_g0.dev_attr.attr, + &sensor_dev_attr_cpld_qsfpdd_mod_int_mask_g1.dev_attr.attr, + &sensor_dev_attr_cpld_qsfpdd_mod_int_mask_g2.dev_attr.attr, + &sensor_dev_attr_cpld_qsfpdd_mod_int_mask_g3.dev_attr.attr, + &sensor_dev_attr_cpld_qsfpdd_pres_mask_g0.dev_attr.attr, + &sensor_dev_attr_cpld_qsfpdd_pres_mask_g1.dev_attr.attr, + &sensor_dev_attr_cpld_qsfpdd_pres_mask_g2.dev_attr.attr, + &sensor_dev_attr_cpld_qsfpdd_pres_mask_g3.dev_attr.attr, + &sensor_dev_attr_cpld_qsfpdd_fuse_int_mask_g0.dev_attr.attr, + &sensor_dev_attr_cpld_qsfpdd_fuse_int_mask_g1.dev_attr.attr, + &sensor_dev_attr_cpld_qsfpdd_fuse_int_mask_g2.dev_attr.attr, + &sensor_dev_attr_cpld_qsfpdd_fuse_int_mask_g3.dev_attr.attr, + &sensor_dev_attr_cpld_sfp_txfault_mask.dev_attr.attr, + &sensor_dev_attr_cpld_sfp_abs_mask.dev_attr.attr, + &sensor_dev_attr_cpld_sfp_rxlos_mask.dev_attr.attr, + &sensor_dev_attr_cpld_qsfpdd_mod_int_event_g0.dev_attr.attr, + &sensor_dev_attr_cpld_qsfpdd_mod_int_event_g1.dev_attr.attr, + &sensor_dev_attr_cpld_qsfpdd_mod_int_event_g2.dev_attr.attr, + &sensor_dev_attr_cpld_qsfpdd_mod_int_event_g3.dev_attr.attr, + &sensor_dev_attr_cpld_qsfpdd_pres_event_g0.dev_attr.attr, + &sensor_dev_attr_cpld_qsfpdd_pres_event_g1.dev_attr.attr, + &sensor_dev_attr_cpld_qsfpdd_pres_event_g2.dev_attr.attr, + &sensor_dev_attr_cpld_qsfpdd_pres_event_g3.dev_attr.attr, + &sensor_dev_attr_cpld_qsfpdd_fuse_int_event_g0.dev_attr.attr, + &sensor_dev_attr_cpld_qsfpdd_fuse_int_event_g1.dev_attr.attr, + &sensor_dev_attr_cpld_qsfpdd_fuse_int_event_g2.dev_attr.attr, + &sensor_dev_attr_cpld_qsfpdd_fuse_int_event_g3.dev_attr.attr, + &sensor_dev_attr_cpld_sfp_txfault_event.dev_attr.attr, + &sensor_dev_attr_cpld_sfp_abs_event.dev_attr.attr, + &sensor_dev_attr_cpld_sfp_rxlos_event.dev_attr.attr, + &sensor_dev_attr_cpld_qsfpdd_reset_ctrl_g0.dev_attr.attr, + &sensor_dev_attr_cpld_qsfpdd_reset_ctrl_g1.dev_attr.attr, + &sensor_dev_attr_cpld_qsfpdd_reset_ctrl_g2.dev_attr.attr, + &sensor_dev_attr_cpld_qsfpdd_reset_ctrl_g3.dev_attr.attr, + &sensor_dev_attr_cpld_qsfpdd_lp_mode_g0.dev_attr.attr, + &sensor_dev_attr_cpld_qsfpdd_lp_mode_g1.dev_attr.attr, + &sensor_dev_attr_cpld_qsfpdd_lp_mode_g2.dev_attr.attr, + &sensor_dev_attr_cpld_qsfpdd_lp_mode_g3.dev_attr.attr, + &sensor_dev_attr_cpld_sfp_tx_dis.dev_attr.attr, + &sensor_dev_attr_cpld_sfp_rs.dev_attr.attr, + &sensor_dev_attr_cpld_sfp_ts.dev_attr.attr, + &sensor_dev_attr_cpld_port_int_status.dev_attr.attr, + NULL +}; + +/* cpld 3 */ +static struct attribute *s9301_cpld3_attributes[] = { + &sensor_dev_attr_cpld_access_register.dev_attr.attr, + &sensor_dev_attr_cpld_register_value.dev_attr.attr, + &sensor_dev_attr_cpld_major_ver.dev_attr.attr, + &sensor_dev_attr_cpld_minor_ver.dev_attr.attr, + &sensor_dev_attr_cpld_build_ver.dev_attr.attr, + &sensor_dev_attr_cpld_version_h.dev_attr.attr, + &sensor_dev_attr_cpld_id.dev_attr.attr, + NULL +}; + +/* cpld 1 attributes group */ +static const struct attribute_group s9301_cpld1_group = { + .attrs = s9301_cpld1_attributes, +}; +/* cpld 2 attributes group */ +static const struct attribute_group s9301_cpld2_group = { + .attrs = s9301_cpld2_attributes, +}; +/* cpld 3 attributes group */ +static const struct attribute_group s9301_cpld3_group = { + .attrs = s9301_cpld3_attributes, +}; + +static int _bsp_log(u8 log_type, char *fmt, ...) +{ + if ((log_type==LOG_READ && enable_log_read) || + (log_type==LOG_WRITE && enable_log_write)) { + va_list args; + int r; + + va_start(args, fmt); + r = vprintk(fmt, args); + va_end(args); + + return r; + } else { + return 0; + } +} + +static int _config_bsp_log(u8 log_type) +{ + switch(log_type) { + case LOG_NONE: + enable_log_read = LOG_DISABLE; + enable_log_write = LOG_DISABLE; + break; + case LOG_RW: + enable_log_read = LOG_ENABLE; + enable_log_write = LOG_ENABLE; + break; + case LOG_READ: + enable_log_read = LOG_ENABLE; + enable_log_write = LOG_DISABLE; + break; + case LOG_WRITE: + enable_log_read = LOG_DISABLE; + enable_log_write = LOG_ENABLE; + break; + default: + return -EINVAL; + } + return 0; +} + +/* get bsp value */ +static ssize_t read_bsp(char *buf, char *str) +{ + ssize_t len=0; + + len=sprintf(buf, "%s", str); + BSP_LOG_R("reg_val=%s", str); + + return len; +} + +/* set bsp value */ +static ssize_t write_bsp(const char *buf, char *str, size_t str_len, size_t count) +{ + snprintf(str, str_len, "%s", buf); + BSP_LOG_W("reg_val=%s", str); + + return count; +} + +/* get bsp parameter value */ +static ssize_t read_bsp_callback(struct device *dev, + struct device_attribute *da, char *buf) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + int str_len=0; + char *str=NULL; + + switch (attr->index) { + case BSP_DEBUG: + str = bsp_debug; + str_len = sizeof(bsp_debug); + break; + default: + return -EINVAL; + } + return read_bsp(buf, str); +} + +/* set bsp parameter value */ +static ssize_t write_bsp_callback(struct device *dev, + struct device_attribute *da, const char *buf, size_t count) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + int str_len=0; + char *str=NULL; + ssize_t ret = 0; + u8 bsp_debug_u8 = 0; + + switch (attr->index) { + case BSP_DEBUG: + str = bsp_debug; + str_len = sizeof(str); + ret = write_bsp(buf, str, str_len, count); + + if (kstrtou8(buf, 0, &bsp_debug_u8) < 0) { + return -EINVAL; + } else if (_config_bsp_log(bsp_debug_u8) < 0) { + return -EINVAL; + } + return ret; + default: + return -EINVAL; + } + return 0; +} + +/* read access register from cpld data */ +static ssize_t read_access_register(struct device *dev, + struct device_attribute *da, + char *buf) +{ + struct i2c_client *client = to_i2c_client(dev); + struct cpld_data *data = i2c_get_clientdata(client); + u8 reg = data->access_reg; + + return sprintf(buf, "0x%x\n", reg); +} + +/* write access register to cpld data */ +static ssize_t write_access_register(struct device *dev, + struct device_attribute *da, + const char *buf, + size_t count) +{ + struct i2c_client *client = to_i2c_client(dev); + struct cpld_data *data = i2c_get_clientdata(client); + u8 reg; + + if (kstrtou8(buf, 0, ®) < 0) + return -EINVAL; + + data->access_reg = reg; + return count; +} + +/* read the value of access register in cpld data */ +static ssize_t read_register_value(struct device *dev, + struct device_attribute *da, + char *buf) +{ + struct i2c_client *client = to_i2c_client(dev); + struct cpld_data *data = i2c_get_clientdata(client); + u8 reg = data->access_reg; + int reg_val; + + I2C_READ_BYTE_DATA(reg_val, &data->access_lock, client, reg); + + if (reg_val < 0) + return reg_val; + + return sprintf(buf, "0x%x\n", reg_val); +} + +/* wrtie the value to access register in cpld data */ +static ssize_t write_register_value(struct device *dev, + struct device_attribute *da, + const char *buf, + size_t count) +{ + struct i2c_client *client = to_i2c_client(dev); + struct cpld_data *data = i2c_get_clientdata(client); + int ret = -EIO; + u8 reg = data->access_reg; + u8 reg_val; + + if (kstrtou8(buf, 0, ®_val) < 0) + return -EINVAL; + + I2C_WRITE_BYTE_DATA(ret, &data->access_lock, client, reg, reg_val); + + if (unlikely(ret < 0)) { + dev_err(dev, "I2C_WRITE_BYTE_DATA error, return=%d\n", ret); + return ret; + } + + return count; +} + +/* get cpld register value */ +static ssize_t read_cpld_reg(struct device *dev, + char *buf, + u8 reg) +{ + int reg_val; + + if (read_cpld_reg_raw_int(dev, reg, ®_val)) + return sprintf(buf, "0x%02x\n", reg_val); + else + return reg_val; +} + +static bool read_cpld_reg_raw_int(struct device *dev, u8 reg, int *val) +{ + struct i2c_client *client = to_i2c_client(dev); + struct cpld_data *data = i2c_get_clientdata(client); + I2C_READ_BYTE_DATA(*val, &data->access_lock, client, reg); + if (unlikely(*val < 0)) { + dev_err(dev, "read_cpld_reg_raw_int() error, return=%d\n", *val); + return false; + } + return true; +} + +static bool read_cpld_reg_raw_byte(struct device *dev, u8 reg, u8 *val, int *errno) +{ + int reg_val; + + if (read_cpld_reg_raw_int(dev, reg, ®_val)) { + *val = (u8)reg_val; + return true; + } else { + *errno = reg_val; + return false; + } +} + +/* handle read for attributes */ +static ssize_t read_cpld_callback(struct device *dev, + struct device_attribute *da, char *buf) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + u8 reg = 0; + + switch (attr->index) { + case CPLD_SKU_ID: + reg = CPLD_SKU_ID_REG; + break; + case CPLD_ID: + reg = CPLD_ID_REG; + break; + case CPLD_BUILD_VER: + reg = CPLD_BUILD_VER_REG; + break; + case CPLD_MAC_INTR: + reg = CPLD_MAC_INTR_REG; + break; + case CPLD_10G_PHY_INTR: + reg = CPLD_10G_PHY_INTR_REG; + break; + case CPLD_CPLD_FRU_INTR: + reg = CPLD_CPLD_FRU_INTR_REG; + break; + case CPLD_THERMAL_ALERT_INTR: + reg = CPLD_THERMAL_ALERT_INTR_REG; + break; + case CPLD_MISC_INTR: + reg = CPLD_MISC_INTR_REG; + break; + case CPLD_SYSTEM_INTR: + reg = CPLD_SYSTEM_INTR_REG; + break; + case CPLD_MAC_INTR_MASK: + reg = CPLD_MAC_INTR_MASK_REG; + break; + case CPLD_10G_PHY_INTR_MASK: + reg = CPLD_10G_PHY_INTR_MASK_REG; + break; + case CPLD_CPLD_FRU_INTR_MASK: + reg = CPLD_CPLD_FRU_INTR_MASK_REG; + break; + case CPLD_THERMAL_ALERT_INTR_MASK: + reg = CPLD_THERMAL_ALERT_INTR_MASK_REG; + break; + case CPLD_MISC_INTR_MASK: + reg = CPLD_MISC_INTR_MASK_REG; + break; + case CPLD_MAC_INTR_EVENT: + reg = CPLD_MAC_INTR_EVENT_REG; + break; + case CPLD_10G_PHY_INTR_EVENT: + reg = CPLD_10G_PHY_INTR_EVENT_REG; + break; + case CPLD_CPLD_FRU_INTR_EVENT: + reg = CPLD_CPLD_FRU_INTR_EVENT_REG; + break; + case CPLD_THERMAL_ALERT_INTR_EVENT: + reg = CPLD_THERMAL_ALERT_INTR_EVENT_REG; + break; + case CPLD_MISC_INTR_EVENT: + reg = CPLD_MISC_INTR_EVENT_REG; + break; + case CPLD_MAC_RST: + reg = CPLD_MAC_RST_REG; + break; + case CPLD_10G_PHY_RST: + reg = CPLD_10G_PHY_RST_REG; + break; + case CPLD_BMC_RST: + reg = CPLD_BMC_RST_REG; + break; + case CPLD_USB_RST: + reg = CPLD_USB_RST_REG; + break; + case CPLD_MUX_RST: + reg = CPLD_MUX_RST_REG; + break; + case CPLD_MISC_RST: + reg = CPLD_MISC_RST_REG; + break; + case CPLD_BMC_WATCHDOG: + reg = CPLD_BMC_WATCHDOG_REG; + break; + case CPLD_DAU_BD_PRES: + reg = CPLD_DAU_BD_PRES_REG; + break; + case CPLD_PSU_STATUS: + reg = CPLD_PSU_STATUS_REG; + break; + case CPLD_SYS_PW_STATUS: + reg = CPLD_SYS_PW_STATUS_REG; + break; + case CPLD_MISC: + reg = CPLD_MISC_REG; + break; + case CPLD_MUX_CTRL: + reg = CPLD_MUX_CTRL_REG; + break; + case CPLD_MAC_QSFP_SEL_CTRL: + reg = CPLD_MAC_QSFP_SEL_CTRL_REG; + break; + case CPLD_SYS_LED_CTRL_1: + reg = CPLD_SYS_LED_CTRL_1_REG; + break; + case CPLD_SYS_LED_CTRL_2: + reg = CPLD_SYS_LED_CTRL_2_REG; + break; + case CPLD_BEACON_LED_CTRL: + reg = CPLD_BEACON_LED_CTRL_REG; + break; + case CPLD_PORT_LED_CLR_CTRL: + reg = CPLD_PORT_LED_CLR_CTRL_REG; + break; + case CPLD_EVENT_DETECT_CTRL: + reg = CPLD_EVENT_DETECT_CTRL_REG; + break; + case CPLD_QSFPDD_MOD_INT_G0: + reg = CPLD_QSFPDD_MOD_INT_G0_REG; + break; + case CPLD_QSFPDD_MOD_INT_G1: + reg = CPLD_QSFPDD_MOD_INT_G1_REG; + break; + case CPLD_QSFPDD_MOD_INT_G2: + reg = CPLD_QSFPDD_MOD_INT_G2_REG; + break; + case CPLD_QSFPDD_MOD_INT_G3: + reg = CPLD_QSFPDD_MOD_INT_G3_REG; + break; + case CPLD_QSFPDD_PRES_G0: + reg = CPLD_QSFPDD_PRES_G0_REG; + break; + case CPLD_QSFPDD_PRES_G1: + reg = CPLD_QSFPDD_PRES_G1_REG; + break; + case CPLD_QSFPDD_PRES_G2: + reg = CPLD_QSFPDD_PRES_G2_REG; + break; + case CPLD_QSFPDD_PRES_G3: + reg = CPLD_QSFPDD_PRES_G3_REG; + break; + case CPLD_QSFPDD_FUSE_INT_G0: + reg = CPLD_QSFPDD_FUSE_INT_G0_REG; + break; + case CPLD_QSFPDD_FUSE_INT_G1: + reg = CPLD_QSFPDD_FUSE_INT_G1_REG; + break; + case CPLD_QSFPDD_FUSE_INT_G2: + reg = CPLD_QSFPDD_FUSE_INT_G2_REG; + break; + case CPLD_QSFPDD_FUSE_INT_G3: + reg = CPLD_QSFPDD_FUSE_INT_G3_REG; + break; + case CPLD_SFP_TXFAULT: + reg = CPLD_SFP_TXFAULT_REG; + break; + case CPLD_SFP_ABS: + reg = CPLD_SFP_ABS_REG; + break; + case CPLD_SFP_RXLOS: + reg = CPLD_SFP_RXLOS_REG; + break; + case CPLD_QSFPDD_MOD_INT_MASK_G0: + reg = CPLD_QSFPDD_MOD_INT_MASK_G0_REG; + break; + case CPLD_QSFPDD_MOD_INT_MASK_G1: + reg = CPLD_QSFPDD_MOD_INT_MASK_G1_REG; + break; + case CPLD_QSFPDD_MOD_INT_MASK_G2: + reg = CPLD_QSFPDD_MOD_INT_MASK_G2_REG; + break; + case CPLD_QSFPDD_MOD_INT_MASK_G3: + reg = CPLD_QSFPDD_MOD_INT_MASK_G3_REG; + break; + case CPLD_QSFPDD_PRES_MASK_G0: + reg = CPLD_QSFPDD_PRES_MASK_G0_REG; + break; + case CPLD_QSFPDD_PRES_MASK_G1: + reg = CPLD_QSFPDD_PRES_MASK_G1_REG; + break; + case CPLD_QSFPDD_PRES_MASK_G2: + reg = CPLD_QSFPDD_PRES_MASK_G2_REG; + break; + case CPLD_QSFPDD_PRES_MASK_G3: + reg = CPLD_QSFPDD_PRES_MASK_G3_REG; + break; + case CPLD_QSFPDD_FUSE_INT_MASK_G0: + reg = CPLD_QSFPDD_FUSE_INT_MASK_G0_REG; + break; + case CPLD_QSFPDD_FUSE_INT_MASK_G1: + reg = CPLD_QSFPDD_FUSE_INT_MASK_G1_REG; + break; + case CPLD_QSFPDD_FUSE_INT_MASK_G2: + reg = CPLD_QSFPDD_FUSE_INT_MASK_G2_REG; + break; + case CPLD_QSFPDD_FUSE_INT_MASK_G3: + reg = CPLD_QSFPDD_FUSE_INT_MASK_G3_REG; + break; + case CPLD_SFP_TXFAULT_MASK: + reg = CPLD_SFP_TXFAULT_MASK_REG; + break; + case CPLD_SFP_ABS_MASK: + reg = CPLD_SFP_ABS_MASK_REG; + break; + case CPLD_SFP_RXLOS_MASK: + reg = CPLD_SFP_RXLOS_MASK_REG; + break; + case CPLD_QSFPDD_MOD_INT_EVENT_G0: + reg = CPLD_QSFPDD_MOD_INT_EVENT_G0_REG; + break; + case CPLD_QSFPDD_MOD_INT_EVENT_G1: + reg = CPLD_QSFPDD_MOD_INT_EVENT_G1_REG; + break; + case CPLD_QSFPDD_MOD_INT_EVENT_G2: + reg = CPLD_QSFPDD_MOD_INT_EVENT_G2_REG; + break; + case CPLD_QSFPDD_MOD_INT_EVENT_G3: + reg = CPLD_QSFPDD_MOD_INT_EVENT_G3_REG; + break; + case CPLD_QSFPDD_PRES_EVENT_G0: + reg = CPLD_QSFPDD_PRES_EVENT_G0_REG; + break; + case CPLD_QSFPDD_PRES_EVENT_G1: + reg = CPLD_QSFPDD_PRES_EVENT_G1_REG; + break; + case CPLD_QSFPDD_PRES_EVENT_G2: + reg = CPLD_QSFPDD_PRES_EVENT_G2_REG; + break; + case CPLD_QSFPDD_PRES_EVENT_G3: + reg = CPLD_QSFPDD_PRES_EVENT_G3_REG; + break; + case CPLD_QSFPDD_FUSE_INT_EVENT_G0: + reg = CPLD_QSFPDD_FUSE_INT_EVENT_G0_REG; + break; + case CPLD_QSFPDD_FUSE_INT_EVENT_G1: + reg = CPLD_QSFPDD_FUSE_INT_EVENT_G1_REG; + break; + case CPLD_QSFPDD_FUSE_INT_EVENT_G2: + reg = CPLD_QSFPDD_FUSE_INT_EVENT_G2_REG; + break; + case CPLD_QSFPDD_FUSE_INT_EVENT_G3: + reg = CPLD_QSFPDD_FUSE_INT_EVENT_G3_REG; + break; + case CPLD_SFP_TXFAULT_EVENT: + reg = CPLD_SFP_TXFAULT_EVENT_REG; + break; + case CPLD_SFP_ABS_EVENT: + reg = CPLD_SFP_ABS_EVENT_REG; + break; + case CPLD_SFP_RXLOS_EVENT: + reg = CPLD_SFP_RXLOS_EVENT_REG; + break; + case CPLD_QSFPDD_RESET_CTRL_G0: + reg = CPLD_QSFPDD_RESET_CTRL_G0_REG; + break; + case CPLD_QSFPDD_RESET_CTRL_G1: + reg = CPLD_QSFPDD_RESET_CTRL_G1_REG; + break; + case CPLD_QSFPDD_RESET_CTRL_G2: + reg = CPLD_QSFPDD_RESET_CTRL_G2_REG; + break; + case CPLD_QSFPDD_RESET_CTRL_G3: + reg = CPLD_QSFPDD_RESET_CTRL_G3_REG; + break; + case CPLD_QSFPDD_LP_MODE_G0: + reg = CPLD_QSFPDD_LP_MODE_G0_REG; + break; + case CPLD_QSFPDD_LP_MODE_G1: + reg = CPLD_QSFPDD_LP_MODE_G1_REG; + break; + case CPLD_QSFPDD_LP_MODE_G2: + reg = CPLD_QSFPDD_LP_MODE_G2_REG; + break; + case CPLD_QSFPDD_LP_MODE_G3: + reg = CPLD_QSFPDD_LP_MODE_G3_REG; + break; + case CPLD_SFP_TX_DIS: + reg = CPLD_SFP_TX_DIS_REG; + break; + case CPLD_SFP_RS: + reg = CPLD_SFP_RS_REG; + break; + case CPLD_SFP_TS: + reg = CPLD_SFP_TS_REG; + break; + case CPLD_PORT_INT_STATUS: + reg = CPLD_PORT_INT_STATUS_REG; + break; + default: + return -EINVAL; + } + return read_cpld_reg(dev, buf, reg); +} + +/* handle read for hw_rev attributes */ +static ssize_t read_hw_rev_cb(struct device *dev, + struct device_attribute *da, char *buf) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + u8 reg = CPLD_HW_REV_REG; + u8 reg_val = 0; + int errno = 0; + u8 res; + + if (!read_cpld_reg_raw_byte(dev, reg, ®_val, &errno)) + return errno; + + switch (attr->index) { + case CPLD_HW_REV: + HW_REV_GET(reg_val, res); + break; + case CPLD_DEPH_REV: + DEPH_REV_GET(reg_val, res); + break; + case CPLD_BUILD_REV: + BUILD_REV_GET(reg_val, res); + break; + case CPLD_ID_TYPE: + ID_TYPE_GET(reg_val, res); + break; + default: + return -EINVAL; + } + return sprintf(buf, "0x%02x\n", res); +} + +/* handle read for cpld_version attributes */ +static ssize_t read_cpld_version_cb(struct device *dev, + struct device_attribute *da, char *buf) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + u8 reg = CPLD_VERSION_REG; + u8 reg_val = 0; + int errno = 0; + u8 res; + + if (!read_cpld_reg_raw_byte(dev, reg, ®_val, &errno)) + return errno; + + switch (attr->index) { + case CPLD_MAJOR_VER: + CPLD_MAJOR_VERSION_GET(reg_val, res); + break; + case CPLD_MINOR_VER: + CPLD_MINOR_VERSION_GET(reg_val, res); + break; + default: + return -EINVAL; + } + return sprintf(buf, "0x%02x\n", res); +} + +/* handle read human-readable string for cpld_version attributes */ +static ssize_t read_cpld_version_h_cb(struct device *dev, + struct device_attribute *da, char *buf) +{ + u8 reg = CPLD_VERSION_REG; + u8 reg_val = 0; + int errno = 0; + u8 major, minor, build; + + //get major/minor register value + if(!read_cpld_reg_raw_byte(dev, reg, ®_val, &errno)) + return errno; + CPLD_MAJOR_VERSION_GET(reg_val, major); + CPLD_MINOR_VERSION_GET(reg_val, minor); + + //get build register value + reg = CPLD_BUILD_VER_REG; + if(!read_cpld_reg_raw_byte(dev, reg, &build, &errno)) + return errno; + + //version string format : xx.xx.xxx + return sprintf(buf, "%d.%02d.%03d\n", major, minor, build); +} + +/* handle write for attributes */ +static ssize_t write_cpld_callback(struct device *dev, + struct device_attribute *da, const char *buf, size_t count) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + u8 reg = 0; + + switch (attr->index) { + case CPLD_MAC_INTR_MASK: + reg = CPLD_MAC_INTR_MASK_REG; + break; + case CPLD_10G_PHY_INTR_MASK: + reg = CPLD_10G_PHY_INTR_MASK_REG; + break; + case CPLD_CPLD_FRU_INTR_MASK: + reg = CPLD_CPLD_FRU_INTR_MASK_REG; + break; + case CPLD_THERMAL_ALERT_INTR_MASK: + reg = CPLD_THERMAL_ALERT_INTR_MASK_REG; + break; + case CPLD_MISC_INTR_MASK: + reg = CPLD_MISC_INTR_MASK_REG; + break; + case CPLD_MAC_RST: + reg = CPLD_MAC_RST_REG; + break; + case CPLD_10G_PHY_RST: + reg = CPLD_10G_PHY_RST_REG; + break; + case CPLD_BMC_RST: + reg = CPLD_BMC_RST_REG; + break; + case CPLD_USB_RST: + reg = CPLD_USB_RST_REG; + break; + case CPLD_MUX_RST: + reg = CPLD_MUX_RST_REG; + break; + case CPLD_MISC_RST: + reg = CPLD_MISC_RST_REG; + break; + case CPLD_BMC_WATCHDOG: + reg = CPLD_BMC_WATCHDOG_REG; + break; + case CPLD_MUX_CTRL: + reg = CPLD_MUX_CTRL_REG; + break; + case CPLD_MAC_QSFP_SEL_CTRL: + reg = CPLD_MAC_QSFP_SEL_CTRL_REG; + break; + case CPLD_BEACON_LED_CTRL: + reg = CPLD_BEACON_LED_CTRL_REG; + break; + case CPLD_PORT_LED_CLR_CTRL: + reg = CPLD_PORT_LED_CLR_CTRL_REG; + break; + case CPLD_EVENT_DETECT_CTRL: + reg = CPLD_EVENT_DETECT_CTRL_REG; + break; + case CPLD_QSFPDD_MOD_INT_MASK_G0: + reg = CPLD_QSFPDD_MOD_INT_MASK_G0_REG; + break; + case CPLD_QSFPDD_MOD_INT_MASK_G1: + reg = CPLD_QSFPDD_MOD_INT_MASK_G1_REG; + break; + case CPLD_QSFPDD_MOD_INT_MASK_G2: + reg = CPLD_QSFPDD_MOD_INT_MASK_G2_REG; + break; + case CPLD_QSFPDD_MOD_INT_MASK_G3: + reg = CPLD_QSFPDD_MOD_INT_MASK_G3_REG; + break; + case CPLD_QSFPDD_PRES_MASK_G0: + reg = CPLD_QSFPDD_PRES_MASK_G0_REG; + break; + case CPLD_QSFPDD_PRES_MASK_G1: + reg = CPLD_QSFPDD_PRES_MASK_G1_REG; + break; + case CPLD_QSFPDD_PRES_MASK_G2: + reg = CPLD_QSFPDD_PRES_MASK_G2_REG; + break; + case CPLD_QSFPDD_PRES_MASK_G3: + reg = CPLD_QSFPDD_PRES_MASK_G3_REG; + break; + case CPLD_QSFPDD_FUSE_INT_MASK_G0: + reg = CPLD_QSFPDD_FUSE_INT_MASK_G0_REG; + break; + case CPLD_QSFPDD_FUSE_INT_MASK_G1: + reg = CPLD_QSFPDD_FUSE_INT_MASK_G1_REG; + break; + case CPLD_QSFPDD_FUSE_INT_MASK_G2: + reg = CPLD_QSFPDD_FUSE_INT_MASK_G2_REG; + break; + case CPLD_QSFPDD_FUSE_INT_MASK_G3: + reg = CPLD_QSFPDD_FUSE_INT_MASK_G3_REG; + break; + case CPLD_SFP_TXFAULT_MASK: + reg = CPLD_SFP_TXFAULT_MASK_REG; + break; + case CPLD_SFP_ABS_MASK: + reg = CPLD_SFP_ABS_MASK_REG; + break; + case CPLD_SFP_RXLOS_MASK: + reg = CPLD_SFP_RXLOS_MASK_REG; + break; + case CPLD_QSFPDD_RESET_CTRL_G0: + reg = CPLD_QSFPDD_RESET_CTRL_G0_REG; + break; + case CPLD_QSFPDD_RESET_CTRL_G1: + reg = CPLD_QSFPDD_RESET_CTRL_G1_REG; + break; + case CPLD_QSFPDD_RESET_CTRL_G2: + reg = CPLD_QSFPDD_RESET_CTRL_G2_REG; + break; + case CPLD_QSFPDD_RESET_CTRL_G3: + reg = CPLD_QSFPDD_RESET_CTRL_G3_REG; + break; + case CPLD_QSFPDD_LP_MODE_G0: + reg = CPLD_QSFPDD_LP_MODE_G0_REG; + break; + case CPLD_QSFPDD_LP_MODE_G1: + reg = CPLD_QSFPDD_LP_MODE_G1_REG; + break; + case CPLD_QSFPDD_LP_MODE_G2: + reg = CPLD_QSFPDD_LP_MODE_G2_REG; + break; + case CPLD_QSFPDD_LP_MODE_G3: + reg = CPLD_QSFPDD_LP_MODE_G3_REG; + break; + case CPLD_SFP_TX_DIS: + reg = CPLD_SFP_TX_DIS_REG; + break; + case CPLD_SFP_RS: + reg = CPLD_SFP_RS_REG; + break; + case CPLD_SFP_TS: + reg = CPLD_SFP_TS_REG; + break; + default: + return -EINVAL; + } + return write_cpld_reg(dev, buf, count, reg); +} + +/* set cpld register value */ +static ssize_t write_cpld_reg(struct device *dev, + const char *buf, + size_t count, + u8 reg) +{ + struct i2c_client *client = to_i2c_client(dev); + struct cpld_data *data = i2c_get_clientdata(client); + u8 reg_val; + int ret; + + if (kstrtou8(buf, 0, ®_val) < 0) + return -EINVAL; + + I2C_WRITE_BYTE_DATA(ret, &data->access_lock, + client, reg, reg_val); + + if (unlikely(ret < 0)) { + dev_err(dev, "I2C_WRITE_BYTE_DATA error, return=%d\n", ret); + return ret; + } + + return count; +} + +/* add valid cpld client to list */ +static void s9301_cpld_add_client(struct i2c_client *client) +{ + struct cpld_client_node *node = NULL; + + node = kzalloc(sizeof(struct cpld_client_node), GFP_KERNEL); + if (!node) { + dev_info(&client->dev, + "Can't allocate cpld_client_node for index %d\n", + client->addr); + return; + } + + node->client = client; + + mutex_lock(&list_lock); + list_add(&node->list, &cpld_client_list); + mutex_unlock(&list_lock); +} + +/* remove exist cpld client in list */ +static void s9301_cpld_remove_client(struct i2c_client *client) +{ + struct list_head *list_node = NULL; + struct cpld_client_node *cpld_node = NULL; + int found = 0; + + mutex_lock(&list_lock); + list_for_each(list_node, &cpld_client_list) { + cpld_node = list_entry(list_node, + struct cpld_client_node, list); + + if (cpld_node->client == client) { + found = 1; + break; + } + } + + if (found) { + list_del(list_node); + kfree(cpld_node); + } + mutex_unlock(&list_lock); +} + +/* cpld drvier probe */ +static int s9301_cpld_probe(struct i2c_client *client, + const struct i2c_device_id *dev_id) +{ + int status; + struct cpld_data *data = NULL; + int ret = -EPERM; + int idx; + + data = kzalloc(sizeof(struct cpld_data), GFP_KERNEL); + if (!data) + return -ENOMEM; + + /* init cpld data for client */ + i2c_set_clientdata(client, data); + mutex_init(&data->access_lock); + + if (!i2c_check_functionality(client->adapter, + I2C_FUNC_SMBUS_BYTE_DATA)) { + dev_info(&client->dev, + "i2c_check_functionality failed (0x%x)\n", + client->addr); + status = -EIO; + goto exit; + } + + /* get cpld id from device */ + ret = i2c_smbus_read_byte_data(client, CPLD_ID_REG); + + if (ret < 0) { + dev_info(&client->dev, + "fail to get cpld id (0x%x) at addr (0x%x)\n", + CPLD_ID_REG, client->addr); + status = -EIO; + goto exit; + } + + CPLD_ID_ID_GET(ret, idx); + + if (INVALID(idx, cpld1, cpld3)) { + dev_info(&client->dev, + "cpld id %d(device) not valid\n", idx); + //status = -EPERM; + //goto exit; + } + + data->index = dev_id->driver_data; + + /* register sysfs hooks for different cpld group */ + dev_info(&client->dev, "probe cpld with index %d\n", data->index); + switch (data->index) { + case cpld1: + status = sysfs_create_group(&client->dev.kobj, + &s9301_cpld1_group); + break; + case cpld2: + status = sysfs_create_group(&client->dev.kobj, + &s9301_cpld2_group); + break; + case cpld3: + status = sysfs_create_group(&client->dev.kobj, + &s9301_cpld3_group); + break; + default: + status = -EINVAL; + } + + if (status) + goto exit; + + dev_info(&client->dev, "chip found\n"); + + /* add probe chip to client list */ + s9301_cpld_add_client(client); + + return 0; +exit: + switch (data->index) { + case cpld1: + sysfs_remove_group(&client->dev.kobj, &s9301_cpld1_group); + break; + case cpld2: + sysfs_remove_group(&client->dev.kobj, &s9301_cpld2_group); + break; + case cpld3: + sysfs_remove_group(&client->dev.kobj, &s9301_cpld3_group); + break; + default: + break; + } + return status; +} + +/* cpld drvier remove */ +#if LINUX_VERSION_CODE < KERNEL_VERSION(6, 1, 0) +static int +#else +static void +#endif +s9301_cpld_remove(struct i2c_client *client) +{ + struct cpld_data *data = i2c_get_clientdata(client); + + switch (data->index) { + case cpld1: + sysfs_remove_group(&client->dev.kobj, &s9301_cpld1_group); + break; + case cpld2: + sysfs_remove_group(&client->dev.kobj, &s9301_cpld2_group); + break; + case cpld3: + sysfs_remove_group(&client->dev.kobj, &s9301_cpld3_group); + break; + } + + s9301_cpld_remove_client(client); +#if LINUX_VERSION_CODE < KERNEL_VERSION(6, 1, 0) + return 0; +#endif +} + +MODULE_DEVICE_TABLE(i2c, s9301_cpld_id); + +static struct i2c_driver s9301_cpld_driver = { + .class = I2C_CLASS_HWMON, + .driver = { + .name = "x86_64_ufispace_s9301_32d_cpld", + }, + .probe = s9301_cpld_probe, + .remove = s9301_cpld_remove, + .id_table = s9301_cpld_id, + .address_list = cpld_i2c_addr, +}; + +/* provide cpld register read */ +/* cpld_idx indicate the index of cpld device */ +int s9301_cpld_read(u8 cpld_idx, + u8 reg) +{ + struct list_head *list_node = NULL; + struct cpld_client_node *cpld_node = NULL; + int ret = -EPERM; + struct cpld_data *data; + + list_for_each(list_node, &cpld_client_list) { + cpld_node = list_entry(list_node, + struct cpld_client_node, list); + data = i2c_get_clientdata(cpld_node->client); + if (data->index == cpld_idx) { + DEBUG_PRINT("cpld_idx=%d, read reg 0x%02x", + cpld_idx, reg); + I2C_READ_BYTE_DATA(ret, &data->access_lock, + cpld_node->client, reg); + DEBUG_PRINT("cpld_idx=%d, read reg 0x%02x = 0x%02x", + cpld_idx, reg, ret); + break; + } + } + + return ret; +} +EXPORT_SYMBOL(s9301_cpld_read); + +/* provide cpld register write */ +/* cpld_idx indicate the index of cpld device */ +int s9301_cpld_write(u8 cpld_idx, + u8 reg, + u8 value) +{ + struct list_head *list_node = NULL; + struct cpld_client_node *cpld_node = NULL; + int ret = -EIO; + struct cpld_data *data; + + list_for_each(list_node, &cpld_client_list) { + cpld_node = list_entry(list_node, + struct cpld_client_node, list); + data = i2c_get_clientdata(cpld_node->client); + + if (data->index == cpld_idx) { + I2C_WRITE_BYTE_DATA(ret, &data->access_lock, + cpld_node->client, + reg, value); + DEBUG_PRINT("cpld_idx=%d, write reg 0x%02x val 0x%02x, ret=%d", + cpld_idx, reg, value, ret); + break; + } + } + + return ret; +} +EXPORT_SYMBOL(s9301_cpld_write); + +static int __init s9301_cpld_init(void) +{ + mutex_init(&list_lock); + return i2c_add_driver(&s9301_cpld_driver); +} + +static void __exit s9301_cpld_exit(void) +{ + i2c_del_driver(&s9301_cpld_driver); +} + +MODULE_AUTHOR("Leo Lin "); +MODULE_DESCRIPTION("x86_64_ufispace_s9301_cpld driver"); +MODULE_LICENSE("GPL"); + +module_init(s9301_cpld_init); +module_exit(s9301_cpld_exit); diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s9301-32d/modules/x86-64-ufispace-s9301-32d-cpld.h b/platform/broadcom/sonic-platform-modules-ufispace/s9301-32d/modules/x86-64-ufispace-s9301-32d-cpld.h new file mode 100644 index 0000000000..9eca440064 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ufispace/s9301-32d/modules/x86-64-ufispace-s9301-32d-cpld.h @@ -0,0 +1,251 @@ +/* header file for i2c cpld driver of ufispace_s9301_32d + * + * Copyright (C) 2017 UfiSpace Technology Corporation. + * Leo Lin + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. + */ + +#ifndef UFISPACE_S9301_I2C_CPLD_H +#define UFISPACE_S9301_I2C_CPLD_H + +/* CPLD device index value */ +enum cpld_id { + cpld1, + cpld2, + cpld3, +}; + +enum LED_BLINK { + NOBLINK, + BLINK, +}; + +enum LED_BLINK_SPEED { + BLINK_1X, // 0.5hz + BLINK_4X, // 2hz +}; + +enum LED_STATUS { + OFF, + ON, +}; + +enum LED_YELLOW { + YELLOW_OFF, + YELLOW_ON, +}; + +enum LED_GREEN { + GREEN_OFF, + GREEN_ON, +}; + +/* QSFPDD port number */ +#define QSFPDD_MAX_PORT_NUM 32 +#define QSFPDD_MIN_PORT_NUM 1 + +/* SFP+ port number */ +#define SFP_MAX_PORT_NUM 4 +#define SFP_MIN_PORT_NUM 1 + + +/* CPLD registers */ +/* CPLD 1 */ +#define CPLD_SKU_ID_REG 0x00 +#define CPLD_HW_REV_REG 0x01 +#define CPLD_VERSION_REG 0x02 +#define CPLD_ID_REG 0x03 +#define CPLD_BUILD_VER_REG 0x04 +// Interrupt status +#define CPLD_MAC_INTR_REG 0x10 +#define CPLD_10G_PHY_INTR_REG 0x13 +#define CPLD_CPLD_FRU_INTR_REG 0x14 +#define CPLD_THERMAL_ALERT_INTR_REG 0x16 +#define CPLD_MISC_INTR_REG 0x1B +#define CPLD_SYSTEM_INTR_REG 0x1D +// Interrupt mask +#define CPLD_MAC_INTR_MASK_REG 0x20 +#define CPLD_10G_PHY_INTR_MASK_REG 0x23 +#define CPLD_CPLD_FRU_INTR_MASK_REG 0x24 +#define CPLD_THERMAL_ALERT_INTR_MASK_REG 0x26 +#define CPLD_MISC_INTR_MASK_REG 0x2B +// Interrupt event +#define CPLD_MAC_INTR_EVENT_REG 0x30 +#define CPLD_10G_PHY_INTR_EVENT_REG 0x33 +#define CPLD_CPLD_FRU_INTR_EVENT_REG 0x14 +#define CPLD_THERMAL_ALERT_INTR_EVENT_REG 0x16 +#define CPLD_MISC_INTR_EVENT_REG 0x1B +// Reset ctrl +#define CPLD_MAC_RST_REG 0x40 +#define CPLD_10G_PHY_RST_REG 0x42 +#define CPLD_BMC_RST_REG 0x43 +#define CPLD_USB_RST_REG 0x44 +#define CPLD_MUX_RST_REG 0x46 +#define CPLD_MISC_RST_REG 0x48 +#define CPLD_BMC_WATCHDOG_REG 0x4D +// Sys status +#define CPLD_DAU_BD_PRES_REG 0x50 +#define CPLD_PSU_STATUS_REG 0x51 +#define CPLD_SYS_PW_STATUS_REG 0x52 +#define CPLD_MISC_REG 0x5B +// Mux ctrl +#define CPLD_MUX_CTRL_REG 0x5C +#define CPLD_MAC_QSFP_SEL_CTRL_REG 0x5F +// Led ctrl +#define CPLD_SYS_LED_CTRL_1_REG 0x80 +#define CPLD_SYS_LED_CTRL_2_REG 0x81 +#define CPLD_BEACON_LED_CTRL_REG 0x84 +#define CPLD_PORT_LED_CLR_CTRL_REG 0x85 +// Event Detect Ctrl +#define CPLD_EVENT_DETECT_CTRL_REG 0x5D + +/* CPLD 2 */ +/* G0 - port 0 ~ 7 + G1 - port 8 ~ 15 + G2 - port 16 ~ 23 + G3 - port 24 ~ 31 + */ +// Interrupt status +#define CPLD_QSFPDD_MOD_INT_G0_REG 0x10 +#define CPLD_QSFPDD_MOD_INT_G1_REG 0x11 +#define CPLD_QSFPDD_MOD_INT_G2_REG 0x12 +#define CPLD_QSFPDD_MOD_INT_G3_REG 0x13 +#define CPLD_QSFPDD_PRES_G0_REG 0x14 +#define CPLD_QSFPDD_PRES_G1_REG 0x15 +#define CPLD_QSFPDD_PRES_G2_REG 0x16 +#define CPLD_QSFPDD_PRES_G3_REG 0x17 +#define CPLD_QSFPDD_FUSE_INT_G0_REG 0x18 +#define CPLD_QSFPDD_FUSE_INT_G1_REG 0x19 +#define CPLD_QSFPDD_FUSE_INT_G2_REG 0x1A +#define CPLD_QSFPDD_FUSE_INT_G3_REG 0x1B +#define CPLD_SFP_TXFAULT_REG 0x1D +#define CPLD_SFP_ABS_REG 0x1E +#define CPLD_SFP_RXLOS_REG 0x1F +// Interrupt mask +#define CPLD_QSFPDD_MOD_INT_MASK_G0_REG 0x20 +#define CPLD_QSFPDD_MOD_INT_MASK_G1_REG 0x21 +#define CPLD_QSFPDD_MOD_INT_MASK_G2_REG 0x22 +#define CPLD_QSFPDD_MOD_INT_MASK_G3_REG 0x23 +#define CPLD_QSFPDD_PRES_MASK_G0_REG 0x24 +#define CPLD_QSFPDD_PRES_MASK_G1_REG 0x25 +#define CPLD_QSFPDD_PRES_MASK_G2_REG 0x26 +#define CPLD_QSFPDD_PRES_MASK_G3_REG 0x27 +#define CPLD_QSFPDD_FUSE_INT_MASK_G0_REG 0x28 +#define CPLD_QSFPDD_FUSE_INT_MASK_G1_REG 0x29 +#define CPLD_QSFPDD_FUSE_INT_MASK_G2_REG 0x2A +#define CPLD_QSFPDD_FUSE_INT_MASK_G3_REG 0x2B +#define CPLD_SFP_TXFAULT_MASK_REG 0x2D +#define CPLD_SFP_ABS_MASK_REG 0x2E +#define CPLD_SFP_RXLOS_MASK_REG 0x2F +// Interrupt event +#define CPLD_QSFPDD_MOD_INT_EVENT_G0_REG 0x30 +#define CPLD_QSFPDD_MOD_INT_EVENT_G1_REG 0x31 +#define CPLD_QSFPDD_MOD_INT_EVENT_G2_REG 0x32 +#define CPLD_QSFPDD_MOD_INT_EVENT_G3_REG 0x33 +#define CPLD_QSFPDD_PRES_EVENT_G0_REG 0x34 +#define CPLD_QSFPDD_PRES_EVENT_G1_REG 0x35 +#define CPLD_QSFPDD_PRES_EVENT_G2_REG 0x36 +#define CPLD_QSFPDD_PRES_EVENT_G3_REG 0x37 +#define CPLD_QSFPDD_FUSE_INT_EVENT_G0_REG 0x38 +#define CPLD_QSFPDD_FUSE_INT_EVENT_G1_REG 0x39 +#define CPLD_QSFPDD_FUSE_INT_EVENT_G2_REG 0x3A +#define CPLD_QSFPDD_FUSE_INT_EVENT_G3_REG 0x3B +#define CPLD_SFP_TXFAULT_EVENT_REG 0x3D +#define CPLD_SFP_ABS_EVENT_REG 0x3E +#define CPLD_SFP_RXLOS_EVENT_REG 0x3F +// Port ctrl +#define CPLD_QSFPDD_RESET_CTRL_G0_REG 0x40 +#define CPLD_QSFPDD_RESET_CTRL_G1_REG 0x41 +#define CPLD_QSFPDD_RESET_CTRL_G2_REG 0x42 +#define CPLD_QSFPDD_RESET_CTRL_G3_REG 0x43 +#define CPLD_QSFPDD_LP_MODE_G0_REG 0x44 +#define CPLD_QSFPDD_LP_MODE_G1_REG 0x45 +#define CPLD_QSFPDD_LP_MODE_G2_REG 0x46 +#define CPLD_QSFPDD_LP_MODE_G3_REG 0x47 +#define CPLD_SFP_TX_DIS_REG 0x55 +#define CPLD_SFP_RS_REG 0x56 +#define CPLD_SFP_TS_REG 0x57 +// Port status +#define CPLD_PORT_INT_STATUS_REG 0x58 + + +/* bit field structure for register value */ +struct cpld_reg_sku_id_t { + u8 model_id:8; +}; + +struct cpld_reg_hw_rev_t { + u8 hw_rev:2; + u8 deph_rev:1; + u8 build_rev:3; + u8 reserved:1; + u8 id_type:1; +}; + +struct cpld_reg_version_t { + u8 minor:6; + u8 major:2; +}; + +struct cpld_reg_id_t { + u8 id:3; + u8 release:5; +}; + +struct cpld_reg_beacon_led_ctrl_t { + u8 reserve:5; + u8 speed:1; + u8 blink:1; + u8 onoff:1; +}; + +/* common manipulation */ +#define INVALID(i, min, max) ((i < min) || (i > max) ? 1u : 0u) +#define READ_BIT(val, bit) ((0u == (val & (1<bf_name) +#define READ_BF_1(bf_struct, val, bf_name, bf_value) \ + bf_struct bf; \ + bf.data = val; \ + bf_value = bf.bf_name +#define HW_REV_GET(val, res) \ + READ_BF(cpld_reg_hw_rev_t, val, hw_rev, res) +#define DEPH_REV_GET(val, res) \ + READ_BF(cpld_reg_hw_rev_t, val, deph_rev, res) +#define BUILD_REV_GET(val, res) \ + READ_BF(cpld_reg_hw_rev_t, val, build_rev, res) +#define ID_TYPE_GET(val, res) \ + READ_BF(cpld_reg_hw_rev_t, val, id_type, res) +#define CPLD_MAJOR_VERSION_GET(val, res) \ + READ_BF(cpld_reg_version_t, val, major, res) +#define CPLD_MINOR_VERSION_GET(val, res) \ + READ_BF(cpld_reg_version_t, val, minor, res) +#define CPLD_ID_ID_GET(val, res) \ + READ_BF(cpld_reg_id_t, val, id, res) + +/* CPLD access functions */ +extern int s9301_cpld_read(u8 cpld_idx, u8 reg); +extern int s9301_cpld_write(u8 cpld_idx, u8 reg, u8 value); + +#endif + diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s9301-32d/modules/x86-64-ufispace-s9301-32d-lpc.c b/platform/broadcom/sonic-platform-modules-ufispace/s9301-32d/modules/x86-64-ufispace-s9301-32d-lpc.c new file mode 100644 index 0000000000..9aa7c7e4f0 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ufispace/s9301-32d/modules/x86-64-ufispace-s9301-32d-lpc.c @@ -0,0 +1,850 @@ +/* + * A lpc driver for the ufispace_s9301_32d + * + * Copyright (C) 2017-2020 UfiSpace Technology Corporation. + * Jason Tsai + * + * Based on ad7414.c + * Copyright 2006 Stefan Roese , DENX Software Engineering + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. + */ +#include +#include +#include +#include +#include + +#define BSP_LOG_R(fmt, args...) \ + _bsp_log (LOG_READ, KERN_INFO "%s:%s[%d]: " fmt "\r\n", \ + __FILE__, __func__, __LINE__, ##args) +#define BSP_LOG_W(fmt, args...) \ + _bsp_log (LOG_WRITE, KERN_INFO "%s:%s[%d]: " fmt "\r\n", \ + __FILE__, __func__, __LINE__, ##args) + +#define BSP_PR(level, fmt, args...) _bsp_log (LOG_SYS, level "[BSP]" fmt "\r\n", ##args) + +#define DRIVER_NAME "x86_64_ufispace_s9301_32d_lpc" +#define CPU_BDE 0 +#define CPU_SKY 1 +#define CPU_TYPE CPU_SKY + +/* LPC registers */ + +#define REG_BASE_CPU 0x600 + +#if CPU_TYPE == CPU_SKY +#define REG_BASE_MB 0xE00 +#define REG_BASE_I2C_ALERT 0x700 +#else +#define REG_BASE_MB 0x700 +#define REG_BASE_I2C_ALERT 0xF000 +#endif + +//CPU CPLD +#define REG_CPU_CPLD_VERSION (REG_BASE_CPU + 0x00) +#define REG_CPU_STATUS_0 (REG_BASE_CPU + 0x01) +#define REG_CPU_STATUS_1 (REG_BASE_CPU + 0x02) +#define REG_CPU_CTRL_0 (REG_BASE_CPU + 0x03) +#define REG_CPU_CTRL_1 (REG_BASE_CPU + 0x04) +#define REG_CPU_CPLD_BUILD (REG_BASE_CPU + 0xE0) + +//MB CPLD +//TBD, need to change after CPLD spec release +#define REG_MB_BRD_ID_0 (REG_BASE_MB + 0x00) +#define REG_MB_BRD_ID_1 (REG_BASE_MB + 0x01) +#define REG_MB_CPLD_VERSION (REG_BASE_MB + 0x02) +#define REG_MB_CPLD_BUILD (REG_BASE_MB + 0x04) +#define REG_MB_MUX_RESET (REG_BASE_MB + 0x46) +#define REG_MB_MUX_CTRL (REG_BASE_MB + 0x5c) + +//I2C Alert +#if CPU_TYPE == CPU_SKY +#define REG_ALERT_STATUS (REG_BASE_I2C_ALERT + 0x80) +#else +#define REG_ALERT_STATUS (REG_BASE_I2C_ALERT + 0x00) +#define REG_ALERT_DISABLE (REG_BASE_I2C_ALERT + 0x11) +#endif + +#define MASK_ALL (0xFF) +#define LPC_MDELAY (5) + +/* LPC sysfs attributes index */ +enum lpc_sysfs_attributes { + //CPU CPLD + ATT_CPU_CPLD_VERSION, + ATT_CPU_CPLD_VERSION_H, + ATT_CPU_BIOS_BOOT_ROM, + ATT_CPU_BIOS_BOOT_CFG, + ATT_CPU_CPLD_BUILD, + //MB CPLD + ATT_MB_BRD_ID_0, + ATT_MB_BRD_ID_1, + ATT_MB_CPLD_1_VERSION, + ATT_MB_CPLD_1_VERSION_H, + ATT_MB_CPLD_1_BUILD, + ATT_MB_MUX_CTRL, + ATT_MB_MUX_RESET, + ATT_MB_BRD_SKU_ID, + ATT_MB_BRD_HW_ID, + ATT_MB_BRD_ID_TYPE, + ATT_MB_BRD_BUILD_ID, + ATT_MB_BRD_DEPH_ID, + //I2C Alert + ATT_ALERT_STATUS, +#if CPU_TYPE == CPU_BDE + ATT_ALERT_DISABLE, +#endif + //BSP + ATT_BSP_VERSION, + ATT_BSP_DEBUG, + ATT_BSP_PR_INFO, + ATT_BSP_PR_ERR, + ATT_BSP_REG, + ATT_MAX +}; + +enum bsp_log_types { + LOG_NONE, + LOG_RW, + LOG_READ, + LOG_WRITE, + LOG_SYS +}; + +enum bsp_log_ctrl { + LOG_DISABLE, + LOG_ENABLE +}; + +struct lpc_data_s { + struct mutex access_lock; +}; + +struct lpc_data_s *lpc_data; +char bsp_version[16]=""; +char bsp_debug[2]="0"; +char bsp_reg[8]="0x0"; +u8 enable_log_read=LOG_DISABLE; +u8 enable_log_write=LOG_DISABLE; +u8 enable_log_sys=LOG_ENABLE; + +/* reg shift */ +static u8 _shift(u8 mask) +{ + int i=0, mask_one=1; + + for(i=0; i<8; ++i) { + if ((mask & mask_one) == 1) + return i; + else + mask >>= 1; + } + + return -1; +} + +/* reg mask and shift */ +static u8 _mask_shift(u8 val, u8 mask) +{ + int shift=0; + + shift = _shift(mask); + + return (val & mask) >> shift; +} + +static u8 _bit_operation(u8 reg_val, u8 bit, u8 bit_val) +{ + if (bit_val == 0) + reg_val = reg_val & ~(1 << bit); + else + reg_val = reg_val | (1 << bit); + return reg_val; +} + +static int _bsp_log(u8 log_type, char *fmt, ...) +{ + if ((log_type==LOG_READ && enable_log_read) || + (log_type==LOG_WRITE && enable_log_write) || + (log_type==LOG_SYS && enable_log_sys) ) { + va_list args; + int r; + + va_start(args, fmt); + r = vprintk(fmt, args); + va_end(args); + + return r; + } else { + return 0; + } +} + +static int _config_bsp_log(u8 log_type) +{ + switch(log_type) { + case LOG_NONE: + enable_log_read = LOG_DISABLE; + enable_log_write = LOG_DISABLE; + break; + case LOG_RW: + enable_log_read = LOG_ENABLE; + enable_log_write = LOG_ENABLE; + break; + case LOG_READ: + enable_log_read = LOG_ENABLE; + enable_log_write = LOG_DISABLE; + break; + case LOG_WRITE: + enable_log_read = LOG_DISABLE; + enable_log_write = LOG_ENABLE; + break; + default: + return -EINVAL; + } + return 0; +} + +/* get lpc register value */ +static u8 _read_lpc_reg(u16 reg, u8 mask) +{ + u8 reg_val; + + mutex_lock(&lpc_data->access_lock); + reg_val=_mask_shift(inb(reg), mask); + mutex_unlock(&lpc_data->access_lock); + + BSP_LOG_R("reg=0x%03x, reg_val=0x%02x", reg, reg_val); + + return reg_val; +} + +/* get lpc register value */ +static ssize_t read_lpc_reg(u16 reg, u8 mask, char *buf) +{ + u8 reg_val; + int len=0; + + reg_val = _read_lpc_reg(reg, mask); + len=sprintf(buf,"0x%x\n", reg_val); + + return len; +} + +/* set lpc register value */ +static ssize_t write_lpc_reg(u16 reg, u8 mask, const char *buf, size_t count) +{ + u8 reg_val, reg_val_now, shift; + + if (kstrtou8(buf, 0, ®_val) < 0) + return -EINVAL; + + //apply SINGLE BIT operation if mask is specified, multiple bits are not supported + if (mask != MASK_ALL) { + reg_val_now = _read_lpc_reg(reg, 0x0); + shift = _shift(mask); + reg_val = _bit_operation(reg_val_now, shift, reg_val); + } + + mutex_lock(&lpc_data->access_lock); + + outb(reg_val, reg); + mdelay(LPC_MDELAY); + + mutex_unlock(&lpc_data->access_lock); + + BSP_LOG_W("reg=0x%03x, reg_val=0x%02x", reg, reg_val); + + return count; +} + +/* get bsp value */ +static ssize_t read_bsp(char *buf, char *str) +{ + ssize_t len=0; + + mutex_lock(&lpc_data->access_lock); + len=sprintf(buf, "%s", str); + mutex_unlock(&lpc_data->access_lock); + + BSP_LOG_R("reg_val=%s", str); + + return len; +} + +/* set bsp value */ +static ssize_t write_bsp(const char *buf, char *str, size_t str_len, size_t count) +{ + mutex_lock(&lpc_data->access_lock); + snprintf(str, str_len, "%s", buf); + mutex_unlock(&lpc_data->access_lock); + + BSP_LOG_W("reg_val=%s", str); + + return count; +} + +/* get cpu cpld version in human readable format */ +static ssize_t read_cpu_cpld_version_h(struct device *dev, + struct device_attribute *da, char *buf) +{ + ssize_t len=0; + u16 reg = REG_CPU_CPLD_VERSION; + u8 mask = MASK_ALL; + u8 mask_major = 0b11000000; + u8 mask_minor = 0b00111111; + u8 reg_val; + u8 major, minor, build; + + mutex_lock(&lpc_data->access_lock); + reg_val = _mask_shift(inb(reg), mask); + major = _mask_shift(reg_val, mask_major); + minor = _mask_shift(reg_val, mask_minor); + reg = REG_CPU_CPLD_BUILD; + build = _mask_shift(inb(reg), mask); + len = sprintf(buf, "%d.%02d.%03d\n", major, minor, build); + mutex_unlock(&lpc_data->access_lock); + + BSP_LOG_R("reg=0x%03x, reg_val=0x%02x", reg, reg_val); + + return len; +} + +/* get mb cpld version in human readable format */ +static ssize_t read_mb_cpld_1_version_h(struct device *dev, + struct device_attribute *da, char *buf) +{ + ssize_t len=0; + u16 reg = REG_MB_CPLD_VERSION; + u8 mask = MASK_ALL; + u8 mask_major = 0b11000000; + u8 mask_minor = 0b00111111; + u8 reg_val; + u8 major, minor, build; + + mutex_lock(&lpc_data->access_lock); + reg_val = _mask_shift(inb(reg), mask); + major = _mask_shift(reg_val, mask_major); + minor = _mask_shift(reg_val, mask_minor); + reg = REG_MB_CPLD_BUILD; + build = _mask_shift(inb(reg), mask); + len = sprintf(buf, "%d.%02d.%03d\n", major, minor, build); + mutex_unlock(&lpc_data->access_lock); + + BSP_LOG_R("reg=0x%03x, reg_val=0x%02x", reg, reg_val); + + return len; +} + +/* get mux_reset register value */ +static ssize_t read_mux_reset_callback(struct device *dev, + struct device_attribute *da, char *buf) +{ + int len = 0; + u16 reg = REG_MB_MUX_RESET; + u8 mask = 0b00011111; + u8 reg_val; + + mutex_lock(&lpc_data->access_lock); + reg_val=_mask_shift(inb(reg), mask); + BSP_LOG_R("reg=0x%03x, reg_val=0x%02x", reg, reg_val); + len=sprintf(buf, "%d\n", reg_val); + mutex_unlock(&lpc_data->access_lock); + + return len; +} + +/* set mux_reset register value */ +static ssize_t write_mux_reset_callback(struct device *dev, + struct device_attribute *da, const char *buf, size_t count) +{ + u8 val = 0; + u16 reg = REG_MB_MUX_RESET; + u8 reg_val = 0; + u8 mask = 0b00011111; + static int mux_reset_flag = 0; + + if (kstrtou8(buf, 0, &val) < 0) + return -EINVAL; + + if (mux_reset_flag == 0) { + if (val == 0) { + mutex_lock(&lpc_data->access_lock); + mux_reset_flag = 1; + BSP_LOG_W("i2c mux reset is triggered..."); + + reg_val = inb(reg); + outb((reg_val & ~mask), reg); + mdelay(LPC_MDELAY); + BSP_LOG_W("reg=0x%03x, reg_val=0x%02x", reg, reg_val & ~mask); + mdelay(500); + outb((reg_val | mask), reg); + mdelay(LPC_MDELAY); + BSP_LOG_W("reg=0x%03x, reg_val=0x%02x", reg, reg_val | mask); + mdelay(500); + mux_reset_flag = 0; + mutex_unlock(&lpc_data->access_lock); + } else { + return -EINVAL; + } + } else { + BSP_LOG_W("i2c mux is resetting... (ignore)"); + mutex_lock(&lpc_data->access_lock); + mutex_unlock(&lpc_data->access_lock); + } + + return count; +} + +/* get lpc register value */ +static ssize_t read_lpc_callback(struct device *dev, + struct device_attribute *da, char *buf) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + u16 reg = 0; + u8 mask = MASK_ALL; + + switch (attr->index) { + //CPU CPLD + case ATT_CPU_CPLD_VERSION: + reg = REG_CPU_CPLD_VERSION; + break; + case ATT_CPU_BIOS_BOOT_ROM: + reg = REG_CPU_STATUS_1; + mask = 0x80; + break; + case ATT_CPU_BIOS_BOOT_CFG: + reg = REG_CPU_CTRL_1; + mask = 0x80; + break; + case ATT_CPU_CPLD_BUILD: + reg = REG_CPU_CPLD_BUILD; + break; + //MB CPLD + case ATT_MB_BRD_ID_0: + reg = REG_MB_BRD_ID_0; + break; + case ATT_MB_BRD_ID_1: + reg = REG_MB_BRD_ID_1; + break; + case ATT_MB_CPLD_1_VERSION: + reg = REG_MB_CPLD_VERSION; + break; + case ATT_MB_CPLD_1_BUILD: + reg = REG_MB_CPLD_BUILD; + break; + case ATT_MB_BRD_SKU_ID: + reg = REG_MB_BRD_ID_0; + mask = 0xFF; + break; + case ATT_MB_BRD_HW_ID: + reg = REG_MB_BRD_ID_1; + mask = 0x03; + break; + case ATT_MB_BRD_ID_TYPE: + reg = REG_MB_BRD_ID_1; + mask = 0x80; + break; + case ATT_MB_BRD_BUILD_ID: + reg = REG_MB_BRD_ID_1; + mask = 0x38; + break; + case ATT_MB_BRD_DEPH_ID: + reg = REG_MB_BRD_ID_1; + mask = 0x04; + break; + case ATT_MB_MUX_CTRL: + reg = REG_MB_MUX_CTRL; + break; + //I2C Alert + case ATT_ALERT_STATUS: + reg = REG_ALERT_STATUS; + mask = 0x20; + break; +#if CPU_TYPE == CPU_BDE + case ATT_ALERT_DISABLE: + reg = REG_ALERT_DISABLE; + mask = 0x04; + break; +#endif + //BSP + case ATT_BSP_REG: + if (kstrtou16(bsp_reg, 0, ®) < 0) + return -EINVAL; + break; + default: + return -EINVAL; + } + return read_lpc_reg(reg, mask, buf); +} + +/* set lpc register value */ +static ssize_t write_lpc_callback(struct device *dev, + struct device_attribute *da, const char *buf, size_t count) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + u16 reg = 0; + u8 mask = MASK_ALL; + + switch (attr->index) { + case ATT_MB_MUX_CTRL: + reg = REG_MB_MUX_CTRL; + break; + default: + return -EINVAL; + } + return write_lpc_reg(reg, mask, buf, count); +} + +/* get bsp parameter value */ +static ssize_t read_bsp_callback(struct device *dev, + struct device_attribute *da, char *buf) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + int str_len=0; + char *str=NULL; + + switch (attr->index) { + case ATT_BSP_VERSION: + str = bsp_version; + str_len = sizeof(bsp_version); + break; + case ATT_BSP_DEBUG: + str = bsp_debug; + str_len = sizeof(bsp_debug); + break; + case ATT_BSP_REG: + str = bsp_reg; + str_len = sizeof(bsp_reg); + break; + default: + return -EINVAL; + } + return read_bsp(buf, str); +} + +/* set bsp parameter value */ +static ssize_t write_bsp_callback(struct device *dev, + struct device_attribute *da, const char *buf, size_t count) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + int str_len=0; + char *str=NULL; + u16 reg = 0; + u8 bsp_debug_u8 = 0; + + switch (attr->index) { + case ATT_BSP_VERSION: + str = bsp_version; + str_len = sizeof(str); + break; + case ATT_BSP_DEBUG: + str = bsp_debug; + str_len = sizeof(str); + break; + case ATT_BSP_REG: + if (kstrtou16(buf, 0, ®) < 0) + return -EINVAL; + + str = bsp_reg; + str_len = sizeof(str); + break; + default: + return -EINVAL; + } + + if (attr->index == ATT_BSP_DEBUG) { + if (kstrtou8(buf, 0, &bsp_debug_u8) < 0) { + return -EINVAL; + } else if (_config_bsp_log(bsp_debug_u8) < 0) { + return -EINVAL; + } + } + + return write_bsp(buf, str, str_len, count); +} + +static ssize_t write_bsp_pr_callback(struct device *dev, + struct device_attribute *da, const char *buf, size_t count) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + int str_len = strlen(buf); + + if(str_len <= 0) + return str_len; + + switch (attr->index) { + case ATT_BSP_PR_INFO: + BSP_PR(KERN_INFO, "%s", buf); + break; + case ATT_BSP_PR_ERR: + BSP_PR(KERN_ERR, "%s", buf); + break; + default: + return -EINVAL; + } + + return str_len; +} + +//SENSOR_DEVICE_ATTR - CPU +static SENSOR_DEVICE_ATTR(cpu_cpld_version, S_IRUGO, read_lpc_callback, NULL, ATT_CPU_CPLD_VERSION); +static SENSOR_DEVICE_ATTR(cpu_cpld_version_h, S_IRUGO, read_cpu_cpld_version_h, NULL, ATT_CPU_CPLD_VERSION_H); +static SENSOR_DEVICE_ATTR(boot_rom, S_IRUGO, read_lpc_callback, NULL, ATT_CPU_BIOS_BOOT_ROM); +static SENSOR_DEVICE_ATTR(boot_cfg, S_IRUGO, read_lpc_callback, NULL, ATT_CPU_BIOS_BOOT_CFG); +static SENSOR_DEVICE_ATTR(cpu_cpld_build, S_IRUGO, read_lpc_callback, NULL, ATT_CPU_CPLD_BUILD); +//SENSOR_DEVICE_ATTR - MB +static SENSOR_DEVICE_ATTR(board_id_0, S_IRUGO, read_lpc_callback, NULL, ATT_MB_BRD_ID_0); +static SENSOR_DEVICE_ATTR(board_id_1, S_IRUGO, read_lpc_callback, NULL, ATT_MB_BRD_ID_1); +static SENSOR_DEVICE_ATTR(mb_cpld_1_version, S_IRUGO, read_lpc_callback, NULL, ATT_MB_CPLD_1_VERSION); +static SENSOR_DEVICE_ATTR(mb_cpld_1_version_h, S_IRUGO, read_mb_cpld_1_version_h, NULL, ATT_MB_CPLD_1_VERSION_H); +static SENSOR_DEVICE_ATTR(mb_cpld_1_build, S_IRUGO, read_lpc_callback, NULL, ATT_MB_CPLD_1_BUILD); +static SENSOR_DEVICE_ATTR(mux_ctrl, S_IRUGO | S_IWUSR, read_lpc_callback, write_lpc_callback, ATT_MB_MUX_CTRL); +static SENSOR_DEVICE_ATTR(mux_reset, S_IRUGO | S_IWUSR, read_mux_reset_callback, write_mux_reset_callback, ATT_MB_MUX_RESET); +static SENSOR_DEVICE_ATTR(board_sku_id, S_IRUGO, read_lpc_callback, NULL, ATT_MB_BRD_SKU_ID); +static SENSOR_DEVICE_ATTR(board_hw_id, S_IRUGO, read_lpc_callback, NULL, ATT_MB_BRD_HW_ID); +static SENSOR_DEVICE_ATTR(board_id_type, S_IRUGO, read_lpc_callback, NULL, ATT_MB_BRD_ID_TYPE); +static SENSOR_DEVICE_ATTR(board_build_id, S_IRUGO, read_lpc_callback, NULL, ATT_MB_BRD_BUILD_ID); +static SENSOR_DEVICE_ATTR(board_deph_id, S_IRUGO, read_lpc_callback, NULL, ATT_MB_BRD_DEPH_ID); +//SENSOR_DEVICE_ATTR - I2C Alert +static SENSOR_DEVICE_ATTR(alert_status, S_IRUGO, read_lpc_callback, NULL, ATT_ALERT_STATUS); +#if CPU_TYPE == CPU_BDE +static SENSOR_DEVICE_ATTR(alert_disable, S_IRUGO, read_lpc_callback, NULL, ATT_ALERT_DISABLE); +#endif +//SENSOR_DEVICE_ATTR - BSP +static SENSOR_DEVICE_ATTR(bsp_version, S_IRUGO | S_IWUSR, read_bsp_callback, write_bsp_callback, ATT_BSP_VERSION); +static SENSOR_DEVICE_ATTR(bsp_debug, S_IRUGO | S_IWUSR, read_bsp_callback, write_bsp_callback, ATT_BSP_DEBUG); +static SENSOR_DEVICE_ATTR(bsp_pr_info, S_IWUSR, NULL, write_bsp_pr_callback, ATT_BSP_PR_INFO); +static SENSOR_DEVICE_ATTR(bsp_pr_err, S_IWUSR, NULL, write_bsp_pr_callback, ATT_BSP_PR_ERR); +static SENSOR_DEVICE_ATTR(bsp_reg, S_IRUGO | S_IWUSR, read_lpc_callback, write_bsp_callback, ATT_BSP_REG); + +static struct attribute *cpu_cpld_attrs[] = { + &sensor_dev_attr_cpu_cpld_version.dev_attr.attr, + &sensor_dev_attr_cpu_cpld_version_h.dev_attr.attr, + &sensor_dev_attr_cpu_cpld_build.dev_attr.attr, + NULL, +}; + +static struct attribute *mb_cpld_attrs[] = { + &sensor_dev_attr_board_id_0.dev_attr.attr, + &sensor_dev_attr_board_id_1.dev_attr.attr, + &sensor_dev_attr_mb_cpld_1_version.dev_attr.attr, + &sensor_dev_attr_mb_cpld_1_version_h.dev_attr.attr, + &sensor_dev_attr_mb_cpld_1_build.dev_attr.attr, + &sensor_dev_attr_board_sku_id.dev_attr.attr, + &sensor_dev_attr_board_hw_id.dev_attr.attr, + &sensor_dev_attr_board_id_type.dev_attr.attr, + &sensor_dev_attr_board_build_id.dev_attr.attr, + &sensor_dev_attr_board_deph_id.dev_attr.attr, + &sensor_dev_attr_mux_ctrl.dev_attr.attr, + &sensor_dev_attr_mux_reset.dev_attr.attr, + NULL, +}; + +static struct attribute *bios_attrs[] = { + &sensor_dev_attr_boot_rom.dev_attr.attr, + &sensor_dev_attr_boot_cfg.dev_attr.attr, + NULL, +}; + +static struct attribute *i2c_alert_attrs[] = { + &sensor_dev_attr_alert_status.dev_attr.attr, +#if CPU_TYPE == CPU_BDE + &sensor_dev_attr_alert_disable.dev_attr.attr, +#endif + NULL, +}; + +static struct attribute *bsp_attrs[] = { + &sensor_dev_attr_bsp_version.dev_attr.attr, + &sensor_dev_attr_bsp_debug.dev_attr.attr, + &sensor_dev_attr_bsp_pr_info.dev_attr.attr, + &sensor_dev_attr_bsp_pr_err.dev_attr.attr, + &sensor_dev_attr_bsp_reg.dev_attr.attr, + NULL, +}; + +static struct attribute_group cpu_cpld_attr_grp = { + .name = "cpu_cpld", + .attrs = cpu_cpld_attrs, +}; + +static struct attribute_group mb_cpld_attr_grp = { + .name = "mb_cpld", + .attrs = mb_cpld_attrs, +}; + +static struct attribute_group bios_attr_grp = { + .name = "bios", + .attrs = bios_attrs, +}; + +static struct attribute_group i2c_alert_attr_grp = { + .name = "i2c_alert", + .attrs = i2c_alert_attrs, +}; + +static struct attribute_group bsp_attr_grp = { + .name = "bsp", + .attrs = bsp_attrs, +}; + +static void lpc_dev_release( struct device * dev) +{ + return; +} + +static struct platform_device lpc_dev = { + .name = DRIVER_NAME, + .id = -1, + .dev = { + .release = lpc_dev_release, + } +}; + +static int lpc_drv_probe(struct platform_device *pdev) +{ + int i = 0, grp_num = 5; + int err[5] = {0}; + struct attribute_group *grp; + + lpc_data = devm_kzalloc(&pdev->dev, sizeof(struct lpc_data_s), + GFP_KERNEL); + if (!lpc_data) + return -ENOMEM; + + mutex_init(&lpc_data->access_lock); + + for (i=0; idev.kobj, grp); + if (err[i]) { + printk(KERN_ERR "Cannot create sysfs for group %s\n", grp->name); + goto exit; + } else { + continue; + } + } + + return 0; + +exit: + for (i=0; idev.kobj, grp); + if (!err[i]) { + //remove previous successful cases + continue; + } else { + //remove first failed case, then return + return err[i]; + } + } + return 0; +} + +static int lpc_drv_remove(struct platform_device *pdev) +{ + sysfs_remove_group(&pdev->dev.kobj, &cpu_cpld_attr_grp); + sysfs_remove_group(&pdev->dev.kobj, &mb_cpld_attr_grp); + sysfs_remove_group(&pdev->dev.kobj, &bios_attr_grp); + sysfs_remove_group(&pdev->dev.kobj, &i2c_alert_attr_grp); + sysfs_remove_group(&pdev->dev.kobj, &bsp_attr_grp); + + return 0; +} + +static struct platform_driver lpc_drv = { + .probe = lpc_drv_probe, + .remove = __exit_p(lpc_drv_remove), + .driver = { + .name = DRIVER_NAME, + }, +}; + +int lpc_init(void) +{ + int err = 0; + + err = platform_driver_register(&lpc_drv); + if (err) { + printk(KERN_ERR "%s(#%d): platform_driver_register failed(%d)\n", + __func__, __LINE__, err); + + return err; + } + + err = platform_device_register(&lpc_dev); + if (err) { + printk(KERN_ERR "%s(#%d): platform_device_register failed(%d)\n", + __func__, __LINE__, err); + platform_driver_unregister(&lpc_drv); + return err; + } + + return err; +} + +void lpc_exit(void) +{ + platform_driver_unregister(&lpc_drv); + platform_device_unregister(&lpc_dev); +} + +MODULE_AUTHOR("Leo Lin "); +MODULE_DESCRIPTION("x86_64_ufispace_s9301_32d_lpc driver"); +MODULE_LICENSE("GPL"); + +module_init(lpc_init); +module_exit(lpc_exit); diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s9301-32d/modules/x86-64-ufispace-s9301-32d-sys-eeprom.c b/platform/broadcom/sonic-platform-modules-ufispace/s9301-32d/modules/x86-64-ufispace-s9301-32d-sys-eeprom.c new file mode 100644 index 0000000000..3fa3ae4c96 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ufispace/s9301-32d/modules/x86-64-ufispace-s9301-32d-sys-eeprom.c @@ -0,0 +1,283 @@ +/* + * Copyright (C) 1998, 1999 Frodo Looijaard and + * Philip Edelbrock + * Copyright (C) 2003 Greg Kroah-Hartman + * Copyright (C) 2003 IBM Corp. + * Copyright (C) 2004 Jean Delvare + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +/* enable dev_dbg print out */ +//#define DEBUG + +#define __STDC_WANT_LIB_EXT1__ 1 +#include +#include +#include +#include +#include +#include +#include +#include + +#define _memset(s, c, n) memset(s, c, n) + +/* Addresses to scan */ +static const unsigned short normal_i2c[] = { /*0x50, 0x51, 0x52, 0x53, 0x54, + 0x55, 0x56, 0x57,*/ I2C_CLIENT_END }; + +/* Size of EEPROM in bytes */ +#define EEPROM_SIZE 512 + +#define SLICE_BITS (6) +#define SLICE_SIZE (1 << SLICE_BITS) +#define SLICE_NUM (EEPROM_SIZE/SLICE_SIZE) + +/* Each client has this additional data */ +struct eeprom_data { + struct mutex update_lock; + u8 valid; /* bitfield, bit!=0 if slice is valid */ + unsigned long last_updated[SLICE_NUM]; /* In jiffies, 8 slices */ + u8 data[EEPROM_SIZE]; /* Register values */ +}; + + +static void sys_eeprom_update_client(struct i2c_client *client, u8 slice) +{ + struct eeprom_data *data = i2c_get_clientdata(client); + int i, j; + int ret; + int addr; + + mutex_lock(&data->update_lock); + + if (!(data->valid & (1 << slice)) || + time_after(jiffies, data->last_updated[slice] + 300 * HZ)) { + dev_dbg(&client->dev, "Starting eeprom update, slice %u\n", slice); + + addr = slice << SLICE_BITS; + + ret = i2c_smbus_write_byte_data(client, (u8)((addr >> 8) & 0xFF), (u8)(addr & 0xFF)); + /* select the eeprom address */ + if (ret < 0) { + dev_err(&client->dev, "address set failed\n"); + goto exit; + } + + if (!i2c_check_functionality(client->adapter, I2C_FUNC_SMBUS_READ_BYTE)) { + goto exit; + } + + for (i = slice << SLICE_BITS; i < (slice + 1) << SLICE_BITS; i+= SLICE_SIZE) { + for (j = i; j < (i+SLICE_SIZE); j++) { + int res; + + res = i2c_smbus_read_byte(client); + if (res < 0) { + goto exit; + } + + data->data[j] = res & 0xFF; + } + } + + data->last_updated[slice] = jiffies; + data->valid |= (1 << slice); + } +exit: + mutex_unlock(&data->update_lock); +} + +static ssize_t sys_eeprom_read(struct file *filp, struct kobject *kobj, + struct bin_attribute *bin_attr, + char *buf, loff_t off, size_t count) +{ + struct i2c_client *client = to_i2c_client(container_of(kobj, struct device, kobj)); + struct eeprom_data *data = i2c_get_clientdata(client); + u8 slice; + + if (off > EEPROM_SIZE) { + return 0; + } + if (off + count > EEPROM_SIZE) { + count = EEPROM_SIZE - off; + } + if (count == 0) { + return 0; + } + + /* Only refresh slices which contain requested bytes */ + for (slice = off >> SLICE_BITS; slice <= (off + count - 1) >> SLICE_BITS; slice++) { + sys_eeprom_update_client(client, slice); + } + + memcpy(buf, &data->data[off], count); + + return count; +} + +static ssize_t sys_eeprom_write(struct file *filp, struct kobject *kobj, + struct bin_attribute *bin_attr, + char *buf, loff_t off, size_t count) +{ + struct i2c_client *client = to_i2c_client(container_of(kobj, struct device, kobj)); + struct eeprom_data *data = i2c_get_clientdata(client); + int ret; + int i; + u8 cmd; + u16 value16; + + dev_dbg(&client->dev, "sys_eeprom_write off=%d, count=%d\n", (int)off, (int)count); + + if (off > EEPROM_SIZE) { + return 0; + } + if (off + count > EEPROM_SIZE) { + count = EEPROM_SIZE - off; + } + if (count == 0) { + return 0; + } + + mutex_lock(&data->update_lock); + + for(i=0; i < count; i++) { + /* write command */ + cmd = (off >> 8) & 0xff; + value16 = off & 0xff; + value16 |= buf[i] << 8; + ret = i2c_smbus_write_word_data(client, cmd, value16); + + if (ret < 0) { + dev_err(&client->dev, "write address failed at %d \n", (int)off); + goto exit; + } + + off++; + + /* need to wait for write complete */ + udelay(10000); + } +exit: + mutex_unlock(&data->update_lock); + /* force to update client when reading */ + for(i=0; i < SLICE_NUM; i++) { + data->last_updated[i] = 0; + } + + return count; +} + +static struct bin_attribute sys_eeprom_attr = { + .attr = { + .name = "eeprom", + .mode = S_IRUGO | S_IWUSR, + }, + .size = EEPROM_SIZE, + .read = sys_eeprom_read, + .write = sys_eeprom_write, +}; + +/* Return 0 if detection is successful, -ENODEV otherwise */ +static int sys_eeprom_detect(struct i2c_client *client, struct i2c_board_info *info) +{ + struct i2c_adapter *adapter = client->adapter; + + /* EDID EEPROMs are often 24C00 EEPROMs, which answer to all + addresses 0x50-0x57, but we only care about 0x51 and 0x55. So decline + attaching to addresses >= 0x56 on DDC buses */ + if (!(adapter->class & I2C_CLASS_SPD) && client->addr >= 0x56) { + return -ENODEV; + } + + if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_READ_BYTE) + && !i2c_check_functionality(adapter, I2C_FUNC_SMBUS_WRITE_BYTE_DATA)) { + return -ENODEV; + } + + strlcpy(info->type, "eeprom", I2C_NAME_SIZE); + + return 0; +} + +static int sys_eeprom_probe(struct i2c_client *client, + const struct i2c_device_id *id) +{ + struct eeprom_data *data; + int err; + + if (!(data = kzalloc(sizeof(struct eeprom_data), GFP_KERNEL))) { + err = -ENOMEM; + goto exit; + } + +#ifdef __STDC_LIB_EXT1__ + memset_s(data->data, EEPROM_SIZE, 0xff, EEPROM_SIZE); +#else + _memset(data->data, 0xff, EEPROM_SIZE); +#endif + + i2c_set_clientdata(client, data); + mutex_init(&data->update_lock); + + /* create the sysfs eeprom file */ + err = sysfs_create_bin_file(&client->dev.kobj, &sys_eeprom_attr); + if (err) { + goto exit_kfree; + } + + return 0; + +exit_kfree: + kfree(data); +exit: + return err; +} + +#if LINUX_VERSION_CODE < KERNEL_VERSION(6, 1, 0) +static int +#else +static void +#endif +sys_eeprom_remove(struct i2c_client *client) +{ + sysfs_remove_bin_file(&client->dev.kobj, &sys_eeprom_attr); + kfree(i2c_get_clientdata(client)); + +#if LINUX_VERSION_CODE < KERNEL_VERSION(6, 1, 0) + return 0; +#endif +} + +static const struct i2c_device_id sys_eeprom_id[] = { + { "sys_eeprom", 0 }, + { } +}; + +static struct i2c_driver sys_eeprom_driver = { + .driver = { + .name = "sys_eeprom", + }, + .probe = sys_eeprom_probe, + .remove = sys_eeprom_remove, + .id_table = sys_eeprom_id, + + .class = I2C_CLASS_DDC | I2C_CLASS_SPD, + .detect = sys_eeprom_detect, + .address_list = normal_i2c, +}; + +module_i2c_driver(sys_eeprom_driver); + +MODULE_AUTHOR("Wade "); +MODULE_DESCRIPTION("UfiSpace Mother Board EEPROM driver"); +MODULE_LICENSE("GPL"); diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s9301-32d/service/pddf-platform-init.service b/platform/broadcom/sonic-platform-modules-ufispace/s9301-32d/service/pddf-platform-init.service new file mode 120000 index 0000000000..0fd9f25b6c --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ufispace/s9301-32d/service/pddf-platform-init.service @@ -0,0 +1 @@ +../../../../pddf/i2c/service/pddf-platform-init.service \ No newline at end of file diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s9301-32d/sonic_platform/__init__.py b/platform/broadcom/sonic-platform-modules-ufispace/s9301-32d/sonic_platform/__init__.py new file mode 100644 index 0000000000..593867d31c --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ufispace/s9301-32d/sonic_platform/__init__.py @@ -0,0 +1,4 @@ +# All the derived classes for PDDF +__all__ = ["platform", "chassis", "sfp", "psu", "thermal", "fan"] +from . import platform + diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s9301-32d/sonic_platform/chassis.py b/platform/broadcom/sonic-platform-modules-ufispace/s9301-32d/sonic_platform/chassis.py new file mode 100644 index 0000000000..6c77e2424b --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ufispace/s9301-32d/sonic_platform/chassis.py @@ -0,0 +1,189 @@ +#!/usr/bin/env python + +############################################################################# +# PDDF +# Module contains an implementation of SONiC Chassis API +# +############################################################################# + +try: + import time + from sonic_platform_pddf_base.pddf_chassis import PddfChassis + from sonic_py_common import device_info +except ImportError as e: + raise ImportError(str(e) + "- required module not found") + +NUM_COMPONENT = 5 + +class Chassis(PddfChassis): + """ + PDDF Platform-specific Chassis class + """ + + port_dict = {} + + def __init__(self, pddf_data=None, pddf_plugin_data=None): + PddfChassis.__init__(self, pddf_data, pddf_plugin_data) + self._initialize_components() + + def _initialize_components(self): + from sonic_platform.component import Component + for index in range(NUM_COMPONENT): + component = Component(index) + self._component_list.append(component) + + # Provide the functions/variables below for which implementation is to be overwritten + + def get_name(self): + """ + Retrieves the name of the chassis + Returns: + string: The name of the chassis + """ + return self._eeprom.platform_name_str() + + def initizalize_system_led(self): + return True + + def get_status_led(self): + return self.get_system_led("SYS_LED") + + def get_change_event(self, timeout=0): + """ + Returns a nested dictionary containing all devices which have + experienced a change at chassis level + Args: + timeout: Timeout in milliseconds (optional). If timeout == 0, + this method will block until a change is detected. + Returns: + (bool, dict): + - bool: True if call successful, False if not; + - dict: A nested dictionary where key is a device type, + value is a dictionary with key:value pairs in the format of + {'device_id':'device_event'}, where device_id is the device ID + for this device and device_event. + The known devices's device_id and device_event was defined as table below. + ----------------------------------------------------------------- + device | device_id | device_event | annotate + ----------------------------------------------------------------- + 'sfp' '' '0' Sfp removed + '1' Sfp inserted + '2' I2C bus stuck + '3' Bad eeprom + '4' Unsupported cable + '5' High Temperature + '6' Bad cable + -------------------------------------------------------------------- + Ex. 'sfp':{'11':'0', '12':'1'}, + Indicates that: + sfp 11 has been removed, sfp 12 has been inserted. + Note: For sfp, when event 3-6 happened, the module will not be avalaible, + XCVRD shall stop to read eeprom before SFP recovered from error status. + """ + + change_event_dict = {"sfp": {}} + + start_time = time.time() + forever = False + + if timeout == 0: + forever = True + elif timeout > 0: + timeout = timeout / float(1000) # Convert to secs + else: + print("get_change_event:Invalid timeout value", timeout) + return False, change_event_dict + + end_time = start_time + timeout + if start_time > end_time: + print( + "get_change_event:" "time wrap / invalid timeout value", + timeout, + ) + return False, change_event_dict # Time wrap or possibly incorrect timeout + try: + while timeout >= 0: + # check for sfp + sfp_change_dict = self.get_transceiver_change_event() + + if sfp_change_dict: + change_event_dict["sfp"] = sfp_change_dict + return True, change_event_dict + if forever: + time.sleep(1) + else: + timeout = end_time - time.time() + if timeout >= 1: + time.sleep(1) # We poll at 1 second granularity + else: + if timeout > 0: + time.sleep(timeout) + return True, change_event_dict + except Exception as e: + print(e) + print("get_change_event: Should not reach here.") + return False, change_event_dict + + def get_transceiver_change_event(self, timeout=0): + current_port_dict = {} + ret_dict = {} + + # Check for OIR events and return ret_dict + for index in range(self.platform_inventory['num_ports']): + if self._sfp_list[index].get_presence(): + current_port_dict[index] = self.plugin_data['XCVR']['plug_status']['inserted'] + else: + current_port_dict[index] = self.plugin_data['XCVR']['plug_status']['removed'] + + if len(self.port_dict) == 0: # first time + self.port_dict = current_port_dict + return {} + + if current_port_dict == self.port_dict: + return {} + + # Update reg value + for index, status in current_port_dict.items(): + if self.port_dict[index] != status: + ret_dict[index] = status + #ret_dict[str(index)] = status + self.port_dict = current_port_dict + for index, status in ret_dict.items(): + if int(status) == 1: + pass + #self._sfp_list[int(index)].check_sfp_optoe_type() + return ret_dict + + def get_reboot_cause(self): + """ + Retrieves the cause of the previous reboot + + Returns: + A tuple (string, string) where the first element is a string + containing the cause of the previous reboot. This string must be + one of the predefined strings in this class. If the first string + is "REBOOT_CAUSE_HARDWARE_OTHER", the second string can be used + to pass a description of the reboot cause. + """ + + reboot_cause_path = self.plugin_data['REBOOT_CAUSE']['reboot_cause_file'] + + try: + with open(reboot_cause_path, 'r', errors='replace') as fd: + data = fd.read() + sw_reboot_cause = data.strip() + except IOError: + sw_reboot_cause = "Unknown" + + return ('REBOOT_CAUSE_NON_HARDWARE', sw_reboot_cause) + + def get_serial_number(self): + """ + Retrieves the hardware serial number for the chassis + + Returns: + A string containing the hardware serial number for this + chassis. + """ + + return self.get_serial() \ No newline at end of file diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s9301-32d/sonic_platform/component.py b/platform/broadcom/sonic-platform-modules-ufispace/s9301-32d/sonic_platform/component.py new file mode 100644 index 0000000000..b94a10d616 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ufispace/s9301-32d/sonic_platform/component.py @@ -0,0 +1,131 @@ +############################################################################# +# +# Component contains an implementation of SONiC Platform Base API and +# provides the components firmware management function +# +############################################################################# + +try: + import subprocess + from sonic_platform_base.component_base import ComponentBase +except ImportError as e: + raise ImportError(str(e) + "- required module not found") + +CPLD_SYSFS = { + "CPLD1": "/sys/kernel/pddf/devices/sysstatus/sysstatus_data/cpld1_version", + "CPLD2": "/sys/kernel/pddf/devices/sysstatus/sysstatus_data/cpld2_version", + "CPLD3": "/sys/kernel/pddf/devices/sysstatus/sysstatus_data/cpld3_version", +} + +BMC_CMDS = { + "BMC": "bash -c 'tmp=$(ipmitool raw 0x6 0x1) && r=($(echo \"$tmp\" | cut -d \" \" -f 4,5,16,15,14)) && echo ${r[0]}.${r[1]}.${r[4]}.${r[3]}${r[2]}'", +} + +BIOS_VERSION_PATH = "/sys/class/dmi/id/bios_version" +COMPONENT_LIST= [ + ("CPLD1", "CPLD 1"), + ("CPLD2", "CPLD 2"), + ("CPLD3", "CPLD 3"), + ("BIOS", "Basic Input/Output System"), + ("BMC", "BMC"), + +] + +class Component(ComponentBase): + """Platform-specific Component class""" + + DEVICE_TYPE = "component" + + def __init__(self, component_index=0): + self.index = component_index + self.name = self.get_name() + + def _run_command(self, command): + # Run bash command and print output to stdout + try: + process = subprocess.Popen( + shlex.split(command), stdout=subprocess.PIPE) + while True: + output = process.stdout.readline() + if output == '' and process.poll() is not None: + break + rc = process.poll() + if rc != 0: + return False + except Exception: + return False + return True + + def _get_bios_version(self): + # Retrieves the BIOS firmware version + try: + with open(BIOS_VERSION_PATH, 'r') as fd: + bios_version = fd.read() + return bios_version.strip() + except Exception as e: + return None + + def _get_cpld_version(self): + # Retrieves the CPLD firmware version + cpld_version = dict() + for cpld_name in CPLD_SYSFS: + cmd = "cat {}".format(CPLD_SYSFS[cpld_name]) + status, value = subprocess.getstatusoutput(cmd) + if not status: + cpld_version_raw = value.rstrip() + cpld_version_int = int(cpld_version_raw,16) + cpld_version[cpld_name] = "{}.{:02d}".format(cpld_version_int >> 6, + cpld_version_int & 0b00111111) + + return cpld_version + + def _get_bmc_version(self): + # Retrieves the BMC firmware version + status, value = subprocess.getstatusoutput(BMC_CMDS["BMC"]) + if not status: + return value + else: + return None + + def get_name(self): + """ + Retrieves the name of the component + Returns: + A string containing the name of the component + """ + return COMPONENT_LIST[self.index][0] + + def get_description(self): + """ + Retrieves the description of the component + Returns: + A string containing the description of the component + """ + return COMPONENT_LIST[self.index][1] + + def get_firmware_version(self): + """ + Retrieves the firmware version of module + Returns: + string: The firmware versions of the module + """ + fw_version = None + + if self.name == "BIOS": + fw_version = self._get_bios_version() + elif "CPLD" in self.name: + cpld_version = self._get_cpld_version() + fw_version = cpld_version.get(self.name) + elif self.name == "BMC": + fw_version = self._get_bmc_version() + return fw_version + + def install_firmware(self, image_path): + """ + Install firmware to module + Args: + image_path: A string, path to firmware image + Returns: + A boolean, True if install successfully, False if not + """ + raise NotImplementedError diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s9301-32d/sonic_platform/eeprom.py b/platform/broadcom/sonic-platform-modules-ufispace/s9301-32d/sonic_platform/eeprom.py new file mode 100644 index 0000000000..90ab1c779a --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ufispace/s9301-32d/sonic_platform/eeprom.py @@ -0,0 +1,21 @@ +#!/usr/bin/env python + +try: + from sonic_platform_pddf_base.pddf_eeprom import PddfEeprom +except ImportError as e: + raise ImportError(str(e) + "- required module not found") + + +class Eeprom(PddfEeprom): + + def __init__(self, pddf_data=None, pddf_plugin_data=None): + PddfEeprom.__init__(self, pddf_data, pddf_plugin_data) + + # Provide the functions/variables below for which implementation is to be overwritten + + def platform_name_str(self): + (is_valid, results) = self.get_tlv_field(self.eeprom_data, self._TLV_CODE_PLATFORM_NAME) + if not is_valid: + return "N/A" + + return results[2].decode('ascii') \ No newline at end of file diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s9301-32d/sonic_platform/fan.py b/platform/broadcom/sonic-platform-modules-ufispace/s9301-32d/sonic_platform/fan.py new file mode 100644 index 0000000000..3082de54a1 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ufispace/s9301-32d/sonic_platform/fan.py @@ -0,0 +1,172 @@ +#!/usr/bin/env python + + +try: + from sonic_platform_pddf_base.pddf_fan import PddfFan +except ImportError as e: + raise ImportError(str(e) + "- required module not found") + + +class Fan(PddfFan): + """PDDF Platform-Specific Fan class""" + + def __init__(self, tray_idx, fan_idx=0, pddf_data=None, pddf_plugin_data=None, is_psu_fan=False, psu_index=0): + # idx is 0-based + PddfFan.__init__(self, tray_idx, fan_idx, pddf_data, pddf_plugin_data, is_psu_fan, psu_index) + + # Provide the functions/variables below for which implementation is to be overwritten + # Since psu_fan airflow direction cant be read from sysfs, it is fixed as 'F2B' or 'intake' + + def get_speed(self): + """ + Retrieves the speed of fan as a percentage of full speed + + Returns: + An integer, the percentage of full fan speed, in the range 0 (off) + to 100 (full speed) + """ + speed_percentage = 0 + if self.is_psu_fan: + attr = "psu_fan{}_speed_rpm".format(self.fan_index) + device = "PSU{}".format(self.fans_psu_index) + max_speed = int(self.plugin_data['PSU']['PSU_FAN_MAX_SPEED']) + else: + if self.fan_index == 1: + pos = "f" + max_speed = int(self.plugin_data['FAN']['FAN_F_MAX_SPEED']) + else: + pos = "r" + max_speed = int(self.plugin_data['FAN']['FAN_R_MAX_SPEED']) + attr = "fan{}_{}_speed_rpm".format(self.fantray_index, pos) + device = "FAN-CTRL" + + output = self.pddf_obj.get_attr_name_output(device, attr) + if not output: + return speed_percentage + + output['status'] = output['status'].rstrip() + if output['status'].isalpha(): + return speed_percentage + else: + speed = int(float(output['status'])) + + speed_percentage = round((speed*100)/max_speed) + + return min(speed_percentage, 100) + + def get_speed_rpm(self): + """ + Retrieves the speed of fan in RPM + + Returns: + An integer, Speed of fan in RPM + """ + rpm_speed = 0 + if self.is_psu_fan: + attr = "psu_fan{}_speed_rpm".format(self.fan_index) + device = "PSU{}".format(self.fans_psu_index) + else: + if self.fan_index == 1: + pos = "f" + else: + pos = "r" + attr = "fan{}_{}_speed_rpm".format(self.fantray_index, pos) + device = "FAN-CTRL" + + output = self.pddf_obj.get_attr_name_output(device, attr) + + if output is None: + return rpm_speed + + output['status'] = output['status'].rstrip() + if output['status'].isalpha(): + return rpm_speed + else: + rpm_speed = int(float(output['status'])) + + return rpm_speed + + def get_direction(self): + """ + Retrieves the direction of fan + Returns: + A string, either FAN_DIRECTION_INTAKE or FAN_DIRECTION_EXHAUST + depending on fan direction + """ + direction = self.FAN_DIRECTION_INTAKE + if self.is_psu_fan: + attr = "psu_fan{}_dir".format(self.fan_index) + device = "PSU{}".format(self.fans_psu_index) + else: + attr = "fan{}_dir".format(self.fantray_index) + device = "FAN-CTRL" + + output = self.pddf_obj.get_attr_name_output(device, attr) + if not output: + return direction + + mode = output['mode'] + val = output['status'].strip() + vmap = self.plugin_data['FAN']['direction'][mode]['valmap'] + + if val in vmap: + direction = vmap[val] + + return direction + + def get_presence(self): + """ + Retrieves the presence of the device + Returns: + bool: True if device is present, False if not + """ + presence = False + if self.is_psu_fan: + attr = "psu_present" + device = "PSU{}".format(self.fans_psu_index) + else: + attr = "fan{}_present".format(self.fantray_index) + device = "FAN-CTRL" + + output = self.pddf_obj.get_attr_name_output(device, attr) + if not output: + return presence + + + mode = output['mode'] + val = output['status'].strip() + + if self.is_psu_fan: + vmap = self.plugin_data['PSU']['psu_present'][mode]['valmap'] + else: + vmap = self.plugin_data['FAN']['present'][mode]['valmap'] + + if val in vmap: + presence = vmap[val] + + return presence + + def get_target_speed(self): + """ + Retrieves the target (expected) speed of the fan + Returns: + An integer, the percentage of full fan speed, in the range 0 (off) + to 100 (full speed) + """ + return self.get_speed() + + def set_speed(self, speed): + """ + Sets the fan speed + + Args: + speed: An integer, the percentage of full fan speed to set fan to, + in the range 0 (off) to 100 (full speed) + + Returns: + A boolean, True if speed is set successfully, False if not + """ + + print("Setting Fan speed is not allowed") + return False + diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s9301-32d/sonic_platform/fan_drawer.py b/platform/broadcom/sonic-platform-modules-ufispace/s9301-32d/sonic_platform/fan_drawer.py new file mode 100644 index 0000000000..3b9bb607f6 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ufispace/s9301-32d/sonic_platform/fan_drawer.py @@ -0,0 +1,17 @@ +#!/usr/bin/env python + + +try: + from sonic_platform_pddf_base.pddf_fan_drawer import PddfFanDrawer +except ImportError as e: + raise ImportError(str(e) + "- required module not found") + + +class FanDrawer(PddfFanDrawer): + """PDDF Platform-Specific Fan-Drawer class""" + + def __init__(self, tray_idx, pddf_data=None, pddf_plugin_data=None): + # idx is 0-based + PddfFanDrawer.__init__(self, tray_idx, pddf_data, pddf_plugin_data) + + # Provide the functions/variables below for which implementation is to be overwritten diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s9301-32d/sonic_platform/platform.py b/platform/broadcom/sonic-platform-modules-ufispace/s9301-32d/sonic_platform/platform.py new file mode 100644 index 0000000000..406b1179ae --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ufispace/s9301-32d/sonic_platform/platform.py @@ -0,0 +1,25 @@ +#!/usr/bin/env python + +############################################################################# +# PDDF +# Module contains an implementation of SONiC Platform Base API and +# provides the platform information +# +############################################################################# + + +try: + from sonic_platform_pddf_base.pddf_platform import PddfPlatform +except ImportError as e: + raise ImportError(str(e) + "- required module not found") + + +class Platform(PddfPlatform): + """ + PDDF Platform-Specific Platform Class + """ + + def __init__(self): + PddfPlatform.__init__(self) + + # Provide the functions/variables below for which implementation is to be overwritten diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s9301-32d/sonic_platform/psu.py b/platform/broadcom/sonic-platform-modules-ufispace/s9301-32d/sonic_platform/psu.py new file mode 100644 index 0000000000..3e213415f3 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ufispace/s9301-32d/sonic_platform/psu.py @@ -0,0 +1,56 @@ +#!/usr/bin/env python + + +try: + from sonic_platform_pddf_base.pddf_psu import PddfPsu +except ImportError as e: + raise ImportError (str(e) + "- required module not found") + + +class Psu(PddfPsu): + """PDDF Platform-Specific PSU class""" + + PLATFORM_PSU_CAPACITY = 1300 + + def __init__(self, index, pddf_data=None, pddf_plugin_data=None): + PddfPsu.__init__(self, index, pddf_data, pddf_plugin_data) + + # Provide the functions/variables below for which implementation is to be overwritten + def get_maximum_supplied_power(self): + """ + Retrieves the maximum supplied power by PSU (or PSU capacity) + Returns: + A float number, the maximum power output in Watts. + e.g. 1200.1 + """ + return float(self.PLATFORM_PSU_CAPACITY) + + def get_power(self): + """ + Retrieves current energy supplied by PSU + + Returns: + A float number, the power in watts, + e.g. 302.6 + """ + + # power is returned in micro watts + return round(float(self.get_voltage()*self.get_current()), 2) + + def get_capacity(self): + """ + Retrieves the maximum supplied power by PSU (or PSU capacity) + Returns: + A float number, the maximum power output in Watts. + e.g. 1200.1 + """ + return self.get_maximum_supplied_power() + + def get_type(self): + """ + Gets the type of the PSU + + Returns: + A string, the type of PSU (AC/DC) + """ + return self.plugin_data['PSU']['DEFAULT_TYPE'] \ No newline at end of file diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s9301-32d/sonic_platform/sfp.py b/platform/broadcom/sonic-platform-modules-ufispace/s9301-32d/sonic_platform/sfp.py new file mode 100644 index 0000000000..c7919482f6 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ufispace/s9301-32d/sonic_platform/sfp.py @@ -0,0 +1,31 @@ +#!/usr/bin/env python + +try: + from sonic_platform_pddf_base.pddf_sfp import PddfSfp +except ImportError as e: + raise ImportError (str(e) + "- required module not found") + + +class Sfp(PddfSfp): + """ + PDDF Platform-Specific Sfp class + """ + + def __init__(self, index, pddf_data=None, pddf_plugin_data=None): + PddfSfp.__init__(self, index, pddf_data, pddf_plugin_data) + self.index = index + + # Provide the functions/variables below for which implementation is to be overwritten + + def get_error_description(self): + """ + Retrives the error descriptions of the SFP module + Returns: + String that represents the current error descriptions of vendor specific errors + In case there are multiple errors, they should be joined by '|', + like: "Bad EEPROM|Unsupported cable" + """ + if not self.get_presence(): + return self.SFP_STATUS_UNPLUGGED + + return self.SFP_STATUS_OK diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s9301-32d/sonic_platform/thermal.py b/platform/broadcom/sonic-platform-modules-ufispace/s9301-32d/sonic_platform/thermal.py new file mode 100644 index 0000000000..77d6ec7ae8 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ufispace/s9301-32d/sonic_platform/thermal.py @@ -0,0 +1,17 @@ +#!/usr/bin/env python + + +try: + from sonic_platform_pddf_base.pddf_thermal import PddfThermal +except ImportError as e: + raise ImportError(str(e) + "- required module not found") + + + +class Thermal(PddfThermal): + """PDDF Platform-Specific Thermal class""" + + def __init__(self, index, pddf_data=None, pddf_plugin_data=None, is_psu_thermal=False, psu_index=0): + PddfThermal.__init__(self, index, pddf_data, pddf_plugin_data, is_psu_thermal, psu_index) + + # Provide the functions/variables below for which implementation is to be overwritten diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s9301-32d/sonic_platform_setup.py b/platform/broadcom/sonic-platform-modules-ufispace/s9301-32d/sonic_platform_setup.py new file mode 100644 index 0000000000..3661c84a0c --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ufispace/s9301-32d/sonic_platform_setup.py @@ -0,0 +1,27 @@ +from setuptools import setup + +setup( + name='sonic-platform', + version='1.0', + description='SONiC platform API implementation on ufispace platform', + license='Apache 2.0', + author='SONiC Team', + author_email='linuxnetdev@microsoft.com', + url='https://github.com/Azure/sonic-buildimage', + maintainer='Leo Lin', + maintainer_email='leo.yt.lin@ufispace.com', + packages=['sonic_platform'], + classifiers=[ + 'Development Status :: 3 - Alpha', + 'Environment :: Plugins', + 'Intended Audience :: Developers', + 'Intended Audience :: Information Technology', + 'Intended Audience :: System Administrators', + 'License :: OSI Approved :: Apache Software License', + 'Natural Language :: English', + 'Operating System :: POSIX :: Linux', + 'Programming Language :: Python :: 3.7', + 'Topic :: Utilities', + ], + keywords='sonic SONiC platform PLATFORM', +) diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s9301-32d/utils/pddf_post_device_create.sh b/platform/broadcom/sonic-platform-modules-ufispace/s9301-32d/utils/pddf_post_device_create.sh new file mode 100755 index 0000000000..e4de7ae366 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ufispace/s9301-32d/utils/pddf_post_device_create.sh @@ -0,0 +1,6 @@ +#!/bin/bash +#disable bmc watchdog +timeout 3 ipmitool mc watchdog off + +echo 1 > /sys/kernel/pddf/devices/sysstatus/sysstatus_data/port_led_clr_ctrl +echo "PDDF device post-create completed" diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s9301-32d/utils/pddf_post_driver_install.sh b/platform/broadcom/sonic-platform-modules-ufispace/s9301-32d/utils/pddf_post_driver_install.sh new file mode 100755 index 0000000000..ed2559977e --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ufispace/s9301-32d/utils/pddf_post_driver_install.sh @@ -0,0 +1,2 @@ +#!/bin/bash +echo "PDDF driver post-install completed" diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s9301-32d/utils/pddf_switch_svc.py b/platform/broadcom/sonic-platform-modules-ufispace/s9301-32d/utils/pddf_switch_svc.py new file mode 100755 index 0000000000..3be0d61b5a --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ufispace/s9301-32d/utils/pddf_switch_svc.py @@ -0,0 +1,86 @@ +#!/usr/bin/env python +# Script to stop and start the respective platforms default services. +# This will be used while switching the pddf->non-pddf mode and vice versa +import commands + +def check_pddf_support(): + return True + +def stop_platform_svc(): + + ''' + status, output = commands.getstatusoutput("systemctl stop s9301-32d-platform-monitor-fan.service") + if status: + print "Stop s9301-32d-platform-fan.service failed %d"%status + return False + + status, output = commands.getstatusoutput("systemctl stop s9301-32d-platform-monitor-psu.service") + if status: + print "Stop s9301-32d-platform-psu.service failed %d"%status + return False + + status, output = commands.getstatusoutput("systemctl stop s9301-32d-platform-monitor.service") + if status: + print "Stop s9301-32d-platform-init.service failed %d"%status + return False + status, output = commands.getstatusoutput("systemctl disable s9301-32d-platform-monitor.service") + if status: + print "Disable s9301-32d-platform-monitor.service failed %d"%status + return False + ''' + + status, output = commands.getstatusoutput("/usr/local/bin/platform_utility.py deinit") + if status: + print "platform_utility.py deinit command failed %d"%status + return False + + # HACK , stop the pddf-platform-init service if it is active + status, output = commands.getstatusoutput("systemctl stop pddf-platform-init.service") + if status: + print "Stop pddf-platform-init.service along with other platform serives failed %d"%status + return False + + return True + +def start_platform_svc(): + + status, output = commands.getstatusoutput("/usr/local/bin/platform_utility.py init") + if status: + print "platform_utility.py init command failed %d"%status + return False + + ''' + status, output = commands.getstatusoutput("systemctl enable s9301-32d-platform-monitor.service") + if status: + print "Enable s9301-32d-platform-monitor.service failed %d"%status + return False + status, output = commands.getstatusoutput("systemctl start s9301-32d-platform-monitor-fan.service") + if status: + print "Start s9301-32d-platform-monitor-fan.service failed %d"%status + return False + + status, output = commands.getstatusoutput("systemctl start s9301-32d-platform-monitor-psu.service") + if status: + print "Start s9301-32d-platform-monitor-psu.service failed %d"%status + return False + ''' + return True + +def start_platform_pddf(): + + status, output = commands.getstatusoutput("systemctl start pddf-platform-init.service") + if status: + print "Start pddf-platform-init.service failed %d"%status + return False + + return True + +def stop_platform_pddf(): + + status, output = commands.getstatusoutput("systemctl stop pddf-platform-init.service") + if status: + print "Stop pddf-platform-init.service failed %d"%status + return False + + return True + diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s9301-32db/modules/Makefile b/platform/broadcom/sonic-platform-modules-ufispace/s9301-32db/modules/Makefile new file mode 100644 index 0000000000..2f8a4deb8b --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ufispace/s9301-32db/modules/Makefile @@ -0,0 +1,6 @@ + +MODULE_NAME = x86-64-ufispace-s9301-32db-cpld.o x86-64-ufispace-s9301-32db-sys-eeprom.o x86-64-ufispace-s9301-32db-lpc.o pddf_custom_sysstatus_module.o +obj-m := $(MODULE_NAME) + +CFLAGS_pddf_custom_sysstatus_module.o := -I$(M)/../../../../pddf/i2c/modules/include +KBUILD_EXTRA_SYMBOLS := $(M)/../../../../pddf/i2c/Module.symvers.PDDF diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s9301-32db/modules/pddf_custom_sysstatus_module.c b/platform/broadcom/sonic-platform-modules-ufispace/s9301-32db/modules/pddf_custom_sysstatus_module.c new file mode 100644 index 0000000000..40db6aba66 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ufispace/s9301-32db/modules/pddf_custom_sysstatus_module.c @@ -0,0 +1,266 @@ +/* + * Copyright 2019 Broadcom. + * The term Broadcom refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * + * A pddf kernel module for system status registers + */ + +#define __STDC_WANT_LIB_EXT1__ 1 +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include "../../../../pddf/i2c/modules/include/pddf_client_defs.h" +#include "../../../../pddf/i2c/modules/include/pddf_sysstatus_defs.h" + +#define _memset(s, c, n) memset(s, c, n) + +SYSSTATUS_DATA sysstatus_data = {0}; + +extern int board_i2c_cpld_read(unsigned short cpld_addr, u8 reg); +extern int board_i2c_cpld_write(unsigned short cpld_addr, u8 reg, u8 value); + +static ssize_t do_attr_operation(struct device *dev, struct device_attribute *da, const char *buf, size_t count); +ssize_t show_sysstatus_data(struct device *dev, struct device_attribute *da, char *buf); +ssize_t store_sysstatus_data(struct device *dev, struct device_attribute *da, const char *buf, size_t count); + + +PDDF_DATA_ATTR(attr_name, S_IWUSR|S_IRUGO, show_pddf_data, store_pddf_data, PDDF_CHAR, 32, + (void*)&sysstatus_data.sysstatus_addr_attr.aname, NULL); +PDDF_DATA_ATTR(attr_devaddr, S_IWUSR|S_IRUGO, show_pddf_data, store_pddf_data, PDDF_UINT32, + sizeof(uint32_t), (void*)&sysstatus_data.sysstatus_addr_attr.devaddr , NULL); +PDDF_DATA_ATTR(attr_offset, S_IWUSR|S_IRUGO, show_pddf_data, store_pddf_data, PDDF_UINT32, + sizeof(uint32_t), (void*)&sysstatus_data.sysstatus_addr_attr.offset, NULL); +PDDF_DATA_ATTR(attr_mask, S_IWUSR|S_IRUGO, show_pddf_data, store_pddf_data, PDDF_UINT32, + sizeof(uint32_t), (void*)&sysstatus_data.sysstatus_addr_attr.mask , NULL); +PDDF_DATA_ATTR(attr_len, S_IWUSR|S_IRUGO, show_pddf_data, store_pddf_data, PDDF_UINT32, + sizeof(uint32_t), (void*)&sysstatus_data.sysstatus_addr_attr.len , NULL); +PDDF_DATA_ATTR(attr_ops, S_IWUSR, NULL, do_attr_operation, PDDF_CHAR, 8, (void*)&sysstatus_data, NULL); + + + +static struct attribute *sysstatus_addr_attributes[] = { + &attr_attr_name.dev_attr.attr, + &attr_attr_devaddr.dev_attr.attr, + &attr_attr_offset.dev_attr.attr, + &attr_attr_mask.dev_attr.attr, + &attr_attr_len.dev_attr.attr, + &attr_attr_ops.dev_attr.attr, + NULL +}; + +PDDF_DATA_ATTR(board_info, S_IRUGO, show_sysstatus_data, NULL, PDDF_UCHAR, sizeof(u8), NULL, NULL); +PDDF_DATA_ATTR(cpld1_version, S_IRUGO, show_sysstatus_data, NULL, PDDF_UCHAR, sizeof(u8), NULL, NULL); +PDDF_DATA_ATTR(cpld2_version, S_IRUGO, show_sysstatus_data, NULL, PDDF_UCHAR, sizeof(u8), NULL, NULL); +PDDF_DATA_ATTR(cpld3_version, S_IRUGO, show_sysstatus_data, NULL, PDDF_UCHAR, sizeof(u8), NULL, NULL); +PDDF_DATA_ATTR(mac_reset, S_IWUSR|S_IRUGO, show_sysstatus_data, store_sysstatus_data, PDDF_UCHAR, sizeof(u8), NULL, NULL); +PDDF_DATA_ATTR(mux_reset, S_IWUSR|S_IRUGO, show_sysstatus_data, store_sysstatus_data, PDDF_UCHAR, sizeof(u8), NULL, NULL); +PDDF_DATA_ATTR(psu_status, S_IRUGO, show_sysstatus_data, NULL, PDDF_UCHAR, sizeof(u8), NULL, NULL); +PDDF_DATA_ATTR(system_led_0, S_IRUGO, show_sysstatus_data, NULL, PDDF_UCHAR, sizeof(u8), NULL, NULL); +PDDF_DATA_ATTR(system_led_1, S_IRUGO, show_sysstatus_data, NULL, PDDF_UCHAR, sizeof(u8), NULL, NULL); +PDDF_DATA_ATTR(beacon_led, S_IWUSR|S_IRUGO, show_sysstatus_data, store_sysstatus_data, PDDF_UCHAR, sizeof(u8), NULL, NULL); +PDDF_DATA_ATTR(port_led_clr_ctrl, S_IWUSR|S_IRUGO, show_sysstatus_data, store_sysstatus_data, PDDF_UCHAR, sizeof(u8), NULL, NULL); + +static struct attribute *sysstatus_data_attributes[] = { + &attr_board_info.dev_attr.attr, + &attr_cpld1_version.dev_attr.attr, + &attr_cpld2_version.dev_attr.attr, + &attr_cpld3_version.dev_attr.attr, + &attr_mac_reset.dev_attr.attr, + &attr_mux_reset.dev_attr.attr, + &attr_psu_status.dev_attr.attr, + &attr_system_led_0.dev_attr.attr, + &attr_system_led_1.dev_attr.attr, + &attr_beacon_led.dev_attr.attr, + &attr_port_led_clr_ctrl.dev_attr.attr, + NULL +}; + + +static const struct attribute_group pddf_sysstatus_addr_group = { + .attrs = sysstatus_addr_attributes, +}; + + +static const struct attribute_group pddf_sysstatus_data_group = { + .attrs = sysstatus_data_attributes, +}; + + +static struct kobject *sysstatus_addr_kobj; +static struct kobject *sysstatus_data_kobj; + + + +ssize_t show_sysstatus_data(struct device *dev, struct device_attribute *da, char *buf) +{ + + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + + SYSSTATUS_DATA *data = &sysstatus_data; + struct SYSSTATUS_ADDR_ATTR *sysstatus_addr_attrs = NULL; + int i, status ; + + + for (i=0;isysstatus_addr_attrs[i].aname, attr->dev_attr.attr.name) == 0 ) + { + sysstatus_addr_attrs = &data->sysstatus_addr_attrs[i]; + + } + } + + if (sysstatus_addr_attrs==NULL ) + { + printk(KERN_DEBUG "%s is not supported attribute for this client\n",attr->dev_attr.attr.name); + status = 0; + } + else + { + status = board_i2c_cpld_read( sysstatus_addr_attrs->devaddr, sysstatus_addr_attrs->offset); + } + + return sprintf(buf, "0x%x\n", (status&sysstatus_addr_attrs->mask)); + +} + +ssize_t store_sysstatus_data(struct device *dev, struct device_attribute *da, const char *buf, size_t count) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + + SYSSTATUS_DATA *data = &sysstatus_data; + struct SYSSTATUS_ADDR_ATTR *sysstatus_addr_attrs = NULL; + int i, status ; + u8 reg_val; + + for (i=0;isysstatus_addr_attrs[i].aname, attr->dev_attr.attr.name) == 0 ) + { + sysstatus_addr_attrs = &data->sysstatus_addr_attrs[i]; + } + } + + if (sysstatus_addr_attrs==NULL) + { + printk(KERN_DEBUG "%s is not supported attribute for this client\n",attr->dev_attr.attr.name); + return -EINVAL; + } + else + { + if (kstrtou8(buf, 0, ®_val) < 0) + return -EINVAL; + + status = board_i2c_cpld_write(sysstatus_addr_attrs->devaddr, sysstatus_addr_attrs->offset, reg_val); + + if (status!=0) + { + printk(KERN_DEBUG "store_sysstatus_data() %s failed, status=%d\n",data->sysstatus_addr_attrs[i].aname, status); + return status; + } + } + + return count; +} + + + +static ssize_t do_attr_operation(struct device *dev, struct device_attribute *da, const char *buf, size_t count) +{ + PDDF_ATTR *ptr = (PDDF_ATTR *)da; + SYSSTATUS_DATA *pdata = (SYSSTATUS_DATA *)(ptr->addr); + + pdata->sysstatus_addr_attrs[pdata->len] = pdata->sysstatus_addr_attr; + pdata->len++; + pddf_dbg(SYSSTATUS, KERN_ERR "%s: Populating the data for %s\n", __FUNCTION__, pdata->sysstatus_addr_attr.aname); +#ifdef __STDC_LIB_EXT1__ + memset_s(&pdata->sysstatus_addr_attr, sizeof(pdata->sysstatus_addr_attr), 0, sizeof(pdata->sysstatus_addr_attr)); +#else + _memset(&pdata->sysstatus_addr_attr, 0, sizeof(pdata->sysstatus_addr_attr)); +#endif + + return count; +} + + + + +int __init sysstatus_data_init(void) +{ + struct kobject *device_kobj; + int ret = 0; + + + pddf_dbg(SYSSTATUS, "PDDF SYSSTATUS MODULE.. init\n"); + + device_kobj = get_device_i2c_kobj(); + if(!device_kobj) + return -ENOMEM; + + sysstatus_addr_kobj = kobject_create_and_add("sysstatus", device_kobj); + if(!sysstatus_addr_kobj) + return -ENOMEM; + + sysstatus_data_kobj = kobject_create_and_add("sysstatus_data", sysstatus_addr_kobj); + if(!sysstatus_data_kobj) + return -ENOMEM; + + + ret = sysfs_create_group(sysstatus_addr_kobj, &pddf_sysstatus_addr_group); + if (ret) + { + kobject_put(sysstatus_addr_kobj); + return ret; + } + + ret = sysfs_create_group(sysstatus_data_kobj, &pddf_sysstatus_data_group); + if (ret) + { + sysfs_remove_group(sysstatus_addr_kobj, &pddf_sysstatus_addr_group); + kobject_put(sysstatus_data_kobj); + kobject_put(sysstatus_addr_kobj); + return ret; + } + + + return ret; +} + +void __exit sysstatus_data_exit(void) +{ + pddf_dbg(SYSSTATUS, "PDDF SYSSTATUS MODULE.. exit\n"); + sysfs_remove_group(sysstatus_data_kobj, &pddf_sysstatus_data_group); + sysfs_remove_group(sysstatus_addr_kobj, &pddf_sysstatus_addr_group); + kobject_put(sysstatus_data_kobj); + kobject_put(sysstatus_addr_kobj); + pddf_dbg(SYSSTATUS, KERN_ERR "%s: Removed the kobjects for 'SYSSTATUS'\n",__FUNCTION__); + return; +} + +module_init(sysstatus_data_init); +module_exit(sysstatus_data_exit); + +MODULE_AUTHOR("Broadcom"); +MODULE_DESCRIPTION("SYSSTATUS platform data"); +MODULE_LICENSE("GPL"); diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s9301-32db/modules/x86-64-ufispace-s9301-32db-cpld.c b/platform/broadcom/sonic-platform-modules-ufispace/s9301-32db/modules/x86-64-ufispace-s9301-32db-cpld.c new file mode 100644 index 0000000000..0fd60826e3 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ufispace/s9301-32db/modules/x86-64-ufispace-s9301-32db-cpld.c @@ -0,0 +1,1656 @@ +/* + * A i2c cpld driver for the ufispace_s9301_32db + * + * Copyright (C) 2017-2019 UfiSpace Technology Corporation. + * Jason Tsai + * + * Based on ad7414.c + * Copyright 2006 Stefan Roese , DENX Software Engineering + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. + */ +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include "x86-64-ufispace-s9301-32db-cpld.h" + +#ifdef DEBUG +#define DEBUG_PRINT(fmt, args...) \ + printk(KERN_INFO "%s:%s[%d]: " fmt "\r\n", \ + __FILE__, __func__, __LINE__, ##args) +#else +#define DEBUG_PRINT(fmt, args...) +#endif + +#define BSP_LOG_R(fmt, args...) \ + _bsp_log (LOG_READ, KERN_INFO "%s:%s[%d]: " fmt "\r\n", \ + __FILE__, __func__, __LINE__, ##args) +#define BSP_LOG_W(fmt, args...) \ + _bsp_log (LOG_WRITE, KERN_INFO "%s:%s[%d]: " fmt "\r\n", \ + __FILE__, __func__, __LINE__, ##args) + +#define I2C_READ_BYTE_DATA(ret, lock, i2c_client, reg) \ +{ \ + mutex_lock(lock); \ + ret = i2c_smbus_read_byte_data(i2c_client, reg); \ + mutex_unlock(lock); \ + BSP_LOG_R("cpld[%d], reg=0x%03x, reg_val=0x%02x", data->index, reg, ret); \ +} +#define I2C_WRITE_BYTE_DATA(ret, lock, i2c_client, reg, val) \ +{ \ + mutex_lock(lock); \ + ret = i2c_smbus_write_byte_data(i2c_client, reg, val); \ + mutex_unlock(lock); \ + BSP_LOG_W("cpld[%d], reg=0x%03x, reg_val=0x%02x", data->index, reg, val); \ +} + +/* CPLD sysfs attributes index */ +enum s9301_cpld_sysfs_attributes { + /* CPLD1 */ + CPLD_ACCESS_REG, + CPLD_REGISTER_VAL, + CPLD_SKU_ID, + CPLD_HW_REV, + CPLD_DEPH_REV, + CPLD_BUILD_REV, + CPLD_ID_TYPE, + CPLD_MAJOR_VER, + CPLD_MINOR_VER, + CPLD_BUILD_VER, + CPLD_VERION_H, + CPLD_ID, + CPLD_MAC_INTR, + CPLD_10G_PHY_INTR, + CPLD_CPLD_FRU_INTR, + CPLD_THERMAL_ALERT_INTR, + CPLD_MISC_INTR, + CPLD_SYSTEM_INTR, + CPLD_MAC_INTR_MASK, + CPLD_10G_PHY_INTR_MASK, + CPLD_CPLD_FRU_INTR_MASK, + CPLD_THERMAL_ALERT_INTR_MASK, + CPLD_MISC_INTR_MASK, + CPLD_MAC_INTR_EVENT, + CPLD_10G_PHY_INTR_EVENT, + CPLD_CPLD_FRU_INTR_EVENT, + CPLD_THERMAL_ALERT_INTR_EVENT, + CPLD_MISC_INTR_EVENT, + CPLD_MAC_RST, + CPLD_10G_PHY_RST, + CPLD_BMC_RST, + CPLD_USB_RST, + CPLD_MUX_RST, + CPLD_MISC_RST, + CPLD_BMC_WATCHDOG, + CPLD_DAU_BD_PRES, + CPLD_PSU_STATUS, + CPLD_SYS_PW_STATUS, + CPLD_MISC, + CPLD_MUX_CTRL, + CPLD_10GMUX_SEL, + CPLD_MAC_QSFP_SEL_CTRL, + CPLD_SYS_LED_CTRL_1, + CPLD_SYS_LED_CTRL_2, + CPLD_BEACON_LED_CTRL, + CPLD_PORT_LED_CLR_CTRL, + CPLD_EVENT_DETECT_CTRL, + /* CPLD2 */ + CPLD_QSFP56_MOD_INT_G0, + CPLD_QSFP56_MOD_INT_G1, + CPLD_QSFP56_MOD_INT_G2, + CPLD_QSFPDD_MOD_INT, + CPLD_QSFP56_PRES_G0, + CPLD_QSFP56_PRES_G1, + CPLD_QSFP56_PRES_G2, + CPLD_QSFPDD_PRES, + CPLD_QSFP56_FUSE_INT_G0, + CPLD_QSFP56_FUSE_INT_G1, + CPLD_QSFP56_FUSE_INT_G2, + CPLD_QSFPDD_FUSE_INT, + CPLD_SFP_TXFAULT, + CPLD_SFP_ABS, + CPLD_SFP_RXLOS, + CPLD_QSFP56_MOD_INT_MASK_G0, + CPLD_QSFP56_MOD_INT_MASK_G1, + CPLD_QSFP56_MOD_INT_MASK_G2, + CPLD_QSFPDD_MOD_INT_MASK, + CPLD_QSFP56_PRES_MASK_G0, + CPLD_QSFP56_PRES_MASK_G1, + CPLD_QSFP56_PRES_MASK_G2, + CPLD_QSFPDD_PRES_MASK, + CPLD_QSFP56_FUSE_INT_MASK_G0, + CPLD_QSFP56_FUSE_INT_MASK_G1, + CPLD_QSFP56_FUSE_INT_MASK_G2, + CPLD_QSFPDD_FUSE_INT_MASK, + CPLD_SFP_TXFAULT_MASK, + CPLD_SFP_ABS_MASK, + CPLD_SFP_RXLOS_MASK, + CPLD_QSFP56_MOD_INT_EVENT_G0, + CPLD_QSFP56_MOD_INT_EVENT_G1, + CPLD_QSFP56_MOD_INT_EVENT_G2, + CPLD_QSFPDD_MOD_INT_EVENT, + CPLD_QSFP56_PRES_EVENT_G0, + CPLD_QSFP56_PRES_EVENT_G1, + CPLD_QSFP56_PRES_EVENT_G2, + CPLD_QSFPDD_PRES_EVENT, + CPLD_QSFP56_FUSE_INT_EVENT_G0, + CPLD_QSFP56_FUSE_INT_EVENT_G1, + CPLD_QSFP56_FUSE_INT_EVENT_G2, + CPLD_QSFPDD_FUSE_INT_EVENT, + CPLD_SFP_TXFAULT_EVENT, + CPLD_SFP_ABS_EVENT, + CPLD_SFP_RXLOS_EVENT, + CPLD_QSFP56_RESET_CTRL_G0, + CPLD_QSFP56_RESET_CTRL_G1, + CPLD_QSFP56_RESET_CTRL_G2, + CPLD_QSFPDD_RESET_CTRL, + CPLD_QSFP56_LP_MODE_G0, + CPLD_QSFP56_LP_MODE_G1, + CPLD_QSFP56_LP_MODE_G2, + CPLD_QSFPDD_LP_MODE, + CPLD_SFP_TX_DIS, + CPLD_SFP_RS, + CPLD_SFP_TS, + CPLD_PORT_INT_STATUS, + + //BSP DEBUG + BSP_DEBUG +}; + +enum bsp_log_types { + LOG_NONE, + LOG_RW, + LOG_READ, + LOG_WRITE +}; + +enum bsp_log_ctrl { + LOG_DISABLE, + LOG_ENABLE +}; + +/* CPLD sysfs attributes hook functions */ +static ssize_t read_access_register(struct device *dev, + struct device_attribute *da, char *buf); +static ssize_t write_access_register(struct device *dev, + struct device_attribute *da, const char *buf, size_t count); +static ssize_t read_register_value(struct device *dev, + struct device_attribute *da, char *buf); +static ssize_t write_register_value(struct device *dev, + struct device_attribute *da, const char *buf, size_t count); +static ssize_t read_hw_rev_cb(struct device *dev, + struct device_attribute *da, char *buf); +static ssize_t read_cpld_version_cb(struct device *dev, + struct device_attribute *da, char *buf); +static ssize_t read_cpld_callback(struct device *dev, + struct device_attribute *da, char *buf); +static ssize_t write_cpld_callback(struct device *dev, + struct device_attribute *da, const char *buf, size_t count); +static ssize_t read_cpld_version_h_cb(struct device *dev, + struct device_attribute *da, char *buf); +// cpld access api +static ssize_t read_cpld_reg(struct device *dev, char *buf, u8 reg); +static ssize_t write_cpld_reg(struct device *dev, const char *buf, size_t count, u8 reg); +static bool read_cpld_reg_raw_byte(struct device *dev, u8 reg, u8 *val, int *errno); +static bool read_cpld_reg_raw_int(struct device *dev, u8 reg, int *val); +// bsp debug api +static ssize_t read_bsp(char *buf, char *str); +static ssize_t write_bsp(const char *buf, char *str, size_t str_len, size_t count); +static ssize_t read_bsp_callback(struct device *dev, + struct device_attribute *da, char *buf); +static ssize_t write_bsp_callback(struct device *dev, + struct device_attribute *da, const char *buf, size_t count); + +static LIST_HEAD(cpld_client_list); /* client list for cpld */ +static struct mutex list_lock; /* mutex for client list */ + +struct cpld_client_node { + struct i2c_client *client; + struct list_head list; +}; + +struct cpld_data { + int index; /* CPLD index */ + struct mutex access_lock; /* mutex for cpld access */ + u8 access_reg; /* register to access */ +}; + +/* CPLD device id and data */ +static const struct i2c_device_id s9301_cpld_id[] = { + { "s9301_32db_cpld1", cpld1 }, + { "s9301_32db_cpld2", cpld2 }, + { "s9301_32db_cpld3", cpld3 }, + {} +}; + +char bsp_debug[2]="0"; +u8 enable_log_read=LOG_DISABLE; +u8 enable_log_write=LOG_DISABLE; + +/* Addresses scanned for s9301_cpld */ +static const unsigned short cpld_i2c_addr[] = { 0x30, 0x31, 0x32, I2C_CLIENT_END }; + +/* define all support register access of cpld in attribute */ +/* CPLD1 */ +static SENSOR_DEVICE_ATTR(cpld_access_register, S_IWUSR | S_IRUGO, \ + read_access_register, write_access_register, CPLD_ACCESS_REG); +static SENSOR_DEVICE_ATTR(cpld_register_value, S_IWUSR | S_IRUGO, \ + read_register_value, write_register_value, CPLD_REGISTER_VAL); +static SENSOR_DEVICE_ATTR(cpld_sku_id, S_IRUGO, \ + read_cpld_callback, NULL, CPLD_SKU_ID); +static SENSOR_DEVICE_ATTR(cpld_hw_rev, S_IRUGO, \ + read_hw_rev_cb, NULL, CPLD_HW_REV); +static SENSOR_DEVICE_ATTR(cpld_deph_rev, S_IRUGO, \ + read_hw_rev_cb, NULL, CPLD_DEPH_REV); +static SENSOR_DEVICE_ATTR(cpld_build_rev, S_IRUGO, \ + read_hw_rev_cb, NULL, CPLD_BUILD_REV); +static SENSOR_DEVICE_ATTR(cpld_id_type, S_IRUGO, \ + read_hw_rev_cb, NULL, CPLD_ID_TYPE); +static SENSOR_DEVICE_ATTR(cpld_major_ver, S_IRUGO, \ + read_cpld_version_cb, NULL, CPLD_MAJOR_VER); +static SENSOR_DEVICE_ATTR(cpld_minor_ver, S_IRUGO, \ + read_cpld_version_cb, NULL, CPLD_MINOR_VER); +static SENSOR_DEVICE_ATTR(cpld_build_ver, S_IRUGO, \ + read_cpld_callback, NULL, CPLD_BUILD_VER); +static SENSOR_DEVICE_ATTR(cpld_version_h, S_IRUGO, \ + read_cpld_version_h_cb, NULL, CPLD_VERION_H); +static SENSOR_DEVICE_ATTR(cpld_id, S_IRUGO, \ + read_cpld_callback, NULL, CPLD_ID); +static SENSOR_DEVICE_ATTR(cpld_mac_intr, S_IRUGO, \ + read_cpld_callback, NULL, CPLD_MAC_INTR); +static SENSOR_DEVICE_ATTR(cpld_10g_phy_intr, S_IRUGO, \ + read_cpld_callback, NULL, CPLD_10G_PHY_INTR); +static SENSOR_DEVICE_ATTR(cpld_cpld_fru_intr, S_IRUGO, \ + read_cpld_callback, NULL, CPLD_CPLD_FRU_INTR); +static SENSOR_DEVICE_ATTR(cpld_thermal_alert_intr, S_IRUGO, \ + read_cpld_callback, NULL, CPLD_THERMAL_ALERT_INTR); +static SENSOR_DEVICE_ATTR(cpld_misc_intr, S_IRUGO, \ + read_cpld_callback, NULL, CPLD_MISC_INTR); +static SENSOR_DEVICE_ATTR(cpld_system_intr, S_IRUGO, \ + read_cpld_callback, NULL, CPLD_SYSTEM_INTR); +static SENSOR_DEVICE_ATTR(cpld_mac_intr_mask, S_IWUSR | S_IRUGO, \ + read_cpld_callback, write_cpld_callback, CPLD_MAC_INTR_MASK); +static SENSOR_DEVICE_ATTR(cpld_10g_phy_intr_mask, S_IWUSR | S_IRUGO, \ + read_cpld_callback, write_cpld_callback, CPLD_10G_PHY_INTR_MASK); +static SENSOR_DEVICE_ATTR(cpld_cpld_fru_intr_mask, S_IWUSR | S_IRUGO, \ + read_cpld_callback, write_cpld_callback, CPLD_CPLD_FRU_INTR_MASK); +static SENSOR_DEVICE_ATTR(cpld_thermal_alert_intr_mask, S_IWUSR | S_IRUGO, \ + read_cpld_callback, write_cpld_callback, CPLD_THERMAL_ALERT_INTR_MASK); +static SENSOR_DEVICE_ATTR(cpld_misc_intr_mask, S_IWUSR | S_IRUGO, \ + read_cpld_callback, write_cpld_callback, CPLD_MISC_INTR_MASK); +static SENSOR_DEVICE_ATTR(cpld_mac_intr_event, S_IRUGO, \ + read_cpld_callback, NULL, CPLD_MAC_INTR_EVENT); +static SENSOR_DEVICE_ATTR(cpld_10g_phy_intr_event, S_IRUGO, \ + read_cpld_callback, NULL, CPLD_10G_PHY_INTR_EVENT); +static SENSOR_DEVICE_ATTR(cpld_cpld_fru_intr_event, S_IRUGO, \ + read_cpld_callback, NULL, CPLD_CPLD_FRU_INTR_EVENT); +static SENSOR_DEVICE_ATTR(cpld_thermal_alert_intr_event, S_IRUGO, \ + read_cpld_callback, NULL, CPLD_THERMAL_ALERT_INTR_EVENT); +static SENSOR_DEVICE_ATTR(cpld_misc_intr_event, S_IRUGO, \ + read_cpld_callback, NULL, CPLD_MISC_INTR_EVENT); +static SENSOR_DEVICE_ATTR(cpld_mac_rst, S_IWUSR | S_IRUGO, \ + read_cpld_callback, write_cpld_callback, CPLD_MAC_RST); +static SENSOR_DEVICE_ATTR(cpld_10g_phy_rst, S_IWUSR | S_IRUGO, \ + read_cpld_callback, write_cpld_callback, CPLD_10G_PHY_RST); +static SENSOR_DEVICE_ATTR(cpld_bmc_rst, S_IWUSR | S_IRUGO, \ + read_cpld_callback, write_cpld_callback, CPLD_BMC_RST); +static SENSOR_DEVICE_ATTR(cpld_usb_rst, S_IWUSR | S_IRUGO, \ + read_cpld_callback, write_cpld_callback, CPLD_USB_RST); +static SENSOR_DEVICE_ATTR(cpld_mux_rst, S_IWUSR | S_IRUGO, \ + read_cpld_callback, write_cpld_callback, CPLD_MUX_RST); +static SENSOR_DEVICE_ATTR(cpld_misc_rst, S_IWUSR | S_IRUGO, \ + read_cpld_callback, write_cpld_callback, CPLD_MISC_RST); +static SENSOR_DEVICE_ATTR(cpld_bmc_watchdog, S_IWUSR | S_IRUGO, \ + read_cpld_callback, write_cpld_callback, CPLD_BMC_WATCHDOG); +static SENSOR_DEVICE_ATTR(cpld_dau_bd_pres, S_IRUGO, \ + read_cpld_callback, NULL, CPLD_DAU_BD_PRES); +static SENSOR_DEVICE_ATTR(cpld_psu_status, S_IRUGO, \ + read_cpld_callback, NULL, CPLD_PSU_STATUS); +static SENSOR_DEVICE_ATTR(cpld_sys_pw_status, S_IRUGO, \ + read_cpld_callback, NULL, CPLD_SYS_PW_STATUS); +static SENSOR_DEVICE_ATTR(cpld_misc, S_IRUGO, \ + read_cpld_callback, NULL, CPLD_MISC); +static SENSOR_DEVICE_ATTR(cpld_mux_ctrl, S_IWUSR | S_IRUGO, \ + read_cpld_callback, write_cpld_callback, CPLD_MUX_CTRL); +static SENSOR_DEVICE_ATTR(cpld_10gmux_sel, S_IWUSR | S_IRUGO, \ + read_cpld_callback, write_cpld_callback, CPLD_10GMUX_SEL); +static SENSOR_DEVICE_ATTR(cpld_mac_qsfp_sel_ctrl, S_IWUSR | S_IRUGO, \ + read_cpld_callback, write_cpld_callback, CPLD_MAC_QSFP_SEL_CTRL); +static SENSOR_DEVICE_ATTR(cpld_sys_led_ctrl_1, S_IRUGO, \ + read_cpld_callback, NULL, CPLD_SYS_LED_CTRL_1); +static SENSOR_DEVICE_ATTR(cpld_sys_led_ctrl_2, S_IRUGO, \ + read_cpld_callback, NULL, CPLD_SYS_LED_CTRL_2); +static SENSOR_DEVICE_ATTR(cpld_beacon_led_ctrl, S_IWUSR | S_IRUGO, \ + read_cpld_callback, write_cpld_callback, CPLD_BEACON_LED_CTRL); +static SENSOR_DEVICE_ATTR(cpld_port_led_clr_ctrl, S_IWUSR | S_IRUGO, \ + read_cpld_callback, write_cpld_callback, CPLD_PORT_LED_CLR_CTRL); +static SENSOR_DEVICE_ATTR(cpld_event_detect_ctrl, S_IWUSR | S_IRUGO, \ + read_cpld_callback, write_cpld_callback, CPLD_EVENT_DETECT_CTRL); +/* CPLD2 */ +static SENSOR_DEVICE_ATTR(cpld_qsfp56_mod_int_g0, S_IRUGO, \ + read_cpld_callback, NULL, CPLD_QSFP56_MOD_INT_G0); +static SENSOR_DEVICE_ATTR(cpld_qsfp56_mod_int_g1, S_IRUGO, \ + read_cpld_callback, NULL, CPLD_QSFP56_MOD_INT_G1); +static SENSOR_DEVICE_ATTR(cpld_qsfp56_mod_int_g2, S_IRUGO, \ + read_cpld_callback, NULL, CPLD_QSFP56_MOD_INT_G2); +static SENSOR_DEVICE_ATTR(cpld_qsfpdd_mod_int, S_IRUGO, \ + read_cpld_callback, NULL, CPLD_QSFPDD_MOD_INT); +static SENSOR_DEVICE_ATTR(cpld_qsfp56_pres_g0, S_IRUGO, \ + read_cpld_callback, NULL, CPLD_QSFP56_PRES_G0); +static SENSOR_DEVICE_ATTR(cpld_qsfp56_pres_g1, S_IRUGO, \ + read_cpld_callback, NULL, CPLD_QSFP56_PRES_G1); +static SENSOR_DEVICE_ATTR(cpld_qsfp56_pres_g2, S_IRUGO, \ + read_cpld_callback, NULL, CPLD_QSFP56_PRES_G2); +static SENSOR_DEVICE_ATTR(cpld_qsfpdd_pres, S_IRUGO, \ + read_cpld_callback, NULL, CPLD_QSFPDD_PRES); +static SENSOR_DEVICE_ATTR(cpld_qsfp56_fuse_int_g0, S_IRUGO, \ + read_cpld_callback, NULL, CPLD_QSFP56_FUSE_INT_G0); +static SENSOR_DEVICE_ATTR(cpld_qsfp56_fuse_int_g1, S_IRUGO, \ + read_cpld_callback, NULL, CPLD_QSFP56_FUSE_INT_G1); +static SENSOR_DEVICE_ATTR(cpld_qsfp56_fuse_int_g2, S_IRUGO, \ + read_cpld_callback, NULL, CPLD_QSFP56_FUSE_INT_G2); +static SENSOR_DEVICE_ATTR(cpld_qsfpdd_fuse_int, S_IRUGO, \ + read_cpld_callback, NULL, CPLD_QSFPDD_FUSE_INT); +static SENSOR_DEVICE_ATTR(cpld_sfp_txfault, S_IRUGO, \ + read_cpld_callback, NULL, CPLD_SFP_TXFAULT); +static SENSOR_DEVICE_ATTR(cpld_sfp_abs, S_IRUGO, \ + read_cpld_callback, NULL, CPLD_SFP_ABS); +static SENSOR_DEVICE_ATTR(cpld_sfp_rxlos, S_IRUGO, \ + read_cpld_callback, NULL, CPLD_SFP_RXLOS); +static SENSOR_DEVICE_ATTR(cpld_qsfp56_mod_int_mask_g0, S_IWUSR | S_IRUGO, \ + read_cpld_callback, write_cpld_callback, CPLD_QSFP56_MOD_INT_MASK_G0); +static SENSOR_DEVICE_ATTR(cpld_qsfp56_mod_int_mask_g1, S_IWUSR | S_IRUGO, \ + read_cpld_callback, write_cpld_callback, CPLD_QSFP56_MOD_INT_MASK_G1); +static SENSOR_DEVICE_ATTR(cpld_qsfp56_mod_int_mask_g2, S_IWUSR | S_IRUGO, \ + read_cpld_callback, write_cpld_callback, CPLD_QSFP56_MOD_INT_MASK_G2); +static SENSOR_DEVICE_ATTR(cpld_qsfpdd_mod_int_mask, S_IWUSR | S_IRUGO, \ + read_cpld_callback, write_cpld_callback, CPLD_QSFPDD_MOD_INT_MASK); +static SENSOR_DEVICE_ATTR(cpld_qsfp56_pres_mask_g0, S_IWUSR | S_IRUGO, \ + read_cpld_callback, write_cpld_callback, CPLD_QSFP56_PRES_MASK_G0); +static SENSOR_DEVICE_ATTR(cpld_qsfp56_pres_mask_g1, S_IWUSR | S_IRUGO, \ + read_cpld_callback, write_cpld_callback, CPLD_QSFP56_PRES_MASK_G1); +static SENSOR_DEVICE_ATTR(cpld_qsfp56_pres_mask_g2, S_IWUSR | S_IRUGO, \ + read_cpld_callback, write_cpld_callback, CPLD_QSFP56_PRES_MASK_G2); +static SENSOR_DEVICE_ATTR(cpld_qsfpdd_pres_mask, S_IWUSR | S_IRUGO, \ + read_cpld_callback, write_cpld_callback, CPLD_QSFPDD_PRES_MASK); +static SENSOR_DEVICE_ATTR(cpld_qsfp56_fuse_int_mask_g0, S_IWUSR | S_IRUGO, \ + read_cpld_callback, write_cpld_callback, CPLD_QSFP56_FUSE_INT_MASK_G0); +static SENSOR_DEVICE_ATTR(cpld_qsfp56_fuse_int_mask_g1, S_IWUSR | S_IRUGO, \ + read_cpld_callback, write_cpld_callback, CPLD_QSFP56_FUSE_INT_MASK_G1); +static SENSOR_DEVICE_ATTR(cpld_qsfp56_fuse_int_mask_g2, S_IWUSR | S_IRUGO, \ + read_cpld_callback, write_cpld_callback, CPLD_QSFP56_FUSE_INT_MASK_G2); +static SENSOR_DEVICE_ATTR(cpld_qsfpdd_fuse_int_mask, S_IWUSR | S_IRUGO, \ + read_cpld_callback, write_cpld_callback, CPLD_QSFPDD_FUSE_INT_MASK); +static SENSOR_DEVICE_ATTR(cpld_sfp_txfault_mask, S_IWUSR | S_IRUGO, \ + read_cpld_callback, write_cpld_callback, CPLD_SFP_TXFAULT_MASK); +static SENSOR_DEVICE_ATTR(cpld_sfp_abs_mask, S_IWUSR | S_IRUGO, \ + read_cpld_callback, write_cpld_callback, CPLD_SFP_ABS_MASK); +static SENSOR_DEVICE_ATTR(cpld_sfp_rxlos_mask, S_IWUSR | S_IRUGO, \ + read_cpld_callback, write_cpld_callback, CPLD_SFP_RXLOS_MASK); +static SENSOR_DEVICE_ATTR(cpld_qsfp56_mod_int_event_g0, S_IRUGO, \ + read_cpld_callback, NULL, CPLD_QSFP56_MOD_INT_EVENT_G0); +static SENSOR_DEVICE_ATTR(cpld_qsfp56_mod_int_event_g1, S_IRUGO, \ + read_cpld_callback, NULL, CPLD_QSFP56_MOD_INT_EVENT_G1); +static SENSOR_DEVICE_ATTR(cpld_qsfp56_mod_int_event_g2, S_IRUGO, \ + read_cpld_callback, NULL, CPLD_QSFP56_MOD_INT_EVENT_G2); +static SENSOR_DEVICE_ATTR(cpld_qsfpdd_mod_int_event, S_IRUGO, \ + read_cpld_callback, NULL, CPLD_QSFPDD_MOD_INT_EVENT); +static SENSOR_DEVICE_ATTR(cpld_qsfp56_pres_event_g0, S_IRUGO, \ + read_cpld_callback, NULL, CPLD_QSFP56_PRES_EVENT_G0); +static SENSOR_DEVICE_ATTR(cpld_qsfp56_pres_event_g1, S_IRUGO, \ + read_cpld_callback, NULL, CPLD_QSFP56_PRES_EVENT_G1); +static SENSOR_DEVICE_ATTR(cpld_qsfp56_pres_event_g2, S_IRUGO, \ + read_cpld_callback, NULL, CPLD_QSFP56_PRES_EVENT_G2); +static SENSOR_DEVICE_ATTR(cpld_qsfpdd_pres_event, S_IRUGO, \ + read_cpld_callback, NULL, CPLD_QSFPDD_PRES_EVENT); +static SENSOR_DEVICE_ATTR(cpld_qsfp56_fuse_int_event_g0, S_IRUGO, \ + read_cpld_callback, NULL, CPLD_QSFP56_FUSE_INT_EVENT_G0); +static SENSOR_DEVICE_ATTR(cpld_qsfp56_fuse_int_event_g1, S_IRUGO, \ + read_cpld_callback, NULL, CPLD_QSFP56_FUSE_INT_EVENT_G1); +static SENSOR_DEVICE_ATTR(cpld_qsfp56_fuse_int_event_g2, S_IRUGO, \ + read_cpld_callback, NULL, CPLD_QSFP56_FUSE_INT_EVENT_G2); +static SENSOR_DEVICE_ATTR(cpld_qsfpdd_fuse_int_event, S_IRUGO, \ + read_cpld_callback, NULL, CPLD_QSFPDD_FUSE_INT_EVENT); +static SENSOR_DEVICE_ATTR(cpld_sfp_txfault_event, S_IRUGO, \ + read_cpld_callback, NULL, CPLD_SFP_TXFAULT_EVENT); +static SENSOR_DEVICE_ATTR(cpld_sfp_abs_event, S_IRUGO, \ + read_cpld_callback, NULL, CPLD_SFP_ABS_EVENT); +static SENSOR_DEVICE_ATTR(cpld_sfp_rxlos_event, S_IRUGO, \ + read_cpld_callback, NULL, CPLD_SFP_RXLOS_EVENT); +static SENSOR_DEVICE_ATTR(cpld_qsfp56_reset_ctrl_g0, \ + S_IWUSR | S_IRUGO, \ + read_cpld_callback, write_cpld_callback, \ + CPLD_QSFP56_RESET_CTRL_G0); +static SENSOR_DEVICE_ATTR(cpld_qsfp56_reset_ctrl_g1, \ + S_IWUSR | S_IRUGO, \ + read_cpld_callback, write_cpld_callback, \ + CPLD_QSFP56_RESET_CTRL_G1); +static SENSOR_DEVICE_ATTR(cpld_qsfp56_reset_ctrl_g2, \ + S_IWUSR | S_IRUGO, \ + read_cpld_callback, write_cpld_callback, \ + CPLD_QSFP56_RESET_CTRL_G2); +static SENSOR_DEVICE_ATTR(cpld_qsfpdd_reset_ctrl, \ + S_IWUSR | S_IRUGO, \ + read_cpld_callback, write_cpld_callback, \ + CPLD_QSFPDD_RESET_CTRL); +static SENSOR_DEVICE_ATTR(cpld_qsfp56_lp_mode_g0, \ + S_IWUSR | S_IRUGO, \ + read_cpld_callback, write_cpld_callback, \ + CPLD_QSFP56_LP_MODE_G0); +static SENSOR_DEVICE_ATTR(cpld_qsfp56_lp_mode_g1, \ + S_IWUSR | S_IRUGO, \ + read_cpld_callback, write_cpld_callback, \ + CPLD_QSFP56_LP_MODE_G1); +static SENSOR_DEVICE_ATTR(cpld_qsfp56_lp_mode_g2, \ + S_IWUSR | S_IRUGO, \ + read_cpld_callback, write_cpld_callback, \ + CPLD_QSFP56_LP_MODE_G2); +static SENSOR_DEVICE_ATTR(cpld_qsfpdd_lp_mode, \ + S_IWUSR | S_IRUGO, \ + read_cpld_callback, write_cpld_callback, \ + CPLD_QSFPDD_LP_MODE); +static SENSOR_DEVICE_ATTR(cpld_sfp_tx_dis, S_IWUSR | S_IRUGO, \ + read_cpld_callback, write_cpld_callback, CPLD_SFP_TX_DIS); +static SENSOR_DEVICE_ATTR(cpld_sfp_rs, S_IWUSR | S_IRUGO, \ + read_cpld_callback, write_cpld_callback, CPLD_SFP_RS); +static SENSOR_DEVICE_ATTR(cpld_sfp_ts, S_IWUSR | S_IRUGO, \ + read_cpld_callback, write_cpld_callback, CPLD_SFP_TS); +static SENSOR_DEVICE_ATTR(cpld_port_int_status, S_IRUGO, \ + read_cpld_callback, NULL, CPLD_PORT_INT_STATUS); +//BSP DEBUG +static SENSOR_DEVICE_ATTR(bsp_debug, S_IRUGO | S_IWUSR, \ + read_bsp_callback, write_bsp_callback, BSP_DEBUG); + +/* define support attributes of cpldx , total 3 */ +/* cpld 1 */ +static struct attribute *s9301_cpld1_attributes[] = { + &sensor_dev_attr_cpld_access_register.dev_attr.attr, + &sensor_dev_attr_cpld_register_value.dev_attr.attr, + &sensor_dev_attr_cpld_sku_id.dev_attr.attr, + &sensor_dev_attr_cpld_hw_rev.dev_attr.attr, + &sensor_dev_attr_cpld_deph_rev.dev_attr.attr, + &sensor_dev_attr_cpld_build_rev.dev_attr.attr, + &sensor_dev_attr_cpld_version_h.dev_attr.attr, + &sensor_dev_attr_cpld_id_type.dev_attr.attr, + &sensor_dev_attr_cpld_major_ver.dev_attr.attr, + &sensor_dev_attr_cpld_minor_ver.dev_attr.attr, + &sensor_dev_attr_cpld_build_ver.dev_attr.attr, + &sensor_dev_attr_cpld_id.dev_attr.attr, + &sensor_dev_attr_cpld_mac_intr.dev_attr.attr, + &sensor_dev_attr_cpld_10g_phy_intr.dev_attr.attr, + &sensor_dev_attr_cpld_cpld_fru_intr.dev_attr.attr, + &sensor_dev_attr_cpld_thermal_alert_intr.dev_attr.attr, + &sensor_dev_attr_cpld_misc_intr.dev_attr.attr, + &sensor_dev_attr_cpld_system_intr.dev_attr.attr, + &sensor_dev_attr_cpld_mac_intr_mask.dev_attr.attr, + &sensor_dev_attr_cpld_10g_phy_intr_mask.dev_attr.attr, + &sensor_dev_attr_cpld_cpld_fru_intr_mask.dev_attr.attr, + &sensor_dev_attr_cpld_thermal_alert_intr_mask.dev_attr.attr, + &sensor_dev_attr_cpld_misc_intr_mask.dev_attr.attr, + &sensor_dev_attr_cpld_mac_intr_event.dev_attr.attr, + &sensor_dev_attr_cpld_10g_phy_intr_event.dev_attr.attr, + &sensor_dev_attr_cpld_cpld_fru_intr_event.dev_attr.attr, + &sensor_dev_attr_cpld_thermal_alert_intr_event.dev_attr.attr, + &sensor_dev_attr_cpld_misc_intr_event.dev_attr.attr, + &sensor_dev_attr_cpld_mac_rst.dev_attr.attr, + &sensor_dev_attr_cpld_10g_phy_rst.dev_attr.attr, + &sensor_dev_attr_cpld_bmc_rst.dev_attr.attr, + &sensor_dev_attr_cpld_usb_rst.dev_attr.attr, + &sensor_dev_attr_cpld_mux_rst.dev_attr.attr, + &sensor_dev_attr_cpld_misc_rst.dev_attr.attr, + &sensor_dev_attr_cpld_bmc_watchdog.dev_attr.attr, + &sensor_dev_attr_cpld_dau_bd_pres.dev_attr.attr, + &sensor_dev_attr_cpld_psu_status.dev_attr.attr, + &sensor_dev_attr_cpld_sys_pw_status.dev_attr.attr, + &sensor_dev_attr_cpld_misc.dev_attr.attr, + &sensor_dev_attr_cpld_mux_ctrl.dev_attr.attr, + &sensor_dev_attr_cpld_10gmux_sel.dev_attr.attr, + &sensor_dev_attr_cpld_mac_qsfp_sel_ctrl.dev_attr.attr, + &sensor_dev_attr_cpld_sys_led_ctrl_1.dev_attr.attr, + &sensor_dev_attr_cpld_sys_led_ctrl_2.dev_attr.attr, + &sensor_dev_attr_cpld_beacon_led_ctrl.dev_attr.attr, + &sensor_dev_attr_cpld_port_led_clr_ctrl.dev_attr.attr, + &sensor_dev_attr_cpld_event_detect_ctrl.dev_attr.attr, + &sensor_dev_attr_bsp_debug.dev_attr.attr, + NULL +}; + +/* cpld 2 */ +static struct attribute *s9301_cpld2_attributes[] = { + &sensor_dev_attr_cpld_access_register.dev_attr.attr, + &sensor_dev_attr_cpld_register_value.dev_attr.attr, + &sensor_dev_attr_cpld_major_ver.dev_attr.attr, + &sensor_dev_attr_cpld_minor_ver.dev_attr.attr, + &sensor_dev_attr_cpld_build_ver.dev_attr.attr, + &sensor_dev_attr_cpld_version_h.dev_attr.attr, + &sensor_dev_attr_cpld_id.dev_attr.attr, + &sensor_dev_attr_cpld_qsfp56_mod_int_g0.dev_attr.attr, + &sensor_dev_attr_cpld_qsfp56_mod_int_g1.dev_attr.attr, + &sensor_dev_attr_cpld_qsfp56_mod_int_g2.dev_attr.attr, + &sensor_dev_attr_cpld_qsfpdd_mod_int.dev_attr.attr, + &sensor_dev_attr_cpld_qsfp56_pres_g0.dev_attr.attr, + &sensor_dev_attr_cpld_qsfp56_pres_g1.dev_attr.attr, + &sensor_dev_attr_cpld_qsfp56_pres_g2.dev_attr.attr, + &sensor_dev_attr_cpld_qsfpdd_pres.dev_attr.attr, + &sensor_dev_attr_cpld_qsfp56_fuse_int_g0.dev_attr.attr, + &sensor_dev_attr_cpld_qsfp56_fuse_int_g1.dev_attr.attr, + &sensor_dev_attr_cpld_qsfp56_fuse_int_g2.dev_attr.attr, + &sensor_dev_attr_cpld_qsfpdd_fuse_int.dev_attr.attr, + &sensor_dev_attr_cpld_sfp_txfault.dev_attr.attr, + &sensor_dev_attr_cpld_sfp_abs.dev_attr.attr, + &sensor_dev_attr_cpld_sfp_rxlos.dev_attr.attr, + &sensor_dev_attr_cpld_qsfp56_mod_int_mask_g0.dev_attr.attr, + &sensor_dev_attr_cpld_qsfp56_mod_int_mask_g1.dev_attr.attr, + &sensor_dev_attr_cpld_qsfp56_mod_int_mask_g2.dev_attr.attr, + &sensor_dev_attr_cpld_qsfpdd_mod_int_mask.dev_attr.attr, + &sensor_dev_attr_cpld_qsfp56_pres_mask_g0.dev_attr.attr, + &sensor_dev_attr_cpld_qsfp56_pres_mask_g1.dev_attr.attr, + &sensor_dev_attr_cpld_qsfp56_pres_mask_g2.dev_attr.attr, + &sensor_dev_attr_cpld_qsfpdd_pres_mask.dev_attr.attr, + &sensor_dev_attr_cpld_qsfp56_fuse_int_mask_g0.dev_attr.attr, + &sensor_dev_attr_cpld_qsfp56_fuse_int_mask_g1.dev_attr.attr, + &sensor_dev_attr_cpld_qsfp56_fuse_int_mask_g2.dev_attr.attr, + &sensor_dev_attr_cpld_qsfpdd_fuse_int_mask.dev_attr.attr, + &sensor_dev_attr_cpld_sfp_txfault_mask.dev_attr.attr, + &sensor_dev_attr_cpld_sfp_abs_mask.dev_attr.attr, + &sensor_dev_attr_cpld_sfp_rxlos_mask.dev_attr.attr, + &sensor_dev_attr_cpld_qsfp56_mod_int_event_g0.dev_attr.attr, + &sensor_dev_attr_cpld_qsfp56_mod_int_event_g1.dev_attr.attr, + &sensor_dev_attr_cpld_qsfp56_mod_int_event_g2.dev_attr.attr, + &sensor_dev_attr_cpld_qsfpdd_mod_int_event.dev_attr.attr, + &sensor_dev_attr_cpld_qsfp56_pres_event_g0.dev_attr.attr, + &sensor_dev_attr_cpld_qsfp56_pres_event_g1.dev_attr.attr, + &sensor_dev_attr_cpld_qsfp56_pres_event_g2.dev_attr.attr, + &sensor_dev_attr_cpld_qsfpdd_pres_event.dev_attr.attr, + &sensor_dev_attr_cpld_qsfp56_fuse_int_event_g0.dev_attr.attr, + &sensor_dev_attr_cpld_qsfp56_fuse_int_event_g1.dev_attr.attr, + &sensor_dev_attr_cpld_qsfp56_fuse_int_event_g2.dev_attr.attr, + &sensor_dev_attr_cpld_qsfpdd_fuse_int_event.dev_attr.attr, + &sensor_dev_attr_cpld_sfp_txfault_event.dev_attr.attr, + &sensor_dev_attr_cpld_sfp_abs_event.dev_attr.attr, + &sensor_dev_attr_cpld_sfp_rxlos_event.dev_attr.attr, + &sensor_dev_attr_cpld_qsfp56_reset_ctrl_g0.dev_attr.attr, + &sensor_dev_attr_cpld_qsfp56_reset_ctrl_g1.dev_attr.attr, + &sensor_dev_attr_cpld_qsfp56_reset_ctrl_g2.dev_attr.attr, + &sensor_dev_attr_cpld_qsfpdd_reset_ctrl.dev_attr.attr, + &sensor_dev_attr_cpld_qsfp56_lp_mode_g0.dev_attr.attr, + &sensor_dev_attr_cpld_qsfp56_lp_mode_g1.dev_attr.attr, + &sensor_dev_attr_cpld_qsfp56_lp_mode_g2.dev_attr.attr, + &sensor_dev_attr_cpld_qsfpdd_lp_mode.dev_attr.attr, + &sensor_dev_attr_cpld_sfp_tx_dis.dev_attr.attr, + &sensor_dev_attr_cpld_sfp_rs.dev_attr.attr, + &sensor_dev_attr_cpld_sfp_ts.dev_attr.attr, + &sensor_dev_attr_cpld_port_int_status.dev_attr.attr, + NULL +}; + +/* cpld 3 */ +static struct attribute *s9301_cpld3_attributes[] = { + &sensor_dev_attr_cpld_access_register.dev_attr.attr, + &sensor_dev_attr_cpld_register_value.dev_attr.attr, + &sensor_dev_attr_cpld_major_ver.dev_attr.attr, + &sensor_dev_attr_cpld_minor_ver.dev_attr.attr, + &sensor_dev_attr_cpld_build_ver.dev_attr.attr, + &sensor_dev_attr_cpld_version_h.dev_attr.attr, + &sensor_dev_attr_cpld_id.dev_attr.attr, + NULL +}; + +/* cpld 1 attributes group */ +static const struct attribute_group s9301_cpld1_group = { + .attrs = s9301_cpld1_attributes, +}; +/* cpld 2 attributes group */ +static const struct attribute_group s9301_cpld2_group = { + .attrs = s9301_cpld2_attributes, +}; +/* cpld 3 attributes group */ +static const struct attribute_group s9301_cpld3_group = { + .attrs = s9301_cpld3_attributes, +}; + +static int _bsp_log(u8 log_type, char *fmt, ...) +{ + if((log_type==LOG_READ && enable_log_read) || + (log_type==LOG_WRITE && enable_log_write)) { + va_list args; + int r; + + va_start(args, fmt); + r = vprintk(fmt, args); + va_end(args); + + return r; + } else { + return 0; + } +} + +static int _config_bsp_log(u8 log_type) +{ + switch(log_type) { + case LOG_NONE: + enable_log_read = LOG_DISABLE; + enable_log_write = LOG_DISABLE; + break; + case LOG_RW: + enable_log_read = LOG_ENABLE; + enable_log_write = LOG_ENABLE; + break; + case LOG_READ: + enable_log_read = LOG_ENABLE; + enable_log_write = LOG_DISABLE; + break; + case LOG_WRITE: + enable_log_read = LOG_DISABLE; + enable_log_write = LOG_ENABLE; + break; + default: + return -EINVAL; + } + return 0; +} + +/* get bsp value */ +static ssize_t read_bsp(char *buf, char *str) +{ + ssize_t len=0; + + len=sprintf(buf, "%s", str); + BSP_LOG_R("reg_val=%s", str); + + return len; +} + +/* set bsp value */ +static ssize_t write_bsp(const char *buf, char *str, size_t str_len, size_t count) +{ + snprintf(str, str_len, "%s", buf); + BSP_LOG_W("reg_val=%s", str); + + return count; +} + +/* get bsp parameter value */ +static ssize_t read_bsp_callback(struct device *dev, + struct device_attribute *da, char *buf) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + int str_len=0; + char *str=NULL; + + switch(attr->index) { + case BSP_DEBUG: + str = bsp_debug; + str_len = sizeof(bsp_debug); + break; + default: + return -EINVAL; + } + return read_bsp(buf, str); +} + +/* set bsp parameter value */ +static ssize_t write_bsp_callback(struct device *dev, + struct device_attribute *da, const char *buf, size_t count) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + int str_len=0; + char *str=NULL; + ssize_t ret = 0; + u8 bsp_debug_u8 = 0; + + switch(attr->index) { + case BSP_DEBUG: + str = bsp_debug; + str_len = sizeof(str); + ret = write_bsp(buf, str, str_len, count); + + if(kstrtou8(buf, 0, &bsp_debug_u8) < 0) { + return -EINVAL; + } else if(_config_bsp_log(bsp_debug_u8) < 0) { + return -EINVAL; + } + return ret; + default: + return -EINVAL; + } + return 0; +} + +/* read access register from cpld data */ +static ssize_t read_access_register(struct device *dev, + struct device_attribute *da, + char *buf) +{ + struct i2c_client *client = to_i2c_client(dev); + struct cpld_data *data = i2c_get_clientdata(client); + u8 reg = data->access_reg; + + return sprintf(buf, "0x%x\n", reg); +} + +/* write access register to cpld data */ +static ssize_t write_access_register(struct device *dev, + struct device_attribute *da, + const char *buf, + size_t count) +{ + struct i2c_client *client = to_i2c_client(dev); + struct cpld_data *data = i2c_get_clientdata(client); + u8 reg; + + if(kstrtou8(buf, 0, ®) < 0) + return -EINVAL; + + data->access_reg = reg; + return count; +} + +/* read the value of access register in cpld data */ +static ssize_t read_register_value(struct device *dev, + struct device_attribute *da, + char *buf) +{ + struct i2c_client *client = to_i2c_client(dev); + struct cpld_data *data = i2c_get_clientdata(client); + u8 reg = data->access_reg; + int reg_val; + + I2C_READ_BYTE_DATA(reg_val, &data->access_lock, client, reg); + + if(reg_val < 0) + return reg_val; + + return sprintf(buf, "0x%x\n", reg_val); +} + +/* wrtie the value to access register in cpld data */ +static ssize_t write_register_value(struct device *dev, + struct device_attribute *da, + const char *buf, + size_t count) +{ + struct i2c_client *client = to_i2c_client(dev); + struct cpld_data *data = i2c_get_clientdata(client); + int ret = -EIO; + u8 reg = data->access_reg; + u8 reg_val; + + if(kstrtou8(buf, 0, ®_val) < 0) + return -EINVAL; + + I2C_WRITE_BYTE_DATA(ret, &data->access_lock, client, reg, reg_val); + + if(unlikely(ret < 0)) { + dev_err(dev, "I2C_WRITE_BYTE_DATA error, return=%d\n", ret); + return ret; + } + + return count; +} + +/* get cpld register value */ +static ssize_t read_cpld_reg(struct device *dev, + char *buf, + u8 reg) +{ + int reg_val; + + if(read_cpld_reg_raw_int(dev, reg, ®_val)) + return sprintf(buf, "0x%02x\n", reg_val); + else + return reg_val; +} + +static bool read_cpld_reg_raw_int(struct device *dev, u8 reg, int *val) +{ + struct i2c_client *client = to_i2c_client(dev); + struct cpld_data *data = i2c_get_clientdata(client); + I2C_READ_BYTE_DATA(*val, &data->access_lock, client, reg); + if(unlikely(*val < 0)) { + dev_err(dev, "read_cpld_reg_raw_int() error, return=%d\n", *val); + return false; + } + return true; +} + +static bool read_cpld_reg_raw_byte(struct device *dev, u8 reg, u8 *val, int *errno) +{ + int reg_val; + + if(read_cpld_reg_raw_int(dev, reg, ®_val)) { + *val = (u8)reg_val; + return true; + } else { + *errno = reg_val; + return false; + } +} + +/* handle read for attributes */ +static ssize_t read_cpld_callback(struct device *dev, + struct device_attribute *da, char *buf) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + u8 reg = 0; + + switch(attr->index) { + case CPLD_SKU_ID: + reg = CPLD_SKU_ID_REG; + break; + case CPLD_ID: + reg = CPLD_ID_REG; + break; + case CPLD_BUILD_VER: + reg = CPLD_BUILD_VER_REG; + break; + case CPLD_MAC_INTR: + reg = CPLD_MAC_INTR_REG; + break; + case CPLD_10G_PHY_INTR: + reg = CPLD_10G_PHY_INTR_REG; + break; + case CPLD_CPLD_FRU_INTR: + reg = CPLD_CPLD_FRU_INTR_REG; + break; + case CPLD_THERMAL_ALERT_INTR: + reg = CPLD_THERMAL_ALERT_INTR_REG; + break; + case CPLD_MISC_INTR: + reg = CPLD_MISC_INTR_REG; + break; + case CPLD_SYSTEM_INTR: + reg = CPLD_SYSTEM_INTR_REG; + break; + case CPLD_MAC_INTR_MASK: + reg = CPLD_MAC_INTR_MASK_REG; + break; + case CPLD_10G_PHY_INTR_MASK: + reg = CPLD_10G_PHY_INTR_MASK_REG; + break; + case CPLD_CPLD_FRU_INTR_MASK: + reg = CPLD_CPLD_FRU_INTR_MASK_REG; + break; + case CPLD_THERMAL_ALERT_INTR_MASK: + reg = CPLD_THERMAL_ALERT_INTR_MASK_REG; + break; + case CPLD_MISC_INTR_MASK: + reg = CPLD_MISC_INTR_MASK_REG; + break; + case CPLD_MAC_INTR_EVENT: + reg = CPLD_MAC_INTR_EVENT_REG; + break; + case CPLD_10G_PHY_INTR_EVENT: + reg = CPLD_10G_PHY_INTR_EVENT_REG; + break; + case CPLD_CPLD_FRU_INTR_EVENT: + reg = CPLD_CPLD_FRU_INTR_EVENT_REG; + break; + case CPLD_THERMAL_ALERT_INTR_EVENT: + reg = CPLD_THERMAL_ALERT_INTR_EVENT_REG; + break; + case CPLD_MISC_INTR_EVENT: + reg = CPLD_MISC_INTR_EVENT_REG; + break; + case CPLD_MAC_RST: + reg = CPLD_MAC_RST_REG; + break; + case CPLD_10G_PHY_RST: + reg = CPLD_10G_PHY_RST_REG; + break; + case CPLD_BMC_RST: + reg = CPLD_BMC_RST_REG; + break; + case CPLD_USB_RST: + reg = CPLD_USB_RST_REG; + break; + case CPLD_MUX_RST: + reg = CPLD_MUX_RST_REG; + break; + case CPLD_MISC_RST: + reg = CPLD_MISC_RST_REG; + break; + case CPLD_BMC_WATCHDOG: + reg = CPLD_BMC_WATCHDOG_REG; + break; + case CPLD_DAU_BD_PRES: + reg = CPLD_DAU_BD_PRES_REG; + break; + case CPLD_PSU_STATUS: + reg = CPLD_PSU_STATUS_REG; + break; + case CPLD_SYS_PW_STATUS: + reg = CPLD_SYS_PW_STATUS_REG; + break; + case CPLD_MISC: + reg = CPLD_MISC_REG; + break; + case CPLD_MUX_CTRL: + reg = CPLD_MUX_CTRL_REG; + break; + case CPLD_10GMUX_SEL: + reg = CPLD_10GMUX_SEL_REG; + break; + case CPLD_MAC_QSFP_SEL_CTRL: + reg = CPLD_MAC_QSFP_SEL_CTRL_REG; + break; + case CPLD_SYS_LED_CTRL_1: + reg = CPLD_SYS_LED_CTRL_1_REG; + break; + case CPLD_SYS_LED_CTRL_2: + reg = CPLD_SYS_LED_CTRL_2_REG; + break; + case CPLD_BEACON_LED_CTRL: + reg = CPLD_BEACON_LED_CTRL_REG; + break; + case CPLD_PORT_LED_CLR_CTRL: + reg = CPLD_PORT_LED_CLR_CTRL_REG; + break; + case CPLD_EVENT_DETECT_CTRL: + reg = CPLD_EVENT_DETECT_CTRL_REG; + break; + case CPLD_QSFP56_MOD_INT_G0: + reg = CPLD_QSFP56_MOD_INT_G0_REG; + break; + case CPLD_QSFP56_MOD_INT_G1: + reg = CPLD_QSFP56_MOD_INT_G1_REG; + break; + case CPLD_QSFP56_MOD_INT_G2: + reg = CPLD_QSFP56_MOD_INT_G2_REG; + break; + case CPLD_QSFPDD_MOD_INT: + reg = CPLD_QSFPDD_MOD_INT_REG; + break; + case CPLD_QSFP56_PRES_G0: + reg = CPLD_QSFP56_PRES_G0_REG; + break; + case CPLD_QSFP56_PRES_G1: + reg = CPLD_QSFP56_PRES_G1_REG; + break; + case CPLD_QSFP56_PRES_G2: + reg = CPLD_QSFP56_PRES_G2_REG; + break; + case CPLD_QSFPDD_PRES: + reg = CPLD_QSFPDD_PRES_REG; + break; + case CPLD_QSFP56_FUSE_INT_G0: + reg = CPLD_QSFP56_FUSE_INT_G0_REG; + break; + case CPLD_QSFP56_FUSE_INT_G1: + reg = CPLD_QSFP56_FUSE_INT_G1_REG; + break; + case CPLD_QSFP56_FUSE_INT_G2: + reg = CPLD_QSFP56_FUSE_INT_G2_REG; + break; + case CPLD_QSFPDD_FUSE_INT: + reg = CPLD_QSFPDD_FUSE_INT_REG; + break; + case CPLD_SFP_TXFAULT: + reg = CPLD_SFP_TXFAULT_REG; + break; + case CPLD_SFP_ABS: + reg = CPLD_SFP_ABS_REG; + break; + case CPLD_SFP_RXLOS: + reg = CPLD_SFP_RXLOS_REG; + break; + case CPLD_QSFP56_MOD_INT_MASK_G0: + reg = CPLD_QSFP56_MOD_INT_MASK_G0_REG; + break; + case CPLD_QSFP56_MOD_INT_MASK_G1: + reg = CPLD_QSFP56_MOD_INT_MASK_G1_REG; + break; + case CPLD_QSFP56_MOD_INT_MASK_G2: + reg = CPLD_QSFP56_MOD_INT_MASK_G2_REG; + break; + case CPLD_QSFPDD_MOD_INT_MASK: + reg = CPLD_QSFPDD_MOD_INT_MASK_REG; + break; + case CPLD_QSFP56_PRES_MASK_G0: + reg = CPLD_QSFP56_PRES_MASK_G0_REG; + break; + case CPLD_QSFP56_PRES_MASK_G1: + reg = CPLD_QSFP56_PRES_MASK_G1_REG; + break; + case CPLD_QSFP56_PRES_MASK_G2: + reg = CPLD_QSFP56_PRES_MASK_G2_REG; + break; + case CPLD_QSFPDD_PRES_MASK: + reg = CPLD_QSFPDD_PRES_MASK_REG; + break; + case CPLD_QSFP56_FUSE_INT_MASK_G0: + reg = CPLD_QSFP56_FUSE_INT_MASK_G0_REG; + break; + case CPLD_QSFP56_FUSE_INT_MASK_G1: + reg = CPLD_QSFP56_FUSE_INT_MASK_G1_REG; + break; + case CPLD_QSFP56_FUSE_INT_MASK_G2: + reg = CPLD_QSFP56_FUSE_INT_MASK_G2_REG; + break; + case CPLD_QSFPDD_FUSE_INT_MASK: + reg = CPLD_QSFPDD_FUSE_INT_MASK_REG; + break; + case CPLD_SFP_TXFAULT_MASK: + reg = CPLD_SFP_TXFAULT_MASK_REG; + break; + case CPLD_SFP_ABS_MASK: + reg = CPLD_SFP_ABS_MASK_REG; + break; + case CPLD_SFP_RXLOS_MASK: + reg = CPLD_SFP_RXLOS_MASK_REG; + break; + case CPLD_QSFP56_MOD_INT_EVENT_G0: + reg = CPLD_QSFP56_MOD_INT_EVENT_G0_REG; + break; + case CPLD_QSFP56_MOD_INT_EVENT_G1: + reg = CPLD_QSFP56_MOD_INT_EVENT_G1_REG; + break; + case CPLD_QSFP56_MOD_INT_EVENT_G2: + reg = CPLD_QSFP56_MOD_INT_EVENT_G2_REG; + break; + case CPLD_QSFPDD_MOD_INT_EVENT: + reg = CPLD_QSFPDD_MOD_INT_EVENT_REG; + break; + case CPLD_QSFP56_PRES_EVENT_G0: + reg = CPLD_QSFP56_PRES_EVENT_G0_REG; + break; + case CPLD_QSFP56_PRES_EVENT_G1: + reg = CPLD_QSFP56_PRES_EVENT_G1_REG; + break; + case CPLD_QSFP56_PRES_EVENT_G2: + reg = CPLD_QSFP56_PRES_EVENT_G2_REG; + break; + case CPLD_QSFPDD_PRES_EVENT: + reg = CPLD_QSFPDD_PRES_EVENT_REG; + break; + case CPLD_QSFP56_FUSE_INT_EVENT_G0: + reg = CPLD_QSFP56_FUSE_INT_EVENT_G0_REG; + break; + case CPLD_QSFP56_FUSE_INT_EVENT_G1: + reg = CPLD_QSFP56_FUSE_INT_EVENT_G1_REG; + break; + case CPLD_QSFP56_FUSE_INT_EVENT_G2: + reg = CPLD_QSFP56_FUSE_INT_EVENT_G2_REG; + break; + case CPLD_QSFPDD_FUSE_INT_EVENT: + reg = CPLD_QSFPDD_FUSE_INT_EVENT_REG; + break; + case CPLD_SFP_TXFAULT_EVENT: + reg = CPLD_SFP_TXFAULT_EVENT_REG; + break; + case CPLD_SFP_ABS_EVENT: + reg = CPLD_SFP_ABS_EVENT_REG; + break; + case CPLD_SFP_RXLOS_EVENT: + reg = CPLD_SFP_RXLOS_EVENT_REG; + break; + case CPLD_QSFP56_RESET_CTRL_G0: + reg = CPLD_QSFP56_RESET_CTRL_G0_REG; + break; + case CPLD_QSFP56_RESET_CTRL_G1: + reg = CPLD_QSFP56_RESET_CTRL_G1_REG; + break; + case CPLD_QSFP56_RESET_CTRL_G2: + reg = CPLD_QSFP56_RESET_CTRL_G2_REG; + break; + case CPLD_QSFPDD_RESET_CTRL: + reg = CPLD_QSFPDD_RESET_CTRL_REG; + break; + case CPLD_QSFP56_LP_MODE_G0: + reg = CPLD_QSFP56_LP_MODE_G0_REG; + break; + case CPLD_QSFP56_LP_MODE_G1: + reg = CPLD_QSFP56_LP_MODE_G1_REG; + break; + case CPLD_QSFP56_LP_MODE_G2: + reg = CPLD_QSFP56_LP_MODE_G2_REG; + break; + case CPLD_QSFPDD_LP_MODE: + reg = CPLD_QSFPDD_LP_MODE_REG; + break; + case CPLD_SFP_TX_DIS: + reg = CPLD_SFP_TX_DIS_REG; + break; + case CPLD_SFP_RS: + reg = CPLD_SFP_RS_REG; + break; + case CPLD_SFP_TS: + reg = CPLD_SFP_TS_REG; + break; + case CPLD_PORT_INT_STATUS: + reg = CPLD_PORT_INT_STATUS_REG; + break; + default: + return -EINVAL; + } + return read_cpld_reg(dev, buf, reg); +} + +/* handle read for hw_rev attributes */ +static ssize_t read_hw_rev_cb(struct device *dev, + struct device_attribute *da, char *buf) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + u8 reg = CPLD_HW_REV_REG; + u8 reg_val = 0; + int errno = 0; + u8 res; + + if(!read_cpld_reg_raw_byte(dev, reg, ®_val, &errno)) + return errno; + + switch(attr->index) { + case CPLD_HW_REV: + HW_REV_GET(reg_val, res); + break; + case CPLD_DEPH_REV: + DEPH_REV_GET(reg_val, res); + break; + case CPLD_BUILD_REV: + BUILD_REV_GET(reg_val, res); + break; + case CPLD_ID_TYPE: + ID_TYPE_GET(reg_val, res); + break; + default: + return -EINVAL; + } + return sprintf(buf, "0x%02x\n", res); +} + +/* handle read for cpld_version attributes */ +static ssize_t read_cpld_version_cb(struct device *dev, + struct device_attribute *da, char *buf) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + u8 reg = CPLD_VERSION_REG; + u8 reg_val = 0; + int errno = 0; + u8 res; + + if(!read_cpld_reg_raw_byte(dev, reg, ®_val, &errno)) + return errno; + + switch(attr->index) { + case CPLD_MAJOR_VER: + CPLD_MAJOR_VERSION_GET(reg_val, res); + break; + case CPLD_MINOR_VER: + CPLD_MINOR_VERSION_GET(reg_val, res); + break; + default: + return -EINVAL; + } + return sprintf(buf, "0x%02x\n", res); +} + +/* handle read human-readable string for cpld_version attributes */ +static ssize_t read_cpld_version_h_cb(struct device *dev, + struct device_attribute *da, char *buf) +{ + u8 reg = CPLD_VERSION_REG; + u8 reg_val = 0; + int errno = 0; + u8 major, minor, build; + + //get major/minor register value + if(!read_cpld_reg_raw_byte(dev, reg, ®_val, &errno)) + return errno; + CPLD_MAJOR_VERSION_GET(reg_val, major); + CPLD_MINOR_VERSION_GET(reg_val, minor); + + //get build register value + reg = CPLD_BUILD_VER_REG; + if(!read_cpld_reg_raw_byte(dev, reg, &build, &errno)) + return errno; + + //version string format : xx.xx.xxx + return sprintf(buf, "%d.%02d.%03d\n", major, minor, build); +} + +/* handle write for attributes */ +static ssize_t write_cpld_callback(struct device *dev, + struct device_attribute *da, const char *buf, size_t count) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + u8 reg = 0; + + switch(attr->index) { + case CPLD_MAC_INTR_MASK: + reg = CPLD_MAC_INTR_MASK_REG; + break; + case CPLD_10G_PHY_INTR_MASK: + reg = CPLD_10G_PHY_INTR_MASK_REG; + break; + case CPLD_CPLD_FRU_INTR_MASK: + reg = CPLD_CPLD_FRU_INTR_MASK_REG; + break; + case CPLD_THERMAL_ALERT_INTR_MASK: + reg = CPLD_THERMAL_ALERT_INTR_MASK_REG; + break; + case CPLD_MISC_INTR_MASK: + reg = CPLD_MISC_INTR_MASK_REG; + break; + case CPLD_MAC_RST: + reg = CPLD_MAC_RST_REG; + break; + case CPLD_10G_PHY_RST: + reg = CPLD_10G_PHY_RST_REG; + break; + case CPLD_BMC_RST: + reg = CPLD_BMC_RST_REG; + break; + case CPLD_USB_RST: + reg = CPLD_USB_RST_REG; + break; + case CPLD_MUX_RST: + reg = CPLD_MUX_RST_REG; + break; + case CPLD_MISC_RST: + reg = CPLD_MISC_RST_REG; + break; + case CPLD_BMC_WATCHDOG: + reg = CPLD_BMC_WATCHDOG_REG; + break; + case CPLD_MUX_CTRL: + reg = CPLD_MUX_CTRL_REG; + break; + case CPLD_10GMUX_SEL: + reg = CPLD_10GMUX_SEL_REG; + break; + case CPLD_MAC_QSFP_SEL_CTRL: + reg = CPLD_MAC_QSFP_SEL_CTRL_REG; + break; + case CPLD_BEACON_LED_CTRL: + reg = CPLD_BEACON_LED_CTRL_REG; + break; + case CPLD_PORT_LED_CLR_CTRL: + reg = CPLD_PORT_LED_CLR_CTRL_REG; + break; + case CPLD_EVENT_DETECT_CTRL: + reg = CPLD_EVENT_DETECT_CTRL_REG; + break; + case CPLD_QSFP56_MOD_INT_MASK_G0: + reg = CPLD_QSFP56_MOD_INT_MASK_G0_REG; + break; + case CPLD_QSFP56_MOD_INT_MASK_G1: + reg = CPLD_QSFP56_MOD_INT_MASK_G1_REG; + break; + case CPLD_QSFP56_MOD_INT_MASK_G2: + reg = CPLD_QSFP56_MOD_INT_MASK_G2_REG; + break; + case CPLD_QSFPDD_MOD_INT_MASK: + reg = CPLD_QSFPDD_MOD_INT_MASK_REG; + break; + case CPLD_QSFP56_PRES_MASK_G0: + reg = CPLD_QSFP56_PRES_MASK_G0_REG; + break; + case CPLD_QSFP56_PRES_MASK_G1: + reg = CPLD_QSFP56_PRES_MASK_G1_REG; + break; + case CPLD_QSFP56_PRES_MASK_G2: + reg = CPLD_QSFP56_PRES_MASK_G2_REG; + break; + case CPLD_QSFPDD_PRES_MASK: + reg = CPLD_QSFPDD_PRES_MASK_REG; + break; + case CPLD_QSFP56_FUSE_INT_MASK_G0: + reg = CPLD_QSFP56_FUSE_INT_MASK_G0_REG; + break; + case CPLD_QSFP56_FUSE_INT_MASK_G1: + reg = CPLD_QSFP56_FUSE_INT_MASK_G1_REG; + break; + case CPLD_QSFP56_FUSE_INT_MASK_G2: + reg = CPLD_QSFP56_FUSE_INT_MASK_G2_REG; + break; + case CPLD_QSFPDD_FUSE_INT_MASK: + reg = CPLD_QSFPDD_FUSE_INT_MASK_REG; + break; + case CPLD_SFP_TXFAULT_MASK: + reg = CPLD_SFP_TXFAULT_MASK_REG; + break; + case CPLD_SFP_ABS_MASK: + reg = CPLD_SFP_ABS_MASK_REG; + break; + case CPLD_SFP_RXLOS_MASK: + reg = CPLD_SFP_RXLOS_MASK_REG; + break; + case CPLD_QSFP56_RESET_CTRL_G0: + reg = CPLD_QSFP56_RESET_CTRL_G0_REG; + break; + case CPLD_QSFP56_RESET_CTRL_G1: + reg = CPLD_QSFP56_RESET_CTRL_G1_REG; + break; + case CPLD_QSFP56_RESET_CTRL_G2: + reg = CPLD_QSFP56_RESET_CTRL_G2_REG; + break; + case CPLD_QSFPDD_RESET_CTRL: + reg = CPLD_QSFPDD_RESET_CTRL_REG; + break; + case CPLD_QSFP56_LP_MODE_G0: + reg = CPLD_QSFP56_LP_MODE_G0_REG; + break; + case CPLD_QSFP56_LP_MODE_G1: + reg = CPLD_QSFP56_LP_MODE_G1_REG; + break; + case CPLD_QSFP56_LP_MODE_G2: + reg = CPLD_QSFP56_LP_MODE_G2_REG; + break; + case CPLD_QSFPDD_LP_MODE: + reg = CPLD_QSFPDD_LP_MODE_REG; + break; + case CPLD_SFP_TX_DIS: + reg = CPLD_SFP_TX_DIS_REG; + break; + case CPLD_SFP_RS: + reg = CPLD_SFP_RS_REG; + break; + case CPLD_SFP_TS: + reg = CPLD_SFP_TS_REG; + break; + default: + return -EINVAL; + } + return write_cpld_reg(dev, buf, count, reg); +} + +/* set cpld register value */ +static ssize_t write_cpld_reg(struct device *dev, + const char *buf, + size_t count, + u8 reg) +{ + struct i2c_client *client = to_i2c_client(dev); + struct cpld_data *data = i2c_get_clientdata(client); + u8 reg_val; + int ret; + + if(kstrtou8(buf, 0, ®_val) < 0) + return -EINVAL; + + I2C_WRITE_BYTE_DATA(ret, &data->access_lock, + client, reg, reg_val); + + if(unlikely(ret < 0)) { + dev_err(dev, "I2C_WRITE_BYTE_DATA error, return=%d\n", ret); + return ret; + } + + return count; +} + +/* add valid cpld client to list */ +static void s9301_cpld_add_client(struct i2c_client *client) +{ + struct cpld_client_node *node = NULL; + + node = kzalloc(sizeof(struct cpld_client_node), GFP_KERNEL); + if(!node) { + dev_info(&client->dev, + "Can't allocate cpld_client_node for index %d\n", + client->addr); + return; + } + + node->client = client; + + mutex_lock(&list_lock); + list_add(&node->list, &cpld_client_list); + mutex_unlock(&list_lock); +} + +/* remove exist cpld client in list */ +static void s9301_cpld_remove_client(struct i2c_client *client) +{ + struct list_head *list_node = NULL; + struct cpld_client_node *cpld_node = NULL; + int found = 0; + + mutex_lock(&list_lock); + list_for_each(list_node, &cpld_client_list) { + cpld_node = list_entry(list_node, + struct cpld_client_node, list); + + if(cpld_node->client == client) { + found = 1; + break; + } + } + + if(found) { + list_del(list_node); + kfree(cpld_node); + } + mutex_unlock(&list_lock); +} + +/* cpld drvier probe */ +static int s9301_cpld_probe(struct i2c_client *client, + const struct i2c_device_id *dev_id) +{ + int status; + struct cpld_data *data = NULL; + int ret = -EPERM; + int idx; + + data = kzalloc(sizeof(struct cpld_data), GFP_KERNEL); + if(!data) + return -ENOMEM; + + /* init cpld data for client */ + i2c_set_clientdata(client, data); + mutex_init(&data->access_lock); + + if(!i2c_check_functionality(client->adapter, + I2C_FUNC_SMBUS_BYTE_DATA)) { + dev_info(&client->dev, + "i2c_check_functionality failed (0x%x)\n", + client->addr); + status = -EIO; + goto exit; + } + + /* get cpld id from device */ + ret = i2c_smbus_read_byte_data(client, CPLD_ID_REG); + + if(ret < 0) { + dev_info(&client->dev, + "fail to get cpld id (0x%x) at addr (0x%x)\n", + CPLD_ID_REG, client->addr); + status = -EIO; + goto exit; + } + + CPLD_ID_ID_GET(ret, idx); + + if(INVALID(idx, cpld1, cpld3)) { + dev_info(&client->dev, + "cpld id %d(device) not valid\n", idx); + //status = -EPERM; + //goto exit; + } + + data->index = dev_id->driver_data; + + /* register sysfs hooks for different cpld group */ + dev_info(&client->dev, "probe cpld with index %d\n", data->index); + switch(data->index) { + case cpld1: + status = sysfs_create_group(&client->dev.kobj, + &s9301_cpld1_group); + break; + case cpld2: + status = sysfs_create_group(&client->dev.kobj, + &s9301_cpld2_group); + break; + case cpld3: + status = sysfs_create_group(&client->dev.kobj, + &s9301_cpld3_group); + break; + default: + status = -EINVAL; + } + + if(status) + goto exit; + + dev_info(&client->dev, "chip found\n"); + + /* add probe chip to client list */ + s9301_cpld_add_client(client); + + return 0; +exit: + switch(data->index) { + case cpld1: + sysfs_remove_group(&client->dev.kobj, &s9301_cpld1_group); + break; + case cpld2: + sysfs_remove_group(&client->dev.kobj, &s9301_cpld2_group); + break; + case cpld3: + sysfs_remove_group(&client->dev.kobj, &s9301_cpld3_group); + break; + default: + break; + } + return status; +} + +/* cpld drvier remove */ +#if LINUX_VERSION_CODE < KERNEL_VERSION(6, 1, 0) +static int +#else +static void +#endif +s9301_cpld_remove(struct i2c_client *client) +{ + struct cpld_data *data = i2c_get_clientdata(client); + + switch(data->index) { + case cpld1: + sysfs_remove_group(&client->dev.kobj, &s9301_cpld1_group); + break; + case cpld2: + sysfs_remove_group(&client->dev.kobj, &s9301_cpld2_group); + break; + case cpld3: + sysfs_remove_group(&client->dev.kobj, &s9301_cpld3_group); + break; + } + + s9301_cpld_remove_client(client); +#if LINUX_VERSION_CODE < KERNEL_VERSION(6, 1, 0) + return 0; +#endif +} + +MODULE_DEVICE_TABLE(i2c, s9301_cpld_id); + +static struct i2c_driver s9301_cpld_driver = { + .class = I2C_CLASS_HWMON, + .driver = { + .name = "x86_64_ufispace_s9301_32db_cpld", + }, + .probe = s9301_cpld_probe, + .remove = s9301_cpld_remove, + .id_table = s9301_cpld_id, + .address_list = cpld_i2c_addr, +}; + +/* provide cpld register read */ +/* cpld_idx indicate the index of cpld device */ +int s9301_cpld_read(u8 cpld_idx, + u8 reg) +{ + struct list_head *list_node = NULL; + struct cpld_client_node *cpld_node = NULL; + int ret = -EPERM; + struct cpld_data *data; + + list_for_each(list_node, &cpld_client_list) { + cpld_node = list_entry(list_node, + struct cpld_client_node, list); + data = i2c_get_clientdata(cpld_node->client); + if(data->index == cpld_idx) { + DEBUG_PRINT("cpld_idx=%d, read reg 0x%02x", + cpld_idx, reg); + I2C_READ_BYTE_DATA(ret, &data->access_lock, + cpld_node->client, reg); + DEBUG_PRINT("cpld_idx=%d, read reg 0x%02x = 0x%02x", + cpld_idx, reg, ret); + break; + } + } + + return ret; +} +EXPORT_SYMBOL(s9301_cpld_read); + +/* provide cpld register write */ +/* cpld_idx indicate the index of cpld device */ +int s9301_cpld_write(u8 cpld_idx, + u8 reg, + u8 value) +{ + struct list_head *list_node = NULL; + struct cpld_client_node *cpld_node = NULL; + int ret = -EIO; + struct cpld_data *data; + + list_for_each(list_node, &cpld_client_list) { + cpld_node = list_entry(list_node, + struct cpld_client_node, list); + data = i2c_get_clientdata(cpld_node->client); + + if(data->index == cpld_idx) { + I2C_WRITE_BYTE_DATA(ret, &data->access_lock, + cpld_node->client, + reg, value); + DEBUG_PRINT("cpld_idx=%d, write reg 0x%02x val 0x%02x, ret=%d", + cpld_idx, reg, value, ret); + break; + } + } + + return ret; +} +EXPORT_SYMBOL(s9301_cpld_write); + +static int __init s9301_cpld_init(void) +{ + mutex_init(&list_lock); + return i2c_add_driver(&s9301_cpld_driver); +} + +static void __exit s9301_cpld_exit(void) +{ + i2c_del_driver(&s9301_cpld_driver); +} + +MODULE_AUTHOR("Leo Lin "); +MODULE_DESCRIPTION("x86_64_ufispace_s9301_cpld driver"); +MODULE_LICENSE("GPL"); + +module_init(s9301_cpld_init); +module_exit(s9301_cpld_exit); diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s9301-32db/modules/x86-64-ufispace-s9301-32db-cpld.h b/platform/broadcom/sonic-platform-modules-ufispace/s9301-32db/modules/x86-64-ufispace-s9301-32db-cpld.h new file mode 100644 index 0000000000..64eec8c99f --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ufispace/s9301-32db/modules/x86-64-ufispace-s9301-32db-cpld.h @@ -0,0 +1,256 @@ +/* header file for i2c cpld driver of ufispace_s9301_32db + * + * Copyright (C) 2017 UfiSpace Technology Corporation. + * Leo Lin + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. + */ + +#ifndef UFISPACE_S9301_I2C_CPLD_H +#define UFISPACE_S9301_I2C_CPLD_H + +/* CPLD device index value */ +enum cpld_id { + cpld1, + cpld2, + cpld3, +}; + +enum LED_BLINK { + NOBLINK, + BLINK, +}; + +enum LED_BLINK_SPEED { + BLINK_1X, // 0.5hz + BLINK_4X, // 2hz +}; + +enum LED_STATUS { + OFF, + ON, +}; + +enum LED_YELLOW { + YELLOW_OFF, + YELLOW_ON, +}; + +enum LED_GREEN { + GREEN_OFF, + GREEN_ON, +}; + +/* QSFP56 port number */ +#define QSFP56_MAX_PORT_NUM 24 +#define QSFP56_MIN_PORT_NUM 1 + +/* QSFPDD port number */ +#define QSFPDD_MAX_PORT_NUM 8 +#define QSFPDD_MIN_PORT_NUM 1 + +/* SFP+ port number */ +#define SFP_MAX_PORT_NUM 4 +#define SFP_MIN_PORT_NUM 1 + + +/* CPLD registers */ +/* CPLD 1 */ +#define CPLD_SKU_ID_REG 0x00 +#define CPLD_HW_REV_REG 0x01 +#define CPLD_VERSION_REG 0x02 +#define CPLD_ID_REG 0x03 +#define CPLD_BUILD_VER_REG 0x04 +// Interrupt status +#define CPLD_MAC_INTR_REG 0x10 +#define CPLD_10G_PHY_INTR_REG 0x13 +#define CPLD_CPLD_FRU_INTR_REG 0x14 +#define CPLD_THERMAL_ALERT_INTR_REG 0x16 +#define CPLD_MISC_INTR_REG 0x1B +#define CPLD_SYSTEM_INTR_REG 0x1D +// Interrupt mask +#define CPLD_MAC_INTR_MASK_REG 0x20 +#define CPLD_10G_PHY_INTR_MASK_REG 0x23 +#define CPLD_CPLD_FRU_INTR_MASK_REG 0x24 +#define CPLD_THERMAL_ALERT_INTR_MASK_REG 0x26 +#define CPLD_MISC_INTR_MASK_REG 0x2B +// Interrupt event +#define CPLD_MAC_INTR_EVENT_REG 0x30 +#define CPLD_10G_PHY_INTR_EVENT_REG 0x33 +#define CPLD_CPLD_FRU_INTR_EVENT_REG 0x14 +#define CPLD_THERMAL_ALERT_INTR_EVENT_REG 0x16 +#define CPLD_MISC_INTR_EVENT_REG 0x1B +// Reset ctrl +#define CPLD_MAC_RST_REG 0x40 +#define CPLD_10G_PHY_RST_REG 0x42 +#define CPLD_BMC_RST_REG 0x43 +#define CPLD_USB_RST_REG 0x44 +#define CPLD_MUX_RST_REG 0x46 +#define CPLD_MISC_RST_REG 0x48 +#define CPLD_BMC_WATCHDOG_REG 0x4D +// Sys status +#define CPLD_DAU_BD_PRES_REG 0x50 +#define CPLD_PSU_STATUS_REG 0x51 +#define CPLD_SYS_PW_STATUS_REG 0x52 +#define CPLD_MISC_REG 0x5B +// Mux ctrl +#define CPLD_MUX_CTRL_REG 0x5C +#define CPLD_10GMUX_SEL_REG 0x5E +#define CPLD_MAC_QSFP_SEL_CTRL_REG 0x5F +// Led ctrl +#define CPLD_SYS_LED_CTRL_1_REG 0x80 +#define CPLD_SYS_LED_CTRL_2_REG 0x81 +#define CPLD_BEACON_LED_CTRL_REG 0x84 +#define CPLD_PORT_LED_CLR_CTRL_REG 0x85 +// Event Detect Ctrl +#define CPLD_EVENT_DETECT_CTRL_REG 0x5D + +/* CPLD 2 */ +/* QSFP56 G0 - port 0 ~ 7 + QSFP56 G1 - port 8 ~ 15 + QSFP56 G2 - port 16 ~ 23 + QSFPDD - port 24 ~ 31 + */ +// Interrupt status +#define CPLD_QSFP56_MOD_INT_G0_REG 0x10 +#define CPLD_QSFP56_MOD_INT_G1_REG 0x11 +#define CPLD_QSFP56_MOD_INT_G2_REG 0x12 +#define CPLD_QSFPDD_MOD_INT_REG 0x13 +#define CPLD_QSFP56_PRES_G0_REG 0x14 +#define CPLD_QSFP56_PRES_G1_REG 0x15 +#define CPLD_QSFP56_PRES_G2_REG 0x16 +#define CPLD_QSFPDD_PRES_REG 0x17 +#define CPLD_QSFP56_FUSE_INT_G0_REG 0x18 +#define CPLD_QSFP56_FUSE_INT_G1_REG 0x19 +#define CPLD_QSFP56_FUSE_INT_G2_REG 0x1A +#define CPLD_QSFPDD_FUSE_INT_REG 0x1B +#define CPLD_SFP_TXFAULT_REG 0x1D +#define CPLD_SFP_ABS_REG 0x1E +#define CPLD_SFP_RXLOS_REG 0x1F +// Interrupt mask +#define CPLD_QSFP56_MOD_INT_MASK_G0_REG 0x20 +#define CPLD_QSFP56_MOD_INT_MASK_G1_REG 0x21 +#define CPLD_QSFP56_MOD_INT_MASK_G2_REG 0x22 +#define CPLD_QSFPDD_MOD_INT_MASK_REG 0x23 +#define CPLD_QSFP56_PRES_MASK_G0_REG 0x24 +#define CPLD_QSFP56_PRES_MASK_G1_REG 0x25 +#define CPLD_QSFP56_PRES_MASK_G2_REG 0x26 +#define CPLD_QSFPDD_PRES_MASK_REG 0x27 +#define CPLD_QSFP56_FUSE_INT_MASK_G0_REG 0x28 +#define CPLD_QSFP56_FUSE_INT_MASK_G1_REG 0x29 +#define CPLD_QSFP56_FUSE_INT_MASK_G2_REG 0x2A +#define CPLD_QSFPDD_FUSE_INT_MASK_REG 0x2B +#define CPLD_SFP_TXFAULT_MASK_REG 0x2D +#define CPLD_SFP_ABS_MASK_REG 0x2E +#define CPLD_SFP_RXLOS_MASK_REG 0x2F +// Interrupt event +#define CPLD_QSFP56_MOD_INT_EVENT_G0_REG 0x30 +#define CPLD_QSFP56_MOD_INT_EVENT_G1_REG 0x31 +#define CPLD_QSFP56_MOD_INT_EVENT_G2_REG 0x32 +#define CPLD_QSFPDD_MOD_INT_EVENT_REG 0x33 +#define CPLD_QSFP56_PRES_EVENT_G0_REG 0x34 +#define CPLD_QSFP56_PRES_EVENT_G1_REG 0x35 +#define CPLD_QSFP56_PRES_EVENT_G2_REG 0x36 +#define CPLD_QSFPDD_PRES_EVENT_REG 0x37 +#define CPLD_QSFP56_FUSE_INT_EVENT_G0_REG 0x38 +#define CPLD_QSFP56_FUSE_INT_EVENT_G1_REG 0x39 +#define CPLD_QSFP56_FUSE_INT_EVENT_G2_REG 0x3A +#define CPLD_QSFPDD_FUSE_INT_EVENT_REG 0x3B +#define CPLD_SFP_TXFAULT_EVENT_REG 0x3D +#define CPLD_SFP_ABS_EVENT_REG 0x3E +#define CPLD_SFP_RXLOS_EVENT_REG 0x3F +// Port ctrl +#define CPLD_QSFP56_RESET_CTRL_G0_REG 0x40 +#define CPLD_QSFP56_RESET_CTRL_G1_REG 0x41 +#define CPLD_QSFP56_RESET_CTRL_G2_REG 0x42 +#define CPLD_QSFPDD_RESET_CTRL_REG 0x43 +#define CPLD_QSFP56_LP_MODE_G0_REG 0x44 +#define CPLD_QSFP56_LP_MODE_G1_REG 0x45 +#define CPLD_QSFP56_LP_MODE_G2_REG 0x46 +#define CPLD_QSFPDD_LP_MODE_REG 0x47 +#define CPLD_SFP_TX_DIS_REG 0x55 +#define CPLD_SFP_RS_REG 0x56 +#define CPLD_SFP_TS_REG 0x57 +// Port status +#define CPLD_PORT_INT_STATUS_REG 0x58 + + +/* bit field structure for register value */ +struct cpld_reg_sku_id_t { + u8 model_id:8; +}; + +struct cpld_reg_hw_rev_t { + u8 hw_rev:2; + u8 deph_rev:1; + u8 build_rev:3; + u8 reserved:1; + u8 id_type:1; +}; + +struct cpld_reg_version_t { + u8 minor:6; + u8 major:2; +}; + +struct cpld_reg_id_t { + u8 id:3; + u8 release:5; +}; + +struct cpld_reg_beacon_led_ctrl_t { + u8 reserve:5; + u8 speed:1; + u8 blink:1; + u8 onoff:1; +}; + +/* common manipulation */ +#define INVALID(i, min, max) ((i < min) || (i > max) ? 1u : 0u) +#define READ_BIT(val, bit) ((0u == (val & (1<bf_name) +#define READ_BF_1(bf_struct, val, bf_name, bf_value) \ + bf_struct bf; \ + bf.data = val; \ + bf_value = bf.bf_name +#define HW_REV_GET(val, res) \ + READ_BF(cpld_reg_hw_rev_t, val, hw_rev, res) +#define DEPH_REV_GET(val, res) \ + READ_BF(cpld_reg_hw_rev_t, val, deph_rev, res) +#define BUILD_REV_GET(val, res) \ + READ_BF(cpld_reg_hw_rev_t, val, build_rev, res) +#define ID_TYPE_GET(val, res) \ + READ_BF(cpld_reg_hw_rev_t, val, id_type, res) +#define CPLD_MAJOR_VERSION_GET(val, res) \ + READ_BF(cpld_reg_version_t, val, major, res) +#define CPLD_MINOR_VERSION_GET(val, res) \ + READ_BF(cpld_reg_version_t, val, minor, res) +#define CPLD_ID_ID_GET(val, res) \ + READ_BF(cpld_reg_id_t, val, id, res) + +/* CPLD access functions */ +extern int s9301_cpld_read(u8 cpld_idx, u8 reg); +extern int s9301_cpld_write(u8 cpld_idx, u8 reg, u8 value); + +#endif + diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s9301-32db/modules/x86-64-ufispace-s9301-32db-lpc.c b/platform/broadcom/sonic-platform-modules-ufispace/s9301-32db/modules/x86-64-ufispace-s9301-32db-lpc.c new file mode 100644 index 0000000000..75055891f4 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ufispace/s9301-32db/modules/x86-64-ufispace-s9301-32db-lpc.c @@ -0,0 +1,850 @@ +/* + * A lpc driver for the ufispace_s9301_32db + * + * Copyright (C) 2017-2020 UfiSpace Technology Corporation. + * Jason Tsai + * + * Based on ad7414.c + * Copyright 2006 Stefan Roese , DENX Software Engineering + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. + */ +#include +#include +#include +#include +#include + +#define BSP_LOG_R(fmt, args...) \ + _bsp_log (LOG_READ, KERN_INFO "%s:%s[%d]: " fmt "\r\n", \ + __FILE__, __func__, __LINE__, ##args) +#define BSP_LOG_W(fmt, args...) \ + _bsp_log (LOG_WRITE, KERN_INFO "%s:%s[%d]: " fmt "\r\n", \ + __FILE__, __func__, __LINE__, ##args) + +#define BSP_PR(level, fmt, args...) _bsp_log (LOG_SYS, level "[BSP]" fmt "\r\n", ##args) + +#define DRIVER_NAME "x86_64_ufispace_s9301_32db_lpc" +#define CPU_BDE 0 +#define CPU_SKY 1 +#define CPU_TYPE CPU_SKY + +/* LPC registers */ + +#define REG_BASE_CPU 0x600 + +#if CPU_TYPE == CPU_SKY +#define REG_BASE_MB 0xE00 +#define REG_BASE_I2C_ALERT 0x700 +#else +#define REG_BASE_MB 0x700 +#define REG_BASE_I2C_ALERT 0xF000 +#endif + +//CPU CPLD +#define REG_CPU_CPLD_VERSION (REG_BASE_CPU + 0x00) +#define REG_CPU_STATUS_0 (REG_BASE_CPU + 0x01) +#define REG_CPU_STATUS_1 (REG_BASE_CPU + 0x02) +#define REG_CPU_CTRL_0 (REG_BASE_CPU + 0x03) +#define REG_CPU_CTRL_1 (REG_BASE_CPU + 0x04) +#define REG_CPU_CPLD_BUILD (REG_BASE_CPU + 0xE0) + +//MB CPLD +//TBD, need to change after CPLD spec release +#define REG_MB_BRD_ID_0 (REG_BASE_MB + 0x00) +#define REG_MB_BRD_ID_1 (REG_BASE_MB + 0x01) +#define REG_MB_CPLD_VERSION (REG_BASE_MB + 0x02) +#define REG_MB_CPLD_BUILD (REG_BASE_MB + 0x04) +#define REG_MB_MUX_RESET (REG_BASE_MB + 0x46) +#define REG_MB_MUX_CTRL (REG_BASE_MB + 0x5c) + +//I2C Alert +#if CPU_TYPE == CPU_SKY +#define REG_ALERT_STATUS (REG_BASE_I2C_ALERT + 0x80) +#else +#define REG_ALERT_STATUS (REG_BASE_I2C_ALERT + 0x00) +#define REG_ALERT_DISABLE (REG_BASE_I2C_ALERT + 0x11) +#endif + +#define MASK_ALL (0xFF) +#define LPC_MDELAY (5) + +/* LPC sysfs attributes index */ +enum lpc_sysfs_attributes { + //CPU CPLD + ATT_CPU_CPLD_VERSION, + ATT_CPU_CPLD_VERSION_H, + ATT_CPU_BIOS_BOOT_ROM, + ATT_CPU_BIOS_BOOT_CFG, + ATT_CPU_CPLD_BUILD, + //MB CPLD + ATT_MB_BRD_ID_0, + ATT_MB_BRD_ID_1, + ATT_MB_CPLD_1_VERSION, + ATT_MB_CPLD_1_VERSION_H, + ATT_MB_CPLD_1_BUILD, + ATT_MB_MUX_CTRL, + ATT_MB_MUX_RESET, + ATT_MB_BRD_SKU_ID, + ATT_MB_BRD_HW_ID, + ATT_MB_BRD_ID_TYPE, + ATT_MB_BRD_BUILD_ID, + ATT_MB_BRD_DEPH_ID, + //I2C Alert + ATT_ALERT_STATUS, +#if CPU_TYPE == CPU_BDE + ATT_ALERT_DISABLE, +#endif + //BSP + ATT_BSP_VERSION, + ATT_BSP_DEBUG, + ATT_BSP_PR_INFO, + ATT_BSP_PR_ERR, + ATT_BSP_REG, + ATT_MAX +}; + +enum bsp_log_types { + LOG_NONE, + LOG_RW, + LOG_READ, + LOG_WRITE, + LOG_SYS +}; + +enum bsp_log_ctrl { + LOG_DISABLE, + LOG_ENABLE +}; + +struct lpc_data_s { + struct mutex access_lock; +}; + +struct lpc_data_s *lpc_data; +char bsp_version[16]=""; +char bsp_debug[2]="0"; +char bsp_reg[8]="0x0"; +u8 enable_log_read=LOG_DISABLE; +u8 enable_log_write=LOG_DISABLE; +u8 enable_log_sys=LOG_ENABLE; + +/* reg shift */ +static u8 _shift(u8 mask) +{ + int i=0, mask_one=1; + + for(i=0; i<8; ++i) { + if((mask & mask_one) == 1) + return i; + else + mask >>= 1; + } + + return -1; +} + +/* reg mask and shift */ +static u8 _mask_shift(u8 val, u8 mask) +{ + int shift=0; + + shift = _shift(mask); + + return (val & mask) >> shift; +} + +static u8 _bit_operation(u8 reg_val, u8 bit, u8 bit_val) +{ + if(bit_val == 0) + reg_val = reg_val & ~(1 << bit); + else + reg_val = reg_val | (1 << bit); + return reg_val; +} + +static int _bsp_log(u8 log_type, char *fmt, ...) +{ + if ((log_type==LOG_READ && enable_log_read) || + (log_type==LOG_WRITE && enable_log_write) || + (log_type==LOG_SYS && enable_log_sys) ) { + va_list args; + int r; + + va_start(args, fmt); + r = vprintk(fmt, args); + va_end(args); + + return r; + } else { + return 0; + } +} + +static int _config_bsp_log(u8 log_type) +{ + switch(log_type) { + case LOG_NONE: + enable_log_read = LOG_DISABLE; + enable_log_write = LOG_DISABLE; + break; + case LOG_RW: + enable_log_read = LOG_ENABLE; + enable_log_write = LOG_ENABLE; + break; + case LOG_READ: + enable_log_read = LOG_ENABLE; + enable_log_write = LOG_DISABLE; + break; + case LOG_WRITE: + enable_log_read = LOG_DISABLE; + enable_log_write = LOG_ENABLE; + break; + default: + return -EINVAL; + } + return 0; +} + +/* get lpc register value */ +static u8 _read_lpc_reg(u16 reg, u8 mask) +{ + u8 reg_val; + + mutex_lock(&lpc_data->access_lock); + reg_val=_mask_shift(inb(reg), mask); + mutex_unlock(&lpc_data->access_lock); + + BSP_LOG_R("reg=0x%03x, reg_val=0x%02x", reg, reg_val); + + return reg_val; +} + +/* get lpc register value */ +static ssize_t read_lpc_reg(u16 reg, u8 mask, char *buf) +{ + u8 reg_val; + int len=0; + + reg_val = _read_lpc_reg(reg, mask); + len=sprintf(buf,"0x%x\n", reg_val); + + return len; +} + +/* set lpc register value */ +static ssize_t write_lpc_reg(u16 reg, u8 mask, const char *buf, size_t count) +{ + u8 reg_val, reg_val_now, shift; + + if(kstrtou8(buf, 0, ®_val) < 0) + return -EINVAL; + + //apply SINGLE BIT operation if mask is specified, multiple bits are not supported + if(mask != MASK_ALL) { + reg_val_now = _read_lpc_reg(reg, 0x0); + shift = _shift(mask); + reg_val = _bit_operation(reg_val_now, shift, reg_val); + } + + mutex_lock(&lpc_data->access_lock); + + outb(reg_val, reg); + mdelay(LPC_MDELAY); + + mutex_unlock(&lpc_data->access_lock); + + BSP_LOG_W("reg=0x%03x, reg_val=0x%02x", reg, reg_val); + + return count; +} + +/* get bsp value */ +static ssize_t read_bsp(char *buf, char *str) +{ + ssize_t len=0; + + mutex_lock(&lpc_data->access_lock); + len=sprintf(buf, "%s", str); + mutex_unlock(&lpc_data->access_lock); + + BSP_LOG_R("reg_val=%s", str); + + return len; +} + +/* set bsp value */ +static ssize_t write_bsp(const char *buf, char *str, size_t str_len, size_t count) +{ + mutex_lock(&lpc_data->access_lock); + snprintf(str, str_len, "%s", buf); + mutex_unlock(&lpc_data->access_lock); + + BSP_LOG_W("reg_val=%s", str); + + return count; +} + +/* get cpu cpld version in human readable format */ +static ssize_t read_cpu_cpld_version_h(struct device *dev, + struct device_attribute *da, char *buf) +{ + ssize_t len=0; + u16 reg = REG_CPU_CPLD_VERSION; + u8 mask = MASK_ALL; + u8 mask_major = 0b11000000; + u8 mask_minor = 0b00111111; + u8 reg_val; + u8 major, minor, build; + + mutex_lock(&lpc_data->access_lock); + reg_val = _mask_shift(inb(reg), mask); + major = _mask_shift(reg_val, mask_major); + minor = _mask_shift(reg_val, mask_minor); + reg = REG_CPU_CPLD_BUILD; + build = _mask_shift(inb(reg), mask); + len = sprintf(buf, "%d.%02d.%03d\n", major, minor, build); + mutex_unlock(&lpc_data->access_lock); + + BSP_LOG_R("reg=0x%03x, reg_val=0x%02x", reg, reg_val); + + return len; +} + +/* get mb cpld version in human readable format */ +static ssize_t read_mb_cpld_1_version_h(struct device *dev, + struct device_attribute *da, char *buf) +{ + ssize_t len=0; + u16 reg = REG_MB_CPLD_VERSION; + u8 mask = MASK_ALL; + u8 mask_major = 0b11000000; + u8 mask_minor = 0b00111111; + u8 reg_val; + u8 major, minor, build; + + mutex_lock(&lpc_data->access_lock); + reg_val = _mask_shift(inb(reg), mask); + major = _mask_shift(reg_val, mask_major); + minor = _mask_shift(reg_val, mask_minor); + reg = REG_MB_CPLD_BUILD; + build = _mask_shift(inb(reg), mask); + len = sprintf(buf, "%d.%02d.%03d\n", major, minor, build); + mutex_unlock(&lpc_data->access_lock); + + BSP_LOG_R("reg=0x%03x, reg_val=0x%02x", reg, reg_val); + + return len; +} + +/* get mux_reset register value */ +static ssize_t read_mux_reset_callback(struct device *dev, + struct device_attribute *da, char *buf) +{ + int len = 0; + u16 reg = REG_MB_MUX_RESET; + u8 mask = 0b00011111; + u8 reg_val; + + mutex_lock(&lpc_data->access_lock); + reg_val=_mask_shift(inb(reg), mask); + BSP_LOG_R("reg=0x%03x, reg_val=0x%02x", reg, reg_val); + len=sprintf(buf, "%d\n", reg_val); + mutex_unlock(&lpc_data->access_lock); + + return len; +} + +/* set mux_reset register value */ +static ssize_t write_mux_reset_callback(struct device *dev, + struct device_attribute *da, const char *buf, size_t count) +{ + u8 val = 0; + u16 reg = REG_MB_MUX_RESET; + u8 reg_val = 0; + u8 mask = 0b00011111; + static int mux_reset_flag = 0; + + if(kstrtou8(buf, 0, &val) < 0) + return -EINVAL; + + if(mux_reset_flag == 0) { + if(val == 0) { + mutex_lock(&lpc_data->access_lock); + mux_reset_flag = 1; + BSP_LOG_W("i2c mux reset is triggered..."); + + reg_val = inb(reg); + outb((reg_val & ~mask), reg); + mdelay(LPC_MDELAY); + BSP_LOG_W("reg=0x%03x, reg_val=0x%02x", reg, reg_val & ~mask); + mdelay(500); + outb((reg_val | mask), reg); + mdelay(LPC_MDELAY); + BSP_LOG_W("reg=0x%03x, reg_val=0x%02x", reg, reg_val | mask); + mdelay(500); + mux_reset_flag = 0; + mutex_unlock(&lpc_data->access_lock); + } else { + return -EINVAL; + } + } else { + BSP_LOG_W("i2c mux is resetting... (ignore)"); + mutex_lock(&lpc_data->access_lock); + mutex_unlock(&lpc_data->access_lock); + } + + return count; +} + +/* get lpc register value */ +static ssize_t read_lpc_callback(struct device *dev, + struct device_attribute *da, char *buf) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + u16 reg = 0; + u8 mask = MASK_ALL; + + switch(attr->index) { + //CPU CPLD + case ATT_CPU_CPLD_VERSION: + reg = REG_CPU_CPLD_VERSION; + break; + case ATT_CPU_BIOS_BOOT_ROM: + reg = REG_CPU_STATUS_1; + mask = 0x80; + break; + case ATT_CPU_BIOS_BOOT_CFG: + reg = REG_CPU_CTRL_1; + mask = 0x80; + break; + case ATT_CPU_CPLD_BUILD: + reg = REG_CPU_CPLD_BUILD; + break; + //MB CPLD + case ATT_MB_BRD_ID_0: + reg = REG_MB_BRD_ID_0; + break; + case ATT_MB_BRD_ID_1: + reg = REG_MB_BRD_ID_1; + break; + case ATT_MB_CPLD_1_VERSION: + reg = REG_MB_CPLD_VERSION; + break; + case ATT_MB_CPLD_1_BUILD: + reg = REG_MB_CPLD_BUILD; + break; + case ATT_MB_BRD_SKU_ID: + reg = REG_MB_BRD_ID_0; + mask = 0xFF; + break; + case ATT_MB_BRD_HW_ID: + reg = REG_MB_BRD_ID_1; + mask = 0x03; + break; + case ATT_MB_BRD_ID_TYPE: + reg = REG_MB_BRD_ID_1; + mask = 0x80; + break; + case ATT_MB_BRD_BUILD_ID: + reg = REG_MB_BRD_ID_1; + mask = 0x38; + break; + case ATT_MB_BRD_DEPH_ID: + reg = REG_MB_BRD_ID_1; + mask = 0x04; + break; + case ATT_MB_MUX_CTRL: + reg = REG_MB_MUX_CTRL; + break; + //I2C Alert + case ATT_ALERT_STATUS: + reg = REG_ALERT_STATUS; + mask = 0x20; + break; +#if CPU_TYPE == CPU_BDE + case ATT_ALERT_DISABLE: + reg = REG_ALERT_DISABLE; + mask = 0x04; + break; +#endif + //BSP + case ATT_BSP_REG: + if(kstrtou16(bsp_reg, 0, ®) < 0) + return -EINVAL; + break; + default: + return -EINVAL; + } + return read_lpc_reg(reg, mask, buf); +} + +/* set lpc register value */ +static ssize_t write_lpc_callback(struct device *dev, + struct device_attribute *da, const char *buf, size_t count) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + u16 reg = 0; + u8 mask = MASK_ALL; + + switch(attr->index) { + case ATT_MB_MUX_CTRL: + reg = REG_MB_MUX_CTRL; + break; + default: + return -EINVAL; + } + return write_lpc_reg(reg, mask, buf, count); +} + +/* get bsp parameter value */ +static ssize_t read_bsp_callback(struct device *dev, + struct device_attribute *da, char *buf) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + int str_len=0; + char *str=NULL; + + switch(attr->index) { + case ATT_BSP_VERSION: + str = bsp_version; + str_len = sizeof(bsp_version); + break; + case ATT_BSP_DEBUG: + str = bsp_debug; + str_len = sizeof(bsp_debug); + break; + case ATT_BSP_REG: + str = bsp_reg; + str_len = sizeof(bsp_reg); + break; + default: + return -EINVAL; + } + return read_bsp(buf, str); +} + +/* set bsp parameter value */ +static ssize_t write_bsp_callback(struct device *dev, + struct device_attribute *da, const char *buf, size_t count) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + int str_len=0; + char *str=NULL; + u16 reg = 0; + u8 bsp_debug_u8 = 0; + + switch(attr->index) { + case ATT_BSP_VERSION: + str = bsp_version; + str_len = sizeof(str); + break; + case ATT_BSP_DEBUG: + str = bsp_debug; + str_len = sizeof(str); + break; + case ATT_BSP_REG: + if(kstrtou16(buf, 0, ®) < 0) + return -EINVAL; + + str = bsp_reg; + str_len = sizeof(str); + break; + default: + return -EINVAL; + } + + if(attr->index == ATT_BSP_DEBUG) { + if(kstrtou8(buf, 0, &bsp_debug_u8) < 0) { + return -EINVAL; + } else if(_config_bsp_log(bsp_debug_u8) < 0) { + return -EINVAL; + } + } + + return write_bsp(buf, str, str_len, count); +} + +static ssize_t write_bsp_pr_callback(struct device *dev, + struct device_attribute *da, const char *buf, size_t count) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + int str_len = strlen(buf); + + if(str_len <= 0) + return str_len; + + switch (attr->index) { + case ATT_BSP_PR_INFO: + BSP_PR(KERN_INFO, "%s", buf); + break; + case ATT_BSP_PR_ERR: + BSP_PR(KERN_ERR, "%s", buf); + break; + default: + return -EINVAL; + } + + return str_len; +} + +//SENSOR_DEVICE_ATTR - CPU +static SENSOR_DEVICE_ATTR(cpu_cpld_version, S_IRUGO, read_lpc_callback, NULL, ATT_CPU_CPLD_VERSION); +static SENSOR_DEVICE_ATTR(cpu_cpld_version_h, S_IRUGO, read_cpu_cpld_version_h, NULL, ATT_CPU_CPLD_VERSION_H); +static SENSOR_DEVICE_ATTR(boot_rom, S_IRUGO, read_lpc_callback, NULL, ATT_CPU_BIOS_BOOT_ROM); +static SENSOR_DEVICE_ATTR(boot_cfg, S_IRUGO, read_lpc_callback, NULL, ATT_CPU_BIOS_BOOT_CFG); +static SENSOR_DEVICE_ATTR(cpu_cpld_build, S_IRUGO, read_lpc_callback, NULL, ATT_CPU_CPLD_BUILD); +//SENSOR_DEVICE_ATTR - MB +static SENSOR_DEVICE_ATTR(board_id_0, S_IRUGO, read_lpc_callback, NULL, ATT_MB_BRD_ID_0); +static SENSOR_DEVICE_ATTR(board_id_1, S_IRUGO, read_lpc_callback, NULL, ATT_MB_BRD_ID_1); +static SENSOR_DEVICE_ATTR(mb_cpld_1_version, S_IRUGO, read_lpc_callback, NULL, ATT_MB_CPLD_1_VERSION); +static SENSOR_DEVICE_ATTR(mb_cpld_1_version_h, S_IRUGO, read_mb_cpld_1_version_h, NULL, ATT_MB_CPLD_1_VERSION_H); +static SENSOR_DEVICE_ATTR(mb_cpld_1_build, S_IRUGO, read_lpc_callback, NULL, ATT_MB_CPLD_1_BUILD); +static SENSOR_DEVICE_ATTR(mux_ctrl, S_IRUGO | S_IWUSR, read_lpc_callback, write_lpc_callback, ATT_MB_MUX_CTRL); +static SENSOR_DEVICE_ATTR(mux_reset, S_IRUGO | S_IWUSR, read_mux_reset_callback, write_mux_reset_callback, ATT_MB_MUX_RESET); +static SENSOR_DEVICE_ATTR(board_sku_id, S_IRUGO, read_lpc_callback, NULL, ATT_MB_BRD_SKU_ID); +static SENSOR_DEVICE_ATTR(board_hw_id, S_IRUGO, read_lpc_callback, NULL, ATT_MB_BRD_HW_ID); +static SENSOR_DEVICE_ATTR(board_id_type, S_IRUGO, read_lpc_callback, NULL, ATT_MB_BRD_ID_TYPE); +static SENSOR_DEVICE_ATTR(board_build_id, S_IRUGO, read_lpc_callback, NULL, ATT_MB_BRD_BUILD_ID); +static SENSOR_DEVICE_ATTR(board_deph_id, S_IRUGO, read_lpc_callback, NULL, ATT_MB_BRD_DEPH_ID); +//SENSOR_DEVICE_ATTR - I2C Alert +static SENSOR_DEVICE_ATTR(alert_status, S_IRUGO, read_lpc_callback, NULL, ATT_ALERT_STATUS); +#if CPU_TYPE == CPU_BDE +static SENSOR_DEVICE_ATTR(alert_disable, S_IRUGO, read_lpc_callback, NULL, ATT_ALERT_DISABLE); +#endif +//SENSOR_DEVICE_ATTR - BSP +static SENSOR_DEVICE_ATTR(bsp_version, S_IRUGO | S_IWUSR, read_bsp_callback, write_bsp_callback, ATT_BSP_VERSION); +static SENSOR_DEVICE_ATTR(bsp_debug, S_IRUGO | S_IWUSR, read_bsp_callback, write_bsp_callback, ATT_BSP_DEBUG); +static SENSOR_DEVICE_ATTR(bsp_pr_info, S_IWUSR, NULL, write_bsp_pr_callback, ATT_BSP_PR_INFO); +static SENSOR_DEVICE_ATTR(bsp_pr_err, S_IWUSR, NULL, write_bsp_pr_callback, ATT_BSP_PR_ERR); +static SENSOR_DEVICE_ATTR(bsp_reg, S_IRUGO | S_IWUSR, read_lpc_callback, write_bsp_callback, ATT_BSP_REG); + +static struct attribute *cpu_cpld_attrs[] = { + &sensor_dev_attr_cpu_cpld_version.dev_attr.attr, + &sensor_dev_attr_cpu_cpld_version_h.dev_attr.attr, + &sensor_dev_attr_cpu_cpld_build.dev_attr.attr, + NULL, +}; + +static struct attribute *mb_cpld_attrs[] = { + &sensor_dev_attr_board_id_0.dev_attr.attr, + &sensor_dev_attr_board_id_1.dev_attr.attr, + &sensor_dev_attr_mb_cpld_1_version.dev_attr.attr, + &sensor_dev_attr_mb_cpld_1_version_h.dev_attr.attr, + &sensor_dev_attr_mb_cpld_1_build.dev_attr.attr, + &sensor_dev_attr_board_sku_id.dev_attr.attr, + &sensor_dev_attr_board_hw_id.dev_attr.attr, + &sensor_dev_attr_board_id_type.dev_attr.attr, + &sensor_dev_attr_board_build_id.dev_attr.attr, + &sensor_dev_attr_board_deph_id.dev_attr.attr, + &sensor_dev_attr_mux_ctrl.dev_attr.attr, + &sensor_dev_attr_mux_reset.dev_attr.attr, + NULL, +}; + +static struct attribute *bios_attrs[] = { + &sensor_dev_attr_boot_rom.dev_attr.attr, + &sensor_dev_attr_boot_cfg.dev_attr.attr, + NULL, +}; + +static struct attribute *i2c_alert_attrs[] = { + &sensor_dev_attr_alert_status.dev_attr.attr, +#if CPU_TYPE == CPU_BDE + &sensor_dev_attr_alert_disable.dev_attr.attr, +#endif + NULL, +}; + +static struct attribute *bsp_attrs[] = { + &sensor_dev_attr_bsp_version.dev_attr.attr, + &sensor_dev_attr_bsp_debug.dev_attr.attr, + &sensor_dev_attr_bsp_pr_info.dev_attr.attr, + &sensor_dev_attr_bsp_pr_err.dev_attr.attr, + &sensor_dev_attr_bsp_reg.dev_attr.attr, + NULL, +}; + +static struct attribute_group cpu_cpld_attr_grp = { + .name = "cpu_cpld", + .attrs = cpu_cpld_attrs, +}; + +static struct attribute_group mb_cpld_attr_grp = { + .name = "mb_cpld", + .attrs = mb_cpld_attrs, +}; + +static struct attribute_group bios_attr_grp = { + .name = "bios", + .attrs = bios_attrs, +}; + +static struct attribute_group i2c_alert_attr_grp = { + .name = "i2c_alert", + .attrs = i2c_alert_attrs, +}; + +static struct attribute_group bsp_attr_grp = { + .name = "bsp", + .attrs = bsp_attrs, +}; + +static void lpc_dev_release( struct device * dev) +{ + return; +} + +static struct platform_device lpc_dev = { + .name = DRIVER_NAME, + .id = -1, + .dev = { + .release = lpc_dev_release, + } +}; + +static int lpc_drv_probe(struct platform_device *pdev) +{ + int i = 0, grp_num = 5; + int err[5] = {0}; + struct attribute_group *grp; + + lpc_data = devm_kzalloc(&pdev->dev, sizeof(struct lpc_data_s), + GFP_KERNEL); + if(!lpc_data) + return -ENOMEM; + + mutex_init(&lpc_data->access_lock); + + for (i=0; idev.kobj, grp); + if(err[i]) { + printk(KERN_ERR "Cannot create sysfs for group %s\n", grp->name); + goto exit; + } else { + continue; + } + } + + return 0; + +exit: + for (i=0; idev.kobj, grp); + if(!err[i]) { + //remove previous successful cases + continue; + } else { + //remove first failed case, then return + return err[i]; + } + } + return 0; +} + +static int lpc_drv_remove(struct platform_device *pdev) +{ + sysfs_remove_group(&pdev->dev.kobj, &cpu_cpld_attr_grp); + sysfs_remove_group(&pdev->dev.kobj, &mb_cpld_attr_grp); + sysfs_remove_group(&pdev->dev.kobj, &bios_attr_grp); + sysfs_remove_group(&pdev->dev.kobj, &i2c_alert_attr_grp); + sysfs_remove_group(&pdev->dev.kobj, &bsp_attr_grp); + + return 0; +} + +static struct platform_driver lpc_drv = { + .probe = lpc_drv_probe, + .remove = __exit_p(lpc_drv_remove), + .driver = { + .name = DRIVER_NAME, + }, +}; + +int lpc_init(void) +{ + int err = 0; + + err = platform_driver_register(&lpc_drv); + if(err) { + printk(KERN_ERR "%s(#%d): platform_driver_register failed(%d)\n", + __func__, __LINE__, err); + + return err; + } + + err = platform_device_register(&lpc_dev); + if(err) { + printk(KERN_ERR "%s(#%d): platform_device_register failed(%d)\n", + __func__, __LINE__, err); + platform_driver_unregister(&lpc_drv); + return err; + } + + return err; +} + +void lpc_exit(void) +{ + platform_driver_unregister(&lpc_drv); + platform_device_unregister(&lpc_dev); +} + +MODULE_AUTHOR("Leo Lin "); +MODULE_DESCRIPTION("x86_64_ufispace_s9301_32db_lpc driver"); +MODULE_LICENSE("GPL"); + +module_init(lpc_init); +module_exit(lpc_exit); diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s9301-32db/modules/x86-64-ufispace-s9301-32db-sys-eeprom.c b/platform/broadcom/sonic-platform-modules-ufispace/s9301-32db/modules/x86-64-ufispace-s9301-32db-sys-eeprom.c new file mode 100644 index 0000000000..3fa3ae4c96 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ufispace/s9301-32db/modules/x86-64-ufispace-s9301-32db-sys-eeprom.c @@ -0,0 +1,283 @@ +/* + * Copyright (C) 1998, 1999 Frodo Looijaard and + * Philip Edelbrock + * Copyright (C) 2003 Greg Kroah-Hartman + * Copyright (C) 2003 IBM Corp. + * Copyright (C) 2004 Jean Delvare + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +/* enable dev_dbg print out */ +//#define DEBUG + +#define __STDC_WANT_LIB_EXT1__ 1 +#include +#include +#include +#include +#include +#include +#include +#include + +#define _memset(s, c, n) memset(s, c, n) + +/* Addresses to scan */ +static const unsigned short normal_i2c[] = { /*0x50, 0x51, 0x52, 0x53, 0x54, + 0x55, 0x56, 0x57,*/ I2C_CLIENT_END }; + +/* Size of EEPROM in bytes */ +#define EEPROM_SIZE 512 + +#define SLICE_BITS (6) +#define SLICE_SIZE (1 << SLICE_BITS) +#define SLICE_NUM (EEPROM_SIZE/SLICE_SIZE) + +/* Each client has this additional data */ +struct eeprom_data { + struct mutex update_lock; + u8 valid; /* bitfield, bit!=0 if slice is valid */ + unsigned long last_updated[SLICE_NUM]; /* In jiffies, 8 slices */ + u8 data[EEPROM_SIZE]; /* Register values */ +}; + + +static void sys_eeprom_update_client(struct i2c_client *client, u8 slice) +{ + struct eeprom_data *data = i2c_get_clientdata(client); + int i, j; + int ret; + int addr; + + mutex_lock(&data->update_lock); + + if (!(data->valid & (1 << slice)) || + time_after(jiffies, data->last_updated[slice] + 300 * HZ)) { + dev_dbg(&client->dev, "Starting eeprom update, slice %u\n", slice); + + addr = slice << SLICE_BITS; + + ret = i2c_smbus_write_byte_data(client, (u8)((addr >> 8) & 0xFF), (u8)(addr & 0xFF)); + /* select the eeprom address */ + if (ret < 0) { + dev_err(&client->dev, "address set failed\n"); + goto exit; + } + + if (!i2c_check_functionality(client->adapter, I2C_FUNC_SMBUS_READ_BYTE)) { + goto exit; + } + + for (i = slice << SLICE_BITS; i < (slice + 1) << SLICE_BITS; i+= SLICE_SIZE) { + for (j = i; j < (i+SLICE_SIZE); j++) { + int res; + + res = i2c_smbus_read_byte(client); + if (res < 0) { + goto exit; + } + + data->data[j] = res & 0xFF; + } + } + + data->last_updated[slice] = jiffies; + data->valid |= (1 << slice); + } +exit: + mutex_unlock(&data->update_lock); +} + +static ssize_t sys_eeprom_read(struct file *filp, struct kobject *kobj, + struct bin_attribute *bin_attr, + char *buf, loff_t off, size_t count) +{ + struct i2c_client *client = to_i2c_client(container_of(kobj, struct device, kobj)); + struct eeprom_data *data = i2c_get_clientdata(client); + u8 slice; + + if (off > EEPROM_SIZE) { + return 0; + } + if (off + count > EEPROM_SIZE) { + count = EEPROM_SIZE - off; + } + if (count == 0) { + return 0; + } + + /* Only refresh slices which contain requested bytes */ + for (slice = off >> SLICE_BITS; slice <= (off + count - 1) >> SLICE_BITS; slice++) { + sys_eeprom_update_client(client, slice); + } + + memcpy(buf, &data->data[off], count); + + return count; +} + +static ssize_t sys_eeprom_write(struct file *filp, struct kobject *kobj, + struct bin_attribute *bin_attr, + char *buf, loff_t off, size_t count) +{ + struct i2c_client *client = to_i2c_client(container_of(kobj, struct device, kobj)); + struct eeprom_data *data = i2c_get_clientdata(client); + int ret; + int i; + u8 cmd; + u16 value16; + + dev_dbg(&client->dev, "sys_eeprom_write off=%d, count=%d\n", (int)off, (int)count); + + if (off > EEPROM_SIZE) { + return 0; + } + if (off + count > EEPROM_SIZE) { + count = EEPROM_SIZE - off; + } + if (count == 0) { + return 0; + } + + mutex_lock(&data->update_lock); + + for(i=0; i < count; i++) { + /* write command */ + cmd = (off >> 8) & 0xff; + value16 = off & 0xff; + value16 |= buf[i] << 8; + ret = i2c_smbus_write_word_data(client, cmd, value16); + + if (ret < 0) { + dev_err(&client->dev, "write address failed at %d \n", (int)off); + goto exit; + } + + off++; + + /* need to wait for write complete */ + udelay(10000); + } +exit: + mutex_unlock(&data->update_lock); + /* force to update client when reading */ + for(i=0; i < SLICE_NUM; i++) { + data->last_updated[i] = 0; + } + + return count; +} + +static struct bin_attribute sys_eeprom_attr = { + .attr = { + .name = "eeprom", + .mode = S_IRUGO | S_IWUSR, + }, + .size = EEPROM_SIZE, + .read = sys_eeprom_read, + .write = sys_eeprom_write, +}; + +/* Return 0 if detection is successful, -ENODEV otherwise */ +static int sys_eeprom_detect(struct i2c_client *client, struct i2c_board_info *info) +{ + struct i2c_adapter *adapter = client->adapter; + + /* EDID EEPROMs are often 24C00 EEPROMs, which answer to all + addresses 0x50-0x57, but we only care about 0x51 and 0x55. So decline + attaching to addresses >= 0x56 on DDC buses */ + if (!(adapter->class & I2C_CLASS_SPD) && client->addr >= 0x56) { + return -ENODEV; + } + + if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_READ_BYTE) + && !i2c_check_functionality(adapter, I2C_FUNC_SMBUS_WRITE_BYTE_DATA)) { + return -ENODEV; + } + + strlcpy(info->type, "eeprom", I2C_NAME_SIZE); + + return 0; +} + +static int sys_eeprom_probe(struct i2c_client *client, + const struct i2c_device_id *id) +{ + struct eeprom_data *data; + int err; + + if (!(data = kzalloc(sizeof(struct eeprom_data), GFP_KERNEL))) { + err = -ENOMEM; + goto exit; + } + +#ifdef __STDC_LIB_EXT1__ + memset_s(data->data, EEPROM_SIZE, 0xff, EEPROM_SIZE); +#else + _memset(data->data, 0xff, EEPROM_SIZE); +#endif + + i2c_set_clientdata(client, data); + mutex_init(&data->update_lock); + + /* create the sysfs eeprom file */ + err = sysfs_create_bin_file(&client->dev.kobj, &sys_eeprom_attr); + if (err) { + goto exit_kfree; + } + + return 0; + +exit_kfree: + kfree(data); +exit: + return err; +} + +#if LINUX_VERSION_CODE < KERNEL_VERSION(6, 1, 0) +static int +#else +static void +#endif +sys_eeprom_remove(struct i2c_client *client) +{ + sysfs_remove_bin_file(&client->dev.kobj, &sys_eeprom_attr); + kfree(i2c_get_clientdata(client)); + +#if LINUX_VERSION_CODE < KERNEL_VERSION(6, 1, 0) + return 0; +#endif +} + +static const struct i2c_device_id sys_eeprom_id[] = { + { "sys_eeprom", 0 }, + { } +}; + +static struct i2c_driver sys_eeprom_driver = { + .driver = { + .name = "sys_eeprom", + }, + .probe = sys_eeprom_probe, + .remove = sys_eeprom_remove, + .id_table = sys_eeprom_id, + + .class = I2C_CLASS_DDC | I2C_CLASS_SPD, + .detect = sys_eeprom_detect, + .address_list = normal_i2c, +}; + +module_i2c_driver(sys_eeprom_driver); + +MODULE_AUTHOR("Wade "); +MODULE_DESCRIPTION("UfiSpace Mother Board EEPROM driver"); +MODULE_LICENSE("GPL"); diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s9301-32db/service/pddf-platform-init.service b/platform/broadcom/sonic-platform-modules-ufispace/s9301-32db/service/pddf-platform-init.service new file mode 100644 index 0000000000..41fa67214f --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ufispace/s9301-32db/service/pddf-platform-init.service @@ -0,0 +1,14 @@ +[Unit] +Description=PDDF module and device initialization service +Before=pmon.service +DefaultDependencies=no + +[Service] +Type=oneshot +ExecStartPre=-/usr/local/bin/pre_pddf_init.sh +ExecStart=/usr/local/bin/pddf_util.py install +ExecStop=/usr/local/bin/pddf_util.py clean +RemainAfterExit=yes + +[Install] +WantedBy=multi-user.target diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s9301-32db/sonic_platform/__init__.py b/platform/broadcom/sonic-platform-modules-ufispace/s9301-32db/sonic_platform/__init__.py new file mode 100644 index 0000000000..593867d31c --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ufispace/s9301-32db/sonic_platform/__init__.py @@ -0,0 +1,4 @@ +# All the derived classes for PDDF +__all__ = ["platform", "chassis", "sfp", "psu", "thermal", "fan"] +from . import platform + diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s9301-32db/sonic_platform/chassis.py b/platform/broadcom/sonic-platform-modules-ufispace/s9301-32db/sonic_platform/chassis.py new file mode 100644 index 0000000000..6c77e2424b --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ufispace/s9301-32db/sonic_platform/chassis.py @@ -0,0 +1,189 @@ +#!/usr/bin/env python + +############################################################################# +# PDDF +# Module contains an implementation of SONiC Chassis API +# +############################################################################# + +try: + import time + from sonic_platform_pddf_base.pddf_chassis import PddfChassis + from sonic_py_common import device_info +except ImportError as e: + raise ImportError(str(e) + "- required module not found") + +NUM_COMPONENT = 5 + +class Chassis(PddfChassis): + """ + PDDF Platform-specific Chassis class + """ + + port_dict = {} + + def __init__(self, pddf_data=None, pddf_plugin_data=None): + PddfChassis.__init__(self, pddf_data, pddf_plugin_data) + self._initialize_components() + + def _initialize_components(self): + from sonic_platform.component import Component + for index in range(NUM_COMPONENT): + component = Component(index) + self._component_list.append(component) + + # Provide the functions/variables below for which implementation is to be overwritten + + def get_name(self): + """ + Retrieves the name of the chassis + Returns: + string: The name of the chassis + """ + return self._eeprom.platform_name_str() + + def initizalize_system_led(self): + return True + + def get_status_led(self): + return self.get_system_led("SYS_LED") + + def get_change_event(self, timeout=0): + """ + Returns a nested dictionary containing all devices which have + experienced a change at chassis level + Args: + timeout: Timeout in milliseconds (optional). If timeout == 0, + this method will block until a change is detected. + Returns: + (bool, dict): + - bool: True if call successful, False if not; + - dict: A nested dictionary where key is a device type, + value is a dictionary with key:value pairs in the format of + {'device_id':'device_event'}, where device_id is the device ID + for this device and device_event. + The known devices's device_id and device_event was defined as table below. + ----------------------------------------------------------------- + device | device_id | device_event | annotate + ----------------------------------------------------------------- + 'sfp' '' '0' Sfp removed + '1' Sfp inserted + '2' I2C bus stuck + '3' Bad eeprom + '4' Unsupported cable + '5' High Temperature + '6' Bad cable + -------------------------------------------------------------------- + Ex. 'sfp':{'11':'0', '12':'1'}, + Indicates that: + sfp 11 has been removed, sfp 12 has been inserted. + Note: For sfp, when event 3-6 happened, the module will not be avalaible, + XCVRD shall stop to read eeprom before SFP recovered from error status. + """ + + change_event_dict = {"sfp": {}} + + start_time = time.time() + forever = False + + if timeout == 0: + forever = True + elif timeout > 0: + timeout = timeout / float(1000) # Convert to secs + else: + print("get_change_event:Invalid timeout value", timeout) + return False, change_event_dict + + end_time = start_time + timeout + if start_time > end_time: + print( + "get_change_event:" "time wrap / invalid timeout value", + timeout, + ) + return False, change_event_dict # Time wrap or possibly incorrect timeout + try: + while timeout >= 0: + # check for sfp + sfp_change_dict = self.get_transceiver_change_event() + + if sfp_change_dict: + change_event_dict["sfp"] = sfp_change_dict + return True, change_event_dict + if forever: + time.sleep(1) + else: + timeout = end_time - time.time() + if timeout >= 1: + time.sleep(1) # We poll at 1 second granularity + else: + if timeout > 0: + time.sleep(timeout) + return True, change_event_dict + except Exception as e: + print(e) + print("get_change_event: Should not reach here.") + return False, change_event_dict + + def get_transceiver_change_event(self, timeout=0): + current_port_dict = {} + ret_dict = {} + + # Check for OIR events and return ret_dict + for index in range(self.platform_inventory['num_ports']): + if self._sfp_list[index].get_presence(): + current_port_dict[index] = self.plugin_data['XCVR']['plug_status']['inserted'] + else: + current_port_dict[index] = self.plugin_data['XCVR']['plug_status']['removed'] + + if len(self.port_dict) == 0: # first time + self.port_dict = current_port_dict + return {} + + if current_port_dict == self.port_dict: + return {} + + # Update reg value + for index, status in current_port_dict.items(): + if self.port_dict[index] != status: + ret_dict[index] = status + #ret_dict[str(index)] = status + self.port_dict = current_port_dict + for index, status in ret_dict.items(): + if int(status) == 1: + pass + #self._sfp_list[int(index)].check_sfp_optoe_type() + return ret_dict + + def get_reboot_cause(self): + """ + Retrieves the cause of the previous reboot + + Returns: + A tuple (string, string) where the first element is a string + containing the cause of the previous reboot. This string must be + one of the predefined strings in this class. If the first string + is "REBOOT_CAUSE_HARDWARE_OTHER", the second string can be used + to pass a description of the reboot cause. + """ + + reboot_cause_path = self.plugin_data['REBOOT_CAUSE']['reboot_cause_file'] + + try: + with open(reboot_cause_path, 'r', errors='replace') as fd: + data = fd.read() + sw_reboot_cause = data.strip() + except IOError: + sw_reboot_cause = "Unknown" + + return ('REBOOT_CAUSE_NON_HARDWARE', sw_reboot_cause) + + def get_serial_number(self): + """ + Retrieves the hardware serial number for the chassis + + Returns: + A string containing the hardware serial number for this + chassis. + """ + + return self.get_serial() \ No newline at end of file diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s9301-32db/sonic_platform/component.py b/platform/broadcom/sonic-platform-modules-ufispace/s9301-32db/sonic_platform/component.py new file mode 100644 index 0000000000..b94a10d616 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ufispace/s9301-32db/sonic_platform/component.py @@ -0,0 +1,131 @@ +############################################################################# +# +# Component contains an implementation of SONiC Platform Base API and +# provides the components firmware management function +# +############################################################################# + +try: + import subprocess + from sonic_platform_base.component_base import ComponentBase +except ImportError as e: + raise ImportError(str(e) + "- required module not found") + +CPLD_SYSFS = { + "CPLD1": "/sys/kernel/pddf/devices/sysstatus/sysstatus_data/cpld1_version", + "CPLD2": "/sys/kernel/pddf/devices/sysstatus/sysstatus_data/cpld2_version", + "CPLD3": "/sys/kernel/pddf/devices/sysstatus/sysstatus_data/cpld3_version", +} + +BMC_CMDS = { + "BMC": "bash -c 'tmp=$(ipmitool raw 0x6 0x1) && r=($(echo \"$tmp\" | cut -d \" \" -f 4,5,16,15,14)) && echo ${r[0]}.${r[1]}.${r[4]}.${r[3]}${r[2]}'", +} + +BIOS_VERSION_PATH = "/sys/class/dmi/id/bios_version" +COMPONENT_LIST= [ + ("CPLD1", "CPLD 1"), + ("CPLD2", "CPLD 2"), + ("CPLD3", "CPLD 3"), + ("BIOS", "Basic Input/Output System"), + ("BMC", "BMC"), + +] + +class Component(ComponentBase): + """Platform-specific Component class""" + + DEVICE_TYPE = "component" + + def __init__(self, component_index=0): + self.index = component_index + self.name = self.get_name() + + def _run_command(self, command): + # Run bash command and print output to stdout + try: + process = subprocess.Popen( + shlex.split(command), stdout=subprocess.PIPE) + while True: + output = process.stdout.readline() + if output == '' and process.poll() is not None: + break + rc = process.poll() + if rc != 0: + return False + except Exception: + return False + return True + + def _get_bios_version(self): + # Retrieves the BIOS firmware version + try: + with open(BIOS_VERSION_PATH, 'r') as fd: + bios_version = fd.read() + return bios_version.strip() + except Exception as e: + return None + + def _get_cpld_version(self): + # Retrieves the CPLD firmware version + cpld_version = dict() + for cpld_name in CPLD_SYSFS: + cmd = "cat {}".format(CPLD_SYSFS[cpld_name]) + status, value = subprocess.getstatusoutput(cmd) + if not status: + cpld_version_raw = value.rstrip() + cpld_version_int = int(cpld_version_raw,16) + cpld_version[cpld_name] = "{}.{:02d}".format(cpld_version_int >> 6, + cpld_version_int & 0b00111111) + + return cpld_version + + def _get_bmc_version(self): + # Retrieves the BMC firmware version + status, value = subprocess.getstatusoutput(BMC_CMDS["BMC"]) + if not status: + return value + else: + return None + + def get_name(self): + """ + Retrieves the name of the component + Returns: + A string containing the name of the component + """ + return COMPONENT_LIST[self.index][0] + + def get_description(self): + """ + Retrieves the description of the component + Returns: + A string containing the description of the component + """ + return COMPONENT_LIST[self.index][1] + + def get_firmware_version(self): + """ + Retrieves the firmware version of module + Returns: + string: The firmware versions of the module + """ + fw_version = None + + if self.name == "BIOS": + fw_version = self._get_bios_version() + elif "CPLD" in self.name: + cpld_version = self._get_cpld_version() + fw_version = cpld_version.get(self.name) + elif self.name == "BMC": + fw_version = self._get_bmc_version() + return fw_version + + def install_firmware(self, image_path): + """ + Install firmware to module + Args: + image_path: A string, path to firmware image + Returns: + A boolean, True if install successfully, False if not + """ + raise NotImplementedError diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s9301-32db/sonic_platform/eeprom.py b/platform/broadcom/sonic-platform-modules-ufispace/s9301-32db/sonic_platform/eeprom.py new file mode 100644 index 0000000000..90ab1c779a --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ufispace/s9301-32db/sonic_platform/eeprom.py @@ -0,0 +1,21 @@ +#!/usr/bin/env python + +try: + from sonic_platform_pddf_base.pddf_eeprom import PddfEeprom +except ImportError as e: + raise ImportError(str(e) + "- required module not found") + + +class Eeprom(PddfEeprom): + + def __init__(self, pddf_data=None, pddf_plugin_data=None): + PddfEeprom.__init__(self, pddf_data, pddf_plugin_data) + + # Provide the functions/variables below for which implementation is to be overwritten + + def platform_name_str(self): + (is_valid, results) = self.get_tlv_field(self.eeprom_data, self._TLV_CODE_PLATFORM_NAME) + if not is_valid: + return "N/A" + + return results[2].decode('ascii') \ No newline at end of file diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s9301-32db/sonic_platform/fan.py b/platform/broadcom/sonic-platform-modules-ufispace/s9301-32db/sonic_platform/fan.py new file mode 100644 index 0000000000..3082de54a1 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ufispace/s9301-32db/sonic_platform/fan.py @@ -0,0 +1,172 @@ +#!/usr/bin/env python + + +try: + from sonic_platform_pddf_base.pddf_fan import PddfFan +except ImportError as e: + raise ImportError(str(e) + "- required module not found") + + +class Fan(PddfFan): + """PDDF Platform-Specific Fan class""" + + def __init__(self, tray_idx, fan_idx=0, pddf_data=None, pddf_plugin_data=None, is_psu_fan=False, psu_index=0): + # idx is 0-based + PddfFan.__init__(self, tray_idx, fan_idx, pddf_data, pddf_plugin_data, is_psu_fan, psu_index) + + # Provide the functions/variables below for which implementation is to be overwritten + # Since psu_fan airflow direction cant be read from sysfs, it is fixed as 'F2B' or 'intake' + + def get_speed(self): + """ + Retrieves the speed of fan as a percentage of full speed + + Returns: + An integer, the percentage of full fan speed, in the range 0 (off) + to 100 (full speed) + """ + speed_percentage = 0 + if self.is_psu_fan: + attr = "psu_fan{}_speed_rpm".format(self.fan_index) + device = "PSU{}".format(self.fans_psu_index) + max_speed = int(self.plugin_data['PSU']['PSU_FAN_MAX_SPEED']) + else: + if self.fan_index == 1: + pos = "f" + max_speed = int(self.plugin_data['FAN']['FAN_F_MAX_SPEED']) + else: + pos = "r" + max_speed = int(self.plugin_data['FAN']['FAN_R_MAX_SPEED']) + attr = "fan{}_{}_speed_rpm".format(self.fantray_index, pos) + device = "FAN-CTRL" + + output = self.pddf_obj.get_attr_name_output(device, attr) + if not output: + return speed_percentage + + output['status'] = output['status'].rstrip() + if output['status'].isalpha(): + return speed_percentage + else: + speed = int(float(output['status'])) + + speed_percentage = round((speed*100)/max_speed) + + return min(speed_percentage, 100) + + def get_speed_rpm(self): + """ + Retrieves the speed of fan in RPM + + Returns: + An integer, Speed of fan in RPM + """ + rpm_speed = 0 + if self.is_psu_fan: + attr = "psu_fan{}_speed_rpm".format(self.fan_index) + device = "PSU{}".format(self.fans_psu_index) + else: + if self.fan_index == 1: + pos = "f" + else: + pos = "r" + attr = "fan{}_{}_speed_rpm".format(self.fantray_index, pos) + device = "FAN-CTRL" + + output = self.pddf_obj.get_attr_name_output(device, attr) + + if output is None: + return rpm_speed + + output['status'] = output['status'].rstrip() + if output['status'].isalpha(): + return rpm_speed + else: + rpm_speed = int(float(output['status'])) + + return rpm_speed + + def get_direction(self): + """ + Retrieves the direction of fan + Returns: + A string, either FAN_DIRECTION_INTAKE or FAN_DIRECTION_EXHAUST + depending on fan direction + """ + direction = self.FAN_DIRECTION_INTAKE + if self.is_psu_fan: + attr = "psu_fan{}_dir".format(self.fan_index) + device = "PSU{}".format(self.fans_psu_index) + else: + attr = "fan{}_dir".format(self.fantray_index) + device = "FAN-CTRL" + + output = self.pddf_obj.get_attr_name_output(device, attr) + if not output: + return direction + + mode = output['mode'] + val = output['status'].strip() + vmap = self.plugin_data['FAN']['direction'][mode]['valmap'] + + if val in vmap: + direction = vmap[val] + + return direction + + def get_presence(self): + """ + Retrieves the presence of the device + Returns: + bool: True if device is present, False if not + """ + presence = False + if self.is_psu_fan: + attr = "psu_present" + device = "PSU{}".format(self.fans_psu_index) + else: + attr = "fan{}_present".format(self.fantray_index) + device = "FAN-CTRL" + + output = self.pddf_obj.get_attr_name_output(device, attr) + if not output: + return presence + + + mode = output['mode'] + val = output['status'].strip() + + if self.is_psu_fan: + vmap = self.plugin_data['PSU']['psu_present'][mode]['valmap'] + else: + vmap = self.plugin_data['FAN']['present'][mode]['valmap'] + + if val in vmap: + presence = vmap[val] + + return presence + + def get_target_speed(self): + """ + Retrieves the target (expected) speed of the fan + Returns: + An integer, the percentage of full fan speed, in the range 0 (off) + to 100 (full speed) + """ + return self.get_speed() + + def set_speed(self, speed): + """ + Sets the fan speed + + Args: + speed: An integer, the percentage of full fan speed to set fan to, + in the range 0 (off) to 100 (full speed) + + Returns: + A boolean, True if speed is set successfully, False if not + """ + + print("Setting Fan speed is not allowed") + return False + diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s9301-32db/sonic_platform/fan_drawer.py b/platform/broadcom/sonic-platform-modules-ufispace/s9301-32db/sonic_platform/fan_drawer.py new file mode 100644 index 0000000000..3b9bb607f6 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ufispace/s9301-32db/sonic_platform/fan_drawer.py @@ -0,0 +1,17 @@ +#!/usr/bin/env python + + +try: + from sonic_platform_pddf_base.pddf_fan_drawer import PddfFanDrawer +except ImportError as e: + raise ImportError(str(e) + "- required module not found") + + +class FanDrawer(PddfFanDrawer): + """PDDF Platform-Specific Fan-Drawer class""" + + def __init__(self, tray_idx, pddf_data=None, pddf_plugin_data=None): + # idx is 0-based + PddfFanDrawer.__init__(self, tray_idx, pddf_data, pddf_plugin_data) + + # Provide the functions/variables below for which implementation is to be overwritten diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s9301-32db/sonic_platform/platform.py b/platform/broadcom/sonic-platform-modules-ufispace/s9301-32db/sonic_platform/platform.py new file mode 100644 index 0000000000..406b1179ae --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ufispace/s9301-32db/sonic_platform/platform.py @@ -0,0 +1,25 @@ +#!/usr/bin/env python + +############################################################################# +# PDDF +# Module contains an implementation of SONiC Platform Base API and +# provides the platform information +# +############################################################################# + + +try: + from sonic_platform_pddf_base.pddf_platform import PddfPlatform +except ImportError as e: + raise ImportError(str(e) + "- required module not found") + + +class Platform(PddfPlatform): + """ + PDDF Platform-Specific Platform Class + """ + + def __init__(self): + PddfPlatform.__init__(self) + + # Provide the functions/variables below for which implementation is to be overwritten diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s9301-32db/sonic_platform/psu.py b/platform/broadcom/sonic-platform-modules-ufispace/s9301-32db/sonic_platform/psu.py new file mode 100644 index 0000000000..3e213415f3 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ufispace/s9301-32db/sonic_platform/psu.py @@ -0,0 +1,56 @@ +#!/usr/bin/env python + + +try: + from sonic_platform_pddf_base.pddf_psu import PddfPsu +except ImportError as e: + raise ImportError (str(e) + "- required module not found") + + +class Psu(PddfPsu): + """PDDF Platform-Specific PSU class""" + + PLATFORM_PSU_CAPACITY = 1300 + + def __init__(self, index, pddf_data=None, pddf_plugin_data=None): + PddfPsu.__init__(self, index, pddf_data, pddf_plugin_data) + + # Provide the functions/variables below for which implementation is to be overwritten + def get_maximum_supplied_power(self): + """ + Retrieves the maximum supplied power by PSU (or PSU capacity) + Returns: + A float number, the maximum power output in Watts. + e.g. 1200.1 + """ + return float(self.PLATFORM_PSU_CAPACITY) + + def get_power(self): + """ + Retrieves current energy supplied by PSU + + Returns: + A float number, the power in watts, + e.g. 302.6 + """ + + # power is returned in micro watts + return round(float(self.get_voltage()*self.get_current()), 2) + + def get_capacity(self): + """ + Retrieves the maximum supplied power by PSU (or PSU capacity) + Returns: + A float number, the maximum power output in Watts. + e.g. 1200.1 + """ + return self.get_maximum_supplied_power() + + def get_type(self): + """ + Gets the type of the PSU + + Returns: + A string, the type of PSU (AC/DC) + """ + return self.plugin_data['PSU']['DEFAULT_TYPE'] \ No newline at end of file diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s9301-32db/sonic_platform/sfp.py b/platform/broadcom/sonic-platform-modules-ufispace/s9301-32db/sonic_platform/sfp.py new file mode 100644 index 0000000000..c7919482f6 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ufispace/s9301-32db/sonic_platform/sfp.py @@ -0,0 +1,31 @@ +#!/usr/bin/env python + +try: + from sonic_platform_pddf_base.pddf_sfp import PddfSfp +except ImportError as e: + raise ImportError (str(e) + "- required module not found") + + +class Sfp(PddfSfp): + """ + PDDF Platform-Specific Sfp class + """ + + def __init__(self, index, pddf_data=None, pddf_plugin_data=None): + PddfSfp.__init__(self, index, pddf_data, pddf_plugin_data) + self.index = index + + # Provide the functions/variables below for which implementation is to be overwritten + + def get_error_description(self): + """ + Retrives the error descriptions of the SFP module + Returns: + String that represents the current error descriptions of vendor specific errors + In case there are multiple errors, they should be joined by '|', + like: "Bad EEPROM|Unsupported cable" + """ + if not self.get_presence(): + return self.SFP_STATUS_UNPLUGGED + + return self.SFP_STATUS_OK diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s9301-32db/sonic_platform/thermal.py b/platform/broadcom/sonic-platform-modules-ufispace/s9301-32db/sonic_platform/thermal.py new file mode 100644 index 0000000000..77d6ec7ae8 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ufispace/s9301-32db/sonic_platform/thermal.py @@ -0,0 +1,17 @@ +#!/usr/bin/env python + + +try: + from sonic_platform_pddf_base.pddf_thermal import PddfThermal +except ImportError as e: + raise ImportError(str(e) + "- required module not found") + + + +class Thermal(PddfThermal): + """PDDF Platform-Specific Thermal class""" + + def __init__(self, index, pddf_data=None, pddf_plugin_data=None, is_psu_thermal=False, psu_index=0): + PddfThermal.__init__(self, index, pddf_data, pddf_plugin_data, is_psu_thermal, psu_index) + + # Provide the functions/variables below for which implementation is to be overwritten diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s9301-32db/sonic_platform_setup.py b/platform/broadcom/sonic-platform-modules-ufispace/s9301-32db/sonic_platform_setup.py new file mode 100644 index 0000000000..3661c84a0c --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ufispace/s9301-32db/sonic_platform_setup.py @@ -0,0 +1,27 @@ +from setuptools import setup + +setup( + name='sonic-platform', + version='1.0', + description='SONiC platform API implementation on ufispace platform', + license='Apache 2.0', + author='SONiC Team', + author_email='linuxnetdev@microsoft.com', + url='https://github.com/Azure/sonic-buildimage', + maintainer='Leo Lin', + maintainer_email='leo.yt.lin@ufispace.com', + packages=['sonic_platform'], + classifiers=[ + 'Development Status :: 3 - Alpha', + 'Environment :: Plugins', + 'Intended Audience :: Developers', + 'Intended Audience :: Information Technology', + 'Intended Audience :: System Administrators', + 'License :: OSI Approved :: Apache Software License', + 'Natural Language :: English', + 'Operating System :: POSIX :: Linux', + 'Programming Language :: Python :: 3.7', + 'Topic :: Utilities', + ], + keywords='sonic SONiC platform PLATFORM', +) diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s9301-32db/utils/pddf_post_device_create.sh b/platform/broadcom/sonic-platform-modules-ufispace/s9301-32db/utils/pddf_post_device_create.sh new file mode 100755 index 0000000000..e4de7ae366 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ufispace/s9301-32db/utils/pddf_post_device_create.sh @@ -0,0 +1,6 @@ +#!/bin/bash +#disable bmc watchdog +timeout 3 ipmitool mc watchdog off + +echo 1 > /sys/kernel/pddf/devices/sysstatus/sysstatus_data/port_led_clr_ctrl +echo "PDDF device post-create completed" diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s9301-32db/utils/pddf_post_driver_install.sh b/platform/broadcom/sonic-platform-modules-ufispace/s9301-32db/utils/pddf_post_driver_install.sh new file mode 100755 index 0000000000..ed2559977e --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ufispace/s9301-32db/utils/pddf_post_driver_install.sh @@ -0,0 +1,2 @@ +#!/bin/bash +echo "PDDF driver post-install completed" diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s9301-32db/utils/pddf_switch_svc.py b/platform/broadcom/sonic-platform-modules-ufispace/s9301-32db/utils/pddf_switch_svc.py new file mode 100755 index 0000000000..f5e45045fc --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ufispace/s9301-32db/utils/pddf_switch_svc.py @@ -0,0 +1,86 @@ +#!/usr/bin/env python +# Script to stop and start the respective platforms default services. +# This will be used while switching the pddf->non-pddf mode and vice versa +import commands + +def check_pddf_support(): + return True + +def stop_platform_svc(): + + ''' + status, output = commands.getstatusoutput("systemctl stop s9301-32db-platform-monitor-fan.service") + if status: + print "Stop s9301-32db-platform-fan.service failed %d"%status + return False + + status, output = commands.getstatusoutput("systemctl stop s9301-32db-platform-monitor-psu.service") + if status: + print "Stop s9301-32db-platform-psu.service failed %d"%status + return False + + status, output = commands.getstatusoutput("systemctl stop s9301-32db-platform-monitor.service") + if status: + print "Stop s9301-32db-platform-init.service failed %d"%status + return False + status, output = commands.getstatusoutput("systemctl disable s9301-32db-platform-monitor.service") + if status: + print "Disable s9301-32db-platform-monitor.service failed %d"%status + return False + ''' + + status, output = commands.getstatusoutput("/usr/local/bin/platform_utility.py deinit") + if status: + print "platform_utility.py deinit command failed %d"%status + return False + + # HACK , stop the pddf-platform-init service if it is active + status, output = commands.getstatusoutput("systemctl stop pddf-platform-init.service") + if status: + print "Stop pddf-platform-init.service along with other platform serives failed %d"%status + return False + + return True + +def start_platform_svc(): + + status, output = commands.getstatusoutput("/usr/local/bin/platform_utility.py init") + if status: + print "platform_utility.py init command failed %d"%status + return False + + ''' + status, output = commands.getstatusoutput("systemctl enable s9301-32db-platform-monitor.service") + if status: + print "Enable s9301-32db-platform-monitor.service failed %d"%status + return False + status, output = commands.getstatusoutput("systemctl start s9301-32db-platform-monitor-fan.service") + if status: + print "Start s9301-32db-platform-monitor-fan.service failed %d"%status + return False + + status, output = commands.getstatusoutput("systemctl start s9301-32db-platform-monitor-psu.service") + if status: + print "Start s9301-32db-platform-monitor-psu.service failed %d"%status + return False + ''' + return True + +def start_platform_pddf(): + + status, output = commands.getstatusoutput("systemctl start pddf-platform-init.service") + if status: + print "Start pddf-platform-init.service failed %d"%status + return False + + return True + +def stop_platform_pddf(): + + status, output = commands.getstatusoutput("systemctl stop pddf-platform-init.service") + if status: + print "Stop pddf-platform-init.service failed %d"%status + return False + + return True +