From 81486021c1355020716f9e42b519d5fd1161c766 Mon Sep 17 00:00:00 2001 From: Sudharsan Dhamal Gopalarathnam Date: Fri, 14 Oct 2022 22:12:28 -0700 Subject: [PATCH] [Mellanox]Adding SKU Mellanox-SN2700-D44C10 (#12396) #### Why I did it To add new SKU Mellanox-SN2700-D44C10 with following requirements: | Port configuration | Value | | ------ |--------- | | Breakout mode for each port |**Defined in port mapping** | | Speed of the port | **Defined in Port mapping** | | Auto-negotiation enable/disable | **No setting required** | | FEC mode | **No setting required** | |Type of transceiver used | **Not needed**| Buffer configuration | Value ------ |--------- Shared headroom | **Enabled** Shared headroom pool factor | **2** Dynamic Buffer | **Disable** In static buffer scenario how many uplinks and downlinks? | **44 x50G and 2x100G Downlinks 8x100G uplinks** 2km cable support required? | **No** Switch configuration | Value ------ |--------- Warmboot enabled? | **yes** Should warmboot be added to SAI profile when enabled? | **yes** Is VxLAN source port range set? | **No** Should Vxlan source port range be added to SAI profile when set. | **No** Is Static Policy Based Hashing enabled? | **No** Port Mapping | Ports | Mode | | ------ |--------- | | 1,2 | 1x100G | | 3-6 | 2x50G | | 7-10 | 1x100G | | 11-22 | 2x50G | | 23-26 | 1x100G | | 27-32 | 2x50G | Number of Uplinks / Downlinks: TO topology: **44 x50G and 2x100G Downlinks 8x100G uplinks**. #### How I did it Defined the SKU as per requirements #### How to verify it Load the SKU and verify if all links come up and traffic passes. --- .../Mellanox-SN2700-D44C10/buffers.json.j2 | 15 + .../buffers_defaults_objects.j2 | 1 + .../buffers_defaults_t0.j2 | 36 +++ .../buffers_defaults_t1.j2 | 36 +++ .../buffers_dynamic.json.j2 | 16 ++ .../Mellanox-SN2700-D44C10/hwsku.json | 166 +++++++++++ .../pg_profile_lookup.ini | 1 + .../Mellanox-SN2700-D44C10/port_config.ini | 55 ++++ .../Mellanox-SN2700-D44C10/qos.json.j2 | 1 + .../Mellanox-SN2700-D44C10/sai.profile | 3 + .../sai_2700_44x50g_10x100g.xml | 269 ++++++++++++++++++ 11 files changed, 599 insertions(+) create mode 100644 device/mellanox/x86_64-mlnx_msn2700-r0/Mellanox-SN2700-D44C10/buffers.json.j2 create mode 120000 device/mellanox/x86_64-mlnx_msn2700-r0/Mellanox-SN2700-D44C10/buffers_defaults_objects.j2 create mode 100644 device/mellanox/x86_64-mlnx_msn2700-r0/Mellanox-SN2700-D44C10/buffers_defaults_t0.j2 create mode 100644 device/mellanox/x86_64-mlnx_msn2700-r0/Mellanox-SN2700-D44C10/buffers_defaults_t1.j2 create mode 100644 device/mellanox/x86_64-mlnx_msn2700-r0/Mellanox-SN2700-D44C10/buffers_dynamic.json.j2 create mode 100644 device/mellanox/x86_64-mlnx_msn2700-r0/Mellanox-SN2700-D44C10/hwsku.json create mode 120000 device/mellanox/x86_64-mlnx_msn2700-r0/Mellanox-SN2700-D44C10/pg_profile_lookup.ini create mode 100644 device/mellanox/x86_64-mlnx_msn2700-r0/Mellanox-SN2700-D44C10/port_config.ini create mode 120000 device/mellanox/x86_64-mlnx_msn2700-r0/Mellanox-SN2700-D44C10/qos.json.j2 create mode 100644 device/mellanox/x86_64-mlnx_msn2700-r0/Mellanox-SN2700-D44C10/sai.profile create mode 100644 device/mellanox/x86_64-mlnx_msn2700-r0/Mellanox-SN2700-D44C10/sai_2700_44x50g_10x100g.xml diff --git a/device/mellanox/x86_64-mlnx_msn2700-r0/Mellanox-SN2700-D44C10/buffers.json.j2 b/device/mellanox/x86_64-mlnx_msn2700-r0/Mellanox-SN2700-D44C10/buffers.json.j2 new file mode 100644 index 0000000000..ad32662491 --- /dev/null +++ b/device/mellanox/x86_64-mlnx_msn2700-r0/Mellanox-SN2700-D44C10/buffers.json.j2 @@ -0,0 +1,15 @@ +{# + Copyright (c) 2022 NVIDIA CORPORATION & AFFILIATES. + Apache-2.0 + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + http://www.apache.org/licenses/LICENSE-2.0 + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +#} +{%- set default_topo = 't0' %} +{%- include 'buffers_config.j2' %} diff --git a/device/mellanox/x86_64-mlnx_msn2700-r0/Mellanox-SN2700-D44C10/buffers_defaults_objects.j2 b/device/mellanox/x86_64-mlnx_msn2700-r0/Mellanox-SN2700-D44C10/buffers_defaults_objects.j2 new file mode 120000 index 0000000000..c01aebb7ae --- /dev/null +++ b/device/mellanox/x86_64-mlnx_msn2700-r0/Mellanox-SN2700-D44C10/buffers_defaults_objects.j2 @@ -0,0 +1 @@ +../../x86_64-mlnx_msn2700-r0/Mellanox-SN2700-D48C8/buffers_defaults_objects.j2 \ No newline at end of file diff --git a/device/mellanox/x86_64-mlnx_msn2700-r0/Mellanox-SN2700-D44C10/buffers_defaults_t0.j2 b/device/mellanox/x86_64-mlnx_msn2700-r0/Mellanox-SN2700-D44C10/buffers_defaults_t0.j2 new file mode 100644 index 0000000000..920730c15e --- /dev/null +++ b/device/mellanox/x86_64-mlnx_msn2700-r0/Mellanox-SN2700-D44C10/buffers_defaults_t0.j2 @@ -0,0 +1,36 @@ +{# + Copyright (c) 2022 NVIDIA CORPORATION & AFFILIATES. + Apache-2.0 + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + http://www.apache.org/licenses/LICENSE-2.0 + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +#} +{% set default_cable = '5m' %} +{% set ingress_lossless_pool_size = '6822912' %} +{% set ingress_lossless_pool_xoff = '999424' %} +{% set egress_lossless_pool_size = '13945824' %} +{% set egress_lossy_pool_size = '6822912' %} + +{% import 'buffers_defaults_objects.j2' as defs with context %} + +{%- macro generate_buffer_pool_and_profiles_with_inactive_ports(port_names_inactive) %} +{{ defs.generate_buffer_pool_and_profiles_with_inactive_ports(port_names_inactive) }} +{%- endmacro %} + +{%- macro generate_profile_lists_with_inactive_ports(port_names_active, port_names_inactive) %} +{{ defs.generate_profile_lists(port_names_active, port_names_inactive) }} +{%- endmacro %} + +{%- macro generate_queue_buffers_with_inactive_ports(port_names_active, port_names_inactive) %} +{{ defs.generate_queue_buffers(port_names_active, port_names_inactive) }} +{%- endmacro %} + +{%- macro generate_pg_profiles_with_inactive_ports(port_names_active, port_names_inactive) %} +{{ defs.generate_pg_profiles(port_names_active, port_names_inactive) }} +{%- endmacro %} diff --git a/device/mellanox/x86_64-mlnx_msn2700-r0/Mellanox-SN2700-D44C10/buffers_defaults_t1.j2 b/device/mellanox/x86_64-mlnx_msn2700-r0/Mellanox-SN2700-D44C10/buffers_defaults_t1.j2 new file mode 100644 index 0000000000..18a57073f8 --- /dev/null +++ b/device/mellanox/x86_64-mlnx_msn2700-r0/Mellanox-SN2700-D44C10/buffers_defaults_t1.j2 @@ -0,0 +1,36 @@ +{# + Copyright (c) 2022 NVIDIA CORPORATION & AFFILIATES. + Apache-2.0 + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + http://www.apache.org/licenses/LICENSE-2.0 + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +#} +{% set default_cable = '300m' %} +{% set ingress_lossless_pool_size = '6282240' %} +{% set ingress_lossless_pool_xoff = '1540096' %} +{% set egress_lossless_pool_size = '13945824' %} +{% set egress_lossy_pool_size = '6282240' %} + +{% import 'buffers_defaults_objects.j2' as defs with context %} + +{%- macro generate_buffer_pool_and_profiles_with_inactive_ports(port_names_inactive) %} +{{ defs.generate_buffer_pool_and_profiles_with_inactive_ports(port_names_inactive) }} +{%- endmacro %} + +{%- macro generate_profile_lists_with_inactive_ports(port_names_active, port_names_inactive) %} +{{ defs.generate_profile_lists(port_names_active, port_names_inactive) }} +{%- endmacro %} + +{%- macro generate_queue_buffers_with_inactive_ports(port_names_active, port_names_inactive) %} +{{ defs.generate_queue_buffers(port_names_active, port_names_inactive) }} +{%- endmacro %} + +{%- macro generate_pg_profiles_with_inactive_ports(port_names_active, port_names_inactive) %} +{{ defs.generate_pg_profiles(port_names_active, port_names_inactive) }} +{%- endmacro %} diff --git a/device/mellanox/x86_64-mlnx_msn2700-r0/Mellanox-SN2700-D44C10/buffers_dynamic.json.j2 b/device/mellanox/x86_64-mlnx_msn2700-r0/Mellanox-SN2700-D44C10/buffers_dynamic.json.j2 new file mode 100644 index 0000000000..cea77067d2 --- /dev/null +++ b/device/mellanox/x86_64-mlnx_msn2700-r0/Mellanox-SN2700-D44C10/buffers_dynamic.json.j2 @@ -0,0 +1,16 @@ +{# + Copyright (c) 2022 NVIDIA CORPORATION & AFFILIATES. + Apache-2.0 + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + http://www.apache.org/licenses/LICENSE-2.0 + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +#} +{%- set default_topo = 't0' %} +{%- set dynamic_mode = 'true' %} +{%- include 'buffers_config.j2' %} diff --git a/device/mellanox/x86_64-mlnx_msn2700-r0/Mellanox-SN2700-D44C10/hwsku.json b/device/mellanox/x86_64-mlnx_msn2700-r0/Mellanox-SN2700-D44C10/hwsku.json new file mode 100644 index 0000000000..b74b2d5ad5 --- /dev/null +++ b/device/mellanox/x86_64-mlnx_msn2700-r0/Mellanox-SN2700-D44C10/hwsku.json @@ -0,0 +1,166 @@ +{ + "interfaces": { + "Ethernet0": { + "default_brkout_mode": "1x100G[50G,40G,25G,10G]" + }, + "Ethernet4": { + "default_brkout_mode": "1x100G[50G,40G,25G,10G]" + }, + "Ethernet8": { + "default_brkout_mode": "2x50G[25G,10G]" + }, + "Ethernet10": { + "default_brkout_mode": "2x50G[25G,10G]" + }, + "Ethernet12": { + "default_brkout_mode": "2x50G[25G,10G]" + }, + "Ethernet14": { + "default_brkout_mode": "2x50G[25G,10G]" + }, + "Ethernet16": { + "default_brkout_mode": "2x50G[25G,10G]" + }, + "Ethernet18": { + "default_brkout_mode": "2x50G[25G,10G]" + }, + "Ethernet20": { + "default_brkout_mode": "2x50G[25G,10G]" + }, + "Ethernet22": { + "default_brkout_mode": "2x50G[25G,10G]" + }, + "Ethernet24": { + "default_brkout_mode": "1x100G[50G,40G,25G,10G]" + }, + "Ethernet28": { + "default_brkout_mode": "1x100G[50G,40G,25G,10G]" + }, + "Ethernet32": { + "default_brkout_mode": "1x100G[50G,40G,25G,10G]" + }, + "Ethernet36": { + "default_brkout_mode": "1x100G[50G,40G,25G,10G]" + }, + "Ethernet40": { + "default_brkout_mode": "2x50G[25G,10G]" + }, + "Ethernet42": { + "default_brkout_mode": "2x50G[25G,10G]" + }, + "Ethernet44": { + "default_brkout_mode": "2x50G[25G,10G]" + }, + "Ethernet46": { + "default_brkout_mode": "2x50G[25G,10G]" + }, + "Ethernet48": { + "default_brkout_mode": "2x50G[25G,10G]" + }, + "Ethernet50": { + "default_brkout_mode": "2x50G[25G,10G]" + }, + "Ethernet52": { + "default_brkout_mode": "2x50G[25G,10G]" + }, + "Ethernet54": { + "default_brkout_mode": "2x50G[25G,10G]" + }, + "Ethernet56": { + "default_brkout_mode": "2x50G[25G,10G]" + }, + "Ethernet58": { + "default_brkout_mode": "2x50G[25G,10G]" + }, + "Ethernet60": { + "default_brkout_mode": "2x50G[25G,10G]" + }, + "Ethernet62": { + "default_brkout_mode": "2x50G[25G,10G]" + }, + "Ethernet64": { + "default_brkout_mode": "2x50G[25G,10G]" + }, + "Ethernet66": { + "default_brkout_mode": "2x50G[25G,10G]" + }, + "Ethernet68": { + "default_brkout_mode": "2x50G[25G,10G]" + }, + "Ethernet70": { + "default_brkout_mode": "2x50G[25G,10G]" + }, + "Ethernet72": { + "default_brkout_mode": "2x50G[25G,10G]" + }, + "Ethernet74": { + "default_brkout_mode": "2x50G[25G,10G]" + }, + "Ethernet76": { + "default_brkout_mode": "2x50G[25G,10G]" + }, + "Ethernet78": { + "default_brkout_mode": "2x50G[25G,10G]" + }, + "Ethernet80": { + "default_brkout_mode": "2x50G[25G,10G]" + }, + "Ethernet82": { + "default_brkout_mode": "2x50G[25G,10G]" + }, + "Ethernet84": { + "default_brkout_mode": "2x50G[25G,10G]" + }, + "Ethernet86": { + "default_brkout_mode": "2x50G[25G,10G]" + }, + "Ethernet88": { + "default_brkout_mode": "1x100G[50G,40G,25G,10G]" + }, + "Ethernet92": { + "default_brkout_mode": "1x100G[50G,40G,25G,10G]" + }, + "Ethernet96": { + "default_brkout_mode": "1x100G[50G,40G,25G,10G]" + }, + "Ethernet100": { + "default_brkout_mode": "1x100G[50G,40G,25G,10G]" + }, + "Ethernet104": { + "default_brkout_mode": "2x50G[25G,10G]" + }, + "Ethernet106": { + "default_brkout_mode": "2x50G[25G,10G]" + }, + "Ethernet108": { + "default_brkout_mode": "2x50G[25G,10G]" + }, + "Ethernet110": { + "default_brkout_mode": "2x50G[25G,10G]" + }, + "Ethernet112": { + "default_brkout_mode": "2x50G[25G,10G]" + }, + "Ethernet114": { + "default_brkout_mode": "2x50G[25G,10G]" + }, + "Ethernet116": { + "default_brkout_mode": "2x50G[25G,10G]" + }, + "Ethernet118": { + "default_brkout_mode": "2x50G[25G,10G]" + }, + "Ethernet120": { + "default_brkout_mode": "2x50G[25G,10G]" + }, + "Ethernet122": { + "default_brkout_mode": "2x50G[25G,10G]" + }, + "Ethernet124": { + "default_brkout_mode": "2x50G[25G,10G]" + }, + "Ethernet126": { + "default_brkout_mode": "2x50G[25G,10G]" + } + } +} diff --git a/device/mellanox/x86_64-mlnx_msn2700-r0/Mellanox-SN2700-D44C10/pg_profile_lookup.ini b/device/mellanox/x86_64-mlnx_msn2700-r0/Mellanox-SN2700-D44C10/pg_profile_lookup.ini new file mode 120000 index 0000000000..b1f8524ff2 --- /dev/null +++ b/device/mellanox/x86_64-mlnx_msn2700-r0/Mellanox-SN2700-D44C10/pg_profile_lookup.ini @@ -0,0 +1 @@ +../Mellanox-SN2700-D40C8S8/pg_profile_lookup.ini \ No newline at end of file diff --git a/device/mellanox/x86_64-mlnx_msn2700-r0/Mellanox-SN2700-D44C10/port_config.ini b/device/mellanox/x86_64-mlnx_msn2700-r0/Mellanox-SN2700-D44C10/port_config.ini new file mode 100644 index 0000000000..1320b267d8 --- /dev/null +++ b/device/mellanox/x86_64-mlnx_msn2700-r0/Mellanox-SN2700-D44C10/port_config.ini @@ -0,0 +1,55 @@ +# name lanes alias index speed +Ethernet0 0,1,2,3 etp1 1 100000 +Ethernet4 4,5,6,7 etp2 2 100000 +Ethernet8 8,9 etp3a 3 50000 +Ethernet10 10,11 etp3b 3 50000 +Ethernet12 12,13 etp4a 4 50000 +Ethernet14 14,15 etp4b 4 50000 +Ethernet16 16,17 etp5a 5 50000 +Ethernet18 18,19 etp5b 5 50000 +Ethernet20 20,21 etp6a 6 50000 +Ethernet22 22,23 etp6b 6 50000 +Ethernet24 24,25,26,27 etp7 7 100000 +Ethernet28 28,29,30,31 etp8 8 100000 +Ethernet32 32,33,34,35 etp9 9 100000 +Ethernet36 36,37,38,39 etp10 10 100000 +Ethernet40 40,41 etp11a 11 50000 +Ethernet42 42,43 etp11b 11 50000 +Ethernet44 44,45 etp12a 12 50000 +Ethernet46 46,47 etp12b 12 50000 +Ethernet48 48,49 etp13a 13 50000 +Ethernet50 50,51 etp13b 13 50000 +Ethernet52 52,53 etp14a 14 50000 +Ethernet54 54,55 etp14b 14 50000 +Ethernet56 56,57 etp15a 15 50000 +Ethernet58 58,59 etp15b 15 50000 +Ethernet60 60,61 etp16a 16 50000 +Ethernet62 62,63 etp16b 16 50000 +Ethernet64 64,65 etp17a 17 50000 +Ethernet66 66,67 etp17b 17 50000 +Ethernet68 68,69 etp18a 18 50000 +Ethernet70 70,71 etp18b 18 50000 +Ethernet72 72,73 etp19a 19 50000 +Ethernet74 74,75 etp19b 19 50000 +Ethernet76 76,77 etp20a 20 50000 +Ethernet78 78,79 etp20b 20 50000 +Ethernet80 80,81 etp21a 21 50000 +Ethernet82 82,83 etp21b 21 50000 +Ethernet84 84,85 etp22a 22 50000 +Ethernet86 86,87 etp22b 22 50000 +Ethernet88 88,89,90,91 etp23 23 100000 +Ethernet92 92,93,94,95 etp24 24 100000 +Ethernet96 96,97,98,99 etp25 25 100000 +Ethernet100 100,101,102,103 etp26 26 100000 +Ethernet104 104,105 etp27a 27 50000 +Ethernet106 106,107 etp27b 27 50000 +Ethernet108 108,109 etp28a 28 50000 +Ethernet110 110,111 etp28b 28 50000 +Ethernet112 112,113 etp29a 29 50000 +Ethernet114 114,115 etp29b 29 50000 +Ethernet116 116,117 etp30a 30 50000 +Ethernet118 118,119 etp30b 30 50000 +Ethernet120 120,121 etp31a 31 50000 +Ethernet122 122,123 etp31b 31 50000 +Ethernet124 124,125 etp32a 32 50000 +Ethernet126 126,127 etp32b 32 50000 diff --git a/device/mellanox/x86_64-mlnx_msn2700-r0/Mellanox-SN2700-D44C10/qos.json.j2 b/device/mellanox/x86_64-mlnx_msn2700-r0/Mellanox-SN2700-D44C10/qos.json.j2 new file mode 120000 index 0000000000..8bd2d26567 --- /dev/null +++ b/device/mellanox/x86_64-mlnx_msn2700-r0/Mellanox-SN2700-D44C10/qos.json.j2 @@ -0,0 +1 @@ +../ACS-MSN2700/qos.json.j2 \ No newline at end of file diff --git a/device/mellanox/x86_64-mlnx_msn2700-r0/Mellanox-SN2700-D44C10/sai.profile b/device/mellanox/x86_64-mlnx_msn2700-r0/Mellanox-SN2700-D44C10/sai.profile new file mode 100644 index 0000000000..f25a70d397 --- /dev/null +++ b/device/mellanox/x86_64-mlnx_msn2700-r0/Mellanox-SN2700-D44C10/sai.profile @@ -0,0 +1,3 @@ +SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/sai_2700_44x50g_10x100g.xml +SAI_DUMP_STORE_PATH=/var/log/mellanox/sdk-dumps +SAI_DUMP_STORE_AMOUNT=10 diff --git a/device/mellanox/x86_64-mlnx_msn2700-r0/Mellanox-SN2700-D44C10/sai_2700_44x50g_10x100g.xml b/device/mellanox/x86_64-mlnx_msn2700-r0/Mellanox-SN2700-D44C10/sai_2700_44x50g_10x100g.xml new file mode 100644 index 0000000000..c505f0c449 --- /dev/null +++ b/device/mellanox/x86_64-mlnx_msn2700-r0/Mellanox-SN2700-D44C10/sai_2700_44x50g_10x100g.xml @@ -0,0 +1,269 @@ + + + + + + 00:02:03:04:05:00 + + + 1 + + + 32 + + + + + 1 + 2 + 4 + 16 + + + 3 + + + 3221487616 + + + 3 + 2 + 4 + 17 + 1 + 3221487616 + + + 5 + 2 + 4 + 18 + 3 + 3221487616 + + + 7 + 2 + 4 + 19 + 1 + 3221487616 + + + 9 + 2 + 4 + 20 + 3 + 3221487616 + + + 11 + 2 + 4 + 21 + 1 + 3221487616 + + + 13 + 4 + 22 + 3 + 11534336 + + + 15 + 4 + 23 + 1 + 11534336 + + + 17 + 4 + 24 + 3 + 11534336 + + + 19 + 4 + 25 + 1 + 11534336 + + + 21 + 2 + 4 + 26 + 3 + 3221487616 + + + 23 + 2 + 4 + 27 + 1 + 3221487616 + + + 25 + 2 + 4 + 28 + 3 + 3221487616 + + + 27 + 2 + 4 + 29 + 1 + 3221487616 + + + 29 + 2 + 4 + 30 + 3 + 3221487616 + + + 31 + 2 + 4 + 31 + 1 + 3221487616 + + + 33 + 2 + 4 + 14 + 3 + 3221487616 + + + 35 + 2 + 4 + 15 + 1 + 3221487616 + + + 37 + 2 + 4 + 12 + 3 + 3221487616 + + + 39 + 2 + 4 + 13 + 1 + 3221487616 + + + 41 + 2 + 4 + 10 + 3 + 3221487616 + + + 43 + 2 + 4 + 11 + 1 + 3221487616 + + + 45 + 4 + 8 + 3 + 11534336 + + + 47 + 4 + 9 + 1 + 11534336 + + + 49 + 2 + 4 + 6 + 3 + 3221487616 + + + 51 + 4 + 7 + 1 + 11534336 + + + 53 + 2 + 4 + 4 + 3 + 3221487616 + + + 55 + 2 + 4 + 5 + 1 + 3221487616 + + + 57 + 2 + 4 + 2 + 3 + 3221487616 + + + 59 + 2 + 4 + 3 + 1 + 3221487616 + + + 61 + 4 + 0 + 3 + 11534336 + + + 63 + 4 + 1 + 1 + 11534336 + + + +