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sonic-buildimage Remove unused SAT port from arista configs. (#14167) (#14333)

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mssonicbld 2023-03-19 23:08:48 +08:00 committed by GitHub
parent bcf35fdee1
commit 7b61e894ac
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6 changed files with 0 additions and 66 deletions
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11
device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-C36/0/j2p-a7800r3a-36d-36x400G.config.bcm
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@ -251,17 +251,6 @@ tm_port_header_type_out_202=ETH
tm_port_header_type_in_203=INJECTED_2_PP tm_port_header_type_in_203=INJECTED_2_PP
tm_port_header_type_out_203=ETH tm_port_header_type_out_203=ETH
### SAT
## Enable SAT Interface. 0 - Disable, 1 - Enable (Default)
sat_enable=1
ucode_port_218=SAT:core_0.218
tm_port_header_type_out_218=CPU
tm_port_header_type_in_218=INJECTED_2
ucode_port_219=SAT:core_1.219
tm_port_header_type_out_219=CPU
tm_port_header_type_in_219=INJECTED_2
port_init_speed_sat=400000
### RCY ### RCY
sai_recycle_port_lane_base=0 sai_recycle_port_lane_base=0
ucode_port_221=RCY.21:core_0.221 ucode_port_221=RCY.21:core_0.221

11
device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-C36/1/j2p-a7800r3a-36d-36x400G.config.bcm
View File

@ -250,17 +250,6 @@ tm_port_header_type_out_202=ETH
tm_port_header_type_in_203=INJECTED_2_PP tm_port_header_type_in_203=INJECTED_2_PP
tm_port_header_type_out_203=ETH tm_port_header_type_out_203=ETH
### SAT
## Enable SAT Interface. 0 - Disable, 1 - Enable (Default)
sat_enable=1
ucode_port_218=SAT:core_0.218
tm_port_header_type_out_218=CPU
tm_port_header_type_in_218=INJECTED_2
ucode_port_219=SAT:core_1.219
tm_port_header_type_out_219=CPU
tm_port_header_type_in_219=INJECTED_2
port_init_speed_sat=400000
### RCY ### RCY
sai_recycle_port_lane_base=0 sai_recycle_port_lane_base=0
ucode_port_221=RCY.21:core_0.221 ucode_port_221=RCY.21:core_0.221

11
device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-C72/0/j2p-a7800r3a-36d-36x400G.config.bcm
View File

@ -269,17 +269,6 @@ tm_port_header_type_out_202=ETH
tm_port_header_type_in_203=INJECTED_2_PP tm_port_header_type_in_203=INJECTED_2_PP
tm_port_header_type_out_203=ETH tm_port_header_type_out_203=ETH
### SAT
## Enable SAT Interface. 0 - Disable, 1 - Enable (Default)
sat_enable=1
ucode_port_218=SAT:core_0.218
tm_port_header_type_out_218=CPU
tm_port_header_type_in_218=INJECTED_2
ucode_port_219=SAT:core_1.219
tm_port_header_type_out_219=CPU
tm_port_header_type_in_219=INJECTED_2
port_init_speed_sat=400000
### RCY ### RCY
sai_recycle_port_lane_base=0 sai_recycle_port_lane_base=0
ucode_port_221=RCY.21:core_0.221 ucode_port_221=RCY.21:core_0.221

11
device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-C72/1/j2p-a7800r3a-36d-36x400G.config.bcm
View File

@ -268,17 +268,6 @@ tm_port_header_type_out_202=ETH
tm_port_header_type_in_203=INJECTED_2_PP tm_port_header_type_in_203=INJECTED_2_PP
tm_port_header_type_out_203=ETH tm_port_header_type_out_203=ETH
### SAT
## Enable SAT Interface. 0 - Disable, 1 - Enable (Default)
sat_enable=1
ucode_port_218=SAT:core_0.218
tm_port_header_type_out_218=CPU
tm_port_header_type_in_218=INJECTED_2
ucode_port_219=SAT:core_1.219
tm_port_header_type_out_219=CPU
tm_port_header_type_in_219=INJECTED_2
port_init_speed_sat=400000
### RCY ### RCY
sai_recycle_port_lane_base=0 sai_recycle_port_lane_base=0
ucode_port_221=RCY.21:core_0.221 ucode_port_221=RCY.21:core_0.221

11
device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-D36/0/j2p-a7800r3a-36d-36x400G.config.bcm
View File

@ -251,17 +251,6 @@ tm_port_header_type_out_202=ETH
tm_port_header_type_in_203=INJECTED_2_PP tm_port_header_type_in_203=INJECTED_2_PP
tm_port_header_type_out_203=ETH tm_port_header_type_out_203=ETH
### SAT
## Enable SAT Interface. 0 - Disable, 1 - Enable (Default)
sat_enable=1
ucode_port_218=SAT:core_0.218
tm_port_header_type_out_218=CPU
tm_port_header_type_in_218=INJECTED_2
ucode_port_219=SAT:core_1.219
tm_port_header_type_out_219=CPU
tm_port_header_type_in_219=INJECTED_2
port_init_speed_sat=400000
### RCY ### RCY
sai_recycle_port_lane_base=0 sai_recycle_port_lane_base=0
ucode_port_221=RCY.21:core_0.221 ucode_port_221=RCY.21:core_0.221

11
device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-D36/1/j2p-a7800r3a-36d-36x400G.config.bcm
View File

@ -251,17 +251,6 @@ tm_port_header_type_out_202=ETH
tm_port_header_type_in_203=INJECTED_2_PP tm_port_header_type_in_203=INJECTED_2_PP
tm_port_header_type_out_203=ETH tm_port_header_type_out_203=ETH
### SAT
## Enable SAT Interface. 0 - Disable, 1 - Enable (Default)
sat_enable=1
ucode_port_218=SAT:core_0.218
tm_port_header_type_out_218=CPU
tm_port_header_type_in_218=INJECTED_2
ucode_port_219=SAT:core_1.219
tm_port_header_type_out_219=CPU
tm_port_header_type_in_219=INJECTED_2
port_init_speed_sat=400000
### RCY ### RCY
sai_recycle_port_lane_base=0 sai_recycle_port_lane_base=0
ucode_port_221=RCY.21:core_0.221 ucode_port_221=RCY.21:core_0.221