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[Inventec] Add D7264 platform support (#1675)

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* Add Inventec D7264 platform support

* Fixed util script file permission

* Fixed more scripts file permission
This commit is contained in:
loshihyu 2018-08-14 13:07:03 -07:00 committed by lguohan
parent 746ad967a4
commit 6918a22959
29 changed files with 15499 additions and 3 deletions
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65
device/inventec/x86_64-inventec_d7264q28b-r0/INVENTEC-D7264Q28B/port_config.ini Normal file
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# name lanes alias
Ethernet0 9,10,11,12 Ethernet0
Ethernet4 1,2,3,4 Ethernet4
Ethernet8 25,26,27,28 Ethernet8
Ethernet12 17,18,19,20 Ethernet12
Ethernet16 41,42,43,44 Ethernet16
Ethernet20 33,34,35,36 Ethernet20
Ethernet24 57,58,59,60 Ethernet24
Ethernet28 49,50,51,52 Ethernet28
Ethernet32 73,74,75,76 Ethernet32
Ethernet36 65,66,67,68 Ethernet36
Ethernet40 89,90,91,92 Ethernet40
Ethernet44 81,82,83,84 Ethernet44
Ethernet48 105,106,107,108 Ethernet48
Ethernet52 97,98,99,100 Ethernet52
Ethernet56 121,122,123,124 Ethernet56
Ethernet60 113,114,115,116 Ethernet60
Ethernet64 137,138,139,140 Ethernet64
Ethernet68 129,130,131,132 Ethernet68
Ethernet72 153,154,155,156 Ethernet72
Ethernet76 145,146,147,148 Ethernet76
Ethernet80 169,170,171,172 Ethernet80
Ethernet84 161,162,163,164 Ethernet84
Ethernet88 185,186,187,188 Ethernet88
Ethernet92 177,178,179,180 Ethernet92
Ethernet96 201,202,203,204 Ethernet96
Ethernet100 193,194,195,196 Ethernet100
Ethernet104 217,218,219,220 Ethernet104
Ethernet108 209,210,211,212 Ethernet108
Ethernet112 233,234,235,236 Ethernet112
Ethernet116 225,226,227,228 Ethernet116
Ethernet120 249,250,251,252 Ethernet120
Ethernet124 241,242,243,244 Ethernet124
Ethernet128 13,14,15,16 Ethernet128
Ethernet132 5,6,7,8 Ethernet132
Ethernet136 29,30,31,32 Ethernet136
Ethernet140 21,22,23,24 Ethernet140
Ethernet144 45,46,47,48 Ethernet144
Ethernet148 37,38,39,40 Ethernet148
Ethernet152 61,62,63,64 Ethernet152
Ethernet156 53,54,55,56 Ethernet156
Ethernet160 77,78,79,80 Ethernet160
Ethernet164 69,70,71,72 Ethernet164
Ethernet168 93,94,95,96 Ethernet168
Ethernet172 85,86,87,88 Ethernet172
Ethernet176 109,110,111,112 Ethernet176
Ethernet180 101,102,103,104 Ethernet180
Ethernet184 125,126,127,128 Ethernet184
Ethernet188 117,118,119,120 Ethernet188
Ethernet192 141,142,143,144 Ethernet192
Ethernet196 133,134,135,136 Ethernet196
Ethernet200 157,158,159,160 Ethernet200
Ethernet204 149,150,151,152 Ethernet204
Ethernet208 173,174,175,176 Ethernet208
Ethernet212 165,166,167,168 Ethernet212
Ethernet216 189,190,191,192 Ethernet216
Ethernet220 181,182,183,184 Ethernet220
Ethernet224 205,206,207,208 Ethernet224
Ethernet228 197,198,199,200 Ethernet228
Ethernet232 221,222,223,224 Ethernet232
Ethernet236 213,214,215,216 Ethernet236
Ethernet240 237,238,239,240 Ethernet240
Ethernet244 229,230,231,232 Ethernet244
Ethernet248 253,254,255,256 Ethernet248
Ethernet252 245,246,247,248 Ethernet252

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device/inventec/x86_64-inventec_d7264q28b-r0/INVENTEC-D7264Q28B/sai.profile Normal file
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SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/th2-d7264q28b-64x100g.config.bcm
SAI_NUM_ECMP_MEMBERS=32

841
device/inventec/x86_64-inventec_d7264q28b-r0/INVENTEC-D7264Q28B/th2-d7264q28b-64x100g.config.bcm Normal file
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# Sequoia BCM Shell config / 100G * 64 ports
core_clock_frequency=1700
dpp_clock_ratio=2:3
load_firmware=1
# EagleCore ports: xe0 & xe1
portmap_66=257:10
portmap_100=259:10
# Loopback ports
portmap_33=260:10
portmap_67=261:10
portmap_101=262:10
portmap_135=263:10
# 64 ports config for 100G
# For Tomahawk FalconCore:
# Physical ports in FalconCore[0 - 15] must map to logical port[1 - 32] at any order
# Physical ports in FalconCore[16 - 31] must map to logical port[34 - 65] at any order
# Physical ports in FalconCore[32 - 47] must map to logical port[68 - 99] at any order
# Physical ports in FalconCore[48 - 63] must map to logical port[102 - 133] at any order
## FalconCore[0 - 15]
portmap_1=9:100
portmap_2=1:100
portmap_3=13:100
portmap_4=5:100
portmap_5=25:100
portmap_6=17:100
portmap_7=29:100
portmap_8=21:100
portmap_9=41:100
portmap_10=33:100
portmap_11=45:100
portmap_12=37:100
portmap_13=57:100
portmap_14=49:100
portmap_15=61:100
portmap_16=53:100
## FalconCore[16 - 31]
portmap_34=73:100
portmap_35=65:100
portmap_36=77:100
portmap_37=69:100
portmap_38=89:100
portmap_39=81:100
portmap_40=93:100
portmap_41=85:100
portmap_42=105:100
portmap_43=97:100
portmap_44=109:100
portmap_45=101:100
portmap_46=121:100
portmap_47=113:100
portmap_48=125:100
portmap_49=117:100
## FalconCore[32-47]
portmap_68=137:100
portmap_69=129:100
portmap_70=141:100
portmap_71=133:100
portmap_72=153:100
portmap_73=145:100
portmap_74=157:100
portmap_75=149:100
portmap_76=169:100
portmap_77=161:100
portmap_78=173:100
portmap_79=165:100
portmap_80=185:100
portmap_81=177:100
portmap_82=189:100
portmap_83=181:100
## FalconCore[48-63]
portmap_102=201:100
portmap_103=193:100
portmap_104=205:100
portmap_105=197:100
portmap_106=217:100
portmap_107=209:100
portmap_108=221:100
portmap_109=213:100
portmap_110=233:100
portmap_111=225:100
portmap_112=237:100
portmap_113=229:100
portmap_114=249:100
portmap_115=241:100
portmap_116=253:100
portmap_117=245:100
pbmp_xport_xe=0x3FFFD0000FFFF40003FFFC0001FFFE
oversubscribe_mode=1
l2_mem_entries=73728
l3_mem_entries=73728
fpem_mem_entries=65536
l2xmsg_mode=1
## FalconCore [0-15] port TX Lane Swapping
phy_chain_tx_lane_map_physical{1.0}=0x3201
phy_chain_tx_lane_map_physical{5.0}=0x3210
phy_chain_tx_lane_map_physical{9.0}=0x2301
phy_chain_tx_lane_map_physical{13.0}=0x3210
phy_chain_tx_lane_map_physical{17.0}=0x3201
phy_chain_tx_lane_map_physical{21.0}=0x3201
phy_chain_tx_lane_map_physical{25.0}=0x3201
phy_chain_tx_lane_map_physical{29.0}=0x3210
phy_chain_tx_lane_map_physical{33.0}=0x3201
phy_chain_tx_lane_map_physical{37.0}=0x3210
phy_chain_tx_lane_map_physical{41.0}=0x3210
phy_chain_tx_lane_map_physical{45.0}=0x3210
phy_chain_tx_lane_map_physical{49.0}=0x3201
phy_chain_tx_lane_map_physical{53.0}=0x3210
phy_chain_tx_lane_map_physical{57.0}=0x3210
phy_chain_tx_lane_map_physical{61.0}=0x3210
## FalconCore [16-31] port TX Lane Swapping
phy_chain_tx_lane_map_physical{65.0}=0x3210
phy_chain_tx_lane_map_physical{69.0}=0x3201
phy_chain_tx_lane_map_physical{73.0}=0x3210
phy_chain_tx_lane_map_physical{77.0}=0x3210
phy_chain_tx_lane_map_physical{81.0}=0x3210
phy_chain_tx_lane_map_physical{85.0}=0x3210
phy_chain_tx_lane_map_physical{89.0}=0x3210
phy_chain_tx_lane_map_physical{93.0}=0x3210
phy_chain_tx_lane_map_physical{97.0}=0x3210
phy_chain_tx_lane_map_physical{101.0}=0x2310
phy_chain_tx_lane_map_physical{105.0}=0x2310
phy_chain_tx_lane_map_physical{109.0}=0x3210
phy_chain_tx_lane_map_physical{113.0}=0x3210
phy_chain_tx_lane_map_physical{117.0}=0x2310
phy_chain_tx_lane_map_physical{121.0}=0x2310
phy_chain_tx_lane_map_physical{125.0}=0x3210
## FalconCore [32-47] port TX Lane Swapping
phy_chain_tx_lane_map_physical{129.0}=0x2301
phy_chain_tx_lane_map_physical{133.0}=0x3210
phy_chain_tx_lane_map_physical{137.0}=0x2301
phy_chain_tx_lane_map_physical{141.0}=0x3210
phy_chain_tx_lane_map_physical{145.0}=0x2301
phy_chain_tx_lane_map_physical{149.0}=0x3210
phy_chain_tx_lane_map_physical{153.0}=0x3210
phy_chain_tx_lane_map_physical{157.0}=0x3210
phy_chain_tx_lane_map_physical{161.0}=0x2310
phy_chain_tx_lane_map_physical{165.0}=0x2310
phy_chain_tx_lane_map_physical{169.0}=0x2310
phy_chain_tx_lane_map_physical{173.0}=0x3210
phy_chain_tx_lane_map_physical{177.0}=0x3210
phy_chain_tx_lane_map_physical{181.0}=0x2310
phy_chain_tx_lane_map_physical{185.0}=0x3210
phy_chain_tx_lane_map_physical{189.0}=0x2310
## FalconCore [48-63] port TX Lane Swapping
phy_chain_tx_lane_map_physical{193.0}=0x2310
phy_chain_tx_lane_map_physical{197.0}=0x2310
phy_chain_tx_lane_map_physical{201.0}=0x2310
phy_chain_tx_lane_map_physical{205.0}=0x2310
phy_chain_tx_lane_map_physical{209.0}=0x3210
phy_chain_tx_lane_map_physical{213.0}=0x2310
phy_chain_tx_lane_map_physical{217.0}=0x3210
phy_chain_tx_lane_map_physical{221.0}=0x2301
phy_chain_tx_lane_map_physical{225.0}=0x3210
phy_chain_tx_lane_map_physical{229.0}=0x2310
phy_chain_tx_lane_map_physical{233.0}=0x2310
phy_chain_tx_lane_map_physical{237.0}=0x1023
phy_chain_tx_lane_map_physical{241.0}=0x3210
phy_chain_tx_lane_map_physical{245.0}=0x2310
phy_chain_tx_lane_map_physical{249.0}=0x3210
phy_chain_tx_lane_map_physical{253.0}=0x2310
## FalconCore [0-15] port RX Lane Swapping
phy_chain_rx_lane_map_physical{1.0}=0x3210
phy_chain_rx_lane_map_physical{5.0}=0x3210
phy_chain_rx_lane_map_physical{9.0}=0x3210
phy_chain_rx_lane_map_physical{13.0}=0x3210
phy_chain_rx_lane_map_physical{17.0}=0x2310
phy_chain_rx_lane_map_physical{21.0}=0x0213
phy_chain_rx_lane_map_physical{25.0}=0x2310
phy_chain_rx_lane_map_physical{29.0}=0x3210
phy_chain_rx_lane_map_physical{33.0}=0x3210
phy_chain_rx_lane_map_physical{37.0}=0x3210
phy_chain_rx_lane_map_physical{41.0}=0x3210
phy_chain_rx_lane_map_physical{45.0}=0x3210
phy_chain_rx_lane_map_physical{49.0}=0x3210
phy_chain_rx_lane_map_physical{53.0}=0x3210
phy_chain_rx_lane_map_physical{57.0}=0x3210
phy_chain_rx_lane_map_physical{61.0}=0x3210
## FalconCore [16-31] port RX Lane Swapping
phy_chain_rx_lane_map_physical{65.0}=0x3210
phy_chain_rx_lane_map_physical{69.0}=0x3210
phy_chain_rx_lane_map_physical{73.0}=0x3210
phy_chain_rx_lane_map_physical{77.0}=0x3210
phy_chain_rx_lane_map_physical{81.0}=0x3210
phy_chain_rx_lane_map_physical{85.0}=0x3210
phy_chain_rx_lane_map_physical{89.0}=0x3210
phy_chain_rx_lane_map_physical{93.0}=0x3210
phy_chain_rx_lane_map_physical{97.0}=0x3210
phy_chain_rx_lane_map_physical{101.0}=0x3201
phy_chain_rx_lane_map_physical{105.0}=0x3210
phy_chain_rx_lane_map_physical{109.0}=0x3210
phy_chain_rx_lane_map_physical{113.0}=0x3210
phy_chain_rx_lane_map_physical{117.0}=0x3210
phy_chain_rx_lane_map_physical{121.0}=0x3210
phy_chain_rx_lane_map_physical{125.0}=0x3210
## FalconCore [32-47] port RX Lane Swapping
phy_chain_rx_lane_map_physical{129.0}=0x3210
phy_chain_rx_lane_map_physical{133.0}=0x2301
phy_chain_rx_lane_map_physical{137.0}=0x3210
phy_chain_rx_lane_map_physical{141.0}=0x2310
phy_chain_rx_lane_map_physical{145.0}=0x3210
phy_chain_rx_lane_map_physical{149.0}=0x3210
phy_chain_rx_lane_map_physical{153.0}=0x3210
phy_chain_rx_lane_map_physical{157.0}=0x3210
phy_chain_rx_lane_map_physical{161.0}=0x3210
phy_chain_rx_lane_map_physical{165.0}=0x3210
phy_chain_rx_lane_map_physical{169.0}=0x3210
phy_chain_rx_lane_map_physical{173.0}=0x3210
phy_chain_rx_lane_map_physical{177.0}=0x3210
phy_chain_rx_lane_map_physical{181.0}=0x3210
phy_chain_rx_lane_map_physical{185.0}=0x3210
phy_chain_rx_lane_map_physical{189.0}=0x3210
## FalconCore [48-63] port RX Lan Swapping
phy_chain_rx_lane_map_physical{193.0}=0x3210
phy_chain_rx_lane_map_physical{197.0}=0x3210
phy_chain_rx_lane_map_physical{201.0}=0x3210
phy_chain_rx_lane_map_physical{205.0}=0x3210
phy_chain_rx_lane_map_physical{209.0}=0x3210
phy_chain_rx_lane_map_physical{213.0}=0x3210
phy_chain_rx_lane_map_physical{217.0}=0x3210
phy_chain_rx_lane_map_physical{221.0}=0x3210
phy_chain_rx_lane_map_physical{225.0}=0x3210
phy_chain_rx_lane_map_physical{229.0}=0x2301
phy_chain_rx_lane_map_physical{233.0}=0x3210
phy_chain_rx_lane_map_physical{237.0}=0x1023
phy_chain_rx_lane_map_physical{241.0}=0x3210
phy_chain_rx_lane_map_physical{245.0}=0x3210
phy_chain_rx_lane_map_physical{249.0}=0x3210
phy_chain_rx_lane_map_physical{253.0}=0x3210
## FalconCore[0-15] ports TX polarity flip
phy_chain_tx_polarity_flip_physical{1.0}=0x1
phy_chain_tx_polarity_flip_physical{2.0}=0x1
phy_chain_tx_polarity_flip_physical{3.0}=0x0
phy_chain_tx_polarity_flip_physical{4.0}=0x1
phy_chain_tx_polarity_flip_physical{5.0}=0x0
phy_chain_tx_polarity_flip_physical{6.0}=0x0
phy_chain_tx_polarity_flip_physical{7.0}=0x0
phy_chain_tx_polarity_flip_physical{8.0}=0x0
phy_chain_tx_polarity_flip_physical{9.0}=0x0
phy_chain_tx_polarity_flip_physical{10.0}=0x1
phy_chain_tx_polarity_flip_physical{11.0}=0x0
phy_chain_tx_polarity_flip_physical{12.0}=0x0
phy_chain_tx_polarity_flip_physical{13.0}=0x0
phy_chain_tx_polarity_flip_physical{14.0}=0x0
phy_chain_tx_polarity_flip_physical{15.0}=0x0
phy_chain_tx_polarity_flip_physical{16.0}=0x0
phy_chain_tx_polarity_flip_physical{17.0}=0x0
phy_chain_tx_polarity_flip_physical{18.0}=0x1
phy_chain_tx_polarity_flip_physical{19.0}=0x1
phy_chain_tx_polarity_flip_physical{20.0}=0x0
phy_chain_tx_polarity_flip_physical{21.0}=0x0
phy_chain_tx_polarity_flip_physical{22.0}=0x0
phy_chain_tx_polarity_flip_physical{23.0}=0x0
phy_chain_tx_polarity_flip_physical{24.0}=0x0
phy_chain_tx_polarity_flip_physical{25.0}=0x0
phy_chain_tx_polarity_flip_physical{26.0}=0x1
phy_chain_tx_polarity_flip_physical{27.0}=0x0
phy_chain_tx_polarity_flip_physical{28.0}=0x0
phy_chain_tx_polarity_flip_physical{29.0}=0x0
phy_chain_tx_polarity_flip_physical{30.0}=0x0
phy_chain_tx_polarity_flip_physical{31.0}=0x0
phy_chain_tx_polarity_flip_physical{32.0}=0x0
phy_chain_tx_polarity_flip_physical{33.0}=0x1
phy_chain_tx_polarity_flip_physical{34.0}=0x0
phy_chain_tx_polarity_flip_physical{35.0}=0x1
phy_chain_tx_polarity_flip_physical{36.0}=0x0
phy_chain_tx_polarity_flip_physical{37.0}=0x0
phy_chain_tx_polarity_flip_physical{38.0}=0x0
phy_chain_tx_polarity_flip_physical{39.0}=0x0
phy_chain_tx_polarity_flip_physical{40.0}=0x0
phy_chain_tx_polarity_flip_physical{41.0}=0x1
phy_chain_tx_polarity_flip_physical{42.0}=0x0
phy_chain_tx_polarity_flip_physical{43.0}=0x1
phy_chain_tx_polarity_flip_physical{44.0}=0x0
phy_chain_tx_polarity_flip_physical{45.0}=0x0
phy_chain_tx_polarity_flip_physical{46.0}=0x0
phy_chain_tx_polarity_flip_physical{47.0}=0x0
phy_chain_tx_polarity_flip_physical{48.0}=0x0
phy_chain_tx_polarity_flip_physical{49.0}=0x0
phy_chain_tx_polarity_flip_physical{50.0}=0x0
phy_chain_tx_polarity_flip_physical{51.0}=0x0
phy_chain_tx_polarity_flip_physical{52.0}=0x0
phy_chain_tx_polarity_flip_physical{53.0}=0x0
phy_chain_tx_polarity_flip_physical{54.0}=0x0
phy_chain_tx_polarity_flip_physical{55.0}=0x0
phy_chain_tx_polarity_flip_physical{56.0}=0x0
phy_chain_tx_polarity_flip_physical{57.0}=0x1
phy_chain_tx_polarity_flip_physical{58.0}=0x0
phy_chain_tx_polarity_flip_physical{59.0}=0x0
phy_chain_tx_polarity_flip_physical{60.0}=0x0
phy_chain_tx_polarity_flip_physical{61.0}=0x0
phy_chain_tx_polarity_flip_physical{62.0}=0x0
phy_chain_tx_polarity_flip_physical{63.0}=0x0
phy_chain_tx_polarity_flip_physical{64.0}=0x0
## FalconCore[16-31] ports TX polarity flip
phy_chain_tx_polarity_flip_physical{65.0}=0x1
phy_chain_tx_polarity_flip_physical{66.0}=0x0
phy_chain_tx_polarity_flip_physical{67.0}=0x0
phy_chain_tx_polarity_flip_physical{68.0}=0x0
phy_chain_tx_polarity_flip_physical{69.0}=0x0
phy_chain_tx_polarity_flip_physical{70.0}=0x1
phy_chain_tx_polarity_flip_physical{71.0}=0x0
phy_chain_tx_polarity_flip_physical{72.0}=0x0
phy_chain_tx_polarity_flip_physical{73.0}=0x0
phy_chain_tx_polarity_flip_physical{74.0}=0x0
phy_chain_tx_polarity_flip_physical{75.0}=0x0
phy_chain_tx_polarity_flip_physical{76.0}=0x0
phy_chain_tx_polarity_flip_physical{77.0}=0x1
phy_chain_tx_polarity_flip_physical{78.0}=0x0
phy_chain_tx_polarity_flip_physical{79.0}=0x0
phy_chain_tx_polarity_flip_physical{80.0}=0x0
phy_chain_tx_polarity_flip_physical{81.0}=0x0
phy_chain_tx_polarity_flip_physical{82.0}=0x0
phy_chain_tx_polarity_flip_physical{83.0}=0x0
phy_chain_tx_polarity_flip_physical{84.0}=0x0
phy_chain_tx_polarity_flip_physical{85.0}=0x0
phy_chain_tx_polarity_flip_physical{86.0}=0x1
phy_chain_tx_polarity_flip_physical{87.0}=0x0
phy_chain_tx_polarity_flip_physical{88.0}=0x0
phy_chain_tx_polarity_flip_physical{89.0}=0x1
phy_chain_tx_polarity_flip_physical{90.0}=0x0
phy_chain_tx_polarity_flip_physical{91.0}=0x0
phy_chain_tx_polarity_flip_physical{92.0}=0x0
phy_chain_tx_polarity_flip_physical{93.0}=0x1
phy_chain_tx_polarity_flip_physical{94.0}=0x0
phy_chain_tx_polarity_flip_physical{95.0}=0x0
phy_chain_tx_polarity_flip_physical{96.0}=0x0
phy_chain_tx_polarity_flip_physical{97.0}=0x1
phy_chain_tx_polarity_flip_physical{98.0}=0x0
phy_chain_tx_polarity_flip_physical{99.0}=0x0
phy_chain_tx_polarity_flip_physical{100.0}=0x0
phy_chain_tx_polarity_flip_physical{101.0}=0x0
phy_chain_tx_polarity_flip_physical{102.0}=0x0
phy_chain_tx_polarity_flip_physical{103.0}=0x0
phy_chain_tx_polarity_flip_physical{104.0}=0x0
phy_chain_tx_polarity_flip_physical{105.0}=0x1
phy_chain_tx_polarity_flip_physical{106.0}=0x0
phy_chain_tx_polarity_flip_physical{107.0}=0x0
phy_chain_tx_polarity_flip_physical{108.0}=0x0
phy_chain_tx_polarity_flip_physical{109.0}=0x0
phy_chain_tx_polarity_flip_physical{110.0}=0x0
phy_chain_tx_polarity_flip_physical{111.0}=0x0
phy_chain_tx_polarity_flip_physical{112.0}=0x0
phy_chain_tx_polarity_flip_physical{113.0}=0x0
phy_chain_tx_polarity_flip_physical{114.0}=0x1
phy_chain_tx_polarity_flip_physical{115.0}=0x0
phy_chain_tx_polarity_flip_physical{116.0}=0x0
phy_chain_tx_polarity_flip_physical{117.0}=0x0
phy_chain_tx_polarity_flip_physical{118.0}=0x0
phy_chain_tx_polarity_flip_physical{119.0}=0x0
phy_chain_tx_polarity_flip_physical{120.0}=0x0
phy_chain_tx_polarity_flip_physical{121.0}=0x1
phy_chain_tx_polarity_flip_physical{122.0}=0x0
phy_chain_tx_polarity_flip_physical{123.0}=0x0
phy_chain_tx_polarity_flip_physical{124.0}=0x0
phy_chain_tx_polarity_flip_physical{125.0}=0x0
phy_chain_tx_polarity_flip_physical{126.0}=0x0
phy_chain_tx_polarity_flip_physical{127.0}=0x0
phy_chain_tx_polarity_flip_physical{128.0}=0x0
## FalconCore[32-47] ports TX polarity flip
phy_chain_tx_polarity_flip_physical{129.0}=0x0
phy_chain_tx_polarity_flip_physical{130.0}=0x0
phy_chain_tx_polarity_flip_physical{131.0}=0x0
phy_chain_tx_polarity_flip_physical{132.0}=0x0
phy_chain_tx_polarity_flip_physical{133.0}=0x0
phy_chain_tx_polarity_flip_physical{134.0}=0x0
phy_chain_tx_polarity_flip_physical{135.0}=0x0
phy_chain_tx_polarity_flip_physical{136.0}=0x0
phy_chain_tx_polarity_flip_physical{137.0}=0x0
phy_chain_tx_polarity_flip_physical{138.0}=0x1
phy_chain_tx_polarity_flip_physical{139.0}=0x0
phy_chain_tx_polarity_flip_physical{140.0}=0x0
phy_chain_tx_polarity_flip_physical{141.0}=0x0
phy_chain_tx_polarity_flip_physical{142.0}=0x0
phy_chain_tx_polarity_flip_physical{143.0}=0x0
phy_chain_tx_polarity_flip_physical{144.0}=0x0
phy_chain_tx_polarity_flip_physical{145.0}=0x1
phy_chain_tx_polarity_flip_physical{146.0}=0x0
phy_chain_tx_polarity_flip_physical{147.0}=0x0
phy_chain_tx_polarity_flip_physical{148.0}=0x0
phy_chain_tx_polarity_flip_physical{149.0}=0x0
phy_chain_tx_polarity_flip_physical{150.0}=0x0
phy_chain_tx_polarity_flip_physical{151.0}=0x0
phy_chain_tx_polarity_flip_physical{152.0}=0x0
phy_chain_tx_polarity_flip_physical{153.0}=0x0
phy_chain_tx_polarity_flip_physical{154.0}=0x1
phy_chain_tx_polarity_flip_physical{155.0}=0x0
phy_chain_tx_polarity_flip_physical{156.0}=0x0
phy_chain_tx_polarity_flip_physical{157.0}=0x0
phy_chain_tx_polarity_flip_physical{158.0}=0x0
phy_chain_tx_polarity_flip_physical{159.0}=0x0
phy_chain_tx_polarity_flip_physical{160.0}=0x0
phy_chain_tx_polarity_flip_physical{161.0}=0x1
phy_chain_tx_polarity_flip_physical{162.0}=0x0
phy_chain_tx_polarity_flip_physical{163.0}=0x0
phy_chain_tx_polarity_flip_physical{164.0}=0x0
phy_chain_tx_polarity_flip_physical{165.0}=0x0
phy_chain_tx_polarity_flip_physical{166.0}=0x0
phy_chain_tx_polarity_flip_physical{167.0}=0x0
phy_chain_tx_polarity_flip_physical{168.0}=0x0
phy_chain_tx_polarity_flip_physical{169.0}=0x0
phy_chain_tx_polarity_flip_physical{170.0}=0x1
phy_chain_tx_polarity_flip_physical{171.0}=0x0
phy_chain_tx_polarity_flip_physical{172.0}=0x0
phy_chain_tx_polarity_flip_physical{173.0}=0x0
phy_chain_tx_polarity_flip_physical{174.0}=0x0
phy_chain_tx_polarity_flip_physical{175.0}=0x0
phy_chain_tx_polarity_flip_physical{176.0}=0x0
phy_chain_tx_polarity_flip_physical{177.0}=0x0
phy_chain_tx_polarity_flip_physical{178.0}=0x1
phy_chain_tx_polarity_flip_physical{179.0}=0x0
phy_chain_tx_polarity_flip_physical{180.0}=0x0
phy_chain_tx_polarity_flip_physical{181.0}=0x0
phy_chain_tx_polarity_flip_physical{182.0}=0x0
phy_chain_tx_polarity_flip_physical{183.0}=0x0
phy_chain_tx_polarity_flip_physical{184.0}=0x0
phy_chain_tx_polarity_flip_physical{185.0}=0x0
phy_chain_tx_polarity_flip_physical{186.0}=0x0
phy_chain_tx_polarity_flip_physical{187.0}=0x0
phy_chain_tx_polarity_flip_physical{188.0}=0x0
phy_chain_tx_polarity_flip_physical{189.0}=0x0
phy_chain_tx_polarity_flip_physical{190.0}=0x0
phy_chain_tx_polarity_flip_physical{191.0}=0x0
phy_chain_tx_polarity_flip_physical{192.0}=0x0
## FalconCore[48-63] ports TX polarity flip
phy_chain_tx_polarity_flip_physical{193.0}=0x1
phy_chain_tx_polarity_flip_physical{194.0}=0x0
phy_chain_tx_polarity_flip_physical{195.0}=0x0
phy_chain_tx_polarity_flip_physical{196.0}=0x0
phy_chain_tx_polarity_flip_physical{197.0}=0x0
phy_chain_tx_polarity_flip_physical{198.0}=0x0
phy_chain_tx_polarity_flip_physical{199.0}=0x0
phy_chain_tx_polarity_flip_physical{200.0}=0x0
phy_chain_tx_polarity_flip_physical{201.0}=0x0
phy_chain_tx_polarity_flip_physical{202.0}=0x1
phy_chain_tx_polarity_flip_physical{203.0}=0x0
phy_chain_tx_polarity_flip_physical{204.0}=0x0
phy_chain_tx_polarity_flip_physical{205.0}=0x0
phy_chain_tx_polarity_flip_physical{206.0}=0x0
phy_chain_tx_polarity_flip_physical{207.0}=0x0
phy_chain_tx_polarity_flip_physical{208.0}=0x0
phy_chain_tx_polarity_flip_physical{209.0}=0x0
phy_chain_tx_polarity_flip_physical{210.0}=0x0
phy_chain_tx_polarity_flip_physical{211.0}=0x0
phy_chain_tx_polarity_flip_physical{212.0}=0x0
phy_chain_tx_polarity_flip_physical{213.0}=0x0
phy_chain_tx_polarity_flip_physical{214.0}=0x0
phy_chain_tx_polarity_flip_physical{215.0}=0x0
phy_chain_tx_polarity_flip_physical{216.0}=0x0
phy_chain_tx_polarity_flip_physical{217.0}=0x1
phy_chain_tx_polarity_flip_physical{218.0}=0x0
phy_chain_tx_polarity_flip_physical{219.0}=0x0
phy_chain_tx_polarity_flip_physical{220.0}=0x0
phy_chain_tx_polarity_flip_physical{221.0}=0x0
phy_chain_tx_polarity_flip_physical{222.0}=0x0
phy_chain_tx_polarity_flip_physical{223.0}=0x0
phy_chain_tx_polarity_flip_physical{224.0}=0x0
phy_chain_tx_polarity_flip_physical{225.0}=0x1
phy_chain_tx_polarity_flip_physical{226.0}=0x0
phy_chain_tx_polarity_flip_physical{227.0}=0x0
phy_chain_tx_polarity_flip_physical{228.0}=0x0
phy_chain_tx_polarity_flip_physical{229.0}=0x0
phy_chain_tx_polarity_flip_physical{230.0}=0x0
phy_chain_tx_polarity_flip_physical{231.0}=0x0
phy_chain_tx_polarity_flip_physical{232.0}=0x0
phy_chain_tx_polarity_flip_physical{233.0}=0x1
phy_chain_tx_polarity_flip_physical{234.0}=0x0
phy_chain_tx_polarity_flip_physical{235.0}=0x0
phy_chain_tx_polarity_flip_physical{236.0}=0x0
phy_chain_tx_polarity_flip_physical{237.0}=0x0
phy_chain_tx_polarity_flip_physical{238.0}=0x0
phy_chain_tx_polarity_flip_physical{239.0}=0x0
phy_chain_tx_polarity_flip_physical{240.0}=0x0
phy_chain_tx_polarity_flip_physical{241.0}=0x1
phy_chain_tx_polarity_flip_physical{242.0}=0x0
phy_chain_tx_polarity_flip_physical{243.0}=0x0
phy_chain_tx_polarity_flip_physical{244.0}=0x0
phy_chain_tx_polarity_flip_physical{245.0}=0x0
phy_chain_tx_polarity_flip_physical{246.0}=0x0
phy_chain_tx_polarity_flip_physical{247.0}=0x0
phy_chain_tx_polarity_flip_physical{248.0}=0x1
phy_chain_tx_polarity_flip_physical{249.0}=0x1
phy_chain_tx_polarity_flip_physical{250.0}=0x0
phy_chain_tx_polarity_flip_physical{251.0}=0x0
phy_chain_tx_polarity_flip_physical{252.0}=0x0
phy_chain_tx_polarity_flip_physical{253.0}=0x0
phy_chain_tx_polarity_flip_physical{254.0}=0x0
phy_chain_tx_polarity_flip_physical{255.0}=0x0
phy_chain_tx_polarity_flip_physical{256.0}=0x1
## FalconCore[0-15] ports RX polarity flip
phy_chain_rx_polarity_flip_physical{1.0}=0x0
phy_chain_rx_polarity_flip_physical{2.0}=0x0
phy_chain_rx_polarity_flip_physical{3.0}=0x0
phy_chain_rx_polarity_flip_physical{4.0}=0x0
phy_chain_rx_polarity_flip_physical{5.0}=0x0
phy_chain_rx_polarity_flip_physical{6.0}=0x0
phy_chain_rx_polarity_flip_physical{7.0}=0x0
phy_chain_rx_polarity_flip_physical{8.0}=0x0
phy_chain_rx_polarity_flip_physical{9.0}=0x0
phy_chain_rx_polarity_flip_physical{10.0}=0x0
phy_chain_rx_polarity_flip_physical{11.0}=0x0
phy_chain_rx_polarity_flip_physical{12.0}=0x0
phy_chain_rx_polarity_flip_physical{13.0}=0x0
phy_chain_rx_polarity_flip_physical{14.0}=0x0
phy_chain_rx_polarity_flip_physical{15.0}=0x0
phy_chain_rx_polarity_flip_physical{16.0}=0x0
phy_chain_rx_polarity_flip_physical{17.0}=0x0
phy_chain_rx_polarity_flip_physical{18.0}=0x0
phy_chain_rx_polarity_flip_physical{19.0}=0x0
phy_chain_rx_polarity_flip_physical{20.0}=0x1
phy_chain_rx_polarity_flip_physical{21.0}=0x0
phy_chain_rx_polarity_flip_physical{22.0}=0x0
phy_chain_rx_polarity_flip_physical{23.0}=0x0
phy_chain_rx_polarity_flip_physical{24.0}=0x0
phy_chain_rx_polarity_flip_physical{25.0}=0x0
phy_chain_rx_polarity_flip_physical{26.0}=0x0
phy_chain_rx_polarity_flip_physical{27.0}=0x0
phy_chain_rx_polarity_flip_physical{28.0}=0x1
phy_chain_rx_polarity_flip_physical{29.0}=0x0
phy_chain_rx_polarity_flip_physical{30.0}=0x0
phy_chain_rx_polarity_flip_physical{31.0}=0x0
phy_chain_rx_polarity_flip_physical{32.0}=0x0
phy_chain_rx_polarity_flip_physical{33.0}=0x0
phy_chain_rx_polarity_flip_physical{34.0}=0x0
phy_chain_rx_polarity_flip_physical{35.0}=0x0
phy_chain_rx_polarity_flip_physical{36.0}=0x0
phy_chain_rx_polarity_flip_physical{37.0}=0x0
phy_chain_rx_polarity_flip_physical{38.0}=0x0
phy_chain_rx_polarity_flip_physical{39.0}=0x0
phy_chain_rx_polarity_flip_physical{40.0}=0x0
phy_chain_rx_polarity_flip_physical{41.0}=0x0
phy_chain_rx_polarity_flip_physical{42.0}=0x0
phy_chain_rx_polarity_flip_physical{43.0}=0x0
phy_chain_rx_polarity_flip_physical{44.0}=0x0
phy_chain_rx_polarity_flip_physical{45.0}=0x0
phy_chain_rx_polarity_flip_physical{46.0}=0x0
phy_chain_rx_polarity_flip_physical{47.0}=0x0
phy_chain_rx_polarity_flip_physical{48.0}=0x0
phy_chain_rx_polarity_flip_physical{49.0}=0x0
phy_chain_rx_polarity_flip_physical{50.0}=0x0
phy_chain_rx_polarity_flip_physical{51.0}=0x0
phy_chain_rx_polarity_flip_physical{52.0}=0x0
phy_chain_rx_polarity_flip_physical{53.0}=0x0
phy_chain_rx_polarity_flip_physical{54.0}=0x0
phy_chain_rx_polarity_flip_physical{55.0}=0x0
phy_chain_rx_polarity_flip_physical{56.0}=0x0
phy_chain_rx_polarity_flip_physical{57.0}=0x0
phy_chain_rx_polarity_flip_physical{58.0}=0x0
phy_chain_rx_polarity_flip_physical{59.0}=0x0
phy_chain_rx_polarity_flip_physical{60.0}=0x0
phy_chain_rx_polarity_flip_physical{61.0}=0x0
phy_chain_rx_polarity_flip_physical{62.0}=0x0
phy_chain_rx_polarity_flip_physical{63.0}=0x0
phy_chain_rx_polarity_flip_physical{64.0}=0x0
## FalconCore [16-31] ports RX polarity flip
phy_chain_rx_polarity_flip_physical{65.0}=0x0
phy_chain_rx_polarity_flip_physical{66.0}=0x0
phy_chain_rx_polarity_flip_physical{67.0}=0x0
phy_chain_rx_polarity_flip_physical{68.0}=0x0
phy_chain_rx_polarity_flip_physical{69.0}=0x0
phy_chain_rx_polarity_flip_physical{70.0}=0x0
phy_chain_rx_polarity_flip_physical{71.0}=0x0
phy_chain_rx_polarity_flip_physical{72.0}=0x1
phy_chain_rx_polarity_flip_physical{73.0}=0x0
phy_chain_rx_polarity_flip_physical{74.0}=0x0
phy_chain_rx_polarity_flip_physical{75.0}=0x0
phy_chain_rx_polarity_flip_physical{76.0}=0x0
phy_chain_rx_polarity_flip_physical{77.0}=0x0
phy_chain_rx_polarity_flip_physical{78.0}=0x0
phy_chain_rx_polarity_flip_physical{79.0}=0x1
phy_chain_rx_polarity_flip_physical{80.0}=0x0
phy_chain_rx_polarity_flip_physical{81.0}=0x0
phy_chain_rx_polarity_flip_physical{82.0}=0x0
phy_chain_rx_polarity_flip_physical{83.0}=0x0
phy_chain_rx_polarity_flip_physical{84.0}=0x0
phy_chain_rx_polarity_flip_physical{85.0}=0x0
phy_chain_rx_polarity_flip_physical{86.0}=0x0
phy_chain_rx_polarity_flip_physical{87.0}=0x0
phy_chain_rx_polarity_flip_physical{88.0}=0x0
phy_chain_rx_polarity_flip_physical{89.0}=0x0
phy_chain_rx_polarity_flip_physical{90.0}=0x0
phy_chain_rx_polarity_flip_physical{91.0}=0x0
phy_chain_rx_polarity_flip_physical{92.0}=0x0
phy_chain_rx_polarity_flip_physical{93.0}=0x0
phy_chain_rx_polarity_flip_physical{94.0}=0x0
phy_chain_rx_polarity_flip_physical{95.0}=0x0
phy_chain_rx_polarity_flip_physical{96.0}=0x0
phy_chain_rx_polarity_flip_physical{97.0}=0x0
phy_chain_rx_polarity_flip_physical{98.0}=0x0
phy_chain_rx_polarity_flip_physical{99.0}=0x0
phy_chain_rx_polarity_flip_physical{100.0}=0x0
phy_chain_rx_polarity_flip_physical{101.0}=0x0
phy_chain_rx_polarity_flip_physical{102.0}=0x0
phy_chain_rx_polarity_flip_physical{103.0}=0x0
phy_chain_rx_polarity_flip_physical{104.0}=0x0
phy_chain_rx_polarity_flip_physical{105.0}=0x0
phy_chain_rx_polarity_flip_physical{106.0}=0x0
phy_chain_rx_polarity_flip_physical{107.0}=0x0
phy_chain_rx_polarity_flip_physical{108.0}=0x0
phy_chain_rx_polarity_flip_physical{109.0}=0x0
phy_chain_rx_polarity_flip_physical{110.0}=0x0
phy_chain_rx_polarity_flip_physical{111.0}=0x0
phy_chain_rx_polarity_flip_physical{112.0}=0x0
phy_chain_rx_polarity_flip_physical{113.0}=0x0
phy_chain_rx_polarity_flip_physical{114.0}=0x0
phy_chain_rx_polarity_flip_physical{115.0}=0x0
phy_chain_rx_polarity_flip_physical{116.0}=0x0
phy_chain_rx_polarity_flip_physical{117.0}=0x0
phy_chain_rx_polarity_flip_physical{118.0}=0x0
phy_chain_rx_polarity_flip_physical{119.0}=0x0
phy_chain_rx_polarity_flip_physical{120.0}=0x0
phy_chain_rx_polarity_flip_physical{121.0}=0x0
phy_chain_rx_polarity_flip_physical{122.0}=0x0
phy_chain_rx_polarity_flip_physical{123.0}=0x0
phy_chain_rx_polarity_flip_physical{124.0}=0x0
phy_chain_rx_polarity_flip_physical{125.0}=0x0
phy_chain_rx_polarity_flip_physical{126.0}=0x0
phy_chain_rx_polarity_flip_physical{127.0}=0x0
phy_chain_rx_polarity_flip_physical{128.0}=0x0
## FalconCore [32-47] ports RX polarity flip
phy_chain_rx_polarity_flip_physical{129.0}=0x0
phy_chain_rx_polarity_flip_physical{130.0}=0x0
phy_chain_rx_polarity_flip_physical{131.0}=0x0
phy_chain_rx_polarity_flip_physical{132.0}=0x0
phy_chain_rx_polarity_flip_physical{133.0}=0x0
phy_chain_rx_polarity_flip_physical{134.0}=0x0
phy_chain_rx_polarity_flip_physical{135.0}=0x0
phy_chain_rx_polarity_flip_physical{136.0}=0x0
phy_chain_rx_polarity_flip_physical{137.0}=0x0
phy_chain_rx_polarity_flip_physical{138.0}=0x0
phy_chain_rx_polarity_flip_physical{139.0}=0x0
phy_chain_rx_polarity_flip_physical{140.0}=0x0
phy_chain_rx_polarity_flip_physical{141.0}=0x0
phy_chain_rx_polarity_flip_physical{142.0}=0x0
phy_chain_rx_polarity_flip_physical{143.0}=0x0
phy_chain_rx_polarity_flip_physical{144.0}=0x0
phy_chain_rx_polarity_flip_physical{145.0}=0x0
phy_chain_rx_polarity_flip_physical{146.0}=0x0
phy_chain_rx_polarity_flip_physical{147.0}=0x0
phy_chain_rx_polarity_flip_physical{148.0}=0x1
phy_chain_rx_polarity_flip_physical{149.0}=0x0
phy_chain_rx_polarity_flip_physical{150.0}=0x0
phy_chain_rx_polarity_flip_physical{151.0}=0x0
phy_chain_rx_polarity_flip_physical{152.0}=0x0
phy_chain_rx_polarity_flip_physical{153.0}=0x0
phy_chain_rx_polarity_flip_physical{154.0}=0x0
phy_chain_rx_polarity_flip_physical{155.0}=0x0
phy_chain_rx_polarity_flip_physical{156.0}=0x1
phy_chain_rx_polarity_flip_physical{157.0}=0x0
phy_chain_rx_polarity_flip_physical{158.0}=0x0
phy_chain_rx_polarity_flip_physical{159.0}=0x0
phy_chain_rx_polarity_flip_physical{160.0}=0x0
phy_chain_rx_polarity_flip_physical{161.0}=0x0
phy_chain_rx_polarity_flip_physical{162.0}=0x0
phy_chain_rx_polarity_flip_physical{163.0}=0x0
phy_chain_rx_polarity_flip_physical{164.0}=0x0
phy_chain_rx_polarity_flip_physical{165.0}=0x0
phy_chain_rx_polarity_flip_physical{166.0}=0x0
phy_chain_rx_polarity_flip_physical{167.0}=0x0
phy_chain_rx_polarity_flip_physical{168.0}=0x0
phy_chain_rx_polarity_flip_physical{169.0}=0x0
phy_chain_rx_polarity_flip_physical{170.0}=0x0
phy_chain_rx_polarity_flip_physical{171.0}=0x0
phy_chain_rx_polarity_flip_physical{172.0}=0x0
phy_chain_rx_polarity_flip_physical{173.0}=0x0
phy_chain_rx_polarity_flip_physical{174.0}=0x0
phy_chain_rx_polarity_flip_physical{175.0}=0x0
phy_chain_rx_polarity_flip_physical{176.0}=0x0
phy_chain_rx_polarity_flip_physical{177.0}=0x0
phy_chain_rx_polarity_flip_physical{178.0}=0x0
phy_chain_rx_polarity_flip_physical{179.0}=0x0
phy_chain_rx_polarity_flip_physical{180.0}=0x0
phy_chain_rx_polarity_flip_physical{181.0}=0x0
phy_chain_rx_polarity_flip_physical{182.0}=0x0
phy_chain_rx_polarity_flip_physical{183.0}=0x0
phy_chain_rx_polarity_flip_physical{184.0}=0x0
phy_chain_rx_polarity_flip_physical{185.0}=0x0
phy_chain_rx_polarity_flip_physical{186.0}=0x0
phy_chain_rx_polarity_flip_physical{187.0}=0x1
phy_chain_rx_polarity_flip_physical{188.0}=0x0
phy_chain_rx_polarity_flip_physical{189.0}=0x0
phy_chain_rx_polarity_flip_physical{190.0}=0x0
phy_chain_rx_polarity_flip_physical{191.0}=0x0
phy_chain_rx_polarity_flip_physical{192.0}=0x0
## FalconCore [48-63] ports RX polarity flip
phy_chain_rx_polarity_flip_physical{193.0}=0x0
phy_chain_rx_polarity_flip_physical{194.0}=0x0
phy_chain_rx_polarity_flip_physical{195.0}=0x0
phy_chain_rx_polarity_flip_physical{196.0}=0x0
phy_chain_rx_polarity_flip_physical{197.0}=0x0
phy_chain_rx_polarity_flip_physical{198.0}=0x0
phy_chain_rx_polarity_flip_physical{199.0}=0x0
phy_chain_rx_polarity_flip_physical{200.0}=0x0
phy_chain_rx_polarity_flip_physical{201.0}=0x0
phy_chain_rx_polarity_flip_physical{202.0}=0x0
phy_chain_rx_polarity_flip_physical{203.0}=0x0
phy_chain_rx_polarity_flip_physical{204.0}=0x0
phy_chain_rx_polarity_flip_physical{205.0}=0x0
phy_chain_rx_polarity_flip_physical{206.0}=0x0
phy_chain_rx_polarity_flip_physical{207.0}=0x0
phy_chain_rx_polarity_flip_physical{208.0}=0x0
phy_chain_rx_polarity_flip_physical{209.0}=0x0
phy_chain_rx_polarity_flip_physical{210.0}=0x0
phy_chain_rx_polarity_flip_physical{211.0}=0x1
phy_chain_rx_polarity_flip_physical{212.0}=0x1
phy_chain_rx_polarity_flip_physical{213.0}=0x0
phy_chain_rx_polarity_flip_physical{214.0}=0x0
phy_chain_rx_polarity_flip_physical{215.0}=0x0
phy_chain_rx_polarity_flip_physical{216.0}=0x0
phy_chain_rx_polarity_flip_physical{217.0}=0x0
phy_chain_rx_polarity_flip_physical{218.0}=0x0
phy_chain_rx_polarity_flip_physical{219.0}=0x1
phy_chain_rx_polarity_flip_physical{220.0}=0x0
phy_chain_rx_polarity_flip_physical{221.0}=0x0
phy_chain_rx_polarity_flip_physical{222.0}=0x0
phy_chain_rx_polarity_flip_physical{223.0}=0x0
phy_chain_rx_polarity_flip_physical{224.0}=0x0
phy_chain_rx_polarity_flip_physical{225.0}=0x0
phy_chain_rx_polarity_flip_physical{226.0}=0x0
phy_chain_rx_polarity_flip_physical{227.0}=0x0
phy_chain_rx_polarity_flip_physical{228.0}=0x0
phy_chain_rx_polarity_flip_physical{229.0}=0x0
phy_chain_rx_polarity_flip_physical{230.0}=0x0
phy_chain_rx_polarity_flip_physical{231.0}=0x0
phy_chain_rx_polarity_flip_physical{232.0}=0x0
phy_chain_rx_polarity_flip_physical{233.0}=0x0
phy_chain_rx_polarity_flip_physical{234.0}=0x0
phy_chain_rx_polarity_flip_physical{235.0}=0x0
phy_chain_rx_polarity_flip_physical{236.0}=0x0
phy_chain_rx_polarity_flip_physical{237.0}=0x0
phy_chain_rx_polarity_flip_physical{238.0}=0x0
phy_chain_rx_polarity_flip_physical{239.0}=0x0
phy_chain_rx_polarity_flip_physical{240.0}=0x0
phy_chain_rx_polarity_flip_physical{241.0}=0x0
phy_chain_rx_polarity_flip_physical{242.0}=0x0
phy_chain_rx_polarity_flip_physical{243.0}=0x1
phy_chain_rx_polarity_flip_physical{244.0}=0x0
phy_chain_rx_polarity_flip_physical{245.0}=0x0
phy_chain_rx_polarity_flip_physical{246.0}=0x0
phy_chain_rx_polarity_flip_physical{247.0}=0x0
phy_chain_rx_polarity_flip_physical{248.0}=0x0
phy_chain_rx_polarity_flip_physical{249.0}=0x0
phy_chain_rx_polarity_flip_physical{250.0}=0x0
phy_chain_rx_polarity_flip_physical{251.0}=0x1
phy_chain_rx_polarity_flip_physical{252.0}=0x0
phy_chain_rx_polarity_flip_physical{253.0}=0x0
phy_chain_rx_polarity_flip_physical{254.0}=0x0
phy_chain_rx_polarity_flip_physical{255.0}=0x0
phy_chain_rx_polarity_flip_physical{256.0}=0x0
dport_map_enable=1
dport_map_port_3=68
dport_map_port_4=69
dport_map_port_5=3
dport_map_port_6=4
dport_map_port_7=70
dport_map_port_8=71
dport_map_port_9=5
dport_map_port_10=6
dport_map_port_11=72
dport_map_port_12=73
dport_map_port_13=7
dport_map_port_14=8
dport_map_port_15=74
dport_map_port_16=75
dport_map_port_34=9
dport_map_port_35=10
dport_map_port_36=76
dport_map_port_37=77
dport_map_port_38=11
dport_map_port_39=12
dport_map_port_40=78
dport_map_port_41=79
dport_map_port_42=13
dport_map_port_43=14
dport_map_port_44=80
dport_map_port_45=81
dport_map_port_46=15
dport_map_port_47=16
dport_map_port_48=82
dport_map_port_49=83
dport_map_port_68=34
dport_map_port_69=35
dport_map_port_70=102
dport_map_port_71=103
dport_map_port_72=36
dport_map_port_73=37
dport_map_port_74=104
dport_map_port_75=105
dport_map_port_76=38
dport_map_port_77=39
dport_map_port_78=106
dport_map_port_79=107
dport_map_port_80=40
dport_map_port_81=41
dport_map_port_82=108
dport_map_port_83=109
dport_map_port_102=42
dport_map_port_103=43
dport_map_port_104=110
dport_map_port_105=111
dport_map_port_106=44
dport_map_port_107=45
dport_map_port_108=112
dport_map_port_109=113
dport_map_port_110=46
dport_map_port_111=47
dport_map_port_112=114
dport_map_port_113=115
dport_map_port_114=48
dport_map_port_115=49

4
device/inventec/x86_64-inventec_d7264q28b-r0/installer.conf Normal file
View File

@ -0,0 +1,4 @@
CONSOLE_PORT=0x3f8
CONSOLE_DEV=0
CONSOLE_SPEED=115200
VAR_LOG_SIZE=1024

273
device/inventec/x86_64-inventec_d7264q28b-r0/led_proc_init.soc Normal file
View File

@ -0,0 +1,273 @@
#LED processor initialization for Inventec Sequoia platform
led 0 stop
led 0 prog 02 00 60 F1 12 00 DA 0F 70 10 67 72 67 6D 77 06 02 A0 60 F0 02 00 60 F2 12 00 02 00 60 F4 06 F0 4A 01 71 41 4A 03 27 67 6D 4A 02 27 67 6D 06 F2 28 32 08 67 6D 06 F2 28 32 00 32 01 B7 67 6D 77 4D 67 75 67 6D 67 75 67 6D 67 72 67 6D DA A0 70 5F 86 F0 86 F2 86 F4 06 F4 D2 04 74 2E 77 1A 12 00 DA 00 70 6B 67 75 67 6D 77 61 3E F1 87 86 F1 81 57 17 27 57 07 27 57
m CMIC_LEDUP0_PORT_ORDER_REMAP_0_3 REMAP_PORT_0=59
m CMIC_LEDUP0_PORT_ORDER_REMAP_0_3 REMAP_PORT_1=57
m CMIC_LEDUP0_PORT_ORDER_REMAP_0_3 REMAP_PORT_2=58
m CMIC_LEDUP0_PORT_ORDER_REMAP_0_3 REMAP_PORT_3=56
m CMIC_LEDUP0_PORT_ORDER_REMAP_4_7 REMAP_PORT_4=51
m CMIC_LEDUP0_PORT_ORDER_REMAP_4_7 REMAP_PORT_5=49
m CMIC_LEDUP0_PORT_ORDER_REMAP_4_7 REMAP_PORT_6=50
m CMIC_LEDUP0_PORT_ORDER_REMAP_4_7 REMAP_PORT_7=48
m CMIC_LEDUP0_PORT_ORDER_REMAP_8_11 REMAP_PORT_8=63
m CMIC_LEDUP0_PORT_ORDER_REMAP_8_11 REMAP_PORT_9=61
m CMIC_LEDUP0_PORT_ORDER_REMAP_8_11 REMAP_PORT_10=62
m CMIC_LEDUP0_PORT_ORDER_REMAP_8_11 REMAP_PORT_11=60
m CMIC_LEDUP0_PORT_ORDER_REMAP_12_15 REMAP_PORT_12=55
m CMIC_LEDUP0_PORT_ORDER_REMAP_12_15 REMAP_PORT_13=53
m CMIC_LEDUP0_PORT_ORDER_REMAP_12_15 REMAP_PORT_14=54
m CMIC_LEDUP0_PORT_ORDER_REMAP_12_15 REMAP_PORT_15=52
m CMIC_LEDUP0_PORT_ORDER_REMAP_16_19 REMAP_PORT_16=43
m CMIC_LEDUP0_PORT_ORDER_REMAP_16_19 REMAP_PORT_17=41
m CMIC_LEDUP0_PORT_ORDER_REMAP_16_19 REMAP_PORT_18=42
m CMIC_LEDUP0_PORT_ORDER_REMAP_16_19 REMAP_PORT_19=40
m CMIC_LEDUP0_PORT_ORDER_REMAP_20_23 REMAP_PORT_20=35
m CMIC_LEDUP0_PORT_ORDER_REMAP_20_23 REMAP_PORT_21=33
m CMIC_LEDUP0_PORT_ORDER_REMAP_20_23 REMAP_PORT_22=34
m CMIC_LEDUP0_PORT_ORDER_REMAP_20_23 REMAP_PORT_23=32
m CMIC_LEDUP0_PORT_ORDER_REMAP_24_27 REMAP_PORT_24=47
m CMIC_LEDUP0_PORT_ORDER_REMAP_24_27 REMAP_PORT_25=45
m CMIC_LEDUP0_PORT_ORDER_REMAP_24_27 REMAP_PORT_26=46
m CMIC_LEDUP0_PORT_ORDER_REMAP_24_27 REMAP_PORT_27=44
m CMIC_LEDUP0_PORT_ORDER_REMAP_28_31 REMAP_PORT_28=39
m CMIC_LEDUP0_PORT_ORDER_REMAP_28_31 REMAP_PORT_29=37
m CMIC_LEDUP0_PORT_ORDER_REMAP_28_31 REMAP_PORT_30=38
m CMIC_LEDUP0_PORT_ORDER_REMAP_28_31 REMAP_PORT_31=36
m CMIC_LEDUP0_PORT_ORDER_REMAP_32_35 REMAP_PORT_32=27
m CMIC_LEDUP0_PORT_ORDER_REMAP_32_35 REMAP_PORT_33=25
m CMIC_LEDUP0_PORT_ORDER_REMAP_32_35 REMAP_PORT_34=26
m CMIC_LEDUP0_PORT_ORDER_REMAP_32_35 REMAP_PORT_35=24
m CMIC_LEDUP0_PORT_ORDER_REMAP_36_39 REMAP_PORT_36=19
m CMIC_LEDUP0_PORT_ORDER_REMAP_36_39 REMAP_PORT_37=17
m CMIC_LEDUP0_PORT_ORDER_REMAP_36_39 REMAP_PORT_38=18
m CMIC_LEDUP0_PORT_ORDER_REMAP_36_39 REMAP_PORT_39=16
m CMIC_LEDUP0_PORT_ORDER_REMAP_40_43 REMAP_PORT_40=31
m CMIC_LEDUP0_PORT_ORDER_REMAP_40_43 REMAP_PORT_41=29
m CMIC_LEDUP0_PORT_ORDER_REMAP_40_43 REMAP_PORT_42=30
m CMIC_LEDUP0_PORT_ORDER_REMAP_40_43 REMAP_PORT_43=28
m CMIC_LEDUP0_PORT_ORDER_REMAP_44_47 REMAP_PORT_44=23
m CMIC_LEDUP0_PORT_ORDER_REMAP_44_47 REMAP_PORT_45=21
m CMIC_LEDUP0_PORT_ORDER_REMAP_44_47 REMAP_PORT_46=22
m CMIC_LEDUP0_PORT_ORDER_REMAP_44_47 REMAP_PORT_47=20
m CMIC_LEDUP0_PORT_ORDER_REMAP_48_51 REMAP_PORT_48=11
m CMIC_LEDUP0_PORT_ORDER_REMAP_48_51 REMAP_PORT_49=9
m CMIC_LEDUP0_PORT_ORDER_REMAP_48_51 REMAP_PORT_50=10
m CMIC_LEDUP0_PORT_ORDER_REMAP_48_51 REMAP_PORT_51=8
m CMIC_LEDUP0_PORT_ORDER_REMAP_52_55 REMAP_PORT_52=3
m CMIC_LEDUP0_PORT_ORDER_REMAP_52_55 REMAP_PORT_53=1
m CMIC_LEDUP0_PORT_ORDER_REMAP_52_55 REMAP_PORT_54=2
m CMIC_LEDUP0_PORT_ORDER_REMAP_52_55 REMAP_PORT_55=0
m CMIC_LEDUP0_PORT_ORDER_REMAP_56_59 REMAP_PORT_56=15
m CMIC_LEDUP0_PORT_ORDER_REMAP_56_59 REMAP_PORT_57=13
m CMIC_LEDUP0_PORT_ORDER_REMAP_56_59 REMAP_PORT_58=14
m CMIC_LEDUP0_PORT_ORDER_REMAP_56_59 REMAP_PORT_59=12
m CMIC_LEDUP0_PORT_ORDER_REMAP_60_63 REMAP_PORT_60=7
m CMIC_LEDUP0_PORT_ORDER_REMAP_60_63 REMAP_PORT_61=5
m CMIC_LEDUP0_PORT_ORDER_REMAP_60_63 REMAP_PORT_62=6
m CMIC_LEDUP0_PORT_ORDER_REMAP_60_63 REMAP_PORT_63=4
led 0 start
led 1 stop
led 1 prog 02 00 60 F1 12 00 DA 0F 70 10 67 72 67 6D 77 06 02 A0 60 F0 02 00 60 F2 12 00 02 00 60 F4 06 F0 4A 01 71 41 4A 03 27 67 6D 4A 02 27 67 6D 06 F2 28 32 08 67 6D 06 F2 28 32 00 32 01 B7 67 6D 77 4D 67 75 67 6D 67 75 67 6D 67 72 67 6D DA A0 70 5F 86 F0 86 F2 86 F4 06 F4 D2 04 74 2E 77 1A 12 00 DA 00 70 6B 67 75 67 6D 77 61 3E F1 87 86 F1 81 57 17 27 57 07 27 57
m CMIC_LEDUP1_PORT_ORDER_REMAP_0_3 REMAP_PORT_0=7
m CMIC_LEDUP1_PORT_ORDER_REMAP_0_3 REMAP_PORT_1=5
m CMIC_LEDUP1_PORT_ORDER_REMAP_0_3 REMAP_PORT_2=6
m CMIC_LEDUP1_PORT_ORDER_REMAP_0_3 REMAP_PORT_3=4
m CMIC_LEDUP1_PORT_ORDER_REMAP_4_7 REMAP_PORT_4=15
m CMIC_LEDUP1_PORT_ORDER_REMAP_4_7 REMAP_PORT_5=13
m CMIC_LEDUP1_PORT_ORDER_REMAP_4_7 REMAP_PORT_6=14
m CMIC_LEDUP1_PORT_ORDER_REMAP_4_7 REMAP_PORT_7=12
m CMIC_LEDUP1_PORT_ORDER_REMAP_8_11 REMAP_PORT_8=3
m CMIC_LEDUP1_PORT_ORDER_REMAP_8_11 REMAP_PORT_9=1
m CMIC_LEDUP1_PORT_ORDER_REMAP_8_11 REMAP_PORT_10=2
m CMIC_LEDUP1_PORT_ORDER_REMAP_8_11 REMAP_PORT_11=0
m CMIC_LEDUP1_PORT_ORDER_REMAP_12_15 REMAP_PORT_12=11
m CMIC_LEDUP1_PORT_ORDER_REMAP_12_15 REMAP_PORT_13=9
m CMIC_LEDUP1_PORT_ORDER_REMAP_12_15 REMAP_PORT_14=10
m CMIC_LEDUP1_PORT_ORDER_REMAP_12_15 REMAP_PORT_15=8
m CMIC_LEDUP1_PORT_ORDER_REMAP_16_19 REMAP_PORT_16=23
m CMIC_LEDUP1_PORT_ORDER_REMAP_16_19 REMAP_PORT_17=21
m CMIC_LEDUP1_PORT_ORDER_REMAP_16_19 REMAP_PORT_18=22
m CMIC_LEDUP1_PORT_ORDER_REMAP_16_19 REMAP_PORT_19=20
m CMIC_LEDUP1_PORT_ORDER_REMAP_20_23 REMAP_PORT_20=31
m CMIC_LEDUP1_PORT_ORDER_REMAP_20_23 REMAP_PORT_21=29
m CMIC_LEDUP1_PORT_ORDER_REMAP_20_23 REMAP_PORT_22=30
m CMIC_LEDUP1_PORT_ORDER_REMAP_20_23 REMAP_PORT_23=28
m CMIC_LEDUP1_PORT_ORDER_REMAP_24_27 REMAP_PORT_24=19
m CMIC_LEDUP1_PORT_ORDER_REMAP_24_27 REMAP_PORT_25=17
m CMIC_LEDUP1_PORT_ORDER_REMAP_24_27 REMAP_PORT_26=18
m CMIC_LEDUP1_PORT_ORDER_REMAP_24_27 REMAP_PORT_27=16
m CMIC_LEDUP1_PORT_ORDER_REMAP_28_31 REMAP_PORT_28=27
m CMIC_LEDUP1_PORT_ORDER_REMAP_28_31 REMAP_PORT_29=25
m CMIC_LEDUP1_PORT_ORDER_REMAP_28_31 REMAP_PORT_30=26
m CMIC_LEDUP1_PORT_ORDER_REMAP_28_31 REMAP_PORT_31=24
m CMIC_LEDUP1_PORT_ORDER_REMAP_32_35 REMAP_PORT_32=39
m CMIC_LEDUP1_PORT_ORDER_REMAP_32_35 REMAP_PORT_33=37
m CMIC_LEDUP1_PORT_ORDER_REMAP_32_35 REMAP_PORT_34=38
m CMIC_LEDUP1_PORT_ORDER_REMAP_32_35 REMAP_PORT_35=36
m CMIC_LEDUP1_PORT_ORDER_REMAP_36_39 REMAP_PORT_36=47
m CMIC_LEDUP1_PORT_ORDER_REMAP_36_39 REMAP_PORT_37=45
m CMIC_LEDUP1_PORT_ORDER_REMAP_36_39 REMAP_PORT_38=46
m CMIC_LEDUP1_PORT_ORDER_REMAP_36_39 REMAP_PORT_39=44
m CMIC_LEDUP1_PORT_ORDER_REMAP_40_43 REMAP_PORT_40=35
m CMIC_LEDUP1_PORT_ORDER_REMAP_40_43 REMAP_PORT_41=33
m CMIC_LEDUP1_PORT_ORDER_REMAP_40_43 REMAP_PORT_42=34
m CMIC_LEDUP1_PORT_ORDER_REMAP_40_43 REMAP_PORT_43=32
m CMIC_LEDUP1_PORT_ORDER_REMAP_44_47 REMAP_PORT_44=43
m CMIC_LEDUP1_PORT_ORDER_REMAP_44_47 REMAP_PORT_45=41
m CMIC_LEDUP1_PORT_ORDER_REMAP_44_47 REMAP_PORT_46=42
m CMIC_LEDUP1_PORT_ORDER_REMAP_44_47 REMAP_PORT_47=40
m CMIC_LEDUP1_PORT_ORDER_REMAP_48_51 REMAP_PORT_48=55
m CMIC_LEDUP1_PORT_ORDER_REMAP_48_51 REMAP_PORT_49=53
m CMIC_LEDUP1_PORT_ORDER_REMAP_48_51 REMAP_PORT_50=54
m CMIC_LEDUP1_PORT_ORDER_REMAP_48_51 REMAP_PORT_51=52
m CMIC_LEDUP1_PORT_ORDER_REMAP_52_55 REMAP_PORT_52=63
m CMIC_LEDUP1_PORT_ORDER_REMAP_52_55 REMAP_PORT_53=61
m CMIC_LEDUP1_PORT_ORDER_REMAP_52_55 REMAP_PORT_54=62
m CMIC_LEDUP1_PORT_ORDER_REMAP_52_55 REMAP_PORT_55=60
m CMIC_LEDUP1_PORT_ORDER_REMAP_56_59 REMAP_PORT_56=51
m CMIC_LEDUP1_PORT_ORDER_REMAP_56_59 REMAP_PORT_57=49
m CMIC_LEDUP1_PORT_ORDER_REMAP_56_59 REMAP_PORT_58=50
m CMIC_LEDUP1_PORT_ORDER_REMAP_56_59 REMAP_PORT_59=48
m CMIC_LEDUP1_PORT_ORDER_REMAP_60_63 REMAP_PORT_60=59
m CMIC_LEDUP1_PORT_ORDER_REMAP_60_63 REMAP_PORT_61=57
m CMIC_LEDUP1_PORT_ORDER_REMAP_60_63 REMAP_PORT_62=58
m CMIC_LEDUP1_PORT_ORDER_REMAP_60_63 REMAP_PORT_63=56
led 1 start
led 2 stop
led 2 prog 02 00 60 F1 12 00 DA 0F 70 10 67 72 67 6D 77 06 02 A0 60 F0 02 00 60 F2 12 00 02 00 60 F4 06 F0 4A 01 71 41 4A 03 27 67 6D 4A 02 27 67 6D 06 F2 28 32 08 67 6D 06 F2 28 32 00 32 01 B7 67 6D 77 4D 67 75 67 6D 67 75 67 6D 67 72 67 6D DA A0 70 5F 86 F0 86 F2 86 F4 06 F4 D2 04 74 2E 77 1A 12 00 DA 00 70 6B 67 75 67 6D 77 61 3E F1 87 86 F1 81 57 17 27 57 07 27 57
m CMIC_LEDUP2_PORT_ORDER_REMAP_0_3 REMAP_PORT_0=59
m CMIC_LEDUP2_PORT_ORDER_REMAP_0_3 REMAP_PORT_1=57
m CMIC_LEDUP2_PORT_ORDER_REMAP_0_3 REMAP_PORT_2=58
m CMIC_LEDUP2_PORT_ORDER_REMAP_0_3 REMAP_PORT_3=56
m CMIC_LEDUP2_PORT_ORDER_REMAP_4_7 REMAP_PORT_4=51
m CMIC_LEDUP2_PORT_ORDER_REMAP_4_7 REMAP_PORT_5=49
m CMIC_LEDUP2_PORT_ORDER_REMAP_4_7 REMAP_PORT_6=50
m CMIC_LEDUP2_PORT_ORDER_REMAP_4_7 REMAP_PORT_7=48
m CMIC_LEDUP2_PORT_ORDER_REMAP_8_11 REMAP_PORT_8=63
m CMIC_LEDUP2_PORT_ORDER_REMAP_8_11 REMAP_PORT_9=61
m CMIC_LEDUP2_PORT_ORDER_REMAP_8_11 REMAP_PORT_10=62
m CMIC_LEDUP2_PORT_ORDER_REMAP_8_11 REMAP_PORT_11=60
m CMIC_LEDUP2_PORT_ORDER_REMAP_12_15 REMAP_PORT_12=55
m CMIC_LEDUP2_PORT_ORDER_REMAP_12_15 REMAP_PORT_13=53
m CMIC_LEDUP2_PORT_ORDER_REMAP_12_15 REMAP_PORT_14=54
m CMIC_LEDUP2_PORT_ORDER_REMAP_12_15 REMAP_PORT_15=52
m CMIC_LEDUP2_PORT_ORDER_REMAP_16_19 REMAP_PORT_16=43
m CMIC_LEDUP2_PORT_ORDER_REMAP_16_19 REMAP_PORT_17=41
m CMIC_LEDUP2_PORT_ORDER_REMAP_16_19 REMAP_PORT_18=42
m CMIC_LEDUP2_PORT_ORDER_REMAP_16_19 REMAP_PORT_19=40
m CMIC_LEDUP2_PORT_ORDER_REMAP_20_23 REMAP_PORT_20=35
m CMIC_LEDUP2_PORT_ORDER_REMAP_20_23 REMAP_PORT_21=33
m CMIC_LEDUP2_PORT_ORDER_REMAP_20_23 REMAP_PORT_22=34
m CMIC_LEDUP2_PORT_ORDER_REMAP_20_23 REMAP_PORT_23=32
m CMIC_LEDUP2_PORT_ORDER_REMAP_24_27 REMAP_PORT_24=47
m CMIC_LEDUP2_PORT_ORDER_REMAP_24_27 REMAP_PORT_25=45
m CMIC_LEDUP2_PORT_ORDER_REMAP_24_27 REMAP_PORT_26=46
m CMIC_LEDUP2_PORT_ORDER_REMAP_24_27 REMAP_PORT_27=44
m CMIC_LEDUP2_PORT_ORDER_REMAP_28_31 REMAP_PORT_28=39
m CMIC_LEDUP2_PORT_ORDER_REMAP_28_31 REMAP_PORT_29=37
m CMIC_LEDUP2_PORT_ORDER_REMAP_28_31 REMAP_PORT_30=38
m CMIC_LEDUP2_PORT_ORDER_REMAP_28_31 REMAP_PORT_31=36
m CMIC_LEDUP2_PORT_ORDER_REMAP_32_35 REMAP_PORT_32=27
m CMIC_LEDUP2_PORT_ORDER_REMAP_32_35 REMAP_PORT_33=25
m CMIC_LEDUP2_PORT_ORDER_REMAP_32_35 REMAP_PORT_34=26
m CMIC_LEDUP2_PORT_ORDER_REMAP_32_35 REMAP_PORT_35=24
m CMIC_LEDUP2_PORT_ORDER_REMAP_36_39 REMAP_PORT_36=19
m CMIC_LEDUP2_PORT_ORDER_REMAP_36_39 REMAP_PORT_37=17
m CMIC_LEDUP2_PORT_ORDER_REMAP_36_39 REMAP_PORT_38=18
m CMIC_LEDUP2_PORT_ORDER_REMAP_36_39 REMAP_PORT_39=16
m CMIC_LEDUP2_PORT_ORDER_REMAP_40_43 REMAP_PORT_40=31
m CMIC_LEDUP2_PORT_ORDER_REMAP_40_43 REMAP_PORT_41=29
m CMIC_LEDUP2_PORT_ORDER_REMAP_40_43 REMAP_PORT_42=30
m CMIC_LEDUP2_PORT_ORDER_REMAP_40_43 REMAP_PORT_43=28
m CMIC_LEDUP2_PORT_ORDER_REMAP_44_47 REMAP_PORT_44=23
m CMIC_LEDUP2_PORT_ORDER_REMAP_44_47 REMAP_PORT_45=21
m CMIC_LEDUP2_PORT_ORDER_REMAP_44_47 REMAP_PORT_46=22
m CMIC_LEDUP2_PORT_ORDER_REMAP_44_47 REMAP_PORT_47=20
m CMIC_LEDUP2_PORT_ORDER_REMAP_48_51 REMAP_PORT_48=11
m CMIC_LEDUP2_PORT_ORDER_REMAP_48_51 REMAP_PORT_49=9
m CMIC_LEDUP2_PORT_ORDER_REMAP_48_51 REMAP_PORT_50=10
m CMIC_LEDUP2_PORT_ORDER_REMAP_48_51 REMAP_PORT_51=8
m CMIC_LEDUP2_PORT_ORDER_REMAP_52_55 REMAP_PORT_52=3
m CMIC_LEDUP2_PORT_ORDER_REMAP_52_55 REMAP_PORT_53=1
m CMIC_LEDUP2_PORT_ORDER_REMAP_52_55 REMAP_PORT_54=2
m CMIC_LEDUP2_PORT_ORDER_REMAP_52_55 REMAP_PORT_55=0
m CMIC_LEDUP2_PORT_ORDER_REMAP_56_59 REMAP_PORT_56=15
m CMIC_LEDUP2_PORT_ORDER_REMAP_56_59 REMAP_PORT_57=13
m CMIC_LEDUP2_PORT_ORDER_REMAP_56_59 REMAP_PORT_58=14
m CMIC_LEDUP2_PORT_ORDER_REMAP_56_59 REMAP_PORT_59=12
m CMIC_LEDUP2_PORT_ORDER_REMAP_60_63 REMAP_PORT_60=7
m CMIC_LEDUP2_PORT_ORDER_REMAP_60_63 REMAP_PORT_61=5
m CMIC_LEDUP2_PORT_ORDER_REMAP_60_63 REMAP_PORT_62=6
m CMIC_LEDUP2_PORT_ORDER_REMAP_60_63 REMAP_PORT_63=4
led 2 start
led 3 stop
led 3 prog 02 00 60 F1 12 00 DA 0F 70 10 67 72 67 6D 77 06 02 A0 60 F0 02 00 60 F2 12 00 02 00 60 F4 06 F0 4A 01 71 41 4A 03 27 67 6D 4A 02 27 67 6D 06 F2 28 32 08 67 6D 06 F2 28 32 00 32 01 B7 67 6D 77 4D 67 75 67 6D 67 75 67 6D 67 72 67 6D DA A0 70 5F 86 F0 86 F2 86 F4 06 F4 D2 04 74 2E 77 1A 12 00 DA 00 70 6B 67 75 67 6D 77 61 3E F1 87 86 F1 81 57 17 27 57 07 27 57
m CMIC_LEDUP3_PORT_ORDER_REMAP_0_3 REMAP_PORT_0=7
m CMIC_LEDUP3_PORT_ORDER_REMAP_0_3 REMAP_PORT_1=5
m CMIC_LEDUP3_PORT_ORDER_REMAP_0_3 REMAP_PORT_2=6
m CMIC_LEDUP3_PORT_ORDER_REMAP_0_3 REMAP_PORT_3=4
m CMIC_LEDUP3_PORT_ORDER_REMAP_4_7 REMAP_PORT_4=15
m CMIC_LEDUP3_PORT_ORDER_REMAP_4_7 REMAP_PORT_5=13
m CMIC_LEDUP3_PORT_ORDER_REMAP_4_7 REMAP_PORT_6=14
m CMIC_LEDUP3_PORT_ORDER_REMAP_4_7 REMAP_PORT_7=12
m CMIC_LEDUP3_PORT_ORDER_REMAP_8_11 REMAP_PORT_8=3
m CMIC_LEDUP3_PORT_ORDER_REMAP_8_11 REMAP_PORT_9=1
m CMIC_LEDUP3_PORT_ORDER_REMAP_8_11 REMAP_PORT_10=2
m CMIC_LEDUP3_PORT_ORDER_REMAP_8_11 REMAP_PORT_11=0
m CMIC_LEDUP3_PORT_ORDER_REMAP_12_15 REMAP_PORT_12=11
m CMIC_LEDUP3_PORT_ORDER_REMAP_12_15 REMAP_PORT_13=9
m CMIC_LEDUP3_PORT_ORDER_REMAP_12_15 REMAP_PORT_14=10
m CMIC_LEDUP3_PORT_ORDER_REMAP_12_15 REMAP_PORT_15=8
m CMIC_LEDUP3_PORT_ORDER_REMAP_16_19 REMAP_PORT_16=23
m CMIC_LEDUP3_PORT_ORDER_REMAP_16_19 REMAP_PORT_17=21
m CMIC_LEDUP3_PORT_ORDER_REMAP_16_19 REMAP_PORT_18=22
m CMIC_LEDUP3_PORT_ORDER_REMAP_16_19 REMAP_PORT_19=20
m CMIC_LEDUP3_PORT_ORDER_REMAP_20_23 REMAP_PORT_20=31
m CMIC_LEDUP3_PORT_ORDER_REMAP_20_23 REMAP_PORT_21=29
m CMIC_LEDUP3_PORT_ORDER_REMAP_20_23 REMAP_PORT_22=30
m CMIC_LEDUP3_PORT_ORDER_REMAP_20_23 REMAP_PORT_23=28
m CMIC_LEDUP3_PORT_ORDER_REMAP_24_27 REMAP_PORT_24=19
m CMIC_LEDUP3_PORT_ORDER_REMAP_24_27 REMAP_PORT_25=17
m CMIC_LEDUP3_PORT_ORDER_REMAP_24_27 REMAP_PORT_26=18
m CMIC_LEDUP3_PORT_ORDER_REMAP_24_27 REMAP_PORT_27=16
m CMIC_LEDUP3_PORT_ORDER_REMAP_28_31 REMAP_PORT_28=27
m CMIC_LEDUP3_PORT_ORDER_REMAP_28_31 REMAP_PORT_29=25
m CMIC_LEDUP3_PORT_ORDER_REMAP_28_31 REMAP_PORT_30=26
m CMIC_LEDUP3_PORT_ORDER_REMAP_28_31 REMAP_PORT_31=24
m CMIC_LEDUP3_PORT_ORDER_REMAP_32_35 REMAP_PORT_32=39
m CMIC_LEDUP3_PORT_ORDER_REMAP_32_35 REMAP_PORT_33=37
m CMIC_LEDUP3_PORT_ORDER_REMAP_32_35 REMAP_PORT_34=38
m CMIC_LEDUP3_PORT_ORDER_REMAP_32_35 REMAP_PORT_35=36
m CMIC_LEDUP3_PORT_ORDER_REMAP_36_39 REMAP_PORT_36=47
m CMIC_LEDUP3_PORT_ORDER_REMAP_36_39 REMAP_PORT_37=45
m CMIC_LEDUP3_PORT_ORDER_REMAP_36_39 REMAP_PORT_38=46
m CMIC_LEDUP3_PORT_ORDER_REMAP_36_39 REMAP_PORT_39=44
m CMIC_LEDUP3_PORT_ORDER_REMAP_40_43 REMAP_PORT_40=35
m CMIC_LEDUP3_PORT_ORDER_REMAP_40_43 REMAP_PORT_41=33
m CMIC_LEDUP3_PORT_ORDER_REMAP_40_43 REMAP_PORT_42=34
m CMIC_LEDUP3_PORT_ORDER_REMAP_40_43 REMAP_PORT_43=32
m CMIC_LEDUP3_PORT_ORDER_REMAP_44_47 REMAP_PORT_44=43
m CMIC_LEDUP3_PORT_ORDER_REMAP_44_47 REMAP_PORT_45=41
m CMIC_LEDUP3_PORT_ORDER_REMAP_44_47 REMAP_PORT_46=42
m CMIC_LEDUP3_PORT_ORDER_REMAP_44_47 REMAP_PORT_47=40
m CMIC_LEDUP3_PORT_ORDER_REMAP_48_51 REMAP_PORT_48=55
m CMIC_LEDUP3_PORT_ORDER_REMAP_48_51 REMAP_PORT_49=53
m CMIC_LEDUP3_PORT_ORDER_REMAP_48_51 REMAP_PORT_50=54
m CMIC_LEDUP3_PORT_ORDER_REMAP_48_51 REMAP_PORT_51=52
m CMIC_LEDUP3_PORT_ORDER_REMAP_52_55 REMAP_PORT_52=63
m CMIC_LEDUP3_PORT_ORDER_REMAP_52_55 REMAP_PORT_53=61
m CMIC_LEDUP3_PORT_ORDER_REMAP_52_55 REMAP_PORT_54=62
m CMIC_LEDUP3_PORT_ORDER_REMAP_52_55 REMAP_PORT_55=60
m CMIC_LEDUP3_PORT_ORDER_REMAP_56_59 REMAP_PORT_56=51
m CMIC_LEDUP3_PORT_ORDER_REMAP_56_59 REMAP_PORT_57=49
m CMIC_LEDUP3_PORT_ORDER_REMAP_56_59 REMAP_PORT_58=50
m CMIC_LEDUP3_PORT_ORDER_REMAP_56_59 REMAP_PORT_59=48
m CMIC_LEDUP3_PORT_ORDER_REMAP_60_63 REMAP_PORT_60=59
m CMIC_LEDUP3_PORT_ORDER_REMAP_60_63 REMAP_PORT_61=57
m CMIC_LEDUP3_PORT_ORDER_REMAP_60_63 REMAP_PORT_62=58
m CMIC_LEDUP3_PORT_ORDER_REMAP_60_63 REMAP_PORT_63=56
led 3 start

144
device/inventec/x86_64-inventec_d7264q28b-r0/minigraph.xml Normal file
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@ -0,0 +1,144 @@
<DeviceMiniGraph xmlns="Microsoft.Search.Autopilot.Evolution" xmlns:i="http://www.w3.org/2001/XMLSchema-instance">
<CpgDec>
<IsisRouters xmlns:a="http://schemas.datacontract.org/2004/07/Microsoft.Search.Autopilot.Evolution"/>
<PeeringSessions>
<BGPSession>
<StartRouter>OCPSCH0104001MS</StartRouter>
<StartPeer>10.10.1.26</StartPeer>
<EndRouter>SONiC-Inventec-d7264</EndRouter>
<EndPeer>10.10.1.25</EndPeer>
<Multihop>1</Multihop>
<HoldTime>10</HoldTime>
<KeepAliveTime>3</KeepAliveTime>
</BGPSession>
<BGPSession>
<StartRouter>OCPSCH0104002MS</StartRouter>
<StartPeer>10.10.2.26</StartPeer>
<EndRouter>SONiC-Inventec-d7264</EndRouter>
<EndPeer>10.10.2.25</EndPeer>
<Multihop>1</Multihop>
<HoldTime>10</HoldTime>
<KeepAliveTime>3</KeepAliveTime>
</BGPSession>
</PeeringSessions>
<Routers xmlns:a="http://schemas.datacontract.org/2004/07/Microsoft.Search.Autopilot.Evolution">
<a:BGPRouterDeclaration>
<a:ASN>64536</a:ASN>
<a:Hostname>SONiC-Inventec-d7264</a:Hostname>
<a:Peers>
<BGPPeer>
<Address>10.10.1.26</Address>
<RouteMapIn i:nil="true"/>
<RouteMapOut i:nil="true"/>
</BGPPeer>
<BGPPeer>
<Address>10.10.2.26</Address>
<RouteMapIn i:nil="true"/>
<RouteMapOut i:nil="true"/>
</BGPPeer>
</a:Peers>
<a:RouteMaps/>
</a:BGPRouterDeclaration>
<a:BGPRouterDeclaration>
<a:ASN>64542</a:ASN>
<a:Hostname>OCPSCH0104001MS</a:Hostname>
<a:RouteMaps/>
</a:BGPRouterDeclaration>
<a:BGPRouterDeclaration>
<a:ASN>64543</a:ASN>
<a:Hostname>OCPSCH0104002MS</a:Hostname>
<a:RouteMaps/>
</a:BGPRouterDeclaration>
</Routers>
</CpgDec>
<DpgDec>
<DeviceDataPlaneInfo>
<IPSecTunnels/>
<LoopbackIPInterfaces xmlns:a="http://schemas.datacontract.org/2004/07/Microsoft.Search.Autopilot.Evolution">
<a:LoopbackIPInterface>
<Name>HostIP</Name>
<AttachTo>Loopback0</AttachTo>
<a:Prefix xmlns:b="Microsoft.Search.Autopilot.NetMux">
<b:IPPrefix>100.0.0.9/32</b:IPPrefix>
</a:Prefix>
<a:PrefixStr>100.0.0.9/32</a:PrefixStr>
</a:LoopbackIPInterface>
</LoopbackIPInterfaces>
<ManagementIPInterfaces xmlns:a="http://schemas.datacontract.org/2004/07/Microsoft.Search.Autopilot.Evolution">
</ManagementIPInterfaces>
<MplsInterfaces/>
<MplsTeInterfaces/>
<RsvpInterfaces/>
<Hostname>SONiC-Inventec-d7264</Hostname>
<PortChannelInterfaces/>
<VlanInterfaces/>
<IPInterfaces>
<IPInterface>
<Name i:nil="true"/>
<AttachTo>Ethernet0</AttachTo>
<Prefix>10.10.1.25/30</Prefix>
</IPInterface>
<IPInterface>
<Name i:nil="true"/>
<AttachTo>Ethernet4</AttachTo>
<Prefix>10.10.2.25/30</Prefix>
</IPInterface>
</IPInterfaces>
<DataAcls/>
<AclInterfaces/>
<DownstreamSummaries/>
<DownstreamSummarySet xmlns:a="http://schemas.datacontract.org/2004/07/Microsoft.Search.Autopilot.Evolution"/>
</DeviceDataPlaneInfo>
</DpgDec>
<PngDec>
<DeviceInterfaceLinks>
<DeviceLinkBase i:type="DeviceInterfaceLink">
<ElementType>DeviceInterfaceLink</ElementType>
<EndDevice>OCPSCH0104001MS</EndDevice>
<EndPort>Ethernet24</EndPort>
<StartDevice>SONiC-Inventec-d7264</StartDevice>
<StartPort>Ethernet0</StartPort>
</DeviceLinkBase>
<DeviceLinkBase i:type="DeviceInterfaceLink">
<ElementType>DeviceInterfaceLink</ElementType>
<EndDevice>OCPSCH0104002MS</EndDevice>
<EndPort>Ethernet24</EndPort>
<StartDevice>SONiC-Inventec-d7264</StartDevice>
<StartPort>Ethernet4</StartPort>
</DeviceLinkBase>
</DeviceInterfaceLinks>
<Devices>
<Device i:type="LeafRouter">
<Hostname>SONiC-Inventec-d7264</Hostname>
<HwSku>INVENTEC-D7264Q28B</HwSku>
</Device>
</Devices>
</PngDec>
<MetadataDeclaration>
<Devices xmlns:a="http://schemas.datacontract.org/2004/07/Microsoft.Search.Autopilot.Evolution">
<a:DeviceMetadata>
<a:Name>SONiC-Inventec-d7264</a:Name>
<a:Properties>
<a:DeviceProperty>
<a:Name>DhcpResources</a:Name>
<a:Reference i:nil="true"/>
<a:Value></a:Value>
</a:DeviceProperty>
<a:DeviceProperty>
<a:Name>NtpResources</a:Name>
<a:Reference i:nil="true"/>
<a:Value>0.debian.pool.ntp.org;1.debian.pool.ntp.org;2.debian.pool.ntp.org;3.debian.pool.ntp.org</a:Value>
</a:DeviceProperty>
<a:DeviceProperty>
<a:Name>SyslogResources</a:Name>
<a:Reference i:nil="true"/>
<a:Value></a:Value>
</a:DeviceProperty>
</a:Properties>
</a:DeviceMetadata>
</Devices>
<Properties xmlns:a="http://schemas.datacontract.org/2004/07/Microsoft.Search.Autopilot.Evolution"/>
</MetadataDeclaration>
<Hostname>SONiC-Inventec-d7264</Hostname>
<HwSku>INVENTEC-D7264Q28B</HwSku>
</DeviceMiniGraph>

22
device/inventec/x86_64-inventec_d7264q28b-r0/plugins/eeprom.py Normal file
View File

@ -0,0 +1,22 @@
#!/usr/bin/env python
#############################################################################
# Inventec d7032q28b
#
# Platform and model specific eeprom subclass, inherits from the base class,
# and provides the followings:
# - the eeprom format definition
# - specific encoder/decoder if there is special need
#############################################################################
try:
from sonic_eeprom import eeprom_tlvinfo
except ImportError, e:
raise ImportError (str(e) + "- required module not found")
class board(eeprom_tlvinfo.TlvInfoDecoder):
def __init__(self, name, path, cpld_root, ro):
self.eeprom_path = "/sys/class/i2c-adapter/i2c-0/0-0053/eeprom"
super(board, self).__init__(self.eeprom_path, 0, '', True)

93
device/inventec/x86_64-inventec_d7264q28b-r0/plugins/psuutil.py Executable file
View File

@ -0,0 +1,93 @@
#
# psuutil.py
# Platform-specific PSU status interface for SONiC
#
import os.path
try:
from sonic_psu.psu_base import PsuBase
except ImportError as e:
raise ImportError(str(e) + "- required module not found")
class PsuUtil(PsuBase):
"""Platform-specific PSUutil class"""
PSU_DIR1 = "/sys/class/hwmon/hwmon1/device"
PSU_DIR2 = "/sys/class/hwmon/hwmon3/device"
def __init__(self):
PsuBase.__init__(self)
# Get sysfs attribute
def get_attr_value(self, attr_path):
retval = 'ERR'
if (not os.path.isfile(attr_path)):
return retval
try:
with open(attr_path, 'r') as fd:
retval = fd.read()
except Exception as error:
logging.error("Unable to open ", attr_path, " file !")
retval = retval.rstrip(' \t\n\r')
return retval
def get_num_psus(self):
"""
Retrieves the number of PSUs available on the device
:return: An integer, the number of PSUs available on the device
"""
MAX_PSUS = 2
return MAX_PSUS
def get_psu_status(self, index):
"""
Retrieves the oprational status of power supply unit (PSU) defined
by index <index>
:param index: An integer, index of the PSU of which to query status
:return: Boolean, True if PSU is operating properly, False if PSU is\
faulty
"""
status = 0
attr_file = 'psoc_psu'+ str(index) + '_iout'
attr_path = self.PSU_DIR1 +'/' + attr_file
attr_value = self.get_attr_value(attr_path)
if (attr_value == 'ERR'):
attr_path = self.PSU_DIR2 +'/' + attr_file
attr_value = self.get_attr_value(attr_path)
# Check for PSU status
if (attr_value != 0):
status = 1
if (attr_value != 0):
status = 1
return status
def get_psu_presence(self, index):
"""
Retrieves the presence status of power supply unit (PSU) defined
by index <index>
:param index: An integer, index of the PSU of which to query status
:return: Boolean, True if PSU is plugged, False if not
"""
status = 0
psu_absent = 0
ind = index-1
attr_file ='psu'+ str(ind)
normal_attr_value = '0 : normal'
attr_path = self.PSU_DIR1 +'/' + attr_file
attr_value = self.get_attr_value(attr_path)
if (attr_value == 'ERR'):
attr_path = self.PSU_DIR2 +'/' + attr_file
attr_value = self.get_attr_value(attr_path)
# Check for PSU presence
if (attr_value == normal_attr_value):
status = 1
if (attr_value == normal_attr_value):
status = 1
return status

219
device/inventec/x86_64-inventec_d7264q28b-r0/plugins/sfputil.py Executable file
View File

@ -0,0 +1,219 @@
# sfputil.py
#
# Platform-specific SFP transceiver interface for SONiC
#
try:
import time
from sonic_sfp.sfputilbase import SfpUtilBase
except ImportError as e:
raise ImportError("%s - required module not found" % str(e))
class SfpUtil(SfpUtilBase):
"""Platform-specific SfpUtil class"""
PORT_START = 0
PORT_END = 63
PORTS_IN_BLOCK = 64
QSFP_PORT_START = 0
QSFP_PORT_END = 63
_port_to_eeprom_mapping = {}
port_to_i2c_mapping = {
0: 10,
1: 11,
2: 12,
3: 13,
4: 14,
5: 15,
6: 16,
7: 17,
8: 18,
9: 19,
10: 20,
11: 21,
12: 22,
13: 23,
14: 24,
15: 25,
16: 26,
17: 27,
18: 28,
19: 29,
20: 30,
21: 31,
22: 32,
23: 33,
24: 34,
25: 35,
26: 36,
27: 37,
28: 38,
29: 39,
30: 40,
31: 41,
32: 45,
33: 44,
34: 43,
35: 42,
36: 49,
37: 48,
38: 47,
39: 46,
40: 53,
41: 52,
42: 51,
43: 50,
44: 57,
45: 56,
46: 55,
47: 54,
48: 61,
49: 60,
50: 59,
51: 58,
52: 65,
53: 64,
54: 63,
55: 62,
56: 69,
57: 68,
58: 67,
59: 66,
60: 73,
61: 72,
62: 71,
63: 70
}
@property
def port_start(self):
return self.PORT_START
@property
def port_end(self):
return self.PORT_END
@property
def qsfp_port_start(self):
return self.QSFP_PORT_START
@property
def qsfp_port_end(self):
return self.QSFP_PORT_END
@property
def qsfp_ports(self):
return range(self.QSFP_PORT_START, self.PORTS_IN_BLOCK + 1)
@property
def port_to_eeprom_mapping(self):
return self._port_to_eeprom_mapping
def __init__(self):
eeprom_path = "/sys/bus/i2c/devices/{0}-0050/eeprom"
for x in range(0, self.port_end + 1):
port_eeprom_path = eeprom_path.format(self.port_to_i2c_mapping[x])
self.port_to_eeprom_mapping[x] = port_eeprom_path
SfpUtilBase.__init__(self)
def get_presence(self, port_num):
# Check for invalid port_num
if port_num < self.port_start or port_num > self.port_end:
return False
try:
reg_file = open("/sys/class/swps/port"+str(port_num)+"/present")
except IOError as e:
print "Error: unable to open file: %s" % str(e)
return False
reg_value = int(reg_file.readline().rstrip())
if reg_value == 0:
return True
return False
def get_low_power_mode(self, port_num):
# Check for invalid port_num
if port_num < self.port_start or port_num > self.port_end:
return False
if port_num < self.qsfp_port_start or port_num > self.qsfp_port_end:
return False
try:
reg_file = open("/sys/class/swps/port"+str(port_num)+"/lpmod")
except IOError as e:
print "Error: unable to open file: %s" % str(e)
reg_value = int(reg_file.readline().rstrip())
if reg_value == 0:
return False
return True
def set_low_power_mode(self, port_num, lpmode):
# Check for invalid port_num
if port_num < self.port_start or port_num > self.port_end:
return False
if port_num < self.qsfp_port_start or port_num > self.qsfp_port_end:
print "\nError:SFP's don't support this property"
return False
try:
reg_file = open("/sys/class/swps/port"+str(port_num)+"/lpmod", "r+")
except IOError as e:
print "Error: unable to open file: %s" % str(e)
return False
reg_value = int(reg_file.readline().rstrip())
# LPMode is active high; set or clear the bit accordingly
if lpmode is True:
reg_value = 1
else:
reg_value = 0
reg_file.write(hex(reg_value))
reg_file.close()
return True
def reset(self, port_num):
QSFP_RESET_REGISTER_DEVICE_FILE = "/sys/class/swps/port"+str(port_num)+"/reset"
# Check for invalid port_num
if port_num < self.port_start or port_num > self.port_end:
return False
if port_num < self.qsfp_port_start or port_num > self.qsfp_port_end:
print "\nError:SFP's don't support this property"
return False
try:
reg_file = open(QSFP_RESET_REGISTER_DEVICE_FILE, "r+")
except IOError as e:
print "Error: unable to open file: %s" % str(e)
return False
reg_value = 0
reg_file.write(hex(reg_value))
reg_file.close()
# Sleep 2 second to allow it to settle
time.sleep(2)
# Flip the value back write back to the register to take port out of reset
try:
reg_file = open(QSFP_RESET_REGISTER_DEVICE_FILE, "r+")
except IOError as e:
print "Error: unable to open file: %s" % str(e)
return False
reg_value = 1
reg_file.write(hex(reg_value))
reg_file.close()
return True

1
platform/broadcom/one-image.mk
View File

@ -22,6 +22,7 @@ $(SONIC_ONE_IMAGE)_LAZY_INSTALLS += $(DELL_S6000_PLATFORM_MODULE) \
$(ACCTON_AS7716_32XB_PLATFORM_MODULE) \
$(INVENTEC_D7032Q28B_PLATFORM_MODULE) \
$(INVENTEC_D7054Q28B_PLATFORM_MODULE) \
$(INVENTEC_D7264Q28B_PLATFORM_MODULE) \
$(CEL_DX010_PLATFORM_MODULE) \
$(CEL_HALIBURTON_PLATFORM_MODULE) \
$(DELTA_AG9032V1_PLATFORM_MODULE) \

10
platform/broadcom/platform-modules-inventec.mk
View File

@ -1,10 +1,12 @@
# Inventec d7032q28b and d7054q28b Platform modules
# Inventec d7032q28b , d7054q28b and d7264q28b Platform modules
INVENTEC_D7032Q28B_PLATFORM_MODULE_VERSION = 1.1.0
INVENTEC_D7054Q28B_PLATFORM_MODULE_VERSION = 1.1.0
INVENTEC_D7264Q28B_PLATFORM_MODULE_VERSION = 1.1.0
export INVENTEC_D7032Q28B_PLATFORM_MODULE_VERSION
export INVENTEC_D7054Q28B_PLATFORM_MODULE_VERSION
export INVENTEC_D7264Q28B_PLATFORM_MODULE_VERSION
INVENTEC_D7032Q28B_PLATFORM_MODULE = platform-modules-d7032q28b_$(INVENTEC_D7032Q28B_PLATFORM_MODULE_VERSION)_amd64.deb
$(INVENTEC_D7032Q28B_PLATFORM_MODULE)_SRC_PATH = $(PLATFORM_PATH)/sonic-platform-modules-inventec
@ -16,4 +18,8 @@ INVENTEC_D7054Q28B_PLATFORM_MODULE = platform-modules-d7054q28b_$(INVENTEC_D7054
$(INVENTEC_D7054Q28B_PLATFORM_MODULE)_PLATFORM = x86_64-inventec_d7054q28b-r0
$(eval $(call add_extra_package,$(INVENTEC_D7032Q28B_PLATFORM_MODULE),$(INVENTEC_D7054Q28B_PLATFORM_MODULE)))
SONIC_STRETCH_DEBS += $(INVENTEC_D7032Q28B_PLATFORM_MODULE)
INVENTEC_D7264Q28B_PLATFORM_MODULE = platform-modules-d7264q28b_$(INVENTEC_D7264Q28B_PLATFORM_MODULE_VERSION)_amd64.deb
$(INVENTEC_D7264Q28B_PLATFORM_MODULE)_PLATFORM = x86_64-inventec_d7264q28b-r0
$(eval $(call add_extra_package,$(INVENTEC_D7032Q28B_PLATFORM_MODULE),$(INVENTEC_D7264Q28B_PLATFORM_MODULE)))
SONIC_STRETCH_DEBS += $(INVENTEC_D7032Q28B_PLATFORM_MODULE)

6
platform/broadcom/sonic-platform-modules-inventec/d7264q28b/modules/Makefile Executable file
View File

@ -0,0 +1,6 @@
obj-m += inv_cpld.o inv_psoc.o
obj-m += inv_platform.o
obj-m += inv_eeprom.o
obj-m += swps.o
swps-objs := inv_swps.o io_expander.o transceiver.o

470
platform/broadcom/sonic-platform-modules-inventec/d7264q28b/modules/inv_cpld.c Normal file
View File

@ -0,0 +1,470 @@
/*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*/
#include <linux/module.h>
#include <linux/init.h>
#include <linux/slab.h>
#include <linux/jiffies.h>
#include <linux/i2c.h>
#include <linux/hwmon.h>
#include <linux/hwmon-sysfs.h>
#include <linux/err.h>
#include <linux/mutex.h>
//#include "I2CHostCommunication.h"
#define USE_SMBUS 1
/* definition */
#define CPLD_INFO_OFFSET 0x00
#define CPLD_PSU_OFFSET 0x08
#define CPLD_LED_OFFSET 0x0E
#define CPLD_LED_STATU_OFFSET 0x0D
#define CPLD_CTL_OFFSET 0x0C
#define CPLD_BIOSCS_OFFSET 0x04
/* Each client has this additional data */
struct cpld_data {
struct device *hwmon_dev;
struct mutex update_lock;
};
/*-----------------------------------------------------------------------*/
static ssize_t cpld_i2c_read(struct i2c_client *client, u8 *buf, u8 offset, size_t count)
{
#if USE_SMBUS
int i;
for(i=0; i<count; i++) {
buf[i] = i2c_smbus_read_byte_data(client, offset+i);
}
return count;
#else
struct i2c_msg msg[2];
char msgbuf[2];
int status;
memset(msg, 0, sizeof(msg));
msgbuf[0] = offset;
msg[0].addr = client->addr;
msg[0].buf = msgbuf;
msg[0].len = 1;
msg[1].addr = client->addr;
msg[1].flags = I2C_M_RD;
msg[1].buf = buf;
msg[1].len = count;
status = i2c_transfer(client->adapter, msg, 2);
if(status == 2)
status = count;
return status;
#endif
}
static ssize_t cpld_i2c_write(struct i2c_client *client, char *buf, unsigned offset, size_t count)
{
#if USE_SMBUS
int i;
for(i=0; i<count; i++) {
i2c_smbus_write_byte_data(client, offset+i, buf[i]);
}
return count;
#else
struct i2c_msg msg;
int status;
u8 writebuf[64];
int i = 0;
msg.addr = client->addr;
msg.flags = 0;
/* msg.buf is u8 and casts will mask the values */
msg.buf = writebuf;
msg.buf[i++] = offset;
memcpy(&msg.buf[i], buf, count);
msg.len = i + count;
status = i2c_transfer(client->adapter, &msg, 1);
if (status == 1)
status = count;
return status;
#endif
}
/*-----------------------------------------------------------------------*/
/* sysfs attributes for hwmon */
static ssize_t show_info(struct device *dev, struct device_attribute *da,
char *buf)
{
u32 status;
//struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
struct i2c_client *client = to_i2c_client(dev);
struct cpld_data *data = i2c_get_clientdata(client);
u8 b[4];
memset(b, 0, 4);
mutex_lock(&data->update_lock);
status = cpld_i2c_read(client, b, CPLD_INFO_OFFSET, 4);
mutex_unlock(&data->update_lock);
if(status != 4) return sprintf(buf, "read cpld info fail\n");
status = sprintf (buf, "The CPLD release date is %02d/%02d/%d.\n", b[2] & 0xf, (b[3] & 0x1f), 2014+(b[2] >> 4)); /* mm/dd/yyyy*/
status = sprintf (buf, "%sThe PCB version is %X%X\n", buf, b[0]>>4, b[0]&0xf);
status = sprintf (buf, "%sThe CPLD version is %d.%d\n", buf, b[1]>>4, b[1]&0xf);
return strlen(buf);
}
static ssize_t show_ctl(struct device *dev, struct device_attribute *da,
char *buf)
{
u32 status;
//struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
struct i2c_client *client = to_i2c_client(dev);
struct cpld_data *data = i2c_get_clientdata(client);
u8 b[1];
mutex_lock(&data->update_lock);
status = cpld_i2c_read(client, b, CPLD_CTL_OFFSET, 1);
mutex_unlock(&data->update_lock);
if(status != 1) return sprintf(buf, "read cpld ctl fail\n");
status = sprintf (buf, "0x%X\n", b[0]);
return strlen(buf);
}
static ssize_t set_ctl(struct device *dev,
struct device_attribute *devattr,
const char *buf, size_t count)
{
//struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
struct i2c_client *client = to_i2c_client(dev);
struct cpld_data *data = i2c_get_clientdata(client);
u8 byte;
u8 temp = simple_strtol(buf, NULL, 10);
mutex_lock(&data->update_lock);
cpld_i2c_read(client, &byte, CPLD_CTL_OFFSET, 1);
if(temp) byte |= (1<<0);
else byte &= ~(1<<0);
cpld_i2c_write(client, &byte, CPLD_CTL_OFFSET, 1);
mutex_unlock(&data->update_lock);
return count;
}
static ssize_t show_bios_cs(struct device *dev, struct device_attribute *da,
char *buf)
{
u32 status;
//struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
struct i2c_client *client = to_i2c_client(dev);
struct cpld_data *data = i2c_get_clientdata(client);
u8 b[1];
mutex_lock(&data->update_lock);
status = cpld_i2c_read(client, b, CPLD_BIOSCS_OFFSET, 1);
mutex_unlock(&data->update_lock);
if(status != 1) return sprintf(buf, "read cpld BIOS_CS fail\n");
status = sprintf (buf, "0x%X\n", b[0] & 0x01);
return strlen(buf);
}
static ssize_t set_bios_cs(struct device *dev,
struct device_attribute *devattr,
const char *buf, size_t count)
{
//struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
struct i2c_client *client = to_i2c_client(dev);
struct cpld_data *data = i2c_get_clientdata(client);
u8 byte;
u8 temp = simple_strtol(buf, NULL, 10);
mutex_lock(&data->update_lock);
cpld_i2c_read(client, &byte, CPLD_BIOSCS_OFFSET, 1);
if(temp) byte |= 0x01;
else byte &= ~(0x01);
cpld_i2c_write(client, &byte, CPLD_BIOSCS_OFFSET, 1);
mutex_unlock(&data->update_lock);
return count;
}
static char* led_str[] = {
"OFF", //000
"0.5 Hz", //001
"1 Hz", //010
"2 Hz", //011
"4 Hz", //100
"NA", //101
"NA", //110
"ON", //111
};
static ssize_t show_led(struct device *dev, struct device_attribute *da,
char *buf)
{
u32 status;
struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
struct i2c_client *client = to_i2c_client(dev);
struct cpld_data *data = i2c_get_clientdata(client);
u8 byte;
int shift = (attr->index == 0)?3:0;
mutex_lock(&data->update_lock);
status = cpld_i2c_read(client, &byte, CPLD_LED_OFFSET, 1);
mutex_unlock(&data->update_lock);
if(status != 1) return sprintf(buf, "read cpld offset 0x%x\n", CPLD_LED_OFFSET);
byte = (byte >> shift) & 0x7;
status = sprintf (buf, "%d: %s\n", byte, led_str[byte]);
return strlen(buf);
}
static ssize_t set_led(struct device *dev,
struct device_attribute *devattr,
const char *buf, size_t count)
{
struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
struct i2c_client *client = to_i2c_client(dev);
struct cpld_data *data = i2c_get_clientdata(client);
u8 temp = simple_strtol(buf, NULL, 16);
u8 byte;
int shift = (attr->index == 0)?3:0;
temp &= 0x7;
//validate temp value: 0,1,2,3,7, TBD
mutex_lock(&data->update_lock);
cpld_i2c_read(client, &byte, CPLD_LED_OFFSET, 1);
byte &= ~(0x7<<shift);
byte |= (temp<<shift);
cpld_i2c_write(client, &byte, CPLD_LED_OFFSET, 1);
mutex_unlock(&data->update_lock);
return count;
}
/*
CPLD report the PSU0 status
000 = PSU normal operation
100 = PSU fault
010 = PSU unpowered
111 = PSU not installed
7 6 | 5 4 3 | 2 1 0
----------------------
| psu0 | psu1
*/
static char* psu_str[] = {
"normal", //000
"NA", //001
"unpowered", //010
"NA", //011
"fault", //100
"NA", //101
"NA", //110
"not installed", //111
};
static ssize_t show_psu(struct device *dev, struct device_attribute *da,
char *buf)
{
u32 status;
struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
struct i2c_client *client = to_i2c_client(dev);
struct cpld_data *data = i2c_get_clientdata(client);
u8 byte;
int shift = (attr->index == 1)?0:3;
mutex_lock(&data->update_lock);
status = cpld_i2c_read(client, &byte, CPLD_PSU_OFFSET, 1);
mutex_unlock(&data->update_lock);
byte = (byte >> shift) & 0x7;
status = sprintf (buf, "%d : %s\n", byte, psu_str[byte]);
return strlen(buf);
}
static SENSOR_DEVICE_ATTR(info, S_IRUGO, show_info, 0, 0);
static SENSOR_DEVICE_ATTR(ctl, S_IWUSR|S_IRUGO, show_ctl, set_ctl, 0);
static SENSOR_DEVICE_ATTR(grn_led, S_IWUSR|S_IRUGO, show_led, set_led, 0);
static SENSOR_DEVICE_ATTR(red_led, S_IWUSR|S_IRUGO, show_led, set_led, 1);
static SENSOR_DEVICE_ATTR(psu0, S_IRUGO, show_psu, 0, 0);
static SENSOR_DEVICE_ATTR(psu1, S_IRUGO, show_psu, 0, 1);
static SENSOR_DEVICE_ATTR(bios_cs, S_IWUSR|S_IRUGO, show_bios_cs, set_bios_cs, 0);
static struct attribute *cpld_attributes[] = {
//info
&sensor_dev_attr_info.dev_attr.attr,
&sensor_dev_attr_ctl.dev_attr.attr,
&sensor_dev_attr_grn_led.dev_attr.attr,
&sensor_dev_attr_red_led.dev_attr.attr,
&sensor_dev_attr_psu0.dev_attr.attr,
&sensor_dev_attr_psu1.dev_attr.attr,
&sensor_dev_attr_bios_cs.dev_attr.attr,
NULL
};
static const struct attribute_group cpld_group = {
.attrs = cpld_attributes,
};
static struct attribute *cpld2_attributes[] = {
//info
&sensor_dev_attr_info.dev_attr.attr,
NULL
};
static const struct attribute_group cpld2_group = {
.attrs = cpld2_attributes,
};
/*-----------------------------------------------------------------------*/
/* device probe and removal */
static int
cpld_probe(struct i2c_client *client, const struct i2c_device_id *id)
{
struct cpld_data *data;
int status;
// printk("+%s \n", __func__);
if (!i2c_check_functionality(client->adapter,
I2C_FUNC_SMBUS_BYTE_DATA | I2C_FUNC_SMBUS_WORD_DATA))
return -EIO;
data = kzalloc(sizeof(struct cpld_data), GFP_KERNEL);
if (!data)
return -ENOMEM;
i2c_set_clientdata(client, data);
mutex_init(&data->update_lock);
/* Register sysfs hooks */
if(id->driver_data==1) // CPLD2
status = sysfs_create_group(&client->dev.kobj, &cpld2_group);
else // default CPLD1
status = sysfs_create_group(&client->dev.kobj, &cpld_group);
if (status)
goto exit_free;
data->hwmon_dev = hwmon_device_register(&client->dev);
if (IS_ERR(data->hwmon_dev)) {
status = PTR_ERR(data->hwmon_dev);
goto exit_remove;
}
dev_info(&client->dev, "%s: sensor '%s'\n",
dev_name(data->hwmon_dev), client->name);
return 0;
exit_remove:
sysfs_remove_group(&client->dev.kobj, &cpld_group);
exit_free:
i2c_set_clientdata(client, NULL);
kfree(data);
return status;
}
static int cpld_remove(struct i2c_client *client)
{
struct cpld_data *data = i2c_get_clientdata(client);
hwmon_device_unregister(data->hwmon_dev);
sysfs_remove_group(&client->dev.kobj, &cpld_group);
i2c_set_clientdata(client, NULL);
kfree(data);
return 0;
}
static const struct i2c_device_id cpld_ids[] = {
{ "inv_cpld" , 0, },
{ "inv_cpld2", 1, },
{ /* LIST END */ }
};
MODULE_DEVICE_TABLE(i2c, cpld_ids);
static struct i2c_driver cpld_driver = {
.class = I2C_CLASS_HWMON,
.driver = {
.name = "inv_cpld",
},
.probe = cpld_probe,
.remove = cpld_remove,
.id_table = cpld_ids,
};
/*-----------------------------------------------------------------------*/
/* module glue */
static int __init inv_cpld_init(void)
{
return i2c_add_driver(&cpld_driver);
}
static void __exit inv_cpld_exit(void)
{
i2c_del_driver(&cpld_driver);
}
MODULE_AUTHOR("eddie.lan <eddie.lan@inventec>");
MODULE_DESCRIPTION("inv cpld driver");
MODULE_LICENSE("GPL");
module_init(inv_cpld_init);
module_exit(inv_cpld_exit);

181
platform/broadcom/sonic-platform-modules-inventec/d7264q28b/modules/inv_eeprom.c Normal file
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/*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/slab.h>
#include <linux/delay.h>
#include <linux/jiffies.h>
#include <linux/i2c.h>
#include <linux/mutex.h>
/* Size of EEPROM in bytes */
#define EEPROM_SIZE 256
#define SLICE_BITS (6)
#define SLICE_SIZE (1 << SLICE_BITS)
#define SLICE_NUM (EEPROM_SIZE/SLICE_SIZE)
/* Each client has this additional data */
struct eeprom_data {
struct mutex update_lock;
u8 valid; /* bitfield, bit!=0 if slice is valid */
unsigned long last_updated[SLICE_NUM]; /* In jiffies, 8 slices */
u8 data[EEPROM_SIZE]; /* Register values */
};
static void inv_eeprom_update_client(struct i2c_client *client, u8 slice)
{
struct eeprom_data *data = i2c_get_clientdata(client);
int i, j;
int ret;
int addr;
mutex_lock(&data->update_lock);
if (!(data->valid & (1 << slice)) ||
time_after(jiffies, data->last_updated[slice] + 300 * HZ)) {
dev_dbg(&client->dev, "Starting eeprom update, slice %u\n", slice);
addr = slice << SLICE_BITS;
ret = i2c_smbus_write_byte_data(client, ((u8)addr >> 8) & 0xFF, (u8)addr & 0xFF);
/* select the eeprom address */
if (ret < 0) {
dev_err(&client->dev, "address set failed\n");
goto exit;
}
if (!i2c_check_functionality(client->adapter, I2C_FUNC_SMBUS_READ_BYTE)) {
goto exit;
}
for (i = slice << SLICE_BITS; i < (slice + 1) << SLICE_BITS; i+= SLICE_SIZE) {
for (j = i; j < (i+SLICE_SIZE); j++) {
int res;
res = i2c_smbus_read_byte(client);
if (res < 0) {
goto exit;
}
data->data[j] = res & 0xFF;
}
}
data->last_updated[slice] = jiffies;
data->valid |= (1 << slice);
}
exit:
mutex_unlock(&data->update_lock);
}
static ssize_t inv_eeprom_read(struct file *filp, struct kobject *kobj,
struct bin_attribute *bin_attr,
char *buf, loff_t off, size_t count)
{
struct i2c_client *client = to_i2c_client(container_of(kobj, struct device, kobj));
struct eeprom_data *data = i2c_get_clientdata(client);
u8 slice;
if (off > EEPROM_SIZE) {
return 0;
}
if (off + count > EEPROM_SIZE) {
count = EEPROM_SIZE - off;
}
if (count == 0) {
return 0;
}
/* Only refresh slices which contain requested bytes */
for (slice = off >> SLICE_BITS; slice <= (off + count - 1) >> SLICE_BITS; slice++) {
inv_eeprom_update_client(client, slice);
}
memcpy(buf, &data->data[off], count);
return count;
}
static struct bin_attribute inv_eeprom_attr = {
.attr = {
.name = "eeprom",
.mode = S_IRUGO,
},
.size = EEPROM_SIZE,
.read = inv_eeprom_read,
};
static int inv_eeprom_probe(struct i2c_client *client,
const struct i2c_device_id *id)
{
struct eeprom_data *data;
int err;
if (!(data = kzalloc(sizeof(struct eeprom_data), GFP_KERNEL))) {
err = -ENOMEM;
goto exit;
}
memset(data->data, 0xff, EEPROM_SIZE);
i2c_set_clientdata(client, data);
mutex_init(&data->update_lock);
/* create the sysfs eeprom file */
err = sysfs_create_bin_file(&client->dev.kobj, &inv_eeprom_attr);
if (err) {
goto exit_kfree;
}
return 0;
exit_kfree:
kfree(data);
exit:
return err;
}
static int inv_eeprom_remove(struct i2c_client *client)
{
sysfs_remove_bin_file(&client->dev.kobj, &inv_eeprom_attr);
kfree(i2c_get_clientdata(client));
return 0;
}
static const struct i2c_device_id inv_eeprom_id[] = {
{ "inv_eeprom", 0 },
{ }
};
static struct i2c_driver inv_eeprom_driver = {
.driver = {
.name = "inv_eeprom",
},
.probe = inv_eeprom_probe,
.remove = inv_eeprom_remove,
.id_table = inv_eeprom_id,
};
module_i2c_driver(inv_eeprom_driver);
MODULE_AUTHOR("Inventec");
MODULE_DESCRIPTION("Inventec D7054 Mother Board EEPROM driver");
MODULE_LICENSE("GPL");

239
platform/broadcom/sonic-platform-modules-inventec/d7264q28b/modules/inv_platform.c Normal file
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#include <linux/i2c.h>
//#include <linux/i2c-algo-bit.h>
#include <linux/i2c-gpio.h>
#include <linux/init.h>
#include <linux/module.h>
#include <linux/slab.h>
#include <linux/platform_device.h>
#include <linux/delay.h>
#include <linux/i2c/pca954x.h>
//#include <linux/i2c/pca953x.h>
//#include <linux/i2c/at24.h>
//#include <asm/gpio.h>
//#define IO_EXPAND_BASE 64
//#define IO_EXPAND_NGPIO 16
struct inv_i2c_board_info {
int ch;
int size;
struct i2c_board_info *board_info;
};
#define bus_id(id) (id)
static struct pca954x_platform_mode mux_modes_0[] = {
{.adap_id = bus_id(2),}, {.adap_id = bus_id(3),},
{.adap_id = bus_id(4),}, {.adap_id = bus_id(5),},
{.adap_id = bus_id(6),}, {.adap_id = bus_id(7),},
{.adap_id = bus_id(8),}, {.adap_id = bus_id(9),},
};
static struct pca954x_platform_mode mux_modes_0_0[] = {
{.adap_id = bus_id(10),}, {.adap_id = bus_id(11),},
{.adap_id = bus_id(12),}, {.adap_id = bus_id(13),},
{.adap_id = bus_id(14),}, {.adap_id = bus_id(15),},
{.adap_id = bus_id(16),}, {.adap_id = bus_id(17),},
};
static struct pca954x_platform_mode mux_modes_0_1[] = {
{.adap_id = bus_id(18),}, {.adap_id = bus_id(19),},
{.adap_id = bus_id(20),}, {.adap_id = bus_id(21),},
{.adap_id = bus_id(22),}, {.adap_id = bus_id(23),},
{.adap_id = bus_id(24),}, {.adap_id = bus_id(25),},
};
static struct pca954x_platform_mode mux_modes_0_2[] = {
{.adap_id = bus_id(26),}, {.adap_id = bus_id(27),},
{.adap_id = bus_id(28),}, {.adap_id = bus_id(29),},
{.adap_id = bus_id(30),}, {.adap_id = bus_id(31),},
{.adap_id = bus_id(32),}, {.adap_id = bus_id(33),},
};
static struct pca954x_platform_mode mux_modes_0_3[] = {
{.adap_id = bus_id(34),}, {.adap_id = bus_id(35),},
{.adap_id = bus_id(36),}, {.adap_id = bus_id(37),},
{.adap_id = bus_id(38),}, {.adap_id = bus_id(39),},
{.adap_id = bus_id(40),}, {.adap_id = bus_id(41),},
};
static struct pca954x_platform_mode mux_modes_0_4[] = {
{.adap_id = bus_id(42),}, {.adap_id = bus_id(43),},
{.adap_id = bus_id(44),}, {.adap_id = bus_id(45),},
{.adap_id = bus_id(46),}, {.adap_id = bus_id(47),},
{.adap_id = bus_id(48),}, {.adap_id = bus_id(49),},
};
static struct pca954x_platform_mode mux_modes_0_5[] = {
{.adap_id = bus_id(50),}, {.adap_id = bus_id(51),},
{.adap_id = bus_id(52),}, {.adap_id = bus_id(53),},
{.adap_id = bus_id(54),}, {.adap_id = bus_id(55),},
{.adap_id = bus_id(56),}, {.adap_id = bus_id(57),},
};
static struct pca954x_platform_mode mux_modes_0_6[] = {
{.adap_id = bus_id(58),}, {.adap_id = bus_id(59),},
{.adap_id = bus_id(60),}, {.adap_id = bus_id(61),},
{.adap_id = bus_id(62),}, {.adap_id = bus_id(63),},
{.adap_id = bus_id(64),}, {.adap_id = bus_id(65),},
};
static struct pca954x_platform_mode mux_modes_0_7[] = {
{.adap_id = bus_id(66),}, {.adap_id = bus_id(67),},
{.adap_id = bus_id(68),}, {.adap_id = bus_id(69),},
{.adap_id = bus_id(70),}, {.adap_id = bus_id(71),},
{.adap_id = bus_id(72),}, {.adap_id = bus_id(73),},
};
//no i2c device driver attach to mux 7
static struct pca954x_platform_data mux_data_0 = {
.modes = mux_modes_0,
.num_modes = 8,
};
static struct pca954x_platform_data mux_data_0_0 = {
.modes = mux_modes_0_0,
.num_modes = 8,
};
static struct pca954x_platform_data mux_data_0_1 = {
.modes = mux_modes_0_1,
.num_modes = 8,
};
static struct pca954x_platform_data mux_data_0_2 = {
.modes = mux_modes_0_2,
.num_modes = 8,
};
static struct pca954x_platform_data mux_data_0_3 = {
.modes = mux_modes_0_3,
.num_modes = 8,
};
static struct pca954x_platform_data mux_data_0_4 = {
.modes = mux_modes_0_4,
.num_modes = 8,
};
static struct pca954x_platform_data mux_data_0_5 = {
.modes = mux_modes_0_5,
.num_modes = 8,
};
static struct pca954x_platform_data mux_data_0_6 = {
.modes = mux_modes_0_6,
.num_modes = 8,
};
static struct pca954x_platform_data mux_data_0_7 = {
.modes = mux_modes_0_7,
.num_modes = 8,
};
static struct i2c_board_info i2c_device_info0[] __initdata = {
// {"inv_psoc", 0, 0x66, 0, 0, 0},//psoc
{"inv_cpld", 0, 0x55, 0, 0, 0},//cpld
{"inv_cpld2", 0, 0x77, 0, 0, 0},//cpld2
{"pca9548", 0, 0x70, &mux_data_0, 0, 0},
};
static struct i2c_board_info i2c_device_info2[] __initdata = {
{"pca9548", 0, 0x72, &mux_data_0_0, 0, 0},
};
static struct i2c_board_info i2c_device_info3[] __initdata = {
{"pca9548", 0, 0x72, &mux_data_0_1, 0, 0},
};
static struct i2c_board_info i2c_device_info4[] __initdata = {
{"pca9548", 0, 0x72, &mux_data_0_2, 0, 0},
};
static struct i2c_board_info i2c_device_info5[] __initdata = {
{"pca9548", 0, 0x72, &mux_data_0_3, 0, 0},
};
static struct i2c_board_info i2c_device_info6[] __initdata = {
{"pca9548", 0, 0x72, &mux_data_0_4, 0, 0},
};
static struct i2c_board_info i2c_device_info7[] __initdata = {
{"pca9548", 0, 0x72, &mux_data_0_5, 0, 0},
};
static struct i2c_board_info i2c_device_info8[] __initdata = {
{"pca9548", 0, 0x72, &mux_data_0_6, 0, 0},
};
static struct i2c_board_info i2c_device_info9[] __initdata = {
{"pca9548", 0, 0x72, &mux_data_0_7, 0, 0},
};
static struct inv_i2c_board_info i2cdev_list[] = {
{0, ARRAY_SIZE(i2c_device_info0), i2c_device_info0 }, //smbus 0
{bus_id(2), ARRAY_SIZE(i2c_device_info2), i2c_device_info2 }, //mux 0
{bus_id(3), ARRAY_SIZE(i2c_device_info3), i2c_device_info3 }, //mux 1
{bus_id(4), ARRAY_SIZE(i2c_device_info4), i2c_device_info4 }, //mux 2
{bus_id(5), ARRAY_SIZE(i2c_device_info5), i2c_device_info5 }, //mux 3
{bus_id(6), ARRAY_SIZE(i2c_device_info6), i2c_device_info6 }, //mux 4
{bus_id(7), ARRAY_SIZE(i2c_device_info7), i2c_device_info7 }, //mux 5
{bus_id(8), ARRAY_SIZE(i2c_device_info8), i2c_device_info8 }, //mux 6
{bus_id(9), ARRAY_SIZE(i2c_device_info9), i2c_device_info9 }, //mux 7
};
/////////////////////////////////////////////////////////////////////////////////////////
#if 0
static struct i2c_gpio_platform_data i2c_gpio_platdata0 = {
.scl_pin = 58,
.sda_pin = 75,
.udelay = 5, //5:100kHz
.sda_is_open_drain = 0,
.scl_is_open_drain = 0,
.scl_is_output_only = 0
};
static struct platform_device device_i2c_gpio0 = {
.name = "i2c-gpio",
.id = 1, // adapter number
.dev.platform_data = &i2c_gpio_platdata0,
};
#endif
static int __init inv_platform_init(void)
{
struct i2c_adapter *adap = NULL;
struct i2c_client *e = NULL;
int ret = 0;
int i,j,k;
printk("%s \n", __func__);
#if 0
//use i2c-gpio
//register i2c gpio
//config gpio58,75 to gpio function 58=32+3*8+2 75=32*2+8*1+3 gpio69=32*2+8*0+5
outl( inl(0x533) | (1<<2), 0x533);
outl( inl(0x541) | (1<<3), 0x541);
outl( inl(0x540) | (1<<5), 0x540); //RST_I2C_MUX_N (GPIO69)
outl( inl(0x500) | (1<<7), 0x500); //SYS_RDY_N (GPIO7)
outl( inl(0x501) | (1<<7), 0x501); //BMC_HEART_BEAT (GPIO15)
outl( inl(0x503) | (1<<2)|(1<<3), 0x503); //PSOC_HEART_BEAT(26),CPLD_HEART_BEAT(27)
ret = platform_device_register(&device_i2c_gpio0);
if (ret) {
printk(KERN_ERR "i2c-gpio: device_i2c_gpio0 register fail %d\n", ret);
}
#endif
for(i=0; i<ARRAY_SIZE(i2cdev_list); i++) {
adap = i2c_get_adapter( i2cdev_list[i].ch );
if (adap == NULL) {
printk("sequoia get channel %d adapter fail\n", i);
continue;
}
i2c_put_adapter(adap);
for(j=0; j<i2cdev_list[i].size; j++) {
for(k=0; k<300; k++) {
e = i2c_new_device(adap, &i2cdev_list[i].board_info[j] );
if(e == NULL) msleep(10); else break;
}
}
}
return ret;
}
module_init(inv_platform_init);
//arch_initcall(inv_platform_init);
MODULE_AUTHOR("Inventec");
MODULE_DESCRIPTION("Sequoia Platform devices");
MODULE_LICENSE("GPL");

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platform/broadcom/sonic-platform-modules-inventec/d7264q28b/modules/inv_psoc.c Normal file
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/*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*/
#include <linux/module.h>
#include <linux/init.h>
#include <linux/slab.h>
#include <linux/jiffies.h>
#include <linux/hwmon.h>
#include <linux/hwmon-sysfs.h>
#include <linux/err.h>
#include <linux/mutex.h>
#include <linux/delay.h>
#include <linux/kthread.h>
//=================================
#include <linux/mutex.h>
#include <linux/completion.h>
#include <linux/ipmi.h>
#include <linux/ipmi_smi.h>
#define IPMI_MAX_INTF (4)
#define NETFN_OEM 0x30
#define CMD_GETDATA 0x31
#define CMD_SETDATA 0x32
#define FAN_NUM 4
#define PSU_NUM 2
#define PSU1 0x5800
#define PSU2 0x5900
#define BMC_PMBusNumber 3
#define PMBus_Vender 0x99
#define PMBus_Serial 0x9E
#define PMBus_Temp2 0x8E
#define PMBus_Version 0x9B
#define MaxLeng_Result 0x20
#define MAX_IPMI_RECV_LENGTH 0xff
static long pmbus_reg2data_linear(int data, int linear16);
struct ipmi_result{
char result[MAX_IPMI_RECV_LENGTH];
int result_length;
};
DEFINE_MUTEX(ipmi_mutex);
DEFINE_MUTEX(ipmi2_mutex);
static struct ipmi_result ipmiresult;
static struct device *hwmon_dev;
static struct kobject *device_kobj;
static ipmi_user_t ipmi_mh_user = NULL;
static void msg_handler(struct ipmi_recv_msg *msg,void* handler_data);
static struct ipmi_user_hndl ipmi_hndlrs = { .ipmi_recv_hndl = msg_handler,};
static atomic_t dummy_count = ATOMIC_INIT(0);
static void dummy_smi_free(struct ipmi_smi_msg *msg)
{
atomic_dec(&dummy_count);
}
static void dummy_recv_free(struct ipmi_recv_msg *msg)
{
atomic_dec(&dummy_count);
}
static struct ipmi_smi_msg halt_smi_msg = {
.done = dummy_smi_free
};
static struct ipmi_recv_msg halt_recv_msg = {
.done = dummy_recv_free
};
struct __attribute__ ((__packed__)) psoc_psu_layout {
u16 psu1_iin;
u16 psu2_iin;
u16 psu1_iout;
u16 psu2_iout;
u16 psu1_pin;
u16 psu2_pin;
u16 psu1_pout;
u16 psu2_pout;
u16 psu1_vin;
u16 psu2_vin;
u16 psu1_vout;
u16 psu2_vout;
};
struct __attribute__ ((__packed__)) psoc_layout {
u8 ctl; //offset: 0
u16 switch_temp; //offset: 1
u8 reserve0; //offset: 3
u8 fw_upgrade; //offset: 4
//i2c bridge
u8 i2c_st; //offset: 5
u8 i2c_ctl; //offset: 6
u8 i2c_addr; //offset: 7
u8 i2c_data[0x20]; //offset: 8
//gpo
u8 led_ctl; //offset: 28
u8 gpio; //offset: 29
//pwm duty
u8 pwm[FAN_NUM]; //offset: 2a
u8 pwm_psu[PSU_NUM]; //offset: 2e
//fan rpm
u16 fan[FAN_NUM*2]; //offset: 30
u8 reserve1[4]; //offset: 40
//gpi
u8 gpi_fan; //offset: 44
//psu state
u8 psu_state; //offset: 45
//temperature
u16 temp[5]; //offset: 46
u16 temp_psu[PSU_NUM]; //offset: 50
//version
u8 version[2]; //offset: 54
u8 reserve2[4]; //offset: 56
struct psoc_psu_layout psu_info; //offset: 5a
};
/* definition */
/* definition */
#define PSOC_OFF(m) offsetof(struct psoc_layout, m)
#define PSOC_PSU_OFF(m) offsetof(struct psoc_psu_layout, m)
#define SWITCH_TMP_OFFSET PSOC_OFF(switch_temp)
#define PWM_OFFSET PSOC_OFF(pwm)
#define THERMAL_OFFSET PSOC_OFF(temp)
#define RPM_OFFSET PSOC_OFF(fan)
#define DIAG_FLAG_OFFSET PSOC_OFF(ctl)
#define FAN_LED_OFFSET PSOC_OFF(led_ctl)
#define FAN_GPI_OFFSET PSOC_OFF(gpi_fan)
#define PSOC_PSU_OFFSET PSOC_OFF(psu_state)
#define VERSION_OFFSET PSOC_OFF(version)
#define PSU_INFO_OFFSET PSOC_OFF(psu_info)
static void msg_handler(struct ipmi_recv_msg *recv_msg,void* handler_data)
{
struct ipmi_result *msg_result = recv_msg->user_msg_data;
if(recv_msg->msg.data[0]==0 && recv_msg->msg.data_len>0) {
msg_result->result_length=recv_msg->msg.data_len-1;
memcpy(msg_result->result, &recv_msg->msg.data[1], recv_msg->msg.data_len-1);
}
ipmi_free_recv_msg(recv_msg);
mutex_unlock(&ipmi_mutex);
return;
}
int start_ipmi_command(char NetFn, char cmd,char *data,int data_length, char* result, int* result_length)
{
int rv=0,i;
int timeout;
//wait previous command finish at least 50msec
timeout=50;
while((mutex_is_locked(&ipmi_mutex) == 1 || (mutex_is_locked(&ipmi2_mutex) == 1)) && (--timeout)>0) { usleep_range(1000,1010); }
if(timeout==0) { return -1; }
mutex_lock(&ipmi_mutex);
mutex_lock(&ipmi2_mutex);
if(ipmi_mh_user == NULL) {
for (i=0,rv=1; i<IPMI_MAX_INTF && rv; i++) {
rv = ipmi_create_user(i, &ipmi_hndlrs, NULL, &ipmi_mh_user);
}
}
if (rv < 0) {
mutex_unlock(&ipmi_mutex);
mutex_unlock(&ipmi2_mutex);
return rv;
}
else {
struct ipmi_system_interface_addr addr;
struct kernel_ipmi_msg msg;
uint8_t msg_data[data_length];
memcpy(msg_data,data,data_length);
addr.addr_type = IPMI_SYSTEM_INTERFACE_ADDR_TYPE;
addr.channel = IPMI_BMC_CHANNEL;
addr.lun = 0;
msg.netfn = NetFn;
msg.cmd = cmd;
msg.data = msg_data;
msg.data_len = data_length;
rv = ipmi_request_supply_msgs(ipmi_mh_user, (struct ipmi_addr*)&addr, 0,&msg, &ipmiresult, &halt_smi_msg, &halt_recv_msg, 0);
if (rv) {
mutex_unlock(&ipmi_mutex);
mutex_unlock(&ipmi2_mutex);
return -6;
}
//skip command if 1sec no response from remote
timeout=1000;
while(mutex_is_locked(&ipmi_mutex) == 1 && (--timeout)>0) { usleep_range(1000,1100);}
if(timeout==0) {
mutex_unlock(&ipmi2_mutex);
return -1;
}
else {
*result_length=ipmiresult.result_length;
memcpy(result,ipmiresult.result,*result_length);
mutex_unlock(&ipmi2_mutex);
return 0;
}
}
return 0;
}
EXPORT_SYMBOL(start_ipmi_command);
static ssize_t psoc_ipmi_read(u8 *buf, u8 offset, size_t count)
{
uint8_t data[2];
int result_len=0;
int rv;
data[0] = offset;
data[1] = count;
rv=start_ipmi_command(NETFN_OEM, CMD_GETDATA,data,2, buf, &result_len);
return result_len;
}
static ssize_t psoc_ipmi_write(char *buf, unsigned offset, size_t count)
{
uint8_t data[count+1],result[1];
int result_len;
data[0] = offset;
memcpy(&data[1],buf,count);
start_ipmi_command(NETFN_OEM, CMD_SETDATA,data,count+1, result, &result_len);
return count;
}
static u16 psoc_read16(u8 offset)
{
u16 value = 0;
u8 buf[]={0,0};
if(psoc_ipmi_read(buf, offset, 2) == 2)
value = (buf[0]<<8 | buf[1]<<0);
return value;
}
static u8 psoc_read8(u8 offset)
{
u8 value = 0;
u8 buf = 0;
if(psoc_ipmi_read(&buf, offset, 1) == 1)
value = buf;
return value;
}
/*
CPLD report the PSU0 status
000 = PSU normal operation
100 = PSU fault
010 = PSU unpowered
111 = PSU not installed
7 6 | 5 4 3 | 2 1 0
----------------------
| psu1 | psu0
*/
static char* psu_str[] = {
"normal", //000
"NA", //001
"unpowered", //010
"NA", //011
"fault", //100
"NA", //101
"NA", //110
"not installed", //111
};
static ssize_t show_psu_st(struct device *dev, struct device_attribute *da,
char *buf)
{
u32 status=0;
struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
u8 byte=0;
int shift = (attr->index == 0)?3:0;
status = psoc_ipmi_read(&byte, PSOC_PSU_OFFSET, 1);
byte = (byte >> shift) & 0x7;
status = sprintf (buf, "%d : %s\n", byte, psu_str[byte]);
return strlen(buf);
}
static ssize_t show_ipmi_pmbus(struct device *dev, struct device_attribute *da,
char *buf)
{
struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
uint8_t data[4],result[MaxLeng_Result];
int result_len=0;
data[0] = BMC_PMBusNumber;
data[1] = (attr->index & 0xFF00 ) >>7;
data[3] = attr->index & 0xff;
if(data[3]==PMBus_Temp2)
{data[2]=2;}
else
{data[2]=MaxLeng_Result;}
if(start_ipmi_command(0x06, 0x52,data,4, result, &result_len)==0)
{
if(data[3]==PMBus_Temp2)
{
return sprintf(buf, "%ld \n", pmbus_reg2data_linear(result[0] | (result[1]<<8), 0 ));
}
result[result[0]+1]='\0';
return sprintf(buf, "%s\n",&result[1] );
}
else
{
return 0;
}
}
static ssize_t show_thermal(struct device *dev, struct device_attribute *da,
char *buf)
{
int status=0;
struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
u8 offset = attr->index * 2 + THERMAL_OFFSET;
status = psoc_read16(offset);
return sprintf(buf, "%d\n",
(s8)(status>>8) * 1000 );
}
static ssize_t show_pwm(struct device *dev, struct device_attribute *da,
char *buf)
{
int status=0;
struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
u8 offset = attr->index + PWM_OFFSET;
status = psoc_read8(offset);
return sprintf(buf, "%d\n",
status);
}
static ssize_t set_pwm(struct device *dev,
struct device_attribute *da,
const char *buf, size_t count)
{
struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
u8 offset = attr->index + PWM_OFFSET;
u8 pwm = simple_strtol(buf, NULL, 10);
if(pwm > 255) pwm = 255;
psoc_ipmi_write(&pwm, offset, 1);
return count;
}
static ssize_t show_rpm(struct device *dev, struct device_attribute *da,
char *buf)
{
int status=0;
struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
u8 offset = attr->index*2 + RPM_OFFSET;
status = psoc_read16(offset);
return sprintf(buf, "%d\n",
status);
}
static ssize_t show_switch_tmp(struct device *dev, struct device_attribute *da,
char *buf)
{
u16 status=0;
u16 temp = 0;
status = psoc_ipmi_read((u8*)&temp, SWITCH_TMP_OFFSET, 2);
status = sprintf (buf, "%d\n", (s8)(temp>>8) * 1000 );
return strlen(buf);
}
static ssize_t set_switch_tmp(struct device *dev,
struct device_attribute *devattr,
const char *buf, size_t count)
{
long temp = simple_strtol(buf, NULL, 10);
u16 temp2 = ( (temp/1000) <<8 ) & 0xFF00 ;
//printk("set_switch_tmp temp=%d, temp2=0x%x (%x,%x)\n", temp, temp2, ( ( (temp/1000) <<8 ) & 0xFF00 ), (( (temp%1000) / 10 ) & 0xFF));
psoc_ipmi_write((u8*)&temp2, SWITCH_TMP_OFFSET, 2);
return count;
}
static ssize_t show_diag(struct device *dev, struct device_attribute *da,
char *buf)
{
u16 status=0;
u8 diag_flag = 0;
status = psoc_ipmi_read((u8*)&diag_flag, DIAG_FLAG_OFFSET, 1);
status = sprintf (buf, "%d\n", ((diag_flag & 0x80)?1:0));
return strlen(buf);
}
static ssize_t set_diag(struct device *dev,
struct device_attribute *devattr,
const char *buf, size_t count)
{
u8 value = 0;
u8 diag = simple_strtol(buf, NULL, 10);
diag = diag?1:0;
psoc_ipmi_read((u8*)&value, DIAG_FLAG_OFFSET, 1);
if(diag) value |= (1<<7);
else value &= ~(1<<7);
psoc_ipmi_write((u8*)&value, DIAG_FLAG_OFFSET, 1);
return count;
}
static ssize_t show_version(struct device *dev, struct device_attribute *da,
char *buf)
{
u16 status=0;
status = psoc_read16(VERSION_OFFSET);
return sprintf(buf, "ver: %x.%x\n", (status & 0xFF00)>>8, (status & 0xFF) );
}
static ssize_t show_name(struct device *dev, struct device_attribute *da,
char *buf)
{
return sprintf (buf, "inv_psoc\n");
}
static ssize_t show_fan_led(struct device *dev, struct device_attribute *da,
char *buf)
{
int status=0;
struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
u8 bit = attr->index;
status = psoc_read8(FAN_LED_OFFSET);
return sprintf(buf, "%d\n",
(status & (1<<bit))?1:0 );
}
static ssize_t set_fan_led(struct device *dev,
struct device_attribute *devattr,
const char *buf, size_t count)
{
struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
u8 bit = attr->index;
u8 led_state = 0;
u8 v = simple_strtol(buf, NULL, 10);
led_state = psoc_read8(FAN_LED_OFFSET);
if(v) led_state |= (1<<bit);
else led_state &= ~(1<<bit);
psoc_ipmi_write(&led_state, FAN_LED_OFFSET, 1);
return count;
}
static ssize_t show_value8(struct device *dev, struct device_attribute *da,
char *buf)
{
int status=0;
struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
u8 offset = attr->index;
status = psoc_read8(offset);
return sprintf(buf, "0x%02X\n", status );
}
static long pmbus_reg2data_linear(int data, int linear16)
{
s16 exponent;
s32 mantissa;
long val;
if (linear16) { /* LINEAR16 */
exponent = -9;
mantissa = (u16) data;
} else { /* LINEAR11 */
exponent = ((s16)data) >> 11;
exponent = ((s16)( data & 0xF800) ) >> 11;
mantissa = ((s32)((data & 0x7ff) << 5)) >> 5;
}
//printk("data=%d, m=%d, e=%d\n", data, exponent, mantissa);
val = mantissa;
/* scale result to micro-units for power sensors */
val = val * 1000L;
if (exponent >= 0)
val <<= exponent;
else
val >>= -exponent;
return val;
}
static ssize_t show_psu_psoc(struct device *dev, struct device_attribute *da,
char *buf)
{
u16 status=0;
struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
u8 offset = attr->index + PSU_INFO_OFFSET;
status = psoc_read16(offset);
return sprintf(buf, "%ld \n", pmbus_reg2data_linear(status, strstr(attr->dev_attr.attr.name, "vout")? 1:0 ));
}
static SENSOR_DEVICE_ATTR(temp1_input, S_IRUGO, show_thermal, 0, 0);
static SENSOR_DEVICE_ATTR(temp2_input, S_IRUGO, show_thermal, 0, 1);
static SENSOR_DEVICE_ATTR(temp3_input, S_IRUGO, show_thermal, 0, 2);
static SENSOR_DEVICE_ATTR(temp4_input, S_IRUGO, show_thermal, 0, 3);
static SENSOR_DEVICE_ATTR(temp5_input, S_IRUGO, show_thermal, 0, 4);
static SENSOR_DEVICE_ATTR(thermal_psu1, S_IRUGO, show_thermal, 0, 5);
static SENSOR_DEVICE_ATTR(thermal_psu2, S_IRUGO, show_thermal, 0, 6);
static SENSOR_DEVICE_ATTR(pwm1, S_IWUSR|S_IRUGO, show_pwm, set_pwm, 0);
static SENSOR_DEVICE_ATTR(pwm2, S_IWUSR|S_IRUGO, show_pwm, set_pwm, 1);
static SENSOR_DEVICE_ATTR(pwm3, S_IWUSR|S_IRUGO, show_pwm, set_pwm, 2);
static SENSOR_DEVICE_ATTR(pwm4, S_IWUSR|S_IRUGO, show_pwm, set_pwm, 3);
static SENSOR_DEVICE_ATTR(pwm_psu1, S_IWUSR|S_IRUGO, show_pwm, set_pwm, 4);
static SENSOR_DEVICE_ATTR(pwm_psu2, S_IWUSR|S_IRUGO, show_pwm, set_pwm, 5);
static SENSOR_DEVICE_ATTR(psu0, S_IRUGO, show_psu_st, 0, 0);
static SENSOR_DEVICE_ATTR(psu1, S_IRUGO, show_psu_st, 0, 1);
static SENSOR_DEVICE_ATTR(fan1_input, S_IRUGO, show_rpm, 0, 0);
static SENSOR_DEVICE_ATTR(fan2_input, S_IRUGO, show_rpm, 0, 1);
static SENSOR_DEVICE_ATTR(fan3_input, S_IRUGO, show_rpm, 0, 2);
static SENSOR_DEVICE_ATTR(fan4_input, S_IRUGO, show_rpm, 0, 3);
static SENSOR_DEVICE_ATTR(fan5_input, S_IRUGO, show_rpm, 0, 4);
static SENSOR_DEVICE_ATTR(fan6_input, S_IRUGO, show_rpm, 0, 5);
static SENSOR_DEVICE_ATTR(fan7_input, S_IRUGO, show_rpm, 0, 6);
static SENSOR_DEVICE_ATTR(fan8_input, S_IRUGO, show_rpm, 0, 7);
static SENSOR_DEVICE_ATTR(rpm_psu1, S_IRUGO, show_rpm, 0, 8);
static SENSOR_DEVICE_ATTR(rpm_psu2, S_IRUGO, show_rpm, 0, 9);
static SENSOR_DEVICE_ATTR(switch_tmp, S_IWUSR|S_IRUGO, show_switch_tmp, set_switch_tmp, 0);
static SENSOR_DEVICE_ATTR(diag, S_IWUSR|S_IRUGO, show_diag, set_diag, 0);
static SENSOR_DEVICE_ATTR(version, S_IRUGO, show_version, 0, 0);
static SENSOR_DEVICE_ATTR(name, S_IRUGO, show_name, NULL, 0);
static SENSOR_DEVICE_ATTR(fan_led_grn1, S_IWUSR|S_IRUGO, show_fan_led, set_fan_led, 0);
static SENSOR_DEVICE_ATTR(fan_led_grn2, S_IWUSR|S_IRUGO, show_fan_led, set_fan_led, 1);
static SENSOR_DEVICE_ATTR(fan_led_grn3, S_IWUSR|S_IRUGO, show_fan_led, set_fan_led, 2);
static SENSOR_DEVICE_ATTR(fan_led_grn4, S_IWUSR|S_IRUGO, show_fan_led, set_fan_led, 3);
static SENSOR_DEVICE_ATTR(fan_led_red1, S_IWUSR|S_IRUGO, show_fan_led, set_fan_led, 4);
static SENSOR_DEVICE_ATTR(fan_led_red2, S_IWUSR|S_IRUGO, show_fan_led, set_fan_led, 5);
static SENSOR_DEVICE_ATTR(fan_led_red3, S_IWUSR|S_IRUGO, show_fan_led, set_fan_led, 6);
static SENSOR_DEVICE_ATTR(fan_led_red4, S_IWUSR|S_IRUGO, show_fan_led, set_fan_led, 7);
static SENSOR_DEVICE_ATTR(fan_gpi, S_IRUGO, show_value8, 0, FAN_GPI_OFFSET);
static SENSOR_DEVICE_ATTR(psoc_psu1_vin, S_IRUGO, show_psu_psoc, 0, PSOC_PSU_OFF(psu1_vin));
static SENSOR_DEVICE_ATTR(psoc_psu1_vout, S_IRUGO, show_psu_psoc, 0, PSOC_PSU_OFF(psu1_vout));
static SENSOR_DEVICE_ATTR(psoc_psu1_iin, S_IRUGO, show_psu_psoc, 0, PSOC_PSU_OFF(psu1_iin));
static SENSOR_DEVICE_ATTR(psoc_psu1_iout, S_IRUGO, show_psu_psoc, 0, PSOC_PSU_OFF(psu1_iout));
static SENSOR_DEVICE_ATTR(psoc_psu1_pin, S_IRUGO, show_psu_psoc, 0, PSOC_PSU_OFF(psu1_pin));
static SENSOR_DEVICE_ATTR(psoc_psu1_pout, S_IRUGO, show_psu_psoc, 0, PSOC_PSU_OFF(psu1_pout));
static SENSOR_DEVICE_ATTR(psoc_psu2_vin, S_IRUGO, show_psu_psoc, 0, PSOC_PSU_OFF(psu2_vin));
static SENSOR_DEVICE_ATTR(psoc_psu2_vout, S_IRUGO, show_psu_psoc, 0, PSOC_PSU_OFF(psu2_vout));
static SENSOR_DEVICE_ATTR(psoc_psu2_iin, S_IRUGO, show_psu_psoc, 0, PSOC_PSU_OFF(psu2_iin));
static SENSOR_DEVICE_ATTR(psoc_psu2_iout, S_IRUGO, show_psu_psoc, 0, PSOC_PSU_OFF(psu2_iout));
static SENSOR_DEVICE_ATTR(psoc_psu2_pin, S_IRUGO, show_psu_psoc, 0, PSOC_PSU_OFF(psu2_pin));
static SENSOR_DEVICE_ATTR(psoc_psu2_pout, S_IRUGO, show_psu_psoc, 0, PSOC_PSU_OFF(psu2_pout));
//IPMI
static SENSOR_DEVICE_ATTR(thermal2_psu1, S_IRUGO, show_ipmi_pmbus, 0, PSU1 | PMBus_Temp2);
static SENSOR_DEVICE_ATTR(psoc_psu1_vender, S_IRUGO, show_ipmi_pmbus, 0, PSU1 | PMBus_Vender);
static SENSOR_DEVICE_ATTR(psoc_psu1_serial, S_IRUGO, show_ipmi_pmbus, 0, PSU1 | PMBus_Serial);
static SENSOR_DEVICE_ATTR(psoc_psu1_version, S_IRUGO, show_ipmi_pmbus, 0, PSU1 | PMBus_Version);
static SENSOR_DEVICE_ATTR(thermal2_psu2, S_IRUGO, show_ipmi_pmbus, 0, PSU2 | PMBus_Temp2);
static SENSOR_DEVICE_ATTR(psoc_psu2_vender, S_IRUGO, show_ipmi_pmbus, 0, PSU2 | PMBus_Vender);
static SENSOR_DEVICE_ATTR(psoc_psu2_serial, S_IRUGO, show_ipmi_pmbus, 0, PSU2 | PMBus_Serial);
static SENSOR_DEVICE_ATTR(psoc_psu2_version, S_IRUGO, show_ipmi_pmbus, 0, PSU2 | PMBus_Version);
static struct attribute *psoc_attributes[] = {
//thermal
&sensor_dev_attr_temp1_input.dev_attr.attr,
&sensor_dev_attr_temp2_input.dev_attr.attr,
&sensor_dev_attr_temp3_input.dev_attr.attr,
&sensor_dev_attr_temp4_input.dev_attr.attr,
&sensor_dev_attr_temp5_input.dev_attr.attr,
&sensor_dev_attr_thermal_psu1.dev_attr.attr,
&sensor_dev_attr_thermal_psu2.dev_attr.attr,
//pwm
&sensor_dev_attr_pwm1.dev_attr.attr,
&sensor_dev_attr_pwm2.dev_attr.attr,
&sensor_dev_attr_pwm3.dev_attr.attr,
&sensor_dev_attr_pwm4.dev_attr.attr,
&sensor_dev_attr_pwm_psu1.dev_attr.attr,
&sensor_dev_attr_pwm_psu2.dev_attr.attr,
//rpm
&sensor_dev_attr_fan1_input.dev_attr.attr,
&sensor_dev_attr_fan2_input.dev_attr.attr,
&sensor_dev_attr_fan3_input.dev_attr.attr,
&sensor_dev_attr_fan4_input.dev_attr.attr,
&sensor_dev_attr_fan5_input.dev_attr.attr,
&sensor_dev_attr_fan6_input.dev_attr.attr,
&sensor_dev_attr_fan7_input.dev_attr.attr,
&sensor_dev_attr_fan8_input.dev_attr.attr,
&sensor_dev_attr_rpm_psu1.dev_attr.attr,
&sensor_dev_attr_rpm_psu2.dev_attr.attr,
//switch temperature
&sensor_dev_attr_switch_tmp.dev_attr.attr,
//diag flag
&sensor_dev_attr_diag.dev_attr.attr,
//version
&sensor_dev_attr_version.dev_attr.attr,
//fan led
&sensor_dev_attr_fan_led_grn1.dev_attr.attr,
&sensor_dev_attr_fan_led_grn2.dev_attr.attr,
&sensor_dev_attr_fan_led_grn3.dev_attr.attr,
&sensor_dev_attr_fan_led_grn4.dev_attr.attr,
&sensor_dev_attr_fan_led_red1.dev_attr.attr,
&sensor_dev_attr_fan_led_red2.dev_attr.attr,
&sensor_dev_attr_fan_led_red3.dev_attr.attr,
&sensor_dev_attr_fan_led_red4.dev_attr.attr,
//fan GPI
&sensor_dev_attr_fan_gpi.dev_attr.attr,
&sensor_dev_attr_psu0.dev_attr.attr,
&sensor_dev_attr_psu1.dev_attr.attr,
//psu_psoc
&sensor_dev_attr_psoc_psu1_vin.dev_attr.attr,
&sensor_dev_attr_psoc_psu1_vout.dev_attr.attr,
&sensor_dev_attr_psoc_psu1_iin.dev_attr.attr,
&sensor_dev_attr_psoc_psu1_iout.dev_attr.attr,
&sensor_dev_attr_psoc_psu1_pin.dev_attr.attr,
&sensor_dev_attr_psoc_psu1_pout.dev_attr.attr,
&sensor_dev_attr_psoc_psu2_vin.dev_attr.attr,
&sensor_dev_attr_psoc_psu2_vout.dev_attr.attr,
&sensor_dev_attr_psoc_psu2_iin.dev_attr.attr,
&sensor_dev_attr_psoc_psu2_iout.dev_attr.attr,
&sensor_dev_attr_psoc_psu2_pin.dev_attr.attr,
&sensor_dev_attr_psoc_psu2_pout.dev_attr.attr,
//ipmi_i2c_command
&sensor_dev_attr_thermal2_psu1.dev_attr.attr,
&sensor_dev_attr_psoc_psu1_vender.dev_attr.attr,
&sensor_dev_attr_psoc_psu1_serial.dev_attr.attr,
&sensor_dev_attr_psoc_psu1_version.dev_attr.attr,
&sensor_dev_attr_thermal2_psu2.dev_attr.attr,
&sensor_dev_attr_psoc_psu2_vender.dev_attr.attr,
&sensor_dev_attr_psoc_psu2_serial.dev_attr.attr,
&sensor_dev_attr_psoc_psu2_version.dev_attr.attr,
&sensor_dev_attr_name.dev_attr.attr,
NULL
};
static const struct attribute_group psoc_group = {
.attrs = psoc_attributes,
};
static int __init inv_psoc_init(void)
{
int ret;
printk("+%s\n", __func__);
hwmon_dev = hwmon_device_register(NULL);
if (IS_ERR(hwmon_dev)) {
goto fail_hwmon_device_register;
}
device_kobj = kobject_create_and_add("device", &hwmon_dev->kobj);
if(!device_kobj) {
goto fail_hwmon_device_register;
}
ret = sysfs_create_group(device_kobj, &psoc_group);
if (ret) {
goto fail_create_group_hwmon;
}
printk(" Enable IPMI PSoC protocol.\n");
return ret;
fail_create_group_hwmon:
hwmon_device_unregister(hwmon_dev);
fail_hwmon_device_register:
return -ENOMEM;
}
static void __exit inv_psoc_exit(void)
{
if(ipmi_mh_user!=NULL) {ipmi_destroy_user(ipmi_mh_user);}
if(hwmon_dev != NULL) hwmon_device_unregister(hwmon_dev);
sysfs_remove_group(device_kobj, &psoc_group);
}
MODULE_AUTHOR("Ting.Jack <ting.jack@inventec>");
MODULE_DESCRIPTION("inv psoc driver");
MODULE_LICENSE("GPL");
module_init(inv_psoc_init);
module_exit(inv_psoc_exit);

719
platform/broadcom/sonic-platform-modules-inventec/d7264q28b/modules/inv_swps.c Normal file
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@ -0,0 +1,719 @@
#include <linux/module.h>
#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/fs.h>
#include <linux/device.h>
#include <linux/types.h>
#include <linux/mutex.h>
#include <linux/slab.h>
#include <linux/workqueue.h>
#include <linux/jiffies.h>
#include <linux/dmi.h>
#include "inv_swps.h"
static int port_major;
static int ioexp_total;
static int port_total;
static struct class *swp_class_p = NULL;
static struct inv_platform_s *platform_p = NULL;
static struct inv_ioexp_layout_s *ioexp_layout = NULL;
static struct inv_port_layout_s *port_layout = NULL;
static int
__swp_match(struct device *dev,const void *data){
char *name = (char *)data;
if (strcmp(dev_name(dev), name) == 0)
return 1;
return 0;
}
struct device *
get_swpdev_by_name(char *name){
struct device *dev = class_find_device(swp_class_p,
NULL,
name,
(const void *)__swp_match);
return dev;
}
static int
sscanf_2_int(const char *buf) {
int result = -EBFONT;
char *hex_tag = "0x";
if (strcspn(buf, hex_tag) == 0) {
if (sscanf(buf,"%x",&result)) {
return result;
}
} else {
if (sscanf(buf,"%d",&result)) {
return result;
}
if(sscanf(buf,"-%d",&result)) {
return -result;
}
if (sscanf(buf,"%x",&result)) {
return result;
}
}
return -EBFONT;
}
static int
sscanf_2_binary(const char *buf) {
int result = sscanf_2_int(buf);
if (result < 0){
return -EBFONT;
}
switch (result) {
case 0:
case 1:
return result;
default:
break;
}
return -EBFONT;
}
/* ========== Show functions: For I/O Expander attribute ==========
*/
static ssize_t
_show_ioexp_binary_attr(struct transvr_obj_s *tobj_p,
int (*get_func)(struct ioexp_obj_s *ioexp_p, int voffset),
char *buf_p) {
size_t len;
struct ioexp_obj_s *ioexp_p = tobj_p->ioexp_obj_p;
if (!ioexp_p) {
SWPS_ERR(" %s: data corruption! <port>:%s\n", __func__, tobj_p->swp_name);
return -ENODATA;
}
mutex_lock(&ioexp_p->lock);
len = snprintf(buf_p, 8, "%d\n", get_func(ioexp_p, tobj_p->ioexp_virt_offset));
mutex_unlock(&ioexp_p->lock);
return len;
}
static ssize_t
show_attr_present(struct device *dev_p,
struct device_attribute *attr_p,
char *buf_p){
struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p);
if (!tobj_p){
return -ENODEV;
}
return _show_ioexp_binary_attr(tobj_p,
tobj_p->ioexp_obj_p->get_present,
buf_p);
}
static ssize_t
show_attr_tx_fault(struct device *dev_p,
struct device_attribute *attr_p,
char *buf_p){
struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p);
if (!tobj_p){
return -ENODEV;
}
return _show_ioexp_binary_attr(tobj_p,
tobj_p->ioexp_obj_p->get_tx_fault,
buf_p);
}
static ssize_t
show_attr_rxlos(struct device *dev_p,
struct device_attribute *attr_p,
char *buf_p){
struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p);
if (!tobj_p){
return -ENODEV;
}
return _show_ioexp_binary_attr(tobj_p,
tobj_p->ioexp_obj_p->get_rxlos,
buf_p);
}
static ssize_t
show_attr_tx_disable(struct device *dev_p,
struct device_attribute *attr_p,
char *buf_p){
struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p);
if (!tobj_p){
return -ENODEV;
}
return _show_ioexp_binary_attr(tobj_p,
tobj_p->ioexp_obj_p->get_tx_disable,
buf_p);
}
static ssize_t
show_attr_reset(struct device *dev_p,
struct device_attribute *attr_p,
char *buf_p){
struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p);
if (!tobj_p){
return -ENODEV;
}
return _show_ioexp_binary_attr(tobj_p,
tobj_p->ioexp_obj_p->get_reset,
buf_p);
}
static ssize_t
show_attr_lpmod(struct device *dev_p,
struct device_attribute *attr_p,
char *buf_p){
struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p);
if (!tobj_p){
return -ENODEV;
}
return _show_ioexp_binary_attr(tobj_p,
tobj_p->ioexp_obj_p->get_lpmod,
buf_p);
}
static ssize_t
show_attr_modsel(struct device *dev_p,
struct device_attribute *attr_p,
char *buf_p){
struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p);
if (!tobj_p){
return -ENODEV;
}
return _show_ioexp_binary_attr(tobj_p,
tobj_p->ioexp_obj_p->get_modsel,
buf_p);
}
/* ========== Store functions: For I/O Expander (R/W) attribute ==========
*/
static ssize_t
_store_ioexp_binary_attr(struct transvr_obj_s *tobj_p,
int (*set_func)(struct ioexp_obj_s *ioexp_p,
int virt_offset, int input_val),
const char *buf_p,
size_t count) {
int input, err;
struct ioexp_obj_s *ioexp_p = tobj_p->ioexp_obj_p;
if (!ioexp_p) {
SWPS_ERR("%s: data corruption! <port>:%s\n",
__func__, tobj_p->swp_name);
return -ENODATA;
}
input = sscanf_2_binary(buf_p);
if (input < 0) {
return -EBFONT;
}
mutex_lock(&ioexp_p->lock);
err = set_func(ioexp_p, tobj_p->ioexp_virt_offset, input);
mutex_unlock(&ioexp_p->lock);
if (err < 0){
return err;
}
return count;
}
static ssize_t
store_attr_tx_disable(struct device *dev_p,
struct device_attribute *attr_p,
const char *buf_p,
size_t count){
struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p);
if (!tobj_p) {
return -ENODEV;
}
return _store_ioexp_binary_attr(tobj_p,
tobj_p->ioexp_obj_p->set_tx_disable,
buf_p,
count);
}
static ssize_t
store_attr_reset(struct device *dev_p,
struct device_attribute *attr_p,
const char *buf_p,
size_t count){
struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p);
if (!tobj_p) {
return -ENODEV;
}
return _store_ioexp_binary_attr(tobj_p,
tobj_p->ioexp_obj_p->set_reset,
buf_p,
count);
}
static ssize_t
store_attr_lpmod(struct device *dev_p,
struct device_attribute *attr_p,
const char *buf_p,
size_t count){
struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p);
if (!tobj_p) {
return -ENODEV;
}
return _store_ioexp_binary_attr(tobj_p,
tobj_p->ioexp_obj_p->set_lpmod,
buf_p,
count);
}
static ssize_t
store_attr_modsel(struct device *dev_p,
struct device_attribute *attr_p,
const char *buf_p,
size_t count){
struct transvr_obj_s *tobj_p = dev_get_drvdata(dev_p);
if (!tobj_p) {
return -ENODEV;
}
return _store_ioexp_binary_attr(tobj_p,
tobj_p->ioexp_obj_p->set_modsel,
buf_p,
count);
}
/* ========== IO Expander attribute: from expander ==========
*/
static DEVICE_ATTR(present, S_IRUGO, show_attr_present, NULL);
static DEVICE_ATTR(tx_fault, S_IRUGO, show_attr_tx_fault, NULL);
static DEVICE_ATTR(rxlos, S_IRUGO, show_attr_rxlos, NULL);
static DEVICE_ATTR(tx_disable, S_IRUGO|S_IWUSR, show_attr_tx_disable, store_attr_tx_disable);
static DEVICE_ATTR(reset, S_IRUGO|S_IWUSR, show_attr_reset, store_attr_reset);
static DEVICE_ATTR(lpmod, S_IRUGO|S_IWUSR, show_attr_lpmod, store_attr_lpmod);
static DEVICE_ATTR(modsel, S_IRUGO|S_IWUSR, show_attr_modsel, store_attr_modsel);
/* ========== Functions for module handling ==========
*/
static void
clean_port_obj(void){
dev_t dev_num;
char dev_name[32];
struct device *device_p;
struct transvr_obj_s *transvr_obj_p;
int minor_curr, port_id;
for (minor_curr=0; minor_curr<port_total; minor_curr++){
port_id = port_layout[minor_curr].port_id;
memset(dev_name, 0, sizeof(dev_name));
snprintf(dev_name, sizeof(dev_name), "%s%d", SWP_DEV_PORT, port_id);
device_p = get_swpdev_by_name(dev_name);
if (!device_p){
continue;
}
transvr_obj_p = dev_get_drvdata(device_p);
if (transvr_obj_p){
kfree(transvr_obj_p->i2c_client_p);
kfree(transvr_obj_p);
}
dev_num = MKDEV(port_major, minor_curr);
device_unregister(device_p);
device_destroy(swp_class_p, dev_num);
}
SWPS_DEBUG("%s: done.\n", __func__);
}
static int
get_platform_type(void){
char log_msg[64] = "ERROR";
platform_p = kzalloc(sizeof(struct inv_platform_s), GFP_KERNEL);
if (!platform_p){
snprintf(log_msg, sizeof(log_msg), "kzalloc fail");
goto err_get_platform_type_1;
}
platform_p->id = PLATFORM_SETTINGS;
memset(platform_p->name, 0, sizeof(platform_p->name));
snprintf(platform_p->name, (sizeof(platform_p->name) - 1),
"%s", platform_map.name);
snprintf(log_msg, sizeof(log_msg),
"User setup platform: %d (%s)",
platform_p->id, platform_p->name);
SWPS_DEBUG("%s: %s, <conf>:%d\n", __func__, log_msg, PLATFORM_SETTINGS);
return 0;
err_get_platform_type_1:
SWPS_ERR("%s: %s <conf>:%d\n", __func__, log_msg, PLATFORM_SETTINGS);
return -1;
}
static int
get_layout_info(void){
ioexp_layout = secquoia_ioexp_layout;
port_layout = secquoia_port_layout;
ioexp_total = ARRAY_SIZE(secquoia_ioexp_layout);
port_total = ARRAY_SIZE(secquoia_port_layout);
SWPS_INFO("Start to initial platform: %d (%s)\n",
platform_p->id, platform_p->name);
return 0;
}
/* ========== Functions for register something ==========
*/
static int
register_ioexp_attr_sfp_1(struct device *device_p){
/* Support machine type:
* - SFP : Magnolia
*/
char *err_attr = NULL;
if (device_create_file(device_p, &dev_attr_present) < 0) {
err_attr = "dev_attr_present";
goto err_ioexp_sfp1_attr;
}
if (device_create_file(device_p, &dev_attr_tx_fault) < 0) {
err_attr = "dev_attr_tx_fault";
goto err_ioexp_sfp1_attr;
}
if (device_create_file(device_p, &dev_attr_rxlos) < 0) {
err_attr = "dev_attr_rxlos";
goto err_ioexp_sfp1_attr;
}
if (device_create_file(device_p, &dev_attr_tx_disable) < 0) {
err_attr = "dev_attr_tx_disable";
goto err_ioexp_sfp1_attr;
}
return 0;
err_ioexp_sfp1_attr:
SWPS_ERR("Add device attribute:%s failure! \n",err_attr);
return -1;
}
static int
register_ioexp_attr_sfp_2(struct device *device_p){
/* Support machine type:
* - SFP28 : Cypress
*/
char *err_attr = NULL;
if (register_ioexp_attr_sfp_1(device_p) < 0){
goto err_ioexp_sfp2_attr;
}
return 0;
err_ioexp_sfp2_attr:
SWPS_ERR("Add device attribute:%s failure! \n",err_attr);
return -1;
}
static int
register_ioexp_attr_qsfp_1(struct device *device_p){
/* Support machine type:
* - QSFP : Magnolia, Redwood, Hudson32i
* - QSFP+ : Magnolia, Redwood, Hudson32i
* - QSFP28: Redwood
*/
char *err_attr = NULL;
if (device_create_file(device_p, &dev_attr_present) < 0) {
err_attr = "dev_attr_present";
goto err_ioexp_qsfp1_attr;
}
if (device_create_file(device_p, &dev_attr_reset) < 0) {
err_attr = "dev_attr_reset";
goto err_ioexp_qsfp1_attr;
}
if (device_create_file(device_p, &dev_attr_lpmod) < 0) {
err_attr = "dev_attr_lpmod";
goto err_ioexp_qsfp1_attr;
}
if (device_create_file(device_p, &dev_attr_modsel) < 0) {
err_attr = "dev_attr_modsel";
goto err_ioexp_qsfp1_attr;
}
return 0;
err_ioexp_qsfp1_attr:
SWPS_ERR("Add device attribute:%s failure! \n",err_attr);
return -1;
}
static int
register_ioexp_attr(struct device *device_p,
struct transvr_obj_s *transvr_obj){
char *err_msg = "ERR";
switch (transvr_obj->ioexp_obj_p->ioexp_type){
case IOEXP_TYPE_SEQUOIA_NABC:
if (register_ioexp_attr_qsfp_1(device_p) < 0){
err_msg = "register_ioexp_attr_qsfp_1 fail";
goto err_reg_ioexp_attr;
}
break;
default:
err_msg = "Unknow type";
goto err_reg_ioexp_attr;
}
return 0;
err_reg_ioexp_attr:
SWPS_ERR("%s: %s <type>:%d \n",
__func__, err_msg, transvr_obj->ioexp_obj_p->ioexp_type);
return -1;
}
static int
register_port_device(char *dev_name,
dev_t dev_num,
struct transvr_obj_s *transvr_obj){
struct device *device_p = NULL;
device_p = device_create(swp_class_p, /* struct class *cls */
NULL, /* struct device *parent */
dev_num, /* dev_t devt */
transvr_obj, /* void *private_data */
dev_name); /* const char *fmt */
if (IS_ERR(device_p)){
goto err_regswp_create_dev;
}
if (register_ioexp_attr(device_p, transvr_obj) < 0){
goto err_regswp_reg_attr;
}
return 0;
err_regswp_reg_attr:
device_unregister(device_p);
device_destroy(swp_class_p, dev_num);
err_regswp_create_dev:
SWPS_ERR("%s fail! <port>:%s\n", __func__, dev_name);
return -1;
}
static int
register_swp_module(void){
dev_t port_devt = 0;
int dev_total = port_total + 1; /* char_dev for module control */
if (alloc_chrdev_region(&port_devt, 0, dev_total, SWP_CLS_NAME) < 0){
SWPS_WARN("Allocate PORT MAJOR failure! \n");
goto err_register_swp_module_3;
}
port_major = MAJOR(port_devt);
/* Create class object */
swp_class_p = class_create(THIS_MODULE, SWP_CLS_NAME);
if (IS_ERR(swp_class_p)) {
SWPS_ERR("Create class failure! \n");
goto err_register_swp_module_3;
}
return 0;
err_register_swp_module_3:
unregister_chrdev_region(MKDEV(port_major, 0), port_total);
return -1;
}
/* ========== Module initial relate ==========
*/
static int
create_ioexp_objs(void) {
int i, run_mod;
/* Clean IOEXP object */
clean_ioexp_objs();
/* Get running mode */
run_mod = IOEXP_MODE_DIRECT;
/* Create IOEXP object */
for(i=0; i<ioexp_total; i++){
if (create_ioexp_obj(ioexp_layout[i].ioexp_id,
ioexp_layout[i].ioexp_type,
(ioexp_layout[i].addr),
run_mod) < 0) {
goto err_initioexp_create_obj_1;
}
}
return 0;
err_initioexp_create_obj_1:
clean_ioexp_objs();
return -1;
}
static int
create_port_objs(void) {
int port_id, chan_id, ioexp_id, ioexp_virt_offset;
int transvr_type, chipset_type, run_mod, i, j;
int minor_curr = 0;
int ok_count = 0;
int devlen_max = 31; // 32 - 1
char dev_name[32] = "ERROR";
char err_msg[64] = "ERROR";
struct transvr_obj_s* transvr_obj_p = NULL;
struct ioexp_obj_s *ioexp_obj_p = NULL;
struct device *dev_p = NULL;
for (minor_curr=0; minor_curr<port_total; minor_curr++) {
/* Get info from port_layout[] */
port_id = port_layout[minor_curr].port_id;
chan_id = port_layout[minor_curr].chan_id;
ioexp_id = port_layout[minor_curr].ioexp_id;
ioexp_virt_offset = port_layout[minor_curr].ioexp_offset;
transvr_type = port_layout[minor_curr].transvr_type;
chipset_type = port_layout[minor_curr].chipset_type;
/* Get running mode */
run_mod = TRANSVR_MODE_DIRECT;
/* Prepare device name */
if (strlen(SWP_DEV_PORT) > devlen_max) {
snprintf(err_msg, sizeof(err_msg),
"SWP_DEV_PORT too long!");
goto err_initport_create_tranobj;
}
memset(dev_name, 0, sizeof(dev_name));
snprintf(dev_name, devlen_max, "%s%d", SWP_DEV_PORT, port_id);
/* Create transceiver object */
ioexp_obj_p = get_ioexp_obj(ioexp_id);
if (!ioexp_obj_p){
snprintf(err_msg, sizeof(err_msg),
"IOEXP object:%d not exist", ioexp_id);
goto err_initport_create_tranobj;
}
transvr_obj_p = create_transvr_obj(dev_name, chan_id, ioexp_obj_p,
ioexp_virt_offset, transvr_type,
chipset_type, run_mod);
if (!transvr_obj_p){
snprintf(err_msg, sizeof(err_msg),
"Create transceiver object fail <id>:%s", dev_name);
goto err_initport_create_tranobj;
}
/* Setup Lane_ID mapping */
i = ARRAY_SIZE(port_layout[minor_curr].lane_id);
j = ARRAY_SIZE(transvr_obj_p->lane_id);
if (i != j) {
snprintf(err_msg, sizeof(err_msg),
"Lane_id size inconsistent %d/%d", i, j);
goto err_initport_reg_device;
}
memcpy(transvr_obj_p->lane_id, port_layout[minor_curr].lane_id, i*sizeof(int));
/* Create and register device object */
if (register_port_device(dev_name, MKDEV(port_major, minor_curr), transvr_obj_p) < 0){
snprintf(err_msg, sizeof(err_msg),
"register_port_device fail");
goto err_initport_reg_device;
}
/* Setup device_ptr of transvr_obj */
dev_p = get_swpdev_by_name(dev_name);
if (!dev_p){
snprintf(err_msg, sizeof(err_msg),
"get_swpdev_by_name fail");
goto err_initport_reg_device;
}
transvr_obj_p->transvr_dev_p = dev_p;
/* Success */
ok_count++;
}
SWPS_INFO("%s: initialed %d port-dev",__func__, ok_count);
return 0;
err_initport_reg_device:
kfree(transvr_obj_p);
err_initport_create_tranobj:
clean_port_obj();
SWPS_ERR("%s: %s", __func__, err_msg);
SWPS_ERR("Dump: <port_id>:%d <chan_id>:%d <ioexp_id>:%d <voffset>:%d <tvr_type>:%d <run_mod>:%d\n",
port_id, chan_id, ioexp_id, ioexp_virt_offset, transvr_type, run_mod);
return -1;
}
static int __init
swp_module_init(void){
if (get_platform_type() < 0){
goto err_init_out;
}
if (get_layout_info() < 0){
goto err_init_out;
}
if (register_swp_module() < 0){
goto err_init_out;
}
if (create_ioexp_objs() < 0){
goto err_init_ioexp;
}
if (create_port_objs() < 0){
goto err_init_portobj;
}
if (init_ioexp_objs() < 0){
goto err_init_portobj;
}
SWPS_INFO("Inventec switch-port module V.%s initial success.\n", SWP_VERSION);
return 0;
err_init_portobj:
clean_ioexp_objs();
err_init_ioexp:
class_unregister(swp_class_p);
class_destroy(swp_class_p);
unregister_chrdev_region(MKDEV(port_major, 0), port_total);
err_init_out:
SWPS_ERR("Inventec switch-port module V.%s initial failure.\n", SWP_VERSION);
return -1;
}
static void __exit
swp_module_exit(void){
clean_port_obj();
clean_ioexp_objs();
class_unregister(swp_class_p);
class_destroy(swp_class_p);
unregister_chrdev_region(MKDEV(port_major, 0), port_total);
SWPS_INFO("Remove Inventec switch-port module success.\n");
}
/* Module information */
MODULE_AUTHOR(SWP_AUTHOR);
MODULE_DESCRIPTION(SWP_DESC);
MODULE_VERSION(SWP_VERSION);
MODULE_LICENSE(SWP_LICENSE);
module_init(swp_module_init);
module_exit(swp_module_exit);

184
platform/broadcom/sonic-platform-modules-inventec/d7264q28b/modules/inv_swps.h Normal file
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#ifndef INV_SWPS_H
#define INV_SWPS_H
#include "transceiver.h"
#include "io_expander.h"
/* Module settings */
#define SWP_CLS_NAME "swps"
#define SWP_DEV_PORT "port"
#define SWP_DEV_MODCTL "module"
#define SWP_RESET_PWD "inventec"
#define SWP_POLLING_PERIOD (300) /* msec */
#define SWP_POLLING_ENABLE (1)
#define SWP_AUTOCONFIG_ENABLE (1)
/* Module information */
#define SWP_AUTHOR "Neil <liao.neil@inventec.com>"
#define SWP_DESC "Inventec port and transceiver driver"
#define SWP_VERSION "4.2.5"
#define SWP_LICENSE "GPL"
/* Module status define */
#define SWP_STATE_NORMAL (0)
#define SWP_STATE_I2C_DIE (-91)
/* [Note]:
* Functions and mechanism for auto-detect platform type is ready,
* But HW and BIOS not ready! We need to wait them.
* So, please do not use PLATFORM_TYPE_AUTO until they are ready.
* (2016.06.13)
*/
#define PLATFORM_TYPE_SEQUOIA_GA (171)
/* Current running platfrom */
#define PLATFORM_SETTINGS PLATFORM_TYPE_SEQUOIA_GA
/* Define platform flag and kernel version */
#if (PLATFORM_SETTINGS == PLATFORM_TYPE_SEQUOIA_GA)
#define SWPS_SEQUOIA (1)
#define SWPS_KERN_VER_BF_3_8 (1)
#endif
struct inv_platform_s {
int id;
char name[64];
};
struct inv_ioexp_layout_s {
int ioexp_id;
int ioexp_type;
struct ioexp_addr_s addr[4];
};
struct inv_port_layout_s {
int port_id;
int chan_id;
int ioexp_id;
int ioexp_offset;
int transvr_type;
int chipset_type;
int lane_id[8];
};
/* ==========================================
* Inventec Platform Settings
* ==========================================
*/
struct inv_platform_s platform_map = {PLATFORM_TYPE_SEQUOIA_GA, "Sequoia_GA" };
/* ==========================================
* Sequoia Layout configuration
* ==========================================
*/
struct inv_ioexp_layout_s secquoia_ioexp_layout[] = {
/* IOEXP_ID / IOEXP_TYPE / { Chan_ID, Chip_addr, Read_offset, Write_offset, config_offset, data_default, conf_default } */
{0, IOEXP_TYPE_SEQUOIA_NABC, { {2, 0x20, {0, 1}, {2, 3}, {6, 7}, {0x00, 0xff}, {0x00, 0x00}, }, /* addr[0] = I/O Expander 0 A */
{2, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0x00}, {0x00, 0xff}, }, /* addr[1] = I/O Expander 0 B */
{2, 0x22, {0, 1}, {2, 3}, {6, 7}, {0x00, 0xff}, {0xff, 0xff}, }, }, /* addr[2] = I/O Expander 0 C */
},
{1, IOEXP_TYPE_SEQUOIA_NABC, { {3, 0x20, {0, 1}, {2, 3}, {6, 7}, {0x00, 0xff}, {0x00, 0x00}, }, /* addr[0] = I/O Expander 1 A */
{3, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0x00}, {0x00, 0xff}, }, /* addr[1] = I/O Expander 1 B */
{3, 0x22, {0, 1}, {2, 3}, {6, 7}, {0x00, 0xff}, {0xff, 0xff}, }, }, /* addr[2] = I/O Expander 1 C */
},
{2, IOEXP_TYPE_SEQUOIA_NABC, { {4, 0x20, {0, 1}, {2, 3}, {6, 7}, {0x00, 0xff}, {0x00, 0x00}, }, /* addr[0] = I/O Expander 2 A */
{4, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0x00}, {0x00, 0xff}, }, /* addr[1] = I/O Expander 2 B */
{4, 0x22, {0, 1}, {2, 3}, {6, 7}, {0x00, 0xff}, {0xff, 0xff}, }, }, /* addr[2] = I/O Expander 2 C */
},
{3, IOEXP_TYPE_SEQUOIA_NABC, { {5, 0x20, {0, 1}, {2, 3}, {6, 7}, {0x00, 0xff}, {0x00, 0x00}, }, /* addr[0] = I/O Expander 3 A */
{5, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0x00}, {0x00, 0xff}, }, /* addr[1] = I/O Expander 3 B */
{5, 0x22, {0, 1}, {2, 3}, {6, 7}, {0x00, 0xff}, {0xff, 0xff}, }, }, /* addr[2] = I/O Expander 3 C */
},
{4, IOEXP_TYPE_SEQUOIA_NABC, { {6, 0x20, {0, 1}, {2, 3}, {6, 7}, {0x00, 0xff}, {0x00, 0x00}, }, /* addr[0] = I/O Expander 4 A */
{6, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0x00}, {0x00, 0xff}, }, /* addr[1] = I/O Expander 4 B */
{6, 0x22, {0, 1}, {2, 3}, {6, 7}, {0x00, 0xff}, {0xff, 0xff}, }, }, /* addr[2] = I/O Expander 4 C */
},
{5, IOEXP_TYPE_SEQUOIA_NABC, { {7, 0x20, {0, 1}, {2, 3}, {6, 7}, {0x00, 0xff}, {0x00, 0x00}, }, /* addr[0] = I/O Expander 5 A */
{7, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0x00}, {0x00, 0xff}, }, /* addr[1] = I/O Expander 5 B */
{7, 0x22, {0, 1}, {2, 3}, {6, 7}, {0x00, 0xff}, {0xff, 0xff}, }, }, /* addr[2] = I/O Expander 5 C */
},
{6, IOEXP_TYPE_SEQUOIA_NABC, { {8, 0x20, {0, 1}, {2, 3}, {6, 7}, {0x00, 0xff}, {0x00, 0x00}, }, /* addr[0] = I/O Expander 6 A */
{8, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0x00}, {0x00, 0xff}, }, /* addr[1] = I/O Expander 6 B */
{8, 0x22, {0, 1}, {2, 3}, {6, 7}, {0x00, 0xff}, {0xff, 0xff}, }, }, /* addr[2] = I/O Expander 6 C */
},
{7, IOEXP_TYPE_SEQUOIA_NABC, { {9, 0x20, {0, 1}, {2, 3}, {6, 7}, {0x00, 0xff}, {0x00, 0x00}, }, /* addr[0] = I/O Expander 7 A */
{9, 0x21, {0, 1}, {2, 3}, {6, 7}, {0xff, 0x00}, {0x00, 0xff}, }, /* addr[1] = I/O Expander 7 B */
{9, 0x22, {0, 1}, {2, 3}, {6, 7}, {0x00, 0xff}, {0xff, 0xff}, }, }, /* addr[2] = I/O Expander 7 C */
},
};
struct inv_port_layout_s secquoia_port_layout[] = {
/* Port_ID / Chan_ID / IOEXP_ID / IOEXP_VIRT_OFFSET / TRANSCEIVER_TYPE / BCM_CHIP_TYPE / LANE_ID */
{ 0, 10, 0, 0, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 9, 10, 11, 12} },
{ 1, 11, 0, 1, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 1, 2, 3, 4} },
{ 2, 12, 0, 2, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 25, 26, 27, 28} },
{ 3, 13, 0, 3, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 17, 18, 19, 20} },
{ 4, 14, 0, 4, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 41, 42, 43, 44} },
{ 5, 15, 0, 5, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 33, 34, 35, 36} },
{ 6, 16, 0, 6, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 57, 58, 59, 60} },
{ 7, 17, 0, 7, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 49, 50, 51, 52} },
{ 8, 18, 1, 0, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 73, 74, 75, 76} },
{ 9, 19, 1, 1, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 65, 66, 67, 68} },
{10, 20, 1, 2, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 89, 90, 91, 92} },
{11, 21, 1, 3, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 81, 82, 83, 84} },
{12, 22, 1, 4, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {105, 106, 107, 108} },
{13, 23, 1, 5, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 97, 98, 99, 100} },
{14, 24, 1, 6, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {121, 122, 123, 124} },
{15, 25, 1, 7, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {113, 114, 115, 116} },
{16, 26, 2, 0, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {137, 138, 139, 140} },
{17, 27, 2, 1, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {129, 130, 131, 132} },
{18, 28, 2, 2, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {153, 154, 155, 156} },
{19, 29, 2, 3, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {145, 146, 147, 148} },
{20, 30, 2, 4, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {169, 170, 171, 172} },
{21, 31, 2, 5, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {161, 162, 163, 164} },
{22, 32, 2, 6, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {185, 186, 187, 188} },
{23, 33, 2, 7, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {177, 178, 179, 180} },
{24, 34, 3, 0, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {201, 202, 203, 204} },
{25, 35, 3, 1, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {193, 194, 195, 196} },
{26, 36, 3, 2, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {217, 218, 219, 220} },
{27, 37, 3, 3, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {209, 210, 211, 212} },
{28, 38, 3, 4, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {233, 234, 235, 236} },
{29, 39, 3, 5, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {225, 226, 227, 228} },
{30, 40, 3, 6, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {249, 250, 251, 252} },
{31, 41, 3, 7, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {241, 242, 243, 244} },
{32, 45, 4, 3, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 13, 14, 15, 16} },
{33, 44, 4, 2, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 5, 6, 7, 8} },
{34, 43, 4, 1, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 29, 30, 31, 32} },
{35, 42, 4, 0, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 21, 22, 23, 24} },
{36, 49, 4, 7, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 45, 46, 47, 48} },
{37, 48, 4, 6, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 37, 38, 39, 40} },
{38, 47, 4, 5, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 61, 62, 63, 64} },
{39, 46, 4, 4, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 53, 54, 55, 56} },
{40, 53, 5, 3, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 77, 78, 79, 80} },
{41, 52, 5, 2, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 69, 70, 71, 72} },
{42, 51, 5, 1, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 93, 94, 95, 96} },
{43, 50, 5, 0, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, { 85, 86, 87, 88} },
{44, 57, 5, 7, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {109, 110, 111, 112} },
{45, 56, 5, 6, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {101, 102, 103, 104} },
{46, 55, 5, 5, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {125, 126, 127, 128} },
{47, 54, 5, 4, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {117, 118, 119, 120} },
{48, 61, 6, 3, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {141, 142, 143, 144} },
{49, 60, 6, 2, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {133, 134, 135, 136} },
{50, 59, 6, 1, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {157, 158, 159, 160} },
{51, 58, 6, 0, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {149, 150, 151, 152} },
{52, 65, 6, 7, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {173, 174, 175, 176} },
{53, 64, 6, 6, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {165, 166, 167, 168} },
{54, 63, 6, 5, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {189, 190, 191, 192} },
{55, 62, 6, 4, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {181, 182, 183, 184} },
{56, 69, 7, 3, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {205, 206, 207, 208} },
{57, 68, 7, 2, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {197, 198, 199, 200} },
{58, 67, 7, 1, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {221, 222, 223, 224} },
{59, 66, 7, 0, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {213, 214, 215, 216} },
{60, 73, 7, 7, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {237, 238, 239, 240} },
{61, 72, 7, 6, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {229, 230, 231, 232} },
{62, 71, 7, 5, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {253, 254, 255, 256} },
{63, 70, 7, 4, TRANSVR_TYPE_QSFP_28, BCM_CHIP_TYPE_TOMAHAWK, {245, 246, 247, 248} },
};
#endif /* INV_SWPS_H */

1786
platform/broadcom/sonic-platform-modules-inventec/d7264q28b/modules/io_expander.c Normal file
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173
platform/broadcom/sonic-platform-modules-inventec/d7264q28b/modules/io_expander.h Normal file
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#ifndef IO_EXPANDER_H
#define IO_EXPANDER_H
#include <linux/types.h>
/* IOEXP type define (SFP series) */
#define IOEXP_TYPE_MAGINOLIA_NAB (10101)
#define IOEXP_TYPE_CYPRESS_NABC (10102)
/* IOEXP type define (QSFP series) */
#define IOEXP_TYPE_MAGINOLIA_7AB (10201)
#define IOEXP_TYPE_REDWOOD_P01P08 (10202)
#define IOEXP_TYPE_REDWOOD_P09P16 (10203)
#define IOEXP_TYPE_HUDSON32IGA_P01P08 (10204)
#define IOEXP_TYPE_HUDSON32IGA_P09P16 (10205)
#define IOEXP_TYPE_SPRUCE_7AB (10206)
#define IOEXP_TYPE_CYPRESS_7ABC (10207)
#define IOEXP_TYPE_TAHOE_5A (10208)
#define IOEXP_TYPE_TAHOE_6ABC (10209)
#define IOEXP_TYPE_SEQUOIA_NABC (10210)
/* IOEXP mode define */
#define IOEXP_MODE_POLLING (19000)
#define IOEXP_MODE_DIRECT (19001)
/* IOEXP state define */
#define STATE_IOEXP_NORMAL (0)
#define STATE_IOEXP_INIT (-1)
#define STATE_IOEXP_ABNORMAL (-2)
/* IOEXP error code define */
#define ERR_IOEXP_NOTSUPPORT (-100)
#define ERR_IOEXP_UNINIT (-101)
#define ERR_IOEXP_BADCONF (-102)
#define ERR_IOEXP_ABNORMAL (-103)
#define ERR_IOEXP_NOSTATE (-104)
#define ERR_IOEXP_BADINPUT (-105)
#define ERR_IOEXP_UNEXCPT (-199)
#define SWPS_INFO(fmt, args...) printk( KERN_INFO "[SWPS] " fmt, ##args)
#define SWPS_WARN(fmt, args...) printk( KERN_WARNING "[SWPS] " fmt, ##args)
#define SWPS_ERR(fmt, args...) printk( KERN_ERR "[SWPS] " fmt, ##args)
#ifdef DEBUG_SWPS
# define SWPS_DEBUG(fmt, args...) printk( KERN_DEBUG "[SWPS] " fmt, ##args)
#else
# define SWPS_DEBUG(fmt, args...)
#endif
struct ioexp_addr_s {
int chan_id;
int chip_addr;
int read_offset[8];
int write_offset[8];
int conf_offset[8];
uint8_t data_default[8];
uint8_t conf_default[8];
};
struct ioexp_i2c_s {
int chip_id;
struct i2c_client *i2c_client_p;
struct ioexp_i2c_s *next;
};
struct ioexp_bitmap_s {
int chip_id; /* IOEXP chip id */
int ioexp_voffset; /* IOEXP virtual offset */
int bit_shift;
};
struct ioexp_map_s {
int chip_amount; /* Number of chips that IOEXP object content */
int data_width; /* Number of (Read/Write/Config) bytes */
struct ioexp_addr_s *map_addr; /* Chip address info */
struct ioexp_bitmap_s map_present[10]; /* IOEXP for SFP / QSFP */
struct ioexp_bitmap_s map_tx_disable[10]; /* IOEXP for SFP */
struct ioexp_bitmap_s map_tx_fault[10]; /* IOEXP for SFP */
struct ioexp_bitmap_s map_rxlos[10]; /* IOEXP for SFP */
struct ioexp_bitmap_s map_reset[10]; /* IOEXP for QSFP */
struct ioexp_bitmap_s map_lpmod[10]; /* IOEXP for QSFP */
struct ioexp_bitmap_s map_modsel[10]; /* IOEXP for QSFP */
struct ioexp_bitmap_s map_hard_rs0[10]; /* IOEXP for QSFP */
struct ioexp_bitmap_s map_hard_rs1[10]; /* IOEXP for QSFP */
};
struct ioexp_data_s {
uint8_t data[8];
};
struct ioexp_obj_s {
/* ============================
* Object public property
* ============================
*/
int ioexp_id;
int ioexp_type;
/* ============================
* Object private property
* ============================
*/
struct ioexp_data_s chip_data[16]; /* Max: 8-ioexp in one virt-ioexp(ioexp_obj) */
struct ioexp_map_s *ioexp_map_p;
struct ioexp_obj_s *next;
struct ioexp_i2c_s *i2c_head_p;
struct mutex lock;
int mode;
int state;
/* ===========================================
* Object public functions
* ===========================================
*/
int (*get_present)(struct ioexp_obj_s *self, int virt_offset);
int (*get_tx_fault)(struct ioexp_obj_s *self, int virt_offset);
int (*get_rxlos)(struct ioexp_obj_s *self, int virt_offset);
int (*get_tx_disable)(struct ioexp_obj_s *self, int virt_offset);
int (*get_reset)(struct ioexp_obj_s *self, int virt_offset);
int (*get_lpmod)(struct ioexp_obj_s *self, int virt_offset);
int (*get_modsel)(struct ioexp_obj_s *self, int virt_offset);
int (*get_hard_rs0)(struct ioexp_obj_s *self, int virt_offset);
int (*get_hard_rs1)(struct ioexp_obj_s *self, int virt_offset);
int (*set_tx_disable)(struct ioexp_obj_s *self, int virt_offset, int input_val);
int (*set_reset)(struct ioexp_obj_s *self, int virt_offset, int input_val);
int (*set_lpmod)(struct ioexp_obj_s *self, int virt_offset, int input_val);
int (*set_modsel)(struct ioexp_obj_s *self, int virt_offset, int input_val);
int (*set_hard_rs0)(struct ioexp_obj_s *self, int virt_offset, int input_val);
int (*set_hard_rs1)(struct ioexp_obj_s *self, int virt_offset, int input_val);
/* ===========================================
* Object private functions
* ===========================================
*/
int (*init)(struct ioexp_obj_s *self);
int (*check)(struct ioexp_obj_s *self);
int (*update_all)(struct ioexp_obj_s *self, int show_err, char *caller_name);
int (*fsm_4_direct)(struct ioexp_obj_s* self);
int (*fsm_4_polling)(struct ioexp_obj_s* self);
};
struct ioexp_obj_s* get_ioexp_obj(int ioexp_id);
int create_ioexp_obj(int ioexp_id,
int ioexp_type,
struct ioexp_addr_s *addr_map_p,
int run_mode);
int init_ioexp_objs(void);
int check_ioexp_objs(void);
void clean_ioexp_objs(void);
void unlock_ioexp_all(void);
int lock_ioexp_all(void);
int check_channel_tier_1(void);
int resync_channel_tier_1(void);
/* Macro for bit control */
#define SWP_BIT_SET(byte_val,bit_shift) ((byte_val) |= (1<<(bit_shift)))
#define SWP_BIT_CLEAR(byte_val,bit_shift) ((byte_val) &= ~(1<<(bit_shift)))
#endif /* IO_EXPANDER_H */

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#ifndef TRANSCEIVER_H
#define TRANSCEIVER_H
#include <linux/types.h>
/* advanced features control */
#define TRANSVR_INFO_DUMP_ENABLE (1)
#define TRANSVR_INFO_CACHE_ENABLE (1)
#define TRANSVR_UEVENT_ENABLE (1)
/* Transceiver type define */
#define TRANSVR_TYPE_UNKNOW_1 (0x00)
#define TRANSVR_TYPE_UNKNOW_2 (0xff)
#define TRANSVR_TYPE_SFP (0x03) /* Define for SFP, SFP+, SFP28 */
#define TRANSVR_TYPE_QSFP (0x0c)
#define TRANSVR_TYPE_QSFP_PLUS (0x0d)
#define TRANSVR_TYPE_QSFP_28 (0x11)
#define TRANSVR_TYPE_UNPLUGGED (0xfa) /* Define for ERROR handle */
#define TRANSVR_TYPE_FAKE (0xfc) /* Define for ERROR handle */
#define TRANSVR_TYPE_INCONSISTENT (0xfd) /* Define for ERROR handle */
#define TRANSVR_TYPE_ERROR (0xfe) /* Define for ERROR handle */
/* Transceiver class for base info */
#define TRANSVR_CLASS_UNSPECIFIED (0)
#define TRANSVR_CLASS_ERROR (-26001)
#define TRANSVR_CLASS_1G (26001)
#define TRANSVR_CLASS_10G (26011)
#define TRANSVR_CLASS_25G (26021)
#define TRANSVR_CLASS_40G (26041)
#define TRANSVR_CLASS_100G (26101)
#define TRANSVR_CLASS_NO_SPERARABLE (26901)
#define TRANSVR_CLASS_EXTEND_COMP (26902)
/* Transceiver class for Optical 1G */
#define TRANSVR_CLASS_OPTICAL (27000)
#define TRANSVR_CLASS_OPTICAL_100 (27001)
#define TRANSVR_CLASS_OPTICAL_1G (27002)
#define TRANSVR_CLASS_OPTICAL_1G_AOC (27003)
#define TRANSVR_CLASS_OPTICAL_1G_SX (27004)
#define TRANSVR_CLASS_OPTICAL_1G_LX (27005)
#define TRANSVR_CLASS_OPTICAL_1G_EX (27006)
/* Transceiver class for Optical 10G */
#define TRANSVR_CLASS_OPTICAL_10G (27010)
#define TRANSVR_CLASS_OPTICAL_10G_S_AOC (27011)
#define TRANSVR_CLASS_OPTICAL_10G_S_SR (27012)
#define TRANSVR_CLASS_OPTICAL_10G_S_LR (27013)
#define TRANSVR_CLASS_OPTICAL_10G_S_ER (27014)
#define TRANSVR_CLASS_OPTICAL_10G_Q_AOC (27015)
#define TRANSVR_CLASS_OPTICAL_10G_Q_SR (27016)
#define TRANSVR_CLASS_OPTICAL_10G_Q_LR (27017)
#define TRANSVR_CLASS_OPTICAL_10G_Q_ER (27018)
/* Transceiver class for Optical 25G */
#define TRANSVR_CLASS_OPTICAL_25G (27020)
#define TRANSVR_CLASS_OPTICAL_25G_AOC (27021)
#define TRANSVR_CLASS_OPTICAL_25G_SR (27022)
#define TRANSVR_CLASS_OPTICAL_25G_LR (27023)
#define TRANSVR_CLASS_OPTICAL_25G_ER (27024)
/* Transceiver class for Optical 40G */
#define TRANSVR_CLASS_OPTICAL_40G (27040)
#define TRANSVR_CLASS_OPTICAL_40G_AOC (27041)
#define TRANSVR_CLASS_OPTICAL_40G_SR4 (27042)
#define TRANSVR_CLASS_OPTICAL_40G_LR4 (27043)
#define TRANSVR_CLASS_OPTICAL_40G_ER4 (27044)
/* Transceiver class for Optical 100G */
#define TRANSVR_CLASS_OPTICAL_100G (27100)
#define TRANSVR_CLASS_OPTICAL_100G_AOC (27101)
#define TRANSVR_CLASS_OPTICAL_100G_SR4 (27102)
#define TRANSVR_CLASS_OPTICAL_100G_LR4 (27103)
#define TRANSVR_CLASS_OPTICAL_100G_ER4 (27104)
#define TRANSVR_CLASS_OPTICAL_100G_PSM4 (27105)
/* Transceiver class for Copper */
#define TRANSVR_CLASS_COPPER (28000)
#define TRANSVR_CLASS_COPPER_L1_1G (28001)
#define TRANSVR_CLASS_COPPER_L1_10G (28011)
#define TRANSVR_CLASS_COPPER_L4_10G (28012)
#define TRANSVR_CLASS_COPPER_L1_25G (28021)
#define TRANSVR_CLASS_COPPER_L4_40G (28041)
#define TRANSVR_CLASS_COPPER_L4_100G (28101)
/* Transceiver class for Base-T */
#define TRANSVR_CLASS_BASE_T_1000 (29001)
#define TRANSVR_CLASS_BASE_T_1000_up (29002)
/* For uevent message */
#define TRANSVR_UEVENT_KEY_IF "IF_TYPE"
#define TRANSVR_UEVENT_KEY_SP "IF_SPEED"
#define TRANSVR_UEVENT_KEY_LANE "IF_LANE"
#define TRANSVR_UEVENT_UNKNOW "UNKNOW"
#define TRANSVR_IF_KR "KR"
#define TRANSVR_IF_KR4 "KR4"
#define TRANSVR_IF_SR "SR"
#define TRANSVR_IF_SR4 "SR4"
#define TRANSVR_IF_SFI "SFI"
#define TRANSVR_IF_IF_GMII "GMII"
#define TRANSVR_IF_IF_XGMII "XGMII"
#define TRANSVR_IF_SP_100 "100"
#define TRANSVR_IF_SP_1G "1000"
#define TRANSVR_IF_SP_10G "10000"
#define TRANSVR_IF_SP_25G "25000"
#define TRANSVR_IF_SP_40G "40000"
#define TRANSVR_IF_SP_100G "100000"
/* Transceiver mode define */
#define TRANSVR_MODE_DIRECT (21000)
#define TRANSVR_MODE_POLLING (21001)
/* Transceiver state define
* [Note]
* 1. State is used to represent the state of "Transceiver" and "Object".
* 2. State for different target has different means. The description as following:
*/
#define STATE_TRANSVR_CONNECTED (0) /* [Transvr]:Be plugged in. [Obj]:Link up, and work normally. */
#define STATE_TRANSVR_NEW (-100) /* [Transvr]:(Not used) [Obj]:Create */
#define STATE_TRANSVR_INIT (-101) /* [Transvr]:Be plugged in. [Obj]:Link up, and in initial process. */
#define STATE_TRANSVR_ISOLATED (-102) /* [Transvr]:Be plugged in. [Obj]:Isolate, and not provide service. */
#define STATE_TRANSVR_SWAPPED (-200) /* [Transvr]:Be plugged in. [Obj]:(Not used) */
#define STATE_TRANSVR_DISCONNECTED (-300) /* [Transvr]:Un-plugged. [Obj]:Link down, and not provide service. */
#define STATE_TRANSVR_UNEXCEPTED (-901) /* [Transvr]:Any [Obj]:Any, and not in expect case. */
/* Task state define */
#define STATE_T_TASK_WAIT (110)
#define STATE_T_TASK_DONE (0)
#define STATE_T_TASK_INIT (-110)
#define STATE_T_TASK_FAIL (-410)
/* Event for task handling */
#define EVENT_TRANSVR_TASK_WAIT (2101)
#define EVENT_TRANSVR_TASK_DONE (0)
#define EVENT_TRANSVR_TASK_FAIL (-2101)
/* Event for initial handling */
#define EVENT_TRANSVR_INIT_UP (2201)
#define EVENT_TRANSVR_INIT_DOWN (1)
#define EVENT_TRANSVR_INIT_REINIT (-2201)
#define EVENT_TRANSVR_INIT_FAIL (-2202)
/* Event for others */
#define EVENT_TRANSVR_RELOAD_FAIL (-2301)
#define EVENT_TRANSVR_EXCEP_INIT (-2401)
#define EVENT_TRANSVR_EXCEP_UP (-2402)
#define EVENT_TRANSVR_EXCEP_DOWN (-2403)
#define EVENT_TRANSVR_EXCEP_SWAP (-2404)
#define EVENT_TRANSVR_EXCEP_EXCEP (-2405)
#define EVENT_TRANSVR_EXCEP_ISOLATED (-2406)
#define EVENT_TRANSVR_I2C_CRASH (-2501)
/* Transceiver error code define */
#define ERR_TRANSVR_UNINIT (-201)
#define ERR_TRANSVR_UNPLUGGED (-202)
#define ERR_TRANSVR_ABNORMAL (-203)
#define ERR_TRANSVR_NOSTATE (-204)
#define ERR_TRANSVR_NOTSUPPORT (-205)
#define ERR_TRANSVR_BADINPUT (-206)
#define ERR_TRANSVR_UPDATE_FAIL (-207)
#define ERR_TRANSVR_RELOAD_FAIL (-208)
#define ERR_TRANSVR_INIT_FAIL (-209)
#define ERR_TRANSVR_UNDEFINED (-210)
#define ERR_TRANSVR_TASK_FAIL (-211)
#define ERR_TRANSVR_TASK_BUSY (-212)
#define ERR_TRANSVR_UEVENT_FAIL (-213)
#define ERR_TRANSVR_FUNC_DISABLE (-214)
#define ERR_TRANSVR_I2C_CRASH (-297)
#define ERR_TRNASVR_BE_ISOLATED (-298)
#define ERR_TRANSVR_UNEXCPT (-299)
/* For debug */
#define DEBUG_TRANSVR_INT_VAL (-99)
#define DEBUG_TRANSVR_HEX_VAL (0xfe)
#define DEBUG_TRANSVR_STR_VAL "ERROR"
/* For system internal */
#define VAL_TRANSVR_COMID_ARREESS (0x50)
#define VAL_TRANSVR_COMID_OFFSET (0x00)
#define VAL_TRANSVR_8472_READY_ADDR (0x51)
#define VAL_TRANSVR_8472_READY_PAGE (-1)
#define VAL_TRANSVR_8472_READY_OFFSET (110)
#define VAL_TRANSVR_8472_READY_BIT (0)
#define VAL_TRANSVR_8472_READY_VALUE (0)
#define VAL_TRANSVR_8472_READY_ABNORMAL (0xff)
#define VAL_TRANSVR_8436_READY_ADDR (0x50)
#define VAL_TRANSVR_8436_READY_PAGE (-1)
#define VAL_TRANSVR_8436_READY_OFFSET (2)
#define VAL_TRANSVR_8436_READY_BIT (0)
#define VAL_TRANSVR_8436_READY_VALUE (0)
#define VAL_TRANSVR_8436_READY_ABNORMAL (0xff)
#define VAL_TRANSVR_8436_PWD_ADDR (0x50)
#define VAL_TRANSVR_8436_PWD_PAGE (-1)
#define VAL_TRANSVR_8436_PWD_OFFSET (123)
#define VAL_TRANSVR_PAGE_FREE (-99)
#define VAL_TRANSVR_PAGE_SELECT_OFFSET (127)
#define VAL_TRANSVR_PAGE_SELECT_DELAY (5)
#define VAL_TRANSVR_TASK_RETRY_FOREVER (-999)
#define VAL_TRANSVR_FUNCTION_DISABLE (-1)
#define STR_TRANSVR_SFP "SFP"
#define STR_TRANSVR_QSFP "QSFP"
#define STR_TRANSVR_QSFP_PLUS "QSFP+"
#define STR_TRANSVR_QSFP28 "QSFP28"
/* For transvr buf len */
#define LEN_TRANSVR_S_STR (16)
#define LEN_TRANSVR_M_STR (32)
#define LEN_TRANSVR_L_STR (64)
/* Optical wavelength */
#define VAL_OPTICAL_WAVELENGTH_SR (850)
#define VAL_OPTICAL_WAVELENGTH_LR (1310)
#define VAL_OPTICAL_WAVELENGTH_ER (1550)
/* BCM chip type define */
#define BCM_CHIP_TYPE_TRIDENT_2 (31001) /* Magnolia, Hudson32i, Spruce */
#define BCM_CHIP_TYPE_TOMAHAWK (31002) /* Redwood, Cypress */
/* Info from transceiver EEPROM */
struct eeprom_map_s {
int addr_br; int page_br; int offset_br; int length_br;
int addr_cdr; int page_cdr; int offset_cdr; int length_cdr;
int addr_comp_rev; int page_comp_rev; int offset_comp_rev; int length_comp_rev;
int addr_connector; int page_connector; int offset_connector; int length_connector;
int addr_diag_type; int page_diag_type; int offset_diag_type; int length_diag_type;
int addr_extbr; int page_extbr; int offset_extbr; int length_extbr;
int addr_ext_id; int page_ext_id; int offset_ext_id; int length_ext_id;
int addr_id; int page_id; int offset_id; int length_id;
int addr_len_sm; int page_len_sm; int offset_len_sm; int length_len_sm;
int addr_len_smf; int page_len_smf; int offset_len_smf; int length_len_smf;
int addr_len_om1; int page_len_om1; int offset_len_om1; int length_len_om1;
int addr_len_om2; int page_len_om2; int offset_len_om2; int length_len_om2;
int addr_len_om3; int page_len_om3; int offset_len_om3; int length_len_om3;
int addr_len_om4; int page_len_om4; int offset_len_om4; int length_len_om4;
int addr_option; int page_option; int offset_option; int length_option;
int addr_rate_id; int page_rate_id; int offset_rate_id; int length_rate_id;
int addr_rx_am; int page_rx_am; int offset_rx_am; int length_rx_am;
int addr_rx_em; int page_rx_em; int offset_rx_em; int length_rx_em;
int addr_rx_los; int page_rx_los; int offset_rx_los; int length_rx_los;
int addr_rx_power; int page_rx_power; int offset_rx_power; int length_rx_power;
int addr_soft_rs0; int page_soft_rs0; int offset_soft_rs0; int length_soft_rs0;
int addr_soft_rs1; int page_soft_rs1; int offset_soft_rs1; int length_soft_rs1;
int addr_temp; int page_temp; int offset_temp; int length_temp;
int addr_trancomp; int page_trancomp; int offset_trancomp; int length_trancomp;
int addr_trancomp_ext; int page_trancomp_ext; int offset_trancomp_ext; int length_trancomp_ext;
int addr_tx_bias; int page_tx_bias; int offset_tx_bias; int length_tx_bias;
int addr_tx_disable; int page_tx_disable; int offset_tx_disable; int length_tx_disable;
int addr_tx_eq; int page_tx_eq; int offset_tx_eq; int length_tx_eq;
int addr_tx_fault; int page_tx_fault; int offset_tx_fault; int length_tx_fault;
int addr_tx_power; int page_tx_power; int offset_tx_power; int length_tx_power;
int addr_vendor_name; int page_vendor_name; int offset_vendor_name; int length_vendor_name;
int addr_vendor_pn; int page_vendor_pn; int offset_vendor_pn; int length_vendor_pn;
int addr_vendor_rev; int page_vendor_rev; int offset_vendor_rev; int length_vendor_rev;
int addr_vendor_sn; int page_vendor_sn; int offset_vendor_sn; int length_vendor_sn;
int addr_voltage; int page_voltage; int offset_voltage; int length_voltage;
int addr_wavelength; int page_wavelength; int offset_wavelength; int length_wavelength;
};
struct transvr_worker_s;
/* Class of transceiver object */
struct transvr_obj_s {
/* ========== Object private property ==========
* [Prop]: id
* [Desc]: Type of serial transceiver.
* [Note]: SFP:03h / QSFP:0Ch / QSPF+:0Dh /QSFP28:11h
*/
uint8_t id;
/* [Prop]: connector
* [Desc]: Connector type.
* [Note]: SFP : A0h / 2
* QSFP: 00h / 130
*/
uint8_t connector;
/* [Prop]: transvr_comp
* [Desc]: Transceiver compliance code.
* [Note]: SFP: SFF-8472
* - Normal : A0h / offset 3-10
* - Extended: A0h / offset 36
* QSFP: SFF-8436 & SFF-8636
* - Normal : 00h / offset 131-138
* - Extended: 00h / offset 192
*/
uint8_t transvr_comp[8];
uint8_t transvr_comp_ext;
/* [Prop]: vendor_name
* [Desc]: SFP vendor name (ASCII 16 byte char).
* [Note]: ex:FINISAR CORP.
*/
char *vendor_name;
/* [Prop]: vendor_pn
* [Desc]: Part number provided by SFP vendor (ASCII 16 byte char).
* [Note]:
*/
char *vendor_pn;
/* [Prop]: vendor_rev
* [Desc]: Revision level for part number provided by vendor (ASCII 4 byte char).
* [Note]:
*/
char *vendor_rev;
/* [Prop]: vendor_sn
* [Desc]: Serial number provided by vendor (ASCII 16 byte char).
* [Note]:
*/
char *vendor_sn;
/* [Prop]: Extended identifier
* [Desc]: SFP:
* => None
*
* QSFP:
* => This byte contained two information:
* (1) Power consumption class
* (2) CDR function present
* [Note]: Bit description as below:
* [SFP]
* None
*
* [QSFP]
* (1) Power consumption class:
* Class 1: 1.5W (Bit6-7 = 00:)
* Class 2: 2.0W (Bit6-7 = 01:)
* Class 3: 2.5W (Bit6-7 = 10:)
* Class 4: 3.5W (Bit6-7 = 11:)
* Class 5: 4.0W (Bit0-1 = 01:)
* Class 6: 4.5W (Bit0-1 = 10:)
* Class 7: 5.0W (Bit0-1 = 11:)
* (2) CDR function present:
* Bit2: 0 = No CDR in RX
* 1 = CDR present in RX
* Bit3: 0 = No CDR in TX
* 1 = CDR present in TX
*/
uint8_t ext_id;
/* [Prop]: br
* [Desc]: Nominal bit rate, units of 100 MBits/sec.
* [Note]: SFP:03h / QSFP:0Ch / QSPF+:0Dh
* has val: 0x67
* no val :
*/
uint8_t br;
/* [Prop]: extbr
* [Desc]: Extended br (00h/222)
* [Desc]: Nominal bit rate per channel, units of 250 Mbps.
* Complements. Byte 140. See Table 32A.
*/
uint8_t extbr;
/* [Prop]: len_sm
* [Desc]: Length (single mode)-(100's)m
* [Note]: This value specifies the link length that is supported by the transceiver
* while operating in compliance with the applicable standards using single mode
* fiber. The value is in units of 100 meters. A value of 255 means that the
* transceiver supports a link length greater than 25.4 km. A value of zero means
* that the transceiver does not support single mode fiber or that the length
* information must be determined from the transceiver technology.
*/
int len_sm;
/* [Prop]: len_smf
* [Desc]: Length (single mode)-km
* [Note]: Addition to EEPROM data from original GBIC definition. This value specifies
* the link length that is supported by the transceiver while operating in
* compliance with the applicable standards using single mode fiber. The value
* is in units of kilometers. A value of 255 means that the transceiver supports
* a link length greater than 254 km. A value of zero means that the transceiver
* does not support single mode fiber or that the length information must be
* determined from the transceiver technology.
*/
int len_smf;
/* [Prop]: len_om1
* [Desc]: Link length supported for 62.5 um OM1 fiber, units of 10 m
* [Note]: The value is in units of 10 meters. A value of 255 means that the
* transceiver supports a link length greater than 2.54 km. A value of
* zero means that the transceiver does not support 50 micron multi-mode
* fiber or that the length information must be determined from the transceiver
* technology.
*/
int len_om1;
/* [Prop]: len_om2
* [Desc]: Link length supported for 50 um OM2 fiber, units of 10 m
* [Note]: The value is in units of 10 meters. A value of 255 means that the
* transceiver supports a link length greater than 2.54 km. A value of
* zero means that the transceiver does not support 50 micron multi-mode
* fiber or that the length information must be determined from the transceiver
* technology.
*/
int len_om2;
/* [Prop]: len_om3
* [Desc]: Length (50um, OM3)
* [Note]: This value specifies link length that is supported by the transceiver while
* operating in compliance with applicable standards using 50 micron multimode
* OM3 [2000 MHz*km] fiber. The value is in units of 10 meters. A value of 255
* means that the transceiver supports a link length greater than 2.54 km. A value
* of zero means that the transceiver does not support 50 micron multimode fiber
* or that the length information must be determined from the transceiver technology.
*/
int len_om3;
/* [Prop]: len_om4
* [Desc]: Length (50um, OM4) and Length (Active Cable or Copper)
* [Note]: For optical links, this value specifies link length that is supported by the
* transceiver while operating in compliance with applicable standards using 50 micron
* multimode OM4 [4700 MHz*km] fiber. The value is in units of 10 meters. A value of
* 255 means that the transceiver supports a link length greater than 2.54 km. A value
* of zero means that the transceiver does not support 50 micron multimode fiber or that
* the length information must be determined from the transceiver codes specified in Table 5-3.
*
* For copper links, this value specifies minimum link length supported by the transceiver
* while operating in compliance with applicable standards using copper cable. For active
* cable, this value represents actual length. The value is in units of 1 meter. A value of 255
* means the transceiver supports a link length greater than 254 meters. A value of zero means
* the transceiver does not support copper or active cables or the length information must be
* determined from transceiver technology. Further information about cable design, equalization,
* and connectors is usually required to guarantee meeting a particular length requirement.
*/
int len_om4;
/* [Prop]: comp_rev
* [Desc]: SFF spec revision compliance
* [Note]: Indicates which revision of SFF SFF-8472 (SFP) / SFF-8636 (QSFP) the transceiver
* complies with. (unsigned integer)
*/
uint8_t comp_rev;
/* [Prop]: CDR
* [Desc]: For transceivers with CDR capability, setting the CDR to ON engages the internal
* retiming function. Setting the CDR to OFF enables an internal bypassing mode ,which
* directs traffic around the internal CDR. (Reference: SFF-8636)
* [Note]: value=0xff: ON.
* value=0x00: OFF.
*/
uint8_t cdr;
/* [Prop]: rate_id
* [Desc]: Soft Rate Select 0(RX).
* [Note]: 1. Addr: A0h / Offset: 13
* 2. Value description:
* 00h Unspecified
* 01h SFF-8079 (4/2/1G Rate_Select & AS0/AS1)
* 02h SFF-8431 (8/4/2G Rx Rate_Select only)
* 03h Unspecified *
* 04h SFF-8431 (8/4/2G Tx Rate_Select only)
* 05h Unspecified *
* 06h SFF-8431 (8/4/2G Independent Rx & Tx Rate_select)
* 07h Unspecified *
* 08h FC-PI-5 (16/8/4G Rx Rate_select only) High=16G only, Low=8G/4G
* 09h Unspecified *
* 0Ah FC-PI-5 (16/8/4G Independent Rx, Tx Rate_select) High=16G only,
* Low=8G/4G
* 0Bh Unspecified *
* 0Ch FC-PI-6 (32/16/8G Independent Rx, Tx Rate_Select)
* High=32G only, Low = 16G/8G
* 0Dh Unspecified *
* 0Eh 10/8G Rx and Tx Rate_Select controlling the operation or locking
* modes of the internal signal conditioner, retimer or CDR, according
* to the logic table defined in Table 10-2, High Bit Rate
* (10G) =9.95-11.3 Gb/s; Low Bit Rate (8G) = 8.5 Gb/s. In this mode,
* the default value of bit 110.3 (Soft Rate Select RS(0), Table 9-11)
* and of bit 118.3 (Soft Rate Select RS(1), Table 10-1) is 1.
* 0Fh Unspecified *
* 10h-FFh Unallocated
*/
int rate_id;
/* [Prop]: soft_rs0
* [Desc]: Soft Rate Select 0(RX).
* [Note]: 1. Writing '1' selects full bandwidth operation.
* 2. This bit is "OR'd with the hard Rate_Select, AS(0) or RS(0) pin value.
* 3. Default at power up is logic zero/low
* 4. Addr: A2h / Offset: 110 / Bit: 3
*/
uint8_t soft_rs0;
/* [Prop]: soft_rs1
* [Desc]: Soft Rate Select 1(TX).
* [Note]: 1. Writing '1' selects full bandwidth TX operation.
* 2. This bit is "OR'd with the hard Rate_Select, AS(1) or RS(1) pin value.
* 3. Default at power up is logic zero/low
* 4. Addr: A2h / Offset: 118 / Bit: 3
*/
uint8_t soft_rs1;
/* [Prop]: diag_type
* [Desc]: DIAGNOSTIC MONITORING TYPE (A0h/92)
* [Note]: Description in SFF-8472 as below:
* Bit7: Reserved for legacy diagnostic implementations. Must be '0' for compliance
* with this document.
* Bit6: Digital diagnostic monitoring implemented (described in this document).
* Must be '1' for compliance with this document.
* Bit5 Internally calibrated
* Bit4 Externally calibrated
* Bit3 Received power measurement type.0 = OMA, 1 = average power
* Bit2 Address change required see section above, "addressing modes"
* Bit1-0 Unallocated
*/
uint8_t diag_type;
/* [Prop]: curr_temp
* [Desc]: Transceiver Current Temperature (A2h/96-97)
* [Note]: 1. Dependent on diag_type.
* 2. 96: High byte
* 3. 97: Low byte
* 4. This feature only for SFP
*/
uint8_t curr_temp[2];
/* [Prop]: curr_vol
* [Desc]: Transceiver Current Voltage (SFP:A2h/108-109; QSFP:00h/22-23)
* [Note]: 1. Dependent on diag_type.
* 2. 98: High byte
* 3. 99: Low byte
* 4. This feature only for SFP
* 5. Internally measured transceiver supply voltage. Represented
* as a 16 bit unsigned integer with the voltage defined as the
* full 16 bit value (0-65535) with LSB equal to 100 uVolt,
* yielding a total range of 0 to +6.55 Volts
*/
uint8_t curr_voltage[2];
/* [Prop]: curr_tx_bias
* [Desc]: Transceiver TX Bias Current (SFP:A2h/100-101; QSFP:00h/26-27)
* [Note]: 1. Dependent on diag_type.
* 2. 100: High byte
* 3. 101: Low byte
* 4. This feature only for SFP
* 5. Measured TX bias current in uA. Represented as a 16 bit unsigned
* integer with the current defined as the full 16 bit value (0-65535)
* with LSB equal to 2 uA, yielding a total range of 0 to 131 mA.
* Accuracy is vendor specific but must be better than 10% of the
* manufacturer's nominal value over specified operating temperature
* and voltage.
*/
uint8_t curr_tx_bias[8];
/* [Prop]: curr_tx_power
* [Desc]: Transceiver TX Output Power (A2h/102-103)
* [Note]: 1. Dependent on diag_type.
* 2. 102: High byte
* 3. 103: Low byte
* 4. This feature only for SFP
* 5. Measured TX output power in mW. Represented as a 16 bit unsigned
* integer with the power defined as the full 16 bit value (0-65535)
* with LSB equal to 0.1 uW, yielding a total range of 0 to 6.5535 mW
* (~ -40 to +8.2 dBm). Data is assumed to be based on measurement of
* laser monitor photodiode current. It is factory calibrated to absolute
* units using the most representative fiber output type. Accuracy is
* vendor specific but must be better than 3dB over specified temperature
* and voltage. Data is not valid when the transmitter is disabled.
*/
uint8_t curr_tx_power[8];
/* [Prop]: curr_tx_power
* [Desc]: Transceiver TX Output Power (A2h/102-103)
* [Note]: 1. Dependent on diag_type.
* 2. 102: High byte
* 3. 103: Low byte
* 4. This feature only for SFP
* 5. Measured RX received optical power in mW. Value can represent either
* average received power or OMA depending upon how bit 3 of byte 92 (A0h)
* is set. Represented as a 16 bit unsigned integer with the power defined
* as the full 16 bit value (0-65535) with LSB equal to 0.1 uW, yielding a
* total range of 0 to 6.5535 mW (~ -40 to +8.2 dBm). Absolute accuracy is
* dependent upon the exact optical wavelength. For the vendor specified
* wavelength, accuracy shall be better than 3dB over specified temperature
* and voltage.
*/
uint8_t curr_rx_power[8];
/* [Prop]: wavelength
* [Desc]: Wavelength or Copper Cable Attenuation
* [Note]: (Following is info from SFF-8636)
* For optical free side devices, this parameter identifies the nominal
* transmitter output wavelength at room temperature. This parameter is a
* 16-bit hex value with Byte 186 as high order byte and Byte 187 as low
* order byte. The laser wavelength is equal to the 16-bit integer value
* divided by 20 in nm (units of 0.05 nm). This resolution should be adequate
* to cover all relevant wavelengths yet provide enough resolution for all
* expected DWDM applications. For accurate representation of controlled
* wavelength applications, this value should represent the center of the
* guaranteed wavelength range. If the free side device is identified as
* copper cable these registers will be used to define the cable attenuation.
* An indication of 0 dB attenuation refers to the case where the attenuation
* is not known or is unavailable.
* Byte 186 (00-FFh) is the copper cable attenuation at 2.5 GHz in units of 1 dB.
* Byte 187 (00-FFh) is the copper cable attenuation at 5.0 GHz in units of 1 dB.
*/
uint8_t wavelength[2];
/* [Prop]: Amplitude control
* [Desc]: Amplitude control
* [Note]: QSFP28 => SFF-8636 03H Byte-238/239
*/
uint8_t rx_am[2];
/* [Prop]: Emphasis control
* [Desc]: Emphasis control
* [Note]: SFP+/28 => SFF-8472 A2H Byte-115
* QSFP28 => SFF-8636 03H Byte-236/237
*/
uint8_t rx_em[2];
/* [Prop]: Soft Rx LOS
* [Desc]: Soft Rx LOS which provide by transceiver
* [Note]: (Following is info from SFF-8636)
* Byte 3:
* - Bit 0: L-Rx1 LOS
* - Bit 1: L-Rx2 LOS
* - Bit 2: L-Rx3 LOS
* - Bit 3: L-Rx4 LOS
*/
uint8_t rx_los;
/* [Prop]: Soft Tx Disable
* [Desc]: Soft Tx Disable which provide by transceiver
* [Note]: (Following is info from SFF-8636)
* Byte 86:
* - Bit 0: Tx1 Disable
* - Bit 1: Tx2 Disable
* - Bit 2: Tx3 Disable
* - Bit 3: Tx4 Disable
*/
uint8_t tx_disable;
/* [Prop]: Soft Tx Fault
* [Desc]: Soft Tx Fault which provide by transceiver
* [Note]: (Following is info from SFF-8636)
* Byte 86:
* - Bit 0: Tx1 Fault
* - Bit 1: Tx2 Fault
* - Bit 2: Tx3 Fault
* - Bit 3: Tx4 Fault
*/
uint8_t tx_fault;
/* [Prop]: Transceiver EQUALIZATION
* [Desc]: Transceiver EQUALIZATION
* [Note]: SFP+/28 => SFF-8472 A2H Byte-114
* QSFP28 => SFF-8636 03H Byte-234/235
*/
uint8_t tx_eq[2];
/* [Prop]: OPTION VALUES
* [Desc]: The bits in the option field shall specify the options implemented in the transceiver.
* [Note]: SFP+/28 => SFF-8472 A0H Byte-64/65
* QSFP+/28 => SFF-8636 00H Byte-193/195
*/
uint8_t option[3];
/* ========== Object private property ==========
*/
struct device *transvr_dev_p;
struct eeprom_map_s *eeprom_map_p;
struct i2c_client *i2c_client_p;
struct ioexp_obj_s *ioexp_obj_p;
struct transvr_worker_s *worker_p;
struct mutex lock;
char swp_name[32];
int auto_config;
int auto_tx_disable;
int chan_id;
int chipset_type;
int curr_page;
int info;
int ioexp_virt_offset;
int lane_id[8];
int layout;
int mode;
int retry;
int state;
int temp;
int type;
/* ========== Object public functions ==========
*/
int (*get_id)(struct transvr_obj_s *self);
int (*get_ext_id)(struct transvr_obj_s *self);
int (*get_connector)(struct transvr_obj_s *self);
int (*get_vendor_name)(struct transvr_obj_s *self, char *buf_p);
int (*get_vendor_pn)(struct transvr_obj_s *self, char *buf_p);
int (*get_vendor_rev)(struct transvr_obj_s *self, char *buf_p);
int (*get_vendor_sn)(struct transvr_obj_s *self, char *buf_p);
int (*get_power_cls)(struct transvr_obj_s *self);
int (*get_br)(struct transvr_obj_s *self);
int (*get_len_sm)(struct transvr_obj_s *self);
int (*get_len_smf)(struct transvr_obj_s *self);
int (*get_len_om1)(struct transvr_obj_s *self);
int (*get_len_om2)(struct transvr_obj_s *self);
int (*get_len_om3)(struct transvr_obj_s *self);
int (*get_len_om4)(struct transvr_obj_s *self);
int (*get_comp_rev)(struct transvr_obj_s *self);
int (*get_comp_eth_1)(struct transvr_obj_s *self);
int (*get_comp_eth_10)(struct transvr_obj_s *self);
int (*get_comp_eth_10_40)(struct transvr_obj_s *self);
int (*get_comp_extend)(struct transvr_obj_s *self);
int (*get_cdr)(struct transvr_obj_s *self);
int (*get_rate_id)(struct transvr_obj_s *self);
int (*get_soft_rs0)(struct transvr_obj_s *self);
int (*get_soft_rs1)(struct transvr_obj_s *self);
int (*get_info)(struct transvr_obj_s *self);
int (*get_if_type)(struct transvr_obj_s *self, char *buf_p);
int (*get_if_speed)(struct transvr_obj_s *self, char *buf_p);
int (*get_if_lane)(struct transvr_obj_s *self, char *buf_p);
int (*get_curr_temp)(struct transvr_obj_s *self, char *buf_p);
int (*get_curr_vol)(struct transvr_obj_s *self, char *buf_p);
int (*get_soft_rx_los)(struct transvr_obj_s *self, char *buf_p);
int (*get_soft_tx_disable)(struct transvr_obj_s *self, char *buf_p);
int (*get_soft_tx_fault)(struct transvr_obj_s *self, char *buf_p);
int (*get_auto_tx_disable)(struct transvr_obj_s *self, char *buf_p);
int (*get_tx_bias)(struct transvr_obj_s *self, char *buf_p);
int (*get_tx_power)(struct transvr_obj_s *self, char *buf_p);
int (*get_rx_power)(struct transvr_obj_s *self, char *buf_p);
int (*get_tx_eq)(struct transvr_obj_s *self, char *buf_p);
int (*get_rx_am)(struct transvr_obj_s *self, char *buf_p);
int (*get_rx_em)(struct transvr_obj_s *self, char *buf_p);
int (*get_wavelength)(struct transvr_obj_s *self, char *buf_p);
int (*set_cdr)(struct transvr_obj_s *self, int input_val);
int (*set_soft_rs0)(struct transvr_obj_s *self, int input_val);
int (*set_soft_rs1)(struct transvr_obj_s *self, int input_val);
int (*set_soft_tx_disable)(struct transvr_obj_s *self, int input_val);
int (*set_auto_tx_disable)(struct transvr_obj_s *self, int input_val);
int (*set_tx_eq)(struct transvr_obj_s *self, int input_val);
int (*set_rx_am)(struct transvr_obj_s *self, int input_val);
int (*set_rx_em)(struct transvr_obj_s *self, int input_val);
/* ========== Object private functions ==========
*/
int (*init)(struct transvr_obj_s *self);
int (*clean)(struct transvr_obj_s *self);
int (*check)(struct transvr_obj_s *self);
int (*update_all)(struct transvr_obj_s *self, int show_err);
int (*fsm_4_direct)(struct transvr_obj_s* self, char *caller_name);
int (*fsm_4_polling)(struct transvr_obj_s* self, char *caller_name);
int (*send_uevent)(struct transvr_obj_s* self, enum kobject_action u_action);
int (*dump_all)(struct transvr_obj_s* self);
};
/* For AVL Mapping */
struct transvr_avl_s {
char vendor_name[32];
char vendor_pn[32];
int (*init)(struct transvr_obj_s *self);
};
/* Worker for long term task of transceiver */
struct transvr_worker_s {
/* Task Parameter */
struct transvr_obj_s *transvr_p;
struct transvr_worker_s *next_p;
struct transvr_worker_s *pre_p;
unsigned long trigger_time;
char func_name[64];
int retry;
int state;
/* Task private data */
void *p_data;
/* Call back function */
int (*main_task)(struct transvr_worker_s *task);
int (*post_task)(struct transvr_worker_s *task);
};
struct transvr_obj_s *
create_transvr_obj(char *swp_name,
int chan_id,
struct ioexp_obj_s *ioexp_obj_p,
int ioexp_virt_offset,
int transvr_type,
int chipset_type,
int run_mode);
void lock_transvr_obj(struct transvr_obj_s *self);
void unlock_transvr_obj(struct transvr_obj_s *self);
int isolate_transvr_obj(struct transvr_obj_s *self);
int resync_channel_tier_2(struct transvr_obj_s *self);
void alarm_msg_2_user(struct transvr_obj_s *self, char *emsg);
#endif /* TRANSCEIVER_H */

241
platform/broadcom/sonic-platform-modules-inventec/d7264q28b/utils/inventec_d7264_util.py Executable file
View File

@ -0,0 +1,241 @@
#!/usr/bin/env python
#
# Copyright (C) 2017 Inventec, Inc.
#
# This program is free software: you can redistribute it and/or modify
# it under the terms of the GNU General Public License as published by
# the Free Software Foundation, either version 3 of the License, or
# (at your option) any later version.
#
# This program is distributed in the hope that it will be useful,
# but WITHOUT ANY WARRANTY; without even the implied warranty of
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
# GNU General Public License for more details.
#
# You should have received a copy of the GNU General Public License
# along with this program. If not, see <http://www.gnu.org/licenses/>.
"""
Usage: %(scriptName)s [options] command object
options:
-h | --help : this help message
-d | --debug : run with debug mode
-f | --force : ignore error during installation or clean
command:
install : install drivers and generate related sysfs nodes
clean : uninstall drivers and remove related sysfs nodes
"""
import os
import commands
import sys, getopt
import logging
import re
import time
from collections import namedtuple
DEBUG = False
args = []
FORCE = 0
i2c_prefix = '/sys/bus/i2c/devices/'
if DEBUG == True:
print sys.argv[0]
print 'ARGV :', sys.argv[1:]
def main():
global DEBUG
global args
global FORCE
if len(sys.argv)<2:
show_help()
options, args = getopt.getopt(sys.argv[1:], 'hdf', ['help',
'debug',
'force',
])
if DEBUG == True:
print options
print args
print len(sys.argv)
for opt, arg in options:
if opt in ('-h', '--help'):
show_help()
elif opt in ('-d', '--debug'):
DEBUG = True
logging.basicConfig(level=logging.INFO)
elif opt in ('-f', '--force'):
FORCE = 1
else:
logging.info('no option')
for arg in args:
if arg == 'install':
install()
elif arg == 'clean':
uninstall()
else:
show_help()
return 0
def show_help():
print __doc__ % {'scriptName' : sys.argv[0].split("/")[-1]}
sys.exit(0)
def show_log(txt):
if DEBUG == True:
print "[D7264]"+txt
return
def exec_cmd(cmd, show):
logging.info('Run :'+cmd)
status, output = commands.getstatusoutput(cmd)
show_log (cmd +"with result:" + str(status))
show_log (" output:"+output)
if status:
logging.info('Failed :'+cmd)
if show:
print('Failed :'+cmd)
return status, output
instantiate =[
#'echo pca9545 0x70> /sys/bus/i2c/devices/i2c-0/new_device',
#'echo pca9548 0x72> /sys/bus/i2c/devices/i2c-1/new_device',
#'echo pca9548 0x72> /sys/bus/i2c/devices/i2c-2/new_device',
#'echo pca9548 0x72> /sys/bus/i2c/devices/i2c-3/new_device',
#'echo pca9548 0x72> /sys/bus/i2c/devices/i2c-4/new_device',
#'echo inv_psoc 0x66> /sys/bus/i2c/devices/i2c-5/new_device',
#'echo inv_cpld 0x55> /sys/bus/i2c/devices/i2c-5/new_device',
'echo inv_eeprom 0x53> /sys/bus/i2c/devices/i2c-0/new_device']
drivers =[
'lpc_ich',
'i2c-i801',
'i2c-mux',
'i2c-mux-pca954x',
'i2c-dev',
'inv_eeprom',
'inv_platform',
'inv_psoc',
'inv_cpld',
'swps']
def system_install():
global FORCE
#remove default drivers to avoid modprobe order conflicts
status, output = exec_cmd("rmmod i2c_ismt ", 1)
status, output = exec_cmd("rmmod i2c-i801 ", 1)
#install drivers
for i in range(0,len(drivers)):
status, output = exec_cmd("modprobe "+drivers[i], 1)
if status:
print output
if FORCE == 0:
return status
#instantiate devices
for i in range(0,len(instantiate)):
time.sleep(1)
status, output = exec_cmd(instantiate[i], 1)
if status:
print output
if FORCE == 0:
return status
for i in range(10,17):
status, output =exec_cmd("echo sff8436 0x50 > /sys/bus/i2c/devices/i2c-0/i2c-2/i2c-"+str(i)+"/new_device", 1)
if status:
print output
if FORCE == 0:
return status
for i in range(18,25):
status, output =exec_cmd("echo sff8436 0x50 > /sys/bus/i2c/devices/i2c-0/i2c-3/i2c-"+str(i)+"/new_device", 1)
if status:
print output
if FORCE == 0:
return status
for i in range(26,33):
status, output =exec_cmd("echo sff8436 0x50 > /sys/bus/i2c/devices/i2c-0/i2c-4/i2c-"+str(i)+"/new_device", 1)
if status:
print output
if FORCE == 0:
return status
for i in range(34,41):
status, output =exec_cmd("echo sff8436 0x50 > /sys/bus/i2c/devices/i2c-0/i2c-5/i2c-"+str(i)+"/new_device", 1)
if status:
print output
if FORCE == 0:
return status
for i in range(42,49):
status, output =exec_cmd("echo sff8436 0x50 > /sys/bus/i2c/devices/i2c-0/i2c-6/i2c-"+str(i)+"/new_device", 1)
if status:
print output
if FORCE == 0:
return status
for i in range(50,57):
status, output =exec_cmd("echo sff8436 0x50 > /sys/bus/i2c/devices/i2c-0/i2c-7/i2c-"+str(i)+"/new_device", 1)
if status:
print output
if FORCE == 0:
return status
for i in range(58,65):
status, output =exec_cmd("echo sff8436 0x50 > /sys/bus/i2c/devices/i2c-0/i2c-8/i2c-"+str(i)+"/new_device", 1)
if status:
print output
if FORCE == 0:
return status
for i in range(66,73):
status, output =exec_cmd("echo sff8436 0x50 > /sys/bus/i2c/devices/i2c-0/i2c-9/i2c-"+str(i)+"/new_device", 1)
if status:
print output
if FORCE == 0:
return status
return
def system_ready():
if not device_found():
return False
return True
def install():
if not device_found():
print "No device, installing...."
status = system_install()
if status:
if FORCE == 0:
return status
else:
print " D7264 devices detected...."
return
def uninstall():
global FORCE
#uninstall drivers
for i in range(len(drivers)-1,-1,-1):
status, output = exec_cmd("rmmod "+drivers[i], 1)
if status:
print output
if FORCE == 0:
return status
return
def device_found():
ret1, log = exec_cmd("ls "+i2c_prefix+"*0072", 0)
ret2, log = exec_cmd("ls "+i2c_prefix+"i2c-2", 0)
return not(ret1 or ret2)
if __name__ == "__main__":
main()

5
platform/broadcom/sonic-platform-modules-inventec/debian/changelog
View File

@ -1,3 +1,8 @@
sonic-inventec-platform-modules (1.1.0) unstable; urgency=low
* Add support for Inventec d7264
-- developer <swsp@inventec.com> Tue, 17 Apr 2018 15:27:30 +0800
sonic-inventec-platform-modules (1.1.0) unstable; urgency=low
* Add support for Inventec d7054

4
platform/broadcom/sonic-platform-modules-inventec/debian/control
View File

@ -15,3 +15,7 @@ Architecture: amd64
Depends: linux-image-3.16.0-5-amd64
Description: kernel modules for platform devices such as fan, led
Package: platform-modules-d7264q28b
Architecture: amd64
Depends: linux-image-3.16.0-5-amd64
Description: kernel modules for platform devices such as fan, led

40
platform/broadcom/sonic-platform-modules-inventec/debian/platform-modules-d7264q28b.init Normal file
View File

@ -0,0 +1,40 @@
#!/bin/bash
### BEGIN INIT INFO
# Provides: setup-board
# Required-Start:
# Required-Stop:
# Should-Start:
# Should-Stop:
# Default-Start: S
# Default-Stop: 0 6
# Short-Description: Setup Inventec d7054q28b board.
### END INIT INFO
case "$1" in
start)
echo -n "Setting up board... "
depmod -a
/usr/local/bin/inventec_d7264_util.py -f install
echo "done."
;;
stop)
/usr/local/bin/inventec_d7264_util.py -f clean
echo "done."
;;
force-reload|restart)
echo "Not supported"
;;
*)
echo "Usage: /etc/init.d/platform-modules-d7264q28b.init {start|stop}"
exit 1
;;
esac
exit 0

1
platform/broadcom/sonic-platform-modules-inventec/debian/platform-modules-d7264q28b.install Normal file
View File

@ -0,0 +1 @@
d7264q28b/utils/inventec_d7264_util.py usr/local/bin

5
platform/broadcom/sonic-platform-modules-inventec/debian/platform-modules-d7264q28b.upstart Normal file
View File

@ -0,0 +1,5 @@
description "SONiC platform service"
respawn
exec /usr/local/bin/inventec_d7264_util.py -f install

2
platform/broadcom/sonic-platform-modules-inventec/debian/rules
View File

@ -14,7 +14,7 @@ export INSTALL_MOD_DIR:=extra
KVERSION ?= $(shell uname -r)
KERNEL_SRC := /lib/modules/$(KVERSION)
MOD_SRC_DIR:= $(shell pwd)
MODULE_DIRS:= d7032q28b d7054q28b
MODULE_DIRS:= d7032q28b d7054q28b d7264q28b
%:
dh $@