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[minigraph]: Add PORTCHANNEL_MEMBER configurations (#2034)

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Signed-off-by: Shu0T1an ChenG <shuche@microsoft.com>
This commit is contained in:
Shuotian Cheng 2018-09-11 18:07:46 -07:00 committed by lguohan
parent 860de856a8
commit 5c6948a90e
2 changed files with 12 additions and 5 deletions
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8
src/sonic-config-engine/minigraph.py
View File

@ -176,6 +176,7 @@ def parse_dpg(dpg, hname):
pcintfs = child.find(str(QName(ns, "PortChannelInterfaces")))
pc_intfs = []
pcs = {}
pc_members = {}
intfs_inpc = [] # List to hold all the LAG member interfaces
for pcintf in pcintfs.findall(str(QName(ns, "PortChannel"))):
pcintfname = pcintf.find(str(QName(ns, "Name"))).text
@ -185,6 +186,7 @@ def parse_dpg(dpg, hname):
for i, member in enumerate(pcmbr_list):
pcmbr_list[i] = port_alias_map.get(member, member)
intfs_inpc.append(pcmbr_list[i])
pc_members[pcintfname + KEY_SEPARATOR + pcmbr_list[i]] = {'NULL': 'NULL'}
if pcintf.find(str(QName(ns, "Fallback"))) != None:
pcs[pcintfname] = {'members': pcmbr_list, 'fallback': pcintf.find(str(QName(ns, "Fallback"))).text}
else:
@ -280,7 +282,7 @@ def parse_dpg(dpg, hname):
except:
print >> sys.stderr, "Warning: Ignoring Control Plane ACL %s without type" % aclname
return intfs, lo_intfs, mgmt_intf, vlans, vlan_members, pcs, acls
return intfs, lo_intfs, mgmt_intf, vlans, vlan_members, pcs, pc_members, acls
return None, None, None, None, None, None, None
@ -443,7 +445,7 @@ def parse_xml(filename, platform=None, port_config_file=None):
port_alias_map.update(alias_map)
for child in root:
if child.tag == str(QName(ns, "DpgDec")):
(intfs, lo_intfs, mgmt_intf, vlans, vlan_members, pcs, acls) = parse_dpg(child, hostname)
(intfs, lo_intfs, mgmt_intf, vlans, vlan_members, pcs, pc_members, acls) = parse_dpg(child, hostname)
elif child.tag == str(QName(ns, "CpgDec")):
(bgp_sessions, bgp_asn, bgp_peers_with_range) = parse_cpg(child, hostname)
elif child.tag == str(QName(ns, "PngDec")):
@ -543,7 +545,7 @@ def parse_xml(filename, platform=None, port_config_file=None):
pc['admin_status'] = 'up'
results['PORTCHANNEL'] = pcs
results['PORTCHANNEL_MEMBER'] = pc_members
for pc_intf in pc_intfs.keys():
# remove portchannels not in PORTCHANNEL dictionary

9
src/sonic-config-engine/tests/test_cfggen.py
View File

@ -93,7 +93,7 @@ class TestCfgGen(TestCase):
self.assertEqual(output.strip(), "{'everflow0': {'src_ip': '10.1.0.32', 'dst_ip': '2.2.2.2'}}")
def test_minigraph_interfaces(self):
argument = '-m "' + self.sample_graph_simple + '" -p "' + self.port_config + '" -v \'INTERFACE.keys()\''
argument = '-m "' + self.sample_graph_simple + '" -p "' + self.port_config + '" -v "INTERFACE.keys()"'
output = self.run_script(argument)
self.assertEqual(output.strip(), "[('Ethernet0', '10.0.0.58/31'), ('Ethernet0', 'FC00::75/126')]")
@ -117,11 +117,16 @@ class TestCfgGen(TestCase):
output = self.run_script(argument)
self.assertEqual(output.strip(), "{'PortChannel01': {'admin_status': 'up', 'members': ['Ethernet4'], 'mtu': '9100'}}")
def test_minigraph_portchannels_more_member(self):
def test_minigraph_portchannel_with_more_member(self):
argument = '-m "' + self.sample_graph_pc_test + '" -p "' + self.port_config + '" -v PORTCHANNEL'
output = self.run_script(argument)
self.assertEqual(output.strip(), "{'PortChannel01': {'admin_status': 'up', 'members': ['Ethernet112', 'Ethernet116', 'Ethernet120', 'Ethernet124'], 'mtu': '9100'}}")
def test_minigraph_portchannel_members(self):
argument = '-m "' + self.sample_graph_pc_test + '" -p "' + self.port_config + '" -v "PORTCHANNEL_MEMBER.keys()"'
output = self.run_script(argument)
self.assertEqual(output.strip(), "['PortChannel01|Ethernet112', 'PortChannel01|Ethernet124', 'PortChannel01|Ethernet116', 'PortChannel01|Ethernet120']")
def test_minigraph_portchannel_interfaces(self):
argument = '-m "' + self.sample_graph_simple + '" -p "' + self.port_config + '" -v "PORTCHANNEL_INTERFACE.keys()"'
output = self.run_script(argument)