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Upgrade XGS saibcm-modules to 8.4 (#16246) (#17024)

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mssonicbld 2023-10-27 00:13:26 +08:00 committed by GitHub
parent fc8d645b87
commit 530f756304
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GPG Key ID: 4AEE18F83AFDEB23
172 changed files with 8531 additions and 1977 deletions
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2
platform/broadcom/sai-modules.mk
View File

@ -1,6 +1,6 @@
# Broadcom SAI modules
BRCM_OPENNSL_KERNEL_VERSION = 7.1.0.0
BRCM_OPENNSL_KERNEL_VERSION = 8.4.0.2
BRCM_OPENNSL_KERNEL = opennsl-modules_$(BRCM_OPENNSL_KERNEL_VERSION)_amd64.deb
$(BRCM_OPENNSL_KERNEL)_SRC_PATH = $(PLATFORM_PATH)/saibcm-modules

6
platform/broadcom/saibcm-modules/debian/changelog
View File

@ -1,3 +1,9 @@
opennsl (8.4.0.2) unstable; urgency=medium
* Update to Broadcom SAI 8.4.0.2
-- Ziting Guo <zitingguo@microsoft.com> Tue, Sep 5 02:25:03 2023 +0000
opennsl (7.1.0.0) unstable; urgency=medium
* Update to Broadcom SAI 7.1.0.0.

6
platform/broadcom/saibcm-modules/debian/opennsl-modules.install
View File

@ -3,6 +3,6 @@ systems/linux/user/x86-smp_generic_64-2_6/linux-kernel-bde.ko lib/modules/5.10.0
systems/linux/user/x86-smp_generic_64-2_6/linux-user-bde.ko lib/modules/5.10.0-23-2-amd64/extra
systems/linux/user/x86-smp_generic_64-2_6/linux-knet-cb.ko lib/modules/5.10.0-23-2-amd64/extra
systemd/opennsl-modules.service lib/systemd/system
sdklt/linux/bde/linux_ngbde.ko lib/modules/5.10.0-23-2-amd64/extra
sdklt/linux/knet/linux_ngknet.ko lib/modules/5.10.0-23-2-amd64/extra
sdklt/linux/knetcb/linux_ngknetcb.ko lib/modules/5.10.0-23-2-amd64/extra
sdklt/build/bde/linux_ngbde.ko lib/modules/5.10.0-23-2-amd64/extra
sdklt/build/knet/linux_ngknet.ko lib/modules/5.10.0-23-2-amd64/extra
sdklt/build/knetcb/linux_ngknetcb.ko lib/modules/5.10.0-23-2-amd64/extra

18
platform/broadcom/saibcm-modules/include/ibde.h
View File

@ -88,6 +88,7 @@ typedef struct ibde_s {
#define BDE_AXI_DEV_TYPE SAL_AXI_DEV_TYPE /* AXI device */
#define BDE_EMMI_DEV_TYPE SAL_EMMI_DEV_TYPE /* EMMI device */
#define BDE_COMPOSITE_DEV_TYPE SAL_COMPOSITE_DEV_TYPE /* Composite device, composed of sub-devices with buses */
#define BDE_SUB_DEV_TYPE SAL_SUB_DEV_TYPE /* A sub-device (with a bus) of a composite device */
#define BDE_USER_DEV_TYPE SAL_USER_DEV_TYPE /* The user implements his own method of access to the device */
#define BDE_DEV_BUS_ALT SAL_DEV_BUS_ALT /* Alternate Access */
#define BDE_DEV_BUS_MSI SAL_DEV_BUS_MSI /* Message-signaled interrupts */
@ -186,6 +187,23 @@ typedef struct ibde_s {
uint64 (*read64)(int d, uint32 addr);
void (*write64)(int d, uint32 addr, uint64 data);
/*
* Probe for new devices.
*
* This function will normally be called implicitly by the BDE
* initialization function, but it may be called at a later time
* by the application to detect removed or added devices.
*
* Existing devices are not affected by this operation.
*
* If a device has been hot-swapped, then it will be assigned the
* same resources as before the hot-swap.
*
* Return value:
* 0: Device probe completed successfully.
* -1: An error happened during device probe.
*/
int (*probe)(void);
} ibde_t;

16
platform/broadcom/saibcm-modules/include/kcom.h
View File

@ -72,6 +72,7 @@
#define KCOM_M_DBGPKT_GET 42 /* Get debug packet function info */
#define KCOM_M_WB_CLEANUP 51 /* Clean up for warmbooting */
#define KCOM_M_CLOCK_CMD 52 /* Clock Commands */
#define KCOM_M_PCIE_LINK_STATUS 53 /* PCIe link status */
#define KCOM_VERSION 13 /* Protocol version */
@ -367,6 +368,7 @@ typedef struct kcom_msg_version_s {
#define KSYNC_M_HW_TS_DISABLE 3
#define KSYNC_M_MTP_TS_UPDATE_ENABLE 4
#define KSYNC_M_MTP_TS_UPDATE_DISABLE 5
#define KSYNC_M_DNX_JR2DEVS_SYS_CONFIG 6
typedef struct kcom_clock_info_s {
uint8 cmd;
@ -432,6 +434,7 @@ typedef struct kcom_msg_hw_init_s {
uint32 udh_size;
uint32 oamp_punted;
uint8 no_skip_udh_check;
uint8 oam_dm_tod_exist;
uint8 system_headers_mode;
uint8 udh_enable;
/*
@ -481,6 +484,18 @@ typedef struct kcom_msg_wb_cleanup_s {
uint32 flags;
} kcom_msg_wb_cleanup_t;
/* PCIE Link status */
#define PCIE_LINK_STATUS_UP 0x0
#define PCIE_LINK_STATUS_DOWN 0x1
/*
* Update PCIe link status.
*/
typedef struct kcom_msg_pcie_link_status_s {
kcom_msg_hdr_t hdr;
int pcie_link_status;
} kcom_msg_pcie_link_status_t;
/*
* Create new system network interface. The network interface will
* be associated with the specified switch unit number.
@ -606,6 +621,7 @@ typedef union kcom_msg_s {
kcom_msg_dbg_pkt_get_t dbg_pkt_get;
kcom_msg_wb_cleanup_t wb_cleanup;
kcom_msg_clock_cmd_t clock_cmd;
kcom_msg_pcie_link_status_t pcie_link_status;
} kcom_msg_t;
/*

101
platform/broadcom/saibcm-modules/include/soc/devids.h
View File

@ -25,7 +25,7 @@
* https://www.broadcom.com/products/ethernet-connectivity/software/opennsa
*/
/*
* Copyright: (c) 2021 Broadcom.
* Copyright: (c) 2022 Broadcom.
* All Rights Reserved.
*/
@ -1386,10 +1386,6 @@
#define BCM56768_A0_REV_ID 1
#define BCM56768_B0_REV_ID 0x11
#define BCM56068_DEVICE_ID 0xb068
#define BCM56068_A0_REV_ID 1
#define BCM56068_B0_REV_ID 0x11
#define BCM56068_DEVICE_ID 0xb068
#define BCM56068_A0_REV_ID 1
#define BCM56068_B0_REV_ID 0x11
@ -1532,6 +1528,9 @@
#define BCM53549_DEVICE_ID 0x8549
#define BCM53549_A0_REV_ID 1
#define BCM53642_DEVICE_ID 0x8642
#define BCM53642_A0_REV_ID 1
#define BCM5665_DEVICE_ID 0x5665
#define BCM5665_A0_REV_ID 1
#define BCM5665_B0_REV_ID 0x11
@ -1549,8 +1548,6 @@
#define BROADCOM_PHYID_HIGH 0x0040
#define GEDI_DEVICE_ID 0xa100
#define GEDI_REV_ID 0x0001
#define ARAD_DEVICE_ID 0x8650
#define ARAD_A0_REV_ID 0x0000
#define ARAD_B0_REV_ID 0x0011
@ -1580,6 +1577,7 @@
#define BCM88956_A1_REV_ID 0x0002
#define DNXC_A0_REV_ID 0x0001
#define DNXC_A1_REV_ID 0x0002
#define DNXC_A2_REV_ID 0x0003
#define DNXC_B0_REV_ID 0x0011
#define DNXC_B1_REV_ID 0x0012
#define DNXC_DEVID_FAMILY_MASK 0xfff0
@ -1601,6 +1599,42 @@
#define BCM8879D_DEVICE_ID 0x879D
#define BCM8879E_DEVICE_ID 0x879E
#define BCM8879F_DEVICE_ID 0x879F
#ifdef BCM_DNXF3_SUPPORT
#define BCM88910_DEVICE_ID 0x8910
#define BCM88910_A0_REV_ID DNXC_A0_REV_ID
#define BCM88911_DEVICE_ID 0x8911
#define BCM88912_DEVICE_ID 0x8912
#define BCM88913_DEVICE_ID 0x8913
#define BCM88914_DEVICE_ID 0x8914
#define BCM88915_DEVICE_ID 0x8915
#define BCM88916_DEVICE_ID 0x8916
#define BCM88917_DEVICE_ID 0x8917
#define BCM88918_DEVICE_ID 0x8918
#define BCM88919_DEVICE_ID 0x8919
#define BCM8891A_DEVICE_ID 0x891A
#define BCM8891B_DEVICE_ID 0x891B
#define BCM8891C_DEVICE_ID 0x891C
#define BCM8891D_DEVICE_ID 0x891D
#define BCM8891E_DEVICE_ID 0x891E
#define BCM8891F_DEVICE_ID 0x891F
#define BCM88920_DEVICE_ID 0x8920
#define BCM88920_A0_REV_ID DNXC_A0_REV_ID
#define BCM88921_DEVICE_ID 0x8921
#define BCM88922_DEVICE_ID 0x8922
#define BCM88923_DEVICE_ID 0x8923
#define BCM88924_DEVICE_ID 0x8924
#define BCM88925_DEVICE_ID 0x8925
#define BCM88926_DEVICE_ID 0x8926
#define BCM88927_DEVICE_ID 0x8927
#define BCM88928_DEVICE_ID 0x8928
#define BCM88929_DEVICE_ID 0x8929
#define BCM8892A_DEVICE_ID 0x892A
#define BCM8892B_DEVICE_ID 0x892B
#define BCM8892C_DEVICE_ID 0x892C
#define BCM8892D_DEVICE_ID 0x892D
#define BCM8892E_DEVICE_ID 0x892E
#define BCM8892F_DEVICE_ID 0x892F
#endif
#define ARADPLUS_DEVICE_ID 0x8660
#define ARADPLUS_A0_REV_ID 0x0001
#define BCM88660_DEVICE_ID ARADPLUS_DEVICE_ID
@ -1806,9 +1840,11 @@
#define J2P_DEVICE_ID 0x8850
#define J2P_A0_REV_ID DNXC_A0_REV_ID
#define J2P_A1_REV_ID DNXC_A1_REV_ID
#define J2P_A2_REV_ID DNXC_A2_REV_ID
#define BCM88850_DEVICE_ID J2P_DEVICE_ID
#define BCM88850_A0_REV_ID J2P_A0_REV_ID
#define BCM88850_A1_REV_ID J2P_A1_REV_ID
#define BCM88850_A2_REV_ID J2P_A2_REV_ID
#define BCM88851_DEVICE_ID 0x8851
#define BCM88852_DEVICE_ID 0x8852
#define BCM88853_DEVICE_ID 0x8853
@ -1842,6 +1878,10 @@
#define BCM8884E_DEVICE_ID 0x884E
#define BCM8884F_DEVICE_ID 0x884F
#define J2X_DEVICE_ID 0x8830
#define J2X_A0_REV_ID DNXC_A0_REV_ID
#define BCM88830_DEVICE_ID J2X_DEVICE_ID
#define BCM88830_A0_REV_ID J2X_A0_REV_ID
#define BCM88831_DEVICE_ID 0x8831
#define BCM88832_DEVICE_ID 0x8832
#define BCM88833_DEVICE_ID 0x8833
@ -1858,6 +1898,16 @@
#define BCM8883E_DEVICE_ID 0x883E
#define BCM8883F_DEVICE_ID 0x883F
#ifdef BCM_DNX3_SUPPORT
#define JERICHO3_DEVICE_ID 0x8860
#define JERICHO3_A0_REV_ID DNXC_A0_REV_ID
#define BCM88860_DEVICE_ID JERICHO3_DEVICE_ID
#define BCM88860_A0_REV_ID JERICHO3_A0_REV_ID
#define Q4_DEVICE_ID 0x8870
#define Q4_A0_REV_ID DNXC_A0_REV_ID
#define BCM88870_DEVICE_ID Q4_DEVICE_ID
#define BCM88870_A0_REV_ID Q4_A0_REV_ID
#endif
#define Q2A_DEVICE_ID 0x8480
#define Q2A_A0_REV_ID DNXC_A0_REV_ID
@ -1996,15 +2046,11 @@
#define BCM88952_A0_REV_ID 0x0001
#define BCM88952_A1_REV_ID 0x0002
#define PCP_PCI_VENDOR_ID 0x1172
#define PCP_PCI_DEVICE_ID 0x4
#define ACP_PCI_VENDOR_ID 0x10ee
#define ACP_PCI_DEVICE_ID 0x7011
#define ACP_PCI_REV_ID 0x0001
#define PLX9056_DEVICE_ID 0x9056
#define BCM56890_DEVICE_ID 0xb890
#define BCM56890_A0_REV_ID 0x0001
#define BCM56880_DEVICE_ID 0xb880
#define BCM56880_A0_REV_ID 0x0001
#define BCM56880_B0_REV_ID 0x0011
@ -2044,9 +2090,8 @@
#define BCM56991_B0_REV_ID 0x0011
#define BCM56992_DEVICE_ID 0xb992
#define BCM56992_B0_REV_ID 0x0011
#define BCM56995_DEVICE_ID 0xb995
#define BCM56995_A0_REV_ID 0x0001
#define BCM56993_DEVICE_ID 0xb993
#define BCM56993_B0_REV_ID 0x0011
#define BCM56996_DEVICE_ID 0xb996
#define BCM56996_A0_REV_ID 0x0001
@ -2064,5 +2109,25 @@
#define BCM56998_DEVICE_ID 0xb998
#define BCM56998_A0_REV_ID 0x0001
#endif
#define BCM56999_DEVICE_ID 0xb999
#define BCM56999_A0_REV_ID 0x0001
#define BCM56999_B0_REV_ID 0x0011
#define BCM56995_DEVICE_ID 0xb995
#define BCM56995_A0_REV_ID 0x0001
#define BCM56995_B0_REV_ID 0x0011
#define BCM78900_DEVICE_ID 0xf900
#define BCM78900_B0_REV_ID 0x0011
#define BCM56080_DEVICE_ID 0xb080
#define BCM56080_A0_REV_ID 0x0001
#define BCM56081_DEVICE_ID 0xb081
#define BCM56081_A0_REV_ID 0x0001
#define BCM56082_DEVICE_ID 0xb082
#define BCM56082_A0_REV_ID 0x0001
#define BCM56083_DEVICE_ID 0xb083
#define BCM56083_A0_REV_ID 0x0001
#define BCM56084_DEVICE_ID 0xb084
#define BCM56084_A0_REV_ID 0x0001
#endif

2
platform/broadcom/saibcm-modules/make/Make.config
View File

@ -119,14 +119,12 @@ else # ifeq "$(HOSTTYPE)" "Windows2000PC"
ifndef SDKBUILD
SDKBUILD :=build
endif
ifdef SDK_OUTDIR
BLDROOT = ${SDK_OUTDIR}/${SDKBUILD}/$(if ${BLDCONFIG},${BLDCONFIG}/)${target}${all_suffix}${bldroot_suffix}
export DEST_DIR := ${SDK_OUTDIR}/${SDKBUILD}$(if ${BLDCONFIG},/${BLDCONFIG})$(DEST_DIR_SUFFIX)
else
BLDROOT = ${SDK}/${SDKBUILD}/$(if ${BLDCONFIG},${BLDCONFIG}/)${target}${all_suffix}${bldroot_suffix}
endif
endif # ifeq "$(HOSTTYPE)" "Windows2000PC"
# This is needed because we cannot include Make.vxworks before Make.config

12
platform/broadcom/saibcm-modules/make/Make.kernlib
View File

@ -36,17 +36,6 @@ targetlibsoname = ${lib}.so.${SHAREDLIBVER}
targetlibrealname = ${targetlibsoname}
targetlibso = ${LIBDIR}/${targetlibrealname}
ifeq ($(TOOLS),Borland)
LIBSUFFIX=lib
${LIBDIR}/%.lib: ${BORLAND_BOBJS}
$(RM) $@
$(FOREACH) -subdir "$(LIBDIR)" \
"tlib $@ $(foreach obj, $(BORLAND_LOBJS), +-$(obj))"
else # !Borland
LIBSUFFIX=a
${LIBDIR}/%.a: ${BOBJS}
@ -60,7 +49,6 @@ ifeq ($(targetbase),unix)
$(CC) -shared -Wl,-soname,${targetlibsoname} -o ${targetlibso} ${BOBJS} -lc
endif
endif # LINUX_MAKE_SHARED_LIB #
endif # !Borland
targetlib = ${LIBDIR}/${lib}.${LIBSUFFIX}

17
platform/broadcom/saibcm-modules/make/Make.lib
View File

@ -43,17 +43,6 @@ ifeq ($(FAST),1)
endif
endif
ifeq ($(TOOLS),Borland)
LIBSUFFIX=lib
${LIBDIR}/%.lib: ${BORLAND_BOBJS}
$(RM) $@
$(FOREACH) -subdir "$(LIBDIR)" \
"tlib $@ $(foreach obj, $(BORLAND_LOBJS), +-$(obj))"
else # !Borland
ifeq ($(LINUX_MAKE_SHARED_LIB),1)
LIBSUFFIX=so.${SHAREDLIBVER}
else
@ -76,8 +65,6 @@ else
$(AR) ${ARFLAGS} $@ $(sort ${BOBJS})
endif
endif # !Borland
install:: all
@ -89,3 +76,7 @@ endif
$Q$(RM) ${targetlib}
distclean:: clean
ifeq ($(DNX_FAST_MODE),1)
-include $(SDK)/tools/dnx/make/lib.mk
endif

18
platform/broadcom/saibcm-modules/make/Make.subdirs
View File

@ -38,18 +38,18 @@ ifdef QUIET
endif
${subdirs}::
$Q$(MAKE) -C $@ kernel_version=$(kernel_version) LINUX_MAKE_SHARED_LIB=${LINUX_MAKE_SHARED_LIB} SHAREDLIBVER=${SHAREDLIBVER}
$Q$(MAKE) -C $@ kernel_version=$(kernel_version) LINUX_MAKE_SHARED_LIB=${LINUX_MAKE_SHARED_LIB} SHAREDLIBVER=${SHAREDLIBVER} ${CLEAN_SUBDIRS}
ifeq "$(HOSTTYPE)" "Windows2000PC"
clean clean_d install distclean::
ifdef QUIET
@$(ECHO) Subdirectory $@ for ${subdirs}
endif
$Q$(FOREACH) "$(subdirs)" "${MAKE} -C ## $@"
else
clean clean_d install distclean::
ifdef QUIET
@$(ECHO) Subdirectory $@ for ${subdirs}
endif
@(for name in $(subdirs); do $(MAKE) -C $$name $@; done)
$(MAKE) clean_subdirs CLEAN_SUBDIRS=$@
clean_subdirs: ${subdirs}
.PHONY: clean_subdirs
ifeq ($(DNX_FAST_MODE),1)
-include $(SDK)/tools/dnx/make/subdirs.mk
endif

7
platform/broadcom/saibcm-modules/make/Makefile.linux-gts
View File

@ -45,7 +45,7 @@
#endif
# some basic path variables for tools and kernel source, etc #
XLR_TOOLS_BASE = /projects/ntsw-tools/linux/xlr-54
XLR_TOOLS_BASE ?= /projects/ntsw-tools/linux/xlr-510
TOOLCHAIN_DIR = $(XLR_TOOLS_BASE)/buildroot/host/usr
KERNDIR = $(XLR_TOOLS_BASE)/kernel/linux
# Target machine for EDK-Host defconfig
@ -112,6 +112,9 @@ ifeq "$(shell expr `echo $(CROSS_GCC_VER) | cut -f1 -d.` \== 10)" "1"
CFLAGS += -Wno-error=uninitialized
CFLAGS += -Wno-error=format-overflow
CFLAGS += -fcommon
ifeq "$(shell expr `echo $(CROSS_GCC_VER) | cut -f2 -d.` \== 2)" "1"
CFLAGS += -Wno-zero-length-bounds
endif
endif
endif # Compiler-specific CFLAGS
@ -200,5 +203,3 @@ ifneq ($(targetplat),user)
BCM_CFLAGS = -Wall
include ${SDK}/make/Makefile.linux-kernel-2_6
endif

1
platform/broadcom/saibcm-modules/make/Makefile.linux-iproc_64
View File

@ -93,7 +93,6 @@ ifeq "$(shell expr `echo $(CROSS_GCC_VER) | cut -f1 -d.` \>= 9)" "1"
CFLAGS += -Wno-address-of-packed-member
endif
ifeq "$(shell expr `echo $(CROSS_GCC_VER) | cut -f1 -d.` \== 10)" "1"
#There might be a bug in GCC10 that cannot detect initialization correctly.
CFLAGS += -Wno-error=uninitialized
CFLAGS += -Wno-error=format-overflow
CFLAGS += -fcommon

9
platform/broadcom/saibcm-modules/make/Makefile.linux-kernel
View File

@ -112,12 +112,3 @@ endif
ifdef DEBUG_PEDANTIC
DEBUG_PEDANTIC = FALSE
endif
#
# DEPEND is used as a command to generate the list of dependencies.
# The format of the output must be
# "file.o : file.c a/b/c.h d/e/f.h ...",
# if it is on multiple lines, each line must end in a backslash.
# The output MUST be on standard out.
#
DEPEND = ${CC} -M $(CFLAGS) $<

9
platform/broadcom/saibcm-modules/make/Makefile.linux-kernel-2_6
View File

@ -153,12 +153,3 @@ endif
ifdef DEBUG_PEDANTIC
DEBUG_PEDANTIC = FALSE
endif
#
# DEPEND is used as a command to generate the list of dependencies.
# The format of the output must be
# "file.o : file.c a/b/c.h d/e/f.h ...",
# if it is on multiple lines, each line must end in a backslash.
# The output MUST be on standard out.
#
DEPEND = ${CC} -M $(CFLAGS) $<

9
platform/broadcom/saibcm-modules/make/Makefile.linux-kernel-3_6
View File

@ -148,12 +148,3 @@ endif
ifdef DEBUG_PEDANTIC
DEBUG_PEDANTIC = FALSE
endif
#
# DEPEND is used as a command to generate the list of dependencies.
# The format of the output must be
# "file.o : file.c a/b/c.h d/e/f.h ...",
# if it is on multiple lines, each line must end in a backslash.
# The output MUST be on standard out.
#
DEPEND = ${CC} -M $(CFLAGS) $<

10
platform/broadcom/saibcm-modules/make/Makefile.linux-kernel-4_4
View File

@ -156,13 +156,3 @@ endif
ifdef DEBUG_PEDANTIC
DEBUG_PEDANTIC = FALSE
endif
#
# DEPEND is used as a command to generate the list of dependencies.
# The format of the output must be
# "file.o : file.c a/b/c.h d/e/f.h ...",
# if it is on multiple lines, each line must end in a backslash.
# The output MUST be on standard out.
#
DEPEND = ${CC} -M $(CFLAGS) $<

94
platform/broadcom/saibcm-modules/make/Makefile.linux-kmodule
View File

@ -41,22 +41,69 @@
MODULE := $(MOD_NAME).o
KMODULE := $(MOD_NAME).ko
PRE_COMPILED_OBJ := obj_$(MOD_NAME).o
obj-m := $(MODULE)
$(MOD_NAME)-y := $(MODULE_SYM) $(PRE_COMPILED_OBJ)
ifeq (,$(CROSS_COMPILE))
export CROSS_COMPILE
endif
SAVE_CFLAGS := ${CFLAGS}
include $(SDK)/make/Make.config
ifeq (1,$(NO_PRECOMPILED_MODULE))
# {
#
# When compiling the module within the kernel environment, we get plenty of warnings
# of pointer-to-int and the other way round. So, we need to silence them.
# Apart from that, we need a search path on the kernel's 'include' and the various
# SDK 'include' directories.
# It is not clear why they need to be repeated in EXTRA_CFLAGS (probably because
# of the compilation cycle which is done within the SDK environment).
#
ccflags-y := \
-Wno-pointer-to-int-cast \
-Wno-int-to-pointer-cast \
-I$(KERNDIR)/include \
-I$(SDK)/include \
-I$(SDK)/systems/bde/linux/include \
-I$(SDK)/systems/bde/shared/include \
-I$(SDK)/systems/linux/kernel/modules/include
include $(SDK)/make/Make.config
#
# For compilation of all module files on linux environment, make sure
# all CFLAGS are passed to the module. This was not required when a
# 'precompiled' object was used since it automatically got all these flags.
#
ccflags-y += $(KFLAGS)
ccflags-y += $(CFLAGS)
#
# Reach here if this makefile is invoked
# from systems\bde\linux\kernel (module name: linux-kernel-bde.ko).
# from systems\bde\linux\user\kernel (module name: linux-user.ko)
# from systems/linux/kernel/modules/bcm-knet (module name: linux-bcm-knet)
# from systems/linux/kernel/modules/knet-cb (module name: linux-knet-cb)
$(MOD_NAME)-y := $(MOD_OBJS)
#
# If, for any reason, the definition of CROSS_COMPILE was erased, then
# set it, again.
#
ifeq ($(CROSS_COMPILE),)
CROSS_COMPILE = /tools/bin/
endif
export CROSS_COMPILE
# }
else
# {
PRE_COMPILED_OBJ := obj_$(MOD_NAME).o
$(MOD_NAME)-y := $(MODULE_SYM) $(PRE_COMPILED_OBJ)
ifeq (,$(CROSS_COMPILE))
export CROSS_COMPILE
endif
include $(SDK)/make/Make.config
# }
endif
#
# Note that PWD will get two values, in the process of making the module,
# one for the current directory within 'build' and one for the 'base' of the kernel.
#
PWD := $(shell pwd)
ifneq ($(ARCH),)
@ -67,10 +114,10 @@ endif
# Provide an option in case kernel was built in separate directory
KERNBLDDIR ?= $(KERNDIR)
#
# Standard SDK include path for building source files that export
# kernel symbols.
#
override EXTRA_CFLAGS = -I${SDK}/include -I${SDK}/systems/linux/kernel/modules/include -I${SDK}/systems/bde/linux/include
#
# If, for any reason, the definition of LD was erased, then
@ -79,12 +126,27 @@ override EXTRA_CFLAGS = -I${SDK}/include -I${SDK}/systems/linux/kernel/modules/i
ifeq ($(LD),)
LD = $(CROSS_COMPILE)ld
endif
ifeq (1,$(NO_PRECOMPILED_MODULE))
# {
$(KMODULE):
rm -f *.o *.ko .*.cmd *.sig *.P
rm -fr .tmp_versions
if [ ! -f $(KERNBLDDIR)/NO_SUPRESS ]; then echo "# suppress warning" > .$(PRE_COMPILED_OBJ).cmd; fi
#
# This make creates the module's object. It, somehow, runs two cycls, one in SDK environment
# and one in the kernel's directory.
#
$(MAKE) -C $(KERNBLDDIR) CROSS_COMPILE=$(CROSS_COMPILE) LD=$(LD) M=$(PWD) modules
if [ ! -f Module.symvers ]; then echo "old kernel (pre-2.6.17)" > Module.symvers; fi
cp -f $(KMODULE) $(LIBDIR)
# }
else
# {
# The precopiled object needs a dummy command file to avoid warnings
# from the Kbuild scripts (modpost stage).
# Kernels before 2.6.17 do not support external module symbols files,
# so we create a dummy to prevent build failures.
#
$(KMODULE):
rm -f *.o *.ko .*.cmd
rm -fr .tmp_versions
@ -94,6 +156,8 @@ $(KMODULE):
if [ ! -f Module.symvers ]; then echo "old kernel (pre-2.6.17)" > Module.symvers; fi
cp -f $(KMODULE) $(LIBDIR)
rm -f $(PRE_COMPILED_OBJ)_shipped
# }
endif
EXTRA_CFLAGS = $(CFLAGS)
CFLAGS := ${SAVE_CFLAGS}

7
platform/broadcom/saibcm-modules/make/Makefile.linux-xlr
View File

@ -45,7 +45,7 @@
#endif
# some basic path variables for tools and kernel source, etc #
XLR_TOOLS_BASE = /projects/ntsw-tools/linux/xlr-54
XLR_TOOLS_BASE ?= /projects/ntsw-tools/linux/xlr-510
TOOLCHAIN_DIR = $(XLR_TOOLS_BASE)/buildroot/host/usr
KERNDIR = $(XLR_TOOLS_BASE)/kernel/linux
# Target machine for EDK-Host defconfig
@ -112,6 +112,9 @@ ifeq "$(shell expr `echo $(CROSS_GCC_VER) | cut -f1 -d.` \== 10)" "1"
CFLAGS += -Wno-error=uninitialized
CFLAGS += -Wno-error=format-overflow
CFLAGS += -fcommon
ifeq "$(shell expr `echo $(CROSS_GCC_VER) | cut -f2 -d.` \== 2)" "1"
CFLAGS += -Wno-zero-length-bounds
endif
endif
endif # Compiler-specific CFLAGS
@ -200,5 +203,3 @@ ifneq ($(targetplat),user)
BCM_CFLAGS = -Wall
include ${SDK}/make/Makefile.linux-kernel-2_6
endif

40
platform/broadcom/saibcm-modules/sdklt/Makefile
View File

@ -1,5 +1,5 @@
#
# $Copyright: Copyright 2018-2021 Broadcom. All rights reserved.
# $Copyright: Copyright 2018-2022 Broadcom. All rights reserved.
# The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
#
# This program is free software; you can redistribute it and/or
@ -14,6 +14,8 @@
# A copy of the GNU General Public License version 2 (GPLv2) can
# be found in the LICENSES folder.$
#
# Makefile for building Linux GPL kernel modules for SDKLT.
#
help:
@echo ''
@ -26,6 +28,7 @@ help:
@echo 'Supported make variables:'
@echo 'KDIR - Linux kernel source directory (mandatory)'
@echo 'CROSS_COPILE - Cross-compiler prefix (optional)'
@echo 'OUTPUT_DIR - Output directory (build/ by default)'
@echo ''
@echo 'Examples:'
@echo 'make -s KDIR=$$KERNEL/linux kmod'
@ -44,27 +47,42 @@ export CROSS_COMPILE
override SDK := $(CURDIR)
ifeq (,$(OUTPUT_DIR))
OUTPUT_DIR := $(CURDIR)/build
endif
BDE_BLDDIR := $(OUTPUT_DIR)/bde
KNET_BLDDIR := $(OUTPUT_DIR)/knet
KNETCB_BLDDIR := $(OUTPUT_DIR)/knetcb
LKM_CFLAGS += -UNGKNET_NETIF_MAX -DNGKNET_NETIF_MAX=1056 -UNGKNET_FILTER_MAX -DNGKNET_FILTER_MAX=1025
export LKM_CFLAGS
kmod: bde knet knetcb
bde:
$(MAKE) -C $(SDK)/linux/bde SDK=$(SDK) \
$(TARGET)
ln -sf $(SDK)/linux/bde/*.ko
LKM_BLDDIR=$(BDE_BLDDIR) $(TARGET)
ln -sf $(BDE_BLDDIR)/*.ko $(OUTPUT_DIR)
knet: bde
$(MAKE) -C $(SDK)/linux/knet SDK=$(SDK) \
KBUILD_EXTRA_SYMBOLS=$(SDK)/linux/bde/Module.symvers \
$(TARGET)
ln -sf $(SDK)/linux/knet/*.ko
KBUILD_EXTRA_SYMBOLS=$(BDE_BLDDIR)/Module.symvers \
LKM_BLDDIR=$(KNET_BLDDIR) $(TARGET)
ln -sf $(KNET_BLDDIR)/*.ko $(OUTPUT_DIR)
knetcb: knet
$(MAKE) -C $(SDK)/linux/knetcb SDK=$(SDK) \
KBUILD_EXTRA_SYMBOLS=$(SDK)/linux/knet/Module.symvers \
$(TARGET)
ln -sf $(SDK)/linux/knetcb/*.ko
KBUILD_EXTRA_SYMBOLS=$(KNET_BLDDIR)/Module.symvers \
KBUILD_EXTRA_SYMBOLS+=$(PSAMPLE_SYMVERS) \
LKM_BLDDIR=$(KNETCB_BLDDIR) $(TARGET)
ln -sf $(KNETCB_BLDDIR)/*.ko $(OUTPUT_DIR)
clean:
$(MAKE) kmod TARGET=clean
rm -f *.ko
rm -f $(OUTPUT_DIR)/*.ko
.PHONY: help kmod bde knet knetcb $(PSAMPLE) clean
distclean:
rm -rf $(OUTPUT_DIR)
.PHONY: help kmod bde knet knetcb clean distclean

8
platform/broadcom/saibcm-modules/sdklt/bcmcnet/chip/bcm56995_a0/bcm56995_a0_pdma_attach.c → platform/broadcom/saibcm-modules/sdklt/bcmcnet/chip/bcm56080_a0/bcm56080_a0_pdma_attach.c
View File

@ -1,10 +1,10 @@
/*! \file bcm56995_a0_pdma_attach.c
/*! \file bcm56080_a0_pdma_attach.c
*
* Initialize PDMA driver resources.
*
*/
/*
* $Copyright: Copyright 2018-2021 Broadcom. All rights reserved.
* $Copyright: Copyright 2018-2022 Broadcom. All rights reserved.
* The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
*
* This program is free software; you can redistribute it and/or
@ -25,13 +25,13 @@
#include <bcmcnet/bcmcnet_cmicx.h>
int
bcm56995_a0_cnet_pdma_attach(struct pdma_dev *dev)
bcm56080_a0_cnet_pdma_attach(struct pdma_dev *dev)
{
return bcmcnet_cmicx_pdma_driver_attach(dev);
}
int
bcm56995_a0_cnet_pdma_detach(struct pdma_dev *dev)
bcm56080_a0_cnet_pdma_detach(struct pdma_dev *dev)
{
return bcmcnet_cmicx_pdma_driver_detach(dev);
}

2
platform/broadcom/saibcm-modules/sdklt/bcmcnet/chip/bcm56780_a0/bcm56780_a0_pdma_attach.c
View File

@ -4,7 +4,7 @@
*
*/
/*
* $Copyright: Copyright 2018-2021 Broadcom. All rights reserved.
* $Copyright: Copyright 2018-2022 Broadcom. All rights reserved.
* The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
*
* This program is free software; you can redistribute it and/or

2
platform/broadcom/saibcm-modules/sdklt/bcmcnet/chip/bcm56880_a0/bcm56880_a0_pdma_attach.c
View File

@ -4,7 +4,7 @@
*
*/
/*
* $Copyright: Copyright 2018-2021 Broadcom. All rights reserved.
* $Copyright: Copyright 2018-2022 Broadcom. All rights reserved.
* The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
*
* This program is free software; you can redistribute it and/or

38
platform/broadcom/saibcm-modules/sdklt/bcmcnet/chip/bcm56890_a0/bcm56890_a0_pdma_attach.c Normal file
View File

@ -0,0 +1,38 @@
/*! \file bcm56890_a0_pdma_attach.c
*
* Initialize PDMA driver resources.
*
*/
/*
* $Copyright: Copyright 2018-2022 Broadcom. All rights reserved.
* The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License
* version 2 as published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* A copy of the GNU General Public License version 2 (GPLv2) can
* be found in the LICENSES folder.$
*/
#include <bcmcnet/bcmcnet_core.h>
#include <bcmcnet/bcmcnet_dev.h>
#include <bcmcnet/bcmcnet_cmicx.h>
int
bcm56890_a0_cnet_pdma_attach(struct pdma_dev *dev)
{
return bcmcnet_cmicx_pdma_driver_attach(dev);
}
int
bcm56890_a0_cnet_pdma_detach(struct pdma_dev *dev)
{
return bcmcnet_cmicx_pdma_driver_detach(dev);
}

2
platform/broadcom/saibcm-modules/sdklt/bcmcnet/chip/bcm56990_a0/bcm56990_a0_pdma_attach.c
View File

@ -4,7 +4,7 @@
*
*/
/*
* $Copyright: Copyright 2018-2021 Broadcom. All rights reserved.
* $Copyright: Copyright 2018-2022 Broadcom. All rights reserved.
* The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
*
* This program is free software; you can redistribute it and/or

2
platform/broadcom/saibcm-modules/sdklt/bcmcnet/chip/bcm56990_b0/bcm56990_b0_pdma_attach.c
View File

@ -4,7 +4,7 @@
*
*/
/*
* $Copyright: Copyright 2018-2021 Broadcom. All rights reserved.
* $Copyright: Copyright 2018-2022 Broadcom. All rights reserved.
* The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
*
* This program is free software; you can redistribute it and/or

2
platform/broadcom/saibcm-modules/sdklt/bcmcnet/chip/bcm56996_a0/bcm56996_a0_pdma_attach.c
View File

@ -4,7 +4,7 @@
*
*/
/*
* $Copyright: Copyright 2018-2021 Broadcom. All rights reserved.
* $Copyright: Copyright 2018-2022 Broadcom. All rights reserved.
* The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
*
* This program is free software; you can redistribute it and/or

2
platform/broadcom/saibcm-modules/sdklt/bcmcnet/chip/bcm56996_b0/bcm56996_b0_pdma_attach.c
View File

@ -4,7 +4,7 @@
*
*/
/*
* $Copyright: Copyright 2018-2021 Broadcom. All rights reserved.
* $Copyright: Copyright 2018-2022 Broadcom. All rights reserved.
* The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
*
* This program is free software; you can redistribute it and/or

2
platform/broadcom/saibcm-modules/sdklt/bcmcnet/chip/bcm56998_a0/bcm56998_a0_pdma_attach.c
View File

@ -4,7 +4,7 @@
*
*/
/*
* $Copyright: Copyright 2018-2021 Broadcom. All rights reserved.
* $Copyright: Copyright 2018-2022 Broadcom. All rights reserved.
* The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
*
* This program is free software; you can redistribute it and/or

38
platform/broadcom/saibcm-modules/sdklt/bcmcnet/chip/bcm56999_a0/bcm56999_a0_pdma_attach.c Normal file
View File

@ -0,0 +1,38 @@
/*! \file bcm56999_a0_pdma_attach.c
*
* Initialize PDMA driver resources.
*
*/
/*
* $Copyright: Copyright 2018-2022 Broadcom. All rights reserved.
* The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License
* version 2 as published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* A copy of the GNU General Public License version 2 (GPLv2) can
* be found in the LICENSES folder.$
*/
#include <bcmcnet/bcmcnet_core.h>
#include <bcmcnet/bcmcnet_dev.h>
#include <bcmcnet/bcmcnet_cmicx.h>
int
bcm56999_a0_cnet_pdma_attach(struct pdma_dev *dev)
{
return bcmcnet_cmicx_pdma_driver_attach(dev);
}
int
bcm56999_a0_cnet_pdma_detach(struct pdma_dev *dev)
{
return bcmcnet_cmicx_pdma_driver_detach(dev);
}

38
platform/broadcom/saibcm-modules/sdklt/bcmcnet/chip/bcm78900_b0/bcm78900_b0_pdma_attach.c Normal file
View File

@ -0,0 +1,38 @@
/*! \file bcm78900_b0_pdma_attach.c
*
* Initialize PDMA driver resources.
*
*/
/*
* $Copyright: Copyright 2018-2022 Broadcom. All rights reserved.
* The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License
* version 2 as published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* A copy of the GNU General Public License version 2 (GPLv2) can
* be found in the LICENSES folder.$
*/
#include <bcmcnet/bcmcnet_core.h>
#include <bcmcnet/bcmcnet_dev.h>
#include <bcmcnet/bcmcnet_cmicr.h>
int
bcm78900_b0_cnet_pdma_attach(struct pdma_dev *dev)
{
return bcmcnet_cmicr_pdma_driver_attach(dev);
}
int
bcm78900_b0_cnet_pdma_detach(struct pdma_dev *dev)
{
return bcmcnet_cmicr_pdma_driver_detach(dev);
}

56
platform/broadcom/saibcm-modules/sdklt/bcmcnet/hmi/cmicd/bcmcnet_cmicd_pdma_hw.c
View File

@ -4,7 +4,7 @@
*
*/
/*
* $Copyright: Copyright 2018-2021 Broadcom. All rights reserved.
* $Copyright: Copyright 2018-2022 Broadcom. All rights reserved.
* The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
*
* This program is free software; you can redistribute it and/or
@ -59,7 +59,13 @@ cmicd_pdma_intr_enable(struct pdma_hw *hw, int cmc, int chan, uint32_t mask)
{
uint32_t reg = CMICD_IRQ_STAT(cmc);
hw->dev->intr_unmask(hw->dev, cmc, chan, reg, mask);
if (hw->dev->mode == DEV_MODE_UNET || hw->dev->mode == DEV_MODE_VNET) {
hw->dev->intr_unmask(hw->dev, cmc, chan, 0, 0);
return;
}
hw->dev->ctrl.grp[cmc].irq_mask |= mask;
hw->dev->intr_unmask(hw->dev, cmc, chan, reg, 0);
}
/*!
@ -70,7 +76,13 @@ cmicd_pdma_intr_disable(struct pdma_hw *hw, int cmc, int chan, uint32_t mask)
{
uint32_t reg = CMICD_IRQ_STAT(cmc);
hw->dev->intr_mask(hw->dev, cmc, chan, reg, mask);
if (hw->dev->mode == DEV_MODE_UNET || hw->dev->mode == DEV_MODE_VNET) {
hw->dev->intr_mask(hw->dev, cmc, chan, 0, 0);
return;
}
hw->dev->ctrl.grp[cmc].irq_mask &= ~mask;
hw->dev->intr_mask(hw->dev, cmc, chan, reg, 0);
}
/*!
@ -449,61 +461,61 @@ cmicd_pdma_chan_reg_dump(struct pdma_hw *hw, int chan)
que = chan % CMICD_PDMA_CMC_CHAN;
hw->hdls.reg_rd32(hw, CMICD_PDMA_CTRL(grp, que), &val);
CNET_PR("CMIC_CMC%d_CH%d_DMA_CTRL: 0x%08x\n", grp, que, val);
CNET_INFO(hw->unit, "CMIC_CMC%d_CH%d_DMA_CTRL: 0x%08x\n", grp, que, val);
hw->hdls.reg_rd32(hw, CMICD_PDMA_DESC(grp, que), &val);
CNET_PR("CMIC_CMC%d_DMA_DESC%d: 0x%08x\n", grp, que, val);
CNET_INFO(hw->unit, "CMIC_CMC%d_DMA_DESC%d: 0x%08x\n", grp, que, val);
hw->hdls.reg_rd32(hw, CMICD_PDMA_CURR_DESC(grp, que), &val);
CNET_PR("CMIC_CMC%d_CH%d_DMA_CURR_DESC: 0x%08x\n", grp, que, val);
CNET_INFO(hw->unit, "CMIC_CMC%d_CH%d_DMA_CURR_DESC: 0x%08x\n", grp, que, val);
hw->hdls.reg_rd32(hw, CMICD_PDMA_DESC_HALT(grp, que), &val);
CNET_PR("CMIC_CMC%d_DMA_CH%d_DESC_HALT_ADDR: 0x%08x\n", grp, que, val);
CNET_INFO(hw->unit, "CMIC_CMC%d_DMA_CH%d_DESC_HALT_ADDR: 0x%08x\n", grp, que, val);
hw->hdls.reg_rd32(hw, CMICD_PDMA_COS_RX0(grp, que), &val);
CNET_PR("CMIC_CMC%d_CH%d_COS_CTRL_RX_0: 0x%08x\n", grp, que, val);
CNET_INFO(hw->unit, "CMIC_CMC%d_CH%d_COS_CTRL_RX_0: 0x%08x\n", grp, que, val);
hw->hdls.reg_rd32(hw, CMICD_PDMA_COS_RX1(grp, que), &val);
CNET_PR("CMIC_CMC%d_CH%d_COS_CTRL_RX_1: 0x%08x\n", grp, que, val);
CNET_INFO(hw->unit, "CMIC_CMC%d_CH%d_COS_CTRL_RX_1: 0x%08x\n", grp, que, val);
hw->hdls.reg_rd32(hw, CMICD_PDMA_COS_MASK0(grp), &val);
CNET_PR("CMIC_CMC%d_PROGRAMMABLE_COS_MASK0: 0x%08x\n", grp, val);
CNET_INFO(hw->unit, "CMIC_CMC%d_PROGRAMMABLE_COS_MASK0: 0x%08x\n", grp, val);
hw->hdls.reg_rd32(hw, CMICD_PDMA_COS_MASK1(grp), &val);
CNET_PR("CMIC_CMC%d_PROGRAMMABLE_COS_MASK1: 0x%08x\n", grp, val);
CNET_INFO(hw->unit, "CMIC_CMC%d_PROGRAMMABLE_COS_MASK1: 0x%08x\n", grp, val);
hw->hdls.reg_rd32(hw, CMICD_PDMA_INTR_COAL(grp, que), &val);
CNET_PR("CMIC_CMC%d_DMA_CH%d_INTR_COAL: 0x%08x\n", grp, que, val);
CNET_INFO(hw->unit, "CMIC_CMC%d_DMA_CH%d_INTR_COAL: 0x%08x\n", grp, que, val);
hw->hdls.reg_rd32(hw, CMICD_PDMA_RBUF_THRE(grp, que), &val);
CNET_PR("CMIC_CMC%d_CH%d_RXBUF_THRESHOLD_CONFIG: 0x%08x\n", grp, que, val);
CNET_INFO(hw->unit, "CMIC_CMC%d_CH%d_RXBUF_THRESHOLD_CONFIG: 0x%08x\n", grp, que, val);
hw->hdls.reg_rd32(hw, CMICD_PDMA_STAT(grp), &val);
CNET_PR("CMIC_CMC%d_DMA_STAT: 0x%08x\n", grp, val);
CNET_INFO(hw->unit, "CMIC_CMC%d_DMA_STAT: 0x%08x\n", grp, val);
hw->hdls.reg_rd32(hw, CMICD_PDMA_STAT_HI(grp), &val);
CNET_PR("CMIC_CMC%d_DMA_STAT_HI: 0x%08x\n", grp, val);
CNET_INFO(hw->unit, "CMIC_CMC%d_DMA_STAT_HI: 0x%08x\n", grp, val);
hw->hdls.reg_rd32(hw, CMICD_PDMA_STAT_CLR(grp), &val);
CNET_PR("CMIC_CMC%d_DMA_STAT_CLR: 0x%08x\n", grp, val);
CNET_INFO(hw->unit, "CMIC_CMC%d_DMA_STAT_CLR: 0x%08x\n", grp, val);
hw->hdls.reg_rd32(hw, CMICD_PDMA_COUNT_RX(grp, que), &val);
CNET_PR("CMIC_CMC%d_PKT_COUNT_CH%d_RXPKT: 0x%08x\n", grp, que, val);
CNET_INFO(hw->unit, "CMIC_CMC%d_PKT_COUNT_CH%d_RXPKT: 0x%08x\n", grp, que, val);
hw->hdls.reg_rd32(hw, CMICD_PDMA_COUNT_TX(grp, que), &val);
CNET_PR("CMIC_CMC%d_PKT_COUNT_CH%d_TXPKT: 0x%08x\n", grp, que, val);
CNET_INFO(hw->unit, "CMIC_CMC%d_PKT_COUNT_CH%d_TXPKT: 0x%08x\n", grp, que, val);
hw->hdls.reg_rd32(hw, CMICD_IRQ_STAT(grp), &val);
CNET_PR("CMIC_CMC%d_IRQ_STAT0: 0x%08x\n", grp, val);
CNET_INFO(hw->unit, "CMIC_CMC%d_IRQ_STAT0: 0x%08x\n", grp, val);
hw->hdls.reg_rd32(hw, CMICD_IRQ_PCI_MASK(grp), &val);
CNET_PR("CMIC_CMC%d_PCIE_IRQ_MASK0: 0x%08x\n", grp, val);
CNET_INFO(hw->unit, "CMIC_CMC%d_PCIE_IRQ_MASK0: 0x%08x\n", grp, val);
hw->hdls.reg_rd32(hw, CMICD_DEV_REV_ID, &val);
CNET_PR("CMIC_DEV_REV_ID: 0x%08x\n", val);
CNET_INFO(hw->unit, "CMIC_DEV_REV_ID: 0x%08x\n", val);
hw->hdls.reg_rd32(hw, CMICD_CMICM_REV_ID, &val);
CNET_PR("CMIC_CMICM_REV_ID: 0x%08x\n", val);
CNET_INFO(hw->unit, "CMIC_CMICM_REV_ID: 0x%08x\n", val);
return SHR_E_NONE;
}

223
platform/broadcom/saibcm-modules/sdklt/bcmcnet/hmi/cmicd/bcmcnet_cmicd_pdma_rxtx.c
View File

@ -38,7 +38,7 @@
*
*/
/*
* $Copyright: Copyright 2018-2021 Broadcom. All rights reserved.
* $Copyright: Copyright 2018-2022 Broadcom. All rights reserved.
* The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
*
* This program is free software; you can redistribute it and/or
@ -70,6 +70,8 @@ cmicd_rx_desc_config(struct cmicd_rx_desc *rd, uint32_t addr, uint32_t len)
rd->md.status = 0;
rd->ctrl = CMICD_DESC_CTRL_CNTLD_INTR | CMICD_DESC_CTRL_CHAIN |
CMICD_DESC_CTRL_LEN(len);
MEMORY_BARRIER;
}
/*!
@ -82,6 +84,8 @@ cmicd_tx_desc_config(struct cmicd_tx_desc *td, uint32_t addr, uint32_t len, uint
td->md.status = 0;
td->ctrl = CMICD_DESC_CTRL_CNTLD_INTR | CMICD_DESC_CTRL_CHAIN |
CMICD_DESC_CTRL_FLAGS(flags) | CMICD_DESC_CTRL_LEN(len);
MEMORY_BARRIER;
}
/*!
@ -94,6 +98,8 @@ cmicd_rx_rldesc_config(struct cmicd_rx_desc *rd, uint32_t addr)
rd->md.status = 0;
rd->ctrl = CMICD_DESC_CTRL_CNTLD_INTR | CMICD_DESC_CTRL_CHAIN |
CMICD_DESC_CTRL_RELOAD;
MEMORY_BARRIER;
}
/*!
@ -106,6 +112,8 @@ cmicd_tx_rldesc_config(struct cmicd_tx_desc *td, uint32_t addr)
td->md.status = 0;
td->ctrl = CMICD_DESC_CTRL_CNTLD_INTR | CMICD_DESC_CTRL_CHAIN |
CMICD_DESC_CTRL_RELOAD;
MEMORY_BARRIER;
}
/*!
@ -119,6 +127,8 @@ cmicd_rx_desc_chain(struct cmicd_rx_desc *rd, int chain)
} else {
rd->ctrl &= ~CMICD_DESC_CTRL_CHAIN;
}
MEMORY_BARRIER;
}
/*!
@ -132,6 +142,8 @@ cmicd_tx_desc_chain(struct cmicd_tx_desc *td, int chain)
} else {
td->ctrl &= ~CMICD_DESC_CTRL_CHAIN;
}
MEMORY_BARRIER;
}
/*!
@ -141,9 +153,7 @@ static inline int
cmicd_pdma_rx_ring_unused(struct pdma_rx_queue *rxq)
{
/* Leave one descriptor unused so as not to halt */
return rxq->curr > rxq->halt ?
rxq->curr - rxq->halt - 1 :
rxq->nb_desc + rxq->curr - rxq->halt - 1;
return (rxq->nb_desc + rxq->curr - rxq->halt - 1) % rxq->nb_desc;
}
/*!
@ -153,9 +163,7 @@ static inline int
cmicd_pdma_tx_ring_unused(struct pdma_tx_queue *txq)
{
/* Leave one descriptor unused so as not to halt */
return txq->dirt > txq->curr ?
txq->dirt - txq->curr - 1 :
txq->nb_desc + txq->dirt - txq->curr - 1;
return (txq->nb_desc + txq->dirt - txq->curr - 1) % txq->nb_desc;
}
/*!
@ -191,9 +199,9 @@ cmicd_pdma_rx_desc_init(struct pdma_hw *hw, struct pdma_rx_queue *rxq)
cmicd_rx_rldesc_config(&ring[di], rxq->ring_addr);
rxq->curr = 0;
rxq->halt = rxq->state & PDMA_RX_BATCH_REFILL ? 0 : rxq->nb_desc;
rxq->halt = rxq->nb_desc - 1;
rxq->halt_addr = rxq->ring_addr + sizeof(struct cmicd_rx_desc) * di;
rxq->halt_addr = rxq->ring_addr + sizeof(struct cmicd_rx_desc) * rxq->halt;
hw->hdls.chan_goto(hw, rxq->chan_id, rxq->halt_addr);
hw->hdls.chan_setup(hw, rxq->chan_id, rxq->ring_addr);
@ -207,7 +215,7 @@ cleanup:
cmicd_rx_desc_config(&ring[di], 0, 0);
}
CNET_PR("RX: Failed to allocate mem\n");
CNET_ERROR(hw->unit, "RX: Failed to allocate memory\n");
return SHR_E_MEMORY;
}
@ -354,26 +362,22 @@ cmicd_pdma_rx_ring_refill(struct pdma_hw *hw, struct pdma_rx_queue *rxq)
int unused = cmicd_pdma_rx_ring_unused(rxq);
dma_addr_t addr;
uint32_t halt;
int retry;
int rv;
for (halt = rxq->halt; halt < rxq->halt + unused; halt++) {
if (ring[halt % rxq->nb_desc].addr) {
continue;
}
pbuf = &rxq->pbuf[halt % rxq->nb_desc];
/* Allocate a new pktbuf */
if (!bm->rx_buf_avail(dev, rxq, pbuf)) {
retry = 5000000;
do {
rv = bm->rx_buf_alloc(dev, rxq, pbuf);
if (SHR_SUCCESS(rv)) {
break;
}
rv = bm->rx_buf_alloc(dev, rxq, pbuf);
if (SHR_FAILURE(rv)) {
rxq->stats.nomems++;
sal_usleep(1);
} while (retry--);
if (retry <= 0) {
CNET_PR("Fatal error: Rx buffer has not been allocated for 5 seconds\n");
rxq->halt = halt % rxq->nb_desc;
return rv;
CNET_ERROR(hw->unit, "Can not alloc RX buffer, %d DCBs not filled\n",
cmicd_pdma_rx_ring_unused(rxq));
break;
}
}
/* Setup the new descriptor */
@ -383,10 +387,11 @@ cmicd_pdma_rx_ring_refill(struct pdma_hw *hw, struct pdma_rx_queue *rxq)
cmicd_rx_desc_chain(&ring[halt % rxq->nb_desc], 0);
}
}
sal_spinlock_lock(rxq->lock);
rxq->halt = halt % rxq->nb_desc;
if (!(rxq->state & PDMA_RX_QUEUE_XOFF)) {
/* Move forward */
sal_spinlock_lock(rxq->lock);
if (!(rxq->status & PDMA_RX_QUEUE_XOFF)) {
/* Descriptor cherry pick */
rxq->halt_addr = rxq->ring_addr + sizeof(struct cmicd_rx_desc) * rxq->halt;
hw->hdls.chan_goto(hw, rxq->chan_id, rxq->halt_addr);
@ -422,28 +427,33 @@ cmicd_pdma_rx_ring_clean(struct pdma_hw *hw, struct pdma_rx_queue *rxq, int budg
curr = rxq->curr;
while (CMICD_DESC_STAT_DONE(ring[curr].md.status)) {
if (dev->mode == DEV_MODE_VNET && rxq->state & PDMA_RX_QUEUE_XOFF) {
break;
}
if (!(rxq->state & PDMA_RX_BATCH_REFILL) &&
!(rxq->state & PDMA_RX_QUEUE_XOFF)) {
/* Descriptor cherry pick */
rxq->halt_addr = rxq->ring_addr + sizeof(struct cmicd_rx_desc) * curr;
hw->hdls.chan_goto(hw, rxq->chan_id, rxq->halt_addr);
rxq->halt = curr;
}
if (done == budget) {
break;
}
/* Move forward */
if (!(rxq->state & PDMA_RX_BATCH_REFILL)) {
sal_spinlock_lock(rxq->lock);
if (!(rxq->status & PDMA_RX_QUEUE_XOFF)) {
/* Descriptor cherry pick */
rxq->halt_addr = rxq->ring_addr + sizeof(struct cmicd_rx_desc) * curr;
hw->hdls.chan_goto(hw, rxq->chan_id, rxq->halt_addr);
rxq->halt = curr;
}
sal_spinlock_unlock(rxq->lock);
}
/* Get the current pktbuf to process */
pbuf = &rxq->pbuf[curr];
stat = ring[curr].md.status;
len = CMICD_DESC_STAT_LEN(stat);
pkh = bm->rx_buf_get(dev, rxq, pbuf, len);
if (!pkh) {
CNET_ERROR(hw->unit, "RX buffer build failed, retry ...\n");
rxq->stats.nomems++;
return SHR_E_MEMORY;
/* Set busy state to retry */
rxq->state |= PDMA_RX_QUEUE_BUSY;
return budget;
}
/* Setup packet header */
@ -489,24 +499,33 @@ cmicd_pdma_rx_ring_clean(struct pdma_hw *hw, struct pdma_rx_queue *rxq, int budg
/* Setup the new descriptor */
if (!(rxq->state & PDMA_RX_BATCH_REFILL)) {
if (!bm->rx_buf_avail(dev, rxq, pbuf)) {
retry = 5000000;
do {
retry = 0;
while (1) {
rv = bm->rx_buf_alloc(dev, rxq, pbuf);
if (SHR_SUCCESS(rv)) {
break;
}
rxq->stats.nomems++;
sal_usleep(1);
} while (retry--);
if (retry <= 0) {
CNET_PR("Fatal error: Rx buffer has not been allocated for 5 seconds\n");
return done;
if (dev->mode == DEV_MODE_UNET || dev->mode == DEV_MODE_VNET) {
if (retry++ < 5000000) {
sal_usleep(1);
continue;
}
CNET_ERROR(hw->unit, "Fatal error: can not alloc RX buffer\n");
}
rxq->state |= PDMA_RX_BATCH_REFILL;
rxq->free_thresh = 1;
cmicd_rx_desc_config(&ring[curr], 0, 0);
CNET_ERROR(hw->unit, "RX buffer alloc failed, try batch refilling later\n");
break;
}
}
bm->rx_buf_dma(dev, rxq, pbuf, &addr);
cmicd_rx_desc_config(&ring[curr], addr, rxq->buf_size);
if (dev->flags & PDMA_CHAIN_MODE && curr == rxq->nb_desc - 1) {
cmicd_rx_desc_chain(&ring[curr], 0);
if (pbuf->dma) {
bm->rx_buf_dma(dev, rxq, pbuf, &addr);
cmicd_rx_desc_config(&ring[curr], addr, rxq->buf_size);
if (dev->flags & PDMA_CHAIN_MODE && curr == rxq->nb_desc - 1) {
cmicd_rx_desc_chain(&ring[curr], 0);
}
}
} else {
cmicd_rx_desc_config(&ring[curr], 0, 0);
@ -514,7 +533,6 @@ cmicd_pdma_rx_ring_clean(struct pdma_hw *hw, struct pdma_rx_queue *rxq, int budg
/* Notify HNET to process if needed */
if (dev->mode == DEV_MODE_VNET) {
MEMORY_BARRIER;
if (ring[(curr + rxq->nb_desc - 1) % rxq->nb_desc].md.status) {
dev->xnet_wake(dev);
}
@ -523,7 +541,7 @@ cmicd_pdma_rx_ring_clean(struct pdma_hw *hw, struct pdma_rx_queue *rxq, int budg
/* Update the indicators */
if (!(rxq->state & PDMA_RX_BATCH_REFILL) && rxq->halt != curr) {
sal_spinlock_lock(rxq->lock);
if (!(rxq->state & PDMA_RX_QUEUE_XOFF)) {
if (!(rxq->status & PDMA_RX_QUEUE_XOFF)) {
/* Descriptor cherry pick */
rxq->halt_addr = rxq->ring_addr + sizeof(struct cmicd_rx_desc) * curr;
hw->hdls.chan_goto(hw, rxq->chan_id, rxq->halt_addr);
@ -539,10 +557,12 @@ cmicd_pdma_rx_ring_clean(struct pdma_hw *hw, struct pdma_rx_queue *rxq, int budg
/* Restart DMA if in chain mode */
if (dev->flags & PDMA_CHAIN_MODE) {
if (curr == 0 && !(rxq->state & PDMA_RX_QUEUE_XOFF)) {
sal_spinlock_lock(rxq->lock);
if (curr == 0 && !(rxq->status & PDMA_RX_QUEUE_XOFF)) {
hw->hdls.chan_stop(hw, rxq->chan_id);
hw->hdls.chan_start(hw, rxq->chan_id);
}
sal_spinlock_unlock(rxq->lock);
}
}
@ -557,12 +577,10 @@ cmicd_pdma_rx_ring_clean(struct pdma_hw *hw, struct pdma_rx_queue *rxq, int budg
if (rxq->state & PDMA_RX_BATCH_REFILL &&
cmicd_pdma_rx_ring_unused(rxq) >= (int)rxq->free_thresh) {
cmicd_pdma_rx_ring_refill(hw, rxq);
}
/* Notify the other side to process */
if (dev->mode == DEV_MODE_VNET || dev->mode == DEV_MODE_HNET) {
if (done) {
dev->xnet_wake(dev);
/* If no one filled, return budget and keep polling */
if (cmicd_pdma_rx_ring_unused(rxq) == (int)(rxq->nb_desc - 1)) {
rxq->state |= PDMA_RX_QUEUE_BUSY;
return budget;
}
}
@ -669,16 +687,24 @@ cmicd_pdma_tx_ring_clean(struct pdma_hw *hw, struct pdma_tx_queue *txq, int budg
sal_spinlock_unlock(txq->lock);
}
/* Set busy state to avoid HW checking */
if (done == budget) {
txq->state |= PDMA_TX_QUEUE_BUSY;
}
/* Resume Tx if any */
sal_spinlock_lock(txq->lock);
if (txq->state & PDMA_TX_QUEUE_XOFF &&
txq->state & PDMA_TX_QUEUE_ACTIVE &&
cmicd_pdma_tx_ring_unused(txq)) {
txq->state &= ~PDMA_TX_QUEUE_XOFF;
sal_spinlock_unlock(txq->lock);
if (txq->status & PDMA_TX_QUEUE_XOFF && cmicd_pdma_tx_ring_unused(txq)) {
txq->status &= ~PDMA_TX_QUEUE_XOFF;
if (dev->suspended) {
sal_spinlock_unlock(txq->lock);
return done;
}
if (dev->tx_resume) {
dev->tx_resume(dev, txq->queue_id);
} else if (!(txq->state & PDMA_TX_QUEUE_POLL)) {
}
sal_spinlock_unlock(txq->lock);
if (!dev->tx_resume && !(txq->state & PDMA_TX_QUEUE_POLL)) {
sal_sem_give(txq->sem);
}
return done;
@ -698,14 +724,14 @@ cmicd_pdma_rx_ring_dump(struct pdma_hw *hw, struct pdma_rx_queue *rxq)
struct cmicd_rx_desc *rd;
uint32_t di;
CNET_PR("\nRX: queue=%d, chan=%d, curr=%d, halt=%d, halt@%p\n",
rxq->queue_id, rxq->chan_id, rxq->curr, rxq->halt, (void *)&ring[rxq->halt]);
CNET_PR("----------------------------------------------------------------\n");
CNET_INFO(hw->unit, "RX: queue=%d, chan=%d, curr=%d, halt=%d, halt@%p\n",
rxq->queue_id, rxq->chan_id, rxq->curr, rxq->halt, (void *)&ring[rxq->halt]);
CNET_INFO(hw->unit, "----------------------------------------------------------------\n");
for (di = 0; di < rxq->nb_desc + 1; di++) {
rd = &ring[di];
CNET_PR("DESC[%03d]: (%p)->%08x %08x ... %08x\n",
di, (void *)(unsigned long)(rxq->ring_addr + di * CMICD_PDMA_DCB_SIZE),
rd->addr, rd->ctrl, rd->md.status);
CNET_INFO(hw->unit, "DESC[%03d]: (%p)->%08x %08x ... %08x\n",
di, (void *)(unsigned long)(rxq->ring_addr + di * CMICD_PDMA_DCB_SIZE),
rd->addr, rd->ctrl, rd->md.status);
}
return SHR_E_NONE;
@ -721,14 +747,14 @@ cmicd_pdma_tx_ring_dump(struct pdma_hw *hw, struct pdma_tx_queue *txq)
struct cmicd_tx_desc *td;
uint32_t di;
CNET_PR("\nTX: queue=%d, chan=%d, curr=%d, dirt=%d, halt@%p\n",
txq->queue_id, txq->chan_id, txq->curr, txq->dirt, (void *)&ring[txq->curr]);
CNET_PR("----------------------------------------------------------------\n");
CNET_INFO(hw->unit, "TX: queue=%d, chan=%d, curr=%d, dirt=%d, halt@%p\n",
txq->queue_id, txq->chan_id, txq->curr, txq->dirt, (void *)&ring[txq->curr]);
CNET_INFO(hw->unit, "----------------------------------------------------------------\n");
for (di = 0; di < txq->nb_desc + 1; di++) {
td = &ring[di];
CNET_PR("DESC[%03d]: (%p)->%08x %08x ... %08x\n",
di, (void *)(unsigned long)(txq->ring_addr + di * CMICD_PDMA_DCB_SIZE),
td->addr, td->ctrl, td->md.status);
CNET_INFO(hw->unit, "DESC[%03d]: (%p)->%08x %08x ... %08x\n",
di, (void *)(unsigned long)(txq->ring_addr + di * CMICD_PDMA_DCB_SIZE),
td->addr, td->ctrl, td->md.status);
}
return SHR_E_NONE;
@ -771,18 +797,31 @@ cmicd_pdma_tx_vring_fetch(struct pdma_hw *hw, struct pdma_tx_queue *txq,
static inline int
cmicd_pdma_tx_ring_check(struct pdma_hw *hw, struct pdma_tx_queue *txq)
{
struct pdma_dev *dev = hw->dev;
if (dev->suspended) {
txq->stats.xoffs++;
if (dev->tx_suspend) {
dev->tx_suspend(dev, txq->queue_id);
return SHR_E_BUSY;
}
if (!(txq->state & PDMA_TX_QUEUE_POLL)) {
return SHR_E_BUSY;
}
}
if (cmicd_pdma_tx_ring_unused(txq)) {
return SHR_E_NONE;
}
sal_spinlock_lock(txq->lock);
if (!cmicd_pdma_tx_ring_unused(txq)) {
txq->state |= PDMA_TX_QUEUE_XOFF;
txq->status |= PDMA_TX_QUEUE_XOFF;
txq->stats.xoffs++;
sal_spinlock_unlock(txq->lock);
if (hw->dev->tx_suspend) {
hw->dev->tx_suspend(hw->dev, txq->queue_id);
if (dev->tx_suspend) {
dev->tx_suspend(dev, txq->queue_id);
}
sal_spinlock_unlock(txq->lock);
return SHR_E_BUSY;
}
sal_spinlock_unlock(txq->lock);
@ -818,7 +857,7 @@ cmicd_pdma_pkt_xmit(struct pdma_hw *hw, struct pdma_tx_queue *txq, void *buf)
} else {
rv = sal_sem_take(txq->sem, BCMCNET_TX_RSRC_WAIT_USEC);
if (rv == -1) {
CNET_PR("Timeout waiting for Tx resources\n");
CNET_ERROR(hw->unit, "Timeout waiting for Tx resources\n");
return SHR_E_TIMEOUT;
}
}
@ -833,7 +872,7 @@ cmicd_pdma_pkt_xmit(struct pdma_hw *hw, struct pdma_tx_queue *txq, void *buf)
}
} else {
/* Abort Tx if a fatal error happened */
if (txq->state & PDMA_TX_QUEUE_XOFF) {
if (txq->status & PDMA_TX_QUEUE_XOFF) {
sal_sem_give(txq->sem);
return SHR_E_RESOURCE;
}
@ -848,6 +887,7 @@ cmicd_pdma_pkt_xmit(struct pdma_hw *hw, struct pdma_tx_queue *txq, void *buf)
sal_spinlock_unlock(txq->mutex);
return SHR_E_EMPTY;
}
txq->state |= PDMA_TX_QUEUE_BUSY;
} else {
pbuf->adj = 0;
pkh = bm->tx_buf_get(dev, txq, pbuf, buf);
@ -858,7 +898,7 @@ cmicd_pdma_pkt_xmit(struct pdma_hw *hw, struct pdma_tx_queue *txq, void *buf)
} else {
sal_sem_give(txq->sem);
}
return SHR_E_NONE;
return SHR_E_RESOURCE;
}
bm->tx_buf_dma(dev, txq, pbuf, &addr);
flags |= pkh->attrs & PDMA_TX_HIGIG_PKT ? CMICD_DESC_TX_HIGIG_PKT : 0;
@ -872,7 +912,6 @@ cmicd_pdma_pkt_xmit(struct pdma_hw *hw, struct pdma_tx_queue *txq, void *buf)
/* Notify HNET to process if needed */
if (dev->mode == DEV_MODE_VNET) {
MEMORY_BARRIER;
if (!CMICD_DESC_CTRL_LEN(ring[(curr + txq->nb_desc - 1) % txq->nb_desc].ctrl)) {
dev->xnet_wake(dev);
}
@ -892,8 +931,8 @@ cmicd_pdma_pkt_xmit(struct pdma_hw *hw, struct pdma_tx_queue *txq, void *buf)
}
sal_usleep(1);
} while (retry--);
if (retry <= 0) {
CNET_PR("Last Tx could not be done in given time\n");
if (retry < 0) {
CNET_ERROR(hw->unit, "Last Tx could not get done in given time\n");
}
}
sal_spinlock_lock(txq->lock);
@ -919,7 +958,7 @@ cmicd_pdma_pkt_xmit(struct pdma_hw *hw, struct pdma_tx_queue *txq, void *buf)
/* Clean up ring if in polling mode */
if (txq->state & PDMA_TX_QUEUE_POLL &&
cmicd_pdma_tx_ring_unused(txq) <= (int)txq->free_thresh) {
cmicd_pdma_tx_ring_clean(hw, txq, txq->nb_desc - txq->free_thresh);
cmicd_pdma_tx_ring_clean(hw, txq, dev->ctrl.budget);
}
/* Suspend Tx if no resource */
@ -932,15 +971,15 @@ cmicd_pdma_pkt_xmit(struct pdma_hw *hw, struct pdma_tx_queue *txq, void *buf)
if (txq->state & PDMA_TX_QUEUE_POLL) {
/* In polling mode, must wait till the ring is available */
do {
cmicd_pdma_tx_ring_clean(hw, txq, txq->free_thresh);
if (!(txq->state & PDMA_TX_QUEUE_XOFF) ||
cmicd_pdma_tx_ring_clean(hw, txq, dev->ctrl.budget);
if (!(txq->status & PDMA_TX_QUEUE_XOFF) ||
!(txq->state & PDMA_TX_QUEUE_ACTIVE)) {
break;
}
sal_usleep(1);
} while (retry--);
if (retry <= 0) {
CNET_PR("Fatal error: Tx ring is full, packets have not been transmitted for 5 seconds\n");
if (retry < 0) {
CNET_ERROR(hw->unit, "Fatal error: Tx ring is full, packets can not been transmitted\n");
if (!dev->tx_suspend) {
sal_sem_give(txq->sem);
return SHR_E_RESOURCE;
@ -970,7 +1009,7 @@ static int
cmicd_pdma_rx_suspend(struct pdma_hw *hw, struct pdma_rx_queue *rxq)
{
sal_spinlock_lock(rxq->lock);
rxq->state |= PDMA_RX_QUEUE_XOFF;
rxq->status |= PDMA_RX_QUEUE_XOFF;
if (hw->dev->flags & PDMA_CHAIN_MODE) {
hw->hdls.chan_stop(hw, rxq->chan_id);
}
@ -986,7 +1025,7 @@ static int
cmicd_pdma_rx_resume(struct pdma_hw *hw, struct pdma_rx_queue *rxq)
{
sal_spinlock_lock(rxq->lock);
if (!(rxq->state & PDMA_RX_QUEUE_XOFF)) {
if (!(rxq->status & PDMA_RX_QUEUE_XOFF)) {
sal_spinlock_unlock(rxq->lock);
return SHR_E_NONE;
}
@ -1002,7 +1041,7 @@ cmicd_pdma_rx_resume(struct pdma_hw *hw, struct pdma_rx_queue *rxq)
rxq->curr = 0;
hw->hdls.chan_start(hw, rxq->chan_id);
}
rxq->state &= ~PDMA_RX_QUEUE_XOFF;
rxq->status &= ~PDMA_RX_QUEUE_XOFF;
sal_spinlock_unlock(rxq->lock);
return SHR_E_NONE;

667
platform/broadcom/saibcm-modules/sdklt/bcmcnet/hmi/cmicr/bcmcnet_cmicr_pdma_hw.c Normal file
View File

@ -0,0 +1,667 @@
/*! \file bcmcnet_cmicr_pdma_hw.c
*
* Utility routines for handling BCMCNET hardware (CMICr).
*
*/
/*
* $Copyright: Copyright 2018-2022 Broadcom. All rights reserved.
* The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License
* version 2 as published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* A copy of the GNU General Public License version 2 (GPLv2) can
* be found in the LICENSES folder.$
*/
#include <bcmcnet/bcmcnet_core.h>
#include <bcmcnet/bcmcnet_dev.h>
#include <bcmcnet/bcmcnet_rxtx.h>
#include <bcmcnet/bcmcnet_cmicr.h>
/*!
* Read 32-bit register
*/
static inline void
cmicr_pdma_reg_read32(struct pdma_hw *hw, uint32_t addr, uint32_t *data)
{
if (hw->dev->dev_read32) {
hw->dev->dev_read32(hw->dev, addr, data);
} else {
DEV_READ32(&hw->dev->ctrl, addr, data);
}
}
/*!
* Write 32-bit register
*/
static inline void
cmicr_pdma_reg_write32(struct pdma_hw *hw, uint32_t addr, uint32_t data)
{
if (hw->dev->dev_write32) {
hw->dev->dev_write32(hw->dev, addr, data);
} else {
DEV_WRITE32(&hw->dev->ctrl, addr, data);
}
}
/*!
* Enable interrupt for a channel
*/
static inline void
cmicr_pdma_intr_enable(struct pdma_hw *hw, int cmc, int chan)
{
uint32_t reg, val;
if (hw->dev->mode == DEV_MODE_UNET || hw->dev->mode == DEV_MODE_VNET) {
hw->dev->intr_unmask(hw->dev, cmc, chan, 0, 0);
return;
}
if ((cmc == 0) || (cmc == 1 && chan < 8)) {
reg = PAXB_PDMA_IRQ_ENAB_SET0;
} else {
reg = PAXB_PDMA_IRQ_ENAB_SET1;
}
val = 1 << chan;
if (cmc == 0) {
val <<= CMICR_IRQ_MASK_SHIFT;
} else if (cmc == 1 && chan < 8) {
val <<= CMICR_IRQ_MASK_SHIFT + CMICR_PDMA_CMC_CHAN;
} else {
val >>= CMICR_IRQ_MASK_SHIFT;
}
hw->dev->intr_unmask(hw->dev, cmc, chan, reg & 0xfff, val);
}
/*!
* Disable interrupt for a channel
*/
static inline void
cmicr_pdma_intr_disable(struct pdma_hw *hw, int cmc, int chan)
{
uint32_t reg, val;
if (hw->dev->mode == DEV_MODE_UNET || hw->dev->mode == DEV_MODE_VNET) {
hw->dev->intr_mask(hw->dev, cmc, chan, 0, 0);
return;
}
if ((cmc == 0) || (cmc == 1 && chan < 8)) {
reg = PAXB_PDMA_IRQ_ENAB_CLR0;
} else {
reg = PAXB_PDMA_IRQ_ENAB_CLR1;
}
val = 1 << chan;
if (cmc == 0) {
val <<= CMICR_IRQ_MASK_SHIFT;
} else if (cmc == 1 && chan < 8) {
val <<= CMICR_IRQ_MASK_SHIFT + CMICR_PDMA_CMC_CHAN;
} else {
val >>= CMICR_IRQ_MASK_SHIFT;
}
hw->dev->intr_mask(hw->dev, cmc, chan, reg & 0xfff, val);
}
/*!
* Initialize HW
*/
static int
cmicr_pdma_hw_init(struct pdma_hw *hw)
{
dev_mode_t mode = DEV_MODE_MAX;
CMIC_TOP_STATUS_EP_TO_CPU_HEADER_SIZEr_t val_header_size;
/* Temporarily upgrade work mode to get HW information in VNET mode. */
if (hw->dev->mode == DEV_MODE_VNET) {
mode = DEV_MODE_VNET;
hw->dev->mode = DEV_MODE_UNET;
}
hw->info.name = CMICR_DEV_NAME;
hw->info.dev_id = hw->dev->dev_id;
hw->info.num_cmcs = CMICR_PDMA_CMC_MAX;
hw->info.cmc_chans = CMICR_PDMA_CMC_CHAN;
hw->info.num_chans = CMICR_PDMA_CMC_MAX * CMICR_PDMA_CMC_CHAN;
hw->info.rx_dcb_size = CMICR_PDMA_DCB_SIZE;
hw->info.tx_dcb_size = CMICR_PDMA_DCB_SIZE;
hw->hdls.reg_rd32(hw, CMICR_EP_TO_CPU_HEADER_SIZE,
&CMIC_TOP_STATUS_EP_TO_CPU_HEADER_SIZEr_GET(val_header_size));
hw->info.rx_ph_size = CMIC_TOP_STATUS_EP_TO_CPU_HEADER_SIZEr_EP_TO_CPU_HEADER_SIZEf_GET(val_header_size) * 8;
hw->info.tx_ph_size = CMICR_TX_PKT_HDR_SIZE;
/* Restore work mode to VNET. */
if (mode == DEV_MODE_VNET) {
hw->dev->mode = DEV_MODE_VNET;
}
return SHR_E_NONE;
}
/*!
* Configure HW
*/
static int
cmicr_pdma_hw_config(struct pdma_hw *hw)
{
struct dev_ctrl *ctrl = &hw->dev->ctrl;
struct pdma_rx_queue *rxq = NULL;
struct pdma_tx_queue *txq = NULL;
uint32_t que_ctrl;
int grp, que;
uint32_t qi;
int ip_if_hdr_endian = 0;
CMIC_CMC_PKTDMA_CTRLr_t pktdma_ctrl;
CMIC_CMC_PKTDMA_INTR_ENABLEr_t pktdma_intr_enable;
CMIC_CMC_PKTDMA_INTR_CLRr_t pktdma_intr_clr;
CMIC_TOP_CONFIGr_t cmic_config;
CMIC_CMC_PKTDMA_INTR_ENABLEr_CLR(pktdma_intr_enable);
CMIC_CMC_PKTDMA_INTR_ENABLEr_DESC_CONTROLLED_INTR_ENABLEf_SET(pktdma_intr_enable, 1);
CMIC_CMC_PKTDMA_INTR_CLRr_CLR(pktdma_intr_clr);
CMIC_CMC_PKTDMA_INTR_CLRr_DESC_DONE_INTR_CLRf_SET(pktdma_intr_clr, 1);
CMIC_CMC_PKTDMA_INTR_CLRr_DESC_CONTROLLED_INTR_CLRf_SET(pktdma_intr_clr, 1);
CMIC_CMC_PKTDMA_INTR_CLRr_INTR_COALESCING_INTR_CLRf_SET(pktdma_intr_clr, 1);
CMIC_CMC_PKTDMA_INTR_CLRr_DYN_RCNFG_ERR_CLRf_SET(pktdma_intr_clr, 1);
for (qi = 0; qi < ctrl->nb_rxq; qi++) {
rxq = (struct pdma_rx_queue *)ctrl->rx_queue[qi];
grp = rxq->group_id;
que = rxq->chan_id % CMICR_PDMA_CMC_CHAN;
que_ctrl = ctrl->grp[grp].que_ctrl[que];
hw->hdls.reg_wr32(hw, CMICR_PDMA_INTR_CLR(grp, que),
CMIC_CMC_PKTDMA_INTR_CLRr_GET(pktdma_intr_clr));
CMIC_CMC_PKTDMA_CTRLr_CLR(pktdma_ctrl);
if (que_ctrl & PDMA_PKT_BYTE_SWAP) {
CMIC_CMC_PKTDMA_CTRLr_PKTDMA_ENDIANESSf_SET(pktdma_ctrl, 1);
}
if (que_ctrl & PDMA_OTH_BYTE_SWAP) {
CMIC_CMC_PKTDMA_CTRLr_DESC_ENDIANESSf_SET(pktdma_ctrl, 1);
}
if (que_ctrl & PDMA_HDR_BYTE_SWAP) {
CMIC_CMC_PKTDMA_CTRLr_HEADER_ENDIANESSf_SET(pktdma_ctrl, 1);
}
if (!(hw->dev->flags & PDMA_CHAIN_MODE)) {
CMIC_CMC_PKTDMA_CTRLr_ENABLE_CONTINUOUS_DMAf_SET(pktdma_ctrl, 1);
}
CMIC_CMC_PKTDMA_CTRLr_CONTIGUOUS_DESCRIPTORSf_SET(pktdma_ctrl, 1);
CMIC_CMC_PKTDMA_CTRLr_DESC_DONE_INTR_MODEf_SET(pktdma_ctrl, 1);
hw->hdls.reg_wr32(hw, CMICR_PDMA_CTRL(grp, que),
CMIC_CMC_PKTDMA_CTRLr_GET(pktdma_ctrl));
hw->hdls.reg_wr32(hw, CMICR_PDMA_INTR_ENAB(grp, que),
CMIC_CMC_PKTDMA_INTR_ENABLEr_GET(pktdma_intr_enable));
}
for (qi = 0; qi < ctrl->nb_txq; qi++) {
txq = (struct pdma_tx_queue *)ctrl->tx_queue[qi];
grp = txq->group_id;
que = txq->chan_id % CMICR_PDMA_CMC_CHAN;
que_ctrl = ctrl->grp[grp].que_ctrl[que];
hw->hdls.reg_wr32(hw, CMICR_PDMA_INTR_CLR(grp, que),
CMIC_CMC_PKTDMA_INTR_CLRr_GET(pktdma_intr_clr));
CMIC_CMC_PKTDMA_CTRLr_CLR(pktdma_ctrl);
if (que_ctrl & PDMA_PKT_BYTE_SWAP) {
CMIC_CMC_PKTDMA_CTRLr_PKTDMA_ENDIANESSf_SET(pktdma_ctrl, 1);
CMIC_CMC_PKTDMA_CTRLr_HEADER_ENDIANESSf_SET(pktdma_ctrl, 1);
ip_if_hdr_endian = 1;
}
if (que_ctrl & PDMA_OTH_BYTE_SWAP) {
CMIC_CMC_PKTDMA_CTRLr_DESC_ENDIANESSf_SET(pktdma_ctrl, 1);
}
if (que_ctrl & PDMA_HDR_BYTE_SWAP) {
ip_if_hdr_endian = 1;
}
if (!(hw->dev->flags & PDMA_CHAIN_MODE)) {
CMIC_CMC_PKTDMA_CTRLr_ENABLE_CONTINUOUS_DMAf_SET(pktdma_ctrl, 1);
}
CMIC_CMC_PKTDMA_CTRLr_CONTIGUOUS_DESCRIPTORSf_SET(pktdma_ctrl, 1);
CMIC_CMC_PKTDMA_CTRLr_DESC_DONE_INTR_MODEf_SET(pktdma_ctrl, 1);
CMIC_CMC_PKTDMA_CTRLr_DIRECTIONf_SET(pktdma_ctrl, 1);
hw->hdls.reg_wr32(hw, CMICR_PDMA_CTRL(grp, que),
CMIC_CMC_PKTDMA_CTRLr_GET(pktdma_ctrl));
hw->hdls.reg_wr32(hw, CMICR_PDMA_INTR_ENAB(grp, que),
CMIC_CMC_PKTDMA_INTR_ENABLEr_GET(pktdma_intr_enable));
}
hw->hdls.reg_rd32(hw,
CMICR_TOP_CONFIG, &CMIC_TOP_CONFIGr_GET(cmic_config));
CMIC_TOP_CONFIGr_IP_INTERFACE_HEADER_ENDIANESSf_SET(cmic_config,
ip_if_hdr_endian);
hw->hdls.reg_wr32(hw,
CMICR_TOP_CONFIG, CMIC_TOP_CONFIGr_GET(cmic_config));
return SHR_E_NONE;
}
/*!
* Reset HW
*/
static int
cmicr_pdma_hw_reset(struct pdma_hw *hw)
{
int gi, qi;
for (gi = 0; gi < hw->dev->num_groups; gi++) {
if (!hw->dev->ctrl.grp[gi].attached) {
continue;
}
for (qi = 0; qi < CMICR_PDMA_CMC_CHAN; qi++) {
if (1 << qi & hw->dev->ctrl.grp[gi].bm_rxq ||
1 << qi & hw->dev->ctrl.grp[gi].bm_txq) {
hw->hdls.reg_wr32(hw, CMICR_PDMA_CTRL(gi, qi), 0);
}
}
}
return SHR_E_NONE;
}
/*!
* Start a channel
*/
static int
cmicr_pdma_chan_start(struct pdma_hw *hw, int chan)
{
CMIC_CMC_PKTDMA_CTRLr_t pktdma_ctrl;
int grp, que;
grp = chan / CMICR_PDMA_CMC_CHAN;
que = chan % CMICR_PDMA_CMC_CHAN;
hw->hdls.reg_rd32(hw, CMICR_PDMA_CTRL(grp, que),
&CMIC_CMC_PKTDMA_CTRLr_GET(pktdma_ctrl));
CMIC_CMC_PKTDMA_CTRLr_DMA_ENf_SET(pktdma_ctrl, 1);
hw->hdls.reg_wr32(hw, CMICR_PDMA_CTRL(grp, que),
CMIC_CMC_PKTDMA_CTRLr_GET(pktdma_ctrl));
MEMORY_BARRIER;
return SHR_E_NONE;
}
/*!
* Stop a channel
*/
static int
cmicr_pdma_chan_stop(struct pdma_hw *hw, int chan)
{
CMIC_CMC_PKTDMA_CTRLr_t pktdma_ctrl;
CMIC_CMC_PKTDMA_INTR_ENABLEr_t pktdma_intr_enable;
CMIC_CMC_PKTDMA_INTR_CLRr_t pktdma_intr_clr;
CMIC_CMC_PKTDMA_STATr_t pktdma_stat;
int grp, que;
int retry = CMICR_HW_RETRY_TIMES;
grp = chan / CMICR_PDMA_CMC_CHAN;
que = chan % CMICR_PDMA_CMC_CHAN;
hw->hdls.reg_rd32(hw, CMICR_PDMA_STAT(grp, que),
&CMIC_CMC_PKTDMA_STATr_GET(pktdma_stat));
if (CMIC_CMC_PKTDMA_STATr_CHAIN_DONEf_GET(pktdma_stat)) {
hw->hdls.reg_rd32(hw, CMICR_PDMA_CTRL(grp, que),
&CMIC_CMC_PKTDMA_CTRLr_GET(pktdma_ctrl));
CMIC_CMC_PKTDMA_CTRLr_DMA_ENf_SET(pktdma_ctrl, 0);
hw->hdls.reg_wr32(hw, CMICR_PDMA_CTRL(grp, que),
CMIC_CMC_PKTDMA_CTRLr_GET(pktdma_ctrl));
return SHR_E_NONE;
}
/* if chain done is 0, abort */
hw->hdls.reg_rd32(hw, CMICR_PDMA_CTRL(grp, que),
&CMIC_CMC_PKTDMA_CTRLr_GET(pktdma_ctrl));
CMIC_CMC_PKTDMA_CTRLr_DMA_ENf_SET(pktdma_ctrl, 1);
CMIC_CMC_PKTDMA_CTRLr_ABORT_DMAf_SET(pktdma_ctrl, 1);
hw->hdls.reg_wr32(hw, CMICR_PDMA_CTRL(grp, que),
CMIC_CMC_PKTDMA_CTRLr_GET(pktdma_ctrl));
MEMORY_BARRIER;
do {
hw->hdls.reg_rd32(hw, CMICR_PDMA_STAT(grp, que),
&CMIC_CMC_PKTDMA_STATr_GET(pktdma_stat));
} while (!CMIC_CMC_PKTDMA_STATr_CHAIN_DONEf_GET(pktdma_stat) && (--retry > 0));
hw->hdls.reg_rd32(hw, CMICR_PDMA_CTRL(grp, que),
&CMIC_CMC_PKTDMA_CTRLr_GET(pktdma_ctrl));
CMIC_CMC_PKTDMA_CTRLr_DMA_ENf_SET(pktdma_ctrl, 0);
CMIC_CMC_PKTDMA_CTRLr_ABORT_DMAf_SET(pktdma_ctrl, 0);
hw->hdls.reg_wr32(hw, CMICR_PDMA_CTRL(grp, que),
CMIC_CMC_PKTDMA_CTRLr_GET(pktdma_ctrl));
MEMORY_BARRIER;
CMIC_CMC_PKTDMA_INTR_ENABLEr_CLR(pktdma_intr_enable);
hw->hdls.reg_wr32(hw, CMICR_PDMA_INTR_ENAB(grp, que),
CMIC_CMC_PKTDMA_INTR_ENABLEr_GET(pktdma_intr_enable));
MEMORY_BARRIER;
CMIC_CMC_PKTDMA_INTR_CLRr_CLR(pktdma_intr_clr);
CMIC_CMC_PKTDMA_INTR_CLRr_DESC_DONE_INTR_CLRf_SET(pktdma_intr_clr, 1);
CMIC_CMC_PKTDMA_INTR_CLRr_DESC_CONTROLLED_INTR_CLRf_SET(pktdma_intr_clr, 1);
CMIC_CMC_PKTDMA_INTR_CLRr_INTR_COALESCING_INTR_CLRf_SET(pktdma_intr_clr, 1);
CMIC_CMC_PKTDMA_INTR_CLRr_DYN_RCNFG_ERR_CLRf_SET(pktdma_intr_clr, 1);
hw->hdls.reg_wr32(hw, CMICR_PDMA_INTR_CLR(grp, que),
CMIC_CMC_PKTDMA_INTR_CLRr_GET(pktdma_intr_clr));
MEMORY_BARRIER;
return SHR_E_NONE;
}
/*!
* Setup a channel
*/
static int
cmicr_pdma_chan_setup(struct pdma_hw *hw, int chan, uint64_t addr)
{
int grp, que;
grp = chan / CMICR_PDMA_CMC_CHAN;
que = chan % CMICR_PDMA_CMC_CHAN;
hw->hdls.reg_wr32(hw, CMICR_PDMA_DESC_LO(grp, que), addr);
hw->hdls.reg_wr32(hw, CMICR_PDMA_DESC_HI(grp, que), DMA_TO_BUS_HI(addr >> 32));
MEMORY_BARRIER;
return SHR_E_NONE;
}
/*!
* Set halt point for a channel
*/
static int
cmicr_pdma_chan_goto(struct pdma_hw *hw, int chan, uint64_t addr)
{
int grp, que;
grp = chan / CMICR_PDMA_CMC_CHAN;
que = chan % CMICR_PDMA_CMC_CHAN;
hw->hdls.reg_wr32(hw, CMICR_PDMA_DESC_HALT_LO(grp, que), addr);
hw->hdls.reg_wr32(hw, CMICR_PDMA_DESC_HALT_HI(grp, que), DMA_TO_BUS_HI(addr >> 32));
MEMORY_BARRIER;
return SHR_E_NONE;
}
/*!
* Clear a channel
*/
static int
cmicr_pdma_chan_clear(struct pdma_hw *hw, int chan)
{
CMIC_CMC_PKTDMA_INTR_CLRr_t pktdma_intr_clr;
int grp, que;
grp = chan / CMICR_PDMA_CMC_CHAN;
que = chan % CMICR_PDMA_CMC_CHAN;
CMIC_CMC_PKTDMA_INTR_CLRr_CLR(pktdma_intr_clr);
CMIC_CMC_PKTDMA_INTR_CLRr_DESC_CONTROLLED_INTR_CLRf_SET(pktdma_intr_clr, 1);
hw->hdls.reg_wr32(hw, CMICR_PDMA_INTR_CLR(grp, que),
CMIC_CMC_PKTDMA_INTR_CLRr_GET(pktdma_intr_clr));
MEMORY_BARRIER;
return SHR_E_NONE;
}
/*!
* Get interrupt number for a channel
*/
static int
cmicr_pdma_chan_intr_num_get(struct pdma_hw *hw, int chan)
{
int grp, que;
const int irq_map[CMICR_PDMA_CMC_MAX][CMICR_PDMA_CMC_CHAN] =
{{CMICR_IRQ_CMC0_PKTDMA_CH0_INTR, CMICR_IRQ_CMC0_PKTDMA_CH1_INTR,
CMICR_IRQ_CMC0_PKTDMA_CH2_INTR, CMICR_IRQ_CMC0_PKTDMA_CH3_INTR,
CMICR_IRQ_CMC0_PKTDMA_CH4_INTR, CMICR_IRQ_CMC0_PKTDMA_CH5_INTR,
CMICR_IRQ_CMC0_PKTDMA_CH6_INTR, CMICR_IRQ_CMC0_PKTDMA_CH7_INTR,
CMICR_IRQ_CMC0_PKTDMA_CH8_INTR, CMICR_IRQ_CMC0_PKTDMA_CH9_INTR,
CMICR_IRQ_CMC0_PKTDMA_CH10_INTR, CMICR_IRQ_CMC0_PKTDMA_CH11_INTR,
CMICR_IRQ_CMC0_PKTDMA_CH12_INTR, CMICR_IRQ_CMC0_PKTDMA_CH13_INTR,
CMICR_IRQ_CMC0_PKTDMA_CH14_INTR, CMICR_IRQ_CMC0_PKTDMA_CH15_INTR},
{CMICR_IRQ_CMC1_PKTDMA_CH0_INTR, CMICR_IRQ_CMC1_PKTDMA_CH1_INTR,
CMICR_IRQ_CMC1_PKTDMA_CH2_INTR, CMICR_IRQ_CMC1_PKTDMA_CH3_INTR,
CMICR_IRQ_CMC1_PKTDMA_CH4_INTR, CMICR_IRQ_CMC1_PKTDMA_CH5_INTR,
CMICR_IRQ_CMC1_PKTDMA_CH6_INTR, CMICR_IRQ_CMC1_PKTDMA_CH7_INTR,
CMICR_IRQ_CMC1_PKTDMA_CH8_INTR, CMICR_IRQ_CMC1_PKTDMA_CH9_INTR,
CMICR_IRQ_CMC1_PKTDMA_CH10_INTR, CMICR_IRQ_CMC1_PKTDMA_CH11_INTR,
CMICR_IRQ_CMC1_PKTDMA_CH12_INTR, CMICR_IRQ_CMC1_PKTDMA_CH13_INTR,
CMICR_IRQ_CMC1_PKTDMA_CH14_INTR, CMICR_IRQ_CMC1_PKTDMA_CH15_INTR}};
grp = chan / CMICR_PDMA_CMC_CHAN;
que = chan % CMICR_PDMA_CMC_CHAN;
if (grp < 0 || grp >= CMICR_PDMA_CMC_MAX) {
return -1;
}
return irq_map[grp][que];
}
/*!
* Enable interrupt for a channel
*/
static int
cmicr_pdma_chan_intr_enable(struct pdma_hw *hw, int chan)
{
int grp, que;
grp = chan / CMICR_PDMA_CMC_CHAN;
que = chan % CMICR_PDMA_CMC_CHAN;
hw->dev->ctrl.grp[grp].irq_mask |= (1 << que);
cmicr_pdma_intr_enable(hw, grp, que);
return SHR_E_NONE;
}
/*!
* Disable interrupt for a channel
*/
static int
cmicr_pdma_chan_intr_disable(struct pdma_hw *hw, int chan)
{
int grp, que;
grp = chan / CMICR_PDMA_CMC_CHAN;
que = chan % CMICR_PDMA_CMC_CHAN;
hw->dev->ctrl.grp[grp].irq_mask &= ~(1 << que);
cmicr_pdma_intr_disable(hw, grp, que);
return SHR_E_NONE;
}
/*!
* Query interrupt status for a channel
*
* In group mode (interrupt processing per CMC), need to query each channel's
* interrupt status.
*
*/
static int
cmicr_pdma_chan_intr_query(struct pdma_hw *hw, int chan)
{
CMIC_CMC_PKTDMA_INTRr_t pktdma_intr;
int grp, que;
grp = chan / CMICR_PDMA_CMC_CHAN;
que = chan % CMICR_PDMA_CMC_CHAN;
hw->hdls.reg_rd32(hw, CMICR_PDMA_INTR_STAT(grp, que),
&CMIC_CMC_PKTDMA_INTRr_GET(pktdma_intr));
return CMIC_CMC_PKTDMA_INTRr_DESC_CONTROLLED_INTRf_GET(pktdma_intr);
}
/*!
* Check interrupt validity for a channel
*
* In group mode (interrupt processing per CMC), need to check each channel's
* interrupt validity based on its interrupt mask.
*
*/
static int
cmicr_pdma_chan_intr_check(struct pdma_hw *hw, int chan)
{
int grp, que;
grp = chan / CMICR_PDMA_CMC_CHAN;
que = chan % CMICR_PDMA_CMC_CHAN;
if (!(hw->dev->ctrl.grp[grp].irq_mask & (1 << que))) {
return 0;
}
return cmicr_pdma_chan_intr_query(hw, chan);
}
/*!
* Coalesce interrupt for a channel
*/
static int
cmicr_pdma_chan_intr_coalesce(struct pdma_hw *hw, int chan, int count, int timer)
{
CMIC_CMC_PKTDMA_INTR_COALr_t pktdma_intr_col;
int grp, que;
grp = chan / CMICR_PDMA_CMC_CHAN;
que = chan % CMICR_PDMA_CMC_CHAN;
CMIC_CMC_PKTDMA_INTR_COALr_CLR(pktdma_intr_col);
CMIC_CMC_PKTDMA_INTR_COALr_ENABLEf_SET(pktdma_intr_col, 1);
CMIC_CMC_PKTDMA_INTR_COALr_COUNTf_SET(pktdma_intr_col, count);
CMIC_CMC_PKTDMA_INTR_COALr_TIMERf_SET(pktdma_intr_col, timer);
hw->hdls.reg_wr32(hw, CMICR_PDMA_INTR_COAL(grp, que),
CMIC_CMC_PKTDMA_INTR_COALr_GET(pktdma_intr_col));
return SHR_E_NONE;
}
/*!
* Dump registers for a channel
*/
static int
cmicr_pdma_chan_reg_dump(struct pdma_hw *hw, int chan)
{
uint32_t val;
int grp, que;
grp = chan / CMICR_PDMA_CMC_CHAN;
que = chan % CMICR_PDMA_CMC_CHAN;
hw->hdls.reg_rd32(hw, CMICR_PDMA_CTRL(grp, que), &val);
CNET_INFO(hw->unit, "CMIC_CMC%d_DMA_CH%d_CTRL: 0x%08x\n", grp, que, val);
hw->hdls.reg_rd32(hw, CMICR_PDMA_DESC_LO(grp, que), &val);
CNET_INFO(hw->unit, "CMIC_CMC%d_DMA_CH%d_DESC_LO: 0x%08x\n", grp, que, val);
hw->hdls.reg_rd32(hw, CMICR_PDMA_DESC_HI(grp, que), &val);
CNET_INFO(hw->unit, "CMIC_CMC%d_DMA_CH%d_DESC_HI: 0x%08x\n", grp, que, val);
hw->hdls.reg_rd32(hw, CMICR_PDMA_CURR_DESC_LO(grp, que), &val);
CNET_INFO(hw->unit, "CMIC_CMC%d_DMA_CH%d_CURR_DESC_LO: 0x%08x\n", grp, que, val);
hw->hdls.reg_rd32(hw, CMICR_PDMA_CURR_DESC_HI(grp, que), &val);
CNET_INFO(hw->unit, "CMIC_CMC%d_DMA_CH%d_CURR_DESC_HI: 0x%08x\n", grp, que, val);
hw->hdls.reg_rd32(hw, CMICR_PDMA_DESC_HALT_LO(grp, que), &val);
CNET_INFO(hw->unit, "CMIC_CMC%d_DMA_CH%d_DESC_HALT_ADDR_LO: 0x%08x\n", grp, que, val);
hw->hdls.reg_rd32(hw, CMICR_PDMA_DESC_HALT_HI(grp, que), &val);
CNET_INFO(hw->unit, "CMIC_CMC%d_DMA_CH%d_DESC_HALT_ADDR_HI: 0x%08x\n", grp, que, val);
hw->hdls.reg_rd32(hw, CMICR_PDMA_COS_CTRL_RX0(grp, que), &val);
CNET_INFO(hw->unit, "CMIC_CMC%d_DMA_CH%d_COS_CTRL_RX_0: 0x%08x\n", grp, que, val);
hw->hdls.reg_rd32(hw, CMICR_PDMA_COS_CTRL_RX1(grp, que), &val);
CNET_INFO(hw->unit, "CMIC_CMC%d_DMA_CH%d_COS_CTRL_RX_1: 0x%08x\n", grp, que, val);
hw->hdls.reg_rd32(hw, CMICR_PDMA_INTR_COAL(grp, que), &val);
CNET_INFO(hw->unit, "CMIC_CMC%d_DMA_CH%d_INTR_COAL: 0x%08x\n", grp, que, val);
hw->hdls.reg_rd32(hw, CMICR_PDMA_RBUF_THRE(grp, que), &val);
CNET_INFO(hw->unit, "CMIC_CMC%d_DMA_CH%d_RXBUF_THRESHOLD_CONFIG: 0x%08x\n", grp, que, val);
hw->hdls.reg_rd32(hw, CMICR_PDMA_STAT(grp, que), &val);
CNET_INFO(hw->unit, "CMIC_CMC%d_DMA_CH%d_STAT: 0x%08x\n", grp, que, val);
hw->hdls.reg_rd32(hw, CMICR_PDMA_COUNT_RX(grp, que), &val);
CNET_INFO(hw->unit, "CMIC_CMC%d_DMA_CH%d_PKT_COUNT_RXPKT: 0x%08x\n", grp, que, val);
hw->hdls.reg_rd32(hw, CMICR_PDMA_COUNT_TX(grp, que), &val);
CNET_INFO(hw->unit, "CMIC_CMC%d_DMA_CH%d_PKT_COUNT_TXPKT: 0x%08x\n", grp, que, val);
hw->hdls.reg_rd32(hw, CMICR_PDMA_COUNT_RX_DROP(grp, que), &val);
CNET_INFO(hw->unit, "CMIC_CMC%d_DMA_CH%d_PKT_COUNT_RXPKT_DROP: 0x%08x\n", grp, que, val);
hw->hdls.reg_rd32(hw, CMICR_PDMA_INTR_ENAB(grp, que), &val);
CNET_INFO(hw->unit, "CMIC_CMC%d_INTR_ENAB: 0x%08x\n", grp, val);
hw->hdls.reg_rd32(hw, CMICR_PDMA_INTR_STAT(grp, que), &val);
CNET_INFO(hw->unit, "CMIC_CMC%d_INTR_STAT: 0x%08x\n", grp, val);
hw->hdls.reg_rd32(hw, CMICR_PDMA_INTR_CLR(grp, que), &val);
CNET_INFO(hw->unit, "CMIC_CMC%d_INTR_CLR: 0x%08x\n", grp, val);
val = hw->dev->ctrl.grp[grp].irq_mask;
CNET_INFO(hw->unit, "CMIC_CMC%d_IRQ_ENAB: 0x%08x\n", grp, val);
hw->hdls.reg_rd32(hw, CMICR_EP_TO_CPU_HEADER_SIZE, &val);
CNET_INFO(hw->unit, "CMIC_EP_TO_CPU_HEADER_SIZE: 0x%08x\n", val);
return SHR_E_NONE;
}
/*!
* Initialize function pointers
*/
int
bcmcnet_cmicr_pdma_hw_hdls_init(struct pdma_hw *hw)
{
if (!hw) {
return SHR_E_PARAM;
}
hw->hdls.reg_rd32 = cmicr_pdma_reg_read32;
hw->hdls.reg_wr32 = cmicr_pdma_reg_write32;
hw->hdls.hw_init = cmicr_pdma_hw_init;
hw->hdls.hw_config = cmicr_pdma_hw_config;
hw->hdls.hw_reset = cmicr_pdma_hw_reset;
hw->hdls.chan_start = cmicr_pdma_chan_start;
hw->hdls.chan_stop = cmicr_pdma_chan_stop;
hw->hdls.chan_setup = cmicr_pdma_chan_setup;
hw->hdls.chan_goto = cmicr_pdma_chan_goto;
hw->hdls.chan_clear = cmicr_pdma_chan_clear;
hw->hdls.chan_intr_num_get = cmicr_pdma_chan_intr_num_get;
hw->hdls.chan_intr_enable = cmicr_pdma_chan_intr_enable;
hw->hdls.chan_intr_disable = cmicr_pdma_chan_intr_disable;
hw->hdls.chan_intr_query = cmicr_pdma_chan_intr_query;
hw->hdls.chan_intr_check = cmicr_pdma_chan_intr_check;
hw->hdls.chan_intr_coalesce = cmicr_pdma_chan_intr_coalesce;
hw->hdls.chan_reg_dump = cmicr_pdma_chan_reg_dump;
return SHR_E_NONE;
}

1187
platform/broadcom/saibcm-modules/sdklt/bcmcnet/hmi/cmicr/bcmcnet_cmicr_pdma_rxtx.c Normal file
View File

File diff suppressed because it is too large Load Diff

50
platform/broadcom/saibcm-modules/sdklt/bcmcnet/hmi/cmicx/bcmcnet_cmicx_pdma_hw.c
View File

@ -4,7 +4,7 @@
*
*/
/*
* $Copyright: Copyright 2018-2021 Broadcom. All rights reserved.
* $Copyright: Copyright 2018-2022 Broadcom. All rights reserved.
* The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
*
* This program is free software; you can redistribute it and/or
@ -59,6 +59,11 @@ cmicx_pdma_intr_enable(struct pdma_hw *hw, int cmc, int chan, uint32_t mask)
{
uint32_t reg, irq_mask;
if (hw->dev->mode == DEV_MODE_UNET || hw->dev->mode == DEV_MODE_VNET) {
hw->dev->intr_unmask(hw->dev, cmc, chan, 0, 0);
return;
}
hw->dev->ctrl.grp[cmc].irq_mask |= mask;
irq_mask = hw->dev->ctrl.grp[cmc].irq_mask;
if (cmc == 0) {
@ -85,6 +90,11 @@ cmicx_pdma_intr_disable(struct pdma_hw *hw, int cmc, int chan, uint32_t mask)
{
uint32_t reg, irq_mask;
if (hw->dev->mode == DEV_MODE_UNET || hw->dev->mode == DEV_MODE_VNET) {
hw->dev->intr_mask(hw->dev, cmc, chan, 0, 0);
return;
}
hw->dev->ctrl.grp[cmc].irq_mask &= ~mask;
irq_mask = hw->dev->ctrl.grp[cmc].irq_mask;
if (cmc == 0) {
@ -480,61 +490,61 @@ cmicx_pdma_chan_reg_dump(struct pdma_hw *hw, int chan)
que = chan % CMICX_PDMA_CMC_CHAN;
hw->hdls.reg_rd32(hw, CMICX_PDMA_CTRL(grp, que), &val);
CNET_PR("CMIC_CMC%d_DMA_CH%d_CTRL: 0x%08x\n", grp, que, val);
CNET_INFO(hw->unit, "CMIC_CMC%d_DMA_CH%d_CTRL: 0x%08x\n", grp, que, val);
hw->hdls.reg_rd32(hw, CMICX_PDMA_DESC_LO(grp, que), &val);
CNET_PR("CMIC_CMC%d_DMA_CH%d_DESC_LO: 0x%08x\n", grp, que, val);
CNET_INFO(hw->unit, "CMIC_CMC%d_DMA_CH%d_DESC_LO: 0x%08x\n", grp, que, val);
hw->hdls.reg_rd32(hw, CMICX_PDMA_DESC_HI(grp, que), &val);
CNET_PR("CMIC_CMC%d_DMA_CH%d_DESC_HI: 0x%08x\n", grp, que, val);
CNET_INFO(hw->unit, "CMIC_CMC%d_DMA_CH%d_DESC_HI: 0x%08x\n", grp, que, val);
hw->hdls.reg_rd32(hw, CMICX_PDMA_CURR_DESC_LO(grp, que), &val);
CNET_PR("CMIC_CMC%d_DMA_CH%d_CURR_DESC_LO: 0x%08x\n", grp, que, val);
CNET_INFO(hw->unit, "CMIC_CMC%d_DMA_CH%d_CURR_DESC_LO: 0x%08x\n", grp, que, val);
hw->hdls.reg_rd32(hw, CMICX_PDMA_CURR_DESC_HI(grp, que), &val);
CNET_PR("CMIC_CMC%d_DMA_CH%d_CURR_DESC_HI: 0x%08x\n", grp, que, val);
CNET_INFO(hw->unit, "CMIC_CMC%d_DMA_CH%d_CURR_DESC_HI: 0x%08x\n", grp, que, val);
hw->hdls.reg_rd32(hw, CMICX_PDMA_DESC_HALT_LO(grp, que), &val);
CNET_PR("CMIC_CMC%d_DMA_CH%d_DESC_HALT_ADDR_LO: 0x%08x\n", grp, que, val);
CNET_INFO(hw->unit, "CMIC_CMC%d_DMA_CH%d_DESC_HALT_ADDR_LO: 0x%08x\n", grp, que, val);
hw->hdls.reg_rd32(hw, CMICX_PDMA_DESC_HALT_HI(grp, que), &val);
CNET_PR("CMIC_CMC%d_DMA_CH%d_DESC_HALT_ADDR_HI: 0x%08x\n", grp, que, val);
CNET_INFO(hw->unit, "CMIC_CMC%d_DMA_CH%d_DESC_HALT_ADDR_HI: 0x%08x\n", grp, que, val);
hw->hdls.reg_rd32(hw, CMICX_PDMA_COS_CTRL_RX0(grp, que), &val);
CNET_PR("CMIC_CMC%d_DMA_CH%d_COS_CTRL_RX_0: 0x%08x\n", grp, que, val);
CNET_INFO(hw->unit, "CMIC_CMC%d_DMA_CH%d_COS_CTRL_RX_0: 0x%08x\n", grp, que, val);
hw->hdls.reg_rd32(hw, CMICX_PDMA_COS_CTRL_RX1(grp, que), &val);
CNET_PR("CMIC_CMC%d_DMA_CH%d_COS_CTRL_RX_1: 0x%08x\n", grp, que, val);
CNET_INFO(hw->unit, "CMIC_CMC%d_DMA_CH%d_COS_CTRL_RX_1: 0x%08x\n", grp, que, val);
hw->hdls.reg_rd32(hw, CMICX_PDMA_INTR_COAL(grp, que), &val);
CNET_PR("CMIC_CMC%d_DMA_CH%d_INTR_COAL: 0x%08x\n", grp, que, val);
CNET_INFO(hw->unit, "CMIC_CMC%d_DMA_CH%d_INTR_COAL: 0x%08x\n", grp, que, val);
hw->hdls.reg_rd32(hw, CMICX_PDMA_RBUF_THRE(grp, que), &val);
CNET_PR("CMIC_CMC%d_DMA_CH%d_RXBUF_THRESHOLD_CONFIG: 0x%08x\n", grp, que, val);
CNET_INFO(hw->unit, "CMIC_CMC%d_DMA_CH%d_RXBUF_THRESHOLD_CONFIG: 0x%08x\n", grp, que, val);
hw->hdls.reg_rd32(hw, CMICX_PDMA_STAT(grp, que), &val);
CNET_PR("CMIC_CMC%d_DMA_CH%d_STAT: 0x%08x\n", grp, que, val);
CNET_INFO(hw->unit, "CMIC_CMC%d_DMA_CH%d_STAT: 0x%08x\n", grp, que, val);
hw->hdls.reg_rd32(hw, CMICX_PDMA_COUNT_RX(grp, que), &val);
CNET_PR("CMIC_CMC%d_DMA_CH%d_PKT_COUNT_RXPKT: 0x%08x\n", grp, que, val);
CNET_INFO(hw->unit, "CMIC_CMC%d_DMA_CH%d_PKT_COUNT_RXPKT: 0x%08x\n", grp, que, val);
hw->hdls.reg_rd32(hw, CMICX_PDMA_COUNT_TX(grp, que), &val);
CNET_PR("CMIC_CMC%d_DMA_CH%d_PKT_COUNT_TXPKT: 0x%08x\n", grp, que, val);
CNET_INFO(hw->unit, "CMIC_CMC%d_DMA_CH%d_PKT_COUNT_TXPKT: 0x%08x\n", grp, que, val);
hw->hdls.reg_rd32(hw, CMICX_PDMA_COUNT_RX_DROP(grp, que), &val);
CNET_PR("CMIC_CMC%d_DMA_CH%d_PKT_COUNT_RXPKT_DROP: 0x%08x\n", grp, que, val);
CNET_INFO(hw->unit, "CMIC_CMC%d_DMA_CH%d_PKT_COUNT_RXPKT_DROP: 0x%08x\n", grp, que, val);
hw->hdls.reg_rd32(hw, CMICX_PDMA_IRQ_STAT(grp), &val);
CNET_PR("CMIC_CMC%d_IRQ_STAT: 0x%08x\n", grp, val);
CNET_INFO(hw->unit, "CMIC_CMC%d_IRQ_STAT: 0x%08x\n", grp, val);
hw->hdls.reg_rd32(hw, CMICX_PDMA_IRQ_STAT_CLR(grp), &val);
CNET_PR("CMIC_CMC%d_IRQ_STAT_CLR: 0x%08x\n", grp, val);
CNET_INFO(hw->unit, "CMIC_CMC%d_IRQ_STAT_CLR: 0x%08x\n", grp, val);
val = hw->dev->ctrl.grp[grp].irq_mask;
CNET_PR("CMIC_CMC%d_IRQ_ENAB: 0x%08x\n", grp, val);
CNET_INFO(hw->unit, "CMIC_CMC%d_IRQ_ENAB: 0x%08x\n", grp, val);
hw->hdls.reg_rd32(hw, CMICX_EP_TO_CPU_HEADER_SIZE, &val);
CNET_PR("CMIC_EP_TO_CPU_HEADER_SIZE: 0x%08x\n", val);
CNET_INFO(hw->unit, "CMIC_EP_TO_CPU_HEADER_SIZE: 0x%08x\n", val);
return SHR_E_NONE;
}

231
platform/broadcom/saibcm-modules/sdklt/bcmcnet/hmi/cmicx/bcmcnet_cmicx_pdma_rxtx.c
View File

@ -38,7 +38,7 @@
*
*/
/*
* $Copyright: Copyright 2018-2021 Broadcom. All rights reserved.
* $Copyright: Copyright 2018-2022 Broadcom. All rights reserved.
* The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
*
* This program is free software; you can redistribute it and/or
@ -76,6 +76,8 @@ cmicx_rx_desc_config(struct cmicx_rx_desc *rd, uint64_t addr, uint32_t len)
ctrl |= CMICX_DESC_CTRL_CNTLD_INTR | CMICX_DESC_CTRL_CHAIN |
CMICX_DESC_CTRL_LEN(len);
rd->ctrl = ctrl;
MEMORY_BARRIER;
}
/*!
@ -94,6 +96,8 @@ cmicx_tx_desc_config(struct cmicx_tx_desc *td, uint64_t addr, uint32_t len, uint
ctrl |= CMICX_DESC_CTRL_CNTLD_INTR | CMICX_DESC_CTRL_CHAIN |
CMICX_DESC_CTRL_FLAGS(flags) | CMICX_DESC_CTRL_LEN(len);
td->ctrl = ctrl;
MEMORY_BARRIER;
}
/*!
@ -107,6 +111,8 @@ cmicx_rx_rldesc_config(struct cmicx_rx_desc *rd, uint64_t addr)
rd->status = 0;
rd->ctrl = CMICX_DESC_CTRL_CNTLD_INTR | CMICX_DESC_CTRL_CHAIN |
CMICX_DESC_CTRL_RELOAD;
MEMORY_BARRIER;
}
/*!
@ -120,6 +126,8 @@ cmicx_tx_rldesc_config(struct cmicx_tx_desc *td, uint64_t addr)
td->status = 0;
td->ctrl = CMICX_DESC_CTRL_CNTLD_INTR | CMICX_DESC_CTRL_CHAIN |
CMICX_DESC_CTRL_RELOAD;
MEMORY_BARRIER;
}
/*!
@ -133,6 +141,8 @@ cmicx_rx_desc_chain(struct cmicx_rx_desc *rd, int chain)
} else {
rd->ctrl &= ~CMICX_DESC_CTRL_CHAIN;
}
MEMORY_BARRIER;
}
/*!
@ -146,6 +156,8 @@ cmicx_tx_desc_chain(struct cmicx_tx_desc *td, int chain)
} else {
td->ctrl &= ~CMICX_DESC_CTRL_CHAIN;
}
MEMORY_BARRIER;
}
/*!
@ -156,6 +168,8 @@ cmicx_rx_desc_remain(struct cmicx_rx_desc *rd, uint32_t rm)
{
rd->ctrl &= ~CMICX_DESC_CTRL_REMAIN(0xf);
rd->ctrl |= CMICX_DESC_CTRL_REMAIN(rm);
MEMORY_BARRIER;
}
/*!
@ -166,6 +180,8 @@ cmicx_tx_desc_remain(struct cmicx_tx_desc *td, uint32_t rm)
{
td->ctrl &= ~CMICX_DESC_CTRL_REMAIN(0xf);
td->ctrl |= CMICX_DESC_CTRL_REMAIN(rm);
MEMORY_BARRIER;
}
/*!
@ -175,9 +191,7 @@ static inline int
cmicx_pdma_rx_ring_unused(struct pdma_rx_queue *rxq)
{
/* Leave one descriptor unused so as not to halt */
return rxq->curr > rxq->halt ?
rxq->curr - rxq->halt - 1 :
rxq->nb_desc + rxq->curr - rxq->halt - 1;
return (rxq->nb_desc + rxq->curr - rxq->halt - 1) % rxq->nb_desc;
}
/*!
@ -187,9 +201,7 @@ static inline int
cmicx_pdma_tx_ring_unused(struct pdma_tx_queue *txq)
{
/* Leave one descriptor unused so as not to halt */
return txq->dirt > txq->curr ?
txq->dirt - txq->curr - 1 :
txq->nb_desc + txq->dirt - txq->curr - 1;
return (txq->nb_desc + txq->dirt - txq->curr - 1) % txq->nb_desc;
}
/*!
@ -227,9 +239,9 @@ cmicx_pdma_rx_desc_init(struct pdma_hw *hw, struct pdma_rx_queue *rxq)
cmicx_rx_rldesc_config(&ring[di], rxq->ring_addr);
rxq->curr = 0;
rxq->halt = rxq->state & PDMA_RX_BATCH_REFILL ? 0 : rxq->nb_desc;
rxq->halt = rxq->nb_desc - 1;
rxq->halt_addr = rxq->ring_addr + sizeof(struct cmicx_rx_desc) * di;
rxq->halt_addr = rxq->ring_addr + sizeof(struct cmicx_rx_desc) * rxq->halt;
hw->hdls.chan_goto(hw, rxq->chan_id, rxq->halt_addr);
hw->hdls.chan_setup(hw, rxq->chan_id, rxq->ring_addr);
@ -243,7 +255,7 @@ cleanup:
cmicx_rx_desc_config(&ring[di], 0, 0);
}
CNET_PR("RX: Failed to allocate mem\n");
CNET_ERROR(hw->unit, "RX: Failed to allocate memory\n");
return SHR_E_MEMORY;
}
@ -394,26 +406,22 @@ cmicx_pdma_rx_ring_refill(struct pdma_hw *hw, struct pdma_rx_queue *rxq)
int unused = cmicx_pdma_rx_ring_unused(rxq);
dma_addr_t addr;
uint32_t halt;
int retry;
int rv;
for (halt = rxq->halt; halt < rxq->halt + unused; halt++) {
if (ring[halt % rxq->nb_desc].addr_lo) {
continue;
}
pbuf = &rxq->pbuf[halt % rxq->nb_desc];
/* Allocate a new pktbuf */
if (!bm->rx_buf_avail(dev, rxq, pbuf)) {
retry = 5000000;
do {
rv = bm->rx_buf_alloc(dev, rxq, pbuf);
if (SHR_SUCCESS(rv)) {
break;
}
rv = bm->rx_buf_alloc(dev, rxq, pbuf);
if (SHR_FAILURE(rv)) {
rxq->stats.nomems++;
sal_usleep(1);
} while (retry--);
if (retry <= 0) {
CNET_PR("Fatal error: Rx buffer has not been allocated for 5 seconds\n");
rxq->halt = halt % rxq->nb_desc;
return rv;
CNET_ERROR(hw->unit, "Can not alloc RX buffer, %d DCBs not filled\n",
cmicx_pdma_rx_ring_unused(rxq));
break;
}
}
/* Setup the new descriptor */
@ -423,10 +431,11 @@ cmicx_pdma_rx_ring_refill(struct pdma_hw *hw, struct pdma_rx_queue *rxq)
cmicx_rx_desc_chain(&ring[halt % rxq->nb_desc], 0);
}
}
sal_spinlock_lock(rxq->lock);
rxq->halt = halt % rxq->nb_desc;
if (!(rxq->state & PDMA_RX_QUEUE_XOFF)) {
/* Move forward */
sal_spinlock_lock(rxq->lock);
if (!(rxq->status & PDMA_RX_QUEUE_XOFF)) {
/* Descriptor cherry pick */
rxq->halt_addr = rxq->ring_addr + sizeof(struct cmicx_rx_desc) * rxq->halt;
hw->hdls.chan_goto(hw, rxq->chan_id, rxq->halt_addr);
@ -462,28 +471,33 @@ cmicx_pdma_rx_ring_clean(struct pdma_hw *hw, struct pdma_rx_queue *rxq, int budg
curr = rxq->curr;
while (CMICX_DESC_STAT_DONE(ring[curr].status)) {
if (dev->mode == DEV_MODE_VNET && rxq->state & PDMA_RX_QUEUE_XOFF) {
break;
}
if (!(rxq->state & PDMA_RX_BATCH_REFILL) &&
!(rxq->state & PDMA_RX_QUEUE_XOFF)) {
/* Descriptor cherry pick */
rxq->halt_addr = rxq->ring_addr + sizeof(struct cmicx_rx_desc) * curr;
hw->hdls.chan_goto(hw, rxq->chan_id, rxq->halt_addr);
rxq->halt = curr;
}
if (done == budget) {
break;
}
/* Move forward */
if (!(rxq->state & PDMA_RX_BATCH_REFILL)) {
sal_spinlock_lock(rxq->lock);
if (!(rxq->status & PDMA_RX_QUEUE_XOFF)) {
/* Descriptor cherry pick */
rxq->halt_addr = rxq->ring_addr + sizeof(struct cmicx_rx_desc) * curr;
hw->hdls.chan_goto(hw, rxq->chan_id, rxq->halt_addr);
rxq->halt = curr;
}
sal_spinlock_unlock(rxq->lock);
}
/* Get the current pktbuf to process */
pbuf = &rxq->pbuf[curr];
stat = ring[curr].status;
len = CMICX_DESC_STAT_LEN(stat);
pkh = bm->rx_buf_get(dev, rxq, pbuf, len);
if (!pkh) {
CNET_ERROR(hw->unit, "RX buffer build failed, retry ...\n");
rxq->stats.nomems++;
return SHR_E_MEMORY;
/* Set busy state to retry */
rxq->state |= PDMA_RX_QUEUE_BUSY;
return budget;
}
/* Setup packet header */
@ -525,24 +539,33 @@ cmicx_pdma_rx_ring_clean(struct pdma_hw *hw, struct pdma_rx_queue *rxq, int budg
/* Setup the new descriptor */
if (!(rxq->state & PDMA_RX_BATCH_REFILL)) {
if (!bm->rx_buf_avail(dev, rxq, pbuf)) {
retry = 5000000;
do {
retry = 0;
while (1) {
rv = bm->rx_buf_alloc(dev, rxq, pbuf);
if (SHR_SUCCESS(rv)) {
break;
}
rxq->stats.nomems++;
sal_usleep(1);
} while (retry--);
if (retry <= 0) {
CNET_PR("Fatal error: Rx buffer has not been allocated for 5 seconds\n");
return done;
if (dev->mode == DEV_MODE_UNET || dev->mode == DEV_MODE_VNET) {
if (retry++ < 5000000) {
sal_usleep(1);
continue;
}
CNET_ERROR(hw->unit, "Fatal error: can not alloc RX buffer\n");
}
rxq->state |= PDMA_RX_BATCH_REFILL;
rxq->free_thresh = 1;
cmicx_rx_desc_config(&ring[curr], 0, 0);
CNET_ERROR(hw->unit, "RX buffer alloc failed, try batch refilling later\n");
break;
}
}
bm->rx_buf_dma(dev, rxq, pbuf, &addr);
cmicx_rx_desc_config(&ring[curr], addr, rxq->buf_size);
if (dev->flags & PDMA_CHAIN_MODE && curr == rxq->nb_desc - 1) {
cmicx_rx_desc_chain(&ring[curr], 0);
if (pbuf->dma) {
bm->rx_buf_dma(dev, rxq, pbuf, &addr);
cmicx_rx_desc_config(&ring[curr], addr, rxq->buf_size);
if (dev->flags & PDMA_CHAIN_MODE && curr == rxq->nb_desc - 1) {
cmicx_rx_desc_chain(&ring[curr], 0);
}
}
} else {
cmicx_rx_desc_config(&ring[curr], 0, 0);
@ -550,7 +573,6 @@ cmicx_pdma_rx_ring_clean(struct pdma_hw *hw, struct pdma_rx_queue *rxq, int budg
/* Notify HNET to process if needed */
if (dev->mode == DEV_MODE_VNET) {
MEMORY_BARRIER;
if (ring[(curr + rxq->nb_desc - 1) % rxq->nb_desc].status) {
dev->xnet_wake(dev);
}
@ -559,7 +581,7 @@ cmicx_pdma_rx_ring_clean(struct pdma_hw *hw, struct pdma_rx_queue *rxq, int budg
/* Update the indicators */
if (!(rxq->state & PDMA_RX_BATCH_REFILL) && rxq->halt != curr) {
sal_spinlock_lock(rxq->lock);
if (!(rxq->state & PDMA_RX_QUEUE_XOFF)) {
if (!(rxq->status & PDMA_RX_QUEUE_XOFF)) {
/* Descriptor cherry pick */
rxq->halt_addr = rxq->ring_addr + sizeof(struct cmicx_rx_desc) * curr;
hw->hdls.chan_goto(hw, rxq->chan_id, rxq->halt_addr);
@ -575,10 +597,12 @@ cmicx_pdma_rx_ring_clean(struct pdma_hw *hw, struct pdma_rx_queue *rxq, int budg
/* Restart DMA if in chain mode */
if (dev->flags & PDMA_CHAIN_MODE) {
if (curr == 0 && !(rxq->state & PDMA_RX_QUEUE_XOFF)) {
sal_spinlock_lock(rxq->lock);
if (curr == 0 && !(rxq->status & PDMA_RX_QUEUE_XOFF)) {
hw->hdls.chan_stop(hw, rxq->chan_id);
hw->hdls.chan_start(hw, rxq->chan_id);
}
sal_spinlock_unlock(rxq->lock);
}
}
@ -593,12 +617,10 @@ cmicx_pdma_rx_ring_clean(struct pdma_hw *hw, struct pdma_rx_queue *rxq, int budg
if (rxq->state & PDMA_RX_BATCH_REFILL &&
cmicx_pdma_rx_ring_unused(rxq) >= (int)rxq->free_thresh) {
cmicx_pdma_rx_ring_refill(hw, rxq);
}
/* Notify the other side to process */
if (dev->mode == DEV_MODE_VNET || dev->mode == DEV_MODE_HNET) {
if (done) {
dev->xnet_wake(dev);
/* If no one filled, return budget and keep polling */
if (cmicx_pdma_rx_ring_unused(rxq) == (int)(rxq->nb_desc - 1)) {
rxq->state |= PDMA_RX_QUEUE_BUSY;
return budget;
}
}
@ -705,16 +727,24 @@ cmicx_pdma_tx_ring_clean(struct pdma_hw *hw, struct pdma_tx_queue *txq, int budg
sal_spinlock_unlock(txq->lock);
}
/* Set busy state to avoid HW checking */
if (done == budget) {
txq->state |= PDMA_TX_QUEUE_BUSY;
}
/* Resume Tx if any */
sal_spinlock_lock(txq->lock);
if (txq->state & PDMA_TX_QUEUE_XOFF &&
txq->state & PDMA_TX_QUEUE_ACTIVE &&
cmicx_pdma_tx_ring_unused(txq)) {
txq->state &= ~PDMA_TX_QUEUE_XOFF;
sal_spinlock_unlock(txq->lock);
if (txq->status & PDMA_TX_QUEUE_XOFF && cmicx_pdma_tx_ring_unused(txq)) {
txq->status &= ~PDMA_TX_QUEUE_XOFF;
if (dev->suspended) {
sal_spinlock_unlock(txq->lock);
return done;
}
if (dev->tx_resume) {
dev->tx_resume(dev, txq->queue_id);
} else if (!(txq->state & PDMA_TX_QUEUE_POLL)) {
}
sal_spinlock_unlock(txq->lock);
if (!dev->tx_resume && !(txq->state & PDMA_TX_QUEUE_POLL)) {
sal_sem_give(txq->sem);
}
return done;
@ -734,14 +764,14 @@ cmicx_pdma_rx_ring_dump(struct pdma_hw *hw, struct pdma_rx_queue *rxq)
struct cmicx_rx_desc *rd;
uint32_t di;
CNET_PR("\nRX: queue=%d, chan=%d, curr=%d, halt=%d, halt@%p\n",
rxq->queue_id, rxq->chan_id, rxq->curr, rxq->halt, (void *)&ring[rxq->halt]);
CNET_PR("----------------------------------------------------------------\n");
CNET_INFO(hw->unit, "RX: queue=%d, chan=%d, curr=%d, halt=%d, halt@%p\n",
rxq->queue_id, rxq->chan_id, rxq->curr, rxq->halt, (void *)&ring[rxq->halt]);
CNET_INFO(hw->unit, "----------------------------------------------------------------\n");
for (di = 0; di < rxq->nb_desc + 1; di++) {
rd = &ring[di];
CNET_PR("DESC[%03d]: (%p)->%08x %08x %08x %08x\n",
di, (void *)(unsigned long)(rxq->ring_addr + di * CMICX_PDMA_DCB_SIZE),
rd->addr_lo, rd->addr_hi, rd->ctrl, rd->status);
CNET_INFO(hw->unit, "DESC[%03d]: (%p)->%08x %08x %08x %08x\n",
di, (void *)(unsigned long)(rxq->ring_addr + di * CMICX_PDMA_DCB_SIZE),
rd->addr_lo, rd->addr_hi, rd->ctrl, rd->status);
}
return SHR_E_NONE;
@ -757,14 +787,14 @@ cmicx_pdma_tx_ring_dump(struct pdma_hw *hw, struct pdma_tx_queue *txq)
struct cmicx_tx_desc *td;
uint32_t di;
CNET_PR("\nTX: queue=%d, chan=%d, curr=%d, dirt=%d, halt@%p\n",
txq->queue_id, txq->chan_id, txq->curr, txq->dirt, (void *)&ring[txq->curr]);
CNET_PR("----------------------------------------------------------------\n");
CNET_INFO(hw->unit, "TX: queue=%d, chan=%d, curr=%d, dirt=%d, halt@%p\n",
txq->queue_id, txq->chan_id, txq->curr, txq->dirt, (void *)&ring[txq->curr]);
CNET_INFO(hw->unit, "----------------------------------------------------------------\n");
for (di = 0; di < txq->nb_desc + 1; di++) {
td = &ring[di];
CNET_PR("DESC[%03d]: (%p)->%08x %08x %08x %08x\n",
di, (void *)(unsigned long)(txq->ring_addr + di * CMICX_PDMA_DCB_SIZE),
td->addr_lo, td->addr_hi, td->ctrl, td->status);
CNET_INFO(hw->unit, "DESC[%03d]: (%p)->%08x %08x %08x %08x\n",
di, (void *)(unsigned long)(txq->ring_addr + di * CMICX_PDMA_DCB_SIZE),
td->addr_lo, td->addr_hi, td->ctrl, td->status);
}
return SHR_E_NONE;
@ -781,6 +811,7 @@ cmicx_pdma_tx_vring_fetch(struct pdma_hw *hw, struct pdma_tx_queue *txq,
struct cmicx_tx_desc *ring = (struct cmicx_tx_desc *)txq->ring;
struct pdma_tx_queue *vtxq = NULL;
struct cmicx_tx_desc *vring = NULL;
uint32_t rm;
vtxq = (struct pdma_tx_queue *)dev->ctrl.vnet_txq[txq->queue_id];
vring = (struct cmicx_tx_desc *)vtxq->ring;
@ -789,7 +820,10 @@ cmicx_pdma_tx_vring_fetch(struct pdma_hw *hw, struct pdma_tx_queue *txq,
}
/* Fetch vring descriptor */
rm = ring[txq->curr].ctrl & CMICX_DESC_CTRL_REMAIN(0xf);
sal_memcpy(&ring[txq->curr], &vring[vtxq->curr], sizeof(struct cmicx_tx_desc));
ring[txq->curr].ctrl &= ~CMICX_DESC_CTRL_REMAIN(0xf);
ring[txq->curr].ctrl |= rm;
vring[vtxq->curr].ctrl &= ~CMICX_DESC_CTRL_LEN(-1);
MEMORY_BARRIER;
@ -807,18 +841,31 @@ cmicx_pdma_tx_vring_fetch(struct pdma_hw *hw, struct pdma_tx_queue *txq,
static inline int
cmicx_pdma_tx_ring_check(struct pdma_hw *hw, struct pdma_tx_queue *txq)
{
struct pdma_dev *dev = hw->dev;
if (dev->suspended) {
txq->stats.xoffs++;
if (dev->tx_suspend) {
dev->tx_suspend(dev, txq->queue_id);
return SHR_E_BUSY;
}
if (!(txq->state & PDMA_TX_QUEUE_POLL)) {
return SHR_E_BUSY;
}
}
if (cmicx_pdma_tx_ring_unused(txq)) {
return SHR_E_NONE;
}
sal_spinlock_lock(txq->lock);
if (!cmicx_pdma_tx_ring_unused(txq)) {
txq->state |= PDMA_TX_QUEUE_XOFF;
txq->status |= PDMA_TX_QUEUE_XOFF;
txq->stats.xoffs++;
sal_spinlock_unlock(txq->lock);
if (hw->dev->tx_suspend) {
hw->dev->tx_suspend(hw->dev, txq->queue_id);
if (dev->tx_suspend) {
dev->tx_suspend(dev, txq->queue_id);
}
sal_spinlock_unlock(txq->lock);
return SHR_E_BUSY;
}
sal_spinlock_unlock(txq->lock);
@ -854,7 +901,7 @@ cmicx_pdma_pkt_xmit(struct pdma_hw *hw, struct pdma_tx_queue *txq, void *buf)
} else {
rv = sal_sem_take(txq->sem, BCMCNET_TX_RSRC_WAIT_USEC);
if (rv == -1) {
CNET_PR("Timeout waiting for Tx resources\n");
CNET_ERROR(hw->unit, "Timeout waiting for Tx resources\n");
return SHR_E_TIMEOUT;
}
}
@ -869,7 +916,7 @@ cmicx_pdma_pkt_xmit(struct pdma_hw *hw, struct pdma_tx_queue *txq, void *buf)
}
} else {
/* Abort Tx if a fatal error happened */
if (txq->state & PDMA_TX_QUEUE_XOFF) {
if (txq->status & PDMA_TX_QUEUE_XOFF) {
sal_sem_give(txq->sem);
return SHR_E_RESOURCE;
}
@ -884,6 +931,7 @@ cmicx_pdma_pkt_xmit(struct pdma_hw *hw, struct pdma_tx_queue *txq, void *buf)
sal_spinlock_unlock(txq->mutex);
return SHR_E_EMPTY;
}
txq->state |= PDMA_TX_QUEUE_BUSY;
} else {
pbuf->adj = 1;
pkh = bm->tx_buf_get(dev, txq, pbuf, buf);
@ -894,7 +942,7 @@ cmicx_pdma_pkt_xmit(struct pdma_hw *hw, struct pdma_tx_queue *txq, void *buf)
} else {
sal_sem_give(txq->sem);
}
return SHR_E_NONE;
return SHR_E_RESOURCE;
}
bm->tx_buf_dma(dev, txq, pbuf, &addr);
flags |= pkh->attrs & PDMA_TX_HIGIG_PKT ? CMICX_DESC_TX_HIGIG_PKT : 0;
@ -904,7 +952,6 @@ cmicx_pdma_pkt_xmit(struct pdma_hw *hw, struct pdma_tx_queue *txq, void *buf)
/* Notify HNET to process if needed */
if (dev->mode == DEV_MODE_VNET) {
MEMORY_BARRIER;
if (!CMICX_DESC_CTRL_LEN(ring[(curr + txq->nb_desc - 1) % txq->nb_desc].ctrl)) {
dev->xnet_wake(dev);
}
@ -924,8 +971,8 @@ cmicx_pdma_pkt_xmit(struct pdma_hw *hw, struct pdma_tx_queue *txq, void *buf)
}
sal_usleep(1);
} while (retry--);
if (retry <= 0) {
CNET_PR("Last Tx could not be done in given time\n");
if (retry < 0) {
CNET_ERROR(hw->unit, "Last Tx could not get done in given time\n");
}
}
sal_spinlock_lock(txq->lock);
@ -951,7 +998,7 @@ cmicx_pdma_pkt_xmit(struct pdma_hw *hw, struct pdma_tx_queue *txq, void *buf)
/* Clean up ring if in polling mode */
if (txq->state & PDMA_TX_QUEUE_POLL &&
cmicx_pdma_tx_ring_unused(txq) <= (int)txq->free_thresh) {
cmicx_pdma_tx_ring_clean(hw, txq, txq->nb_desc - txq->free_thresh);
cmicx_pdma_tx_ring_clean(hw, txq, dev->ctrl.budget);
}
/* Suspend Tx if no resource */
@ -964,15 +1011,15 @@ cmicx_pdma_pkt_xmit(struct pdma_hw *hw, struct pdma_tx_queue *txq, void *buf)
if (txq->state & PDMA_TX_QUEUE_POLL) {
/* In polling mode, must wait till the ring is available */
do {
cmicx_pdma_tx_ring_clean(hw, txq, txq->free_thresh);
if (!(txq->state & PDMA_TX_QUEUE_XOFF) ||
cmicx_pdma_tx_ring_clean(hw, txq, dev->ctrl.budget);
if (!(txq->status & PDMA_TX_QUEUE_XOFF) ||
!(txq->state & PDMA_TX_QUEUE_ACTIVE)) {
break;
}
sal_usleep(1);
} while (retry--);
if (retry <= 0) {
CNET_PR("Fatal error: Tx ring is full, packets have not been transmitted for 5 seconds\n");
if (retry < 0) {
CNET_ERROR(hw->unit, "Fatal error: Tx ring is full, packets can not been transmitted\n");
if (!dev->tx_suspend) {
sal_sem_give(txq->sem);
return SHR_E_RESOURCE;
@ -1002,7 +1049,7 @@ static int
cmicx_pdma_rx_suspend(struct pdma_hw *hw, struct pdma_rx_queue *rxq)
{
sal_spinlock_lock(rxq->lock);
rxq->state |= PDMA_RX_QUEUE_XOFF;
rxq->status |= PDMA_RX_QUEUE_XOFF;
if (hw->dev->flags & PDMA_CHAIN_MODE) {
hw->hdls.chan_stop(hw, rxq->chan_id);
}
@ -1018,7 +1065,7 @@ static int
cmicx_pdma_rx_resume(struct pdma_hw *hw, struct pdma_rx_queue *rxq)
{
sal_spinlock_lock(rxq->lock);
if (!(rxq->state & PDMA_RX_QUEUE_XOFF)) {
if (!(rxq->status & PDMA_RX_QUEUE_XOFF)) {
sal_spinlock_unlock(rxq->lock);
return SHR_E_NONE;
}
@ -1034,7 +1081,7 @@ cmicx_pdma_rx_resume(struct pdma_hw *hw, struct pdma_rx_queue *rxq)
rxq->curr = 0;
hw->hdls.chan_start(hw, rxq->chan_id);
}
rxq->state &= ~PDMA_RX_QUEUE_XOFF;
rxq->status &= ~PDMA_RX_QUEUE_XOFF;
sal_spinlock_unlock(rxq->lock);
return SHR_E_NONE;

2
platform/broadcom/saibcm-modules/sdklt/bcmcnet/include/bcmcnet/bcmcnet_cmicd.h
View File

@ -4,7 +4,7 @@
*
*/
/*
* $Copyright: Copyright 2018-2021 Broadcom. All rights reserved.
* $Copyright: Copyright 2018-2022 Broadcom. All rights reserved.
* The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
*
* This program is free software; you can redistribute it and/or

199
platform/broadcom/saibcm-modules/sdklt/bcmcnet/include/bcmcnet/bcmcnet_cmicr.h Normal file
View File

@ -0,0 +1,199 @@
/*! \file bcmcnet_cmicr.h
*
* CMICr registers and descriptors definitions.
*
*/
/*
* $Copyright: Copyright 2018-2022 Broadcom. All rights reserved.
* The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License
* version 2 as published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* A copy of the GNU General Public License version 2 (GPLv2) can
* be found in the LICENSES folder.$
*/
#ifndef BCMCNET_CMICR_H
#define BCMCNET_CMICR_H
#include <bcmcnet/bcmcnet_cmicr_acc.h>
/*!
* \name CMICR PDMA HW definitions
*/
/*! \{ */
/*! CMICR CMC number */
#define CMICR_PDMA_CMC_MAX 2
/*! CMICR CMC PDMA channels */
#define CMICR_PDMA_CMC_CHAN 16
/*! CMICR PDMA DCB size */
#define CMICR_PDMA_DCB_SIZE RX_DCB_SIZE
/*! \} */
/*!
* \name CMICR PCIe device address definitions
*/
/*! \{ */
/*! CMICR PCIE offset */
#define CMICR_PCIE_SO_OFFSET 0x10000000
/*! Higher DMA address to bus address */
#define DMA_TO_BUS_HI(dma) ((dma) | CMICR_PCIE_SO_OFFSET)
/*! Higher bus address to DMA address */
#define BUS_TO_DMA_HI(bus) ((bus) & ~CMICR_PCIE_SO_OFFSET)
/*! \} */
/*! \} */
/*!
* \name CMICR PDMA register address
*/
/*! \{ */
/*! Base address */
#define CMICR_GRP_BASE(g) (0x00000000 + 0x2000 * g)
/*! Control register address */
#define CMICR_PDMA_CTRL(g, q) (CMICR_GRP_BASE(g) + CMIC_CMC_PKTDMA_CTRLr_OFFSET + q * 0x80)
/*! Descriptor Address Lower register address */
#define CMICR_PDMA_DESC_LO(g, q) (CMICR_GRP_BASE(g) + CMIC_CMC_PKTDMA_DESC_ADDR_LOr_OFFSET + q * 0x80)
/*! Descriptor Address Higher register address */
#define CMICR_PDMA_DESC_HI(g, q) (CMICR_GRP_BASE(g) + CMIC_CMC_PKTDMA_DESC_ADDR_HIr_OFFSET + q * 0x80)
/*! Descriptor Halt Address Lower register address */
#define CMICR_PDMA_DESC_HALT_LO(g, q) (CMICR_GRP_BASE(g) + CMIC_CMC_PKTDMA_DESC_HALT_ADDR_LOr_OFFSET + q * 0x80)
/*! Descriptor Halt Address Higher register address */
#define CMICR_PDMA_DESC_HALT_HI(g, q) (CMICR_GRP_BASE(g) + CMIC_CMC_PKTDMA_DESC_HALT_ADDR_HIr_OFFSET + q * 0x80)
/*! Status register address */
#define CMICR_PDMA_STAT(g, q) (CMICR_GRP_BASE(g) + CMIC_CMC_PKTDMA_STATr_OFFSET + q * 0x80)
/*! Interrupt status register address */
#define CMICR_PDMA_INTR_STAT(g, q) (CMICR_GRP_BASE(g) + CMIC_CMC_PKTDMA_INTRr_OFFSET + q * 0x80)
/*! Interrupt enable register address */
#define CMICR_PDMA_INTR_ENAB(g, q) (CMICR_GRP_BASE(g) + CMIC_CMC_PKTDMA_INTR_ENABLEr_OFFSET + q * 0x80)
/*! Interrupt clear register address */
#define CMICR_PDMA_INTR_CLR(g, q) (CMICR_GRP_BASE(g) + CMIC_CMC_PKTDMA_INTR_CLRr_OFFSET + q * 0x80)
/*! COS Control Rx0 register address */
#define CMICR_PDMA_COS_CTRL_RX0(g, q) (CMICR_GRP_BASE(g) + CMIC_CMC_PKTDMA_COS_CTRL_RX_0r_OFFSET + q * 0x80)
/*! COS Control Rx1 register address */
#define CMICR_PDMA_COS_CTRL_RX1(g, q) (CMICR_GRP_BASE(g) + CMIC_CMC_PKTDMA_COS_CTRL_RX_1r_OFFSET + q * 0x80)
/*! Interrupt Coalesce register address */
#define CMICR_PDMA_INTR_COAL(g, q) (CMICR_GRP_BASE(g) + CMIC_CMC_PKTDMA_INTR_COALr_OFFSET + q * 0x80)
/*! Current Descriptor Address Lower register address */
#define CMICR_PDMA_CURR_DESC_LO(g, q) (CMICR_GRP_BASE(g) + CMIC_CMC_PKTDMA_CURR_DESC_LOr_OFFSET + q * 0x80)
/*! Current Descriptor Address Higher register address */
#define CMICR_PDMA_CURR_DESC_HI(g, q) (CMICR_GRP_BASE(g) + CMIC_CMC_PKTDMA_CURR_DESC_HIr_OFFSET + q * 0x80)
/*! Rx Buffer Threshhold register address */
#define CMICR_PDMA_RBUF_THRE(g, q) (CMICR_GRP_BASE(g) + CMIC_CMC_PKTDMA_RXBUF_THRESHOLD_CONFIGr_OFFSET + q * 0x80)
/*! Debug Control register address */
#define CMICR_PDMA_DEBUG_CTRL(g, q) (CMICR_GRP_BASE(g) + CMIC_CMC_PKTDMA_DEBUG_CONTROLr_OFFSET + q * 0x80)
/*! Debug State Machine Status register address */
#define CMICR_PDMA_DEBUG_SM_STAT(g, q) (CMICR_GRP_BASE(g) + CMIC_CMC_PKTDMA_DEBUG_SM_STATUSr_OFFSET + q * 0x80)
/*! Debug Status register address */
#define CMICR_PDMA_DEBUG_STAT(g, q) (CMICR_GRP_BASE(g) + CMIC_CMC_PKTDMA_DEBUG_STATUSr_OFFSET + q * 0x80)
/*! Rx Packet Count register address */
#define CMICR_PDMA_COUNT_RX(g, q) (CMICR_GRP_BASE(g) + CMIC_CMC_PKTDMA_PKT_COUNT_RXPKTr_OFFSET + q * 0x80)
/*! Tx Packet Count register address */
#define CMICR_PDMA_COUNT_TX(g, q) (CMICR_GRP_BASE(g) + CMIC_CMC_PKTDMA_PKT_COUNT_TXPKTr_OFFSET + q * 0x80)
/*! Dropped Rx Packet Count register address */
#define CMICR_PDMA_COUNT_RX_DROP(g, q) (CMICR_GRP_BASE(g) + CMIC_CMC_PKTDMA_PKT_COUNT_RXPKT_DROPr_OFFSET + q * 0x80)
/*! Requested Descriptor Count register address */
#define CMICR_PDMA_DESC_CNT_REQ(g, q) (CMICR_GRP_BASE(g) + CMIC_CMC_PKTDMA_DESC_COUNT_REQr_OFFSET + q * 0x80)
/*! Received Descriptor Count register address */
#define CMICR_PDMA_DESC_CNT_RX(g, q) (CMICR_GRP_BASE(g) + CMIC_CMC_PKTDMA_DESC_COUNT_RXr_OFFSET + q * 0x80)
/*! Updated Descriptor Count register address */
#define CMICR_PDMA_DESC_CNT_STAT(g, q) (CMICR_GRP_BASE(g) + CMIC_CMC_PKTDMA_DESC_COUNT_STATUS_WRr_OFFSET + q * 0x80)
/*! EP_TO_CPU Header Size register address */
#define CMICR_EP_TO_CPU_HEADER_SIZE CMIC_TOP_STATUS_EP_TO_CPU_HEADER_SIZEr_OFFSET
/*! Top config register address */
#define CMICR_TOP_CONFIG CMIC_TOP_CONFIGr_OFFSET
/*! iProc interrupt enable set register address0 */
#define PAXB_PDMA_IRQ_ENAB_SET0 PAXB_0_INTC_SET_INTR_ENABLE_REG5r_OFFSET
/*! iProc interrupt enable set register address1 */
#define PAXB_PDMA_IRQ_ENAB_SET1 PAXB_0_INTC_SET_INTR_ENABLE_REG6r_OFFSET
/*! iProc interrupt enable clear register address0 */
#define PAXB_PDMA_IRQ_ENAB_CLR0 PAXB_0_INTC_CLEAR_INTR_ENABLE_REG5r_OFFSET
/*! iProc interrupt enable clear register address1 */
#define PAXB_PDMA_IRQ_ENAB_CLR1 PAXB_0_INTC_CLEAR_INTR_ENABLE_REG6r_OFFSET
/*! \} */
/*!
* \name Interrupt status & clear register definitions
*/
/*! \{ */
/*! Interrupt mask shift */
#define CMICR_IRQ_MASK_SHIFT 8
/*! \} */
/*! 32-bit register read */
#define DEV_READ32(_c, _a, _p) \
do { \
if ((_c)->dev->mode != DEV_MODE_VNET) { \
*(_p) = ((volatile uint32_t *)(_c)->hw_addr)[(_a) / 4]; \
} \
} while (0)
/*! 32-bit register write */
#define DEV_WRITE32(_c, _a, _v) \
do { \
if ((_c)->dev->mode != DEV_MODE_VNET) { \
((volatile uint32_t *)(_c)->hw_addr)[(_a) / 4] = (_v); \
} \
} while (0)
/*! Tx packet header size */
#define CMICR_TX_PKT_HDR_SIZE 16
/*! HW access retry times */
#define CMICR_HW_RETRY_TIMES 100000
/*! Max remaining descriptors */
#define CMICR_DESC_REMAIN_MAX 8
/*!
* \brief Initialize HW handles.
*
* \param [in] hw HW structure point.
*
* \retval SHR_E_NONE No errors.
* \retval SHR_E_XXXX Operation failed.
*/
extern int
bcmcnet_cmicr_pdma_hw_hdls_init(struct pdma_hw *hw);
/*!
* \brief Initialize descriptor operations.
*
* \param [in] hw HW structure point.
*
* \retval SHR_E_NONE No errors.
* \retval SHR_E_XXXX Operation failed.
*/
extern int
bcmcnet_cmicr_pdma_desc_ops_init(struct pdma_hw *hw);
/*!
* \brief Attach device driver.
*
* \param [in] dev Device structure point.
*
* \retval SHR_E_NONE No errors.
* \retval SHR_E_XXXX Operation failed.
*/
extern int
bcmcnet_cmicr_pdma_driver_attach(struct pdma_dev *dev);
/*!
* \brief Detach device driver.
*
* \param [in] dev Device structure point.
*
* \retval SHR_E_NONE No errors.
* \retval SHR_E_XXXX Operation failed.
*/
extern int
bcmcnet_cmicr_pdma_driver_detach(struct pdma_dev *dev);
#endif /* BCMCNET_CMICR_H */

791
platform/broadcom/saibcm-modules/sdklt/bcmcnet/include/bcmcnet/bcmcnet_cmicr_acc.h Normal file
View File

@ -0,0 +1,791 @@
/*! \file bcmcnet_cmicr_acc.h
*
* CMICr PDMA registers and descriptors access macros extracted from:
* bcmbd/include/bcmbd/bcmbd_cmicr_acc.h
* bcmbd/include/bcmbd/bcmbd_cmicr_intr.h
*
*/
/*
* $Copyright: Copyright 2018-2022 Broadcom. All rights reserved.
* The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License
* version 2 as published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* A copy of the GNU General Public License version 2 (GPLv2) can
* be found in the LICENSES folder.$
*/
#ifndef BCMCNET_CMICR_ACC_H
#define BCMCNET_CMICR_ACC_H
#define IPROC_IRQ_BASE5 (5 * 32)
#define IPROC_IRQ_BASE6 (6 * 32)
#define CMICR_IRQ_CMC0_PKTDMA_CH0_INTR (IPROC_IRQ_BASE5 + 8)
#define CMICR_IRQ_CMC0_PKTDMA_CH1_INTR (IPROC_IRQ_BASE5 + 9)
#define CMICR_IRQ_CMC0_PKTDMA_CH2_INTR (IPROC_IRQ_BASE5 + 10)
#define CMICR_IRQ_CMC0_PKTDMA_CH3_INTR (IPROC_IRQ_BASE5 + 11)
#define CMICR_IRQ_CMC0_PKTDMA_CH4_INTR (IPROC_IRQ_BASE5 + 12)
#define CMICR_IRQ_CMC0_PKTDMA_CH5_INTR (IPROC_IRQ_BASE5 + 13)
#define CMICR_IRQ_CMC0_PKTDMA_CH6_INTR (IPROC_IRQ_BASE5 + 14)
#define CMICR_IRQ_CMC0_PKTDMA_CH7_INTR (IPROC_IRQ_BASE5 + 15)
#define CMICR_IRQ_CMC0_PKTDMA_CH8_INTR (IPROC_IRQ_BASE5 + 16)
#define CMICR_IRQ_CMC0_PKTDMA_CH9_INTR (IPROC_IRQ_BASE5 + 17)
#define CMICR_IRQ_CMC0_PKTDMA_CH10_INTR (IPROC_IRQ_BASE5 + 18)
#define CMICR_IRQ_CMC0_PKTDMA_CH11_INTR (IPROC_IRQ_BASE5 + 19)
#define CMICR_IRQ_CMC0_PKTDMA_CH12_INTR (IPROC_IRQ_BASE5 + 20)
#define CMICR_IRQ_CMC0_PKTDMA_CH13_INTR (IPROC_IRQ_BASE5 + 21)
#define CMICR_IRQ_CMC0_PKTDMA_CH14_INTR (IPROC_IRQ_BASE5 + 22)
#define CMICR_IRQ_CMC0_PKTDMA_CH15_INTR (IPROC_IRQ_BASE5 + 23)
#define CMICR_IRQ_CMC1_PKTDMA_CH0_INTR (IPROC_IRQ_BASE5 + 24)
#define CMICR_IRQ_CMC1_PKTDMA_CH1_INTR (IPROC_IRQ_BASE5 + 25)
#define CMICR_IRQ_CMC1_PKTDMA_CH2_INTR (IPROC_IRQ_BASE5 + 26)
#define CMICR_IRQ_CMC1_PKTDMA_CH3_INTR (IPROC_IRQ_BASE5 + 27)
#define CMICR_IRQ_CMC1_PKTDMA_CH4_INTR (IPROC_IRQ_BASE5 + 28)
#define CMICR_IRQ_CMC1_PKTDMA_CH5_INTR (IPROC_IRQ_BASE5 + 29)
#define CMICR_IRQ_CMC1_PKTDMA_CH6_INTR (IPROC_IRQ_BASE5 + 30)
#define CMICR_IRQ_CMC1_PKTDMA_CH7_INTR (IPROC_IRQ_BASE5 + 31)
#define CMICR_IRQ_CMC1_PKTDMA_CH8_INTR (IPROC_IRQ_BASE6 + 0)
#define CMICR_IRQ_CMC1_PKTDMA_CH9_INTR (IPROC_IRQ_BASE6 + 1)
#define CMICR_IRQ_CMC1_PKTDMA_CH10_INTR (IPROC_IRQ_BASE6 + 2)
#define CMICR_IRQ_CMC1_PKTDMA_CH11_INTR (IPROC_IRQ_BASE6 + 3)
#define CMICR_IRQ_CMC1_PKTDMA_CH12_INTR (IPROC_IRQ_BASE6 + 4)
#define CMICR_IRQ_CMC1_PKTDMA_CH13_INTR (IPROC_IRQ_BASE6 + 5)
#define CMICR_IRQ_CMC1_PKTDMA_CH14_INTR (IPROC_IRQ_BASE6 + 6)
#define CMICR_IRQ_CMC1_PKTDMA_CH15_INTR (IPROC_IRQ_BASE6 + 7)
#define PAXB_0_INTC_SET_INTR_ENABLE_REG5r_OFFSET 0x0292d114
#define PAXB_0_INTC_SET_INTR_ENABLE_REG6r_OFFSET 0x0292d118
#define PAXB_0_INTC_CLEAR_INTR_ENABLE_REG5r_OFFSET 0x0292d13c
#define PAXB_0_INTC_CLEAR_INTR_ENABLE_REG6r_OFFSET 0x0292d140
/*
* This structure should be used to declare and program CMIC_TOP_CONFIG.
*
*/
typedef union CMIC_TOP_CONFIGr_s {
uint32_t v[1];
uint32_t cmic_top_config[1];
uint32_t _cmic_top_config;
} CMIC_TOP_CONFIGr_t;
#define CMIC_TOP_CONFIGr_CLR(r) (r).cmic_top_config[0] = 0
#define CMIC_TOP_CONFIGr_SET(r,d) (r).cmic_top_config[0] = d
#define CMIC_TOP_CONFIGr_GET(r) (r).cmic_top_config[0]
#define CMIC_TOP_CONFIGr_OFFSET 0x0000000c
#define CMIC_TOP_CONFIGr_IP_2_EP_LOOPBACK_ENABLEf_GET(r) ((((r).cmic_top_config[0]) >> 1) & 0x1)
#define CMIC_TOP_CONFIGr_IP_2_EP_LOOPBACK_ENABLEf_SET(r,f) (r).cmic_top_config[0]=(((r).cmic_top_config[0] & ~((uint32_t)0x1 << 1)) | ((((uint32_t)f) & 0x1) << 1))
#define CMIC_TOP_CONFIGr_CMC0_CLK_ENf_GET(r) ((((r).cmic_top_config[0]) >> 2) & 0x1)
#define CMIC_TOP_CONFIGr_CMC0_CLK_ENf_SET(r,f) (r).cmic_top_config[0]=(((r).cmic_top_config[0] & ~((uint32_t)0x1 << 2)) | ((((uint32_t)f) & 0x1) << 2))
#define CMIC_TOP_CONFIGr_CMC1_CLK_ENf_GET(r) ((((r).cmic_top_config[0]) >> 3) & 0x1)
#define CMIC_TOP_CONFIGr_CMC1_CLK_ENf_SET(r,f) (r).cmic_top_config[0]=(((r).cmic_top_config[0] & ~((uint32_t)0x1 << 3)) | ((((uint32_t)f) & 0x1) << 3))
#define CMIC_TOP_CONFIGr_COMMON_POOL_CLK_ENf_GET(r) ((((r).cmic_top_config[0]) >> 4) & 0x1)
#define CMIC_TOP_CONFIGr_COMMON_POOL_CLK_ENf_SET(r,f) (r).cmic_top_config[0]=(((r).cmic_top_config[0] & ~((uint32_t)0x1 << 4)) | ((((uint32_t)f) & 0x1) << 4))
#define CMIC_TOP_CONFIGr_RPE_CLK_ENf_GET(r) ((((r).cmic_top_config[0]) >> 5) & 0x1)
#define CMIC_TOP_CONFIGr_RPE_CLK_ENf_SET(r,f) (r).cmic_top_config[0]=(((r).cmic_top_config[0] & ~((uint32_t)0x1 << 5)) | ((((uint32_t)f) & 0x1) << 5))
#define CMIC_TOP_CONFIGr_IP_INTERFACE_PAYLOAD_ENDIANESSf_GET(r) ((((r).cmic_top_config[0]) >> 6) & 0x1)
#define CMIC_TOP_CONFIGr_IP_INTERFACE_PAYLOAD_ENDIANESSf_SET(r,f) (r).cmic_top_config[0]=(((r).cmic_top_config[0] & ~((uint32_t)0x1 << 6)) | ((((uint32_t)f) & 0x1) << 6))
#define CMIC_TOP_CONFIGr_IP_INTERFACE_HEADER_ENDIANESSf_GET(r) ((((r).cmic_top_config[0]) >> 7) & 0x1)
#define CMIC_TOP_CONFIGr_IP_INTERFACE_HEADER_ENDIANESSf_SET(r,f) (r).cmic_top_config[0]=(((r).cmic_top_config[0] & ~((uint32_t)0x1 << 7)) | ((((uint32_t)f) & 0x1) << 7))
#define CMIC_TOP_CONFIGr_EP_INTERFACE_PAYLOAD_ENDIANESSf_GET(r) ((((r).cmic_top_config[0]) >> 8) & 0x1)
#define CMIC_TOP_CONFIGr_EP_INTERFACE_PAYLOAD_ENDIANESSf_SET(r,f) (r).cmic_top_config[0]=(((r).cmic_top_config[0] & ~((uint32_t)0x1 << 8)) | ((((uint32_t)f) & 0x1) << 8))
#define CMIC_TOP_CONFIGr_EP_INTERFACE_HEADER_ENDIANESSf_GET(r) ((((r).cmic_top_config[0]) >> 9) & 0x1)
#define CMIC_TOP_CONFIGr_EP_INTERFACE_HEADER_ENDIANESSf_SET(r,f) (r).cmic_top_config[0]=(((r).cmic_top_config[0] & ~((uint32_t)0x1 << 9)) | ((((uint32_t)f) & 0x1) << 9))
#define CMIC_TOP_CONFIGr_CLEAR_ON_READ_ENABLEf_GET(r) ((((r).cmic_top_config[0]) >> 10) & 0x1)
#define CMIC_TOP_CONFIGr_CLEAR_ON_READ_ENABLEf_SET(r,f) (r).cmic_top_config[0]=(((r).cmic_top_config[0] & ~((uint32_t)0x1 << 10)) | ((((uint32_t)f) & 0x1) << 10))
#define CMIC_TOP_CONFIGr_SATURATE_ENABLEf_GET(r) ((((r).cmic_top_config[0]) >> 11) & 0x1)
#define CMIC_TOP_CONFIGr_SATURATE_ENABLEf_SET(r,f) (r).cmic_top_config[0]=(((r).cmic_top_config[0] & ~((uint32_t)0x1 << 11)) | ((((uint32_t)f) & 0x1) << 11))
#define CMIC_TOP_CONFIGr_CLEAR_CMC0_COUNTERSf_GET(r) ((((r).cmic_top_config[0]) >> 12) & 0x1)
#define CMIC_TOP_CONFIGr_CLEAR_CMC0_COUNTERSf_SET(r,f) (r).cmic_top_config[0]=(((r).cmic_top_config[0] & ~((uint32_t)0x1 << 12)) | ((((uint32_t)f) & 0x1) << 12))
#define CMIC_TOP_CONFIGr_CLEAR_CMC1_COUNTERSf_GET(r) ((((r).cmic_top_config[0]) >> 13) & 0x1)
#define CMIC_TOP_CONFIGr_CLEAR_CMC1_COUNTERSf_SET(r,f) (r).cmic_top_config[0]=(((r).cmic_top_config[0] & ~((uint32_t)0x1 << 13)) | ((((uint32_t)f) & 0x1) << 13))
#define CMIC_TOP_CONFIGr_CLEAR_RPE_COUNTERSf_GET(r) ((((r).cmic_top_config[0]) >> 14) & 0x1)
#define CMIC_TOP_CONFIGr_CLEAR_RPE_COUNTERSf_SET(r,f) (r).cmic_top_config[0]=(((r).cmic_top_config[0] & ~((uint32_t)0x1 << 14)) | ((((uint32_t)f) & 0x1) << 14))
#define CMIC_TOP_CONFIGr_CLEAR_TOP_COUNTERSf_GET(r) ((((r).cmic_top_config[0]) >> 15) & 0x1)
#define CMIC_TOP_CONFIGr_CLEAR_TOP_COUNTERSf_SET(r,f) (r).cmic_top_config[0]=(((r).cmic_top_config[0] & ~((uint32_t)0x1 << 15)) | ((((uint32_t)f) & 0x1) << 15))
#define CMIC_TOP_CONFIGr_RPE_PIPE_MAPf_GET(r) ((((r).cmic_top_config[0]) >> 16) & 0x1)
#define CMIC_TOP_CONFIGr_RPE_PIPE_MAPf_SET(r,f) (r).cmic_top_config[0]=(((r).cmic_top_config[0] & ~((uint32_t)0x1 << 16)) | ((((uint32_t)f) & 0x1) << 16))
#define CMIC_TOP_CONFIGr_SBUS_RING_ARB_CUT_THROUGH_MODE_ENABLEf_GET(r) ((((r).cmic_top_config[0]) >> 17) & 0x1)
#define CMIC_TOP_CONFIGr_SBUS_RING_ARB_CUT_THROUGH_MODE_ENABLEf_SET(r,f) (r).cmic_top_config[0]=(((r).cmic_top_config[0] & ~((uint32_t)0x1 << 17)) | ((((uint32_t)f) & 0x1) << 17))
#define CMIC_TOP_CONFIGr_IP_ARB_QUANTA_SELf_GET(r) ((((r).cmic_top_config[0]) >> 18) & 0x3)
#define CMIC_TOP_CONFIGr_IP_ARB_QUANTA_SELf_SET(r,f) (r).cmic_top_config[0]=(((r).cmic_top_config[0] & ~((uint32_t)0x3 << 18)) | ((((uint32_t)f) & 0x3) << 18))
#define CMIC_TOP_CONFIGr_ENABLE_CMIC_RST_AFTER_SW_IF_PURGEf_GET(r) ((((r).cmic_top_config[0]) >> 20) & 0x1)
#define CMIC_TOP_CONFIGr_ENABLE_CMIC_RST_AFTER_SW_IF_PURGEf_SET(r,f) (r).cmic_top_config[0]=(((r).cmic_top_config[0] & ~((uint32_t)0x1 << 20)) | ((((uint32_t)f) & 0x1) << 20))
#define CMIC_TOP_CONFIGr_COS_MASK_OVERRIDEf_GET(r) ((((r).cmic_top_config[0]) >> 21) & 0x1)
#define CMIC_TOP_CONFIGr_COS_MASK_OVERRIDEf_SET(r,f) (r).cmic_top_config[0]=(((r).cmic_top_config[0] & ~((uint32_t)0x1 << 21)) | ((((uint32_t)f) & 0x1) << 21))
#define READ_CMIC_TOP_CONFIGr(u,r) BCMDRD_DEV_READ32(u,CMIC_TOP_CONFIGr_OFFSET,r._cmic_top_config)
#define WRITE_CMIC_TOP_CONFIGr(u,r) BCMDRD_DEV_WRITE32(u,CMIC_TOP_CONFIGr_OFFSET,r._cmic_top_config)
/*
* This structure should be used to declare and program CMIC_TOP_STATUS_EP_TO_CPU_HEADER_SIZE.
*
*/
typedef union CMIC_TOP_STATUS_EP_TO_CPU_HEADER_SIZEr_s {
uint32_t v[1];
uint32_t cmic_top_status_ep_to_cpu_header_size[1];
uint32_t _cmic_top_status_ep_to_cpu_header_size;
} CMIC_TOP_STATUS_EP_TO_CPU_HEADER_SIZEr_t;
#define CMIC_TOP_STATUS_EP_TO_CPU_HEADER_SIZEr_CLR(r) (r).cmic_top_status_ep_to_cpu_header_size[0] = 0
#define CMIC_TOP_STATUS_EP_TO_CPU_HEADER_SIZEr_SET(r,d) (r).cmic_top_status_ep_to_cpu_header_size[0] = d
#define CMIC_TOP_STATUS_EP_TO_CPU_HEADER_SIZEr_GET(r) (r).cmic_top_status_ep_to_cpu_header_size[0]
#define CMIC_TOP_STATUS_EP_TO_CPU_HEADER_SIZEr_OFFSET 0x00000004
#define CMIC_TOP_STATUS_EP_TO_CPU_HEADER_SIZEr_EP_TO_CPU_HEADER_SIZEf_GET(r) (((r).cmic_top_status_ep_to_cpu_header_size[0]) & 0xf)
#define CMIC_TOP_STATUS_EP_TO_CPU_HEADER_SIZEr_EP_TO_CPU_HEADER_SIZEf_SET(r,f) (r).cmic_top_status_ep_to_cpu_header_size[0]=(((r).cmic_top_status_ep_to_cpu_header_size[0] & ~((uint32_t)0xf)) | (((uint32_t)f) & 0xf))
#define READ_CMIC_TOP_STATUS_EP_TO_CPU_HEADER_SIZEr(u,r) BCMDRD_DEV_READ32(u,CMIC_TOP_STATUS_EP_TO_CPU_HEADER_SIZEr_OFFSET,r._cmic_top_status_ep_to_cpu_header_size)
#define WRITE_CMIC_TOP_STATUS_EP_TO_CPU_HEADER_SIZEr(u,r) BCMDRD_DEV_WRITE32(u,CMIC_TOP_STATUS_EP_TO_CPU_HEADER_SIZEr_OFFSET,r._cmic_top_status_ep_to_cpu_header_size)
/*
* This structure should be used to declare and program CMIC_CMC_PKTDMA_COS_CTRL_RX_0.
*
*/
typedef union CMIC_CMC_PKTDMA_COS_CTRL_RX_0r_s {
uint32_t v[1];
uint32_t cmic_cmc_pktdma_cos_ctrl_rx_0[1];
uint32_t _cmic_cmc_pktdma_cos_ctrl_rx_0;
} CMIC_CMC_PKTDMA_COS_CTRL_RX_0r_t;
#define CMIC_CMC_PKTDMA_COS_CTRL_RX_0r_CLR(r) (r).cmic_cmc_pktdma_cos_ctrl_rx_0[0] = 0
#define CMIC_CMC_PKTDMA_COS_CTRL_RX_0r_SET(r,d) (r).cmic_cmc_pktdma_cos_ctrl_rx_0[0] = d
#define CMIC_CMC_PKTDMA_COS_CTRL_RX_0r_GET(r) (r).cmic_cmc_pktdma_cos_ctrl_rx_0[0]
#define CMIC_CMC_PKTDMA_COS_CTRL_RX_0r_OFFSET 0x00003124
#define CMIC_CMC_PKTDMA_COS_CTRL_RX_0r_COS_BMPf_GET(r) ((r).cmic_cmc_pktdma_cos_ctrl_rx_0[0])
#define CMIC_CMC_PKTDMA_COS_CTRL_RX_0r_COS_BMPf_SET(r,f) (r).cmic_cmc_pktdma_cos_ctrl_rx_0[0]=((uint32_t)f)
#define READ_CMIC_CMC_PKTDMA_COS_CTRL_RX_0r(u,_cmc,_ch,r) BCMDRD_DEV_READ32(u,CMIC_CMC_PKTDMA_COS_CTRL_RX_0r_OFFSET+(0x80*(_ch))+(0x2000*(_cmc)),r._cmic_cmc_pktdma_cos_ctrl_rx_0)
#define WRITE_CMIC_CMC_PKTDMA_COS_CTRL_RX_0r(u,_cmc,_ch,r) BCMDRD_DEV_WRITE32(u,CMIC_CMC_PKTDMA_COS_CTRL_RX_0r_OFFSET+(0x80*(_ch))+(0x2000*(_cmc)),r._cmic_cmc_pktdma_cos_ctrl_rx_0)
/*
* This structure should be used to declare and program CMIC_CMC_PKTDMA_COS_CTRL_RX_1.
*
*/
typedef union CMIC_CMC_PKTDMA_COS_CTRL_RX_1r_s {
uint32_t v[1];
uint32_t cmic_cmc_pktdma_cos_ctrl_rx_1[1];
uint32_t _cmic_cmc_pktdma_cos_ctrl_rx_1;
} CMIC_CMC_PKTDMA_COS_CTRL_RX_1r_t;
#define CMIC_CMC_PKTDMA_COS_CTRL_RX_1r_CLR(r) (r).cmic_cmc_pktdma_cos_ctrl_rx_1[0] = 0
#define CMIC_CMC_PKTDMA_COS_CTRL_RX_1r_SET(r,d) (r).cmic_cmc_pktdma_cos_ctrl_rx_1[0] = d
#define CMIC_CMC_PKTDMA_COS_CTRL_RX_1r_GET(r) (r).cmic_cmc_pktdma_cos_ctrl_rx_1[0]
#define CMIC_CMC_PKTDMA_COS_CTRL_RX_1r_OFFSET 0x00003128
#define CMIC_CMC_PKTDMA_COS_CTRL_RX_1r_COS_BMPf_GET(r) ((r).cmic_cmc_pktdma_cos_ctrl_rx_1[0])
#define CMIC_CMC_PKTDMA_COS_CTRL_RX_1r_COS_BMPf_SET(r,f) (r).cmic_cmc_pktdma_cos_ctrl_rx_1[0]=((uint32_t)f)
#define READ_CMIC_CMC_PKTDMA_COS_CTRL_RX_1r(u,_cmc,_ch,r) BCMDRD_DEV_READ32(u,CMIC_CMC_PKTDMA_COS_CTRL_RX_1r_OFFSET+(0x80*(_ch))+(0x2000*(_cmc)),r._cmic_cmc_pktdma_cos_ctrl_rx_1)
#define WRITE_CMIC_CMC_PKTDMA_COS_CTRL_RX_1r(u,_cmc,_ch,r) BCMDRD_DEV_WRITE32(u,CMIC_CMC_PKTDMA_COS_CTRL_RX_1r_OFFSET+(0x80*(_ch))+(0x2000*(_cmc)),r._cmic_cmc_pktdma_cos_ctrl_rx_1)
/*
* This structure should be used to declare and program CMIC_CMC_PKTDMA_CTRL.
*
*/
typedef union CMIC_CMC_PKTDMA_CTRLr_s {
uint32_t v[1];
uint32_t cmic_cmc_pktdma_ctrl[1];
uint32_t _cmic_cmc_pktdma_ctrl;
} CMIC_CMC_PKTDMA_CTRLr_t;
#define CMIC_CMC_PKTDMA_CTRLr_CLR(r) (r).cmic_cmc_pktdma_ctrl[0] = 0
#define CMIC_CMC_PKTDMA_CTRLr_SET(r,d) (r).cmic_cmc_pktdma_ctrl[0] = d
#define CMIC_CMC_PKTDMA_CTRLr_GET(r) (r).cmic_cmc_pktdma_ctrl[0]
#define CMIC_CMC_PKTDMA_CTRLr_OFFSET 0x00003100
#define CMIC_CMC_PKTDMA_CTRLr_DIRECTIONf_GET(r) (((r).cmic_cmc_pktdma_ctrl[0]) & 0x1)
#define CMIC_CMC_PKTDMA_CTRLr_DIRECTIONf_SET(r,f) (r).cmic_cmc_pktdma_ctrl[0]=(((r).cmic_cmc_pktdma_ctrl[0] & ~((uint32_t)0x1)) | (((uint32_t)f) & 0x1))
#define CMIC_CMC_PKTDMA_CTRLr_DMA_ENf_GET(r) ((((r).cmic_cmc_pktdma_ctrl[0]) >> 1) & 0x1)
#define CMIC_CMC_PKTDMA_CTRLr_DMA_ENf_SET(r,f) (r).cmic_cmc_pktdma_ctrl[0]=(((r).cmic_cmc_pktdma_ctrl[0] & ~((uint32_t)0x1 << 1)) | ((((uint32_t)f) & 0x1) << 1))
#define CMIC_CMC_PKTDMA_CTRLr_ABORT_DMAf_GET(r) ((((r).cmic_cmc_pktdma_ctrl[0]) >> 2) & 0x1)
#define CMIC_CMC_PKTDMA_CTRLr_ABORT_DMAf_SET(r,f) (r).cmic_cmc_pktdma_ctrl[0]=(((r).cmic_cmc_pktdma_ctrl[0] & ~((uint32_t)0x1 << 2)) | ((((uint32_t)f) & 0x1) << 2))
#define CMIC_CMC_PKTDMA_CTRLr_PKTDMA_ENDIANESSf_GET(r) ((((r).cmic_cmc_pktdma_ctrl[0]) >> 3) & 0x1)
#define CMIC_CMC_PKTDMA_CTRLr_PKTDMA_ENDIANESSf_SET(r,f) (r).cmic_cmc_pktdma_ctrl[0]=(((r).cmic_cmc_pktdma_ctrl[0] & ~((uint32_t)0x1 << 3)) | ((((uint32_t)f) & 0x1) << 3))
#define CMIC_CMC_PKTDMA_CTRLr_DESC_ENDIANESSf_GET(r) ((((r).cmic_cmc_pktdma_ctrl[0]) >> 4) & 0x1)
#define CMIC_CMC_PKTDMA_CTRLr_DESC_ENDIANESSf_SET(r,f) (r).cmic_cmc_pktdma_ctrl[0]=(((r).cmic_cmc_pktdma_ctrl[0] & ~((uint32_t)0x1 << 4)) | ((((uint32_t)f) & 0x1) << 4))
#define CMIC_CMC_PKTDMA_CTRLr_DROP_RX_PKT_ON_CHAIN_ENDf_GET(r) ((((r).cmic_cmc_pktdma_ctrl[0]) >> 5) & 0x1)
#define CMIC_CMC_PKTDMA_CTRLr_DROP_RX_PKT_ON_CHAIN_ENDf_SET(r,f) (r).cmic_cmc_pktdma_ctrl[0]=(((r).cmic_cmc_pktdma_ctrl[0] & ~((uint32_t)0x1 << 5)) | ((((uint32_t)f) & 0x1) << 5))
#define CMIC_CMC_PKTDMA_CTRLr_RLD_STS_UPD_DISf_GET(r) ((((r).cmic_cmc_pktdma_ctrl[0]) >> 6) & 0x1)
#define CMIC_CMC_PKTDMA_CTRLr_RLD_STS_UPD_DISf_SET(r,f) (r).cmic_cmc_pktdma_ctrl[0]=(((r).cmic_cmc_pktdma_ctrl[0] & ~((uint32_t)0x1 << 6)) | ((((uint32_t)f) & 0x1) << 6))
#define CMIC_CMC_PKTDMA_CTRLr_DESC_DONE_INTR_MODEf_GET(r) ((((r).cmic_cmc_pktdma_ctrl[0]) >> 7) & 0x1)
#define CMIC_CMC_PKTDMA_CTRLr_DESC_DONE_INTR_MODEf_SET(r,f) (r).cmic_cmc_pktdma_ctrl[0]=(((r).cmic_cmc_pktdma_ctrl[0] & ~((uint32_t)0x1 << 7)) | ((((uint32_t)f) & 0x1) << 7))
#define CMIC_CMC_PKTDMA_CTRLr_ENABLE_CONTINUOUS_DMAf_GET(r) ((((r).cmic_cmc_pktdma_ctrl[0]) >> 8) & 0x1)
#define CMIC_CMC_PKTDMA_CTRLr_ENABLE_CONTINUOUS_DMAf_SET(r,f) (r).cmic_cmc_pktdma_ctrl[0]=(((r).cmic_cmc_pktdma_ctrl[0] & ~((uint32_t)0x1 << 8)) | ((((uint32_t)f) & 0x1) << 8))
#define CMIC_CMC_PKTDMA_CTRLr_CONTIGUOUS_DESCRIPTORSf_GET(r) ((((r).cmic_cmc_pktdma_ctrl[0]) >> 9) & 0x1)
#define CMIC_CMC_PKTDMA_CTRLr_CONTIGUOUS_DESCRIPTORSf_SET(r,f) (r).cmic_cmc_pktdma_ctrl[0]=(((r).cmic_cmc_pktdma_ctrl[0] & ~((uint32_t)0x1 << 9)) | ((((uint32_t)f) & 0x1) << 9))
#define CMIC_CMC_PKTDMA_CTRLr_HEADER_ENDIANESSf_GET(r) ((((r).cmic_cmc_pktdma_ctrl[0]) >> 12) & 0x1)
#define CMIC_CMC_PKTDMA_CTRLr_HEADER_ENDIANESSf_SET(r,f) (r).cmic_cmc_pktdma_ctrl[0]=(((r).cmic_cmc_pktdma_ctrl[0] & ~((uint32_t)0x1 << 12)) | ((((uint32_t)f) & 0x1) << 12))
#define CMIC_CMC_PKTDMA_CTRLr_DISABLE_ABORT_ON_ERRORf_GET(r) ((((r).cmic_cmc_pktdma_ctrl[0]) >> 13) & 0x1)
#define CMIC_CMC_PKTDMA_CTRLr_DISABLE_ABORT_ON_ERRORf_SET(r,f) (r).cmic_cmc_pktdma_ctrl[0]=(((r).cmic_cmc_pktdma_ctrl[0] & ~((uint32_t)0x1 << 13)) | ((((uint32_t)f) & 0x1) << 13))
#define CMIC_CMC_PKTDMA_CTRLr_PIPE_MAPf_GET(r) ((((r).cmic_cmc_pktdma_ctrl[0]) >> 14) & 0x1)
#define CMIC_CMC_PKTDMA_CTRLr_PIPE_MAPf_SET(r,f) (r).cmic_cmc_pktdma_ctrl[0]=(((r).cmic_cmc_pktdma_ctrl[0] & ~((uint32_t)0x1 << 14)) | ((((uint32_t)f) & 0x1) << 14))
#define CMIC_CMC_PKTDMA_CTRLr_DISABLE_DESC_OTDSTD_READf_GET(r) ((((r).cmic_cmc_pktdma_ctrl[0]) >> 15) & 0x1)
#define CMIC_CMC_PKTDMA_CTRLr_DISABLE_DESC_OTDSTD_READf_SET(r,f) (r).cmic_cmc_pktdma_ctrl[0]=(((r).cmic_cmc_pktdma_ctrl[0] & ~((uint32_t)0x1 << 15)) | ((((uint32_t)f) & 0x1) << 15))
#define READ_CMIC_CMC_PKTDMA_CTRLr(u,_cmc,_ch,r) BCMDRD_DEV_READ32(u,CMIC_CMC_PKTDMA_CTRLr_OFFSET+(0x80*(_ch))+(0x2000*(_cmc)),r._cmic_cmc_pktdma_ctrl)
#define WRITE_CMIC_CMC_PKTDMA_CTRLr(u,_cmc,_ch,r) BCMDRD_DEV_WRITE32(u,CMIC_CMC_PKTDMA_CTRLr_OFFSET+(0x80*(_ch))+(0x2000*(_cmc)),r._cmic_cmc_pktdma_ctrl)
/*
* This structure should be used to declare and program CMIC_CMC_PKTDMA_CURR_DESC_HI.
*
*/
typedef union CMIC_CMC_PKTDMA_CURR_DESC_HIr_s {
uint32_t v[1];
uint32_t cmic_cmc_pktdma_curr_desc_hi[1];
uint32_t _cmic_cmc_pktdma_curr_desc_hi;
} CMIC_CMC_PKTDMA_CURR_DESC_HIr_t;
#define CMIC_CMC_PKTDMA_CURR_DESC_HIr_CLR(r) (r).cmic_cmc_pktdma_curr_desc_hi[0] = 0
#define CMIC_CMC_PKTDMA_CURR_DESC_HIr_SET(r,d) (r).cmic_cmc_pktdma_curr_desc_hi[0] = d
#define CMIC_CMC_PKTDMA_CURR_DESC_HIr_GET(r) (r).cmic_cmc_pktdma_curr_desc_hi[0]
#define CMIC_CMC_PKTDMA_CURR_DESC_HIr_OFFSET 0x00003134
#define CMIC_CMC_PKTDMA_CURR_DESC_HIr_ADDRf_GET(r) ((r).cmic_cmc_pktdma_curr_desc_hi[0])
#define CMIC_CMC_PKTDMA_CURR_DESC_HIr_ADDRf_SET(r,f) (r).cmic_cmc_pktdma_curr_desc_hi[0]=((uint32_t)f)
#define READ_CMIC_CMC_PKTDMA_CURR_DESC_HIr(u,_cmc,_ch,r) BCMDRD_DEV_READ32(u,CMIC_CMC_PKTDMA_CURR_DESC_HIr_OFFSET+(0x80*(_ch))+(0x2000*(_cmc)),r._cmic_cmc_pktdma_curr_desc_hi)
#define WRITE_CMIC_CMC_PKTDMA_CURR_DESC_HIr(u,_cmc,_ch,r) BCMDRD_DEV_WRITE32(u,CMIC_CMC_PKTDMA_CURR_DESC_HIr_OFFSET+(0x80*(_ch))+(0x2000*(_cmc)),r._cmic_cmc_pktdma_curr_desc_hi)
/*
* This structure should be used to declare and program CMIC_CMC_PKTDMA_CURR_DESC_LO.
*
*/
typedef union CMIC_CMC_PKTDMA_CURR_DESC_LOr_s {
uint32_t v[1];
uint32_t cmic_cmc_pktdma_curr_desc_lo[1];
uint32_t _cmic_cmc_pktdma_curr_desc_lo;
} CMIC_CMC_PKTDMA_CURR_DESC_LOr_t;
#define CMIC_CMC_PKTDMA_CURR_DESC_LOr_CLR(r) (r).cmic_cmc_pktdma_curr_desc_lo[0] = 0
#define CMIC_CMC_PKTDMA_CURR_DESC_LOr_SET(r,d) (r).cmic_cmc_pktdma_curr_desc_lo[0] = d
#define CMIC_CMC_PKTDMA_CURR_DESC_LOr_GET(r) (r).cmic_cmc_pktdma_curr_desc_lo[0]
#define CMIC_CMC_PKTDMA_CURR_DESC_LOr_OFFSET 0x00003130
#define CMIC_CMC_PKTDMA_CURR_DESC_LOr_ADDRf_GET(r) ((r).cmic_cmc_pktdma_curr_desc_lo[0])
#define CMIC_CMC_PKTDMA_CURR_DESC_LOr_ADDRf_SET(r,f) (r).cmic_cmc_pktdma_curr_desc_lo[0]=((uint32_t)f)
#define READ_CMIC_CMC_PKTDMA_CURR_DESC_LOr(u,_cmc,_ch,r) BCMDRD_DEV_READ32(u,CMIC_CMC_PKTDMA_CURR_DESC_LOr_OFFSET+(0x80*(_ch))+(0x2000*(_cmc)),r._cmic_cmc_pktdma_curr_desc_lo)
#define WRITE_CMIC_CMC_PKTDMA_CURR_DESC_LOr(u,_cmc,_ch,r) BCMDRD_DEV_WRITE32(u,CMIC_CMC_PKTDMA_CURR_DESC_LOr_OFFSET+(0x80*(_ch))+(0x2000*(_cmc)),r._cmic_cmc_pktdma_curr_desc_lo)
/*
* This structure should be used to declare and program CMIC_CMC_PKTDMA_DEBUG_CONTROL.
*
*/
typedef union CMIC_CMC_PKTDMA_DEBUG_CONTROLr_s {
uint32_t v[1];
uint32_t cmic_cmc_pktdma_debug_control[1];
uint32_t _cmic_cmc_pktdma_debug_control;
} CMIC_CMC_PKTDMA_DEBUG_CONTROLr_t;
#define CMIC_CMC_PKTDMA_DEBUG_CONTROLr_CLR(r) (r).cmic_cmc_pktdma_debug_control[0] = 0
#define CMIC_CMC_PKTDMA_DEBUG_CONTROLr_SET(r,d) (r).cmic_cmc_pktdma_debug_control[0] = d
#define CMIC_CMC_PKTDMA_DEBUG_CONTROLr_GET(r) (r).cmic_cmc_pktdma_debug_control[0]
#define CMIC_CMC_PKTDMA_DEBUG_CONTROLr_OFFSET 0x0000313c
#define CMIC_CMC_PKTDMA_DEBUG_CONTROLr_DESC_PENDING_SER_Q_SIZEf_GET(r) (((r).cmic_cmc_pktdma_debug_control[0]) & 0x7)
#define CMIC_CMC_PKTDMA_DEBUG_CONTROLr_DESC_PENDING_SER_Q_SIZEf_SET(r,f) (r).cmic_cmc_pktdma_debug_control[0]=(((r).cmic_cmc_pktdma_debug_control[0] & ~((uint32_t)0x7)) | (((uint32_t)f) & 0x7))
#define CMIC_CMC_PKTDMA_DEBUG_CONTROLr_DESC_PENDING_WRITE_Q_SIZEf_GET(r) ((((r).cmic_cmc_pktdma_debug_control[0]) >> 3) & 0x7)
#define CMIC_CMC_PKTDMA_DEBUG_CONTROLr_DESC_PENDING_WRITE_Q_SIZEf_SET(r,f) (r).cmic_cmc_pktdma_debug_control[0]=(((r).cmic_cmc_pktdma_debug_control[0] & ~((uint32_t)0x7 << 3)) | ((((uint32_t)f) & 0x7) << 3))
#define CMIC_CMC_PKTDMA_DEBUG_CONTROLr_FLUSH_DESC_Qf_GET(r) ((((r).cmic_cmc_pktdma_debug_control[0]) >> 6) & 0x1)
#define CMIC_CMC_PKTDMA_DEBUG_CONTROLr_FLUSH_DESC_Qf_SET(r,f) (r).cmic_cmc_pktdma_debug_control[0]=(((r).cmic_cmc_pktdma_debug_control[0] & ~((uint32_t)0x1 << 6)) | ((((uint32_t)f) & 0x1) << 6))
#define CMIC_CMC_PKTDMA_DEBUG_CONTROLr_RESET_OUTSTANDING_CNTf_GET(r) ((((r).cmic_cmc_pktdma_debug_control[0]) >> 7) & 0x1)
#define CMIC_CMC_PKTDMA_DEBUG_CONTROLr_RESET_OUTSTANDING_CNTf_SET(r,f) (r).cmic_cmc_pktdma_debug_control[0]=(((r).cmic_cmc_pktdma_debug_control[0] & ~((uint32_t)0x1 << 7)) | ((((uint32_t)f) & 0x1) << 7))
#define CMIC_CMC_PKTDMA_DEBUG_CONTROLr_SM_SELECTf_GET(r) ((((r).cmic_cmc_pktdma_debug_control[0]) >> 8) & 0x3)
#define CMIC_CMC_PKTDMA_DEBUG_CONTROLr_SM_SELECTf_SET(r,f) (r).cmic_cmc_pktdma_debug_control[0]=(((r).cmic_cmc_pktdma_debug_control[0] & ~((uint32_t)0x3 << 8)) | ((((uint32_t)f) & 0x3) << 8))
#define CMIC_CMC_PKTDMA_DEBUG_CONTROLr_RESET_DESC_READ_SM_IDLEf_GET(r) ((((r).cmic_cmc_pktdma_debug_control[0]) >> 10) & 0x1)
#define CMIC_CMC_PKTDMA_DEBUG_CONTROLr_RESET_DESC_READ_SM_IDLEf_SET(r,f) (r).cmic_cmc_pktdma_debug_control[0]=(((r).cmic_cmc_pktdma_debug_control[0] & ~((uint32_t)0x1 << 10)) | ((((uint32_t)f) & 0x1) << 10))
#define CMIC_CMC_PKTDMA_DEBUG_CONTROLr_RESET_MEM_RDWR_SM_IDLEf_GET(r) ((((r).cmic_cmc_pktdma_debug_control[0]) >> 11) & 0x1)
#define CMIC_CMC_PKTDMA_DEBUG_CONTROLr_RESET_MEM_RDWR_SM_IDLEf_SET(r,f) (r).cmic_cmc_pktdma_debug_control[0]=(((r).cmic_cmc_pktdma_debug_control[0] & ~((uint32_t)0x1 << 11)) | ((((uint32_t)f) & 0x1) << 11))
#define CMIC_CMC_PKTDMA_DEBUG_CONTROLr_RESET_DESC_STATUS_WR_SM_IDLEf_GET(r) ((((r).cmic_cmc_pktdma_debug_control[0]) >> 12) & 0x1)
#define CMIC_CMC_PKTDMA_DEBUG_CONTROLr_RESET_DESC_STATUS_WR_SM_IDLEf_SET(r,f) (r).cmic_cmc_pktdma_debug_control[0]=(((r).cmic_cmc_pktdma_debug_control[0] & ~((uint32_t)0x1 << 12)) | ((((uint32_t)f) & 0x1) << 12))
#define CMIC_CMC_PKTDMA_DEBUG_CONTROLr_RESET_DYN_RCNFG_SM_IDLEf_GET(r) ((((r).cmic_cmc_pktdma_debug_control[0]) >> 13) & 0x1)
#define CMIC_CMC_PKTDMA_DEBUG_CONTROLr_RESET_DYN_RCNFG_SM_IDLEf_SET(r,f) (r).cmic_cmc_pktdma_debug_control[0]=(((r).cmic_cmc_pktdma_debug_control[0] & ~((uint32_t)0x1 << 13)) | ((((uint32_t)f) & 0x1) << 13))
#define READ_CMIC_CMC_PKTDMA_DEBUG_CONTROLr(u,_cmc,_ch,r) BCMDRD_DEV_READ32(u,CMIC_CMC_PKTDMA_DEBUG_CONTROLr_OFFSET+(0x80*(_ch))+(0x2000*(_cmc)),r._cmic_cmc_pktdma_debug_control)
#define WRITE_CMIC_CMC_PKTDMA_DEBUG_CONTROLr(u,_cmc,_ch,r) BCMDRD_DEV_WRITE32(u,CMIC_CMC_PKTDMA_DEBUG_CONTROLr_OFFSET+(0x80*(_ch))+(0x2000*(_cmc)),r._cmic_cmc_pktdma_debug_control)
/*
* This structure should be used to declare and program CMIC_CMC_PKTDMA_DEBUG_SM_STATUS.
*
*/
typedef union CMIC_CMC_PKTDMA_DEBUG_SM_STATUSr_s {
uint32_t v[1];
uint32_t cmic_cmc_pktdma_debug_sm_status[1];
uint32_t _cmic_cmc_pktdma_debug_sm_status;
} CMIC_CMC_PKTDMA_DEBUG_SM_STATUSr_t;
#define CMIC_CMC_PKTDMA_DEBUG_SM_STATUSr_CLR(r) (r).cmic_cmc_pktdma_debug_sm_status[0] = 0
#define CMIC_CMC_PKTDMA_DEBUG_SM_STATUSr_SET(r,d) (r).cmic_cmc_pktdma_debug_sm_status[0] = d
#define CMIC_CMC_PKTDMA_DEBUG_SM_STATUSr_GET(r) (r).cmic_cmc_pktdma_debug_sm_status[0]
#define CMIC_CMC_PKTDMA_DEBUG_SM_STATUSr_OFFSET 0x00003140
#define CMIC_CMC_PKTDMA_DEBUG_SM_STATUSr_STATEf_GET(r) ((r).cmic_cmc_pktdma_debug_sm_status[0])
#define CMIC_CMC_PKTDMA_DEBUG_SM_STATUSr_STATEf_SET(r,f) (r).cmic_cmc_pktdma_debug_sm_status[0]=((uint32_t)f)
#define READ_CMIC_CMC_PKTDMA_DEBUG_SM_STATUSr(u,_cmc,_ch,r) BCMDRD_DEV_READ32(u,CMIC_CMC_PKTDMA_DEBUG_SM_STATUSr_OFFSET+(0x80*(_ch))+(0x2000*(_cmc)),r._cmic_cmc_pktdma_debug_sm_status)
#define WRITE_CMIC_CMC_PKTDMA_DEBUG_SM_STATUSr(u,_cmc,_ch,r) BCMDRD_DEV_WRITE32(u,CMIC_CMC_PKTDMA_DEBUG_SM_STATUSr_OFFSET+(0x80*(_ch))+(0x2000*(_cmc)),r._cmic_cmc_pktdma_debug_sm_status)
/*
* This structure should be used to declare and program CMIC_CMC_PKTDMA_DEBUG_STATUS.
*
*/
typedef union CMIC_CMC_PKTDMA_DEBUG_STATUSr_s {
uint32_t v[1];
uint32_t cmic_cmc_pktdma_debug_status[1];
uint32_t _cmic_cmc_pktdma_debug_status;
} CMIC_CMC_PKTDMA_DEBUG_STATUSr_t;
#define CMIC_CMC_PKTDMA_DEBUG_STATUSr_CLR(r) (r).cmic_cmc_pktdma_debug_status[0] = 0
#define CMIC_CMC_PKTDMA_DEBUG_STATUSr_SET(r,d) (r).cmic_cmc_pktdma_debug_status[0] = d
#define CMIC_CMC_PKTDMA_DEBUG_STATUSr_GET(r) (r).cmic_cmc_pktdma_debug_status[0]
#define CMIC_CMC_PKTDMA_DEBUG_STATUSr_OFFSET 0x00003144
#define CMIC_CMC_PKTDMA_DEBUG_STATUSr_DESC_PENDING_SER_Q_SIZE_NUM_ENTRIESf_GET(r) (((r).cmic_cmc_pktdma_debug_status[0]) & 0x3f)
#define CMIC_CMC_PKTDMA_DEBUG_STATUSr_DESC_PENDING_SER_Q_SIZE_NUM_ENTRIESf_SET(r,f) (r).cmic_cmc_pktdma_debug_status[0]=(((r).cmic_cmc_pktdma_debug_status[0] & ~((uint32_t)0x3f)) | (((uint32_t)f) & 0x3f))
#define CMIC_CMC_PKTDMA_DEBUG_STATUSr_DESC_PENDING_WRITE_Q_NUM_ENTRIESf_GET(r) ((((r).cmic_cmc_pktdma_debug_status[0]) >> 6) & 0x7f)
#define CMIC_CMC_PKTDMA_DEBUG_STATUSr_DESC_PENDING_WRITE_Q_NUM_ENTRIESf_SET(r,f) (r).cmic_cmc_pktdma_debug_status[0]=(((r).cmic_cmc_pktdma_debug_status[0] & ~((uint32_t)0x7f << 6)) | ((((uint32_t)f) & 0x7f) << 6))
#define CMIC_CMC_PKTDMA_DEBUG_STATUSr_NUM_TXPKTBUF_CELL_USEDf_GET(r) ((((r).cmic_cmc_pktdma_debug_status[0]) >> 13) & 0x7f)
#define CMIC_CMC_PKTDMA_DEBUG_STATUSr_NUM_TXPKTBUF_CELL_USEDf_SET(r,f) (r).cmic_cmc_pktdma_debug_status[0]=(((r).cmic_cmc_pktdma_debug_status[0] & ~((uint32_t)0x7f << 13)) | ((((uint32_t)f) & 0x7f) << 13))
#define CMIC_CMC_PKTDMA_DEBUG_STATUSr_DESC_READ_OUTSTD_CNTf_GET(r) ((((r).cmic_cmc_pktdma_debug_status[0]) >> 20) & 0x1f)
#define CMIC_CMC_PKTDMA_DEBUG_STATUSr_DESC_READ_OUTSTD_CNTf_SET(r,f) (r).cmic_cmc_pktdma_debug_status[0]=(((r).cmic_cmc_pktdma_debug_status[0] & ~((uint32_t)0x1f << 20)) | ((((uint32_t)f) & 0x1f) << 20))
#define READ_CMIC_CMC_PKTDMA_DEBUG_STATUSr(u,_cmc,_ch,r) BCMDRD_DEV_READ32(u,CMIC_CMC_PKTDMA_DEBUG_STATUSr_OFFSET+(0x80*(_ch))+(0x2000*(_cmc)),r._cmic_cmc_pktdma_debug_status)
#define WRITE_CMIC_CMC_PKTDMA_DEBUG_STATUSr(u,_cmc,_ch,r) BCMDRD_DEV_WRITE32(u,CMIC_CMC_PKTDMA_DEBUG_STATUSr_OFFSET+(0x80*(_ch))+(0x2000*(_cmc)),r._cmic_cmc_pktdma_debug_status)
/*
* This structure should be used to declare and program CMIC_CMC_PKTDMA_DESC_ADDR_HI.
*
*/
typedef union CMIC_CMC_PKTDMA_DESC_ADDR_HIr_s {
uint32_t v[1];
uint32_t cmic_cmc_pktdma_desc_addr_hi[1];
uint32_t _cmic_cmc_pktdma_desc_addr_hi;
} CMIC_CMC_PKTDMA_DESC_ADDR_HIr_t;
#define CMIC_CMC_PKTDMA_DESC_ADDR_HIr_CLR(r) (r).cmic_cmc_pktdma_desc_addr_hi[0] = 0
#define CMIC_CMC_PKTDMA_DESC_ADDR_HIr_SET(r,d) (r).cmic_cmc_pktdma_desc_addr_hi[0] = d
#define CMIC_CMC_PKTDMA_DESC_ADDR_HIr_GET(r) (r).cmic_cmc_pktdma_desc_addr_hi[0]
#define CMIC_CMC_PKTDMA_DESC_ADDR_HIr_OFFSET 0x00003108
#define CMIC_CMC_PKTDMA_DESC_ADDR_HIr_ADDRf_GET(r) ((r).cmic_cmc_pktdma_desc_addr_hi[0])
#define CMIC_CMC_PKTDMA_DESC_ADDR_HIr_ADDRf_SET(r,f) (r).cmic_cmc_pktdma_desc_addr_hi[0]=((uint32_t)f)
#define READ_CMIC_CMC_PKTDMA_DESC_ADDR_HIr(u,_cmc,_ch,r) BCMDRD_DEV_READ32(u,CMIC_CMC_PKTDMA_DESC_ADDR_HIr_OFFSET+(0x80*(_ch))+(0x2000*(_cmc)),r._cmic_cmc_pktdma_desc_addr_hi)
#define WRITE_CMIC_CMC_PKTDMA_DESC_ADDR_HIr(u,_cmc,_ch,r) BCMDRD_DEV_WRITE32(u,CMIC_CMC_PKTDMA_DESC_ADDR_HIr_OFFSET+(0x80*(_ch))+(0x2000*(_cmc)),r._cmic_cmc_pktdma_desc_addr_hi)
/*
* This structure should be used to declare and program CMIC_CMC_PKTDMA_DESC_ADDR_LO.
*
*/
typedef union CMIC_CMC_PKTDMA_DESC_ADDR_LOr_s {
uint32_t v[1];
uint32_t cmic_cmc_pktdma_desc_addr_lo[1];
uint32_t _cmic_cmc_pktdma_desc_addr_lo;
} CMIC_CMC_PKTDMA_DESC_ADDR_LOr_t;
#define CMIC_CMC_PKTDMA_DESC_ADDR_LOr_CLR(r) (r).cmic_cmc_pktdma_desc_addr_lo[0] = 0
#define CMIC_CMC_PKTDMA_DESC_ADDR_LOr_SET(r,d) (r).cmic_cmc_pktdma_desc_addr_lo[0] = d
#define CMIC_CMC_PKTDMA_DESC_ADDR_LOr_GET(r) (r).cmic_cmc_pktdma_desc_addr_lo[0]
#define CMIC_CMC_PKTDMA_DESC_ADDR_LOr_OFFSET 0x00003104
#define CMIC_CMC_PKTDMA_DESC_ADDR_LOr_ADDRf_GET(r) ((r).cmic_cmc_pktdma_desc_addr_lo[0])
#define CMIC_CMC_PKTDMA_DESC_ADDR_LOr_ADDRf_SET(r,f) (r).cmic_cmc_pktdma_desc_addr_lo[0]=((uint32_t)f)
#define READ_CMIC_CMC_PKTDMA_DESC_ADDR_LOr(u,_cmc,_ch,r) BCMDRD_DEV_READ32(u,CMIC_CMC_PKTDMA_DESC_ADDR_LOr_OFFSET+(0x80*(_ch))+(0x2000*(_cmc)),r._cmic_cmc_pktdma_desc_addr_lo)
#define WRITE_CMIC_CMC_PKTDMA_DESC_ADDR_LOr(u,_cmc,_ch,r) BCMDRD_DEV_WRITE32(u,CMIC_CMC_PKTDMA_DESC_ADDR_LOr_OFFSET+(0x80*(_ch))+(0x2000*(_cmc)),r._cmic_cmc_pktdma_desc_addr_lo)
/*
* This structure should be used to declare and program CMIC_CMC_PKTDMA_DESC_COUNT_REQ.
*
*/
typedef union CMIC_CMC_PKTDMA_DESC_COUNT_REQr_s {
uint32_t v[1];
uint32_t cmic_cmc_pktdma_desc_count_req[1];
uint32_t _cmic_cmc_pktdma_desc_count_req;
} CMIC_CMC_PKTDMA_DESC_COUNT_REQr_t;
#define CMIC_CMC_PKTDMA_DESC_COUNT_REQr_CLR(r) (r).cmic_cmc_pktdma_desc_count_req[0] = 0
#define CMIC_CMC_PKTDMA_DESC_COUNT_REQr_SET(r,d) (r).cmic_cmc_pktdma_desc_count_req[0] = d
#define CMIC_CMC_PKTDMA_DESC_COUNT_REQr_GET(r) (r).cmic_cmc_pktdma_desc_count_req[0]
#define CMIC_CMC_PKTDMA_DESC_COUNT_REQr_OFFSET 0x00003154
#define CMIC_CMC_PKTDMA_DESC_COUNT_REQr_COUNTf_GET(r) ((r).cmic_cmc_pktdma_desc_count_req[0])
#define CMIC_CMC_PKTDMA_DESC_COUNT_REQr_COUNTf_SET(r,f) (r).cmic_cmc_pktdma_desc_count_req[0]=((uint32_t)f)
#define READ_CMIC_CMC_PKTDMA_DESC_COUNT_REQr(u,_cmc,_ch,r) BCMDRD_DEV_READ32(u,CMIC_CMC_PKTDMA_DESC_COUNT_REQr_OFFSET+(0x80*(_ch))+(0x2000*(_cmc)),r._cmic_cmc_pktdma_desc_count_req)
#define WRITE_CMIC_CMC_PKTDMA_DESC_COUNT_REQr(u,_cmc,_ch,r) BCMDRD_DEV_WRITE32(u,CMIC_CMC_PKTDMA_DESC_COUNT_REQr_OFFSET+(0x80*(_ch))+(0x2000*(_cmc)),r._cmic_cmc_pktdma_desc_count_req)
/*
* This structure should be used to declare and program CMIC_CMC_PKTDMA_DESC_COUNT_RX.
*
*/
typedef union CMIC_CMC_PKTDMA_DESC_COUNT_RXr_s {
uint32_t v[1];
uint32_t cmic_cmc_pktdma_desc_count_rx[1];
uint32_t _cmic_cmc_pktdma_desc_count_rx;
} CMIC_CMC_PKTDMA_DESC_COUNT_RXr_t;
#define CMIC_CMC_PKTDMA_DESC_COUNT_RXr_CLR(r) (r).cmic_cmc_pktdma_desc_count_rx[0] = 0
#define CMIC_CMC_PKTDMA_DESC_COUNT_RXr_SET(r,d) (r).cmic_cmc_pktdma_desc_count_rx[0] = d
#define CMIC_CMC_PKTDMA_DESC_COUNT_RXr_GET(r) (r).cmic_cmc_pktdma_desc_count_rx[0]
#define CMIC_CMC_PKTDMA_DESC_COUNT_RXr_OFFSET 0x00003158
#define CMIC_CMC_PKTDMA_DESC_COUNT_RXr_COUNTf_GET(r) ((r).cmic_cmc_pktdma_desc_count_rx[0])
#define CMIC_CMC_PKTDMA_DESC_COUNT_RXr_COUNTf_SET(r,f) (r).cmic_cmc_pktdma_desc_count_rx[0]=((uint32_t)f)
#define READ_CMIC_CMC_PKTDMA_DESC_COUNT_RXr(u,_cmc,_ch,r) BCMDRD_DEV_READ32(u,CMIC_CMC_PKTDMA_DESC_COUNT_RXr_OFFSET+(0x80*(_ch))+(0x2000*(_cmc)),r._cmic_cmc_pktdma_desc_count_rx)
#define WRITE_CMIC_CMC_PKTDMA_DESC_COUNT_RXr(u,_cmc,_ch,r) BCMDRD_DEV_WRITE32(u,CMIC_CMC_PKTDMA_DESC_COUNT_RXr_OFFSET+(0x80*(_ch))+(0x2000*(_cmc)),r._cmic_cmc_pktdma_desc_count_rx)
/*
* This structure should be used to declare and program CMIC_CMC_PKTDMA_DESC_COUNT_STATUS_WR.
*
*/
typedef union CMIC_CMC_PKTDMA_DESC_COUNT_STATUS_WRr_s {
uint32_t v[1];
uint32_t cmic_cmc_pktdma_desc_count_status_wr[1];
uint32_t _cmic_cmc_pktdma_desc_count_status_wr;
} CMIC_CMC_PKTDMA_DESC_COUNT_STATUS_WRr_t;
#define CMIC_CMC_PKTDMA_DESC_COUNT_STATUS_WRr_CLR(r) (r).cmic_cmc_pktdma_desc_count_status_wr[0] = 0
#define CMIC_CMC_PKTDMA_DESC_COUNT_STATUS_WRr_SET(r,d) (r).cmic_cmc_pktdma_desc_count_status_wr[0] = d
#define CMIC_CMC_PKTDMA_DESC_COUNT_STATUS_WRr_GET(r) (r).cmic_cmc_pktdma_desc_count_status_wr[0]
#define CMIC_CMC_PKTDMA_DESC_COUNT_STATUS_WRr_OFFSET 0x0000315c
#define CMIC_CMC_PKTDMA_DESC_COUNT_STATUS_WRr_COUNTf_GET(r) ((r).cmic_cmc_pktdma_desc_count_status_wr[0])
#define CMIC_CMC_PKTDMA_DESC_COUNT_STATUS_WRr_COUNTf_SET(r,f) (r).cmic_cmc_pktdma_desc_count_status_wr[0]=((uint32_t)f)
#define READ_CMIC_CMC_PKTDMA_DESC_COUNT_STATUS_WRr(u,_cmc,_ch,r) BCMDRD_DEV_READ32(u,CMIC_CMC_PKTDMA_DESC_COUNT_STATUS_WRr_OFFSET+(0x80*(_ch))+(0x2000*(_cmc)),r._cmic_cmc_pktdma_desc_count_status_wr)
#define WRITE_CMIC_CMC_PKTDMA_DESC_COUNT_STATUS_WRr(u,_cmc,_ch,r) BCMDRD_DEV_WRITE32(u,CMIC_CMC_PKTDMA_DESC_COUNT_STATUS_WRr_OFFSET+(0x80*(_ch))+(0x2000*(_cmc)),r._cmic_cmc_pktdma_desc_count_status_wr)
/*
* This structure should be used to declare and program CMIC_CMC_PKTDMA_DESC_HALT_ADDR_HI.
*
*/
typedef union CMIC_CMC_PKTDMA_DESC_HALT_ADDR_HIr_s {
uint32_t v[1];
uint32_t cmic_cmc_pktdma_desc_halt_addr_hi[1];
uint32_t _cmic_cmc_pktdma_desc_halt_addr_hi;
} CMIC_CMC_PKTDMA_DESC_HALT_ADDR_HIr_t;
#define CMIC_CMC_PKTDMA_DESC_HALT_ADDR_HIr_CLR(r) (r).cmic_cmc_pktdma_desc_halt_addr_hi[0] = 0
#define CMIC_CMC_PKTDMA_DESC_HALT_ADDR_HIr_SET(r,d) (r).cmic_cmc_pktdma_desc_halt_addr_hi[0] = d
#define CMIC_CMC_PKTDMA_DESC_HALT_ADDR_HIr_GET(r) (r).cmic_cmc_pktdma_desc_halt_addr_hi[0]
#define CMIC_CMC_PKTDMA_DESC_HALT_ADDR_HIr_OFFSET 0x00003110
#define CMIC_CMC_PKTDMA_DESC_HALT_ADDR_HIr_ADDRf_GET(r) ((r).cmic_cmc_pktdma_desc_halt_addr_hi[0])
#define CMIC_CMC_PKTDMA_DESC_HALT_ADDR_HIr_ADDRf_SET(r,f) (r).cmic_cmc_pktdma_desc_halt_addr_hi[0]=((uint32_t)f)
#define READ_CMIC_CMC_PKTDMA_DESC_HALT_ADDR_HIr(u,_cmc,_ch,r) BCMDRD_DEV_READ32(u,CMIC_CMC_PKTDMA_DESC_HALT_ADDR_HIr_OFFSET+(0x80*(_ch))+(0x2000*(_cmc)),r._cmic_cmc_pktdma_desc_halt_addr_hi)
#define WRITE_CMIC_CMC_PKTDMA_DESC_HALT_ADDR_HIr(u,_cmc,_ch,r) BCMDRD_DEV_WRITE32(u,CMIC_CMC_PKTDMA_DESC_HALT_ADDR_HIr_OFFSET+(0x80*(_ch))+(0x2000*(_cmc)),r._cmic_cmc_pktdma_desc_halt_addr_hi)
/*
* This structure should be used to declare and program CMIC_CMC_PKTDMA_DESC_HALT_ADDR_LO.
*
*/
typedef union CMIC_CMC_PKTDMA_DESC_HALT_ADDR_LOr_s {
uint32_t v[1];
uint32_t cmic_cmc_pktdma_desc_halt_addr_lo[1];
uint32_t _cmic_cmc_pktdma_desc_halt_addr_lo;
} CMIC_CMC_PKTDMA_DESC_HALT_ADDR_LOr_t;
#define CMIC_CMC_PKTDMA_DESC_HALT_ADDR_LOr_CLR(r) (r).cmic_cmc_pktdma_desc_halt_addr_lo[0] = 0
#define CMIC_CMC_PKTDMA_DESC_HALT_ADDR_LOr_SET(r,d) (r).cmic_cmc_pktdma_desc_halt_addr_lo[0] = d
#define CMIC_CMC_PKTDMA_DESC_HALT_ADDR_LOr_GET(r) (r).cmic_cmc_pktdma_desc_halt_addr_lo[0]
#define CMIC_CMC_PKTDMA_DESC_HALT_ADDR_LOr_OFFSET 0x0000310c
#define CMIC_CMC_PKTDMA_DESC_HALT_ADDR_LOr_ADDRf_GET(r) ((r).cmic_cmc_pktdma_desc_halt_addr_lo[0])
#define CMIC_CMC_PKTDMA_DESC_HALT_ADDR_LOr_ADDRf_SET(r,f) (r).cmic_cmc_pktdma_desc_halt_addr_lo[0]=((uint32_t)f)
#define READ_CMIC_CMC_PKTDMA_DESC_HALT_ADDR_LOr(u,_cmc,_ch,r) BCMDRD_DEV_READ32(u,CMIC_CMC_PKTDMA_DESC_HALT_ADDR_LOr_OFFSET+(0x80*(_ch))+(0x2000*(_cmc)),r._cmic_cmc_pktdma_desc_halt_addr_lo)
#define WRITE_CMIC_CMC_PKTDMA_DESC_HALT_ADDR_LOr(u,_cmc,_ch,r) BCMDRD_DEV_WRITE32(u,CMIC_CMC_PKTDMA_DESC_HALT_ADDR_LOr_OFFSET+(0x80*(_ch))+(0x2000*(_cmc)),r._cmic_cmc_pktdma_desc_halt_addr_lo)
/*
* This structure should be used to declare and program CMIC_CMC_PKTDMA_INTR.
*
*/
typedef union CMIC_CMC_PKTDMA_INTRr_s {
uint32_t v[1];
uint32_t cmic_cmc_pktdma_intr[1];
uint32_t _cmic_cmc_pktdma_intr;
} CMIC_CMC_PKTDMA_INTRr_t;
#define CMIC_CMC_PKTDMA_INTRr_CLR(r) (r).cmic_cmc_pktdma_intr[0] = 0
#define CMIC_CMC_PKTDMA_INTRr_SET(r,d) (r).cmic_cmc_pktdma_intr[0] = d
#define CMIC_CMC_PKTDMA_INTRr_GET(r) (r).cmic_cmc_pktdma_intr[0]
#define CMIC_CMC_PKTDMA_INTRr_OFFSET 0x00003118
#define CMIC_CMC_PKTDMA_INTRr_CHAIN_DONE_INTRf_GET(r) (((r).cmic_cmc_pktdma_intr[0]) & 0x1)
#define CMIC_CMC_PKTDMA_INTRr_CHAIN_DONE_INTRf_SET(r,f) (r).cmic_cmc_pktdma_intr[0]=(((r).cmic_cmc_pktdma_intr[0] & ~((uint32_t)0x1)) | (((uint32_t)f) & 0x1))
#define CMIC_CMC_PKTDMA_INTRr_DESC_DONE_INTRf_GET(r) ((((r).cmic_cmc_pktdma_intr[0]) >> 1) & 0x1)
#define CMIC_CMC_PKTDMA_INTRr_DESC_DONE_INTRf_SET(r,f) (r).cmic_cmc_pktdma_intr[0]=(((r).cmic_cmc_pktdma_intr[0] & ~((uint32_t)0x1 << 1)) | ((((uint32_t)f) & 0x1) << 1))
#define CMIC_CMC_PKTDMA_INTRr_DESC_CONTROLLED_INTRf_GET(r) ((((r).cmic_cmc_pktdma_intr[0]) >> 2) & 0x1)
#define CMIC_CMC_PKTDMA_INTRr_DESC_CONTROLLED_INTRf_SET(r,f) (r).cmic_cmc_pktdma_intr[0]=(((r).cmic_cmc_pktdma_intr[0] & ~((uint32_t)0x1 << 2)) | ((((uint32_t)f) & 0x1) << 2))
#define CMIC_CMC_PKTDMA_INTRr_INTR_COALESCING_INTRf_GET(r) ((((r).cmic_cmc_pktdma_intr[0]) >> 3) & 0x1)
#define CMIC_CMC_PKTDMA_INTRr_INTR_COALESCING_INTRf_SET(r,f) (r).cmic_cmc_pktdma_intr[0]=(((r).cmic_cmc_pktdma_intr[0] & ~((uint32_t)0x1 << 3)) | ((((uint32_t)f) & 0x1) << 3))
#define READ_CMIC_CMC_PKTDMA_INTRr(u,_cmc,_ch,r) BCMDRD_DEV_READ32(u,CMIC_CMC_PKTDMA_INTRr_OFFSET+(0x80*(_ch))+(0x2000*(_cmc)),r._cmic_cmc_pktdma_intr)
#define WRITE_CMIC_CMC_PKTDMA_INTRr(u,_cmc,_ch,r) BCMDRD_DEV_WRITE32(u,CMIC_CMC_PKTDMA_INTRr_OFFSET+(0x80*(_ch))+(0x2000*(_cmc)),r._cmic_cmc_pktdma_intr)
/*
* This structure should be used to declare and program CMIC_CMC_PKTDMA_INTR_CLR.
*
*/
typedef union CMIC_CMC_PKTDMA_INTR_CLRr_s {
uint32_t v[1];
uint32_t cmic_cmc_pktdma_intr_clr[1];
uint32_t _cmic_cmc_pktdma_intr_clr;
} CMIC_CMC_PKTDMA_INTR_CLRr_t;
#define CMIC_CMC_PKTDMA_INTR_CLRr_CLR(r) (r).cmic_cmc_pktdma_intr_clr[0] = 0
#define CMIC_CMC_PKTDMA_INTR_CLRr_SET(r,d) (r).cmic_cmc_pktdma_intr_clr[0] = d
#define CMIC_CMC_PKTDMA_INTR_CLRr_GET(r) (r).cmic_cmc_pktdma_intr_clr[0]
#define CMIC_CMC_PKTDMA_INTR_CLRr_OFFSET 0x00003120
#define CMIC_CMC_PKTDMA_INTR_CLRr_DESC_DONE_INTR_CLRf_GET(r) ((((r).cmic_cmc_pktdma_intr_clr[0]) >> 1) & 0x1)
#define CMIC_CMC_PKTDMA_INTR_CLRr_DESC_DONE_INTR_CLRf_SET(r,f) (r).cmic_cmc_pktdma_intr_clr[0]=(((r).cmic_cmc_pktdma_intr_clr[0] & ~((uint32_t)0x1 << 1)) | ((((uint32_t)f) & 0x1) << 1))
#define CMIC_CMC_PKTDMA_INTR_CLRr_DESC_CONTROLLED_INTR_CLRf_GET(r) ((((r).cmic_cmc_pktdma_intr_clr[0]) >> 2) & 0x1)
#define CMIC_CMC_PKTDMA_INTR_CLRr_DESC_CONTROLLED_INTR_CLRf_SET(r,f) (r).cmic_cmc_pktdma_intr_clr[0]=(((r).cmic_cmc_pktdma_intr_clr[0] & ~((uint32_t)0x1 << 2)) | ((((uint32_t)f) & 0x1) << 2))
#define CMIC_CMC_PKTDMA_INTR_CLRr_INTR_COALESCING_INTR_CLRf_GET(r) ((((r).cmic_cmc_pktdma_intr_clr[0]) >> 3) & 0x1)
#define CMIC_CMC_PKTDMA_INTR_CLRr_INTR_COALESCING_INTR_CLRf_SET(r,f) (r).cmic_cmc_pktdma_intr_clr[0]=(((r).cmic_cmc_pktdma_intr_clr[0] & ~((uint32_t)0x1 << 3)) | ((((uint32_t)f) & 0x1) << 3))
#define CMIC_CMC_PKTDMA_INTR_CLRr_DYN_RCNFG_ERR_CLRf_GET(r) ((((r).cmic_cmc_pktdma_intr_clr[0]) >> 4) & 0x1)
#define CMIC_CMC_PKTDMA_INTR_CLRr_DYN_RCNFG_ERR_CLRf_SET(r,f) (r).cmic_cmc_pktdma_intr_clr[0]=(((r).cmic_cmc_pktdma_intr_clr[0] & ~((uint32_t)0x1 << 4)) | ((((uint32_t)f) & 0x1) << 4))
#define READ_CMIC_CMC_PKTDMA_INTR_CLRr(u,_cmc,_ch,r) BCMDRD_DEV_READ32(u,CMIC_CMC_PKTDMA_INTR_CLRr_OFFSET+(0x80*(_ch))+(0x2000*(_cmc)),r._cmic_cmc_pktdma_intr_clr)
#define WRITE_CMIC_CMC_PKTDMA_INTR_CLRr(u,_cmc,_ch,r) BCMDRD_DEV_WRITE32(u,CMIC_CMC_PKTDMA_INTR_CLRr_OFFSET+(0x80*(_ch))+(0x2000*(_cmc)),r._cmic_cmc_pktdma_intr_clr)
/*
* This structure should be used to declare and program CMIC_CMC_PKTDMA_INTR_COAL.
*
*/
typedef union CMIC_CMC_PKTDMA_INTR_COALr_s {
uint32_t v[1];
uint32_t cmic_cmc_pktdma_intr_coal[1];
uint32_t _cmic_cmc_pktdma_intr_coal;
} CMIC_CMC_PKTDMA_INTR_COALr_t;
#define CMIC_CMC_PKTDMA_INTR_COALr_CLR(r) (r).cmic_cmc_pktdma_intr_coal[0] = 0
#define CMIC_CMC_PKTDMA_INTR_COALr_SET(r,d) (r).cmic_cmc_pktdma_intr_coal[0] = d
#define CMIC_CMC_PKTDMA_INTR_COALr_GET(r) (r).cmic_cmc_pktdma_intr_coal[0]
#define CMIC_CMC_PKTDMA_INTR_COALr_OFFSET 0x0000312c
#define CMIC_CMC_PKTDMA_INTR_COALr_TIMERf_GET(r) (((r).cmic_cmc_pktdma_intr_coal[0]) & 0xffff)
#define CMIC_CMC_PKTDMA_INTR_COALr_TIMERf_SET(r,f) (r).cmic_cmc_pktdma_intr_coal[0]=(((r).cmic_cmc_pktdma_intr_coal[0] & ~((uint32_t)0xffff)) | (((uint32_t)f) & 0xffff))
#define CMIC_CMC_PKTDMA_INTR_COALr_COUNTf_GET(r) ((((r).cmic_cmc_pktdma_intr_coal[0]) >> 16) & 0x7fff)
#define CMIC_CMC_PKTDMA_INTR_COALr_COUNTf_SET(r,f) (r).cmic_cmc_pktdma_intr_coal[0]=(((r).cmic_cmc_pktdma_intr_coal[0] & ~((uint32_t)0x7fff << 16)) | ((((uint32_t)f) & 0x7fff) << 16))
#define CMIC_CMC_PKTDMA_INTR_COALr_ENABLEf_GET(r) ((((r).cmic_cmc_pktdma_intr_coal[0]) >> 31) & 0x1)
#define CMIC_CMC_PKTDMA_INTR_COALr_ENABLEf_SET(r,f) (r).cmic_cmc_pktdma_intr_coal[0]=(((r).cmic_cmc_pktdma_intr_coal[0] & ~((uint32_t)0x1 << 31)) | ((((uint32_t)f) & 0x1) << 31))
#define READ_CMIC_CMC_PKTDMA_INTR_COALr(u,_cmc,_ch,r) BCMDRD_DEV_READ32(u,CMIC_CMC_PKTDMA_INTR_COALr_OFFSET+(0x80*(_ch))+(0x2000*(_cmc)),r._cmic_cmc_pktdma_intr_coal)
#define WRITE_CMIC_CMC_PKTDMA_INTR_COALr(u,_cmc,_ch,r) BCMDRD_DEV_WRITE32(u,CMIC_CMC_PKTDMA_INTR_COALr_OFFSET+(0x80*(_ch))+(0x2000*(_cmc)),r._cmic_cmc_pktdma_intr_coal)
/*
* This structure should be used to declare and program CMIC_CMC_PKTDMA_INTR_ENABLE.
*
*/
typedef union CMIC_CMC_PKTDMA_INTR_ENABLEr_s {
uint32_t v[1];
uint32_t cmic_cmc_pktdma_intr_enable[1];
uint32_t _cmic_cmc_pktdma_intr_enable;
} CMIC_CMC_PKTDMA_INTR_ENABLEr_t;
#define CMIC_CMC_PKTDMA_INTR_ENABLEr_CLR(r) (r).cmic_cmc_pktdma_intr_enable[0] = 0
#define CMIC_CMC_PKTDMA_INTR_ENABLEr_SET(r,d) (r).cmic_cmc_pktdma_intr_enable[0] = d
#define CMIC_CMC_PKTDMA_INTR_ENABLEr_GET(r) (r).cmic_cmc_pktdma_intr_enable[0]
#define CMIC_CMC_PKTDMA_INTR_ENABLEr_OFFSET 0x0000311c
#define CMIC_CMC_PKTDMA_INTR_ENABLEr_CHAIN_DONE_INTR_ENABLEf_GET(r) (((r).cmic_cmc_pktdma_intr_enable[0]) & 0x1)
#define CMIC_CMC_PKTDMA_INTR_ENABLEr_CHAIN_DONE_INTR_ENABLEf_SET(r,f) (r).cmic_cmc_pktdma_intr_enable[0]=(((r).cmic_cmc_pktdma_intr_enable[0] & ~((uint32_t)0x1)) | (((uint32_t)f) & 0x1))
#define CMIC_CMC_PKTDMA_INTR_ENABLEr_DESC_DONE_INTR_ENABLEf_GET(r) ((((r).cmic_cmc_pktdma_intr_enable[0]) >> 1) & 0x1)
#define CMIC_CMC_PKTDMA_INTR_ENABLEr_DESC_DONE_INTR_ENABLEf_SET(r,f) (r).cmic_cmc_pktdma_intr_enable[0]=(((r).cmic_cmc_pktdma_intr_enable[0] & ~((uint32_t)0x1 << 1)) | ((((uint32_t)f) & 0x1) << 1))
#define CMIC_CMC_PKTDMA_INTR_ENABLEr_DESC_CONTROLLED_INTR_ENABLEf_GET(r) ((((r).cmic_cmc_pktdma_intr_enable[0]) >> 2) & 0x1)
#define CMIC_CMC_PKTDMA_INTR_ENABLEr_DESC_CONTROLLED_INTR_ENABLEf_SET(r,f) (r).cmic_cmc_pktdma_intr_enable[0]=(((r).cmic_cmc_pktdma_intr_enable[0] & ~((uint32_t)0x1 << 2)) | ((((uint32_t)f) & 0x1) << 2))
#define CMIC_CMC_PKTDMA_INTR_ENABLEr_INTR_COALESCING_INTR_ENABLEf_GET(r) ((((r).cmic_cmc_pktdma_intr_enable[0]) >> 3) & 0x1)
#define CMIC_CMC_PKTDMA_INTR_ENABLEr_INTR_COALESCING_INTR_ENABLEf_SET(r,f) (r).cmic_cmc_pktdma_intr_enable[0]=(((r).cmic_cmc_pktdma_intr_enable[0] & ~((uint32_t)0x1 << 3)) | ((((uint32_t)f) & 0x1) << 3))
#define READ_CMIC_CMC_PKTDMA_INTR_ENABLEr(u,_cmc,_ch,r) BCMDRD_DEV_READ32(u,CMIC_CMC_PKTDMA_INTR_ENABLEr_OFFSET+(0x80*(_ch))+(0x2000*(_cmc)),r._cmic_cmc_pktdma_intr_enable)
#define WRITE_CMIC_CMC_PKTDMA_INTR_ENABLEr(u,_cmc,_ch,r) BCMDRD_DEV_WRITE32(u,CMIC_CMC_PKTDMA_INTR_ENABLEr_OFFSET+(0x80*(_ch))+(0x2000*(_cmc)),r._cmic_cmc_pktdma_intr_enable)
/*
* This structure should be used to declare and program CMIC_CMC_PKTDMA_PKT_COUNT_RXPKT.
*
*/
typedef union CMIC_CMC_PKTDMA_PKT_COUNT_RXPKTr_s {
uint32_t v[1];
uint32_t cmic_cmc_pktdma_pkt_count_rxpkt[1];
uint32_t _cmic_cmc_pktdma_pkt_count_rxpkt;
} CMIC_CMC_PKTDMA_PKT_COUNT_RXPKTr_t;
#define CMIC_CMC_PKTDMA_PKT_COUNT_RXPKTr_CLR(r) (r).cmic_cmc_pktdma_pkt_count_rxpkt[0] = 0
#define CMIC_CMC_PKTDMA_PKT_COUNT_RXPKTr_SET(r,d) (r).cmic_cmc_pktdma_pkt_count_rxpkt[0] = d
#define CMIC_CMC_PKTDMA_PKT_COUNT_RXPKTr_GET(r) (r).cmic_cmc_pktdma_pkt_count_rxpkt[0]
#define CMIC_CMC_PKTDMA_PKT_COUNT_RXPKTr_OFFSET 0x00003148
#define CMIC_CMC_PKTDMA_PKT_COUNT_RXPKTr_COUNTf_GET(r) ((r).cmic_cmc_pktdma_pkt_count_rxpkt[0])
#define CMIC_CMC_PKTDMA_PKT_COUNT_RXPKTr_COUNTf_SET(r,f) (r).cmic_cmc_pktdma_pkt_count_rxpkt[0]=((uint32_t)f)
#define READ_CMIC_CMC_PKTDMA_PKT_COUNT_RXPKTr(u,_cmc,_ch,r) BCMDRD_DEV_READ32(u,CMIC_CMC_PKTDMA_PKT_COUNT_RXPKTr_OFFSET+(0x80*(_ch))+(0x2000*(_cmc)),r._cmic_cmc_pktdma_pkt_count_rxpkt)
#define WRITE_CMIC_CMC_PKTDMA_PKT_COUNT_RXPKTr(u,_cmc,_ch,r) BCMDRD_DEV_WRITE32(u,CMIC_CMC_PKTDMA_PKT_COUNT_RXPKTr_OFFSET+(0x80*(_ch))+(0x2000*(_cmc)),r._cmic_cmc_pktdma_pkt_count_rxpkt)
/*
* This structure should be used to declare and program CMIC_CMC_PKTDMA_PKT_COUNT_RXPKT_DROP.
*
*/
typedef union CMIC_CMC_PKTDMA_PKT_COUNT_RXPKT_DROPr_s {
uint32_t v[1];
uint32_t cmic_cmc_pktdma_pkt_count_rxpkt_drop[1];
uint32_t _cmic_cmc_pktdma_pkt_count_rxpkt_drop;
} CMIC_CMC_PKTDMA_PKT_COUNT_RXPKT_DROPr_t;
#define CMIC_CMC_PKTDMA_PKT_COUNT_RXPKT_DROPr_CLR(r) (r).cmic_cmc_pktdma_pkt_count_rxpkt_drop[0] = 0
#define CMIC_CMC_PKTDMA_PKT_COUNT_RXPKT_DROPr_SET(r,d) (r).cmic_cmc_pktdma_pkt_count_rxpkt_drop[0] = d
#define CMIC_CMC_PKTDMA_PKT_COUNT_RXPKT_DROPr_GET(r) (r).cmic_cmc_pktdma_pkt_count_rxpkt_drop[0]
#define CMIC_CMC_PKTDMA_PKT_COUNT_RXPKT_DROPr_OFFSET 0x00003150
#define CMIC_CMC_PKTDMA_PKT_COUNT_RXPKT_DROPr_COUNTf_GET(r) ((r).cmic_cmc_pktdma_pkt_count_rxpkt_drop[0])
#define CMIC_CMC_PKTDMA_PKT_COUNT_RXPKT_DROPr_COUNTf_SET(r,f) (r).cmic_cmc_pktdma_pkt_count_rxpkt_drop[0]=((uint32_t)f)
#define READ_CMIC_CMC_PKTDMA_PKT_COUNT_RXPKT_DROPr(u,_cmc,_ch,r) BCMDRD_DEV_READ32(u,CMIC_CMC_PKTDMA_PKT_COUNT_RXPKT_DROPr_OFFSET+(0x80*(_ch))+(0x2000*(_cmc)),r._cmic_cmc_pktdma_pkt_count_rxpkt_drop)
#define WRITE_CMIC_CMC_PKTDMA_PKT_COUNT_RXPKT_DROPr(u,_cmc,_ch,r) BCMDRD_DEV_WRITE32(u,CMIC_CMC_PKTDMA_PKT_COUNT_RXPKT_DROPr_OFFSET+(0x80*(_ch))+(0x2000*(_cmc)),r._cmic_cmc_pktdma_pkt_count_rxpkt_drop)
/*
* This structure should be used to declare and program CMIC_CMC_PKTDMA_PKT_COUNT_TXPKT.
*
*/
typedef union CMIC_CMC_PKTDMA_PKT_COUNT_TXPKTr_s {
uint32_t v[1];
uint32_t cmic_cmc_pktdma_pkt_count_txpkt[1];
uint32_t _cmic_cmc_pktdma_pkt_count_txpkt;
} CMIC_CMC_PKTDMA_PKT_COUNT_TXPKTr_t;
#define CMIC_CMC_PKTDMA_PKT_COUNT_TXPKTr_CLR(r) (r).cmic_cmc_pktdma_pkt_count_txpkt[0] = 0
#define CMIC_CMC_PKTDMA_PKT_COUNT_TXPKTr_SET(r,d) (r).cmic_cmc_pktdma_pkt_count_txpkt[0] = d
#define CMIC_CMC_PKTDMA_PKT_COUNT_TXPKTr_GET(r) (r).cmic_cmc_pktdma_pkt_count_txpkt[0]
#define CMIC_CMC_PKTDMA_PKT_COUNT_TXPKTr_OFFSET 0x0000314c
#define CMIC_CMC_PKTDMA_PKT_COUNT_TXPKTr_COUNTf_GET(r) ((r).cmic_cmc_pktdma_pkt_count_txpkt[0])
#define CMIC_CMC_PKTDMA_PKT_COUNT_TXPKTr_COUNTf_SET(r,f) (r).cmic_cmc_pktdma_pkt_count_txpkt[0]=((uint32_t)f)
#define READ_CMIC_CMC_PKTDMA_PKT_COUNT_TXPKTr(u,_cmc,_ch,r) BCMDRD_DEV_READ32(u,CMIC_CMC_PKTDMA_PKT_COUNT_TXPKTr_OFFSET+(0x80*(_ch))+(0x2000*(_cmc)),r._cmic_cmc_pktdma_pkt_count_txpkt)
#define WRITE_CMIC_CMC_PKTDMA_PKT_COUNT_TXPKTr(u,_cmc,_ch,r) BCMDRD_DEV_WRITE32(u,CMIC_CMC_PKTDMA_PKT_COUNT_TXPKTr_OFFSET+(0x80*(_ch))+(0x2000*(_cmc)),r._cmic_cmc_pktdma_pkt_count_txpkt)
/*
* This structure should be used to declare and program CMIC_CMC_PKTDMA_RXBUF_THRESHOLD_CONFIG.
*
*/
typedef union CMIC_CMC_PKTDMA_RXBUF_THRESHOLD_CONFIGr_s {
uint32_t v[1];
uint32_t cmic_cmc_pktdma_rxbuf_threshold_config[1];
uint32_t _cmic_cmc_pktdma_rxbuf_threshold_config;
} CMIC_CMC_PKTDMA_RXBUF_THRESHOLD_CONFIGr_t;
#define CMIC_CMC_PKTDMA_RXBUF_THRESHOLD_CONFIGr_CLR(r) (r).cmic_cmc_pktdma_rxbuf_threshold_config[0] = 0
#define CMIC_CMC_PKTDMA_RXBUF_THRESHOLD_CONFIGr_SET(r,d) (r).cmic_cmc_pktdma_rxbuf_threshold_config[0] = d
#define CMIC_CMC_PKTDMA_RXBUF_THRESHOLD_CONFIGr_GET(r) (r).cmic_cmc_pktdma_rxbuf_threshold_config[0]
#define CMIC_CMC_PKTDMA_RXBUF_THRESHOLD_CONFIGr_OFFSET 0x00003138
#define CMIC_CMC_PKTDMA_RXBUF_THRESHOLD_CONFIGr_RXBUF_THRESHOLDf_GET(r) (((r).cmic_cmc_pktdma_rxbuf_threshold_config[0]) & 0x1ff)
#define CMIC_CMC_PKTDMA_RXBUF_THRESHOLD_CONFIGr_RXBUF_THRESHOLDf_SET(r,f) (r).cmic_cmc_pktdma_rxbuf_threshold_config[0]=(((r).cmic_cmc_pktdma_rxbuf_threshold_config[0] & ~((uint32_t)0x1ff)) | (((uint32_t)f) & 0x1ff))
#define CMIC_CMC_PKTDMA_RXBUF_THRESHOLD_CONFIGr_ENABLEf_GET(r) ((((r).cmic_cmc_pktdma_rxbuf_threshold_config[0]) >> 9) & 0x1)
#define CMIC_CMC_PKTDMA_RXBUF_THRESHOLD_CONFIGr_ENABLEf_SET(r,f) (r).cmic_cmc_pktdma_rxbuf_threshold_config[0]=(((r).cmic_cmc_pktdma_rxbuf_threshold_config[0] & ~((uint32_t)0x1 << 9)) | ((((uint32_t)f) & 0x1) << 9))
#define READ_CMIC_CMC_PKTDMA_RXBUF_THRESHOLD_CONFIGr(u,_cmc,_ch,r) BCMDRD_DEV_READ32(u,CMIC_CMC_PKTDMA_RXBUF_THRESHOLD_CONFIGr_OFFSET+(0x80*(_ch))+(0x2000*(_cmc)),r._cmic_cmc_pktdma_rxbuf_threshold_config)
#define WRITE_CMIC_CMC_PKTDMA_RXBUF_THRESHOLD_CONFIGr(u,_cmc,_ch,r) BCMDRD_DEV_WRITE32(u,CMIC_CMC_PKTDMA_RXBUF_THRESHOLD_CONFIGr_OFFSET+(0x80*(_ch))+(0x2000*(_cmc)),r._cmic_cmc_pktdma_rxbuf_threshold_config)
/*
* This structure should be used to declare and program CMIC_CMC_PKTDMA_STAT.
*
*/
typedef union CMIC_CMC_PKTDMA_STATr_s {
uint32_t v[1];
uint32_t cmic_cmc_pktdma_stat[1];
uint32_t _cmic_cmc_pktdma_stat;
} CMIC_CMC_PKTDMA_STATr_t;
#define CMIC_CMC_PKTDMA_STATr_CLR(r) (r).cmic_cmc_pktdma_stat[0] = 0
#define CMIC_CMC_PKTDMA_STATr_SET(r,d) (r).cmic_cmc_pktdma_stat[0] = d
#define CMIC_CMC_PKTDMA_STATr_GET(r) (r).cmic_cmc_pktdma_stat[0]
#define CMIC_CMC_PKTDMA_STATr_OFFSET 0x00003114
#define CMIC_CMC_PKTDMA_STATr_CHAIN_DONEf_GET(r) (((r).cmic_cmc_pktdma_stat[0]) & 0x1)
#define CMIC_CMC_PKTDMA_STATr_CHAIN_DONEf_SET(r,f) (r).cmic_cmc_pktdma_stat[0]=(((r).cmic_cmc_pktdma_stat[0] & ~((uint32_t)0x1)) | (((uint32_t)f) & 0x1))
#define CMIC_CMC_PKTDMA_STATr_DMA_ACTIVEf_GET(r) ((((r).cmic_cmc_pktdma_stat[0]) >> 1) & 0x1)
#define CMIC_CMC_PKTDMA_STATr_DMA_ACTIVEf_SET(r,f) (r).cmic_cmc_pktdma_stat[0]=(((r).cmic_cmc_pktdma_stat[0] & ~((uint32_t)0x1 << 1)) | ((((uint32_t)f) & 0x1) << 1))
#define CMIC_CMC_PKTDMA_STATr_STWT_ADDR_DECODE_ERRf_GET(r) ((((r).cmic_cmc_pktdma_stat[0]) >> 2) & 0x1)
#define CMIC_CMC_PKTDMA_STATr_STWT_ADDR_DECODE_ERRf_SET(r,f) (r).cmic_cmc_pktdma_stat[0]=(((r).cmic_cmc_pktdma_stat[0] & ~((uint32_t)0x1 << 2)) | ((((uint32_t)f) & 0x1) << 2))
#define CMIC_CMC_PKTDMA_STATr_PKTWRRD_ADDR_DECODE_ERRf_GET(r) ((((r).cmic_cmc_pktdma_stat[0]) >> 3) & 0x1)
#define CMIC_CMC_PKTDMA_STATr_PKTWRRD_ADDR_DECODE_ERRf_SET(r,f) (r).cmic_cmc_pktdma_stat[0]=(((r).cmic_cmc_pktdma_stat[0] & ~((uint32_t)0x1 << 3)) | ((((uint32_t)f) & 0x1) << 3))
#define CMIC_CMC_PKTDMA_STATr_DESCRD_ADDR_DECODE_ERRf_GET(r) ((((r).cmic_cmc_pktdma_stat[0]) >> 4) & 0x1)
#define CMIC_CMC_PKTDMA_STATr_DESCRD_ADDR_DECODE_ERRf_SET(r,f) (r).cmic_cmc_pktdma_stat[0]=(((r).cmic_cmc_pktdma_stat[0] & ~((uint32_t)0x1 << 4)) | ((((uint32_t)f) & 0x1) << 4))
#define CMIC_CMC_PKTDMA_STATr_PKTWR_ECC_ERRf_GET(r) ((((r).cmic_cmc_pktdma_stat[0]) >> 5) & 0x1)
#define CMIC_CMC_PKTDMA_STATr_PKTWR_ECC_ERRf_SET(r,f) (r).cmic_cmc_pktdma_stat[0]=(((r).cmic_cmc_pktdma_stat[0] & ~((uint32_t)0x1 << 5)) | ((((uint32_t)f) & 0x1) << 5))
#define CMIC_CMC_PKTDMA_STATr_CH_IN_HALTf_GET(r) ((((r).cmic_cmc_pktdma_stat[0]) >> 6) & 0x1)
#define CMIC_CMC_PKTDMA_STATr_CH_IN_HALTf_SET(r,f) (r).cmic_cmc_pktdma_stat[0]=(((r).cmic_cmc_pktdma_stat[0] & ~((uint32_t)0x1 << 6)) | ((((uint32_t)f) & 0x1) << 6))
#define CMIC_CMC_PKTDMA_STATr_RELOAD_UNALIGNED_ERRf_GET(r) ((((r).cmic_cmc_pktdma_stat[0]) >> 7) & 0x1)
#define CMIC_CMC_PKTDMA_STATr_RELOAD_UNALIGNED_ERRf_SET(r,f) (r).cmic_cmc_pktdma_stat[0]=(((r).cmic_cmc_pktdma_stat[0] & ~((uint32_t)0x1 << 7)) | ((((uint32_t)f) & 0x1) << 7))
#define CMIC_CMC_PKTDMA_STATr_DESC_DONEf_GET(r) ((((r).cmic_cmc_pktdma_stat[0]) >> 8) & 0x1)
#define CMIC_CMC_PKTDMA_STATr_DESC_DONEf_SET(r,f) (r).cmic_cmc_pktdma_stat[0]=(((r).cmic_cmc_pktdma_stat[0] & ~((uint32_t)0x1 << 8)) | ((((uint32_t)f) & 0x1) << 8))
#define CMIC_CMC_PKTDMA_STATr_DESC_CONTROLLEDf_GET(r) ((((r).cmic_cmc_pktdma_stat[0]) >> 9) & 0x1)
#define CMIC_CMC_PKTDMA_STATr_DESC_CONTROLLEDf_SET(r,f) (r).cmic_cmc_pktdma_stat[0]=(((r).cmic_cmc_pktdma_stat[0] & ~((uint32_t)0x1 << 9)) | ((((uint32_t)f) & 0x1) << 9))
#define CMIC_CMC_PKTDMA_STATr_INTR_COALESCINGf_GET(r) ((((r).cmic_cmc_pktdma_stat[0]) >> 10) & 0x1)
#define CMIC_CMC_PKTDMA_STATr_INTR_COALESCINGf_SET(r,f) (r).cmic_cmc_pktdma_stat[0]=(((r).cmic_cmc_pktdma_stat[0] & ~((uint32_t)0x1 << 10)) | ((((uint32_t)f) & 0x1) << 10))
#define CMIC_CMC_PKTDMA_STATr_DYN_RCNFG_ERRf_GET(r) ((((r).cmic_cmc_pktdma_stat[0]) >> 11) & 0x1)
#define CMIC_CMC_PKTDMA_STATr_DYN_RCNFG_ERRf_SET(r,f) (r).cmic_cmc_pktdma_stat[0]=(((r).cmic_cmc_pktdma_stat[0] & ~((uint32_t)0x1 << 11)) | ((((uint32_t)f) & 0x1) << 11))
#define CMIC_CMC_PKTDMA_STATr_INVALID_AXI_CMD_ERRf_GET(r) ((((r).cmic_cmc_pktdma_stat[0]) >> 12) & 0x1)
#define CMIC_CMC_PKTDMA_STATr_INVALID_AXI_CMD_ERRf_SET(r,f) (r).cmic_cmc_pktdma_stat[0]=(((r).cmic_cmc_pktdma_stat[0] & ~((uint32_t)0x1 << 12)) | ((((uint32_t)f) & 0x1) << 12))
#define CMIC_CMC_PKTDMA_STATr_DMA_IS_ENf_GET(r) ((((r).cmic_cmc_pktdma_stat[0]) >> 13) & 0x1)
#define CMIC_CMC_PKTDMA_STATr_DMA_IS_ENf_SET(r,f) (r).cmic_cmc_pktdma_stat[0]=(((r).cmic_cmc_pktdma_stat[0] & ~((uint32_t)0x1 << 13)) | ((((uint32_t)f) & 0x1) << 13))
#define CMIC_CMC_PKTDMA_STATr_DESC_MEM_ECC_ERRf_GET(r) ((((r).cmic_cmc_pktdma_stat[0]) >> 14) & 0x1)
#define CMIC_CMC_PKTDMA_STATr_DESC_MEM_ECC_ERRf_SET(r,f) (r).cmic_cmc_pktdma_stat[0]=(((r).cmic_cmc_pktdma_stat[0] & ~((uint32_t)0x1 << 14)) | ((((uint32_t)f) & 0x1) << 14))
#define READ_CMIC_CMC_PKTDMA_STATr(u,_cmc,_ch,r) BCMDRD_DEV_READ32(u,CMIC_CMC_PKTDMA_STATr_OFFSET+(0x80*(_ch))+(0x2000*(_cmc)),r._cmic_cmc_pktdma_stat)
#define WRITE_CMIC_CMC_PKTDMA_STATr(u,_cmc,_ch,r) BCMDRD_DEV_WRITE32(u,CMIC_CMC_PKTDMA_STATr_OFFSET+(0x80*(_ch))+(0x2000*(_cmc)),r._cmic_cmc_pktdma_stat)
#define RX_DCB_SIZE 16
#define TX_DCB_SIZE 16
/*
* This structure should be used to declare and program TX_DCB.
*
*/
typedef union TX_DCB_s {
uint32_t v[4];
uint32_t tx_dcb[4];
uint32_t _tx_dcb;
} TX_DCB_t;
#define TX_DCB_CLR(r) sal_memset(&((r).tx_dcb[0]), 0, sizeof(TX_DCB_t))
#define TX_DCB_SET(r,i,d) (r).tx_dcb[i] = d
#define TX_DCB_GET(r,i) (r).tx_dcb[i]
#define TX_DCB_OFFSET 0x00000000
#define TX_DCB_BYTES_TRANSFERREDf_GET(r) (((r).tx_dcb[3]) & 0xffff)
#define TX_DCB_BYTES_TRANSFERREDf_SET(r,f) (r).tx_dcb[3]=(((r).tx_dcb[3] & ~((uint32_t)0xffff)) | (((uint32_t)f) & 0xffff))
#define TX_DCB_DONEf_GET(r) ((((r).tx_dcb[3]) >> 31) & 0x1)
#define TX_DCB_DONEf_SET(r,f) (r).tx_dcb[3]=(((r).tx_dcb[3] & ~((uint32_t)0x1 << 31)) | ((((uint32_t)f) & 0x1) << 31))
#define TX_DCB_BYTE_COUNTf_GET(r) (((r).tx_dcb[2]) & 0xffff)
#define TX_DCB_BYTE_COUNTf_SET(r,f) (r).tx_dcb[2]=(((r).tx_dcb[2] & ~((uint32_t)0xffff)) | (((uint32_t)f) & 0xffff))
#define TX_DCB_CHAINf_GET(r) ((((r).tx_dcb[2]) >> 16) & 0x1)
#define TX_DCB_CHAINf_SET(r,f) (r).tx_dcb[2]=(((r).tx_dcb[2] & ~((uint32_t)0x1 << 16)) | ((((uint32_t)f) & 0x1) << 16))
#define TX_DCB_SGf_GET(r) ((((r).tx_dcb[2]) >> 17) & 0x1)
#define TX_DCB_SGf_SET(r,f) (r).tx_dcb[2]=(((r).tx_dcb[2] & ~((uint32_t)0x1 << 17)) | ((((uint32_t)f) & 0x1) << 17))
#define TX_DCB_RELOADf_GET(r) ((((r).tx_dcb[2]) >> 18) & 0x1)
#define TX_DCB_RELOADf_SET(r,f) (r).tx_dcb[2]=(((r).tx_dcb[2] & ~((uint32_t)0x1 << 18)) | ((((uint32_t)f) & 0x1) << 18))
#define TX_DCB_HGf_GET(r) ((((r).tx_dcb[2]) >> 19) & 0x1)
#define TX_DCB_HGf_SET(r,f) (r).tx_dcb[2]=(((r).tx_dcb[2] & ~((uint32_t)0x1 << 19)) | ((((uint32_t)f) & 0x1) << 19))
#define TX_DCB_PURGEf_GET(r) ((((r).tx_dcb[2]) >> 22) & 0x1)
#define TX_DCB_PURGEf_SET(r,f) (r).tx_dcb[2]=(((r).tx_dcb[2] & ~((uint32_t)0x1 << 22)) | ((((uint32_t)f) & 0x1) << 22))
#define TX_DCB_DESC_DONE_INTRf_GET(r) ((((r).tx_dcb[2]) >> 23) & 0x1)
#define TX_DCB_DESC_DONE_INTRf_SET(r,f) (r).tx_dcb[2]=(((r).tx_dcb[2] & ~((uint32_t)0x1 << 23)) | ((((uint32_t)f) & 0x1) << 23))
#define TX_DCB_DESC_CTRL_INTRf_GET(r) ((((r).tx_dcb[2]) >> 24) & 0x1)
#define TX_DCB_DESC_CTRL_INTRf_SET(r,f) (r).tx_dcb[2]=(((r).tx_dcb[2] & ~((uint32_t)0x1 << 24)) | ((((uint32_t)f) & 0x1) << 24))
#define TX_DCB_DESC_REMAINf_GET(r) ((((r).tx_dcb[2]) >> 25) & 0xf)
#define TX_DCB_DESC_REMAINf_SET(r,f) (r).tx_dcb[2]=(((r).tx_dcb[2] & ~((uint32_t)0xf << 25)) | ((((uint32_t)f) & 0xf) << 25))
#define TX_DCB_DESC_STAT_WR_DISABLEf_GET(r) ((((r).tx_dcb[2]) >> 29) & 0x1)
#define TX_DCB_DESC_STAT_WR_DISABLEf_SET(r,f) (r).tx_dcb[2]=(((r).tx_dcb[2] & ~((uint32_t)0x1 << 29)) | ((((uint32_t)f) & 0x1) << 29))
#define TX_DCB_ADDR_HIf_GET(r) ((r).tx_dcb[1])
#define TX_DCB_ADDR_HIf_SET(r,f) (r).tx_dcb[1]=((uint32_t)f)
#define TX_DCB_ADDR_LOf_GET(r) ((r).tx_dcb[0])
#define TX_DCB_ADDR_LOf_SET(r,f) (r).tx_dcb[0]=((uint32_t)f)
/*
* This structure should be used to declare and program RX_DCB.
*
*/
typedef union RX_DCB_s {
uint32_t v[4];
uint32_t rx_dcb[4];
uint32_t _rx_dcb;
} RX_DCB_t;
#define RX_DCB_CLR(r) sal_memset(&((r).rx_dcb[0]), 0, sizeof(RX_DCB_t))
#define RX_DCB_SET(r,i,d) (r).rx_dcb[i] = d
#define RX_DCB_GET(r,i) (r).rx_dcb[i]
#define RX_DCB_OFFSET 0x00000000
#define RX_DCB_BYTES_TRANSFERREDf_GET(r) (((r).rx_dcb[3]) & 0xffff)
#define RX_DCB_BYTES_TRANSFERREDf_SET(r,f) (r).rx_dcb[3]=(((r).rx_dcb[3] & ~((uint32_t)0xffff)) | (((uint32_t)f) & 0xffff))
#define RX_DCB_END_BITf_GET(r) ((((r).rx_dcb[3]) >> 16) & 0x1)
#define RX_DCB_END_BITf_SET(r,f) (r).rx_dcb[3]=(((r).rx_dcb[3] & ~((uint32_t)0x1 << 16)) | ((((uint32_t)f) & 0x1) << 16))
#define RX_DCB_START_BITf_GET(r) ((((r).rx_dcb[3]) >> 17) & 0x1)
#define RX_DCB_START_BITf_SET(r,f) (r).rx_dcb[3]=(((r).rx_dcb[3] & ~((uint32_t)0x1 << 17)) | ((((uint32_t)f) & 0x1) << 17))
#define RX_DCB_ERRORf_GET(r) ((((r).rx_dcb[3]) >> 18) & 0x1)
#define RX_DCB_ERRORf_SET(r,f) (r).rx_dcb[3]=(((r).rx_dcb[3] & ~((uint32_t)0x1 << 18)) | ((((uint32_t)f) & 0x1) << 18))
#define RX_DCB_DONEf_GET(r) ((((r).rx_dcb[3]) >> 31) & 0x1)
#define RX_DCB_DONEf_SET(r,f) (r).rx_dcb[3]=(((r).rx_dcb[3] & ~((uint32_t)0x1 << 31)) | ((((uint32_t)f) & 0x1) << 31))
#define RX_DCB_BYTE_COUNTf_GET(r) (((r).rx_dcb[2]) & 0xffff)
#define RX_DCB_BYTE_COUNTf_SET(r,f) (r).rx_dcb[2]=(((r).rx_dcb[2] & ~((uint32_t)0xffff)) | (((uint32_t)f) & 0xffff))
#define RX_DCB_CHAINf_GET(r) ((((r).rx_dcb[2]) >> 16) & 0x1)
#define RX_DCB_CHAINf_SET(r,f) (r).rx_dcb[2]=(((r).rx_dcb[2] & ~((uint32_t)0x1 << 16)) | ((((uint32_t)f) & 0x1) << 16))
#define RX_DCB_SGf_GET(r) ((((r).rx_dcb[2]) >> 17) & 0x1)
#define RX_DCB_SGf_SET(r,f) (r).rx_dcb[2]=(((r).rx_dcb[2] & ~((uint32_t)0x1 << 17)) | ((((uint32_t)f) & 0x1) << 17))
#define RX_DCB_RELOADf_GET(r) ((((r).rx_dcb[2]) >> 18) & 0x1)
#define RX_DCB_RELOADf_SET(r,f) (r).rx_dcb[2]=(((r).rx_dcb[2] & ~((uint32_t)0x1 << 18)) | ((((uint32_t)f) & 0x1) << 18))
#define RX_DCB_DESC_DONE_INTRf_GET(r) ((((r).rx_dcb[2]) >> 23) & 0x1)
#define RX_DCB_DESC_DONE_INTRf_SET(r,f) (r).rx_dcb[2]=(((r).rx_dcb[2] & ~((uint32_t)0x1 << 23)) | ((((uint32_t)f) & 0x1) << 23))
#define RX_DCB_DESC_CTRL_INTRf_GET(r) ((((r).rx_dcb[2]) >> 24) & 0x1)
#define RX_DCB_DESC_CTRL_INTRf_SET(r,f) (r).rx_dcb[2]=(((r).rx_dcb[2] & ~((uint32_t)0x1 << 24)) | ((((uint32_t)f) & 0x1) << 24))
#define RX_DCB_DESC_REMAINf_GET(r) ((((r).rx_dcb[2]) >> 25) & 0xf)
#define RX_DCB_DESC_REMAINf_SET(r,f) (r).rx_dcb[2]=(((r).rx_dcb[2] & ~((uint32_t)0xf << 25)) | ((((uint32_t)f) & 0xf) << 25))
#define RX_DCB_DESC_STAT_WR_DISABLEf_GET(r) ((((r).rx_dcb[2]) >> 29) & 0x1)
#define RX_DCB_DESC_STAT_WR_DISABLEf_SET(r,f) (r).rx_dcb[2]=(((r).rx_dcb[2] & ~((uint32_t)0x1 << 29)) | ((((uint32_t)f) & 0x1) << 29))
#define RX_DCB_ADDR_HIf_GET(r) ((r).rx_dcb[1])
#define RX_DCB_ADDR_HIf_SET(r,f) (r).rx_dcb[1]=((uint32_t)f)
#define RX_DCB_ADDR_LOf_GET(r) ((r).rx_dcb[0])
#define RX_DCB_ADDR_LOf_SET(r,f) (r).rx_dcb[0]=((uint32_t)f)
#endif /* BCMCNET_CMICR_ACC_H */

2
platform/broadcom/saibcm-modules/sdklt/bcmcnet/include/bcmcnet/bcmcnet_cmicx.h
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@ -4,7 +4,7 @@
*
*/
/*
* $Copyright: Copyright 2018-2021 Broadcom. All rights reserved.
* $Copyright: Copyright 2018-2022 Broadcom. All rights reserved.
* The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
*
* This program is free software; you can redistribute it and/or

32
platform/broadcom/saibcm-modules/sdklt/bcmcnet/include/bcmcnet/bcmcnet_core.h
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@ -4,7 +4,7 @@
*
*/
/*
* $Copyright: Copyright 2018-2021 Broadcom. All rights reserved.
* $Copyright: Copyright 2018-2022 Broadcom. All rights reserved.
* The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
*
* This program is free software; you can redistribute it and/or
@ -125,7 +125,7 @@ struct intr_handle {
void *priv;
/*! Interrupt number */
int intr_num;
int inum;
/*! Interrupt flags */
uint32_t intr_flags;
@ -190,7 +190,7 @@ struct queue_group {
uint32_t irq_mask;
/*! Indicating the group is attached */
int attached;
bool attached;
};
/*!
@ -721,6 +721,20 @@ typedef int (*pdma_rx_f)(struct pdma_dev *dev, int queue, void *buf);
*/
typedef int (*pdma_tx_f)(struct pdma_dev *dev, int queue, void *buf);
/*!
* Network device detach.
*
* \param [in] dev Pointer to device structure.
*/
typedef void (*sys_ndev_detach_f)(struct pdma_dev *dev);
/*!
* Network device attach.
*
* \param [in] dev Pointer to device structure.
*/
typedef void (*sys_ndev_attach_f)(struct pdma_dev *dev);
/*!
* Suspend Tx queue.
*
@ -842,6 +856,12 @@ struct pdma_dev {
/*! Packet transmission */
pdma_tx_f pkt_xmit;
/*! Network device detach */
sys_ndev_detach_f ndev_detach;
/*! Network device attach */
sys_ndev_attach_f ndev_attach;
/*! Tx suspend */
sys_tx_suspend_f tx_suspend;
@ -902,13 +922,13 @@ struct pdma_dev {
dev_mode_t mode;
/*! Device is started */
int started;
bool started;
/*! Device is started but suspended */
int suspended;
bool suspended;
/*! Device is initialized and HMI driver is attached */
int attached;
bool attached;
};
/*!

2
platform/broadcom/saibcm-modules/sdklt/bcmcnet/include/bcmcnet/bcmcnet_dev.h
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@ -4,7 +4,7 @@
*
*/
/*
* $Copyright: Copyright 2018-2021 Broadcom. All rights reserved.
* $Copyright: Copyright 2018-2022 Broadcom. All rights reserved.
* The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
*
* This program is free software; you can redistribute it and/or

2
platform/broadcom/saibcm-modules/sdklt/bcmcnet/include/bcmcnet/bcmcnet_internal.h
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@ -4,7 +4,7 @@
*
*/
/*
* $Copyright: Copyright 2018-2021 Broadcom. All rights reserved.
* $Copyright: Copyright 2018-2022 Broadcom. All rights reserved.
* The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
*
* This program is free software; you can redistribute it and/or

27
platform/broadcom/saibcm-modules/sdklt/bcmcnet/include/bcmcnet/bcmcnet_rxtx.h
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@ -4,7 +4,7 @@
*
*/
/*
* $Copyright: Copyright 2018-2021 Broadcom. All rights reserved.
* $Copyright: Copyright 2018-2022 Broadcom. All rights reserved.
* The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
*
* This program is free software; you can redistribute it and/or
@ -148,13 +148,19 @@ struct pdma_rx_queue {
#define PDMA_RX_QUEUE_ACTIVE (1 << 2)
/*! Queue is busy */
#define PDMA_RX_QUEUE_BUSY (1 << 3)
/*! Queue in batch refilling mode */
#define PDMA_RX_BATCH_REFILL (1 << 4)
/*! Queue status */
uint32_t status;
/*! Queue is suspended */
#define PDMA_RX_QUEUE_XOFF (1 << 4)
/*! Queue is batch refilled */
#define PDMA_RX_BATCH_REFILL (1 << 5)
#define PDMA_RX_QUEUE_XOFF (1 << 0)
/*! DMA buffer mode */
enum buf_mode mode;
enum buf_mode buf_mode;
/*! Page order in PDMA_BUF_MODE_PAGE mode */
uint32_t page_order;
};
/*!
@ -248,13 +254,16 @@ struct pdma_tx_queue {
#define PDMA_TX_QUEUE_ACTIVE (1 << 2)
/*! Queue is setup */
#define PDMA_TX_QUEUE_BUSY (1 << 3)
/*! Queue in polling mode */
#define PDMA_TX_QUEUE_POLL (1 << 4)
/*! Queue status */
uint32_t status;
/*! Queue is suspended */
#define PDMA_TX_QUEUE_XOFF (1 << 4)
/*! Queue is poll mode */
#define PDMA_TX_QUEUE_POLL (1 << 5)
#define PDMA_TX_QUEUE_XOFF (1 << 0)
/*! DMA buffer mode */
enum buf_mode mode;
enum buf_mode buf_mode;
};
/*!

8
platform/broadcom/saibcm-modules/sdklt/bcmcnet/include/bcmcnet/bcmcnet_types.h
View File

@ -4,7 +4,7 @@
*
*/
/*
* $Copyright: Copyright 2018-2021 Broadcom. All rights reserved.
* $Copyright: Copyright 2018-2022 Broadcom. All rights reserved.
* The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
*
* This program is free software; you can redistribute it and/or
@ -118,8 +118,14 @@ typedef struct bcmcnet_dev_info {
/*! Number of Rx descriptors per queue */
uint32_t nb_rx_desc[NUM_Q_MAX];
/*! State of Rx queues */
uint32_t rxq_state[NUM_Q_MAX];
/*! Number of Tx descriptors per queue */
uint32_t nb_tx_desc[NUM_Q_MAX];
/*! State of Tx queues */
uint32_t txq_state[NUM_Q_MAX];
} bcmcnet_dev_info_t;
/*!

52
platform/broadcom/saibcm-modules/sdklt/bcmcnet/main/bcmcnet_core.c
View File

@ -4,7 +4,7 @@
*
*/
/*
* $Copyright: Copyright 2018-2021 Broadcom. All rights reserved.
* $Copyright: Copyright 2018-2022 Broadcom. All rights reserved.
* The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
*
* This program is free software; you can redistribute it and/or
@ -37,7 +37,7 @@ bcmcnet_pdma_dev_init(struct pdma_dev *dev)
return rv;
}
dev->attached = 1;
dev->attached = true;
return SHR_E_NONE;
}
@ -55,7 +55,7 @@ bcmcnet_pdma_dev_cleanup(struct pdma_dev *dev)
dev->ops->dev_close(dev);
dev->ops = NULL;
dev->attached = 0;
dev->attached = false;
return SHR_E_NONE;
}
@ -83,6 +83,8 @@ bcmcnet_pdma_dev_start(struct pdma_dev *dev)
return rv;
}
dev->started = true;
/* Start all the Rx queues */
for (qi = 0; qi < ctrl->nb_rxq; qi++) {
rv = dev->ops->rx_queue_setup(dev, qi);
@ -95,16 +97,16 @@ bcmcnet_pdma_dev_start(struct pdma_dev *dev)
/* Start all the Tx queues */
for (qi = 0; qi < ctrl->nb_txq; qi++) {
dev->ops->tx_queue_setup(dev, qi);
rv = dev->ops->tx_queue_setup(dev, qi);
if (SHR_FAILURE(rv)) {
return rv;
}
dev->ops->tx_queue_intr_enable(dev, qi);
dev->ops->tx_queue_start(dev, qi);
dev->ops->tx_queue_wakeup(dev, qi);
}
bcmcnet_pdma_dev_info_get(dev);
dev->started = 1;
return SHR_E_NONE;
}
@ -127,20 +129,27 @@ bcmcnet_pdma_dev_stop(struct pdma_dev *dev)
/* Stop all the Rx queues */
for (qi = 0; qi < ctrl->nb_rxq; qi++) {
dev->ops->rx_queue_intr_disable(dev, qi);
dev->ops->rx_queue_stop(dev, qi);
dev->ops->rx_queue_release(dev, qi);
}
/* Stop all the Tx queues */
for (qi = 0; qi < ctrl->nb_txq; qi++) {
dev->ops->tx_queue_intr_disable(dev, qi);
dev->ops->tx_queue_stop(dev, qi);
dev->ops->tx_queue_wakeup(dev, qi);
dev->ops->tx_queue_release(dev, qi);
}
dev->started = 0;
dev->started = false;
/* Disable all the Rx interrupts */
for (qi = 0; qi < ctrl->nb_rxq; qi++) {
dev->ops->rx_queue_intr_disable(dev, qi);
}
/* Disable all the Tx interrupts */
for (qi = 0; qi < ctrl->nb_txq; qi++) {
dev->ops->tx_queue_intr_disable(dev, qi);
}
return SHR_E_NONE;
}
@ -159,13 +168,13 @@ bcmcnet_pdma_dev_suspend(struct pdma_dev *dev)
return SHR_E_UNAVAIL;
}
dev->suspended = true;
rv = dev->ops->dev_suspend(dev);
if (SHR_FAILURE(rv)) {
return rv;
}
dev->suspended = true;
if (dev->flags & PDMA_ABORT) {
/* Abort all the Tx queues */
for (qi = 0; qi < ctrl->nb_txq; qi++) {
@ -173,7 +182,7 @@ bcmcnet_pdma_dev_suspend(struct pdma_dev *dev)
}
/* Abort all the Rx queues */
for (qi = 0; qi < ctrl->nb_rxq; qi++) {
dev->ops->rx_queue_stop(dev, qi);;
dev->ops->rx_queue_stop(dev, qi);
}
}
@ -194,6 +203,8 @@ bcmcnet_pdma_dev_resume(struct pdma_dev *dev)
return SHR_E_UNAVAIL;
}
dev->suspended = false;
if (dev->flags & PDMA_ABORT) {
/*
* H/W configuration of Packet DMA is gone in the FFB apply phase,
@ -215,7 +226,6 @@ bcmcnet_pdma_dev_resume(struct pdma_dev *dev)
dev->ops->tx_queue_intr_enable(dev, qi);
dev->ops->tx_queue_start(dev, qi);
}
dev->flags &= ~PDMA_ABORT;
}
rv = dev->ops->dev_resume(dev);
@ -223,7 +233,9 @@ bcmcnet_pdma_dev_resume(struct pdma_dev *dev)
return rv;
}
dev->suspended = false;
if (dev->flags & PDMA_ABORT) {
dev->flags &= ~PDMA_ABORT;
}
return rv;
}
@ -710,7 +722,7 @@ bcmcnet_group_intr_check(struct pdma_dev *dev, int group)
int
bcmcnet_rx_queue_poll(struct pdma_dev *dev, int queue, int budget)
{
if (dev->started == 0) {
if (!dev->started) {
return SHR_E_NONE;
}
@ -727,7 +739,7 @@ bcmcnet_rx_queue_poll(struct pdma_dev *dev, int queue, int budget)
int
bcmcnet_tx_queue_poll(struct pdma_dev *dev, int queue, int budget)
{
if (dev->started == 0) {
if (!dev->started) {
return SHR_E_NONE;
}
@ -744,7 +756,7 @@ bcmcnet_tx_queue_poll(struct pdma_dev *dev, int queue, int budget)
int
bcmcnet_queue_poll(struct pdma_dev *dev, struct intr_handle *hdl, int budget)
{
if (dev->started == 0) {
if (!dev->started) {
return SHR_E_NONE;
}
@ -761,7 +773,7 @@ bcmcnet_queue_poll(struct pdma_dev *dev, struct intr_handle *hdl, int budget)
int
bcmcnet_group_poll(struct pdma_dev *dev, int group, int budget)
{
if (dev->started == 0) {
if (!dev->started) {
return SHR_E_NONE;
}

50
platform/broadcom/saibcm-modules/sdklt/bcmcnet/main/bcmcnet_dev.c
View File

@ -4,7 +4,7 @@
*
*/
/*
* $Copyright: Copyright 2018-2021 Broadcom. All rights reserved.
* $Copyright: Copyright 2018-2022 Broadcom. All rights reserved.
* The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
*
* This program is free software; you can redistribute it and/or
@ -143,7 +143,7 @@ bcn_tx_queues_alloc(struct pdma_dev *dev)
txq->group_id = gi;
txq->chan_id = qi + gi * dev->grp_queues;
txq->ctrl = ctrl;
txq->sem = sal_sem_create("bcmcnetTxMutexSem", SAL_SEM_BINARY, 0);
txq->sem = sal_sem_create("bcmcnetTxMutexSem", SAL_SEM_BINARY, 1);
if (!txq->sem) {
goto error;
}
@ -220,8 +220,8 @@ bcn_rx_queue_group_parse(struct pdma_dev *dev, uint32_t qbm)
}
rxq->buf_size += dev->rx_ph_size;
/* Set mode and state for the queue */
rxq->mode = bm->rx_buf_mode(dev, rxq);
rxq->state = PDMA_RX_QUEUE_USED;
rxq->buf_mode = bm->rx_buf_mode(dev, rxq);
rxq->state |= PDMA_RX_QUEUE_USED;
if (dev->flags & PDMA_RX_BATCHING) {
rxq->free_thresh = rxq->nb_desc / 4;
rxq->state |= PDMA_RX_BATCH_REFILL;
@ -297,7 +297,7 @@ bcn_tx_queue_group_parse(struct pdma_dev *dev, uint32_t qbm)
ctrl->grp[gi].nb_desc[qi] = txq->nb_desc;
}
/* Set mode and state for the queue */
txq->state = PDMA_TX_QUEUE_USED;
txq->state |= PDMA_TX_QUEUE_USED;
if (dev->flags & PDMA_TX_POLLING) {
txq->free_thresh = txq->nb_desc / 4;
txq->state |= PDMA_TX_QUEUE_POLL;
@ -364,7 +364,7 @@ bcmcnet_pdma_config(struct pdma_dev *dev, uint32_t bm_rxq, uint32_t bm_txq)
}
/* Update group metadata */
if (!ctrl->grp[gi].bm_rxq && !ctrl->grp[gi].bm_txq) {
ctrl->grp[gi].attached = 0;
ctrl->grp[gi].attached = false;
ctrl->bm_grp &= ~(1 << gi);
ctrl->nb_grp--;
continue;
@ -398,7 +398,7 @@ bcmcnet_pdma_close(struct pdma_dev *dev)
ctrl->nb_grp--;
ctrl->grp[gi].irq_mask = 0;
ctrl->grp[gi].poll_queues = 0;
ctrl->grp[gi].attached = 0;
ctrl->grp[gi].attached = false;
}
bcn_rx_queues_free(dev);
@ -420,8 +420,12 @@ bcmcnet_pdma_suspend(struct pdma_dev *dev)
bcmcnet_pdma_rx_queue_suspend(dev, qi);
}
for (qi = 0; qi < ctrl->nb_txq; qi++) {
bcmcnet_pdma_tx_queue_suspend(dev, qi);
if (dev->ndev_detach) {
dev->ndev_detach(dev);
} else {
for (qi = 0; qi < ctrl->nb_txq; qi++) {
bcmcnet_pdma_tx_queue_suspend(dev, qi);
}
}
return SHR_E_NONE;
@ -436,12 +440,16 @@ bcmcnet_pdma_resume(struct pdma_dev *dev)
struct dev_ctrl *ctrl = &dev->ctrl;
uint32_t qi;
for (qi = 0; qi < ctrl->nb_rxq; qi++) {
bcmcnet_pdma_rx_queue_resume(dev, qi);
if (dev->ndev_attach) {
dev->ndev_attach(dev);
} else {
for (qi = 0; qi < ctrl->nb_txq; qi++) {
bcmcnet_pdma_tx_queue_resume(dev, qi);
}
}
for (qi = 0; qi < ctrl->nb_txq; qi++) {
bcmcnet_pdma_tx_queue_resume(dev, qi);
for (qi = 0; qi < ctrl->nb_rxq; qi++) {
bcmcnet_pdma_rx_queue_resume(dev, qi);
}
return SHR_E_NONE;
@ -485,6 +493,7 @@ bcmcnet_pdma_info_get(struct pdma_dev *dev)
}
dev->info.rx_buf_size[qi] = rxq->buf_size;
dev->info.nb_rx_desc[qi] = rxq->nb_desc;
dev->info.rxq_state[qi] = rxq->state;
}
for (qi = 0; qi < ctrl->nb_txq; qi++) {
@ -493,6 +502,7 @@ bcmcnet_pdma_info_get(struct pdma_dev *dev)
continue;
}
dev->info.nb_tx_desc[qi] = txq->nb_desc;
dev->info.txq_state[qi] = txq->state;
}
}
@ -681,7 +691,6 @@ bcmcnet_pdma_rx_queue_start(struct pdma_dev *dev, int queue)
rxq = (struct pdma_rx_queue *)ctrl->rx_queue[queue];
rxq->state |= PDMA_RX_QUEUE_ACTIVE;
rxq->state &= ~PDMA_RX_QUEUE_XOFF;
return hw->hdls.chan_start(hw, rxq->chan_id);
}
@ -702,7 +711,6 @@ bcmcnet_pdma_rx_queue_stop(struct pdma_dev *dev, int queue)
rxq = (struct pdma_rx_queue *)ctrl->rx_queue[queue];
rxq->state &= ~PDMA_RX_QUEUE_ACTIVE;
rxq->state |= PDMA_RX_QUEUE_XOFF;
return hw->hdls.chan_stop(hw, rxq->chan_id);
}
@ -723,7 +731,6 @@ bcmcnet_pdma_tx_queue_start(struct pdma_dev *dev, int queue)
txq = (struct pdma_tx_queue *)ctrl->tx_queue[queue];
txq->state |= PDMA_TX_QUEUE_ACTIVE;
txq->state &= ~PDMA_TX_QUEUE_XOFF;
return dev->flags & PDMA_CHAIN_MODE ? SHR_E_NONE :
hw->hdls.chan_start(hw, txq->chan_id);
@ -745,7 +752,6 @@ bcmcnet_pdma_tx_queue_stop(struct pdma_dev *dev, int queue)
txq = (struct pdma_tx_queue *)ctrl->tx_queue[queue];
txq->state &= ~PDMA_TX_QUEUE_ACTIVE;
txq->state |= PDMA_TX_QUEUE_XOFF;
return hw->hdls.chan_stop(hw, txq->chan_id);
}
@ -876,7 +882,11 @@ bcmcnet_pdma_tx_queue_intr_disable(struct pdma_dev *dev, int queue)
txq = (struct pdma_tx_queue *)ctrl->tx_queue[queue];
return hw->hdls.chan_intr_disable(hw, txq->chan_id);
if (txq->state & PDMA_TX_QUEUE_POLL) {
return SHR_E_NONE;
} else {
return hw->hdls.chan_intr_disable(hw, txq->chan_id);
}
}
/*!
@ -1008,8 +1018,8 @@ bcmcnet_pdma_open(struct pdma_dev *dev)
hdl->group = gi;
hdl->chan = chan;
hdl->dev = dev;
hdl->intr_num = hw->hdls.chan_intr_num_get(hw, chan);
if (hdl->intr_num < 0) {
hdl->inum = hw->hdls.chan_intr_num_get(hw, chan);
if (hdl->inum < 0) {
return SHR_E_INTERNAL;
}
}

41
platform/broadcom/saibcm-modules/sdklt/bcmcnet/main/bcmcnet_rxtx.c
View File

@ -4,7 +4,7 @@
*
*/
/*
* $Copyright: Copyright 2018-2021 Broadcom. All rights reserved.
* $Copyright: Copyright 2018-2022 Broadcom. All rights reserved.
* The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
*
* This program is free software; you can redistribute it and/or
@ -212,8 +212,8 @@ bcmcnet_pdma_rx_queue_setup(struct pdma_dev *dev, int queue)
}
if (dev->mode == DEV_MODE_VNET) {
ctrl->vsync.rx_ring_addr[queue] = rxq->ring_addr;
ctrl->vsync.rx_ring_size[queue] = rxq->nb_desc;
ctrl->vsync.rx_ring_addr[rxq->chan_id] = rxq->ring_addr;
ctrl->vsync.rx_ring_size[rxq->chan_id] = rxq->nb_desc;
}
rxq->state |= PDMA_RX_QUEUE_SETUP;
@ -273,14 +273,12 @@ bcmcnet_pdma_rx_vqueue_setup(struct pdma_dev *dev, int queue)
return SHR_E_NONE;
}
if (dev->ctrl.vsync.rx_ring_addr[queue]) {
if (dev->ctrl.vsync.rx_ring_addr[vrxq->chan_id]) {
vrxq->curr = 0;
vrxq->nb_desc = dev->ctrl.vsync.rx_ring_size[queue];
vrxq->ring_addr = dev->ctrl.vsync.rx_ring_addr[queue];
vrxq->nb_desc = dev->ctrl.vsync.rx_ring_size[vrxq->chan_id];
vrxq->ring_addr = dev->ctrl.vsync.rx_ring_addr[vrxq->chan_id];
vrxq->ring = dev->sys_p2v(dev, vrxq->ring_addr);
vrxq->state |= PDMA_RX_QUEUE_SETUP;
} else {
return SHR_E_UNAVAIL;
}
return SHR_E_NONE;
@ -331,8 +329,8 @@ bcmcnet_pdma_tx_queue_setup(struct pdma_dev *dev, int queue)
}
if (dev->mode == DEV_MODE_VNET) {
ctrl->vsync.tx_ring_addr[queue] = txq->ring_addr;
ctrl->vsync.tx_ring_size[queue] = txq->nb_desc;
ctrl->vsync.tx_ring_addr[txq->chan_id] = txq->ring_addr;
ctrl->vsync.tx_ring_size[txq->chan_id] = txq->nb_desc;
}
txq->state |= PDMA_TX_QUEUE_SETUP;
@ -392,15 +390,13 @@ bcmcnet_pdma_tx_vqueue_setup(struct pdma_dev *dev, int queue)
return SHR_E_NONE;
}
if (dev->ctrl.vsync.tx_ring_addr[queue]) {
if (dev->ctrl.vsync.tx_ring_addr[vtxq->chan_id]) {
vtxq->curr = 0;
vtxq->dirt = 0;
vtxq->nb_desc = dev->ctrl.vsync.tx_ring_size[queue];
vtxq->ring_addr = dev->ctrl.vsync.tx_ring_addr[queue];
vtxq->nb_desc = dev->ctrl.vsync.tx_ring_size[vtxq->chan_id];
vtxq->ring_addr = dev->ctrl.vsync.tx_ring_addr[vtxq->chan_id];
vtxq->ring = dev->sys_p2v(dev, vtxq->ring_addr);
vtxq->state |= PDMA_TX_QUEUE_SETUP;
} else {
return SHR_E_UNAVAIL;
}
return SHR_E_NONE;
@ -588,7 +584,8 @@ bcmcnet_pdma_group_poll(struct pdma_dev *dev, int group, int budget)
if (hw->hdls.chan_intr_query(hw, rxq->chan_id)) {
hw->hdls.chan_clear(hw, rxq->chan_id);
grp->poll_queues |= 1 << i;
} else if (rxq->state & PDMA_RX_QUEUE_BUSY) {
}
if (rxq->state & PDMA_RX_QUEUE_BUSY) {
rxq->state &= ~PDMA_RX_QUEUE_BUSY;
grp->poll_queues |= 1 << i;
}
@ -600,6 +597,10 @@ bcmcnet_pdma_group_poll(struct pdma_dev *dev, int group, int budget)
hw->hdls.chan_clear(hw, txq->chan_id);
grp->poll_queues |= 1 << i;
}
if (txq->state & PDMA_TX_QUEUE_BUSY) {
txq->state &= ~PDMA_TX_QUEUE_BUSY;
grp->poll_queues |= 1 << i;
}
}
}
@ -664,7 +665,9 @@ bcmcnet_pdma_rx_ring_dump(struct pdma_dev *dev, int queue)
}
if (dev->mode == DEV_MODE_HNET) {
rxq = (struct pdma_rx_queue *)ctrl->vnet_rxq[queue];
hw->dops.rx_ring_dump(hw, rxq);
if (rxq->state & PDMA_RX_QUEUE_SETUP) {
hw->dops.rx_ring_dump(hw, rxq);
}
}
return SHR_E_NONE;
@ -690,7 +693,9 @@ bcmcnet_pdma_tx_ring_dump(struct pdma_dev *dev, int queue)
}
if (dev->mode == DEV_MODE_HNET) {
txq = (struct pdma_tx_queue *)ctrl->vnet_txq[queue];
hw->dops.tx_ring_dump(hw, txq);
if (txq->state & PDMA_TX_QUEUE_SETUP) {
hw->dops.tx_ring_dump(hw, txq);
}
}
return SHR_E_NONE;

246
platform/broadcom/saibcm-modules/sdklt/bcmdrd/include/bcmdrd/bcmdrd_devlist.h
View File

@ -4,7 +4,7 @@
* Edits to this file will be lost when it is regenerated.
* Tool: INTERNAL/drd/instpkgs.pl
*
* $Copyright: Copyright 2018-2021 Broadcom. All rights reserved.
* $Copyright: Copyright 2018-2022 Broadcom. All rights reserved.
* The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
*
* This program is free software; you can redistribute it and/or
@ -37,6 +37,31 @@
#define BROADCOM_VENDOR_ID 0x14e4
#define BROADCOM_PHYID_MSB 0x0143
/* BCM56080 */
#define BCM56080_VENDOR_ID 0x14e4
#define BCM56080_DEVICE_ID 0xb080
#define BCM56080_REV_A0 0x01
/* BCM56081 */
#define BCM56081_VENDOR_ID 0x14e4
#define BCM56081_DEVICE_ID 0xb081
#define BCM56081_REV_A0 0x01
/* BCM56082 */
#define BCM56082_VENDOR_ID 0x14e4
#define BCM56082_DEVICE_ID 0xb082
#define BCM56082_REV_A0 0x01
/* BCM56083 */
#define BCM56083_VENDOR_ID 0x14e4
#define BCM56083_DEVICE_ID 0xb083
#define BCM56083_REV_A0 0x01
/* BCM56084 */
#define BCM56084_VENDOR_ID 0x14e4
#define BCM56084_DEVICE_ID 0xb084
#define BCM56084_REV_A0 0x01
/* BCM56780 */
#define BCM56780_VENDOR_ID 0x14e4
#define BCM56780_DEVICE_ID 0xb780
@ -95,6 +120,31 @@
#define BCM56883_REV_A0 0x01
#define BCM56883_REV_B0 0x11
/* BCM56890 */
#define BCM56890_VENDOR_ID 0x14e4
#define BCM56890_DEVICE_ID 0xb890
#define BCM56890_REV_A0 0x01
/* BCM56891 */
#define BCM56891_VENDOR_ID 0x14e4
#define BCM56891_DEVICE_ID 0xb891
#define BCM56891_REV_A0 0x01
/* BCM56892 */
#define BCM56892_VENDOR_ID 0x14e4
#define BCM56892_DEVICE_ID 0xb892
#define BCM56892_REV_A0 0x01
/* BCM56895 */
#define BCM56895_VENDOR_ID 0x14e4
#define BCM56895_DEVICE_ID 0xb895
#define BCM56895_REV_A0 0x01
/* BCM56896 */
#define BCM56896_VENDOR_ID 0x14e4
#define BCM56896_DEVICE_ID 0xb896
#define BCM56896_REV_A0 0x01
/* BCM56990 */
#define BCM56990_VENDOR_ID 0x14e4
#define BCM56990_DEVICE_ID 0xb990
@ -111,10 +161,10 @@
#define BCM56992_DEVICE_ID 0xb992
#define BCM56992_REV_B0 0x11
/* BCM56995 */
#define BCM56995_VENDOR_ID 0x14e4
#define BCM56995_DEVICE_ID 0xb995
#define BCM56995_REV_A0 0x01
/* BCM56993 */
#define BCM56993_VENDOR_ID 0x14e4
#define BCM56993_DEVICE_ID 0xb993
#define BCM56993_REV_B0 0x11
/* BCM56996 */
#define BCM56996_VENDOR_ID 0x14e4
@ -133,6 +183,28 @@
#define BCM56998_DEVICE_ID 0xb998
#define BCM56998_REV_A0 0x01
/* BCM56995 */
#define BCM56995_VENDOR_ID 0x14e4
#define BCM56995_DEVICE_ID 0xb995
#define BCM56995_REV_A0 0x01
#define BCM56995_REV_B0 0x11
/* BCM56999 */
#define BCM56999_VENDOR_ID 0x14e4
#define BCM56999_DEVICE_ID 0xb999
#define BCM56999_REV_A0 0x01
#define BCM56999_REV_B0 0x11
/* BCM78900 */
#define BCM78900_VENDOR_ID 0x14e4
#define BCM78900_DEVICE_ID 0xf900
#define BCM78900_REV_B0 0x11
/* BCM78905 */
#define BCM78905_VENDOR_ID 0x14e4
#define BCM78905_DEVICE_ID 0xf905
#define BCM78905_REV_B0 0x11
/*
* End of Supported Devices and Revisions
*/
@ -166,6 +238,54 @@
* Note that this macro will be undefined at the end of this file.
*/
#if BCMDRD_CONFIG_INCLUDE_BCM56080_A0 == 1 || defined(BCMDRD_DEVLIST_OVERRIDE)
BCMDRD_DEVLIST_ENTRY(BCM56080, BCM56080_VENDOR_ID, BCM56080_DEVICE_ID, BCM56080_REV_A0, \
0, 0, \
bcm56080_a0, bcm56080_a0, bcm56080_a0, \
"Pex1", "BCM56080", \
"1.6 Tbps Multilayer Switch", 0, 0)
#endif
#if BCMDRD_CONFIG_INCLUDE_BCM56081_A0 == 1 || defined(BCMDRD_DEVLIST_OVERRIDE)
#ifdef BCMDRD_DEVLIST_INCLUDE_ALL
BCMDRD_DEVLIST_ENTRY(BCM56081, BCM56081_VENDOR_ID, BCM56081_DEVICE_ID, BCM56081_REV_A0, \
0, 0, \
bcm56080_a0, bcm56081_a0, bcm56081_a0, \
"Pex1", "BCM56080", \
"1.2 Tbps Line Card w/MACsec", 0, 0)
#endif
#endif
#if BCMDRD_CONFIG_INCLUDE_BCM56082_A0 == 1 || defined(BCMDRD_DEVLIST_OVERRIDE)
#ifdef BCMDRD_DEVLIST_INCLUDE_ALL
BCMDRD_DEVLIST_ENTRY(BCM56082, BCM56082_VENDOR_ID, BCM56082_DEVICE_ID, BCM56082_REV_A0, \
0, 0, \
bcm56080_a0, bcm56082_a0, bcm56082_a0, \
"Pex1", "BCM56080", \
"1.08 Tbps Line Card w/MACsec", 0, 0)
#endif
#endif
#if BCMDRD_CONFIG_INCLUDE_BCM56083_A0 == 1 || defined(BCMDRD_DEVLIST_OVERRIDE)
#ifdef BCMDRD_DEVLIST_INCLUDE_ALL
BCMDRD_DEVLIST_ENTRY(BCM56083, BCM56083_VENDOR_ID, BCM56083_DEVICE_ID, BCM56083_REV_A0, \
0, 0, \
bcm56080_a0, bcm56083_a0, bcm56083_a0, \
"Pex1", "BCM56080", \
"1.2 Tbps Line Card", 0, 0)
#endif
#endif
#if BCMDRD_CONFIG_INCLUDE_BCM56084_A0 == 1 || defined(BCMDRD_DEVLIST_OVERRIDE)
#ifdef BCMDRD_DEVLIST_INCLUDE_ALL
BCMDRD_DEVLIST_ENTRY(BCM56084, BCM56084_VENDOR_ID, BCM56084_DEVICE_ID, BCM56084_REV_A0, \
0, 0, \
bcm56080_a0, bcm56084_a0, bcm56084_a0, \
"Pex1", "BCM56080", \
"1.08 Tbps Line Card", 0, 0)
#endif
#endif
#if BCMDRD_CONFIG_INCLUDE_BCM56780_A0 == 1 || defined(BCMDRD_DEVLIST_OVERRIDE)
BCMDRD_DEVLIST_ENTRY(BCM56780, BCM56780_VENDOR_ID, BCM56780_DEVICE_ID, BCM56780_REV_A0, \
0, 0, \
@ -302,6 +422,54 @@ BCMDRD_DEVLIST_ENTRY(BCM56883, BCM56883_VENDOR_ID, BCM56883_DEVICE_ID, BCM56883_
#endif
#endif
#if BCMDRD_CONFIG_INCLUDE_BCM56890_A0 == 1 || defined(BCMDRD_DEVLIST_OVERRIDE)
BCMDRD_DEVLIST_ENTRY(BCM56890, BCM56890_VENDOR_ID, BCM56890_DEVICE_ID, BCM56890_REV_A0, \
0, 0, \
bcm56890_a0, bcm56890_a0, bcm56890_a0, \
"Trident4-X11C", "BCM56890", \
"12.8 Tb/s 256x50G-PAM4 Programmable Switch", 0, 0)
#endif
#if BCMDRD_CONFIG_INCLUDE_BCM56891_A0 == 1 || defined(BCMDRD_DEVLIST_OVERRIDE)
#ifdef BCMDRD_DEVLIST_INCLUDE_ALL
BCMDRD_DEVLIST_ENTRY(BCM56891, BCM56891_VENDOR_ID, BCM56891_DEVICE_ID, BCM56891_REV_A0, \
0, 0, \
bcm56890_a0, bcm56891_a0, bcm56891_a0, \
"Trident4-X11C", "BCM56890", \
"12.8 Tb/s 256x50G-PAM4 Programmable Switch", 0, 0)
#endif
#endif
#if BCMDRD_CONFIG_INCLUDE_BCM56892_A0 == 1 || defined(BCMDRD_DEVLIST_OVERRIDE)
#ifdef BCMDRD_DEVLIST_INCLUDE_ALL
BCMDRD_DEVLIST_ENTRY(BCM56892, BCM56892_VENDOR_ID, BCM56892_DEVICE_ID, BCM56892_REV_A0, \
0, 0, \
bcm56890_a0, bcm56892_a0, bcm56892_a0, \
"Trident4-X11C", "BCM56890", \
"12.8 Tb/s 256x50G-PAM4 Programmable Switch", 0, 0)
#endif
#endif
#if BCMDRD_CONFIG_INCLUDE_BCM56895_A0 == 1 || defined(BCMDRD_DEVLIST_OVERRIDE)
#ifdef BCMDRD_DEVLIST_INCLUDE_ALL
BCMDRD_DEVLIST_ENTRY(BCM56895, BCM56895_VENDOR_ID, BCM56895_DEVICE_ID, BCM56895_REV_A0, \
0, 0, \
bcm56890_a0, bcm56895_a0, bcm56895_a0, \
"Trident4-X11C", "BCM56890", \
"6.4 Tb/s 128x50G-PAM4 Programmable Switch", 0, 0)
#endif
#endif
#if BCMDRD_CONFIG_INCLUDE_BCM56896_A0 == 1 || defined(BCMDRD_DEVLIST_OVERRIDE)
#ifdef BCMDRD_DEVLIST_INCLUDE_ALL
BCMDRD_DEVLIST_ENTRY(BCM56896, BCM56896_VENDOR_ID, BCM56896_DEVICE_ID, BCM56896_REV_A0, \
0, 0, \
bcm56890_a0, bcm56896_a0, bcm56896_a0, \
"Trident4-X11C", "BCM56890", \
"6.4 Tb/s 256x50G-PAM4 Programmable Switch", 0, 0)
#endif
#endif
#if BCMDRD_CONFIG_INCLUDE_BCM56990_A0 == 1 || defined(BCMDRD_DEVLIST_OVERRIDE)
BCMDRD_DEVLIST_ENTRY(BCM56990, BCM56990_VENDOR_ID, BCM56990_DEVICE_ID, BCM56990_REV_A0, \
0, 0, \
@ -338,12 +506,14 @@ BCMDRD_DEVLIST_ENTRY(BCM56992, BCM56992_VENDOR_ID, BCM56992_DEVICE_ID, BCM56992_
#endif
#endif
#if BCMDRD_CONFIG_INCLUDE_BCM56995_A0 == 1 || defined(BCMDRD_DEVLIST_OVERRIDE)
BCMDRD_DEVLIST_ENTRY(BCM56995, BCM56995_VENDOR_ID, BCM56995_DEVICE_ID, BCM56995_REV_A0, \
#if BCMDRD_CONFIG_INCLUDE_BCM56993_B0 == 1 || defined(BCMDRD_DEVLIST_OVERRIDE)
#ifdef BCMDRD_DEVLIST_INCLUDE_ALL
BCMDRD_DEVLIST_ENTRY(BCM56993, BCM56993_VENDOR_ID, BCM56993_DEVICE_ID, BCM56993_REV_B0, \
0, 0, \
bcm56995_a0, bcm56995_a0, bcm56995_a0, \
"Tomahawk4D", "BCM56995", \
"25.6 Tbps Multilayer Switch", 0, 0)
bcm56990_b0, bcm56993_b0, bcm56993_b0, \
"Tomahawk4", "BCM56990", \
"12.8 Tbps Multilayer Switch", 0, 0)
#endif
#endif
#if BCMDRD_CONFIG_INCLUDE_BCM56996_A0 == 1 || defined(BCMDRD_DEVLIST_OVERRIDE)
@ -390,6 +560,62 @@ BCMDRD_DEVLIST_ENTRY(BCM56998, BCM56998_VENDOR_ID, BCM56998_DEVICE_ID, BCM56998_
"12.8 Tbps Multilayer Switch", 0, 0)
#endif
#if BCMDRD_CONFIG_INCLUDE_BCM56995_A0 == 1 || defined(BCMDRD_DEVLIST_OVERRIDE)
#ifdef BCMDRD_DEVLIST_INCLUDE_ALL
BCMDRD_DEVLIST_ENTRY(BCM56995, BCM56995_VENDOR_ID, BCM56995_DEVICE_ID, BCM56995_REV_A0, \
0, 0, \
bcm56999_a0, bcm56995_a0, bcm56995_a0, \
"Tomahawk4D", "BCM56999", \
"25.6 Tbps Multilayer Switch", 0, 0)
#endif
#endif
#if BCMDRD_CONFIG_INCLUDE_BCM56995_B0 == 1 || defined(BCMDRD_DEVLIST_OVERRIDE)
#ifdef BCMDRD_DEVLIST_INCLUDE_ALL
BCMDRD_DEVLIST_ENTRY(BCM56995, BCM56995_VENDOR_ID, BCM56995_DEVICE_ID, BCM56995_REV_B0, \
0, 0, \
bcm56999_a0, bcm56995_a0, bcm56995_b0, \
"Tomahawk4D", "BCM56999", \
"25.6 Tbps Multilayer Switch", 0, 0)
#endif
#endif
#if BCMDRD_CONFIG_INCLUDE_BCM56999_A0 == 1 || defined(BCMDRD_DEVLIST_OVERRIDE)
BCMDRD_DEVLIST_ENTRY(BCM56999, BCM56999_VENDOR_ID, BCM56999_DEVICE_ID, BCM56999_REV_A0, \
0, 0, \
bcm56999_a0, bcm56999_a0, bcm56999_a0, \
"Tomahawk4D", "BCM56999", \
"25.6 Tbps Multilayer Switch", 0, 0)
#endif
#if BCMDRD_CONFIG_INCLUDE_BCM56999_B0 == 1 || defined(BCMDRD_DEVLIST_OVERRIDE)
#ifdef BCMDRD_DEVLIST_INCLUDE_ALL
BCMDRD_DEVLIST_ENTRY(BCM56999, BCM56999_VENDOR_ID, BCM56999_DEVICE_ID, BCM56999_REV_B0, \
0, 0, \
bcm56999_a0, bcm56999_a0, bcm56999_b0, \
"Tomahawk4D", "BCM56999", \
"25.6 Tbps Multilayer Switch", 0, 0)
#endif
#endif
#if BCMDRD_CONFIG_INCLUDE_BCM78900_B0 == 1 || defined(BCMDRD_DEVLIST_OVERRIDE)
BCMDRD_DEVLIST_ENTRY(BCM78900, BCM78900_VENDOR_ID, BCM78900_DEVICE_ID, BCM78900_REV_B0, \
0, 0, \
bcm78900_b0, bcm78900_b0, bcm78900_b0, \
"Tomahawk5", "BCM78900", \
"51.2 Tbps Multilayer Switch", 0, 0)
#endif
#if BCMDRD_CONFIG_INCLUDE_BCM78905_B0 == 1 || defined(BCMDRD_DEVLIST_OVERRIDE)
#ifdef BCMDRD_DEVLIST_INCLUDE_ALL
BCMDRD_DEVLIST_ENTRY(BCM78905, BCM78905_VENDOR_ID, BCM78905_DEVICE_ID, BCM78905_REV_B0, \
0, 0, \
bcm78900_b0, bcm78905_b0, bcm78905_b0, \
"Tomahawk5", "BCM78900", \
"25.6 Tbps Multilayer Switch", 0, 0)
#endif
#endif
/* End BCMDRD_DEVLIST_ENTRY Macros */
#ifdef BCMDRD_DEVLIST_INCLUDE_ALL

96
platform/broadcom/saibcm-modules/sdklt/bcmdrd/include/bcmdrd_config.h
View File

@ -1,21 +1,4 @@
/*
* $Copyright: Copyright 2018-2021 Broadcom. All rights reserved.
* The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License
* version 2 as published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* A copy of the GNU General Public License version 2 (GPLv2) can
* be found in the LICENSES folder.$
*
* DO NOT EDIT THIS FILE!
* This file will be auto-generated in the near future.
/*! \file bcmdrd_config.h
*
* This config file defines all compilation-time specifications for
* the BCMDRD.
@ -40,13 +23,27 @@
* compilation
* d) Make sure the compilation include path includes
* 'bcmdrd_custom_config.h'
*
*/
/*
* $Copyright: Copyright 2018-2022 Broadcom. All rights reserved.
* The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License
* version 2 as published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* A copy of the GNU General Public License version 2 (GPLv2) can
* be found in the LICENSES folder.$
*/
#ifndef BCMDRD_CONFIG_H
#define BCMDRD_CONFIG_H
/*
* Include system config file if specified:
*/
@ -54,48 +51,37 @@
#include <bcmdrd_custom_config.h>
#endif
/*
* OPTIONAL configuration and feature values.
* Defaults are provided for all non-specified values.
*/
/* Maximum number of chips supported */
/*! Maximum number of chips supported. */
#ifndef BCMDRD_CONFIG_MAX_UNITS
#define BCMDRD_CONFIG_MAX_UNITS 8
#endif
/* Maximum number of ports per chip supported */
/*! Maximum number of ports per chip supported. */
#ifndef BCMDRD_CONFIG_MAX_PORTS
#define BCMDRD_CONFIG_MAX_PORTS 848
#endif
/* Maximum number of SCHAN polls */
#ifndef BCMDRD_CONFIG_SCHAN_MAX_POLLS
#define BCMDRD_CONFIG_SCHAN_MAX_POLLS 100000
#endif
/* Maximum number of MIIM polls */
#ifndef BCMDRD_CONFIG_MIIM_MAX_POLLS
#define BCMDRD_CONFIG_MIIM_MAX_POLLS 100000
#endif
/* Direct access to memory-mapped registers */
/*! Direct access to memory-mapped registers. */
#ifndef BCMDRD_CONFIG_MEMMAP_DIRECT
#define BCMDRD_CONFIG_MEMMAP_DIRECT 0
#endif
/*
* Include chip symbol tables for the debug shell.
/*!
* \brief Include chip symbol tables.
*
* No symbolic debugging (register/memory names) will be available
* without this defined.
*
* You should enable at least these symbols if you can afford the
* space.
*
* This define is required to get any symbols at all.
*
* Symbols tables are required for normal SDK operation, but may be
* excluded for small footprint base driver applications.
*
* If you only wish to include symbols for a subset of chips in the
* system (probably for code space reasons), you can define the
* following for each chip whose symbols you wish to EXCLUDE:
@ -107,14 +93,17 @@
#define BCMDRD_CONFIG_INCLUDE_CHIP_SYMBOLS 1
#endif
/*
* Include register and memory field information for the debug shell.
/*!
* \brief Include register and memory field information.
*
* This provides encoding, decoding, and displaying individual field
* values for each register and memory.
*
* Requires more code space than just the chip symbols alone.
*
* Symbols field information is required for normal SDK operation, but
* may be excluded for small footprint base driver applications.
*
* The per-chip exclusion define
* (BCMDRD_CONFIG_EXCLUDE_FIELD_INFO_<CHIP>) also applies.
*/
@ -122,8 +111,8 @@
#define BCMDRD_CONFIG_INCLUDE_FIELD_INFO 1
#endif
/*
* Include alternative symbol names for registers and memories.
/*!
* \brief Include alternative symbol names for registers and memories.
*
* Mainly for internal Broadcom use, so you can safely leave this
* option off.
@ -132,6 +121,18 @@
#define BCMDRD_CONFIG_INCLUDE_ALIAS_NAMES 1
#endif
/*!
* \brief Include field size checks for registers and memories.
*
* This option adds compile-time checks for field values exceeding the
* size of the field being assigned. The check in mainly intended for
* internal use, and it may trigger warnings from various memory
* sanity checker tools.
*/
#ifndef BCMDRD_CONFIG_INCLUDE_FIELD_CHECKS
#define BCMDRD_CONFIG_INCLUDE_FIELD_CHECKS 0
#endif
#endif /* BCMDRD_CONFIG_H */
#ifdef CONFIG_OPTION
@ -144,12 +145,6 @@ CONFIG_OPTION(BCMDRD_CONFIG_MAX_UNITS)
#ifdef BCMDRD_CONFIG_MAX_PORTS
CONFIG_OPTION(BCMDRD_CONFIG_MAX_PORTS)
#endif
#ifdef BCMDRD_CONFIG_SCHAN_MAX_POLLS
CONFIG_OPTION(BCMDRD_CONFIG_SCHAN_MAX_POLLS)
#endif
#ifdef BCMDRD_CONFIG_MIIM_MAX_POLLS
CONFIG_OPTION(BCMDRD_CONFIG_MIIM_MAX_POLLS)
#endif
#ifdef BCMDRD_CONFIG_MEMMAP_DIRECT
CONFIG_OPTION(BCMDRD_CONFIG_MEMMAP_DIRECT)
#endif
@ -162,5 +157,8 @@ CONFIG_OPTION(BCMDRD_CONFIG_INCLUDE_FIELD_INFO)
#ifdef BCMDRD_CONFIG_INCLUDE_ALIAS_NAMES
CONFIG_OPTION(BCMDRD_CONFIG_INCLUDE_ALIAS_NAMES)
#endif
#ifdef BCMDRD_CONFIG_INCLUDE_FIELD_CHECKS
CONFIG_OPTION(BCMDRD_CONFIG_INCLUDE_FIELD_CHECKS)
#endif
#endif /* CONFIG_OPTION */
#include "bcmdrd_config_chips.h"

482
platform/broadcom/saibcm-modules/sdklt/bcmdrd/include/bcmdrd_config_chips.h
View File

@ -4,7 +4,7 @@
* Edits to this file will be lost when it is regenerated.
* Tool: INTERNAL/drd/instpkgs.pl
*
* $Copyright: Copyright 2018-2021 Broadcom. All rights reserved.
* $Copyright: Copyright 2018-2022 Broadcom. All rights reserved.
* The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
*
* This program is free software; you can redistribute it and/or
@ -26,17 +26,17 @@
*
* (1) #define BCMDRD_CONFIG_INCLUDE_<CHIPNAME> [1|0]
* -- Include or exclude all revisions of the given device
* Example: #define BCMDRD_CONFIG_INCLUDE_BCM56780 1
* Example: #define BCMDRD_CONFIG_INCLUDE_BCM56080 1
*
* (2) #define BCMDRD_CONFIG_INCLUDE_<CHIPNAME>_<REV>X [1|0]
* -- Include or exclude all versions of the given revision
* Example: #define BCMDRD_CONFIG_INCLUDE_BCM56780_Ax 0
* #define BCMDRD_CONFIG_INCLUde_BCM56780_Bx 1
* Example: #define BCMDRD_CONFIG_INCLUDE_BCM56080_Ax 0
* #define BCMDRD_CONFIG_INCLUde_BCM56080_Bx 1
*
* (3) #define BCMDRD_CONFIG_INCLUDE_<EXACT_CHIP> [1|0]
* -- Include or exclude an exact device
* Example: #define BCMDRD_CONFIG_INCLUDE_BCM56780_A0 1
* #define BCMDRD_CONFIG_INCLUDE_BCM56780_A1 0
* Example: #define BCMDRD_CONFIG_INCLUDE_BCM56080_A0 1
* #define BCMDRD_CONFIG_INCLUDE_BCM56080_A1 0
*
*
* The value of BCMDRD_CONFIG_INCLUDE_CHIP_DEFAULT is used for any
@ -57,6 +57,135 @@
* Default configuration and dependencies for all chips
*/
/*
* BCM56080
*/
/* Sets the default include state if it was not given */
#ifndef BCMDRD_CONFIG_INCLUDE_BCM56080
#define BCMDRD_CONFIG_INCLUDE_BCM56080 BCMDRD_CONFIG_INCLUDE_CHIP_DEFAULT
#endif
/* Resolve revision dependencies */
#ifndef BCMDRD_CONFIG_INCLUDE_BCM56080_Ax
#define BCMDRD_CONFIG_INCLUDE_BCM56080_Ax BCMDRD_CONFIG_INCLUDE_BCM56080
#endif
#ifndef BCMDRD_CONFIG_INCLUDE_BCM56080_A0
#define BCMDRD_CONFIG_INCLUDE_BCM56080_A0 BCMDRD_CONFIG_INCLUDE_BCM56080_Ax
#endif
/*
* BCM56081
*/
/* Sets the default include state if it was not given */
#ifndef BCMDRD_CONFIG_INCLUDE_BCM56081
#define BCMDRD_CONFIG_INCLUDE_BCM56081 BCMDRD_CONFIG_INCLUDE_CHIP_DEFAULT
#endif
/* Resolve revision dependencies */
#ifndef BCMDRD_CONFIG_INCLUDE_BCM56081_Ax
#define BCMDRD_CONFIG_INCLUDE_BCM56081_Ax BCMDRD_CONFIG_INCLUDE_BCM56081
#endif
#ifndef BCMDRD_CONFIG_INCLUDE_BCM56081_A0
#define BCMDRD_CONFIG_INCLUDE_BCM56081_A0 BCMDRD_CONFIG_INCLUDE_BCM56081_Ax
#endif
/* Resolve all interchip dependencies */
#if BCMDRD_CONFIG_INCLUDE_BCM56081_A0 == 1
#ifndef BCMDRD_CONFIG_INCLUDE_BCM56080_A0
#define BCMDRD_CONFIG_INCLUDE_BCM56080_A0 BCMDRD_CONFIG_INCLUDE_CHIP_DEFAULT
#endif
#if BCMDRD_CONFIG_INCLUDE_BCM56080_A0 != 1
#undef BCMDRD_CONFIG_INCLUDE_BCM56080_A0
#define BCMDRD_CONFIG_INCLUDE_BCM56080_A0 1
#define BCMDRD_CONFIG_INCLUDE_BCM56080_A0_IMPLIED 1
#endif
#endif
/*
* BCM56082
*/
/* Sets the default include state if it was not given */
#ifndef BCMDRD_CONFIG_INCLUDE_BCM56082
#define BCMDRD_CONFIG_INCLUDE_BCM56082 BCMDRD_CONFIG_INCLUDE_CHIP_DEFAULT
#endif
/* Resolve revision dependencies */
#ifndef BCMDRD_CONFIG_INCLUDE_BCM56082_Ax
#define BCMDRD_CONFIG_INCLUDE_BCM56082_Ax BCMDRD_CONFIG_INCLUDE_BCM56082
#endif
#ifndef BCMDRD_CONFIG_INCLUDE_BCM56082_A0
#define BCMDRD_CONFIG_INCLUDE_BCM56082_A0 BCMDRD_CONFIG_INCLUDE_BCM56082_Ax
#endif
/* Resolve all interchip dependencies */
#if BCMDRD_CONFIG_INCLUDE_BCM56082_A0 == 1
#ifndef BCMDRD_CONFIG_INCLUDE_BCM56080_A0
#define BCMDRD_CONFIG_INCLUDE_BCM56080_A0 BCMDRD_CONFIG_INCLUDE_CHIP_DEFAULT
#endif
#if BCMDRD_CONFIG_INCLUDE_BCM56080_A0 != 1
#undef BCMDRD_CONFIG_INCLUDE_BCM56080_A0
#define BCMDRD_CONFIG_INCLUDE_BCM56080_A0 1
#define BCMDRD_CONFIG_INCLUDE_BCM56080_A0_IMPLIED 1
#endif
#endif
/*
* BCM56083
*/
/* Sets the default include state if it was not given */
#ifndef BCMDRD_CONFIG_INCLUDE_BCM56083
#define BCMDRD_CONFIG_INCLUDE_BCM56083 BCMDRD_CONFIG_INCLUDE_CHIP_DEFAULT
#endif
/* Resolve revision dependencies */
#ifndef BCMDRD_CONFIG_INCLUDE_BCM56083_Ax
#define BCMDRD_CONFIG_INCLUDE_BCM56083_Ax BCMDRD_CONFIG_INCLUDE_BCM56083
#endif
#ifndef BCMDRD_CONFIG_INCLUDE_BCM56083_A0
#define BCMDRD_CONFIG_INCLUDE_BCM56083_A0 BCMDRD_CONFIG_INCLUDE_BCM56083_Ax
#endif
/* Resolve all interchip dependencies */
#if BCMDRD_CONFIG_INCLUDE_BCM56083_A0 == 1
#ifndef BCMDRD_CONFIG_INCLUDE_BCM56080_A0
#define BCMDRD_CONFIG_INCLUDE_BCM56080_A0 BCMDRD_CONFIG_INCLUDE_CHIP_DEFAULT
#endif
#if BCMDRD_CONFIG_INCLUDE_BCM56080_A0 != 1
#undef BCMDRD_CONFIG_INCLUDE_BCM56080_A0
#define BCMDRD_CONFIG_INCLUDE_BCM56080_A0 1
#define BCMDRD_CONFIG_INCLUDE_BCM56080_A0_IMPLIED 1
#endif
#endif
/*
* BCM56084
*/
/* Sets the default include state if it was not given */
#ifndef BCMDRD_CONFIG_INCLUDE_BCM56084
#define BCMDRD_CONFIG_INCLUDE_BCM56084 BCMDRD_CONFIG_INCLUDE_CHIP_DEFAULT
#endif
/* Resolve revision dependencies */
#ifndef BCMDRD_CONFIG_INCLUDE_BCM56084_Ax
#define BCMDRD_CONFIG_INCLUDE_BCM56084_Ax BCMDRD_CONFIG_INCLUDE_BCM56084
#endif
#ifndef BCMDRD_CONFIG_INCLUDE_BCM56084_A0
#define BCMDRD_CONFIG_INCLUDE_BCM56084_A0 BCMDRD_CONFIG_INCLUDE_BCM56084_Ax
#endif
/* Resolve all interchip dependencies */
#if BCMDRD_CONFIG_INCLUDE_BCM56084_A0 == 1
#ifndef BCMDRD_CONFIG_INCLUDE_BCM56080_A0
#define BCMDRD_CONFIG_INCLUDE_BCM56080_A0 BCMDRD_CONFIG_INCLUDE_CHIP_DEFAULT
#endif
#if BCMDRD_CONFIG_INCLUDE_BCM56080_A0 != 1
#undef BCMDRD_CONFIG_INCLUDE_BCM56080_A0
#define BCMDRD_CONFIG_INCLUDE_BCM56080_A0 1
#define BCMDRD_CONFIG_INCLUDE_BCM56080_A0_IMPLIED 1
#endif
#endif
/*
* BCM56780
*/
@ -386,6 +515,135 @@
#endif
/*
* BCM56890
*/
/* Sets the default include state if it was not given */
#ifndef BCMDRD_CONFIG_INCLUDE_BCM56890
#define BCMDRD_CONFIG_INCLUDE_BCM56890 BCMDRD_CONFIG_INCLUDE_CHIP_DEFAULT
#endif
/* Resolve revision dependencies */
#ifndef BCMDRD_CONFIG_INCLUDE_BCM56890_Ax
#define BCMDRD_CONFIG_INCLUDE_BCM56890_Ax BCMDRD_CONFIG_INCLUDE_BCM56890
#endif
#ifndef BCMDRD_CONFIG_INCLUDE_BCM56890_A0
#define BCMDRD_CONFIG_INCLUDE_BCM56890_A0 BCMDRD_CONFIG_INCLUDE_BCM56890_Ax
#endif
/*
* BCM56891
*/
/* Sets the default include state if it was not given */
#ifndef BCMDRD_CONFIG_INCLUDE_BCM56891
#define BCMDRD_CONFIG_INCLUDE_BCM56891 BCMDRD_CONFIG_INCLUDE_CHIP_DEFAULT
#endif
/* Resolve revision dependencies */
#ifndef BCMDRD_CONFIG_INCLUDE_BCM56891_Ax
#define BCMDRD_CONFIG_INCLUDE_BCM56891_Ax BCMDRD_CONFIG_INCLUDE_BCM56891
#endif
#ifndef BCMDRD_CONFIG_INCLUDE_BCM56891_A0
#define BCMDRD_CONFIG_INCLUDE_BCM56891_A0 BCMDRD_CONFIG_INCLUDE_BCM56891_Ax
#endif
/* Resolve all interchip dependencies */
#if BCMDRD_CONFIG_INCLUDE_BCM56891_A0 == 1
#ifndef BCMDRD_CONFIG_INCLUDE_BCM56890_A0
#define BCMDRD_CONFIG_INCLUDE_BCM56890_A0 BCMDRD_CONFIG_INCLUDE_CHIP_DEFAULT
#endif
#if BCMDRD_CONFIG_INCLUDE_BCM56890_A0 != 1
#undef BCMDRD_CONFIG_INCLUDE_BCM56890_A0
#define BCMDRD_CONFIG_INCLUDE_BCM56890_A0 1
#define BCMDRD_CONFIG_INCLUDE_BCM56890_A0_IMPLIED 1
#endif
#endif
/*
* BCM56892
*/
/* Sets the default include state if it was not given */
#ifndef BCMDRD_CONFIG_INCLUDE_BCM56892
#define BCMDRD_CONFIG_INCLUDE_BCM56892 BCMDRD_CONFIG_INCLUDE_CHIP_DEFAULT
#endif
/* Resolve revision dependencies */
#ifndef BCMDRD_CONFIG_INCLUDE_BCM56892_Ax
#define BCMDRD_CONFIG_INCLUDE_BCM56892_Ax BCMDRD_CONFIG_INCLUDE_BCM56892
#endif
#ifndef BCMDRD_CONFIG_INCLUDE_BCM56892_A0
#define BCMDRD_CONFIG_INCLUDE_BCM56892_A0 BCMDRD_CONFIG_INCLUDE_BCM56892_Ax
#endif
/* Resolve all interchip dependencies */
#if BCMDRD_CONFIG_INCLUDE_BCM56892_A0 == 1
#ifndef BCMDRD_CONFIG_INCLUDE_BCM56890_A0
#define BCMDRD_CONFIG_INCLUDE_BCM56890_A0 BCMDRD_CONFIG_INCLUDE_CHIP_DEFAULT
#endif
#if BCMDRD_CONFIG_INCLUDE_BCM56890_A0 != 1
#undef BCMDRD_CONFIG_INCLUDE_BCM56890_A0
#define BCMDRD_CONFIG_INCLUDE_BCM56890_A0 1
#define BCMDRD_CONFIG_INCLUDE_BCM56890_A0_IMPLIED 1
#endif
#endif
/*
* BCM56895
*/
/* Sets the default include state if it was not given */
#ifndef BCMDRD_CONFIG_INCLUDE_BCM56895
#define BCMDRD_CONFIG_INCLUDE_BCM56895 BCMDRD_CONFIG_INCLUDE_CHIP_DEFAULT
#endif
/* Resolve revision dependencies */
#ifndef BCMDRD_CONFIG_INCLUDE_BCM56895_Ax
#define BCMDRD_CONFIG_INCLUDE_BCM56895_Ax BCMDRD_CONFIG_INCLUDE_BCM56895
#endif
#ifndef BCMDRD_CONFIG_INCLUDE_BCM56895_A0
#define BCMDRD_CONFIG_INCLUDE_BCM56895_A0 BCMDRD_CONFIG_INCLUDE_BCM56895_Ax
#endif
/* Resolve all interchip dependencies */
#if BCMDRD_CONFIG_INCLUDE_BCM56895_A0 == 1
#ifndef BCMDRD_CONFIG_INCLUDE_BCM56890_A0
#define BCMDRD_CONFIG_INCLUDE_BCM56890_A0 BCMDRD_CONFIG_INCLUDE_CHIP_DEFAULT
#endif
#if BCMDRD_CONFIG_INCLUDE_BCM56890_A0 != 1
#undef BCMDRD_CONFIG_INCLUDE_BCM56890_A0
#define BCMDRD_CONFIG_INCLUDE_BCM56890_A0 1
#define BCMDRD_CONFIG_INCLUDE_BCM56890_A0_IMPLIED 1
#endif
#endif
/*
* BCM56896
*/
/* Sets the default include state if it was not given */
#ifndef BCMDRD_CONFIG_INCLUDE_BCM56896
#define BCMDRD_CONFIG_INCLUDE_BCM56896 BCMDRD_CONFIG_INCLUDE_CHIP_DEFAULT
#endif
/* Resolve revision dependencies */
#ifndef BCMDRD_CONFIG_INCLUDE_BCM56896_Ax
#define BCMDRD_CONFIG_INCLUDE_BCM56896_Ax BCMDRD_CONFIG_INCLUDE_BCM56896
#endif
#ifndef BCMDRD_CONFIG_INCLUDE_BCM56896_A0
#define BCMDRD_CONFIG_INCLUDE_BCM56896_A0 BCMDRD_CONFIG_INCLUDE_BCM56896_Ax
#endif
/* Resolve all interchip dependencies */
#if BCMDRD_CONFIG_INCLUDE_BCM56896_A0 == 1
#ifndef BCMDRD_CONFIG_INCLUDE_BCM56890_A0
#define BCMDRD_CONFIG_INCLUDE_BCM56890_A0 BCMDRD_CONFIG_INCLUDE_CHIP_DEFAULT
#endif
#if BCMDRD_CONFIG_INCLUDE_BCM56890_A0 != 1
#undef BCMDRD_CONFIG_INCLUDE_BCM56890_A0
#define BCMDRD_CONFIG_INCLUDE_BCM56890_A0 1
#define BCMDRD_CONFIG_INCLUDE_BCM56890_A0_IMPLIED 1
#endif
#endif
/*
* BCM56990
*/
@ -466,19 +724,30 @@
/*
* BCM56995
* BCM56993
*/
/* Sets the default include state if it was not given */
#ifndef BCMDRD_CONFIG_INCLUDE_BCM56995
#define BCMDRD_CONFIG_INCLUDE_BCM56995 BCMDRD_CONFIG_INCLUDE_CHIP_DEFAULT
#ifndef BCMDRD_CONFIG_INCLUDE_BCM56993
#define BCMDRD_CONFIG_INCLUDE_BCM56993 BCMDRD_CONFIG_INCLUDE_CHIP_DEFAULT
#endif
/* Resolve revision dependencies */
#ifndef BCMDRD_CONFIG_INCLUDE_BCM56995_Ax
#define BCMDRD_CONFIG_INCLUDE_BCM56995_Ax BCMDRD_CONFIG_INCLUDE_BCM56995
#ifndef BCMDRD_CONFIG_INCLUDE_BCM56993_Bx
#define BCMDRD_CONFIG_INCLUDE_BCM56993_Bx BCMDRD_CONFIG_INCLUDE_BCM56993
#endif
#ifndef BCMDRD_CONFIG_INCLUDE_BCM56993_B0
#define BCMDRD_CONFIG_INCLUDE_BCM56993_B0 BCMDRD_CONFIG_INCLUDE_BCM56993_Bx
#endif
/* Resolve all interchip dependencies */
#if BCMDRD_CONFIG_INCLUDE_BCM56993_B0 == 1
#ifndef BCMDRD_CONFIG_INCLUDE_BCM56990_B0
#define BCMDRD_CONFIG_INCLUDE_BCM56990_B0 BCMDRD_CONFIG_INCLUDE_CHIP_DEFAULT
#endif
#if BCMDRD_CONFIG_INCLUDE_BCM56990_B0 != 1
#undef BCMDRD_CONFIG_INCLUDE_BCM56990_B0
#define BCMDRD_CONFIG_INCLUDE_BCM56990_B0 1
#define BCMDRD_CONFIG_INCLUDE_BCM56990_B0_IMPLIED 1
#endif
#ifndef BCMDRD_CONFIG_INCLUDE_BCM56995_A0
#define BCMDRD_CONFIG_INCLUDE_BCM56995_A0 BCMDRD_CONFIG_INCLUDE_BCM56995_Ax
#endif
@ -566,6 +835,126 @@
#endif
/*
* BCM56995
*/
/* Sets the default include state if it was not given */
#ifndef BCMDRD_CONFIG_INCLUDE_BCM56995
#define BCMDRD_CONFIG_INCLUDE_BCM56995 BCMDRD_CONFIG_INCLUDE_CHIP_DEFAULT
#endif
/* Resolve revision dependencies */
#ifndef BCMDRD_CONFIG_INCLUDE_BCM56995_Ax
#define BCMDRD_CONFIG_INCLUDE_BCM56995_Ax BCMDRD_CONFIG_INCLUDE_BCM56995
#endif
#ifndef BCMDRD_CONFIG_INCLUDE_BCM56995_A0
#define BCMDRD_CONFIG_INCLUDE_BCM56995_A0 BCMDRD_CONFIG_INCLUDE_BCM56995_Ax
#endif
#ifndef BCMDRD_CONFIG_INCLUDE_BCM56995_Bx
#define BCMDRD_CONFIG_INCLUDE_BCM56995_Bx BCMDRD_CONFIG_INCLUDE_BCM56995
#endif
#ifndef BCMDRD_CONFIG_INCLUDE_BCM56995_B0
#define BCMDRD_CONFIG_INCLUDE_BCM56995_B0 BCMDRD_CONFIG_INCLUDE_BCM56995_Bx
#endif
/* Resolve all interchip dependencies */
#if BCMDRD_CONFIG_INCLUDE_BCM56995_A0 == 1
#ifndef BCMDRD_CONFIG_INCLUDE_BCM56999_A0
#define BCMDRD_CONFIG_INCLUDE_BCM56999_A0 BCMDRD_CONFIG_INCLUDE_CHIP_DEFAULT
#endif
#if BCMDRD_CONFIG_INCLUDE_BCM56999_A0 != 1
#undef BCMDRD_CONFIG_INCLUDE_BCM56999_A0
#define BCMDRD_CONFIG_INCLUDE_BCM56999_A0 1
#define BCMDRD_CONFIG_INCLUDE_BCM56999_A0_IMPLIED 1
#endif
#endif
#if BCMDRD_CONFIG_INCLUDE_BCM56995_B0 == 1
#if BCMDRD_CONFIG_INCLUDE_BCM56999_A0 != 1
#undef BCMDRD_CONFIG_INCLUDE_BCM56999_A0
#define BCMDRD_CONFIG_INCLUDE_BCM56999_A0 1
#define BCMDRD_CONFIG_INCLUDE_BCM56999_A0_IMPLIED 1
#endif
#endif
/*
* BCM56999
*/
/* Sets the default include state if it was not given */
#ifndef BCMDRD_CONFIG_INCLUDE_BCM56999
#define BCMDRD_CONFIG_INCLUDE_BCM56999 BCMDRD_CONFIG_INCLUDE_CHIP_DEFAULT
#endif
/* Resolve revision dependencies */
#ifndef BCMDRD_CONFIG_INCLUDE_BCM56999_Ax
#define BCMDRD_CONFIG_INCLUDE_BCM56999_Ax BCMDRD_CONFIG_INCLUDE_BCM56999
#endif
#ifndef BCMDRD_CONFIG_INCLUDE_BCM56999_A0
#define BCMDRD_CONFIG_INCLUDE_BCM56999_A0 BCMDRD_CONFIG_INCLUDE_BCM56999_Ax
#endif
#ifndef BCMDRD_CONFIG_INCLUDE_BCM56999_Bx
#define BCMDRD_CONFIG_INCLUDE_BCM56999_Bx BCMDRD_CONFIG_INCLUDE_BCM56999
#endif
#ifndef BCMDRD_CONFIG_INCLUDE_BCM56999_B0
#define BCMDRD_CONFIG_INCLUDE_BCM56999_B0 BCMDRD_CONFIG_INCLUDE_BCM56999_Bx
#endif
/* Resolve all interchip dependencies */
#if BCMDRD_CONFIG_INCLUDE_BCM56999_B0 == 1
#ifndef BCMDRD_CONFIG_INCLUDE_BCM56999_A0
#define BCMDRD_CONFIG_INCLUDE_BCM56999_A0 BCMDRD_CONFIG_INCLUDE_CHIP_DEFAULT
#endif
#if BCMDRD_CONFIG_INCLUDE_BCM56999_A0 != 1
#undef BCMDRD_CONFIG_INCLUDE_BCM56999_A0
#define BCMDRD_CONFIG_INCLUDE_BCM56999_A0 1
#define BCMDRD_CONFIG_INCLUDE_BCM56999_A0_IMPLIED 1
#endif
#endif
/*
* BCM78900
*/
/* Sets the default include state if it was not given */
#ifndef BCMDRD_CONFIG_INCLUDE_BCM78900
#define BCMDRD_CONFIG_INCLUDE_BCM78900 BCMDRD_CONFIG_INCLUDE_CHIP_DEFAULT
#endif
/* Resolve revision dependencies */
#ifndef BCMDRD_CONFIG_INCLUDE_BCM78900_Bx
#define BCMDRD_CONFIG_INCLUDE_BCM78900_Bx BCMDRD_CONFIG_INCLUDE_BCM78900
#endif
#ifndef BCMDRD_CONFIG_INCLUDE_BCM78900_B0
#define BCMDRD_CONFIG_INCLUDE_BCM78900_B0 BCMDRD_CONFIG_INCLUDE_BCM78900_Bx
#endif
/*
* BCM78905
*/
/* Sets the default include state if it was not given */
#ifndef BCMDRD_CONFIG_INCLUDE_BCM78905
#define BCMDRD_CONFIG_INCLUDE_BCM78905 BCMDRD_CONFIG_INCLUDE_CHIP_DEFAULT
#endif
/* Resolve revision dependencies */
#ifndef BCMDRD_CONFIG_INCLUDE_BCM78905_Bx
#define BCMDRD_CONFIG_INCLUDE_BCM78905_Bx BCMDRD_CONFIG_INCLUDE_BCM78905
#endif
#ifndef BCMDRD_CONFIG_INCLUDE_BCM78905_B0
#define BCMDRD_CONFIG_INCLUDE_BCM78905_B0 BCMDRD_CONFIG_INCLUDE_BCM78905_Bx
#endif
/* Resolve all interchip dependencies */
#if BCMDRD_CONFIG_INCLUDE_BCM78905_B0 == 1
#ifndef BCMDRD_CONFIG_INCLUDE_BCM78900_B0
#define BCMDRD_CONFIG_INCLUDE_BCM78900_B0 BCMDRD_CONFIG_INCLUDE_CHIP_DEFAULT
#endif
#if BCMDRD_CONFIG_INCLUDE_BCM78900_B0 != 1
#undef BCMDRD_CONFIG_INCLUDE_BCM78900_B0
#define BCMDRD_CONFIG_INCLUDE_BCM78900_B0 1
#define BCMDRD_CONFIG_INCLUDE_BCM78900_B0_IMPLIED 1
#endif
#endif
#endif /* BCMDRD_CONFIG_CHIPS_H */
/*
@ -573,6 +962,24 @@
*/
#ifdef CONFIG_OPTION
CONFIG_OPTION(BCMDRD_CONFIG_INCLUDE_BCM56080)
CONFIG_OPTION(BCMDRD_CONFIG_INCLUDE_BCM56080_Ax)
CONFIG_OPTION(BCMDRD_CONFIG_INCLUDE_BCM56080_A0)
#ifdef BCMDRD_CONFIG_INCLUDE_BCM56080_A0_IMPLIED
CONFIG_OPTION(BCMDRD_CONFIG_INCLUDE_BCM56080_A0_IMPLIED)
#endif
CONFIG_OPTION(BCMDRD_CONFIG_INCLUDE_BCM56081)
CONFIG_OPTION(BCMDRD_CONFIG_INCLUDE_BCM56081_Ax)
CONFIG_OPTION(BCMDRD_CONFIG_INCLUDE_BCM56081_A0)
CONFIG_OPTION(BCMDRD_CONFIG_INCLUDE_BCM56082)
CONFIG_OPTION(BCMDRD_CONFIG_INCLUDE_BCM56082_Ax)
CONFIG_OPTION(BCMDRD_CONFIG_INCLUDE_BCM56082_A0)
CONFIG_OPTION(BCMDRD_CONFIG_INCLUDE_BCM56083)
CONFIG_OPTION(BCMDRD_CONFIG_INCLUDE_BCM56083_Ax)
CONFIG_OPTION(BCMDRD_CONFIG_INCLUDE_BCM56083_A0)
CONFIG_OPTION(BCMDRD_CONFIG_INCLUDE_BCM56084)
CONFIG_OPTION(BCMDRD_CONFIG_INCLUDE_BCM56084_Ax)
CONFIG_OPTION(BCMDRD_CONFIG_INCLUDE_BCM56084_A0)
CONFIG_OPTION(BCMDRD_CONFIG_INCLUDE_BCM56780)
CONFIG_OPTION(BCMDRD_CONFIG_INCLUDE_BCM56780_Ax)
CONFIG_OPTION(BCMDRD_CONFIG_INCLUDE_BCM56780_A0)
@ -618,6 +1025,24 @@ CONFIG_OPTION(BCMDRD_CONFIG_INCLUDE_BCM56883_Ax)
CONFIG_OPTION(BCMDRD_CONFIG_INCLUDE_BCM56883_A0)
CONFIG_OPTION(BCMDRD_CONFIG_INCLUDE_BCM56883_Bx)
CONFIG_OPTION(BCMDRD_CONFIG_INCLUDE_BCM56883_B0)
CONFIG_OPTION(BCMDRD_CONFIG_INCLUDE_BCM56890)
CONFIG_OPTION(BCMDRD_CONFIG_INCLUDE_BCM56890_Ax)
CONFIG_OPTION(BCMDRD_CONFIG_INCLUDE_BCM56890_A0)
#ifdef BCMDRD_CONFIG_INCLUDE_BCM56890_A0_IMPLIED
CONFIG_OPTION(BCMDRD_CONFIG_INCLUDE_BCM56890_A0_IMPLIED)
#endif
CONFIG_OPTION(BCMDRD_CONFIG_INCLUDE_BCM56891)
CONFIG_OPTION(BCMDRD_CONFIG_INCLUDE_BCM56891_Ax)
CONFIG_OPTION(BCMDRD_CONFIG_INCLUDE_BCM56891_A0)
CONFIG_OPTION(BCMDRD_CONFIG_INCLUDE_BCM56892)
CONFIG_OPTION(BCMDRD_CONFIG_INCLUDE_BCM56892_Ax)
CONFIG_OPTION(BCMDRD_CONFIG_INCLUDE_BCM56892_A0)
CONFIG_OPTION(BCMDRD_CONFIG_INCLUDE_BCM56895)
CONFIG_OPTION(BCMDRD_CONFIG_INCLUDE_BCM56895_Ax)
CONFIG_OPTION(BCMDRD_CONFIG_INCLUDE_BCM56895_A0)
CONFIG_OPTION(BCMDRD_CONFIG_INCLUDE_BCM56896)
CONFIG_OPTION(BCMDRD_CONFIG_INCLUDE_BCM56896_Ax)
CONFIG_OPTION(BCMDRD_CONFIG_INCLUDE_BCM56896_A0)
CONFIG_OPTION(BCMDRD_CONFIG_INCLUDE_BCM56990)
CONFIG_OPTION(BCMDRD_CONFIG_INCLUDE_BCM56990_Ax)
CONFIG_OPTION(BCMDRD_CONFIG_INCLUDE_BCM56990_A0)
@ -635,12 +1060,9 @@ CONFIG_OPTION(BCMDRD_CONFIG_INCLUDE_BCM56991_B0)
CONFIG_OPTION(BCMDRD_CONFIG_INCLUDE_BCM56992)
CONFIG_OPTION(BCMDRD_CONFIG_INCLUDE_BCM56992_Bx)
CONFIG_OPTION(BCMDRD_CONFIG_INCLUDE_BCM56992_B0)
CONFIG_OPTION(BCMDRD_CONFIG_INCLUDE_BCM56995)
CONFIG_OPTION(BCMDRD_CONFIG_INCLUDE_BCM56995_Ax)
CONFIG_OPTION(BCMDRD_CONFIG_INCLUDE_BCM56995_A0)
#ifdef BCMDRD_CONFIG_INCLUDE_BCM56995_A0_IMPLIED
CONFIG_OPTION(BCMDRD_CONFIG_INCLUDE_BCM56995_A0_IMPLIED)
#endif
CONFIG_OPTION(BCMDRD_CONFIG_INCLUDE_BCM56993)
CONFIG_OPTION(BCMDRD_CONFIG_INCLUDE_BCM56993_Bx)
CONFIG_OPTION(BCMDRD_CONFIG_INCLUDE_BCM56993_B0)
CONFIG_OPTION(BCMDRD_CONFIG_INCLUDE_BCM56996)
CONFIG_OPTION(BCMDRD_CONFIG_INCLUDE_BCM56996_Ax)
CONFIG_OPTION(BCMDRD_CONFIG_INCLUDE_BCM56996_A0)
@ -663,5 +1085,27 @@ CONFIG_OPTION(BCMDRD_CONFIG_INCLUDE_BCM56998_A0)
#ifdef BCMDRD_CONFIG_INCLUDE_BCM56998_A0_IMPLIED
CONFIG_OPTION(BCMDRD_CONFIG_INCLUDE_BCM56998_A0_IMPLIED)
#endif
CONFIG_OPTION(BCMDRD_CONFIG_INCLUDE_BCM56995)
CONFIG_OPTION(BCMDRD_CONFIG_INCLUDE_BCM56995_Ax)
CONFIG_OPTION(BCMDRD_CONFIG_INCLUDE_BCM56995_A0)
CONFIG_OPTION(BCMDRD_CONFIG_INCLUDE_BCM56995_Bx)
CONFIG_OPTION(BCMDRD_CONFIG_INCLUDE_BCM56995_B0)
CONFIG_OPTION(BCMDRD_CONFIG_INCLUDE_BCM56999)
CONFIG_OPTION(BCMDRD_CONFIG_INCLUDE_BCM56999_Ax)
CONFIG_OPTION(BCMDRD_CONFIG_INCLUDE_BCM56999_A0)
CONFIG_OPTION(BCMDRD_CONFIG_INCLUDE_BCM56999_Bx)
CONFIG_OPTION(BCMDRD_CONFIG_INCLUDE_BCM56999_B0)
#ifdef BCMDRD_CONFIG_INCLUDE_BCM56999_A0_IMPLIED
CONFIG_OPTION(BCMDRD_CONFIG_INCLUDE_BCM56999_A0_IMPLIED)
#endif
CONFIG_OPTION(BCMDRD_CONFIG_INCLUDE_BCM78900)
CONFIG_OPTION(BCMDRD_CONFIG_INCLUDE_BCM78900_Bx)
CONFIG_OPTION(BCMDRD_CONFIG_INCLUDE_BCM78900_B0)
#ifdef BCMDRD_CONFIG_INCLUDE_BCM78900_B0_IMPLIED
CONFIG_OPTION(BCMDRD_CONFIG_INCLUDE_BCM78900_B0_IMPLIED)
#endif
CONFIG_OPTION(BCMDRD_CONFIG_INCLUDE_BCM78905)
CONFIG_OPTION(BCMDRD_CONFIG_INCLUDE_BCM78905_Bx)
CONFIG_OPTION(BCMDRD_CONFIG_INCLUDE_BCM78905_B0)
#undef CONFIG_OPTION
#endif /* #ifdef CONFIG_OPTION */

40
platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/bcmlrd_variant.h Normal file
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@ -0,0 +1,40 @@
/*! \file bcmlrd_variant.h
*
* \brief BCMLRD Variant interfaces and definitions
*
* BCMLRD_VARIANT_ENTRY macros.
*
* If a list of variant entries is needed, before including this file,
* define BCMLRD_VARIANT_ENTRY as a macro. See bcmltd/include/bcmltd_variant.h
* for the parameters for BCMLRD_VARIANT_ENTRY, which are exactly the same as
* those for BCMLTD_VARIANT_ENTRY.
*
* Note that BCMLTD_VARIANT_ENTRY will be undefined at the end of this file.
*
*/
/*
* $Copyright: Copyright 2018-2022 Broadcom. All rights reserved.
* The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License
* version 2 as published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* A copy of the GNU General Public License version 2 (GPLv2) can
* be found in the LICENSES folder.$
*/
#ifndef BCMLRD_VARIANT_H
#define BCMLRD_VARIANT_H
/* The contents between the include guard is deliberately empty. */
#endif /* BCMLRD_VARIANT_H */
/* This include must be placed outside the include guard. */
#include <bcmlrd/chip/bcmlrd_chip_variant.h>

48
platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/chip/bcmlrd_chip_variant.h Normal file
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@ -0,0 +1,48 @@
/*! \file bcmlrd_chip_variant.h
*
* \brief BCMLRD variant definitions
*
*/
/*
* $Copyright: Copyright 2018-2022 Broadcom. All rights reserved.
* The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License
* version 2 as published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* A copy of the GNU General Public License version 2 (GPLv2) can
* be found in the LICENSES folder.$
*/
#ifndef BCMLRD_CHIP_VARIANT_H
#define BCMLRD_CHIP_VARIANT_H
#include <bcmlrd/chip/generated/bcmlrd_variant_defs.h>
#endif /* BCMLRD_CHIP_VARIANT_H */
#ifndef DOXYGEN_IGNORE_AUTOGEN
#ifdef BCMLTD_VARIANT_OVERRIDE
#error "Use BCMLRD_VARIANT_OVERRIDE instead."
#endif
#ifdef BCMLRD_VARIANT_OVERRIDE
#define BCMLTD_VARIANT_OVERRIDE
#endif
#ifdef BCMLRD_VARIANT_ENTRY
#define BCMLTD_VARIANT_ENTRY(...) BCMLRD_VARIANT_ENTRY(__VA_ARGS__)
#include <bcmltd/bcmltd_variant.h>
#ifdef BCMLRD_VARIANT_OVERRIDE
#undef BCMLRD_VARIANT_OVERRIDE
#endif
#undef BCMLRD_VARIANT_ENTRY
#endif /* BCMLRD_VARIANT_ENTRY */
#endif /* DOXYGEN_IGNORE_AUTOGEN */

64
platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/bcmltd_variant.h Normal file
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@ -0,0 +1,64 @@
/*! \file bcmltd_variant.h
*
* \brief BCMLTD Variant initerfaces and definitions
*
* Logical table variant inclusion and exclusion support within the
* BCMLTD can be specified as a combination of the following defines:
*
* #define BCMLTD_CONFIG_INCLUDE_<CHIPNAME>_<REV>X_<VARIANT> [1|0]
* -- Include or exclude the specified variant
* Example: #define BCMLTD_CONFIG_INCLUDE_BCM56880_UTLTM 1
*
* The value of BCMLTD_CONFIG_INCLUDE_VARIANT_DEFAULT is used for any
* variants which are left unspecified. Set this value to 1 or 0 to
* include or exclude all variants by default.
*
* BCMLTD_VARIANT_ENTRY macros.
*
* If a list of variant entries is needed, before including this file,
* define BCMLTD_VARIANT_ENTRY as a macro to operate on the following
* parameters:
*
* #define BCMLTD_VARIANT_ENTRY(_bd,_bu,_va,_ve,_vu,_vv,_vo,_vd,_r0,_r1)
*
* _bd: SW Base Driver (lower case)
* _bu: SW Base Driver (upper case)
* _va: Variant name (lower case or empty for BASE)
* _ve: Variant enum symbol (upper case)
* _vu: Variant name (underscore or empty for BASE)
* _vv: Variant numeric value
* _vo: Device relative offset
* _vd: Variant Description
* _r0: Reserved
* _r1: Reserved
*
* Note that BCMLTD_VARIANT_ENTRY will be undefined at the end of this file.
*
*/
/*
* $Copyright: Copyright 2018-2022 Broadcom. All rights reserved.
* The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License
* version 2 as published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* A copy of the GNU General Public License version 2 (GPLv2) can
* be found in the LICENSES folder.$
*/
#ifndef BCMLTD_VARIANT_H
#define BCMLTD_VARIANT_H
#include <bcmltd/chip/bcmltd_variant_defs.h>
#endif /* BCMLTD_VARIANT_H */
/* This include must be placed outside the include guard. */
#include <bcmltd/chip/bcmltd_chip_variant.h>

42
platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/chip/bcmltd_chip_variant.h Normal file
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@ -0,0 +1,42 @@
/*! \file bcmltd_chip_variant.h
*
* \brief BCMLTD variant definitions
*
*/
/*
* $Copyright: Copyright 2018-2022 Broadcom. All rights reserved.
* The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License
* version 2 as published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* A copy of the GNU General Public License version 2 (GPLv2) can
* be found in the LICENSES folder.$
*/
#ifndef BCMLTD_CHIP_VARIANT_H
#define BCMLTD_CHIP_VARIANT_H
#include <bcmltd/chip/generated/bcmltd_config_variant.h>
#endif /* BCMLTD_CHIP_VARIANT_H */
#ifndef DOXYGEN_IGNORE_AUTOGEN
#ifdef BCMLTD_VARIANT_ENTRY
#include <bcmltd/chip/generated/bcmltd_variant_entry.h>
#ifdef BCMLTD_VARIANT_OVERRIDE
#undef BCMLTD_VARIANT_OVERRIDE
#endif
#undef BCMLTD_VARIANT_ENTRY
#endif /* BCMLTD_VARIANT_ENTRY */
#endif /* DOXYGEN_IGNORE_AUTOGEN */

28
platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/chip/bcmltd_variant_defs.h Normal file
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@ -0,0 +1,28 @@
/*! \file bcmltd_variant_defs.h
*
* \brief BCMLTD variant definitions
*
*/
/*
* $Copyright: Copyright 2018-2022 Broadcom. All rights reserved.
* The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License
* version 2 as published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* A copy of the GNU General Public License version 2 (GPLv2) can
* be found in the LICENSES folder.$
*/
#ifndef BCMLTD_VARIANT_DEFS_H
#define BCMLTD_VARIANT_DEFS_H
#ifndef DOXYGEN_IGNORE_AUTOGEN
#include <bcmltd/chip/generated/bcmltd_variant_defs.h>
#endif /* DOXYGEN_IGNORE_AUTOGEN */
#endif /* BCMLTD_VARIANT_DEFS_H */

37
platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56080_a0/bcm56080_a0_ltd_variant_def.h Normal file
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@ -0,0 +1,37 @@
/*******************************************************************************
*
* DO NOT EDIT THIS FILE!
* This file is auto-generated by fltg from Logical Table mapping files.
*
* Tool: $SDK/tools/fltg/bin/fltg
*
* Edits to this file will be lost when it is regenerated.
*
* $Copyright: Copyright 2018-2022 Broadcom. All rights reserved.
* The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License
* version 2 as published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* A copy of the GNU General Public License version 2 (GPLv2) can
* be found in the LICENSES folder.$
*
******************************************************************************/
#ifndef GEN_BCM56080_A0_LTD_VARIANT_DEF_H
#define GEN_BCM56080_A0_LTD_VARIANT_DEF_H
#ifndef DOXYGEN_IGNORE_AUTOGEN
#define BCMLTD_VARIANT_BCM56080_A0_BASE 1
#define BCMLTD_VARIANT_LOCAL_BCM56080_A0_BASE 0
#endif /* DOXYGEN_IGNORE_AUTOGEN */
#endif /* GEN_BCM56080_A0_LTD_VARIANT_DEF_H */

37
platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56780_a0/bcm56780_a0_ltd_variant_def.h Normal file
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@ -0,0 +1,37 @@
/*******************************************************************************
*
* DO NOT EDIT THIS FILE!
* This file is auto-generated by fltg from Logical Table mapping files.
*
* Tool: $SDK/tools/fltg/bin/fltg
*
* Edits to this file will be lost when it is regenerated.
*
* $Copyright: Copyright 2018-2022 Broadcom. All rights reserved.
* The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License
* version 2 as published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* A copy of the GNU General Public License version 2 (GPLv2) can
* be found in the LICENSES folder.$
*
******************************************************************************/
#ifndef GEN_BCM56780_A0_LTD_VARIANT_DEF_H
#define GEN_BCM56780_A0_LTD_VARIANT_DEF_H
#ifndef DOXYGEN_IGNORE_AUTOGEN
#define BCMLTD_VARIANT_BCM56780_A0_BASE 2
#define BCMLTD_VARIANT_LOCAL_BCM56780_A0_BASE 0
#endif /* DOXYGEN_IGNORE_AUTOGEN */
#endif /* GEN_BCM56780_A0_LTD_VARIANT_DEF_H */

37
platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56780_a0/cna_1_2_13/bcm56780_a0_cna_1_2_13_ltd_variant_def.h Normal file
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@ -0,0 +1,37 @@
/*******************************************************************************
*
* DO NOT EDIT THIS FILE!
* This file is auto-generated by fltg from Logical Table mapping files.
*
* Tool: $SDK/tools/fltg/bin/fltg
*
* Edits to this file will be lost when it is regenerated.
*
* $Copyright: Copyright 2018-2022 Broadcom. All rights reserved.
* The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License
* version 2 as published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* A copy of the GNU General Public License version 2 (GPLv2) can
* be found in the LICENSES folder.$
*
******************************************************************************/
#ifndef GEN_BCM56780_A0_CNA_1_2_13_LTD_VARIANT_DEF_H
#define GEN_BCM56780_A0_CNA_1_2_13_LTD_VARIANT_DEF_H
#ifndef DOXYGEN_IGNORE_AUTOGEN
#define BCMLTD_VARIANT_BCM56780_A0_CNA_1_2_13 12
#define BCMLTD_VARIANT_LOCAL_BCM56780_A0_CNA_1_2_13 1
#endif /* DOXYGEN_IGNORE_AUTOGEN */
#endif /* GEN_BCM56780_A0_CNA_1_2_13_LTD_VARIANT_DEF_H */

37
platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56780_a0/dna_2_9_5_0/bcm56780_a0_dna_2_9_5_0_ltd_variant_def.h Normal file
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@ -0,0 +1,37 @@
/*******************************************************************************
*
* DO NOT EDIT THIS FILE!
* This file is auto-generated by fltg from Logical Table mapping files.
*
* Tool: $SDK/tools/fltg/bin/fltg
*
* Edits to this file will be lost when it is regenerated.
*
* $Copyright: Copyright 2018-2022 Broadcom. All rights reserved.
* The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License
* version 2 as published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* A copy of the GNU General Public License version 2 (GPLv2) can
* be found in the LICENSES folder.$
*
******************************************************************************/
#ifndef GEN_BCM56780_A0_DNA_2_9_5_0_LTD_VARIANT_DEF_H
#define GEN_BCM56780_A0_DNA_2_9_5_0_LTD_VARIANT_DEF_H
#ifndef DOXYGEN_IGNORE_AUTOGEN
#define BCMLTD_VARIANT_BCM56780_A0_DNA_2_9_5_0 13
#define BCMLTD_VARIANT_LOCAL_BCM56780_A0_DNA_2_9_5_0 2
#endif /* DOXYGEN_IGNORE_AUTOGEN */
#endif /* GEN_BCM56780_A0_DNA_2_9_5_0_LTD_VARIANT_DEF_H */

37
platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56780_a0/hna_1_2_10_0/bcm56780_a0_hna_1_2_10_0_ltd_variant_def.h Normal file
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@ -0,0 +1,37 @@
/*******************************************************************************
*
* DO NOT EDIT THIS FILE!
* This file is auto-generated by fltg from Logical Table mapping files.
*
* Tool: $SDK/tools/fltg/bin/fltg
*
* Edits to this file will be lost when it is regenerated.
*
* $Copyright: Copyright 2018-2022 Broadcom. All rights reserved.
* The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License
* version 2 as published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* A copy of the GNU General Public License version 2 (GPLv2) can
* be found in the LICENSES folder.$
*
******************************************************************************/
#ifndef GEN_BCM56780_A0_HNA_1_2_10_0_LTD_VARIANT_DEF_H
#define GEN_BCM56780_A0_HNA_1_2_10_0_LTD_VARIANT_DEF_H
#ifndef DOXYGEN_IGNORE_AUTOGEN
#define BCMLTD_VARIANT_BCM56780_A0_HNA_1_2_10_0 14
#define BCMLTD_VARIANT_LOCAL_BCM56780_A0_HNA_1_2_10_0 3
#endif /* DOXYGEN_IGNORE_AUTOGEN */
#endif /* GEN_BCM56780_A0_HNA_1_2_10_0_LTD_VARIANT_DEF_H */

37
platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56880_a0/bcm56880_a0_ltd_variant_def.h Normal file
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@ -0,0 +1,37 @@
/*******************************************************************************
*
* DO NOT EDIT THIS FILE!
* This file is auto-generated by fltg from Logical Table mapping files.
*
* Tool: $SDK/tools/fltg/bin/fltg
*
* Edits to this file will be lost when it is regenerated.
*
* $Copyright: Copyright 2018-2022 Broadcom. All rights reserved.
* The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License
* version 2 as published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* A copy of the GNU General Public License version 2 (GPLv2) can
* be found in the LICENSES folder.$
*
******************************************************************************/
#ifndef GEN_BCM56880_A0_LTD_VARIANT_DEF_H
#define GEN_BCM56880_A0_LTD_VARIANT_DEF_H
#ifndef DOXYGEN_IGNORE_AUTOGEN
#define BCMLTD_VARIANT_BCM56880_A0_BASE 3
#define BCMLTD_VARIANT_LOCAL_BCM56880_A0_BASE 0
#endif /* DOXYGEN_IGNORE_AUTOGEN */
#endif /* GEN_BCM56880_A0_LTD_VARIANT_DEF_H */

37
platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56880_a0/cna_1_2_13/bcm56880_a0_cna_1_2_13_ltd_variant_def.h Normal file
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@ -0,0 +1,37 @@
/*******************************************************************************
*
* DO NOT EDIT THIS FILE!
* This file is auto-generated by fltg from Logical Table mapping files.
*
* Tool: $SDK/tools/fltg/bin/fltg
*
* Edits to this file will be lost when it is regenerated.
*
* $Copyright: Copyright 2018-2022 Broadcom. All rights reserved.
* The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License
* version 2 as published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* A copy of the GNU General Public License version 2 (GPLv2) can
* be found in the LICENSES folder.$
*
******************************************************************************/
#ifndef GEN_BCM56880_A0_CNA_1_2_13_LTD_VARIANT_DEF_H
#define GEN_BCM56880_A0_CNA_1_2_13_LTD_VARIANT_DEF_H
#ifndef DOXYGEN_IGNORE_AUTOGEN
#define BCMLTD_VARIANT_BCM56880_A0_CNA_1_2_13 15
#define BCMLTD_VARIANT_LOCAL_BCM56880_A0_CNA_1_2_13 1
#endif /* DOXYGEN_IGNORE_AUTOGEN */
#endif /* GEN_BCM56880_A0_CNA_1_2_13_LTD_VARIANT_DEF_H */

37
platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56880_a0/dna_4_11_4_0/bcm56880_a0_dna_4_11_4_0_ltd_variant_def.h Normal file
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@ -0,0 +1,37 @@
/*******************************************************************************
*
* DO NOT EDIT THIS FILE!
* This file is auto-generated by fltg from Logical Table mapping files.
*
* Tool: $SDK/tools/fltg/bin/fltg
*
* Edits to this file will be lost when it is regenerated.
*
* $Copyright: Copyright 2018-2022 Broadcom. All rights reserved.
* The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License
* version 2 as published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* A copy of the GNU General Public License version 2 (GPLv2) can
* be found in the LICENSES folder.$
*
******************************************************************************/
#ifndef GEN_BCM56880_A0_DNA_4_11_4_0_LTD_VARIANT_DEF_H
#define GEN_BCM56880_A0_DNA_4_11_4_0_LTD_VARIANT_DEF_H
#ifndef DOXYGEN_IGNORE_AUTOGEN
#define BCMLTD_VARIANT_BCM56880_A0_DNA_4_11_4_0 16
#define BCMLTD_VARIANT_LOCAL_BCM56880_A0_DNA_4_11_4_0 2
#endif /* DOXYGEN_IGNORE_AUTOGEN */
#endif /* GEN_BCM56880_A0_DNA_4_11_4_0_LTD_VARIANT_DEF_H */

37
platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56880_a0/hna_1_2_10_0/bcm56880_a0_hna_1_2_10_0_ltd_variant_def.h Normal file
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@ -0,0 +1,37 @@
/*******************************************************************************
*
* DO NOT EDIT THIS FILE!
* This file is auto-generated by fltg from Logical Table mapping files.
*
* Tool: $SDK/tools/fltg/bin/fltg
*
* Edits to this file will be lost when it is regenerated.
*
* $Copyright: Copyright 2018-2022 Broadcom. All rights reserved.
* The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License
* version 2 as published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* A copy of the GNU General Public License version 2 (GPLv2) can
* be found in the LICENSES folder.$
*
******************************************************************************/
#ifndef GEN_BCM56880_A0_HNA_1_2_10_0_LTD_VARIANT_DEF_H
#define GEN_BCM56880_A0_HNA_1_2_10_0_LTD_VARIANT_DEF_H
#ifndef DOXYGEN_IGNORE_AUTOGEN
#define BCMLTD_VARIANT_BCM56880_A0_HNA_1_2_10_0 17
#define BCMLTD_VARIANT_LOCAL_BCM56880_A0_HNA_1_2_10_0 3
#endif /* DOXYGEN_IGNORE_AUTOGEN */
#endif /* GEN_BCM56880_A0_HNA_1_2_10_0_LTD_VARIANT_DEF_H */

37
platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56880_a0/utcfg/bcm56880_a0_utcfg_ltd_variant_def.h Normal file
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@ -0,0 +1,37 @@
/*******************************************************************************
*
* DO NOT EDIT THIS FILE!
* This file is auto-generated by fltg from Logical Table mapping files.
*
* Tool: $SDK/tools/fltg/bin/fltg
*
* Edits to this file will be lost when it is regenerated.
*
* $Copyright: Copyright 2018-2022 Broadcom. All rights reserved.
* The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License
* version 2 as published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* A copy of the GNU General Public License version 2 (GPLv2) can
* be found in the LICENSES folder.$
*
******************************************************************************/
#ifndef GEN_BCM56880_A0_UTCFG_LTD_VARIANT_DEF_H
#define GEN_BCM56880_A0_UTCFG_LTD_VARIANT_DEF_H
#ifndef DOXYGEN_IGNORE_AUTOGEN
#define BCMLTD_VARIANT_BCM56880_A0_UTCFG 18
#define BCMLTD_VARIANT_LOCAL_BCM56880_A0_UTCFG 4
#endif /* DOXYGEN_IGNORE_AUTOGEN */
#endif /* GEN_BCM56880_A0_UTCFG_LTD_VARIANT_DEF_H */

37
platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56880_a0/utlrd/bcm56880_a0_utlrd_ltd_variant_def.h Normal file
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@ -0,0 +1,37 @@
/*******************************************************************************
*
* DO NOT EDIT THIS FILE!
* This file is auto-generated by fltg from Logical Table mapping files.
*
* Tool: $SDK/tools/fltg/bin/fltg
*
* Edits to this file will be lost when it is regenerated.
*
* $Copyright: Copyright 2018-2022 Broadcom. All rights reserved.
* The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License
* version 2 as published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* A copy of the GNU General Public License version 2 (GPLv2) can
* be found in the LICENSES folder.$
*
******************************************************************************/
#ifndef GEN_BCM56880_A0_UTLRD_LTD_VARIANT_DEF_H
#define GEN_BCM56880_A0_UTLRD_LTD_VARIANT_DEF_H
#ifndef DOXYGEN_IGNORE_AUTOGEN
#define BCMLTD_VARIANT_BCM56880_A0_UTLRD 19
#define BCMLTD_VARIANT_LOCAL_BCM56880_A0_UTLRD 5
#endif /* DOXYGEN_IGNORE_AUTOGEN */
#endif /* GEN_BCM56880_A0_UTLRD_LTD_VARIANT_DEF_H */

37
platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56880_a0/utltm/bcm56880_a0_utltm_ltd_variant_def.h Normal file
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@ -0,0 +1,37 @@
/*******************************************************************************
*
* DO NOT EDIT THIS FILE!
* This file is auto-generated by fltg from Logical Table mapping files.
*
* Tool: $SDK/tools/fltg/bin/fltg
*
* Edits to this file will be lost when it is regenerated.
*
* $Copyright: Copyright 2018-2022 Broadcom. All rights reserved.
* The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License
* version 2 as published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* A copy of the GNU General Public License version 2 (GPLv2) can
* be found in the LICENSES folder.$
*
******************************************************************************/
#ifndef GEN_BCM56880_A0_UTLTM_LTD_VARIANT_DEF_H
#define GEN_BCM56880_A0_UTLTM_LTD_VARIANT_DEF_H
#ifndef DOXYGEN_IGNORE_AUTOGEN
#define BCMLTD_VARIANT_BCM56880_A0_UTLTM 20
#define BCMLTD_VARIANT_LOCAL_BCM56880_A0_UTLTM 6
#endif /* DOXYGEN_IGNORE_AUTOGEN */
#endif /* GEN_BCM56880_A0_UTLTM_LTD_VARIANT_DEF_H */

37
platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56890_a0/bcm56890_a0_ltd_variant_def.h Normal file
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@ -0,0 +1,37 @@
/*******************************************************************************
*
* DO NOT EDIT THIS FILE!
* This file is auto-generated by fltg from Logical Table mapping files.
*
* Tool: $SDK/tools/fltg/bin/fltg
*
* Edits to this file will be lost when it is regenerated.
*
* $Copyright: Copyright 2018-2022 Broadcom. All rights reserved.
* The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License
* version 2 as published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* A copy of the GNU General Public License version 2 (GPLv2) can
* be found in the LICENSES folder.$
*
******************************************************************************/
#ifndef GEN_BCM56890_A0_LTD_VARIANT_DEF_H
#define GEN_BCM56890_A0_LTD_VARIANT_DEF_H
#ifndef DOXYGEN_IGNORE_AUTOGEN
#define BCMLTD_VARIANT_BCM56890_A0_BASE 4
#define BCMLTD_VARIANT_LOCAL_BCM56890_A0_BASE 0
#endif /* DOXYGEN_IGNORE_AUTOGEN */
#endif /* GEN_BCM56890_A0_LTD_VARIANT_DEF_H */

37
platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56890_a0/dna_4_0_17_0/bcm56890_a0_dna_4_0_17_0_ltd_variant_def.h Normal file
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@ -0,0 +1,37 @@
/*******************************************************************************
*
* DO NOT EDIT THIS FILE!
* This file is auto-generated by fltg from Logical Table mapping files.
*
* Tool: $SDK/tools/fltg/bin/fltg
*
* Edits to this file will be lost when it is regenerated.
*
* $Copyright: Copyright 2018-2022 Broadcom. All rights reserved.
* The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License
* version 2 as published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* A copy of the GNU General Public License version 2 (GPLv2) can
* be found in the LICENSES folder.$
*
******************************************************************************/
#ifndef GEN_BCM56890_A0_DNA_4_0_17_0_LTD_VARIANT_DEF_H
#define GEN_BCM56890_A0_DNA_4_0_17_0_LTD_VARIANT_DEF_H
#ifndef DOXYGEN_IGNORE_AUTOGEN
#define BCMLTD_VARIANT_BCM56890_A0_DNA_4_0_17_0 21
#define BCMLTD_VARIANT_LOCAL_BCM56890_A0_DNA_4_0_17_0 1
#endif /* DOXYGEN_IGNORE_AUTOGEN */
#endif /* GEN_BCM56890_A0_DNA_4_0_17_0_LTD_VARIANT_DEF_H */

37
platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56990_a0/bcm56990_a0_ltd_variant_def.h Normal file
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@ -0,0 +1,37 @@
/*******************************************************************************
*
* DO NOT EDIT THIS FILE!
* This file is auto-generated by fltg from Logical Table mapping files.
*
* Tool: $SDK/tools/fltg/bin/fltg
*
* Edits to this file will be lost when it is regenerated.
*
* $Copyright: Copyright 2018-2022 Broadcom. All rights reserved.
* The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License
* version 2 as published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* A copy of the GNU General Public License version 2 (GPLv2) can
* be found in the LICENSES folder.$
*
******************************************************************************/
#ifndef GEN_BCM56990_A0_LTD_VARIANT_DEF_H
#define GEN_BCM56990_A0_LTD_VARIANT_DEF_H
#ifndef DOXYGEN_IGNORE_AUTOGEN
#define BCMLTD_VARIANT_BCM56990_A0_BASE 5
#define BCMLTD_VARIANT_LOCAL_BCM56990_A0_BASE 0
#endif /* DOXYGEN_IGNORE_AUTOGEN */
#endif /* GEN_BCM56990_A0_LTD_VARIANT_DEF_H */

37
platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56990_b0/bcm56990_b0_ltd_variant_def.h Normal file
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@ -0,0 +1,37 @@
/*******************************************************************************
*
* DO NOT EDIT THIS FILE!
* This file is auto-generated by fltg from Logical Table mapping files.
*
* Tool: $SDK/tools/fltg/bin/fltg
*
* Edits to this file will be lost when it is regenerated.
*
* $Copyright: Copyright 2018-2022 Broadcom. All rights reserved.
* The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License
* version 2 as published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* A copy of the GNU General Public License version 2 (GPLv2) can
* be found in the LICENSES folder.$
*
******************************************************************************/
#ifndef GEN_BCM56990_B0_LTD_VARIANT_DEF_H
#define GEN_BCM56990_B0_LTD_VARIANT_DEF_H
#ifndef DOXYGEN_IGNORE_AUTOGEN
#define BCMLTD_VARIANT_BCM56990_B0_BASE 6
#define BCMLTD_VARIANT_LOCAL_BCM56990_B0_BASE 0
#endif /* DOXYGEN_IGNORE_AUTOGEN */
#endif /* GEN_BCM56990_B0_LTD_VARIANT_DEF_H */

37
platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56996_a0/bcm56996_a0_ltd_variant_def.h Normal file
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@ -0,0 +1,37 @@
/*******************************************************************************
*
* DO NOT EDIT THIS FILE!
* This file is auto-generated by fltg from Logical Table mapping files.
*
* Tool: $SDK/tools/fltg/bin/fltg
*
* Edits to this file will be lost when it is regenerated.
*
* $Copyright: Copyright 2018-2022 Broadcom. All rights reserved.
* The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License
* version 2 as published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* A copy of the GNU General Public License version 2 (GPLv2) can
* be found in the LICENSES folder.$
*
******************************************************************************/
#ifndef GEN_BCM56996_A0_LTD_VARIANT_DEF_H
#define GEN_BCM56996_A0_LTD_VARIANT_DEF_H
#ifndef DOXYGEN_IGNORE_AUTOGEN
#define BCMLTD_VARIANT_BCM56996_A0_BASE 7
#define BCMLTD_VARIANT_LOCAL_BCM56996_A0_BASE 0
#endif /* DOXYGEN_IGNORE_AUTOGEN */
#endif /* GEN_BCM56996_A0_LTD_VARIANT_DEF_H */

37
platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56996_b0/bcm56996_b0_ltd_variant_def.h Normal file
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@ -0,0 +1,37 @@
/*******************************************************************************
*
* DO NOT EDIT THIS FILE!
* This file is auto-generated by fltg from Logical Table mapping files.
*
* Tool: $SDK/tools/fltg/bin/fltg
*
* Edits to this file will be lost when it is regenerated.
*
* $Copyright: Copyright 2018-2022 Broadcom. All rights reserved.
* The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License
* version 2 as published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* A copy of the GNU General Public License version 2 (GPLv2) can
* be found in the LICENSES folder.$
*
******************************************************************************/
#ifndef GEN_BCM56996_B0_LTD_VARIANT_DEF_H
#define GEN_BCM56996_B0_LTD_VARIANT_DEF_H
#ifndef DOXYGEN_IGNORE_AUTOGEN
#define BCMLTD_VARIANT_BCM56996_B0_BASE 8
#define BCMLTD_VARIANT_LOCAL_BCM56996_B0_BASE 0
#endif /* DOXYGEN_IGNORE_AUTOGEN */
#endif /* GEN_BCM56996_B0_LTD_VARIANT_DEF_H */

37
platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56998_a0/bcm56998_a0_ltd_variant_def.h Normal file
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@ -0,0 +1,37 @@
/*******************************************************************************
*
* DO NOT EDIT THIS FILE!
* This file is auto-generated by fltg from Logical Table mapping files.
*
* Tool: $SDK/tools/fltg/bin/fltg
*
* Edits to this file will be lost when it is regenerated.
*
* $Copyright: Copyright 2018-2022 Broadcom. All rights reserved.
* The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License
* version 2 as published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* A copy of the GNU General Public License version 2 (GPLv2) can
* be found in the LICENSES folder.$
*
******************************************************************************/
#ifndef GEN_BCM56998_A0_LTD_VARIANT_DEF_H
#define GEN_BCM56998_A0_LTD_VARIANT_DEF_H
#ifndef DOXYGEN_IGNORE_AUTOGEN
#define BCMLTD_VARIANT_BCM56998_A0_BASE 9
#define BCMLTD_VARIANT_LOCAL_BCM56998_A0_BASE 0
#endif /* DOXYGEN_IGNORE_AUTOGEN */
#endif /* GEN_BCM56998_A0_LTD_VARIANT_DEF_H */

37
platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56999_a0/bcm56999_a0_ltd_variant_def.h Normal file
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@ -0,0 +1,37 @@
/*******************************************************************************
*
* DO NOT EDIT THIS FILE!
* This file is auto-generated by fltg from Logical Table mapping files.
*
* Tool: $SDK/tools/fltg/bin/fltg
*
* Edits to this file will be lost when it is regenerated.
*
* $Copyright: Copyright 2018-2022 Broadcom. All rights reserved.
* The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License
* version 2 as published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* A copy of the GNU General Public License version 2 (GPLv2) can
* be found in the LICENSES folder.$
*
******************************************************************************/
#ifndef GEN_BCM56999_A0_LTD_VARIANT_DEF_H
#define GEN_BCM56999_A0_LTD_VARIANT_DEF_H
#ifndef DOXYGEN_IGNORE_AUTOGEN
#define BCMLTD_VARIANT_BCM56999_A0_BASE 10
#define BCMLTD_VARIANT_LOCAL_BCM56999_A0_BASE 0
#endif /* DOXYGEN_IGNORE_AUTOGEN */
#endif /* GEN_BCM56999_A0_LTD_VARIANT_DEF_H */

37
platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm78900_b0/bcm78900_b0_ltd_variant_def.h Normal file
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@ -0,0 +1,37 @@
/*******************************************************************************
*
* DO NOT EDIT THIS FILE!
* This file is auto-generated by fltg from Logical Table mapping files.
*
* Tool: $SDK/tools/fltg/bin/fltg
*
* Edits to this file will be lost when it is regenerated.
*
* $Copyright: Copyright 2018-2022 Broadcom. All rights reserved.
* The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License
* version 2 as published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* A copy of the GNU General Public License version 2 (GPLv2) can
* be found in the LICENSES folder.$
*
******************************************************************************/
#ifndef GEN_BCM78900_B0_LTD_VARIANT_DEF_H
#define GEN_BCM78900_B0_LTD_VARIANT_DEF_H
#ifndef DOXYGEN_IGNORE_AUTOGEN
#define BCMLTD_VARIANT_BCM78900_B0_BASE 11
#define BCMLTD_VARIANT_LOCAL_BCM78900_B0_BASE 0
#endif /* DOXYGEN_IGNORE_AUTOGEN */
#endif /* GEN_BCM78900_B0_LTD_VARIANT_DEF_H */

40
platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56080_a0/bcm56080_a0_ltd_variant_entry.h Normal file
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@ -0,0 +1,40 @@
/*******************************************************************************
*
* DO NOT EDIT THIS FILE!
* This file is auto-generated by fltg from Logical Table mapping files.
*
* Tool: $SDK/tools/fltg/bin/fltg
*
* Edits to this file will be lost when it is regenerated.
*
* $Copyright: Copyright 2018-2022 Broadcom. All rights reserved.
* The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License
* version 2 as published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* A copy of the GNU General Public License version 2 (GPLv2) can
* be found in the LICENSES folder.$
*
******************************************************************************/
#ifndef GEN_BCM56080_A0_LTD_VARIANT_ENTRY_H
#define GEN_BCM56080_A0_LTD_VARIANT_ENTRY_H
#include <bcmltd/defs/generated/bcm56080_a0/bcm56080_a0_ltd_variant_def.h>
#endif /* GEN_BCM56080_A0_LTD_VARIANT_ENTRY_H */
#ifndef DOXYGEN_IGNORE_AUTOGEN
#if BCMLTD_CONFIG_INCLUDE_BCM56080_A0_BASE == 1 || defined(BCMLTD_VARIANT_OVERRIDE)
BCMLTD_VARIANT_ENTRY(bcm56080_a0,BCM56080_A0,,BASE,,BCMLTD_VARIANT_BCM56080_A0_BASE,BCMLTD_VARIANT_LOCAL_BCM56080_A0_BASE,NULL,0,0)
#endif
#endif /* DOXYGEN_IGNORE_AUTOGEN */

40
platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56780_a0/bcm56780_a0_ltd_variant_entry.h Normal file
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@ -0,0 +1,40 @@
/*******************************************************************************
*
* DO NOT EDIT THIS FILE!
* This file is auto-generated by fltg from Logical Table mapping files.
*
* Tool: $SDK/tools/fltg/bin/fltg
*
* Edits to this file will be lost when it is regenerated.
*
* $Copyright: Copyright 2018-2022 Broadcom. All rights reserved.
* The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License
* version 2 as published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* A copy of the GNU General Public License version 2 (GPLv2) can
* be found in the LICENSES folder.$
*
******************************************************************************/
#ifndef GEN_BCM56780_A0_LTD_VARIANT_ENTRY_H
#define GEN_BCM56780_A0_LTD_VARIANT_ENTRY_H
#include <bcmltd/defs/generated/bcm56780_a0/bcm56780_a0_ltd_variant_def.h>
#endif /* GEN_BCM56780_A0_LTD_VARIANT_ENTRY_H */
#ifndef DOXYGEN_IGNORE_AUTOGEN
#if BCMLTD_CONFIG_INCLUDE_BCM56780_A0_BASE == 1 || defined(BCMLTD_VARIANT_OVERRIDE)
BCMLTD_VARIANT_ENTRY(bcm56780_a0,BCM56780_A0,,BASE,,BCMLTD_VARIANT_BCM56780_A0_BASE,BCMLTD_VARIANT_LOCAL_BCM56780_A0_BASE,NULL,0,0)
#endif
#endif /* DOXYGEN_IGNORE_AUTOGEN */

40
platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56780_a0/cna_1_2_13/bcm56780_a0_cna_1_2_13_ltd_variant_entry.h Normal file
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@ -0,0 +1,40 @@
/*******************************************************************************
*
* DO NOT EDIT THIS FILE!
* This file is auto-generated by fltg from Logical Table mapping files.
*
* Tool: $SDK/tools/fltg/bin/fltg
*
* Edits to this file will be lost when it is regenerated.
*
* $Copyright: Copyright 2018-2022 Broadcom. All rights reserved.
* The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License
* version 2 as published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* A copy of the GNU General Public License version 2 (GPLv2) can
* be found in the LICENSES folder.$
*
******************************************************************************/
#ifndef GEN_BCM56780_A0_CNA_1_2_13_LTD_VARIANT_ENTRY_H
#define GEN_BCM56780_A0_CNA_1_2_13_LTD_VARIANT_ENTRY_H
#include <bcmltd/defs/generated/bcm56780_a0/cna_1_2_13/bcm56780_a0_cna_1_2_13_ltd_variant_def.h>
#endif /* GEN_BCM56780_A0_CNA_1_2_13_LTD_VARIANT_ENTRY_H */
#ifndef DOXYGEN_IGNORE_AUTOGEN
#if BCMLTD_CONFIG_INCLUDE_BCM56780_A0_CNA_1_2_13 == 1 || defined(BCMLTD_VARIANT_OVERRIDE)
BCMLTD_VARIANT_ENTRY(bcm56780_a0,BCM56780_A0,cna_1_2_13,CNA_1_2_13,_,BCMLTD_VARIANT_BCM56780_A0_CNA_1_2_13,BCMLTD_VARIANT_LOCAL_BCM56780_A0_CNA_1_2_13,NULL,0,0)
#endif
#endif /* DOXYGEN_IGNORE_AUTOGEN */

40
platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56780_a0/dna_2_9_5_0/bcm56780_a0_dna_2_9_5_0_ltd_variant_entry.h Normal file
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@ -0,0 +1,40 @@
/*******************************************************************************
*
* DO NOT EDIT THIS FILE!
* This file is auto-generated by fltg from Logical Table mapping files.
*
* Tool: $SDK/tools/fltg/bin/fltg
*
* Edits to this file will be lost when it is regenerated.
*
* $Copyright: Copyright 2018-2022 Broadcom. All rights reserved.
* The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License
* version 2 as published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* A copy of the GNU General Public License version 2 (GPLv2) can
* be found in the LICENSES folder.$
*
******************************************************************************/
#ifndef GEN_BCM56780_A0_DNA_2_9_5_0_LTD_VARIANT_ENTRY_H
#define GEN_BCM56780_A0_DNA_2_9_5_0_LTD_VARIANT_ENTRY_H
#include <bcmltd/defs/generated/bcm56780_a0/dna_2_9_5_0/bcm56780_a0_dna_2_9_5_0_ltd_variant_def.h>
#endif /* GEN_BCM56780_A0_DNA_2_9_5_0_LTD_VARIANT_ENTRY_H */
#ifndef DOXYGEN_IGNORE_AUTOGEN
#if BCMLTD_CONFIG_INCLUDE_BCM56780_A0_DNA_2_9_5_0 == 1 || defined(BCMLTD_VARIANT_OVERRIDE)
BCMLTD_VARIANT_ENTRY(bcm56780_a0,BCM56780_A0,dna_2_9_5_0,DNA_2_9_5_0,_,BCMLTD_VARIANT_BCM56780_A0_DNA_2_9_5_0,BCMLTD_VARIANT_LOCAL_BCM56780_A0_DNA_2_9_5_0,NULL,0,0)
#endif
#endif /* DOXYGEN_IGNORE_AUTOGEN */

40
platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56780_a0/hna_1_2_10_0/bcm56780_a0_hna_1_2_10_0_ltd_variant_entry.h Normal file
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@ -0,0 +1,40 @@
/*******************************************************************************
*
* DO NOT EDIT THIS FILE!
* This file is auto-generated by fltg from Logical Table mapping files.
*
* Tool: $SDK/tools/fltg/bin/fltg
*
* Edits to this file will be lost when it is regenerated.
*
* $Copyright: Copyright 2018-2022 Broadcom. All rights reserved.
* The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License
* version 2 as published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* A copy of the GNU General Public License version 2 (GPLv2) can
* be found in the LICENSES folder.$
*
******************************************************************************/
#ifndef GEN_BCM56780_A0_HNA_1_2_10_0_LTD_VARIANT_ENTRY_H
#define GEN_BCM56780_A0_HNA_1_2_10_0_LTD_VARIANT_ENTRY_H
#include <bcmltd/defs/generated/bcm56780_a0/hna_1_2_10_0/bcm56780_a0_hna_1_2_10_0_ltd_variant_def.h>
#endif /* GEN_BCM56780_A0_HNA_1_2_10_0_LTD_VARIANT_ENTRY_H */
#ifndef DOXYGEN_IGNORE_AUTOGEN
#if BCMLTD_CONFIG_INCLUDE_BCM56780_A0_HNA_1_2_10_0 == 1 || defined(BCMLTD_VARIANT_OVERRIDE)
BCMLTD_VARIANT_ENTRY(bcm56780_a0,BCM56780_A0,hna_1_2_10_0,HNA_1_2_10_0,_,BCMLTD_VARIANT_BCM56780_A0_HNA_1_2_10_0,BCMLTD_VARIANT_LOCAL_BCM56780_A0_HNA_1_2_10_0,NULL,0,0)
#endif
#endif /* DOXYGEN_IGNORE_AUTOGEN */

40
platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56880_a0/bcm56880_a0_ltd_variant_entry.h Normal file
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@ -0,0 +1,40 @@
/*******************************************************************************
*
* DO NOT EDIT THIS FILE!
* This file is auto-generated by fltg from Logical Table mapping files.
*
* Tool: $SDK/tools/fltg/bin/fltg
*
* Edits to this file will be lost when it is regenerated.
*
* $Copyright: Copyright 2018-2022 Broadcom. All rights reserved.
* The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License
* version 2 as published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* A copy of the GNU General Public License version 2 (GPLv2) can
* be found in the LICENSES folder.$
*
******************************************************************************/
#ifndef GEN_BCM56880_A0_LTD_VARIANT_ENTRY_H
#define GEN_BCM56880_A0_LTD_VARIANT_ENTRY_H
#include <bcmltd/defs/generated/bcm56880_a0/bcm56880_a0_ltd_variant_def.h>
#endif /* GEN_BCM56880_A0_LTD_VARIANT_ENTRY_H */
#ifndef DOXYGEN_IGNORE_AUTOGEN
#if BCMLTD_CONFIG_INCLUDE_BCM56880_A0_BASE == 1 || defined(BCMLTD_VARIANT_OVERRIDE)
BCMLTD_VARIANT_ENTRY(bcm56880_a0,BCM56880_A0,,BASE,,BCMLTD_VARIANT_BCM56880_A0_BASE,BCMLTD_VARIANT_LOCAL_BCM56880_A0_BASE,NULL,0,0)
#endif
#endif /* DOXYGEN_IGNORE_AUTOGEN */

40
platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56880_a0/cna_1_2_13/bcm56880_a0_cna_1_2_13_ltd_variant_entry.h Normal file
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@ -0,0 +1,40 @@
/*******************************************************************************
*
* DO NOT EDIT THIS FILE!
* This file is auto-generated by fltg from Logical Table mapping files.
*
* Tool: $SDK/tools/fltg/bin/fltg
*
* Edits to this file will be lost when it is regenerated.
*
* $Copyright: Copyright 2018-2022 Broadcom. All rights reserved.
* The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License
* version 2 as published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* A copy of the GNU General Public License version 2 (GPLv2) can
* be found in the LICENSES folder.$
*
******************************************************************************/
#ifndef GEN_BCM56880_A0_CNA_1_2_13_LTD_VARIANT_ENTRY_H
#define GEN_BCM56880_A0_CNA_1_2_13_LTD_VARIANT_ENTRY_H
#include <bcmltd/defs/generated/bcm56880_a0/cna_1_2_13/bcm56880_a0_cna_1_2_13_ltd_variant_def.h>
#endif /* GEN_BCM56880_A0_CNA_1_2_13_LTD_VARIANT_ENTRY_H */
#ifndef DOXYGEN_IGNORE_AUTOGEN
#if BCMLTD_CONFIG_INCLUDE_BCM56880_A0_CNA_1_2_13 == 1 || defined(BCMLTD_VARIANT_OVERRIDE)
BCMLTD_VARIANT_ENTRY(bcm56880_a0,BCM56880_A0,cna_1_2_13,CNA_1_2_13,_,BCMLTD_VARIANT_BCM56880_A0_CNA_1_2_13,BCMLTD_VARIANT_LOCAL_BCM56880_A0_CNA_1_2_13,NULL,0,0)
#endif
#endif /* DOXYGEN_IGNORE_AUTOGEN */

40
platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56880_a0/dna_4_11_4_0/bcm56880_a0_dna_4_11_4_0_ltd_variant_entry.h Normal file
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@ -0,0 +1,40 @@
/*******************************************************************************
*
* DO NOT EDIT THIS FILE!
* This file is auto-generated by fltg from Logical Table mapping files.
*
* Tool: $SDK/tools/fltg/bin/fltg
*
* Edits to this file will be lost when it is regenerated.
*
* $Copyright: Copyright 2018-2022 Broadcom. All rights reserved.
* The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License
* version 2 as published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* A copy of the GNU General Public License version 2 (GPLv2) can
* be found in the LICENSES folder.$
*
******************************************************************************/
#ifndef GEN_BCM56880_A0_DNA_4_11_4_0_LTD_VARIANT_ENTRY_H
#define GEN_BCM56880_A0_DNA_4_11_4_0_LTD_VARIANT_ENTRY_H
#include <bcmltd/defs/generated/bcm56880_a0/dna_4_11_4_0/bcm56880_a0_dna_4_11_4_0_ltd_variant_def.h>
#endif /* GEN_BCM56880_A0_DNA_4_11_4_0_LTD_VARIANT_ENTRY_H */
#ifndef DOXYGEN_IGNORE_AUTOGEN
#if BCMLTD_CONFIG_INCLUDE_BCM56880_A0_DNA_4_11_4_0 == 1 || defined(BCMLTD_VARIANT_OVERRIDE)
BCMLTD_VARIANT_ENTRY(bcm56880_a0,BCM56880_A0,dna_4_11_4_0,DNA_4_11_4_0,_,BCMLTD_VARIANT_BCM56880_A0_DNA_4_11_4_0,BCMLTD_VARIANT_LOCAL_BCM56880_A0_DNA_4_11_4_0,NULL,0,0)
#endif
#endif /* DOXYGEN_IGNORE_AUTOGEN */

40
platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56880_a0/hna_1_2_10_0/bcm56880_a0_hna_1_2_10_0_ltd_variant_entry.h Normal file
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@ -0,0 +1,40 @@
/*******************************************************************************
*
* DO NOT EDIT THIS FILE!
* This file is auto-generated by fltg from Logical Table mapping files.
*
* Tool: $SDK/tools/fltg/bin/fltg
*
* Edits to this file will be lost when it is regenerated.
*
* $Copyright: Copyright 2018-2022 Broadcom. All rights reserved.
* The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License
* version 2 as published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* A copy of the GNU General Public License version 2 (GPLv2) can
* be found in the LICENSES folder.$
*
******************************************************************************/
#ifndef GEN_BCM56880_A0_HNA_1_2_10_0_LTD_VARIANT_ENTRY_H
#define GEN_BCM56880_A0_HNA_1_2_10_0_LTD_VARIANT_ENTRY_H
#include <bcmltd/defs/generated/bcm56880_a0/hna_1_2_10_0/bcm56880_a0_hna_1_2_10_0_ltd_variant_def.h>
#endif /* GEN_BCM56880_A0_HNA_1_2_10_0_LTD_VARIANT_ENTRY_H */
#ifndef DOXYGEN_IGNORE_AUTOGEN
#if BCMLTD_CONFIG_INCLUDE_BCM56880_A0_HNA_1_2_10_0 == 1 || defined(BCMLTD_VARIANT_OVERRIDE)
BCMLTD_VARIANT_ENTRY(bcm56880_a0,BCM56880_A0,hna_1_2_10_0,HNA_1_2_10_0,_,BCMLTD_VARIANT_BCM56880_A0_HNA_1_2_10_0,BCMLTD_VARIANT_LOCAL_BCM56880_A0_HNA_1_2_10_0,NULL,0,0)
#endif
#endif /* DOXYGEN_IGNORE_AUTOGEN */

40
platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56880_a0/utcfg/bcm56880_a0_utcfg_ltd_variant_entry.h Normal file
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@ -0,0 +1,40 @@
/*******************************************************************************
*
* DO NOT EDIT THIS FILE!
* This file is auto-generated by fltg from Logical Table mapping files.
*
* Tool: $SDK/tools/fltg/bin/fltg
*
* Edits to this file will be lost when it is regenerated.
*
* $Copyright: Copyright 2018-2022 Broadcom. All rights reserved.
* The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License
* version 2 as published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* A copy of the GNU General Public License version 2 (GPLv2) can
* be found in the LICENSES folder.$
*
******************************************************************************/
#ifndef GEN_BCM56880_A0_UTCFG_LTD_VARIANT_ENTRY_H
#define GEN_BCM56880_A0_UTCFG_LTD_VARIANT_ENTRY_H
#include <bcmltd/defs/generated/bcm56880_a0/utcfg/bcm56880_a0_utcfg_ltd_variant_def.h>
#endif /* GEN_BCM56880_A0_UTCFG_LTD_VARIANT_ENTRY_H */
#ifndef DOXYGEN_IGNORE_AUTOGEN
#if BCMLTD_CONFIG_INCLUDE_BCM56880_A0_UTCFG == 1 || defined(BCMLTD_VARIANT_OVERRIDE)
BCMLTD_VARIANT_ENTRY(bcm56880_a0,BCM56880_A0,utcfg,UTCFG,_,BCMLTD_VARIANT_BCM56880_A0_UTCFG,BCMLTD_VARIANT_LOCAL_BCM56880_A0_UTCFG,NULL,0,0)
#endif
#endif /* DOXYGEN_IGNORE_AUTOGEN */

40
platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56880_a0/utlrd/bcm56880_a0_utlrd_ltd_variant_entry.h Normal file
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@ -0,0 +1,40 @@
/*******************************************************************************
*
* DO NOT EDIT THIS FILE!
* This file is auto-generated by fltg from Logical Table mapping files.
*
* Tool: $SDK/tools/fltg/bin/fltg
*
* Edits to this file will be lost when it is regenerated.
*
* $Copyright: Copyright 2018-2022 Broadcom. All rights reserved.
* The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License
* version 2 as published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* A copy of the GNU General Public License version 2 (GPLv2) can
* be found in the LICENSES folder.$
*
******************************************************************************/
#ifndef GEN_BCM56880_A0_UTLRD_LTD_VARIANT_ENTRY_H
#define GEN_BCM56880_A0_UTLRD_LTD_VARIANT_ENTRY_H
#include <bcmltd/defs/generated/bcm56880_a0/utlrd/bcm56880_a0_utlrd_ltd_variant_def.h>
#endif /* GEN_BCM56880_A0_UTLRD_LTD_VARIANT_ENTRY_H */
#ifndef DOXYGEN_IGNORE_AUTOGEN
#if BCMLTD_CONFIG_INCLUDE_BCM56880_A0_UTLRD == 1 || defined(BCMLTD_VARIANT_OVERRIDE)
BCMLTD_VARIANT_ENTRY(bcm56880_a0,BCM56880_A0,utlrd,UTLRD,_,BCMLTD_VARIANT_BCM56880_A0_UTLRD,BCMLTD_VARIANT_LOCAL_BCM56880_A0_UTLRD,NULL,0,0)
#endif
#endif /* DOXYGEN_IGNORE_AUTOGEN */

40
platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56880_a0/utltm/bcm56880_a0_utltm_ltd_variant_entry.h Normal file
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@ -0,0 +1,40 @@
/*******************************************************************************
*
* DO NOT EDIT THIS FILE!
* This file is auto-generated by fltg from Logical Table mapping files.
*
* Tool: $SDK/tools/fltg/bin/fltg
*
* Edits to this file will be lost when it is regenerated.
*
* $Copyright: Copyright 2018-2022 Broadcom. All rights reserved.
* The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License
* version 2 as published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* A copy of the GNU General Public License version 2 (GPLv2) can
* be found in the LICENSES folder.$
*
******************************************************************************/
#ifndef GEN_BCM56880_A0_UTLTM_LTD_VARIANT_ENTRY_H
#define GEN_BCM56880_A0_UTLTM_LTD_VARIANT_ENTRY_H
#include <bcmltd/defs/generated/bcm56880_a0/utltm/bcm56880_a0_utltm_ltd_variant_def.h>
#endif /* GEN_BCM56880_A0_UTLTM_LTD_VARIANT_ENTRY_H */
#ifndef DOXYGEN_IGNORE_AUTOGEN
#if BCMLTD_CONFIG_INCLUDE_BCM56880_A0_UTLTM == 1 || defined(BCMLTD_VARIANT_OVERRIDE)
BCMLTD_VARIANT_ENTRY(bcm56880_a0,BCM56880_A0,utltm,UTLTM,_,BCMLTD_VARIANT_BCM56880_A0_UTLTM,BCMLTD_VARIANT_LOCAL_BCM56880_A0_UTLTM,NULL,0,0)
#endif
#endif /* DOXYGEN_IGNORE_AUTOGEN */

40
platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56890_a0/bcm56890_a0_ltd_variant_entry.h Normal file
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@ -0,0 +1,40 @@
/*******************************************************************************
*
* DO NOT EDIT THIS FILE!
* This file is auto-generated by fltg from Logical Table mapping files.
*
* Tool: $SDK/tools/fltg/bin/fltg
*
* Edits to this file will be lost when it is regenerated.
*
* $Copyright: Copyright 2018-2022 Broadcom. All rights reserved.
* The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License
* version 2 as published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* A copy of the GNU General Public License version 2 (GPLv2) can
* be found in the LICENSES folder.$
*
******************************************************************************/
#ifndef GEN_BCM56890_A0_LTD_VARIANT_ENTRY_H
#define GEN_BCM56890_A0_LTD_VARIANT_ENTRY_H
#include <bcmltd/defs/generated/bcm56890_a0/bcm56890_a0_ltd_variant_def.h>
#endif /* GEN_BCM56890_A0_LTD_VARIANT_ENTRY_H */
#ifndef DOXYGEN_IGNORE_AUTOGEN
#if BCMLTD_CONFIG_INCLUDE_BCM56890_A0_BASE == 1 || defined(BCMLTD_VARIANT_OVERRIDE)
BCMLTD_VARIANT_ENTRY(bcm56890_a0,BCM56890_A0,,BASE,,BCMLTD_VARIANT_BCM56890_A0_BASE,BCMLTD_VARIANT_LOCAL_BCM56890_A0_BASE,NULL,0,0)
#endif
#endif /* DOXYGEN_IGNORE_AUTOGEN */

40
platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56890_a0/dna_4_0_17_0/bcm56890_a0_dna_4_0_17_0_ltd_variant_entry.h Normal file
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@ -0,0 +1,40 @@
/*******************************************************************************
*
* DO NOT EDIT THIS FILE!
* This file is auto-generated by fltg from Logical Table mapping files.
*
* Tool: $SDK/tools/fltg/bin/fltg
*
* Edits to this file will be lost when it is regenerated.
*
* $Copyright: Copyright 2018-2022 Broadcom. All rights reserved.
* The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License
* version 2 as published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* A copy of the GNU General Public License version 2 (GPLv2) can
* be found in the LICENSES folder.$
*
******************************************************************************/
#ifndef GEN_BCM56890_A0_DNA_4_0_17_0_LTD_VARIANT_ENTRY_H
#define GEN_BCM56890_A0_DNA_4_0_17_0_LTD_VARIANT_ENTRY_H
#include <bcmltd/defs/generated/bcm56890_a0/dna_4_0_17_0/bcm56890_a0_dna_4_0_17_0_ltd_variant_def.h>
#endif /* GEN_BCM56890_A0_DNA_4_0_17_0_LTD_VARIANT_ENTRY_H */
#ifndef DOXYGEN_IGNORE_AUTOGEN
#if BCMLTD_CONFIG_INCLUDE_BCM56890_A0_DNA_4_0_17_0 == 1 || defined(BCMLTD_VARIANT_OVERRIDE)
BCMLTD_VARIANT_ENTRY(bcm56890_a0,BCM56890_A0,dna_4_0_17_0,DNA_4_0_17_0,_,BCMLTD_VARIANT_BCM56890_A0_DNA_4_0_17_0,BCMLTD_VARIANT_LOCAL_BCM56890_A0_DNA_4_0_17_0,NULL,0,0)
#endif
#endif /* DOXYGEN_IGNORE_AUTOGEN */

40
platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56990_a0/bcm56990_a0_ltd_variant_entry.h Normal file
View File

@ -0,0 +1,40 @@
/*******************************************************************************
*
* DO NOT EDIT THIS FILE!
* This file is auto-generated by fltg from Logical Table mapping files.
*
* Tool: $SDK/tools/fltg/bin/fltg
*
* Edits to this file will be lost when it is regenerated.
*
* $Copyright: Copyright 2018-2022 Broadcom. All rights reserved.
* The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License
* version 2 as published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* A copy of the GNU General Public License version 2 (GPLv2) can
* be found in the LICENSES folder.$
*
******************************************************************************/
#ifndef GEN_BCM56990_A0_LTD_VARIANT_ENTRY_H
#define GEN_BCM56990_A0_LTD_VARIANT_ENTRY_H
#include <bcmltd/defs/generated/bcm56990_a0/bcm56990_a0_ltd_variant_def.h>
#endif /* GEN_BCM56990_A0_LTD_VARIANT_ENTRY_H */
#ifndef DOXYGEN_IGNORE_AUTOGEN
#if BCMLTD_CONFIG_INCLUDE_BCM56990_A0_BASE == 1 || defined(BCMLTD_VARIANT_OVERRIDE)
BCMLTD_VARIANT_ENTRY(bcm56990_a0,BCM56990_A0,,BASE,,BCMLTD_VARIANT_BCM56990_A0_BASE,BCMLTD_VARIANT_LOCAL_BCM56990_A0_BASE,NULL,0,0)
#endif
#endif /* DOXYGEN_IGNORE_AUTOGEN */

40
platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56990_b0/bcm56990_b0_ltd_variant_entry.h Normal file
View File

@ -0,0 +1,40 @@
/*******************************************************************************
*
* DO NOT EDIT THIS FILE!
* This file is auto-generated by fltg from Logical Table mapping files.
*
* Tool: $SDK/tools/fltg/bin/fltg
*
* Edits to this file will be lost when it is regenerated.
*
* $Copyright: Copyright 2018-2022 Broadcom. All rights reserved.
* The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License
* version 2 as published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* A copy of the GNU General Public License version 2 (GPLv2) can
* be found in the LICENSES folder.$
*
******************************************************************************/
#ifndef GEN_BCM56990_B0_LTD_VARIANT_ENTRY_H
#define GEN_BCM56990_B0_LTD_VARIANT_ENTRY_H
#include <bcmltd/defs/generated/bcm56990_b0/bcm56990_b0_ltd_variant_def.h>
#endif /* GEN_BCM56990_B0_LTD_VARIANT_ENTRY_H */
#ifndef DOXYGEN_IGNORE_AUTOGEN
#if BCMLTD_CONFIG_INCLUDE_BCM56990_B0_BASE == 1 || defined(BCMLTD_VARIANT_OVERRIDE)
BCMLTD_VARIANT_ENTRY(bcm56990_b0,BCM56990_B0,,BASE,,BCMLTD_VARIANT_BCM56990_B0_BASE,BCMLTD_VARIANT_LOCAL_BCM56990_B0_BASE,NULL,0,0)
#endif
#endif /* DOXYGEN_IGNORE_AUTOGEN */

40
platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56996_a0/bcm56996_a0_ltd_variant_entry.h Normal file
View File

@ -0,0 +1,40 @@
/*******************************************************************************
*
* DO NOT EDIT THIS FILE!
* This file is auto-generated by fltg from Logical Table mapping files.
*
* Tool: $SDK/tools/fltg/bin/fltg
*
* Edits to this file will be lost when it is regenerated.
*
* $Copyright: Copyright 2018-2022 Broadcom. All rights reserved.
* The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License
* version 2 as published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* A copy of the GNU General Public License version 2 (GPLv2) can
* be found in the LICENSES folder.$
*
******************************************************************************/
#ifndef GEN_BCM56996_A0_LTD_VARIANT_ENTRY_H
#define GEN_BCM56996_A0_LTD_VARIANT_ENTRY_H
#include <bcmltd/defs/generated/bcm56996_a0/bcm56996_a0_ltd_variant_def.h>
#endif /* GEN_BCM56996_A0_LTD_VARIANT_ENTRY_H */
#ifndef DOXYGEN_IGNORE_AUTOGEN
#if BCMLTD_CONFIG_INCLUDE_BCM56996_A0_BASE == 1 || defined(BCMLTD_VARIANT_OVERRIDE)
BCMLTD_VARIANT_ENTRY(bcm56996_a0,BCM56996_A0,,BASE,,BCMLTD_VARIANT_BCM56996_A0_BASE,BCMLTD_VARIANT_LOCAL_BCM56996_A0_BASE,NULL,0,0)
#endif
#endif /* DOXYGEN_IGNORE_AUTOGEN */

40
platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56996_b0/bcm56996_b0_ltd_variant_entry.h Normal file
View File

@ -0,0 +1,40 @@
/*******************************************************************************
*
* DO NOT EDIT THIS FILE!
* This file is auto-generated by fltg from Logical Table mapping files.
*
* Tool: $SDK/tools/fltg/bin/fltg
*
* Edits to this file will be lost when it is regenerated.
*
* $Copyright: Copyright 2018-2022 Broadcom. All rights reserved.
* The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License
* version 2 as published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* A copy of the GNU General Public License version 2 (GPLv2) can
* be found in the LICENSES folder.$
*
******************************************************************************/
#ifndef GEN_BCM56996_B0_LTD_VARIANT_ENTRY_H
#define GEN_BCM56996_B0_LTD_VARIANT_ENTRY_H
#include <bcmltd/defs/generated/bcm56996_b0/bcm56996_b0_ltd_variant_def.h>
#endif /* GEN_BCM56996_B0_LTD_VARIANT_ENTRY_H */
#ifndef DOXYGEN_IGNORE_AUTOGEN
#if BCMLTD_CONFIG_INCLUDE_BCM56996_B0_BASE == 1 || defined(BCMLTD_VARIANT_OVERRIDE)
BCMLTD_VARIANT_ENTRY(bcm56996_b0,BCM56996_B0,,BASE,,BCMLTD_VARIANT_BCM56996_B0_BASE,BCMLTD_VARIANT_LOCAL_BCM56996_B0_BASE,NULL,0,0)
#endif
#endif /* DOXYGEN_IGNORE_AUTOGEN */

40
platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56998_a0/bcm56998_a0_ltd_variant_entry.h Normal file
View File

@ -0,0 +1,40 @@
/*******************************************************************************
*
* DO NOT EDIT THIS FILE!
* This file is auto-generated by fltg from Logical Table mapping files.
*
* Tool: $SDK/tools/fltg/bin/fltg
*
* Edits to this file will be lost when it is regenerated.
*
* $Copyright: Copyright 2018-2022 Broadcom. All rights reserved.
* The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License
* version 2 as published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* A copy of the GNU General Public License version 2 (GPLv2) can
* be found in the LICENSES folder.$
*
******************************************************************************/
#ifndef GEN_BCM56998_A0_LTD_VARIANT_ENTRY_H
#define GEN_BCM56998_A0_LTD_VARIANT_ENTRY_H
#include <bcmltd/defs/generated/bcm56998_a0/bcm56998_a0_ltd_variant_def.h>
#endif /* GEN_BCM56998_A0_LTD_VARIANT_ENTRY_H */
#ifndef DOXYGEN_IGNORE_AUTOGEN
#if BCMLTD_CONFIG_INCLUDE_BCM56998_A0_BASE == 1 || defined(BCMLTD_VARIANT_OVERRIDE)
BCMLTD_VARIANT_ENTRY(bcm56998_a0,BCM56998_A0,,BASE,,BCMLTD_VARIANT_BCM56998_A0_BASE,BCMLTD_VARIANT_LOCAL_BCM56998_A0_BASE,NULL,0,0)
#endif
#endif /* DOXYGEN_IGNORE_AUTOGEN */

40
platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56999_a0/bcm56999_a0_ltd_variant_entry.h Normal file
View File

@ -0,0 +1,40 @@
/*******************************************************************************
*
* DO NOT EDIT THIS FILE!
* This file is auto-generated by fltg from Logical Table mapping files.
*
* Tool: $SDK/tools/fltg/bin/fltg
*
* Edits to this file will be lost when it is regenerated.
*
* $Copyright: Copyright 2018-2022 Broadcom. All rights reserved.
* The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License
* version 2 as published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* A copy of the GNU General Public License version 2 (GPLv2) can
* be found in the LICENSES folder.$
*
******************************************************************************/
#ifndef GEN_BCM56999_A0_LTD_VARIANT_ENTRY_H
#define GEN_BCM56999_A0_LTD_VARIANT_ENTRY_H
#include <bcmltd/defs/generated/bcm56999_a0/bcm56999_a0_ltd_variant_def.h>
#endif /* GEN_BCM56999_A0_LTD_VARIANT_ENTRY_H */
#ifndef DOXYGEN_IGNORE_AUTOGEN
#if BCMLTD_CONFIG_INCLUDE_BCM56999_A0_BASE == 1 || defined(BCMLTD_VARIANT_OVERRIDE)
BCMLTD_VARIANT_ENTRY(bcm56999_a0,BCM56999_A0,,BASE,,BCMLTD_VARIANT_BCM56999_A0_BASE,BCMLTD_VARIANT_LOCAL_BCM56999_A0_BASE,NULL,0,0)
#endif
#endif /* DOXYGEN_IGNORE_AUTOGEN */

40
platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm78900_b0/bcm78900_b0_ltd_variant_entry.h Normal file
View File

@ -0,0 +1,40 @@
/*******************************************************************************
*
* DO NOT EDIT THIS FILE!
* This file is auto-generated by fltg from Logical Table mapping files.
*
* Tool: $SDK/tools/fltg/bin/fltg
*
* Edits to this file will be lost when it is regenerated.
*
* $Copyright: Copyright 2018-2022 Broadcom. All rights reserved.
* The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License
* version 2 as published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* A copy of the GNU General Public License version 2 (GPLv2) can
* be found in the LICENSES folder.$
*
******************************************************************************/
#ifndef GEN_BCM78900_B0_LTD_VARIANT_ENTRY_H
#define GEN_BCM78900_B0_LTD_VARIANT_ENTRY_H
#include <bcmltd/defs/generated/bcm78900_b0/bcm78900_b0_ltd_variant_def.h>
#endif /* GEN_BCM78900_B0_LTD_VARIANT_ENTRY_H */
#ifndef DOXYGEN_IGNORE_AUTOGEN
#if BCMLTD_CONFIG_INCLUDE_BCM78900_B0_BASE == 1 || defined(BCMLTD_VARIANT_OVERRIDE)
BCMLTD_VARIANT_ENTRY(bcm78900_b0,BCM78900_B0,,BASE,,BCMLTD_VARIANT_BCM78900_B0_BASE,BCMLTD_VARIANT_LOCAL_BCM78900_B0_BASE,NULL,0,0)
#endif
#endif /* DOXYGEN_IGNORE_AUTOGEN */

8
platform/broadcom/saibcm-modules/sdklt/linux/bde/Kbuild
View File

@ -2,7 +2,11 @@
#
# Linux kernel BDE module.
#
# $Copyright: Copyright 2018-2021 Broadcom. All rights reserved.
# The NGBDE_CFLAGS variable is intended for configuring non-default
# builds of the NGBDE kernel module, for example, using a different
# default DMA pool size or turning off MSI interrupts.
#
# $Copyright: Copyright 2018-2022 Broadcom. All rights reserved.
# The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
#
# This program is free software; you can redistribute it and/or
@ -20,7 +24,7 @@
obj-m := linux_ngbde.o
ccflags-y := $(LKM_CFLAGS) \
ccflags-y := $(LKM_CFLAGS) $(NGBDE_CFLAGS) \
-I$(SDK)/linux/include \
-I$(SDK)/linux/bde \
-I$(SDK)/bcmdrd/include

9
platform/broadcom/saibcm-modules/sdklt/linux/bde/Makefile
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@ -1,8 +1,5 @@
# -*- Makefile -*-
#
# Linux kernel BDE module.
#
# $Copyright: Copyright 2018-2021 Broadcom. All rights reserved.
# $Copyright: Copyright 2018-2022 Broadcom. All rights reserved.
# The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
#
# This program is free software; you can redistribute it and/or
@ -17,6 +14,8 @@
# A copy of the GNU General Public License version 2 (GPLv2) can
# be found in the LICENSES folder.$
#
# Linux kernel BDE module.
#
include Kbuild
@ -30,4 +29,4 @@ endif
.PHONY: distclean
distclean:
distclean::

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