From 484402ff081933b371bddb40321fbe2709a017cd Mon Sep 17 00:00:00 2001 From: Vivek Date: Sun, 4 Sep 2022 01:05:22 -0700 Subject: [PATCH] [202012] [Mellanox] [SKU] Mellanox-SN4700-C128 SKU added (11574) (#11878) - Why I did it New SKU for MSN-4700 Platform i.e. Mellanox-SN4700-C128 Requirements: * Breakout: Port 1-32: 4x100G * Downlinks: 120 (1-30) * Uplinks: 8 (31-32) * Shared Headroom: Enabled * Over Subscribe Ratio: 1:8 * Default Topology: T2 * Default Cable Length for T2: 1500m * QoS params: The default ones defined in qos_config.j2 will be applied * Small Packet Percentage: Used 50% for traditional buffer model Note: For dynamic model, the value defined in LOSSLESS_TRAFFIC_PATTERN|AZURE|small_packet_percentage is used Additional Details: Switch Type has to be programmed as SpineRouter through config_db.json in DEVICE_METADATA|localhost|type field for the buffer values & cable lengths defined in the buffers_defaults_t2.j2 to apply on the device Cable Lengths Used for generating buffer_defaults_{t0,t1,t2}.j2 values Signed-off-by: Vivek Reddy --- .../Mellanox-SN4700-C128/buffers.json.j2 | 15 + .../buffers_defaults_objects.j2 | 1 + .../buffers_defaults_t0.j2 | 39 +++ .../buffers_defaults_t1.j2 | 39 +++ .../buffers_defaults_t2.j2 | 44 +++ .../buffers_dynamic.json.j2 | 16 + .../pg_profile_lookup.ini | 41 +++ .../Mellanox-SN4700-C128/port_config.ini | 129 ++++++++ .../Mellanox-SN4700-C128/qos.json.j2 | 1 + .../Mellanox-SN4700-C128/sai.profile | 3 + .../sai_4700_128x100g.xml | 277 ++++++++++++++++++ 11 files changed, 605 insertions(+) create mode 100644 device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-C128/buffers.json.j2 create mode 120000 device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-C128/buffers_defaults_objects.j2 create mode 100644 device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-C128/buffers_defaults_t0.j2 create mode 100644 device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-C128/buffers_defaults_t1.j2 create mode 100644 device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-C128/buffers_defaults_t2.j2 create mode 100644 device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-C128/buffers_dynamic.json.j2 create mode 100644 device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-C128/pg_profile_lookup.ini create mode 100644 device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-C128/port_config.ini create mode 120000 device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-C128/qos.json.j2 create mode 100644 device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-C128/sai.profile create mode 100644 device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-C128/sai_4700_128x100g.xml diff --git a/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-C128/buffers.json.j2 b/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-C128/buffers.json.j2 new file mode 100644 index 0000000000..2905747f5b --- /dev/null +++ b/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-C128/buffers.json.j2 @@ -0,0 +1,15 @@ +{# + Copyright (c) 2022 NVIDIA CORPORATION & AFFILIATES. + Apache-2.0 + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + http://www.apache.org/licenses/LICENSE-2.0 + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +#} +{%- set default_topo = 't2' %} +{%- include 'buffers_config.j2' %} diff --git a/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-C128/buffers_defaults_objects.j2 b/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-C128/buffers_defaults_objects.j2 new file mode 120000 index 0000000000..c01aebb7ae --- /dev/null +++ b/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-C128/buffers_defaults_objects.j2 @@ -0,0 +1 @@ +../../x86_64-mlnx_msn2700-r0/Mellanox-SN2700-D48C8/buffers_defaults_objects.j2 \ No newline at end of file diff --git a/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-C128/buffers_defaults_t0.j2 b/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-C128/buffers_defaults_t0.j2 new file mode 100644 index 0000000000..f22c56702a --- /dev/null +++ b/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-C128/buffers_defaults_t0.j2 @@ -0,0 +1,39 @@ +{# + Copyright (c) 2022 NVIDIA CORPORATION & AFFILIATES. + Apache-2.0 + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +#} +{% set default_cable = '5m' %} +{% set ingress_lossless_pool_size = '44910592' %} +{% set ingress_lossless_pool_xoff = '1751040' %} +{% set egress_lossless_pool_size = '60817392' %} +{% set egress_lossy_pool_size = '44910592' %} + +{% import 'buffers_defaults_objects.j2' as defs with context %} + +{%- macro generate_buffer_pool_and_profiles_with_inactive_ports(port_names_inactive) %} +{{ defs.generate_buffer_pool_and_profiles_with_inactive_ports(port_names_inactive) }} +{%- endmacro %} + +{%- macro generate_profile_lists_with_inactive_ports(port_names_active, port_names_inactive) %} +{{ defs.generate_profile_lists(port_names_active, port_names_inactive) }} +{%- endmacro %} + +{%- macro generate_queue_buffers_with_inactive_ports(port_names_active, port_names_inactive) %} +{{ defs.generate_queue_buffers(port_names_active, port_names_inactive) }} +{%- endmacro %} + +{%- macro generate_pg_profiles_with_inactive_ports(port_names_active, port_names_inactive) %} +{{ defs.generate_pg_profiles(port_names_active, port_names_inactive) }} +{%- endmacro %} diff --git a/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-C128/buffers_defaults_t1.j2 b/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-C128/buffers_defaults_t1.j2 new file mode 100644 index 0000000000..b870502805 --- /dev/null +++ b/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-C128/buffers_defaults_t1.j2 @@ -0,0 +1,39 @@ +{# + Copyright (c) 2022 NVIDIA CORPORATION & AFFILIATES. + Apache-2.0 + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +#} +{% set default_cable = '5m' %} +{% set ingress_lossless_pool_size = '44587008' %} +{% set ingress_lossless_pool_xoff = '2074624' %} +{% set egress_lossless_pool_size = '60817392' %} +{% set egress_lossy_pool_size = '44587008' %} + +{% import 'buffers_defaults_objects.j2' as defs with context %} + +{%- macro generate_buffer_pool_and_profiles_with_inactive_ports(port_names_inactive) %} +{{ defs.generate_buffer_pool_and_profiles_with_inactive_ports(port_names_inactive) }} +{%- endmacro %} + +{%- macro generate_profile_lists_with_inactive_ports(port_names_active, port_names_inactive) %} +{{ defs.generate_profile_lists(port_names_active, port_names_inactive) }} +{%- endmacro %} + +{%- macro generate_queue_buffers_with_inactive_ports(port_names_active, port_names_inactive) %} +{{ defs.generate_queue_buffers(port_names_active, port_names_inactive) }} +{%- endmacro %} + +{%- macro generate_pg_profiles_with_inactive_ports(port_names_active, port_names_inactive) %} +{{ defs.generate_pg_profiles(port_names_active, port_names_inactive) }} +{%- endmacro %} diff --git a/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-C128/buffers_defaults_t2.j2 b/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-C128/buffers_defaults_t2.j2 new file mode 100644 index 0000000000..b0df4defd4 --- /dev/null +++ b/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-C128/buffers_defaults_t2.j2 @@ -0,0 +1,44 @@ +{# + Copyright (c) 2022 NVIDIA CORPORATION & AFFILIATES. + Apache-2.0 + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +#} +{% set default_cable = '1500m' %} +{%-set ports2cable = { + 'spinerouter_leafrouter' : '1500m', + 'spinerouter_spinerouter' : '1500m' + } +-%} +{% set ingress_lossless_pool_size = '35094528' %} +{% set ingress_lossless_pool_xoff = '11567104' %} +{% set egress_lossless_pool_size = '60817392' %} +{% set egress_lossy_pool_size = '35094528' %} + +{% import 'buffers_defaults_objects.j2' as defs with context %} + +{%- macro generate_buffer_pool_and_profiles_with_inactive_ports(port_names_inactive) %} +{{ defs.generate_buffer_pool_and_profiles_with_inactive_ports(port_names_inactive) }} +{%- endmacro %} + +{%- macro generate_profile_lists_with_inactive_ports(port_names_active, port_names_inactive) %} +{{ defs.generate_profile_lists(port_names_active, port_names_inactive) }} +{%- endmacro %} + +{%- macro generate_queue_buffers_with_inactive_ports(port_names_active, port_names_inactive) %} +{{ defs.generate_queue_buffers(port_names_active, port_names_inactive) }} +{%- endmacro %} + +{%- macro generate_pg_profiles_with_inactive_ports(port_names_active, port_names_inactive) %} +{{ defs.generate_pg_profiles(port_names_active, port_names_inactive) }} +{%- endmacro %} diff --git a/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-C128/buffers_dynamic.json.j2 b/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-C128/buffers_dynamic.json.j2 new file mode 100644 index 0000000000..4ec20f1d9e --- /dev/null +++ b/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-C128/buffers_dynamic.json.j2 @@ -0,0 +1,16 @@ +{# + Copyright (c) 2022 NVIDIA CORPORATION & AFFILIATES. + Apache-2.0 + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + http://www.apache.org/licenses/LICENSE-2.0 + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +#} +{%- set default_topo = 't2' %} +{%- set dynamic_mode = 'true' %} +{%- include 'buffers_config.j2' %} diff --git a/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-C128/pg_profile_lookup.ini b/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-C128/pg_profile_lookup.ini new file mode 100644 index 0000000000..7b78fb98ae --- /dev/null +++ b/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-C128/pg_profile_lookup.ini @@ -0,0 +1,41 @@ +## +## Copyright (c) 2022 NVIDIA CORPORATION & AFFILIATES. +## Apache-2.0 +## +## Licensed under the Apache License, Version 2.0 (the "License"); +## you may not use this file except in compliance with the License. +## You may obtain a copy of the License at +## +## http://www.apache.org/licenses/LICENSE-2.0 +## +## Unless required by applicable law or agreed to in writing, software +## distributed under the License is distributed on an "AS IS" BASIS, +## WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +## See the License for the specific language governing permissions and +## limitations under the License. +## +# PG lossless profiles. +# speed cable size xon xoff threshold + 10000 5m 19456 19456 24576 0 + 25000 5m 19456 19456 26624 0 + 40000 5m 19456 19456 30720 0 + 50000 5m 19456 19456 33792 0 + 100000 5m 19456 19456 59392 0 + 200000 5m 19456 19456 66560 0 + 10000 40m 19456 19456 25600 0 + 25000 40m 19456 19456 28672 0 + 40000 40m 19456 19456 33792 0 + 50000 40m 19456 19456 36864 0 + 100000 40m 19456 19456 66560 0 + 200000 40m 19456 19456 80896 0 + 10000 300m 19456 19456 30720 0 + 25000 300m 19456 19456 41984 0 + 40000 300m 19456 19456 54272 0 + 50000 300m 19456 19456 63488 0 + 100000 300m 19456 19456 120832 0 + 200000 300m 19456 19456 188416 0 + 10000 1500m 19456 19456 55296 0 + 25000 1500m 19456 19456 103424 0 + 40000 1500m 19456 19456 153600 0 + 50000 1500m 19456 19456 187392 0 + 100000 1500m 19456 19456 366592 0 diff --git a/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-C128/port_config.ini b/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-C128/port_config.ini new file mode 100644 index 0000000000..d64b66b0b6 --- /dev/null +++ b/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-C128/port_config.ini @@ -0,0 +1,129 @@ +# name lanes alias index speed +Ethernet0 0,1 etp1a 1 100000 +Ethernet2 2,3 etp1b 1 100000 +Ethernet4 4,5 etp1c 1 100000 +Ethernet6 6,7 etp1d 1 100000 +Ethernet8 8,9 etp2a 2 100000 +Ethernet10 10,11 etp2b 2 100000 +Ethernet12 12,13 etp2c 2 100000 +Ethernet14 14,15 etp2d 2 100000 +Ethernet16 16,17 etp3a 3 100000 +Ethernet18 18,19 etp3b 3 100000 +Ethernet20 20,21 etp3c 3 100000 +Ethernet22 22,23 etp3d 3 100000 +Ethernet24 24,25 etp4a 4 100000 +Ethernet26 26,27 etp4b 4 100000 +Ethernet28 28,29 etp4c 4 100000 +Ethernet30 30,31 etp4d 4 100000 +Ethernet32 32,33 etp5a 5 100000 +Ethernet34 34,35 etp5b 5 100000 +Ethernet36 36,37 etp5c 5 100000 +Ethernet38 38,39 etp5d 5 100000 +Ethernet40 40,41 etp6a 6 100000 +Ethernet42 42,43 etp6b 6 100000 +Ethernet44 44,45 etp6c 6 100000 +Ethernet46 46,47 etp6d 6 100000 +Ethernet48 48,49 etp7a 7 100000 +Ethernet50 50,51 etp7b 7 100000 +Ethernet52 52,53 etp7c 7 100000 +Ethernet54 54,55 etp7d 7 100000 +Ethernet56 56,57 etp8a 8 100000 +Ethernet58 58,59 etp8b 8 100000 +Ethernet60 60,61 etp8c 8 100000 +Ethernet62 62,63 etp8d 8 100000 +Ethernet64 64,65 etp9a 9 100000 +Ethernet66 66,67 etp9b 9 100000 +Ethernet68 68,69 etp9c 9 100000 +Ethernet70 70,71 etp9d 9 100000 +Ethernet72 72,73 etp10a 10 100000 +Ethernet74 74,75 etp10b 10 100000 +Ethernet76 76,77 etp10c 10 100000 +Ethernet78 78,79 etp10d 10 100000 +Ethernet80 80,81 etp11a 11 100000 +Ethernet82 82,83 etp11b 11 100000 +Ethernet84 84,85 etp11c 11 100000 +Ethernet86 86,87 etp11d 11 100000 +Ethernet88 88,89 etp12a 12 100000 +Ethernet90 90,91 etp12b 12 100000 +Ethernet92 92,93 etp12c 12 100000 +Ethernet94 94,95 etp12d 12 100000 +Ethernet96 96,97 etp13a 13 100000 +Ethernet98 98,99 etp13b 13 100000 +Ethernet100 100,101 etp13c 13 100000 +Ethernet102 102,103 etp13d 13 100000 +Ethernet104 104,105 etp14a 14 100000 +Ethernet106 106,107 etp14b 14 100000 +Ethernet108 108,109 etp14c 14 100000 +Ethernet110 110,111 etp14d 14 100000 +Ethernet112 112,113 etp15a 15 100000 +Ethernet114 114,115 etp15b 15 100000 +Ethernet116 116,117 etp15c 15 100000 +Ethernet118 118,119 etp15d 15 100000 +Ethernet120 120,121 etp16a 16 100000 +Ethernet122 122,123 etp16b 16 100000 +Ethernet124 124,125 etp16c 16 100000 +Ethernet126 126,127 etp16d 16 100000 +Ethernet128 128,129 etp17a 17 100000 +Ethernet130 130,131 etp17b 17 100000 +Ethernet132 132,133 etp17c 17 100000 +Ethernet134 134,135 etp17d 17 100000 +Ethernet136 136,137 etp18a 18 100000 +Ethernet138 138,139 etp18b 18 100000 +Ethernet140 140,141 etp18c 18 100000 +Ethernet142 142,143 etp18d 18 100000 +Ethernet144 144,145 etp19a 19 100000 +Ethernet146 146,147 etp19b 19 100000 +Ethernet148 148,149 etp19c 19 100000 +Ethernet150 150,151 etp19d 19 100000 +Ethernet152 152,153 etp20a 20 100000 +Ethernet154 154,155 etp20b 20 100000 +Ethernet156 156,157 etp20c 20 100000 +Ethernet158 158,159 etp20d 20 100000 +Ethernet160 160,161 etp21a 21 100000 +Ethernet162 162,163 etp21b 21 100000 +Ethernet164 164,165 etp21c 21 100000 +Ethernet166 166,167 etp21d 21 100000 +Ethernet168 168,169 etp22a 22 100000 +Ethernet170 170,171 etp22b 22 100000 +Ethernet172 172,173 etp22c 22 100000 +Ethernet174 174,175 etp22d 22 100000 +Ethernet176 176,177 etp23a 23 100000 +Ethernet178 178,179 etp23b 23 100000 +Ethernet180 180,181 etp23c 23 100000 +Ethernet182 182,183 etp23d 23 100000 +Ethernet184 184,185 etp24a 24 100000 +Ethernet186 186,187 etp24b 24 100000 +Ethernet188 188,189 etp24c 24 100000 +Ethernet190 190,191 etp24d 24 100000 +Ethernet192 192,193 etp25a 25 100000 +Ethernet194 194,195 etp25b 25 100000 +Ethernet196 196,197 etp25c 25 100000 +Ethernet198 198,199 etp25d 25 100000 +Ethernet200 200,201 etp26a 26 100000 +Ethernet202 202,203 etp26b 26 100000 +Ethernet204 204,205 etp26c 26 100000 +Ethernet206 206,207 etp26d 26 100000 +Ethernet208 208,209 etp27a 27 100000 +Ethernet210 210,211 etp27b 27 100000 +Ethernet212 212,213 etp27c 27 100000 +Ethernet214 214,215 etp27d 27 100000 +Ethernet216 216,217 etp28a 28 100000 +Ethernet218 218,219 etp28b 28 100000 +Ethernet220 220,221 etp28c 28 100000 +Ethernet222 222,223 etp28d 28 100000 +Ethernet224 224,225 etp29a 29 100000 +Ethernet226 226,227 etp29b 29 100000 +Ethernet228 228,229 etp29c 29 100000 +Ethernet230 230,231 etp29d 29 100000 +Ethernet232 232,233 etp30a 30 100000 +Ethernet234 234,235 etp30b 30 100000 +Ethernet236 236,237 etp30c 30 100000 +Ethernet238 238,239 etp30d 30 100000 +Ethernet240 240,241 etp31a 31 100000 +Ethernet242 242,243 etp31b 31 100000 +Ethernet244 244,245 etp31c 31 100000 +Ethernet246 246,247 etp31d 31 100000 +Ethernet248 248,249 etp32a 32 100000 +Ethernet250 250,251 etp32b 32 100000 +Ethernet252 252,253 etp32c 32 100000 +Ethernet254 254,255 etp32d 32 100000 diff --git a/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-C128/qos.json.j2 b/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-C128/qos.json.j2 new file mode 120000 index 0000000000..eccf286dc8 --- /dev/null +++ b/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-C128/qos.json.j2 @@ -0,0 +1 @@ +../../x86_64-mlnx_msn2700-r0/ACS-MSN2700/qos.json.j2 \ No newline at end of file diff --git a/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-C128/sai.profile b/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-C128/sai.profile new file mode 100644 index 0000000000..d20b5e46b8 --- /dev/null +++ b/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-C128/sai.profile @@ -0,0 +1,3 @@ +SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/sai_4700_128x100g.xml +SAI_DUMP_STORE_PATH=/var/log/mellanox/sdk-dumps +SAI_DUMP_STORE_AMOUNT=10 diff --git a/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-C128/sai_4700_128x100g.xml b/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-C128/sai_4700_128x100g.xml new file mode 100644 index 0000000000..f5d49f8b86 --- /dev/null +++ b/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-C128/sai_4700_128x100g.xml @@ -0,0 +1,277 @@ + + + + + 00:02:03:04:05:00 + + + 1 + + + 32 + + + + + 1 + 8 + 17 + 3 + 1536 + 4 + + + 5 + 8 + 16 + 3 + 1536 + 4 + + + 9 + 8 + 19 + 3 + 1536 + 4 + + + 13 + 8 + 18 + 3 + 1536 + 4 + + + 17 + 8 + 21 + 3 + 1536 + 4 + + + 21 + 8 + 20 + 3 + 1536 + 4 + + + 25 + 8 + 23 + 3 + 1536 + 4 + + + 29 + 8 + 22 + 3 + 1536 + 4 + + + 33 + 8 + 29 + 3 + 1536 + 4 + + + 37 + 8 + 28 + 3 + 1536 + 4 + + + 41 + 8 + 31 + 3 + 1536 + 4 + + + 45 + 8 + 30 + 3 + 1536 + 4 + + + 49 + 8 + 25 + 3 + 1536 + 4 + + + 53 + 8 + 24 + 3 + 1536 + 4 + + + 57 + 8 + 27 + 3 + 1536 + 4 + + + 61 + 8 + 26 + 3 + 1536 + 4 + + + 65 + 8 + 14 + 3 + 1536 + 4 + + + 69 + 8 + 15 + 3 + 1536 + 4 + + + 73 + 8 + 12 + 3 + 1536 + 4 + + + 77 + 8 + 13 + 3 + 1536 + 4 + + + 81 + 8 + 10 + 3 + 1536 + 4 + + + 85 + 8 + 11 + 3 + 1536 + 4 + + + 89 + 8 + 8 + 3 + 1536 + 4 + + + 93 + 8 + 9 + 3 + 1536 + 4 + + + 97 + 8 + 2 + 3 + 1536 + 4 + + + 101 + 8 + 3 + 3 + 1536 + 4 + + + 105 + 8 + 0 + + + 3 + + + 1536 + 4 + + + 109 + 8 + 1 + 3 + 1536 + 4 + + + 113 + 8 + 6 + 3 + 1536 + 4 + + + 117 + 8 + 7 + 3 + 1536 + 4 + + + 121 + 8 + 4 + 3 + 1536 + 4 + + + 125 + 8 + 5 + 3 + 1536 + 4 + + + +