diff --git a/device/supermicro/x86_64-supermicro_sse_t7132s-r0/CSV/TL7_DAC_1M.csv b/device/supermicro/x86_64-supermicro_sse_t7132s-r0/CSV/TL7_DAC_1M.csv new file mode 100755 index 0000000000..00afc9d8ef --- /dev/null +++ b/device/supermicro/x86_64-supermicro_sse_t7132s-r0/CSV/TL7_DAC_1M.csv @@ -0,0 +1,263 @@ +VERSION,CABLE TYPE,VENDOR,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,, +1.2,DAC_1M,GENERIC,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,, +,,,SPEED,ENCODING,,,,,,,,,SPEED,ENCODING,,,,,,,,,,,,,SPEED,ENCODING,,,,,,,SPEED,ENCODING,,,,,,,SPEED,ENCODING,,,,,,,,,, +,,,50G/400G,PAM4,,,,,,,,,25G/100G,NRZ,,,,,,,,,,,,,10G/40G,NRZ,,,,,,,LT 50G/400G ,PAM4,,,,,,,ANLT 25G/100G ,NRZ,,,,,,,,,, +index,Front Port,lane,TX_EQ_ATTN,TX_EQ_PRE1,TX_EQ_PRE2,TX_EQ_PRE3,TX_EQ_POST,RX_EQ_COARSE_TUNE_EFFORT_50G,RX_EQ_FINE_TUNE_EFFORT_50G,RX_GAINSHAPE1,RX_GAINSHAPE2,LINK_TRAINING,TX_EQ_ATTN,TX_EQ_PRE1,TX_EQ_PRE2,TX_EQ_PRE3,TX_EQ_POST,RX_GAINSHAPE1,RX_GAINSHAPE2,RX_AGC_TARGET,RX_EYE_DISQUALIFY_THRESHOLD_25G,RX_EQ_COARSE_TUNE_EFFORT_25G,RX_EQ_FINE_TUNE_EFFORT_25G,SD_RESET_THRESHOLD,SD_RESET_25G,LINK_TRAINING,TX_EQ_ATTN,TX_EQ_PRE1,TX_EQ_PRE2,TX_EQ_PRE3,TX_EQ_POST,RX_GAINSHAPE1,RX_GAINSHAPE2,LINK_TRAINING,RX_GAINSHAPE1,RX_GAINSHAPE2,RX_EQ_COARSE_TUNE_EFFORT_50G,RX_EQ_FINE_TUNE_EFFORT_50G,RX_CTLE_LF,RX_CTLE_HF,RX_CTLE_BW,LINK_TRAINING,RX_GAINSHAPE1,RX_GAINSHAPE2,RX_AGC_TARGET,RX_EYE_DISQUALIFY_THRESHOLD_25G,RX_EQ_COARSE_TUNE_EFFORT_25G,RX_EQ_FINE_TUNE_EFFORT_25G,SD_RESET_25G,SD_RESET_THRESHOLD_25G,LINK_TRAINING,AN,AN_ABILITY,FEC +0,0,0,0,6,0,0,6,Medium,HIGH,0,2,0,0,0,0,0,0,0,1,130,100,Low,Low,5,TRUE,0,3,2,-2,0,4,0,1,0,0,2,Medium,High,0,10,10,1,0,1,130,100,Low,Low,0,NA,1,1,100GBASE-KR4,NONE +1,0,1,0,8,0,0,8,Medium,HIGH,0,2,0,0,0,0,0,0,0,1,130,100,Low,Low,5,TRUE,0,3,2,-2,0,4,0,1,0,0,2,Medium,High,0,10,10,1,0,1,130,100,Low,Low,0,NA,1,1,100GBASE-KR4,NONE +2,0,2,0,6,0,0,6,Medium,HIGH,0,2,0,0,0,0,0,0,0,1,130,100,Low,Low,5,TRUE,0,3,2,-2,0,4,0,1,0,0,2,Medium,High,0,10,10,1,0,1,130,100,Low,Low,0,NA,1,1,100GBASE-KR4,NONE +3,0,3,0,8,0,0,8,Medium,HIGH,0,2,0,0,0,0,0,0,0,1,130,100,Low,Low,5,TRUE,0,3,2,-2,0,4,0,1,0,0,2,Medium,High,0,10,10,1,0,1,130,100,Low,Low,0,NA,1,1,100GBASE-KR4,NONE +4,0,4,0,8,0,0,8,Medium,HIGH,0,2,0,0,0,0,0,0,0,1,130,100,Low,Low,5,TRUE,0,3,2,-2,0,4,0,1,0,0,2,Medium,High,0,10,10,1,0,1,130,100,Low,Low,0,NA,1,1,100GBASE-KR4,NONE +5,0,5,0,8,0,0,8,Medium,HIGH,0,2,0,0,0,0,0,0,0,1,130,100,Low,Low,5,TRUE,0,3,2,-2,0,4,0,1,0,0,2,Medium,High,0,10,10,1,0,1,130,100,Low,Low,0,NA,1,1,100GBASE-KR4,NONE +6,0,6,0,8,0,0,8,Medium,HIGH,0,2,0,0,0,0,0,0,0,1,130,100,Low,Low,5,TRUE,0,3,2,-2,0,4,0,1,0,0,2,Medium,High,0,10,10,1,0,1,130,100,Low,Low,0,NA,1,1,100GBASE-KR4,NONE +7,0,7,0,8,0,0,8,Medium,HIGH,0,2,0,0,0,0,0,0,0,1,130,100,Low,Low,5,TRUE,0,3,2,-2,0,4,0,1,0,0,2,Medium,High,0,10,10,1,0,1,130,100,Low,Low,0,NA,1,1,100GBASE-KR4,NONE +8,1,0,0,8,0,0,8,Medium,HIGH,0,2,0,0,0,0,0,0,0,1,130,100,Low,Low,5,TRUE,0,3,2,-2,0,4,0,1,0,0,2,Medium,High,0,10,10,1,0,1,130,100,Low,Low,0,NA,1,1,100GBASE-KR4,NONE +9,1,1,0,8,0,0,8,Medium,HIGH,0,2,0,0,0,0,0,0,0,1,130,100,Low,Low,5,TRUE,0,3,2,-2,0,4,0,1,0,0,2,Medium,High,0,10,10,1,0,1,130,100,Low,Low,0,NA,1,1,100GBASE-KR4,NONE +10,1,2,0,8,0,0,8,Medium,HIGH,0,2,0,0,0,0,0,0,0,1,130,100,Low,Low,5,TRUE,0,3,2,-2,0,4,0,1,0,0,2,Medium,High,0,10,10,1,0,1,130,100,Low,Low,0,NA,1,1,100GBASE-KR4,NONE +11,1,3,0,8,0,0,8,Medium,HIGH,0,2,0,0,0,0,0,0,0,1,130,100,Low,Low,5,TRUE,0,3,2,-2,0,4,0,1,0,0,2,Medium,High,0,10,10,1,0,1,130,100,Low,Low,0,NA,1,1,100GBASE-KR4,NONE +12,1,4,0,8,0,0,8,Medium,HIGH,0,2,0,0,0,0,0,0,0,1,130,100,Low,Low,5,TRUE,0,3,2,-2,0,4,0,1,0,0,2,Medium,High,0,10,10,1,0,1,130,100,Low,Low,0,NA,1,1,100GBASE-KR4,NONE +13,1,5,0,8,0,0,8,Medium,HIGH,0,2,0,0,0,0,0,0,0,1,130,100,Low,Low,5,TRUE,0,3,2,-2,0,4,0,1,0,0,2,Medium,High,0,10,10,1,0,1,130,100,Low,Low,0,NA,1,1,100GBASE-KR4,NONE +14,1,6,0,6,0,0,6,Medium,HIGH,0,2,0,0,0,0,0,0,0,1,130,100,Low,Low,5,TRUE,0,3,2,-2,0,4,0,1,0,0,2,Medium,High,0,10,10,1,0,1,130,100,Low,Low,0,NA,1,1,100GBASE-KR4,NONE +15,1,7,0,8,0,0,8,Medium,HIGH,0,2,0,0,0,0,0,0,0,1,130,100,Low,Low,5,TRUE,0,3,2,-2,0,4,0,1,0,0,2,Medium,High,0,10,10,1,0,1,130,100,Low,Low,0,NA,1,1,100GBASE-KR4,NONE +16,2,0,0,6,0,0,6,Medium,HIGH,0,2,0,0,0,0,0,0,0,1,130,100,Low,Low,5,TRUE,0,3,2,-2,0,4,0,1,0,0,2,Medium,High,0,10,10,1,0,1,130,100,Low,Low,0,NA,1,1,100GBASE-KR4,NONE +17,2,1,0,8,0,0,8,Medium,HIGH,0,2,0,0,0,0,0,0,0,1,130,100,Low,Low,5,TRUE,0,3,2,-2,0,4,0,1,0,0,2,Medium,High,0,10,10,1,0,1,130,100,Low,Low,0,NA,1,1,100GBASE-KR4,NONE +18,2,2,0,8,0,0,8,Medium,HIGH,0,2,0,0,0,0,0,0,0,1,130,100,Low,Low,5,TRUE,0,3,2,-2,0,4,0,1,0,0,2,Medium,High,0,10,10,1,0,1,130,100,Low,Low,0,NA,1,1,100GBASE-KR4,NONE +19,2,3,0,6,0,0,6,Medium,HIGH,0,2,0,0,0,0,0,0,0,1,130,100,Low,Low,5,TRUE,0,3,2,-2,0,4,0,1,0,0,2,Medium,High,0,10,10,1,0,1,130,100,Low,Low,0,NA,1,1,100GBASE-KR4,NONE +20,2,4,0,8,0,0,8,Medium,HIGH,0,2,0,0,0,0,0,0,0,1,130,100,Low,Low,5,TRUE,0,3,2,-2,0,4,0,1,0,0,2,Medium,High,0,10,10,1,0,1,130,100,Low,Low,0,NA,1,1,100GBASE-KR4,NONE +21,2,5,0,8,0,0,8,Medium,HIGH,0,2,0,0,0,0,0,0,0,1,130,100,Low,Low,5,TRUE,0,3,2,-2,0,4,0,1,0,0,2,Medium,High,0,10,10,1,0,1,130,100,Low,Low,0,NA,1,1,100GBASE-KR4,NONE +22,2,6,0,8,0,0,8,Medium,HIGH,0,2,0,0,0,0,0,0,0,1,130,100,Low,Low,5,TRUE,0,3,2,-2,0,4,0,1,0,0,2,Medium,High,0,10,10,1,0,1,130,100,Low,Low,0,NA,1,1,100GBASE-KR4,NONE +23,2,7,0,8,0,0,8,Medium,HIGH,0,2,0,0,0,0,0,0,0,1,130,100,Low,Low,5,TRUE,0,3,2,-2,0,4,0,1,0,0,2,Medium,High,0,10,10,1,0,1,130,100,Low,Low,0,NA,1,1,100GBASE-KR4,NONE +24,3,0,0,6,0,0,6,Medium,HIGH,0,2,0,0,0,0,0,0,0,1,130,100,Low,Low,5,TRUE,0,3,2,-2,0,4,0,1,0,0,2,Medium,High,0,10,10,1,0,1,130,100,Low,Low,0,NA,1,1,100GBASE-KR4,NONE +25,3,1,0,8,0,0,8,Medium,HIGH,0,2,0,0,0,0,0,0,0,1,130,100,Low,Low,5,TRUE,0,3,2,-2,0,4,0,1,0,0,2,Medium,High,0,10,10,1,0,1,130,100,Low,Low,0,NA,1,1,100GBASE-KR4,NONE +26,3,2,0,6,0,0,6,Medium,HIGH,0,2,0,0,0,0,0,0,0,1,130,100,Low,Low,5,TRUE,0,3,2,-2,0,4,0,1,0,0,2,Medium,High,0,10,10,1,0,1,130,100,Low,Low,0,NA,1,1,100GBASE-KR4,NONE +27,3,3,0,8,0,0,8,Medium,HIGH,0,2,0,0,0,0,0,0,0,1,130,100,Low,Low,5,TRUE,0,3,2,-2,0,4,0,1,0,0,2,Medium,High,0,10,10,1,0,1,130,100,Low,Low,0,NA,1,1,100GBASE-KR4,NONE +28,3,4,0,8,0,0,8,Medium,HIGH,0,2,0,0,0,0,0,0,0,1,130,100,Low,Low,5,TRUE,0,3,2,-2,0,4,0,1,0,0,2,Medium,High,0,10,10,1,0,1,130,100,Low,Low,0,NA,1,1,100GBASE-KR4,NONE +29,3,5,0,8,0,0,8,Medium,HIGH,0,2,0,0,0,0,0,0,0,1,130,100,Low,Low,5,TRUE,0,3,2,-2,0,4,0,1,0,0,2,Medium,High,0,10,10,1,0,1,130,100,Low,Low,0,NA,1,1,100GBASE-KR4,NONE +30,3,6,0,6,0,0,6,Medium,HIGH,0,2,0,0,0,0,0,0,0,1,130,100,Low,Low,5,TRUE,0,3,2,-2,0,4,0,1,0,0,2,Medium,High,0,10,10,1,0,1,130,100,Low,Low,0,NA,1,1,100GBASE-KR4,NONE +31,3,7,0,6,0,0,6,Medium,HIGH,0,2,0,0,0,0,0,0,0,1,130,100,Low,Low,5,TRUE,0,3,2,-2,0,4,0,1,0,0,2,Medium,High,0,10,10,1,0,1,130,100,Low,Low,0,NA,1,1,100GBASE-KR4,NONE +32,4,0,0,6,0,0,6,Medium,HIGH,0,2,0,0,0,0,0,0,0,1,130,100,Low,Low,5,TRUE,0,3,2,-2,0,4,0,1,0,0,2,Medium,High,0,10,10,1,0,1,130,100,Low,Low,0,NA,1,1,100GBASE-KR4,NONE +33,4,1,0,8,0,0,8,Medium,HIGH,0,2,0,0,0,0,0,0,0,1,130,100,Low,Low,5,TRUE,0,3,2,-2,0,4,0,1,0,0,2,Medium,High,0,10,10,1,0,1,130,100,Low,Low,0,NA,1,1,100GBASE-KR4,NONE +34,4,2,0,6,0,0,6,Medium,HIGH,0,2,0,0,0,0,0,0,0,1,130,100,Low,Low,5,TRUE,0,3,2,-2,0,4,0,1,0,0,2,Medium,High,0,10,10,1,0,1,130,100,Low,Low,0,NA,1,1,100GBASE-KR4,NONE +35,4,3,0,8,0,0,8,Medium,HIGH,0,2,0,0,0,0,0,0,0,1,130,100,Low,Low,5,TRUE,0,3,2,-2,0,4,0,1,0,0,2,Medium,High,0,10,10,1,0,1,130,100,Low,Low,0,NA,1,1,100GBASE-KR4,NONE +36,4,4,0,8,0,0,8,Medium,HIGH,0,2,0,0,0,0,0,0,0,1,130,100,Low,Low,5,TRUE,0,3,2,-2,0,4,0,1,0,0,2,Medium,High,0,10,10,1,0,1,130,100,Low,Low,0,NA,1,1,100GBASE-KR4,NONE +37,4,5,0,8,0,0,8,Medium,HIGH,0,2,0,0,0,0,0,0,0,1,130,100,Low,Low,5,TRUE,0,3,2,-2,0,4,0,1,0,0,2,Medium,High,0,10,10,1,0,1,130,100,Low,Low,0,NA,1,1,100GBASE-KR4,NONE +38,4,6,0,8,0,0,8,Medium,HIGH,0,2,0,0,0,0,0,0,0,1,130,100,Low,Low,5,TRUE,0,3,2,-2,0,4,0,1,0,0,2,Medium,High,0,10,10,1,0,1,130,100,Low,Low,0,NA,1,1,100GBASE-KR4,NONE +39,4,7,0,8,0,0,8,Medium,HIGH,0,2,0,0,0,0,0,0,0,1,130,100,Low,Low,5,TRUE,0,3,2,-2,0,4,0,1,0,0,2,Medium,High,0,10,10,1,0,1,130,100,Low,Low,0,NA,1,1,100GBASE-KR4,NONE +40,5,0,0,8,0,0,8,Medium,HIGH,0,2,0,0,0,0,0,0,0,1,130,100,Low,Low,5,TRUE,0,3,2,-2,0,4,0,1,0,0,2,Medium,High,0,10,10,1,0,1,130,100,Low,Low,0,NA,1,1,100GBASE-KR4,NONE +41,5,1,0,8,0,0,8,Medium,HIGH,0,2,0,0,0,0,0,0,0,1,130,100,Low,Low,5,TRUE,0,3,2,-2,0,4,0,1,0,0,2,Medium,High,0,10,10,1,0,1,130,100,Low,Low,0,NA,1,1,100GBASE-KR4,NONE +42,5,2,0,8,0,0,8,Medium,HIGH,0,2,0,0,0,0,0,0,0,1,130,100,Low,Low,5,TRUE,0,3,2,-2,0,4,0,1,0,0,2,Medium,High,0,10,10,1,0,1,130,100,Low,Low,0,NA,1,1,100GBASE-KR4,NONE +43,5,3,0,8,0,0,8,Medium,HIGH,0,2,0,0,0,0,0,0,0,1,130,100,Low,Low,5,TRUE,0,3,2,-2,0,4,0,1,0,0,2,Medium,High,0,10,10,1,0,1,130,100,Low,Low,0,NA,1,1,100GBASE-KR4,NONE +44,5,4,0,6,0,0,6,Medium,HIGH,0,2,0,0,0,0,0,0,0,1,130,100,Low,Low,5,TRUE,0,3,2,-2,0,4,0,1,0,0,2,Medium,High,0,10,10,1,0,1,130,100,Low,Low,0,NA,1,1,100GBASE-KR4,NONE +45,5,5,0,8,0,0,8,Medium,HIGH,0,2,0,0,0,0,0,0,0,1,130,100,Low,Low,5,TRUE,0,3,2,-2,0,4,0,1,0,0,2,Medium,High,0,10,10,1,0,1,130,100,Low,Low,0,NA,1,1,100GBASE-KR4,NONE +46,5,6,0,8,0,0,8,Medium,HIGH,0,2,0,0,0,0,0,0,0,1,130,100,Low,Low,5,TRUE,0,3,2,-2,0,4,0,1,0,0,2,Medium,High,0,10,10,1,0,1,130,100,Low,Low,0,NA,1,1,100GBASE-KR4,NONE +47,5,7,0,6,0,0,6,Medium,HIGH,0,2,0,0,0,0,0,0,0,1,130,100,Low,Low,5,TRUE,0,3,2,-2,0,4,0,1,0,0,2,Medium,High,0,10,10,1,0,1,130,100,Low,Low,0,NA,1,1,100GBASE-KR4,NONE +48,6,0,0,8,0,0,8,Medium,HIGH,0,2,0,0,0,0,0,0,0,1,130,100,Low,Low,5,TRUE,0,3,2,-2,0,4,0,1,0,0,2,Medium,High,0,10,10,1,0,1,130,100,Low,Low,0,NA,1,1,100GBASE-KR4,NONE +49,6,1,0,8,0,0,8,Medium,HIGH,0,2,0,0,0,0,0,0,0,1,130,100,Low,Low,5,TRUE,0,3,2,-2,0,4,0,1,0,0,2,Medium,High,0,10,10,1,0,1,130,100,Low,Low,0,NA,1,1,100GBASE-KR4,NONE +50,6,2,0,8,0,0,8,Medium,HIGH,0,2,0,0,0,0,0,0,0,1,130,100,Low,Low,5,TRUE,0,3,2,-2,0,4,0,1,0,0,2,Medium,High,0,10,10,1,0,1,130,100,Low,Low,0,NA,1,1,100GBASE-KR4,NONE +51,6,3,0,8,0,0,8,Medium,HIGH,0,2,0,0,0,0,0,0,0,1,130,100,Low,Low,5,TRUE,0,3,2,-2,0,4,0,1,0,0,2,Medium,High,0,10,10,1,0,1,130,100,Low,Low,0,NA,1,1,100GBASE-KR4,NONE +52,6,4,0,6,0,0,6,Medium,HIGH,0,2,0,0,0,0,0,0,0,1,130,100,Low,Low,5,TRUE,0,3,2,-2,0,4,0,1,0,0,2,Medium,High,0,10,10,1,0,1,130,100,Low,Low,0,NA,1,1,100GBASE-KR4,NONE +53,6,5,0,8,0,0,8,Medium,HIGH,0,2,0,0,0,0,0,0,0,1,130,100,Low,Low,5,TRUE,0,3,2,-2,0,4,0,1,0,0,2,Medium,High,0,10,10,1,0,1,130,100,Low,Low,0,NA,1,1,100GBASE-KR4,NONE +54,6,6,0,8,0,0,8,Medium,HIGH,0,2,0,0,0,0,0,0,0,1,130,100,Low,Low,5,TRUE,0,3,2,-2,0,4,0,1,0,0,2,Medium,High,0,10,10,1,0,1,130,100,Low,Low,0,NA,1,1,100GBASE-KR4,NONE +55,6,7,0,6,0,0,6,Medium,HIGH,0,2,0,0,0,0,0,0,0,1,130,100,Low,Low,5,TRUE,0,3,2,-2,0,4,0,1,0,0,2,Medium,High,0,10,10,1,0,1,130,100,Low,Low,0,NA,1,1,100GBASE-KR4,NONE +56,7,0,0,8,0,0,8,Medium,HIGH,0,2,0,0,0,0,0,0,0,1,130,100,Low,Low,5,TRUE,0,3,2,-2,0,4,0,1,0,0,2,Medium,High,0,10,10,1,0,1,130,100,Low,Low,0,NA,1,1,100GBASE-KR4,NONE +57,7,1,0,6,0,0,6,Medium,HIGH,0,2,0,0,0,0,0,0,0,1,130,100,Low,Low,5,TRUE,0,3,2,-2,0,4,0,1,0,0,2,Medium,High,0,10,10,1,0,1,130,100,Low,Low,0,NA,1,1,100GBASE-KR4,NONE +58,7,2,0,6,0,0,6,Medium,HIGH,0,2,0,0,0,0,0,0,0,1,130,100,Low,Low,5,TRUE,0,3,2,-2,0,4,0,1,0,0,2,Medium,High,0,10,10,1,0,1,130,100,Low,Low,0,NA,1,1,100GBASE-KR4,NONE +59,7,3,0,8,0,0,8,Medium,HIGH,0,2,0,0,0,0,0,0,0,1,130,100,Low,Low,5,TRUE,0,3,2,-2,0,4,0,1,0,0,2,Medium,High,0,10,10,1,0,1,130,100,Low,Low,0,NA,1,1,100GBASE-KR4,NONE +60,7,4,0,8,0,0,8,Medium,HIGH,0,2,0,0,0,0,0,0,0,1,130,100,Low,Low,5,TRUE,0,3,2,-2,0,4,0,1,0,0,2,Medium,High,0,10,10,1,0,1,130,100,Low,Low,0,NA,1,1,100GBASE-KR4,NONE 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+103,12,7,0,8,0,0,8,Medium,HIGH,0,2,0,0,0,0,0,0,0,1,130,100,Low,Low,5,TRUE,0,3,2,-2,0,4,0,1,0,0,2,Medium,High,0,10,10,1,0,1,130,100,Low,Low,0,NA,1,1,100GBASE-KR4,NONE +104,13,0,0,8,0,0,8,Medium,HIGH,0,2,0,0,0,0,0,0,0,1,130,100,Low,Low,5,TRUE,0,3,2,-2,0,4,0,1,0,0,2,Medium,High,0,10,10,1,0,1,130,100,Low,Low,0,NA,1,1,100GBASE-KR4,NONE +105,13,1,0,8,0,0,8,Medium,HIGH,0,2,0,0,0,0,0,0,0,1,130,100,Low,Low,5,TRUE,0,3,2,-2,0,4,0,1,0,0,2,Medium,High,0,10,10,1,0,1,130,100,Low,Low,0,NA,1,1,100GBASE-KR4,NONE +106,13,2,0,6,0,0,6,Medium,HIGH,0,2,0,0,0,0,0,0,0,1,130,100,Low,Low,5,TRUE,0,3,2,-2,0,4,0,1,0,0,2,Medium,High,0,10,10,1,0,1,130,100,Low,Low,0,NA,1,1,100GBASE-KR4,NONE +107,13,3,0,8,0,0,8,Medium,HIGH,0,2,0,0,0,0,0,0,0,1,130,100,Low,Low,5,TRUE,0,3,2,-2,0,4,0,1,0,0,2,Medium,High,0,10,10,1,0,1,130,100,Low,Low,0,NA,1,1,100GBASE-KR4,NONE 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+158,19,6,0,8,0,0,8,Medium,HIGH,0,2,0,0,0,0,0,0,0,1,130,100,Low,Low,5,TRUE,0,3,2,-2,0,4,0,1,0,0,2,Medium,High,0,10,10,1,0,1,130,100,Low,Low,0,NA,1,1,100GBASE-KR4,NONE +159,19,7,0,2,0,0,2,Medium,HIGH,0,2,0,0,0,0,0,0,0,1,130,100,Low,Low,5,TRUE,0,3,2,-2,0,4,0,1,0,0,2,Medium,High,0,10,10,1,0,1,130,100,Low,Low,0,NA,1,1,100GBASE-KR4,NONE +160,20,0,0,8,0,0,8,Medium,HIGH,0,2,0,0,0,0,0,0,0,1,130,100,Low,Low,5,TRUE,0,3,2,-2,0,4,0,1,0,0,2,Medium,High,0,10,10,1,0,1,130,100,Low,Low,0,NA,1,1,100GBASE-KR4,NONE +161,20,1,0,8,0,0,8,Medium,HIGH,0,2,0,0,0,0,0,0,0,1,130,100,Low,Low,5,TRUE,0,3,2,-2,0,4,0,1,0,0,2,Medium,High,0,10,10,1,0,1,130,100,Low,Low,0,NA,1,1,100GBASE-KR4,NONE +162,20,2,0,8,0,0,8,Medium,HIGH,0,2,0,0,0,0,0,0,0,1,130,100,Low,Low,5,TRUE,0,3,2,-2,0,4,0,1,0,0,2,Medium,High,0,10,10,1,0,1,130,100,Low,Low,0,NA,1,1,100GBASE-KR4,NONE +163,20,3,0,8,0,0,8,Medium,HIGH,0,2,0,0,0,0,0,0,0,1,130,100,Low,Low,5,TRUE,0,3,2,-2,0,4,0,1,0,0,2,Medium,High,0,10,10,1,0,1,130,100,Low,Low,0,NA,1,1,100GBASE-KR4,NONE +164,20,4,0,8,0,0,8,Medium,HIGH,0,2,0,0,0,0,0,0,0,1,130,100,Low,Low,5,TRUE,0,3,2,-2,0,4,0,1,0,0,2,Medium,High,0,10,10,1,0,1,130,100,Low,Low,0,NA,1,1,100GBASE-KR4,NONE +165,20,5,0,8,0,0,8,Medium,HIGH,0,2,0,0,0,0,0,0,0,1,130,100,Low,Low,5,TRUE,0,3,2,-2,0,4,0,1,0,0,2,Medium,High,0,10,10,1,0,1,130,100,Low,Low,0,NA,1,1,100GBASE-KR4,NONE +166,20,6,0,8,0,0,8,Medium,HIGH,0,2,0,0,0,0,0,0,0,1,130,100,Low,Low,5,TRUE,0,3,2,-2,0,4,0,1,0,0,2,Medium,High,0,10,10,1,0,1,130,100,Low,Low,0,NA,1,1,100GBASE-KR4,NONE +167,20,7,0,6,0,0,6,Medium,HIGH,0,2,0,0,0,0,0,0,0,1,130,100,Low,Low,5,TRUE,0,3,2,-2,0,4,0,1,0,0,2,Medium,High,0,10,10,1,0,1,130,100,Low,Low,0,NA,1,1,100GBASE-KR4,NONE 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+228,28,4,0,8,0,0,8,Medium,HIGH,0,2,0,0,0,0,0,0,0,1,130,100,Low,Low,5,TRUE,0,3,2,-2,0,4,0,1,0,0,2,Medium,High,0,10,10,1,0,1,130,100,Low,Low,0,NA,1,1,100GBASE-KR4,NONE +229,28,5,0,6,0,0,6,Medium,HIGH,0,2,0,0,0,0,0,0,0,1,130,100,Low,Low,5,TRUE,0,3,2,-2,0,4,0,1,0,0,2,Medium,High,0,10,10,1,0,1,130,100,Low,Low,0,NA,1,1,100GBASE-KR4,NONE +230,28,6,0,8,0,0,8,Medium,HIGH,0,2,0,0,0,0,0,0,0,1,130,100,Low,Low,5,TRUE,0,3,2,-2,0,4,0,1,0,0,2,Medium,High,0,10,10,1,0,1,130,100,Low,Low,0,NA,1,1,100GBASE-KR4,NONE +231,28,7,0,8,0,0,8,Medium,HIGH,0,2,0,0,0,0,0,0,0,1,130,100,Low,Low,5,TRUE,0,3,2,-2,0,4,0,1,0,0,2,Medium,High,0,10,10,1,0,1,130,100,Low,Low,0,NA,1,1,100GBASE-KR4,NONE +232,29,0,0,8,0,0,8,Medium,HIGH,0,2,0,0,0,0,0,0,0,1,130,100,Low,Low,5,TRUE,0,3,2,-2,0,4,0,1,0,0,2,Medium,High,0,10,10,1,0,1,130,100,Low,Low,0,NA,1,1,100GBASE-KR4,NONE +233,29,1,0,6,0,0,6,Medium,HIGH,0,2,0,0,0,0,0,0,0,1,130,100,Low,Low,5,TRUE,0,3,2,-2,0,4,0,1,0,0,2,Medium,High,0,10,10,1,0,1,130,100,Low,Low,0,NA,1,1,100GBASE-KR4,NONE +234,29,2,0,6,0,0,6,Medium,HIGH,0,2,0,0,0,0,0,0,0,1,130,100,Low,Low,5,TRUE,0,3,2,-2,0,4,0,1,0,0,2,Medium,High,0,10,10,1,0,1,130,100,Low,Low,0,NA,1,1,100GBASE-KR4,NONE +235,29,3,0,8,0,0,8,Medium,HIGH,0,2,0,0,0,0,0,0,0,1,130,100,Low,Low,5,TRUE,0,3,2,-2,0,4,0,1,0,0,2,Medium,High,0,10,10,1,0,1,130,100,Low,Low,0,NA,1,1,100GBASE-KR4,NONE +236,29,4,0,8,0,0,8,Medium,HIGH,0,2,0,0,0,0,0,0,0,1,130,100,Low,Low,5,TRUE,0,3,2,-2,0,4,0,1,0,0,2,Medium,High,0,10,10,1,0,1,130,100,Low,Low,0,NA,1,1,100GBASE-KR4,NONE +237,29,5,0,8,0,0,8,Medium,HIGH,0,2,0,0,0,0,0,0,0,1,130,100,Low,Low,5,TRUE,0,3,2,-2,0,4,0,1,0,0,2,Medium,High,0,10,10,1,0,1,130,100,Low,Low,0,NA,1,1,100GBASE-KR4,NONE +238,29,6,0,8,0,0,8,Medium,HIGH,0,2,0,0,0,0,0,0,0,1,130,100,Low,Low,5,TRUE,0,3,2,-2,0,4,0,1,0,0,2,Medium,High,0,10,10,1,0,1,130,100,Low,Low,0,NA,1,1,100GBASE-KR4,NONE +239,29,7,0,6,0,0,6,Medium,HIGH,0,2,0,0,0,0,0,0,0,1,130,100,Low,Low,5,TRUE,0,3,2,-2,0,4,0,1,0,0,2,Medium,High,0,10,10,1,0,1,130,100,Low,Low,0,NA,1,1,100GBASE-KR4,NONE +240,30,0,0,6,0,0,6,Medium,HIGH,0,2,0,0,0,0,0,0,0,1,130,100,Low,Low,5,TRUE,0,3,2,-2,0,4,0,1,0,0,2,Medium,High,0,10,10,1,0,1,130,100,Low,Low,0,NA,1,1,100GBASE-KR4,NONE +241,30,1,0,8,0,0,8,Medium,HIGH,0,2,0,0,0,0,0,0,0,1,130,100,Low,Low,5,TRUE,0,3,2,-2,0,4,0,1,0,0,2,Medium,High,0,10,10,1,0,1,130,100,Low,Low,0,NA,1,1,100GBASE-KR4,NONE +242,30,2,0,6,0,0,6,Medium,HIGH,0,2,0,0,0,0,0,0,0,1,130,100,Low,Low,5,TRUE,0,3,2,-2,0,4,0,1,0,0,2,Medium,High,0,10,10,1,0,1,130,100,Low,Low,0,NA,1,1,100GBASE-KR4,NONE +243,30,3,0,6,0,0,6,Medium,HIGH,0,2,0,0,0,0,0,0,0,1,130,100,Low,Low,5,TRUE,0,3,2,-2,0,4,0,1,0,0,2,Medium,High,0,10,10,1,0,1,130,100,Low,Low,0,NA,1,1,100GBASE-KR4,NONE +244,30,4,0,6,0,0,6,Medium,HIGH,0,2,0,0,0,0,0,0,0,1,130,100,Low,Low,5,TRUE,0,3,2,-2,0,4,0,1,0,0,2,Medium,High,0,10,10,1,0,1,130,100,Low,Low,0,NA,1,1,100GBASE-KR4,NONE +245,30,5,0,8,0,0,8,Medium,HIGH,0,2,0,0,0,0,0,0,0,1,130,100,Low,Low,5,TRUE,0,3,2,-2,0,4,0,1,0,0,2,Medium,High,0,10,10,1,0,1,130,100,Low,Low,0,NA,1,1,100GBASE-KR4,NONE +246,30,6,0,8,0,0,8,Medium,HIGH,0,2,0,0,0,0,0,0,0,1,130,100,Low,Low,5,TRUE,0,3,2,-2,0,4,0,1,0,0,2,Medium,High,0,10,10,1,0,1,130,100,Low,Low,0,NA,1,1,100GBASE-KR4,NONE +247,30,7,0,8,0,0,8,Medium,HIGH,0,2,0,0,0,0,0,0,0,1,130,100,Low,Low,5,TRUE,0,3,2,-2,0,4,0,1,0,0,2,Medium,High,0,10,10,1,0,1,130,100,Low,Low,0,NA,1,1,100GBASE-KR4,NONE +248,31,0,0,8,0,0,8,Medium,HIGH,0,2,0,0,0,0,0,0,0,1,130,100,Low,Low,5,TRUE,0,3,2,-2,0,4,0,1,0,0,2,Medium,High,0,10,10,1,0,1,130,100,Low,Low,0,NA,1,1,100GBASE-KR4,NONE +249,31,1,0,8,0,0,8,Medium,HIGH,0,2,0,0,0,0,0,0,0,1,130,100,Low,Low,5,TRUE,0,3,2,-2,0,4,0,1,0,0,2,Medium,High,0,10,10,1,0,1,130,100,Low,Low,0,NA,1,1,100GBASE-KR4,NONE +250,31,2,0,6,0,0,6,Medium,HIGH,0,2,0,0,0,0,0,0,0,1,130,100,Low,Low,5,TRUE,0,3,2,-2,0,4,0,1,0,0,2,Medium,High,0,10,10,1,0,1,130,100,Low,Low,0,NA,1,1,100GBASE-KR4,NONE +251,31,3,0,8,0,0,8,Medium,HIGH,0,2,0,0,0,0,0,0,0,1,130,100,Low,Low,5,TRUE,0,3,2,-2,0,4,0,1,0,0,2,Medium,High,0,10,10,1,0,1,130,100,Low,Low,0,NA,1,1,100GBASE-KR4,NONE +252,31,4,0,8,0,0,8,Medium,HIGH,0,2,0,0,0,0,0,0,0,1,130,100,Low,Low,5,TRUE,0,3,2,-2,0,4,0,1,0,0,2,Medium,High,0,10,10,1,0,1,130,100,Low,Low,0,NA,1,1,100GBASE-KR4,NONE +253,31,5,0,8,0,0,8,Medium,HIGH,0,2,0,0,0,0,0,0,0,1,130,100,Low,Low,5,TRUE,0,3,2,-2,0,4,0,1,0,0,2,Medium,High,0,10,10,1,0,1,130,100,Low,Low,0,NA,1,1,100GBASE-KR4,NONE +254,31,6,0,8,0,0,8,Medium,HIGH,0,2,0,0,0,0,0,0,0,1,130,100,Low,Low,5,TRUE,0,3,2,-2,0,4,0,1,0,0,2,Medium,High,0,10,10,1,0,1,130,100,Low,Low,0,NA,1,1,100GBASE-KR4,NONE +255,31,7,0,8,0,0,8,Medium,HIGH,0,2,0,0,0,0,0,0,0,1,130,100,Low,Low,5,TRUE,0,3,2,-2,0,4,0,1,0,0,2,Medium,High,0,10,10,1,0,1,130,100,Low,Low,0,NA,1,1,100GBASE-KR4,NONE +256,32,0,0,0,0,0,0,Medium,HIGH,0,2,0,0,0,0,0,0,0,1,130,100,Low,Low,5,TRUE,0,3,2,-2,0,4,0,1,0,0,2,Medium,High,0,10,10,1,0,1,130,100,Low,Low,0,NA,1,1,10GBASE-CR4,NONE +257,32,1,0,0,0,0,0,Medium,HIGH,0,2,0,0,0,0,0,0,0,1,130,100,Low,Low,5,TRUE,0,3,2,-2,0,4,0,1,0,0,2,Medium,High,0,10,10,1,0,1,130,100,Low,Low,0,NA,1,1,10GBASE-CR4,NONE diff --git a/device/supermicro/x86_64-supermicro_sse_t7132s-r0/CSV/TL7_DAC_3M.csv b/device/supermicro/x86_64-supermicro_sse_t7132s-r0/CSV/TL7_DAC_3M.csv new file mode 100755 index 0000000000..6b9579b3d0 --- /dev/null +++ b/device/supermicro/x86_64-supermicro_sse_t7132s-r0/CSV/TL7_DAC_3M.csv @@ -0,0 +1,263 @@ +VERSION,CABLE TYPE,VENDOR,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,, +1.2,DAC_3M,GENERIC,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,, +,,,SPEED,ENCODING,,,,,,,,,SPEED,ENCODING,,,,,,,,,,,,,SPEED,ENCODING,,,,,,,SPEED,ENCODING,,,,,,,SPEED,ENCODING,,,,,,,,,, +,,,50G/400G,PAM4,,,,,,,,,25G/100G,NRZ,,,,,,,,,,,,,10G/40G,NRZ,,,,,,,LT 50G/400G,PAM4,,,,,,,ANLT 25G/100G,NRZ,,,,,,,,,, +index,Front Port,lane,TX_EQ_ATTN,TX_EQ_PRE1,TX_EQ_PRE2,TX_EQ_PRE3,TX_EQ_POST,RX_EQ_COARSE_TUNE_EFFORT_50G,RX_EQ_FINE_TUNE_EFFORT_50G,RX_GAINSHAPE1,RX_GAINSHAPE2,LINK_TRAINING,TX_EQ_ATTN,TX_EQ_PRE1,TX_EQ_PRE2,TX_EQ_PRE3,TX_EQ_POST,RX_GAINSHAPE1,RX_GAINSHAPE2,RX_AGC_TARGET,RX_EYE_DISQUALIFY_THRESHOLD_25G,RX_EQ_COARSE_TUNE_EFFORT_25G,RX_EQ_FINE_TUNE_EFFORT_25G,SD_RESET_THRESHOLD,SD_RESET_25G,LINK_TRAINING,TX_EQ_ATTN,TX_EQ_PRE1,TX_EQ_PRE2,TX_EQ_PRE3,TX_EQ_POST,RX_GAINSHAPE1,RX_GAINSHAPE2,LINK_TRAINING,RX_GAINSHAPE1,RX_GAINSHAPE2,RX_EQ_COARSE_TUNE_EFFORT_50G,RX_EQ_FINE_TUNE_EFFORT_50G,RX_CTLE_LF,RX_CTLE_HF,RX_CTLE_BW,LINK_TRAINING,RX_GAINSHAPE1,RX_GAINSHAPE2,RX_AGC_TARGET,RX_EYE_DISQUALIFY_THRESHOLD_25G,RX_EQ_COARSE_TUNE_EFFORT_25G,RX_EQ_FINE_TUNE_EFFORT_25G,SD_RESET_25G,SD_RESET_THRESHOLD_25G,LINK_TRAINING,AN,AN_ABILITY,FEC +0,0,0,0,6,0,0,6,Medium,HIGH,0,2,0,0,0,0,0,0,2,2,130,150,Low,Low,5,TRUE,0,3,2,-2,0,4,0,1,0,0,2,Medium,High,0,10,10,1,0,1,130,100,Low,Low,0,NA,1,1,100GBASE-KR4,NONE +1,0,1,0,6,0,0,6,Medium,HIGH,0,2,0,0,0,0,0,0,2,2,130,150,Low,Low,5,TRUE,0,3,2,-2,0,4,0,1,0,0,2,Medium,High,0,10,10,1,0,1,130,100,Low,Low,0,NA,1,1,100GBASE-KR4,NONE +2,0,2,0,6,0,0,6,Medium,HIGH,0,2,0,0,0,0,0,0,2,2,130,150,Low,Low,5,TRUE,0,3,2,-2,0,4,0,1,0,0,2,Medium,High,0,10,10,1,0,1,130,100,Low,Low,0,NA,1,1,100GBASE-KR4,NONE +3,0,3,0,6,0,0,6,Medium,HIGH,0,2,0,0,0,0,0,0,2,2,130,150,Low,Low,5,TRUE,0,3,2,-2,0,4,0,1,0,0,2,Medium,High,0,10,10,1,0,1,130,100,Low,Low,0,NA,1,1,100GBASE-KR4,NONE +4,0,4,0,6,0,0,6,Medium,HIGH,0,2,0,0,0,0,0,0,2,2,130,150,Low,Low,5,TRUE,0,3,2,-2,0,4,0,1,0,0,2,Medium,High,0,10,10,1,0,1,130,100,Low,Low,0,NA,1,1,100GBASE-KR4,NONE +5,0,5,0,6,0,0,6,Medium,HIGH,0,2,0,0,0,0,0,0,2,2,130,150,Low,Low,5,TRUE,0,3,2,-2,0,4,0,1,0,0,2,Medium,High,0,10,10,1,0,1,130,100,Low,Low,0,NA,1,1,100GBASE-KR4,NONE +6,0,6,0,6,0,0,6,Medium,HIGH,0,2,0,0,0,0,0,0,2,2,130,150,Low,Low,5,TRUE,0,3,2,-2,0,4,0,1,0,0,2,Medium,High,0,10,10,1,0,1,130,100,Low,Low,0,NA,1,1,100GBASE-KR4,NONE +7,0,7,0,6,0,0,6,Medium,HIGH,0,2,0,0,0,0,0,0,2,2,130,150,Low,Low,5,TRUE,0,3,2,-2,0,4,0,1,0,0,2,Medium,High,0,10,10,1,0,1,130,100,Low,Low,0,NA,1,1,100GBASE-KR4,NONE +8,1,0,0,6,0,0,6,Medium,HIGH,0,2,0,0,0,0,0,0,2,2,130,150,Low,Low,5,TRUE,0,3,2,-2,0,4,0,1,0,0,2,Medium,High,0,10,10,1,0,1,130,100,Low,Low,0,NA,1,1,100GBASE-KR4,NONE +9,1,1,0,6,0,0,6,Medium,HIGH,0,2,0,0,0,0,0,0,2,2,130,150,Low,Low,5,TRUE,0,3,2,-2,0,4,0,1,0,0,2,Medium,High,0,10,10,1,0,1,130,100,Low,Low,0,NA,1,1,100GBASE-KR4,NONE +10,1,2,0,6,0,0,6,Medium,HIGH,0,2,0,0,0,0,0,0,2,2,130,150,Low,Low,5,TRUE,0,3,2,-2,0,4,0,1,0,0,2,Medium,High,0,10,10,1,0,1,130,100,Low,Low,0,NA,1,1,100GBASE-KR4,NONE +11,1,3,0,6,0,0,6,Medium,HIGH,0,2,0,0,0,0,0,0,2,2,130,150,Low,Low,5,TRUE,0,3,2,-2,0,4,0,1,0,0,2,Medium,High,0,10,10,1,0,1,130,100,Low,Low,0,NA,1,1,100GBASE-KR4,NONE +12,1,4,0,6,0,0,6,Medium,HIGH,0,2,0,0,0,0,0,0,2,2,130,150,Low,Low,5,TRUE,0,3,2,-2,0,4,0,1,0,0,2,Medium,High,0,10,10,1,0,1,130,100,Low,Low,0,NA,1,1,100GBASE-KR4,NONE +13,1,5,0,6,0,0,6,Medium,HIGH,0,2,0,0,0,0,0,0,2,2,130,150,Low,Low,5,TRUE,0,3,2,-2,0,4,0,1,0,0,2,Medium,High,0,10,10,1,0,1,130,100,Low,Low,0,NA,1,1,100GBASE-KR4,NONE +14,1,6,0,6,0,0,6,Medium,HIGH,0,2,0,0,0,0,0,0,2,2,130,150,Low,Low,5,TRUE,0,3,2,-2,0,4,0,1,0,0,2,Medium,High,0,10,10,1,0,1,130,100,Low,Low,0,NA,1,1,100GBASE-KR4,NONE +15,1,7,0,6,0,0,6,Medium,HIGH,0,2,0,0,0,0,0,0,2,2,130,150,Low,Low,5,TRUE,0,3,2,-2,0,4,0,1,0,0,2,Medium,High,0,10,10,1,0,1,130,100,Low,Low,0,NA,1,1,100GBASE-KR4,NONE +16,2,0,0,6,0,0,6,Medium,HIGH,0,2,0,0,0,0,0,0,2,2,130,150,Low,Low,5,TRUE,0,3,2,-2,0,4,0,1,0,0,2,Medium,High,0,10,10,1,0,1,130,100,Low,Low,0,NA,1,1,100GBASE-KR4,NONE +17,2,1,0,6,0,0,6,Medium,HIGH,0,2,0,0,0,0,0,0,2,2,130,150,Low,Low,5,TRUE,0,3,2,-2,0,4,0,1,0,0,2,Medium,High,0,10,10,1,0,1,130,100,Low,Low,0,NA,1,1,100GBASE-KR4,NONE +18,2,2,0,6,0,0,6,Medium,HIGH,0,2,0,0,0,0,0,0,2,2,130,150,Low,Low,5,TRUE,0,3,2,-2,0,4,0,1,0,0,2,Medium,High,0,10,10,1,0,1,130,100,Low,Low,0,NA,1,1,100GBASE-KR4,NONE +19,2,3,0,6,0,0,6,Medium,HIGH,0,2,0,0,0,0,0,0,2,2,130,150,Low,Low,5,TRUE,0,3,2,-2,0,4,0,1,0,0,2,Medium,High,0,10,10,1,0,1,130,100,Low,Low,0,NA,1,1,100GBASE-KR4,NONE +20,2,4,0,6,0,0,6,Medium,HIGH,0,2,0,0,0,0,0,0,2,2,130,150,Low,Low,5,TRUE,0,3,2,-2,0,4,0,1,0,0,2,Medium,High,0,10,10,1,0,1,130,100,Low,Low,0,NA,1,1,100GBASE-KR4,NONE +21,2,5,0,6,0,0,6,Medium,HIGH,0,2,0,0,0,0,0,0,2,2,130,150,Low,Low,5,TRUE,0,3,2,-2,0,4,0,1,0,0,2,Medium,High,0,10,10,1,0,1,130,100,Low,Low,0,NA,1,1,100GBASE-KR4,NONE +22,2,6,0,6,0,0,6,Medium,HIGH,0,2,0,0,0,0,0,0,2,2,130,150,Low,Low,5,TRUE,0,3,2,-2,0,4,0,1,0,0,2,Medium,High,0,10,10,1,0,1,130,100,Low,Low,0,NA,1,1,100GBASE-KR4,NONE +23,2,7,0,6,0,0,6,Medium,HIGH,0,2,0,0,0,0,0,0,2,2,130,150,Low,Low,5,TRUE,0,3,2,-2,0,4,0,1,0,0,2,Medium,High,0,10,10,1,0,1,130,100,Low,Low,0,NA,1,1,100GBASE-KR4,NONE +24,3,0,0,6,0,0,6,Medium,HIGH,0,2,0,0,0,0,0,0,2,2,130,150,Low,Low,5,TRUE,0,3,2,-2,0,4,0,1,0,0,2,Medium,High,0,10,10,1,0,1,130,100,Low,Low,0,NA,1,1,100GBASE-KR4,NONE +25,3,1,0,6,0,0,6,Medium,HIGH,0,2,0,0,0,0,0,0,2,2,130,150,Low,Low,5,TRUE,0,3,2,-2,0,4,0,1,0,0,2,Medium,High,0,10,10,1,0,1,130,100,Low,Low,0,NA,1,1,100GBASE-KR4,NONE +26,3,2,0,6,0,0,6,Medium,HIGH,0,2,0,0,0,0,0,0,2,2,130,150,Low,Low,5,TRUE,0,3,2,-2,0,4,0,1,0,0,2,Medium,High,0,10,10,1,0,1,130,100,Low,Low,0,NA,1,1,100GBASE-KR4,NONE +27,3,3,0,6,0,0,6,Medium,HIGH,0,2,0,0,0,0,0,0,2,2,130,150,Low,Low,5,TRUE,0,3,2,-2,0,4,0,1,0,0,2,Medium,High,0,10,10,1,0,1,130,100,Low,Low,0,NA,1,1,100GBASE-KR4,NONE +28,3,4,0,6,0,0,6,Medium,HIGH,0,2,0,0,0,0,0,0,2,2,130,150,Low,Low,5,TRUE,0,3,2,-2,0,4,0,1,0,0,2,Medium,High,0,10,10,1,0,1,130,100,Low,Low,0,NA,1,1,100GBASE-KR4,NONE +29,3,5,0,6,0,0,6,Medium,HIGH,0,2,0,0,0,0,0,0,2,2,130,150,Low,Low,5,TRUE,0,3,2,-2,0,4,0,1,0,0,2,Medium,High,0,10,10,1,0,1,130,100,Low,Low,0,NA,1,1,100GBASE-KR4,NONE +30,3,6,0,6,0,0,6,Medium,HIGH,0,2,0,0,0,0,0,0,2,2,130,150,Low,Low,5,TRUE,0,3,2,-2,0,4,0,1,0,0,2,Medium,High,0,10,10,1,0,1,130,100,Low,Low,0,NA,1,1,100GBASE-KR4,NONE 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+49,6,1,0,6,0,0,6,Medium,HIGH,0,2,0,0,0,0,0,0,2,2,130,150,Low,Low,5,TRUE,0,3,2,-2,0,4,0,1,0,0,2,Medium,High,0,10,10,1,0,1,130,100,Low,Low,0,NA,1,1,100GBASE-KR4,NONE +50,6,2,0,6,0,0,6,Medium,HIGH,0,2,0,0,0,0,0,0,2,2,130,150,Low,Low,5,TRUE,0,3,2,-2,0,4,0,1,0,0,2,Medium,High,0,10,10,1,0,1,130,100,Low,Low,0,NA,1,1,100GBASE-KR4,NONE +51,6,3,0,6,0,0,6,Medium,HIGH,0,2,0,0,0,0,0,0,2,2,130,150,Low,Low,5,TRUE,0,3,2,-2,0,4,0,1,0,0,2,Medium,High,0,10,10,1,0,1,130,100,Low,Low,0,NA,1,1,100GBASE-KR4,NONE +52,6,4,0,6,0,0,6,Medium,HIGH,0,2,0,0,0,0,0,0,2,2,130,150,Low,Low,5,TRUE,0,3,2,-2,0,4,0,1,0,0,2,Medium,High,0,10,10,1,0,1,130,100,Low,Low,0,NA,1,1,100GBASE-KR4,NONE +53,6,5,0,6,0,0,6,Medium,HIGH,0,2,0,0,0,0,0,0,2,2,130,150,Low,Low,5,TRUE,0,3,2,-2,0,4,0,1,0,0,2,Medium,High,0,10,10,1,0,1,130,100,Low,Low,0,NA,1,1,100GBASE-KR4,NONE +54,6,6,0,6,0,0,6,Medium,HIGH,0,2,0,0,0,0,0,0,2,2,130,150,Low,Low,5,TRUE,0,3,2,-2,0,4,0,1,0,0,2,Medium,High,0,10,10,1,0,1,130,100,Low,Low,0,NA,1,1,100GBASE-KR4,NONE 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+61,7,5,0,6,0,0,6,Medium,HIGH,0,2,0,0,0,0,0,0,2,2,130,150,Low,Low,5,TRUE,0,3,2,-2,0,4,0,1,0,0,2,Medium,High,0,10,10,1,0,1,130,100,Low,Low,0,NA,1,1,100GBASE-KR4,NONE +62,7,6,0,6,0,0,6,Medium,HIGH,0,2,0,0,0,0,0,0,2,2,130,150,Low,Low,5,TRUE,0,3,2,-2,0,4,0,1,0,0,2,Medium,High,0,10,10,1,0,1,130,100,Low,Low,0,NA,1,1,100GBASE-KR4,NONE +63,7,7,0,6,0,0,6,Medium,HIGH,0,2,0,0,0,0,0,0,2,2,130,150,Low,Low,5,TRUE,0,3,2,-2,0,4,0,1,0,0,2,Medium,High,0,10,10,1,0,1,130,100,Low,Low,0,NA,1,1,100GBASE-KR4,NONE +64,8,0,0,6,0,0,6,Medium,HIGH,0,2,0,0,0,0,0,0,2,2,130,150,Low,Low,5,TRUE,0,3,2,-2,0,4,0,1,0,0,2,Medium,High,0,10,10,1,0,1,130,100,Low,Low,0,NA,1,1,100GBASE-KR4,NONE +65,8,1,0,6,0,0,6,Medium,HIGH,0,2,0,0,0,0,0,0,2,2,130,150,Low,Low,5,TRUE,0,3,2,-2,0,4,0,1,0,0,2,Medium,High,0,10,10,1,0,1,130,100,Low,Low,0,NA,1,1,100GBASE-KR4,NONE +66,8,2,0,6,0,0,6,Medium,HIGH,0,2,0,0,0,0,0,0,2,2,130,150,Low,Low,5,TRUE,0,3,2,-2,0,4,0,1,0,0,2,Medium,High,0,10,10,1,0,1,130,100,Low,Low,0,NA,1,1,100GBASE-KR4,NONE +67,8,3,0,6,0,0,6,Medium,HIGH,0,2,0,0,0,0,0,0,2,2,130,150,Low,Low,5,TRUE,0,3,2,-2,0,4,0,1,0,0,2,Medium,High,0,10,10,1,0,1,130,100,Low,Low,0,NA,1,1,100GBASE-KR4,NONE +68,8,4,0,6,0,0,6,Medium,HIGH,0,2,0,0,0,0,0,0,2,2,130,150,Low,Low,5,TRUE,0,3,2,-2,0,4,0,1,0,0,2,Medium,High,0,10,10,1,0,1,130,100,Low,Low,0,NA,1,1,100GBASE-KR4,NONE +69,8,5,0,6,0,0,6,Medium,HIGH,0,2,0,0,0,0,0,0,2,2,130,150,Low,Low,5,TRUE,0,3,2,-2,0,4,0,1,0,0,2,Medium,High,0,10,10,1,0,1,130,100,Low,Low,0,NA,1,1,100GBASE-KR4,NONE +70,8,6,0,6,0,0,6,Medium,HIGH,0,2,0,0,0,0,0,0,2,2,130,150,Low,Low,5,TRUE,0,3,2,-2,0,4,0,1,0,0,2,Medium,High,0,10,10,1,0,1,130,100,Low,Low,0,NA,1,1,100GBASE-KR4,NONE +71,8,7,0,6,0,0,6,Medium,HIGH,0,2,0,0,0,0,0,0,2,2,130,150,Low,Low,5,TRUE,0,3,2,-2,0,4,0,1,0,0,2,Medium,High,0,10,10,1,0,1,130,100,Low,Low,0,NA,1,1,100GBASE-KR4,NONE +72,9,0,0,6,0,0,6,Medium,HIGH,0,2,0,0,0,0,0,0,2,2,130,150,Low,Low,5,TRUE,0,3,2,-2,0,4,0,1,0,0,2,Medium,High,0,10,10,1,0,1,130,100,Low,Low,0,NA,1,1,100GBASE-KR4,NONE +73,9,1,0,6,0,0,6,Medium,HIGH,0,2,0,0,0,0,0,0,2,2,130,150,Low,Low,5,TRUE,0,3,2,-2,0,4,0,1,0,0,2,Medium,High,0,10,10,1,0,1,130,100,Low,Low,0,NA,1,1,100GBASE-KR4,NONE +74,9,2,0,6,0,0,6,Medium,HIGH,0,2,0,0,0,0,0,0,2,2,130,150,Low,Low,5,TRUE,0,3,2,-2,0,4,0,1,0,0,2,Medium,High,0,10,10,1,0,1,130,100,Low,Low,0,NA,1,1,100GBASE-KR4,NONE +75,9,3,0,6,0,0,6,Medium,HIGH,0,2,0,0,0,0,0,0,2,2,130,150,Low,Low,5,TRUE,0,3,2,-2,0,4,0,1,0,0,2,Medium,High,0,10,10,1,0,1,130,100,Low,Low,0,NA,1,1,100GBASE-KR4,NONE +76,9,4,0,6,0,0,6,Medium,HIGH,0,2,0,0,0,0,0,0,2,2,130,150,Low,Low,5,TRUE,0,3,2,-2,0,4,0,1,0,0,2,Medium,High,0,10,10,1,0,1,130,100,Low,Low,0,NA,1,1,100GBASE-KR4,NONE +77,9,5,0,6,0,0,6,Medium,HIGH,0,2,0,0,0,0,0,0,2,2,130,150,Low,Low,5,TRUE,0,3,2,-2,0,4,0,1,0,0,2,Medium,High,0,10,10,1,0,1,130,100,Low,Low,0,NA,1,1,100GBASE-KR4,NONE +78,9,6,0,6,0,0,6,Medium,HIGH,0,2,0,0,0,0,0,0,2,2,130,150,Low,Low,5,TRUE,0,3,2,-2,0,4,0,1,0,0,2,Medium,High,0,10,10,1,0,1,130,100,Low,Low,0,NA,1,1,100GBASE-KR4,NONE +79,9,7,0,6,0,0,6,Medium,HIGH,0,2,0,0,0,0,0,0,2,2,130,150,Low,Low,5,TRUE,0,3,2,-2,0,4,0,1,0,0,2,Medium,High,0,10,10,1,0,1,130,100,Low,Low,0,NA,1,1,100GBASE-KR4,NONE +80,10,0,0,6,0,0,6,Medium,HIGH,0,2,0,0,0,0,0,0,2,2,130,150,Low,Low,5,TRUE,0,3,2,-2,0,4,0,1,0,0,2,Medium,High,0,10,10,1,0,1,130,100,Low,Low,0,NA,1,1,100GBASE-KR4,NONE +81,10,1,0,6,0,0,6,Medium,HIGH,0,2,0,0,0,0,0,0,2,2,130,150,Low,Low,5,TRUE,0,3,2,-2,0,4,0,1,0,0,2,Medium,High,0,10,10,1,0,1,130,100,Low,Low,0,NA,1,1,100GBASE-KR4,NONE +82,10,2,0,6,0,0,6,Medium,HIGH,0,2,0,0,0,0,0,0,2,2,130,150,Low,Low,5,TRUE,0,3,2,-2,0,4,0,1,0,0,2,Medium,High,0,10,10,1,0,1,130,100,Low,Low,0,NA,1,1,100GBASE-KR4,NONE +83,10,3,0,6,0,0,6,Medium,HIGH,0,2,0,0,0,0,0,0,2,2,130,150,Low,Low,5,TRUE,0,3,2,-2,0,4,0,1,0,0,2,Medium,High,0,10,10,1,0,1,130,100,Low,Low,0,NA,1,1,100GBASE-KR4,NONE +84,10,4,0,6,0,0,6,Medium,HIGH,0,2,0,0,0,0,0,0,2,2,130,150,Low,Low,5,TRUE,0,3,2,-2,0,4,0,1,0,0,2,Medium,High,0,10,10,1,0,1,130,100,Low,Low,0,NA,1,1,100GBASE-KR4,NONE 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+103,12,7,0,6,0,0,6,Medium,HIGH,0,2,0,0,0,0,0,0,2,2,130,150,Low,Low,5,TRUE,0,3,2,-2,0,4,0,1,0,0,2,Medium,High,0,10,10,1,0,1,130,100,Low,Low,0,NA,1,1,100GBASE-KR4,NONE +104,13,0,0,6,0,0,6,Medium,HIGH,0,2,0,0,0,0,0,0,2,2,130,150,Low,Low,5,TRUE,0,3,2,-2,0,4,0,1,0,0,2,Medium,High,0,10,10,1,0,1,130,100,Low,Low,0,NA,1,1,100GBASE-KR4,NONE +105,13,1,0,6,0,0,6,Medium,HIGH,0,2,0,0,0,0,0,0,2,2,130,150,Low,Low,5,TRUE,0,3,2,-2,0,4,0,1,0,0,2,Medium,High,0,10,10,1,0,1,130,100,Low,Low,0,NA,1,1,100GBASE-KR4,NONE +106,13,2,0,6,0,0,6,Medium,HIGH,0,2,0,0,0,0,0,0,2,2,130,150,Low,Low,5,TRUE,0,3,2,-2,0,4,0,1,0,0,2,Medium,High,0,10,10,1,0,1,130,100,Low,Low,0,NA,1,1,100GBASE-KR4,NONE +107,13,3,0,6,0,0,6,Medium,HIGH,0,2,0,0,0,0,0,0,2,2,130,150,Low,Low,5,TRUE,0,3,2,-2,0,4,0,1,0,0,2,Medium,High,0,10,10,1,0,1,130,100,Low,Low,0,NA,1,1,100GBASE-KR4,NONE +108,13,4,0,6,0,0,6,Medium,HIGH,0,2,0,0,0,0,0,0,2,2,130,150,Low,Low,5,TRUE,0,3,2,-2,0,4,0,1,0,0,2,Medium,High,0,10,10,1,0,1,130,100,Low,Low,0,NA,1,1,100GBASE-KR4,NONE +109,13,5,0,6,0,0,6,Medium,HIGH,0,2,0,0,0,0,0,0,2,2,130,150,Low,Low,5,TRUE,0,3,2,-2,0,4,0,1,0,0,2,Medium,High,0,10,10,1,0,1,130,100,Low,Low,0,NA,1,1,100GBASE-KR4,NONE +110,13,6,0,6,0,0,6,Medium,HIGH,0,2,0,0,0,0,0,0,2,2,130,150,Low,Low,5,TRUE,0,3,2,-2,0,4,0,1,0,0,2,Medium,High,0,10,10,1,0,1,130,100,Low,Low,0,NA,1,1,100GBASE-KR4,NONE +111,13,7,0,6,0,0,6,Medium,HIGH,0,2,0,0,0,0,0,0,2,2,130,150,Low,Low,5,TRUE,0,3,2,-2,0,4,0,1,0,0,2,Medium,High,0,10,10,1,0,1,130,100,Low,Low,0,NA,1,1,100GBASE-KR4,NONE +112,14,0,0,6,0,0,6,Medium,HIGH,0,2,0,0,0,0,0,0,2,2,130,150,Low,Low,5,TRUE,0,3,2,-2,0,4,0,1,0,0,2,Medium,High,0,10,10,1,0,1,130,100,Low,Low,0,NA,1,1,100GBASE-KR4,NONE +113,14,1,0,6,0,0,6,Medium,HIGH,0,2,0,0,0,0,0,0,2,2,130,150,Low,Low,5,TRUE,0,3,2,-2,0,4,0,1,0,0,2,Medium,High,0,10,10,1,0,1,130,100,Low,Low,0,NA,1,1,100GBASE-KR4,NONE +114,14,2,0,6,0,0,6,Medium,HIGH,0,2,0,0,0,0,0,0,2,2,130,150,Low,Low,5,TRUE,0,3,2,-2,0,4,0,1,0,0,2,Medium,High,0,10,10,1,0,1,130,100,Low,Low,0,NA,1,1,100GBASE-KR4,NONE +115,14,3,0,6,0,0,6,Medium,HIGH,0,2,0,0,0,0,0,0,2,2,130,150,Low,Low,5,TRUE,0,3,2,-2,0,4,0,1,0,0,2,Medium,High,0,10,10,1,0,1,130,100,Low,Low,0,NA,1,1,100GBASE-KR4,NONE +116,14,4,0,6,0,0,6,Medium,HIGH,0,2,0,0,0,0,0,0,2,2,130,150,Low,Low,5,TRUE,0,3,2,-2,0,4,0,1,0,0,2,Medium,High,0,10,10,1,0,1,130,100,Low,Low,0,NA,1,1,100GBASE-KR4,NONE +117,14,5,0,6,0,0,6,Medium,HIGH,0,2,0,0,0,0,0,0,2,2,130,150,Low,Low,5,TRUE,0,3,2,-2,0,4,0,1,0,0,2,Medium,High,0,10,10,1,0,1,130,100,Low,Low,0,NA,1,1,100GBASE-KR4,NONE +118,14,6,0,6,0,0,6,Medium,HIGH,0,2,0,0,0,0,0,0,2,2,130,150,Low,Low,5,TRUE,0,3,2,-2,0,4,0,1,0,0,2,Medium,High,0,10,10,1,0,1,130,100,Low,Low,0,NA,1,1,100GBASE-KR4,NONE +119,14,7,0,6,0,0,6,Medium,HIGH,0,2,0,0,0,0,0,0,2,2,130,150,Low,Low,5,TRUE,0,3,2,-2,0,4,0,1,0,0,2,Medium,High,0,10,10,1,0,1,130,100,Low,Low,0,NA,1,1,100GBASE-KR4,NONE +120,15,0,0,6,0,0,6,Medium,HIGH,0,2,0,0,0,0,0,0,2,2,130,150,Low,Low,5,TRUE,0,3,2,-2,0,4,0,1,0,0,2,Medium,High,0,10,10,1,0,1,130,100,Low,Low,0,NA,1,1,100GBASE-KR4,NONE +121,15,1,0,6,0,0,6,Medium,HIGH,0,2,0,0,0,0,0,0,2,2,130,150,Low,Low,5,TRUE,0,3,2,-2,0,4,0,1,0,0,2,Medium,High,0,10,10,1,0,1,130,100,Low,Low,0,NA,1,1,100GBASE-KR4,NONE +122,15,2,0,6,0,0,6,Medium,HIGH,0,2,0,0,0,0,0,0,2,2,130,150,Low,Low,5,TRUE,0,3,2,-2,0,4,0,1,0,0,2,Medium,High,0,10,10,1,0,1,130,100,Low,Low,0,NA,1,1,100GBASE-KR4,NONE +123,15,3,0,6,0,0,6,Medium,HIGH,0,2,0,0,0,0,0,0,2,2,130,150,Low,Low,5,TRUE,0,3,2,-2,0,4,0,1,0,0,2,Medium,High,0,10,10,1,0,1,130,100,Low,Low,0,NA,1,1,100GBASE-KR4,NONE +124,15,4,0,6,0,0,6,Medium,HIGH,0,2,0,0,0,0,0,0,2,2,130,150,Low,Low,5,TRUE,0,3,2,-2,0,4,0,1,0,0,2,Medium,High,0,10,10,1,0,1,130,100,Low,Low,0,NA,1,1,100GBASE-KR4,NONE +125,15,5,0,6,0,0,6,Medium,HIGH,0,2,0,0,0,0,0,0,2,2,130,150,Low,Low,5,TRUE,0,3,2,-2,0,4,0,1,0,0,2,Medium,High,0,10,10,1,0,1,130,100,Low,Low,0,NA,1,1,100GBASE-KR4,NONE +126,15,6,0,6,0,0,6,Medium,HIGH,0,2,0,0,0,0,0,0,2,2,130,150,Low,Low,5,TRUE,0,3,2,-2,0,4,0,1,0,0,2,Medium,High,0,10,10,1,0,1,130,100,Low,Low,0,NA,1,1,100GBASE-KR4,NONE +127,15,7,0,6,0,0,6,Medium,HIGH,0,2,0,0,0,0,0,0,2,2,130,150,Low,Low,5,TRUE,0,3,2,-2,0,4,0,1,0,0,2,Medium,High,0,10,10,1,0,1,130,100,Low,Low,0,NA,1,1,100GBASE-KR4,NONE +128,16,0,0,6,0,0,6,Medium,HIGH,0,2,0,0,0,0,0,0,2,2,130,150,Low,Low,5,TRUE,0,3,2,-2,0,4,0,1,0,0,2,Medium,High,0,10,10,1,0,1,130,100,Low,Low,0,NA,1,1,100GBASE-KR4,NONE +129,16,1,0,6,0,0,6,Medium,HIGH,0,2,0,0,0,0,0,0,2,2,130,150,Low,Low,5,TRUE,0,3,2,-2,0,4,0,1,0,0,2,Medium,High,0,10,10,1,0,1,130,100,Low,Low,0,NA,1,1,100GBASE-KR4,NONE +130,16,2,0,6,0,0,6,Medium,HIGH,0,2,0,0,0,0,0,0,2,2,130,150,Low,Low,5,TRUE,0,3,2,-2,0,4,0,1,0,0,2,Medium,High,0,10,10,1,0,1,130,100,Low,Low,0,NA,1,1,100GBASE-KR4,NONE +131,16,3,0,6,0,0,6,Medium,HIGH,0,2,0,0,0,0,0,0,2,2,130,150,Low,Low,5,TRUE,0,3,2,-2,0,4,0,1,0,0,2,Medium,High,0,10,10,1,0,1,130,100,Low,Low,0,NA,1,1,100GBASE-KR4,NONE +132,16,4,0,6,0,0,6,Medium,HIGH,0,2,0,0,0,0,0,0,2,2,130,150,Low,Low,5,TRUE,0,3,2,-2,0,4,0,1,0,0,2,Medium,High,0,10,10,1,0,1,130,100,Low,Low,0,NA,1,1,100GBASE-KR4,NONE +133,16,5,0,6,0,0,6,Medium,HIGH,0,2,0,0,0,0,0,0,2,2,130,150,Low,Low,5,TRUE,0,3,2,-2,0,4,0,1,0,0,2,Medium,High,0,10,10,1,0,1,130,100,Low,Low,0,NA,1,1,100GBASE-KR4,NONE +134,16,6,0,6,0,0,6,Medium,HIGH,0,2,0,0,0,0,0,0,2,2,130,150,Low,Low,5,TRUE,0,3,2,-2,0,4,0,1,0,0,2,Medium,High,0,10,10,1,0,1,130,100,Low,Low,0,NA,1,1,100GBASE-KR4,NONE +135,16,7,0,6,0,0,6,Medium,HIGH,0,2,0,0,0,0,0,0,2,2,130,150,Low,Low,5,TRUE,0,3,2,-2,0,4,0,1,0,0,2,Medium,High,0,10,10,1,0,1,130,100,Low,Low,0,NA,1,1,100GBASE-KR4,NONE +136,17,0,0,6,0,0,6,Medium,HIGH,0,2,0,0,0,0,0,0,2,2,130,150,Low,Low,5,TRUE,0,3,2,-2,0,4,0,1,0,0,2,Medium,High,0,10,10,1,0,1,130,100,Low,Low,0,NA,1,1,100GBASE-KR4,NONE +137,17,1,0,6,0,0,6,Medium,HIGH,0,2,0,0,0,0,0,0,2,2,130,150,Low,Low,5,TRUE,0,3,2,-2,0,4,0,1,0,0,2,Medium,High,0,10,10,1,0,1,130,100,Low,Low,0,NA,1,1,100GBASE-KR4,NONE +138,17,2,0,6,0,0,6,Medium,HIGH,0,2,0,0,0,0,0,0,2,2,130,150,Low,Low,5,TRUE,0,3,2,-2,0,4,0,1,0,0,2,Medium,High,0,10,10,1,0,1,130,100,Low,Low,0,NA,1,1,100GBASE-KR4,NONE +139,17,3,0,6,0,0,6,Medium,HIGH,0,2,0,0,0,0,0,0,2,2,130,150,Low,Low,5,TRUE,0,3,2,-2,0,4,0,1,0,0,2,Medium,High,0,10,10,1,0,1,130,100,Low,Low,0,NA,1,1,100GBASE-KR4,NONE +140,17,4,0,6,0,0,6,Medium,HIGH,0,2,0,0,0,0,0,0,2,2,130,150,Low,Low,5,TRUE,0,3,2,-2,0,4,0,1,0,0,2,Medium,High,0,10,10,1,0,1,130,100,Low,Low,0,NA,1,1,100GBASE-KR4,NONE +141,17,5,0,6,0,0,6,Medium,HIGH,0,2,0,0,0,0,0,0,2,2,130,150,Low,Low,5,TRUE,0,3,2,-2,0,4,0,1,0,0,2,Medium,High,0,10,10,1,0,1,130,100,Low,Low,0,NA,1,1,100GBASE-KR4,NONE +142,17,6,0,6,0,0,6,Medium,HIGH,0,2,0,0,0,0,0,0,2,2,130,150,Low,Low,5,TRUE,0,3,2,-2,0,4,0,1,0,0,2,Medium,High,0,10,10,1,0,1,130,100,Low,Low,0,NA,1,1,100GBASE-KR4,NONE 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+188,23,4,0,6,0,0,6,Medium,HIGH,0,2,0,0,0,0,0,0,2,2,130,150,Low,Low,5,TRUE,0,3,2,-2,0,4,0,1,0,0,2,Medium,High,0,10,10,1,0,1,130,100,Low,Low,0,NA,1,1,100GBASE-KR4,NONE +189,23,5,0,6,0,0,6,Medium,HIGH,0,2,0,0,0,0,0,0,2,2,130,150,Low,Low,5,TRUE,0,3,2,-2,0,4,0,1,0,0,2,Medium,High,0,10,10,1,0,1,130,100,Low,Low,0,NA,1,1,100GBASE-KR4,NONE +190,23,6,0,6,0,0,6,Medium,HIGH,0,2,0,0,0,0,0,0,2,2,130,150,Low,Low,5,TRUE,0,3,2,-2,0,4,0,1,0,0,2,Medium,High,0,10,10,1,0,1,130,100,Low,Low,0,NA,1,1,100GBASE-KR4,NONE +191,23,7,0,6,0,0,6,Medium,HIGH,0,2,0,0,0,0,0,0,2,2,130,150,Low,Low,5,TRUE,0,3,2,-2,0,4,0,1,0,0,2,Medium,High,0,10,10,1,0,1,130,100,Low,Low,0,NA,1,1,100GBASE-KR4,NONE +192,24,0,0,6,0,0,6,Medium,HIGH,0,2,0,0,0,0,0,0,2,2,130,150,Low,Low,5,TRUE,0,3,2,-2,0,4,0,1,0,0,2,Medium,High,0,10,10,1,0,1,130,100,Low,Low,0,NA,1,1,100GBASE-KR4,NONE +193,24,1,0,6,0,0,6,Medium,HIGH,0,2,0,0,0,0,0,0,2,2,130,150,Low,Low,5,TRUE,0,3,2,-2,0,4,0,1,0,0,2,Medium,High,0,10,10,1,0,1,130,100,Low,Low,0,NA,1,1,100GBASE-KR4,NONE +194,24,2,0,6,0,0,6,Medium,HIGH,0,2,0,0,0,0,0,0,2,2,130,150,Low,Low,5,TRUE,0,3,2,-2,0,4,0,1,0,0,2,Medium,High,0,10,10,1,0,1,130,100,Low,Low,0,NA,1,1,100GBASE-KR4,NONE +195,24,3,0,6,0,0,6,Medium,HIGH,0,2,0,0,0,0,0,0,2,2,130,150,Low,Low,5,TRUE,0,3,2,-2,0,4,0,1,0,0,2,Medium,High,0,10,10,1,0,1,130,100,Low,Low,0,NA,1,1,100GBASE-KR4,NONE +196,24,4,0,6,0,0,6,Medium,HIGH,0,2,0,0,0,0,0,0,2,2,130,150,Low,Low,5,TRUE,0,3,2,-2,0,4,0,1,0,0,2,Medium,High,0,10,10,1,0,1,130,100,Low,Low,0,NA,1,1,100GBASE-KR4,NONE +197,24,5,0,6,0,0,6,Medium,HIGH,0,2,0,0,0,0,0,0,2,2,130,150,Low,Low,5,TRUE,0,3,2,-2,0,4,0,1,0,0,2,Medium,High,0,10,10,1,0,1,130,100,Low,Low,0,NA,1,1,100GBASE-KR4,NONE +198,24,6,0,6,0,0,6,Medium,HIGH,0,2,0,0,0,0,0,0,2,2,130,150,Low,Low,5,TRUE,0,3,2,-2,0,4,0,1,0,0,2,Medium,High,0,10,10,1,0,1,130,100,Low,Low,0,NA,1,1,100GBASE-KR4,NONE +199,24,7,0,6,0,0,6,Medium,HIGH,0,2,0,0,0,0,0,0,2,2,130,150,Low,Low,5,TRUE,0,3,2,-2,0,4,0,1,0,0,2,Medium,High,0,10,10,1,0,1,130,100,Low,Low,0,NA,1,1,100GBASE-KR4,NONE +200,25,0,0,6,0,0,6,Medium,HIGH,0,2,0,0,0,0,0,0,2,2,130,150,Low,Low,5,TRUE,0,3,2,-2,0,4,0,1,0,0,2,Medium,High,0,10,10,1,0,1,130,100,Low,Low,0,NA,1,1,100GBASE-KR4,NONE +201,25,1,0,6,0,0,6,Medium,HIGH,0,2,0,0,0,0,0,0,2,2,130,150,Low,Low,5,TRUE,0,3,2,-2,0,4,0,1,0,0,2,Medium,High,0,10,10,1,0,1,130,100,Low,Low,0,NA,1,1,100GBASE-KR4,NONE +202,25,2,0,6,0,0,6,Medium,HIGH,0,2,0,0,0,0,0,0,2,2,130,150,Low,Low,5,TRUE,0,3,2,-2,0,4,0,1,0,0,2,Medium,High,0,10,10,1,0,1,130,100,Low,Low,0,NA,1,1,100GBASE-KR4,NONE +203,25,3,0,6,0,0,6,Medium,HIGH,0,2,0,0,0,0,0,0,2,2,130,150,Low,Low,5,TRUE,0,3,2,-2,0,4,0,1,0,0,2,Medium,High,0,10,10,1,0,1,130,100,Low,Low,0,NA,1,1,100GBASE-KR4,NONE +204,25,4,0,6,0,0,6,Medium,HIGH,0,2,0,0,0,0,0,0,2,2,130,150,Low,Low,5,TRUE,0,3,2,-2,0,4,0,1,0,0,2,Medium,High,0,10,10,1,0,1,130,100,Low,Low,0,NA,1,1,100GBASE-KR4,NONE +205,25,5,0,6,0,0,6,Medium,HIGH,0,2,0,0,0,0,0,0,2,2,130,150,Low,Low,5,TRUE,0,3,2,-2,0,4,0,1,0,0,2,Medium,High,0,10,10,1,0,1,130,100,Low,Low,0,NA,1,1,100GBASE-KR4,NONE +206,25,6,0,6,0,0,6,Medium,HIGH,0,2,0,0,0,0,0,0,2,2,130,150,Low,Low,5,TRUE,0,3,2,-2,0,4,0,1,0,0,2,Medium,High,0,10,10,1,0,1,130,100,Low,Low,0,NA,1,1,100GBASE-KR4,NONE +207,25,7,0,6,0,0,6,Medium,HIGH,0,2,0,0,0,0,0,0,2,2,130,150,Low,Low,5,TRUE,0,3,2,-2,0,4,0,1,0,0,2,Medium,High,0,10,10,1,0,1,130,100,Low,Low,0,NA,1,1,100GBASE-KR4,NONE +208,26,0,0,6,0,0,6,Medium,HIGH,0,2,0,0,0,0,0,0,2,2,130,150,Low,Low,5,TRUE,0,3,2,-2,0,4,0,1,0,0,2,Medium,High,0,10,10,1,0,1,130,100,Low,Low,0,NA,1,1,100GBASE-KR4,NONE +209,26,1,0,6,0,0,6,Medium,HIGH,0,2,0,0,0,0,0,0,2,2,130,150,Low,Low,5,TRUE,0,3,2,-2,0,4,0,1,0,0,2,Medium,High,0,10,10,1,0,1,130,100,Low,Low,0,NA,1,1,100GBASE-KR4,NONE +210,26,2,0,6,0,0,6,Medium,HIGH,0,2,0,0,0,0,0,0,2,2,130,150,Low,Low,5,TRUE,0,3,2,-2,0,4,0,1,0,0,2,Medium,High,0,10,10,1,0,1,130,100,Low,Low,0,NA,1,1,100GBASE-KR4,NONE +211,26,3,0,6,0,0,6,Medium,HIGH,0,2,0,0,0,0,0,0,2,2,130,150,Low,Low,5,TRUE,0,3,2,-2,0,4,0,1,0,0,2,Medium,High,0,10,10,1,0,1,130,100,Low,Low,0,NA,1,1,100GBASE-KR4,NONE +212,26,4,0,6,0,0,6,Medium,HIGH,0,2,0,0,0,0,0,0,2,2,130,150,Low,Low,5,TRUE,0,3,2,-2,0,4,0,1,0,0,2,Medium,High,0,10,10,1,0,1,130,100,Low,Low,0,NA,1,1,100GBASE-KR4,NONE +213,26,5,0,6,0,0,6,Medium,HIGH,0,2,0,0,0,0,0,0,2,2,130,150,Low,Low,5,TRUE,0,3,2,-2,0,4,0,1,0,0,2,Medium,High,0,10,10,1,0,1,130,100,Low,Low,0,NA,1,1,100GBASE-KR4,NONE +214,26,6,0,6,0,0,6,Medium,HIGH,0,2,0,0,0,0,0,0,2,2,130,150,Low,Low,5,TRUE,0,3,2,-2,0,4,0,1,0,0,2,Medium,High,0,10,10,1,0,1,130,100,Low,Low,0,NA,1,1,100GBASE-KR4,NONE +215,26,7,0,6,0,0,6,Medium,HIGH,0,2,0,0,0,0,0,0,2,2,130,150,Low,Low,5,TRUE,0,3,2,-2,0,4,0,1,0,0,2,Medium,High,0,10,10,1,0,1,130,100,Low,Low,0,NA,1,1,100GBASE-KR4,NONE +216,27,0,0,6,0,0,6,Medium,HIGH,0,2,0,0,0,0,0,0,2,2,130,150,Low,Low,5,TRUE,0,3,2,-2,0,4,0,1,0,0,2,Medium,High,0,10,10,1,0,1,130,100,Low,Low,0,NA,1,1,100GBASE-KR4,NONE +217,27,1,0,6,0,0,6,Medium,HIGH,0,2,0,0,0,0,0,0,2,2,130,150,Low,Low,5,TRUE,0,3,2,-2,0,4,0,1,0,0,2,Medium,High,0,10,10,1,0,1,130,100,Low,Low,0,NA,1,1,100GBASE-KR4,NONE +218,27,2,0,6,0,0,6,Medium,HIGH,0,2,0,0,0,0,0,0,2,2,130,150,Low,Low,5,TRUE,0,3,2,-2,0,4,0,1,0,0,2,Medium,High,0,10,10,1,0,1,130,100,Low,Low,0,NA,1,1,100GBASE-KR4,NONE +219,27,3,0,6,0,0,6,Medium,HIGH,0,2,0,0,0,0,0,0,2,2,130,150,Low,Low,5,TRUE,0,3,2,-2,0,4,0,1,0,0,2,Medium,High,0,10,10,1,0,1,130,100,Low,Low,0,NA,1,1,100GBASE-KR4,NONE +220,27,4,0,6,0,0,6,Medium,HIGH,0,2,0,0,0,0,0,0,2,2,130,150,Low,Low,5,TRUE,0,3,2,-2,0,4,0,1,0,0,2,Medium,High,0,10,10,1,0,1,130,100,Low,Low,0,NA,1,1,100GBASE-KR4,NONE +221,27,5,0,6,0,0,6,Medium,HIGH,0,2,0,0,0,0,0,0,2,2,130,150,Low,Low,5,TRUE,0,3,2,-2,0,4,0,1,0,0,2,Medium,High,0,10,10,1,0,1,130,100,Low,Low,0,NA,1,1,100GBASE-KR4,NONE +222,27,6,0,6,0,0,6,Medium,HIGH,0,2,0,0,0,0,0,0,2,2,130,150,Low,Low,5,TRUE,0,3,2,-2,0,4,0,1,0,0,2,Medium,High,0,10,10,1,0,1,130,100,Low,Low,0,NA,1,1,100GBASE-KR4,NONE +223,27,7,0,6,0,0,6,Medium,HIGH,0,2,0,0,0,0,0,0,2,2,130,150,Low,Low,5,TRUE,0,3,2,-2,0,4,0,1,0,0,2,Medium,High,0,10,10,1,0,1,130,100,Low,Low,0,NA,1,1,100GBASE-KR4,NONE +224,28,0,0,6,0,0,6,Medium,HIGH,0,2,0,0,0,0,0,0,2,2,130,150,Low,Low,5,TRUE,0,3,2,-2,0,4,0,1,0,0,2,Medium,High,0,10,10,1,0,1,130,100,Low,Low,0,NA,1,1,100GBASE-KR4,NONE +225,28,1,0,6,0,0,6,Medium,HIGH,0,2,0,0,0,0,0,0,2,2,130,150,Low,Low,5,TRUE,0,3,2,-2,0,4,0,1,0,0,2,Medium,High,0,10,10,1,0,1,130,100,Low,Low,0,NA,1,1,100GBASE-KR4,NONE +226,28,2,0,6,0,0,6,Medium,HIGH,0,2,0,0,0,0,0,0,2,2,130,150,Low,Low,5,TRUE,0,3,2,-2,0,4,0,1,0,0,2,Medium,High,0,10,10,1,0,1,130,100,Low,Low,0,NA,1,1,100GBASE-KR4,NONE +227,28,3,0,6,0,0,6,Medium,HIGH,0,2,0,0,0,0,0,0,2,2,130,150,Low,Low,5,TRUE,0,3,2,-2,0,4,0,1,0,0,2,Medium,High,0,10,10,1,0,1,130,100,Low,Low,0,NA,1,1,100GBASE-KR4,NONE +228,28,4,0,6,0,0,6,Medium,HIGH,0,2,0,0,0,0,0,0,2,2,130,150,Low,Low,5,TRUE,0,3,2,-2,0,4,0,1,0,0,2,Medium,High,0,10,10,1,0,1,130,100,Low,Low,0,NA,1,1,100GBASE-KR4,NONE +229,28,5,0,6,0,0,6,Medium,HIGH,0,2,0,0,0,0,0,0,2,2,130,150,Low,Low,5,TRUE,0,3,2,-2,0,4,0,1,0,0,2,Medium,High,0,10,10,1,0,1,130,100,Low,Low,0,NA,1,1,100GBASE-KR4,NONE +230,28,6,0,6,0,0,6,Medium,HIGH,0,2,0,0,0,0,0,0,2,2,130,150,Low,Low,5,TRUE,0,3,2,-2,0,4,0,1,0,0,2,Medium,High,0,10,10,1,0,1,130,100,Low,Low,0,NA,1,1,100GBASE-KR4,NONE +231,28,7,0,6,0,0,6,Medium,HIGH,0,2,0,0,0,0,0,0,2,2,130,150,Low,Low,5,TRUE,0,3,2,-2,0,4,0,1,0,0,2,Medium,High,0,10,10,1,0,1,130,100,Low,Low,0,NA,1,1,100GBASE-KR4,NONE +232,29,0,0,6,0,0,6,Medium,HIGH,0,2,0,0,0,0,0,0,2,2,130,150,Low,Low,5,TRUE,0,3,2,-2,0,4,0,1,0,0,2,Medium,High,0,10,10,1,0,1,130,100,Low,Low,0,NA,1,1,100GBASE-KR4,NONE +233,29,1,0,6,0,0,6,Medium,HIGH,0,2,0,0,0,0,0,0,2,2,130,150,Low,Low,5,TRUE,0,3,2,-2,0,4,0,1,0,0,2,Medium,High,0,10,10,1,0,1,130,100,Low,Low,0,NA,1,1,100GBASE-KR4,NONE +234,29,2,0,6,0,0,6,Medium,HIGH,0,2,0,0,0,0,0,0,2,2,130,150,Low,Low,5,TRUE,0,3,2,-2,0,4,0,1,0,0,2,Medium,High,0,10,10,1,0,1,130,100,Low,Low,0,NA,1,1,100GBASE-KR4,NONE +235,29,3,0,6,0,0,6,Medium,HIGH,0,2,0,0,0,0,0,0,2,2,130,150,Low,Low,5,TRUE,0,3,2,-2,0,4,0,1,0,0,2,Medium,High,0,10,10,1,0,1,130,100,Low,Low,0,NA,1,1,100GBASE-KR4,NONE +236,29,4,0,6,0,0,6,Medium,HIGH,0,2,0,0,0,0,0,0,2,2,130,150,Low,Low,5,TRUE,0,3,2,-2,0,4,0,1,0,0,2,Medium,High,0,10,10,1,0,1,130,100,Low,Low,0,NA,1,1,100GBASE-KR4,NONE +237,29,5,0,6,0,0,6,Medium,HIGH,0,2,0,0,0,0,0,0,2,2,130,150,Low,Low,5,TRUE,0,3,2,-2,0,4,0,1,0,0,2,Medium,High,0,10,10,1,0,1,130,100,Low,Low,0,NA,1,1,100GBASE-KR4,NONE +238,29,6,0,6,0,0,6,Medium,HIGH,0,2,0,0,0,0,0,0,2,2,130,150,Low,Low,5,TRUE,0,3,2,-2,0,4,0,1,0,0,2,Medium,High,0,10,10,1,0,1,130,100,Low,Low,0,NA,1,1,100GBASE-KR4,NONE +239,29,7,0,6,0,0,6,Medium,HIGH,0,2,0,0,0,0,0,0,2,2,130,150,Low,Low,5,TRUE,0,3,2,-2,0,4,0,1,0,0,2,Medium,High,0,10,10,1,0,1,130,100,Low,Low,0,NA,1,1,100GBASE-KR4,NONE +240,30,0,0,6,0,0,6,Medium,HIGH,0,2,0,0,0,0,0,0,2,2,130,150,Low,Low,5,TRUE,0,3,2,-2,0,4,0,1,0,0,2,Medium,High,0,10,10,1,0,1,130,100,Low,Low,0,NA,1,1,100GBASE-KR4,NONE +241,30,1,0,6,0,0,6,Medium,HIGH,0,2,0,0,0,0,0,0,2,2,130,150,Low,Low,5,TRUE,0,3,2,-2,0,4,0,1,0,0,2,Medium,High,0,10,10,1,0,1,130,100,Low,Low,0,NA,1,1,100GBASE-KR4,NONE +242,30,2,0,6,0,0,6,Medium,HIGH,0,2,0,0,0,0,0,0,2,2,130,150,Low,Low,5,TRUE,0,3,2,-2,0,4,0,1,0,0,2,Medium,High,0,10,10,1,0,1,130,100,Low,Low,0,NA,1,1,100GBASE-KR4,NONE +243,30,3,0,6,0,0,6,Medium,HIGH,0,2,0,0,0,0,0,0,2,2,130,150,Low,Low,5,TRUE,0,3,2,-2,0,4,0,1,0,0,2,Medium,High,0,10,10,1,0,1,130,100,Low,Low,0,NA,1,1,100GBASE-KR4,NONE +244,30,4,0,6,0,0,6,Medium,HIGH,0,2,0,0,0,0,0,0,2,2,130,150,Low,Low,5,TRUE,0,3,2,-2,0,4,0,1,0,0,2,Medium,High,0,10,10,1,0,1,130,100,Low,Low,0,NA,1,1,100GBASE-KR4,NONE +245,30,5,0,6,0,0,6,Medium,HIGH,0,2,0,0,0,0,0,0,2,2,130,150,Low,Low,5,TRUE,0,3,2,-2,0,4,0,1,0,0,2,Medium,High,0,10,10,1,0,1,130,100,Low,Low,0,NA,1,1,100GBASE-KR4,NONE +246,30,6,0,6,0,0,6,Medium,HIGH,0,2,0,0,0,0,0,0,2,2,130,150,Low,Low,5,TRUE,0,3,2,-2,0,4,0,1,0,0,2,Medium,High,0,10,10,1,0,1,130,100,Low,Low,0,NA,1,1,100GBASE-KR4,NONE +247,30,7,0,6,0,0,6,Medium,HIGH,0,2,0,0,0,0,0,0,2,2,130,150,Low,Low,5,TRUE,0,3,2,-2,0,4,0,1,0,0,2,Medium,High,0,10,10,1,0,1,130,100,Low,Low,0,NA,1,1,100GBASE-KR4,NONE +248,31,0,0,6,0,0,6,Medium,HIGH,0,2,0,0,0,0,0,0,2,2,130,150,Low,Low,5,TRUE,0,3,2,-2,0,4,0,1,0,0,2,Medium,High,0,10,10,1,0,1,130,100,Low,Low,0,NA,1,1,100GBASE-KR4,NONE +249,31,1,0,6,0,0,6,Medium,HIGH,0,2,0,0,0,0,0,0,2,2,130,150,Low,Low,5,TRUE,0,3,2,-2,0,4,0,1,0,0,2,Medium,High,0,10,10,1,0,1,130,100,Low,Low,0,NA,1,1,100GBASE-KR4,NONE +250,31,2,0,6,0,0,6,Medium,HIGH,0,2,0,0,0,0,0,0,2,2,130,150,Low,Low,5,TRUE,0,3,2,-2,0,4,0,1,0,0,2,Medium,High,0,10,10,1,0,1,130,100,Low,Low,0,NA,1,1,100GBASE-KR4,NONE +251,31,3,0,6,0,0,6,Medium,HIGH,0,2,0,0,0,0,0,0,2,2,130,150,Low,Low,5,TRUE,0,3,2,-2,0,4,0,1,0,0,2,Medium,High,0,10,10,1,0,1,130,100,Low,Low,0,NA,1,1,100GBASE-KR4,NONE +252,31,4,0,6,0,0,6,Medium,HIGH,0,2,0,0,0,0,0,0,2,2,130,150,Low,Low,5,TRUE,0,3,2,-2,0,4,0,1,0,0,2,Medium,High,0,10,10,1,0,1,130,100,Low,Low,0,NA,1,1,100GBASE-KR4,NONE +253,31,5,0,6,0,0,6,Medium,HIGH,0,2,0,0,0,0,0,0,2,2,130,150,Low,Low,5,TRUE,0,3,2,-2,0,4,0,1,0,0,2,Medium,High,0,10,10,1,0,1,130,100,Low,Low,0,NA,1,1,100GBASE-KR4,NONE +254,31,6,0,6,0,0,6,Medium,HIGH,0,2,0,0,0,0,0,0,2,2,130,150,Low,Low,5,TRUE,0,3,2,-2,0,4,0,1,0,0,2,Medium,High,0,10,10,1,0,1,130,100,Low,Low,0,NA,1,1,100GBASE-KR4,NONE +255,31,7,0,6,0,0,6,Medium,HIGH,0,2,0,0,0,0,0,0,2,2,130,150,Low,Low,5,TRUE,0,3,2,-2,0,4,0,1,0,0,2,Medium,High,0,10,10,1,0,1,130,100,Low,Low,0,NA,1,1,100GBASE-KR4,NONE +256,32,0,0,0,0,0,0,Medium,HIGH,0,2,0,0,0,0,0,0,2,2,130,150,Low,Low,5,TRUE,0,3,2,-2,0,4,0,2,0,0,2,Medium,High,0,10,10,1,0,1,130,100,Low,Low,0,NA,1,1,10GBASE-CR4,NONE +257,32,1,0,0,0,0,0,Medium,HIGH,0,2,0,0,0,0,0,0,2,2,130,150,Low,Low,5,TRUE,0,3,2,-2,0,4,0,2,0,0,2,Medium,High,0,10,10,1,0,1,130,100,Low,Low,0,NA,1,1,10GBASE-CR4,NONE diff --git a/device/supermicro/x86_64-supermicro_sse_t7132s-r0/CSV/TL7_Optics.csv b/device/supermicro/x86_64-supermicro_sse_t7132s-r0/CSV/TL7_Optics.csv new file mode 100755 index 0000000000..07ac2b449d --- /dev/null +++ b/device/supermicro/x86_64-supermicro_sse_t7132s-r0/CSV/TL7_Optics.csv @@ -0,0 +1,263 @@ +VERSION,CABLE TYPE,VENDOR,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,, +1.2,OPTICS,GENERIC,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,, +,,,SPEED,ENCODING,,,,,,,,,,SPEED,ENCODING,,,,,,,,,,,,,,SPEED,ENCODING,,,,,, +,,,50G/400G,PAM4,,,,,,,,,,25G/100G,NRZ,,,,,,,,,,,,,,10G/40G,NRZ,,,,,, +index,Front Port,lane,TX_EQ_ATTN,TX_EQ_PRE1,TX_EQ_PRE2,TX_EQ_PRE3,TX_EQ_POST,Optical Module CTLE,RX_EQ_COARSE_TUNE_EFFORT_50G,RX_EQ_FINE_TUNE_EFFORT_50G,RX_GAINSHAPE1,RX_GAINSHAPE2,LINK_TRAINING,TX_EQ_ATTN,TX_EQ_PRE1,TX_EQ_PRE2,TX_EQ_PRE3,TX_EQ_POST,Optical Module CTLE,RX_GAINSHAPE1,RX_GAINSHAPE2,RX_AGC_TARGET,RX_EYE_DISQUALIFY_THRESHOLD_25G,RX_EQ_COARSE_TUNE_EFFORT_25G,RX_EQ_FINE_TUNE_EFFORT_25G,SD_RESET_THRESHOLD,SD_RESET_25G,LINK_TRAINING,TX_EQ_ATTN,TX_EQ_PRE1,TX_EQ_PRE2,TX_EQ_PRE3,TX_EQ_POST,RX_GAINSHAPE1,RX_GAINSHAPE2,LINK_TRAINING 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+1.2,RJ45,GENERIC,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,, +,,,SPEED,ENCODING,,,,,,,,,,SPEED,ENCODING,,,,,,,,,,,,,,SPEED,ENCODING,,,,,, +,,,50G/400G,PAM4,,,,,,,,,,25G/100G,NRZ,,,,,,,,,,,,,,10G/40G,NRZ,,,,,, +index,Front Port,lane,TX_EQ_ATTN,TX_EQ_PRE1,TX_EQ_PRE2,TX_EQ_PRE3,TX_EQ_POST,Optical Module CTLE,RX_EQ_COARSE_TUNE_EFFORT_50G,RX_EQ_FINE_TUNE_EFFORT_50G,RX_GAINSHAPE1,RX_GAINSHAPE2,LINK_TRAINING,TX_EQ_ATTN,TX_EQ_PRE1,TX_EQ_PRE2,TX_EQ_PRE3,TX_EQ_POST,Optical Module CTLE,RX_GAINSHAPE1,RX_GAINSHAPE2,RX_AGC_TARGET,RX_EYE_DISQUALIFY_THRESHOLD_25G,RX_EQ_COARSE_TUNE_EFFORT_25G,RX_EQ_FINE_TUNE_EFFORT_25G,SD_RESET_THRESHOLD,SD_RESET_25G,LINK_TRAINING,TX_EQ_ATTN,TX_EQ_PRE1,TX_EQ_PRE2,TX_EQ_PRE3,TX_EQ_POST,RX_GAINSHAPE1,RX_GAINSHAPE2,LINK_TRAINING +256,32,0,0,4,0,0,4,4.5,Medium,High,0,2,0,0,4,0,0,4,4,0,0,100,100,LOW,LOW,NA,FALSE,0,0,0,0,0,0,0,0,0 +257,32,1,0,4,0,0,2,5.5,Medium,High,0,2,0,0,4,0,1,2,4,0,0,100,100,LOW,LOW,NA,FALSE,0,0,0,0,0,0,0,0,0 diff --git a/device/supermicro/x86_64-supermicro_sse_t7132s-r0/Supermicro_sse_t7132s/buffers.json.j2 b/device/supermicro/x86_64-supermicro_sse_t7132s-r0/Supermicro_sse_t7132s/buffers.json.j2 new file mode 100755 index 0000000000..9b95afc21f --- /dev/null +++ b/device/supermicro/x86_64-supermicro_sse_t7132s-r0/Supermicro_sse_t7132s/buffers.json.j2 @@ -0,0 +1,167 @@ +{# Default values which will be used if no actual configura available #} +{% set default_cable = '40m' %} +{% set mgmt_port_name = ['Ethernet256','Ethernet257'] %} + +{# Port configuration to cable length look-up table #} +{# Each record describes mapping of DUT (DUT port) role and neighbor role to cable length #} +{# Roles described in the minigraph #} +{% set ports2cable = { + 'torrouter_server' : '5m', + 'leafrouter_torrouter' : '40m', + 'spinerouter_leafrouter' : '300m' + } +%} + +{%- macro cable_length(port_name) %} + {%- set cable_len = [] %} + {%- for local_port in DEVICE_NEIGHBOR %} + {%- if local_port == port_name %} + {%- if DEVICE_NEIGHBOR_METADATA is defined and DEVICE_NEIGHBOR_METADATA[DEVICE_NEIGHBOR[local_port].name] %} + {%- set neighbor = DEVICE_NEIGHBOR_METADATA[DEVICE_NEIGHBOR[local_port].name] %} + {%- set neighbor_role = neighbor.type %} + {%- set roles1 = switch_role + '_' + neighbor_role %} + {%- set roles2 = neighbor_role + '_' + switch_role %} + {%- set roles1 = roles1 | lower %} + {%- set roles2 = roles2 | lower %} + {%- if roles1 in ports2cable %} + {%- if cable_len.append(ports2cable[roles1]) %}{% endif %} + {%- elif roles2 in ports2cable %} + {%- if cable_len.append(ports2cable[roles2]) %}{% endif %} + {%- endif %} + {%- endif %} + {%- endif %} + {%- endfor %} + {%- if cable_len -%} + {{ cable_len.0 }} + {%- else %} + {%- if switch_role.lower() == 'torrouter' %} + {%- for local_port in VLAN_MEMBER %} + {%- if local_port[1] == port_name %} + {%- set roles3 = switch_role + '_' + 'server' %} + {%- set roles3 = roles3 | lower %} + {%- if roles3 in ports2cable %} + {%- if cable_len.append(ports2cable[roles3]) %}{% endif %} + {%- endif %} + {%- endif %} + {%- endfor %} + {%- if cable_len -%} + {{ cable_len.0 }} + {%- else -%} + {{ default_cable }} + {%- endif %} + {%- else -%} + {{ default_cable }} + {%- endif %} + {%- endif %} +{%- endmacro %} + +{%- if DEVICE_METADATA is defined %} +{%- set switch_role = DEVICE_METADATA['localhost']['type'] %} +{%- endif -%} + +{% set port_names_list = [] %} +{% for port in PORT %} + {% if port not in mgmt_port_name %} + {%- if port_names_list.append(port) %}{% endif %} + {% endif %} +{% endfor %} +{% set port_names = port_names_list | join(',') -%} + +{ + "CABLE_LENGTH": { + "AZURE": { + {% for port in PORT %} + {% if port not in mgmt_port_name %} + {% set cable = cable_length(port) -%} + "{{ port }}": "{{ cable }}"{%- if not loop.last -%},{% endif %} + {% endif %} + {% endfor %} + } + }, + "BUFFER_POOL": { + "ingress_lossless_pool": { + "size": "51691264", + "type": "ingress", + "mode": "dynamic", + "xoff": "17708800" + }, + "lossy_pool": { + "size": "18874368", + "type": "egress", + "mode": "dynamic", + "xoff": "0" + }, + "egress_lossless_pool": { + "size": "70565632", + "type": "egress", + "mode": "static" + } + }, + "BUFFER_PROFILE": { + "ingress_lossless_profile": { + "pool":"ingress_lossless_pool", + "xoff":"38816", + "size":"1518", + "dynamic_th":"1", + "xon_offset":"9408" + }, + "egress_lossless_profile": { + "pool":"ingress_lossless_pool", + "size":"0", + "static_th":"10243072" + }, + "ingress_lossy_profile": { + "pool":"lossy_pool", + "size":"0", + "static_th":"10243072" + }, + "egress_lossy_profile": { + "pool":"lossy_pool", + "size":"1518", + "dynamic_th":"2" + } + }, + "BUFFER_PG": { +{% for port in port_names_list %} + "{{ port }}|3-4": { + {% set cable = cable_length(port) -%} + "profile" : "pg_lossless_400000_{{ cable }}_profile" + }, +{% endfor %} +{% for port in port_names_list %} + "{{ port }}|0": { + "profile" : "ingress_lossy_profile" + }, +{% endfor %} +{% for port in port_names_list %} + "{{ port }}|1-2": { + "profile" : "ingress_lossy_profile" + }, +{% endfor %} +{% for port in port_names_list %} + "{{ port }}|5-7": { + "profile" : "ingress_lossy_profile" + }{% if not loop.last %},{% endif %} + +{% endfor %} + }, + + "BUFFER_QUEUE": { +{% for port in port_names_list %} + "{{ port }}|3-4": { + "profile" : "egress_lossless_profile" + }, +{% endfor %} +{% for port in port_names_list %} + "{{ port }}|0-2": { + "profile" : "egress_lossy_profile" + }, +{% endfor %} +{% for port in port_names_list %} + "{{ port }}|5-7": { + "profile" : "egress_lossy_profile" + }{% if not loop.last %},{% endif %} + +{% endfor %} + } +} diff --git a/device/supermicro/x86_64-supermicro_sse_t7132s-r0/Supermicro_sse_t7132s/buffers_defaults_def_lossy.j2 b/device/supermicro/x86_64-supermicro_sse_t7132s-r0/Supermicro_sse_t7132s/buffers_defaults_def_lossy.j2 new file mode 100644 index 0000000000..8b1291ac26 --- /dev/null +++ b/device/supermicro/x86_64-supermicro_sse_t7132s-r0/Supermicro_sse_t7132s/buffers_defaults_def_lossy.j2 @@ -0,0 +1,45 @@ +{% set mgmt_port_name = ['Ethernet256','Ethernet257'] %} +{% set port_names_list = [] %} +{% for port in PORT %} + {% if port not in mgmt_port_name %} + {%- if port_names_list.append(port) %}{% endif %} + {% endif %} +{% endfor %} +{% set port_names = port_names_list | join(',') -%} + +{ + "BUFFER_POOL": { + "lossy_pool": { + "size": "61458432", + "type": "egress", + "mode": "dynamic", + "xoff": "0" + } + }, + "BUFFER_PROFILE": { + "ingress_lossy_profile": { + "pool":"lossy_pool", + "size":"0", + "static_th":"10243072" + }, + "egress_lossy_profile": { + "pool":"lossy_pool", + "size":"1518", + "dynamic_th":"2" + } + }, + "BUFFER_PG": { +{% for port in port_names_list %} + "{{ port }}|0-7": { + "profile" : "ingress_lossy_profile" + }{% if not loop.last %},{% endif %} +{% endfor %} + }, + "BUFFER_QUEUE": { +{% for port in port_names_list %} + "{{ port }}|0-7": { + "profile" : "egress_lossy_profile" + }{% if not loop.last %},{% endif %} +{% endfor %} + } +} diff --git a/device/supermicro/x86_64-supermicro_sse_t7132s-r0/Supermicro_sse_t7132s/buffers_defaults_t1.j2 b/device/supermicro/x86_64-supermicro_sse_t7132s-r0/Supermicro_sse_t7132s/buffers_defaults_t1.j2 new file mode 100755 index 0000000000..9b95afc21f --- /dev/null +++ b/device/supermicro/x86_64-supermicro_sse_t7132s-r0/Supermicro_sse_t7132s/buffers_defaults_t1.j2 @@ -0,0 +1,167 @@ +{# Default values which will be used if no actual configura available #} +{% set default_cable = '40m' %} +{% set mgmt_port_name = ['Ethernet256','Ethernet257'] %} + +{# Port configuration to cable length look-up table #} +{# Each record describes mapping of DUT (DUT port) role and neighbor role to cable length #} +{# Roles described in the minigraph #} +{% set ports2cable = { + 'torrouter_server' : '5m', + 'leafrouter_torrouter' : '40m', + 'spinerouter_leafrouter' : '300m' + } +%} + +{%- macro cable_length(port_name) %} + {%- set cable_len = [] %} + {%- for local_port in DEVICE_NEIGHBOR %} + {%- if local_port == port_name %} + {%- if DEVICE_NEIGHBOR_METADATA is defined and DEVICE_NEIGHBOR_METADATA[DEVICE_NEIGHBOR[local_port].name] %} + {%- set neighbor = DEVICE_NEIGHBOR_METADATA[DEVICE_NEIGHBOR[local_port].name] %} + {%- set neighbor_role = neighbor.type %} + {%- set roles1 = switch_role + '_' + neighbor_role %} + {%- set roles2 = neighbor_role + '_' + switch_role %} + {%- set roles1 = roles1 | lower %} + {%- set roles2 = roles2 | lower %} + {%- if roles1 in ports2cable %} + {%- if cable_len.append(ports2cable[roles1]) %}{% endif %} + {%- elif roles2 in ports2cable %} + {%- if cable_len.append(ports2cable[roles2]) %}{% endif %} + {%- endif %} + {%- endif %} + {%- endif %} + {%- endfor %} + {%- if cable_len -%} + {{ cable_len.0 }} + {%- else %} + {%- if switch_role.lower() == 'torrouter' %} + {%- for local_port in VLAN_MEMBER %} + {%- if local_port[1] == port_name %} + {%- set roles3 = switch_role + '_' + 'server' %} + {%- set roles3 = roles3 | lower %} + {%- if roles3 in ports2cable %} + {%- if cable_len.append(ports2cable[roles3]) %}{% endif %} + {%- endif %} + {%- endif %} + {%- endfor %} + {%- if cable_len -%} + {{ cable_len.0 }} + {%- else -%} + {{ default_cable }} + {%- endif %} + {%- else -%} + {{ default_cable }} + {%- endif %} + {%- endif %} +{%- endmacro %} + +{%- if DEVICE_METADATA is defined %} +{%- set switch_role = DEVICE_METADATA['localhost']['type'] %} +{%- endif -%} + +{% set port_names_list = [] %} +{% for port in PORT %} + {% if port not in mgmt_port_name %} + {%- if port_names_list.append(port) %}{% endif %} + {% endif %} +{% endfor %} +{% set port_names = port_names_list | join(',') -%} + +{ + "CABLE_LENGTH": { + "AZURE": { + {% for port in PORT %} + {% if port not in mgmt_port_name %} + {% set cable = cable_length(port) -%} + "{{ port }}": "{{ cable }}"{%- if not loop.last -%},{% endif %} + {% endif %} + {% endfor %} + } + }, + "BUFFER_POOL": { + "ingress_lossless_pool": { + "size": "51691264", + "type": "ingress", + "mode": "dynamic", + "xoff": "17708800" + }, + "lossy_pool": { + "size": "18874368", + "type": "egress", + "mode": "dynamic", + "xoff": "0" + }, + "egress_lossless_pool": { + "size": "70565632", + "type": "egress", + "mode": "static" + } + }, + "BUFFER_PROFILE": { + "ingress_lossless_profile": { + "pool":"ingress_lossless_pool", + "xoff":"38816", + "size":"1518", + "dynamic_th":"1", + "xon_offset":"9408" + }, + "egress_lossless_profile": { + "pool":"ingress_lossless_pool", + "size":"0", + "static_th":"10243072" + }, + "ingress_lossy_profile": { + "pool":"lossy_pool", + "size":"0", + "static_th":"10243072" + }, + "egress_lossy_profile": { + "pool":"lossy_pool", + "size":"1518", + "dynamic_th":"2" + } + }, + "BUFFER_PG": { +{% for port in port_names_list %} + "{{ port }}|3-4": { + {% set cable = cable_length(port) -%} + "profile" : "pg_lossless_400000_{{ cable }}_profile" + }, +{% endfor %} +{% for port in port_names_list %} + "{{ port }}|0": { + "profile" : "ingress_lossy_profile" + }, +{% endfor %} +{% for port in port_names_list %} + "{{ port }}|1-2": { + "profile" : "ingress_lossy_profile" + }, +{% endfor %} +{% for port in port_names_list %} + "{{ port }}|5-7": { + "profile" : "ingress_lossy_profile" + }{% if not loop.last %},{% endif %} + +{% endfor %} + }, + + "BUFFER_QUEUE": { +{% for port in port_names_list %} + "{{ port }}|3-4": { + "profile" : "egress_lossless_profile" + }, +{% endfor %} +{% for port in port_names_list %} + "{{ port }}|0-2": { + "profile" : "egress_lossy_profile" + }, +{% endfor %} +{% for port in port_names_list %} + "{{ port }}|5-7": { + "profile" : "egress_lossy_profile" + }{% if not loop.last %},{% endif %} + +{% endfor %} + } +} diff --git a/device/supermicro/x86_64-supermicro_sse_t7132s-r0/Supermicro_sse_t7132s/config_32x400G_sse_t7132s.yaml b/device/supermicro/x86_64-supermicro_sse_t7132s-r0/Supermicro_sse_t7132s/config_32x400G_sse_t7132s.yaml new file mode 100644 index 0000000000..9c84910a1f --- /dev/null +++ b/device/supermicro/x86_64-supermicro_sse_t7132s-r0/Supermicro_sse_t7132s/config_32x400G_sse_t7132s.yaml @@ -0,0 +1,440 @@ +ifcs: + options: + log_level: "info" +nodes: +- node_id: "0" + options: + sd_low_power_mode_global_default: "true" + sku: "configs/sku/innovium.77700_A" + netdev: + - auto_create: "no" + multi_interface: "yes" + pcie_attn: "10, 0, 0, 0" + pcie_post: "10, 0, 0, 0" + pcie_pre1: "0, 0, 0, 0" + buffer_management_mode: "api_driven" + wred_cr_ip_proto_list: "17" + cr_assignment_mode: "1" + max_lossless_tc: "2" + ilpm_enable: "1" + ecn_stats_enable: "1" + forward_profile: "IFCS_FORWARD_PROFILE_ID_PROFILE_E" + led_cfg_sck_rate: "0x5" + led_refresh_precliff_timer: "0x18eec2" + led_refresh_cliff_timer: "0x15e" + led_cfg_pic_stream_mode: "1" + led_refresh_tmr_ctl_enable: "1" + txring: + - txring_id: "0" + desc_count: "1024" + prio: "1" + netdev: "true" + - txring_id: "1" + desc_count: "1024" + prio: "1" + netdev: "true" + - txring_id: "2" + desc_count: "1024" + prio: "1" + netdev: "true" + - txring_id: "3" + desc_count: "1024" + prio: "1" + netdev: "true" + rxring: + - rxring_id: "0" + desc_count: "1024" + prio: "1" + netdev: "true" + queues: "0, 3, 6, 9, 12, 15, 18, 21, 24, 27, 30, 33, 36, 39" + - rxring_id: "1" + desc_count: "1024" + prio: "1" + netdev: "true" + queues: "1, 4, 7, 10, 13, 16, 19, 22, 25, 28, 31, 34, 37, 40" + - rxring_id: "2" + desc_count: "1024" + prio: "1" + netdev: "true" + queues: "2, 5, 8, 11, 14, 17, 20, 23, 26, 29, 32, 35, 38, 41, 47" + - rxring_id: "3" + desc_count: "1024" + prio: "1" + queues: "42, 43, 44, 45, 46" + sys_clk: "1720" + ifc_clk: "1200" + mac_clk: "1340" + + devports: + - id: "0" + sysport: "1000" + type: "cpu" + - fec: "KPFEC" + id: "241" + lanes: "0:8" + serdes_group: "30" + speed: "400G" + sysport: "241" + type: "eth" + - fec: "KPFEC" + id: "249" + lanes: "0:8" + serdes_group: "31" + speed: "400G" + sysport: "249" + type: "eth" + - fec: "KPFEC" + id: "225" + lanes: "0:8" + serdes_group: "28" + speed: "400G" + sysport: "225" + type: "eth" + - fec: "KPFEC" + id: "233" + lanes: "0:8" + serdes_group: "29" + speed: "400G" + sysport: "233" + type: "eth" + - fec: "KPFEC" + id: "217" + lanes: "0:8" + serdes_group: "27" + speed: "400G" + sysport: "217" + type: "eth" + - fec: "KPFEC" + id: "209" + lanes: "0:8" + serdes_group: "26" + speed: "400G" + sysport: "209" + type: "eth" + - fec: "KPFEC" + id: "201" + lanes: "0:8" + serdes_group: "25" + speed: "400G" + sysport: "201" + type: "eth" + - fec: "KPFEC" + id: "193" + lanes: "0:8" + serdes_group: "24" + speed: "400G" + sysport: "193" + type: "eth" + - fec: "KPFEC" + id: "185" + lanes: "0:8" + serdes_group: "23" + speed: "400G" + sysport: "185" + type: "eth" + - fec: "KPFEC" + id: "177" + lanes: "0:8" + serdes_group: "22" + speed: "400G" + sysport: "177" + type: "eth" + - fec: "KPFEC" + id: "169" + lanes: "0:8" + serdes_group: "21" + speed: "400G" + sysport: "169" + type: "eth" + - fec: "KPFEC" + id: "161" + lanes: "0:8" + serdes_group: "20" + speed: "400G" + sysport: "161" + type: "eth" + - fec: "KPFEC" + id: "153" + lanes: "0:8" + serdes_group: "19" + speed: "400G" + sysport: "153" + type: "eth" + - fec: "KPFEC" + id: "145" + lanes: "0:8" + serdes_group: "18" + speed: "400G" + sysport: "145" + type: "eth" + - fec: "KPFEC" + id: "137" + lanes: "0:8" + serdes_group: "17" + speed: "400G" + sysport: "137" + type: "eth" + - fec: "KPFEC" + id: "129" + lanes: "0:8" + serdes_group: "16" + speed: "400G" + sysport: "129" + type: "eth" + - fec: "KPFEC" + id: "121" + lanes: "0:8" + serdes_group: "15" + speed: "400G" + sysport: "121" + type: "eth" + - fec: "KPFEC" + id: "113" + lanes: "0:8" + serdes_group: "14" + speed: "400G" + sysport: "113" + type: "eth" + - fec: "KPFEC" + id: "105" + lanes: "0:8" + serdes_group: "13" + speed: "400G" + sysport: "105" + type: "eth" + - fec: "KPFEC" + id: "97" + lanes: "0:8" + serdes_group: "12" + speed: "400G" + sysport: "97" + type: "eth" + - fec: "KPFEC" + id: "89" + lanes: "0:8" + serdes_group: "11" + speed: "400G" + sysport: "89" + type: "eth" + - fec: "KPFEC" + id: "81" + lanes: "0:8" + serdes_group: "10" + speed: "400G" + sysport: "81" + type: "eth" + - fec: "KPFEC" + id: "73" + lanes: "0:8" + serdes_group: "9" + speed: "400G" + sysport: "73" + type: "eth" + - fec: "KPFEC" + id: "65" + lanes: "0:8" + serdes_group: "8" + speed: "400G" + sysport: "65" + type: "eth" + - fec: "KPFEC" + id: "57" + lanes: "0:8" + serdes_group: "7" + speed: "400G" + sysport: "57" + type: "eth" + - fec: "KPFEC" + id: "49" + lanes: "0:8" + serdes_group: "6" + speed: "400G" + sysport: "49" + type: "eth" + - fec: "KPFEC" + id: "41" + lanes: "0:8" + serdes_group: "5" + speed: "400G" + sysport: "41" + type: "eth" + - fec: "KPFEC" + id: "33" + lanes: "0:8" + serdes_group: "4" + speed: "400G" + sysport: "33" + type: "eth" + - fec: "KPFEC" + id: "25" + lanes: "0:8" + serdes_group: "3" + speed: "400G" + sysport: "25" + type: "eth" + - fec: "KPFEC" + id: "17" + lanes: "0:8" + serdes_group: "2" + speed: "400G" + sysport: "17" + type: "eth" + - fec: "KPFEC" + id: "9" + lanes: "0:8" + serdes_group: "1" + speed: "400G" + sysport: "9" + type: "eth" + - fec: "KPFEC" + id: "1" + lanes: "0:8" + serdes_group: "0" + speed: "400G" + sysport: "1" + type: "eth" + - fec: "NONE" + id: "257" + lanes: "0:1" + serdes_group: "32" + sysport: "257" + type: "mgmt 0" + - fec: "NONE" + id: "258" + lanes: "1:1" + serdes_group: "32" + sysport: "258" + type: "mgmt 1" + isg: + - id: "0" + tx_polarity: "10100000" + rx_polarity: "11111011" + lane_swap: "37250416" + - id: "1" + tx_polarity: "01010011" + rx_polarity: "00000100" + lane_swap: "52407613" + - id: "2" + tx_polarity: "11010001" + rx_polarity: "01111100" + lane_swap: "06153427" + - id: "3" + tx_polarity: "00100000" + rx_polarity: "10001001" + lane_swap: "74501263" + - id: "4" + tx_polarity: "10100000" + rx_polarity: "11101000" + lane_swap: "05471632" + - id: "5" + tx_polarity: "00010100" + rx_polarity: "00111100" + lane_swap: "72604351" + - id: "6" + tx_polarity: "11011001" + rx_polarity: "00011001" + lane_swap: "16340725" + - id: "7" + tx_polarity: "11010000" + rx_polarity: "11000010" + lane_swap: "70615324" + - id: "8" + tx_polarity: "00111101" + rx_polarity: "11011000" + lane_swap: "25074613" + - id: "9" + tx_polarity: "00001010" + rx_polarity: "01000011" + lane_swap: "32706451" + - id: "10" + tx_polarity: "00100010" + rx_polarity: "01001011" + lane_swap: "07162543" + - id: "11" + tx_polarity: "01101001" + rx_polarity: "11110001" + lane_swap: "41706253" + - id: "12" + tx_polarity: "11001000" + rx_polarity: "11000011" + lane_swap: "07136524" + - id: "13" + tx_polarity: "01100001" + rx_polarity: "10010000" + lane_swap: "73506412" + - id: "14" + tx_polarity: "01010001" + rx_polarity: "10110110" + lane_swap: "26143705" + - id: "15" + tx_polarity: "00001000" + rx_polarity: "11101100" + lane_swap: "51602437" + - id: "16" + tx_polarity: "00010000" + rx_polarity: "11101011" + lane_swap: "45076312" + - id: "17" + tx_polarity: "01011000" + rx_polarity: "00000000" + lane_swap: "50642371" + - id: "18" + tx_polarity: "01010100" + rx_polarity: "00011001" + lane_swap: "07436125" + - id: "19" + tx_polarity: "00011010" + rx_polarity: "01001011" + lane_swap: "61734250" + - id: "20" + tx_polarity: "00111110" + rx_polarity: "10011100" + lane_swap: "04275631" + - id: "21" + tx_polarity: "10110100" + rx_polarity: "01110110" + lane_swap: "41620573" + - id: "22" + tx_polarity: "01100110" + rx_polarity: "10010000" + lane_swap: "17240635" + - id: "23" + tx_polarity: "01010000" + rx_polarity: "11110101" + lane_swap: "52704631" + - id: "24" + tx_polarity: "00010001" + rx_polarity: "10100100" + lane_swap: "16253704" + - id: "25" + tx_polarity: "01000101" + rx_polarity: "00010000" + lane_swap: "53607241" + - id: "26" + tx_polarity: "00110101" + rx_polarity: "11101110" + lane_swap: "16074325" + - id: "27" + tx_polarity: "10000111" + rx_polarity: "01011110" + lane_swap: "75604231" + - id: "28" + tx_polarity: "01010100" + rx_polarity: "01010101" + lane_swap: "70614235" + - id: "29" + tx_polarity: "01010001" + rx_polarity: "01000001" + lane_swap: "24610537" + - id: "30" + tx_polarity: "01101011" + rx_polarity: "01010011" + lane_swap: "70614352" + - id: "31" + tx_polarity: "01101001" + rx_polarity: "10100000" + lane_swap: "34250716" + - id: "32" + tx_polarity: "00000000" + rx_polarity: "00000000" + lane_swap: "01234567" diff --git a/device/supermicro/x86_64-supermicro_sse_t7132s-r0/Supermicro_sse_t7132s/innovium.77700_A b/device/supermicro/x86_64-supermicro_sse_t7132s-r0/Supermicro_sse_t7132s/innovium.77700_A new file mode 100644 index 0000000000..ec13307805 --- /dev/null +++ b/device/supermicro/x86_64-supermicro_sse_t7132s-r0/Supermicro_sse_t7132s/innovium.77700_A @@ -0,0 +1,60 @@ +sku: innovium.77700_A + +device_id: 0x1b58 + +# Hardware constraint information +hardware: + num_ibs: 6 + ib_active: 0,1,2,3,4,5 + + ports_per_ib: 32, 32, 32, 32, 20, 20 + recirc_port_num: 32, 32, 32, 32, 32, 32 + cpu_port_num: 33 + cpu_port_ib: 0 + mgmt_port_num: 33 + mgmt_port_ibs: 1,2 + + pics_per_ib: 6, 7, 6, 5, 5, 5 + pic_ports_per_pic: 8 + max_serdes_speed: 50 + + num_shared_pics: 2 + + isg [0-4]: + ib: 0 + pic_id: [0-4] + + isg [5-9]: + ib: 5 + pic_id: [0-4] + + isg [10-14]: + ib: 1 + pic_id: [0-4] + + isg [16-20]: + ib: 3 + pic_id: [0-4] + + isg [21-25]: + ib: 4 + pic_id: [0-4] + + isg [26-30]: + ib: 2 + pic_id: [0-4] + + isg 15: + mode: 8:0 + ib: 1 + pic_id: 5 + + isg 31: + mode: 8:0 + ib: 0 + pic_id: 5 + + isg 32: + mode: 1:1 + ib: 1, 2 + pic_id: 6 diff --git a/device/supermicro/x86_64-supermicro_sse_t7132s-r0/Supermicro_sse_t7132s/innovium.77700_B b/device/supermicro/x86_64-supermicro_sse_t7132s-r0/Supermicro_sse_t7132s/innovium.77700_B new file mode 100644 index 0000000000..57ba52cbc3 --- /dev/null +++ b/device/supermicro/x86_64-supermicro_sse_t7132s-r0/Supermicro_sse_t7132s/innovium.77700_B @@ -0,0 +1,60 @@ +sku: innovium.77700_B + +device_id: 0x1b58 + +# Hardware constraint information +hardware: + num_ibs: 6 + ib_active: 0,1,2,3,4,5 + + ports_per_ib: 32, 32, 32, 32, 20, 20 + recirc_port_num: 32, 32, 32, 32, 32, 32 + cpu_port_num: 33 + cpu_port_ib: 0 + mgmt_port_num: 33 + mgmt_port_ibs: 1,2 + + pics_per_ib: 6, 7, 7, 6, 5, 5 + pic_ports_per_pic: 8 + max_serdes_speed: 50 + + num_shared_pics: 2 + + isg [0-4]: + ib: 0 + pic_id: [0-4] + + isg [5-9]: + ib: 5 + pic_id: [0-4] + + isg [10-14]: + ib: 1 + pic_id: [0-4] + + isg [16-20]: + ib: 3 + pic_id: [0-4] + + isg [21-25]: + ib: 4 + pic_id: [0-4] + + isg [26-30]: + ib: 2 + pic_id: [0-4] + + isg 15: + mode: 4:4 + ib: 1, 3 + pic_id: 5 + + isg 31: + mode: 4:4 + ib: 0, 2 + pic_id: 5 + + isg 32: + mode: 1:1 + ib: 1, 2 + pic_id: 6 diff --git a/device/supermicro/x86_64-supermicro_sse_t7132s-r0/Supermicro_sse_t7132s/ivm.sai.config.yaml b/device/supermicro/x86_64-supermicro_sse_t7132s-r0/Supermicro_sse_t7132s/ivm.sai.config.yaml new file mode 100755 index 0000000000..e896723a03 --- /dev/null +++ b/device/supermicro/x86_64-supermicro_sse_t7132s-r0/Supermicro_sse_t7132s/ivm.sai.config.yaml @@ -0,0 +1,10 @@ +IFCS_INIT_FILE : "/usr/share/sonic/hwsku/config_32x400G_sse_t7132s.yaml" +IFCS_SKU_FILE : "/usr/share/sonic/hwsku/innovium.77700_A" +IFCS_INNO_CLI_PORT : "9999" +IFCS_TARGET : "device" +ULIMIT : "65536" +INNOVIUM_DIR : "/innovium" +PYTHONPATH : "$INNOVIUM_DIR:$INNOVIUM_DIR/cmds:$INNOVIUM_DIR/scripts:$INNOVIUM_DIR/test/:$INNOVIUM_DIR/test/utils:$INNOVIUM_DIR/utils:$INNOVIUM_DIR/pyctypes:$INNOVIUM_DIR/ifcs_cmds:$INNOVIUM_DIR/testutil:$INNOVIUM_DIR/isai_cmds" +PLATFORM_LIBRARY: "/usr/share/sonic/platform/lib_ivm_serdes_pltfm.so" +IVM_SAI_DATAPATH_CONFIG_FILE: "/usr/share/sonic/hwsku/ivm.sai.datapath.config.yaml" +IVM_SAI_PARAM_A0008: "32" diff --git a/device/supermicro/x86_64-supermicro_sse_t7132s-r0/Supermicro_sse_t7132s/ivm.sai.datapath.config.yaml b/device/supermicro/x86_64-supermicro_sse_t7132s-r0/Supermicro_sse_t7132s/ivm.sai.datapath.config.yaml new file mode 100644 index 0000000000..891b0b3e28 --- /dev/null +++ b/device/supermicro/x86_64-supermicro_sse_t7132s-r0/Supermicro_sse_t7132s/ivm.sai.datapath.config.yaml @@ -0,0 +1,9 @@ +ISAI_PARAM_P0_0_LS : "4608 4608 4608 4608 2880 2880" +ISAI_PARAM_P0_1_LS : "2226 1946 1946 1890 1218 1218" +ISAI_PARAM_P0_1_ALS : "434 154 154 98 98 98" +ISAI_PARAM_P1_0_LS : "1536 1536 1536 1536 960 960" +ISAI_PARAM_P1_0_LL : "3072 3072 3072 3072 1920 1920" +ISAI_PARAM_P1_1_LS : "1778 1498 1498 1442 938 938" +ISAI_PARAM_P1_1_LL : "2478 2478 2478 2478 2478 2478" +ISAI_PARAM_P1_1_ALS : "434 154 154 98 98 98" +ISAI_PARAM_P1_1_ALL : "126 126 126 126 126 126" diff --git a/device/supermicro/x86_64-supermicro_sse_t7132s-r0/Supermicro_sse_t7132s/pg_profile_lookup.ini b/device/supermicro/x86_64-supermicro_sse_t7132s-r0/Supermicro_sse_t7132s/pg_profile_lookup.ini new file mode 100644 index 0000000000..0d881737cf --- /dev/null +++ b/device/supermicro/x86_64-supermicro_sse_t7132s-r0/Supermicro_sse_t7132s/pg_profile_lookup.ini @@ -0,0 +1,22 @@ +# PG lossless profiles. +# speed cable size xon xoff threshold xon_offset + 25000 5m 1518 0 15680 1 9408 + 50000 5m 1518 0 21248 1 9408 + 100000 5m 1518 0 34624 1 9408 + 200000 5m 1518 0 62368 1 9408 + 400000 5m 1518 0 117536 1 9408 + 25000 40m 1518 0 16928 1 9408 + 50000 40m 1518 0 23392 1 9408 + 100000 40m 1518 0 38816 1 9408 + 200000 40m 1518 0 71904 1 9408 + 400000 40m 1518 0 135520 1 9408 + 25000 100m 1518 0 18848 1 9408 + 50000 100m 1518 0 27264 1 9408 + 100000 100m 1518 0 46496 1 9408 + 200000 100m 1518 0 87168 1 9408 + 400000 100m 1518 0 166688 1 9408 + 25000 300m 1518 0 25184 1 9408 + 50000 300m 1518 0 40128 1 9408 + 100000 300m 1518 0 72384 1 9408 + 200000 300m 1518 0 138112 1 9408 + 400000 300m 1518 0 268640 1 9408 diff --git a/device/supermicro/x86_64-supermicro_sse_t7132s-r0/Supermicro_sse_t7132s/port_config.ini b/device/supermicro/x86_64-supermicro_sse_t7132s-r0/Supermicro_sse_t7132s/port_config.ini new file mode 100755 index 0000000000..950038f8a8 --- /dev/null +++ b/device/supermicro/x86_64-supermicro_sse_t7132s-r0/Supermicro_sse_t7132s/port_config.ini @@ -0,0 +1,35 @@ +# name lanes alias speed index mtu fec +Ethernet0 241,242,243,244,245,246,247,248 Eth1 400000 1 9126 rs +Ethernet8 249,250,251,252,253,254,255,256 Eth2 400000 2 9126 rs +Ethernet16 225,226,227,228,229,230,231,232 Eth3 400000 3 9126 rs +Ethernet24 233,234,235,236,237,238,239,240 Eth4 400000 4 9126 rs +Ethernet32 217,218,219,220,221,222,223,224 Eth5 400000 5 9126 rs +Ethernet40 209,210,211,212,213,214,215,216 Eth6 400000 6 9126 rs +Ethernet48 201,202,203,204,205,206,207,208 Eth7 400000 7 9126 rs +Ethernet56 193,194,195,196,197,198,199,200 Eth8 400000 8 9126 rs +Ethernet64 185,186,187,188,189,190,191,192 Eth9 400000 9 9126 rs +Ethernet72 177,178,179,180,181,182,183,184 Eth10 400000 10 9126 rs +Ethernet80 169,170,171,172,173,174,175,176 Eth11 400000 11 9126 rs +Ethernet88 161,162,163,164,165,166,167,168 Eth12 400000 12 9126 rs +Ethernet96 153,154,155,156,157,158,159,160 Eth13 400000 13 9126 rs +Ethernet104 145,146,147,148,149,150,151,152 Eth14 400000 14 9126 rs +Ethernet112 137,138,139,140,141,142,143,144 Eth15 400000 15 9126 rs +Ethernet120 129,130,131,132,133,134,135,136 Eth16 400000 16 9126 rs +Ethernet128 121,122,123,124,125,126,127,128 Eth17 400000 17 9126 rs +Ethernet136 113,114,115,116,117,118,119,120 Eth18 400000 18 9126 rs +Ethernet144 105,106,107,108,109,110,111,112 Eth19 400000 19 9126 rs +Ethernet152 97,98,99,100,101,102,103,104 Eth20 400000 20 9126 rs +Ethernet160 89,90,91,92,93,94,95,96 Eth21 400000 21 9126 rs +Ethernet168 81,82,83,84,85,86,87,88 Eth22 400000 22 9126 rs +Ethernet176 73,74,75,76,77,78,79,80 Eth23 400000 23 9126 rs +Ethernet184 65,66,67,68,69,70,71,72 Eth24 400000 24 9126 rs +Ethernet192 57,58,59,60,61,62,63,64 Eth25 400000 25 9126 rs +Ethernet200 49,50,51,52,53,54,55,56 Eth26 400000 26 9126 rs +Ethernet208 41,42,43,44,45,46,47,48 Eth27 400000 27 9126 rs +Ethernet216 33,34,35,36,37,38,39,40 Eth28 400000 28 9126 rs +Ethernet224 25,26,27,28,29,30,31,32 Eth29 400000 29 9126 rs +Ethernet232 17,18,19,20,21,22,23,24 Eth30 400000 30 9126 rs +Ethernet240 9,10,11,12,13,14,15,16 Eth31 400000 31 9126 rs +Ethernet248 1,2,3,4,5,6,7,8 Eth32 400000 32 9126 rs +Ethernet256 257 Eth33 10000 33 9126 none +Ethernet257 258 Eth34 10000 34 9126 none diff --git a/device/supermicro/x86_64-supermicro_sse_t7132s-r0/Supermicro_sse_t7132s/qos.json.j2 b/device/supermicro/x86_64-supermicro_sse_t7132s-r0/Supermicro_sse_t7132s/qos.json.j2 new file mode 100755 index 0000000000..34f7413d95 --- /dev/null +++ b/device/supermicro/x86_64-supermicro_sse_t7132s-r0/Supermicro_sse_t7132s/qos.json.j2 @@ -0,0 +1,195 @@ +{% set mgmt_port_name = ['Ethernet256','Ethernet257'] %} +{% set port_names_list = [] %} +{% for port in PORT %} + {% if port not in mgmt_port_name %} + {%- if port_names_list.append(port) %}{% endif %} + {% endif %} +{% endfor %} +{% set port_names = port_names_list | join(',') -%} + + +{ + "TC_TO_QUEUE_MAP":{ + "AZURE":{ + "0":"0", + "1":"1", + "2":"2", + "3":"3", + "4":"4", + "5":"5", + "6":"6", + "7":"7" + } + }, + "MAP_PFC_PRIORITY_TO_QUEUE": { + "AZURE": { + "0": "0", + "1": "1", + "2": "2", + "3": "3", + "4": "4", + "5": "5", + "6": "6", + "7": "7" + } + }, + "TC_TO_PRIORITY_GROUP_MAP": { + "AZURE": { + "0": "0", + "1": "0", + "2": "0", + "3": "3", + "4": "4", + "5": "0", + "6": "0", + "7": "0" + } + }, + "DSCP_TO_TC_MAP": { + "AZURE": { + "0" : "1", + "1" : "1", + "2" : "1", + "3" : "3", + "4" : "4", + "5" : "2", + "6" : "1", + "7" : "1", + "8" : "0", + "9" : "1", + "10": "1", + "11": "1", + "12": "1", + "13": "1", + "14": "1", + "15": "1", + "16": "1", + "17": "1", + "18": "1", + "19": "1", + "20": "1", + "21": "1", + "22": "1", + "23": "1", + "24": "1", + "25": "1", + "26": "1", + "27": "1", + "28": "1", + "29": "1", + "30": "1", + "31": "1", + "32": "1", + "33": "1", + "34": "1", + "35": "1", + "36": "1", + "37": "1", + "38": "1", + "39": "1", + "40": "1", + "41": "1", + "42": "1", + "43": "1", + "44": "1", + "45": "1", + "46": "5", + "47": "1", + "48": "6", + "49": "1", + "50": "1", + "51": "1", + "52": "1", + "53": "1", + "54": "1", + "55": "1", + "56": "1", + "57": "1", + "58": "1", + "59": "1", + "60": "1", + "61": "1", + "62": "1", + "63": "1" + } + }, + "SCHEDULER": { + "scheduler.0": { + "type" : "DWRR", + "weight": "1" + }, + "scheduler.1": { + "type" : "DWRR", + "weight": "1" + } + }, + "QUEUE": { +{% for port in port_names_list %} + "{{ port }}|3": { + "scheduler" : "scheduler.1", + "wred_profile" : "AZURE_LOSSLESS" + }, +{% endfor %} +{% for port in port_names_list %} + "{{ port }}|4": { + "scheduler" : "scheduler.1", + "wred_profile" : "AZURE_LOSSLESS" + }, +{% endfor %} +{% for port in port_names_list %} + "{{ port }}|0": { + "scheduler": "scheduler.0" + }, +{% endfor %} +{% for port in port_names_list %} + "{{ port }}|1": { + "scheduler": "scheduler.0" + }, +{% endfor %} +{% for port in port_names_list %} + "{{ port }}|2": { + "scheduler": "scheduler.0" + }, +{% endfor %} +{% for port in port_names_list %} + "{{ port }}|5": { + "scheduler": "scheduler.0" + }, +{% endfor %} +{% for port in port_names_list %} + "{{ port }}|6": { + "scheduler": "scheduler.0" + }{% if not loop.last %},{% endif %} + +{% endfor %} + }, + "PORT_QOS_MAP": { +{% for port in port_names_list %} + "{{ port }}": { + "tc_to_pg_map": "AZURE", + "tc_to_queue_map": "AZURE", + "dscp_to_tc_map": "AZURE", + "pfc_to_queue_map": "AZURE", + "pfc_enable": "3,4" + }{% if not loop.last %},{% endif %} + +{% endfor %} + }, + "WRED_PROFILE": { + "AZURE_LOSSLESS" : { + "wred_green_enable" : "true", + "wred_yellow_enable" : "true", + "wred_red_enable" : "true", + "ecn" : "ecn_all", + "green_max_threshold" : "2097152", + "green_min_threshold" : "1048576", + "yellow_max_threshold" : "2097152", + "yellow_min_threshold" : "1048576", + "red_max_threshold" : "2097152", + "red_min_threshold" : "1048576", + "green_drop_probability" : "5", + "yellow_drop_probability": "5", + "red_drop_probability" : "5" + } + } +} diff --git a/device/supermicro/x86_64-supermicro_sse_t7132s-r0/Supermicro_sse_t7132s/qos_defaults_def_lossy.j2 b/device/supermicro/x86_64-supermicro_sse_t7132s-r0/Supermicro_sse_t7132s/qos_defaults_def_lossy.j2 new file mode 100644 index 0000000000..a390d37b4f --- /dev/null +++ b/device/supermicro/x86_64-supermicro_sse_t7132s-r0/Supermicro_sse_t7132s/qos_defaults_def_lossy.j2 @@ -0,0 +1,124 @@ +{% set mgmt_port_name = ['Ethernet256','Ethernet257'] %} +{% set port_names_list = [] %} +{% for port in PORT %} + {% if port not in mgmt_port_name %} + {%- if port_names_list.append(port) %}{% endif %} + {% endif %} +{% endfor %} +{% set port_names = port_names_list | join(',') -%} + + +{ + "TC_TO_QUEUE_MAP":{ + "AZURE":{ + "0":"0", + "1":"1", + "2":"2", + "3":"3", + "4":"4", + "5":"5", + "6":"6", + "7":"7" + } + }, + "TC_TO_PRIORITY_GROUP_MAP": { + "AZURE": { + "0": "0", + "1": "0", + "2": "0", + "3": "1", + "4": "2", + "5": "0", + "6": "0", + "7": "0" + } + }, + "DSCP_TO_TC_MAP": { + "AZURE": { + "0":"0", + "1":"0", + "2":"0", + "3":"0", + "4":"0", + "5":"0", + "6":"0", + "7":"0", + "8":"0", + "9":"0", + "10":"0", + "11":"0", + "12":"0", + "13":"0", + "14":"0", + "15":"0", + "16":"0", + "17":"0", + "18":"0", + "19":"0", + "20":"0", + "21":"0", + "22":"0", + "23":"0", + "24":"0", + "25":"0", + "26":"0", + "27":"0", + "28":"0", + "29":"0", + "30":"0", + "31":"0", + "32":"0", + "33":"0", + "34":"0", + "35":"0", + "36":"0", + "37":"0", + "38":"0", + "39":"0", + "40":"0", + "41":"0", + "42":"0", + "43":"0", + "44":"0", + "45":"0", + "46":"0", + "47":"0", + "48":"0", + "49":"0", + "50":"0", + "51":"0", + "52":"0", + "53":"0", + "54":"0", + "55":"0", + "56":"0", + "57":"0", + "58":"0", + "59":"0", + "60":"0", + "61":"0", + "62":"0", + "63":"0" + } + }, + "PORT_QOS_MAP": { +{% for port in port_names_list %} + "{{ port }}": { + "tc_to_pg_map": "AZURE", + "tc_to_queue_map": "AZURE", + "dscp_to_tc_map": "AZURE" + }{% if not loop.last %},{% endif %} + +{% endfor %} + }, + "SCHEDULER": { + "scheduler.7": { + "type": "STRICT" + } + }, + "QUEUE": { + "{{ port_names }}|7": { + "scheduler": "[SCHEDULER|scheduler.7]" + } + } +} diff --git a/device/supermicro/x86_64-supermicro_sse_t7132s-r0/Supermicro_sse_t7132s/qos_defaults_t1.j2 b/device/supermicro/x86_64-supermicro_sse_t7132s-r0/Supermicro_sse_t7132s/qos_defaults_t1.j2 new file mode 100644 index 0000000000..34f7413d95 --- /dev/null +++ b/device/supermicro/x86_64-supermicro_sse_t7132s-r0/Supermicro_sse_t7132s/qos_defaults_t1.j2 @@ -0,0 +1,195 @@ +{% set mgmt_port_name = ['Ethernet256','Ethernet257'] %} +{% set port_names_list = [] %} +{% for port in PORT %} + {% if port not in mgmt_port_name %} + {%- if port_names_list.append(port) %}{% endif %} + {% endif %} +{% endfor %} +{% set port_names = port_names_list | join(',') -%} + + +{ + "TC_TO_QUEUE_MAP":{ + "AZURE":{ + "0":"0", + "1":"1", + "2":"2", + "3":"3", + "4":"4", + "5":"5", + "6":"6", + "7":"7" + } + }, + "MAP_PFC_PRIORITY_TO_QUEUE": { + "AZURE": { + "0": "0", + "1": "1", + "2": "2", + "3": "3", + "4": "4", + "5": "5", + "6": "6", + "7": "7" + } + }, + "TC_TO_PRIORITY_GROUP_MAP": { + "AZURE": { + "0": "0", + "1": "0", + "2": "0", + "3": "3", + "4": "4", + "5": "0", + "6": "0", + "7": "0" + } + }, + "DSCP_TO_TC_MAP": { + "AZURE": { + "0" : "1", + "1" : "1", + "2" : "1", + "3" : "3", + "4" : "4", + "5" : "2", + "6" : "1", + "7" : "1", + "8" : "0", + "9" : "1", + "10": "1", + "11": "1", + "12": "1", + "13": "1", + "14": "1", + "15": "1", + "16": "1", + "17": "1", + "18": "1", + "19": "1", + "20": "1", + "21": "1", + "22": "1", + "23": "1", + "24": "1", + "25": "1", + "26": "1", + "27": "1", + "28": "1", + "29": "1", + "30": "1", + "31": "1", + "32": "1", + "33": "1", + "34": "1", + "35": "1", + "36": "1", + "37": "1", + "38": "1", + "39": "1", + "40": "1", + "41": "1", + "42": "1", + "43": "1", + "44": "1", + "45": "1", + "46": "5", + "47": "1", + "48": "6", + "49": "1", + "50": "1", + "51": "1", + "52": "1", + "53": "1", + "54": "1", + "55": "1", + "56": "1", + "57": "1", + "58": "1", + "59": "1", + "60": "1", + "61": "1", + "62": "1", + "63": "1" + } + }, + "SCHEDULER": { + "scheduler.0": { + "type" : "DWRR", + "weight": "1" + }, + "scheduler.1": { + "type" : "DWRR", + "weight": "1" + } + }, + "QUEUE": { +{% for port in port_names_list %} + "{{ port }}|3": { + "scheduler" : "scheduler.1", + "wred_profile" : "AZURE_LOSSLESS" + }, +{% endfor %} +{% for port in port_names_list %} + "{{ port }}|4": { + "scheduler" : "scheduler.1", + "wred_profile" : "AZURE_LOSSLESS" + }, +{% endfor %} +{% for port in port_names_list %} + "{{ port }}|0": { + "scheduler": "scheduler.0" + }, +{% endfor %} +{% for port in port_names_list %} + "{{ port }}|1": { + "scheduler": "scheduler.0" + }, +{% endfor %} +{% for port in port_names_list %} + "{{ port }}|2": { + "scheduler": "scheduler.0" + }, +{% endfor %} +{% for port in port_names_list %} + "{{ port }}|5": { + "scheduler": "scheduler.0" + }, +{% endfor %} +{% for port in port_names_list %} + "{{ port }}|6": { + "scheduler": "scheduler.0" + }{% if not loop.last %},{% endif %} + +{% endfor %} + }, + "PORT_QOS_MAP": { +{% for port in port_names_list %} + "{{ port }}": { + "tc_to_pg_map": "AZURE", + "tc_to_queue_map": "AZURE", + "dscp_to_tc_map": "AZURE", + "pfc_to_queue_map": "AZURE", + "pfc_enable": "3,4" + }{% if not loop.last %},{% endif %} + +{% endfor %} + }, + "WRED_PROFILE": { + "AZURE_LOSSLESS" : { + "wred_green_enable" : "true", + "wred_yellow_enable" : "true", + "wred_red_enable" : "true", + "ecn" : "ecn_all", + "green_max_threshold" : "2097152", + "green_min_threshold" : "1048576", + "yellow_max_threshold" : "2097152", + "yellow_min_threshold" : "1048576", + "red_max_threshold" : "2097152", + "red_min_threshold" : "1048576", + "green_drop_probability" : "5", + "yellow_drop_probability": "5", + "red_drop_probability" : "5" + } + } +} diff --git a/device/supermicro/x86_64-supermicro_sse_t7132s-r0/Supermicro_sse_t7132s/sai.profile b/device/supermicro/x86_64-supermicro_sse_t7132s-r0/Supermicro_sse_t7132s/sai.profile new file mode 100644 index 0000000000..aba4fc81fb --- /dev/null +++ b/device/supermicro/x86_64-supermicro_sse_t7132s-r0/Supermicro_sse_t7132s/sai.profile @@ -0,0 +1 @@ +SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/ivm.sai.config.yaml diff --git a/device/supermicro/x86_64-supermicro_sse_t7132s-r0/default_sku b/device/supermicro/x86_64-supermicro_sse_t7132s-r0/default_sku new file mode 100755 index 0000000000..8feb806f2f --- /dev/null +++ b/device/supermicro/x86_64-supermicro_sse_t7132s-r0/default_sku @@ -0,0 +1 @@ +Supermicro_sse_t7132s t1 diff --git a/device/supermicro/x86_64-supermicro_sse_t7132s-r0/fast-reboot_plugin b/device/supermicro/x86_64-supermicro_sse_t7132s-r0/fast-reboot_plugin new file mode 100755 index 0000000000..6bc65e0edf --- /dev/null +++ b/device/supermicro/x86_64-supermicro_sse_t7132s-r0/fast-reboot_plugin @@ -0,0 +1,2 @@ +#!/bin/bash +/usr/local/bin/sysledctl.py reboot diff --git a/device/supermicro/x86_64-supermicro_sse_t7132s-r0/installer.conf b/device/supermicro/x86_64-supermicro_sse_t7132s-r0/installer.conf new file mode 100755 index 0000000000..1eb3e9e494 --- /dev/null +++ b/device/supermicro/x86_64-supermicro_sse_t7132s-r0/installer.conf @@ -0,0 +1,4 @@ +CONSOLE_PORT=0x3f8 +CONSOLE_DEV=0 +CONSOLE_SPEED=115200 +ONIE_PLATFORM_EXTRA_CMDLINE_LINUX="intel_iommu=off pcie_aspm=off usbcore.old_scheme_first=1" diff --git a/device/supermicro/x86_64-supermicro_sse_t7132s-r0/lib_ivm_serdes_pltfm.so b/device/supermicro/x86_64-supermicro_sse_t7132s-r0/lib_ivm_serdes_pltfm.so new file mode 100755 index 0000000000..651e66a19f Binary files /dev/null and b/device/supermicro/x86_64-supermicro_sse_t7132s-r0/lib_ivm_serdes_pltfm.so differ diff --git a/device/supermicro/x86_64-supermicro_sse_t7132s-r0/pcie.yaml b/device/supermicro/x86_64-supermicro_sse_t7132s-r0/pcie.yaml new file mode 100755 index 0000000000..2b8dce2e06 --- /dev/null +++ b/device/supermicro/x86_64-supermicro_sse_t7132s-r0/pcie.yaml @@ -0,0 +1,453 @@ +- bus: '00' + dev: '00' + fn: '0' + id: 6f00 + name: 'Host bridge: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon D DMI2 + (rev 03)' +- bus: '00' + dev: '01' + fn: '0' + id: 6f02 + name: 'PCI bridge: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon D PCI + Express Root Port 1 (rev 03)' +- bus: '00' + dev: '01' + fn: '1' + id: 6f03 + name: 'PCI bridge: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon D PCI + Express Root Port 1 (rev 03)' +- bus: '00' + dev: '02' + fn: '0' + id: 6f04 + name: 'PCI bridge: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon D PCI + Express Root Port 2 (rev 03)' +- bus: '00' + dev: '02' + fn: '2' + id: 6f06 + name: 'PCI bridge: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon D PCI + Express Root Port 2 (rev 03)' +- bus: '00' + dev: '03' + fn: '0' + id: 6f08 + name: 'PCI bridge: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon D PCI + Express Root Port 3 (rev 03)' +- bus: '00' + dev: '03' + fn: '3' + id: 6f0b + name: 'PCI bridge: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon D PCI + Express Root Port 3 (rev 03)' +- bus: '00' + dev: '05' + fn: '0' + id: 6f28 + name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon + D Map/VTd_Misc/System Management (rev 03)' +- bus: '00' + dev: '05' + fn: '1' + id: 6f29 + name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon + D IIO Hot Plug (rev 03)' +- bus: '00' + dev: '05' + fn: '2' + id: 6f2a + name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon + D IIO RAS/Control Status/Global Errors (rev 03)' +- bus: '00' + dev: '14' + fn: '0' + id: 8c31 + name: 'USB controller: Intel Corporation 8 Series/C220 Series Chipset Family USB + xHCI (rev 05)' +- bus: '00' + dev: '16' + fn: '0' + id: 8c3a + name: 'Communication controller: Intel Corporation 8 Series/C220 Series Chipset + Family MEI Controller #1 (rev 04)' +- bus: '00' + dev: '16' + fn: '1' + id: 8c3b + name: 'Communication controller: Intel Corporation 8 Series/C220 Series Chipset + Family MEI Controller #2 (rev 04)' +- bus: '00' + dev: 1a + fn: '0' + id: 8c2d + name: 'USB controller: Intel Corporation 8 Series/C220 Series Chipset Family USB + EHCI #2 (rev 05)' +- bus: '00' + dev: 1c + fn: '0' + id: 8c10 + name: 'PCI bridge: Intel Corporation 8 Series/C220 Series Chipset Family PCI Express + Root Port #1 (rev d5)' +- bus: '00' + dev: 1c + fn: '3' + id: 8c16 + name: 'PCI bridge: Intel Corporation 8 Series/C220 Series Chipset Family PCI Express + Root Port #4 (rev d5)' +- bus: '00' + dev: 1d + fn: '0' + id: 8c26 + name: 'USB controller: Intel Corporation 8 Series/C220 Series Chipset Family USB + EHCI #1 (rev 05)' +- bus: '00' + dev: 1f + fn: '0' + id: 8c54 + name: 'ISA bridge: Intel Corporation C224 Series Chipset Family Server Standard + SKU LPC Controller (rev 05)' +- bus: '00' + dev: 1f + fn: '2' + id: 8c02 + name: 'SATA controller: Intel Corporation 8 Series/C220 Series Chipset Family 6-port + SATA Controller 1 [AHCI mode] (rev 05)' +- bus: '00' + dev: 1f + fn: '3' + id: 8c22 + name: 'SMBus: Intel Corporation 8 Series/C220 Series Chipset Family SMBus Controller + (rev 05)' +- bus: '00' + dev: 1f + fn: '6' + id: 8c24 + name: 'Signal processing controller: Intel Corporation 8 Series Chipset Family Thermal + Management Controller (rev 05)' +- bus: '03' + dev: '00' + fn: '0' + id: 6f50 + name: 'System peripheral: Intel Corporation Xeon Processor D Family QuickData Technology + Register DMA Channel 0' +- bus: '03' + dev: '00' + fn: '1' + id: 6f51 + name: 'System peripheral: Intel Corporation Xeon Processor D Family QuickData Technology + Register DMA Channel 1' +- bus: '03' + dev: '00' + fn: '2' + id: 6f52 + name: 'System peripheral: Intel Corporation Xeon Processor D Family QuickData Technology + Register DMA Channel 2' +- bus: '03' + dev: '00' + fn: '3' + id: 6f53 + name: 'System peripheral: Intel Corporation Xeon Processor D Family QuickData Technology + Register DMA Channel 3' +- bus: '05' + dev: '00' + fn: '0' + id: 1b58 + name: 'Ethernet controller: Device 1d98:1b58 (rev 10)' +- bus: '06' + dev: '00' + fn: '0' + id: '9110' + name: 'Bridge: Asix Electronics Corporation Device 9110' +- bus: '07' + dev: '00' + fn: '0' + id: '1533' + name: 'Ethernet controller: Intel Corporation I210 Gigabit Network Connection (rev + 03)' +- bus: 08 + dev: '00' + fn: '0' + id: '1150' + name: 'PCI bridge: ASPEED Technology, Inc. AST1150 PCI-to-PCI Bridge (rev 06)' +- bus: 09 + dev: '00' + fn: '0' + id: '2000' + name: 'VGA compatible controller: ASPEED Technology, Inc. ASPEED Graphics Family + (rev 52)' +- bus: ff + dev: 0b + fn: '0' + id: 6f81 + name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon + D R3 QPI Link 0/1 (rev 03)' +- bus: ff + dev: 0b + fn: '1' + id: 6f36 + name: 'Performance counters: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon + D R3 QPI Link 0/1 (rev 03)' +- bus: ff + dev: 0b + fn: '2' + id: 6f37 + name: 'Performance counters: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon + D R3 QPI Link 0/1 (rev 03)' +- bus: ff + dev: 0b + fn: '3' + id: 6f76 + name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon + D R3 QPI Link Debug (rev 03)' +- bus: ff + dev: 0c + fn: '0' + id: 6fe0 + name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon + D Caching Agent (rev 03)' +- bus: ff + dev: 0c + fn: '1' + id: 6fe1 + name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon + D Caching Agent (rev 03)' +- bus: ff + dev: 0c + fn: '2' + id: 6fe2 + name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon + D Caching Agent (rev 03)' +- bus: ff + dev: 0c + fn: '3' + id: 6fe3 + name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon + D Caching Agent (rev 03)' +- bus: ff + dev: 0f + fn: '0' + id: 6ff8 + name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon + D Caching Agent (rev 03)' +- bus: ff + dev: 0f + fn: '4' + id: 6ffc + name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon + D Caching Agent (rev 03)' +- bus: ff + dev: 0f + fn: '5' + id: 6ffd + name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon + D Caching Agent (rev 03)' +- bus: ff + dev: 0f + fn: '6' + id: 6ffe + name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon + D Caching Agent (rev 03)' +- bus: ff + dev: '10' + fn: '0' + id: 6f1d + name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon + D R2PCIe Agent (rev 03)' +- bus: ff + dev: '10' + fn: '1' + id: 6f34 + name: 'Performance counters: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon + D R2PCIe Agent (rev 03)' +- bus: ff + dev: '10' + fn: '5' + id: 6f1e + name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon + D Ubox (rev 03)' +- bus: ff + dev: '10' + fn: '6' + id: 6f7d + name: 'Performance counters: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon + D Ubox (rev 03)' +- bus: ff + dev: '10' + fn: '7' + id: 6f1f + name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon + D Ubox (rev 03)' +- bus: ff + dev: '12' + fn: '0' + id: 6fa0 + name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon + D Home Agent 0 (rev 03)' +- bus: ff + dev: '12' + fn: '1' + id: 6f30 + name: 'Performance counters: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon + D Home Agent 0 (rev 03)' +- bus: ff + dev: '13' + fn: '0' + id: 6fa8 + name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon + D Memory Controller 0 - Target Address/Thermal/RAS (rev 03)' +- bus: ff + dev: '13' + fn: '1' + id: 6f71 + name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon + D Memory Controller 0 - Target Address/Thermal/RAS (rev 03)' +- bus: ff + dev: '13' + fn: '2' + id: 6faa + name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon + D Memory Controller 0 - Channel Target Address Decoder (rev 03)' +- bus: ff + dev: '13' + fn: '3' + id: 6fab + name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon + D Memory Controller 0 - Channel Target Address Decoder (rev 03)' +- bus: ff + dev: '13' + fn: '4' + id: 6fac + name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon + D Memory Controller 0 - Channel Target Address Decoder (rev 03)' +- bus: ff + dev: '13' + fn: '5' + id: 6fad + name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon + D Memory Controller 0 - Channel Target Address Decoder (rev 03)' +- bus: ff + dev: '13' + fn: '6' + id: 6fae + name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon + D DDRIO Channel 0/1 Broadcast (rev 03)' +- bus: ff + dev: '13' + fn: '7' + id: 6faf + name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon + D DDRIO Global Broadcast (rev 03)' +- bus: ff + dev: '14' + fn: '0' + id: 6fb0 + name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon + D Memory Controller 0 - Channel 0 Thermal Control (rev 03)' +- bus: ff + dev: '14' + fn: '1' + id: 6fb1 + name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon + D Memory Controller 0 - Channel 1 Thermal Control (rev 03)' +- bus: ff + dev: '14' + fn: '2' + id: 6fb2 + name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon + D Memory Controller 0 - Channel 0 Error (rev 03)' +- bus: ff + dev: '14' + fn: '3' + id: 6fb3 + name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon + D Memory Controller 0 - Channel 1 Error (rev 03)' +- bus: ff + dev: '14' + fn: '4' + id: 6fbc + name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon + D DDRIO Channel 0/1 Interface (rev 03)' +- bus: ff + dev: '14' + fn: '5' + id: 6fbd + name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon + D DDRIO Channel 0/1 Interface (rev 03)' +- bus: ff + dev: '14' + fn: '6' + id: 6fbe + name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon + D DDRIO Channel 0/1 Interface (rev 03)' +- bus: ff + dev: '14' + fn: '7' + id: 6fbf + name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon + D DDRIO Channel 0/1 Interface (rev 03)' +- bus: ff + dev: '15' + fn: '0' + id: 6fb4 + name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon + D Memory Controller 0 - Channel 2 Thermal Control (rev 03)' +- bus: ff + dev: '15' + fn: '1' + id: 6fb5 + name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon + D Memory Controller 0 - Channel 3 Thermal Control (rev 03)' +- bus: ff + dev: '15' + fn: '2' + id: 6fb6 + name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon + D Memory Controller 0 - Channel 2 Error (rev 03)' +- bus: ff + dev: '15' + fn: '3' + id: 6fb7 + name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon + D Memory Controller 0 - Channel 3 Error (rev 03)' +- bus: ff + dev: 1e + fn: '0' + id: 6f98 + name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon + D Power Control Unit (rev 03)' +- bus: ff + dev: 1e + fn: '1' + id: 6f99 + name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon + D Power Control Unit (rev 03)' +- bus: ff + dev: 1e + fn: '2' + id: 6f9a + name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon + D Power Control Unit (rev 03)' +- bus: ff + dev: 1e + fn: '3' + id: 6fc0 + name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon + D Power Control Unit (rev 03)' +- bus: ff + dev: 1e + fn: '4' + id: 6f9c + name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon + D Power Control Unit (rev 03)' +- bus: ff + dev: 1f + fn: '0' + id: 6f88 + name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon + D Power Control Unit (rev 03)' +- bus: ff + dev: 1f + fn: '2' + id: 6f8a + name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon + D Power Control Unit (rev 03)' diff --git a/device/supermicro/x86_64-supermicro_sse_t7132s-r0/platform.json b/device/supermicro/x86_64-supermicro_sse_t7132s-r0/platform.json new file mode 100644 index 0000000000..e28ca23c7a --- /dev/null +++ b/device/supermicro/x86_64-supermicro_sse_t7132s-r0/platform.json @@ -0,0 +1,238 @@ +{ + "chassis": { + "name": "Supermicro-SSE-T7132S-R0", + "components": [ + { + "name": "CPLD1" + }, + { + "name": "CPLD2" + } + ], + "fans": [ + { + "name": "FAN-1" + }, + { + "name": "FAN-2" + }, + { + "name": "FAN-3" + }, + { + "name": "FAN-4" + }, + { + "name": "FAN-5" + }, + { + "name": "FAN-6" + } + ], + "fan_drawers": [ + { + "name": "Drawer1", + "fans": [ + { + "name": "FAN-1" + } + ] + }, + { + "name": "Drawer2", + "fans": [ + { + "name": "FAN-2" + } + ] + }, + { + "name": "Drawer3", + "fans": [ + { + "name": "FAN-3" + } + ] + }, + { + "name": "Drawer4", + "fans": [ + { + "name": "FAN-4" + } + ] + }, + { + "name": "Drawer5", + "fans": [ + { + "name": "FAN-5" + } + ] + }, + { + "name": "Drawer6", + "fans": [ + { + "name": "FAN-6" + } + ] + } + ], + "psus": [ + { + "name": "PSU 1", + "fans": [ + { + "name": "PSU 1 FAN-1", + "speed": { + "controllable": false + }, + "status_led": { + "controllable": false + } + } + ] + }, + { + "name": "PSU 2", + "fans": [ + { + "name": "PSU 2 FAN-1", + "speed": { + "controllable": false + }, + "status_led": { + "controllable": false + } + } + ] + } + ], + "thermals": [ + { + "name": "CPU Temp" + }, + { + "name": "PCH Temp" + }, + { + "name": "Peripheral Temp" + }, + { + "name": "Switch Buttom-1" + }, + { + "name": "Switch Buttom-2" + }, + { + "name": "Switch Top-1" + }, + { + "name": "Switch Top-2" + }, + { + "name": "System Temp" + } + ], + "sfps": [ + { + "name": "Ethernet0" + }, + { + "name": "Ethernet8" + }, + { + "name": "Ethernet16" + }, + { + "name": "Ethernet24" + }, + { + "name": "Ethernet32" + }, + { + "name": "Ethernet40" + }, + { + "name": "Ethernet48" + }, + { + "name": "Ethernet56" + }, + { + "name": "Ethernet64" + }, + { + "name": "Ethernet72" + }, + { + "name": "Ethernet80" + }, + { + "name": "Ethernet88" + }, + { + "name": "Ethernet96" + }, + { + "name": "Ethernet104" + }, + { + "name": "Ethernet112" + }, + { + "name": "Ethernet120" + }, + { + "name": "Ethernet128" + }, + { + "name": "Ethernet136" + }, + { + "name": "Ethernet144" + }, + { + "name": "Ethernet152" + }, + { + "name": "Ethernet160" + }, + { + "name": "Ethernet168" + }, + { + "name": "Ethernet176" + }, + { + "name": "Ethernet184" + }, + { + "name": "Ethernet192" + }, + { + "name": "Ethernet200" + }, + { + "name": "Ethernet208" + }, + { + "name": "Ethernet216" + }, + { + "name": "Ethernet224" + }, + { + "name": "Ethernet232" + }, + { + "name": "Ethernet240" + }, + { + "name": "Ethernet248" + } + ] + }, + "interfaces": {} +} diff --git a/device/supermicro/x86_64-supermicro_sse_t7132s-r0/platform_asic b/device/supermicro/x86_64-supermicro_sse_t7132s-r0/platform_asic new file mode 100644 index 0000000000..84083a7415 --- /dev/null +++ b/device/supermicro/x86_64-supermicro_sse_t7132s-r0/platform_asic @@ -0,0 +1 @@ +innovium diff --git a/device/supermicro/x86_64-supermicro_sse_t7132s-r0/plugins/eeprom.py b/device/supermicro/x86_64-supermicro_sse_t7132s-r0/plugins/eeprom.py new file mode 100644 index 0000000000..ba6a569c71 --- /dev/null +++ b/device/supermicro/x86_64-supermicro_sse_t7132s-r0/plugins/eeprom.py @@ -0,0 +1,20 @@ +############################################################################# +# Celestica Silverstone +# +# Platform and model specific eeprom subclass, inherits from the base class, +# and provides the followings: +# - the eeprom format definition +# - specific encoder/decoder if there is special need +############################################################################# + +try: + from sonic_eeprom import eeprom_tlvinfo +except ImportError as e: + raise ImportError(str(e) + "- required module not found") + + +class board(eeprom_tlvinfo.TlvInfoDecoder): + + def __init__(self, name, path, cpld_root, ro): + self.eeprom_path = "/sys/class/i2c-adapter/i2c-0/0-0053/eeprom" + super(board, self).__init__(self.eeprom_path, 0, '', True) diff --git a/device/supermicro/x86_64-supermicro_sse_t7132s-r0/plugins/psuutil.py b/device/supermicro/x86_64-supermicro_sse_t7132s-r0/plugins/psuutil.py new file mode 100644 index 0000000000..3bba2adc20 --- /dev/null +++ b/device/supermicro/x86_64-supermicro_sse_t7132s-r0/plugins/psuutil.py @@ -0,0 +1,84 @@ +import os.path +import subprocess +import sys +import re + +IPMI_PSU1_DATA = "docker exec -it pmon ipmitool sdr list | grep PS1 | awk -F \"|\" '{print $2}'" +IPMI_PSU2_DATA = "docker exec -it pmon ipmitool sdr list | grep PS2 | awk -F \"|\" '{print $2}'" + +try: + from sonic_psu.psu_base import PsuBase +except ImportError as e: + raise ImportError(str(e) + "- required module not found") + + +class PsuUtil(PsuBase): + """Platform-specific PSUutil class""" + + def __init__(self): + PsuBase.__init__(self) + + def run_command(self, command): + proc = subprocess.Popen(command, shell=True, universal_newlines=True, stdout=subprocess.PIPE) + (out, err) = proc.communicate() + + if proc.returncode != 0: + sys.exit(proc.returncode) + + return out + + def get_num_psus(self): + """ + Retrieves the number of PSUs available on the device + :return: An integer, the number of PSUs available on the device + """ + return 2 + + def get_psu_status(self, index): + """ + Retrieves the oprational status of power supply unit (PSU) defined + by 1-based index + :param index: An integer, 1-based index of the PSU of which to query status + :return: Boolean, True if PSU is operating properly, False if PSU is faulty + """ + if index is None: + return False + if index == 1: + res_string = self.run_command(IPMI_PSU1_DATA) + else: + res_string = self.run_command(IPMI_PSU2_DATA) + + try: + ret_value = int(res_string, 0) + except ValueError as e: + return False + + if ret_value == 0x1: + return True + else: + return False + + def get_psu_presence(self, index): + """ + Retrieves the presence status of power supply unit (PSU) defined + by 1-based index + :param index: An integer, 1-based index of the PSU of which to query status + :return: Boolean, True if PSU is plugged, False if not + """ + if index is None: + return False + + if index == 1: + res_string = self.run_command(IPMI_PSU1_DATA) + else: + res_string = self.run_command(IPMI_PSU2_DATA) + + try: + ret_value = int(res_string, 0) + except ValueError as e: + return False + + if ret_value == 0x1 or ret_value == 0xb: + return True + else: + return False diff --git a/device/supermicro/x86_64-supermicro_sse_t7132s-r0/plugins/sfputil.py b/device/supermicro/x86_64-supermicro_sse_t7132s-r0/plugins/sfputil.py new file mode 100644 index 0000000000..f8fb3d2744 --- /dev/null +++ b/device/supermicro/x86_64-supermicro_sse_t7132s-r0/plugins/sfputil.py @@ -0,0 +1,211 @@ +# Platform-specific SFP transceiver interface for SONiC +# This plugin supports QSFP and SFP. + +try: + import time + from sonic_sfp.sfputilbase import SfpUtilBase +except ImportError as e: + raise ImportError("%s - required module not found" % str(e)) + + +class SfpUtil(SfpUtilBase): + """Platform-specific SfpUtil class""" + + PORT_START = 0 + PORT_END = 34 + QSFP_PORT_START = 0 + QSFP_PORT_END = 32 + SFP_PORT_START = 33 + SFP_PORT_END = 34 + + EEPROM_OFFSET = 11 + PORT_INFO_PATH = '/sys/class/t7132s_cpld' + + _port_name = "" + _port_to_eeprom_mapping = {} + _port_to_i2cbus_mapping = {} + _port_to_offset = [11, 30, 12, 29, 13, 28, 14, 27, 15, 34, + 16, 33, 17, 32, 18, 31, 19, 38, 20, 37, + 21, 36, 22, 35, 23, 42, 24, 41, 25, 40, + 26, 39, + 43, 44] + _global_port_pres_dict = {} + + @property + def port_start(self): + return self.PORT_START + + @property + def port_end(self): + return self.PORT_END + + @property + def qsfp_ports(self): + return [] + + @property + def qsfp_ports(self): + return list(range(self.QSFP_PORT_START, self.QSFP_PORT_END)) + + @property + def port_to_eeprom_mapping(self): + return self._port_to_eeprom_mapping + + @property + def port_to_i2cbus_mapping(self): + return self._port_to_i2cbus_mapping + + def get_port_name(self, port_num): + if port_num in self.qsfp_ports: + self._port_name = "QSFP" + str(port_num + 1) + else: + self._port_name = "SFP" + str(port_num - self.QSFP_PORT_END + 1) + return self._port_name + + def get_eeprom_dom_raw(self, port_num): + if port_num in self.qsfp_ports: + # QSFP DOM EEPROM is also at addr 0x50 and thus also stored in eeprom_ifraw + return None + else: + # Read dom eeprom at addr 0x51 + return self._read_eeprom_devid(port_num, self.DOM_EEPROM_ADDR, 256) + + def __init__(self): + # Override port_to_eeprom_mapping for class initialization + eeprom_path = '/sys/bus/i2c/devices/i2c-{0}/{0}-0050/eeprom' + + for x in range(self.PORT_START, self.PORT_END): + self.port_to_i2cbus_mapping[x] = (x + self.EEPROM_OFFSET) + self.port_to_eeprom_mapping[x] = eeprom_path.format( + self._port_to_offset[x]) + self.init_global_port_presence() + SfpUtilBase.__init__(self) + + def init_global_port_presence(self): + for port_num in range(self.port_start, (self.port_end)): + presence = self.get_presence(port_num) + if(presence): + self._global_port_pres_dict[port_num] = '1' + else: + self._global_port_pres_dict[port_num] = '0' + + def get_presence(self, port_num): + # Check for invalid port_num + if port_num not in list(range(self.port_start, self.port_end + 1)): + return False + + # Get path for access port presence status + port_name = self.get_port_name(port_num) + sysfs_filename = "qsfp_modprs" if port_num in self.qsfp_ports else "sfp_modabs" + reg_path = "/".join([self.PORT_INFO_PATH, port_name, sysfs_filename]) + + # Read status + try: + reg_file = open(reg_path) + content = reg_file.readline().rstrip() + reg_value = int(content) + except IOError as e: + print("Error: unable to open file: %s" % str(e)) + return False + + # Module present is active low + if reg_value == 0: + return True + + return False + + def get_low_power_mode(self, port_num): + # Check for invalid QSFP port_num + if port_num not in self.qsfp_ports: + return False + + try: + port_name = self.get_port_name(port_num) + reg_file = open("/".join([self.PORT_INFO_PATH, + port_name, "qsfp_lpmode"])) + except IOError as e: + print("Error: unable to open file: %s" % str(e)) + return False + + # Read status + content = reg_file.readline().rstrip() + reg_value = int(content) + # low power mode is active high + if reg_value == 0: + return False + + return True + + def set_low_power_mode(self, port_num, lpmode): + # Check for invalid QSFP port_num + if port_num not in self.qsfp_ports: + return False + + try: + port_name = self.get_port_name(port_num) + reg_file = open("/".join([self.PORT_INFO_PATH, + port_name, "qsfp_lpmode"]), "r+") + except IOError as e: + print("Error: unable to open file: %s" % str(e)) + return False + + content = hex(lpmode) + + reg_file.seek(0) + reg_file.write(content) + reg_file.close() + + return True + + def reset(self, port_num): + # Check for invalid QSFP port_num + if port_num not in self.qsfp_ports: + return False + + try: + port_name = self.get_port_name(port_num) + reg_file = open("/".join([self.PORT_INFO_PATH, + port_name, "qsfp_reset"]), "w") + except IOError as e: + print("Error: unable to open file: %s" % str(e)) + return False + + # Convert our register value back to a hex string and write back + reg_file.seek(0) + reg_file.write(hex(0)) + reg_file.close() + + # Sleep 1 second to allow it to settle + time.sleep(1) + + # Flip the bit back high and write back to the register to take port out of reset + try: + reg_file = open( + "/".join([self.PORT_INFO_PATH, port_name, "qsfp_reset"]), "w") + except IOError as e: + print("Error: unable to open file: %s" % str(e)) + return False + + reg_file.seek(0) + reg_file.write(hex(1)) + reg_file.close() + + return True + + def get_transceiver_change_event(self): + port_dict = {} + while True: + for port_num in range(self.port_start, (self.port_end + 1)): + presence = self.get_presence(port_num) + if(presence and self._global_port_pres_dict[port_num] == '0'): + self._global_port_pres_dict[port_num] = '1' + port_dict[port_num] = '1' + elif(not presence and + self._global_port_pres_dict[port_num] == '1'): + self._global_port_pres_dict[port_num] = '0' + port_dict[port_num] = '0' + + if(len(port_dict) > 0): + return True, port_dict + + time.sleep(0.5) diff --git a/device/supermicro/x86_64-supermicro_sse_t7132s-r0/plugins/ssd_util.py b/device/supermicro/x86_64-supermicro_sse_t7132s-r0/plugins/ssd_util.py new file mode 100644 index 0000000000..3a26dbfe43 --- /dev/null +++ b/device/supermicro/x86_64-supermicro_sse_t7132s-r0/plugins/ssd_util.py @@ -0,0 +1,8 @@ +from sonic_platform_base.sonic_ssd.ssd_generic import SsdUtil as SsdUtilGeneric + +class SsdUtil(SsdUtilGeneric): + def parse_innodisk_info(self): + super().parse_innodisk_info() + if self.vendor_ssd_info: + # fix too lazy pattern 'Health:\s*(.+?)%?' + self.health = self._parse_re('Health:\s*(.+?)%', self.vendor_ssd_info) diff --git a/device/supermicro/x86_64-supermicro_sse_t7132s-r0/pmon_daemon_control.json b/device/supermicro/x86_64-supermicro_sse_t7132s-r0/pmon_daemon_control.json new file mode 100644 index 0000000000..16f0755583 --- /dev/null +++ b/device/supermicro/x86_64-supermicro_sse_t7132s-r0/pmon_daemon_control.json @@ -0,0 +1,6 @@ +{ + "skip_ledd": true, + "skip_xcvrd": false, + "skip_psud": false, + "skip_thermalctld": false +} diff --git a/device/supermicro/x86_64-supermicro_sse_t7132s-r0/sensors.conf b/device/supermicro/x86_64-supermicro_sse_t7132s-r0/sensors.conf new file mode 100755 index 0000000000..7c9a6321df --- /dev/null +++ b/device/supermicro/x86_64-supermicro_sse_t7132s-r0/sensors.conf @@ -0,0 +1,2 @@ +# libsensors configuration file for Celestica Midstone-200i. +# The i2c bus portion is omit because adapter name diff --git a/device/supermicro/x86_64-supermicro_sse_t7132s-r0/system_health_monitoring_config.json b/device/supermicro/x86_64-supermicro_sse_t7132s-r0/system_health_monitoring_config.json new file mode 100644 index 0000000000..728dcb491e --- /dev/null +++ b/device/supermicro/x86_64-supermicro_sse_t7132s-r0/system_health_monitoring_config.json @@ -0,0 +1,11 @@ +{ + "services_to_ignore": [], + "devices_to_ignore": ["asic", "psu.temperature"], + "user_defined_checkers": ["python3 /usr/local/bin/health_checker_thermal.py"], + "polling_interval": 60, + "led_color": { + "fault": "red", + "normal": "green", + "booting": "green_blink" + } +} diff --git a/device/supermicro/x86_64-supermicro_sse_t7132s-r0/thermal_policy.json b/device/supermicro/x86_64-supermicro_sse_t7132s-r0/thermal_policy.json new file mode 100644 index 0000000000..e69de29bb2 diff --git a/device/supermicro/x86_64-supermicro_sse_t7132s-r0/topo.conf b/device/supermicro/x86_64-supermicro_sse_t7132s-r0/topo.conf new file mode 100644 index 0000000000..795ea43143 --- /dev/null +++ b/device/supermicro/x86_64-supermicro_sse_t7132s-r0/topo.conf @@ -0,0 +1 @@ +t1 diff --git a/device/supermicro/x86_64-supermicro_sse_t7132s-r0/warm-reboot_plugin b/device/supermicro/x86_64-supermicro_sse_t7132s-r0/warm-reboot_plugin new file mode 100755 index 0000000000..6bc65e0edf --- /dev/null +++ b/device/supermicro/x86_64-supermicro_sse_t7132s-r0/warm-reboot_plugin @@ -0,0 +1,2 @@ +#!/bin/bash +/usr/local/bin/sysledctl.py reboot diff --git a/platform/innovium/one-image.mk b/platform/innovium/one-image.mk index 2cae779d71..bd63990f51 100755 --- a/platform/innovium/one-image.mk +++ b/platform/innovium/one-image.mk @@ -7,6 +7,7 @@ $(SONIC_ONE_IMAGE)_IMAGE_TYPE = onie $(SONIC_ONE_IMAGE)_LAZY_INSTALLS += $(CEL_MIDSTONE_200I_PLATFORM_MODULE) $(SONIC_ONE_IMAGE)_LAZY_INSTALLS += $(DELTA_PLATFORM_MODULE) $(SONIC_ONE_IMAGE)_LAZY_INSTALLS += $(NETBERG_AURORA_715_PLATFORM_MODULE) +$(SONIC_ONE_IMAGE)_LAZY_INSTALLS += $(SMCI_SSE_T7132S_PLATFORM_MODULE) $(SONIC_ONE_IMAGE)_LAZY_INSTALLS += $(WISTRON_PLATFORM_MODULE) $(SONIC_ONE_IMAGE)_INSTALLS += $(INVM_DRV) $(SONIC_ONE_IMAGE)_DOCKERS += $(SONIC_INSTALL_DOCKER_IMAGES) diff --git a/platform/innovium/platform-modules-supermicro.mk b/platform/innovium/platform-modules-supermicro.mk new file mode 100644 index 0000000000..f9efee4aed --- /dev/null +++ b/platform/innovium/platform-modules-supermicro.mk @@ -0,0 +1,9 @@ +SMCI_PLATFORM_MODULE_VERSION = 0.1 + +export SMCI_PLATFORM_MODULE_VERSION + +SMCI_SSE_T7132S_PLATFORM_MODULE = platform-modules-sse-t7132s_$(SMCI_PLATFORM_MODULE_VERSION)_$(CONFIGURED_ARCH).deb +$(SMCI_SSE_T7132S_PLATFORM_MODULE)_SRC_PATH = $(PLATFORM_PATH)/sonic-platform-modules-supermicro +$(SMCI_SSE_T7132S_PLATFORM_MODULE)_DEPENDS += $(LINUX_HEADERS) $(LINUX_HEADERS_COMMON) +$(SMCI_SSE_T7132S_PLATFORM_MODULE)_PLATFORM = x86_64-supermicro_sse_t7132s-r0 +SONIC_DPKG_DEBS += $(SMCI_SSE_T7132S_PLATFORM_MODULE) diff --git a/platform/innovium/rules.mk b/platform/innovium/rules.mk index 350ab8ef3f..03efa70b0d 100755 --- a/platform/innovium/rules.mk +++ b/platform/innovium/rules.mk @@ -1,5 +1,6 @@ include $(PLATFORM_PATH)/invm-sai.mk include $(PLATFORM_PATH)/platform-modules-cel.mk +include $(PLATFORM_PATH)/platform-modules-supermicro.mk #include $(PLATFORM_PATH)/platform-modules-delta.mk include $(PLATFORM_PATH)/platform-modules-wistron.mk #include $(PLATFORM_PATH)/platform-modules-netberg.mk diff --git a/platform/innovium/sonic-platform-modules-supermicro/debian/changelog b/platform/innovium/sonic-platform-modules-supermicro/debian/changelog new file mode 100644 index 0000000000..d7863facbb --- /dev/null +++ b/platform/innovium/sonic-platform-modules-supermicro/debian/changelog @@ -0,0 +1,5 @@ +sonic-supermicro-platform-modules (0.1) unstable; urgency=low + + * Inital release of SSE-T7132S platform module package. + + -- SuperMicro Team Fri, 22 Oct 2021 17:14:00 +0800 diff --git a/platform/innovium/sonic-platform-modules-supermicro/debian/compat b/platform/innovium/sonic-platform-modules-supermicro/debian/compat new file mode 100644 index 0000000000..ec635144f6 --- /dev/null +++ b/platform/innovium/sonic-platform-modules-supermicro/debian/compat @@ -0,0 +1 @@ +9 diff --git a/platform/innovium/sonic-platform-modules-supermicro/debian/control b/platform/innovium/sonic-platform-modules-supermicro/debian/control new file mode 100644 index 0000000000..1189c7d867 --- /dev/null +++ b/platform/innovium/sonic-platform-modules-supermicro/debian/control @@ -0,0 +1,16 @@ +Source: sonic-supermicro-platform-modules +Section: main +Priority: extra +Maintainer: SuperMicro Team +Build-Depends: + dh-python, + debhelper (>= 9.0.0), + python3(>=3.5), + python3-setuptools, + bzip2 + +Standards-Version: 3.9.3 +Package: platform-modules-sse-t7132s +Architecture: amd64 +Description: kernel modules for platform devices such as fan, led, sfp + diff --git a/platform/innovium/sonic-platform-modules-supermicro/debian/platform-modules-sse-t7132s.install b/platform/innovium/sonic-platform-modules-supermicro/debian/platform-modules-sse-t7132s.install new file mode 100644 index 0000000000..bf9378db1f --- /dev/null +++ b/platform/innovium/sonic-platform-modules-supermicro/debian/platform-modules-sse-t7132s.install @@ -0,0 +1,8 @@ +sse-t7132s/scripts/platform.sh /usr/local/bin +sse-t7132s/scripts/health_checker_thermal.py /usr/local/bin +sse-t7132s/scripts/sysledctl.py /usr/local/bin +sse-t7132s/cfg/t7132s-modules.conf etc/modules-load.d +sse-t7132s/cfg/iTCO_wdt.conf /etc/modprobe.d +sse-t7132s/systemd/platform-modules-sse-t7132s.service etc/systemd/system +sse-t7132s/systemd/sysled.service etc/systemd/system +sse-t7132s/modules/sonic_platform-1.0-py3-none-any.whl usr/share/sonic/device/x86_64-supermicro_sse_t7132s-r0 diff --git a/platform/innovium/sonic-platform-modules-supermicro/debian/platform-modules-sse-t7132s.postinst b/platform/innovium/sonic-platform-modules-supermicro/debian/platform-modules-sse-t7132s.postinst new file mode 100644 index 0000000000..fc0521a672 --- /dev/null +++ b/platform/innovium/sonic-platform-modules-supermicro/debian/platform-modules-sse-t7132s.postinst @@ -0,0 +1,14 @@ +# postinst script for SSE-T7132S + +# Enable SuperMicro SSE-T7132S +depmod -a +modprobe -r iTCO_wdt +modprobe -r t7132s +modprobe t7132s +systemctl enable platform-modules-sse-t7132s.service +systemctl start platform-modules-sse-t7132s.service +systemctl enable sysled.service + + +#DEBHELPER# + diff --git a/platform/innovium/sonic-platform-modules-supermicro/debian/rules b/platform/innovium/sonic-platform-modules-supermicro/debian/rules new file mode 100644 index 0000000000..1d733f22f4 --- /dev/null +++ b/platform/innovium/sonic-platform-modules-supermicro/debian/rules @@ -0,0 +1,39 @@ +#!/usr/bin/make -f + +export INSTALL_MOD_DIR:=extra + +KVERSION ?= $(shell uname -r) +KERNEL_SRC := /lib/modules/$(KVERSION) +MOD_SRC_DIR:= $(shell pwd) +MODULE_DIRS:= sse-t7132s + +%: + dh $@ + +override_dh_auto_build: + (for mod in $(MODULE_DIRS); do \ + make -C $(KERNEL_SRC)/build M=$(MOD_SRC_DIR)/$${mod}/modules; \ + cd $(MOD_SRC_DIR)/$${mod}; \ + python3 setup.py bdist_wheel -d $(MOD_SRC_DIR)/$${mod}/modules; \ + cd $(MOD_SRC_DIR); \ + done) + +override_dh_auto_install: + (for mod in $(MODULE_DIRS); do \ + dh_installdirs -pplatform-modules-$${mod} \ + $(KERNEL_SRC)/$(INSTALL_MOD_DIR); \ + cp $(MOD_SRC_DIR)/$${mod}/modules/*.ko \ + debian/platform-modules-$${mod}/$(KERNEL_SRC)/$(INSTALL_MOD_DIR); \ + done) + +override_dh_usrlocal: + +override_dh_clean: + dh_clean + (for mod in $(MODULE_DIRS); do \ + make -C $(KERNEL_SRC)/build M=$(MOD_SRC_DIR)/$${mod}/modules clean; \ + rm -f $(MOD_SRC_DIR)/$${mod}/modules/*.whl; \ + rm -rf $(MOD_SRC_DIR)/$${mod}/build; \ + rm -rf $(MOD_SRC_DIR)/$${mod}/*.egg-info; \ + done) + diff --git a/platform/innovium/sonic-platform-modules-supermicro/sse-t7132s/cfg/iTCO_wdt.conf b/platform/innovium/sonic-platform-modules-supermicro/sse-t7132s/cfg/iTCO_wdt.conf new file mode 100644 index 0000000000..99ded4c322 --- /dev/null +++ b/platform/innovium/sonic-platform-modules-supermicro/sse-t7132s/cfg/iTCO_wdt.conf @@ -0,0 +1 @@ +blacklist iTCO_wdt diff --git a/platform/innovium/sonic-platform-modules-supermicro/sse-t7132s/cfg/t7132s-modules.conf b/platform/innovium/sonic-platform-modules-supermicro/sse-t7132s/cfg/t7132s-modules.conf new file mode 100644 index 0000000000..ffb5b98feb --- /dev/null +++ b/platform/innovium/sonic-platform-modules-supermicro/sse-t7132s/cfg/t7132s-modules.conf @@ -0,0 +1,16 @@ +# /etc/modules: kernel modules to load at boot time. +# +# This file contains the names of kernel modules that should be loaded +# at boot time, one per line. Lines beginning with "#" are ignored. + +i2c-i801 +i2c-isch +i2c-ismt +i2c-dev +i2c-mux +i2c-smbus +i2c-mux-gpio +i2c-mux-pca954x +ipmi-devintf +ast +t7132s \ No newline at end of file diff --git a/platform/innovium/sonic-platform-modules-supermicro/sse-t7132s/modules/Makefile b/platform/innovium/sonic-platform-modules-supermicro/sse-t7132s/modules/Makefile new file mode 100644 index 0000000000..7288a5e59c --- /dev/null +++ b/platform/innovium/sonic-platform-modules-supermicro/sse-t7132s/modules/Makefile @@ -0,0 +1 @@ +obj-m := t7132s.o diff --git a/platform/innovium/sonic-platform-modules-supermicro/sse-t7132s/modules/t7132s.c b/platform/innovium/sonic-platform-modules-supermicro/sse-t7132s/modules/t7132s.c new file mode 100755 index 0000000000..2bc83f5b3a --- /dev/null +++ b/platform/innovium/sonic-platform-modules-supermicro/sse-t7132s/modules/t7132s.c @@ -0,0 +1,1706 @@ +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include /* For the watchdog specific items */ +#define REG_LACKSR 0x00 +#define LACKSR_CLKDIV 0x8 +#define LACKSR_CLKSEL (1 << 8) +#define LACKSR_DIVEN (1 << 10) +#define LACKSR_CLKODR (1 << 12) +#define LACKSR_CLKOEN (1 << 13) +#define LACKSR_ALERA (1 << 14) + +#define REG_LAS0CFGR 0x00C +#define REG_LAS0TIMR 0x010 +#define REG_LAS0ADDR 0x014 +#define REG_LAS1CFGR 0x018 +#define REG_LAS1TIMR 0x01C +#define REG_LAS1ADDR 0x020 +#define LASCFGR_INT_P (1 << 0) +#define LASCFGR_INT_L (1 << 1) +#define LASCFGR_DRQ_P (1 << 2) +#define LASCFGR_DAK_P (1 << 3) +#define LASCFGR_LSER (1 << 4) +#define LASCFGR_ENDIAN (1 << 5) +#define LASCFGR_BW16 (1 << 6) +#define REG_LIEMR 0x024 +#define LIEMR_RDYPOL (1 << 4) +#define LIEMR_ALEPOL (1 << 5) +#define LIEMR_SYNCBUS (1 << 6) +#define LIEMR_MULTBUS (1 << 7) +#define LIEMR_DMA0EN (1 << 8) +#define LIEMR_DMA1EN (1 << 9) +#define LIEMR_LRST (1 << 14) +#define LIEMR_SRST (1 << 15) +#define LIEMR_L0EINTEN (1 << 16) +#define LIEMR_L0RTOIEN (1 << 17) +#define LIEMR_L1EINTEN (1 << 18) +#define LIEMR_L1RTOIEN (1 << 19) +#define LIEMR_D0DIEN (1 << 24) +#define LIEMR_D0AIEN (1 << 25) +#define LIEMR_D1DIEN (1 << 26) +#define LIEMR_D1AIEN (1 << 27) + +#define DRIVER_NAME "switchboard" +#define DEVICE_NAME "fwupgrade" +#define CLASS_NAME "t7132s_cpld" +#define SFF_PORT_TOTAL 34 +#define QSFP_PORT_TOTAL 32 +#define SFP_PORT_TOTAL 2 + +/* Refer to SSE_T7132S_CPLD_spec_0820.docx for more details */ +/* Switch model ID */ +#define CPLD1_REG_SW_ID 0x1 +/* HW/CPLD version */ +#define CPLD1_REG_HWREV 0x2 +/* Power sequence module status */ +#define CPLD1_REG_PWR_GOOD 0x3 +/* Voltage Regulator Module ALERT/Thermal */ +#define CPLD1_REG_VRM 0x4 +/* Enable/ Reset misc. devices */ +#define CPLD1_REG_DEV_STATE_1 0x5 +/* Enable/ Reset misc. devices */ +#define CPLD1_REG_DEV_STATE_2 0x6 +/* System reset records */ +#define CPLD1_REG_SYS_RESET_REC 0x9 +/* PCA9548 I2C bus switch RSTn */ +#define CPLD1_REG_MUX_STATE 0xB +/* Transceiver Power Enable */ +#define CPLD1_REG_X_PWR_EN_1 0xC +/* Transceiver Power Enable */ +#define CPLD1_REG_X_PWR_EN_2 0xD +/* Transceiver Power Good */ +#define CPLD1_REG_X_PWR_GOOD_1 0xE +/* Transceiver Power Good */ +#define CPLD1_REG_X_PWR_GOOD_2 0xF +/* Watch Dog Timer maximum count setting by seconds */ +#define CPLD1_REG_WDT_MAX_COUNT_1 0x22 +#define CPLD1_REG_WDT_MAX_COUNT_2 0x23 +/* Watch Dog Timer current count value 16 bits */ +#define CPLD1_REG_WDT_CUR_COUNT_1 0x24 +#define CPLD1_REG_WDT_CUR_COUNT_2 0x25 +/* Version as BMC I2C Registers */ +#define CPLD1_REG_VER_BMC_I2C_1 0xF0 +#define CPLD1_REG_VER_BMC_I2C_2 0xF1 +#define CPLD1_REG_VER_BMC_I2C_3 0xF2 +#define CPLD1_REG_VER_BMC_I2C_4 0xF3 +/* CPLD JED Released Date */ +#define CPLD1_REG_JED_REL_MONTH 0xFE +#define CPLD1_REG_JED_REL_DAY 0xFF + +/* HW/CPLD version */ +#define CPLD2_REG_HWREV 0x2 +/* System Ready/Reset Status */ +#define CPLD2_REG_SYSRDY_RESET_STATUS 0x3 +/* All xcvr LED control */ +#define CPLD2_REG_ALL_LED_CTRL 0x4 +/* Version as BMC I2C Registers */ +#define CPLD2_REG_VER_BMC_I2C_1 0xF0 +#define CPLD2_REG_VER_BMC_I2C_2 0xF1 +#define CPLD2_REG_VER_BMC_I2C_3 0xF2 +#define CPLD2_REG_VER_BMC_I2C_4 0xF3 +/* CPLD JED Released Date */ +#define CPLD2_REG_JED_REL_MONTH 0xFE +#define CPLD2_REG_JED_REL_DAY 0xFF + +#define QSFP_T_RESET_LOf 0x10 +#define QSFP_T_RESET_HIf 0x11 + +#define QSFP_T_LPMODE_LOf 0x12 +#define QSFP_T_LPMODE_HIf 0x13 + +#define QSFP_T_INT_LOf 0x14 +#define QSFP_T_INT_HIf 0x15 + +#define QSFP_T_MODPRS_LOf 0x16 +#define QSFP_T_MODPRS_HIf 0x17 + +#define QSFP_B_RESET_LOf 0x18 +#define QSFP_B_RESET_HIf 0x19 + +#define QSFP_B_LPMODE_LOf 0x1A +#define QSFP_B_LPMODE_HIf 0x1B + +#define QSFP_B_INT_LOf 0x1C +#define QSFP_B_INT_HIf 0x1D + +#define QSFP_B_MODPRS_LOf 0x1E +#define QSFP_B_MODPRS_HIf 0x1F + +#define QSFP_REG_READ(_pbmp_, _reg_, _base_) \ + do { \ + _pbmp_ = readb(_base_ + _reg_##_HIf) | \ + (readb(_base_ + _reg_##_LOf) << 8); \ + } while (0); + +#define QSFP_REG_WRITE(_pbmp_, _reg_, _base_) \ + do { \ + writeb((_pbmp_ & 0x00ff), \ + _base_ + _reg_##_HIf); \ + writeb(((_pbmp_ >> 8) & 0x00ff), \ + _base_ + _reg_##_LOf); \ + } while (0); + +enum PORT_TYPE { NONE, QSFP, SFP }; + +struct t7132s_cpld { + struct mutex lock; + unsigned char __iomem *cpld_base; + unsigned char __iomem *cpld2_base; + struct device *sff_devices[SFF_PORT_TOTAL]; + struct i2c_client *sff_i2c_clients[SFF_PORT_TOTAL]; +}; + +static struct t7132s_cpld *cpld_data; +static struct class *cpld_class = NULL; + +enum i2c_adapter_type { + I2C_ADAPTER_I801 = 0, + I2C_ADAPTER_ISMT, + I2C_ADAPTER_CP2112, + I2C_ADAPTER_PCA954X +}; + +const char *bms_i2c_adapter_names[] = { + "SMBus I801 adapter", + "SMBus iSMT adapter", + "CP2112 SMBus Bridge", + "PCA954X Mux" }; + +struct i2c_topo_node { + int adapter_type; + int parent_index; + int chan_id; + struct i2c_board_info entry; + struct i2c_client *client; +}; + +static struct i2c_topo_node i2c_topo[] = { + { I2C_ADAPTER_CP2112, -1, -1, { I2C_BOARD_INFO("pca9548", 0x70) }, NULL }, + { I2C_ADAPTER_PCA954X, 0, 0, { I2C_BOARD_INFO("pca9548", 0x71) }, NULL }, + { I2C_ADAPTER_PCA954X, 0, 2, { I2C_BOARD_INFO("pca9548", 0x72) }, NULL }, + { I2C_ADAPTER_PCA954X, 0, 1, { I2C_BOARD_INFO("pca9548", 0x73) }, NULL }, + { I2C_ADAPTER_PCA954X, 0, 3, { I2C_BOARD_INFO("pca9548", 0x74) }, NULL }, + { I2C_ADAPTER_PCA954X, 0, 4, { I2C_BOARD_INFO("pca9548", 0x75) }, NULL }, + { I2C_ADAPTER_PCA954X, 5, 3, { I2C_BOARD_INFO("24c64", 0x53) }, NULL }, +}; + +static struct i2c_board_info sff_eeprom_info[] = { + { I2C_BOARD_INFO("optoe3", 0x50) }, + { I2C_BOARD_INFO("optoe2", 0x50) } +}; + +struct sff_device_data { + int portid; + enum PORT_TYPE port_type; + int parent_index; + int chan_id; +}; + +struct sff_device_data sff_device_tbl[SFF_PORT_TOTAL] = { + { 1, QSFP, 1, 0 }, { 2, QSFP, 3, 3 }, { 3, QSFP, 1, 1 }, + { 4, QSFP, 3, 2 }, { 5, QSFP, 1, 2 }, { 6, QSFP, 3, 1 }, + { 7, QSFP, 1, 3 }, { 8, QSFP, 3, 0 }, { 9, QSFP, 1, 4 }, + { 10, QSFP, 3, 7 }, { 11, QSFP, 1, 5 }, { 12, QSFP, 3, 6 }, + { 13, QSFP, 1, 6 }, { 14, QSFP, 3, 5 }, { 15, QSFP, 1, 7 }, + { 16, QSFP, 3, 4 }, { 17, QSFP, 2, 0 }, { 18, QSFP, 4, 3 }, + { 19, QSFP, 2, 1 }, { 20, QSFP, 4, 2 }, { 21, QSFP, 2, 2 }, + { 22, QSFP, 4, 1 }, { 23, QSFP, 2, 3 }, { 24, QSFP, 4, 0 }, + { 25, QSFP, 2, 4 }, { 26, QSFP, 4, 7 }, { 27, QSFP, 2, 5 }, + { 28, QSFP, 4, 6 }, { 29, QSFP, 2, 6 }, { 30, QSFP, 4, 5 }, + { 31, QSFP, 2, 7 }, { 32, QSFP, 4, 4 }, { 1, SFP, 5, 0 }, + { 2, SFP, 5, 1 }, +}; + +#define WATCHDOG_TIMEOUT 30 /* 30 sec default heartbeat */ + +static struct watchdog_device *pwddev; + +static const struct watchdog_info ident = { + .options = WDIOF_SETTIMEOUT | + WDIOF_KEEPALIVEPING | + WDIOF_MAGICCLOSE, + .firmware_version = 0, + .identity = "t7132s_wdt", +}; + +/* used to access CPLD register not defined in this driver with sys filesystem */ +uint8_t cpld_testee_offset[2] = {0, 0}; + +static ssize_t swid_show(struct device *dev, struct device_attribute *attr, + char *buf) +{ + uint8_t data = 0; + int err; + char *ptr = (cpld_data->cpld_base + CPLD1_REG_SW_ID); + + mutex_lock(&cpld_data->lock); + data = readb(cpld_data->cpld_base + CPLD1_REG_SW_ID); + mutex_unlock(&cpld_data->lock); + + return sprintf(buf, "0x%2.2x\n", data); +} +struct device_attribute dev_attr_swid = __ATTR(swid, 0400, swid_show, NULL); + +static ssize_t hwrev_show(struct device *dev, struct device_attribute *attr, + char *buf) +{ + uint8_t data = 0; + int err; + char *ptr = (cpld_data->cpld_base + CPLD1_REG_HWREV); + + mutex_lock(&cpld_data->lock); + data = readb(cpld_data->cpld_base + CPLD1_REG_HWREV); + mutex_unlock(&cpld_data->lock); + + return sprintf(buf, "0x%2.2x\n", data); +} +struct device_attribute dev_attr_hwrev = __ATTR(hw_rev, 0400, hwrev_show, NULL); + +static ssize_t pwrgood_show(struct device *dev, struct device_attribute *attr, + char *buf) +{ + uint8_t data = 0; + int err; + + mutex_lock(&cpld_data->lock); + data = readb(cpld_data->cpld_base + CPLD1_REG_PWR_GOOD); + mutex_unlock(&cpld_data->lock); + + return sprintf(buf, "0x%2.2x\n", data); +} +struct device_attribute dev_attr_pwrgood = + __ATTR(pwr_good, 0400, pwrgood_show, NULL); + +static ssize_t vrm_show(struct device *dev, struct device_attribute *attr, + char *buf) +{ + uint8_t data = 0; + int err; + + mutex_lock(&cpld_data->lock); + data = readb(cpld_data->cpld_base + CPLD1_REG_VRM); + mutex_unlock(&cpld_data->lock); + + return sprintf(buf, "0x%2.2x\n", data); +} +struct device_attribute dev_attr_vrm = __ATTR(vrm, 0400, vrm_show, NULL); + +static ssize_t devstate_show(struct device *dev, struct device_attribute *attr, + char *buf) +{ + uint8_t data = 0; + uint8_t data2 = 0; + long value = 0; + int err; + + mutex_lock(&cpld_data->lock); + data = readb(cpld_data->cpld_base + CPLD1_REG_DEV_STATE_1); + data2 = readb(cpld_data->cpld_base + CPLD1_REG_DEV_STATE_2); + value = data; + value |= (data2 << 8); + mutex_unlock(&cpld_data->lock); + + return sprintf(buf, "0x%4.4lx\n", value); +} +static ssize_t devstate_store(struct device *dev, struct device_attribute *attr, + const char *buf, size_t count) +{ + ssize_t status = 0; + long value = 0; + uint8_t data = 0; + uint8_t data2 = 0; + + mutex_lock(&cpld_data->lock); + status = kstrtol(buf, 0, &value); + if (status == 0) { + data = value & 0xff; + data2 = (value & 0xff00) >> 8; + writeb(data, cpld_data->cpld_base + CPLD1_REG_DEV_STATE_1); + writeb(data2, cpld_data->cpld_base + CPLD1_REG_DEV_STATE_2); + status = count; + } + mutex_unlock(&cpld_data->lock); + + return status; +} +struct device_attribute dev_attr_devstate = + __ATTR(dev_state, 0600, devstate_show, devstate_store); + +static ssize_t wdtmax_show(struct device *dev, struct device_attribute *attr, + char *buf) +{ + uint8_t data1 = 0; + uint8_t data2 = 0; + long value = 0; + + mutex_lock(&cpld_data->lock); + data1 = readb(cpld_data->cpld_base + CPLD1_REG_WDT_MAX_COUNT_1); + data2 = readb(cpld_data->cpld_base + CPLD1_REG_WDT_MAX_COUNT_2); + value = (data2 << 8) | data1; + mutex_unlock(&cpld_data->lock); + + return sprintf(buf, "0x%4.4lx\n", value); +} +static ssize_t wdtmax_store(struct device *dev, struct device_attribute *attr, + const char *buf, size_t count) +{ + ssize_t status = 0; + long value = 0; + uint8_t data1; + uint8_t data2; + + mutex_lock(&cpld_data->lock); + status = kstrtol(buf, 0, &value); + if (status == 0) { + data1 = value & 0xff; + data2 = (value & 0xff00) >> 8; + writeb(data1, cpld_data->cpld_base + CPLD1_REG_WDT_MAX_COUNT_1); + writeb(data2, cpld_data->cpld_base + CPLD1_REG_WDT_MAX_COUNT_2); + status = count; + } + mutex_unlock(&cpld_data->lock); + + return status; +} +struct device_attribute dev_attr_wdtmax = + __ATTR(wdt_max, 0600, wdtmax_show, wdtmax_store); + +static ssize_t wdtcount_show(struct device *dev, struct device_attribute *attr, + char *buf) +{ + uint8_t data1 = 0; + uint8_t data2 = 0; + long value = 0; + + mutex_lock(&cpld_data->lock); + data1 = readb(cpld_data->cpld_base + CPLD1_REG_WDT_CUR_COUNT_1); + data2 = readb(cpld_data->cpld_base + CPLD1_REG_WDT_CUR_COUNT_2); + value = (data2 << 8) | data1; + mutex_unlock(&cpld_data->lock); + + return sprintf(buf, "0x%4.4lx\n", value); +} +struct device_attribute dev_attr_wdtcount = + __ATTR(wdt_count, 0400, wdtcount_show, NULL); + +static ssize_t sysrst_rec_show(struct device *dev, struct device_attribute *attr, + char *buf) +{ + uint8_t data = 0; + int err; + + mutex_lock(&cpld_data->lock); + data = readb(cpld_data->cpld_base + CPLD1_REG_SYS_RESET_REC); + mutex_unlock(&cpld_data->lock); + + return sprintf(buf, "0x%2.2x\n", data); +} +static ssize_t sysrst_rec_store(struct device *dev, struct device_attribute *attr, + const char *buf, size_t count) +{ + ssize_t status = 0; + uint8_t data; + + mutex_lock(&cpld_data->lock); + status = kstrtou8(buf, 0, &data); + + if (status == 0) { + writeb(data, cpld_data->cpld_base + CPLD1_REG_SYS_RESET_REC); + status = count; + } + mutex_unlock(&cpld_data->lock); + + return status; +} +struct device_attribute dev_attr_sysrst_rec = + __ATTR(sysrst_rec, 0600, sysrst_rec_show, sysrst_rec_store); + +static ssize_t muxstate_show(struct device *dev, struct device_attribute *attr, + char *buf) +{ + uint8_t data = 0; + int err; + + mutex_lock(&cpld_data->lock); + data = readb(cpld_data->cpld_base + CPLD1_REG_MUX_STATE); + mutex_unlock(&cpld_data->lock); + + return sprintf(buf, "0x%2.2x\n", data); +} +static ssize_t muxstate_store(struct device *dev, struct device_attribute *attr, + const char *buf, size_t count) +{ + ssize_t status = 0; + uint8_t data; + + mutex_lock(&cpld_data->lock); + status = kstrtou8(buf, 0, &data); + if (status == 0) { + writeb(data, cpld_data->cpld_base + CPLD1_REG_MUX_STATE); + status = count; + } + mutex_unlock(&cpld_data->lock); + + return status; +} +struct device_attribute dev_attr_muxstate = + __ATTR(i2c_mux_state, 0600, muxstate_show, muxstate_store); + +static ssize_t xcvr_pwrstate_show(struct device *dev, + struct device_attribute *attr, char *buf) +{ + uint8_t data = 0; + uint8_t data2 = 0; + long value = 0; + int err; + + mutex_lock(&cpld_data->lock); + data = readb(cpld_data->cpld_base + CPLD1_REG_X_PWR_EN_2); + data2 = readb(cpld_data->cpld_base + CPLD1_REG_X_PWR_EN_1); + value = data; + value |= (data2 << 8); + mutex_unlock(&cpld_data->lock); + + return sprintf(buf, "0x%2.2x\n", value); +} +static ssize_t xcvr_pwrstate_store(struct device *dev, + struct device_attribute *attr, + const char *buf, size_t count) +{ + ssize_t status = 0; + long value = 0; + uint8_t data = 0; + uint8_t data2 = 0; + + mutex_lock(&cpld_data->lock); + status = kstrtol(buf, 0, &value); + if (status == 0) { + data = value & 0xff; + data2 = (value & 0xff00) >> 8; + writeb(data, cpld_data->cpld_base + CPLD1_REG_X_PWR_EN_2); + writeb(data2, cpld_data->cpld_base + CPLD1_REG_X_PWR_EN_1); + status = count; + } + mutex_unlock(&cpld_data->lock); + + return status; +} +struct device_attribute dev_attr_xcvr_pwrstate = + __ATTR(xcvr_pwr_state, 0600, xcvr_pwrstate_show, xcvr_pwrstate_store); + +static ssize_t xcvr_pwrgood_show(struct device *dev, + struct device_attribute *attr, char *buf) +{ + uint8_t data = 0; + uint8_t data2 = 0; + long value = 0; + int err; + + mutex_lock(&cpld_data->lock); + data = readb(cpld_data->cpld_base + CPLD1_REG_X_PWR_GOOD_2); + data2 = readb(cpld_data->cpld_base + CPLD1_REG_X_PWR_GOOD_1); + value = data; + value |= (data2 << 8); + mutex_unlock(&cpld_data->lock); + + return sprintf(buf, "0x%2.2x\n", value); +} +struct device_attribute dev_attr_xcvr_pwrgood = + __ATTR(xcvr_pwr_good, 0400, xcvr_pwrgood_show, NULL); + +static ssize_t cpld1_ver_bmc_i2c_show(struct device *dev, + struct device_attribute *attr, char *buf) +{ + uint8_t data = 0; + uint8_t data2 = 0; + uint8_t data3 = 0; + uint8_t data4 = 0; + long value = 0; + int err; + + mutex_lock(&cpld_data->lock); + data = readb(cpld_data->cpld_base + CPLD1_REG_VER_BMC_I2C_4); + data2 = readb(cpld_data->cpld_base + CPLD1_REG_VER_BMC_I2C_3); + data3 = readb(cpld_data->cpld_base + CPLD1_REG_VER_BMC_I2C_2); + data4 = readb(cpld_data->cpld_base + CPLD1_REG_VER_BMC_I2C_1); + value = data; + value |= (data2 << 8); + value |= (data3 << 16); + value |= (data4 << 24); + mutex_unlock(&cpld_data->lock); + + return sprintf(buf, "0x%8.8lx\n", value); +} +struct device_attribute dev_attr_cpld1_ver_bmc_i2c = + __ATTR(ver_bmc_i2c, 0444, cpld1_ver_bmc_i2c_show, NULL); + +static ssize_t cpld1_jed_rel_show(struct device *dev, + struct device_attribute *attr, char *buf) +{ + uint8_t data = 0; + uint8_t data2 = 0; + long value = 0; + int err; + + mutex_lock(&cpld_data->lock); + data = readb(cpld_data->cpld_base + CPLD1_REG_JED_REL_DAY); + data2 = readb(cpld_data->cpld_base + CPLD1_REG_JED_REL_MONTH); + value = data; + value |= (data2 << 8); + mutex_unlock(&cpld_data->lock); + + return sprintf(buf, "0x%4.4lx\n", value); +} +struct device_attribute dev_attr_cpld1_jed_rel = + __ATTR(jed_rel, 0400, cpld1_jed_rel_show, NULL); + +static ssize_t cpld1_testee_offset_show(struct device *dev, struct device_attribute *attr, + char *buf) +{ + return sprintf(buf, "0x%2.2x\n", cpld_testee_offset[0]); +} +static ssize_t cpld1_testee_offset_store(struct device *dev, struct device_attribute *attr, + const char *buf, size_t count) +{ + ssize_t status = 0; + uint8_t data; + + status = kstrtou8(buf, 0, &data); + if (status == 0) { + cpld_testee_offset[0] = data; + status = count; + } + + return status; +} +struct device_attribute dev_attr_cpld1_testee_offset = + __ATTR(testee_offset, 0600, cpld1_testee_offset_show, cpld1_testee_offset_store); + +static ssize_t cpld1_testee_value_show(struct device *dev, struct device_attribute *attr, + char *buf) +{ + uint8_t data = 0; + int err; + + mutex_lock(&cpld_data->lock); + data = readb(cpld_data->cpld_base + cpld_testee_offset[0]); + mutex_unlock(&cpld_data->lock); + + return sprintf(buf, "0x%2.2x\n", data); +} +static ssize_t cpld1_testee_value_store(struct device *dev, struct device_attribute *attr, + const char *buf, size_t count) +{ + ssize_t status = 0; + uint8_t data; + + mutex_lock(&cpld_data->lock); + status = kstrtou8(buf, 0, &data); + if (status == 0) { + writeb(data, cpld_data->cpld_base + cpld_testee_offset[0]); + status = count; + } + mutex_unlock(&cpld_data->lock); + + return status; +} +struct device_attribute dev_attr_cpld1_testee_value = + __ATTR(testee_value, 0600, cpld1_testee_value_show, cpld1_testee_value_store); + +static struct attribute *cpld1_attrs[] = { + &dev_attr_swid.attr, + &dev_attr_hwrev.attr, + &dev_attr_pwrgood.attr, + &dev_attr_vrm.attr, + &dev_attr_devstate.attr, + &dev_attr_sysrst_rec.attr, + &dev_attr_muxstate.attr, + &dev_attr_xcvr_pwrstate.attr, + &dev_attr_xcvr_pwrgood.attr, + &dev_attr_wdtmax.attr, + &dev_attr_wdtcount.attr, + &dev_attr_cpld1_ver_bmc_i2c.attr, + &dev_attr_cpld1_jed_rel.attr, + &dev_attr_cpld1_testee_offset.attr, + &dev_attr_cpld1_testee_value.attr, + NULL, +}; + +static struct attribute_group cpld1_attr_grp = { + .attrs = cpld1_attrs, +}; + +static ssize_t cpld2_ver_show(struct device *dev, struct device_attribute *attr, + char *buf) +{ + uint8_t data = 0; + int err; + + mutex_lock(&cpld_data->lock); + data = readb(cpld_data->cpld2_base + CPLD2_REG_HWREV); + mutex_unlock(&cpld_data->lock); + + return sprintf(buf, "0x%2.2x\n", data); +} +struct device_attribute dev_attr_cpld2_ver = __ATTR(cpld2_ver, 0400, cpld2_ver_show, NULL); + +static ssize_t sysrdy_rst_status_show(struct device *dev, + struct device_attribute *attr, char *buf) +{ + uint8_t data = 0; + long value = 0; + int err; + + mutex_lock(&cpld_data->lock); + data = readb(cpld_data->cpld2_base + + CPLD2_REG_SYSRDY_RESET_STATUS); + value = data; + mutex_unlock(&cpld_data->lock); + + return sprintf(buf, "0x%2.2x\n", value); +} +static ssize_t sysrdy_rst_status_store(struct device *dev, + struct device_attribute *attr, + const char *buf, size_t count) +{ + ssize_t status = 0; + long value = 0; + uint8_t data = 0; + + mutex_lock(&cpld_data->lock); + status = kstrtol(buf, 0, &value); + if (status == 0) { + data = value & 0xff; + writeb(data, cpld_data->cpld2_base + + CPLD2_REG_SYSRDY_RESET_STATUS); + status = count; + } + mutex_unlock(&cpld_data->lock); + + return status; +} +struct device_attribute dev_attr_sysrdy_rst_status = + __ATTR(sysrdy_rst_state, 0600, sysrdy_rst_status_show, + sysrdy_rst_status_store); + +static ssize_t all_xcvr_led_ctrl_show(struct device *dev, + struct device_attribute *attr, char *buf) +{ + uint8_t data = 0; + long value = 0; + int err; + + mutex_lock(&cpld_data->lock); + data = readb(cpld_data->cpld2_base + + CPLD2_REG_ALL_LED_CTRL); + value = data; + mutex_unlock(&cpld_data->lock); + + return sprintf(buf, "0x%2.2x\n", value); +} +static ssize_t all_xcvr_led_ctrl_store(struct device *dev, + struct device_attribute *attr, + const char *buf, size_t count) +{ + ssize_t status = 0; + long value = 0; + uint8_t data = 0; + + mutex_lock(&cpld_data->lock); + status = kstrtol(buf, 0, &value); + if (status == 0) { + data = value & 0x1f; + writeb(data, cpld_data->cpld2_base + + CPLD2_REG_ALL_LED_CTRL); + status = count; + } + mutex_unlock(&cpld_data->lock); + + return status; +} +struct device_attribute dev_attr_all_xcvr_led_ctrl = + __ATTR(all_xcvr_led_ctrl, 0600, all_xcvr_led_ctrl_show, + all_xcvr_led_ctrl_store); + +static ssize_t cpld2_ver_bmc_i2c_show(struct device *dev, + struct device_attribute *attr, char *buf) +{ + uint8_t data = 0; + uint8_t data2 = 0; + uint8_t data3 = 0; + uint8_t data4 = 0; + long value = 0; + int err; + + mutex_lock(&cpld_data->lock); + data = readb(cpld_data->cpld2_base + CPLD2_REG_VER_BMC_I2C_4); + data2 = readb(cpld_data->cpld2_base + CPLD2_REG_VER_BMC_I2C_3); + data3 = readb(cpld_data->cpld2_base + CPLD2_REG_VER_BMC_I2C_2); + data4 = readb(cpld_data->cpld2_base + CPLD2_REG_VER_BMC_I2C_1); + value = data; + value |= (data2 << 8); + value |= (data3 << 16); + value |= (data4 << 24); + mutex_unlock(&cpld_data->lock); + + return sprintf(buf, "0x%8.8lx\n", value); +} +struct device_attribute dev_attr_cpld2_ver_bmc_i2c = + __ATTR(ver_bmc_i2c, 0400, cpld2_ver_bmc_i2c_show, NULL); + +static ssize_t cpld2_jed_rel_show(struct device *dev, + struct device_attribute *attr, char *buf) +{ + uint8_t data = 0; + uint8_t data2 = 0; + long value = 0; + int err; + + mutex_lock(&cpld_data->lock); + data = readb(cpld_data->cpld2_base + CPLD2_REG_JED_REL_DAY); + data2 = readb(cpld_data->cpld2_base + CPLD2_REG_JED_REL_MONTH); + value = data; + value |= (data2 << 8); + mutex_unlock(&cpld_data->lock); + + return sprintf(buf, "0x%4.4lx\n", value); +} +struct device_attribute dev_attr_cpld2_jed_rel = + __ATTR(jed_rel, 0400, cpld2_jed_rel_show, NULL); + +static ssize_t cpld2_testee_offset_show(struct device *dev, struct device_attribute *attr, + char *buf) +{ + return sprintf(buf, "0x%2.2x\n", cpld_testee_offset[1]); +} +static ssize_t cpld2_testee_offset_store(struct device *dev, struct device_attribute *attr, + const char *buf, size_t count) +{ + ssize_t status = 0; + uint8_t data; + + status = kstrtou8(buf, 0, &data); + if (status == 0) { + cpld_testee_offset[1] = data; + status = count; + } + + return status; +} +struct device_attribute dev_attr_cpld2_testee_offset = + __ATTR(testee_offset, 0600, cpld2_testee_offset_show, cpld2_testee_offset_store); + +static ssize_t cpld2_testee_value_show(struct device *dev, struct device_attribute *attr, + char *buf) +{ + uint8_t data = 0; + int err; + + mutex_lock(&cpld_data->lock); + data = readb(cpld_data->cpld2_base + cpld_testee_offset[1]); + mutex_unlock(&cpld_data->lock); + + return sprintf(buf, "0x%2.2x\n", data); +} +static ssize_t cpld2_testee_value_store(struct device *dev, struct device_attribute *attr, + const char *buf, size_t count) +{ + ssize_t status = 0; + uint8_t data; + + mutex_lock(&cpld_data->lock); + status = kstrtou8(buf, 0, &data); + if (status == 0) { + writeb(data, cpld_data->cpld2_base + cpld_testee_offset[1]); + status = count; + } + mutex_unlock(&cpld_data->lock); + + return status; +} +struct device_attribute dev_attr_cpld2_testee_value = + __ATTR(testee_value, 0600, cpld2_testee_value_show, cpld2_testee_value_store); + +static struct attribute *cpld2_attrs[] = { + &dev_attr_cpld2_ver.attr, + &dev_attr_sysrdy_rst_status.attr, + &dev_attr_all_xcvr_led_ctrl.attr, + &dev_attr_cpld2_ver_bmc_i2c.attr, + &dev_attr_cpld2_jed_rel.attr, + &dev_attr_cpld2_testee_offset.attr, + &dev_attr_cpld2_testee_value.attr, + NULL, +}; + +static struct attribute_group cpld2_attr_grp = { + .attrs = cpld2_attrs, +}; + +struct t7132s { + unsigned char __iomem *cfg_mmio_start; + resource_size_t cfg_mmio_len; + unsigned char __iomem *dev_mmio_start; + resource_size_t dev_mmio_len; + unsigned char __iomem *dev2_mmio_start; + resource_size_t dev2_mmio_len; +}; + +static struct t7132s t7132s_dev; +static struct platform_device *t7132s_platform_dev; +static struct kobject *cpld1 = NULL; +static struct kobject *cpld2 = NULL; +static struct device *sff_dev = NULL; + +static ssize_t qsfp_modirq_show(struct device *dev, + struct device_attribute *attr, char *buf) +{ + struct sff_device_data *dev_data = dev_get_drvdata(dev); + unsigned int portid = dev_data->portid; + u8 index = 0; + u16 reg = 0; + u8 value = 0; + + mutex_lock(&cpld_data->lock); + if ((portid % 2) != 0) { + QSFP_REG_READ (reg, QSFP_T_INT, + cpld_data->cpld_base); + index = (portid + 1) / 2; + } else { + QSFP_REG_READ (reg, QSFP_B_INT, + cpld_data->cpld_base); + index = portid / 2; + } + value = reg >> (index - 1) & 1; + mutex_unlock(&cpld_data->lock); + + return sprintf(buf, "%d\n", value); +} +DEVICE_ATTR_RO(qsfp_modirq); + +static ssize_t qsfp_modprs_show(struct device *dev, + struct device_attribute *attr, char *buf) +{ + struct sff_device_data *dev_data = dev_get_drvdata(dev); + unsigned int portid = dev_data->portid; + u8 index = 0; + u16 reg = 0; + u8 value = 0; + + mutex_lock(&cpld_data->lock); + if ((portid % 2) != 0) { + QSFP_REG_READ (reg, QSFP_T_MODPRS, + cpld_data->cpld_base); + index = (portid + 1) / 2; + } else { + QSFP_REG_READ (reg, QSFP_B_MODPRS, + cpld_data->cpld_base); + index = portid / 2; + } + value = reg >> (index - 1) & 1; + mutex_unlock(&cpld_data->lock); + + return sprintf(buf, "%d\n", value); +} +DEVICE_ATTR_RO(qsfp_modprs); + +static ssize_t qsfp_lpmode_show(struct device *dev, + struct device_attribute *attr, char *buf) +{ + struct sff_device_data *dev_data = dev_get_drvdata(dev); + unsigned int portid = dev_data->portid; + u8 index = 0; + u16 reg = 0; + u8 value = 0; + + mutex_lock(&cpld_data->lock); + if ((portid % 2) != 0) { + QSFP_REG_READ (reg, QSFP_T_LPMODE, + cpld_data->cpld_base); + index = (portid + 1) / 2; + } else { + QSFP_REG_READ (reg, QSFP_B_LPMODE, + cpld_data->cpld_base); + index = portid / 2; + } + value = reg >> (index - 1) & 1; + mutex_unlock(&cpld_data->lock); + + return sprintf(buf, "%d\n", value); +} +static ssize_t qsfp_lpmode_store(struct device *dev, + struct device_attribute *attr, const char *buf, + size_t count) +{ + ssize_t status; + struct sff_device_data *dev_data = dev_get_drvdata(dev); + unsigned int portid = dev_data->portid; + u8 value = 0; + u8 index = 0; + u16 reg = 0; + + mutex_lock(&cpld_data->lock); + status = kstrtou8(buf, 0, &value); + + if ((status == 0) && (value <= 1)) { + if ((portid % 2) != 0) { + QSFP_REG_READ (reg, QSFP_T_LPMODE, + cpld_data->cpld_base); + index = (portid + 1) / 2; + if (value == 1) { + reg |= (1 << (index - 1)); + } else { + reg &= ~(1 << (index - 1)); + } + QSFP_REG_WRITE (reg, QSFP_T_LPMODE, + cpld_data->cpld_base); + } else { + QSFP_REG_READ (reg, QSFP_B_LPMODE, + cpld_data->cpld_base); + index = portid / 2; + if (value == 1) { + reg |= (1 << (index - 1)); + } else { + reg &= ~(1 << (index - 1)); + } + QSFP_REG_WRITE (reg, QSFP_B_LPMODE, + cpld_data->cpld_base); + } + status = count; + } + + mutex_unlock(&cpld_data->lock); + + return status; +} +DEVICE_ATTR_RW(qsfp_lpmode); + +static ssize_t qsfp_reset_show(struct device *dev, + struct device_attribute *attr, char *buf) +{ + struct sff_device_data *dev_data = dev_get_drvdata(dev); + unsigned int portid = dev_data->portid; + u8 index = 0; + u16 reg = 0; + u8 value = 0; + + mutex_lock(&cpld_data->lock); + if ((portid % 2) != 0) { + QSFP_REG_READ (reg, QSFP_T_RESET, + cpld_data->cpld_base); + index = (portid + 1) / 2; + } else { + QSFP_REG_READ (reg, QSFP_B_RESET, + cpld_data->cpld_base); + index = portid / 2; + } + value = reg >> (index - 1) & 1; + mutex_unlock(&cpld_data->lock); + + return sprintf(buf, "%d\n", value); +} + +static ssize_t qsfp_reset_store(struct device *dev, + struct device_attribute *attr, const char *buf, + size_t count) +{ + ssize_t status; + struct sff_device_data *dev_data = dev_get_drvdata(dev); + unsigned int portid = dev_data->portid; + u8 value = 0; + u8 index = 0; + u16 reg = 0; + + mutex_lock(&cpld_data->lock); + status = kstrtou8(buf, 0, &value); + + if ((status == 0) && (value <= 1)) { + if ((portid % 2) != 0) { + QSFP_REG_READ (reg, QSFP_T_RESET, + cpld_data->cpld_base); + index = (portid + 1) / 2; + if (value == 1) { + reg |= (1 << (index - 1)); + } else { + reg &= ~(1 << (index - 1)); + } + QSFP_REG_WRITE (reg, QSFP_T_RESET, + cpld_data->cpld_base); + } else { + QSFP_REG_READ (reg, QSFP_B_RESET, + cpld_data->cpld_base); + index = portid / 2; + if (value == 1) { + reg |= (1 << (index - 1)); + } else { + reg &= ~(1 << (index - 1)); + } + QSFP_REG_WRITE (reg, QSFP_B_RESET, + cpld_data->cpld_base); + } + status = count; + } + mutex_unlock(&cpld_data->lock); + + return status; +} +DEVICE_ATTR_RW(qsfp_reset); + +static struct attribute *sff_attrs[] = { + &dev_attr_qsfp_modprs.attr, + &dev_attr_qsfp_modirq.attr, + &dev_attr_qsfp_lpmode.attr, + &dev_attr_qsfp_reset.attr, + NULL, +}; +static struct attribute_group sff_attr_grp = { + .attrs = sff_attrs, +}; +static const struct attribute_group *sff_attr_grps[] = { &sff_attr_grp, NULL }; + +#define SFP_MOD_MASK (1 << 5) +#define SFP_LOS_MASK (1 << 4) +#define SFP_TXFAULT_MASK (1 << 3) +#define SFP_RS0_MASK (1 << 2) +#define SFP_RS1_MASK (1 << 1) +#define SFP_TXDISABLE_MASK (1) +#define CPLD1_SFP_OFFSET 0x20 +#define SFP_REG_READ(_portid_, _data_, _base_) \ + do { \ + _data_ = readb(_base_ + CPLD1_SFP_OFFSET + _portid_ - 1); \ + } while (0); +#define SFP_REG_WRITE(_portid_, _data_, _base_) \ + do { \ + writeb(_data_, _base_ + CPLD1_SFP_OFFSET + _portid_ - 1); \ + } while (0); + +static ssize_t sfp_modabs_show(struct device *dev, + struct device_attribute *attr, char *buf) +{ + struct sff_device_data *dev_data = dev_get_drvdata(dev); + unsigned int portid = dev_data->portid; + u8 value = 0; + + mutex_lock(&cpld_data->lock); + SFP_REG_READ (portid, value, cpld_data->cpld_base); + value = ((value & SFP_MOD_MASK) != 0) ? 1 : 0; + mutex_unlock(&cpld_data->lock); + + return sprintf(buf, "%d\n", value); +} +DEVICE_ATTR_RO(sfp_modabs); + +static ssize_t sfp_txfault_show(struct device *dev, + struct device_attribute *attr, char *buf) +{ + struct sff_device_data *dev_data = dev_get_drvdata(dev); + unsigned int portid = dev_data->portid; + u8 value = 0; + + mutex_lock(&cpld_data->lock); + SFP_REG_READ (portid, value, cpld_data->cpld_base); + value = ((value & SFP_TXFAULT_MASK) != 0) ? 1 : 0; + mutex_unlock(&cpld_data->lock); + + return sprintf(buf, "%d\n", value); +} +DEVICE_ATTR_RO(sfp_txfault); + +static ssize_t sfp_rxlos_show(struct device *dev, + struct device_attribute *attr, char *buf) +{ + struct sff_device_data *dev_data = dev_get_drvdata(dev); + unsigned int portid = dev_data->portid; + u8 index = 0; + u16 reg = 0; + u8 value = 0; + + mutex_lock(&cpld_data->lock); + SFP_REG_READ (portid, value, cpld_data->cpld_base); + value = ((value & SFP_LOS_MASK) != 0) ? 1 : 0; + mutex_unlock(&cpld_data->lock); + + return sprintf(buf, "%d\n", value); +} +DEVICE_ATTR_RO(sfp_rxlos); + +static ssize_t sfp_txdisable_show(struct device *dev, + struct device_attribute *attr, char *buf) +{ + struct sff_device_data *dev_data = dev_get_drvdata(dev); + unsigned int portid = dev_data->portid; + u8 value = 0; + + mutex_lock(&cpld_data->lock); + SFP_REG_READ (portid, value, cpld_data->cpld_base); + value = ((value & SFP_TXDISABLE_MASK) != 0) ? 1 : 0; + mutex_unlock(&cpld_data->lock); + + return sprintf(buf, "%d\n", value); +} + +static ssize_t sfp_txdisable_store(struct device *dev, + struct device_attribute *attr, const char *buf, + size_t count) +{ + ssize_t status; + struct sff_device_data *dev_data = dev_get_drvdata(dev); + unsigned int portid = dev_data->portid; + u8 value = 0; + u8 index = 0; + u8 reg = 0; + + mutex_lock(&cpld_data->lock); + status = kstrtou8(buf, 0, &value); + + if ((status == 0) && value <= 1) { + SFP_REG_READ (portid, reg, cpld_data->cpld_base); + if (value == 1) { + reg |= 1; + } else { + reg &= ~1; + } + SFP_REG_WRITE (portid, reg, cpld_data->cpld_base); + status = count; + } else { + status = -EINVAL; + } + + mutex_unlock(&cpld_data->lock); + + return status; +} +DEVICE_ATTR_RW(sfp_txdisable); + +static struct attribute *sff_sfp_attrs[] = { + &dev_attr_sfp_txfault.attr, + &dev_attr_sfp_rxlos.attr, + &dev_attr_sfp_modabs.attr, + &dev_attr_sfp_txdisable.attr, + NULL, +}; +static struct attribute_group sff_sfp_attr_grp = { + .attrs = sff_sfp_attrs, +}; +static const struct attribute_group *sff_sfp_attr_grps[] = + { &sff_sfp_attr_grp, NULL }; + +static struct device *t7132s_sff_init(int portid) +{ + struct sff_device_data *new_data; + struct device *new_device; + char tmpStr[20]; + + new_data = kzalloc(sizeof(*new_data), GFP_KERNEL); + + new_data->portid = sff_device_tbl[portid].portid; + new_data->port_type = sff_device_tbl[portid].port_type; + new_data->parent_index = sff_device_tbl[portid].parent_index; + new_data->chan_id = sff_device_tbl[portid].chan_id; + + if (sff_device_tbl[portid].port_type == QSFP) { + sprintf(tmpStr, "QSFP%d", new_data->portid); + new_device = device_create_with_groups(cpld_class, sff_dev, MKDEV(0, 0), + new_data, sff_attr_grps, "%s", + tmpStr); + } else { + sprintf(tmpStr, "SFP%d", new_data->portid); + new_device = device_create_with_groups(cpld_class, sff_dev, MKDEV(0, 0), + new_data, sff_sfp_attr_grps, "%s", + tmpStr); + } + + return new_device; +} + +static void t7132s_sff_deinit(int portid) +{ + struct sff_device_data *dev_data; + + dev_data = dev_get_drvdata(cpld_data->sff_devices[portid]); + device_unregister(cpld_data->sff_devices[portid]); + put_device(cpld_data->sff_devices[portid]); + kfree(dev_data); + + return; +} + +static int t7132s_wdt_start(struct watchdog_device *wd_dev) +{ + uint8_t data = 0; + + mutex_lock(&cpld_data->lock); + data = readb(cpld_data->cpld_base + CPLD1_REG_DEV_STATE_2); + data |= 0x01; + writeb(data, cpld_data->cpld_base + CPLD1_REG_DEV_STATE_2); + mutex_unlock(&cpld_data->lock); + return 0; +} + +static int t7132s_wdt_stop(struct watchdog_device *wd_dev) +{ + uint8_t data = 0; + + mutex_lock(&cpld_data->lock); + data = readb(cpld_data->cpld_base + CPLD1_REG_DEV_STATE_2); + data &= 0xfe; + writeb(data, cpld_data->cpld_base + CPLD1_REG_DEV_STATE_2); + mutex_unlock(&cpld_data->lock); + return 0; +} + +static int t7132s_wdt_ping(struct watchdog_device *wd_dev) +{ + uint8_t data = 0; + + mutex_lock(&cpld_data->lock); + data = readb(cpld_data->cpld_base + CPLD1_REG_DEV_STATE_2); + /* disable */ + data &= 0xfe; + writeb(data, cpld_data->cpld_base + CPLD1_REG_DEV_STATE_2); + /* enable */ + data |= 0x01; + writeb(data, cpld_data->cpld_base + CPLD1_REG_DEV_STATE_2); + mutex_unlock(&cpld_data->lock); + return 0; +} + +static int t7132s_wdt_set_timeout(struct watchdog_device *wd_dev, unsigned int t) +{ + uint8_t data1 = 0; + uint8_t data2 = 0; + uint8_t data = 0; + int is_enabled = 0; + + if (t > 65535) + return -EINVAL; + + data1 = t & 0xff; + data2 = (t & 0xff00) >> 8; + mutex_lock(&cpld_data->lock); + /* save and stop */ + data = readb(cpld_data->cpld_base + CPLD1_REG_DEV_STATE_2); + is_enabled = data & 0x01; + if (is_enabled != 0) { + data &= 0xfe; + writeb(data, cpld_data->cpld_base + CPLD1_REG_DEV_STATE_2); + } + /* update max */ + writeb(data1, cpld_data->cpld_base + CPLD1_REG_WDT_MAX_COUNT_1); + writeb(data2, cpld_data->cpld_base + CPLD1_REG_WDT_MAX_COUNT_2); + /* restore */ + if (is_enabled != 0) { + data = readb(cpld_data->cpld_base + CPLD1_REG_DEV_STATE_2); + data |= is_enabled; + writeb(data, cpld_data->cpld_base + CPLD1_REG_DEV_STATE_2); + } + mutex_unlock(&cpld_data->lock); + + wd_dev->timeout = t; + return 0; +} + +static unsigned int t7132s_wdt_get_timeleft(struct watchdog_device *wd_dev) +{ + unsigned int time_left = 0; + uint8_t data_max1 = 0; + uint8_t data_max2 = 0; + long time_max = 0; + uint8_t data_now1 = 0; + uint8_t data_now2 = 0; + long time_now = 0; + + mutex_lock(&cpld_data->lock); + data_max1 = readb(cpld_data->cpld_base + CPLD1_REG_WDT_MAX_COUNT_1); + data_max2 = readb(cpld_data->cpld_base + CPLD1_REG_WDT_MAX_COUNT_2); + data_now1 = readb(cpld_data->cpld_base + CPLD1_REG_WDT_CUR_COUNT_1); + data_now2 = readb(cpld_data->cpld_base + CPLD1_REG_WDT_CUR_COUNT_2); + mutex_unlock(&cpld_data->lock); + + /* our watchdog is counting up */ + time_max = (data_max2 << 8) | data_max1; + time_now = (data_now2 << 8) | data_now1; + if (time_max >= time_now) { + time_left = time_max - time_now; + } + else + { + /* for debug */ + time_left = 0; + printk("T7132S: t7132s_wdt_get_timeleft time_max=0x%04lx time_now=0x%04lx\n", + time_max, time_now); + } + + return time_left; + +} + +static const struct watchdog_ops t7132s_wdt_ops = { + .owner = THIS_MODULE, + .start = t7132s_wdt_start, + .stop = t7132s_wdt_stop, + .ping = t7132s_wdt_ping, + .set_timeout = t7132s_wdt_set_timeout, + .get_timeleft = t7132s_wdt_get_timeleft, +}; + +static int __init __find_i2c_adap(struct device *dev, const void *data) +{ + const char *name = data; + static const char *prefix = "i2c-"; + struct i2c_adapter *adapter; + + if (strncmp(dev_name(dev), prefix, strlen(prefix)) != 0) { + return 0; + } + adapter = to_i2c_adapter(dev); + + return (strncmp(adapter->name, name, strlen(name)) == 0); +} + +static int t7132s_drv_probe(struct platform_device *pdev) +{ + int ret = 0; + int port_count = 0; + struct sff_device_data *sff_data = NULL; + const char *name = NULL; + struct device *dev = NULL; + struct i2c_adapter *adapter = NULL; + struct i2c_board_info *entry = NULL; + struct i2c_client *client = NULL; + struct i2c_mux_core *muxc = NULL; + int index = 0; + int parent_idx = 0; + int max_index = sizeof(i2c_topo) / sizeof(struct i2c_topo_node); + int adapter_id = 0; + int chan_id = 0; + + cpld_class = class_create(THIS_MODULE, CLASS_NAME); + ret = PTR_ERR(cpld_class); + + cpld_data = devm_kzalloc(&pdev->dev, sizeof(struct t7132s_cpld), + GFP_KERNEL); + mutex_init(&cpld_data->lock); + cpld_data->cpld_base = t7132s_dev.dev_mmio_start; + cpld1 = kobject_create_and_add("CPLD1", &pdev->dev.kobj); + ret = sysfs_create_group(cpld1, &cpld1_attr_grp); + cpld_data->cpld2_base = t7132s_dev.dev2_mmio_start; + cpld2 = kobject_create_and_add("CPLD2", &pdev->dev.kobj); + ret = sysfs_create_group(cpld2, &cpld2_attr_grp); + + sff_dev = device_create(cpld_class, NULL, MKDEV(0, 0), NULL, "%s", + "sff_device"); + ret = sysfs_create_link(&pdev->dev.kobj, &sff_dev->kobj, "SFF"); + + /* Setup i2c MUX devices */ + for (index = 0; index < max_index; index++) { + if (i2c_topo[index].parent_index == -1) { + name = bms_i2c_adapter_names[i2c_topo[index] + .adapter_type]; + dev = bus_find_device(&i2c_bus_type, NULL, (void *)name, + __find_i2c_adap); + adapter = to_i2c_adapter(dev); + if (adapter != NULL) { + i2c_topo[index].client = i2c_new_client_device( + adapter, &i2c_topo[index].entry); + msleep(500); + } + } else if (i2c_topo[index].parent_index != -1) { + parent_idx = i2c_topo[index].parent_index; + if (i2c_topo[parent_idx].client != NULL) { + client = i2c_topo[parent_idx].client; + muxc = i2c_get_clientdata(client); + if (muxc != NULL) { + chan_id = i2c_topo[index].chan_id; + adapter_id = muxc->adapter[chan_id]->nr; + adapter = i2c_get_adapter(adapter_id); + if (adapter != NULL) { + i2c_topo[index] + .client = i2c_new_client_device( + adapter, + &i2c_topo[index].entry); + i2c_put_adapter(adapter); + msleep(100); + } + } + } + } + dev = NULL; + adapter = NULL; + } + + for (port_count = 0; port_count < SFF_PORT_TOTAL; port_count++) { + cpld_data->sff_devices[port_count] = + t7132s_sff_init(port_count); + sff_data = dev_get_drvdata(cpld_data->sff_devices[port_count]); + parent_idx = sff_data->parent_index; + chan_id = sff_data->chan_id; + muxc = i2c_get_clientdata(i2c_topo[parent_idx].client); + if (muxc != NULL) { + adapter_id = muxc->adapter[chan_id]->nr; + adapter = i2c_get_adapter(adapter_id); + } + if (adapter == NULL) + continue; + if (sff_data->port_type == QSFP) { + /* Initiate optoe1 device */ + cpld_data->sff_i2c_clients[port_count] = + i2c_new_client_device(adapter, &sff_eeprom_info[0]); + } else { + /* Initiate optoe2 device */ + cpld_data->sff_i2c_clients[port_count] = + i2c_new_client_device(adapter, &sff_eeprom_info[1]); + } + i2c_put_adapter(adapter); + sff_data = NULL; + adapter = NULL; + /* Create sysfs link */ + sysfs_create_link( + &cpld_data->sff_devices[port_count]->kobj, + &cpld_data->sff_i2c_clients[port_count]->dev.kobj, + "i2c"); + } + + /* watchdog */ + pwddev = devm_kzalloc(&pdev->dev, sizeof(*pwddev), GFP_KERNEL); + if (pwddev) { + pwddev->info = &ident, + pwddev->ops = &t7132s_wdt_ops, + pwddev->bootstatus = 0; + pwddev->timeout = WATCHDOG_TIMEOUT; + pwddev->parent = &pdev->dev; + pwddev->min_timeout = 1; + pwddev->max_timeout = 65535; + //pwddev->max_hw_heartbeat_ms = 65535 * 1000; + + ret = devm_watchdog_register_device(&pdev->dev, pwddev); + if (ret != 0) { + printk("T7132S: cannot register watchdog device (err=%d)\n", ret); + } + else { + t7132s_wdt_stop(pwddev); + t7132s_wdt_set_timeout(pwddev, WATCHDOG_TIMEOUT); + printk("T7132S: watchdog initialized. heartbeat=%d sec (nowayout=%d)\n", + pwddev->timeout, 0); + } + } + else { + printk("T7132S: devm_kzalloc fail for watchdog device\n"); + } + + return 0; +} + +static int t7132s_drv_remove(struct platform_device *pdev) +{ + int ret = 0; + int port_count = 0; + struct sff_device_data *sff_data = NULL; + const char *name = NULL; + struct device *dev = NULL; + struct i2c_adapter *adapter; + struct i2c_board_info *entry; + int index = 0; + int max_index = sizeof(i2c_topo) / sizeof(struct i2c_topo_node); + + for (port_count = 0; port_count < SFF_PORT_TOTAL; port_count++) { + sysfs_remove_link(&cpld_data->sff_devices[port_count]->kobj, + "i2c"); + if (cpld_data->sff_i2c_clients[port_count] != NULL) { + i2c_unregister_device( + cpld_data->sff_i2c_clients[port_count]); + } + } + + for (port_count = 0; port_count < SFF_PORT_TOTAL; port_count++) { + t7132s_sff_deinit(port_count); + } + + for (index = max_index - 1; index >= 0; index--) { + if (i2c_topo[index].client != NULL) { + i2c_unregister_device(i2c_topo[index].client); + } + } + + sysfs_remove_link(&pdev->dev.kobj, "SFF"); + device_destroy(cpld_class, MKDEV(0, 0)); + sysfs_remove_group(cpld1, &cpld1_attr_grp); + class_destroy(cpld_class); // remove the device class + cpld_class = NULL; + devm_kfree(&pdev->dev, cpld_data); + devm_kfree(&pdev->dev, pwddev); + + return 0; +} + +static struct platform_driver t7132s_drv = { + .probe = t7132s_drv_probe, + .remove = __exit_p(t7132s_drv_remove), + .driver = + { + .name = DRIVER_NAME, + .owner = THIS_MODULE, + }, +}; + +static void t7132s_remove(struct pci_dev *dev) +{ + platform_device_unregister(t7132s_platform_dev); + platform_driver_unregister(&t7132s_drv); + iounmap(t7132s_dev.cfg_mmio_start); + iounmap(t7132s_dev.dev_mmio_start); + iounmap(t7132s_dev.dev2_mmio_start); + + pci_disable_device(dev); +} + +static int t7132s_probe(struct pci_dev *dev, const struct pci_device_id *ent) +{ + int retval, ret; + unsigned long base; + resource_size_t len; + unsigned long val; + char *ptr = NULL; + + retval = pci_enable_device(dev); + pci_set_master(dev); + + len = pci_resource_len(dev, 5); + base = pci_resource_start(dev, 5); + t7132s_dev.cfg_mmio_start = ioremap(base, len); + t7132s_dev.cfg_mmio_len = len; + + len = pci_resource_len(dev, 0); + base = pci_resource_start(dev, 0); + t7132s_dev.dev_mmio_start = ioremap(base, len); + t7132s_dev.dev_mmio_len = len; + + len = pci_resource_len(dev, 1); + base = pci_resource_start(dev, 1); + t7132s_dev.dev2_mmio_start = ioremap(base, len); + t7132s_dev.dev2_mmio_len = len; + + /* Localbus bridge reset sequence */ + val = readl(t7132s_dev.cfg_mmio_start + REG_LIEMR); + printk("LIEMR = 0x%x", val); + writeb(val | LIEMR_SRST | LIEMR_LRST, + t7132s_dev.cfg_mmio_start + REG_LIEMR); + val = readl(t7132s_dev.cfg_mmio_start + REG_LIEMR); + printk("LIEMR(after hw reset) = 0x%x", val); + + /* Localbus init sequence */ + val = LIEMR_RDYPOL | LIEMR_ALEPOL | LIEMR_SYNCBUS | LIEMR_MULTBUS | + LIEMR_DMA0EN | LIEMR_DMA1EN | LIEMR_L0EINTEN | LIEMR_L0RTOIEN | + LIEMR_L1EINTEN | LIEMR_L1RTOIEN | LIEMR_D0DIEN | LIEMR_D0AIEN | + LIEMR_D1DIEN | LIEMR_D1AIEN; + printk("LIEMR(new) = 0x%x", val); + writel(val, t7132s_dev.cfg_mmio_start + REG_LIEMR); + val = readl(t7132s_dev.cfg_mmio_start + REG_LIEMR); + printk("LIEMR(modified) = 0x%x", val); + + val = readl(t7132s_dev.cfg_mmio_start + REG_LAS0CFGR); + val &= ~LASCFGR_BW16; + writel(val, t7132s_dev.cfg_mmio_start + REG_LAS0CFGR); + val = readl(t7132s_dev.cfg_mmio_start + REG_LAS0CFGR); /* flush */ + + val = readl(t7132s_dev.cfg_mmio_start + REG_LAS1CFGR); + val &= ~LASCFGR_BW16; + writel(val, t7132s_dev.cfg_mmio_start + REG_LAS1CFGR); + val = readl(t7132s_dev.cfg_mmio_start + REG_LAS1CFGR); /* flush */ + + val = readl(t7132s_dev.cfg_mmio_start + REG_LACKSR); + printk("LACKSR = 0x%x", val); + val &= ~LACKSR_ALERA; + val |= LACKSR_CLKOEN; + val = 0x2405; + writel(val, t7132s_dev.cfg_mmio_start + REG_LACKSR); + val = readl(t7132s_dev.cfg_mmio_start + REG_LACKSR); + printk("LACKSR(modified) = 0x%x", val); + + /* Read Switch ID from offset 0x1 */ + ptr = (t7132s_dev.dev_mmio_start + CPLD1_REG_SW_ID); + val = readb(t7132s_dev.dev_mmio_start + CPLD1_REG_SW_ID); + printk("Switch ID : 0x%x", val); + + platform_driver_register(&t7132s_drv); + t7132s_platform_dev = + platform_device_register_simple(DRIVER_NAME, -1, NULL, 0); + + return 0; +} + +static int t7132s_suspend(struct pci_dev *dev, pm_message_t state) +{ + return 0; +}; + +static int t7132s_resume(struct pci_dev *dev) +{ + return 0; +}; + +static struct pci_device_id t7132s_pci_tbl[] = { + { 0x125B, 0x9110, 0xa000, 0x7000, 0, 0, 0 }, + { 0x125B, 0x9100, 0xa000, 0x7000, 0, 0, 0 }, + { + 0, + }, +}; + +static struct pci_driver t7132s_pci_driver = { + .name = "t7132s", + .probe = t7132s_probe, + .remove = t7132s_remove, + .id_table = t7132s_pci_tbl, + .suspend = t7132s_suspend, + .resume = t7132s_resume, +}; + +static int __init t7132s_init(void) +{ + int ret; + + memset(&t7132s_dev, 0, sizeof(struct t7132s)); + ret = pci_register_driver(&t7132s_pci_driver); + + return ret; +} + +static void __exit t7132s_exit(void) +{ + pci_unregister_driver(&t7132s_pci_driver); +} + +module_init(t7132s_init); +module_exit(t7132s_exit); + +MODULE_DEVICE_TABLE(pci, t7132s_pci_tbl); +MODULE_DESCRIPTION("SuperMicro T7132S CPLD Module"); +MODULE_SUPPORTED_DEVICE("T7132S"); +MODULE_LICENSE("GPL"); diff --git a/platform/innovium/sonic-platform-modules-supermicro/sse-t7132s/scripts/health_checker_thermal.py b/platform/innovium/sonic-platform-modules-supermicro/sse-t7132s/scripts/health_checker_thermal.py new file mode 100755 index 0000000000..6f1ee13784 --- /dev/null +++ b/platform/innovium/sonic-platform-modules-supermicro/sse-t7132s/scripts/health_checker_thermal.py @@ -0,0 +1,50 @@ +#!/usr/bin/python3 + +''' +This script is for healthd user_defined_checkers. +''' + +from swsscommon.swsscommon import SonicV2Connector +from natsort import natsorted + +TEMPER_TABLE_NAME = 'TEMPERATURE_INFO' +TEMPER_FIELD_NAME = 'temperature' +TIMESTAMP_FIELD_NAME = 'timestamp' +HIGH_THRESH_FIELD_NAME = 'high_threshold' +LOW_THRESH_FIELD_NAME = 'low_threshold' +CRIT_HIGH_THRESH_FIELD_NAME = 'critical_high_threshold' +CRIT_LOW_THRESH_FIELD_NAME = 'critical_low_threshold' +WARNING_STATUS_FIELD_NAME = 'warning_status' + +class TemperCheck(object): + def __init__(self): + self.db = SonicV2Connector(host="127.0.0.1") + self.db.connect(self.db.STATE_DB) + + def show(self): + keys = self.db.keys(self.db.STATE_DB, TEMPER_TABLE_NAME + '*') + if not keys: + #print('Thermal Not detected\n') + return + + print("Thermal") + for key in natsorted(keys): + key_list = key.split('|') + if len(key_list) != 2: # error data in DB, log it and ignore + #print('Warn: Invalid key in table {}: {}'.format(TEMPER_TABLE_NAME, key)) + continue + + name = key_list[1] + data_dict = self.db.get_all(self.db.STATE_DB, key) + if data_dict[WARNING_STATUS_FIELD_NAME] == 'False': + print("{}:OK".format(name)) + else: + temperature = data_dict[TEMPER_FIELD_NAME] + high_threshold = data_dict[HIGH_THRESH_FIELD_NAME] + low_threshold = data_dict[LOW_THRESH_FIELD_NAME] + print("{}:{} status is warning about temperature {} (threshold high {} low {})". + format(name, name, temperature, high_threshold, low_threshold)) + +if __name__ == "__main__": + temperCheck = TemperCheck() + temperCheck.show() diff --git a/platform/innovium/sonic-platform-modules-supermicro/sse-t7132s/scripts/platform.sh b/platform/innovium/sonic-platform-modules-supermicro/sse-t7132s/scripts/platform.sh new file mode 100755 index 0000000000..91c7249b44 --- /dev/null +++ b/platform/innovium/sonic-platform-modules-supermicro/sse-t7132s/scripts/platform.sh @@ -0,0 +1,102 @@ +#!/bin/bash + +i2c_config() { + local count=0 + local MAX_BUS_RETRY=20 + local MAX_I2C_OP_RETRY=10 + + i2c_bus_op=`echo "$@" | cut -d'>' -f 2` + i2c_bus=$(dirname $i2c_bus_op) + + # check if bus exists + while [[ "$count" -lt "$MAX_BUS_RETRY" ]]; do + [[ -e $i2c_bus ]] && break || sleep .1 + count=$((count+1)) + done + + if [[ "$count" -eq "$MAX_BUS_RETRY" ]]; then + echo "dell_i2c_utils : ERROR: $@ : i2c bus not created" + return + fi + + # perform the add/delete + count=0 + while [[ "$count" -lt "$MAX_I2C_OP_RETRY" ]]; do + eval "$@" > /dev/null 2>&1 + [[ $? == 0 ]] && break || sleep .2 + count=$((count+1)) + done + + if [[ "$count" -eq "$MAX_I2C_OP_RETRY" ]]; then + echo "dell_i2c_utils : ERROR: $@ : i2c operation failed" + return + fi +} + +# Attach/Detach syseeprom on CPU board +sys_eeprom() { + case $1 in + "new_device") i2c_config "echo 24c02 0x53 > /sys/bus/i2c/devices/i2c-0/$1" + ;; + "delete_device") i2c_config "echo 0x53 > /sys/bus/i2c/devices/i2c-0/$1" + ;; + *) echo "platform: sys_eeprom : invalid command !" + ;; + esac +} + +install_python_api_package() { + device="/usr/share/sonic/device" + platform=$(/usr/local/bin/sonic-cfggen -H -v DEVICE_METADATA.localhost.platform) + + rv=$(pip3 install $device/$platform/sonic_platform-1.0-py3-none-any.whl) +} + +remove_python_api_package() { + rv=$(pip3 show sonic-platform > /dev/null 2>/dev/null) + if [ $? -eq 0 ]; then + rv=$(pip3 uninstall -y sonic-platform > /dev/null 2>/dev/null) + fi +} +update_share_password() { + echo "Update shared password !!!" + SONIC_VERSION=$(cat /etc/sonic/sonic_version.yml | grep "build_version" | sed -e "s/build_version: //g;s/'//g") + image_dir=$(cat /proc/cmdline | sed -e 's/.*loop=\(\S*\)\/.*/\1/') + if [ -f /host/reboot-cause/platform/last_boot_image ]; then + last_image_ver=$(cat /host/reboot-cause/platform/last_boot_image) + else + last_image_ver="" + fi + echo "last_image_ver=${last_image_ver}" + + find /host -name "*image-*" | sed -e 's/\/host\/image-//' | while read var ; do + #echo "var=${var} image_dir=${image_dir}" + if [ "image-${var}" != "$image_dir" ] && [ "$last_image_ver" != "${SONIC_VERSION}" ]; then + cp /host/image-${var}/rw/etc/shadow /host/${image_dir}/rw/etc/shadow + cp /host/image-${var}/rw/etc/passwd /host/${image_dir}/rw/etc/passwd + cp /host/image-${var}/rw/etc/gshadow /host/${image_dir}/rw/etc/gshadow + cp /host/image-${var}/rw/etc/group /host/${image_dir}/rw/etc/group + fi + done + + if [ -d /host/reboot-cause/platform ]; then + echo "${SONIC_VERSION}" | sudo tee /host/reboot-cause/platform/last_boot_image > /dev/null + fi +} + + +if [ "$1" == "init" ]; then + echo "Initializing hardware components ..." + depmod -a + sys_eeprom "new_device" + modprobe t7132s + install_python_api_package + update_share_password +elif [ "$1" == "deinit" ]; then + echo "De-initializing hardware components ..." + modprobe -r t7132s + sys_eeprom "delete_device" + remove_python_api_package +else + echo "Invalid options !" +fi diff --git a/platform/innovium/sonic-platform-modules-supermicro/sse-t7132s/scripts/sysledctl.py b/platform/innovium/sonic-platform-modules-supermicro/sse-t7132s/scripts/sysledctl.py new file mode 100755 index 0000000000..4493ee5502 --- /dev/null +++ b/platform/innovium/sonic-platform-modules-supermicro/sse-t7132s/scripts/sysledctl.py @@ -0,0 +1,53 @@ +#!/usr/bin/python3 +import sys +import subprocess +import re +import sonic_platform.platform + +def systemctl(): + log_path = sys.argv[0] + ".log" + with open(log_path, 'w') as f: + out = subprocess.run(['systemctl', 'list-jobs'], capture_output=True, text=True).stdout + f.write(out) + chassis = sonic_platform.platform.Platform().get_chassis() + + x = re.search("reboot.target[ ]+start", out) + if x: + f.write("starting reboot\n") + chassis.set_status_led('green_blink') + + x = re.search("kexec.target[ ]+start", out) + if x: + f.write("starting kexec\n") + chassis.set_status_led('green_blink') + + x = re.search("halt.target[ ]+start", out) + if x: + f.write("starting halt\n") + chassis.set_status_led('red') + + x = re.search("poweroff.target[ ]+start", out) + if x: + f.write("starting poweroff\n") + chassis.set_status_led('off') + chassis.set_cpld2_s3(1) + + f.write("done\n") + +def reboot(): + log_path = sys.argv[0] + ".log" + with open(log_path, 'w') as f: + f.write("fast/warm reboot\n") + chassis = sonic_platform.platform.Platform().get_chassis() + chassis.set_status_led('green_blink') + f.write("done\n") + +def main(): + if len(sys.argv)>=2 and sys.argv[1]=='start': + systemctl() + if len(sys.argv)>=2 and sys.argv[1]=='reboot': + reboot() + + +if __name__ == '__main__': + main() diff --git a/platform/innovium/sonic-platform-modules-supermicro/sse-t7132s/scripts/test_cpld.py b/platform/innovium/sonic-platform-modules-supermicro/sse-t7132s/scripts/test_cpld.py new file mode 100755 index 0000000000..69e0f8302a --- /dev/null +++ b/platform/innovium/sonic-platform-modules-supermicro/sse-t7132s/scripts/test_cpld.py @@ -0,0 +1,209 @@ +import pytest + +CPLD_INFO_PATH='/sys/devices/platform/switchboard/CPLD{}' + +@pytest.mark.parametrize( + "cpld, offset, default, valid_mask, writeable_mask, test_mask", + [ + pytest.param( 1, 0x00, 0x00, 0x00, 0x00, 0x00, id="CPLD1 0x00 Reserved"), + pytest.param( 1, 0x01, 0x00, 0x1f, 0x00, 0x00, id="CPLD1 0x01 Switch model ID"), + pytest.param( 1, 0x02, 0x10, 0xff, 0x00, 0x00, id="CPLD1 0x02 HW/CPLD version"), + pytest.param( 1, 0x03, 0xff, 0xff, 0x00, 0x00, id="CPLD1 0x03 Power sequence module status"), + pytest.param( 1, 0x04, 0x00, 0xff, 0x00, 0x00, id="CPLD1 0x04 Voltage Regulator Module ALERT/ Thermal"), + pytest.param( 1, 0x05, 0x7f, 0xff, 0x98, 0x18, id="CPLD1 0x05 Enable/ Reset misc. devices"), + pytest.param( 1, 0x06, 0xfe, 0xff, 0xff, 0x01, id="CPLD1 0x06 Enable/ Reset misc. devices"), + pytest.param( 1, 0x07, 0x0a, 0x0f, 0x0a, 0x0a, id="CPLD1 0x07 FACTORY_BTN event log and clear"), + pytest.param( 1, 0x09, 0xe0, 0xe0, 0xe0, 0xe0, id="CPLD1 0x09 System reset records"), + pytest.param( 1, 0x0B, 0xff, 0xff, 0x3f, 0x00, id="CPLD1 0x0B PCA9548 I2C bus switch RSTn"), + pytest.param( 1, 0x0C, 0x07, 0x07, 0x07, 0x07, id="CPLD1 0x0C Transceiver Power Enable"), + pytest.param( 1, 0x0D, 0xff, 0xff, 0xff, 0xff, id="CPLD1 0x0D Transceiver Power Enable"), + pytest.param( 1, 0x0E, 0x07, 0x07, 0x00, 0x00, id="CPLD1 0x0E Transceiver Power Good"), + pytest.param( 1, 0x0F, 0xff, 0xff, 0x00, 0x00, id="CPLD1 0x0F Transceiver Power Good"), + pytest.param( 1, 0x10, 0xff, 0xff, 0xff, 0xff, id="CPLD1 0x10 QSFP-DD Reset signals for Port QT16 to QT9"), + pytest.param( 1, 0x11, 0xff, 0xff, 0xff, 0xff, id="CPLD1 0x11 QSFP-DD Reset signals for Port QT8 to QT1"), + pytest.param( 1, 0x12, 0x00, 0xff, 0xff, 0xff, id="CPLD1 0x12 QSFP-DD LPMODE signals for Port QT16 to QT9"), + pytest.param( 1, 0x13, 0x00, 0xff, 0xff, 0xff, id="CPLD1 0x13 QSFP-DD LPMODE signals for Port QT8 to QT1"), + pytest.param( 1, 0x14, 0x00, 0x00, 0x00, 0x00, id="CPLD1 0x14 QSFP-DD INT signals from Port QT16 to QT9"), + pytest.param( 1, 0x15, 0x00, 0x00, 0x00, 0x00, id="CPLD1 0x15 QSFP-DD INT signals from Port QT8 to QT1"), + pytest.param( 1, 0x16, 0x00, 0x00, 0x00, 0x00, id="CPLD1 0x16 QSFP-DD MODPRS signals from Port QT16 to QT9"), + pytest.param( 1, 0x17, 0x00, 0x00, 0x00, 0x00, id="CPLD1 0x17 QSFP-DD MODPRS signals from Port QT8 to QT1"), + pytest.param( 1, 0x18, 0xff, 0xff, 0xff, 0xff, id="CPLD1 0x18 QSFP-DD Reset signals for Port QB16 to QB9"), + pytest.param( 1, 0x19, 0xff, 0xff, 0xff, 0xff, id="CPLD1 0x19 QSFP-DD Reset signals for Port QB8 to QB1"), + pytest.param( 1, 0x1A, 0x00, 0x00, 0xff, 0xff, id="CPLD1 0x1A QSFP-DD LPMODE signals for Port QB16 to QB9"), + pytest.param( 1, 0x1B, 0x00, 0x00, 0xff, 0xff, id="CPLD1 0x1B QSFP-DD LPMODE signals for Port QB8 to QB1"), + pytest.param( 1, 0x1C, 0x00, 0x00, 0x00, 0x00, id="CPLD1 0x1C QSFP-DD INT signals from Port QB16 to QB9"), + pytest.param( 1, 0x1D, 0x00, 0x00, 0x00, 0x00, id="CPLD1 0x1D QSFP-DD INT signals from Port QB8 to QB1"), + pytest.param( 1, 0x1E, 0x00, 0x00, 0x00, 0x00, id="CPLD1 0x1E QSFP-DD MODPRS signals from Port QB16 to QB9"), + pytest.param( 1, 0x1F, 0x00, 0x00, 0x00, 0x00, id="CPLD1 0x1F QSFP-DD MODPRS signals from Port QB8 to QB1"), + pytest.param( 1, 0x20, 0x06, 0x00, 0x07, 0x07, id="CPLD1 0x20 Top side SFPP"), + pytest.param( 1, 0x21, 0x06, 0x00, 0x07, 0x07, id="CPLD1 0x21 Bottom side SFPP"), + pytest.param( 1, 0x22, 0x00, 0x00, 0xff, 0xff, id="CPLD1 0x22 Watch Dog Maximum count setting, Least significant 8 bits"), + pytest.param( 1, 0x23, 0x00, 0x00, 0xff, 0xff, id="CPLD1 0x23 Watch Dog Maximum count setting, Most significant 8 bits"), + pytest.param( 1, 0x24, 0x00, 0x00, 0x00, 0x00, id="CPLD1 0x24 Watch Dog Current count value, Least significant 8 bits"), + pytest.param( 1, 0x25, 0x00, 0x00, 0x00, 0x00, id="CPLD1 0x25 Watch Dog Current count value, Most significant 8 bits"), + pytest.param( 1, 0xF0, 0x00, 0xff, 0x00, 0x00, id="CPLD1 0xF0 Version as BMC I2C Registers #0"), + pytest.param( 1, 0xF1, 0x48, 0xff, 0x00, 0x00, id="CPLD1 0xF1 Version as BMC I2C Registers #1"), + pytest.param( 1, 0xF2, 0x00, 0xff, 0x00, 0x00, id="CPLD1 0xF2 Version as BMC I2C Registers #2"), + pytest.param( 1, 0xF3, 0x02, 0xff, 0x00, 0x00, id="CPLD1 0xF3 Version as BMC I2C Registers #3"), + pytest.param( 1, 0xFE, 0x10, 0xff, 0x00, 0x00, id="CPLD1 0xFE CPLD JED Released Date Month"), + pytest.param( 1, 0xFF, 0x26, 0xff, 0x00, 0x00, id="CPLD1 0xFF CPLD JED Released Date Day"), + pytest.param( 2, 0x00, 0x00, 0x00, 0x00, 0x00, id="CPLD2 0x00 Reserved"), + pytest.param( 2, 0x01, 0x00, 0x00, 0x00, 0x00, id="CPLD2 0x01 Reserved"), + pytest.param( 2, 0x02, 0x00, 0x0f, 0x00, 0x00, id="CPLD2 0x02 CPLD2 FW version"), + pytest.param( 2, 0x03, 0x2c, 0x7f, 0x37, 0x33, id="CPLD2 0x03 System Ready/Reset Status and LED control"), + pytest.param( 2, 0x04, 0x00, 0xff, 0x1f, 0x1f, id="CPLD2 0x04 All transceiver LEDs control"), + pytest.param( 2, 0x05, 0x00, 0xff, 0xff, 0xff, id="CPLD2 0x05 SFPP LED manual control TSFPP"), + pytest.param( 2, 0x06, 0x00, 0xff, 0xff, 0xff, id="CPLD2 0x06 SFPP LED manual control BSFPP"), + pytest.param( 2, 0x07, 0x00, 0xff, 0xff, 0xff, id="CPLD2 0x07 QSFP-DD LED manual control QT1_Pn_G"), + pytest.param( 2, 0x08, 0x00, 0xff, 0xff, 0xff, id="CPLD2 0x08 QSFP-DD LED manual control QT1_Pn_Y"), + pytest.param( 2, 0x09, 0x00, 0xff, 0xff, 0xff, id="CPLD2 0x09 QSFP-DD LED manual control QB1_P1_G"), + pytest.param( 2, 0x0A, 0x00, 0xff, 0xff, 0xff, id="CPLD2 0x0A QSFP-DD LED manual control QB1_P1_Y"), + pytest.param( 2, 0x0B, 0x00, 0xff, 0xff, 0xff, id="CPLD2 0x0B QT2 Green 4 LEDs"), + pytest.param( 2, 0x0C, 0x00, 0xff, 0xff, 0xff, id="CPLD2 0x0C QT2 Yellow 4 LEDs"), + pytest.param( 2, 0x0D, 0x00, 0xff, 0xff, 0xff, id="CPLD2 0x0D QB2 Green 4 LEDs"), + pytest.param( 2, 0x0E, 0x00, 0xff, 0xff, 0xff, id="CPLD2 0x0E QB2Yellow 4 LEDs"), + pytest.param( 2, 0x0F, 0x00, 0xff, 0xff, 0xff, id="CPLD2 0x0F QT3 Green 4 LEDs"), + pytest.param( 2, 0x10, 0x00, 0xff, 0xff, 0xff, id="CPLD2 0x10 QT3 Yellow 4 LEDs"), + pytest.param( 2, 0x11, 0x00, 0xff, 0xff, 0xff, id="CPLD2 0x11 QB3 Green 4 LEDs"), + pytest.param( 2, 0x12, 0x00, 0xff, 0xff, 0xff, id="CPLD2 0x12 QB3Yellow 4 LEDs"), + pytest.param( 2, 0x13, 0x00, 0xff, 0xff, 0xff, id="CPLD2 0x13 QT4 Green 4 LEDs"), + pytest.param( 2, 0x14, 0x00, 0xff, 0xff, 0xff, id="CPLD2 0x14 QT4 Yellow 4 LEDs"), + pytest.param( 2, 0x15, 0x00, 0xff, 0xff, 0xff, id="CPLD2 0x15 QB4 Green 4 LEDs"), + pytest.param( 2, 0x16, 0x00, 0xff, 0xff, 0xff, id="CPLD2 0x16 QB4Yellow 4 LEDs"), + pytest.param( 2, 0x17, 0x00, 0xff, 0xff, 0xff, id="CPLD2 0x17 QT5 Green 4 LEDs"), + pytest.param( 2, 0x18, 0x00, 0xff, 0xff, 0xff, id="CPLD2 0x18 QT5 Yellow 4 LEDs"), + pytest.param( 2, 0x19, 0x00, 0xff, 0xff, 0xff, id="CPLD2 0x19 QB5 Green 4 LEDs"), + pytest.param( 2, 0x1A, 0x00, 0xff, 0xff, 0xff, id="CPLD2 0x1A QB5Yellow 4 LEDs"), + pytest.param( 2, 0x1B, 0x00, 0xff, 0xff, 0xff, id="CPLD2 0x1B QT6 Green 4 LEDs"), + pytest.param( 2, 0x1C, 0x00, 0xff, 0xff, 0xff, id="CPLD2 0x1C QT6 Yellow 4 LEDs"), + pytest.param( 2, 0x1D, 0x00, 0xff, 0xff, 0xff, id="CPLD2 0x1D QB6 Green 4 LEDs"), + pytest.param( 2, 0x1E, 0x00, 0xff, 0xff, 0xff, id="CPLD2 0x1E QB6 Yellow 4 LEDs"), + pytest.param( 2, 0x1F, 0x00, 0xff, 0xff, 0xff, id="CPLD2 0x1F QT7 Green 4 LEDs"), + pytest.param( 2, 0x20, 0x00, 0xff, 0xff, 0xff, id="CPLD2 0x20 QT7 Yellow 4 LEDs"), + pytest.param( 2, 0x21, 0x00, 0xff, 0xff, 0xff, id="CPLD2 0x21 QB7 Green 4 LEDs"), + pytest.param( 2, 0x22, 0x00, 0xff, 0xff, 0xff, id="CPLD2 0x22 QB7 Yellow 4 LEDs"), + pytest.param( 2, 0x23, 0x00, 0xff, 0xff, 0xff, id="CPLD2 0x23 QT8 Green 4 LEDs"), + pytest.param( 2, 0x24, 0x00, 0xff, 0xff, 0xff, id="CPLD2 0x24 QT8 Yellow 4 LEDs"), + pytest.param( 2, 0x25, 0x00, 0xff, 0xff, 0xff, id="CPLD2 0x25 QB8 Green 4 LEDs"), + pytest.param( 2, 0x26, 0x00, 0xff, 0xff, 0xff, id="CPLD2 0x26 QB8 Yellow 4 LEDs"), + pytest.param( 2, 0x27, 0x00, 0xff, 0xff, 0xff, id="CPLD2 0x27 QT9 Green 4 LEDs"), + pytest.param( 2, 0x28, 0x00, 0xff, 0xff, 0xff, id="CPLD2 0x28 QT9 Yellow 4 LEDs"), + pytest.param( 2, 0x29, 0x00, 0xff, 0xff, 0xff, id="CPLD2 0x29 QB9 Green 4 LEDs"), + pytest.param( 2, 0x2A, 0x00, 0xff, 0xff, 0xff, id="CPLD2 0x2A QB9 Yellow 4 LEDs"), + pytest.param( 2, 0x2B, 0x00, 0xff, 0xff, 0xff, id="CPLD2 0x2B QT10 Green 4 LEDs"), + pytest.param( 2, 0x2C, 0x00, 0xff, 0xff, 0xff, id="CPLD2 0x2C QT10 Yellow 4 LEDs"), + pytest.param( 2, 0x2D, 0x00, 0xff, 0xff, 0xff, id="CPLD2 0x2D QB10 Green 4 LEDs"), + pytest.param( 2, 0x2E, 0x00, 0xff, 0xff, 0xff, id="CPLD2 0x2E QB10 Yellow 4 LEDs"), + pytest.param( 2, 0x2F, 0x00, 0xff, 0xff, 0xff, id="CPLD2 0x2F QT11 Green 4 LEDs"), + pytest.param( 2, 0x30, 0x00, 0xff, 0xff, 0xff, id="CPLD2 0x30 QT11 Yellow 4 LEDs"), + pytest.param( 2, 0x31, 0x00, 0xff, 0xff, 0xff, id="CPLD2 0x31 QB11 Green 4 LEDs"), + pytest.param( 2, 0x32, 0x00, 0xff, 0xff, 0xff, id="CPLD2 0x32 QB11 Yellow 4 LEDs"), + pytest.param( 2, 0x33, 0x00, 0xff, 0xff, 0xff, id="CPLD2 0x33 QT12 Green 4 LEDs"), + pytest.param( 2, 0x34, 0x00, 0xff, 0xff, 0xff, id="CPLD2 0x34 QT12 Yellow 4 LEDs"), + pytest.param( 2, 0x35, 0x00, 0xff, 0xff, 0xff, id="CPLD2 0x35 QB12 Green 4 LEDs"), + pytest.param( 2, 0x36, 0x00, 0xff, 0xff, 0xff, id="CPLD2 0x36 QB12 Yellow 4 LEDs"), + pytest.param( 2, 0x37, 0x00, 0xff, 0xff, 0xff, id="CPLD2 0x37 QT13 Green 4 LEDs"), + pytest.param( 2, 0x38, 0x00, 0xff, 0xff, 0xff, id="CPLD2 0x38 QT13 Yellow 4 LEDs"), + pytest.param( 2, 0x39, 0x00, 0xff, 0xff, 0xff, id="CPLD2 0x39 QB13 Green 4 LEDs"), + pytest.param( 2, 0x3A, 0x00, 0xff, 0xff, 0xff, id="CPLD2 0x3A QB13 Yellow 4 LEDs"), + pytest.param( 2, 0x3B, 0x00, 0xff, 0xff, 0xff, id="CPLD2 0x3B QT14 Green 4 LEDs"), + pytest.param( 2, 0x3C, 0x00, 0xff, 0xff, 0xff, id="CPLD2 0x3C QT14 Yellow 4 LEDs"), + pytest.param( 2, 0x3D, 0x00, 0xff, 0xff, 0xff, id="CPLD2 0x3D QB14 Green 4 LEDs"), + pytest.param( 2, 0x3E, 0x00, 0xff, 0xff, 0xff, id="CPLD2 0x3E QB14 Yellow 4 LEDs"), + pytest.param( 2, 0x3F, 0x00, 0xff, 0xff, 0xff, id="CPLD2 0x3F QT15 Green 4 LEDs"), + pytest.param( 2, 0x40, 0x00, 0xff, 0xff, 0xff, id="CPLD2 0x40 QT15 Yellow 4 LEDs"), + pytest.param( 2, 0x41, 0x00, 0xff, 0xff, 0xff, id="CPLD2 0x41 QB15 Green 4 LEDs"), + pytest.param( 2, 0x42, 0x00, 0xff, 0xff, 0xff, id="CPLD2 0x42 QB15 Yellow 4 LEDs"), + pytest.param( 2, 0x43, 0x00, 0xff, 0xff, 0xff, id="CPLD2 0x43 QT16 Green 4 LEDs"), + pytest.param( 2, 0x44, 0x00, 0xff, 0xff, 0xff, id="CPLD2 0x44 QT16 Yellow 4 LEDs"), + pytest.param( 2, 0x45, 0x00, 0xff, 0xff, 0xff, id="CPLD2 0x45 QB16 Green 4 LEDs"), + pytest.param( 2, 0x46, 0x00, 0xff, 0xff, 0xff, id="CPLD2 0x46 QB16 Yellow 4 LEDs"), + pytest.param( 2, 0xF0, 0x00, 0xff, 0x00, 0x00, id="CPLD2 0xF0 Version as BMC I2C Registers #0"), + pytest.param( 2, 0xF1, 0x48, 0xff, 0x00, 0x00, id="CPLD2 0xF1 Version as BMC I2C Registers #1"), + pytest.param( 2, 0xF2, 0x20, 0xff, 0x00, 0x00, id="CPLD2 0xF2 Version as BMC I2C Registers #2"), + pytest.param( 2, 0xF3, 0x02, 0xff, 0x00, 0x00, id="CPLD2 0xF3 Version as BMC I2C Registers #3"), + pytest.param( 2, 0xFE, 0x10, 0xff, 0x00, 0x00, id="CPLD2 0xFE CPLD JED Released Date Month"), + pytest.param( 2, 0xFF, 0x27, 0xff, 0x00, 0x00, id="CPLD2 0xFF CPLD JED Released Date Day"), + ], +) +class TestClass: + def test_cpld_read_default(self, cpld, offset, default, valid_mask, writeable_mask, test_mask): + reg_offset = "/".join([CPLD_INFO_PATH.format(cpld), "testee_offset"]) + reg_value = "/".join([CPLD_INFO_PATH.format(cpld), "testee_value"]) + + # write offset + with open(reg_offset, "r+") as file_offset: + file_offset.write(hex(offset)) + + for i in range(2): + with open(reg_value, "r+") as file_value: + content = file_value.readline().strip() + content_value = int(content, 16) + assert hex(content_value & valid_mask) == hex(default & valid_mask) + + def test_cpld_read_stable(self, cpld, offset, default, valid_mask, writeable_mask, test_mask): + reg_offset = "/".join([CPLD_INFO_PATH.format(cpld), "testee_offset"]) + reg_value = "/".join([CPLD_INFO_PATH.format(cpld), "testee_value"]) + + # write offset + with open(reg_offset, "r+") as file_offset: + file_offset.write(hex(offset)) + + # read current value + with open(reg_value, "r+") as file_value: + content = file_value.readline().strip() + last_value = int(content, 16) + + for i in range(100): + with open(reg_value, "r+") as file_value: + content = file_value.readline().strip() + content_value = int(content, 16) + assert hex(content_value) == hex(last_value) + + def test_cpld_write_stable(self, cpld, offset, default, valid_mask, writeable_mask, test_mask): + reg_offset = "/".join([CPLD_INFO_PATH.format(cpld), "testee_offset"]) + reg_value = "/".join([CPLD_INFO_PATH.format(cpld), "testee_value"]) + + # write offset + with open(reg_offset, "r+") as file_offset: + file_offset.write(hex(offset)) + + # read and save current value + with open(reg_value, "r+") as file_value: + content = file_value.readline().strip() + last_value = int(content, 16) + + for i in range(100): + for j in range(8): + if (1< 0): + return True, change_dict + + if timeout: + now_ms = time.time() * 1000 + if (now_ms - start_ms >= timeout): + return True, change_dict + + ############################################################## + ######################## SFP methods ######################### + ############################################################## + + def get_num_sfps(self): + """ + Retrieves the number of sfps available on this chassis + Returns: + An integer, the number of sfps available on this chassis + """ + if not self.sfp_module_initialized: + self.__initialize_sfp() + + return len(self._sfp_list) + + def get_all_sfps(self): + """ + Retrieves all sfps available on this chassis + Returns: + A list of objects derived from SfpBase representing all sfps + available on this chassis + """ + if not self.sfp_module_initialized: + self.__initialize_sfp() + + return self._sfp_list + + def get_sfp(self, index): + """ + Retrieves sfp represented by (0-based) index + + Args: + index: An integer, the index (0-based) of the sfp to retrieve. + The index should be the sequence of a physical port in a chassis, + starting from 0. + For example, 0 for Ethernet0, 1 for Ethernet4 and so on. + + Returns: + An object dervied from SfpBase representing the specified sfp + """ + sfp = None + if not self.sfp_module_initialized: + self.__initialize_sfp() + + try: + # The index will start from 0 + sfp = self._sfp_list[index-1] + except IndexError: + sys.stderr.write("SFP index {} out of range (1-{})\n".format( + index, len(self._sfp_list))) + return sfp + + ############################################## + # System LED methods + ############################################## + + def set_status_led(self, color): + """ + Sets the state of the system LED + + Args: + color: A string representing the color with which to set the + system LED + + Returns: + bool: True if system LED state is set successfully, False if not + """ + if color not in self.supported_led_color: + return False + + reg_path = "/".join([CPLD2_INFO_PATH, "sysrdy_rst_state"]) + + # Read current status + try: + with open(reg_path, "r+") as reg_file: + content_str = reg_file.readline().rstrip() + reg_value = int(content_str, 16) + color_value = self.color_to_status_led_reg[color] + new_reg_value = reg_value & 0b11111100 | color_value + reg_file.seek(0) + reg_file.write(hex(new_reg_value)) + except IOError as e: + print("Error: unable to open file: %s" % str(e)) + return False + + # clear S3 and S5 if status led set 'green_blink' for booting + if color == 'green_blink': + if self.get_cpld2_s5() == 1: + self.set_cpld2_s5(0) #Clear S5 status + self.set_cpld2_s5(1) #Enable to record S5 status + if self.get_cpld2_s3() == 1: + self.set_cpld2_s3(0) #Clear S3 status + + return True + + def get_status_led(self): + """ + Gets the state of the system LED + + Returns: + A string, one of the valid LED color strings which could be vendor + specified. + """ + reg_path = "/".join([CPLD2_INFO_PATH, "sysrdy_rst_state"]) + + # Read status + try: + with open(reg_path) as reg_file: + content = reg_file.readline().rstrip() + except IOError as e: + print("Error: unable to open file: %s" % str(e)) + return False + + content_value = int(content, 16) + sysled_color_reg = content_value & 0b11 + return self.status_led_reg_to_color.get(sysled_color_reg, "Unknown " + content) + + def get_watchdog(self): + """ + Retreives hardware watchdog device on this chassis + + Returns: + An object derived from WatchdogBase representing the hardware + watchdog device + """ + if self._watchdog is None: + # Initialize watchdog + try: + self._watchdog = Watchdog() + except Exception as e: + self._watchdog = None + + return self._watchdog + + def set_cpld2_s3(self, s3): + """ + Sets the bit S3 in CPLD2 sysrdy_rst_state (offset 0x03) + + Args: + s3: integer 1 or 0 + + Returns: + bool: True if the bit is set successfully, False if not + """ + reg_path = "/".join([CPLD2_INFO_PATH, "sysrdy_rst_state"]) + + # Read current status + try: + with open(reg_path, "r+") as reg_file: + content_str = reg_file.readline().rstrip() + reg_value = int(content_str, 16) + bit_value = 0b10000 if s3!=0 else 0 + new_reg_value = reg_value & 0b11101111 | bit_value + reg_file.seek(0) + reg_file.write(hex(new_reg_value)) + except IOError as e: + print("Error: unable to open file: %s" % str(e)) + return False + + return True + + def get_cpld2_s3(self): + """ + Gets the bit S3 in CPLD2 sysrdy_rst_state (offset 0x03) + + Returns: + integer 1 or 0. + """ + reg_path = "/".join([CPLD2_INFO_PATH, "sysrdy_rst_state"]) + + # Read status + try: + with open(reg_path) as reg_file: + content = reg_file.readline().rstrip() + except IOError as e: + print("Error: unable to open file: %s" % str(e)) + return False + + content_value = int(content, 16) + bit_value = 1 if (content_value & 0b10000) != 0 else 0 + return bit_value + + def initizalize_system_led(self): + """ + called by system_health.py. do nothing here. + """ + return True + + def get_cpld2_s5(self): + """ + Gets the bit S5 in CPLD2 sysrdy_rst_state (offset 0x03) + + Returns: + integer 1 or 0. + """ + reg_path = "/".join([CPLD2_INFO_PATH, "sysrdy_rst_state"]) + + # Read status + try: + with open(reg_path) as reg_file: + content = reg_file.readline().rstrip() + except IOError as e: + print("Error: unable to open file: %s" % str(e)) + return False + + content_value = int(content, 16) + bit_value = 1 if (content_value & 0b1000000) != 0 else 0 + return bit_value + + def set_cpld2_s5(self, s5): + """ + Sets the bit S5 in CPLD2 sysrdy_rst_state (offset 0x03) + + Args: + s5: integer 1 or 0 + + Returns: + bool: True if the bit is set successfully, False if not + """ + reg_path = "/".join([CPLD2_INFO_PATH, "sysrdy_rst_state"]) + + # Read current status + try: + with open(reg_path, "r+") as reg_file: + content_str = reg_file.readline().rstrip() + reg_value = int(content_str, 16) + bit_value = 0b100000 if s5!=0 else 0 + new_reg_value = reg_value & 0b11011111 | bit_value + reg_file.seek(0) + reg_file.write(hex(new_reg_value)) + except IOError as e: + print("Error: unable to open file: %s" % str(e)) + return False + + return True + + def get_bmc_reboot_cause(self): + """ + Gets the reboot cause from BMC + """ + reboot_cause = -1 + status, raw_cause = self._api_helper.ipmi_raw( + IPMI_OEM_NETFN, IPMI_GET_REBOOT_CAUSE) + if status: + hx_cause_list = [] + if raw_cause == '': + return False + else: + hx_cause = int(raw_cause.split()[0], 16) + if hx_cause > 0: + self._api_helper.ipmi_raw(IPMI_OEM_NETFN, IPMI_CLEAR_REBOOT_CAUSE) #Clear BMC reboot cause + for i in range(0, NUM_BMC_REBOOT_CAUSE): + if ((hx_cause >> i) & 1): + hx_cause_list.append(i) + #Invalid case if multiple BMC reboot causes + if len(hx_cause_list) > 1: + sys.stderr.write("{} BMC reboot causes: {}\n".format( + len(hx_cause_list), f'0b{hx_cause:08b}')) + else: + reboot_cause = hx_cause_list[0] + else: + status = False + return status, reboot_cause + + def set_cpld1_wdt_rst(self, enable): + """ + Set bit 7 in CPLD1 sysrst_rec (offset 0x09) to clean bit 4. + + Args: + enable: 1: enable record + 0: clear + + Returns: + bool: True if the bit is set successfully, False if not + """ + reg_path = "/".join([CPLD1_INFO_PATH, "sysrst_rec"]) + + # Read current status + try: + with open(reg_path, "r+") as reg_file: + content_str = reg_file.readline().rstrip() + reg_value = int(content_str, 16) + bit_value = 0x80 if enable else 0 + new_reg_value = reg_value & 0x7f | bit_value + reg_file.seek(0) + reg_file.write(hex(new_reg_value)) + except IOError as e: + print("Error: unable to open file: %s" % str(e)) + return False + + return True + + def get_cpld1_wdt_rst(self): + """ + Get the bit 4 in CPLD1 sysrst_rec (offset 0x09). + + Returns: + integer 1 or 0. + """ + reg_path = "/".join([CPLD1_INFO_PATH, "sysrst_rec"]) + + # Read status + try: + with open(reg_path) as reg_file: + content = reg_file.readline().rstrip() + except IOError as e: + print("Error: unable to open file: %s" % str(e)) + return False + + content_value = int(content, 16) + bit_value = 1 if (content_value & 0x10) != 0 else 0 + return bit_value + + def get_cpld1_board_rev(self): + """ + Get the bit [5:3] from CPLD1 ver_bmc_i2c (offset 0xF0:0xF3). + + Returns: + String of board version. + """ + reg_path = "/".join([CPLD1_INFO_PATH, "ver_bmc_i2c"]) + + # Read status + try: + with open(reg_path) as reg_file: + content = reg_file.readline().rstrip() + except IOError as e: + print("Error: unable to open file: %s" % str(e)) + return 'N/A' + + content_value = int(content, 16) + # bit [5:3] offset 0xF1 + board_ver = (content_value >> 19) & 0x07 + str_dir = {0b000:'1.00', 0b001:'1.01', 0b010:'1.02'} + rev_str = str_dir.get(board_ver, 'Unknown({:#05b})'.format(board_ver)) + return rev_str diff --git a/platform/innovium/sonic-platform-modules-supermicro/sse-t7132s/sonic_platform/component.py b/platform/innovium/sonic-platform-modules-supermicro/sse-t7132s/sonic_platform/component.py new file mode 100644 index 0000000000..ee22ce843f --- /dev/null +++ b/platform/innovium/sonic-platform-modules-supermicro/sse-t7132s/sonic_platform/component.py @@ -0,0 +1,106 @@ +############################################################################# +# SuperMicro SSE-T7132S +# +# Component contains an implementation of SONiC Platform Base API and +# provides the components firmware management function +# +############################################################################# + +try: + from sonic_platform_base.component_base import ComponentBase + from .helper import APIHelper +except ImportError as e: + raise ImportError(str(e) + "- required module not found") + +COMPONENT_LIST = [ + ("BIOS", "Basic Input/Output System"), + ("BMC", "Baseboard Management Controller"), + ("SWITCH_CPLD1", "Switch board CPLD1"), + ("SWITCH_CPLD2", "Switch board CPLD2") +] +SW_CPLD1_VER_PATH = "/sys/devices/platform/switchboard/CPLD1/ver_bmc_i2c" +SW_CPLD2_VER_PATH = "/sys/devices/platform/switchboard/CPLD2/ver_bmc_i2c" +CPLD_UPGRADE_OPT = 4 +BIOS_VER_PATH = "/sys/class/dmi/id/bios_version" +BIOS__UPGRADE_OPT = 2 +BMC_VER_CMD = "ipmitool mc info | grep 'Firmware Revision'" +IPMI_BMC_VER_NETFN = "0x6" +IPMI_BMC_VER_CMD = "0x1" +BMC_VER_MAJOR_OFFSET = 2 +BMC_VER_MINOR_OFFSET = 3 +BMC_VER_AUX_OFFSET = 11 +BMC_UPGRADE_OPT = 1 +CFUFLASH_FW_UPGRADE_CMD = "CFUFLASH -cd -d {} -mse 3 {}" +MEM_PCI_RESOURCE = "/sys/bus/pci/devices/0000:09:00.0/resource0" +FPGA_VER_MEM_OFFSET = 0 + + +class Component(ComponentBase): + """Platform-specific Component class""" + + DEVICE_TYPE = "component" + + def __init__(self, component_index): + ComponentBase.__init__(self) + self.index = component_index + self.name = self.get_name() + self._api_helper = APIHelper() + + def __get_bmc_ver(self): + bmc_ver = "Unknown" + status, raw_bmc_data = self._api_helper.ipmi_raw( + IPMI_BMC_VER_NETFN, IPMI_BMC_VER_CMD) + if status: + bmc_ver_data_list = raw_bmc_data.split() + bmc_ver = '{}.{}.{}'.format(bmc_ver_data_list[BMC_VER_MAJOR_OFFSET], + bmc_ver_data_list[BMC_VER_MINOR_OFFSET], + bmc_ver_data_list[BMC_VER_AUX_OFFSET]) + return bmc_ver + + def __get_cpld_ver(self,path): + cpld_data = self._api_helper.read_txt_file(path) + cpld_ver = cpld_data[-2:] + + return cpld_ver + + def get_name(self): + """ + Retrieves the name of the component + Returns: + A string containing the name of the component + """ + return COMPONENT_LIST[self.index][0] + + def get_description(self): + """ + Retrieves the description of the component + Returns: + A string containing the description of the component + """ + return COMPONENT_LIST[self.index][1] + + def get_firmware_version(self): + """ + Retrieves the firmware version of module + Returns: + string: The firmware versions of the module + """ + fw_version = { + "BIOS": self._api_helper.read_txt_file(BIOS_VER_PATH), + "BMC": self.__get_bmc_ver(), + "SWITCH_CPLD1": self.__get_cpld_ver(SW_CPLD1_VER_PATH), + "SWITCH_CPLD2": self.__get_cpld_ver(SW_CPLD2_VER_PATH), + }.get(self.name, "Unknown") + + return fw_version + + def install_firmware(self, image_path): + """ + Install firmware to module + Args: + image_path: A string, path to firmware image + Returns: + A boolean, True if install successfully, False if not + """ + """Not Implement""" + return False diff --git a/platform/innovium/sonic-platform-modules-supermicro/sse-t7132s/sonic_platform/eeprom.py b/platform/innovium/sonic-platform-modules-supermicro/sse-t7132s/sonic_platform/eeprom.py new file mode 100644 index 0000000000..bd73d93ad3 --- /dev/null +++ b/platform/innovium/sonic-platform-modules-supermicro/sse-t7132s/sonic_platform/eeprom.py @@ -0,0 +1,122 @@ +############################################################################# +# SuperMicro SSE-T7132S +# +# Platform and model specific eeprom subclass, inherits from the base class, +# and provides the followings: +# - the eeprom format definition +# - specific encoder/decoder if there is special need +############################################################################# + +try: + import os + import sys + import re + + if sys.version_info.major == 3: + from io import StringIO + else: + from cStringIO import StringIO + + from sonic_platform_base.sonic_eeprom import eeprom_dts + from sonic_platform_base.sonic_eeprom import eeprom_tlvinfo +except ImportError as e: + raise ImportError(str(e) + "- required module not found") + +CACHE_ROOT = '/var/cache/sonic/decode-syseeprom' +CACHE_FILE = 'syseeprom_cache' +TLV_EEPROM_I2C_BUS = 0 +TLV_EEPROM_I2C_ADDR = 53 + + +class Tlv(eeprom_tlvinfo.TlvInfoDecoder): + + EEPROM_DECODE_HEADLINES = 6 + + def __init__(self): + self._eeprom_path = "/sys/class/i2c-adapter/i2c-{0}/{0}-00{1}/eeprom".format( + TLV_EEPROM_I2C_BUS, TLV_EEPROM_I2C_ADDR) + super(Tlv, self).__init__(self._eeprom_path, 0, '', True) + self._eeprom = self._load_eeprom() + + def __parse_output(self, decode_output): + decode_output.replace('\0', '') + lines = decode_output.split('\n') + lines = lines[self.EEPROM_DECODE_HEADLINES:] + _eeprom_info_dict = dict() + + for line in lines: + try: + match = re.search( + '(0x[0-9a-fA-F]{2})([\s]+[\S]+[\s]+)([\S]+)', line) + if match is not None: + idx = match.group(1) + value = match.group(3).rstrip('\0') + + _eeprom_info_dict[idx] = value + except Exception: + pass + return _eeprom_info_dict + + def _load_eeprom(self): + original_stdout = sys.stdout + sys.stdout = StringIO() + try: + self.read_eeprom_db() + except Exception as e: + decode_output = sys.stdout.getvalue() + sys.stdout = original_stdout + return self.__parse_output(decode_output) + + status = self.check_status() + if 'ok' not in status: + return False + + if not os.path.exists(CACHE_ROOT): + try: + os.makedirs(CACHE_ROOT) + except Exception: + pass + + # + # only the eeprom classes that inherit from eeprom_base + # support caching. Others will work normally + # + try: + self.set_cache_name(os.path.join(CACHE_ROOT, CACHE_FILE)) + except Exception: + pass + + e = self.read_eeprom() + if e is None: + return 0 + + try: + self.update_cache(e) + except Exception: + pass + + self.decode_eeprom(e) + decode_output = sys.stdout.getvalue() + sys.stdout = original_stdout + + (is_valid, valid_crc) = self.is_checksum_valid(e) + if not is_valid: + return False + + return self.__parse_output(decode_output) + + def get_eeprom(self): + return self._eeprom + + def get_serial(self): + return self._eeprom.get('0x23', "Undefined.") + + def get_mac(self): + return self._eeprom.get('0x24', "Undefined.") + + def get_productname(self): + return self._eeprom.get('0x21', "Undefined.") + + def get_partnumber(self): + return self._eeprom.get('0x22', "Undefined.") + diff --git a/platform/innovium/sonic-platform-modules-supermicro/sse-t7132s/sonic_platform/fan.py b/platform/innovium/sonic-platform-modules-supermicro/sse-t7132s/sonic_platform/fan.py new file mode 100644 index 0000000000..12e2ab0a75 --- /dev/null +++ b/platform/innovium/sonic-platform-modules-supermicro/sse-t7132s/sonic_platform/fan.py @@ -0,0 +1,353 @@ +############################################################################# +# SuperMicro SSE-T7132S +# +# Module contains an implementation of SONiC Platform Base API and +# provides the fan status which are available in the platform +# +############################################################################# + +import subprocess + +try: + from sonic_platform_base.fan_base import FanBase + from .helper import APIHelper + from swsscommon.swsscommon import SonicV2Connector +except ImportError as e: + raise ImportError(str(e) + "- required module not found") + + +FAN_NAME_LIST = ["FAN-1", "FAN-2", "FAN-3", "FAN-4", "FAN-5", "FAN-6"] + +IPMI_SENSOR_NETFN = "0x04" +IPMI_SS_READ_CMD = "0x2D {}" +IPMI_OEM_NETFN = "0x30" +IPMI_GET_FAN_SPEED_CMD = "0x70 0x66 0x00 {}" +IPMI_SET_FAN_SPEED_CMD = "0x70 0x66 0x01 {} {}" +IPMI_GET_FAN_LED_CMD = "0x89 0x03 0x00 {}" +IPMI_SET_FAN_LED_CMD = "0x89 0x03 0x01 {} {}" +IPMI_FAN_LED_OFF = 0x00 +IPMI_FAN_LED_GREEN = 0x01 +IPMI_FAN_LED_AMBER = 0x02 +IPMI_FAN_LED_AMBER_BLINK = 0x03 +IPMI_GET_PSU_FAN_SPEED_CMD = "0x89 0x04 0x{:02x} {}" + +MAX_OUTLET = 29500 +MAX_INLET = 25500 +#MAX_PSU_FAN_OUTLET = 11200 # not a fixed value +#MAX_PSU_FAN_INLET = 11200 # not a fixed value +SPEED_TOLERANCE = 20 # based on the speed graph the slowest is about 20% + +FAN_LIST = [ + #name sensor_id led_num + ('FAN1', '0x41', '0x04'), + ('FAN2', '0x42', '0x05'), + ('FAN3', '0x43', '0x06'), + ('FAN4', '0x44', '0x07'), + ('FAN5', '0x45', '0x08'), + ('FAN6', '0x46', '0x09'), +] + +SYSLOG_IDENTIFIER = "fan.py" +NOT_AVAILABLE = 'N/A' + +class Fan(FanBase): + """Platform-specific Fan class""" + + def __init__(self, fan_pwn_number=0, fan_index=0, is_psu_fan=False, psu=None): + FanBase.__init__(self) + #self.logger = logger.Logger(SYSLOG_IDENTIFIER) + #self.logger.set_min_log_priority_debug() + #self.logger.log_debug('init fan_pwn_number={} fan_index={}'.format(fan_pwn_number, fan_index)) + self.fan_pwn_number = fan_pwn_number + self.is_psu_fan = is_psu_fan + if self.is_psu_fan: + self.psu = psu + self.psu_index = self.psu.index + self._api_helper = APIHelper() + self.index = fan_index + self.sensor_reading_addr = FAN_LIST[self.index][1] + self.led_number = FAN_LIST[self.index][2] + self.led_set = self.STATUS_LED_COLOR_OFF + self.speed_set = None + + def get_direction(self): + """ + Retrieves the direction of fan + + Returns: + A string, either FAN_DIRECTION_INTAKE or FAN_DIRECTION_EXHAUST + depending on fan direction + """ + # read part number from eeprom + # psu fan follows the same rule + db = SonicV2Connector() + db.connect(db.STATE_DB) + eeprom_table = db.get_all(db.STATE_DB, 'EEPROM_INFO|0x22') + if "Name" in eeprom_table and eeprom_table["Name"] == "Part Number" and "Value" in eeprom_table: + part_number = eeprom_table["Value"] + else: + part_number_cmd = "sudo decode-syseeprom | grep 'Part Number' | grep -oE '[^ ]+$'" + part_number = subprocess.Popen(part_number_cmd, shell=True, text=True, stdout=subprocess.PIPE).stdout.read() + + if "T7132SR" in part_number: + # "SSE-T7132SR" + direction = self.FAN_DIRECTION_INTAKE + else: + # "SSE-T7132S" + direction = self.FAN_DIRECTION_EXHAUST + + return direction + + def get_speed_rpm(self): + """ + Retrieves the speed of fan as RPM. + + Returns: + An integer of RPM. + """ + if self.is_psu_fan: + status, raw_ss_read = self._api_helper.ipmi_raw( + IPMI_OEM_NETFN, IPMI_GET_PSU_FAN_SPEED_CMD.format(self.psu_index + 1, "0x08")) + rpm_speed = int("".join(raw_ss_read.split()[::-1]), 16) if status else 0 + else: + status, raw_ss_read = self._api_helper.ipmi_raw( + IPMI_SENSOR_NETFN, IPMI_SS_READ_CMD.format(self.sensor_reading_addr)) + # factor 140 should read from SDR + rpm_speed = int(raw_ss_read.split()[0], 16) * 140 if status else 0 + + return rpm_speed + + def get_speed(self): + """ + Retrieves the speed of fan as a percentage of full speed + + Returns: + An integer, the percentage of full fan speed, in the range 0 (off) + to 100 (full speed) + """ + rpm_speed = self.get_speed_rpm() + + if self.is_psu_fan: + # psu fan do not know max speed, so return rpm + speed = rpm_speed + if speed <= 100: + speed = 0 # to prevent be taken as percentage + else: + # when intake, the whole fan module is reversed, so still MAX_OUTLET + max = MAX_OUTLET + speed = int(float(rpm_speed)/max * 100) + + return speed + + def get_target_speed(self): + """ + Retrieves the target (expected) speed of the fan + + Returns: + An integer, the percentage of full fan speed, in the range 0 (off) + to 100 (full speed) + """ + """ + status, raw_ss_read = self._api_helper.ipmi_raw( + IPMI_OEM_NETFN, IPMI_GET_FAN_SPEED_CMD.format(self.fan_pwn_number)) + ss_read = raw_ss_read.split()[0] + pwn = int(ss_read, 16) + target = pwn + """ + if self.is_psu_fan: + # not support so return current speed + target = self.get_speed() + else: + # set and get result are not the same with our ipmi oem command + # This is because of the scaling between 100-based and 255-based + # here just return the cached set value for tesstbed + target = self.speed_set + if target is None: + target = self.get_speed() + return target + + def get_speed_tolerance(self): + """ + Retrieves the speed tolerance of the fan + + Returns: + An integer, the percentage of variance from target speed which is + considered tolerable + """ + return SPEED_TOLERANCE + + def set_speed(self, speed): + """ + Sets the fan speed + + Args: + speed: An integer, the percentage of full fan speed to set fan to, + in the range 0 (off) to 100 (full speed) + + Returns: + A boolean, True if speed is set successfully, False if not + """ + if self.is_psu_fan: + # not support + return False + + speed_hex = hex(speed) + status, raw_ss_read = self._api_helper.ipmi_raw( + IPMI_OEM_NETFN, IPMI_SET_FAN_SPEED_CMD.format(self.fan_pwn_number, speed_hex)) + set_speed = False if not status else True + if set_speed: + self.speed_set = speed + return set_speed + + def set_status_led(self, color): + """ + Sets the state of the fan module status LED + + Args: + color: A string representing the color with which to set the + fan module status LED + + Returns: + bool: True if status LED state is set successfully, False if not + """ + if self.is_psu_fan: + # Not support + return False + + # there are only green and red led on fan + led_color = { + self.STATUS_LED_COLOR_GREEN: IPMI_FAN_LED_GREEN, + self.STATUS_LED_COLOR_AMBER: IPMI_FAN_LED_AMBER, + self.STATUS_LED_COLOR_RED: IPMI_FAN_LED_AMBER, + self.STATUS_LED_COLOR_OFF: IPMI_FAN_LED_OFF + }.get(color) + status, set_led = self._api_helper.ipmi_raw( + IPMI_OEM_NETFN, IPMI_SET_FAN_LED_CMD.format(self.led_number, led_color)) + if status: + set_status_led = True + self.led_set = color + else: + set_status_led = False + + return set_status_led + + def get_status_led(self): + """ + Gets the state of the fan status LED + + Returns: + A string, one of the predefined STATUS_LED_COLOR_* strings above + """ + if self.is_psu_fan: + # Not support + return NOT_AVAILABLE + + status, hx_color = self._api_helper.ipmi_raw( + IPMI_OEM_NETFN, IPMI_GET_FAN_LED_CMD.format(self.led_number)) + # there are only green and red led on fan + status_led = { + "00": self.STATUS_LED_COLOR_OFF, + "01": self.STATUS_LED_COLOR_GREEN, + "02": self.STATUS_LED_COLOR_RED, + }.get(hx_color, self.STATUS_LED_COLOR_OFF) + + # if it was set AMBER then return AMBER + if status_led == self.STATUS_LED_COLOR_RED: + if self.led_set == self.STATUS_LED_COLOR_AMBER: + status_led = self.STATUS_LED_COLOR_AMBER + + return status_led + + def get_name(self): + """ + Retrieves the name of the device + + Returns: + string: The name of the device + """ + if self.is_psu_fan: + fan_name = "PSU {} FAN-{}".format(self.psu_index+1, self.index+1) + else: + fan_name = FAN_NAME_LIST[self.index] + + return fan_name + + def get_presence(self): + """ + Retrieves the presence of the FAN + Returns: + bool: True if FAN is present, False if not + """ + if self.is_psu_fan: + presence = self.psu.get_presence() + return presence + + rpm_speed = self.get_speed_rpm() + if rpm_speed == 0: + presence = False + else: + presence = True + + return presence + + def get_model(self): + """ + Retrieves the model number (or part number) of the device + Returns: + string: Model/part number of device + """ + if self.is_psu_fan: + model = self.psu.get_model() + else: + model = "Unknown" + + return model + + def get_serial(self): + """ + Retrieves the serial number of the device + Returns: + string: Serial number of device + """ + if self.is_psu_fan: + serial = self.psu.get_serial() + else: + serial = "Unknown" + + return serial + + def get_status(self): + """ + Retrieves the operational status of the device + Returns: + A boolean value, True if device is operating properly, False if not + """ + if self.is_psu_fan: + # psu status dose not include psu fan status + # follow PWS-1K62A-1R HW P2 11122014.pdf defined slow fan (<1200rpm) + rpm = self.get_speed_rpm() + status = (rpm >= 1200) + return status + else: + return self.get_presence() and self.get_speed() > 0 + + def get_position_in_parent(self): + """ + Retrieves 1-based relative physical position in parent device. If the agent cannot determine the parent-relative position + for some reason, or if the associated value of entPhysicalContainedIn is '0', then the value '-1' is returned + Returns: + integer: The 1-based relative physical position in parent device or -1 if cannot determine the position + """ + return (self.index + 1) + + def is_replaceable(self): + """ + Indicate whether this device is replaceable. + Returns: + bool: True if it is replaceable. + """ + if self.is_psu_fan: + replaceable = self.psu.is_replaceable() + return replaceable + else: + return True diff --git a/platform/innovium/sonic-platform-modules-supermicro/sse-t7132s/sonic_platform/fan_drawer.py b/platform/innovium/sonic-platform-modules-supermicro/sse-t7132s/sonic_platform/fan_drawer.py new file mode 100644 index 0000000000..9ead756023 --- /dev/null +++ b/platform/innovium/sonic-platform-modules-supermicro/sse-t7132s/sonic_platform/fan_drawer.py @@ -0,0 +1,121 @@ +#!/usr/bin/env python + +############################################################################# +# Celestica +# +# Module contains an implementation of SONiC Platform Base API and +# provides the the Fan-Drawers' information available in the platform +# +############################################################################# + +try: + from sonic_platform_base.fan_drawer_base import FanDrawerBase +except ImportError as e: + raise ImportError(str(e) + "- required module not found") + +NUM_FAN = 1 + + +class FanDrawer(FanDrawerBase): + def __init__(self, fantray_index): + FanDrawerBase.__init__(self) + self._index = fantray_index + 1 + self._init_fan(fantray_index) + + def _init_fan(self, fantray_index): + from sonic_platform.fan import Fan + self.PWN_LIST = [0, 1, 0, 1, 2, 2] # TODO: will change in next HW version + for index in range(NUM_FAN): + pwn = self.PWN_LIST[fantray_index] + fan = Fan(pwn, fantray_index) + self._fan_list.append(fan) + + def set_status_led(self, color): + """ + Sets the state of the fan drawer status LED + Args: + color: A string representing the color with which to set the + fan drawer status LED + Returns: + bool: True if status LED state is set successfully, False if not + """ + return self._fan_list[0].set_status_led(color) + + def get_status_led(self, color=None): + """ + Gets the state of the fan drawer LED + Returns: + A string, one of the predefined STATUS_LED_COLOR_* strings above + """ + return self._fan_list[0].get_status_led() + + def get_maximum_consumed_power(self): + """ + Retrives the maximum power drawn by Fan Drawer + + Returns: + A float, with value of the maximum consumable power of the + component. + """ + return 30.24 # by Eddie + + ############################################################## + ###################### Device methods ######################## + ############################################################## + + def get_name(self): + """ + Retrieves the name of the device + Returns: + string: The name of the device + """ + return "Drawer{}".format(self._index) + + def get_presence(self): + """ + Retrieves the presence of the device + Returns: + bool: True if device is present, False if not + """ + return self._fan_list[0].get_presence() + + def get_model(self): + """ + Retrieves the model number (or part number) of the device + Returns: + string: Model/part number of device + """ + return self._fan_list[0].get_model() + + def get_serial(self): + """ + Retrieves the serial number of the device + Returns: + string: Serial number of device + """ + return self._fan_list[0].get_serial() + + def get_status(self): + """ + Retrieves the operational status of the device + Returns: + A boolean value, True if device is operating properly, False if not + """ + return self._fan_list[0].get_status() + + def get_position_in_parent(self): + """ + Retrieves 1-based relative physical position in parent device. If the agent cannot determine the parent-relative position + for some reason, or if the associated value of entPhysicalContainedIn is '0', then the value '-1' is returned + Returns: + integer: The 1-based relative physical position in parent device or -1 if cannot determine the position + """ + return self._index + + def is_replaceable(self): + """ + Indicate whether this device is replaceable. + Returns: + bool: True if it is replaceable. + """ + return True diff --git a/platform/innovium/sonic-platform-modules-supermicro/sse-t7132s/sonic_platform/helper.py b/platform/innovium/sonic-platform-modules-supermicro/sse-t7132s/sonic_platform/helper.py new file mode 100644 index 0000000000..7acdedb5fa --- /dev/null +++ b/platform/innovium/sonic-platform-modules-supermicro/sse-t7132s/sonic_platform/helper.py @@ -0,0 +1,108 @@ +import os +import struct +import subprocess +from mmap import * + +HOST_CHK_CMD = "docker > /dev/null 2>&1" +EMPTY_STRING = "" + + +class APIHelper(): + + def __init__(self): + pass + + def is_host(self): + return os.system(HOST_CHK_CMD) == 0 + + def pci_get_value(self, resource, offset): + status = True + result = "" + try: + fd = os.open(resource, os.O_RDWR) + mm = mmap(fd, 0) + mm.seek(int(offset)) + read_data_stream = mm.read(4) + result = struct.unpack('I', read_data_stream) + except Exception as e: + status = False + return status, result + + def run_command(self, cmd): + status = True + result = "" + try: + p = subprocess.Popen( + cmd, shell=True, universal_newlines=True, stdout=subprocess.PIPE, stderr=subprocess.PIPE) + raw_data, err = p.communicate() + if err == '': + result = raw_data.strip() + except Exception as e: + status = False + return status, result + + def run_interactive_command(self, cmd): + try: + os.system(cmd) + except Exception as e: + return False + return True + + def read_txt_file(self, file_path): + try: + with open(file_path, 'r') as fd: + data = fd.read() + return data.strip() + except IOError: + pass + return None + + def ipmi_raw(self, netfn, cmd): + status = True + result = "" + try: + cmd = ["ipmitool raw {} {}".format(str(netfn), str(cmd))] + p = subprocess.Popen( + cmd, shell=True, universal_newlines=True, stdout=subprocess.PIPE, stderr=subprocess.PIPE) + raw_data, err = p.communicate() + if err == '': + result = raw_data.strip() + else: + status = False + except Exception as e: + status = False + return status, result + + def ipmi_fru_id(self, id, key=None): + status = True + result = "" + try: + cmd = ["ipmitool fru print {}".format(str( + id))] if not key else ["ipmitool fru print {0} | grep '{1}' ".format(str(id), str(key))] + + p = subprocess.Popen( + cmd, shell=True, universal_newlines=True, stdout=subprocess.PIPE, stderr=subprocess.PIPE) + raw_data, err = p.communicate() + if err == '': + result = raw_data.strip() + else: + status = False + except Exception as e: + status = False + return status, result + + def ipmi_set_ss_thres(self, id, threshold_key, value): + status = True + result = "" + try: + cmd = ["ipmitool sensor thresh '{}' {} {}".format(str(id), str(threshold_key), str(value))] + p = subprocess.Popen( + cmd, shell=True, universal_newlines=True, stdout=subprocess.PIPE, stderr=subprocess.PIPE) + raw_data, err = p.communicate() + if err == '': + result = raw_data.strip() + else: + status = False + except Exception as e: + status = False + return status, result diff --git a/platform/innovium/sonic-platform-modules-supermicro/sse-t7132s/sonic_platform/pcie.py b/platform/innovium/sonic-platform-modules-supermicro/sse-t7132s/sonic_platform/pcie.py new file mode 100644 index 0000000000..6901f62ea8 --- /dev/null +++ b/platform/innovium/sonic-platform-modules-supermicro/sse-t7132s/sonic_platform/pcie.py @@ -0,0 +1,18 @@ +############################################################################# +# SuperMicro SSE-T7132S +# +# Module contains an implementation of SONiC Platform Base API and +# provides the PCIe information which are available in the platform +# +############################################################################# + +try: + from sonic_platform_base.sonic_pcie.pcie_common import PcieUtil +except ImportError as e: + raise ImportError(str(e) + "- required module not found") + + +class Pcie(PcieUtil): + """ T7132S Platform-specific PCIe class """ + """ fallback to pcie_common.PcieUtil to avoid pcieutil warning message """ + diff --git a/platform/innovium/sonic-platform-modules-supermicro/sse-t7132s/sonic_platform/platform.py b/platform/innovium/sonic-platform-modules-supermicro/sse-t7132s/sonic_platform/platform.py new file mode 100644 index 0000000000..7d5424dc94 --- /dev/null +++ b/platform/innovium/sonic-platform-modules-supermicro/sse-t7132s/sonic_platform/platform.py @@ -0,0 +1,21 @@ +############################################################################# +# SuperMicro SSE-T7132S +# +# Module contains an implementation of SONiC Platform Base API and +# provides the platform information +# +############################################################################# + +try: + from sonic_platform_base.platform_base import PlatformBase + from sonic_platform.chassis import Chassis +except ImportError as e: + raise ImportError(str(e) + "- required module not found") + + +class Platform(PlatformBase): + """Platform-specific Platform class""" + + def __init__(self): + PlatformBase.__init__(self) + self._chassis = Chassis() diff --git a/platform/innovium/sonic-platform-modules-supermicro/sse-t7132s/sonic_platform/psu.py b/platform/innovium/sonic-platform-modules-supermicro/sse-t7132s/sonic_platform/psu.py new file mode 100644 index 0000000000..1a77b75f74 --- /dev/null +++ b/platform/innovium/sonic-platform-modules-supermicro/sse-t7132s/sonic_platform/psu.py @@ -0,0 +1,545 @@ +############################################################################# +# SuperMicro SSE-T7132S +# +# Module contains an implementation of SONiC Platform Base API and +# provides the PSUs status which are available in the platform +# +############################################################################# + +import re + +try: + from sonic_platform_base.psu_base import PsuBase + from .helper import APIHelper + from sonic_platform.fan import Fan + from sonic_platform_base.thermal_base import ThermalBase +except ImportError as e: + raise ImportError(str(e) + "- required module not found") + +PSU_NAME_LIST = ["PSU_1", "PSU_2"] +PSU_NUM_FAN = [1, 1] +PSU_NUM_TERMAL = [2, 2] + +IPMI_SENSOR_NETFN = "0x04" +IPMI_OEM_NETFN = "0x30" +IPMI_SS_READ_CMD = "0x2D {}" +IPMI_OEM_CMD = "0x89 {}" +IPMI_PSU_TYPE_CMD = "0x1 {}" +IPMI_GET_PSU_LED_MODE_CMD = "0x2 0x1" +IPMI_SET_PSU_LED_MODE_CMD = "0x2 0x2 {}" +IPMI_GET_PSU_LED_PATTERN_CMD = "0x3 0x0 {}" +IPMI_SET_PSU_LED_PATTERN_CMD = "0x3 0x1 {} {}" +IPMI_PSU_INFO_CMD= "0x4 {} {}" + +PSU_LED_OFF_CMD = "0x00" +PSU_LED_GREEN_CMD = "0x01" +PSU_LED_AMBER_CMD = "0x02" + +PSU_SERIAL_CMD = "0x00" +PSU_MODEL_CMD = "0x01" +PSU_VOUT_CMD = "0x02" +PSU_COUT_CMD = "0x03" +PSU_POUT_CMD = "0x04" +PSU_VIN_CMD = "0x05" +PSU_CIN_CMD = "0x06" +PSU_PIN_CMD = "0x07" +PSU_FAN1_CMD = "0x08" +PSU_FAN2_CMD = "0x09" +PSU_TEMP1_CMD = "0x0A" +PSU_TEMP2_CMD = "0x0B" +PSU_MAX_TEMP1_CMD = "0x0C" +PSU_MAX_TEMP2_CMD = "0x0D" +PSU_MAX_POUT_CMD = "0x0E" + +PSU1_STATUS_REG = "0xC4" +PSU2_STATUS_REG = "0xC5" + +PSU1_FRU_ID = 3 + +PSU_OUT_VOLTAGE = 12 + +SS_READ_OFFSET = 0 +OEM_READ_OFFSET = 0 + + +class Psu(PsuBase): + """Platform-specific Psu class""" + + def __init__(self, psu_index): + PsuBase.__init__(self) + self.index = psu_index + for fan_index in range(0, PSU_NUM_FAN[self.index]): + fan = Fan(0, fan_index, is_psu_fan=True, psu=self) + self._fan_list.append(fan) + for thermal_index in range(0, PSU_NUM_TERMAL[self.index]): + self._thermal_list.append(PsuThermal(self, thermal_index)) + self._api_helper = APIHelper() + + def find_value(self, in_string): + result = re.search("^.+ ([0-9a-f]{2}) .+$", in_string) + return result.group(1) if result else result + + def get_voltage(self): + """ + Retrieves current PSU voltage output + Returns: + A float number, the output voltage in volts, + e.g. 12.1 + """ + psu_voltage = 0.0 + psu_vout_key = IPMI_PSU_INFO_CMD.format(self.index+1, PSU_VOUT_CMD) + status, raw_oem_read = self._api_helper.ipmi_raw( + IPMI_OEM_NETFN, IPMI_OEM_CMD.format(psu_vout_key)) + + if raw_oem_read: + # Formula: R/10 + psu_voltage = int("".join(raw_oem_read.split()[::-1]), 16) / 10 + + return psu_voltage + + def get_voltage_high_threshold(self): + """ + Retrieves the high threshold PSU voltage output + Returns: + A float number, the high threshold output voltage in volts, + e.g. 12.1 + """ + # Formula: PSU_OUT_VOLTAGEx11/10 + psu_voltage = PSU_OUT_VOLTAGE * 11 / 10 + + return psu_voltage + + def get_voltage_low_threshold(self): + """ + Retrieves the low threshold PSU voltage output + Returns: + A float number, the low threshold output voltage in volts, + e.g. 12.1 + """ + # Formula: PSU_OUT_VOLTAGEx9/10 + psu_voltage = PSU_OUT_VOLTAGE * 9 / 10 + + return psu_voltage + + def get_current(self): + """ + Retrieves present electric current supplied by PSU + Returns: + A float number, the electric current in amperes, e.g 15.4 + """ + psu_current = 0.0 + psu_cout_key = IPMI_PSU_INFO_CMD.format(self.index+1, PSU_COUT_CMD) + status, raw_oem_read = self._api_helper.ipmi_raw( + IPMI_OEM_NETFN, IPMI_OEM_CMD.format(psu_cout_key)) + + if raw_oem_read: + # Formula: R/1000 + psu_current = int("".join(raw_oem_read.split()[::-1]), 16) / 1000 + + return psu_current + + def get_power(self): + """ + Retrieves current energy supplied by PSU + Returns: + A float number, the power in watts, e.g. 302.6 + """ + psu_power = 0.0 + psu_pout_key = IPMI_PSU_INFO_CMD.format(self.index+1, PSU_POUT_CMD) + status, raw_oem_read = self._api_helper.ipmi_raw( + IPMI_OEM_NETFN, IPMI_OEM_CMD.format(psu_pout_key)) + + if raw_oem_read: + # Formula: R + psu_power = int("".join(raw_oem_read.split()[::-1]), 16) + return psu_power + + def get_maximum_supplied_power(self): + """ + Retrieves the maximum supplied power by PSU + Returns: + A float number, the maximum power output in Watts. + e.g. 1200.1 + """ + psu_power = 0.0 + psu_pout_key = IPMI_PSU_INFO_CMD.format(self.index+1, PSU_MAX_POUT_CMD) + status, raw_oem_read = self._api_helper.ipmi_raw( + IPMI_OEM_NETFN, IPMI_OEM_CMD.format(psu_pout_key)) + + if raw_oem_read: + # Formula: R + psu_power = int("".join(raw_oem_read.split()[::-1]), 16) + return psu_power + + def get_powergood_status(self): + """ + Retrieves the powergood status of PSU + Returns: + A boolean, True if PSU has stablized its output voltages and passed all + its internal self-tests, False if not. + """ + return self.get_status() + + def set_status_led(self, color): + """ + Sets the state of the PSU status LED + Args: + color: A string representing the color with which to set the PSU status LED + Note: Only support green and off + Returns: + bool: True if status LED state is set successfully, False if not + Note + """ + led_cmd = { + self.STATUS_LED_COLOR_GREEN: PSU_LED_GREEN_CMD, + "orange": PSU_LED_AMBER_CMD, + self.STATUS_LED_COLOR_OFF: PSU_LED_OFF_CMD + }.get(color) + + psu_led_key = IPMI_SET_PSU_LED_PATTERN_CMD.format(self.index+2,led_cmd) + status, set_led = self._api_helper.ipmi_raw( + IPMI_OEM_NETFN, IPMI_OEM_CMD.format(psu_led_key)) + set_status_led = False if not status else True + + return set_status_led + + def get_status_led(self): + """ + Gets the state of the PSU status LED + Returns: + A string, one of the predefined STATUS_LED_COLOR_* strings above + """ + psu_led_key = IPMI_GET_PSU_LED_PATTERN_CMD.format(self.index+2) + status, hx_color = self._api_helper.ipmi_raw( + IPMI_OEM_NETFN, IPMI_OEM_CMD.format(psu_led_key)) + + status_led = { + "00": self.STATUS_LED_COLOR_OFF, + "01": self.STATUS_LED_COLOR_GREEN, + "02": "orange", + }.get(hx_color, self.STATUS_LED_COLOR_OFF) + + return status_led + + def get_temperature(self): + """ + Retrieves current temperature reading from PSU + Returns: + A float number of current temperature in Celsius up to nearest thousandth + of one degree Celsius, e.g. 30.125 + there are three temp sensors , we choose one of them + """ + # Need implement after BMC function ready + psu_temperature = None + + return psu_temperature + + def get_temperature_high_threshold(self): + """ + Retrieves the high threshold temperature of PSU + Returns: + A float number, the high threshold temperature of PSU in Celsius + up to nearest thousandth of one degree Celsius, e.g. 30.125 + there are three temp sensors , we choose one of them + """ + # Need implement after BMC function ready + psu_temperature = None + + return psu_temperature + + def get_name(self): + """ + Retrieves the name of the device + Returns: + string: The name of the device + """ + return PSU_NAME_LIST[self.index] + + def get_presence(self): + """ + Retrieves the presence of the PSU + Returns: + bool: True if PSU is present, False if not + """ + psu_presence = False + psu_pstatus_key = globals()['PSU{}_STATUS_REG'.format(self.index+1)] + status, raw_status_read = self._api_helper.ipmi_raw( + IPMI_SENSOR_NETFN, IPMI_SS_READ_CMD.format(psu_pstatus_key)) + status_byte = self.find_value(raw_status_read) + + if status: + presence_int = (int(status_byte, 16) >> 0) & 1 + psu_presence = True if presence_int else False + + return psu_presence + + def get_model(self): + """ + Retrieves the model number (or part number) of the device + Returns: + string: Model/part number of device + """ + model = "Unknown" + psu_model_key = IPMI_PSU_INFO_CMD.format(self.index+1, PSU_MODEL_CMD) + status, raw_model = self._api_helper.ipmi_raw( + IPMI_OEM_NETFN, IPMI_OEM_CMD.format(psu_model_key)) + + model_raw_list = raw_model.split() + if len(model_raw_list) > 0: + model="".join(map(chr,map(lambda x: int(x, 16), model_raw_list))) + return model + + def get_serial(self): + """ + Retrieves the serial number of the device + Returns: + string: Serial number of device + """ + serial = "Unknown" + psu_serial_key = IPMI_PSU_INFO_CMD.format(self.index+1, PSU_SERIAL_CMD) + status, raw_serial = self._api_helper.ipmi_raw( + IPMI_OEM_NETFN, IPMI_OEM_CMD.format(psu_serial_key)) + + serial_raw_list = raw_serial.split() + if len(serial_raw_list) > 0: + serial="".join(map(chr,map(lambda x: int(x, 16), serial_raw_list))) + + return serial + + def get_status(self): + """ + Retrieves the operational status of the device + Returns: + A boolean value, True if device is operating properly, False if not + """ + psu_status = False + psu_pstatus_key = globals()['PSU{}_STATUS_REG'.format(self.index+1)] + status, raw_status_read = self._api_helper.ipmi_raw( + IPMI_SENSOR_NETFN, IPMI_SS_READ_CMD.format(psu_pstatus_key)) + status_byte = self.find_value(raw_status_read) + + if status: + failure_detected = (int(status_byte, 16) >> 1) & 1 + input_lost = (int(status_byte, 16) >> 3) & 1 + psu_status = False if (input_lost or failure_detected) else True + + return psu_status + + def get_type(self): + """ + Retrives the Power Type of PSU + + Returns : + A string, PSU power type + """ + psu_type = [None, 'AC', 'AC', 'DC'] + psu_type_key = IPMI_PSU_TYPE_CMD.format(self.index+1) + status, raw_type_read = self._api_helper.ipmi_raw( + IPMI_OEM_NETFN, IPMI_OEM_CMD.format(psu_type_key)) + if status: + raw_type = raw_type_read.split()[OEM_READ_OFFSET] + type_index = int(raw_type, 16) + if type_index < 4: + return psu_type[type_index] + return None + + def get_position_in_parent(self): + """ + Retrieves 1-based relative physical position in parent device. + Returns: + integer: The 1-based relative physical position in parent + device or -1 if cannot determine the position + """ + return self.index + + def is_replaceable(self): + """ + Indicate whether this PSU is replaceable. + Returns: + bool: True if it is replaceable. + """ + return True + + + def get_num_thermals(self): + """ + Retrieves the number of thermals available on this PSU + + Returns: + An integer, the number of thermals available on this PSU + """ + return len(self._thermal_list) + + def get_all_thermals(self): + """ + Retrieves all thermals available on this PSU + + Returns: + A list of objects derived from ThermalBase representing all thermals + available on this PSU + """ + return self._thermal_list + + def get_thermal(self, index): + """ + Retrieves thermal unit represented by (0-based) index + + Args: + index: An integer, the index (0-based) of the thermal to + retrieve + + Returns: + An object derived from ThermalBase representing the specified thermal + """ + thermal = None + + try: + thermal = self._thermal_list[index] + except IndexError: + sys.stderr.write("THERMAL index {} out of range (0-{})\n".format( + index, len(self._thermal_list)-1)) + + return thermal + +class PsuThermal(ThermalBase): + """Platform-specific Thermal class for PSU """ + + def __init__(self, psu, index): + self._api_helper = APIHelper() + self.psu = psu + self.index = index + self.minimum_thermal = 999 + self.maximum_thermal = 0 + + def get_temperature(self): + """ + Retrieves current temperature reading from thermal + + Returns: + A float number of current temperature in Celsius up to nearest thousandth + of one degree Celsius, e.g. 30.125 + """ + if self.psu.get_presence() != True: + return None + + psu_temperature = 0.0 + psu_temp_cmd_key = globals()['PSU_TEMP{}_CMD'.format(self.index+1)] + psu_temp_key = IPMI_PSU_INFO_CMD.format(self.psu.index+1, psu_temp_cmd_key) + status, raw_oem_read = self._api_helper.ipmi_raw( + IPMI_OEM_NETFN, IPMI_OEM_CMD.format(psu_temp_key)) + + if raw_oem_read: + # Formula: R + psu_temperature = int("".join(raw_oem_read.split()[::-1]), 16) + + if psu_temperature > self.maximum_thermal: + self.maximum_thermal = psu_temperature + if psu_temperature < self.minimum_thermal: + self.minimum_thermal = psu_temperature + + return psu_temperature + + def get_high_threshold(self): + """ + Retrieves the high threshold temperature of thermal + + Returns: + A float number, the high threshold temperature of thermal in Celsius + up to nearest thousandth of one degree Celsius, e.g. 30.125 + """ + # ignore max_temp 1 to aviod false alarm because PSU fan control is not ready + if self.index == 0: + return None + + if self.get_presence() != True: + return None + + psu_temper_high = 0.0 + psu_temp_cmd_key = globals()['PSU_MAX_TEMP{}_CMD'.format(self.index+1)] + psu_temp_key = IPMI_PSU_INFO_CMD.format(self.psu.index+1, psu_temp_cmd_key) + status, raw_oem_read = self._api_helper.ipmi_raw( + IPMI_OEM_NETFN, IPMI_OEM_CMD.format(psu_temp_key)) + + if raw_oem_read: + # Formula: R + psu_temper_high = int("".join(raw_oem_read.split()[::-1]), 16) + + return psu_temper_high + + def get_minimum_recorded(self): + """ + Retrieves the minimum recorded temperature of thermal + + Returns: + A float number, the minimum recorded temperature of thermal in Celsius + up to nearest thousandth of one degree Celsius, e.g. 30.125 + """ + return self.minimum_thermal; + + def get_maximum_recorded(self): + """ + Retrieves the maximum recorded temperature of thermal + + Returns: + A float number, the maximum recorded temperature of thermal in Celsius + up to nearest thousandth of one degree Celsius, e.g. 30.125 + """ + return self.maximum_thermal + + def get_name(self): + """ + Retrieves the name of the thermal device + Returns: + string: The name of the thermal device + """ + return '{}_TEMP_{}'.format(self.psu.get_name(), self.index+1) + + def get_presence(self): + """ + Retrieves the presence of the device + Returns: + bool: True if device is present, False if not + """ + return self.psu.get_presence() + + def get_model(self): + """ + Retrieves the model number (or part number) of the device + Returns: + string: Model/part number of device + """ + return self.psu.get_model() + + def get_serial(self): + """ + Retrieves the serial number of the device + Returns: + string: Serial number of device + """ + return self.psu.get_serial() + + def get_status(self): + """ + Retrieves the operational status of the device + Returns: + A boolean value, True if device is operating properly, False if not + """ + return self.psu.get_status() + + def get_position_in_parent(self): + """ + Retrieves 1-based relative physical position in parent device. + Returns: + integer: The 1-based relative physical position in parent + device or -1 if cannot determine the position + """ + return (self.index + 1) + + def is_replaceable(self): + """ + Indicate whether this Thermal is replaceable. + Returns: + bool: True if it is replaceable. + """ + return False + diff --git a/platform/innovium/sonic-platform-modules-supermicro/sse-t7132s/sonic_platform/sfp.py b/platform/innovium/sonic-platform-modules-supermicro/sse-t7132s/sonic_platform/sfp.py new file mode 100644 index 0000000000..3bb0d7fdda --- /dev/null +++ b/platform/innovium/sonic-platform-modules-supermicro/sse-t7132s/sonic_platform/sfp.py @@ -0,0 +1,444 @@ +#!/usr/bin/env python +""" +############################################################################# +# SuperMicro SSE-T7132S +# +# Sfp contains an implementation of SONiC Platform Base API and +# provides the sfp status which are available in the platform +# +############################################################################# +""" + +try: + import os + import time + from sonic_platform_base.sonic_xcvr.sfp_optoe_base import SfpOptoeBase + +except ImportError as err: + raise ImportError(str(err) + "- required module not found") + +QSFP_INFO_OFFSET = 128 +SFP_INFO_OFFSET = 0 +QSFP_DD_PAGE0 = 0 + +SFP_TYPE_LIST = [ + '0x3' # SFP/SFP+/SFP28 and later +] +QSFP_TYPE_LIST = [ + '0x0c', # QSFP + '0x0d', # QSFP+ or later + '0x11' # QSFP28 or later +] +QSFP_DD_TYPE_LIST = [ + '0x18' #QSFP_DD Type +] + +OSFP_TYPE_LIST = [ + '0x19' # OSFP 8X Type +] + +SFP_TYPE = "SFP" +QSFP_TYPE = "QSFP" +OSFP_TYPE = "OSFP" +QSFP_DD_TYPE = "QSFP_DD" +SFP_NAME = "Ethernet{}" + +PORT_START = 0 +PORT_END = 34 +QSFP_PORT_START = 0 +QSFP_PORT_END = 32 + +I2C_EEPROM_PATH = '/sys/bus/i2c/devices/i2c-{0}/{0}-0050/eeprom' +PORT_INFO_PATH= '/sys/class/t7132s_cpld' + +class Sfp(SfpOptoeBase): + """Platform-specific Sfp class""" + PLATFORM = "x86_64-supermicro_sse_t7132s-r0" + HWSKU = "Supermicro_sse_t7132s" + + _port_to_offset = [11, 30, 12, 29, 13, 28, 14, 27, 15, 34, + 16, 33, 17, 32, 18, 31, 19, 38, 20, 37, + 21, 36, 22, 35, 23, 42, 24, 41, 25, 40, + 26, 39, + 43, 44] + + def __init__(self, sfp_index=0): + SfpOptoeBase.__init__(self) + + self.index = sfp_index # for sfputil show error-status --fetch-from-hardware + self._master_port = self.index - 1 + self._port_num = self.index + self.sfp_type = QSFP_DD_TYPE + #port_type is the native port type and sfp_type is the transceiver type + #sfp_type will be detected in get_transceiver_info + if self._master_port < QSFP_PORT_END: + self.port_type = QSFP_DD_TYPE + self.NUM_CHANNELS = 8 + self.port_name = "QSFP" + str(self._port_num) + self._name = [SFP_NAME.format(str(self._master_port*8))] + else: + self.port_type = SFP_TYPE + self.NUM_CHANNELS = 1 + self.port_name = "SFP" + str(self._port_num - QSFP_PORT_END) + self._name = [SFP_NAME.format(str((QSFP_PORT_END*8)+(self._master_port - QSFP_PORT_END)))] + self.sfp_type = self.port_type + self.sfp_eeprom_path = self.get_eeprom_path() + self._initialize_media(delay=False) + + def _detect_sfp_type(self): + eeprom_raw = [] + eeprom_ready = True + + time_begin = time.time() + eeprom_ready = False + while (time.time() - time_begin) < 4: + # read 2 more bytes to check eeprom ready + eeprom_raw = self.read_eeprom(XCVR_TYPE_OFFSET, XCVR_TYPE_WIDTH + 2) + + if eeprom_raw: + if eeprom_raw[0] in SFP_TYPE_CODE_LIST: + self.sfp_type = SFP_TYPE + eeprom_ready = True + elif eeprom_raw[0] in QSFP_TYPE_CODE_LIST: + self.sfp_type = QSFP_TYPE + eeprom_ready = True + elif eeprom_raw[0] in QSFP_DD_TYPE_CODE_LIST: + self.sfp_type = QSFP_DD_TYPE + eeprom_ready = True + else: + self.sfp_type = self.port_type + if all([b == '00' for b in eeprom_raw]): + logger.Logger('SFP').log_warning( + "_detect_sfp_type: {} index {} by {} eeprom all 0". + format(self._name, self.index, + inspect.currentframe().f_back.f_code.co_name)) + else: + eeprom_ready = True + else: + logger.Logger('SFP').log_warning( + "_detect_sfp_type: {} index {} by {} eeprom none". + format(self._name, self.index, + inspect.currentframe().f_back.f_code.co_name)) + self.sfp_type = self.port_type + + if not eeprom_ready: + # retry after sleep + time.sleep(1) + else: + break; + + if self.sfp_type == QSFP_DD_TYPE: + self.NUM_CHANNELS = 8 + elif self.sfp_type == QSFP_TYPE: + self.NUM_CHANNELS = 4 + elif self.sfp_type == SFP_TYPE: + self.NUM_CHANNELS = 1 + + return eeprom_ready + + def get_eeprom_path(self): + """ + Returns SFP eeprom path + """ + port_eeprom_path = I2C_EEPROM_PATH.format(self._port_to_offset[self._master_port]) + return port_eeprom_path + + def get_name(self): + """ + Retrieves the name of the device + Returns: + string: The name of the device + """ + return self._name[0] + + def _initialize_media(self, delay=False): + """ + Initialize the media type and eeprom driver for SFP + """ + if delay: + time.sleep(1) + self._xcvr_api = None + self.get_xcvr_api() + + self.set_media_type() + self.reinit_sfp_driver() + + def get_presence(self): + """ + Retrieves the presence of the SFP + Returns: + bool: True if SFP is present, False if not + """ + sysfs_filename = "sfp_modabs" if self.port_type == SFP_TYPE else "qsfp_modprs" + reg_path = "/".join([PORT_INFO_PATH, self.port_name, sysfs_filename]) + + # Read status + try: + with open(reg_path) as reg_file: + content = reg_file.readline().rstrip() + reg_value = int(content) + # Module present is active low + if reg_value == 0: + return True + except IOError as e: + print("Error: unable to open file: %s" % str(e)) + return False + + # not present + return False + + def get_reset_status(self): + """ + Retrieves the reset status of SFP + Returns: + A Boolean, True if reset enabled, False if disabled + """ + if self.port_type != QSFP_DD_TYPE: + return False + + try: + with open( + "/".join([PORT_INFO_PATH, self.port_name, "qsfp_reset"])) as reg_file: + # Read status + content = reg_file.readline().rstrip() + reg_value = int(content) + # reset is active low + if reg_value == 0: + return True + except IOError as e: + print("Error: unable to open file: %s" % str(e)) + return False + + return False + + def get_lpmode(self): + """ + Retrieves the lpmode (low power mode) status of this SFP + Returns: + A Boolean, True if lpmode is enabled, False if disabled + """ + if self.port_type != QSFP_DD_TYPE: + return False + + try: + with open( + "/".join([PORT_INFO_PATH, self.port_name, "qsfp_lpmode"])) as reg_file: + # Read status + content = reg_file.readline().rstrip() + reg_value = int(content) + # low power mode is active high + if reg_value == 0: + return False + except IOError as e: + print("Error: unable to open file: %s" % str(e)) + return False + + return True + + def reset(self): + """ + Reset SFP and return all user module settings to their default srate. + Returns: + A boolean, True if successful, False if not + """ + if self.port_type != QSFP_DD_TYPE: + return False + + try: + with open( + "/".join([PORT_INFO_PATH, self.port_name, "qsfp_reset"]), "w") as reg_file: + # Convert our register value back to a hex string and write back + reg_file.seek(0) + reg_file.write(hex(0)) + except IOError as e: + print("Error: unable to open file: %s" % str(e)) + return False + + # Sleep 1 second to allow it to settle + time.sleep(1) + + # Flip the bit back high and write back to the register to take port out of reset + try: + with open( + "/".join([PORT_INFO_PATH, self.port_name, "qsfp_reset"]), "w") as reg_file: + reg_file.seek(0) + reg_file.write(hex(1)) + except IOError as e: + print("Error: unable to open file: %s" % str(e)) + return False + + return True + + def no_reset(self): + """ + Set CPLD qsfp_reset to 1 for non-reset status. + Returns: + A boolean, True if successful, False if not + """ + if self.port_type != QSFP_DD_TYPE: + return False + + try: + with open( + "/".join([PORT_INFO_PATH, self.port_name, "qsfp_reset"]), "w") as reg_file: + reg_file.seek(0) + reg_file.write(hex(1)) + except IOError as e: + print("Error: unable to open file: %s" % str(e)) + return False + + return True + + def set_lpmode(self, lpmode): + """ + Sets the lpmode (low power mode) of SFP + Args: + lpmode: A Boolean, True to enable lpmode, False to disable it + Note : lpmode can be overridden by set_power_override + Returns: + A boolean, True if lpmode is set successfully, False if not + """ + if not self._detect_sfp_type(): + return False + + if self.port_type != QSFP_DD_TYPE: + return False + + try: + reg_file = open( + "/".join([PORT_INFO_PATH, self.port_name, "qsfp_lpmode"]), "r+") + except IOError as e: + print("Error: unable to open file: %s" % str(e)) + return False + + content = hex(lpmode) + + reg_file.seek(0) + reg_file.write(content) + reg_file.close() + + return True + + def set_media_type(self): + """ + Reads optic eeprom byte to determine media type inserted + """ + eeprom_raw = [] + eeprom_raw = self._xcvr_api_factory._get_id() + if eeprom_raw is not None: + eeprom_raw = hex(eeprom_raw) + if eeprom_raw in SFP_TYPE_LIST: + self.sfp_type = SFP_TYPE + elif eeprom_raw in QSFP_TYPE_LIST: + self.sfp_type = QSFP_TYPE + elif eeprom_raw in QSFP_DD_TYPE_LIST: + self.sfp_type = QSFP_DD_TYPE + else: + #Set native port type if EEPROM type is not recognized/readable + self.sfp_type = self.port_type + else: + self.sfp_type = self.port_type + + return self.sfp_type + + def reinit_sfp_driver(self): + """ + Changes the driver based on media type detected + """ + + i2c_bus = self.sfp_eeprom_path[25:].split('/')[0] + del_sfp_path = "/sys/bus/i2c/devices/i2c-{0}/delete_device".format(i2c_bus) + new_sfp_path = "/sys/bus/i2c/devices/i2c-{0}/new_device".format(i2c_bus) + driver_path = "/sys/bus/i2c/devices/i2c-{0}/{0}-0050/name".format(i2c_bus) + + if not os.path.isfile(driver_path): + print(driver_path, "does not exist") + return False + + try: + with os.fdopen(os.open(driver_path, os.O_RDONLY)) as filed: + driver_name = filed.read() + driver_name = driver_name.rstrip('\r\n') + driver_name = driver_name.lstrip(" ") + + #Avoid re-initialization of the QSFP/SFP optic on QSFP/SFP port. + if self.sfp_type == SFP_TYPE and driver_name in ['optoe1', 'optoe3']: + with open(del_sfp_path, 'w') as f: + f.write('0x50\n') + time.sleep(0.2) + with open(new_sfp_path, 'w') as f: + f.write('optoe2 0x50\n') + time.sleep(2) + elif self.sfp_type == OSFP_TYPE and driver_name in ['optoe2', 'optoe3']: + with open(del_sfp_path, 'w') as f: + f.write('0x50\n') + time.sleep(0.2) + with open(new_sfp_path, 'w') as f: + f.write('optoe1 0x50\n') + time.sleep(2) + elif self.sfp_type == QSFP_DD_TYPE and driver_name in ['optoe1', 'optoe2']: + with open(del_sfp_path, 'w') as f: + f.write('0x50\n') + time.sleep(0.2) + with open(new_sfp_path, 'w') as f: + f.write('optoe3 0x50\n') + time.sleep(2) + + except IOError as err: + print("Error: Unable to open file: %s" %str(err)) + return False + + return True + + def get_position_in_parent(self): + """ + Retrieves 1-based relative physical position in parent device. + Returns: + integer: The 1-based relative physical position in parent + device or -1 if cannot determine the position + """ + return 0 + + @staticmethod + def is_replaceable(): + """ + Indicate whether this device is replaceable. + Returns: + bool: True if it is replaceable. + """ + return True + + def get_error_description(self): + """ + Retrives the error descriptions of the SFP module + + Returns: + String that represents the current error descriptions of vendor specific errors + In case there are multiple errors, they should be joined by '|', + like: "Bad EEPROM|Unsupported cable" + """ + if not self.get_presence(): + return self.SFP_STATUS_UNPLUGGED + else: + if not os.path.isfile(self.sfp_eeprom_path): + return "EEPROM driver is not attached" + + if self.sfp_type == SFP_TYPE: + offset = SFP_INFO_OFFSET + elif self.sfp_type == OSFP_TYPE: + offset = QSFP_INFO_OFFSET + elif self.sfp_type == QSFP_TYPE: + offset = QSFP_INFO_OFFSET + elif self.sfp_type == QSFP_DD_TYPE: + offset = QSFP_DD_PAGE0 + else: + return "Invalid SFP type {}".format(self.sfp_type) + + try: + with open(self.sfp_eeprom_path, mode="rb", buffering=0) as eeprom: + eeprom.seek(offset) + eeprom.read(1) + except OSError as e: + return "EEPROM read failed ({})".format(e.strerror) + + return self.SFP_STATUS_OK \ No newline at end of file diff --git a/platform/innovium/sonic-platform-modules-supermicro/sse-t7132s/sonic_platform/thermal.py b/platform/innovium/sonic-platform-modules-supermicro/sse-t7132s/sonic_platform/thermal.py new file mode 100644 index 0000000000..38e3b5b7dc --- /dev/null +++ b/platform/innovium/sonic-platform-modules-supermicro/sse-t7132s/sonic_platform/thermal.py @@ -0,0 +1,253 @@ +############################################################################# +# SuperMicro SSE-T7132S +# +# Thermal contains an implementation of SONiC Platform Base API and +# provides the thermal device status which are available in the platform +# +############################################################################# + +try: + from sonic_platform_base.thermal_base import ThermalBase + from .helper import APIHelper +except ImportError as e: + raise ImportError(str(e) + "- required module not found") + +IPMI_SENSOR_NETFN = "0x04" +IPMI_SS_READ_CMD = "0x2D {}" +IPMI_SS_THRESHOLD_CMD = "0x27 {}" +HIGH_TRESHOLD_SET_KEY = "ucr" +LOW_TRESHOLD_SET_KEY = "lcr" +HIGH_CRIT_TRESHOLD_SET_KEY = "unr" +LOW_CRIT_TRESHOLD_SET_KEY = "lnr" + + +class Thermal(ThermalBase): + """Platform-specific Thermal class""" + + def __init__(self, thermal_index): + ThermalBase.__init__(self) + self._api_helper = APIHelper() + self.index = thermal_index + self.THERMAL_LIST = [ + ('CPU_Temp', 'CPU Temperature Sensor', '0x01'), + ('PCH_Temp', 'PCH Temperature Sensor', '0x0a'), + ('System_Temp', 'System Temperature Sensor', '0x0b'), + ('Peripheral_Temp', 'Peripheral Temperature Sensor', '0x0c'), + ('Switch_Top-1', 'Switchboard Left Inlet Temperature Sensor', '0xb4'), + ('Switch_Buttom-1', 'Switchboard Left Outlet Temperature Sensor', '0xb5'), + ('Switch_Top-2', 'Switchboard Right Inlet Temperature Sensor', '0xb6'), + ('Switch_Buttom-2', 'Switchboard Right Outlet Temperature Sensor','0xb7'), + ('Switch_Temp', 'Switch Temperature Sensor', '0xb8'), + ] + self.sensor_id = self.THERMAL_LIST[self.index][0] + self.sensor_des = self.THERMAL_LIST[self.index][1] + self.sensor_reading_addr = self.THERMAL_LIST[self.index][2] + self.minimum_thermal = self.get_temperature() + self.maximum_thermal = self.get_temperature() + + def __set_threshold(self, key, value): + print('{} {}'.format(key, value)) + + def get_temperature(self): + """ + Retrieves current temperature reading from thermal + Returns: + A float number of current temperature in Celsius up to nearest thousandth + of one degree Celsius, e.g. 30.125 + """ + temperature = 0.0 + status, raw_ss_read = self._api_helper.ipmi_raw( + IPMI_SENSOR_NETFN, IPMI_SS_READ_CMD.format(self.sensor_reading_addr)) + if status and len(raw_ss_read.split()) > 0: + ss_read = raw_ss_read.split()[0] + temperature = float(int(ss_read, 16)) + return temperature + + def get_high_threshold(self): + """ + Retrieves the high threshold temperature of thermal + Returns: + A float number, the high threshold temperature of thermal in Celsius + up to nearest thousandth of one degree Celsius, e.g. 30.125 + """ + high_threshold = 0.0 + status, raw_up_thres_read = self._api_helper.ipmi_raw( + IPMI_SENSOR_NETFN, IPMI_SS_THRESHOLD_CMD.format(self.sensor_reading_addr)) + if status and len(raw_up_thres_read.split()) > 6: + ss_read = raw_up_thres_read.split()[5] + high_threshold = float(int(ss_read, 16)) + return high_threshold + + def get_low_threshold(self): + """ + Retrieves the low threshold temperature of thermal + Returns: + A float number, the low threshold temperature of thermal in Celsius + up to nearest thousandth of one degree Celsius, e.g. 30.125 + """ + low_threshold = 0.0 + status, raw_up_thres_read = self._api_helper.ipmi_raw( + IPMI_SENSOR_NETFN, IPMI_SS_THRESHOLD_CMD.format(self.sensor_reading_addr)) + if status and len(raw_up_thres_read.split()) > 6: + ss_read = raw_up_thres_read.split()[2] + low_threshold = float(int(ss_read, 16)) + return low_threshold + + def set_high_threshold(self, temperature): + """ + Sets the high threshold temperature of thermal + Args : + temperature: A float number up to nearest thousandth of one degree Celsius, + e.g. 30.125 + Returns: + A boolean, True if threshold is set successfully, False if not + """ + status, ret_txt = self._api_helper.ipmi_set_ss_thres(self.sensor_id, HIGH_TRESHOLD_SET_KEY, temperature) + return status + + def set_low_threshold(self, temperature): + """ + Sets the low threshold temperature of thermal + Args : + temperature: A float number up to nearest thousandth of one degree Celsius, + e.g. 30.125 + Returns: + A boolean, True if threshold is set successfully, False if not + """ + status, ret_txt = self._api_helper.ipmi_set_ss_thres(self.sensor_id, LOW_TRESHOLD_SET_KEY, temperature) + return status + + def get_high_critical_threshold(self): + """ + Retrieves the high critical threshold temperature of thermal + Returns: + A float number, the high critical threshold temperature of thermal in Celsius + up to nearest thousandth of one degree Celsius, e.g. 30.125 + """ + high_critical_threshold = 0.0 + status, raw_up_thres_read = self._api_helper.ipmi_raw( + IPMI_SENSOR_NETFN, IPMI_SS_THRESHOLD_CMD.format(self.sensor_reading_addr)) + if status and len(raw_up_thres_read.split()) > 6: + ss_read = raw_up_thres_read.split()[6] + high_critical_threshold = float(int(ss_read, 16)) + return high_critical_threshold + + def get_low_critical_threshold(self): + """ + Retrieves the low critical threshold temperature of thermal + Returns: + A float number, the low critical threshold temperature of thermal in Celsius + up to nearest thousandth of one degree Celsius, e.g. 30.125 + """ + critical_low_threshold = 0.0 + status, raw_up_thres_read = self._api_helper.ipmi_raw( + IPMI_SENSOR_NETFN, IPMI_SS_THRESHOLD_CMD.format(self.sensor_reading_addr)) + if status and len(raw_up_thres_read.split()) > 6: + ss_read = raw_up_thres_read.split()[3] + critical_low_threshold = float(int(ss_read, 16)) + return critical_low_threshold + + def set_high_critical_threshold(self, temperature): + """ + Sets the critical high threshold temperature of thermal + Args : + temperature: A float number up to nearest thousandth of one degree Celsius, + e.g. 30.125 + Returns: + A boolean, True if threshold is set successfully, False if not + """ + status, ret_txt = self._api_helper.ipmi_set_ss_thres(self.sensor_id, HIGH_CRIT_TRESHOLD_SET_KEY, temperature) + return status + + def set_low_critical_threshold(self, temperature): + """ + Sets the critical low threshold temperature of thermal + Args : + temperature: A float number up to nearest thousandth of one degree Celsius, + e.g. 30.125 + Returns: + A boolean, True if threshold is set successfully, False if not + """ + status, ret_txt = self._api_helper.ipmi_set_ss_thres(self.sensor_id, LOW_CRIT_TRESHOLD_SET_KEY, temperature) + return status + + def get_name(self): + """ + Retrieves the name of the thermal device + Returns: + string: The name of the thermal device + """ + return self.THERMAL_LIST[self.index][0] + + def get_presence(self): + """ + Retrieves the presence of the device + Returns: + bool: True if device is present, False if not + """ + return True if self.get_temperature() > 0 else False + + def get_model(self): + """ + Retrieves the model number (or part number) of the device + Returns: + string: Model/part number of device + """ + return self.sensor_des + + def get_serial(self): + """ + Retrieves the serial number of the device + Returns: + string: Serial number of device + """ + return "Unknown" + + def get_status(self): + """ + Retrieves the operational status of the device + Returns: + A boolean value, True if device is operating properly, False if not + """ + return self.get_presence() + + def get_position_in_parent(self): + """ + Retrieves 1-based relative physical position in parent device. + Returns: + integer: The 1-based relative physical position in parent + device or -1 if cannot determine the position + """ + return (self.index + 1) + + def is_replaceable(self): + """ + Indicate whether this Thermal is replaceable. + Returns: + bool: True if it is replaceable. + """ + return False + + def get_minimum_recorded(self): + """ + Retrieves the minimum recorded temperature of thermal + Returns: + A float number, the minimum recorded temperature of thermal in Celsius + up to nearest thousandth of one degree Celsius, e.g. 30.125 + """ + tmp = self.get_temperature() + if tmp < self.minimum_thermal: + self.minimum_thermal = tmp + return self.minimum_thermal + + def get_maximum_recorded(self): + """ + Retrieves the maximum recorded temperature of thermal + Returns: + A float number, the maximum recorded temperature of thermal in Celsius + up to nearest thousandth of one degree Celsius, e.g. 30.125 + """ + tmp = self.get_temperature() + if tmp > self.maximum_thermal: + self.maximum_thermal = tmp + return self.maximum_thermal diff --git a/platform/innovium/sonic-platform-modules-supermicro/sse-t7132s/sonic_platform/watchdog.py b/platform/innovium/sonic-platform-modules-supermicro/sse-t7132s/sonic_platform/watchdog.py new file mode 100644 index 0000000000..35c55945de --- /dev/null +++ b/platform/innovium/sonic-platform-modules-supermicro/sse-t7132s/sonic_platform/watchdog.py @@ -0,0 +1,317 @@ +#!/usr/bin/env python + +############################################################################# +# +# Module contains an implementation of SONiC Platform Base API and +# provides the Watchdog information +# +############################################################################# + +import os + +try: + from sonic_platform_base.watchdog_base import WatchdogBase +except ImportError as e: + raise ImportError(str(e) + "- required module not found") + +""" ioctl constants """ +IO_WRITE = 0x40000000 +IO_READ = 0x80000000 +IO_READ_WRITE = 0xC0000000 +IO_SIZE_INT = 0x00040000 +IO_SIZE_40 = 0x00280000 +IO_TYPE_WATCHDOG = ord('W') << 8 + +WDR_INT = IO_READ | IO_SIZE_INT | IO_TYPE_WATCHDOG +WDR_40 = IO_READ | IO_SIZE_40 | IO_TYPE_WATCHDOG +WDWR_INT = IO_READ_WRITE | IO_SIZE_INT | IO_TYPE_WATCHDOG + +""" Watchdog ioctl commands """ +WDIOC_GETSUPPORT = 0 | WDR_40 +WDIOC_GETSTATUS = 1 | WDR_INT +WDIOC_GETBOOTSTATUS = 2 | WDR_INT +WDIOC_GETTEMP = 3 | WDR_INT +WDIOC_SETOPTIONS = 4 | WDR_INT +WDIOC_KEEPALIVE = 5 | WDR_INT +WDIOC_SETTIMEOUT = 6 | WDWR_INT +WDIOC_GETTIMEOUT = 7 | WDR_INT +WDIOC_SETPRETIMEOUT = 8 | WDWR_INT +WDIOC_GETPRETIMEOUT = 9 | WDR_INT +WDIOC_GETTIMELEFT = 10 | WDR_INT + +""" Watchdog status constants """ +WDIOS_DISABLECARD = 0x0001 +WDIOS_ENABLECARD = 0x0002 + +WDT_COMMON_ERROR = -1 +#WD_MAIN_IDENTITY = "iTCO_wdt" +WD_MAIN_IDENTITY = "t7132s_wdt" +WDT_SYSFS_PATH = "/sys/class/watchdog/" +DEV_STATE_PATH = "/sys/devices/platform/switchboard/CPLD1/dev_state" +WDT_MAX_PATH = "/sys/devices/platform/switchboard/CPLD1/wdt_max" +WDT_COUNT_PATH = "/sys/devices/platform/switchboard/CPLD1/wdt_count" + + +class Watchdog(WatchdogBase): + + def __init__(self): + self.watchdog = None + self.wdt_main_dev_name = None + self.armed = self.is_armed() + self.timeout = self._gettimeout() + + def _is_wd_main(self, dev): + """ + Checks watchdog identity + """ + identity = self._read_file( + "{}/{}/identity".format(WDT_SYSFS_PATH, dev)) + return identity == WD_MAIN_IDENTITY + + def _get_wdt(self): + """ + Retrieves watchdog device + """ + if self.watchdog is not None: + return + + wdt_main_dev_list = [dev for dev in os.listdir( + "/dev/") if dev.startswith("watchdog") and self._is_wd_main(dev)] + if not wdt_main_dev_list: + self.wdt_main_dev_name = None + return + self.wdt_main_dev_name = wdt_main_dev_list[0] + + watchdog_device_path = "/dev/{}".format(self.wdt_main_dev_name) + try: + self.watchdog = os.open(watchdog_device_path, os.O_RDWR) + except (FileNotFoundError, IOError, OSError): + self.watchdog = None + self.wdt_main_dev_name = None + except SystemExit: + pass + + return + + def _put_wdt(self): + """ + Release watchdog device + """ + if self.watchdog is not None: + os.close(self.watchdog) + self.watchdog = None + self.wdt_main_dev_name = None + + def _read_file(self, file_path): + """ + Read text file + """ + try: + with open(file_path, "r") as fd: + txt = fd.read() + except IOError: + return WDT_COMMON_ERROR + return txt.strip() + + def _enable(self): + """ + Turn on the watchdog timer + """ + try: + with open(DEV_STATE_PATH, "r+") as reg_file: + content = reg_file.readline().strip() + reg_value = int(content, 16) + bit_enable = 0x100 + reg_value_new = reg_value | bit_enable + reg_file.write(hex(reg_value_new)) + except IOError as e: + print("Error: unable to open file: %s" % str(e)) + + def _disable(self): + """ + Turn off the watchdog timer + """ + try: + with open(DEV_STATE_PATH, "r+") as reg_file: + content = reg_file.readline().strip() + reg_value = int(content, 16) + bit_enable = 0x100 + reg_value_new = reg_value & ~bit_enable + reg_file.write(hex(reg_value_new)) + except IOError as e: + print("Error: unable to open file: %s" % str(e)) + + def _keepalive(self): + """ + Keep alive watchdog timer + """ + self._disable() + self._enable() + + def _settimeout(self, seconds): + """ + Set watchdog timer timeout + @param seconds - timeout in seconds + @return is the actual set timeout + """ + if seconds > 65535: + seconds = 65535 + + try: + with open(WDT_MAX_PATH, "r+") as reg_file: + reg_value = seconds + reg_file.write(hex(reg_value)) + except IOError as e: + print("Error: unable to open file: %s" % str(e)) + + return seconds + + def _gettimeout(self): + """ + Get watchdog timeout + @return watchdog timeout + """ + seconds = 0 + try: + with open(WDT_MAX_PATH, "r+") as reg_file: + content = reg_file.readline().strip() + reg_value = int(content, 16) + seconds = reg_value + except IOError as e: + print("Error: unable to open file: %s" % str(e)) + + return seconds + + def _gettimeleft(self): + """ + Get time left before watchdog timer expires + @return time left in seconds + """ + try: + with open(WDT_MAX_PATH, "r+") as reg_file: + content = reg_file.readline().strip() + reg_value = int(content, 16) + state_seconds = reg_value + except IOError as e: + print("Error: unable to open file: %s" % str(e)) + + try: + with open(WDT_COUNT_PATH, "r+") as reg_file: + content = reg_file.readline().strip() + reg_value = int(content, 16) + count_seconds = reg_value + except IOError as e: + print("Error: unable to open file: %s" % str(e)) + + timeleft = state_seconds - count_seconds + if timeleft < 0: + timeleft = 0 + print("Error: incorrect counter: state={} count={}". + format(state_seconds, count_seconds)) + elif timeleft > 65535: + timeleft = 65535 + print("Error: incorrect counter: state={} count={}". + format(state_seconds, count_seconds)) + + return timeleft + + ################################################################# + + def arm(self, seconds): + """ + Arm the hardware watchdog with a timeout of seconds. + If the watchdog is currently armed, calling this function will + simply reset the timer to the provided value. If the underlying + hardware does not support the value provided in , this + method should arm the watchdog with the *next greater* available + value. + Returns: + An integer specifying the *actual* number of seconds the watchdog + was armed with. On failure returns -1. + """ + ret = WDT_COMMON_ERROR + if seconds < 0: + return ret + if seconds > 65535: + return ret + + try: + self._disable() + if self._gettimeout() != seconds: + self.timeout = self._settimeout(seconds) + self._enable() + self.armed = True + ret = self.timeout + except IOError as e: + pass + + return ret + + def disarm(self): + """ + Disarm the hardware watchdog + Returns: + A boolean, True if watchdog is disarmed successfully, False if not + """ + disarmed = False + + if self.is_armed(): + try: + self._disable() + self.armed = False + disarmed = True + except IOError: + pass + + return disarmed + + def is_armed(self): + """ + Retrieves the armed state of the hardware watchdog. + Returns: + A boolean, True if watchdog is armed, False if not + """ + """ + We always get the HW status because all new instance have + it's own self.armed. And only the instance had called arm() + has self.armed = True if self.armed is a class variable. + """ + # Read status + try: + with open(DEV_STATE_PATH) as reg_file: + content = reg_file.readline().rstrip() + reg_value = int(content, 16) + except IOError as e: + print("Error: unable to open file: %s" % str(e)) + return False + + bit_enable = 0x100 + if reg_value & bit_enable: + return True + + return False + + def get_remaining_time(self): + """ + If the watchdog is armed, retrieve the number of seconds remaining on + the watchdog timer + Returns: + An integer specifying the number of seconds remaining on thei + watchdog timer. If the watchdog is not armed, returns -1. + """ + timeleft = WDT_COMMON_ERROR + + if self.is_armed(): + try: + timeleft = self._gettimeleft() + except IOError: + pass + + return timeleft + + def __del__(self): + """ + Close watchdog + """ + if self.watchdog is not None: + os.close(self.watchdog) diff --git a/platform/innovium/sonic-platform-modules-supermicro/sse-t7132s/systemd/platform-modules-sse-t7132s.service b/platform/innovium/sonic-platform-modules-supermicro/sse-t7132s/systemd/platform-modules-sse-t7132s.service new file mode 100644 index 0000000000..71d2b0d98c --- /dev/null +++ b/platform/innovium/sonic-platform-modules-supermicro/sse-t7132s/systemd/platform-modules-sse-t7132s.service @@ -0,0 +1,14 @@ +[Unit] +Description=SuperMicro SSE-T7132S Platform modules +Before=pmon.service +DefaultDependencies=no + +[Service] +Type=oneshot +ExecStart=/usr/local/bin/platform.sh init +ExecStop=/usr/local/bin/platform.sh deinit +RemainAfterExit=yes + +[Install] +WantedBy=multi-user.target + diff --git a/platform/innovium/sonic-platform-modules-supermicro/sse-t7132s/systemd/sysled.service b/platform/innovium/sonic-platform-modules-supermicro/sse-t7132s/systemd/sysled.service new file mode 100644 index 0000000000..cde02505d4 --- /dev/null +++ b/platform/innovium/sonic-platform-modules-supermicro/sse-t7132s/systemd/sysled.service @@ -0,0 +1,15 @@ +[Unit] +Description=Set system LED before reboot/poweroff/halt +DefaultDependencies=no +#Conflicts=reboot.target +Before=poweroff.target halt.target reboot.target kexec.target shutdown.target +#Requires=poweroff.target + +[Service] +Type=oneshot +ExecStart=/usr/local/bin/sysledctl.py start +#ExecStop=/usr/local/bin/sysledctl.py stop +RemainAfterExit=yes + +[Install] +WantedBy=poweroff.target halt.target shutdown.target reboot.target kexec.target