[kvm]: support for all hwsku in kvm switch (#2495)

Signed-off-by: Guohan Lu <gulv@microsoft.com>
This commit is contained in:
lguohan 2019-01-30 02:04:20 -08:00 committed by GitHub
parent 52c533fe01
commit 2b01beb7d4
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12 changed files with 16 additions and 862 deletions

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{# Default values which will be used if no actual configura available #}
{% set default_cable = '300m' %}
{% set default_speed = '100G' %}
{% set default_ports_num = 32 -%}
{# Port configuration to cable length look-up table #}
{# Each record describes mapping of DUT (DUT port) role and neighbor role to cable length #}
{# Roles described in the minigraph #}
{% set ports2cable = {
'torrouter_server' : '5m',
'leafrouter_torrouter' : '40m',
'spinerouter_leafrouter' : '300m'
}
%}
{%- macro cable_length(port_name) -%}
{%- set cable_len = [] -%}
{%- for local_port in DEVICE_NEIGHBOR -%}
{%- if local_port == port_name -%}
{%- if DEVICE_NEIGHBOR_METADATA[DEVICE_NEIGHBOR[local_port].name] -%}
{%- set neighbor = DEVICE_NEIGHBOR_METADATA[DEVICE_NEIGHBOR[local_port].name] -%}
{%- set neighbor_role = neighbor.type -%}
{%- set roles1 = switch_role + '_' + neighbor_role %}
{%- set roles2 = neighbor_role + '_' + switch_role -%}
{%- set roles1 = roles1 | lower -%}
{%- set roles2 = roles2 | lower -%}
{%- if roles1 in ports2cable -%}
{%- if cable_len.append(ports2cable[roles1]) -%}{%- endif -%}
{%- elif roles2 in ports2cable -%}
{%- if cable_len.append(ports2cable[roles2]) -%}{%- endif -%}
{%- endif -%}
{%- endif -%}
{%- endif -%}
{%- endfor -%}
{%- if cable_len -%}
{{ cable_len.0 }}
{%- else -%}
{{ default_cable }}
{%- endif -%}
{% endmacro %}
{%- if DEVICE_METADATA is defined %}
{%- set switch_role = DEVICE_METADATA['localhost']['type'] %}
{%- endif -%}
{# Generate list of ports if not defined #}
{% if PORT is not defined %}
{% set PORT = [] %}
{% for port_idx in range(0,default_ports_num) %}
{% if PORT.append("Ethernet%d" % (port_idx*4)) %}{% endif %}
{% endfor %}
{% endif -%}
{% set port_names_list = [] %}
{% for port in PORT %}
{%- if port_names_list.append(port) %}{% endif %}
{% endfor %}
{% set port_names = port_names_list | join(',') -%}
{
"CABLE_LENGTH": {
"AZURE": {
{% for port in PORT %}
{% set cable = cable_length(port) -%}
"{{ port }}": "{{ cable }}"{%- if not loop.last -%},{% endif %}
{% endfor %}
}
},
"BUFFER_POOL": {
"ingress_lossless_pool": {
"size": "12766208",
"type": "ingress",
"mode": "dynamic"
},
"egress_lossless_pool": {
"size": "12766208",
"type": "egress",
"mode": "static"
},
"egress_lossy_pool": {
"size": "8072396",
"type": "egress",
"mode": "dynamic"
}
},
"BUFFER_PROFILE": {
"ingress_lossless_profile": {
"pool":"[BUFFER_POOL|ingress_lossless_pool]",
"xon":"18432",
"xoff":"40560",
"size":"41808",
"dynamic_th":"-4",
"xon_offset":"2496"
},
"ingress_lossy_profile": {
"pool":"[BUFFER_POOL|ingress_lossless_pool]",
"size":"0",
"dynamic_th":"3"
},
"egress_lossless_profile": {
"pool":"[BUFFER_POOL|egress_lossless_pool]",
"size":"0",
"static_th":"12766208"
},
"egress_lossy_profile": {
"pool":"[BUFFER_POOL|egress_lossy_pool]",
"size":"1518",
"dynamic_th":"3"
}
},
"BUFFER_PG": {
"{{ port_names }}|3-4": {
"profile" : "[BUFFER_PROFILE|ingress_lossless_profile]"
},
"{{ port_names }}|0-1": {
"profile" : "[BUFFER_PROFILE|ingress_lossy_profile]"
}
},
"BUFFER_QUEUE": {
"{{ port_names }}|3-4": {
"profile" : "[BUFFER_PROFILE|egress_lossless_profile]"
},
"{{ port_names }}|0-1": {
"profile" : "[BUFFER_PROFILE|egress_lossy_profile]"
}
}
}

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; comment
# comment
eth1:29,30,31,32
eth2:25,26,27,28
eth3:37,38,39,40
eth4:33,34,35,36
eth5:41,42,43,44
eth6:45,46,47,48
eth7:5,6,7,8
eth8:1,2,3,4
eth9:9,10,11,12
eth10:13,14,15,16
eth11:21,22,23,24
eth12:17,18,19,20
eth13:49,50,51,52
eth14:53,54,55,56
eth15:61,62,63,64
eth16:57,58,59,60
eth17:65,66,67,68
eth18:69,70,71,72
eth19:77,78,79,80
eth20:73,74,75,76
eth21:105,106,107,108
eth22:109,110,111,112
eth23:117,118,119,120
eth24:113,114,115,116
eth25:121,122,123,124
eth26:125,126,127,128
eth27:85,86,87,88
eth28:81,82,83,84
eth29:89,90,91,92
eth30:93,94,95,96
eth31:97,98,99,100
eth32:101,102,103,104

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# PG lossless profiles.
# speed cable size xon xoff threshold xon_offset
10000 5m 1248 2288 35776 -4 2288
25000 5m 1248 2288 53248 -4 2288
40000 5m 1248 2288 66560 -4 2288
50000 5m 1248 2288 90272 -4 2288
100000 5m 1248 2288 165568 -4 2288
10000 40m 1248 2288 37024 -4 2288
25000 40m 1248 2288 53248 -4 2288
40000 40m 1248 2288 71552 -4 2288
50000 40m 1248 2288 96096 -4 2288
100000 40m 1248 2288 177632 -4 2288
10000 300m 1248 2288 46176 -4 2288
25000 300m 1248 2288 79040 -4 2288
40000 300m 1248 2288 108160 -4 2288
50000 300m 1248 2288 141856 -4 2288
100000 300m 1248 2288 268736 -4 2288

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# name lanes alias
Ethernet0 29,30,31,32 fortyGigE0/0
Ethernet4 25,26,27,28 fortyGigE0/4
Ethernet8 37,38,39,40 fortyGigE0/8
Ethernet12 33,34,35,36 fortyGigE0/12
Ethernet16 41,42,43,44 fortyGigE0/16
Ethernet20 45,46,47,48 fortyGigE0/20
Ethernet24 5,6,7,8 fortyGigE0/24
Ethernet28 1,2,3,4 fortyGigE0/28
Ethernet32 9,10,11,12 fortyGigE0/32
Ethernet36 13,14,15,16 fortyGigE0/36
Ethernet40 21,22,23,24 fortyGigE0/40
Ethernet44 17,18,19,20 fortyGigE0/44
Ethernet48 49,50,51,52 fortyGigE0/48
Ethernet52 53,54,55,56 fortyGigE0/52
Ethernet56 61,62,63,64 fortyGigE0/56
Ethernet60 57,58,59,60 fortyGigE0/60
Ethernet64 65,66,67,68 fortyGigE0/64
Ethernet68 69,70,71,72 fortyGigE0/68
Ethernet72 77,78,79,80 fortyGigE0/72
Ethernet76 73,74,75,76 fortyGigE0/76
Ethernet80 105,106,107,108 fortyGigE0/80
Ethernet84 109,110,111,112 fortyGigE0/84
Ethernet88 117,118,119,120 fortyGigE0/88
Ethernet92 113,114,115,116 fortyGigE0/92
Ethernet96 121,122,123,124 fortyGigE0/96
Ethernet100 125,126,127,128 fortyGigE0/100
Ethernet104 85,86,87,88 fortyGigE0/104
Ethernet108 81,82,83,84 fortyGigE0/108
Ethernet112 89,90,91,92 fortyGigE0/112
Ethernet116 93,94,95,96 fortyGigE0/116
Ethernet120 97,98,99,100 fortyGigE0/120
Ethernet124 101,102,103,104 fortyGigE0/124

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{%- include 'qos_config.j2' %}

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# Old LPM only configuration
# l2_mem_entries=163840
# l3_mem_entries=90112
# l3_alpm_enable=0
# ipv6_lpm_128b_enable=0
#
# ALPM enable
l3_alpm_enable=2
ipv6_lpm_128b_enable=1
l2_mem_entries=32768
l3_mem_entries=16384
# From old config file
os=unix
higig2_hdr_mode=1
# Parity
parity_correction=1
parity_enable=1
stat_if_parity_enable=0
#
bcm_num_cos=8
bcm_stat_interval=2000000
l2xmsg_hostbuf_size=8192
l2xmsg_mode=1
lls_num_l2uc=12
max_vp_lags=0
miim_intr_enable=0
mmu_lossless=0
module_64ports=0
schan_intr_enable=0
stable_size=0x2000000
tdma_timeout_usec=5000000
pbmp_oversubscribe=0x000007fffffffffffffffffffffffffe
pbmp_xport_xe=0x000007fffffffffffffffffffffffffe
# Ports configuration
# xe0 (40G)
portmap_1=29:40
xgxs_rx_lane_map_1=0x213
xgxs_tx_lane_map_1=0x213
phy_xaui_rx_polarity_flip_1=0xc
phy_xaui_tx_polarity_flip_1=0x9
serdes_driver_current_lane0_xe0=0x6
serdes_driver_current_lane1_xe0=0x7
serdes_driver_current_lane2_xe0=0x6
serdes_driver_current_lane3_xe0=0x6
serdes_pre_driver_current_lane0_xe0=0x6
serdes_pre_driver_current_lane1_xe0=0x7
serdes_pre_driver_current_lane2_xe0=0x6
serdes_pre_driver_current_lane3_xe0=0x6
serdes_preemphasis_lane0_xe0=0xc2f0
serdes_preemphasis_lane1_xe0=0xd2b0
serdes_preemphasis_lane2_xe0=0xc6e0
serdes_preemphasis_lane3_xe0=0xc2f0
# xe1 (40G)
portmap_2=25:40
xgxs_rx_lane_map_2=0x213
xgxs_tx_lane_map_2=0x2031
phy_xaui_rx_polarity_flip_2=0xe
phy_xaui_tx_polarity_flip_2=0x2
serdes_driver_current_lane0_xe1=0x5
serdes_driver_current_lane1_xe1=0x5
serdes_driver_current_lane2_xe1=0x5
serdes_driver_current_lane3_xe1=0x5
serdes_pre_driver_current_lane0_xe1=0x5
serdes_pre_driver_current_lane1_xe1=0x5
serdes_pre_driver_current_lane2_xe1=0x5
serdes_pre_driver_current_lane3_xe1=0x5
serdes_preemphasis_lane0_xe1=0xcad0
serdes_preemphasis_lane1_xe1=0xc6e0
serdes_preemphasis_lane2_xe1=0xc6e0
serdes_preemphasis_lane3_xe1=0xd2b0
# xe2 (40G)
portmap_3=37:40
xgxs_rx_lane_map_3=0x213
xgxs_tx_lane_map_3=0x1203
phy_xaui_rx_polarity_flip_3=0x3
phy_xaui_tx_polarity_flip_3=0xe
serdes_driver_current_lane0_xe2=0x4
serdes_driver_current_lane1_xe2=0x4
serdes_driver_current_lane2_xe2=0x4
serdes_driver_current_lane3_xe2=0x4
serdes_pre_driver_current_lane0_xe2=0x4
serdes_pre_driver_current_lane1_xe2=0x4
serdes_pre_driver_current_lane2_xe2=0x4
serdes_pre_driver_current_lane3_xe2=0x4
serdes_preemphasis_lane0_xe2=0xcad0
serdes_preemphasis_lane1_xe2=0xcad0
serdes_preemphasis_lane2_xe2=0xc2f0
serdes_preemphasis_lane3_xe2=0xc2f0
# xe3 (40G)
portmap_4=33:40
xgxs_rx_lane_map_4=0x213
xgxs_tx_lane_map_4=0x132
phy_xaui_rx_polarity_flip_4=0xe
phy_xaui_tx_polarity_flip_4=0x2
serdes_driver_current_lane0_xe3=0x4
serdes_driver_current_lane1_xe3=0x4
serdes_driver_current_lane2_xe3=0x4
serdes_driver_current_lane3_xe3=0x4
serdes_pre_driver_current_lane0_xe3=0x4
serdes_pre_driver_current_lane1_xe3=0x4
serdes_pre_driver_current_lane2_xe3=0x4
serdes_pre_driver_current_lane3_xe3=0x4
serdes_preemphasis_lane0_xe3=0xc6e0
serdes_preemphasis_lane1_xe3=0xc6e0
serdes_preemphasis_lane2_xe3=0xc6e0
serdes_preemphasis_lane3_xe3=0xc6e0
# xe4 (40G)
portmap_5=41:40
xgxs_rx_lane_map_5=0x213
xgxs_tx_lane_map_5=0x3021
phy_xaui_rx_polarity_flip_5=0x3
phy_xaui_tx_polarity_flip_5=0xb
serdes_driver_current_lane0_xe4=0x4
serdes_driver_current_lane1_xe4=0x4
serdes_driver_current_lane2_xe4=0x4
serdes_driver_current_lane3_xe4=0x4
serdes_pre_driver_current_lane0_xe4=0x4
serdes_pre_driver_current_lane1_xe4=0x4
serdes_pre_driver_current_lane2_xe4=0x4
serdes_pre_driver_current_lane3_xe4=0x4
serdes_preemphasis_lane0_xe4=0xc6e0
serdes_preemphasis_lane1_xe4=0xc2f0
serdes_preemphasis_lane2_xe4=0xc2f0
serdes_preemphasis_lane3_xe4=0xcad0
# xe5 (40G)
portmap_6=45:40
xgxs_rx_lane_map_6=0x213
xgxs_tx_lane_map_6=0x213
phy_xaui_rx_polarity_flip_6=0xe
phy_xaui_tx_polarity_flip_6=0x8
serdes_driver_current_lane0_xe5=0x4
serdes_driver_current_lane1_xe5=0x4
serdes_driver_current_lane2_xe5=0x4
serdes_driver_current_lane3_xe5=0x4
serdes_pre_driver_current_lane0_xe5=0x4
serdes_pre_driver_current_lane1_xe5=0x4
serdes_pre_driver_current_lane2_xe5=0x4
serdes_pre_driver_current_lane3_xe5=0x4
serdes_preemphasis_lane0_xe5=0xc2f0
serdes_preemphasis_lane1_xe5=0xc2f0
serdes_preemphasis_lane2_xe5=0xc2f0
serdes_preemphasis_lane3_xe5=0xc2f0
# xe6 (40G)
portmap_7=5:40
xgxs_rx_lane_map_7=0x213
xgxs_tx_lane_map_7=0x1203
phy_xaui_rx_polarity_flip_7=0xc
phy_xaui_tx_polarity_flip_7=0x1
serdes_driver_current_lane0_xe6=0x4
serdes_driver_current_lane1_xe6=0x4
serdes_driver_current_lane2_xe6=0x4
serdes_driver_current_lane3_xe6=0x4
serdes_pre_driver_current_lane0_xe6=0x4
serdes_pre_driver_current_lane1_xe6=0x4
serdes_pre_driver_current_lane2_xe6=0x4
serdes_pre_driver_current_lane3_xe6=0x4
serdes_preemphasis_lane0_xe6=0xc6e0
serdes_preemphasis_lane1_xe6=0xc6e0
serdes_preemphasis_lane2_xe6=0xc6e0
serdes_preemphasis_lane3_xe6=0xc6e0
# xe7 (40G)
portmap_8=1:40
xgxs_rx_lane_map_8=0x213
xgxs_tx_lane_map_8=0x2031
phy_xaui_rx_polarity_flip_8=0xe
phy_xaui_tx_polarity_flip_8=0xd
serdes_driver_current_lane0_xe7=0x5
serdes_driver_current_lane1_xe7=0x5
serdes_driver_current_lane2_xe7=0x5
serdes_driver_current_lane3_xe7=0x5
serdes_pre_driver_current_lane0_xe7=0x5
serdes_pre_driver_current_lane1_xe7=0x5
serdes_pre_driver_current_lane2_xe7=0x5
serdes_pre_driver_current_lane3_xe7=0x5
serdes_preemphasis_lane0_xe7=0xc6e0
serdes_preemphasis_lane1_xe7=0xcad0
serdes_preemphasis_lane2_xe7=0xc6e0
serdes_preemphasis_lane3_xe7=0xcad0
# xe9 (40G)
portmap_9=9:40
xgxs_rx_lane_map_9=0x3120
xgxs_tx_lane_map_9=0x3021
phy_xaui_rx_polarity_flip_9=0x0
phy_xaui_tx_polarity_flip_9=0x4
serdes_driver_current_lane0_xe8=0x3
serdes_driver_current_lane1_xe8=0x3
serdes_driver_current_lane2_xe8=0x3
serdes_driver_current_lane3_xe8=0x3
serdes_pre_driver_current_lane0_xe8=0x3
serdes_pre_driver_current_lane1_xe8=0x3
serdes_pre_driver_current_lane2_xe8=0x3
serdes_pre_driver_current_lane3_xe8=0x3
serdes_preemphasis_lane0_xe8=0xc2f0
serdes_preemphasis_lane1_xe8=0xc6e0
serdes_preemphasis_lane2_xe8=0xbf00
serdes_preemphasis_lane3_xe8=0xc2f0
# xe9 (40G)
portmap_10=13:40
xgxs_rx_lane_map_10=0x213
xgxs_tx_lane_map_10=0x132
phy_xaui_rx_polarity_flip_10=0xe
phy_xaui_tx_polarity_flip_10=0x0
serdes_driver_current_lane0_xe9=0x2
serdes_driver_current_lane1_xe9=0x3
serdes_driver_current_lane2_xe9=0x2
serdes_driver_current_lane3_xe9=0x2
serdes_pre_driver_current_lane0_xe9=0x2
serdes_pre_driver_current_lane1_xe9=0x3
serdes_pre_driver_current_lane2_xe9=0x2
serdes_pre_driver_current_lane3_xe9=0x2
serdes_preemphasis_lane0_xe9=0xb270
serdes_preemphasis_lane1_xe9=0xbb10
serdes_preemphasis_lane2_xe9=0xb720
serdes_preemphasis_lane3_xe9=0xb720
# xe10 (40G)
portmap_11=21:40
xgxs_rx_lane_map_11=0x123
xgxs_tx_lane_map_11=0x1203
phy_xaui_rx_polarity_flip_11=0xc
phy_xaui_tx_polarity_flip_11=0xe
serdes_driver_current_lane0_xe10=0x2
serdes_driver_current_lane1_xe10=0x2
serdes_driver_current_lane2_xe10=0x2
serdes_driver_current_lane3_xe10=0x2
serdes_pre_driver_current_lane0_xe10=0x2
serdes_pre_driver_current_lane1_xe10=0x2
serdes_pre_driver_current_lane2_xe10=0x2
serdes_pre_driver_current_lane3_xe10=0x2
serdes_preemphasis_lane0_xe10=0xb330
serdes_preemphasis_lane1_xe10=0xb330
serdes_preemphasis_lane2_xe10=0xb330
serdes_preemphasis_lane3_xe10=0xb330
# xe11 (40G)
portmap_12=17:40
xgxs_rx_lane_map_12=0x213
xgxs_tx_lane_map_12=0x132
phy_xaui_rx_polarity_flip_12=0xe
phy_xaui_tx_polarity_flip_12=0x0
serdes_driver_current_lane0_xe11=0x2
serdes_driver_current_lane1_xe11=0x2
serdes_driver_current_lane2_xe11=0x2
serdes_driver_current_lane3_xe11=0x2
serdes_pre_driver_current_lane0_xe11=0x2
serdes_pre_driver_current_lane1_xe11=0x2
serdes_pre_driver_current_lane2_xe11=0x2
serdes_pre_driver_current_lane3_xe11=0x2
serdes_preemphasis_lane0_xe11=0xb330
serdes_preemphasis_lane1_xe11=0xbb10
serdes_preemphasis_lane2_xe11=0xbb10
serdes_preemphasis_lane3_xe11=0xbb10
# xe12 (40G)
portmap_13=49:40
xgxs_rx_lane_map_13=0x1302
xgxs_tx_lane_map_13=0x2031
phy_xaui_rx_polarity_flip_13=0xb
phy_xaui_tx_polarity_flip_13=0x3
serdes_driver_current_lane0_xe12=0x2
serdes_driver_current_lane1_xe12=0x2
serdes_driver_current_lane2_xe12=0x2
serdes_driver_current_lane3_xe12=0x2
serdes_pre_driver_current_lane0_xe12=0x2
serdes_pre_driver_current_lane1_xe12=0x2
serdes_pre_driver_current_lane2_xe12=0x2
serdes_pre_driver_current_lane3_xe12=0x2
serdes_preemphasis_lane0_xe12=0xa760
serdes_preemphasis_lane1_xe12=0xa760
serdes_preemphasis_lane2_xe12=0xa760
serdes_preemphasis_lane3_xe12=0xa760
# xe13 (40G)
portmap_14=53:40
xgxs_rx_lane_map_14=0x213
xgxs_tx_lane_map_14=0x231
phy_xaui_rx_polarity_flip_14=0x1
phy_xaui_tx_polarity_flip_14=0x0
serdes_driver_current_lane0_xe13=0x2
serdes_driver_current_lane1_xe13=0x2
serdes_driver_current_lane2_xe13=0x2
serdes_driver_current_lane3_xe13=0x2
serdes_pre_driver_current_lane0_xe13=0x2
serdes_pre_driver_current_lane1_xe13=0x2
serdes_pre_driver_current_lane2_xe13=0x2
serdes_pre_driver_current_lane3_xe13=0x2
serdes_preemphasis_lane0_xe13=0xaf40
serdes_preemphasis_lane1_xe13=0xaf40
serdes_preemphasis_lane2_xe13=0xaf40
serdes_preemphasis_lane3_xe13=0xaf40
# xe14 (40G)
portmap_15=61:40
xgxs_rx_lane_map_15=0x132
xgxs_tx_lane_map_15=0x213
phy_xaui_rx_polarity_flip_15=0x0
phy_xaui_tx_polarity_flip_15=0x0
serdes_driver_current_lane0_xe14=0x2
serdes_driver_current_lane1_xe14=0x2
serdes_driver_current_lane2_xe14=0x2
serdes_driver_current_lane3_xe14=0x2
serdes_pre_driver_current_lane0_xe14=0x2
serdes_pre_driver_current_lane1_xe14=0x2
serdes_pre_driver_current_lane2_xe14=0x2
serdes_pre_driver_current_lane3_xe14=0x2
serdes_preemphasis_lane0_xe14=0xa760
serdes_preemphasis_lane1_xe14=0xa760
serdes_preemphasis_lane2_xe14=0xa760
serdes_preemphasis_lane3_xe14=0xa760
# xe15 (40G)
portmap_16=57:40
xgxs_rx_lane_map_16=0x213
xgxs_tx_lane_map_16=0x2031
phy_xaui_rx_polarity_flip_16=0x1
phy_xaui_tx_polarity_flip_16=0x0
serdes_driver_current_lane0_xe15=0x1
serdes_driver_current_lane1_xe15=0x1
serdes_driver_current_lane2_xe15=0x1
serdes_driver_current_lane3_xe15=0x1
serdes_pre_driver_current_lane0_xe15=0x1
serdes_pre_driver_current_lane1_xe15=0x1
serdes_pre_driver_current_lane2_xe15=0x1
serdes_pre_driver_current_lane3_xe15=0x1
serdes_preemphasis_lane0_xe15=0xa760
serdes_preemphasis_lane1_xe15=0xa760
serdes_preemphasis_lane2_xe15=0xa760
serdes_preemphasis_lane3_xe15=0xa760
# xe16 (40G)
portmap_17=65:40
xgxs_rx_lane_map_17=0x132
xgxs_tx_lane_map_17=0x2031
phy_xaui_rx_polarity_flip_17=0x3
phy_xaui_tx_polarity_flip_17=0x9
serdes_driver_current_lane0_xe16=0x1
serdes_driver_current_lane1_xe16=0x1
serdes_driver_current_lane2_xe16=0x1
serdes_driver_current_lane3_xe16=0x1
serdes_pre_driver_current_lane0_xe16=0x1
serdes_pre_driver_current_lane1_xe16=0x1
serdes_pre_driver_current_lane2_xe16=0x1
serdes_pre_driver_current_lane3_xe16=0x1
serdes_preemphasis_lane0_xe16=0xa370
serdes_preemphasis_lane1_xe16=0xa370
serdes_preemphasis_lane2_xe16=0xa370
serdes_preemphasis_lane3_xe16=0xa370
# xe17 (40G)
portmap_18=69:40
xgxs_rx_lane_map_18=0x213
xgxs_tx_lane_map_18=0x2130
phy_xaui_rx_polarity_flip_18=0x1
phy_xaui_tx_polarity_flip_18=0xf
serdes_driver_current_lane0_xe17=0x1
serdes_driver_current_lane1_xe17=0x1
serdes_driver_current_lane2_xe17=0x1
serdes_driver_current_lane3_xe17=0x1
serdes_pre_driver_current_lane0_xe17=0x1
serdes_pre_driver_current_lane1_xe17=0x1
serdes_pre_driver_current_lane2_xe17=0x1
serdes_pre_driver_current_lane3_xe17=0x1
serdes_preemphasis_lane0_xe17=0xa760
serdes_preemphasis_lane1_xe17=0xa760
serdes_preemphasis_lane2_xe17=0xa760
serdes_preemphasis_lane3_xe17=0xa760
# xe19 (40G)
portmap_19=77:40
xgxs_rx_lane_map_19=0x123
xgxs_tx_lane_map_19=0x1203
phy_xaui_rx_polarity_flip_19=0x3
phy_xaui_tx_polarity_flip_19=0xe
serdes_driver_current_lane0_xe18=0x2
serdes_driver_current_lane1_xe18=0x2
serdes_driver_current_lane2_xe18=0x2
serdes_driver_current_lane3_xe18=0x2
serdes_pre_driver_current_lane0_xe18=0x2
serdes_pre_driver_current_lane1_xe18=0x2
serdes_pre_driver_current_lane2_xe18=0x2
serdes_pre_driver_current_lane3_xe18=0x2
serdes_preemphasis_lane0_xe18=0xaf40
serdes_preemphasis_lane1_xe18=0xaf40
serdes_preemphasis_lane2_xe18=0xaf40
serdes_preemphasis_lane3_xe18=0xaf40
# xe19 (40G)
portmap_20=73:40
xgxs_rx_lane_map_20=0x213
xgxs_tx_lane_map_20=0x2031
phy_xaui_rx_polarity_flip_20=0x1
phy_xaui_tx_polarity_flip_20=0x0
serdes_driver_current_lane0_xe19=0x2
serdes_driver_current_lane1_xe19=0x2
serdes_driver_current_lane2_xe19=0x2
serdes_driver_current_lane3_xe19=0x2
serdes_pre_driver_current_lane0_xe19=0x2
serdes_pre_driver_current_lane1_xe19=0x2
serdes_pre_driver_current_lane2_xe19=0x2
serdes_pre_driver_current_lane3_xe19=0x2
serdes_preemphasis_lane0_xe19=0xa760
serdes_preemphasis_lane1_xe19=0xa760
serdes_preemphasis_lane2_xe19=0xa760
serdes_preemphasis_lane3_xe19=0xa760
# xe20 (40G)
portmap_21=105:40
xgxs_rx_lane_map_21=0x1320
xgxs_tx_lane_map_21=0x3021
phy_xaui_rx_polarity_flip_21=0xd
phy_xaui_tx_polarity_flip_21=0xb
serdes_driver_current_lane0_xe20=0x1
serdes_driver_current_lane1_xe20=0x1
serdes_driver_current_lane2_xe20=0x1
serdes_driver_current_lane3_xe20=0x1
serdes_pre_driver_current_lane0_xe20=0x1
serdes_pre_driver_current_lane1_xe20=0x1
serdes_pre_driver_current_lane2_xe20=0x1
serdes_pre_driver_current_lane3_xe20=0x1
serdes_preemphasis_lane0_xe20=0xb330
serdes_preemphasis_lane1_xe20=0xb330
serdes_preemphasis_lane2_xe20=0xb330
serdes_preemphasis_lane3_xe20=0xb330
# xe21 (40G)
portmap_22=109:40
xgxs_rx_lane_map_22=0x132
xgxs_tx_lane_map_22=0x132
phy_xaui_rx_polarity_flip_22=0x8
phy_xaui_tx_polarity_flip_22=0x0
serdes_driver_current_lane0_xe21=0x1
serdes_driver_current_lane1_xe21=0x1
serdes_driver_current_lane2_xe21=0x1
serdes_driver_current_lane3_xe21=0x2
serdes_pre_driver_current_lane0_xe21=0x1
serdes_pre_driver_current_lane1_xe21=0x1
serdes_pre_driver_current_lane2_xe21=0x1
serdes_pre_driver_current_lane3_xe21=0x2
serdes_preemphasis_lane0_xe21=0xb330
serdes_preemphasis_lane1_xe21=0xb330
serdes_preemphasis_lane2_xe21=0xb330
serdes_preemphasis_lane3_xe21=0xbff0
# xe22 (40G)
portmap_23=117:40
xgxs_rx_lane_map_23=0x231
xgxs_tx_lane_map_23=0x1203
phy_xaui_rx_polarity_flip_23=0x3
phy_xaui_tx_polarity_flip_23=0xe
serdes_driver_current_lane0_xe22=0x3
serdes_driver_current_lane1_xe22=0x5
serdes_driver_current_lane2_xe22=0x3
serdes_driver_current_lane3_xe22=0x3
serdes_pre_driver_current_lane0_xe22=0x3
serdes_pre_driver_current_lane1_xe22=0x5
serdes_pre_driver_current_lane2_xe22=0x3
serdes_pre_driver_current_lane3_xe22=0x3
serdes_preemphasis_lane0_xe22=0xc6e0
serdes_preemphasis_lane1_xe22=0xc6e0
serdes_preemphasis_lane2_xe22=0xc6e0
serdes_preemphasis_lane3_xe22=0xc6e0
# xe23 (40G)
portmap_24=113:40
xgxs_rx_lane_map_24=0x132
xgxs_tx_lane_map_24=0x132
phy_xaui_rx_polarity_flip_24=0x8
phy_xaui_tx_polarity_flip_24=0x0
serdes_driver_current_lane0_xe23=0x1
serdes_driver_current_lane1_xe23=0x1
serdes_driver_current_lane2_xe23=0x1
serdes_driver_current_lane3_xe23=0x1
serdes_pre_driver_current_lane0_xe23=0x1
serdes_pre_driver_current_lane1_xe23=0x1
serdes_pre_driver_current_lane2_xe23=0x1
serdes_pre_driver_current_lane3_xe23=0x1
serdes_preemphasis_lane0_xe23=0xbb10
serdes_preemphasis_lane1_xe23=0xbb10
serdes_preemphasis_lane2_xe23=0xbb10
serdes_preemphasis_lane3_xe23=0xc2f0
# xe24 (40G)
portmap_25=121:40
xgxs_rx_lane_map_25=0x1320
xgxs_tx_lane_map_25=0x3021
phy_xaui_rx_polarity_flip_25=0xd
phy_xaui_tx_polarity_flip_25=0xb
serdes_driver_current_lane0_xe24=0x4
serdes_driver_current_lane1_xe24=0x4
serdes_driver_current_lane2_xe24=0x4
serdes_driver_current_lane3_xe24=0x4
serdes_pre_driver_current_lane0_xe24=0x4
serdes_pre_driver_current_lane1_xe24=0x4
serdes_pre_driver_current_lane2_xe24=0x4
serdes_pre_driver_current_lane3_xe24=0x4
serdes_preemphasis_lane0_xe24=0xc6e0
serdes_preemphasis_lane1_xe24=0xc6e0
serdes_preemphasis_lane2_xe24=0xc6e0
serdes_preemphasis_lane3_xe24=0xc6e0
# xe25 (40G)
portmap_26=125:40
xgxs_rx_lane_map_26=0x132
xgxs_tx_lane_map_26=0x132
phy_xaui_rx_polarity_flip_26=0x8
phy_xaui_tx_polarity_flip_26=0x0
serdes_driver_current_lane0_xe25=0x4
serdes_driver_current_lane1_xe25=0x4
serdes_driver_current_lane2_xe25=0x4
serdes_driver_current_lane3_xe25=0x4
serdes_pre_driver_current_lane0_xe25=0x4
serdes_pre_driver_current_lane1_xe25=0x4
serdes_pre_driver_current_lane2_xe25=0x4
serdes_pre_driver_current_lane3_xe25=0x4
serdes_preemphasis_lane0_xe25=0xc6e0
serdes_preemphasis_lane1_xe25=0xc6e0
serdes_preemphasis_lane2_xe25=0xc6e0
serdes_preemphasis_lane3_xe25=0xcec0
# xe26 (40G)
portmap_27=85:40
xgxs_rx_lane_map_27=0x213
xgxs_tx_lane_map_27=0x1203
phy_xaui_rx_polarity_flip_27=0xc
phy_xaui_tx_polarity_flip_27=0xe
serdes_driver_current_lane0_xe26=0x4
serdes_driver_current_lane1_xe26=0x5
serdes_driver_current_lane2_xe26=0x4
serdes_driver_current_lane3_xe26=0x5
serdes_pre_driver_current_lane0_xe26=0x4
serdes_pre_driver_current_lane1_xe26=0x5
serdes_pre_driver_current_lane2_xe26=0x4
serdes_pre_driver_current_lane3_xe26=0x5
serdes_preemphasis_lane0_xe26=0xc2f0
serdes_preemphasis_lane1_xe26=0xc6e0
serdes_preemphasis_lane2_xe26=0xc6e0
serdes_preemphasis_lane3_xe26=0xc6e0
# xe27 (40G)
portmap_28=81:40
xgxs_rx_lane_map_28=0x1320
xgxs_tx_lane_map_28=0x2031
phy_xaui_rx_polarity_flip_28=0x1
phy_xaui_tx_polarity_flip_28=0x2
serdes_driver_current_lane0_xe27=0x2
serdes_driver_current_lane1_xe27=0x2
serdes_driver_current_lane2_xe27=0x2
serdes_driver_current_lane3_xe27=0x2
serdes_pre_driver_current_lane0_xe27=0x2
serdes_pre_driver_current_lane1_xe27=0x2
serdes_pre_driver_current_lane2_xe27=0x2
serdes_pre_driver_current_lane3_xe27=0x2
serdes_preemphasis_lane0_xe27=0xbb10
serdes_preemphasis_lane1_xe27=0xbb10
serdes_preemphasis_lane2_xe27=0xbf00
serdes_preemphasis_lane3_xe27=0xbb10
# xe29 (40G)
portmap_29=89:40
xgxs_rx_lane_map_29=0x1320
xgxs_tx_lane_map_29=0x3021
phy_xaui_rx_polarity_flip_29=0x2
phy_xaui_tx_polarity_flip_29=0xb
serdes_driver_current_lane0_xe28=0x4
serdes_driver_current_lane1_xe28=0x4
serdes_driver_current_lane2_xe28=0x4
serdes_driver_current_lane3_xe28=0x4
serdes_pre_driver_current_lane0_xe28=0x4
serdes_pre_driver_current_lane1_xe28=0x4
serdes_pre_driver_current_lane2_xe28=0x4
serdes_pre_driver_current_lane3_xe28=0x4
serdes_preemphasis_lane0_xe28=0xcad0
serdes_preemphasis_lane1_xe28=0xc6e0
serdes_preemphasis_lane2_xe28=0xc6e0
serdes_preemphasis_lane3_xe28=0xc6e0
# xe29 (40G)
portmap_30=93:40
xgxs_rx_lane_map_30=0x1320
xgxs_tx_lane_map_30=0x2031
phy_xaui_rx_polarity_flip_30=0x1
phy_xaui_tx_polarity_flip_30=0x2
serdes_driver_current_lane0_xe29=0x4
serdes_driver_current_lane1_xe29=0x4
serdes_driver_current_lane2_xe29=0x4
serdes_driver_current_lane3_xe29=0x4
serdes_pre_driver_current_lane0_xe29=0x4
serdes_pre_driver_current_lane1_xe29=0x4
serdes_pre_driver_current_lane2_xe29=0x4
serdes_pre_driver_current_lane3_xe29=0x4
serdes_preemphasis_lane0_xe29=0xc2f0
serdes_preemphasis_lane1_xe29=0xc2f0
serdes_preemphasis_lane2_xe29=0xc2f0
serdes_preemphasis_lane3_xe29=0xc2f0
# xe30 (40G)
portmap_31=97:40
xgxs_rx_lane_map_31=0x213
xgxs_tx_lane_map_31=0x2031
phy_xaui_rx_polarity_flip_31=0xc
phy_xaui_tx_polarity_flip_31=0x3
serdes_driver_current_lane0_xe30=0x5
serdes_driver_current_lane1_xe30=0x5
serdes_driver_current_lane2_xe30=0x5
serdes_driver_current_lane3_xe30=0x5
serdes_pre_driver_current_lane0_xe30=0x5
serdes_pre_driver_current_lane1_xe30=0x5
serdes_pre_driver_current_lane2_xe30=0x5
serdes_pre_driver_current_lane3_xe30=0x5
serdes_preemphasis_lane0_xe30=0xcad0
serdes_preemphasis_lane1_xe30=0xcad0
serdes_preemphasis_lane2_xe30=0xcad0
serdes_preemphasis_lane3_xe30=0xcad0
# xe31 (40G)
portmap_32=101:40
xgxs_rx_lane_map_32=0x1320
xgxs_tx_lane_map_32=0x1203
phy_xaui_rx_polarity_flip_32=0x1
phy_xaui_tx_polarity_flip_32=0x6
serdes_driver_current_lane0_xe31=0x6
serdes_driver_current_lane1_xe31=0x6
serdes_driver_current_lane2_xe31=0x6
serdes_driver_current_lane3_xe31=0x7
serdes_pre_driver_current_lane0_xe31=0x6
serdes_pre_driver_current_lane1_xe31=0x6
serdes_pre_driver_current_lane2_xe31=0x6
serdes_pre_driver_current_lane3_xe31=0x7
serdes_preemphasis_lane0_xe31=0xcec0
serdes_preemphasis_lane1_xe31=0xcec0
serdes_preemphasis_lane2_xe31=0xcad0
serdes_preemphasis_lane3_xe31=0xc6e0

View File

@ -31,6 +31,7 @@ endif
$(DOCKER_SONIC_VS)_FILES += $(CONFIGDB_LOAD_SCRIPT) \
$(ARP_UPDATE_SCRIPT) \
$(BUFFERS_CONFIG_TEMPLATE) \
$(SONIC_VERSION)
$(DOCKER_SONIC_VS)_LOAD_DOCKERS += $(DOCKER_CONFIG_ENGINE)

View File

@ -86,7 +86,8 @@ COPY ["50-default.conf", "/etc/rsyslog.d/"]
COPY ["start.sh", "orchagent.sh", "/usr/bin/"]
COPY ["supervisord.conf", "/etc/supervisor/conf.d/"]
COPY ["files/configdb-load.sh", "/usr/bin/"]
COPY ["files/arp_update", "/usr/bin"]
COPY ["files/arp_update", "/usr/bin/"]
COPY ["files/buffers_config.j2", "/usr/share/sonic/templates/"]
COPY ["files/sonic_version.yml", "/etc/sonic/"]
# Workaround the tcpdump issue

View File

@ -5,7 +5,11 @@ $(ARP_UPDATE_SCRIPT)_PATH = files/scripts
CONFIGDB_LOAD_SCRIPT = configdb-load.sh
$(CONFIGDB_LOAD_SCRIPT)_PATH = files/scripts
BUFFERS_CONFIG_TEMPLATE = buffers_config.j2
$(BUFFERS_CONFIG_TEMPLATE)_PATH = files/build_templates
SONIC_COPY_FILES += $(CONFIGDB_LOAD_SCRIPT) \
$(ARP_UPDATE_SCRIPT)
$(ARP_UPDATE_SCRIPT) \
$(BUFFERS_CONFIG_TEMPLATE)

View File

@ -14,6 +14,13 @@ $(addprefix $(DEST)/, $(MAIN_TARGET)): $(DEST)/% :
mkdir ./device
cp -r -L ../../../device/*/* ./device/
# Create hwsku for virtual switch
for d in `find -L ../../../device -maxdepth 3 -mindepth 3 -type d | grep -vE "(plugins|led-code)"`; do \
cp -Lr $$d device/x86_64-kvm_x86_64-r0/ ; \
cp ./sai.vs_profile device/x86_64-kvm_x86_64-r0/$$(basename $$d)/sai.profile; \
grep -v ^# device/x86_64-kvm_x86_64-r0/$$(basename $$d)/port_config.ini | awk '{i=i+1;print "eth"i":"$$2}' > device/x86_64-kvm_x86_64-r0/$$(basename $$d)/lanemap.ini
done;
# Build the package
dpkg-buildpackage -rfakeroot -b -us -uc

@ -1 +1 @@
Subproject commit 60f97c33ccb5b218c68b8c3fe94a48719ed09435
Subproject commit b1b739b5552aac1acbf9d3d0f4572a7f1d707909