[multi-asic][vs]: Add new multi-asic vs hwsku with four asics (#6558)
- Why I did it Current mutli-asic vs hwsku consists of 6 asics with each asic having 32 interfaces. When bringing this up, below issue was seen: When all 32 interfaces(sonic interfaces and linux interface) are set to 9100 mtu, DMA error is seen "DMA: Out of SW-IOMMU space for 4096 bytes at device 0000:06:03.0" which can be fixed by updating swiotlb=65536 in /host/grub/grub.cfg .In order to keep multi-asic VS lighter and easier to bring up and test, new hwsku 'msft_four_asic_vs' is added to represent 4-asic hwsku with 2 frontend asics and 2 backend asics and each asic having 8 interfaces interconnected by port-channels. - How I did it Add msft_four_asic_hwsku directory to have the right number of directories (4) and update port_config.ini and lanemap.ini files to include 8 ports information. Add topology.sh script to create the internal asic-asic connectivity. - How to verify it Update asic.conf with the 4 asic information as below and build sonic-vs.img: NUM_ASIC=4 DEV_ID_ASIC_0=0 DEV_ID_ASIC_1=1 DEV_ID_ASIC_2=2 DEV_ID_ASIC_3=3 Modify sonic_multiasic.xml to have 8 front panel interfaces. create virtual switch using "sudo virsh sonic_mutliasic.xml" command. Start topology service and Load config_db files for switch and each asic. Ensure that that all internal interfaces and port_channels are coming up. multi-asic vs testbed: Bring up mutli-asic VS testbed with a multi-asic image(asic.conf updated to 4 asics) and using t1-lag topology. ./testbed-cli.sh -t vtestbed.csv -m veos_vtb -k ceos add-topo vms-kvm-four-asic-t1-lag password.txt Load minigraph/config_dbs. Ensure all internal and external interfaces come up. No change on single asic vs.
This commit is contained in:
SuvarnaMeenakshi
Abhishek Dosi
parent
2f1eacbb74
commit
272781855e
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{%- set default_topo = 't1' %}
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{%- include 'buffers_config.j2' %}
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{%- set default_cable = '300m' %}
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{%- macro generate_port_lists(PORT_ALL) %}
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{# Generate list of ports #}
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{% for port_idx in range(0,32) %}
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{% if PORT_ALL.append("Ethernet%d" % (port_idx * 4)) %}{% endif %}
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{% endfor %}
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{%- endmacro %}
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{%- macro generate_buffer_pool_and_profiles() %}
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"BUFFER_POOL": {
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"ingress_lossless_pool": {
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"size": "12766208",
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"type": "ingress",
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"mode": "dynamic"
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},
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"egress_lossless_pool": {
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"size": "12766208",
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"type": "egress",
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"mode": "static"
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},
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"egress_lossy_pool": {
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"size": "7326924",
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"type": "egress",
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"mode": "dynamic"
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}
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},
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"BUFFER_PROFILE": {
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"ingress_lossy_profile": {
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"pool":"[BUFFER_POOL|ingress_lossless_pool]",
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"size":"0",
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"dynamic_th":"3"
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},
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"egress_lossless_profile": {
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"pool":"[BUFFER_POOL|egress_lossless_pool]",
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"size":"0",
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"static_th":"12766208"
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},
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"egress_lossy_profile": {
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"pool":"[BUFFER_POOL|egress_lossy_pool]",
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"size":"1518",
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"dynamic_th":"3"
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}
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},
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{%- endmacro %}
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{%- set default_cable = '300m' %}
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{%- macro generate_port_lists(PORT_ALL) %}
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{# Generate list of ports #}
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{% for port_idx in range(0,32) %}
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{% if PORT_ALL.append("Ethernet%d" % (port_idx * 4)) %}{% endif %}
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{% endfor %}
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{%- endmacro %}
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{%- macro generate_buffer_pool_and_profiles() %}
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"BUFFER_POOL": {
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"ingress_lossless_pool": {
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"size": "12766208",
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"type": "ingress",
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"mode": "dynamic"
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},
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"egress_lossless_pool": {
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"size": "12766208",
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"type": "egress",
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"mode": "static"
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},
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"egress_lossy_pool": {
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"size": "7326924",
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"type": "egress",
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"mode": "dynamic"
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}
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},
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"BUFFER_PROFILE": {
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"ingress_lossy_profile": {
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"pool":"[BUFFER_POOL|ingress_lossless_pool]",
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"size":"0",
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"dynamic_th":"3"
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},
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"egress_lossless_profile": {
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"pool":"[BUFFER_POOL|egress_lossless_pool]",
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"size":"0",
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"static_th":"12766208"
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},
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"egress_lossy_profile": {
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"pool":"[BUFFER_POOL|egress_lossy_pool]",
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"size":"1518",
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"dynamic_th":"3"
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}
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},
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{%- endmacro %}
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{%- set default_cable = '300m' %}
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{%- macro generate_port_lists(PORT_ALL) %}
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{# Generate list of ports #}
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{% for port_idx in range(0,32) %}
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{% if PORT_ALL.append("Ethernet%d" % (port_idx * 4)) %}{% endif %}
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{% endfor %}
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{%- endmacro %}
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{%- macro generate_buffer_pool_and_profiles() %}
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"BUFFER_POOL": {
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"ingress_lossless_pool": {
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"size": "12766208",
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"type": "ingress",
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"mode": "dynamic"
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},
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"egress_lossless_pool": {
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"size": "12766208",
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"type": "egress",
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"mode": "static"
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},
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"egress_lossy_pool": {
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"size": "7326924",
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"type": "egress",
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"mode": "dynamic"
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}
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},
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"BUFFER_PROFILE": {
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"ingress_lossy_profile": {
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"pool":"[BUFFER_POOL|ingress_lossless_pool]",
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"size":"0",
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"dynamic_th":"3"
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},
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"egress_lossless_profile": {
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"pool":"[BUFFER_POOL|egress_lossless_pool]",
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"size":"0",
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"static_th":"12766208"
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},
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"egress_lossy_profile": {
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"pool":"[BUFFER_POOL|egress_lossy_pool]",
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"size":"1518",
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"dynamic_th":"3"
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}
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},
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{%- endmacro %}
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@ -0,0 +1,8 @@
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eth1:1,2,3,4
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eth2:5,6,7,8
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eth3:9,10,11,12
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eth4:13,14,15,16
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eth5:17,18,19,20
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eth6:21,22,23,24
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eth7:25,26,27,28
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eth8:29,30,31,32
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@ -0,0 +1,17 @@
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# PG lossless profiles.
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# speed cable size xon xoff threshold xon_offset
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10000 5m 56368 18432 55120 -3 2496
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25000 5m 56368 18432 55120 -3 2496
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40000 5m 56368 18432 55120 -3 2496
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50000 5m 56368 18432 55120 -3 2496
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100000 5m 56368 18432 55120 -3 2496
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10000 40m 56368 18432 55120 -3 2496
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25000 40m 56368 18432 55120 -3 2496
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40000 40m 56368 18432 55120 -3 2496
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50000 40m 56368 18432 55120 -3 2496
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100000 40m 56368 18432 55120 -3 2496
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10000 300m 56368 18432 55120 -3 2496
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25000 300m 56368 18432 55120 -3 2496
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40000 300m 56368 18432 55120 -3 2496
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50000 300m 56368 18432 55120 -3 2496
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100000 300m 56368 18432 55120 -3 2496
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@ -0,0 +1,9 @@
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# name lanes alias index asic_port_name role
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Ethernet0 1,2,3,4 Ethernet1/1 0 Eth0-ASIC0 Ext
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Ethernet4 5,6,7,8 Ethernet1/2 1 Eth1-ASIC0 Ext
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Ethernet8 9,10,11,12 Ethernet1/3 2 Eth2-ASIC0 Ext
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Ethernet12 13,14,15,16 Ethernet1/4 3 Eth3-ASIC0 Ext
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Ethernet-BP0 17,18,19,20 Eth4-ASIC0 0 Eth4-ASIC0 Int
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Ethernet-BP4 21,22,23,24 Eth5-ASIC0 1 Eth5-ASIC0 Int
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Ethernet-BP8 25,26,27,28 Eth6-ASIC0 2 Eth6-ASIC0 Int
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Ethernet-BP12 29,30,31,32 Eth7-ASIC0 3 Eth7-ASIC0 Int
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@ -0,0 +1 @@
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{%- include 'qos_config.j2' %}
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SAI_VS_SWITCH_TYPE=SAI_VS_SWITCH_TYPE_BCM56850
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SAI_VS_HOSTIF_USE_TAP_DEVICE=true
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SAI_VS_INTERFACE_LANE_MAP_FILE=/usr/share/sonic/hwsku/lanemap.ini
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# Old LPM only configuration
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# l2_mem_entries=163840
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# l3_mem_entries=90112
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# l3_alpm_enable=0
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# ipv6_lpm_128b_enable=0
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#
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# ALPM enable
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l3_alpm_enable=2
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ipv6_lpm_128b_enable=1
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l2_mem_entries=32768
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l3_mem_entries=16384
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# From old config file
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os=unix
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higig2_hdr_mode=1
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# Parity
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parity_correction=1
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parity_enable=1
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stat_if_parity_enable=0
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#
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bcm_num_cos=10
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bcm_stat_interval=2000000
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l2xmsg_hostbuf_size=8192
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l2xmsg_mode=1
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lls_num_l2uc=12
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max_vp_lags=0
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miim_intr_enable=0
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mmu_lossless=0
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module_64ports=0
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schan_intr_enable=0
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stable_size=0x2000000
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tdma_timeout_usec=5000000
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pbmp_oversubscribe=0x000007fffffffffffffffffffffffffe
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pbmp_xport_xe=0x000007fffffffffffffffffffffffffe
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# Ports configuration
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# xe0 (40G)
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portmap_1=25:40
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xgxs_rx_lane_map_1=0x213
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xgxs_tx_lane_map_1=0x2031
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phy_xaui_rx_polarity_flip_1=0xe
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phy_xaui_tx_polarity_flip_1=0x2
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serdes_driver_current_lane0_xe0=0x5
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serdes_driver_current_lane1_xe0=0x5
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serdes_driver_current_lane2_xe0=0x5
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serdes_driver_current_lane3_xe0=0x5
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serdes_pre_driver_current_lane0_xe0=0x5
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serdes_pre_driver_current_lane1_xe0=0x5
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serdes_pre_driver_current_lane2_xe0=0x5
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serdes_pre_driver_current_lane3_xe0=0x5
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serdes_preemphasis_lane0_xe0=0xcad0
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serdes_preemphasis_lane1_xe0=0xc6e0
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serdes_preemphasis_lane2_xe0=0xc6e0
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serdes_preemphasis_lane3_xe0=0xd2b0
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# xe1 (40G)
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portmap_2=29:40
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xgxs_rx_lane_map_2=0x213
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xgxs_tx_lane_map_2=0x213
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phy_xaui_rx_polarity_flip_2=0xc
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phy_xaui_tx_polarity_flip_2=0x9
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serdes_driver_current_lane0_xe1=0x6
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serdes_driver_current_lane1_xe1=0x7
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serdes_driver_current_lane2_xe1=0x6
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serdes_driver_current_lane3_xe1=0x6
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serdes_pre_driver_current_lane0_xe1=0x6
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serdes_pre_driver_current_lane1_xe1=0x7
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serdes_pre_driver_current_lane2_xe1=0x6
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serdes_pre_driver_current_lane3_xe1=0x6
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serdes_preemphasis_lane0_xe1=0xc2f0
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serdes_preemphasis_lane1_xe1=0xd2b0
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serdes_preemphasis_lane2_xe1=0xc6e0
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serdes_preemphasis_lane3_xe1=0xc2f0
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# xe2 (40G)
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portmap_3=33:40
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xgxs_rx_lane_map_3=0x213
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xgxs_tx_lane_map_3=0x132
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phy_xaui_rx_polarity_flip_3=0xe
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phy_xaui_tx_polarity_flip_3=0x2
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serdes_driver_current_lane0_xe2=0x4
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serdes_driver_current_lane1_xe2=0x4
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serdes_driver_current_lane2_xe2=0x4
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serdes_driver_current_lane3_xe2=0x4
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serdes_pre_driver_current_lane0_xe2=0x4
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serdes_pre_driver_current_lane1_xe2=0x4
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serdes_pre_driver_current_lane2_xe2=0x4
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serdes_pre_driver_current_lane3_xe2=0x4
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serdes_preemphasis_lane0_xe2=0xc6e0
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serdes_preemphasis_lane1_xe2=0xc6e0
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serdes_preemphasis_lane2_xe2=0xc6e0
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serdes_preemphasis_lane3_xe2=0xc6e0
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# xe3 (40G)
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portmap_4=37:40
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xgxs_rx_lane_map_4=0x213
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xgxs_tx_lane_map_4=0x1203
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phy_xaui_rx_polarity_flip_4=0x3
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phy_xaui_tx_polarity_flip_4=0xe
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serdes_driver_current_lane0_xe3=0x4
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serdes_driver_current_lane1_xe3=0x4
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serdes_driver_current_lane2_xe3=0x4
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serdes_driver_current_lane3_xe3=0x4
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serdes_pre_driver_current_lane0_xe3=0x4
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serdes_pre_driver_current_lane1_xe3=0x4
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serdes_pre_driver_current_lane2_xe3=0x4
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serdes_pre_driver_current_lane3_xe3=0x4
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serdes_preemphasis_lane0_xe3=0xcad0
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serdes_preemphasis_lane1_xe3=0xcad0
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serdes_preemphasis_lane2_xe3=0xc2f0
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serdes_preemphasis_lane3_xe3=0xc2f0
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# xe4 (40G)
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portmap_5=45:40
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xgxs_rx_lane_map_5=0x213
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xgxs_tx_lane_map_5=0x213
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phy_xaui_rx_polarity_flip_5=0xe
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phy_xaui_tx_polarity_flip_5=0x8
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serdes_driver_current_lane0_xe4=0x4
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serdes_driver_current_lane1_xe4=0x4
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serdes_driver_current_lane2_xe4=0x4
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serdes_driver_current_lane3_xe4=0x4
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serdes_pre_driver_current_lane0_xe4=0x4
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serdes_pre_driver_current_lane1_xe4=0x4
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serdes_pre_driver_current_lane2_xe4=0x4
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serdes_pre_driver_current_lane3_xe4=0x4
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serdes_preemphasis_lane0_xe4=0xc2f0
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serdes_preemphasis_lane1_xe4=0xc2f0
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serdes_preemphasis_lane2_xe4=0xc2f0
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serdes_preemphasis_lane3_xe4=0xc2f0
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# xe5 (40G)
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portmap_6=41:40
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xgxs_rx_lane_map_6=0x213
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xgxs_tx_lane_map_6=0x3021
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phy_xaui_rx_polarity_flip_6=0x3
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phy_xaui_tx_polarity_flip_6=0xb
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serdes_driver_current_lane0_xe5=0x4
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serdes_driver_current_lane1_xe5=0x4
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serdes_driver_current_lane2_xe5=0x4
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serdes_driver_current_lane3_xe5=0x4
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serdes_pre_driver_current_lane0_xe5=0x4
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serdes_pre_driver_current_lane1_xe5=0x4
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serdes_pre_driver_current_lane2_xe5=0x4
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serdes_pre_driver_current_lane3_xe5=0x4
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serdes_preemphasis_lane0_xe5=0xc6e0
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serdes_preemphasis_lane1_xe5=0xc2f0
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serdes_preemphasis_lane2_xe5=0xc2f0
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serdes_preemphasis_lane3_xe5=0xcad0
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# xe6 (40G)
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portmap_7=1:40
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xgxs_rx_lane_map_7=0x213
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xgxs_tx_lane_map_7=0x2031
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phy_xaui_rx_polarity_flip_7=0xe
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phy_xaui_tx_polarity_flip_7=0xd
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serdes_driver_current_lane0_xe6=0x5
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serdes_driver_current_lane1_xe6=0x5
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serdes_driver_current_lane2_xe6=0x5
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serdes_driver_current_lane3_xe6=0x5
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serdes_pre_driver_current_lane0_xe6=0x5
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serdes_pre_driver_current_lane1_xe6=0x5
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serdes_pre_driver_current_lane2_xe6=0x5
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serdes_pre_driver_current_lane3_xe6=0x5
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serdes_preemphasis_lane0_xe6=0xc6e0
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serdes_preemphasis_lane1_xe6=0xcad0
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serdes_preemphasis_lane2_xe6=0xc6e0
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serdes_preemphasis_lane3_xe6=0xcad0
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# xe7 (40G)
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portmap_8=5:40
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xgxs_rx_lane_map_8=0x213
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xgxs_tx_lane_map_8=0x1203
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phy_xaui_rx_polarity_flip_8=0xc
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phy_xaui_tx_polarity_flip_8=0x1
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serdes_driver_current_lane0_xe7=0x4
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serdes_driver_current_lane1_xe7=0x4
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serdes_driver_current_lane2_xe7=0x4
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serdes_driver_current_lane3_xe7=0x4
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serdes_pre_driver_current_lane0_xe7=0x4
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serdes_pre_driver_current_lane1_xe7=0x4
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serdes_pre_driver_current_lane2_xe7=0x4
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serdes_pre_driver_current_lane3_xe7=0x4
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serdes_preemphasis_lane0_xe7=0xc6e0
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serdes_preemphasis_lane1_xe7=0xc6e0
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serdes_preemphasis_lane2_xe7=0xc6e0
|
||||
serdes_preemphasis_lane3_xe7=0xc6e0
|
||||
|
||||
# xe8 (40G)
|
||||
portmap_9=13:40
|
||||
xgxs_rx_lane_map_9=0x213
|
||||
xgxs_tx_lane_map_9=0x132
|
||||
phy_xaui_rx_polarity_flip_9=0xe
|
||||
phy_xaui_tx_polarity_flip_9=0x0
|
||||
serdes_driver_current_lane0_xe8=0x2
|
||||
serdes_driver_current_lane1_xe8=0x3
|
||||
serdes_driver_current_lane2_xe8=0x2
|
||||
serdes_driver_current_lane3_xe8=0x2
|
||||
serdes_pre_driver_current_lane0_xe8=0x2
|
||||
serdes_pre_driver_current_lane1_xe8=0x3
|
||||
serdes_pre_driver_current_lane2_xe8=0x2
|
||||
serdes_pre_driver_current_lane3_xe8=0x2
|
||||
serdes_preemphasis_lane0_xe8=0xb270
|
||||
serdes_preemphasis_lane1_xe8=0xbb10
|
||||
serdes_preemphasis_lane2_xe8=0xb720
|
||||
serdes_preemphasis_lane3_xe8=0xb720
|
||||
|
||||
# xe9 (40G)
|
||||
portmap_10=9:40
|
||||
xgxs_rx_lane_map_10=0x3120
|
||||
xgxs_tx_lane_map_10=0x3021
|
||||
phy_xaui_rx_polarity_flip_10=0x0
|
||||
phy_xaui_tx_polarity_flip_10=0x4
|
||||
serdes_driver_current_lane0_xe9=0x3
|
||||
serdes_driver_current_lane1_xe9=0x3
|
||||
serdes_driver_current_lane2_xe9=0x3
|
||||
serdes_driver_current_lane3_xe9=0x3
|
||||
serdes_pre_driver_current_lane0_xe9=0x3
|
||||
serdes_pre_driver_current_lane1_xe9=0x3
|
||||
serdes_pre_driver_current_lane2_xe9=0x3
|
||||
serdes_pre_driver_current_lane3_xe9=0x3
|
||||
serdes_preemphasis_lane0_xe9=0xc2f0
|
||||
serdes_preemphasis_lane1_xe9=0xc6e0
|
||||
serdes_preemphasis_lane2_xe9=0xbf00
|
||||
serdes_preemphasis_lane3_xe9=0xc2f0
|
||||
|
||||
# xe10 (40G)
|
||||
portmap_11=17:40
|
||||
xgxs_rx_lane_map_11=0x213
|
||||
xgxs_tx_lane_map_11=0x132
|
||||
phy_xaui_rx_polarity_flip_11=0xe
|
||||
phy_xaui_tx_polarity_flip_11=0x0
|
||||
serdes_driver_current_lane0_xe10=0x2
|
||||
serdes_driver_current_lane1_xe10=0x2
|
||||
serdes_driver_current_lane2_xe10=0x2
|
||||
serdes_driver_current_lane3_xe10=0x2
|
||||
serdes_pre_driver_current_lane0_xe10=0x2
|
||||
serdes_pre_driver_current_lane1_xe10=0x2
|
||||
serdes_pre_driver_current_lane2_xe10=0x2
|
||||
serdes_pre_driver_current_lane3_xe10=0x2
|
||||
serdes_preemphasis_lane0_xe10=0xb330
|
||||
serdes_preemphasis_lane1_xe10=0xbb10
|
||||
serdes_preemphasis_lane2_xe10=0xbb10
|
||||
serdes_preemphasis_lane3_xe10=0xbb10
|
||||
|
||||
# xe11 (40G)
|
||||
portmap_12=21:40
|
||||
xgxs_rx_lane_map_12=0x123
|
||||
xgxs_tx_lane_map_12=0x1203
|
||||
phy_xaui_rx_polarity_flip_12=0xc
|
||||
phy_xaui_tx_polarity_flip_12=0xe
|
||||
serdes_driver_current_lane0_xe11=0x2
|
||||
serdes_driver_current_lane1_xe11=0x2
|
||||
serdes_driver_current_lane2_xe11=0x2
|
||||
serdes_driver_current_lane3_xe11=0x2
|
||||
serdes_pre_driver_current_lane0_xe11=0x2
|
||||
serdes_pre_driver_current_lane1_xe11=0x2
|
||||
serdes_pre_driver_current_lane2_xe11=0x2
|
||||
serdes_pre_driver_current_lane3_xe11=0x2
|
||||
serdes_preemphasis_lane0_xe11=0xb330
|
||||
serdes_preemphasis_lane1_xe11=0xb330
|
||||
serdes_preemphasis_lane2_xe11=0xb330
|
||||
serdes_preemphasis_lane3_xe11=0xb330
|
||||
|
||||
# xe12 (40G)
|
||||
portmap_13=53:40
|
||||
xgxs_rx_lane_map_13=0x213
|
||||
xgxs_tx_lane_map_13=0x231
|
||||
phy_xaui_rx_polarity_flip_13=0x1
|
||||
phy_xaui_tx_polarity_flip_13=0x0
|
||||
serdes_driver_current_lane0_xe12=0x2
|
||||
serdes_driver_current_lane1_xe12=0x2
|
||||
serdes_driver_current_lane2_xe12=0x2
|
||||
serdes_driver_current_lane3_xe12=0x2
|
||||
serdes_pre_driver_current_lane0_xe12=0x2
|
||||
serdes_pre_driver_current_lane1_xe12=0x2
|
||||
serdes_pre_driver_current_lane2_xe12=0x2
|
||||
serdes_pre_driver_current_lane3_xe12=0x2
|
||||
serdes_preemphasis_lane0_xe12=0xaf40
|
||||
serdes_preemphasis_lane1_xe12=0xaf40
|
||||
serdes_preemphasis_lane2_xe12=0xaf40
|
||||
serdes_preemphasis_lane3_xe12=0xaf40
|
||||
|
||||
# xe13 (40G)
|
||||
portmap_14=49:40
|
||||
xgxs_rx_lane_map_14=0x1302
|
||||
xgxs_tx_lane_map_14=0x2031
|
||||
phy_xaui_rx_polarity_flip_14=0xb
|
||||
phy_xaui_tx_polarity_flip_14=0x3
|
||||
serdes_driver_current_lane0_xe13=0x2
|
||||
serdes_driver_current_lane1_xe13=0x2
|
||||
serdes_driver_current_lane2_xe13=0x2
|
||||
serdes_driver_current_lane3_xe13=0x2
|
||||
serdes_pre_driver_current_lane0_xe13=0x2
|
||||
serdes_pre_driver_current_lane1_xe13=0x2
|
||||
serdes_pre_driver_current_lane2_xe13=0x2
|
||||
serdes_pre_driver_current_lane3_xe13=0x2
|
||||
serdes_preemphasis_lane0_xe13=0xa760
|
||||
serdes_preemphasis_lane1_xe13=0xa760
|
||||
serdes_preemphasis_lane2_xe13=0xa760
|
||||
serdes_preemphasis_lane3_xe13=0xa760
|
||||
|
||||
# xe14 (40G)
|
||||
portmap_15=57:40
|
||||
xgxs_rx_lane_map_15=0x213
|
||||
xgxs_tx_lane_map_15=0x2031
|
||||
phy_xaui_rx_polarity_flip_15=0x1
|
||||
phy_xaui_tx_polarity_flip_15=0x0
|
||||
serdes_driver_current_lane0_xe14=0x1
|
||||
serdes_driver_current_lane1_xe14=0x1
|
||||
serdes_driver_current_lane2_xe14=0x1
|
||||
serdes_driver_current_lane3_xe14=0x1
|
||||
serdes_pre_driver_current_lane0_xe14=0x1
|
||||
serdes_pre_driver_current_lane1_xe14=0x1
|
||||
serdes_pre_driver_current_lane2_xe14=0x1
|
||||
serdes_pre_driver_current_lane3_xe14=0x1
|
||||
serdes_preemphasis_lane0_xe14=0xa760
|
||||
serdes_preemphasis_lane1_xe14=0xa760
|
||||
serdes_preemphasis_lane2_xe14=0xa760
|
||||
serdes_preemphasis_lane3_xe14=0xa760
|
||||
|
||||
# xe15 (40G)
|
||||
portmap_16=61:40
|
||||
xgxs_rx_lane_map_16=0x132
|
||||
xgxs_tx_lane_map_16=0x213
|
||||
phy_xaui_rx_polarity_flip_16=0x0
|
||||
phy_xaui_tx_polarity_flip_16=0x0
|
||||
serdes_driver_current_lane0_xe15=0x2
|
||||
serdes_driver_current_lane1_xe15=0x2
|
||||
serdes_driver_current_lane2_xe15=0x2
|
||||
serdes_driver_current_lane3_xe15=0x2
|
||||
serdes_pre_driver_current_lane0_xe15=0x2
|
||||
serdes_pre_driver_current_lane1_xe15=0x2
|
||||
serdes_pre_driver_current_lane2_xe15=0x2
|
||||
serdes_pre_driver_current_lane3_xe15=0x2
|
||||
serdes_preemphasis_lane0_xe15=0xa760
|
||||
serdes_preemphasis_lane1_xe15=0xa760
|
||||
serdes_preemphasis_lane2_xe15=0xa760
|
||||
serdes_preemphasis_lane3_xe15=0xa760
|
||||
|
||||
# xe16 (40G)
|
||||
portmap_17=69:40
|
||||
xgxs_rx_lane_map_17=0x213
|
||||
xgxs_tx_lane_map_17=0x2130
|
||||
phy_xaui_rx_polarity_flip_17=0x1
|
||||
phy_xaui_tx_polarity_flip_17=0xf
|
||||
serdes_driver_current_lane0_xe16=0x1
|
||||
serdes_driver_current_lane1_xe16=0x1
|
||||
serdes_driver_current_lane2_xe16=0x1
|
||||
serdes_driver_current_lane3_xe16=0x1
|
||||
serdes_pre_driver_current_lane0_xe16=0x1
|
||||
serdes_pre_driver_current_lane1_xe16=0x1
|
||||
serdes_pre_driver_current_lane2_xe16=0x1
|
||||
serdes_pre_driver_current_lane3_xe16=0x1
|
||||
serdes_preemphasis_lane0_xe16=0xa760
|
||||
serdes_preemphasis_lane1_xe16=0xa760
|
||||
serdes_preemphasis_lane2_xe16=0xa760
|
||||
serdes_preemphasis_lane3_xe16=0xa760
|
||||
|
||||
# xe17 (40G)
|
||||
portmap_18=65:40
|
||||
xgxs_rx_lane_map_18=0x132
|
||||
xgxs_tx_lane_map_18=0x2031
|
||||
phy_xaui_rx_polarity_flip_18=0x3
|
||||
phy_xaui_tx_polarity_flip_18=0x9
|
||||
serdes_driver_current_lane0_xe17=0x1
|
||||
serdes_driver_current_lane1_xe17=0x1
|
||||
serdes_driver_current_lane2_xe17=0x1
|
||||
serdes_driver_current_lane3_xe17=0x1
|
||||
serdes_pre_driver_current_lane0_xe17=0x1
|
||||
serdes_pre_driver_current_lane1_xe17=0x1
|
||||
serdes_pre_driver_current_lane2_xe17=0x1
|
||||
serdes_pre_driver_current_lane3_xe17=0x1
|
||||
serdes_preemphasis_lane0_xe17=0xa370
|
||||
serdes_preemphasis_lane1_xe17=0xa370
|
||||
serdes_preemphasis_lane2_xe17=0xa370
|
||||
serdes_preemphasis_lane3_xe17=0xa370
|
||||
|
||||
# xe18 (40G)
|
||||
portmap_19=73:40
|
||||
xgxs_rx_lane_map_19=0x213
|
||||
xgxs_tx_lane_map_19=0x2031
|
||||
phy_xaui_rx_polarity_flip_19=0x1
|
||||
phy_xaui_tx_polarity_flip_19=0x0
|
||||
serdes_driver_current_lane0_xe18=0x2
|
||||
serdes_driver_current_lane1_xe18=0x2
|
||||
serdes_driver_current_lane2_xe18=0x2
|
||||
serdes_driver_current_lane3_xe18=0x2
|
||||
serdes_pre_driver_current_lane0_xe18=0x2
|
||||
serdes_pre_driver_current_lane1_xe18=0x2
|
||||
serdes_pre_driver_current_lane2_xe18=0x2
|
||||
serdes_pre_driver_current_lane3_xe18=0x2
|
||||
serdes_preemphasis_lane0_xe18=0xa760
|
||||
serdes_preemphasis_lane1_xe18=0xa760
|
||||
serdes_preemphasis_lane2_xe18=0xa760
|
||||
serdes_preemphasis_lane3_xe18=0xa760
|
||||
|
||||
# xe19 (40G)
|
||||
portmap_20=77:40
|
||||
xgxs_rx_lane_map_20=0x123
|
||||
xgxs_tx_lane_map_20=0x1203
|
||||
phy_xaui_rx_polarity_flip_20=0x3
|
||||
phy_xaui_tx_polarity_flip_20=0xe
|
||||
serdes_driver_current_lane0_xe19=0x2
|
||||
serdes_driver_current_lane1_xe19=0x2
|
||||
serdes_driver_current_lane2_xe19=0x2
|
||||
serdes_driver_current_lane3_xe19=0x2
|
||||
serdes_pre_driver_current_lane0_xe19=0x2
|
||||
serdes_pre_driver_current_lane1_xe19=0x2
|
||||
serdes_pre_driver_current_lane2_xe19=0x2
|
||||
serdes_pre_driver_current_lane3_xe19=0x2
|
||||
serdes_preemphasis_lane0_xe19=0xaf40
|
||||
serdes_preemphasis_lane1_xe19=0xaf40
|
||||
serdes_preemphasis_lane2_xe19=0xaf40
|
||||
serdes_preemphasis_lane3_xe19=0xaf40
|
||||
|
||||
# xe20 (40G)
|
||||
portmap_21=109:40
|
||||
xgxs_rx_lane_map_21=0x132
|
||||
xgxs_tx_lane_map_21=0x132
|
||||
phy_xaui_rx_polarity_flip_21=0x8
|
||||
phy_xaui_tx_polarity_flip_21=0x0
|
||||
serdes_driver_current_lane0_xe20=0x1
|
||||
serdes_driver_current_lane1_xe20=0x1
|
||||
serdes_driver_current_lane2_xe20=0x1
|
||||
serdes_driver_current_lane3_xe20=0x2
|
||||
serdes_pre_driver_current_lane0_xe20=0x1
|
||||
serdes_pre_driver_current_lane1_xe20=0x1
|
||||
serdes_pre_driver_current_lane2_xe20=0x1
|
||||
serdes_pre_driver_current_lane3_xe20=0x2
|
||||
serdes_preemphasis_lane0_xe20=0xb330
|
||||
serdes_preemphasis_lane1_xe20=0xb330
|
||||
serdes_preemphasis_lane2_xe20=0xb330
|
||||
serdes_preemphasis_lane3_xe20=0xbff0
|
||||
|
||||
# xe21 (40G)
|
||||
portmap_22=105:40
|
||||
xgxs_rx_lane_map_22=0x1320
|
||||
xgxs_tx_lane_map_22=0x3021
|
||||
phy_xaui_rx_polarity_flip_22=0xd
|
||||
phy_xaui_tx_polarity_flip_22=0xb
|
||||
serdes_driver_current_lane0_xe21=0x1
|
||||
serdes_driver_current_lane1_xe21=0x1
|
||||
serdes_driver_current_lane2_xe21=0x1
|
||||
serdes_driver_current_lane3_xe21=0x1
|
||||
serdes_pre_driver_current_lane0_xe21=0x1
|
||||
serdes_pre_driver_current_lane1_xe21=0x1
|
||||
serdes_pre_driver_current_lane2_xe21=0x1
|
||||
serdes_pre_driver_current_lane3_xe21=0x1
|
||||
serdes_preemphasis_lane0_xe21=0xb330
|
||||
serdes_preemphasis_lane1_xe21=0xb330
|
||||
serdes_preemphasis_lane2_xe21=0xb330
|
||||
serdes_preemphasis_lane3_xe21=0xb330
|
||||
|
||||
# xe22 (40G)
|
||||
portmap_23=113:40
|
||||
xgxs_rx_lane_map_23=0x132
|
||||
xgxs_tx_lane_map_23=0x132
|
||||
phy_xaui_rx_polarity_flip_23=0x8
|
||||
phy_xaui_tx_polarity_flip_23=0x0
|
||||
serdes_driver_current_lane0_xe22=0x1
|
||||
serdes_driver_current_lane1_xe22=0x1
|
||||
serdes_driver_current_lane2_xe22=0x1
|
||||
serdes_driver_current_lane3_xe22=0x1
|
||||
serdes_pre_driver_current_lane0_xe22=0x1
|
||||
serdes_pre_driver_current_lane1_xe22=0x1
|
||||
serdes_pre_driver_current_lane2_xe22=0x1
|
||||
serdes_pre_driver_current_lane3_xe22=0x1
|
||||
serdes_preemphasis_lane0_xe22=0xbb10
|
||||
serdes_preemphasis_lane1_xe22=0xbb10
|
||||
serdes_preemphasis_lane2_xe22=0xbb10
|
||||
serdes_preemphasis_lane3_xe22=0xc2f0
|
||||
|
||||
# xe23 (40G)
|
||||
portmap_24=117:40
|
||||
xgxs_rx_lane_map_24=0x231
|
||||
xgxs_tx_lane_map_24=0x1203
|
||||
phy_xaui_rx_polarity_flip_24=0x3
|
||||
phy_xaui_tx_polarity_flip_24=0xe
|
||||
serdes_driver_current_lane0_xe23=0x3
|
||||
serdes_driver_current_lane1_xe23=0x5
|
||||
serdes_driver_current_lane2_xe23=0x3
|
||||
serdes_driver_current_lane3_xe23=0x3
|
||||
serdes_pre_driver_current_lane0_xe23=0x3
|
||||
serdes_pre_driver_current_lane1_xe23=0x5
|
||||
serdes_pre_driver_current_lane2_xe23=0x3
|
||||
serdes_pre_driver_current_lane3_xe23=0x3
|
||||
serdes_preemphasis_lane0_xe23=0xc6e0
|
||||
serdes_preemphasis_lane1_xe23=0xc6e0
|
||||
serdes_preemphasis_lane2_xe23=0xc6e0
|
||||
serdes_preemphasis_lane3_xe23=0xc6e0
|
||||
|
||||
# xe24 (40G)
|
||||
portmap_25=125:40
|
||||
xgxs_rx_lane_map_25=0x132
|
||||
xgxs_tx_lane_map_25=0x132
|
||||
phy_xaui_rx_polarity_flip_25=0x8
|
||||
phy_xaui_tx_polarity_flip_25=0x0
|
||||
serdes_driver_current_lane0_xe24=0x4
|
||||
serdes_driver_current_lane1_xe24=0x4
|
||||
serdes_driver_current_lane2_xe24=0x4
|
||||
serdes_driver_current_lane3_xe24=0x4
|
||||
serdes_pre_driver_current_lane0_xe24=0x4
|
||||
serdes_pre_driver_current_lane1_xe24=0x4
|
||||
serdes_pre_driver_current_lane2_xe24=0x4
|
||||
serdes_pre_driver_current_lane3_xe24=0x4
|
||||
serdes_preemphasis_lane0_xe24=0xc6e0
|
||||
serdes_preemphasis_lane1_xe24=0xc6e0
|
||||
serdes_preemphasis_lane2_xe24=0xc6e0
|
||||
serdes_preemphasis_lane3_xe24=0xcec0
|
||||
|
||||
# xe25 (40G)
|
||||
portmap_26=121:40
|
||||
xgxs_rx_lane_map_26=0x1320
|
||||
xgxs_tx_lane_map_26=0x3021
|
||||
phy_xaui_rx_polarity_flip_26=0xd
|
||||
phy_xaui_tx_polarity_flip_26=0xb
|
||||
serdes_driver_current_lane0_xe25=0x4
|
||||
serdes_driver_current_lane1_xe25=0x4
|
||||
serdes_driver_current_lane2_xe25=0x4
|
||||
serdes_driver_current_lane3_xe25=0x4
|
||||
serdes_pre_driver_current_lane0_xe25=0x4
|
||||
serdes_pre_driver_current_lane1_xe25=0x4
|
||||
serdes_pre_driver_current_lane2_xe25=0x4
|
||||
serdes_pre_driver_current_lane3_xe25=0x4
|
||||
serdes_preemphasis_lane0_xe25=0xc6e0
|
||||
serdes_preemphasis_lane1_xe25=0xc6e0
|
||||
serdes_preemphasis_lane2_xe25=0xc6e0
|
||||
serdes_preemphasis_lane3_xe25=0xc6e0
|
||||
|
||||
# xe26 (40G)
|
||||
portmap_27=81:40
|
||||
xgxs_rx_lane_map_27=0x1320
|
||||
xgxs_tx_lane_map_27=0x2031
|
||||
phy_xaui_rx_polarity_flip_27=0x1
|
||||
phy_xaui_tx_polarity_flip_27=0x2
|
||||
serdes_driver_current_lane0_xe26=0x2
|
||||
serdes_driver_current_lane1_xe26=0x2
|
||||
serdes_driver_current_lane2_xe26=0x2
|
||||
serdes_driver_current_lane3_xe26=0x2
|
||||
serdes_pre_driver_current_lane0_xe26=0x2
|
||||
serdes_pre_driver_current_lane1_xe26=0x2
|
||||
serdes_pre_driver_current_lane2_xe26=0x2
|
||||
serdes_pre_driver_current_lane3_xe26=0x2
|
||||
serdes_preemphasis_lane0_xe26=0xbb10
|
||||
serdes_preemphasis_lane1_xe26=0xbb10
|
||||
serdes_preemphasis_lane2_xe26=0xbf00
|
||||
serdes_preemphasis_lane3_xe26=0xbb10
|
||||
|
||||
# xe27 (40G)
|
||||
portmap_28=85:40
|
||||
xgxs_rx_lane_map_28=0x213
|
||||
xgxs_tx_lane_map_28=0x1203
|
||||
phy_xaui_rx_polarity_flip_28=0xc
|
||||
phy_xaui_tx_polarity_flip_28=0xe
|
||||
serdes_driver_current_lane0_xe27=0x4
|
||||
serdes_driver_current_lane1_xe27=0x5
|
||||
serdes_driver_current_lane2_xe27=0x4
|
||||
serdes_driver_current_lane3_xe27=0x5
|
||||
serdes_pre_driver_current_lane0_xe27=0x4
|
||||
serdes_pre_driver_current_lane1_xe27=0x5
|
||||
serdes_pre_driver_current_lane2_xe27=0x4
|
||||
serdes_pre_driver_current_lane3_xe27=0x5
|
||||
serdes_preemphasis_lane0_xe27=0xc2f0
|
||||
serdes_preemphasis_lane1_xe27=0xc6e0
|
||||
serdes_preemphasis_lane2_xe27=0xc6e0
|
||||
serdes_preemphasis_lane3_xe27=0xc6e0
|
||||
|
||||
# xe28 (40G)
|
||||
portmap_29=93:40
|
||||
xgxs_rx_lane_map_29=0x1320
|
||||
xgxs_tx_lane_map_29=0x2031
|
||||
phy_xaui_rx_polarity_flip_29=0x1
|
||||
phy_xaui_tx_polarity_flip_29=0x2
|
||||
serdes_driver_current_lane0_xe28=0x4
|
||||
serdes_driver_current_lane1_xe28=0x4
|
||||
serdes_driver_current_lane2_xe28=0x4
|
||||
serdes_driver_current_lane3_xe28=0x4
|
||||
serdes_pre_driver_current_lane0_xe28=0x4
|
||||
serdes_pre_driver_current_lane1_xe28=0x4
|
||||
serdes_pre_driver_current_lane2_xe28=0x4
|
||||
serdes_pre_driver_current_lane3_xe28=0x4
|
||||
serdes_preemphasis_lane0_xe28=0xc2f0
|
||||
serdes_preemphasis_lane1_xe28=0xc2f0
|
||||
serdes_preemphasis_lane2_xe28=0xc2f0
|
||||
serdes_preemphasis_lane3_xe28=0xc2f0
|
||||
|
||||
# xe29 (40G)
|
||||
portmap_30=89:40
|
||||
xgxs_rx_lane_map_30=0x1320
|
||||
xgxs_tx_lane_map_30=0x3021
|
||||
phy_xaui_rx_polarity_flip_30=0x2
|
||||
phy_xaui_tx_polarity_flip_30=0xb
|
||||
serdes_driver_current_lane0_xe29=0x4
|
||||
serdes_driver_current_lane1_xe29=0x4
|
||||
serdes_driver_current_lane2_xe29=0x4
|
||||
serdes_driver_current_lane3_xe29=0x4
|
||||
serdes_pre_driver_current_lane0_xe29=0x4
|
||||
serdes_pre_driver_current_lane1_xe29=0x4
|
||||
serdes_pre_driver_current_lane2_xe29=0x4
|
||||
serdes_pre_driver_current_lane3_xe29=0x4
|
||||
serdes_preemphasis_lane0_xe29=0xcad0
|
||||
serdes_preemphasis_lane1_xe29=0xc6e0
|
||||
serdes_preemphasis_lane2_xe29=0xc6e0
|
||||
serdes_preemphasis_lane3_xe29=0xc6e0
|
||||
|
||||
# xe30 (40G)
|
||||
portmap_31=101:40
|
||||
xgxs_rx_lane_map_31=0x1320
|
||||
xgxs_tx_lane_map_31=0x1203
|
||||
phy_xaui_rx_polarity_flip_31=0x1
|
||||
phy_xaui_tx_polarity_flip_31=0x6
|
||||
serdes_driver_current_lane0_xe30=0x6
|
||||
serdes_driver_current_lane1_xe30=0x6
|
||||
serdes_driver_current_lane2_xe30=0x6
|
||||
serdes_driver_current_lane3_xe30=0x7
|
||||
serdes_pre_driver_current_lane0_xe30=0x6
|
||||
serdes_pre_driver_current_lane1_xe30=0x6
|
||||
serdes_pre_driver_current_lane2_xe30=0x6
|
||||
serdes_pre_driver_current_lane3_xe30=0x7
|
||||
serdes_preemphasis_lane0_xe30=0xcec0
|
||||
serdes_preemphasis_lane1_xe30=0xcec0
|
||||
serdes_preemphasis_lane2_xe30=0xcad0
|
||||
serdes_preemphasis_lane3_xe30=0xc6e0
|
||||
|
||||
# xe31 (40G)
|
||||
portmap_32=97:40
|
||||
xgxs_rx_lane_map_32=0x213
|
||||
xgxs_tx_lane_map_32=0x2031
|
||||
phy_xaui_rx_polarity_flip_32=0xc
|
||||
phy_xaui_tx_polarity_flip_32=0x3
|
||||
serdes_driver_current_lane0_xe31=0x5
|
||||
serdes_driver_current_lane1_xe31=0x5
|
||||
serdes_driver_current_lane2_xe31=0x5
|
||||
serdes_driver_current_lane3_xe31=0x5
|
||||
serdes_pre_driver_current_lane0_xe31=0x5
|
||||
serdes_pre_driver_current_lane1_xe31=0x5
|
||||
serdes_pre_driver_current_lane2_xe31=0x5
|
||||
serdes_pre_driver_current_lane3_xe31=0x5
|
||||
serdes_preemphasis_lane0_xe31=0xcad0
|
||||
serdes_preemphasis_lane1_xe31=0xcad0
|
||||
serdes_preemphasis_lane2_xe31=0xcad0
|
||||
serdes_preemphasis_lane3_xe31=0xcad0
|
||||
@ -0,0 +1,3 @@
|
||||
{%- set default_topo = 't1' %}
|
||||
{%- include 'buffers_config.j2' %}
|
||||
|
||||
@ -0,0 +1,45 @@
|
||||
{%- set default_cable = '300m' %}
|
||||
|
||||
{%- macro generate_port_lists(PORT_ALL) %}
|
||||
{# Generate list of ports #}
|
||||
{% for port_idx in range(0,32) %}
|
||||
{% if PORT_ALL.append("Ethernet%d" % (port_idx * 4)) %}{% endif %}
|
||||
{% endfor %}
|
||||
{%- endmacro %}
|
||||
|
||||
{%- macro generate_buffer_pool_and_profiles() %}
|
||||
"BUFFER_POOL": {
|
||||
"ingress_lossless_pool": {
|
||||
"size": "12766208",
|
||||
"type": "ingress",
|
||||
"mode": "dynamic"
|
||||
},
|
||||
"egress_lossless_pool": {
|
||||
"size": "12766208",
|
||||
"type": "egress",
|
||||
"mode": "static"
|
||||
},
|
||||
"egress_lossy_pool": {
|
||||
"size": "7326924",
|
||||
"type": "egress",
|
||||
"mode": "dynamic"
|
||||
}
|
||||
},
|
||||
"BUFFER_PROFILE": {
|
||||
"ingress_lossy_profile": {
|
||||
"pool":"[BUFFER_POOL|ingress_lossless_pool]",
|
||||
"size":"0",
|
||||
"dynamic_th":"3"
|
||||
},
|
||||
"egress_lossless_profile": {
|
||||
"pool":"[BUFFER_POOL|egress_lossless_pool]",
|
||||
"size":"0",
|
||||
"static_th":"12766208"
|
||||
},
|
||||
"egress_lossy_profile": {
|
||||
"pool":"[BUFFER_POOL|egress_lossy_pool]",
|
||||
"size":"1518",
|
||||
"dynamic_th":"3"
|
||||
}
|
||||
},
|
||||
{%- endmacro %}
|
||||
@ -0,0 +1,45 @@
|
||||
{%- set default_cable = '300m' %}
|
||||
|
||||
{%- macro generate_port_lists(PORT_ALL) %}
|
||||
{# Generate list of ports #}
|
||||
{% for port_idx in range(0,32) %}
|
||||
{% if PORT_ALL.append("Ethernet%d" % (port_idx * 4)) %}{% endif %}
|
||||
{% endfor %}
|
||||
{%- endmacro %}
|
||||
|
||||
{%- macro generate_buffer_pool_and_profiles() %}
|
||||
"BUFFER_POOL": {
|
||||
"ingress_lossless_pool": {
|
||||
"size": "12766208",
|
||||
"type": "ingress",
|
||||
"mode": "dynamic"
|
||||
},
|
||||
"egress_lossless_pool": {
|
||||
"size": "12766208",
|
||||
"type": "egress",
|
||||
"mode": "static"
|
||||
},
|
||||
"egress_lossy_pool": {
|
||||
"size": "7326924",
|
||||
"type": "egress",
|
||||
"mode": "dynamic"
|
||||
}
|
||||
},
|
||||
"BUFFER_PROFILE": {
|
||||
"ingress_lossy_profile": {
|
||||
"pool":"[BUFFER_POOL|ingress_lossless_pool]",
|
||||
"size":"0",
|
||||
"dynamic_th":"3"
|
||||
},
|
||||
"egress_lossless_profile": {
|
||||
"pool":"[BUFFER_POOL|egress_lossless_pool]",
|
||||
"size":"0",
|
||||
"static_th":"12766208"
|
||||
},
|
||||
"egress_lossy_profile": {
|
||||
"pool":"[BUFFER_POOL|egress_lossy_pool]",
|
||||
"size":"1518",
|
||||
"dynamic_th":"3"
|
||||
}
|
||||
},
|
||||
{%- endmacro %}
|
||||
@ -0,0 +1,45 @@
|
||||
{%- set default_cable = '300m' %}
|
||||
|
||||
{%- macro generate_port_lists(PORT_ALL) %}
|
||||
{# Generate list of ports #}
|
||||
{% for port_idx in range(0,32) %}
|
||||
{% if PORT_ALL.append("Ethernet%d" % (port_idx * 4)) %}{% endif %}
|
||||
{% endfor %}
|
||||
{%- endmacro %}
|
||||
|
||||
{%- macro generate_buffer_pool_and_profiles() %}
|
||||
"BUFFER_POOL": {
|
||||
"ingress_lossless_pool": {
|
||||
"size": "12766208",
|
||||
"type": "ingress",
|
||||
"mode": "dynamic"
|
||||
},
|
||||
"egress_lossless_pool": {
|
||||
"size": "12766208",
|
||||
"type": "egress",
|
||||
"mode": "static"
|
||||
},
|
||||
"egress_lossy_pool": {
|
||||
"size": "7326924",
|
||||
"type": "egress",
|
||||
"mode": "dynamic"
|
||||
}
|
||||
},
|
||||
"BUFFER_PROFILE": {
|
||||
"ingress_lossy_profile": {
|
||||
"pool":"[BUFFER_POOL|ingress_lossless_pool]",
|
||||
"size":"0",
|
||||
"dynamic_th":"3"
|
||||
},
|
||||
"egress_lossless_profile": {
|
||||
"pool":"[BUFFER_POOL|egress_lossless_pool]",
|
||||
"size":"0",
|
||||
"static_th":"12766208"
|
||||
},
|
||||
"egress_lossy_profile": {
|
||||
"pool":"[BUFFER_POOL|egress_lossy_pool]",
|
||||
"size":"1518",
|
||||
"dynamic_th":"3"
|
||||
}
|
||||
},
|
||||
{%- endmacro %}
|
||||
@ -0,0 +1,8 @@
|
||||
eth1:1,2,3,4
|
||||
eth2:5,6,7,8
|
||||
eth3:9,10,11,12
|
||||
eth4:13,14,15,16
|
||||
eth5:17,18,19,20
|
||||
eth6:21,22,23,24
|
||||
eth7:25,26,27,28
|
||||
eth8:29,30,31,32
|
||||
@ -0,0 +1,17 @@
|
||||
# PG lossless profiles.
|
||||
# speed cable size xon xoff threshold xon_offset
|
||||
10000 5m 56368 18432 55120 -3 2496
|
||||
25000 5m 56368 18432 55120 -3 2496
|
||||
40000 5m 56368 18432 55120 -3 2496
|
||||
50000 5m 56368 18432 55120 -3 2496
|
||||
100000 5m 56368 18432 55120 -3 2496
|
||||
10000 40m 56368 18432 55120 -3 2496
|
||||
25000 40m 56368 18432 55120 -3 2496
|
||||
40000 40m 56368 18432 55120 -3 2496
|
||||
50000 40m 56368 18432 55120 -3 2496
|
||||
100000 40m 56368 18432 55120 -3 2496
|
||||
10000 300m 56368 18432 55120 -3 2496
|
||||
25000 300m 56368 18432 55120 -3 2496
|
||||
40000 300m 56368 18432 55120 -3 2496
|
||||
50000 300m 56368 18432 55120 -3 2496
|
||||
100000 300m 56368 18432 55120 -3 2496
|
||||
@ -0,0 +1,9 @@
|
||||
# name lanes alias index asic_port_name role
|
||||
Ethernet16 1,2,3,4 Ethernet1/5 4 Eth0-ASIC1 Ext
|
||||
Ethernet20 5,6,7,8 Ethernet1/6 5 Eth1-ASIC1 Ext
|
||||
Ethernet24 9,10,11,12 Ethernet1/7 6 Eth2-ASIC1 Ext
|
||||
Ethernet28 13,14,15,16 Ethernet1/8 7 Eth3-ASIC1 Ext
|
||||
Ethernet-BP16 17,18,19,20 Eth4-ASIC1 4 Eth4-ASIC1 Int
|
||||
Ethernet-BP20 21,22,23,24 Eth5-ASIC1 5 Eth5-ASIC1 Int
|
||||
Ethernet-BP24 25,26,27,28 Eth6-ASIC1 6 Eth6-ASIC1 Int
|
||||
Ethernet-BP28 29,30,31,32 Eth7-ASIC1 7 Eth7-ASIC1 Int
|
||||
@ -0,0 +1 @@
|
||||
{%- include 'qos_config.j2' %}
|
||||
@ -0,0 +1,3 @@
|
||||
SAI_VS_SWITCH_TYPE=SAI_VS_SWITCH_TYPE_BCM56850
|
||||
SAI_VS_HOSTIF_USE_TAP_DEVICE=true
|
||||
SAI_VS_INTERFACE_LANE_MAP_FILE=/usr/share/sonic/hwsku/lanemap.ini
|
||||
@ -0,0 +1,646 @@
|
||||
# Old LPM only configuration
|
||||
# l2_mem_entries=163840
|
||||
# l3_mem_entries=90112
|
||||
# l3_alpm_enable=0
|
||||
# ipv6_lpm_128b_enable=0
|
||||
#
|
||||
# ALPM enable
|
||||
l3_alpm_enable=2
|
||||
ipv6_lpm_128b_enable=1
|
||||
l2_mem_entries=32768
|
||||
l3_mem_entries=16384
|
||||
|
||||
# From old config file
|
||||
os=unix
|
||||
higig2_hdr_mode=1
|
||||
|
||||
# Parity
|
||||
parity_correction=1
|
||||
parity_enable=1
|
||||
stat_if_parity_enable=0
|
||||
|
||||
#
|
||||
bcm_num_cos=10
|
||||
bcm_stat_interval=2000000
|
||||
l2xmsg_hostbuf_size=8192
|
||||
l2xmsg_mode=1
|
||||
lls_num_l2uc=12
|
||||
max_vp_lags=0
|
||||
miim_intr_enable=0
|
||||
mmu_lossless=0
|
||||
module_64ports=0
|
||||
schan_intr_enable=0
|
||||
stable_size=0x2000000
|
||||
tdma_timeout_usec=5000000
|
||||
|
||||
pbmp_oversubscribe=0x000007fffffffffffffffffffffffffe
|
||||
pbmp_xport_xe=0x000007fffffffffffffffffffffffffe
|
||||
|
||||
# Ports configuration
|
||||
# xe0 (40G)
|
||||
portmap_1=25:40
|
||||
xgxs_rx_lane_map_1=0x213
|
||||
xgxs_tx_lane_map_1=0x2031
|
||||
phy_xaui_rx_polarity_flip_1=0xe
|
||||
phy_xaui_tx_polarity_flip_1=0x2
|
||||
serdes_driver_current_lane0_xe0=0x5
|
||||
serdes_driver_current_lane1_xe0=0x5
|
||||
serdes_driver_current_lane2_xe0=0x5
|
||||
serdes_driver_current_lane3_xe0=0x5
|
||||
serdes_pre_driver_current_lane0_xe0=0x5
|
||||
serdes_pre_driver_current_lane1_xe0=0x5
|
||||
serdes_pre_driver_current_lane2_xe0=0x5
|
||||
serdes_pre_driver_current_lane3_xe0=0x5
|
||||
serdes_preemphasis_lane0_xe0=0xcad0
|
||||
serdes_preemphasis_lane1_xe0=0xc6e0
|
||||
serdes_preemphasis_lane2_xe0=0xc6e0
|
||||
serdes_preemphasis_lane3_xe0=0xd2b0
|
||||
|
||||
# xe1 (40G)
|
||||
portmap_2=29:40
|
||||
xgxs_rx_lane_map_2=0x213
|
||||
xgxs_tx_lane_map_2=0x213
|
||||
phy_xaui_rx_polarity_flip_2=0xc
|
||||
phy_xaui_tx_polarity_flip_2=0x9
|
||||
serdes_driver_current_lane0_xe1=0x6
|
||||
serdes_driver_current_lane1_xe1=0x7
|
||||
serdes_driver_current_lane2_xe1=0x6
|
||||
serdes_driver_current_lane3_xe1=0x6
|
||||
serdes_pre_driver_current_lane0_xe1=0x6
|
||||
serdes_pre_driver_current_lane1_xe1=0x7
|
||||
serdes_pre_driver_current_lane2_xe1=0x6
|
||||
serdes_pre_driver_current_lane3_xe1=0x6
|
||||
serdes_preemphasis_lane0_xe1=0xc2f0
|
||||
serdes_preemphasis_lane1_xe1=0xd2b0
|
||||
serdes_preemphasis_lane2_xe1=0xc6e0
|
||||
serdes_preemphasis_lane3_xe1=0xc2f0
|
||||
|
||||
# xe2 (40G)
|
||||
portmap_3=33:40
|
||||
xgxs_rx_lane_map_3=0x213
|
||||
xgxs_tx_lane_map_3=0x132
|
||||
phy_xaui_rx_polarity_flip_3=0xe
|
||||
phy_xaui_tx_polarity_flip_3=0x2
|
||||
serdes_driver_current_lane0_xe2=0x4
|
||||
serdes_driver_current_lane1_xe2=0x4
|
||||
serdes_driver_current_lane2_xe2=0x4
|
||||
serdes_driver_current_lane3_xe2=0x4
|
||||
serdes_pre_driver_current_lane0_xe2=0x4
|
||||
serdes_pre_driver_current_lane1_xe2=0x4
|
||||
serdes_pre_driver_current_lane2_xe2=0x4
|
||||
serdes_pre_driver_current_lane3_xe2=0x4
|
||||
serdes_preemphasis_lane0_xe2=0xc6e0
|
||||
serdes_preemphasis_lane1_xe2=0xc6e0
|
||||
serdes_preemphasis_lane2_xe2=0xc6e0
|
||||
serdes_preemphasis_lane3_xe2=0xc6e0
|
||||
|
||||
# xe3 (40G)
|
||||
portmap_4=37:40
|
||||
xgxs_rx_lane_map_4=0x213
|
||||
xgxs_tx_lane_map_4=0x1203
|
||||
phy_xaui_rx_polarity_flip_4=0x3
|
||||
phy_xaui_tx_polarity_flip_4=0xe
|
||||
serdes_driver_current_lane0_xe3=0x4
|
||||
serdes_driver_current_lane1_xe3=0x4
|
||||
serdes_driver_current_lane2_xe3=0x4
|
||||
serdes_driver_current_lane3_xe3=0x4
|
||||
serdes_pre_driver_current_lane0_xe3=0x4
|
||||
serdes_pre_driver_current_lane1_xe3=0x4
|
||||
serdes_pre_driver_current_lane2_xe3=0x4
|
||||
serdes_pre_driver_current_lane3_xe3=0x4
|
||||
serdes_preemphasis_lane0_xe3=0xcad0
|
||||
serdes_preemphasis_lane1_xe3=0xcad0
|
||||
serdes_preemphasis_lane2_xe3=0xc2f0
|
||||
serdes_preemphasis_lane3_xe3=0xc2f0
|
||||
|
||||
# xe4 (40G)
|
||||
portmap_5=45:40
|
||||
xgxs_rx_lane_map_5=0x213
|
||||
xgxs_tx_lane_map_5=0x213
|
||||
phy_xaui_rx_polarity_flip_5=0xe
|
||||
phy_xaui_tx_polarity_flip_5=0x8
|
||||
serdes_driver_current_lane0_xe4=0x4
|
||||
serdes_driver_current_lane1_xe4=0x4
|
||||
serdes_driver_current_lane2_xe4=0x4
|
||||
serdes_driver_current_lane3_xe4=0x4
|
||||
serdes_pre_driver_current_lane0_xe4=0x4
|
||||
serdes_pre_driver_current_lane1_xe4=0x4
|
||||
serdes_pre_driver_current_lane2_xe4=0x4
|
||||
serdes_pre_driver_current_lane3_xe4=0x4
|
||||
serdes_preemphasis_lane0_xe4=0xc2f0
|
||||
serdes_preemphasis_lane1_xe4=0xc2f0
|
||||
serdes_preemphasis_lane2_xe4=0xc2f0
|
||||
serdes_preemphasis_lane3_xe4=0xc2f0
|
||||
|
||||
# xe5 (40G)
|
||||
portmap_6=41:40
|
||||
xgxs_rx_lane_map_6=0x213
|
||||
xgxs_tx_lane_map_6=0x3021
|
||||
phy_xaui_rx_polarity_flip_6=0x3
|
||||
phy_xaui_tx_polarity_flip_6=0xb
|
||||
serdes_driver_current_lane0_xe5=0x4
|
||||
serdes_driver_current_lane1_xe5=0x4
|
||||
serdes_driver_current_lane2_xe5=0x4
|
||||
serdes_driver_current_lane3_xe5=0x4
|
||||
serdes_pre_driver_current_lane0_xe5=0x4
|
||||
serdes_pre_driver_current_lane1_xe5=0x4
|
||||
serdes_pre_driver_current_lane2_xe5=0x4
|
||||
serdes_pre_driver_current_lane3_xe5=0x4
|
||||
serdes_preemphasis_lane0_xe5=0xc6e0
|
||||
serdes_preemphasis_lane1_xe5=0xc2f0
|
||||
serdes_preemphasis_lane2_xe5=0xc2f0
|
||||
serdes_preemphasis_lane3_xe5=0xcad0
|
||||
|
||||
# xe6 (40G)
|
||||
portmap_7=1:40
|
||||
xgxs_rx_lane_map_7=0x213
|
||||
xgxs_tx_lane_map_7=0x2031
|
||||
phy_xaui_rx_polarity_flip_7=0xe
|
||||
phy_xaui_tx_polarity_flip_7=0xd
|
||||
serdes_driver_current_lane0_xe6=0x5
|
||||
serdes_driver_current_lane1_xe6=0x5
|
||||
serdes_driver_current_lane2_xe6=0x5
|
||||
serdes_driver_current_lane3_xe6=0x5
|
||||
serdes_pre_driver_current_lane0_xe6=0x5
|
||||
serdes_pre_driver_current_lane1_xe6=0x5
|
||||
serdes_pre_driver_current_lane2_xe6=0x5
|
||||
serdes_pre_driver_current_lane3_xe6=0x5
|
||||
serdes_preemphasis_lane0_xe6=0xc6e0
|
||||
serdes_preemphasis_lane1_xe6=0xcad0
|
||||
serdes_preemphasis_lane2_xe6=0xc6e0
|
||||
serdes_preemphasis_lane3_xe6=0xcad0
|
||||
|
||||
# xe7 (40G)
|
||||
portmap_8=5:40
|
||||
xgxs_rx_lane_map_8=0x213
|
||||
xgxs_tx_lane_map_8=0x1203
|
||||
phy_xaui_rx_polarity_flip_8=0xc
|
||||
phy_xaui_tx_polarity_flip_8=0x1
|
||||
serdes_driver_current_lane0_xe7=0x4
|
||||
serdes_driver_current_lane1_xe7=0x4
|
||||
serdes_driver_current_lane2_xe7=0x4
|
||||
serdes_driver_current_lane3_xe7=0x4
|
||||
serdes_pre_driver_current_lane0_xe7=0x4
|
||||
serdes_pre_driver_current_lane1_xe7=0x4
|
||||
serdes_pre_driver_current_lane2_xe7=0x4
|
||||
serdes_pre_driver_current_lane3_xe7=0x4
|
||||
serdes_preemphasis_lane0_xe7=0xc6e0
|
||||
serdes_preemphasis_lane1_xe7=0xc6e0
|
||||
serdes_preemphasis_lane2_xe7=0xc6e0
|
||||
serdes_preemphasis_lane3_xe7=0xc6e0
|
||||
|
||||
# xe8 (40G)
|
||||
portmap_9=13:40
|
||||
xgxs_rx_lane_map_9=0x213
|
||||
xgxs_tx_lane_map_9=0x132
|
||||
phy_xaui_rx_polarity_flip_9=0xe
|
||||
phy_xaui_tx_polarity_flip_9=0x0
|
||||
serdes_driver_current_lane0_xe8=0x2
|
||||
serdes_driver_current_lane1_xe8=0x3
|
||||
serdes_driver_current_lane2_xe8=0x2
|
||||
serdes_driver_current_lane3_xe8=0x2
|
||||
serdes_pre_driver_current_lane0_xe8=0x2
|
||||
serdes_pre_driver_current_lane1_xe8=0x3
|
||||
serdes_pre_driver_current_lane2_xe8=0x2
|
||||
serdes_pre_driver_current_lane3_xe8=0x2
|
||||
serdes_preemphasis_lane0_xe8=0xb270
|
||||
serdes_preemphasis_lane1_xe8=0xbb10
|
||||
serdes_preemphasis_lane2_xe8=0xb720
|
||||
serdes_preemphasis_lane3_xe8=0xb720
|
||||
|
||||
# xe9 (40G)
|
||||
portmap_10=9:40
|
||||
xgxs_rx_lane_map_10=0x3120
|
||||
xgxs_tx_lane_map_10=0x3021
|
||||
phy_xaui_rx_polarity_flip_10=0x0
|
||||
phy_xaui_tx_polarity_flip_10=0x4
|
||||
serdes_driver_current_lane0_xe9=0x3
|
||||
serdes_driver_current_lane1_xe9=0x3
|
||||
serdes_driver_current_lane2_xe9=0x3
|
||||
serdes_driver_current_lane3_xe9=0x3
|
||||
serdes_pre_driver_current_lane0_xe9=0x3
|
||||
serdes_pre_driver_current_lane1_xe9=0x3
|
||||
serdes_pre_driver_current_lane2_xe9=0x3
|
||||
serdes_pre_driver_current_lane3_xe9=0x3
|
||||
serdes_preemphasis_lane0_xe9=0xc2f0
|
||||
serdes_preemphasis_lane1_xe9=0xc6e0
|
||||
serdes_preemphasis_lane2_xe9=0xbf00
|
||||
serdes_preemphasis_lane3_xe9=0xc2f0
|
||||
|
||||
# xe10 (40G)
|
||||
portmap_11=17:40
|
||||
xgxs_rx_lane_map_11=0x213
|
||||
xgxs_tx_lane_map_11=0x132
|
||||
phy_xaui_rx_polarity_flip_11=0xe
|
||||
phy_xaui_tx_polarity_flip_11=0x0
|
||||
serdes_driver_current_lane0_xe10=0x2
|
||||
serdes_driver_current_lane1_xe10=0x2
|
||||
serdes_driver_current_lane2_xe10=0x2
|
||||
serdes_driver_current_lane3_xe10=0x2
|
||||
serdes_pre_driver_current_lane0_xe10=0x2
|
||||
serdes_pre_driver_current_lane1_xe10=0x2
|
||||
serdes_pre_driver_current_lane2_xe10=0x2
|
||||
serdes_pre_driver_current_lane3_xe10=0x2
|
||||
serdes_preemphasis_lane0_xe10=0xb330
|
||||
serdes_preemphasis_lane1_xe10=0xbb10
|
||||
serdes_preemphasis_lane2_xe10=0xbb10
|
||||
serdes_preemphasis_lane3_xe10=0xbb10
|
||||
|
||||
# xe11 (40G)
|
||||
portmap_12=21:40
|
||||
xgxs_rx_lane_map_12=0x123
|
||||
xgxs_tx_lane_map_12=0x1203
|
||||
phy_xaui_rx_polarity_flip_12=0xc
|
||||
phy_xaui_tx_polarity_flip_12=0xe
|
||||
serdes_driver_current_lane0_xe11=0x2
|
||||
serdes_driver_current_lane1_xe11=0x2
|
||||
serdes_driver_current_lane2_xe11=0x2
|
||||
serdes_driver_current_lane3_xe11=0x2
|
||||
serdes_pre_driver_current_lane0_xe11=0x2
|
||||
serdes_pre_driver_current_lane1_xe11=0x2
|
||||
serdes_pre_driver_current_lane2_xe11=0x2
|
||||
serdes_pre_driver_current_lane3_xe11=0x2
|
||||
serdes_preemphasis_lane0_xe11=0xb330
|
||||
serdes_preemphasis_lane1_xe11=0xb330
|
||||
serdes_preemphasis_lane2_xe11=0xb330
|
||||
serdes_preemphasis_lane3_xe11=0xb330
|
||||
|
||||
# xe12 (40G)
|
||||
portmap_13=53:40
|
||||
xgxs_rx_lane_map_13=0x213
|
||||
xgxs_tx_lane_map_13=0x231
|
||||
phy_xaui_rx_polarity_flip_13=0x1
|
||||
phy_xaui_tx_polarity_flip_13=0x0
|
||||
serdes_driver_current_lane0_xe12=0x2
|
||||
serdes_driver_current_lane1_xe12=0x2
|
||||
serdes_driver_current_lane2_xe12=0x2
|
||||
serdes_driver_current_lane3_xe12=0x2
|
||||
serdes_pre_driver_current_lane0_xe12=0x2
|
||||
serdes_pre_driver_current_lane1_xe12=0x2
|
||||
serdes_pre_driver_current_lane2_xe12=0x2
|
||||
serdes_pre_driver_current_lane3_xe12=0x2
|
||||
serdes_preemphasis_lane0_xe12=0xaf40
|
||||
serdes_preemphasis_lane1_xe12=0xaf40
|
||||
serdes_preemphasis_lane2_xe12=0xaf40
|
||||
serdes_preemphasis_lane3_xe12=0xaf40
|
||||
|
||||
# xe13 (40G)
|
||||
portmap_14=49:40
|
||||
xgxs_rx_lane_map_14=0x1302
|
||||
xgxs_tx_lane_map_14=0x2031
|
||||
phy_xaui_rx_polarity_flip_14=0xb
|
||||
phy_xaui_tx_polarity_flip_14=0x3
|
||||
serdes_driver_current_lane0_xe13=0x2
|
||||
serdes_driver_current_lane1_xe13=0x2
|
||||
serdes_driver_current_lane2_xe13=0x2
|
||||
serdes_driver_current_lane3_xe13=0x2
|
||||
serdes_pre_driver_current_lane0_xe13=0x2
|
||||
serdes_pre_driver_current_lane1_xe13=0x2
|
||||
serdes_pre_driver_current_lane2_xe13=0x2
|
||||
serdes_pre_driver_current_lane3_xe13=0x2
|
||||
serdes_preemphasis_lane0_xe13=0xa760
|
||||
serdes_preemphasis_lane1_xe13=0xa760
|
||||
serdes_preemphasis_lane2_xe13=0xa760
|
||||
serdes_preemphasis_lane3_xe13=0xa760
|
||||
|
||||
# xe14 (40G)
|
||||
portmap_15=57:40
|
||||
xgxs_rx_lane_map_15=0x213
|
||||
xgxs_tx_lane_map_15=0x2031
|
||||
phy_xaui_rx_polarity_flip_15=0x1
|
||||
phy_xaui_tx_polarity_flip_15=0x0
|
||||
serdes_driver_current_lane0_xe14=0x1
|
||||
serdes_driver_current_lane1_xe14=0x1
|
||||
serdes_driver_current_lane2_xe14=0x1
|
||||
serdes_driver_current_lane3_xe14=0x1
|
||||
serdes_pre_driver_current_lane0_xe14=0x1
|
||||
serdes_pre_driver_current_lane1_xe14=0x1
|
||||
serdes_pre_driver_current_lane2_xe14=0x1
|
||||
serdes_pre_driver_current_lane3_xe14=0x1
|
||||
serdes_preemphasis_lane0_xe14=0xa760
|
||||
serdes_preemphasis_lane1_xe14=0xa760
|
||||
serdes_preemphasis_lane2_xe14=0xa760
|
||||
serdes_preemphasis_lane3_xe14=0xa760
|
||||
|
||||
# xe15 (40G)
|
||||
portmap_16=61:40
|
||||
xgxs_rx_lane_map_16=0x132
|
||||
xgxs_tx_lane_map_16=0x213
|
||||
phy_xaui_rx_polarity_flip_16=0x0
|
||||
phy_xaui_tx_polarity_flip_16=0x0
|
||||
serdes_driver_current_lane0_xe15=0x2
|
||||
serdes_driver_current_lane1_xe15=0x2
|
||||
serdes_driver_current_lane2_xe15=0x2
|
||||
serdes_driver_current_lane3_xe15=0x2
|
||||
serdes_pre_driver_current_lane0_xe15=0x2
|
||||
serdes_pre_driver_current_lane1_xe15=0x2
|
||||
serdes_pre_driver_current_lane2_xe15=0x2
|
||||
serdes_pre_driver_current_lane3_xe15=0x2
|
||||
serdes_preemphasis_lane0_xe15=0xa760
|
||||
serdes_preemphasis_lane1_xe15=0xa760
|
||||
serdes_preemphasis_lane2_xe15=0xa760
|
||||
serdes_preemphasis_lane3_xe15=0xa760
|
||||
|
||||
# xe16 (40G)
|
||||
portmap_17=69:40
|
||||
xgxs_rx_lane_map_17=0x213
|
||||
xgxs_tx_lane_map_17=0x2130
|
||||
phy_xaui_rx_polarity_flip_17=0x1
|
||||
phy_xaui_tx_polarity_flip_17=0xf
|
||||
serdes_driver_current_lane0_xe16=0x1
|
||||
serdes_driver_current_lane1_xe16=0x1
|
||||
serdes_driver_current_lane2_xe16=0x1
|
||||
serdes_driver_current_lane3_xe16=0x1
|
||||
serdes_pre_driver_current_lane0_xe16=0x1
|
||||
serdes_pre_driver_current_lane1_xe16=0x1
|
||||
serdes_pre_driver_current_lane2_xe16=0x1
|
||||
serdes_pre_driver_current_lane3_xe16=0x1
|
||||
serdes_preemphasis_lane0_xe16=0xa760
|
||||
serdes_preemphasis_lane1_xe16=0xa760
|
||||
serdes_preemphasis_lane2_xe16=0xa760
|
||||
serdes_preemphasis_lane3_xe16=0xa760
|
||||
|
||||
# xe17 (40G)
|
||||
portmap_18=65:40
|
||||
xgxs_rx_lane_map_18=0x132
|
||||
xgxs_tx_lane_map_18=0x2031
|
||||
phy_xaui_rx_polarity_flip_18=0x3
|
||||
phy_xaui_tx_polarity_flip_18=0x9
|
||||
serdes_driver_current_lane0_xe17=0x1
|
||||
serdes_driver_current_lane1_xe17=0x1
|
||||
serdes_driver_current_lane2_xe17=0x1
|
||||
serdes_driver_current_lane3_xe17=0x1
|
||||
serdes_pre_driver_current_lane0_xe17=0x1
|
||||
serdes_pre_driver_current_lane1_xe17=0x1
|
||||
serdes_pre_driver_current_lane2_xe17=0x1
|
||||
serdes_pre_driver_current_lane3_xe17=0x1
|
||||
serdes_preemphasis_lane0_xe17=0xa370
|
||||
serdes_preemphasis_lane1_xe17=0xa370
|
||||
serdes_preemphasis_lane2_xe17=0xa370
|
||||
serdes_preemphasis_lane3_xe17=0xa370
|
||||
|
||||
# xe18 (40G)
|
||||
portmap_19=73:40
|
||||
xgxs_rx_lane_map_19=0x213
|
||||
xgxs_tx_lane_map_19=0x2031
|
||||
phy_xaui_rx_polarity_flip_19=0x1
|
||||
phy_xaui_tx_polarity_flip_19=0x0
|
||||
serdes_driver_current_lane0_xe18=0x2
|
||||
serdes_driver_current_lane1_xe18=0x2
|
||||
serdes_driver_current_lane2_xe18=0x2
|
||||
serdes_driver_current_lane3_xe18=0x2
|
||||
serdes_pre_driver_current_lane0_xe18=0x2
|
||||
serdes_pre_driver_current_lane1_xe18=0x2
|
||||
serdes_pre_driver_current_lane2_xe18=0x2
|
||||
serdes_pre_driver_current_lane3_xe18=0x2
|
||||
serdes_preemphasis_lane0_xe18=0xa760
|
||||
serdes_preemphasis_lane1_xe18=0xa760
|
||||
serdes_preemphasis_lane2_xe18=0xa760
|
||||
serdes_preemphasis_lane3_xe18=0xa760
|
||||
|
||||
# xe19 (40G)
|
||||
portmap_20=77:40
|
||||
xgxs_rx_lane_map_20=0x123
|
||||
xgxs_tx_lane_map_20=0x1203
|
||||
phy_xaui_rx_polarity_flip_20=0x3
|
||||
phy_xaui_tx_polarity_flip_20=0xe
|
||||
serdes_driver_current_lane0_xe19=0x2
|
||||
serdes_driver_current_lane1_xe19=0x2
|
||||
serdes_driver_current_lane2_xe19=0x2
|
||||
serdes_driver_current_lane3_xe19=0x2
|
||||
serdes_pre_driver_current_lane0_xe19=0x2
|
||||
serdes_pre_driver_current_lane1_xe19=0x2
|
||||
serdes_pre_driver_current_lane2_xe19=0x2
|
||||
serdes_pre_driver_current_lane3_xe19=0x2
|
||||
serdes_preemphasis_lane0_xe19=0xaf40
|
||||
serdes_preemphasis_lane1_xe19=0xaf40
|
||||
serdes_preemphasis_lane2_xe19=0xaf40
|
||||
serdes_preemphasis_lane3_xe19=0xaf40
|
||||
|
||||
# xe20 (40G)
|
||||
portmap_21=109:40
|
||||
xgxs_rx_lane_map_21=0x132
|
||||
xgxs_tx_lane_map_21=0x132
|
||||
phy_xaui_rx_polarity_flip_21=0x8
|
||||
phy_xaui_tx_polarity_flip_21=0x0
|
||||
serdes_driver_current_lane0_xe20=0x1
|
||||
serdes_driver_current_lane1_xe20=0x1
|
||||
serdes_driver_current_lane2_xe20=0x1
|
||||
serdes_driver_current_lane3_xe20=0x2
|
||||
serdes_pre_driver_current_lane0_xe20=0x1
|
||||
serdes_pre_driver_current_lane1_xe20=0x1
|
||||
serdes_pre_driver_current_lane2_xe20=0x1
|
||||
serdes_pre_driver_current_lane3_xe20=0x2
|
||||
serdes_preemphasis_lane0_xe20=0xb330
|
||||
serdes_preemphasis_lane1_xe20=0xb330
|
||||
serdes_preemphasis_lane2_xe20=0xb330
|
||||
serdes_preemphasis_lane3_xe20=0xbff0
|
||||
|
||||
# xe21 (40G)
|
||||
portmap_22=105:40
|
||||
xgxs_rx_lane_map_22=0x1320
|
||||
xgxs_tx_lane_map_22=0x3021
|
||||
phy_xaui_rx_polarity_flip_22=0xd
|
||||
phy_xaui_tx_polarity_flip_22=0xb
|
||||
serdes_driver_current_lane0_xe21=0x1
|
||||
serdes_driver_current_lane1_xe21=0x1
|
||||
serdes_driver_current_lane2_xe21=0x1
|
||||
serdes_driver_current_lane3_xe21=0x1
|
||||
serdes_pre_driver_current_lane0_xe21=0x1
|
||||
serdes_pre_driver_current_lane1_xe21=0x1
|
||||
serdes_pre_driver_current_lane2_xe21=0x1
|
||||
serdes_pre_driver_current_lane3_xe21=0x1
|
||||
serdes_preemphasis_lane0_xe21=0xb330
|
||||
serdes_preemphasis_lane1_xe21=0xb330
|
||||
serdes_preemphasis_lane2_xe21=0xb330
|
||||
serdes_preemphasis_lane3_xe21=0xb330
|
||||
|
||||
# xe22 (40G)
|
||||
portmap_23=113:40
|
||||
xgxs_rx_lane_map_23=0x132
|
||||
xgxs_tx_lane_map_23=0x132
|
||||
phy_xaui_rx_polarity_flip_23=0x8
|
||||
phy_xaui_tx_polarity_flip_23=0x0
|
||||
serdes_driver_current_lane0_xe22=0x1
|
||||
serdes_driver_current_lane1_xe22=0x1
|
||||
serdes_driver_current_lane2_xe22=0x1
|
||||
serdes_driver_current_lane3_xe22=0x1
|
||||
serdes_pre_driver_current_lane0_xe22=0x1
|
||||
serdes_pre_driver_current_lane1_xe22=0x1
|
||||
serdes_pre_driver_current_lane2_xe22=0x1
|
||||
serdes_pre_driver_current_lane3_xe22=0x1
|
||||
serdes_preemphasis_lane0_xe22=0xbb10
|
||||
serdes_preemphasis_lane1_xe22=0xbb10
|
||||
serdes_preemphasis_lane2_xe22=0xbb10
|
||||
serdes_preemphasis_lane3_xe22=0xc2f0
|
||||
|
||||
# xe23 (40G)
|
||||
portmap_24=117:40
|
||||
xgxs_rx_lane_map_24=0x231
|
||||
xgxs_tx_lane_map_24=0x1203
|
||||
phy_xaui_rx_polarity_flip_24=0x3
|
||||
phy_xaui_tx_polarity_flip_24=0xe
|
||||
serdes_driver_current_lane0_xe23=0x3
|
||||
serdes_driver_current_lane1_xe23=0x5
|
||||
serdes_driver_current_lane2_xe23=0x3
|
||||
serdes_driver_current_lane3_xe23=0x3
|
||||
serdes_pre_driver_current_lane0_xe23=0x3
|
||||
serdes_pre_driver_current_lane1_xe23=0x5
|
||||
serdes_pre_driver_current_lane2_xe23=0x3
|
||||
serdes_pre_driver_current_lane3_xe23=0x3
|
||||
serdes_preemphasis_lane0_xe23=0xc6e0
|
||||
serdes_preemphasis_lane1_xe23=0xc6e0
|
||||
serdes_preemphasis_lane2_xe23=0xc6e0
|
||||
serdes_preemphasis_lane3_xe23=0xc6e0
|
||||
|
||||
# xe24 (40G)
|
||||
portmap_25=125:40
|
||||
xgxs_rx_lane_map_25=0x132
|
||||
xgxs_tx_lane_map_25=0x132
|
||||
phy_xaui_rx_polarity_flip_25=0x8
|
||||
phy_xaui_tx_polarity_flip_25=0x0
|
||||
serdes_driver_current_lane0_xe24=0x4
|
||||
serdes_driver_current_lane1_xe24=0x4
|
||||
serdes_driver_current_lane2_xe24=0x4
|
||||
serdes_driver_current_lane3_xe24=0x4
|
||||
serdes_pre_driver_current_lane0_xe24=0x4
|
||||
serdes_pre_driver_current_lane1_xe24=0x4
|
||||
serdes_pre_driver_current_lane2_xe24=0x4
|
||||
serdes_pre_driver_current_lane3_xe24=0x4
|
||||
serdes_preemphasis_lane0_xe24=0xc6e0
|
||||
serdes_preemphasis_lane1_xe24=0xc6e0
|
||||
serdes_preemphasis_lane2_xe24=0xc6e0
|
||||
serdes_preemphasis_lane3_xe24=0xcec0
|
||||
|
||||
# xe25 (40G)
|
||||
portmap_26=121:40
|
||||
xgxs_rx_lane_map_26=0x1320
|
||||
xgxs_tx_lane_map_26=0x3021
|
||||
phy_xaui_rx_polarity_flip_26=0xd
|
||||
phy_xaui_tx_polarity_flip_26=0xb
|
||||
serdes_driver_current_lane0_xe25=0x4
|
||||
serdes_driver_current_lane1_xe25=0x4
|
||||
serdes_driver_current_lane2_xe25=0x4
|
||||
serdes_driver_current_lane3_xe25=0x4
|
||||
serdes_pre_driver_current_lane0_xe25=0x4
|
||||
serdes_pre_driver_current_lane1_xe25=0x4
|
||||
serdes_pre_driver_current_lane2_xe25=0x4
|
||||
serdes_pre_driver_current_lane3_xe25=0x4
|
||||
serdes_preemphasis_lane0_xe25=0xc6e0
|
||||
serdes_preemphasis_lane1_xe25=0xc6e0
|
||||
serdes_preemphasis_lane2_xe25=0xc6e0
|
||||
serdes_preemphasis_lane3_xe25=0xc6e0
|
||||
|
||||
# xe26 (40G)
|
||||
portmap_27=81:40
|
||||
xgxs_rx_lane_map_27=0x1320
|
||||
xgxs_tx_lane_map_27=0x2031
|
||||
phy_xaui_rx_polarity_flip_27=0x1
|
||||
phy_xaui_tx_polarity_flip_27=0x2
|
||||
serdes_driver_current_lane0_xe26=0x2
|
||||
serdes_driver_current_lane1_xe26=0x2
|
||||
serdes_driver_current_lane2_xe26=0x2
|
||||
serdes_driver_current_lane3_xe26=0x2
|
||||
serdes_pre_driver_current_lane0_xe26=0x2
|
||||
serdes_pre_driver_current_lane1_xe26=0x2
|
||||
serdes_pre_driver_current_lane2_xe26=0x2
|
||||
serdes_pre_driver_current_lane3_xe26=0x2
|
||||
serdes_preemphasis_lane0_xe26=0xbb10
|
||||
serdes_preemphasis_lane1_xe26=0xbb10
|
||||
serdes_preemphasis_lane2_xe26=0xbf00
|
||||
serdes_preemphasis_lane3_xe26=0xbb10
|
||||
|
||||
# xe27 (40G)
|
||||
portmap_28=85:40
|
||||
xgxs_rx_lane_map_28=0x213
|
||||
xgxs_tx_lane_map_28=0x1203
|
||||
phy_xaui_rx_polarity_flip_28=0xc
|
||||
phy_xaui_tx_polarity_flip_28=0xe
|
||||
serdes_driver_current_lane0_xe27=0x4
|
||||
serdes_driver_current_lane1_xe27=0x5
|
||||
serdes_driver_current_lane2_xe27=0x4
|
||||
serdes_driver_current_lane3_xe27=0x5
|
||||
serdes_pre_driver_current_lane0_xe27=0x4
|
||||
serdes_pre_driver_current_lane1_xe27=0x5
|
||||
serdes_pre_driver_current_lane2_xe27=0x4
|
||||
serdes_pre_driver_current_lane3_xe27=0x5
|
||||
serdes_preemphasis_lane0_xe27=0xc2f0
|
||||
serdes_preemphasis_lane1_xe27=0xc6e0
|
||||
serdes_preemphasis_lane2_xe27=0xc6e0
|
||||
serdes_preemphasis_lane3_xe27=0xc6e0
|
||||
|
||||
# xe28 (40G)
|
||||
portmap_29=93:40
|
||||
xgxs_rx_lane_map_29=0x1320
|
||||
xgxs_tx_lane_map_29=0x2031
|
||||
phy_xaui_rx_polarity_flip_29=0x1
|
||||
phy_xaui_tx_polarity_flip_29=0x2
|
||||
serdes_driver_current_lane0_xe28=0x4
|
||||
serdes_driver_current_lane1_xe28=0x4
|
||||
serdes_driver_current_lane2_xe28=0x4
|
||||
serdes_driver_current_lane3_xe28=0x4
|
||||
serdes_pre_driver_current_lane0_xe28=0x4
|
||||
serdes_pre_driver_current_lane1_xe28=0x4
|
||||
serdes_pre_driver_current_lane2_xe28=0x4
|
||||
serdes_pre_driver_current_lane3_xe28=0x4
|
||||
serdes_preemphasis_lane0_xe28=0xc2f0
|
||||
serdes_preemphasis_lane1_xe28=0xc2f0
|
||||
serdes_preemphasis_lane2_xe28=0xc2f0
|
||||
serdes_preemphasis_lane3_xe28=0xc2f0
|
||||
|
||||
# xe29 (40G)
|
||||
portmap_30=89:40
|
||||
xgxs_rx_lane_map_30=0x1320
|
||||
xgxs_tx_lane_map_30=0x3021
|
||||
phy_xaui_rx_polarity_flip_30=0x2
|
||||
phy_xaui_tx_polarity_flip_30=0xb
|
||||
serdes_driver_current_lane0_xe29=0x4
|
||||
serdes_driver_current_lane1_xe29=0x4
|
||||
serdes_driver_current_lane2_xe29=0x4
|
||||
serdes_driver_current_lane3_xe29=0x4
|
||||
serdes_pre_driver_current_lane0_xe29=0x4
|
||||
serdes_pre_driver_current_lane1_xe29=0x4
|
||||
serdes_pre_driver_current_lane2_xe29=0x4
|
||||
serdes_pre_driver_current_lane3_xe29=0x4
|
||||
serdes_preemphasis_lane0_xe29=0xcad0
|
||||
serdes_preemphasis_lane1_xe29=0xc6e0
|
||||
serdes_preemphasis_lane2_xe29=0xc6e0
|
||||
serdes_preemphasis_lane3_xe29=0xc6e0
|
||||
|
||||
# xe30 (40G)
|
||||
portmap_31=101:40
|
||||
xgxs_rx_lane_map_31=0x1320
|
||||
xgxs_tx_lane_map_31=0x1203
|
||||
phy_xaui_rx_polarity_flip_31=0x1
|
||||
phy_xaui_tx_polarity_flip_31=0x6
|
||||
serdes_driver_current_lane0_xe30=0x6
|
||||
serdes_driver_current_lane1_xe30=0x6
|
||||
serdes_driver_current_lane2_xe30=0x6
|
||||
serdes_driver_current_lane3_xe30=0x7
|
||||
serdes_pre_driver_current_lane0_xe30=0x6
|
||||
serdes_pre_driver_current_lane1_xe30=0x6
|
||||
serdes_pre_driver_current_lane2_xe30=0x6
|
||||
serdes_pre_driver_current_lane3_xe30=0x7
|
||||
serdes_preemphasis_lane0_xe30=0xcec0
|
||||
serdes_preemphasis_lane1_xe30=0xcec0
|
||||
serdes_preemphasis_lane2_xe30=0xcad0
|
||||
serdes_preemphasis_lane3_xe30=0xc6e0
|
||||
|
||||
# xe31 (40G)
|
||||
portmap_32=97:40
|
||||
xgxs_rx_lane_map_32=0x213
|
||||
xgxs_tx_lane_map_32=0x2031
|
||||
phy_xaui_rx_polarity_flip_32=0xc
|
||||
phy_xaui_tx_polarity_flip_32=0x3
|
||||
serdes_driver_current_lane0_xe31=0x5
|
||||
serdes_driver_current_lane1_xe31=0x5
|
||||
serdes_driver_current_lane2_xe31=0x5
|
||||
serdes_driver_current_lane3_xe31=0x5
|
||||
serdes_pre_driver_current_lane0_xe31=0x5
|
||||
serdes_pre_driver_current_lane1_xe31=0x5
|
||||
serdes_pre_driver_current_lane2_xe31=0x5
|
||||
serdes_pre_driver_current_lane3_xe31=0x5
|
||||
serdes_preemphasis_lane0_xe31=0xcad0
|
||||
serdes_preemphasis_lane1_xe31=0xcad0
|
||||
serdes_preemphasis_lane2_xe31=0xcad0
|
||||
serdes_preemphasis_lane3_xe31=0xcad0
|
||||
@ -0,0 +1,3 @@
|
||||
{%- set default_topo = 't1' %}
|
||||
{%- include 'buffers_config.j2' %}
|
||||
|
||||
@ -0,0 +1,45 @@
|
||||
{%- set default_cable = '300m' %}
|
||||
|
||||
{%- macro generate_port_lists(PORT_ALL) %}
|
||||
{# Generate list of ports #}
|
||||
{% for port_idx in range(0,32) %}
|
||||
{% if PORT_ALL.append("Ethernet%d" % (port_idx * 4)) %}{% endif %}
|
||||
{% endfor %}
|
||||
{%- endmacro %}
|
||||
|
||||
{%- macro generate_buffer_pool_and_profiles() %}
|
||||
"BUFFER_POOL": {
|
||||
"ingress_lossless_pool": {
|
||||
"size": "12766208",
|
||||
"type": "ingress",
|
||||
"mode": "dynamic"
|
||||
},
|
||||
"egress_lossless_pool": {
|
||||
"size": "12766208",
|
||||
"type": "egress",
|
||||
"mode": "static"
|
||||
},
|
||||
"egress_lossy_pool": {
|
||||
"size": "7326924",
|
||||
"type": "egress",
|
||||
"mode": "dynamic"
|
||||
}
|
||||
},
|
||||
"BUFFER_PROFILE": {
|
||||
"ingress_lossy_profile": {
|
||||
"pool":"[BUFFER_POOL|ingress_lossless_pool]",
|
||||
"size":"0",
|
||||
"dynamic_th":"3"
|
||||
},
|
||||
"egress_lossless_profile": {
|
||||
"pool":"[BUFFER_POOL|egress_lossless_pool]",
|
||||
"size":"0",
|
||||
"static_th":"12766208"
|
||||
},
|
||||
"egress_lossy_profile": {
|
||||
"pool":"[BUFFER_POOL|egress_lossy_pool]",
|
||||
"size":"1518",
|
||||
"dynamic_th":"3"
|
||||
}
|
||||
},
|
||||
{%- endmacro %}
|
||||
@ -0,0 +1,45 @@
|
||||
{%- set default_cable = '300m' %}
|
||||
|
||||
{%- macro generate_port_lists(PORT_ALL) %}
|
||||
{# Generate list of ports #}
|
||||
{% for port_idx in range(0,32) %}
|
||||
{% if PORT_ALL.append("Ethernet%d" % (port_idx * 4)) %}{% endif %}
|
||||
{% endfor %}
|
||||
{%- endmacro %}
|
||||
|
||||
{%- macro generate_buffer_pool_and_profiles() %}
|
||||
"BUFFER_POOL": {
|
||||
"ingress_lossless_pool": {
|
||||
"size": "12766208",
|
||||
"type": "ingress",
|
||||
"mode": "dynamic"
|
||||
},
|
||||
"egress_lossless_pool": {
|
||||
"size": "12766208",
|
||||
"type": "egress",
|
||||
"mode": "static"
|
||||
},
|
||||
"egress_lossy_pool": {
|
||||
"size": "7326924",
|
||||
"type": "egress",
|
||||
"mode": "dynamic"
|
||||
}
|
||||
},
|
||||
"BUFFER_PROFILE": {
|
||||
"ingress_lossy_profile": {
|
||||
"pool":"[BUFFER_POOL|ingress_lossless_pool]",
|
||||
"size":"0",
|
||||
"dynamic_th":"3"
|
||||
},
|
||||
"egress_lossless_profile": {
|
||||
"pool":"[BUFFER_POOL|egress_lossless_pool]",
|
||||
"size":"0",
|
||||
"static_th":"12766208"
|
||||
},
|
||||
"egress_lossy_profile": {
|
||||
"pool":"[BUFFER_POOL|egress_lossy_pool]",
|
||||
"size":"1518",
|
||||
"dynamic_th":"3"
|
||||
}
|
||||
},
|
||||
{%- endmacro %}
|
||||
@ -0,0 +1,45 @@
|
||||
{%- set default_cable = '300m' %}
|
||||
|
||||
{%- macro generate_port_lists(PORT_ALL) %}
|
||||
{# Generate list of ports #}
|
||||
{% for port_idx in range(0,32) %}
|
||||
{% if PORT_ALL.append("Ethernet%d" % (port_idx * 4)) %}{% endif %}
|
||||
{% endfor %}
|
||||
{%- endmacro %}
|
||||
|
||||
{%- macro generate_buffer_pool_and_profiles() %}
|
||||
"BUFFER_POOL": {
|
||||
"ingress_lossless_pool": {
|
||||
"size": "12766208",
|
||||
"type": "ingress",
|
||||
"mode": "dynamic"
|
||||
},
|
||||
"egress_lossless_pool": {
|
||||
"size": "12766208",
|
||||
"type": "egress",
|
||||
"mode": "static"
|
||||
},
|
||||
"egress_lossy_pool": {
|
||||
"size": "7326924",
|
||||
"type": "egress",
|
||||
"mode": "dynamic"
|
||||
}
|
||||
},
|
||||
"BUFFER_PROFILE": {
|
||||
"ingress_lossy_profile": {
|
||||
"pool":"[BUFFER_POOL|ingress_lossless_pool]",
|
||||
"size":"0",
|
||||
"dynamic_th":"3"
|
||||
},
|
||||
"egress_lossless_profile": {
|
||||
"pool":"[BUFFER_POOL|egress_lossless_pool]",
|
||||
"size":"0",
|
||||
"static_th":"12766208"
|
||||
},
|
||||
"egress_lossy_profile": {
|
||||
"pool":"[BUFFER_POOL|egress_lossy_pool]",
|
||||
"size":"1518",
|
||||
"dynamic_th":"3"
|
||||
}
|
||||
},
|
||||
{%- endmacro %}
|
||||
@ -0,0 +1,8 @@
|
||||
eth1:1,2,3,4
|
||||
eth2:5,6,7,8
|
||||
eth3:9,10,11,12
|
||||
eth4:13,14,15,16
|
||||
eth5:17,18,19,20
|
||||
eth6:21,22,23,24
|
||||
eth7:25,26,27,28
|
||||
eth8:29,30,31,32
|
||||
@ -0,0 +1,17 @@
|
||||
# PG lossless profiles.
|
||||
# speed cable size xon xoff threshold xon_offset
|
||||
10000 5m 56368 18432 55120 -3 2496
|
||||
25000 5m 56368 18432 55120 -3 2496
|
||||
40000 5m 56368 18432 55120 -3 2496
|
||||
50000 5m 56368 18432 55120 -3 2496
|
||||
100000 5m 56368 18432 55120 -3 2496
|
||||
10000 40m 56368 18432 55120 -3 2496
|
||||
25000 40m 56368 18432 55120 -3 2496
|
||||
40000 40m 56368 18432 55120 -3 2496
|
||||
50000 40m 56368 18432 55120 -3 2496
|
||||
100000 40m 56368 18432 55120 -3 2496
|
||||
10000 300m 56368 18432 55120 -3 2496
|
||||
25000 300m 56368 18432 55120 -3 2496
|
||||
40000 300m 56368 18432 55120 -3 2496
|
||||
50000 300m 56368 18432 55120 -3 2496
|
||||
100000 300m 56368 18432 55120 -3 2496
|
||||
@ -0,0 +1,9 @@
|
||||
# name lanes alias index asic_port_name role
|
||||
Ethernet-BP32 1,2,3,4 Eth0-ASIC2 8 Eth0-ASIC2 Int
|
||||
Ethernet-BP36 5,6,7,8 Eth1-ASIC2 9 Eth1-ASIC2 Int
|
||||
Ethernet-BP40 9,10,11,12 Eth2-ASIC2 10 Eth2-ASIC2 Int
|
||||
Ethernet-BP44 13,14,15,16 Eth3-ASIC2 11 Eth3-ASIC2 Int
|
||||
Ethernet-BP48 17,18,19,20 Eth4-ASIC2 12 Eth4-ASIC2 Int
|
||||
Ethernet-BP52 21,22,23,24 Eth5-ASIC2 13 Eth5-ASIC2 Int
|
||||
Ethernet-BP56 25,26,27,28 Eth6-ASIC2 14 Eth6-ASIC2 Int
|
||||
Ethernet-BP60 29,30,31,32 Eth7-ASIC2 15 Eth7-ASIC2 Int
|
||||
@ -0,0 +1 @@
|
||||
{%- include 'qos_config.j2' %}
|
||||
@ -0,0 +1,3 @@
|
||||
SAI_VS_SWITCH_TYPE=SAI_VS_SWITCH_TYPE_BCM56850
|
||||
SAI_VS_HOSTIF_USE_TAP_DEVICE=true
|
||||
SAI_VS_INTERFACE_LANE_MAP_FILE=/usr/share/sonic/hwsku/lanemap.ini
|
||||
@ -0,0 +1,646 @@
|
||||
# Old LPM only configuration
|
||||
# l2_mem_entries=163840
|
||||
# l3_mem_entries=90112
|
||||
# l3_alpm_enable=0
|
||||
# ipv6_lpm_128b_enable=0
|
||||
#
|
||||
# ALPM enable
|
||||
l3_alpm_enable=2
|
||||
ipv6_lpm_128b_enable=1
|
||||
l2_mem_entries=32768
|
||||
l3_mem_entries=16384
|
||||
|
||||
# From old config file
|
||||
os=unix
|
||||
higig2_hdr_mode=1
|
||||
|
||||
# Parity
|
||||
parity_correction=1
|
||||
parity_enable=1
|
||||
stat_if_parity_enable=0
|
||||
|
||||
#
|
||||
bcm_num_cos=10
|
||||
bcm_stat_interval=2000000
|
||||
l2xmsg_hostbuf_size=8192
|
||||
l2xmsg_mode=1
|
||||
lls_num_l2uc=12
|
||||
max_vp_lags=0
|
||||
miim_intr_enable=0
|
||||
mmu_lossless=0
|
||||
module_64ports=0
|
||||
schan_intr_enable=0
|
||||
stable_size=0x2000000
|
||||
tdma_timeout_usec=5000000
|
||||
|
||||
pbmp_oversubscribe=0x000007fffffffffffffffffffffffffe
|
||||
pbmp_xport_xe=0x000007fffffffffffffffffffffffffe
|
||||
|
||||
# Ports configuration
|
||||
# xe0 (40G)
|
||||
portmap_1=25:40
|
||||
xgxs_rx_lane_map_1=0x213
|
||||
xgxs_tx_lane_map_1=0x2031
|
||||
phy_xaui_rx_polarity_flip_1=0xe
|
||||
phy_xaui_tx_polarity_flip_1=0x2
|
||||
serdes_driver_current_lane0_xe0=0x5
|
||||
serdes_driver_current_lane1_xe0=0x5
|
||||
serdes_driver_current_lane2_xe0=0x5
|
||||
serdes_driver_current_lane3_xe0=0x5
|
||||
serdes_pre_driver_current_lane0_xe0=0x5
|
||||
serdes_pre_driver_current_lane1_xe0=0x5
|
||||
serdes_pre_driver_current_lane2_xe0=0x5
|
||||
serdes_pre_driver_current_lane3_xe0=0x5
|
||||
serdes_preemphasis_lane0_xe0=0xcad0
|
||||
serdes_preemphasis_lane1_xe0=0xc6e0
|
||||
serdes_preemphasis_lane2_xe0=0xc6e0
|
||||
serdes_preemphasis_lane3_xe0=0xd2b0
|
||||
|
||||
# xe1 (40G)
|
||||
portmap_2=29:40
|
||||
xgxs_rx_lane_map_2=0x213
|
||||
xgxs_tx_lane_map_2=0x213
|
||||
phy_xaui_rx_polarity_flip_2=0xc
|
||||
phy_xaui_tx_polarity_flip_2=0x9
|
||||
serdes_driver_current_lane0_xe1=0x6
|
||||
serdes_driver_current_lane1_xe1=0x7
|
||||
serdes_driver_current_lane2_xe1=0x6
|
||||
serdes_driver_current_lane3_xe1=0x6
|
||||
serdes_pre_driver_current_lane0_xe1=0x6
|
||||
serdes_pre_driver_current_lane1_xe1=0x7
|
||||
serdes_pre_driver_current_lane2_xe1=0x6
|
||||
serdes_pre_driver_current_lane3_xe1=0x6
|
||||
serdes_preemphasis_lane0_xe1=0xc2f0
|
||||
serdes_preemphasis_lane1_xe1=0xd2b0
|
||||
serdes_preemphasis_lane2_xe1=0xc6e0
|
||||
serdes_preemphasis_lane3_xe1=0xc2f0
|
||||
|
||||
# xe2 (40G)
|
||||
portmap_3=33:40
|
||||
xgxs_rx_lane_map_3=0x213
|
||||
xgxs_tx_lane_map_3=0x132
|
||||
phy_xaui_rx_polarity_flip_3=0xe
|
||||
phy_xaui_tx_polarity_flip_3=0x2
|
||||
serdes_driver_current_lane0_xe2=0x4
|
||||
serdes_driver_current_lane1_xe2=0x4
|
||||
serdes_driver_current_lane2_xe2=0x4
|
||||
serdes_driver_current_lane3_xe2=0x4
|
||||
serdes_pre_driver_current_lane0_xe2=0x4
|
||||
serdes_pre_driver_current_lane1_xe2=0x4
|
||||
serdes_pre_driver_current_lane2_xe2=0x4
|
||||
serdes_pre_driver_current_lane3_xe2=0x4
|
||||
serdes_preemphasis_lane0_xe2=0xc6e0
|
||||
serdes_preemphasis_lane1_xe2=0xc6e0
|
||||
serdes_preemphasis_lane2_xe2=0xc6e0
|
||||
serdes_preemphasis_lane3_xe2=0xc6e0
|
||||
|
||||
# xe3 (40G)
|
||||
portmap_4=37:40
|
||||
xgxs_rx_lane_map_4=0x213
|
||||
xgxs_tx_lane_map_4=0x1203
|
||||
phy_xaui_rx_polarity_flip_4=0x3
|
||||
phy_xaui_tx_polarity_flip_4=0xe
|
||||
serdes_driver_current_lane0_xe3=0x4
|
||||
serdes_driver_current_lane1_xe3=0x4
|
||||
serdes_driver_current_lane2_xe3=0x4
|
||||
serdes_driver_current_lane3_xe3=0x4
|
||||
serdes_pre_driver_current_lane0_xe3=0x4
|
||||
serdes_pre_driver_current_lane1_xe3=0x4
|
||||
serdes_pre_driver_current_lane2_xe3=0x4
|
||||
serdes_pre_driver_current_lane3_xe3=0x4
|
||||
serdes_preemphasis_lane0_xe3=0xcad0
|
||||
serdes_preemphasis_lane1_xe3=0xcad0
|
||||
serdes_preemphasis_lane2_xe3=0xc2f0
|
||||
serdes_preemphasis_lane3_xe3=0xc2f0
|
||||
|
||||
# xe4 (40G)
|
||||
portmap_5=45:40
|
||||
xgxs_rx_lane_map_5=0x213
|
||||
xgxs_tx_lane_map_5=0x213
|
||||
phy_xaui_rx_polarity_flip_5=0xe
|
||||
phy_xaui_tx_polarity_flip_5=0x8
|
||||
serdes_driver_current_lane0_xe4=0x4
|
||||
serdes_driver_current_lane1_xe4=0x4
|
||||
serdes_driver_current_lane2_xe4=0x4
|
||||
serdes_driver_current_lane3_xe4=0x4
|
||||
serdes_pre_driver_current_lane0_xe4=0x4
|
||||
serdes_pre_driver_current_lane1_xe4=0x4
|
||||
serdes_pre_driver_current_lane2_xe4=0x4
|
||||
serdes_pre_driver_current_lane3_xe4=0x4
|
||||
serdes_preemphasis_lane0_xe4=0xc2f0
|
||||
serdes_preemphasis_lane1_xe4=0xc2f0
|
||||
serdes_preemphasis_lane2_xe4=0xc2f0
|
||||
serdes_preemphasis_lane3_xe4=0xc2f0
|
||||
|
||||
# xe5 (40G)
|
||||
portmap_6=41:40
|
||||
xgxs_rx_lane_map_6=0x213
|
||||
xgxs_tx_lane_map_6=0x3021
|
||||
phy_xaui_rx_polarity_flip_6=0x3
|
||||
phy_xaui_tx_polarity_flip_6=0xb
|
||||
serdes_driver_current_lane0_xe5=0x4
|
||||
serdes_driver_current_lane1_xe5=0x4
|
||||
serdes_driver_current_lane2_xe5=0x4
|
||||
serdes_driver_current_lane3_xe5=0x4
|
||||
serdes_pre_driver_current_lane0_xe5=0x4
|
||||
serdes_pre_driver_current_lane1_xe5=0x4
|
||||
serdes_pre_driver_current_lane2_xe5=0x4
|
||||
serdes_pre_driver_current_lane3_xe5=0x4
|
||||
serdes_preemphasis_lane0_xe5=0xc6e0
|
||||
serdes_preemphasis_lane1_xe5=0xc2f0
|
||||
serdes_preemphasis_lane2_xe5=0xc2f0
|
||||
serdes_preemphasis_lane3_xe5=0xcad0
|
||||
|
||||
# xe6 (40G)
|
||||
portmap_7=1:40
|
||||
xgxs_rx_lane_map_7=0x213
|
||||
xgxs_tx_lane_map_7=0x2031
|
||||
phy_xaui_rx_polarity_flip_7=0xe
|
||||
phy_xaui_tx_polarity_flip_7=0xd
|
||||
serdes_driver_current_lane0_xe6=0x5
|
||||
serdes_driver_current_lane1_xe6=0x5
|
||||
serdes_driver_current_lane2_xe6=0x5
|
||||
serdes_driver_current_lane3_xe6=0x5
|
||||
serdes_pre_driver_current_lane0_xe6=0x5
|
||||
serdes_pre_driver_current_lane1_xe6=0x5
|
||||
serdes_pre_driver_current_lane2_xe6=0x5
|
||||
serdes_pre_driver_current_lane3_xe6=0x5
|
||||
serdes_preemphasis_lane0_xe6=0xc6e0
|
||||
serdes_preemphasis_lane1_xe6=0xcad0
|
||||
serdes_preemphasis_lane2_xe6=0xc6e0
|
||||
serdes_preemphasis_lane3_xe6=0xcad0
|
||||
|
||||
# xe7 (40G)
|
||||
portmap_8=5:40
|
||||
xgxs_rx_lane_map_8=0x213
|
||||
xgxs_tx_lane_map_8=0x1203
|
||||
phy_xaui_rx_polarity_flip_8=0xc
|
||||
phy_xaui_tx_polarity_flip_8=0x1
|
||||
serdes_driver_current_lane0_xe7=0x4
|
||||
serdes_driver_current_lane1_xe7=0x4
|
||||
serdes_driver_current_lane2_xe7=0x4
|
||||
serdes_driver_current_lane3_xe7=0x4
|
||||
serdes_pre_driver_current_lane0_xe7=0x4
|
||||
serdes_pre_driver_current_lane1_xe7=0x4
|
||||
serdes_pre_driver_current_lane2_xe7=0x4
|
||||
serdes_pre_driver_current_lane3_xe7=0x4
|
||||
serdes_preemphasis_lane0_xe7=0xc6e0
|
||||
serdes_preemphasis_lane1_xe7=0xc6e0
|
||||
serdes_preemphasis_lane2_xe7=0xc6e0
|
||||
serdes_preemphasis_lane3_xe7=0xc6e0
|
||||
|
||||
# xe8 (40G)
|
||||
portmap_9=13:40
|
||||
xgxs_rx_lane_map_9=0x213
|
||||
xgxs_tx_lane_map_9=0x132
|
||||
phy_xaui_rx_polarity_flip_9=0xe
|
||||
phy_xaui_tx_polarity_flip_9=0x0
|
||||
serdes_driver_current_lane0_xe8=0x2
|
||||
serdes_driver_current_lane1_xe8=0x3
|
||||
serdes_driver_current_lane2_xe8=0x2
|
||||
serdes_driver_current_lane3_xe8=0x2
|
||||
serdes_pre_driver_current_lane0_xe8=0x2
|
||||
serdes_pre_driver_current_lane1_xe8=0x3
|
||||
serdes_pre_driver_current_lane2_xe8=0x2
|
||||
serdes_pre_driver_current_lane3_xe8=0x2
|
||||
serdes_preemphasis_lane0_xe8=0xb270
|
||||
serdes_preemphasis_lane1_xe8=0xbb10
|
||||
serdes_preemphasis_lane2_xe8=0xb720
|
||||
serdes_preemphasis_lane3_xe8=0xb720
|
||||
|
||||
# xe9 (40G)
|
||||
portmap_10=9:40
|
||||
xgxs_rx_lane_map_10=0x3120
|
||||
xgxs_tx_lane_map_10=0x3021
|
||||
phy_xaui_rx_polarity_flip_10=0x0
|
||||
phy_xaui_tx_polarity_flip_10=0x4
|
||||
serdes_driver_current_lane0_xe9=0x3
|
||||
serdes_driver_current_lane1_xe9=0x3
|
||||
serdes_driver_current_lane2_xe9=0x3
|
||||
serdes_driver_current_lane3_xe9=0x3
|
||||
serdes_pre_driver_current_lane0_xe9=0x3
|
||||
serdes_pre_driver_current_lane1_xe9=0x3
|
||||
serdes_pre_driver_current_lane2_xe9=0x3
|
||||
serdes_pre_driver_current_lane3_xe9=0x3
|
||||
serdes_preemphasis_lane0_xe9=0xc2f0
|
||||
serdes_preemphasis_lane1_xe9=0xc6e0
|
||||
serdes_preemphasis_lane2_xe9=0xbf00
|
||||
serdes_preemphasis_lane3_xe9=0xc2f0
|
||||
|
||||
# xe10 (40G)
|
||||
portmap_11=17:40
|
||||
xgxs_rx_lane_map_11=0x213
|
||||
xgxs_tx_lane_map_11=0x132
|
||||
phy_xaui_rx_polarity_flip_11=0xe
|
||||
phy_xaui_tx_polarity_flip_11=0x0
|
||||
serdes_driver_current_lane0_xe10=0x2
|
||||
serdes_driver_current_lane1_xe10=0x2
|
||||
serdes_driver_current_lane2_xe10=0x2
|
||||
serdes_driver_current_lane3_xe10=0x2
|
||||
serdes_pre_driver_current_lane0_xe10=0x2
|
||||
serdes_pre_driver_current_lane1_xe10=0x2
|
||||
serdes_pre_driver_current_lane2_xe10=0x2
|
||||
serdes_pre_driver_current_lane3_xe10=0x2
|
||||
serdes_preemphasis_lane0_xe10=0xb330
|
||||
serdes_preemphasis_lane1_xe10=0xbb10
|
||||
serdes_preemphasis_lane2_xe10=0xbb10
|
||||
serdes_preemphasis_lane3_xe10=0xbb10
|
||||
|
||||
# xe11 (40G)
|
||||
portmap_12=21:40
|
||||
xgxs_rx_lane_map_12=0x123
|
||||
xgxs_tx_lane_map_12=0x1203
|
||||
phy_xaui_rx_polarity_flip_12=0xc
|
||||
phy_xaui_tx_polarity_flip_12=0xe
|
||||
serdes_driver_current_lane0_xe11=0x2
|
||||
serdes_driver_current_lane1_xe11=0x2
|
||||
serdes_driver_current_lane2_xe11=0x2
|
||||
serdes_driver_current_lane3_xe11=0x2
|
||||
serdes_pre_driver_current_lane0_xe11=0x2
|
||||
serdes_pre_driver_current_lane1_xe11=0x2
|
||||
serdes_pre_driver_current_lane2_xe11=0x2
|
||||
serdes_pre_driver_current_lane3_xe11=0x2
|
||||
serdes_preemphasis_lane0_xe11=0xb330
|
||||
serdes_preemphasis_lane1_xe11=0xb330
|
||||
serdes_preemphasis_lane2_xe11=0xb330
|
||||
serdes_preemphasis_lane3_xe11=0xb330
|
||||
|
||||
# xe12 (40G)
|
||||
portmap_13=53:40
|
||||
xgxs_rx_lane_map_13=0x213
|
||||
xgxs_tx_lane_map_13=0x231
|
||||
phy_xaui_rx_polarity_flip_13=0x1
|
||||
phy_xaui_tx_polarity_flip_13=0x0
|
||||
serdes_driver_current_lane0_xe12=0x2
|
||||
serdes_driver_current_lane1_xe12=0x2
|
||||
serdes_driver_current_lane2_xe12=0x2
|
||||
serdes_driver_current_lane3_xe12=0x2
|
||||
serdes_pre_driver_current_lane0_xe12=0x2
|
||||
serdes_pre_driver_current_lane1_xe12=0x2
|
||||
serdes_pre_driver_current_lane2_xe12=0x2
|
||||
serdes_pre_driver_current_lane3_xe12=0x2
|
||||
serdes_preemphasis_lane0_xe12=0xaf40
|
||||
serdes_preemphasis_lane1_xe12=0xaf40
|
||||
serdes_preemphasis_lane2_xe12=0xaf40
|
||||
serdes_preemphasis_lane3_xe12=0xaf40
|
||||
|
||||
# xe13 (40G)
|
||||
portmap_14=49:40
|
||||
xgxs_rx_lane_map_14=0x1302
|
||||
xgxs_tx_lane_map_14=0x2031
|
||||
phy_xaui_rx_polarity_flip_14=0xb
|
||||
phy_xaui_tx_polarity_flip_14=0x3
|
||||
serdes_driver_current_lane0_xe13=0x2
|
||||
serdes_driver_current_lane1_xe13=0x2
|
||||
serdes_driver_current_lane2_xe13=0x2
|
||||
serdes_driver_current_lane3_xe13=0x2
|
||||
serdes_pre_driver_current_lane0_xe13=0x2
|
||||
serdes_pre_driver_current_lane1_xe13=0x2
|
||||
serdes_pre_driver_current_lane2_xe13=0x2
|
||||
serdes_pre_driver_current_lane3_xe13=0x2
|
||||
serdes_preemphasis_lane0_xe13=0xa760
|
||||
serdes_preemphasis_lane1_xe13=0xa760
|
||||
serdes_preemphasis_lane2_xe13=0xa760
|
||||
serdes_preemphasis_lane3_xe13=0xa760
|
||||
|
||||
# xe14 (40G)
|
||||
portmap_15=57:40
|
||||
xgxs_rx_lane_map_15=0x213
|
||||
xgxs_tx_lane_map_15=0x2031
|
||||
phy_xaui_rx_polarity_flip_15=0x1
|
||||
phy_xaui_tx_polarity_flip_15=0x0
|
||||
serdes_driver_current_lane0_xe14=0x1
|
||||
serdes_driver_current_lane1_xe14=0x1
|
||||
serdes_driver_current_lane2_xe14=0x1
|
||||
serdes_driver_current_lane3_xe14=0x1
|
||||
serdes_pre_driver_current_lane0_xe14=0x1
|
||||
serdes_pre_driver_current_lane1_xe14=0x1
|
||||
serdes_pre_driver_current_lane2_xe14=0x1
|
||||
serdes_pre_driver_current_lane3_xe14=0x1
|
||||
serdes_preemphasis_lane0_xe14=0xa760
|
||||
serdes_preemphasis_lane1_xe14=0xa760
|
||||
serdes_preemphasis_lane2_xe14=0xa760
|
||||
serdes_preemphasis_lane3_xe14=0xa760
|
||||
|
||||
# xe15 (40G)
|
||||
portmap_16=61:40
|
||||
xgxs_rx_lane_map_16=0x132
|
||||
xgxs_tx_lane_map_16=0x213
|
||||
phy_xaui_rx_polarity_flip_16=0x0
|
||||
phy_xaui_tx_polarity_flip_16=0x0
|
||||
serdes_driver_current_lane0_xe15=0x2
|
||||
serdes_driver_current_lane1_xe15=0x2
|
||||
serdes_driver_current_lane2_xe15=0x2
|
||||
serdes_driver_current_lane3_xe15=0x2
|
||||
serdes_pre_driver_current_lane0_xe15=0x2
|
||||
serdes_pre_driver_current_lane1_xe15=0x2
|
||||
serdes_pre_driver_current_lane2_xe15=0x2
|
||||
serdes_pre_driver_current_lane3_xe15=0x2
|
||||
serdes_preemphasis_lane0_xe15=0xa760
|
||||
serdes_preemphasis_lane1_xe15=0xa760
|
||||
serdes_preemphasis_lane2_xe15=0xa760
|
||||
serdes_preemphasis_lane3_xe15=0xa760
|
||||
|
||||
# xe16 (40G)
|
||||
portmap_17=69:40
|
||||
xgxs_rx_lane_map_17=0x213
|
||||
xgxs_tx_lane_map_17=0x2130
|
||||
phy_xaui_rx_polarity_flip_17=0x1
|
||||
phy_xaui_tx_polarity_flip_17=0xf
|
||||
serdes_driver_current_lane0_xe16=0x1
|
||||
serdes_driver_current_lane1_xe16=0x1
|
||||
serdes_driver_current_lane2_xe16=0x1
|
||||
serdes_driver_current_lane3_xe16=0x1
|
||||
serdes_pre_driver_current_lane0_xe16=0x1
|
||||
serdes_pre_driver_current_lane1_xe16=0x1
|
||||
serdes_pre_driver_current_lane2_xe16=0x1
|
||||
serdes_pre_driver_current_lane3_xe16=0x1
|
||||
serdes_preemphasis_lane0_xe16=0xa760
|
||||
serdes_preemphasis_lane1_xe16=0xa760
|
||||
serdes_preemphasis_lane2_xe16=0xa760
|
||||
serdes_preemphasis_lane3_xe16=0xa760
|
||||
|
||||
# xe17 (40G)
|
||||
portmap_18=65:40
|
||||
xgxs_rx_lane_map_18=0x132
|
||||
xgxs_tx_lane_map_18=0x2031
|
||||
phy_xaui_rx_polarity_flip_18=0x3
|
||||
phy_xaui_tx_polarity_flip_18=0x9
|
||||
serdes_driver_current_lane0_xe17=0x1
|
||||
serdes_driver_current_lane1_xe17=0x1
|
||||
serdes_driver_current_lane2_xe17=0x1
|
||||
serdes_driver_current_lane3_xe17=0x1
|
||||
serdes_pre_driver_current_lane0_xe17=0x1
|
||||
serdes_pre_driver_current_lane1_xe17=0x1
|
||||
serdes_pre_driver_current_lane2_xe17=0x1
|
||||
serdes_pre_driver_current_lane3_xe17=0x1
|
||||
serdes_preemphasis_lane0_xe17=0xa370
|
||||
serdes_preemphasis_lane1_xe17=0xa370
|
||||
serdes_preemphasis_lane2_xe17=0xa370
|
||||
serdes_preemphasis_lane3_xe17=0xa370
|
||||
|
||||
# xe18 (40G)
|
||||
portmap_19=73:40
|
||||
xgxs_rx_lane_map_19=0x213
|
||||
xgxs_tx_lane_map_19=0x2031
|
||||
phy_xaui_rx_polarity_flip_19=0x1
|
||||
phy_xaui_tx_polarity_flip_19=0x0
|
||||
serdes_driver_current_lane0_xe18=0x2
|
||||
serdes_driver_current_lane1_xe18=0x2
|
||||
serdes_driver_current_lane2_xe18=0x2
|
||||
serdes_driver_current_lane3_xe18=0x2
|
||||
serdes_pre_driver_current_lane0_xe18=0x2
|
||||
serdes_pre_driver_current_lane1_xe18=0x2
|
||||
serdes_pre_driver_current_lane2_xe18=0x2
|
||||
serdes_pre_driver_current_lane3_xe18=0x2
|
||||
serdes_preemphasis_lane0_xe18=0xa760
|
||||
serdes_preemphasis_lane1_xe18=0xa760
|
||||
serdes_preemphasis_lane2_xe18=0xa760
|
||||
serdes_preemphasis_lane3_xe18=0xa760
|
||||
|
||||
# xe19 (40G)
|
||||
portmap_20=77:40
|
||||
xgxs_rx_lane_map_20=0x123
|
||||
xgxs_tx_lane_map_20=0x1203
|
||||
phy_xaui_rx_polarity_flip_20=0x3
|
||||
phy_xaui_tx_polarity_flip_20=0xe
|
||||
serdes_driver_current_lane0_xe19=0x2
|
||||
serdes_driver_current_lane1_xe19=0x2
|
||||
serdes_driver_current_lane2_xe19=0x2
|
||||
serdes_driver_current_lane3_xe19=0x2
|
||||
serdes_pre_driver_current_lane0_xe19=0x2
|
||||
serdes_pre_driver_current_lane1_xe19=0x2
|
||||
serdes_pre_driver_current_lane2_xe19=0x2
|
||||
serdes_pre_driver_current_lane3_xe19=0x2
|
||||
serdes_preemphasis_lane0_xe19=0xaf40
|
||||
serdes_preemphasis_lane1_xe19=0xaf40
|
||||
serdes_preemphasis_lane2_xe19=0xaf40
|
||||
serdes_preemphasis_lane3_xe19=0xaf40
|
||||
|
||||
# xe20 (40G)
|
||||
portmap_21=109:40
|
||||
xgxs_rx_lane_map_21=0x132
|
||||
xgxs_tx_lane_map_21=0x132
|
||||
phy_xaui_rx_polarity_flip_21=0x8
|
||||
phy_xaui_tx_polarity_flip_21=0x0
|
||||
serdes_driver_current_lane0_xe20=0x1
|
||||
serdes_driver_current_lane1_xe20=0x1
|
||||
serdes_driver_current_lane2_xe20=0x1
|
||||
serdes_driver_current_lane3_xe20=0x2
|
||||
serdes_pre_driver_current_lane0_xe20=0x1
|
||||
serdes_pre_driver_current_lane1_xe20=0x1
|
||||
serdes_pre_driver_current_lane2_xe20=0x1
|
||||
serdes_pre_driver_current_lane3_xe20=0x2
|
||||
serdes_preemphasis_lane0_xe20=0xb330
|
||||
serdes_preemphasis_lane1_xe20=0xb330
|
||||
serdes_preemphasis_lane2_xe20=0xb330
|
||||
serdes_preemphasis_lane3_xe20=0xbff0
|
||||
|
||||
# xe21 (40G)
|
||||
portmap_22=105:40
|
||||
xgxs_rx_lane_map_22=0x1320
|
||||
xgxs_tx_lane_map_22=0x3021
|
||||
phy_xaui_rx_polarity_flip_22=0xd
|
||||
phy_xaui_tx_polarity_flip_22=0xb
|
||||
serdes_driver_current_lane0_xe21=0x1
|
||||
serdes_driver_current_lane1_xe21=0x1
|
||||
serdes_driver_current_lane2_xe21=0x1
|
||||
serdes_driver_current_lane3_xe21=0x1
|
||||
serdes_pre_driver_current_lane0_xe21=0x1
|
||||
serdes_pre_driver_current_lane1_xe21=0x1
|
||||
serdes_pre_driver_current_lane2_xe21=0x1
|
||||
serdes_pre_driver_current_lane3_xe21=0x1
|
||||
serdes_preemphasis_lane0_xe21=0xb330
|
||||
serdes_preemphasis_lane1_xe21=0xb330
|
||||
serdes_preemphasis_lane2_xe21=0xb330
|
||||
serdes_preemphasis_lane3_xe21=0xb330
|
||||
|
||||
# xe22 (40G)
|
||||
portmap_23=113:40
|
||||
xgxs_rx_lane_map_23=0x132
|
||||
xgxs_tx_lane_map_23=0x132
|
||||
phy_xaui_rx_polarity_flip_23=0x8
|
||||
phy_xaui_tx_polarity_flip_23=0x0
|
||||
serdes_driver_current_lane0_xe22=0x1
|
||||
serdes_driver_current_lane1_xe22=0x1
|
||||
serdes_driver_current_lane2_xe22=0x1
|
||||
serdes_driver_current_lane3_xe22=0x1
|
||||
serdes_pre_driver_current_lane0_xe22=0x1
|
||||
serdes_pre_driver_current_lane1_xe22=0x1
|
||||
serdes_pre_driver_current_lane2_xe22=0x1
|
||||
serdes_pre_driver_current_lane3_xe22=0x1
|
||||
serdes_preemphasis_lane0_xe22=0xbb10
|
||||
serdes_preemphasis_lane1_xe22=0xbb10
|
||||
serdes_preemphasis_lane2_xe22=0xbb10
|
||||
serdes_preemphasis_lane3_xe22=0xc2f0
|
||||
|
||||
# xe23 (40G)
|
||||
portmap_24=117:40
|
||||
xgxs_rx_lane_map_24=0x231
|
||||
xgxs_tx_lane_map_24=0x1203
|
||||
phy_xaui_rx_polarity_flip_24=0x3
|
||||
phy_xaui_tx_polarity_flip_24=0xe
|
||||
serdes_driver_current_lane0_xe23=0x3
|
||||
serdes_driver_current_lane1_xe23=0x5
|
||||
serdes_driver_current_lane2_xe23=0x3
|
||||
serdes_driver_current_lane3_xe23=0x3
|
||||
serdes_pre_driver_current_lane0_xe23=0x3
|
||||
serdes_pre_driver_current_lane1_xe23=0x5
|
||||
serdes_pre_driver_current_lane2_xe23=0x3
|
||||
serdes_pre_driver_current_lane3_xe23=0x3
|
||||
serdes_preemphasis_lane0_xe23=0xc6e0
|
||||
serdes_preemphasis_lane1_xe23=0xc6e0
|
||||
serdes_preemphasis_lane2_xe23=0xc6e0
|
||||
serdes_preemphasis_lane3_xe23=0xc6e0
|
||||
|
||||
# xe24 (40G)
|
||||
portmap_25=125:40
|
||||
xgxs_rx_lane_map_25=0x132
|
||||
xgxs_tx_lane_map_25=0x132
|
||||
phy_xaui_rx_polarity_flip_25=0x8
|
||||
phy_xaui_tx_polarity_flip_25=0x0
|
||||
serdes_driver_current_lane0_xe24=0x4
|
||||
serdes_driver_current_lane1_xe24=0x4
|
||||
serdes_driver_current_lane2_xe24=0x4
|
||||
serdes_driver_current_lane3_xe24=0x4
|
||||
serdes_pre_driver_current_lane0_xe24=0x4
|
||||
serdes_pre_driver_current_lane1_xe24=0x4
|
||||
serdes_pre_driver_current_lane2_xe24=0x4
|
||||
serdes_pre_driver_current_lane3_xe24=0x4
|
||||
serdes_preemphasis_lane0_xe24=0xc6e0
|
||||
serdes_preemphasis_lane1_xe24=0xc6e0
|
||||
serdes_preemphasis_lane2_xe24=0xc6e0
|
||||
serdes_preemphasis_lane3_xe24=0xcec0
|
||||
|
||||
# xe25 (40G)
|
||||
portmap_26=121:40
|
||||
xgxs_rx_lane_map_26=0x1320
|
||||
xgxs_tx_lane_map_26=0x3021
|
||||
phy_xaui_rx_polarity_flip_26=0xd
|
||||
phy_xaui_tx_polarity_flip_26=0xb
|
||||
serdes_driver_current_lane0_xe25=0x4
|
||||
serdes_driver_current_lane1_xe25=0x4
|
||||
serdes_driver_current_lane2_xe25=0x4
|
||||
serdes_driver_current_lane3_xe25=0x4
|
||||
serdes_pre_driver_current_lane0_xe25=0x4
|
||||
serdes_pre_driver_current_lane1_xe25=0x4
|
||||
serdes_pre_driver_current_lane2_xe25=0x4
|
||||
serdes_pre_driver_current_lane3_xe25=0x4
|
||||
serdes_preemphasis_lane0_xe25=0xc6e0
|
||||
serdes_preemphasis_lane1_xe25=0xc6e0
|
||||
serdes_preemphasis_lane2_xe25=0xc6e0
|
||||
serdes_preemphasis_lane3_xe25=0xc6e0
|
||||
|
||||
# xe26 (40G)
|
||||
portmap_27=81:40
|
||||
xgxs_rx_lane_map_27=0x1320
|
||||
xgxs_tx_lane_map_27=0x2031
|
||||
phy_xaui_rx_polarity_flip_27=0x1
|
||||
phy_xaui_tx_polarity_flip_27=0x2
|
||||
serdes_driver_current_lane0_xe26=0x2
|
||||
serdes_driver_current_lane1_xe26=0x2
|
||||
serdes_driver_current_lane2_xe26=0x2
|
||||
serdes_driver_current_lane3_xe26=0x2
|
||||
serdes_pre_driver_current_lane0_xe26=0x2
|
||||
serdes_pre_driver_current_lane1_xe26=0x2
|
||||
serdes_pre_driver_current_lane2_xe26=0x2
|
||||
serdes_pre_driver_current_lane3_xe26=0x2
|
||||
serdes_preemphasis_lane0_xe26=0xbb10
|
||||
serdes_preemphasis_lane1_xe26=0xbb10
|
||||
serdes_preemphasis_lane2_xe26=0xbf00
|
||||
serdes_preemphasis_lane3_xe26=0xbb10
|
||||
|
||||
# xe27 (40G)
|
||||
portmap_28=85:40
|
||||
xgxs_rx_lane_map_28=0x213
|
||||
xgxs_tx_lane_map_28=0x1203
|
||||
phy_xaui_rx_polarity_flip_28=0xc
|
||||
phy_xaui_tx_polarity_flip_28=0xe
|
||||
serdes_driver_current_lane0_xe27=0x4
|
||||
serdes_driver_current_lane1_xe27=0x5
|
||||
serdes_driver_current_lane2_xe27=0x4
|
||||
serdes_driver_current_lane3_xe27=0x5
|
||||
serdes_pre_driver_current_lane0_xe27=0x4
|
||||
serdes_pre_driver_current_lane1_xe27=0x5
|
||||
serdes_pre_driver_current_lane2_xe27=0x4
|
||||
serdes_pre_driver_current_lane3_xe27=0x5
|
||||
serdes_preemphasis_lane0_xe27=0xc2f0
|
||||
serdes_preemphasis_lane1_xe27=0xc6e0
|
||||
serdes_preemphasis_lane2_xe27=0xc6e0
|
||||
serdes_preemphasis_lane3_xe27=0xc6e0
|
||||
|
||||
# xe28 (40G)
|
||||
portmap_29=93:40
|
||||
xgxs_rx_lane_map_29=0x1320
|
||||
xgxs_tx_lane_map_29=0x2031
|
||||
phy_xaui_rx_polarity_flip_29=0x1
|
||||
phy_xaui_tx_polarity_flip_29=0x2
|
||||
serdes_driver_current_lane0_xe28=0x4
|
||||
serdes_driver_current_lane1_xe28=0x4
|
||||
serdes_driver_current_lane2_xe28=0x4
|
||||
serdes_driver_current_lane3_xe28=0x4
|
||||
serdes_pre_driver_current_lane0_xe28=0x4
|
||||
serdes_pre_driver_current_lane1_xe28=0x4
|
||||
serdes_pre_driver_current_lane2_xe28=0x4
|
||||
serdes_pre_driver_current_lane3_xe28=0x4
|
||||
serdes_preemphasis_lane0_xe28=0xc2f0
|
||||
serdes_preemphasis_lane1_xe28=0xc2f0
|
||||
serdes_preemphasis_lane2_xe28=0xc2f0
|
||||
serdes_preemphasis_lane3_xe28=0xc2f0
|
||||
|
||||
# xe29 (40G)
|
||||
portmap_30=89:40
|
||||
xgxs_rx_lane_map_30=0x1320
|
||||
xgxs_tx_lane_map_30=0x3021
|
||||
phy_xaui_rx_polarity_flip_30=0x2
|
||||
phy_xaui_tx_polarity_flip_30=0xb
|
||||
serdes_driver_current_lane0_xe29=0x4
|
||||
serdes_driver_current_lane1_xe29=0x4
|
||||
serdes_driver_current_lane2_xe29=0x4
|
||||
serdes_driver_current_lane3_xe29=0x4
|
||||
serdes_pre_driver_current_lane0_xe29=0x4
|
||||
serdes_pre_driver_current_lane1_xe29=0x4
|
||||
serdes_pre_driver_current_lane2_xe29=0x4
|
||||
serdes_pre_driver_current_lane3_xe29=0x4
|
||||
serdes_preemphasis_lane0_xe29=0xcad0
|
||||
serdes_preemphasis_lane1_xe29=0xc6e0
|
||||
serdes_preemphasis_lane2_xe29=0xc6e0
|
||||
serdes_preemphasis_lane3_xe29=0xc6e0
|
||||
|
||||
# xe30 (40G)
|
||||
portmap_31=101:40
|
||||
xgxs_rx_lane_map_31=0x1320
|
||||
xgxs_tx_lane_map_31=0x1203
|
||||
phy_xaui_rx_polarity_flip_31=0x1
|
||||
phy_xaui_tx_polarity_flip_31=0x6
|
||||
serdes_driver_current_lane0_xe30=0x6
|
||||
serdes_driver_current_lane1_xe30=0x6
|
||||
serdes_driver_current_lane2_xe30=0x6
|
||||
serdes_driver_current_lane3_xe30=0x7
|
||||
serdes_pre_driver_current_lane0_xe30=0x6
|
||||
serdes_pre_driver_current_lane1_xe30=0x6
|
||||
serdes_pre_driver_current_lane2_xe30=0x6
|
||||
serdes_pre_driver_current_lane3_xe30=0x7
|
||||
serdes_preemphasis_lane0_xe30=0xcec0
|
||||
serdes_preemphasis_lane1_xe30=0xcec0
|
||||
serdes_preemphasis_lane2_xe30=0xcad0
|
||||
serdes_preemphasis_lane3_xe30=0xc6e0
|
||||
|
||||
# xe31 (40G)
|
||||
portmap_32=97:40
|
||||
xgxs_rx_lane_map_32=0x213
|
||||
xgxs_tx_lane_map_32=0x2031
|
||||
phy_xaui_rx_polarity_flip_32=0xc
|
||||
phy_xaui_tx_polarity_flip_32=0x3
|
||||
serdes_driver_current_lane0_xe31=0x5
|
||||
serdes_driver_current_lane1_xe31=0x5
|
||||
serdes_driver_current_lane2_xe31=0x5
|
||||
serdes_driver_current_lane3_xe31=0x5
|
||||
serdes_pre_driver_current_lane0_xe31=0x5
|
||||
serdes_pre_driver_current_lane1_xe31=0x5
|
||||
serdes_pre_driver_current_lane2_xe31=0x5
|
||||
serdes_pre_driver_current_lane3_xe31=0x5
|
||||
serdes_preemphasis_lane0_xe31=0xcad0
|
||||
serdes_preemphasis_lane1_xe31=0xcad0
|
||||
serdes_preemphasis_lane2_xe31=0xcad0
|
||||
serdes_preemphasis_lane3_xe31=0xcad0
|
||||
@ -0,0 +1,3 @@
|
||||
{%- set default_topo = 't1' %}
|
||||
{%- include 'buffers_config.j2' %}
|
||||
|
||||
@ -0,0 +1,45 @@
|
||||
{%- set default_cable = '300m' %}
|
||||
|
||||
{%- macro generate_port_lists(PORT_ALL) %}
|
||||
{# Generate list of ports #}
|
||||
{% for port_idx in range(0,32) %}
|
||||
{% if PORT_ALL.append("Ethernet%d" % (port_idx * 4)) %}{% endif %}
|
||||
{% endfor %}
|
||||
{%- endmacro %}
|
||||
|
||||
{%- macro generate_buffer_pool_and_profiles() %}
|
||||
"BUFFER_POOL": {
|
||||
"ingress_lossless_pool": {
|
||||
"size": "12766208",
|
||||
"type": "ingress",
|
||||
"mode": "dynamic"
|
||||
},
|
||||
"egress_lossless_pool": {
|
||||
"size": "12766208",
|
||||
"type": "egress",
|
||||
"mode": "static"
|
||||
},
|
||||
"egress_lossy_pool": {
|
||||
"size": "7326924",
|
||||
"type": "egress",
|
||||
"mode": "dynamic"
|
||||
}
|
||||
},
|
||||
"BUFFER_PROFILE": {
|
||||
"ingress_lossy_profile": {
|
||||
"pool":"[BUFFER_POOL|ingress_lossless_pool]",
|
||||
"size":"0",
|
||||
"dynamic_th":"3"
|
||||
},
|
||||
"egress_lossless_profile": {
|
||||
"pool":"[BUFFER_POOL|egress_lossless_pool]",
|
||||
"size":"0",
|
||||
"static_th":"12766208"
|
||||
},
|
||||
"egress_lossy_profile": {
|
||||
"pool":"[BUFFER_POOL|egress_lossy_pool]",
|
||||
"size":"1518",
|
||||
"dynamic_th":"3"
|
||||
}
|
||||
},
|
||||
{%- endmacro %}
|
||||
@ -0,0 +1,45 @@
|
||||
{%- set default_cable = '300m' %}
|
||||
|
||||
{%- macro generate_port_lists(PORT_ALL) %}
|
||||
{# Generate list of ports #}
|
||||
{% for port_idx in range(0,32) %}
|
||||
{% if PORT_ALL.append("Ethernet%d" % (port_idx * 4)) %}{% endif %}
|
||||
{% endfor %}
|
||||
{%- endmacro %}
|
||||
|
||||
{%- macro generate_buffer_pool_and_profiles() %}
|
||||
"BUFFER_POOL": {
|
||||
"ingress_lossless_pool": {
|
||||
"size": "12766208",
|
||||
"type": "ingress",
|
||||
"mode": "dynamic"
|
||||
},
|
||||
"egress_lossless_pool": {
|
||||
"size": "12766208",
|
||||
"type": "egress",
|
||||
"mode": "static"
|
||||
},
|
||||
"egress_lossy_pool": {
|
||||
"size": "7326924",
|
||||
"type": "egress",
|
||||
"mode": "dynamic"
|
||||
}
|
||||
},
|
||||
"BUFFER_PROFILE": {
|
||||
"ingress_lossy_profile": {
|
||||
"pool":"[BUFFER_POOL|ingress_lossless_pool]",
|
||||
"size":"0",
|
||||
"dynamic_th":"3"
|
||||
},
|
||||
"egress_lossless_profile": {
|
||||
"pool":"[BUFFER_POOL|egress_lossless_pool]",
|
||||
"size":"0",
|
||||
"static_th":"12766208"
|
||||
},
|
||||
"egress_lossy_profile": {
|
||||
"pool":"[BUFFER_POOL|egress_lossy_pool]",
|
||||
"size":"1518",
|
||||
"dynamic_th":"3"
|
||||
}
|
||||
},
|
||||
{%- endmacro %}
|
||||
@ -0,0 +1,45 @@
|
||||
{%- set default_cable = '300m' %}
|
||||
|
||||
{%- macro generate_port_lists(PORT_ALL) %}
|
||||
{# Generate list of ports #}
|
||||
{% for port_idx in range(0,32) %}
|
||||
{% if PORT_ALL.append("Ethernet%d" % (port_idx * 4)) %}{% endif %}
|
||||
{% endfor %}
|
||||
{%- endmacro %}
|
||||
|
||||
{%- macro generate_buffer_pool_and_profiles() %}
|
||||
"BUFFER_POOL": {
|
||||
"ingress_lossless_pool": {
|
||||
"size": "12766208",
|
||||
"type": "ingress",
|
||||
"mode": "dynamic"
|
||||
},
|
||||
"egress_lossless_pool": {
|
||||
"size": "12766208",
|
||||
"type": "egress",
|
||||
"mode": "static"
|
||||
},
|
||||
"egress_lossy_pool": {
|
||||
"size": "7326924",
|
||||
"type": "egress",
|
||||
"mode": "dynamic"
|
||||
}
|
||||
},
|
||||
"BUFFER_PROFILE": {
|
||||
"ingress_lossy_profile": {
|
||||
"pool":"[BUFFER_POOL|ingress_lossless_pool]",
|
||||
"size":"0",
|
||||
"dynamic_th":"3"
|
||||
},
|
||||
"egress_lossless_profile": {
|
||||
"pool":"[BUFFER_POOL|egress_lossless_pool]",
|
||||
"size":"0",
|
||||
"static_th":"12766208"
|
||||
},
|
||||
"egress_lossy_profile": {
|
||||
"pool":"[BUFFER_POOL|egress_lossy_pool]",
|
||||
"size":"1518",
|
||||
"dynamic_th":"3"
|
||||
}
|
||||
},
|
||||
{%- endmacro %}
|
||||
@ -0,0 +1,8 @@
|
||||
eth1:1,2,3,4
|
||||
eth2:5,6,7,8
|
||||
eth3:9,10,11,12
|
||||
eth4:13,14,15,16
|
||||
eth5:17,18,19,20
|
||||
eth6:21,22,23,24
|
||||
eth7:25,26,27,28
|
||||
eth8:29,30,31,32
|
||||
@ -0,0 +1,17 @@
|
||||
# PG lossless profiles.
|
||||
# speed cable size xon xoff threshold xon_offset
|
||||
10000 5m 56368 18432 55120 -3 2496
|
||||
25000 5m 56368 18432 55120 -3 2496
|
||||
40000 5m 56368 18432 55120 -3 2496
|
||||
50000 5m 56368 18432 55120 -3 2496
|
||||
100000 5m 56368 18432 55120 -3 2496
|
||||
10000 40m 56368 18432 55120 -3 2496
|
||||
25000 40m 56368 18432 55120 -3 2496
|
||||
40000 40m 56368 18432 55120 -3 2496
|
||||
50000 40m 56368 18432 55120 -3 2496
|
||||
100000 40m 56368 18432 55120 -3 2496
|
||||
10000 300m 56368 18432 55120 -3 2496
|
||||
25000 300m 56368 18432 55120 -3 2496
|
||||
40000 300m 56368 18432 55120 -3 2496
|
||||
50000 300m 56368 18432 55120 -3 2496
|
||||
100000 300m 56368 18432 55120 -3 2496
|
||||
@ -0,0 +1,9 @@
|
||||
# name lanes alias index asic_port_name role
|
||||
Ethernet-BP64 1,2,3,4 Eth0-ASIC3 16 Eth0-ASIC3 Int
|
||||
Ethernet-BP68 5,6,7,8 Eth1-ASIC3 17 Eth1-ASIC3 Int
|
||||
Ethernet-BP72 9,10,11,12 Eth2-ASIC3 18 Eth2-ASIC3 Int
|
||||
Ethernet-BP76 13,14,15,16 Eth3-ASIC3 19 Eth3-ASIC3 Int
|
||||
Ethernet-BP80 17,18,19,20 Eth4-ASIC3 20 Eth4-ASIC3 Int
|
||||
Ethernet-BP84 21,22,23,24 Eth5-ASIC3 21 Eth5-ASIC3 Int
|
||||
Ethernet-BP92 25,26,27,28 Eth6-ASIC3 22 Eth6-ASIC3 Int
|
||||
Ethernet-BP96 29,30,31,32 Eth7-ASIC3 23 Eth7-ASIC3 Int
|
||||
@ -0,0 +1 @@
|
||||
{%- include 'qos_config.j2' %}
|
||||
@ -0,0 +1,3 @@
|
||||
SAI_VS_SWITCH_TYPE=SAI_VS_SWITCH_TYPE_BCM56850
|
||||
SAI_VS_HOSTIF_USE_TAP_DEVICE=true
|
||||
SAI_VS_INTERFACE_LANE_MAP_FILE=/usr/share/sonic/hwsku/lanemap.ini
|
||||
@ -0,0 +1,646 @@
|
||||
# Old LPM only configuration
|
||||
# l2_mem_entries=163840
|
||||
# l3_mem_entries=90112
|
||||
# l3_alpm_enable=0
|
||||
# ipv6_lpm_128b_enable=0
|
||||
#
|
||||
# ALPM enable
|
||||
l3_alpm_enable=2
|
||||
ipv6_lpm_128b_enable=1
|
||||
l2_mem_entries=32768
|
||||
l3_mem_entries=16384
|
||||
|
||||
# From old config file
|
||||
os=unix
|
||||
higig2_hdr_mode=1
|
||||
|
||||
# Parity
|
||||
parity_correction=1
|
||||
parity_enable=1
|
||||
stat_if_parity_enable=0
|
||||
|
||||
#
|
||||
bcm_num_cos=10
|
||||
bcm_stat_interval=2000000
|
||||
l2xmsg_hostbuf_size=8192
|
||||
l2xmsg_mode=1
|
||||
lls_num_l2uc=12
|
||||
max_vp_lags=0
|
||||
miim_intr_enable=0
|
||||
mmu_lossless=0
|
||||
module_64ports=0
|
||||
schan_intr_enable=0
|
||||
stable_size=0x2000000
|
||||
tdma_timeout_usec=5000000
|
||||
|
||||
pbmp_oversubscribe=0x000007fffffffffffffffffffffffffe
|
||||
pbmp_xport_xe=0x000007fffffffffffffffffffffffffe
|
||||
|
||||
# Ports configuration
|
||||
# xe0 (40G)
|
||||
portmap_1=25:40
|
||||
xgxs_rx_lane_map_1=0x213
|
||||
xgxs_tx_lane_map_1=0x2031
|
||||
phy_xaui_rx_polarity_flip_1=0xe
|
||||
phy_xaui_tx_polarity_flip_1=0x2
|
||||
serdes_driver_current_lane0_xe0=0x5
|
||||
serdes_driver_current_lane1_xe0=0x5
|
||||
serdes_driver_current_lane2_xe0=0x5
|
||||
serdes_driver_current_lane3_xe0=0x5
|
||||
serdes_pre_driver_current_lane0_xe0=0x5
|
||||
serdes_pre_driver_current_lane1_xe0=0x5
|
||||
serdes_pre_driver_current_lane2_xe0=0x5
|
||||
serdes_pre_driver_current_lane3_xe0=0x5
|
||||
serdes_preemphasis_lane0_xe0=0xcad0
|
||||
serdes_preemphasis_lane1_xe0=0xc6e0
|
||||
serdes_preemphasis_lane2_xe0=0xc6e0
|
||||
serdes_preemphasis_lane3_xe0=0xd2b0
|
||||
|
||||
# xe1 (40G)
|
||||
portmap_2=29:40
|
||||
xgxs_rx_lane_map_2=0x213
|
||||
xgxs_tx_lane_map_2=0x213
|
||||
phy_xaui_rx_polarity_flip_2=0xc
|
||||
phy_xaui_tx_polarity_flip_2=0x9
|
||||
serdes_driver_current_lane0_xe1=0x6
|
||||
serdes_driver_current_lane1_xe1=0x7
|
||||
serdes_driver_current_lane2_xe1=0x6
|
||||
serdes_driver_current_lane3_xe1=0x6
|
||||
serdes_pre_driver_current_lane0_xe1=0x6
|
||||
serdes_pre_driver_current_lane1_xe1=0x7
|
||||
serdes_pre_driver_current_lane2_xe1=0x6
|
||||
serdes_pre_driver_current_lane3_xe1=0x6
|
||||
serdes_preemphasis_lane0_xe1=0xc2f0
|
||||
serdes_preemphasis_lane1_xe1=0xd2b0
|
||||
serdes_preemphasis_lane2_xe1=0xc6e0
|
||||
serdes_preemphasis_lane3_xe1=0xc2f0
|
||||
|
||||
# xe2 (40G)
|
||||
portmap_3=33:40
|
||||
xgxs_rx_lane_map_3=0x213
|
||||
xgxs_tx_lane_map_3=0x132
|
||||
phy_xaui_rx_polarity_flip_3=0xe
|
||||
phy_xaui_tx_polarity_flip_3=0x2
|
||||
serdes_driver_current_lane0_xe2=0x4
|
||||
serdes_driver_current_lane1_xe2=0x4
|
||||
serdes_driver_current_lane2_xe2=0x4
|
||||
serdes_driver_current_lane3_xe2=0x4
|
||||
serdes_pre_driver_current_lane0_xe2=0x4
|
||||
serdes_pre_driver_current_lane1_xe2=0x4
|
||||
serdes_pre_driver_current_lane2_xe2=0x4
|
||||
serdes_pre_driver_current_lane3_xe2=0x4
|
||||
serdes_preemphasis_lane0_xe2=0xc6e0
|
||||
serdes_preemphasis_lane1_xe2=0xc6e0
|
||||
serdes_preemphasis_lane2_xe2=0xc6e0
|
||||
serdes_preemphasis_lane3_xe2=0xc6e0
|
||||
|
||||
# xe3 (40G)
|
||||
portmap_4=37:40
|
||||
xgxs_rx_lane_map_4=0x213
|
||||
xgxs_tx_lane_map_4=0x1203
|
||||
phy_xaui_rx_polarity_flip_4=0x3
|
||||
phy_xaui_tx_polarity_flip_4=0xe
|
||||
serdes_driver_current_lane0_xe3=0x4
|
||||
serdes_driver_current_lane1_xe3=0x4
|
||||
serdes_driver_current_lane2_xe3=0x4
|
||||
serdes_driver_current_lane3_xe3=0x4
|
||||
serdes_pre_driver_current_lane0_xe3=0x4
|
||||
serdes_pre_driver_current_lane1_xe3=0x4
|
||||
serdes_pre_driver_current_lane2_xe3=0x4
|
||||
serdes_pre_driver_current_lane3_xe3=0x4
|
||||
serdes_preemphasis_lane0_xe3=0xcad0
|
||||
serdes_preemphasis_lane1_xe3=0xcad0
|
||||
serdes_preemphasis_lane2_xe3=0xc2f0
|
||||
serdes_preemphasis_lane3_xe3=0xc2f0
|
||||
|
||||
# xe4 (40G)
|
||||
portmap_5=45:40
|
||||
xgxs_rx_lane_map_5=0x213
|
||||
xgxs_tx_lane_map_5=0x213
|
||||
phy_xaui_rx_polarity_flip_5=0xe
|
||||
phy_xaui_tx_polarity_flip_5=0x8
|
||||
serdes_driver_current_lane0_xe4=0x4
|
||||
serdes_driver_current_lane1_xe4=0x4
|
||||
serdes_driver_current_lane2_xe4=0x4
|
||||
serdes_driver_current_lane3_xe4=0x4
|
||||
serdes_pre_driver_current_lane0_xe4=0x4
|
||||
serdes_pre_driver_current_lane1_xe4=0x4
|
||||
serdes_pre_driver_current_lane2_xe4=0x4
|
||||
serdes_pre_driver_current_lane3_xe4=0x4
|
||||
serdes_preemphasis_lane0_xe4=0xc2f0
|
||||
serdes_preemphasis_lane1_xe4=0xc2f0
|
||||
serdes_preemphasis_lane2_xe4=0xc2f0
|
||||
serdes_preemphasis_lane3_xe4=0xc2f0
|
||||
|
||||
# xe5 (40G)
|
||||
portmap_6=41:40
|
||||
xgxs_rx_lane_map_6=0x213
|
||||
xgxs_tx_lane_map_6=0x3021
|
||||
phy_xaui_rx_polarity_flip_6=0x3
|
||||
phy_xaui_tx_polarity_flip_6=0xb
|
||||
serdes_driver_current_lane0_xe5=0x4
|
||||
serdes_driver_current_lane1_xe5=0x4
|
||||
serdes_driver_current_lane2_xe5=0x4
|
||||
serdes_driver_current_lane3_xe5=0x4
|
||||
serdes_pre_driver_current_lane0_xe5=0x4
|
||||
serdes_pre_driver_current_lane1_xe5=0x4
|
||||
serdes_pre_driver_current_lane2_xe5=0x4
|
||||
serdes_pre_driver_current_lane3_xe5=0x4
|
||||
serdes_preemphasis_lane0_xe5=0xc6e0
|
||||
serdes_preemphasis_lane1_xe5=0xc2f0
|
||||
serdes_preemphasis_lane2_xe5=0xc2f0
|
||||
serdes_preemphasis_lane3_xe5=0xcad0
|
||||
|
||||
# xe6 (40G)
|
||||
portmap_7=1:40
|
||||
xgxs_rx_lane_map_7=0x213
|
||||
xgxs_tx_lane_map_7=0x2031
|
||||
phy_xaui_rx_polarity_flip_7=0xe
|
||||
phy_xaui_tx_polarity_flip_7=0xd
|
||||
serdes_driver_current_lane0_xe6=0x5
|
||||
serdes_driver_current_lane1_xe6=0x5
|
||||
serdes_driver_current_lane2_xe6=0x5
|
||||
serdes_driver_current_lane3_xe6=0x5
|
||||
serdes_pre_driver_current_lane0_xe6=0x5
|
||||
serdes_pre_driver_current_lane1_xe6=0x5
|
||||
serdes_pre_driver_current_lane2_xe6=0x5
|
||||
serdes_pre_driver_current_lane3_xe6=0x5
|
||||
serdes_preemphasis_lane0_xe6=0xc6e0
|
||||
serdes_preemphasis_lane1_xe6=0xcad0
|
||||
serdes_preemphasis_lane2_xe6=0xc6e0
|
||||
serdes_preemphasis_lane3_xe6=0xcad0
|
||||
|
||||
# xe7 (40G)
|
||||
portmap_8=5:40
|
||||
xgxs_rx_lane_map_8=0x213
|
||||
xgxs_tx_lane_map_8=0x1203
|
||||
phy_xaui_rx_polarity_flip_8=0xc
|
||||
phy_xaui_tx_polarity_flip_8=0x1
|
||||
serdes_driver_current_lane0_xe7=0x4
|
||||
serdes_driver_current_lane1_xe7=0x4
|
||||
serdes_driver_current_lane2_xe7=0x4
|
||||
serdes_driver_current_lane3_xe7=0x4
|
||||
serdes_pre_driver_current_lane0_xe7=0x4
|
||||
serdes_pre_driver_current_lane1_xe7=0x4
|
||||
serdes_pre_driver_current_lane2_xe7=0x4
|
||||
serdes_pre_driver_current_lane3_xe7=0x4
|
||||
serdes_preemphasis_lane0_xe7=0xc6e0
|
||||
serdes_preemphasis_lane1_xe7=0xc6e0
|
||||
serdes_preemphasis_lane2_xe7=0xc6e0
|
||||
serdes_preemphasis_lane3_xe7=0xc6e0
|
||||
|
||||
# xe8 (40G)
|
||||
portmap_9=13:40
|
||||
xgxs_rx_lane_map_9=0x213
|
||||
xgxs_tx_lane_map_9=0x132
|
||||
phy_xaui_rx_polarity_flip_9=0xe
|
||||
phy_xaui_tx_polarity_flip_9=0x0
|
||||
serdes_driver_current_lane0_xe8=0x2
|
||||
serdes_driver_current_lane1_xe8=0x3
|
||||
serdes_driver_current_lane2_xe8=0x2
|
||||
serdes_driver_current_lane3_xe8=0x2
|
||||
serdes_pre_driver_current_lane0_xe8=0x2
|
||||
serdes_pre_driver_current_lane1_xe8=0x3
|
||||
serdes_pre_driver_current_lane2_xe8=0x2
|
||||
serdes_pre_driver_current_lane3_xe8=0x2
|
||||
serdes_preemphasis_lane0_xe8=0xb270
|
||||
serdes_preemphasis_lane1_xe8=0xbb10
|
||||
serdes_preemphasis_lane2_xe8=0xb720
|
||||
serdes_preemphasis_lane3_xe8=0xb720
|
||||
|
||||
# xe9 (40G)
|
||||
portmap_10=9:40
|
||||
xgxs_rx_lane_map_10=0x3120
|
||||
xgxs_tx_lane_map_10=0x3021
|
||||
phy_xaui_rx_polarity_flip_10=0x0
|
||||
phy_xaui_tx_polarity_flip_10=0x4
|
||||
serdes_driver_current_lane0_xe9=0x3
|
||||
serdes_driver_current_lane1_xe9=0x3
|
||||
serdes_driver_current_lane2_xe9=0x3
|
||||
serdes_driver_current_lane3_xe9=0x3
|
||||
serdes_pre_driver_current_lane0_xe9=0x3
|
||||
serdes_pre_driver_current_lane1_xe9=0x3
|
||||
serdes_pre_driver_current_lane2_xe9=0x3
|
||||
serdes_pre_driver_current_lane3_xe9=0x3
|
||||
serdes_preemphasis_lane0_xe9=0xc2f0
|
||||
serdes_preemphasis_lane1_xe9=0xc6e0
|
||||
serdes_preemphasis_lane2_xe9=0xbf00
|
||||
serdes_preemphasis_lane3_xe9=0xc2f0
|
||||
|
||||
# xe10 (40G)
|
||||
portmap_11=17:40
|
||||
xgxs_rx_lane_map_11=0x213
|
||||
xgxs_tx_lane_map_11=0x132
|
||||
phy_xaui_rx_polarity_flip_11=0xe
|
||||
phy_xaui_tx_polarity_flip_11=0x0
|
||||
serdes_driver_current_lane0_xe10=0x2
|
||||
serdes_driver_current_lane1_xe10=0x2
|
||||
serdes_driver_current_lane2_xe10=0x2
|
||||
serdes_driver_current_lane3_xe10=0x2
|
||||
serdes_pre_driver_current_lane0_xe10=0x2
|
||||
serdes_pre_driver_current_lane1_xe10=0x2
|
||||
serdes_pre_driver_current_lane2_xe10=0x2
|
||||
serdes_pre_driver_current_lane3_xe10=0x2
|
||||
serdes_preemphasis_lane0_xe10=0xb330
|
||||
serdes_preemphasis_lane1_xe10=0xbb10
|
||||
serdes_preemphasis_lane2_xe10=0xbb10
|
||||
serdes_preemphasis_lane3_xe10=0xbb10
|
||||
|
||||
# xe11 (40G)
|
||||
portmap_12=21:40
|
||||
xgxs_rx_lane_map_12=0x123
|
||||
xgxs_tx_lane_map_12=0x1203
|
||||
phy_xaui_rx_polarity_flip_12=0xc
|
||||
phy_xaui_tx_polarity_flip_12=0xe
|
||||
serdes_driver_current_lane0_xe11=0x2
|
||||
serdes_driver_current_lane1_xe11=0x2
|
||||
serdes_driver_current_lane2_xe11=0x2
|
||||
serdes_driver_current_lane3_xe11=0x2
|
||||
serdes_pre_driver_current_lane0_xe11=0x2
|
||||
serdes_pre_driver_current_lane1_xe11=0x2
|
||||
serdes_pre_driver_current_lane2_xe11=0x2
|
||||
serdes_pre_driver_current_lane3_xe11=0x2
|
||||
serdes_preemphasis_lane0_xe11=0xb330
|
||||
serdes_preemphasis_lane1_xe11=0xb330
|
||||
serdes_preemphasis_lane2_xe11=0xb330
|
||||
serdes_preemphasis_lane3_xe11=0xb330
|
||||
|
||||
# xe12 (40G)
|
||||
portmap_13=53:40
|
||||
xgxs_rx_lane_map_13=0x213
|
||||
xgxs_tx_lane_map_13=0x231
|
||||
phy_xaui_rx_polarity_flip_13=0x1
|
||||
phy_xaui_tx_polarity_flip_13=0x0
|
||||
serdes_driver_current_lane0_xe12=0x2
|
||||
serdes_driver_current_lane1_xe12=0x2
|
||||
serdes_driver_current_lane2_xe12=0x2
|
||||
serdes_driver_current_lane3_xe12=0x2
|
||||
serdes_pre_driver_current_lane0_xe12=0x2
|
||||
serdes_pre_driver_current_lane1_xe12=0x2
|
||||
serdes_pre_driver_current_lane2_xe12=0x2
|
||||
serdes_pre_driver_current_lane3_xe12=0x2
|
||||
serdes_preemphasis_lane0_xe12=0xaf40
|
||||
serdes_preemphasis_lane1_xe12=0xaf40
|
||||
serdes_preemphasis_lane2_xe12=0xaf40
|
||||
serdes_preemphasis_lane3_xe12=0xaf40
|
||||
|
||||
# xe13 (40G)
|
||||
portmap_14=49:40
|
||||
xgxs_rx_lane_map_14=0x1302
|
||||
xgxs_tx_lane_map_14=0x2031
|
||||
phy_xaui_rx_polarity_flip_14=0xb
|
||||
phy_xaui_tx_polarity_flip_14=0x3
|
||||
serdes_driver_current_lane0_xe13=0x2
|
||||
serdes_driver_current_lane1_xe13=0x2
|
||||
serdes_driver_current_lane2_xe13=0x2
|
||||
serdes_driver_current_lane3_xe13=0x2
|
||||
serdes_pre_driver_current_lane0_xe13=0x2
|
||||
serdes_pre_driver_current_lane1_xe13=0x2
|
||||
serdes_pre_driver_current_lane2_xe13=0x2
|
||||
serdes_pre_driver_current_lane3_xe13=0x2
|
||||
serdes_preemphasis_lane0_xe13=0xa760
|
||||
serdes_preemphasis_lane1_xe13=0xa760
|
||||
serdes_preemphasis_lane2_xe13=0xa760
|
||||
serdes_preemphasis_lane3_xe13=0xa760
|
||||
|
||||
# xe14 (40G)
|
||||
portmap_15=57:40
|
||||
xgxs_rx_lane_map_15=0x213
|
||||
xgxs_tx_lane_map_15=0x2031
|
||||
phy_xaui_rx_polarity_flip_15=0x1
|
||||
phy_xaui_tx_polarity_flip_15=0x0
|
||||
serdes_driver_current_lane0_xe14=0x1
|
||||
serdes_driver_current_lane1_xe14=0x1
|
||||
serdes_driver_current_lane2_xe14=0x1
|
||||
serdes_driver_current_lane3_xe14=0x1
|
||||
serdes_pre_driver_current_lane0_xe14=0x1
|
||||
serdes_pre_driver_current_lane1_xe14=0x1
|
||||
serdes_pre_driver_current_lane2_xe14=0x1
|
||||
serdes_pre_driver_current_lane3_xe14=0x1
|
||||
serdes_preemphasis_lane0_xe14=0xa760
|
||||
serdes_preemphasis_lane1_xe14=0xa760
|
||||
serdes_preemphasis_lane2_xe14=0xa760
|
||||
serdes_preemphasis_lane3_xe14=0xa760
|
||||
|
||||
# xe15 (40G)
|
||||
portmap_16=61:40
|
||||
xgxs_rx_lane_map_16=0x132
|
||||
xgxs_tx_lane_map_16=0x213
|
||||
phy_xaui_rx_polarity_flip_16=0x0
|
||||
phy_xaui_tx_polarity_flip_16=0x0
|
||||
serdes_driver_current_lane0_xe15=0x2
|
||||
serdes_driver_current_lane1_xe15=0x2
|
||||
serdes_driver_current_lane2_xe15=0x2
|
||||
serdes_driver_current_lane3_xe15=0x2
|
||||
serdes_pre_driver_current_lane0_xe15=0x2
|
||||
serdes_pre_driver_current_lane1_xe15=0x2
|
||||
serdes_pre_driver_current_lane2_xe15=0x2
|
||||
serdes_pre_driver_current_lane3_xe15=0x2
|
||||
serdes_preemphasis_lane0_xe15=0xa760
|
||||
serdes_preemphasis_lane1_xe15=0xa760
|
||||
serdes_preemphasis_lane2_xe15=0xa760
|
||||
serdes_preemphasis_lane3_xe15=0xa760
|
||||
|
||||
# xe16 (40G)
|
||||
portmap_17=69:40
|
||||
xgxs_rx_lane_map_17=0x213
|
||||
xgxs_tx_lane_map_17=0x2130
|
||||
phy_xaui_rx_polarity_flip_17=0x1
|
||||
phy_xaui_tx_polarity_flip_17=0xf
|
||||
serdes_driver_current_lane0_xe16=0x1
|
||||
serdes_driver_current_lane1_xe16=0x1
|
||||
serdes_driver_current_lane2_xe16=0x1
|
||||
serdes_driver_current_lane3_xe16=0x1
|
||||
serdes_pre_driver_current_lane0_xe16=0x1
|
||||
serdes_pre_driver_current_lane1_xe16=0x1
|
||||
serdes_pre_driver_current_lane2_xe16=0x1
|
||||
serdes_pre_driver_current_lane3_xe16=0x1
|
||||
serdes_preemphasis_lane0_xe16=0xa760
|
||||
serdes_preemphasis_lane1_xe16=0xa760
|
||||
serdes_preemphasis_lane2_xe16=0xa760
|
||||
serdes_preemphasis_lane3_xe16=0xa760
|
||||
|
||||
# xe17 (40G)
|
||||
portmap_18=65:40
|
||||
xgxs_rx_lane_map_18=0x132
|
||||
xgxs_tx_lane_map_18=0x2031
|
||||
phy_xaui_rx_polarity_flip_18=0x3
|
||||
phy_xaui_tx_polarity_flip_18=0x9
|
||||
serdes_driver_current_lane0_xe17=0x1
|
||||
serdes_driver_current_lane1_xe17=0x1
|
||||
serdes_driver_current_lane2_xe17=0x1
|
||||
serdes_driver_current_lane3_xe17=0x1
|
||||
serdes_pre_driver_current_lane0_xe17=0x1
|
||||
serdes_pre_driver_current_lane1_xe17=0x1
|
||||
serdes_pre_driver_current_lane2_xe17=0x1
|
||||
serdes_pre_driver_current_lane3_xe17=0x1
|
||||
serdes_preemphasis_lane0_xe17=0xa370
|
||||
serdes_preemphasis_lane1_xe17=0xa370
|
||||
serdes_preemphasis_lane2_xe17=0xa370
|
||||
serdes_preemphasis_lane3_xe17=0xa370
|
||||
|
||||
# xe18 (40G)
|
||||
portmap_19=73:40
|
||||
xgxs_rx_lane_map_19=0x213
|
||||
xgxs_tx_lane_map_19=0x2031
|
||||
phy_xaui_rx_polarity_flip_19=0x1
|
||||
phy_xaui_tx_polarity_flip_19=0x0
|
||||
serdes_driver_current_lane0_xe18=0x2
|
||||
serdes_driver_current_lane1_xe18=0x2
|
||||
serdes_driver_current_lane2_xe18=0x2
|
||||
serdes_driver_current_lane3_xe18=0x2
|
||||
serdes_pre_driver_current_lane0_xe18=0x2
|
||||
serdes_pre_driver_current_lane1_xe18=0x2
|
||||
serdes_pre_driver_current_lane2_xe18=0x2
|
||||
serdes_pre_driver_current_lane3_xe18=0x2
|
||||
serdes_preemphasis_lane0_xe18=0xa760
|
||||
serdes_preemphasis_lane1_xe18=0xa760
|
||||
serdes_preemphasis_lane2_xe18=0xa760
|
||||
serdes_preemphasis_lane3_xe18=0xa760
|
||||
|
||||
# xe19 (40G)
|
||||
portmap_20=77:40
|
||||
xgxs_rx_lane_map_20=0x123
|
||||
xgxs_tx_lane_map_20=0x1203
|
||||
phy_xaui_rx_polarity_flip_20=0x3
|
||||
phy_xaui_tx_polarity_flip_20=0xe
|
||||
serdes_driver_current_lane0_xe19=0x2
|
||||
serdes_driver_current_lane1_xe19=0x2
|
||||
serdes_driver_current_lane2_xe19=0x2
|
||||
serdes_driver_current_lane3_xe19=0x2
|
||||
serdes_pre_driver_current_lane0_xe19=0x2
|
||||
serdes_pre_driver_current_lane1_xe19=0x2
|
||||
serdes_pre_driver_current_lane2_xe19=0x2
|
||||
serdes_pre_driver_current_lane3_xe19=0x2
|
||||
serdes_preemphasis_lane0_xe19=0xaf40
|
||||
serdes_preemphasis_lane1_xe19=0xaf40
|
||||
serdes_preemphasis_lane2_xe19=0xaf40
|
||||
serdes_preemphasis_lane3_xe19=0xaf40
|
||||
|
||||
# xe20 (40G)
|
||||
portmap_21=109:40
|
||||
xgxs_rx_lane_map_21=0x132
|
||||
xgxs_tx_lane_map_21=0x132
|
||||
phy_xaui_rx_polarity_flip_21=0x8
|
||||
phy_xaui_tx_polarity_flip_21=0x0
|
||||
serdes_driver_current_lane0_xe20=0x1
|
||||
serdes_driver_current_lane1_xe20=0x1
|
||||
serdes_driver_current_lane2_xe20=0x1
|
||||
serdes_driver_current_lane3_xe20=0x2
|
||||
serdes_pre_driver_current_lane0_xe20=0x1
|
||||
serdes_pre_driver_current_lane1_xe20=0x1
|
||||
serdes_pre_driver_current_lane2_xe20=0x1
|
||||
serdes_pre_driver_current_lane3_xe20=0x2
|
||||
serdes_preemphasis_lane0_xe20=0xb330
|
||||
serdes_preemphasis_lane1_xe20=0xb330
|
||||
serdes_preemphasis_lane2_xe20=0xb330
|
||||
serdes_preemphasis_lane3_xe20=0xbff0
|
||||
|
||||
# xe21 (40G)
|
||||
portmap_22=105:40
|
||||
xgxs_rx_lane_map_22=0x1320
|
||||
xgxs_tx_lane_map_22=0x3021
|
||||
phy_xaui_rx_polarity_flip_22=0xd
|
||||
phy_xaui_tx_polarity_flip_22=0xb
|
||||
serdes_driver_current_lane0_xe21=0x1
|
||||
serdes_driver_current_lane1_xe21=0x1
|
||||
serdes_driver_current_lane2_xe21=0x1
|
||||
serdes_driver_current_lane3_xe21=0x1
|
||||
serdes_pre_driver_current_lane0_xe21=0x1
|
||||
serdes_pre_driver_current_lane1_xe21=0x1
|
||||
serdes_pre_driver_current_lane2_xe21=0x1
|
||||
serdes_pre_driver_current_lane3_xe21=0x1
|
||||
serdes_preemphasis_lane0_xe21=0xb330
|
||||
serdes_preemphasis_lane1_xe21=0xb330
|
||||
serdes_preemphasis_lane2_xe21=0xb330
|
||||
serdes_preemphasis_lane3_xe21=0xb330
|
||||
|
||||
# xe22 (40G)
|
||||
portmap_23=113:40
|
||||
xgxs_rx_lane_map_23=0x132
|
||||
xgxs_tx_lane_map_23=0x132
|
||||
phy_xaui_rx_polarity_flip_23=0x8
|
||||
phy_xaui_tx_polarity_flip_23=0x0
|
||||
serdes_driver_current_lane0_xe22=0x1
|
||||
serdes_driver_current_lane1_xe22=0x1
|
||||
serdes_driver_current_lane2_xe22=0x1
|
||||
serdes_driver_current_lane3_xe22=0x1
|
||||
serdes_pre_driver_current_lane0_xe22=0x1
|
||||
serdes_pre_driver_current_lane1_xe22=0x1
|
||||
serdes_pre_driver_current_lane2_xe22=0x1
|
||||
serdes_pre_driver_current_lane3_xe22=0x1
|
||||
serdes_preemphasis_lane0_xe22=0xbb10
|
||||
serdes_preemphasis_lane1_xe22=0xbb10
|
||||
serdes_preemphasis_lane2_xe22=0xbb10
|
||||
serdes_preemphasis_lane3_xe22=0xc2f0
|
||||
|
||||
# xe23 (40G)
|
||||
portmap_24=117:40
|
||||
xgxs_rx_lane_map_24=0x231
|
||||
xgxs_tx_lane_map_24=0x1203
|
||||
phy_xaui_rx_polarity_flip_24=0x3
|
||||
phy_xaui_tx_polarity_flip_24=0xe
|
||||
serdes_driver_current_lane0_xe23=0x3
|
||||
serdes_driver_current_lane1_xe23=0x5
|
||||
serdes_driver_current_lane2_xe23=0x3
|
||||
serdes_driver_current_lane3_xe23=0x3
|
||||
serdes_pre_driver_current_lane0_xe23=0x3
|
||||
serdes_pre_driver_current_lane1_xe23=0x5
|
||||
serdes_pre_driver_current_lane2_xe23=0x3
|
||||
serdes_pre_driver_current_lane3_xe23=0x3
|
||||
serdes_preemphasis_lane0_xe23=0xc6e0
|
||||
serdes_preemphasis_lane1_xe23=0xc6e0
|
||||
serdes_preemphasis_lane2_xe23=0xc6e0
|
||||
serdes_preemphasis_lane3_xe23=0xc6e0
|
||||
|
||||
# xe24 (40G)
|
||||
portmap_25=125:40
|
||||
xgxs_rx_lane_map_25=0x132
|
||||
xgxs_tx_lane_map_25=0x132
|
||||
phy_xaui_rx_polarity_flip_25=0x8
|
||||
phy_xaui_tx_polarity_flip_25=0x0
|
||||
serdes_driver_current_lane0_xe24=0x4
|
||||
serdes_driver_current_lane1_xe24=0x4
|
||||
serdes_driver_current_lane2_xe24=0x4
|
||||
serdes_driver_current_lane3_xe24=0x4
|
||||
serdes_pre_driver_current_lane0_xe24=0x4
|
||||
serdes_pre_driver_current_lane1_xe24=0x4
|
||||
serdes_pre_driver_current_lane2_xe24=0x4
|
||||
serdes_pre_driver_current_lane3_xe24=0x4
|
||||
serdes_preemphasis_lane0_xe24=0xc6e0
|
||||
serdes_preemphasis_lane1_xe24=0xc6e0
|
||||
serdes_preemphasis_lane2_xe24=0xc6e0
|
||||
serdes_preemphasis_lane3_xe24=0xcec0
|
||||
|
||||
# xe25 (40G)
|
||||
portmap_26=121:40
|
||||
xgxs_rx_lane_map_26=0x1320
|
||||
xgxs_tx_lane_map_26=0x3021
|
||||
phy_xaui_rx_polarity_flip_26=0xd
|
||||
phy_xaui_tx_polarity_flip_26=0xb
|
||||
serdes_driver_current_lane0_xe25=0x4
|
||||
serdes_driver_current_lane1_xe25=0x4
|
||||
serdes_driver_current_lane2_xe25=0x4
|
||||
serdes_driver_current_lane3_xe25=0x4
|
||||
serdes_pre_driver_current_lane0_xe25=0x4
|
||||
serdes_pre_driver_current_lane1_xe25=0x4
|
||||
serdes_pre_driver_current_lane2_xe25=0x4
|
||||
serdes_pre_driver_current_lane3_xe25=0x4
|
||||
serdes_preemphasis_lane0_xe25=0xc6e0
|
||||
serdes_preemphasis_lane1_xe25=0xc6e0
|
||||
serdes_preemphasis_lane2_xe25=0xc6e0
|
||||
serdes_preemphasis_lane3_xe25=0xc6e0
|
||||
|
||||
# xe26 (40G)
|
||||
portmap_27=81:40
|
||||
xgxs_rx_lane_map_27=0x1320
|
||||
xgxs_tx_lane_map_27=0x2031
|
||||
phy_xaui_rx_polarity_flip_27=0x1
|
||||
phy_xaui_tx_polarity_flip_27=0x2
|
||||
serdes_driver_current_lane0_xe26=0x2
|
||||
serdes_driver_current_lane1_xe26=0x2
|
||||
serdes_driver_current_lane2_xe26=0x2
|
||||
serdes_driver_current_lane3_xe26=0x2
|
||||
serdes_pre_driver_current_lane0_xe26=0x2
|
||||
serdes_pre_driver_current_lane1_xe26=0x2
|
||||
serdes_pre_driver_current_lane2_xe26=0x2
|
||||
serdes_pre_driver_current_lane3_xe26=0x2
|
||||
serdes_preemphasis_lane0_xe26=0xbb10
|
||||
serdes_preemphasis_lane1_xe26=0xbb10
|
||||
serdes_preemphasis_lane2_xe26=0xbf00
|
||||
serdes_preemphasis_lane3_xe26=0xbb10
|
||||
|
||||
# xe27 (40G)
|
||||
portmap_28=85:40
|
||||
xgxs_rx_lane_map_28=0x213
|
||||
xgxs_tx_lane_map_28=0x1203
|
||||
phy_xaui_rx_polarity_flip_28=0xc
|
||||
phy_xaui_tx_polarity_flip_28=0xe
|
||||
serdes_driver_current_lane0_xe27=0x4
|
||||
serdes_driver_current_lane1_xe27=0x5
|
||||
serdes_driver_current_lane2_xe27=0x4
|
||||
serdes_driver_current_lane3_xe27=0x5
|
||||
serdes_pre_driver_current_lane0_xe27=0x4
|
||||
serdes_pre_driver_current_lane1_xe27=0x5
|
||||
serdes_pre_driver_current_lane2_xe27=0x4
|
||||
serdes_pre_driver_current_lane3_xe27=0x5
|
||||
serdes_preemphasis_lane0_xe27=0xc2f0
|
||||
serdes_preemphasis_lane1_xe27=0xc6e0
|
||||
serdes_preemphasis_lane2_xe27=0xc6e0
|
||||
serdes_preemphasis_lane3_xe27=0xc6e0
|
||||
|
||||
# xe28 (40G)
|
||||
portmap_29=93:40
|
||||
xgxs_rx_lane_map_29=0x1320
|
||||
xgxs_tx_lane_map_29=0x2031
|
||||
phy_xaui_rx_polarity_flip_29=0x1
|
||||
phy_xaui_tx_polarity_flip_29=0x2
|
||||
serdes_driver_current_lane0_xe28=0x4
|
||||
serdes_driver_current_lane1_xe28=0x4
|
||||
serdes_driver_current_lane2_xe28=0x4
|
||||
serdes_driver_current_lane3_xe28=0x4
|
||||
serdes_pre_driver_current_lane0_xe28=0x4
|
||||
serdes_pre_driver_current_lane1_xe28=0x4
|
||||
serdes_pre_driver_current_lane2_xe28=0x4
|
||||
serdes_pre_driver_current_lane3_xe28=0x4
|
||||
serdes_preemphasis_lane0_xe28=0xc2f0
|
||||
serdes_preemphasis_lane1_xe28=0xc2f0
|
||||
serdes_preemphasis_lane2_xe28=0xc2f0
|
||||
serdes_preemphasis_lane3_xe28=0xc2f0
|
||||
|
||||
# xe29 (40G)
|
||||
portmap_30=89:40
|
||||
xgxs_rx_lane_map_30=0x1320
|
||||
xgxs_tx_lane_map_30=0x3021
|
||||
phy_xaui_rx_polarity_flip_30=0x2
|
||||
phy_xaui_tx_polarity_flip_30=0xb
|
||||
serdes_driver_current_lane0_xe29=0x4
|
||||
serdes_driver_current_lane1_xe29=0x4
|
||||
serdes_driver_current_lane2_xe29=0x4
|
||||
serdes_driver_current_lane3_xe29=0x4
|
||||
serdes_pre_driver_current_lane0_xe29=0x4
|
||||
serdes_pre_driver_current_lane1_xe29=0x4
|
||||
serdes_pre_driver_current_lane2_xe29=0x4
|
||||
serdes_pre_driver_current_lane3_xe29=0x4
|
||||
serdes_preemphasis_lane0_xe29=0xcad0
|
||||
serdes_preemphasis_lane1_xe29=0xc6e0
|
||||
serdes_preemphasis_lane2_xe29=0xc6e0
|
||||
serdes_preemphasis_lane3_xe29=0xc6e0
|
||||
|
||||
# xe30 (40G)
|
||||
portmap_31=101:40
|
||||
xgxs_rx_lane_map_31=0x1320
|
||||
xgxs_tx_lane_map_31=0x1203
|
||||
phy_xaui_rx_polarity_flip_31=0x1
|
||||
phy_xaui_tx_polarity_flip_31=0x6
|
||||
serdes_driver_current_lane0_xe30=0x6
|
||||
serdes_driver_current_lane1_xe30=0x6
|
||||
serdes_driver_current_lane2_xe30=0x6
|
||||
serdes_driver_current_lane3_xe30=0x7
|
||||
serdes_pre_driver_current_lane0_xe30=0x6
|
||||
serdes_pre_driver_current_lane1_xe30=0x6
|
||||
serdes_pre_driver_current_lane2_xe30=0x6
|
||||
serdes_pre_driver_current_lane3_xe30=0x7
|
||||
serdes_preemphasis_lane0_xe30=0xcec0
|
||||
serdes_preemphasis_lane1_xe30=0xcec0
|
||||
serdes_preemphasis_lane2_xe30=0xcad0
|
||||
serdes_preemphasis_lane3_xe30=0xc6e0
|
||||
|
||||
# xe31 (40G)
|
||||
portmap_32=97:40
|
||||
xgxs_rx_lane_map_32=0x213
|
||||
xgxs_tx_lane_map_32=0x2031
|
||||
phy_xaui_rx_polarity_flip_32=0xc
|
||||
phy_xaui_tx_polarity_flip_32=0x3
|
||||
serdes_driver_current_lane0_xe31=0x5
|
||||
serdes_driver_current_lane1_xe31=0x5
|
||||
serdes_driver_current_lane2_xe31=0x5
|
||||
serdes_driver_current_lane3_xe31=0x5
|
||||
serdes_pre_driver_current_lane0_xe31=0x5
|
||||
serdes_pre_driver_current_lane1_xe31=0x5
|
||||
serdes_pre_driver_current_lane2_xe31=0x5
|
||||
serdes_pre_driver_current_lane3_xe31=0x5
|
||||
serdes_preemphasis_lane0_xe31=0xcad0
|
||||
serdes_preemphasis_lane1_xe31=0xcad0
|
||||
serdes_preemphasis_lane2_xe31=0xcad0
|
||||
serdes_preemphasis_lane3_xe31=0xcad0
|
||||
85
device/virtual/x86_64-kvm_x86_64-r0/msft_four_asic_vs/topology.sh
Executable file
85
device/virtual/x86_64-kvm_x86_64-r0/msft_four_asic_vs/topology.sh
Executable file
@ -0,0 +1,85 @@
|
||||
#!/bin/bash
|
||||
# Topolgy script for 4 ASIC PLATFORM
|
||||
# 2 frontend asic , 2 backend asic.
|
||||
# 8 front-panel interfaces.
|
||||
FIRST_FRONTEND_ASIC=0
|
||||
LAST_FRONTEND_ASIC=1
|
||||
FIRST_BACKEND_ASIC=2
|
||||
LAST_BACKEND_ASIC=3
|
||||
NUM_INTERFACES_PER_ASIC=8
|
||||
|
||||
start () {
|
||||
# Move external links into assigned frontend namespaces
|
||||
# eth0 - eth15: asic2
|
||||
# eth16 - eth31: asic3
|
||||
# eth32 - eth47: asic4
|
||||
# eth48 - eth63: asic5
|
||||
for ASIC in `seq $FIRST_FRONTEND_ASIC $LAST_FRONTEND_ASIC`; do
|
||||
for NUM in `seq 1 4`; do
|
||||
ORIG="eth$((4 * $ASIC + $NUM))"
|
||||
TEMP="ethTemp999"
|
||||
NEW="eth$(($NUM))"
|
||||
echo "$ASIC : $NEW old $ORIG"
|
||||
ip link set dev $ORIG down
|
||||
ip link set dev $ORIG name $TEMP # rename to prevent conflicts before renaming in new namespace
|
||||
ip link set dev $TEMP netns asic$ASIC
|
||||
sudo ip netns exec asic$ASIC ip link set $TEMP name $NEW # rename too final interface name
|
||||
sudo ip netns exec asic$ASIC ip link set dev $NEW mtu 9100
|
||||
sudo ip netns exec asic$ASIC ip link set $NEW up
|
||||
done
|
||||
done
|
||||
|
||||
# Connect all backend namespaces to frontend namespaces
|
||||
for BACKEND in `seq $FIRST_BACKEND_ASIC $LAST_BACKEND_ASIC`; do
|
||||
for FRONTEND in `seq $FIRST_FRONTEND_ASIC $LAST_FRONTEND_ASIC`; do
|
||||
for LINK in `seq 1 2`; do
|
||||
FRONT_NAME="eth$((2 * $(($BACKEND - $FIRST_BACKEND_ASIC)) + $LINK + 4))"
|
||||
BACK_NAME="eth$((2 * $FRONTEND + $LINK))"
|
||||
echo "$FRONTEND:$FRONT_NAME - $BACKEND:$BACK_NAME"
|
||||
TEMP_BACK="ethBack999"
|
||||
TEMP_FRONT="ethFront999"
|
||||
ip link add $TEMP_BACK type veth peer name $TEMP_FRONT # temporary name to prevent conflicts between interfaces
|
||||
ip link set dev $TEMP_BACK netns asic$BACKEND
|
||||
ip link set dev $TEMP_FRONT netns asic$FRONTEND
|
||||
|
||||
sudo ip netns exec asic$BACKEND ip link set $TEMP_BACK name $BACK_NAME
|
||||
sudo ip netns exec asic$FRONTEND ip link set $TEMP_FRONT name $FRONT_NAME
|
||||
|
||||
sudo ip netns exec asic$BACKEND ip link set dev $BACK_NAME mtu 9100
|
||||
sudo ip netns exec asic$BACKEND ip link set $BACK_NAME up
|
||||
sudo ip netns exec asic$FRONTEND ip link set dev $FRONT_NAME mtu 9100
|
||||
sudo ip netns exec asic$FRONTEND ip link set $FRONT_NAME up
|
||||
done
|
||||
done
|
||||
done
|
||||
}
|
||||
stop() {
|
||||
for ASIC in `seq $FIRST_FRONTEND_ASIC $LAST_FRONTEND_ASIC`; do
|
||||
for NUM in `seq 1 4`; do
|
||||
TEMP="eth999"
|
||||
OLD="eth$(($NUM))"
|
||||
NAME="eth$((4 * $ASIC + $NUM))"
|
||||
sudo ip netns exec asic$ASIC ip link set dev $OLD down
|
||||
sudo ip netns exec asic$ASIC ip link set dev $OLD name $TEMP
|
||||
sudo ip netns exec asic$ASIC ip link set dev $TEMP netns 1
|
||||
ip link set dev $TEMP name $NAME
|
||||
ip link set dev $NAME up
|
||||
done
|
||||
done
|
||||
|
||||
for ASIC in `seq $FIRST_BACKEND_ASIC $LAST_BACKEND_ASIC`; do
|
||||
for NUM in `seq 1 4`; do
|
||||
sudo ip netns exec asic$ASIC ip link set dev eth$NUM down
|
||||
sudo ip netns exec asic$ASIC ip link delete dev eth$NUM
|
||||
done
|
||||
done
|
||||
}
|
||||
|
||||
case "$1" in
|
||||
start|stop)
|
||||
$1
|
||||
;;
|
||||
*)
|
||||
echo "Usage: $0 {start|stop}"
|
||||
;;
|
||||
esac
|
||||
Loading…
Reference in New Issue
Block a user