refactor bcm attribute checker (#1974)

* refactor bcm attribute checker

* exclude phy_84752 and phy_84328

Signed-off-by: Guohan Lu <gulv@microsoft.com>
This commit is contained in:
lguohan 2018-08-30 22:47:43 -07:00 committed by GitHub
parent 674b58e2a2
commit 26850b351f
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GPG Key ID: 4AEE18F83AFDEB23
2 changed files with 31 additions and 29 deletions

View File

@ -10,29 +10,9 @@ def usage():
sys.exit(1) sys.exit(1)
def check_property(p): def check_property(p):
if p in permitted_properties: if p in permitted_properties:
return True return True
# Try to remove trailing .<digits>
if re.sub(r".\d+$", "", p) in permitted_properties:
return True
# Try to remove trailing _<digits>.<digits>
if re.sub(r"_\d+.\d+$", "", p) in permitted_properties:
return True
# Try to remove trailing _hg.<digits>
if re.sub(r"_hg.0$", "", p) in permitted_properties:
return True
# Try to remove trailing _[cx]e<digits>
if re.sub(r"_[cx]e\d*$", "", p) in permitted_properties:
return True
# Try to remove trailing _lane<digit>_<digits>
if re.sub(r"_lane\d_\d+$", "", p) in permitted_properties:
return True
# Try to remove trailing _lane<digit>_<digits>.<digits>
if re.sub(r"_lane\d_\d+.\d+$", "", p) in permitted_properties:
return True
# Try to remove trailing _lane<digit>_[cx]e<digits>
if re.sub(r"_lane\d_[cx]e\d+$", "", p) in permitted_properties:
return True
return False return False
def check_file(file_name): def check_file(file_name):
@ -45,12 +25,27 @@ def check_file(file_name):
lineno = lineno + 1 lineno = lineno + 1
# Check both commented and uncommented lines # Check both commented and uncommented lines
line = line.strip().lstrip('#').strip().lower() line = line.strip().lstrip('#').strip().lower()
# Check if = in the line
if line.find("=") == -1: if line.find("=") == -1:
continue continue
p = line.split("=", 1)[0] p = line.split("=", 1)[0]
# Remove trailing "{<number>.<number>}"
p = re.sub('{[0-9]+\.[0-9]+}', '', p) # Remove trailing unit ".<number>$"
# Check if = in the line p = re.sub(r"\.[0-9]+$", '', p)
# Remove trailing port name
p = re.sub(r"_[cxg]e(\d+)?$", '', p)
# Remove trailing port name example
p = re.sub(r"_<port>$", '', p)
# Remove trailing port number
if p != "phy_84752" and p != "phy_84328":
p = re.sub(r"_(port)?\d+$", '', p)
# Remove trailing higig port
p = re.sub(r"_hg$", '', p)
# Remove trailing lane number
p = re.sub(r"_lane\d+$", '', p)
# Remove trailing "{<number>.<number>}$"
p = re.sub(r"{[0-9]+\.[0-9]+}$", '', p)
if not check_property(p): if not check_property(p):
file_ok = False file_ok = False
print("[line %d] Error: %s is not permitted" % (lineno, p)) print("[line %d] Error: %s is not permitted" % (lineno, p))

View File

@ -7,6 +7,9 @@ bcm_stat_interval
bcm_stat_jumbo bcm_stat_jumbo
bcm_tunnel_term_compatible_mode bcm_tunnel_term_compatible_mode
bcm_xlate_port_enable bcm_xlate_port_enable
bcm56340_4x10
bcm56340_2x10
bcm56340_config
cdma_timeout_usec cdma_timeout_usec
core_clock_frequency core_clock_frequency
ctr_evict_enable ctr_evict_enable
@ -59,7 +62,7 @@ oversubscribe_mode
parity_correction parity_correction
parity_enable parity_enable
pbmp_oversubscribe pbmp_oversubscribe
pbmp_xport_xe pbmp_xport
pci2eb_overrid pci2eb_overrid
pfc_deadlock_seq_control pfc_deadlock_seq_control
phy_84328 phy_84328
@ -69,31 +72,35 @@ phy_an_allow_pll_change_hg
phy_an_c37 phy_an_c37
phy_an_c73 phy_an_c73
phy_an_fec phy_an_fec
phy_automedium
phy_aux_voltage_enable phy_aux_voltage_enable
phy_chain_rx_lane_map_physical phy_chain_rx_lane_map_physical
phy_chain_rx_polarity_flip_physical phy_chain_rx_polarity_flip_physical
phy_chain_tx_lane_map_physical phy_chain_tx_lane_map_physical
phy_chain_tx_polarity_flip_physical phy_chain_tx_polarity_flip_physical
phy_ext_rom_boot phy_ext_rom_boot
phy_fiber_pref
phy_gearbox_enable phy_gearbox_enable
phy_null
phy_line_tx_mode phy_line_tx_mode
phy_pcs_rx_polarity_flip phy_pcs_rx_polarity_flip
phy_pcs_tx_polarity_flip phy_pcs_tx_polarity_flip
phy_port_primary_and_offset phy_port_primary_and_offset
phy_rx_polarity_flip phy_rx_polarity_flip
phy_system_tx_mode phy_system_tx_mode
phy_sgmii_autoneg
phy_tx_polarity_flip phy_tx_polarity_flip
phy_xaui_rx_polarity_flip phy_xaui_rx_polarity_flip
phy_xaui_tx_polarity_flip phy_xaui_tx_polarity_flip
physical_ports physical_ports
port_init_autoneg port_init_autoneg
port_init_cl72 port_init_cl72
port_init_cl72_hg port_init_speed
port_init_speed_xe
port_phy_addr port_phy_addr
port_phy_clause port_phy_clause
port_phy_id0 port_phy_id0
port_phy_id1 port_phy_id1
portgroup
portmap portmap
prbs_polynomial prbs_polynomial
ptp_bs_fref ptp_bs_fref
@ -113,7 +120,7 @@ serdes_firmware_mode
serdes_if_type serdes_if_type
serdes_pre_driver_current serdes_pre_driver_current
serdes_preemphasis serdes_preemphasis
serdes_rx_los_xe serdes_rx_los
serdes_sgmii_m serdes_sgmii_m
skip_L2_USER_ENTRY skip_L2_USER_ENTRY
sram_scan_enable sram_scan_enable
@ -129,6 +136,6 @@ tslam_intr_enable
tslam_timeout_usec tslam_timeout_usec
uplink_ports uplink_ports
xgxs_lcpll_xtal_refclk xgxs_lcpll_xtal_refclk
xgxs_pdetect_1 xgxs_pdetect
xgxs_rx_lane_map xgxs_rx_lane_map
xgxs_tx_lane_map xgxs_tx_lane_map