[nephos]: upgrade compile sdk.deb from online to dpkg and fix compile error (#2800)

* upgrade compile sdk.deb from online to dpkg and upgrade docker syncd and orchagent to stretch

* Delete docker-orchagent-nephos.mk

Delete docker-orchagent-nephos.mk

* Update docker-syncd-nephos.mk

* Update Dockerfile.j2
This commit is contained in:
simonJi2018 2019-04-30 09:25:40 +08:00 committed by lguohan
parent b9ddae8443
commit 259d51a94f
34 changed files with 14705 additions and 43 deletions

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@ -1,25 +1,13 @@
# docker image for nephos syncd
DOCKER_SYNCD_NEPHOS = docker-syncd-nephos.gz
$(DOCKER_SYNCD_NEPHOS)_PATH = $(PLATFORM_PATH)/docker-syncd-nephos
$(DOCKER_SYNCD_NEPHOS)_DEPENDS += $(SYNCD)
ifeq ($(INSTALL_DEBUG_TOOLS), y)
$(DOCKER_SYNCD_NEPHOS)_DEPENDS += $(SYNCD_DBG) \
$(LIBSWSSCOMMON_DBG) \
$(LIBSAIMETADATA_DBG) \
$(LIBSAIREDIS_DBG)
endif
$(DOCKER_SYNCD_NEPHOS)_FILES += $(DSSERVE) $(NPX_DIAG)
$(DOCKER_SYNCD_NEPHOS)_LOAD_DOCKERS += $(DOCKER_CONFIG_ENGINE)
SONIC_DOCKER_IMAGES += $(DOCKER_SYNCD_NEPHOS)
ifneq ($(ENABLE_SYNCD_RPC),y)
SONIC_INSTALL_DOCKER_IMAGES += $(DOCKER_SYNCD_NEPHOS)
endif
DOCKER_SYNCD_PLATFORM_CODE = nephos
include $(PLATFORM_PATH)/../template/docker-syncd-base.mk
$(DOCKER_SYNCD_NEPHOS)_CONTAINER_NAME = syncd
$(DOCKER_SYNCD_NEPHOS)_RUN_OPT += --net=host --privileged -t
$(DOCKER_SYNCD_NEPHOS)_RUN_OPT += -v /host/machine.conf:/etc/machine.conf
$(DOCKER_SYNCD_NEPHOS)_RUN_OPT += -v /var/run/docker-syncd:/var/run/sswsyncd
$(DOCKER_SYNCD_NEPHOS)_RUN_OPT += -v /etc/sonic:/etc/sonic:ro
$(DOCKER_SYNCD_BASE)_DEPENDS += $(SYNCD) $(PYTHON_SDK_API)
$(DOCKER_SYNCD_NEPHOS)_BASE_IMAGE_FILES += npx_diag:/usr/bin/npx_diag
$(DOCKER_SYNCD_BASE)_DBG_DEPENDS += $(SYNCD_DBG) \
$(LIBSWSSCOMMON_DBG) \
$(LIBSAIMETADATA_DBG) \
$(LIBSAIREDIS_DBG)
$(DOCKER_SYNCD_BASE)_RUN_OPT += -v /host/warmboot:/var/warmboot

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@ -1,4 +1,4 @@
FROM docker-config-engine
FROM docker-config-engine-stretch
ARG docker_container_name
RUN [ -f /etc/rsyslog.conf ] && sed -ri "s/%syslogtag%/$docker_container_name#%syslogtag%/;" /etc/rsyslog.conf
@ -14,17 +14,25 @@ debs/{{ deb }}{{' '}}
{%- endfor -%}
debs/
COPY \
{% for deb in docker_syncd_nephos_pydebs.split(' ') -%}
python-debs/{{ deb }}{{' '}}
{%- endfor -%}
debs/
RUN apt-get install -y libxml2
RUN dpkg -i \
{% for deb in docker_syncd_nephos_debs.split(' ') -%}
debs/{{ deb }}{{' '}}
{%- endfor %}
## TODO: add kmod into Depends
RUN apt-get install -f kmod
COPY ["files/dsserve", "files/npx_diag", "start.sh", "/usr/bin/"]
RUN chmod +x /usr/bin/dsserve /usr/bin/npx_diag
##RUN dpkg -i \
##{% for deb in docker_syncd_nephos_pydebs.split(' ') -%}
##debs/{{ deb }}{{' '}}
##{%- endfor %}
COPY ["start.sh", "/usr/bin/"]
COPY ["supervisord.conf", "/etc/supervisor/conf.d/"]
## Clean up

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@ -4,7 +4,7 @@ SAI_VER = 0.9.4
LIBSAITHRIFT_DEV = libsaithrift-dev_$(SAI_VER)_amd64.deb
$(LIBSAITHRIFT_DEV)_SRC_PATH = $(SRC_PATH)/sonic-sairedis/SAI
$(LIBSAITHRIFT_DEV)_DEPENDS += $(LIBTHRIFT) $(LIBTHRIFT_DEV) $(THRIFT_COMPILER) $(NEPHOS_SAI) $(NEPHOS_SAI_DEV)
$(LIBSAITHRIFT_DEV)_DEPENDS += $(LIBTHRIFT) $(LIBTHRIFT_DEV) $(PYTHON_THRIFT) $(THRIFT_COMPILER) $(NEPHOS_SAI) $(NEPHOS_SAI_DEV)
$(LIBSAITHRIFT_DEV)_RDEPENDS += $(LIBTHRIFT) $(NEPHOS_SAI)
SONIC_DPKG_DEBS += $(LIBSAITHRIFT_DEV)
@ -12,7 +12,7 @@ PYTHON_SAITHRIFT = python-saithrift_$(SAI_VER)_amd64.deb
$(eval $(call add_extra_package,$(LIBSAITHRIFT_DEV),$(PYTHON_SAITHRIFT)))
SAISERVER = saiserver_$(SAI_VER)_amd64.deb
$(SAISERVER)_RDEPENDS += $(LIBTHRIFT) $(BRCM_SAI)
$(SAISERVER)_RDEPENDS += $(LIBTHRIFT) $(NEPHOS_SAI)
$(eval $(call add_extra_package,$(LIBSAITHRIFT_DEV),$(SAISERVER)))
SAISERVER_DBG = saiserver-dbg_$(SAI_VER)_amd64.deb

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@ -0,0 +1,10 @@
# Nephos Platform modules
VERSION = 1.0.0
NEPHOS_MODULE = nephos-modules_$(VERSION)_amd64.deb
$(NEPHOS_MODULE)_SRC_PATH = $(PLATFORM_PATH)/nephos-modules
$(NEPHOS_MODULE)_DEPENDS += $(LINUX_HEADERS) $(LINUX_HEADERS_COMMON)
SONIC_DPKG_DEBS += $(NEPHOS_MODULE)
SONIC_STRETCH_DEBS += $(NEPHOS_MODULE)

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@ -0,0 +1,2 @@
# Nephos-modules
Device drivers for support of Nephos platform for the SONiC project

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@ -0,0 +1,5 @@
nephos-modules (1.0.0) unstable; urgency=low
* Initial release
-- Support <simon.ji@nephosinc.com> Fri, 15 Mar 2019 15:54:00 +0800

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@ -0,0 +1 @@
9

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Source: nephos-modules
Section: main
Priority: extra
Maintainer: support <simon.ji@nephosinc.com>
Build-Depends: debhelper (>= 8.0.0), bzip2
Standards-Version: 3.9.3
Package: nephos-modules
Architecture: amd64
Depends: linux-image-4.9.0-8-2-amd64
Description: kernel modules for nephos asic

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#!/usr/bin/make -f
export INSTALL_MOD_DIR:=extra
PACKAGE_NAME := nephos-modules
KVERSION ?= $(shell uname -r)
KERNEL_SRC := /lib/modules/$(KVERSION)
SERVICE_DIR := service
INITD_DIR := init.d
MODULE_SRC := $(shell pwd)/modules
CURRENT_DIR := $(cd "$(dirname "$0")"; pwd)
%:
dh $@
override_dh_auto_build:
make -C $(MODULE_SRC)
override_dh_auto_install:
dh_installdirs -p$(PACKAGE_NAME) $(KERNEL_SRC)/extra
cp $(MODULE_SRC)/build/module/*.ko debian/$(PACKAGE_NAME)/$(KERNEL_SRC)/extra
dh_installdirs -p$(PACKAGE_NAME) /lib/systemd/system
cp $(MODULE_SRC)/service/*.service debian/$(PACKAGE_NAME)/lib/systemd/system/
dh_installdirs -p$(PACKAGE_NAME) /etc/init.d
cp $(MODULE_SRC)/init.d/* debian/$(PACKAGE_NAME)/etc/init.d/
override_dh_usrlocal:
override_dh_pysupport:
override_dh_clean:
dh_clean
test -d $(MODULE_SRC)/build || rm -rf $(MODULE_SRC)/build

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@ -0,0 +1,50 @@
################################################################################
# Copyright (C) 2019 Nephos, Inc.
#
# This program is free software; you can redistribute it and/or
# modify it under the terms of version 2 of the GNU General Public
# License as published by the Free Software Foundation.
#
# This program is distributed in the hope that it will be useful,
# but WITHOUT ANY WARRANTY; without even the implied warranty of
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
# GNU General Public License for more details.
#
# You should have received a copy of the GNU General Public License
# version 2 along with this program.
################################################################################
NPS_MODULES_DIR := $(dir $(realpath $(lastword $(MAKEFILE_LIST))))
SRC_PATH := $(NPS_MODULES_DIR)/src
INC_PATH := $(SRC_PATH)/inc
################################################################################
include $(NPS_MODULES_DIR)/config.mk
################################################################################
MODULE_OUTPUT_DIR := $(BUILD_OUTPUT_DIR)/module
################################################################################
all: compile install
################################################################################
EXTRA_CFLAGS += -I$(INC_PATH)
EXTRA_CFLAGS += -DNPS_EN_NETIF
EXTRA_CFLAGS += -DNPS_EN_TAURUS
EXTRA_CFLAGS += -DNPS_LINUX_USER_MODE
EXTRA_CFLAGS += -DNPS_EN_LITTLE_ENDIAN
ifeq ($(shell uname -m),x86_64)
EXTRA_CFLAGS += -DNPS_EN_HOST_64_BIT_LITTLE_ENDIAN
else
EXTRA_CFLAGS += -DNPS_EN_HOST_32_BIT_LITTLE_ENDIAN
endif
################################################################################
include $(SRC_PATH)/make.mk
################################################################################
compile::
install::
$(TEST_PATH) $(MODULE_OUTPUT_DIR) || $(MKDIR) $(MODULE_OUTPUT_DIR)
$(MV) $(BUILD_OUTPUT_DIR)/$(DEV_MODULE_NAME).ko $(MODULE_OUTPUT_DIR)/$(DEV_MODULE_NAME).ko
$(MV) $(BUILD_OUTPUT_DIR)/$(NETIF_MODULE_NAME).ko $(MODULE_OUTPUT_DIR)/$(NETIF_MODULE_NAME).ko
clean::
$(RM) $(BUILD_OUTPUT_DIR)
.PHONY: all compile install clean
.NOTPARALLEL: all compile install clean

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@ -0,0 +1,32 @@
################################################################################
# Copyright (C) 2019 Nephos, Inc.
#
# This program is free software; you can redistribute it and/or
# modify it under the terms of version 2 of the GNU General Public
# License as published by the Free Software Foundation.
#
# This program is distributed in the hope that it will be useful,
# but WITHOUT ANY WARRANTY; without even the implied warranty of
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
# GNU General Public License for more details.
#
# You should have received a copy of the GNU General Public License
# version 2 along with this program.
################################################################################
Step 1~4 show how to build and execute NPS kernel modules.
1. Modify nps-modules/config.mk to specify the output directory to BUILD_OUTPUT_DIR.
The default output path is nps-modules/build.
2. Compile:
cd nps-modules/ && make
3. The output kernel modules will be found in $(BUILD_OUTPUT_DIR)/modules/
- nps_dev.ko
- nps_netif.ko
4. Load modules:
(1) insmod nps_dev.ko
(2) insmod nps_netif.ko
Note that the module inserting sequence cannot be changed.

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@ -0,0 +1,30 @@
################################################################################
# Copyright (C) 2019 Nephos, Inc.
#
# This program is free software; you can redistribute it and/or
# modify it under the terms of version 2 of the GNU General Public
# License as published by the Free Software Foundation.
#
# This program is distributed in the hope that it will be useful,
# but WITHOUT ANY WARRANTY; without even the implied warranty of
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
# GNU General Public License for more details.
#
# You should have received a copy of the GNU General Public License
# version 2 along with this program.
################################################################################
BUILD_OUTPUT_DIR := $(NPS_MODULES_DIR)/build
################################################################################
#OS_PATH := /lib/modules/$(shell uname -r)/build
OS_PATH := /lib/modules/$(KVERSION)/build
################################################################################
MAKE := make
RM := rm -rf
MKDIR := mkdir -p
CP := cp
MV := mv
TEST_PATH := test -d
################################################################################
export BUILD_OUTPUT_DIR
export OS_PATH

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@ -0,0 +1,54 @@
#!/bin/bash
# This script load/unload nps kernel modules
### BEGIN INIT INFO
# Provides: load-nps-modules
# Required-Start:
# Required-Stop:
# Should-Start:
# Should-Stop:
# Default-Start: S
# Default-Stop: 0 6
# Short-Description: Load nps kernel modules
### END INIT INFO
case "$1" in
start)
echo -n "Load nps kernel modules... "
RMEM_SIZE=`cat /proc/sys/net/core/rmem_max`
if [ $RMEM_SIZE -lt 8388608 ]; then
echo "8388608" > /proc/sys/net/core/rmem_max
fi
WMEM_SIZE=`cat /proc/sys/net/core/wmem_max`
if [ $WMEM_SIZE -lt 25165824 ]; then
echo "25165824" > /proc/sys/net/core/wmem_max
fi
modprobe nps_dev
modprobe nps_netif
echo "done."
;;
stop)
echo -n "Unload nps kernel modules... "
rmmod nps_netif
rmmod nps_dev
echo "done."
;;
force-reload|restart)
echo "Not supported"
;;
*)
echo "Usage: /etc/init.d/nps-modules-4.9.0-8-2-amd64.init {start|stop}"
exit 1
;;
esac
exit 0

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@ -0,0 +1,13 @@
[Unit]
Description=Nephos kernel modules init
After=local-fs.target
Before=syncd.service
[Service]
Type=oneshot
ExecStart=-/etc/init.d/nps-modules-4.9.0-8-2-amd64 start
ExecStop=-/etc/init.d/nps-modules-4.9.0-8-2-amd64 stop
RemainAfterExit=yes
[Install]
WantedBy=multi-user.target

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/* Copyright (C) 2019 Nephos, Inc.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of version 2 of the GNU General Public
* License as published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* version 2 along with this program.
*/
/* FILE NAME: aml.h
* PURPOSE:
* 1. Provide whole AML resource initialization API.
* 2. Provide configuration access APIs.
* 3. Provide ISR registration and deregistration APIs.
* 4. Provide memory access.
* 5. Provide DMA management APIs.
* 6. Provide address translation APIs.
* NOTES:
*/
#ifndef AML_H
#define AML_H
/* INCLUDE FILE DECLARATIONS
*/
#include <nps_types.h>
#include <nps_error.h>
#include <nps_cfg.h>
/* NAMING CONSTANT DECLARATIONS
*/
/* #define AML_EN_I2C */
/* #define AML_EN_CUSTOM_DMA_ADDR */
/* MACRO FUNCTION DECLARATIONS
*/
/* DATA TYPE DECLARATIONS
*/
typedef enum
{
AML_DEV_TYPE_PCI,
AML_DEV_TYPE_I2C,
AML_DEV_TYPE_SPI,
AML_DEV_TYPE_LAST
} AML_HW_IF_T;
typedef NPS_ERROR_NO_T
(*AML_DEV_READ_FUNC_T)(
const UI32_T unit,
const UI32_T addr_offset,
UI32_T *ptr_data,
const UI32_T len);
typedef NPS_ERROR_NO_T
(*AML_DEV_WRITE_FUNC_T)(
const UI32_T unit,
const UI32_T addr_offset,
const UI32_T *ptr_data,
const UI32_T len);
typedef NPS_ERROR_NO_T
(*AML_DEV_ISR_FUNC_T)(
void *ptr_data);
/* To mask the chip interrupt in kernel interrupt routine. */
typedef struct
{
UI32_T mask_addr;
UI32_T mask_val;
} AML_DEV_ISR_DATA_T;
/* To read or write the HW-intf registers. */
typedef struct
{
AML_DEV_READ_FUNC_T read_callback;
AML_DEV_WRITE_FUNC_T write_callback;
} AML_DEV_ACCESS_T;
typedef struct
{
UI32_T vendor;
UI32_T device;
UI32_T revision;
} AML_DEV_ID_T;
typedef struct
{
AML_HW_IF_T if_type;
AML_DEV_ID_T id;
AML_DEV_ACCESS_T access;
} AML_DEV_T;
/* EXPORTED SUBPROGRAM SPECIFICATIONS
*/
/* FUNCTION NAME: aml_getRunMode
* PURPOSE:
* To get current SDK running mode.
* INPUT:
* unit -- the device unit
* OUTPUT:
* ptr_mode -- current running mode
* RETURN:
* NPS_E_OK -- Successfully get the running mode.
* NOTES:
* none
*/
NPS_ERROR_NO_T
aml_getRunMode(
const UI32_T unit,
UI32_T *ptr_mode);
/* FUNCTION NAME: aml_init
* PURPOSE:
* To initialize the DMA memory and interface-related kernel source
* such as PCIe/I2C/SPI.
* INPUT:
* none
* OUTPUT:
* none
* RETURN:
* NPS_E_OK -- Successfully initialize AML module.
* NPS_E_OTHERS -- Failed to initialize AML module.
* NOTES:
* none
*/
NPS_ERROR_NO_T
aml_deinit(void);
/* FUNCTION NAME: aml_init
* PURPOSE:
* To initialize the DMA memory and interface-related kernel source
* such as PCIe/I2C/SPI.
* INPUT:
* none
* OUTPUT:
* none
* RETURN:
* NPS_E_OK -- Successfully initialize AML module.
* NPS_E_OTHERS -- Failed to initialize AML module.
* NOTES:
* none
*/
NPS_ERROR_NO_T
aml_init(void);
/* FUNCTION NAME: aml_getNumberOfChip
* PURPOSE:
* To get the number of chips connected to host CPU.
* INPUT:
* none
* OUTPUT:
* ptr_num -- pointer for the chip number
* RETURN:
* NPS_E_OK -- Successfully get the number of chips.
* NOTES:
* none
*/
NPS_ERROR_NO_T
aml_getNumberOfChip(
UI32_T *ptr_num);
/* FUNCTION NAME: aml_connectIsr
* PURPOSE:
* To enable the system intterupt and specify the ISR handler.
* INPUT:
* unit -- the device unit
* handler -- the ISR hanlder
* ptr_cookie -- pointer for the data as an argument of the handler
* OUTPUT:
* none
* RETURN:
* NPS_E_OK -- Successfully connect the ISR handler to the system.
* NPS_E_OTHERS -- Failed to connect the ISR handler to the system.
* NOTES:
* none
*/
NPS_ERROR_NO_T
aml_connectIsr(
const UI32_T unit,
AML_DEV_ISR_FUNC_T handler,
AML_DEV_ISR_DATA_T *ptr_cookie);
/* FUNCTION NAME: aml_disconnectIsr
* PURPOSE:
* To disable the system intterupt notification.
* INPUT:
* unit -- the device unit
* OUTPUT:
* none
* RETURN:
* NPS_E_OK -- Successfully disconnect the ISR handler to the system.
* NPS_E_OTHERS -- Failed to disconnect the ISR handler to the system.
* NOTES:
* none
*/
NPS_ERROR_NO_T
aml_disconnectIsr(
const UI32_T unit);
/* FUNCTION NAME: aml_getDeviceId
* PURPOSE:
* To get the vendor/device/revision ID of the specified chip unit.
* INPUT:
* unit -- the device unit
* OUTPUT:
* ptr_vendor_id -- pointer for the vendor ID
* ptr_device_id -- pointer for the device ID
* ptr_revision_id -- pointer for the revision ID
* RETURN:
* NPS_E_OK -- Successfully get the IDs.
* NPS_E_OTHERS -- Failed to get the IDs.
* NOTES:
* none
*/
NPS_ERROR_NO_T
aml_getDeviceId(
const UI32_T unit,
UI32_T *ptr_vendor_id,
UI32_T *ptr_device_id,
UI32_T *ptr_revision_id);
/* FUNCTION NAME: aml_readReg
* PURPOSE:
* To read data from the register of the specified chip unit.
* INPUT:
* unit -- the device unit
* addr_offset -- the address of register
* len -- data size read
* OUTPUT:
* ptr_data -- pointer for the register data
* RETURN:
* NPS_E_OK -- Successfully read the data.
* NPS_E_OTHERS -- Failed to read the data.
* NOTES:
* none
*/
NPS_ERROR_NO_T
aml_readReg(
const UI32_T unit,
const UI32_T addr_offset,
UI32_T *ptr_data,
const UI32_T len);
/* FUNCTION NAME: aml_writeReg
* PURPOSE:
* To write data to the register of the specified chip unit.
* INPUT:
* unit -- the device unit
* addr_offset -- the address of register
* ptr_data -- pointer for the written data
* len -- data size read
* OUTPUT:
* none
* RETURN:
* NPS_E_OK -- Successfully write the data.
* NPS_E_OTHERS -- Failed to write the data.
* NOTES:
* none
*/
NPS_ERROR_NO_T
aml_writeReg(
const UI32_T unit,
const UI32_T addr_offset,
const UI32_T *ptr_data,
const UI32_T len);
/* FUNCTION NAME: aml_convertVirtToPhy
* PURPOSE:
* To get the physical address of the corresponding virtual
* address input.
* INPUT:
* ptr_virt_addr -- pointer to the virtual address
* OUTPUT:
* ptr_phy_addr -- pointer to the physical address
* RETURN:
* NPS_E_OK -- Successfully convert the address.
* NPS_E_OTHERS -- Failed to convert the address.
* The memory might be not allocated by AML.
* NOTES:
* none
*/
NPS_ERROR_NO_T
aml_convertVirtToPhy(
void *ptr_virt_addr,
NPS_ADDR_T *ptr_phy_addr);
/* FUNCTION NAME: aml_convertPhyToVirt
* PURPOSE:
* To get the virtual address of the corresponding physical
* address input.
* INPUT:
* ptr_virt_addr -- pointer for the physical address
* OUTPUT:
* pptr_virt_addr -- pointer for the virtual address pointer
* RETURN:
* NPS_E_OK -- Successfully convert the address.
* NPS_E_OTHERS -- Failed to convert the address.
* The memory might be not allocated by AML.
* NOTES:
* none
*/
NPS_ERROR_NO_T
aml_convertPhyToVirt(
const NPS_ADDR_T phy_addr,
void **pptr_virt_addr);
/* FUNCTION NAME: aml_flushCache
* PURPOSE:
* To update the data from CPU cache to the physical memory.
* INPUT:
* ptr_virt_addr -- pointer for the data
* size -- target data size to be updated
* OUTPUT:
* none
* RETURN:
* NPS_E_OK -- Successfully update the data from CPU cache
* to the physical memory.
* NPS_E_OTHERS -- Failed to pdate the data from CPU cache
* to the physical memory.
* NOTES:
* none
*/
NPS_ERROR_NO_T
aml_flushCache(
void *ptr_virt_addr,
const UI32_T size);
/* FUNCTION NAME: aml_invalidateCache
* PURPOSE:
* To update the data from physical memory to the CPU cache.
* INPUT:
* ptr_virt_addr -- pointer for the data
* size -- target data size to be updated
* OUTPUT:
* none
* RETURN:
* NPS_E_OK -- Successfully update the data from physical memory
* to the CPU cache.
* NPS_E_OTHERS -- Failed to pdate the data from physical memory
* to the CPU cache.
* NOTES:
* none
*/
NPS_ERROR_NO_T
aml_invalidateCache(
void *ptr_virt_addr,
const UI32_T size);
#endif /* #ifndef AML_H */

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/* Copyright (C) 2019 Nephos, Inc.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of version 2 of the GNU General Public
* License as published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* version 2 along with this program.
*/
/* FILE NAME: hal_dev.h
* PURPOSE:
* Provide a list of device IDs.
*
* NOTES:
*/
#ifndef HAL_DEV_H
#define HAL_DEV_H
/* INCLUDE FILE DECLARATIONS
*/
/* NAMING CONSTANT DECLARATIONS
*/
#define HAL_MTK_VENDOR_ID (0x0E8D)
#define HAL_NP_VENDOR_ID (0x1D9F)
#define HAL_DEVICE_ID_MT3257 (0x3257)
#define HAL_DEVICE_ID_MT3258 (0x3258)
#define HAL_DEVICE_ID_NP8363 (0x8363) /* 1.08T 1Bin */
#define HAL_DEVICE_ID_NP8365 (0x8365) /* 1.8T 1Bin */
#define HAL_DEVICE_ID_NP8366 (0x8366) /* 2.4T 1Bin */
#define HAL_DEVICE_ID_NP8367 (0x8367) /* 3.2T 1Bin */
#define HAL_DEVICE_ID_NP8368 (0x8368) /* 3.2T 2Bin */
#define HAL_DEVICE_ID_NP8369 (0x8369) /* 6.4T 2Bin */
#define HAL_REVISION_ID_E1 (0x01)
#define HAL_REVISION_ID_E2 (0x02)
#define HAL_INVALID_DEVICE_ID (0xFFFFFFFF)
#endif /* #ifndef HAL_DEV_H */

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/* Copyright (C) 2019 Nephos, Inc.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of version 2 of the GNU General Public
* License as published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* version 2 along with this program.
*/
/* FILE NAME: netif_osal.h
* PURPOSE:
* It provide customer linux API.
* NOTES:
*/
#ifndef NETIF_OSAL_H
#define NETIF_OSAL_H
/* <types.h>
* ENOMEM : 12 - Out of memory
* EFAULT : 14 - Bad address
* EBUSY : 16 - Device or resource busy
* ENODEV : 19 - No such device
* EINVAL : 22 - Invalid argument
* <netdevice.h>
* NETDEV_TX_OK : 0x00
* NETDEV_TX_BUSY : 0x10
* <if_ether.h>
* ETH_HLEN : 14 dmac + smac + etyp
* ETH_ZLEN : 60 minimum ethernet frame size
* ETH_DATA_LEN : 1500
* ETH_FRAME_LEN : 1514
* ETH_FCS_LEN : 4
*
* ETH_P_IP : 0x0800
* ETH_P_ARP : 0x0806
* ETH_P_IPV6 : 0x86DD
* ETH_P_SLOW : 0x8809
* ETH_P_1588 : 0x88F7
* <skbuff.h>
* NET_IP_ALIGN : 2
*/
#include <linux/kernel.h>
#include <linux/types.h>
#include <linux/kthread.h>
#include <linux/semaphore.h>
#include <linux/spinlock.h>
#include <linux/spinlock_types.h>
#include <linux/netdevice.h>
#include <linux/etherdevice.h>
#include <linux/miscdevice.h>
#include <linux/wait.h>
#include <linux/cdev.h>
#include <linux/fs.h>
#include <linux/pci.h>
#include <linux/module.h>
#include <nps_types.h>
#include <nps_error.h>
/* ----------------------------------------------------------------------------------- macro value */
/* Thread */
#define OSAL_THREAD_NAME_LEN (16)
#define OSAL_THREAD_DFT_NAME ("Unknown")
/* Semaphore */
#define OSAL_SEMA_NAME_LEN (16)
#define OSAL_SEMA_DFT_NAME ("Unknown")
/* Event */
#define OSAL_EVENT_NAME_LEN (16)
#define OSAL_EVENT_DFT_NAME ("Unknown")
/* Spinlock */
#define OSAL_SPIN_NAME_LEN (16)
#define OSAL_SPIN_DFT_NAME ("Unknown")
/* Queue */
#define OSAL_QUEUE_NAME_LEN (16)
#define OSAL_QUEUE_DFT_NAME ("Unknown")
#define OSAL_PRN_BUF_SZ (256)
#define OSAL_TICKS_PER_SEC (1000000)
/* ----------------------------------------------------------------------------------- struct */
typedef struct linux_thread_s
{
char name[OSAL_THREAD_NAME_LEN + 1];
struct task_struct *ptr_task;
unsigned int is_stop;
struct linux_thread_s *ptr_prev;
struct linux_thread_s *ptr_next;
} linux_thread_t;
typedef struct
{
char name[OSAL_SEMA_NAME_LEN + 1];
struct semaphore lock;
} linux_sema_t;
typedef struct
{
char name[OSAL_EVENT_NAME_LEN + 1];
wait_queue_head_t wait_que;
unsigned int condition;
} linux_event_t;
typedef struct
{
char name[OSAL_SPIN_NAME_LEN + 1];
spinlock_t spinlock;
} linux_isrlock_t;
typedef struct
{
void *ptr_data;
} linux_queue_entry_t;
typedef struct
{
char name[OSAL_QUEUE_NAME_LEN + 1];
int head; /* index of the queue head entry can be read */
int tail; /* index of the queue tail entry can be write */
unsigned int wr_cnt; /* enqueue total count */
unsigned int rd_cnt; /* dequeue total count */
unsigned int capacity; /* the queue size */
linux_queue_entry_t *ptr_entry; /* the queue entry buffer */
} linux_queue_t;
typedef struct
{
unsigned int size;
dma_addr_t phy_addr;
char data[0];
} linux_dma_t;
/* ----------------------------------------------------------------------------------- function */
void *
osal_memset(
void *ptr_mem,
const I32_T value,
const UI32_T num);
void *
osal_memcpy(
void *ptr_dst,
const void *ptr_src,
const UI32_T num);
UI32_T
osal_strlen(
const C8_T *ptr_str);
void
osal_printf(
const C8_T *ptr_fmt,
...);
void *
osal_alloc(
const UI32_T size);
void
osal_free(
const void *ptr_mem);
/* thread */
NPS_ERROR_NO_T
osal_init(void);
NPS_ERROR_NO_T
osal_deinit(void);
NPS_ERROR_NO_T
osal_createThread (
const C8_T *ptr_thread_name,
const UI32_T stack_size,
const UI32_T priority,
void (function)(void*),
void *ptr_arg,
NPS_THREAD_ID_T *ptr_thread_id);
NPS_ERROR_NO_T
osal_stopThread(
NPS_THREAD_ID_T *ptr_thread_id);
NPS_ERROR_NO_T
osal_destroyThread(
NPS_THREAD_ID_T *ptr_thread_id);
void
osal_initRunThread(
void);
NPS_ERROR_NO_T
osal_isRunThread(
void);
void
osal_exitRunThread(
void);
/* semaphore */
NPS_ERROR_NO_T
osal_createSemaphore(
const C8_T *ptr_sema_name,
const UI32_T sema_count,
NPS_SEMAPHORE_ID_T *ptr_semaphore_id);
NPS_ERROR_NO_T
osal_takeSemaphore(
NPS_SEMAPHORE_ID_T *ptr_semaphore_id,
UI32_T time_out);
NPS_ERROR_NO_T
osal_giveSemaphore(
NPS_SEMAPHORE_ID_T *ptr_semaphore_id);
NPS_ERROR_NO_T
osal_destroySemaphore(
NPS_SEMAPHORE_ID_T *ptr_semaphore_id);
/* event */
NPS_ERROR_NO_T
osal_createEvent(
const C8_T *ptr_event_name,
NPS_SEMAPHORE_ID_T *ptr_event_id);
NPS_ERROR_NO_T
osal_waitEvent(
NPS_SEMAPHORE_ID_T *ptr_event_id);
NPS_ERROR_NO_T
osal_triggerEvent(
NPS_SEMAPHORE_ID_T *ptr_event_id);
NPS_ERROR_NO_T
osal_destroyEvent(
NPS_SEMAPHORE_ID_T *ptr_event_id);
/* isr_lock */
NPS_ERROR_NO_T
osal_createIsrLock(
const C8_T *ptr_isrlock_name,
NPS_ISRLOCK_ID_T *ptr_isrlock_id);
NPS_ERROR_NO_T
osal_takeIsrLock(
NPS_ISRLOCK_ID_T *ptr_isrlock_id,
NPS_IRQ_FLAGS_T *ptr_irq_flags);
NPS_ERROR_NO_T
osal_giveIsrLock(
NPS_ISRLOCK_ID_T *ptr_isrlock_id,
NPS_IRQ_FLAGS_T *ptr_irq_flags);
NPS_ERROR_NO_T
osal_destroyIsrLock(
NPS_ISRLOCK_ID_T *ptr_isrlock_id);
/* timer */
NPS_ERROR_NO_T
osal_sleepThread(
const UI32_T usecond);
NPS_ERROR_NO_T
osal_getTime(
NPS_TIME_T *ptr_time);
/* queue */
NPS_ERROR_NO_T
osal_que_create(
NPS_HUGE_T *ptr_queue_id,
UI32_T capacity);
NPS_ERROR_NO_T
osal_que_enque(
NPS_HUGE_T *ptr_queue_id,
void *ptr_data);
NPS_ERROR_NO_T
osal_que_deque(
NPS_HUGE_T *ptr_queue_id,
void **pptr_data);
NPS_ERROR_NO_T
osal_que_destroy(
NPS_HUGE_T *ptr_queue_id);
NPS_ERROR_NO_T
osal_que_getCount(
NPS_HUGE_T *ptr_queue_id,
unsigned int *ptr_count);
/* IO */
int
osal_io_copyToUser(
void *ptr_usr_buf,
void *ptr_knl_buf,
unsigned int size);
int
osal_io_copyFromUser(
void *ptr_knl_buf,
void *ptr_usr_buf,
unsigned int size);
/* dma */
void *
osal_dma_alloc(
const UI32_T size);
NPS_ERROR_NO_T
osal_dma_free(
void *ptr_dma_mem);
dma_addr_t
osal_dma_convertVirtToPhy(
void *ptr_virt_addr);
void *
osal_dma_convertPhyToVirt(
const dma_addr_t phy_addr);
int
osal_dma_flushCache(
void *ptr_virt_addr,
const unsigned int size);
int
osal_dma_invalidateCache(
void *ptr_virt_addr,
const unsigned int size);
/* skb */
struct sk_buff *
osal_skb_alloc(
UI32_T size);
void
osal_skb_free(
struct sk_buff *ptr_skb);
dma_addr_t
osal_skb_mapDma(
struct sk_buff *ptr_skb,
enum dma_data_direction dir);
void
osal_skb_unmapDma(
const dma_addr_t phy_addr,
UI32_T size,
enum dma_data_direction dir);
void
osal_skb_send(
struct sk_buff *ptr_skb);
void
osal_skb_recv(
struct sk_buff *ptr_skb);
#endif /* end of NETIF_OSAL_H */

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/* Copyright (C) 2019 Nephos, Inc.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of version 2 of the GNU General Public
* License as published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* version 2 along with this program.
*/
/* FILE NAME: netif_perf.h
* PURPOSE:
* It provide customer performance test API.
* NOTES:
*/
#ifndef NETIF_PERF_H
#define NETIF_PERF_H
/* #define PERF_EN_TEST */
/* FUNCTION NAME: perf_rxCallback
* PURPOSE:
* To count the Rx-gpd for Rx-test.
* INPUT:
* len -- To check if the Rx-gpd length equals to test length.
* OUTPUT:
* None
* RETURN:
* NPS_E_OK -- Successful operation.
* NOTES:
* None
*/
NPS_ERROR_NO_T
perf_rxCallback(
const UI32_T len);
/* FUNCTION NAME: perf_rxTest
* PURPOSE:
* To check if Rx-test is going.
* INPUT:
* None
* OUTPUT:
* None
* RETURN:
* NPS_E_OK -- Successful operation.
* NOTES:
* None
*/
NPS_ERROR_NO_T
perf_rxTest(
void);
/* FUNCTION NAME: perf_test
* PURPOSE:
* To do Tx-test or Rx-test.
* INPUT:
* len -- Test length
* tx_channel -- Test Tx channel numbers
* rx_channel -- Test Rx channel numbers
* test_skb -- Test GPD or SKB
* OUTPUT:
* None
* RETURN:
* NPS_E_OK -- Successful operation.
* NOTES:
* None
*/
NPS_ERROR_NO_T
perf_test(
UI32_T len,
UI32_T tx_channel,
UI32_T rx_channel,
BOOL_T test_skb);
#endif /* end of NETIF_PERF_H */

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/* Copyright (C) 2019 Nephos, Inc.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of version 2 of the GNU General Public
* License as published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* version 2 along with this program.
*/
/* FILE NAME: nps_cfg.h
* PURPOSE:
* Customer configuration on NPS SDK.
* NOTES:
*/
#ifndef NPS_CFG_H
#define NPS_CFG_H
/* INCLUDE FILE DECLARATIONS
*/
#include <nps_types.h>
#include <nps_error.h>
/* NAMING CONSTANT DECLARATIONS
*/
/* MACRO FUNCTION DECLARATIONS
*/
#define NPS_CFG_MAXIMUM_CHIPS_PER_SYSTEM (16)
#define NPS_CFG_USER_PORT_NUM (96)
/* DATA TYPE DECLARATIONS
*/
typedef enum
{
NPS_CFG_TYPE_CHIP_MODE, /* chip operating mode. 0: legacy mode, 1:hybrid mode */
NPS_CFG_TYPE_PORT_MAX_SPEED, /* Reference to NPS_PORT_SPEED_XXX */
NPS_CFG_TYPE_PORT_LANE_NUM,
NPS_CFG_TYPE_PORT_TX_LANE,
NPS_CFG_TYPE_PORT_RX_LANE,
NPS_CFG_TYPE_PORT_TX_POLARITY_REV,
NPS_CFG_TYPE_PORT_RX_POLARITY_REV,
NPS_CFG_TYPE_PORT_EXT_LANE,
NPS_CFG_TYPE_PORT_VALID,
/* l2 module related configuration */
NPS_CFG_TYPE_L2_THREAD_PRI,
NPS_CFG_TYPE_L2_THREAD_STACK, /* customize L2 thread stack size in bytes */
NPS_CFG_TYPE_L2_ADDR_MODE, /* L2 address operation mode. 0: Polling mode, 1: FIFO mode */
/* PKT module related configuration */
NPS_CFG_TYPE_PKT_TX_GPD_NUM,
NPS_CFG_TYPE_PKT_RX_GPD_NUM,
NPS_CFG_TYPE_PKT_RX_SCHED_MODE, /* 0: RR mode, 1: WRR mode */
NPS_CFG_TYPE_PKT_TX_QUEUE_LEN,
NPS_CFG_TYPE_PKT_RX_QUEUE_LEN,
NPS_CFG_TYPE_PKT_RX_QUEUE_WEIGHT, /* valid while NPS_CFG_TYPE_PKT_RX_SCHED_MODE is 1
* param0: queue
* param1: NA
* value : weight
*/
NPS_CFG_TYPE_PKT_RX_ISR_THREAD_PRI,
NPS_CFG_TYPE_PKT_RX_ISR_THREAD_STACK, /* customize PKT RX ISR thread stack size in bytes */
NPS_CFG_TYPE_PKT_RX_FREE_THREAD_PRI,
NPS_CFG_TYPE_PKT_RX_FREE_THREAD_STACK, /* customize PKT RX free thread stack size in bytes */
NPS_CFG_TYPE_PKT_TX_ISR_THREAD_PRI,
NPS_CFG_TYPE_PKT_TX_ISR_THREAD_STACK, /* customize PKT TX ISR thread stack size in bytes */
NPS_CFG_TYPE_PKT_TX_FREE_THREAD_PRI,
NPS_CFG_TYPE_PKT_TX_FREE_THREAD_STACK, /* customize PKT TX free thread stack size in bytes */
NPS_CFG_TYPE_PKT_ERROR_ISR_THREAD_PRI,
NPS_CFG_TYPE_PKT_ERROR_ISR_THREAD_STACK, /* customize PKT ERROR ISR thread stack size in bytes */
/* STAT module related configuration */
NPS_CFG_TYPE_CNT_THREAD_PRI,
NPS_CFG_TYPE_CNT_THREAD_STACK, /* customize CNT thread stack size in bytes */
/* IFMON module related configuration */
NPS_CFG_TYPE_IFMON_THREAD_PRI,
NPS_CFG_TYPE_IFMON_THREAD_STACK, /* customize IFMON thread stack size in bytes */
/* share memory related configuration */
NPS_CFG_TYPE_SHARE_MEM_SDN_ENTRY_NUM, /* SDN flow table entry number from share memory */
NPS_CFG_TYPE_SHARE_MEM_L3_ENTRY_NUM, /* L3 entry number from share memory */
NPS_CFG_TYPE_SHARE_MEM_L2_ENTRY_NUM, /* L2 entry number from share memory */
/* DLB related configuration */
NPS_CFG_TYPE_DLB_MONITOR_MODE, /* DLB monitor mode. 1: async, 0: sync */
NPS_CFG_TYPE_DLB_LAG_MONITOR_THREAD_PRI,
NPS_CFG_TYPE_DLB_LAG_MONITOR_THREAD_SLEEP_TIME,
NPS_CFG_TYPE_DLB_L3_MONITOR_THREAD_PRI,
NPS_CFG_TYPE_DLB_L3_MONITOR_THREAD_SLEEP_TIME,
NPS_CFG_TYPE_DLB_L3_INTR_THREAD_PRI,
NPS_CFG_TYPE_DLB_NVO3_MONITOR_THREAD_PRI,
NPS_CFG_TYPE_DLB_NVO3_MONITOR_THREAD_SLEEP_TIME,
NPS_CFG_TYPE_DLB_NVO3_INTR_THREAD_PRI,
/* l3 related configuration */
NPS_CFG_TYPE_L3_ECMP_MIN_BLOCK_SIZE,
NPS_CFG_TYPE_L3_ECMP_BLOCK_SIZE,
NPS_CFG_TYPE_TCAM_L3_WITH_IPV6_PREFIX_128_REGION_ENTRY_NUM,
NPS_CFG_TYPE_TCAM_L3_WITH_IPV6_PREFIX_64_REGION_ENTRY_NUM,
/* share memory related configuration */
NPS_CFG_TYPE_HASH_L2_FDB_REGION_ENTRY_NUM,
NPS_CFG_TYPE_HASH_L2_GROUP_REGION_ENTRY_NUM,
NPS_CFG_TYPE_HASH_SECURITY_REGION_ENTRY_NUM,
NPS_CFG_TYPE_HASH_L3_WITH_IPV6_PREFIX_128_REGION_ENTRY_NUM,
NPS_CFG_TYPE_HASH_L3_WITH_IPV6_PREFIX_64_REGION_ENTRY_NUM,
NPS_CFG_TYPE_HASH_L3_WITHOUT_PREFIX_REGION_ENTRY_NUM,
NPS_CFG_TYPE_HASH_L3_RPF_REGION_ENTRY_NUM,
NPS_CFG_TYPE_HASH_FLOW_REGION_ENTRY_NUM,
NPS_CFG_TYPE_PORT_FC_MODE, /* only use to init port TM buffer
* configuration for specific FC mode,
* which not enable/disable FC/PFC
* for the port/pcp.
* param0: port.
* param1: Invalid.
* value : 0, FC disable;
* 1, 802.3x FC;
* 2, PFC.
*/
NPS_CFG_TYPE_PORT_PFC_STATE, /* valid while NPS_CFG_TYPE_PORT_TYPE_FC_MODE
* of the port is PFC.
* param0: port.
* param1: pcp.
* value : 0, PFC disable;
* 1, PFC enable.
*/
NPS_CFG_TYPE_PORT_PFC_QUEUE_STATE, /* valid while NPS_CFG_TYPE_PORT_TYPE_FC_MODE
* of the port is PFC.
* param0: port.
* param1: queue.
* value : 0, PFC disable;
* 1, PFC enable;
*/
NPS_CFG_TYPE_PORT_PFC_MAPPING, /* valid while NPS_CFG_TYPE_PORT_FC_MODE
* of the port is PFC.
* param0: port.
* param1: queue.
* value : PCP bitmap;
*
*/
NPS_CFG_TYPE_TRILL_ENABLE, /* TRILL module related configuration */
NPS_CFG_TYPE_USE_UNIT_PORT, /* use UNIT_PORT or native port of NPS_PORT_T
* 1 : UNIT_PORT, 0 : native port
*/
NPS_CFG_TYPE_MAC_VLAN_ENABLE, /* use dadicate mac vlan table */
NPS_CFG_TYPE_CPI_PORT_MODE, /* use to init CPI port working mode.
* param0: CPI port number.
* param1: NA.
* value : 0, CPI mode.
* 1, Ether mode.
*/
NPS_CFG_TYPE_PHY_ADDR,
NPS_CFG_TYPE_LED_CFG,
NPS_CFG_TYPE_USER_BUF_CTRL,
NPS_CFG_TYPE_ARIES_SDP_MODE, /* Select which Aries parser to use
* value: 0, GTP (default)
* 1, PPPOE
* 2, TCP_SPLICING
*/
NPS_CFG_TYPE_FAIR_BUF_CTRL, /* to enable the fairness in flow-control traffic.
* value : 0, disable fairness.
* 1, enable fairness.
*/
NPS_CFG_TYPE_HRM_BUF_SIZE, /* to assign the head room size of port speed.
* param0: Port speed.
* 0, 1G (default)
* 1, 10G
* 2, 25G
* 3, 40G
* 4, 50G
* 5, 100G
* value : cell number.
*/
NPS_CFG_TYPE_STEERING_TRUNCATE_ENABLE, /* set value 0: Do not truncate steering packets.
* set value 1: steering packets will be trucated to 1 cell and
* the cell size is based on chip.
*/
NPS_CFG_TYPE_FABRIC_MODE_ENABLE, /* set value 0: Non-farbic chip mode. (default)
* set value 1: Fabric chip mode.
*/
NPS_CFG_TYPE_ACL_TCP_FLAGS_ENCODE_ENABLE, /* set value 0: Do not encode tcp flags at acl entry.
* (Can only match bit 0-6 of tcp flags.)
* set value 1: Encode tcp flags at acl entry. (default)
*/
NPS_CFG_TYPE_TCAM_ECC_SCAN_ENABLE, /* set value 0: Disable ECC TCAM scanning. (default)
* set value 1: Enable ECC TCAM scanning.
*/
NPS_CFG_TYPE_PORT_BUF_MAX, /*
* Port max buffer threshold and unit is cell count.
* param0: port.
* param1: 0, ingress;
* 1, egress.
* value : 0, disable;
* others, enable max threshold.
*/
NPS_CFG_TYPE_INGRESS_DYNAMIC_BUF, /*
* Queue dynamic alpha setting and value will be
* enlarge to multiple of 256. For example, set value
* as 16 to indicate alpha as 1/16. Set value
* as 256 to indicate alpha as 1.
* param0: port.
* param1: queue (0~7: sc).
* value : alpha * 256.
*/
NPS_CFG_TYPE_EGRESS_DYNAMIC_BUF, /*
* Queue dynamic alpha setting and value will be
* enlarge to multiple of 256. For example, set value
* as 16 to indicate alpha as 1/16. Set value
* as 256 to indicate alpha as 1.
* param0: port.
* param1: queue (0~7: uc, 8~15: mc).
* value : alpha * 256.
*/
NPS_CFG_TYPE_DCQCN_ENABLE, /* set value 0: Disable DCQCN. (default)
* set value 1: Enable DCQCN.
*/
NPS_CFG_TYPE_LAST
}NPS_CFG_TYPE_T;
typedef struct NPS_CFG_VALUE_S
{
UI32_T param0; /*(Optional) The optional parameter which is available
* when the NPS_CFG_TYPE_T needs the first arguments*/
UI32_T param1; /*(Optional) The optional parameter which is available
* when the NPS_CFG_TYPE_T needs the second arguments*/
I32_T value;
}NPS_CFG_VALUE_T;
typedef NPS_ERROR_NO_T
(*NPS_CFG_GET_FUNC_T)(
const UI32_T unit,
const NPS_CFG_TYPE_T cfg_type,
NPS_CFG_VALUE_T *ptr_cfg_value);
typedef NPS_ERROR_NO_T
(*NPS_CFG_GET_LED_FUNC_T)
(
const UI32_T unit,
UI32_T **pptr_led_cfg,
UI32_T *ptr_cfg_size);
/* EXPORTED SUBPROGRAM SPECIFICATIONS
*/
/* FUNCTION NAME: nps_cfg_register
* PURPOSE:
* The function is to register NPS_CFG_GET_FUNC to SDK.
*
* INPUT:
* unit -- Device unit number.
* ptr_cfg_callback -- function to get the configuration value.
*
* OUTPUT:
* None
*
* RETURN:
* NPS_E_OK -- Operate success.
* NPS_E_BAD_PARAMETER -- Bad parameter.
*
* NOTES:
* 1. During SDK initializtion, it will call registered NPS_CFG_GET_FUNC to get configuration
* and apply them.
* If No registered NPS_CFG_GET_FUNC or can not get specified NPS_CFG_TYPE_T
* configuration, SDK will apply default setting.
* 2. This function should be called before calling nps_init
*/
NPS_ERROR_NO_T
nps_cfg_register(
const UI32_T unit,
NPS_CFG_GET_FUNC_T ptr_cfg_callback);
/* FUNCTION NAME: nps_cfg_led_register
* PURPOSE:
* The function is to register NPS_CFG_GET_FUNC to SDK.
*
* INPUT:
* unit -- Device unit number.
* ptr_led_cfg_callback -- function to get LED configuration array.
*
* OUTPUT:
* None
*
* RETURN:
* NPS_E_OK -- Operate success.
* NPS_E_BAD_PARAMETER -- Bad parameter.
*
* NOTES:
* 1. During SDK initializtion, it will call registered NPS_CFG_GET_FUNC to get configuration
* and apply them.
* If No registered NPS_CFG_GET_LED_FUNC or can not get specified external LED cfg
* configuration, SDK will apply default setting.
* 2. This function should be called before calling nps_init
*/
NPS_ERROR_NO_T
nps_cfg_led_register(
const UI32_T unit,
NPS_CFG_GET_LED_FUNC_T ptr_led_cfg_callback);
#endif /* NPS_CFG_H */

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/* Copyright (C) 2019 Nephos, Inc.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of version 2 of the GNU General Public
* License as published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* version 2 along with this program.
*/
/* FILE NAME: nps_error.h
* PURPOSE:
* Define the generic error code on NPS SDK.
* NOTES:
*/
#ifndef NPS_ERROR_H
#define NPS_ERROR_H
/* INCLUDE FILE DECLARATIONS
*/
#include <nps_types.h>
/* NAMING CONSTANT DECLARATIONS
*/
/* MACRO FUNCTION DECLARATIONS
*/
/* DATA TYPE DECLARATIONS
*/
typedef enum
{
NPS_E_OK = 0, /* Ok and no error */
NPS_E_BAD_PARAMETER, /* Parameter is wrong */
NPS_E_NO_MEMORY, /* No memory is available */
NPS_E_TABLE_FULL, /* Table is full */
NPS_E_ENTRY_NOT_FOUND, /* Entry is not found */
NPS_E_ENTRY_EXISTS, /* Entry already exists */
NPS_E_NOT_SUPPORT, /* Feature is not supported */
NPS_E_ALREADY_INITED, /* Module is reinitialized */
NPS_E_NOT_INITED, /* Module is not initialized */
NPS_E_OTHERS, /* Other errors */
NPS_E_ENTRY_IN_USE, /* Entry is in use */
NPS_E_LAST
} NPS_ERROR_NO_T;
/* EXPORTED SUBPROGRAM SPECIFICATIONS
*/
/* FUNCTION NAME: nps_error_getString
* PURPOSE:
* To obtain the error string of the specified error code
*
* INPUT:
* cause -- The specified error code
* OUTPUT:
* None
* RETURN:
* Pointer to the target error string
*
* NOTES:
*
*
*/
C8_T *
nps_error_getString(
const NPS_ERROR_NO_T cause );
#endif /* NPS_ERROR_H */

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/* Copyright (C) 2019 Nephos, Inc.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of version 2 of the GNU General Public
* License as published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* version 2 along with this program.
*/
/* FILE NAME: nps_types.h
* PURPOSE:
* Define the commom data type in NPS SDK.
* NOTES:
*/
#ifndef NPS_TYPES_H
#define NPS_TYPES_H
/* INCLUDE FILE DECLARATIONS
*/
#include <osal_types.h>
/* NAMING CONSTANT DECLARATIONS
*/
#define NPS_BIT_OFF 0
#define NPS_BIT_ON 1
#define NPS_PORT_INVALID (0xFFFFFFFF)
#define NPS_SEG_INVALID (0xFFFFFFFF)
/* for CPU Rx packet, indicate that the packet
* is not received from remote switch
*/
#define NPS_PATH_INVALID (0xFFFFFFFF)
#define NPS_SEMAPHORE_BINARY (1)
#define NPS_SEMAPHORE_SYNC (0)
#define NPS_SEMAPHORE_WAIT_FOREVER (0xFFFFFFFF)
/* MACRO FUNCTION DECLARATIONS
*/
#if defined(NPS_EN_HOST_32_BIT_BIG_ENDIAN) || defined(NPS_EN_HOST_32_BIT_LITTLE_ENDIAN)
typedef unsigned int NPS_HUGE_T;
#elif defined(NPS_EN_HOST_64_BIT_BIG_ENDIAN) || defined(NPS_EN_HOST_64_BIT_LITTLE_ENDIAN)
typedef unsigned long long int NPS_HUGE_T;
#else
#error "The 32bit and 64bit compatible data type are not defined !!"
#endif
#if defined(NPS_EN_64BIT_ADDR)
typedef unsigned long long int NPS_ADDR_T;
#else
typedef NPS_HUGE_T NPS_ADDR_T;
#endif
#if defined(NPS_EN_HOST_64_BIT_BIG_ENDIAN) || defined(NPS_EN_HOST_64_BIT_LITTLE_ENDIAN) || defined(NPS_EN_64BIT_ADDR)
#define NPS_ADDR_64_HI(__addr__) ((__addr__) >> 32)
#define NPS_ADDR_64_LOW(__addr__) ((__addr__) & 0xFFFFFFFF)
#define NPS_ADDR_32_TO_64(__hi32__,__low32__) (((unsigned long long int)(__low32__)) | \
(((unsigned long long int)(__hi32__)) << 32))
#else
#define NPS_ADDR_64_HI(__addr__) (0)
#define NPS_ADDR_64_LOW(__addr__) (__addr__)
#define NPS_ADDR_32_TO_64(__hi32__,__low32__) (__low32__)
#endif
#define NPS_BITMAP_SIZE(bit_num) ((((bit_num) - 1) / 32) + 1)
#define NPS_IPV4_IS_MULTICAST(addr) (0xE0000000 == ((addr) & 0xF0000000))
#define NPS_IPV6_IS_MULTICAST(addr) (0xFF == (((UI8_T *)(addr))[0]))
#define NPS_MAC_IS_MULTICAST(mac) ((mac[0]) & (0x1))
/* DATA TYPE DECLARATIONS
*/
typedef UI8_T NPS_BIT_MASK_8_T;
typedef UI16_T NPS_BIT_MASK_16_T;
typedef UI32_T NPS_BIT_MASK_32_T;
typedef UI64_T NPS_BIT_MASK_64_T;
typedef UI8_T NPS_MAC_T[6];
typedef UI32_T NPS_IPV4_T;
typedef UI8_T NPS_IPV6_T[16];
typedef UI32_T NPS_TIME_T;
/* Bridge Domain id data type. */
typedef UI32_T NPS_BRIDGE_DOMAIN_T;
/* TRILL nickname type. */
typedef UI16_T NPS_TRILL_NICKNAME_T;
typedef union NPS_IP_U
{
NPS_IPV4_T ipv4_addr;
NPS_IPV6_T ipv6_addr;
}NPS_IP_T;
typedef struct NPS_IP_ADDR_S
{
NPS_IP_T ip_addr;
BOOL_T ipv4 ;
}NPS_IP_ADDR_T;
/* Tunnel type*/
typedef enum
{
NPS_TUNNEL_TYPE_IPV4INIPV4 = 0, /* RFC2003, IPv4-in-IPv4 tunnel */
NPS_TUNNEL_TYPE_IPV4INIPV6, /* RFC2003, IPv4-in-IPv6 tunnel */
NPS_TUNNEL_TYPE_IPV6INIPV4, /* RFC2003, IPv6-in-IPv4 tunnel */
NPS_TUNNEL_TYPE_IPV6INIPV6, /* RFC2003, IPv6-in-IPv6 tunnel */
NPS_TUNNEL_TYPE_GREIPV4INIPV4, /* RFC2784/RFC2890,GRE IPv4-in-IPv4 tunnel */
NPS_TUNNEL_TYPE_GREIPV6INIPV4, /* RFC2784/RFC2890,GRE IPv6-in-IPv4 tunnel */
NPS_TUNNEL_TYPE_GREIPV4INIPV6, /* RFC2784/RFC2890,GRE IPv4-in-IPv6 tunnel */
NPS_TUNNEL_TYPE_GREIPV6INIPV6, /* RFC2784/RFC2890,GRE IPv6-in-IPv6 tunnel */
NPS_TUNNEL_TYPE_GRE_NSH,
NPS_TUNNEL_TYPE_6TO4, /* RFC3056, 6to4 tunnel*/
NPS_TUNNEL_TYPE_ISATAP, /* RFC5214, ISATAP tunnel */
NPS_TUNNEL_TYPE_NVGRE_L2,
NPS_TUNNEL_TYPE_NVGRE_V4,
NPS_TUNNEL_TYPE_NVGRE_V6,
NPS_TUNNEL_TYPE_NVGRE_NSH,
NPS_TUNNEL_TYPE_VXLAN,
NPS_TUNNEL_TYPE_GTP_V4,
NPS_TUNNEL_TYPE_GTP_V6,
NPS_TUNNEL_TYPE_MPLSINGRE,
NPS_TUNNEL_TYPE_VXLANGPE_L2,
NPS_TUNNEL_TYPE_VXLANGPE_V4,
NPS_TUNNEL_TYPE_VXLANGPE_V6,
NPS_TUNNEL_TYPE_VXLANGPE_NSH,
NPS_TUNNEL_TYPE_FLEX0_L2,
NPS_TUNNEL_TYPE_FLEX0_V4,
NPS_TUNNEL_TYPE_FLEX0_V6,
NPS_TUNNEL_TYPE_FLEX0_NSH,
NPS_TUNNEL_TYPE_FLEX1_L2,
NPS_TUNNEL_TYPE_FLEX1_V4,
NPS_TUNNEL_TYPE_FLEX1_V6,
NPS_TUNNEL_TYPE_FLEX1_NSH,
NPS_TUNNEL_TYPE_FLEX2_L2,
NPS_TUNNEL_TYPE_FLEX2_V4,
NPS_TUNNEL_TYPE_FLEX2_V6,
NPS_TUNNEL_TYPE_FLEX2_NSH,
NPS_TUNNEL_TYPE_FLEX3_L2,
NPS_TUNNEL_TYPE_FLEX3_V4,
NPS_TUNNEL_TYPE_FLEX3_V6,
NPS_TUNNEL_TYPE_FLEX3_NSH,
NPS_TUNNEL_TYPE_LAST
} NPS_TUNNEL_TYPE_T;
/* tunnel key */
typedef struct NPS_TUNNEL_KEY_S
{
NPS_IP_ADDR_T src_ip; /* key: The outer source IP address used by tunnel encapsulation.*/
NPS_IP_ADDR_T dst_ip; /* key: The outer destination IP address used by tunnel encapsulation.
* For automatic tunnel, this is not required. If not specified,
* its ip address value must be set to 0, but the IP version
* must be same with src_ip.
*/
NPS_TUNNEL_TYPE_T tunnel_type; /*key: The tunnel type.*/
}NPS_TUNNEL_KEY_T;
typedef UI16_T NPS_VLAN_T;
typedef UI32_T NPS_PORT_T;
typedef enum{
NPS_PORT_TYPE_NORMAL = 0,
NPS_PORT_TYPE_UNIT_PORT,
NPS_PORT_TYPE_LAG,
NPS_PORT_TYPE_VM_ETAG,
NPS_PORT_TYPE_VM_VNTAG,
NPS_PORT_TYPE_VM_VEPA,
NPS_PORT_TYPE_FCOE,
NPS_PORT_TYPE_IP_TUNNEL,
NPS_PORT_TYPE_TRILL,
NPS_PORT_TYPE_MPLS,
NPS_PORT_TYPE_MPLS_PW,
NPS_PORT_TYPE_CPU_PORT,
NPS_PORT_TYPE_SFC,
NPS_PORT_TYPE_LAST
}NPS_PORT_TYPE_T;
/*support Green/Yellow/Red color*/
typedef enum
{
NPS_COLOR_GREEN = 0,
NPS_COLOR_YELLOW,
NPS_COLOR_RED,
NPS_COLOR_LAST
}NPS_COLOR_T;
typedef enum
{
NPS_FWD_ACTION_FLOOD = 0,
NPS_FWD_ACTION_NORMAL,
NPS_FWD_ACTION_DROP,
NPS_FWD_ACTION_COPY_TO_CPU,
NPS_FWD_ACTION_REDIRECT_TO_CPU,
NPS_FWD_ACTION_FLOOD_COPY_TO_CPU,
NPS_FWD_ACTION_DROP_COPY_TO_CPU,
NPS_FWD_ACTION_LAST
} NPS_FWD_ACTION_T;
typedef NPS_HUGE_T NPS_THREAD_ID_T;
typedef NPS_HUGE_T NPS_SEMAPHORE_ID_T;
typedef NPS_HUGE_T NPS_ISRLOCK_ID_T;
typedef NPS_HUGE_T NPS_IRQ_FLAGS_T;
typedef enum
{
NPS_DIR_INGRESS = 0,
NPS_DIR_EGRESS,
NPS_DIR_BOTH,
NPS_DIR_LAST
}NPS_DIR_T;
typedef enum
{
NPS_VLAN_ACTION_SET,
NPS_VLAN_ACTION_KEEP,
NPS_VLAN_ACTION_REMOVE,
NPS_VLAN_ACTION_LAST
} NPS_VLAN_ACTION_T;
/* VLAN Precedence */
/* 000 = SUBNET_PROTOCOL_MAC_PORT
* 001 = SUBNET_MAC_PROTOCOL_PORT
* 010 = PROTOCOL_SUBNET_MAC_PORT
* 011 = PROTOCOL_MAC_SUBNET_PORT
* 100 = MAC_SUBNET_PROTOCOL_PORT
* 101 = MAC_PROTOCOL_SUBNET_PORT
*/
typedef enum
{
NPS_VLAN_PRECEDENCE_SUBNET_MAC_PROTOCOL_PORT = 1,
NPS_VLAN_PRECEDENCE_MAC_SUBNET_PROTOCOL_PORT = 4,
NPS_VLAN_PRECEDENCE_PORT_ONLY = 7,
NPS_VLAN_PRECEDENCE_FAVOR_TYPE = 8,
NPS_VLAN_PRECEDENCE_FAVOR_ADDR = 9,
NPS_VLAN_PRECEDENCE_LAST
} NPS_VLAN_PRECEDENCE_T;
/* VLAN Tag Type */
typedef enum
{
NPS_VLAN_TAG_NONE = 0, /* UnTag */
NPS_VLAN_TAG_SINGLE_PRI, /* Single Customer/Service Priority Tag */
NPS_VLAN_TAG_SINGLE, /* Single Customer/Service Tag */
NPS_VLAN_TAG_DOUBLE_PRI, /* Double Tag with any VID=0 */
NPS_VLAN_TAG_DOUBLE, /* Double Tag */
NPS_VLAN_TAG_LAST
} NPS_VLAN_TAG_T;
typedef struct NPS_BUM_INFO_S
{
UI32_T mcast_id;
UI32_T group_label; /* l2 da group label */
UI32_T vid; /* used when FLAGS_ADD_VID is set */
#define NPS_BUM_INFO_FLAGS_MCAST_VALID (1 << 0)
#define NPS_BUM_INFO_FLAGS_TO_CPU (1 << 1)
#define NPS_BUM_INFO_FLAGS_ADD_VID (1 << 2) /* single tag to double tag (i.e) QinQ */
#define NPS_BUM_INFO_FLAGS_TRILL_ALL_TREE (1 << 3)
UI32_T flags;
} NPS_BUM_INFO_T;
typedef enum
{
NPS_PHY_TYPE_INTERNAL = 0x0,
NPS_PHY_TYPE_EXTERNAL,
NPS_PHY_TYPE_LAST
} NPS_PHY_TYPE_T;
typedef enum
{
NPS_PHY_DEVICE_ADDR_PMA_PMD = 1,
NPS_PHY_DEVICE_ADDR_WIS = 2,
NPS_PHY_DEVICE_ADDR_PCS = 3,
NPS_PHY_DEVICE_ADDR_PHY_XS = 4,
NPS_PHY_DEVICE_ADDR_DTE_XS = 5,
NPS_PHY_DEVICE_ADDR_TC = 6,
NPS_PHY_DEVICE_ADDR_AN = 7,
NPS_PHY_DEVICE_ADDR_VENDOR_1 = 30,
NPS_PHY_DEVICE_ADDR_VENDOR_2 = 31,
NPS_PHY_DEVICE_ADDR_LAST
} NPS_PHY_DEVICE_ADDR_T;
typedef struct NPS_RANGE_INFO_S
{
UI32_T min_id;
UI32_T max_id;
UI32_T max_member_cnt;
#define NPS_RANGE_INFO_FLAGS_MAX_MEMBER_CNT (1 << 0)
UI32_T flags;
} NPS_RANGE_INFO_T;
/* EXPORTED SUBPROGRAM SPECIFICATIONS
*/
#endif /* NPS_TYPES_H */

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/* Copyright (C) 2019 Nephos, Inc.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of version 2 of the GNU General Public
* License as published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* version 2 along with this program.
*/
/* FILE NAME: osal_mdc.h
* PURPOSE:
* 1. Provide device operate from AML interface
* NOTES:
*
*/
#ifndef OSAL_MDC_H
#define OSAL_MDC_H
/* INCLUDE FILE DECLARATIONS */
#include <nps_types.h>
#include <aml.h>
#define OSAL_MDC_DRIVER_NAME "nps_dev"
#define OSAL_MDC_DRIVER_MISC_MAJOR_NUM (10)
#define OSAL_MDC_DRIVER_MISC_MINOR_NUM (250)
#define OSAL_MDC_PCI_BUS_WIDTH (4)
#define OSAL_MDC_DMA_LIST_SZ_UNLIMITED (0)
#define OSAL_MDC_DMA_LIST_NAME "RSRV_DMA"
#define OSAL_MDC_DMA_SEMAPHORE_NAME "DMALIST"
/* NAMING CONSTANT DECLARATIONS
*/
/* linked list node */
#if defined(NPS_LINUX_KERNEL_MODE)
typedef struct OSAL_MDC_LIST_NODE_S
{
void *ptr_data; /* node data */
struct OSAL_MDC_LIST_NODE_S *ptr_next; /* point to next link node */
struct OSAL_MDC_LIST_NODE_S *ptr_prev; /* point to previous link node */
} OSAL_MDC_LIST_NODE_T;
/* linked list head */
typedef struct OSAL_MDC_LIST_S
{
OSAL_MDC_LIST_NODE_T *ptr_head_node; /* linked list head node */
OSAL_MDC_LIST_NODE_T *ptr_tail_node; /* linked list tail node */
UI32_T capacity; /* max count of nodes in list
* size=0: the capacity is unlimited.
* size>0: the capacity is limited.
*/
UI32_T node_cnt; /* the count of nodes in the list */
} OSAL_MDC_LIST_T;
#endif /* End of defined(NPS_LINUX_KERNEL_MODE) */
typedef struct
{
NPS_ADDR_T phy_addr;
void *ptr_virt_addr;
NPS_ADDR_T size;
#if defined(NPS_EN_DMA_RESERVED)
BOOL_T available;
#endif
} OSAL_MDC_DMA_NODE_T;
typedef struct
{
#if defined(NPS_EN_DMA_RESERVED)
void *ptr_rsrv_virt_addr;
NPS_ADDR_T rsrv_phy_addr;
NPS_ADDR_T rsrv_size;
#else
struct device *ptr_dma_dev; /* for allocate/free system memory */
#endif
void *ptr_dma_list; /* the type should be casted again when use */
NPS_SEMAPHORE_ID_T sema;
} OSAL_MDC_DMA_INFO_T;
#if defined(NPS_LINUX_USER_MODE)
/* Data type of IOCTL argument for DMA management */
typedef struct
{
#if defined(NPS_EN_DMA_RESERVED)
NPS_ADDR_T rsrv_dma_phy_addr; /* information of reserved memory */
NPS_ADDR_T rsrv_dma_size;
#else
NPS_ADDR_T phy_addr; /* information of system memory */
NPS_ADDR_T size;
#endif
} OSAL_MDC_IOCTL_DMA_DATA_T;
/* Data type of IOCTL argument for device initialization */
#pragma pack (push,1)
typedef struct
{
AML_DEV_ID_T id[NPS_CFG_MAXIMUM_CHIPS_PER_SYSTEM];
NPS_ADDR_T pci_mmio_phy_start[NPS_CFG_MAXIMUM_CHIPS_PER_SYSTEM];
NPS_ADDR_T pci_mmio_size[NPS_CFG_MAXIMUM_CHIPS_PER_SYSTEM];
UI32_T dev_num;
} OSAL_MDC_IOCTL_DEV_DATA_T;
#pragma pack (pop)
typedef enum
{
OSAL_MDC_IOCTL_ACCESS_READ = 0,
OSAL_MDC_IOCTL_ACCESS_WRITE,
OSAL_MDC_IOCTL_ACCESS_READ_WRITE,
OSAL_MDC_IOCTL_ACCESS_NONE,
OSAL_MDC_IOCTL_ACCESS_LAST
} OSAL_MDC_IOCTL_ACCESS_T;
typedef enum
{
OSAL_MDC_IOCTL_TYPE_MDC_INIT_DEV = 0,
OSAL_MDC_IOCTL_TYPE_MDC_DEINIT_DEV,
OSAL_MDC_IOCTL_TYPE_MDC_INIT_RSRV_DMA_MEM,
OSAL_MDC_IOCTL_TYPE_MDC_DEINIT_RSRV_DMA_MEM,
OSAL_MDC_IOCTL_TYPE_MDC_ALLOC_SYS_DMA_MEM,
OSAL_MDC_IOCTL_TYPE_MDC_FREE_SYS_DMA_MEM,
OSAL_MDC_IOCTL_TYPE_MDC_CONNECT_ISR,
OSAL_MDC_IOCTL_TYPE_MDC_DISCONNECT_ISR,
OSAL_MDC_IOCTL_TYPE_LAST
} OSAL_MDC_IOCTL_TYPE_T;
typedef union
{
UI32_T value;
struct
{
UI32_T access : 2; /* 0:read, 1:write, 2:read and write, 3:none */
UI32_T unit : 6; /* Maximum unit number is 64. */
UI32_T size :14; /* Maximum IOCTL data size is 16KB. */
UI32_T type :10; /* Maximum 1024 IOCTL types */
} field;
} OSAL_MDC_IOCTL_CMD_T;
typedef NPS_ERROR_NO_T
(*OSAL_MDC_IOCTL_CALLBACK_FUNC_T)(
const UI32_T unit,
void *ptr_data);
#endif /* End of NPS_LINUX_USER_MODE */
/* MACRO FUNCTION DECLARATIONS
*/
/* DATA TYPE DECLARATIONS
*/
/* EXPORTED SUBPROGRAM SPECIFICATIONS
*/
NPS_ERROR_NO_T
osal_mdc_readPciReg(
const UI32_T unit,
const UI32_T offset,
UI32_T *ptr_data,
const UI32_T len);
NPS_ERROR_NO_T
osal_mdc_writePciReg(
const UI32_T unit,
const UI32_T offset,
const UI32_T *ptr_data,
const UI32_T len);
NPS_ERROR_NO_T
osal_mdc_initDevice(
AML_DEV_T *ptr_dev_list,
UI32_T *ptr_dev_num);
NPS_ERROR_NO_T
osal_mdc_deinitDevice(void);
NPS_ERROR_NO_T
osal_mdc_initDmaMem(void);
NPS_ERROR_NO_T
osal_mdc_deinitDmaMem(void);
void *
osal_mdc_allocDmaMem(
const UI32_T size);
NPS_ERROR_NO_T
osal_mdc_freeDmaMem(
void *ptr_virt_addr);
NPS_ERROR_NO_T
osal_mdc_convertVirtToPhy(
void *ptr_virt_addr,
NPS_ADDR_T *ptr_phy_addr);
NPS_ERROR_NO_T
osal_mdc_convertPhyToVirt(
const NPS_ADDR_T phy_addr,
void **pptr_virt_addr);
NPS_ERROR_NO_T
osal_mdc_registerIsr(
const UI32_T unit,
AML_DEV_ISR_FUNC_T handler,
void *ptr_cookie);
NPS_ERROR_NO_T
osal_mdc_connectIsr(
const UI32_T unit,
AML_DEV_ISR_FUNC_T handler,
AML_DEV_ISR_DATA_T *ptr_cookie);
NPS_ERROR_NO_T
osal_mdc_disconnectIsr(
const UI32_T unit);
NPS_ERROR_NO_T
osal_mdc_flushCache(
void *ptr_virt_addr,
const UI32_T size);
NPS_ERROR_NO_T
osal_mdc_invalidateCache(
void *ptr_virt_addr,
const UI32_T size);
#endif /* OSAL_MDC_H */

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/* Copyright (C) 2019 Nephos, Inc.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of version 2 of the GNU General Public
* License as published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* version 2 along with this program.
*/
/* FILE NAME: osal_types.h
* PURPOSE:
* Define the commom data type in NPS SDK.
* NOTES:
*/
#ifndef OSAL_TYPES_H
#define OSAL_TYPES_H
/* INCLUDE FILE DECLARATIONS
*/
/* NAMING CONSTANT DECLARATIONS
*/
#ifndef FALSE
#define FALSE 0
#endif
#ifndef TRUE
#define TRUE 1
#endif
#ifndef NULL
#define NULL (void *)0
#endif
#if defined(NPS_EN_HOST_64_BIT_BIG_ENDIAN)
#define UI64_MSW 0
#define UI64_LSW 1
#elif defined(NPS_EN_HOST_64_BIT_LITTLE_ENDIAN)
#define UI64_MSW 1
#define UI64_LSW 0
#else
#define UI64_MSW 1
#define UI64_LSW 0
#endif
#if defined(NPS_EN_COMPILER_SUPPORT_LONG_LONG)
#define UI64_HI(dst) ((UI32_T)((dst) >> 32))
#define UI64_LOW(dst) ((UI32_T)((dst) & 0xffffffff))
#define UI64_ASSIGN(dst, high, low) ((dst) = ((long long)(high) << 32 | (long long)(low)))
#define UI64_SET(dst, src) ((dst) = (src))
#define UI64_ADD_UI32(dst, src) ((dst) += ((long long)(src)))
#define UI64_SUB_UI32(dst, src) ((dst) -= ((long long)(src)))
#define UI64_ADD_UI64(dst, src) ((dst) += (src))
#define UI64_SUB_UI64(dst, src) ((dst) -= (src))
#define UI64_AND(dst, src) ((dst) &= (src))
#define UI64_OR(dst, src) ((dst) |= (src))
#define UI64_XOR(dst, src) ((dst) ^= (src))
#define UI64_NOT(dst) ((dst) = ~(dst))
#define UI64_MULT_UI32(dst, src) ((dst) *= (src))
#define UI64_MULT_UI64(dst, src) ((dst) *= (src))
/* UI64_T type data comparion:
* if data1 > data2 return 1
* if data1 < data2 return -1
* if data1 == data2 return 0
*/
#define UI64_CMP(data1, data2) (((data1) > (data2)) ? 1 : (((data1) < (data2)) ? -1 : 0))
#else
#define UI64_HI(dst) ((dst).ui64[UI64_MSW])
#define UI64_LOW(dst) ((dst).ui64[UI64_LSW])
#define UI64_ASSIGN(dst, high, low) \
do \
{ \
UI64_HI(dst) = (high); \
UI64_LOW(dst) = (low); \
} while(0)
#define UI64_SET(dst, src) \
do \
{ \
UI64_HI(dst) = UI64_HI(src); \
UI64_LOW(dst) = UI64_LOW(src); \
} while(0)
#define UI64_ADD_UI32(dst, src) \
do \
{ \
UI32_T _i_ = UI64_LOW(dst); \
UI64_LOW(dst) += (src); \
if (UI64_LOW(dst) < _i_) \
{ \
UI64_HI(dst)++; \
} \
} while(0)
#define UI64_SUB_UI32(dst, src) \
do \
{ \
UI32_T _i_ = UI64_LOW(dst); \
UI64_LOW(dst) -= src; \
if (UI64_LOW(dst) > _i_) \
{ \
UI64_HI(dst)--; \
} \
} while(0)
#define UI64_ADD_UI64(dst, src) \
do \
{ \
UI32_T _i_ = UI64_LOW(dst); \
UI64_LOW(dst) += UI64_LOW(src); \
if (UI64_LOW(dst) < _i_) \
{ \
UI64_HI(dst)++; \
} \
UI64_HI(dst) += UI64_HI(src); \
} while(0)
#define UI64_SUB_UI64(dst, src) \
do { \
UI32_T _i_ = UI64_LOW(dst); \
UI64_LOW(dst) -= UI64_LOW(src); \
if (UI64_LOW(dst) > _i_) \
{ \
UI64_HI(dst)--; \
} \
UI64_HI(dst) -= UI64_HI(src); \
} while(0)
#define UI64_AND(dst, src) \
do { \
UI64_HI(dst) &= UI64_HI(src); \
UI64_LOW(dst) &= UI64_LOW(src); \
} while(0)
#define UI64_OR(dst, src) \
do { \
UI64_HI(dst) |= UI64_HI(src); \
UI64_LOW(dst) |= UI64_LOW(src); \
} while(0)
#define UI64_XOR(dst, src) \
do { \
UI64_HI(dst) ^= UI64_HI(src); \
UI64_LOW(dst) ^= UI64_LOW(src); \
} while(0)
#define UI64_NOT(dst) \
do { \
UI64_HI(dst) = ~UI64_HI(dst); \
UI64_LOW(dst) = ~UI64_LOW(dst); \
} while(0)
/* UI64_T type data comparion:
* if data1 > data2 return 1
* if data1 < data2 return -1
* if data1 == data2 return 0
*/
#define UI64_CMP(data1, data2) \
(((data1).ui64[UI64_MSW] > (data2).ui64[UI64_MSW]) \
? 1 : (((data1).ui64[UI64_MSW] == (data2).ui64[UI64_MSW]) \
? (((data1).ui64[UI64_LSW] == (data2).ui64[UI64_LSW]) \
? 0 :(((data1).ui64[UI64_LSW] > (data2).ui64[UI64_LSW]) \
? 1 : -1)) : -1))
#define UI64_MULT_UI64(dst, src) \
do \
{ \
UI32_T _ret_low_ = 0; \
UI32_T _ret_high_ = 0; \
UI32_T _i_ = 0; \
UI32_T _j_ = 0; \
UI32_T _temp_ = 0; \
UI32_T dst_t[4] = {0, 0, 0, 0}; \
UI32_T src_t[4] = {0, 0, 0, 0}; \
dst_t[0] = UI64_LOW(dst) & 0xFFFF; \
dst_t[1] = UI64_LOW(dst) >> 16; \
dst_t[2] = UI64_HI(dst) & 0xFFFF; \
dst_t[3] = UI64_HI(dst) >> 16; \
src_t[0] = UI64_LOW(src) & 0xFFFF; \
src_t[1] = UI64_LOW(src) >> 16; \
src_t[2] = UI64_HI(src) & 0xFFFF; \
src_t[3] = UI64_HI(src) >> 16; \
for(_i_ = 0; _i_ < 4; _i_++) \
{ \
for(_j_ = 0; _j_ < 4; _j_++) \
{ \
if((dst_t[_i_] != 0) && (src_t[_j_] != 0)) \
{ \
_temp_ = dst_t[_i_] * src_t[_j_]; \
if(0 == (_i_ + _j_)) \
{ \
_ret_low_ += _temp_; \
if (_ret_low_ < _temp_) \
{ \
_ret_high_++; \
} \
} \
if(1 == (_i_ + _j_)) \
{ \
_ret_low_ += (_temp_ << 16); \
if (_ret_low_ < (_temp_ << 16)) \
{ \
_ret_high_++; \
} \
_ret_high_ += (_temp_ >> 16); \
} \
if(2 == (_i_+_j_)) \
{ \
_ret_high_ += _temp_; \
} \
if(3 == (_i_ + _j_)) \
{ \
_ret_high_ += (_temp_ << 16); \
} \
} \
} \
} \
UI64_HI(dst) = _ret_high_; \
UI64_LOW(dst) = _ret_low_; \
} while(0)
#define UI64_MULT_UI32(dst, src) \
do \
{ \
UI32_T _ret_low_ = 0; \
UI32_T _ret_high_ = 0; \
UI32_T _i_ = 0; \
UI32_T _j_ = 0; \
UI32_T _temp_ = 0; \
UI32_T dst_t[4] = {0, 0, 0, 0}; \
UI32_T src_t[2] = {0, 0}; \
dst_t[0] = UI64_LOW(dst) & 0xFFFF; \
dst_t[1] = UI64_LOW(dst) >> 16; \
dst_t[2] = UI64_HI(dst) & 0xFFFF; \
dst_t[3] = UI64_HI(dst) >> 16; \
src_t[0] = src & 0xFFFF; \
src_t[1] = src >> 16; \
for(_i_ = 0; _i_ < 4; _i_++) \
{ \
for(_j_ = 0; _j_ < 2; _j_++) \
{ \
if((dst_t[_i_] != 0) && (src_t[_j_] != 0)) \
{ \
_temp_ = dst_t[_i_] * src_t[_j_]; \
if(0 == (_i_ + _j_)) \
{ \
_ret_low_ += _temp_; \
if (_ret_low_ < _temp_) \
{ \
_ret_high_++; \
} \
} \
if(1 == (_i_ + _j_)) \
{ \
_ret_low_ += (_temp_ << 16); \
if (_ret_low_ < (_temp_ << 16)) \
{ \
_ret_high_++; \
} \
_ret_high_ += (_temp_ >> 16); \
} \
if(2 == (_i_ + _j_)) \
{ \
_ret_high_ += _temp_; \
} \
if(3 == (_i_ + _j_)) \
{ \
_ret_high_ += (_temp_ << 16); \
} \
} \
} \
} \
UI64_HI(dst) = _ret_high_; \
UI64_LOW(dst) = _ret_low_; \
} while(0)
#endif
/* DATA TYPE DECLARATIONS
*/
typedef int BOOL_T;
typedef signed char I8_T;
typedef unsigned char UI8_T;
typedef signed short I16_T;
typedef unsigned short UI16_T;
typedef signed int I32_T;
typedef unsigned int UI32_T;
typedef char C8_T;
#if defined(NPS_EN_COMPILER_SUPPORT_LONG_LONG)
typedef signed long long int I64_T;
typedef unsigned long long int UI64_T;
#else
typedef struct
{
I32_T i64[2];
} I64_T;
typedef struct
{
UI32_T ui64[2];
} UI64_T;
#endif
#endif /* OSAL_TYPES_H */

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@ -0,0 +1,37 @@
################################################################################
# Copyright (C) 2019 Nephos, Inc.
#
# This program is free software; you can redistribute it and/or
# modify it under the terms of version 2 of the GNU General Public
# License as published by the Free Software Foundation.
#
# This program is distributed in the hope that it will be useful,
# but WITHOUT ANY WARRANTY; without even the implied warranty of
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
# GNU General Public License for more details.
#
# You should have received a copy of the GNU General Public License
# version 2 along with this program.
################################################################################
DEV_MODULE_NAME := nps_dev
NETIF_MODULE_NAME := nps_netif
################################################################################
DEV_OBJS_TOTAL := ./src/osal_mdc.o ./src/osal_isymbol.o
NETIF_OBJS_TOTAL := ./src/hal_tau_pkt_knl.o ./src/netif_perf.o ./src/netif_osal.o
obj-m := $(DEV_MODULE_NAME).o $(NETIF_MODULE_NAME).o
$(DEV_MODULE_NAME)-objs := $(DEV_OBJS_TOTAL)
$(NETIF_MODULE_NAME)-objs := $(NETIF_OBJS_TOTAL)
KBUILD_EXTRA_SYMBOLS := $(BUILD_OUTPUT_DIR)/Module.symvers
################################################################################
folder:
$(TEST_PATH) $(BUILD_OUTPUT_DIR) || $(MKDIR) $(BUILD_OUTPUT_DIR)
$(TEST_PATH) $(BUILD_OUTPUT_DIR)/src || $(MKDIR) $(BUILD_OUTPUT_DIR)/src
compile:: folder
touch $(BUILD_OUTPUT_DIR)/Makefile
$(MAKE) -C $(OS_PATH) M=$(BUILD_OUTPUT_DIR) src=$(shell pwd) modules EXTRA_CFLAGS="$(EXTRA_CFLAGS)" KBUILD_EXTRA_SYMBOLS=$(KBUILD_EXTRA_SYMBOLS)
install::
clean::

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@ -0,0 +1,753 @@
/* Copyright (C) 2019 Nephos, Inc.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of version 2 of the GNU General Public
* License as published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* version 2 along with this program.
*/
/* FILE NAME: netif_osal.c
* PURPOSE:
* It provide customer linux API.
* NOTES:
*/
#include <linux/kernel.h>
#include <linux/types.h>
#include <linux/kthread.h>
#include <linux/semaphore.h>
#include <linux/spinlock.h>
#include <linux/spinlock_types.h>
#include <linux/netdevice.h>
#include <linux/etherdevice.h>
#include <linux/miscdevice.h>
#include <linux/wait.h>
#include <linux/cdev.h>
#include <linux/fs.h>
#include <linux/pci.h>
#include <linux/module.h>
#include <linux/version.h>
#if LINUX_VERSION_CODE >= KERNEL_VERSION(4, 11, 0)
#include <linux/sched/signal.h>
#endif
#include <netif_osal.h>
/* ----------------------------------------------------------------------------------- macro value */
#define OSAL_US_PER_SECOND (1000000) /* macro second per second */
#define OSAL_NS_PER_USECOND (1000) /* nano second per macro second */
/* ----------------------------------------------------------------------------------- macro function */
#define OSAL_LOG_ERR(msg, ...) \
osal_printf("\033[31m<osal:%d>\033[0m"msg, __LINE__, ##__VA_ARGS__)
/* ----------------------------------------------------------------------------------- struct */
extern struct pci_dev *_ptr_ext_pci_dev;
static linux_thread_t _osal_thread_head = {{0}};
/* ----------------------------------------------------------------------------------- function */
/* general */
void *
osal_memset(
void *ptr_mem,
const I32_T value,
const UI32_T num)
{
return memset(ptr_mem, value, num);
}
void *
osal_memcpy(
void *ptr_dst,
const void *ptr_src,
const UI32_T num)
{
return memcpy(ptr_dst, ptr_src, num);
}
UI32_T
osal_strlen(
const C8_T *ptr_str)
{
return strlen(ptr_str);
}
void
osal_printf(
const C8_T *ptr_fmt,
...)
{
va_list ap;
char buf[OSAL_PRN_BUF_SZ];
if (NULL != ptr_fmt)
{
va_start(ap, ptr_fmt);
vsnprintf(buf, OSAL_PRN_BUF_SZ, ptr_fmt, ap);
va_end(ap);
printk("%s", buf);
}
}
void *
osal_alloc(
const UI32_T size)
{
return kmalloc(size, GFP_ATOMIC);
}
void
osal_free(
const void *ptr_mem)
{
kfree(ptr_mem);
}
/* thread */
NPS_ERROR_NO_T
osal_init(void)
{
linux_thread_t *ptr_thread_head = &_osal_thread_head;
memset(ptr_thread_head, 0x0, sizeof(linux_thread_t));
/* init */
ptr_thread_head->ptr_prev = ptr_thread_head;
ptr_thread_head->ptr_next = ptr_thread_head;
return (NPS_E_OK);
}
NPS_ERROR_NO_T
osal_deinit(void)
{
return (NPS_E_OK);
}
NPS_ERROR_NO_T
osal_createThread(
const C8_T *ptr_thread_name,
const UI32_T stack_size,
const UI32_T priority,
void (function)(void*),
void *ptr_arg,
NPS_THREAD_ID_T *ptr_thread_id)
{
char dft_name[OSAL_THREAD_NAME_LEN + 1] = OSAL_THREAD_DFT_NAME;
linux_thread_t *ptr_thread_head = &_osal_thread_head;
linux_thread_t *ptr_thread_node = osal_alloc(sizeof(linux_thread_t));
/* process name */
osal_memcpy(ptr_thread_node->name, (0 == osal_strlen(ptr_thread_name))?
dft_name : ptr_thread_name, OSAL_THREAD_NAME_LEN);
ptr_thread_node->name[OSAL_THREAD_NAME_LEN] = '\0';
/* init */
ptr_thread_node->ptr_task = kthread_create((int(*)(void *))function, ptr_arg, ptr_thread_name);
ptr_thread_node->ptr_task->policy = SCHED_RR;
ptr_thread_node->ptr_task->rt_priority = priority;
ptr_thread_node->is_stop = FALSE;
*ptr_thread_id = (NPS_THREAD_ID_T)ptr_thread_node;
wake_up_process(ptr_thread_node->ptr_task);
/* append the thread_node */
ptr_thread_node->ptr_prev = ptr_thread_head->ptr_prev;
ptr_thread_head->ptr_prev->ptr_next = ptr_thread_node;
ptr_thread_node->ptr_next = ptr_thread_head;
ptr_thread_head->ptr_prev = ptr_thread_node;
return (NPS_E_OK);
}
NPS_ERROR_NO_T
osal_stopThread(
NPS_THREAD_ID_T *ptr_thread_id)
{
linux_thread_t *ptr_thread_node = (linux_thread_t *)(*ptr_thread_id);
ptr_thread_node->is_stop = TRUE;
return (NPS_E_OK);
}
NPS_ERROR_NO_T
osal_destroyThread(
NPS_THREAD_ID_T *ptr_thread_id)
{
linux_thread_t *ptr_thread_node = (linux_thread_t *)(*ptr_thread_id);
kthread_stop(ptr_thread_node->ptr_task);
/* remove the thread_node */
ptr_thread_node->ptr_next->ptr_prev = ptr_thread_node->ptr_prev;
ptr_thread_node->ptr_prev->ptr_next = ptr_thread_node->ptr_next;
osal_free(ptr_thread_node);
*ptr_thread_id = 0;
return (NPS_E_OK);
}
void
osal_initRunThread(void)
{
/* for reboot or shutdown without stopping kthread */
allow_signal(SIGTERM);
}
NPS_ERROR_NO_T
osal_isRunThread(void)
{
linux_thread_t *ptr_thread_node = _osal_thread_head.ptr_next;
while (1)
{
if (ptr_thread_node == &_osal_thread_head)
{
OSAL_LOG_ERR("Cannot find task 0x%x.\n", current);
break;
}
if (ptr_thread_node->ptr_task == current)
{
break;
}
ptr_thread_node = ptr_thread_node->ptr_next;
}
if ((TRUE == ptr_thread_node->is_stop) || (signal_pending(current)))
{
return (NPS_E_OTHERS);
}
return (NPS_E_OK);
}
void
osal_exitRunThread(void)
{
while (!kthread_should_stop() && !signal_pending(current))
{
osal_sleepThread(OSAL_NS_PER_USECOND);
}
}
/* semaphore */
NPS_ERROR_NO_T
osal_createSemaphore(
const C8_T *ptr_sema_name,
const UI32_T sema_count,
NPS_SEMAPHORE_ID_T *ptr_semaphore_id)
{
char dft_name[OSAL_SEMA_NAME_LEN + 1] = OSAL_SEMA_DFT_NAME;
linux_sema_t *ptr_sema = osal_alloc(sizeof(linux_sema_t));
/* process name */
osal_memcpy(ptr_sema->name, (0 == osal_strlen(ptr_sema_name))?
dft_name : ptr_sema_name, OSAL_SEMA_NAME_LEN);
ptr_sema->name[OSAL_SEMA_NAME_LEN] = '\0';
/* init */
sema_init(&ptr_sema->lock, NPS_SEMAPHORE_BINARY);
*ptr_semaphore_id = (NPS_SEMAPHORE_ID_T)ptr_sema;
return (NPS_E_OK);
}
NPS_ERROR_NO_T
osal_takeSemaphore(
NPS_SEMAPHORE_ID_T *ptr_semaphore_id,
UI32_T time_out)
{
linux_sema_t *ptr_sema = (linux_sema_t *)(*ptr_semaphore_id);
if (in_interrupt())
{
return (NPS_E_OTHERS);
}
if (!down_interruptible(&ptr_sema->lock))
{
return (NPS_E_OK);
}
return (NPS_E_OTHERS);
}
NPS_ERROR_NO_T
osal_giveSemaphore(
NPS_SEMAPHORE_ID_T *ptr_semaphore_id)
{
linux_sema_t *ptr_sema = (linux_sema_t *)(*ptr_semaphore_id);
up(&ptr_sema->lock);
return (NPS_E_OK);
}
NPS_ERROR_NO_T
osal_destroySemaphore(
NPS_SEMAPHORE_ID_T *ptr_semaphore_id)
{
linux_sema_t *ptr_sema = (linux_sema_t *)(*ptr_semaphore_id);
osal_free(ptr_sema);
*ptr_semaphore_id = 0;
return (NPS_E_OK);
}
/* event */
NPS_ERROR_NO_T
osal_createEvent(
const C8_T *ptr_event_name,
NPS_SEMAPHORE_ID_T *ptr_event_id)
{
char dft_name[OSAL_EVENT_NAME_LEN + 1] = OSAL_EVENT_DFT_NAME;
linux_event_t *ptr_event = osal_alloc(sizeof(linux_event_t));
/* process name */
osal_memcpy(ptr_event->name, (0 == osal_strlen(ptr_event_name))?
dft_name : ptr_event_name, OSAL_EVENT_NAME_LEN);
ptr_event->name[OSAL_EVENT_NAME_LEN] = '\0';
/* init */
ptr_event->condition = FALSE;
init_waitqueue_head(&ptr_event->wait_que);
*ptr_event_id = (NPS_SEMAPHORE_ID_T)ptr_event;
return (NPS_E_OK);
}
NPS_ERROR_NO_T
osal_waitEvent(
NPS_SEMAPHORE_ID_T *ptr_event_id)
{
linux_event_t *ptr_event = (linux_event_t *)(*ptr_event_id);
if (!wait_event_interruptible(ptr_event->wait_que, ptr_event->condition))
{
ptr_event->condition = FALSE;
return (NPS_E_OK);
}
return (NPS_E_OTHERS);
}
NPS_ERROR_NO_T
osal_triggerEvent(
NPS_SEMAPHORE_ID_T *ptr_event_id)
{
linux_event_t *ptr_event = (linux_event_t *)(*ptr_event_id);
ptr_event->condition = TRUE;
wake_up_interruptible(&ptr_event->wait_que);
return (NPS_E_OK);
}
NPS_ERROR_NO_T
osal_destroyEvent(
NPS_SEMAPHORE_ID_T *ptr_event_id)
{
linux_event_t *ptr_event = (linux_event_t *)(*ptr_event_id);
osal_free(ptr_event);
*ptr_event_id = 0;
return (NPS_E_OK);
}
/* isr_lock */
NPS_ERROR_NO_T
osal_createIsrLock(
const C8_T *ptr_isrlock_name,
NPS_ISRLOCK_ID_T *ptr_isrlock_id)
{
char dft_name[OSAL_SPIN_NAME_LEN + 1] = OSAL_SPIN_DFT_NAME;
linux_isrlock_t *ptr_isrlock = osal_alloc(sizeof(linux_isrlock_t));
/* process name */
osal_memcpy(ptr_isrlock->name, (0 == osal_strlen(ptr_isrlock_name))?
dft_name : ptr_isrlock_name, OSAL_SPIN_NAME_LEN);
ptr_isrlock->name[OSAL_SPIN_NAME_LEN] = '\0';
/* init */
spin_lock_init(&ptr_isrlock->spinlock);
*ptr_isrlock_id = (NPS_ISRLOCK_ID_T)ptr_isrlock;
return (NPS_E_OK);
}
NPS_ERROR_NO_T
osal_takeIsrLock(
NPS_ISRLOCK_ID_T *ptr_isrlock_id,
NPS_IRQ_FLAGS_T *ptr_irq_flags)
{
linux_isrlock_t *ptr_isrlock = (linux_isrlock_t *)(*ptr_isrlock_id);
unsigned long flags = 0;
spin_lock_irqsave(&ptr_isrlock->spinlock, flags);
*ptr_irq_flags = (NPS_IRQ_FLAGS_T)flags;
return (NPS_E_OK);
}
NPS_ERROR_NO_T
osal_giveIsrLock(
NPS_ISRLOCK_ID_T *ptr_isrlock_id,
NPS_IRQ_FLAGS_T *ptr_irq_flags)
{
linux_isrlock_t *ptr_isrlock = (linux_isrlock_t *)(*ptr_isrlock_id);
unsigned long flags = 0;
flags = (unsigned long)(*ptr_irq_flags);
spin_unlock_irqrestore(&ptr_isrlock->spinlock, flags);
return (NPS_E_OK);
}
NPS_ERROR_NO_T
osal_destroyIsrLock(
NPS_ISRLOCK_ID_T *ptr_isrlock_id)
{
linux_isrlock_t *ptr_isrlock = (linux_isrlock_t *)(*ptr_isrlock_id);
osal_free(ptr_isrlock);
*ptr_isrlock_id = 0;
return (NPS_E_OK);
}
/* time */
NPS_ERROR_NO_T
osal_sleepThread(
const UI32_T usecond)
{
UI32_T tick_usec; /* how many usec per second */
UI32_T jiffies;
if (0 != usecond)
{
/* HZ : times/sec, tick = 1/HZ */
tick_usec = OSAL_TICKS_PER_SEC / HZ;
if (in_interrupt() || (usecond < tick_usec))
{
return (-1);
}
else
{
DECLARE_WAIT_QUEUE_HEAD(suspend_queue);
if (usecond > 0xFFFFFFFF - (tick_usec - 1))
{
jiffies = 0xFFFFFFFF / tick_usec;
}
else
{
jiffies = (usecond + (tick_usec - 1)) / tick_usec;
}
return wait_event_interruptible_timeout(suspend_queue, 0, jiffies);
}
}
return (NPS_E_OK);
}
NPS_ERROR_NO_T
osal_getTime(
NPS_TIME_T *ptr_time)
{
struct timeval usec_time;
do_gettimeofday(&usec_time);
*(NPS_TIME_T *)ptr_time = (usec_time.tv_sec * OSAL_US_PER_SECOND) + usec_time.tv_usec;
return (NPS_E_OK);
}
/* queue */
NPS_ERROR_NO_T
osal_que_create(
NPS_HUGE_T *ptr_queue_id,
UI32_T capacity)
{
linux_queue_t *ptr_queue = osal_alloc(sizeof(linux_queue_t));
ptr_queue->head = 0;
ptr_queue->tail = 0;
ptr_queue->wr_cnt = 0;
ptr_queue->rd_cnt = 0;
ptr_queue->capacity = capacity;
ptr_queue->ptr_entry = osal_alloc(sizeof(linux_queue_entry_t) * capacity);
memset(ptr_queue->ptr_entry, 0x0, sizeof(linux_queue_entry_t) * capacity);
*ptr_queue_id = (NPS_HUGE_T)ptr_queue;
return (NPS_E_OK);
}
NPS_ERROR_NO_T
osal_que_enque(
NPS_HUGE_T *ptr_queue_id,
void *ptr_data)
{
linux_queue_t *ptr_queue = (linux_queue_t *)(*ptr_queue_id);
if (ptr_queue->wr_cnt - ptr_queue->rd_cnt >= ptr_queue->capacity)
{
return (NPS_E_OTHERS);
}
/* save data to the tail */
ptr_queue->ptr_entry[ptr_queue->tail].ptr_data = ptr_data;
/* calculate tail and wr_cnt */
ptr_queue->tail++;
if (ptr_queue->tail >= ptr_queue->capacity)
{
ptr_queue->tail = 0;
}
ptr_queue->wr_cnt++;
return (NPS_E_OK);
}
NPS_ERROR_NO_T
osal_que_deque(
NPS_HUGE_T *ptr_queue_id,
void **pptr_data)
{
linux_queue_t *ptr_queue = (linux_queue_t *)(*ptr_queue_id);
if (ptr_queue->wr_cnt == ptr_queue->rd_cnt)
{
return (NPS_E_OTHERS);
}
/* get data from head */
*pptr_data = ptr_queue->ptr_entry[ptr_queue->head].ptr_data;
ptr_queue->ptr_entry[ptr_queue->head].ptr_data = NULL;
/* calculate head and rd_cnt */
ptr_queue->head++;
if (ptr_queue->head >= ptr_queue->capacity)
{
ptr_queue->head = 0;
}
ptr_queue->rd_cnt++;
return (NPS_E_OK);
}
NPS_ERROR_NO_T
osal_que_destroy(
NPS_HUGE_T *ptr_queue_id)
{
linux_queue_t *ptr_queue = (linux_queue_t *)(*ptr_queue_id);
osal_free(ptr_queue->ptr_entry);
osal_free(ptr_queue);
*ptr_queue_id = 0;
return (NPS_E_OK);
}
NPS_ERROR_NO_T
osal_que_getCount(
NPS_HUGE_T *ptr_queue_id,
unsigned int *ptr_count)
{
linux_queue_t *ptr_queue = (linux_queue_t *)(*ptr_queue_id);
*ptr_count = ptr_queue->wr_cnt - ptr_queue->rd_cnt;
return (NPS_E_OK);
}
/* IO */
int
osal_io_copyToUser(
void *ptr_usr_buf,
void *ptr_knl_buf,
unsigned int size)
{
return copy_to_user(ptr_usr_buf, ptr_knl_buf, size);
}
int
osal_io_copyFromUser(
void *ptr_knl_buf,
void *ptr_usr_buf,
unsigned int size)
{
return copy_from_user(ptr_knl_buf, ptr_usr_buf, size);
}
/* dma */
void *
osal_dma_alloc(
const UI32_T size)
{
struct device *ptr_dev = &_ptr_ext_pci_dev->dev;
linux_dma_t *ptr_dma_node = NULL;
dma_addr_t phy_addr = 0x0;
ptr_dma_node = dma_alloc_coherent(ptr_dev, sizeof(linux_dma_t) + size, &phy_addr, GFP_ATOMIC);
ptr_dma_node->size = sizeof(linux_dma_t) + size;
ptr_dma_node->phy_addr = phy_addr;
return (void *)ptr_dma_node->data;
}
NPS_ERROR_NO_T
osal_dma_free(
void *ptr_dma_mem)
{
struct device *ptr_dev = &_ptr_ext_pci_dev->dev;
linux_dma_t *ptr_dma_node = (linux_dma_t *)(ptr_dma_mem - sizeof(linux_dma_t));
dma_free_coherent(ptr_dev, ptr_dma_node->size, ptr_dma_node, ptr_dma_node->phy_addr);
return (NPS_E_OK);
}
dma_addr_t
osal_dma_convertVirtToPhy(
void *ptr_virt_addr)
{
return virt_to_phys(ptr_virt_addr);
}
void *
osal_dma_convertPhyToVirt(
const dma_addr_t phy_addr)
{
return phys_to_virt(phy_addr);
}
int
osal_dma_flushCache(
void *ptr_virt_addr,
const unsigned int size)
{
#if defined(CONFIG_NOT_COHERENT_CACHE) || defined(CONFIG_DMA_NONCOHERENT)
#if defined(dma_cache_wback_inv)
dma_cache_wback_inv((NPS_HUGE_T)ptr_virt_addr, size);
#else
dma_cache_sync(NULL, ptr_virt_addr, size, DMA_TO_DEVICE);
#endif
#endif
return (0);
}
int
osal_dma_invalidateCache(
void *ptr_virt_addr,
const unsigned int size)
{
#if defined(CONFIG_NOT_COHERENT_CACHE) || defined(CONFIG_DMA_NONCOHERENT)
#if defined(dma_cache_wback_inv)
dma_cache_wback_inv((NPS_HUGE_T)ptr_virt_addr, size);
#else
dma_cache_sync(NULL, ptr_virt_addr, size, DMA_FROM_DEVICE);
#endif
#endif
return (0);
}
/* skb */
struct sk_buff *
osal_skb_alloc(
UI32_T size)
{
struct sk_buff *ptr_skb = NULL;
/* <skbuff.h>
* 1. alloc_skb (len, flag) : GFP_KERNEL
* 2. netdev_alloc_skb (dev, len) : GFP_ATOMIC
* 3. dev_alloc_skb (len) : GFP_ATOMIC
* 4. netdev_alloc_skb_ip_align (dev, len) : GFP_ATOMIC
*
* note: Eth header is 14-bytes, we reservd 2-bytes to alignment Ip header
*/
ptr_skb = dev_alloc_skb(size + NET_IP_ALIGN);
skb_reserve(ptr_skb, NET_IP_ALIGN);
skb_put(ptr_skb, size);
return (ptr_skb);
}
void
osal_skb_free(
struct sk_buff *ptr_skb)
{
/* <skbuff.h>
* 1. dev_kfree_skb (*skb) : release in process context
* 2. dev_kfree_skb_irq (*skb) : release in interrupt context
* 3. dev_kfree_skb_any (*skb) : release in any context
*/
dev_kfree_skb_any(ptr_skb);
}
dma_addr_t
osal_skb_mapDma(
struct sk_buff *ptr_skb,
enum dma_data_direction dir)
{
struct device *ptr_dev = &_ptr_ext_pci_dev->dev;
dma_addr_t phy_addr = 0x0;
phy_addr = dma_map_single(ptr_dev, ptr_skb->data, ptr_skb->len, dir);
if (dma_mapping_error(ptr_dev, phy_addr))
{
phy_addr = 0x0;
}
return (phy_addr);
}
void
osal_skb_unmapDma(
const dma_addr_t phy_addr,
UI32_T size,
enum dma_data_direction dir)
{
struct device *ptr_dev = &_ptr_ext_pci_dev->dev;
dma_unmap_single(ptr_dev, phy_addr, size, dir);
}
void
osal_skb_send(
struct sk_buff *ptr_skb)
{
dev_queue_xmit(ptr_skb);
}
void
osal_skb_recv(
struct sk_buff *ptr_skb)
{
/* 1. netif_rx() : handle skb in process context
* 2. netif_rx_ni() : handle skb in interrupt context
* 3. netif_receive_skb() : for NAPI
*/
netif_rx(ptr_skb);
}

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/* Copyright (C) 2019 Nephos, Inc.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of version 2 of the GNU General Public
* License as published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* version 2 along with this program.
*/
/* FILE NAME: netif_perf.c
* PURPOSE:
* It provide customer performance test API.
* NOTES:
*/
#include <nps_error.h>
#include <nps_types.h>
#include <netif_osal.h>
#include <netif_perf.h>
#if defined (NPS_EN_TAURUS)
#include <hal_tau_pkt_knl.h>
#endif
/* -------------------------------------------------------------- switch */
#if defined (NPS_EN_ARIES)
#define PERF_TX_CHANNEL_NUM_MAX (HAL_ARI_PKT_TX_CHANNEL_LAST)
#define PERF_RX_CHANNEL_NUM_MAX (HAL_ARI_PKT_RX_CHANNEL_LAST)
typedef HAL_ARI_PKT_TX_SW_GPD_T PERF_TX_SW_GPD;
typedef HAL_ARI_PKT_RX_SW_GPD_T PERF_RX_SW_GPD;
#endif
#if defined (NPS_EN_TAURUS)
#define PERF_TX_CHANNEL_NUM_MAX (HAL_TAU_PKT_TX_CHANNEL_LAST)
#define PERF_RX_CHANNEL_NUM_MAX (HAL_TAU_PKT_RX_CHANNEL_LAST)
typedef HAL_TAU_PKT_TX_SW_GPD_T PERF_TX_SW_GPD;
typedef HAL_TAU_PKT_RX_SW_GPD_T PERF_RX_SW_GPD;
#endif
/* -------------------------------------------------------------- common */
#define PERF_TX_PERF_NUM (1000000) /* max: 4294967 */
#define PERF_TX_PERF_MESG (50000)
#define PERF_TX_PERF_FAIL (10000)
#define PERF_RX_PERF_NUM (1000000) /* max: 4294967 */
#define PERF_RX_PERF_MESG (50000)
#define PERF_RX_PERF_FAIL (10000)
/* -------------------------------------------------------------- callbacks for chip dependency */
/* Tx */
typedef NPS_ERROR_NO_T
(*PERF_TX_GET_INTR_T)(
const UI32_T unit,
const UI32_T channel,
UI32_T *ptr_intr_cnt);
typedef NPS_ERROR_NO_T
(*PERF_TX_GET_NETDEV_T)(
const UI32_T unit,
const UI32_T port,
struct net_device **pptr_net_dev);
typedef NPS_ERROR_NO_T
(*PERF_TX_PREPARE_GPD_T)(
const UI32_T unit,
const NPS_ADDR_T phy_addr,
const UI32_T len,
const UI32_T port,
PERF_TX_SW_GPD *ptr_sw_gpd);
typedef NPS_ERROR_NO_T
(*PERF_TX_SEND_GPD_T)(
const UI32_T unit,
const UI32_T channel,
PERF_TX_SW_GPD *ptr_sw_gpd);
/* Rx */
typedef NPS_ERROR_NO_T
(*PERF_RX_GET_INTR_T)(
const UI32_T unit,
const UI32_T channel,
UI32_T *ptr_intr_cnt);
/* -------------------------------------------------------------- structs */
typedef enum
{
PERF_DIR_TX = 0,
PERF_DIR_RX,
PERF_DIR_LAST,
} PERF_DIR_T;
typedef struct
{
UI32_T unit;
UI32_T channel;
UI32_T len;
UI32_T num;
UI32_T port;
BOOL_T test_skb;
} PERF_COOKIE_T;
typedef struct
{
/* netif-only */
PERF_COOKIE_T tx_cookie [PERF_TX_CHANNEL_NUM_MAX];
NPS_THREAD_ID_T tx_task [PERF_TX_CHANNEL_NUM_MAX];
NPS_SEMAPHORE_ID_T start_sync [PERF_TX_CHANNEL_NUM_MAX];
NPS_SEMAPHORE_ID_T end_sync [PERF_TX_CHANNEL_NUM_MAX];
UI32_T send_ok [PERF_TX_CHANNEL_NUM_MAX];
UI32_T send_fail [PERF_TX_CHANNEL_NUM_MAX];
/* chip dependent callbacks */
PERF_TX_GET_INTR_T get_intr_cnt;
PERF_TX_GET_NETDEV_T get_netdev;
PERF_TX_PREPARE_GPD_T prepare_gpd;
PERF_TX_SEND_GPD_T send_gpd;
} PERF_TX_PERF_CB_T;
typedef struct
{
/* netif-only */
BOOL_T rx_test;
NPS_SEMAPHORE_ID_T start_sync;
NPS_SEMAPHORE_ID_T end_sync;
UI32_T target_num;
UI32_T target_len;
UI32_T recv_pass;
UI32_T recv_fail;
/* duplicate packets */
UI32_T rch_qid_map_lo [PERF_RX_CHANNEL_NUM_MAX];
UI32_T rch_qid_map_hi [PERF_RX_CHANNEL_NUM_MAX];
/* chip dependent callbacks */
PERF_RX_GET_INTR_T get_intr_cnt;
} PERF_RX_PERF_CB_T;
/* -------------------------------------------------------------- statics */
static PERF_TX_PERF_CB_T _perf_tx_perf_cb =
{
#if defined (NPS_EN_ARIES)
.get_intr_cnt = hal_ari_pkt_getTxIntrCnt,
.get_netdev = hal_ari_pkt_getNetDev, /* test_skb = TRUE */
.prepare_gpd = hal_ari_pkt_prepareGpd, /* test_skb = FALSE */
.send_gpd = hal_ari_pkt_sendGpd, /* test_skb = FALSE */
#endif
#if defined (NPS_EN_TAURUS)
.get_intr_cnt = hal_tau_pkt_getTxIntrCnt,
.get_netdev = hal_tau_pkt_getNetDev, /* test_skb = TRUE */
.prepare_gpd = hal_tau_pkt_prepareGpd, /* test_skb = FALSE */
.send_gpd = hal_tau_pkt_sendGpd, /* test_skb = FALSE */
#endif
};
static PERF_RX_PERF_CB_T _perf_rx_perf_cb =
{
#if defined (NPS_EN_ARIES)
.get_intr_cnt = hal_ari_pkt_getRxIntrCnt,
#endif
#if defined (NPS_EN_TAURUS)
.get_intr_cnt = hal_tau_pkt_getRxIntrCnt,
#endif
};
/* -------------------------------------------------------------- functions */
static void
_perf_duplicateRxPacket(
const UI32_T unit,
const UI32_T rx_channel,
const BOOL_T enable)
{
;
}
static void
_perf_showPerf(
PERF_DIR_T dir,
UI32_T channel,
UI32_T len,
UI32_T num,
UI32_T intr,
UI32_T duration)
{
UI32_T tx_channel = 0;
UI32_T tx_fail = 0;
if (duration < 1000)
{
osal_printf("***Error***, %d packets cost < 1000 us.\n", num);
return ;
}
osal_printf("\n");
if (PERF_DIR_TX == dir)
{
osal_printf("Tx-perf\n");
}
else
{
osal_printf("Rx-perf\n");
}
osal_printf("------------------------------------\n");
osal_printf("channel number : %d\n", channel);
osal_printf("packet length (bytes): %d\n", len);
osal_printf("packet number : %d\n", num);
osal_printf("time duration (us) : %d\n", duration);
osal_printf("------------------------------------\n");
osal_printf("avg. packet rate (pps) : %d\n", (num * 1000) / (duration / 1000));
osal_printf("avg. throughput (Mbps) : %d\n", ((num / 1000) * len * 8) / (duration / 1000));
osal_printf("interrupt number : %d\n", intr);
if (PERF_DIR_TX == dir)
{
for (tx_channel = 0; tx_channel < channel; tx_channel++)
{
tx_fail += _perf_tx_perf_cb.send_fail[tx_channel];
}
osal_printf("Tx fail : %d\n", tx_fail);
}
osal_printf("------------------------------------\n");
}
static void
_perf_getIntrCnt(
UI32_T unit,
PERF_DIR_T dir,
UI32_T *ptr_intr_cnt)
{
UI32_T intr_cnt = 0;
UI32_T channel = 0;
if (PERF_DIR_TX == dir)
{
for (channel = 0; channel < PERF_TX_CHANNEL_NUM_MAX; channel++)
{
_perf_tx_perf_cb.get_intr_cnt(unit, channel, &intr_cnt);
*ptr_intr_cnt += intr_cnt;
}
}
else
{
for (channel = 0; channel < PERF_RX_CHANNEL_NUM_MAX; channel++)
{
_perf_rx_perf_cb.get_intr_cnt(unit, channel, &intr_cnt);
*ptr_intr_cnt += intr_cnt;
}
}
}
static void
_perf_txCallback(
const UI32_T unit,
PERF_TX_SW_GPD *ptr_sw_gpd,
void *ptr_virt_addr)
{
/* free dma */
osal_dma_free(ptr_virt_addr);
/* free gpd */
osal_free(ptr_sw_gpd);
}
static void
_perf_txTask(
void *ptr_argv)
{
NPS_ERROR_NO_T rc = NPS_E_OK;
UI32_T unit = ((PERF_COOKIE_T *)ptr_argv)->unit;
UI32_T channel = ((PERF_COOKIE_T *)ptr_argv)->channel;
UI32_T len = ((PERF_COOKIE_T *)ptr_argv)->len;
UI32_T num = ((PERF_COOKIE_T *)ptr_argv)->num;
UI32_T port = ((PERF_COOKIE_T *)ptr_argv)->port;
BOOL_T test_skb = ((PERF_COOKIE_T *)ptr_argv)->test_skb;
/* test targets */
PERF_TX_SW_GPD *ptr_sw_gpd = NULL;
struct sk_buff *ptr_skb = NULL;
/* temp variables */
UI32_T send_fail = 0;
void *ptr_virt_addr = NULL;
NPS_ADDR_T phy_addr = 0x0;
osal_initRunThread();
do
{
rc = osal_waitEvent(&_perf_tx_perf_cb.start_sync[channel]);
if (NPS_E_OK != osal_isRunThread())
{
break; /* deinit-thread */
}
while (_perf_tx_perf_cb.send_ok[channel] < num)
{
if (0 == (_perf_tx_perf_cb.send_ok[channel] % PERF_TX_PERF_MESG))
{
printk("T");
}
if (TRUE == test_skb)
{
ptr_skb = osal_skb_alloc(len);
ptr_skb->len = len;
_perf_tx_perf_cb.get_netdev(unit, port, &ptr_skb->dev);
/* send skb */
osal_skb_send(ptr_skb);
}
else
{
ptr_sw_gpd = osal_alloc(sizeof(PERF_TX_SW_GPD));
if (NULL == ptr_sw_gpd)
{
osal_printf("***Error***, alloc sw-gpd fail.\n");
break;
}
/* prepare buf */
ptr_virt_addr = osal_dma_alloc(len);
phy_addr = osal_dma_convertVirtToPhy(ptr_virt_addr);
/* trans skb to gpd */
osal_memset(ptr_sw_gpd, 0x0, sizeof(PERF_TX_SW_GPD));
ptr_sw_gpd->callback = (void *)_perf_txCallback;
ptr_sw_gpd->ptr_cookie = (void *)ptr_virt_addr;
ptr_sw_gpd->gpd_num = 1;
ptr_sw_gpd->ptr_next = NULL;
ptr_sw_gpd->channel = channel;
/* prepare gpd */
rc = _perf_tx_perf_cb.prepare_gpd(unit, phy_addr, len, port, ptr_sw_gpd);
/* send gpd */
rc = _perf_tx_perf_cb.send_gpd(unit, channel, ptr_sw_gpd);
if (NPS_E_OK == rc)
{
_perf_tx_perf_cb.send_ok[channel]++;
send_fail = 0;
}
else
{
_perf_tx_perf_cb.send_fail[channel]++;
if (send_fail++ >= PERF_TX_PERF_FAIL)
{
osal_printf("***Error***, Tch-%d send fail over %d packet(s). (rc: %d)\n",
channel, PERF_TX_PERF_FAIL, rc);
break;
}
_perf_txCallback(unit, ptr_sw_gpd, ptr_virt_addr);
osal_sleepThread(1000);
}
}
}
osal_triggerEvent(&_perf_tx_perf_cb.end_sync[channel]);
}
while (NPS_E_OK == osal_isRunThread());
osal_exitRunThread();
}
static void
_perf_txDeinit(
const UI32_T unit,
const UI32_T tx_channel)
{
UI32_T channel = 0;
for (channel = 0; channel < tx_channel; channel++)
{
/* destroy Tx resources */
osal_stopThread (&_perf_tx_perf_cb.tx_task [channel]);
osal_triggerEvent(&_perf_tx_perf_cb.start_sync [channel]);
osal_destroyThread(&_perf_tx_perf_cb.tx_task [channel]);
osal_destroyEvent(&_perf_tx_perf_cb.end_sync [channel]);
osal_destroyEvent(&_perf_tx_perf_cb.start_sync [channel]);
}
}
static void
_perf_txInit(
const UI32_T unit,
const UI32_T tx_channel,
const UI32_T len,
BOOL_T test_skb)
{
UI32_T channel = 0;
for (channel = 0; channel < tx_channel; channel++)
{
_perf_tx_perf_cb.send_ok [channel] = 0;
_perf_tx_perf_cb.send_fail[channel] = 0;
/* create Tx resources */
osal_createEvent("TX_START", &_perf_tx_perf_cb.start_sync [channel]);
osal_createEvent("TX_END", &_perf_tx_perf_cb.end_sync [channel]);
_perf_tx_perf_cb.tx_cookie[channel].unit = unit;
_perf_tx_perf_cb.tx_cookie[channel].channel = channel;
_perf_tx_perf_cb.tx_cookie[channel].len = len;
_perf_tx_perf_cb.tx_cookie[channel].num = PERF_TX_PERF_NUM / tx_channel;
_perf_tx_perf_cb.tx_cookie[channel].port = 0;
_perf_tx_perf_cb.tx_cookie[channel].test_skb = test_skb;
osal_createThread(
"TX_PERF", 64 * 1024, 90,
_perf_txTask,
(void *)&_perf_tx_perf_cb.tx_cookie[channel],
&_perf_tx_perf_cb.tx_task[channel]);
}
}
static void
_perf_rxDeinit(
const UI32_T unit,
const UI32_T rx_channel)
{
/* turn-off Rx test */
_perf_rx_perf_cb.rx_test = FALSE;
/* destroy Rx resources */
osal_destroyEvent(&_perf_rx_perf_cb.end_sync);
osal_destroyEvent(&_perf_rx_perf_cb.start_sync);
/* disable duplicate Rx packets to channels */
_perf_duplicateRxPacket(unit, rx_channel, FALSE);
}
static void
_perf_rxInit(
const UI32_T unit,
const UI32_T rx_channel,
const UI32_T len)
{
/* enable duplicate Rx packets to channels */
_perf_duplicateRxPacket(unit, rx_channel, TRUE);
/* create Rx callback resources */
_perf_rx_perf_cb.target_num = PERF_RX_PERF_NUM;
_perf_rx_perf_cb.target_len = len;
_perf_rx_perf_cb.recv_pass = 0;
osal_createEvent("RX_START", &_perf_rx_perf_cb.start_sync);
osal_createEvent("RX_END", &_perf_rx_perf_cb.end_sync);
/* turn-on Rx test */
_perf_rx_perf_cb.rx_test = TRUE;
}
/* FUNCTION NAME: perf_rxCallback
* PURPOSE:
* To count the Rx-gpd for Rx-test.
* INPUT:
* len -- To check if the Rx-gpd length equals to test length.
* OUTPUT:
* None
* RETURN:
* NPS_E_OK -- Successful operation.
* NOTES:
* None
*/
NPS_ERROR_NO_T
perf_rxCallback(
const UI32_T len)
{
/* check length */
if (len == _perf_rx_perf_cb.target_len)
{
_perf_rx_perf_cb.recv_pass++;
}
else
{
if (_perf_rx_perf_cb.recv_fail++ >= PERF_RX_PERF_FAIL)
{
_perf_rx_perf_cb.recv_fail = 0;
}
}
/* send signals */
if (0 == _perf_rx_perf_cb.recv_pass)
{
; /* do nothing */
}
else if (1 == _perf_rx_perf_cb.recv_pass)
{
osal_triggerEvent(&_perf_rx_perf_cb.start_sync);
}
else if (_perf_rx_perf_cb.recv_pass == _perf_rx_perf_cb.target_num)
{
osal_triggerEvent(&_perf_rx_perf_cb.end_sync);
}
else if (0 == (_perf_rx_perf_cb.recv_pass % PERF_RX_PERF_MESG))
{
printk("R");
}
return (NPS_E_OK);
}
/* FUNCTION NAME: perf_rxTest
* PURPOSE:
* To check if Rx-test is going.
* INPUT:
* None
* OUTPUT:
* None
* RETURN:
* NPS_E_OK -- Successful operation.
* NOTES:
* None
*/
NPS_ERROR_NO_T
perf_rxTest(void)
{
if (FALSE == _perf_rx_perf_cb.rx_test)
{
return (NPS_E_OTHERS);
}
return (NPS_E_OK);
}
/* FUNCTION NAME: perf_test
* PURPOSE:
* To do Tx-test or Rx-test.
* INPUT:
* len -- Test length
* tx_channel -- Test Tx channel numbers
* rx_channel -- Test Rx channel numbers
* test_skb -- Test GPD or SKB
* OUTPUT:
* None
* RETURN:
* NPS_E_OK -- Successful operation.
* NOTES:
* None
*/
NPS_ERROR_NO_T
perf_test(
UI32_T len,
UI32_T tx_channel,
UI32_T rx_channel,
BOOL_T test_skb)
{
NPS_ERROR_NO_T rc = NPS_E_OK;
NPS_TIME_T start_time;
NPS_TIME_T end_time;
UI32_T unit = 0, channel = 0;
UI32_T tx_pkt_cnt = 0, tx_start_intr = 0, tx_end_intr = 0;
UI32_T rx_pkt_cnt = 0, rx_start_intr = 0, rx_end_intr = 0;
if ((0 == tx_channel) && (0 == rx_channel))
{
return (NPS_E_NOT_SUPPORT);
}
/* start test */
if ((tx_channel > 0) && (rx_channel > 0))
{
_perf_getIntrCnt(unit, PERF_DIR_TX, &tx_start_intr);
_perf_getIntrCnt(unit, PERF_DIR_RX, &rx_start_intr);
_perf_txInit(unit, tx_channel, len, test_skb);
_perf_rxInit(unit, rx_channel, len);
/* wait 1st Rx GPD done */
osal_waitEvent(&_perf_rx_perf_cb.start_sync);
/* ------------- in-time ------------- */
osal_getTime(&start_time);
for (channel = 0; channel < tx_channel; channel++)
{
osal_triggerEvent(&_perf_tx_perf_cb.start_sync[channel]);
}
for (channel = 0; channel < tx_channel; channel++)
{
osal_waitEvent(&_perf_tx_perf_cb.end_sync[channel]);
tx_pkt_cnt += _perf_tx_perf_cb.send_ok[channel];
}
rx_pkt_cnt = _perf_rx_perf_cb.recv_pass;
osal_getTime(&end_time);
/* ------------- in-time ------------- */
_perf_txDeinit(unit, tx_channel);
_perf_rxDeinit(unit, rx_channel);
_perf_getIntrCnt(unit, PERF_DIR_TX, &tx_end_intr);
_perf_getIntrCnt(unit, PERF_DIR_RX, &rx_end_intr);
_perf_showPerf(PERF_DIR_TX,
tx_channel, len, tx_pkt_cnt, tx_end_intr - tx_start_intr, end_time - start_time);
_perf_showPerf(PERF_DIR_RX,
rx_channel, len, rx_pkt_cnt, rx_end_intr - rx_start_intr, end_time - start_time);
}
else if (tx_channel > 0)
{
_perf_getIntrCnt(unit, PERF_DIR_TX, &tx_start_intr);
_perf_txInit(unit, tx_channel, len, test_skb);
/* ------------- in-time ------------- */
osal_getTime(&start_time);
for (channel = 0; channel < tx_channel; channel++)
{
osal_triggerEvent(&_perf_tx_perf_cb.start_sync[channel]);
}
for (channel = 0; channel < tx_channel; channel++)
{
osal_waitEvent(&_perf_tx_perf_cb.end_sync[channel]);
tx_pkt_cnt += _perf_tx_perf_cb.send_ok[channel];
}
osal_getTime(&end_time);
/* ------------- in-time ------------- */
_perf_txDeinit(unit, tx_channel);
_perf_getIntrCnt(unit, PERF_DIR_TX, &tx_end_intr);
_perf_showPerf(PERF_DIR_TX,
tx_channel, len, tx_pkt_cnt, tx_end_intr - tx_start_intr, end_time - start_time);
}
else if (rx_channel > 0)
{
_perf_getIntrCnt(unit, PERF_DIR_RX, &rx_start_intr);
_perf_rxInit(unit, rx_channel, len);
/* wait 1st Rx GPD done */
osal_waitEvent(&_perf_rx_perf_cb.start_sync);
/* ------------- in-time ------------- */
osal_getTime(&start_time);
osal_waitEvent(&_perf_rx_perf_cb.end_sync);
osal_getTime(&end_time);
/* ------------- in-time ------------- */
_perf_rxDeinit(unit, rx_channel);
_perf_getIntrCnt(unit, PERF_DIR_RX, &rx_end_intr);
_perf_showPerf(PERF_DIR_RX,
rx_channel, len, PERF_RX_PERF_NUM, rx_end_intr - rx_start_intr, end_time - start_time);
}
return (rc);
}

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/* Copyright (C) 2019 Nephos, Inc.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of version 2 of the GNU General Public
* License as published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* version 2 along with this program.
*/
/* FILE NAME: osal_isymbol.c
* PURPOSE:
* It provide global OSAL symbol export for linux kernel module
* NOTES:
*/
#include <linux/init.h>
#include <linux/module.h>
/* ----------------------------------------------------- */
#include <osal_mdc.h>
/* dma */
extern struct pci_dev *_ptr_ext_pci_dev;
EXPORT_SYMBOL(_ptr_ext_pci_dev);
#if defined(NPS_LINUX_USER_MODE)
EXPORT_SYMBOL(osal_mdc_readPciReg);
EXPORT_SYMBOL(osal_mdc_writePciReg);
#if defined(NPS_EN_NETIF)
/* intr */
/* for kernel module, this API will be exported by script with other OSAL functions in osal_symbol.c */
EXPORT_SYMBOL(osal_mdc_registerIsr);
#endif
#endif

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@ -3,7 +3,7 @@
SONIC_ONE_IMAGE = sonic-nephos.bin
$(SONIC_ONE_IMAGE)_MACHINE = nephos
$(SONIC_ONE_IMAGE)_IMAGE_TYPE = onie
$(SONIC_ONE_IMAGE)_INSTALLS += $(NEPHOS_NPS_KERNEL)
$(SONIC_ONE_IMAGE)_INSTALLS += $(NEPHOS_MODULE)
$(SONIC_ONE_IMAGE)_LAZY_INSTALLS += $(INGRASYS_S9130_32X_PLATFORM_MODULE) \
$(INGRASYS_S9230_64X_PLATFORM_MODULE) \
$(ACCTON_AS7116_54X_PLATFORM_MODULE) \

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@ -1,5 +1,5 @@
include $(PLATFORM_PATH)/sdk.mk
include $(PLATFORM_PATH)/sai.mk
include $(PLATFORM_PATH)/nephos-modules.mk
include $(PLATFORM_PATH)/platform-modules-ingrasys.mk
include $(PLATFORM_PATH)/platform-modules-accton.mk
include $(PLATFORM_PATH)/platform-modules-cig.mk
@ -12,15 +12,17 @@ include $(PLATFORM_PATH)/docker-ptf-nephos.mk
NPX_DIAG = npx_diag
$(NPX_DIAG)_URL = "https://github.com/NephosInc/SONiC/raw/master/sdk/npx_diag"
WARM_VERIFIER = warm-verifier
$(WARM_VERIFIER)_URL = "https://github.com/NephosInc/SONiC/raw/master/sai/warm-verifier"
DSSERVE = dsserve
$(DSSERVE)_URL = "https://sonicstorage.blob.core.windows.net/packages/20170518/dsserve?sv=2015-04-05&sr=b&sig=gyNbgSL%2FvpMXDdpboVkIJcTKMRdGgEaOR9OukHhEsu8%3D&se=2030-03-31T23%3A06%3A35Z&sp=r"
SONIC_ONLINE_FILES += $(NPX_DIAG) $(DSSERVE)
SONIC_ONLINE_FILES += $(NPX_DIAG) $(WARM_VERIFIER) $(DSSERVE)
SONIC_ALL += $(SONIC_ONE_IMAGE) $(DOCKER_FPM)
# Inject nephos sai into sairedis
$(LIBSAIREDIS)_DEPENDS += $(NEPHOS_SAI) $(NEPHOS_SAI_DEV) $(LIBSAITHRIFT_DEV_NEPHOS)
$(LIBSAIREDIS)_DEPENDS += $(NEPHOS_SAI) $(NEPHOS_SAI_DEV) $(LIBSAITHRIFT_DEV)
# Runtime dependency on nephos sai is set only for syncd
$(SYNCD)_RDEPENDS += $(NEPHOS_SAI)

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@ -1,6 +1,6 @@
SDK_VERSION = 2.0.5
SAI_VERSION = 1.3.5
SAI_COMMIT_ID = 575f90
SDK_VERSION = 2.0.8
SAI_VERSION = 1.4.0
SAI_COMMIT_ID = c818c7
NEPHOS_SAI = libsainps_$(SDK_VERSION)_sai_$(SAI_VERSION)_$(SAI_COMMIT_ID)_amd64.deb
$(NEPHOS_SAI)_URL = "https://github.com/NephosInc/SONiC/raw/master/sai/libsainps_$(SDK_VERSION)_sai_$(SAI_VERSION)_$(SAI_COMMIT_ID)_amd64.deb"

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@ -1,7 +0,0 @@
SDK_VERSION = 2.0.5
LINUX_VER = 4.9.0-8-2
SDK_COMMIT_ID = f2e56f
NEPHOS_NPS_KERNEL = nps-modules-$(LINUX_VER)_$(SDK_VERSION)_$(SDK_COMMIT_ID)_amd64.deb
$(NEPHOS_NPS_KERNEL)_URL = "https://github.com/NephosInc/SONiC/raw/master/sdk/nps-modules-$(LINUX_VER)_$(SDK_VERSION)_$(SDK_COMMIT_ID)_amd64.deb"
SONIC_ONLINE_DEBS += $(NEPHOS_NPS_KERNEL)