[Ufispace][PDDF] Add PDDF support on S9110-32X, S8901-54XC, S7801-54XS and S6301-56ST (#16017)
Why I did it Add PDDF support on following Ufispace platforms with Broadcom ASIC S9110-32X S8901-54XC S7801-54XS S6301-56ST How I did it Add PDDF configuration files, scripts and python files How to verify it Run pddf commands and show commands. Signed-off-by: nonodark <ef67891@yahoo.com.tw>
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Nonodark Huang
GitHub
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{
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"interfaces": {
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"Ethernet0": {
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"default_brkout_mode": "1x1G",
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"autoneg": "on"
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},
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"Ethernet1": {
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"default_brkout_mode": "1x1G",
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"autoneg": "on"
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},
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"Ethernet2": {
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"default_brkout_mode": "1x1G",
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"autoneg": "on"
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},
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"Ethernet3": {
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"default_brkout_mode": "1x1G",
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"autoneg": "on"
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},
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"Ethernet4": {
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"default_brkout_mode": "1x1G",
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"autoneg": "on"
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},
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"Ethernet5": {
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"default_brkout_mode": "1x1G",
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"autoneg": "on"
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},
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"Ethernet6": {
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"default_brkout_mode": "1x1G",
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"autoneg": "on"
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},
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"Ethernet7": {
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"default_brkout_mode": "1x1G",
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"autoneg": "on"
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},
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"Ethernet8": {
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"default_brkout_mode": "1x1G",
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"autoneg": "on"
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},
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"Ethernet9": {
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"default_brkout_mode": "1x1G",
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"autoneg": "on"
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},
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"Ethernet10": {
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"default_brkout_mode": "1x1G",
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"autoneg": "on"
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},
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"Ethernet11": {
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"default_brkout_mode": "1x1G",
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"autoneg": "on"
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},
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"Ethernet12": {
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"default_brkout_mode": "1x1G",
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"autoneg": "on"
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},
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"Ethernet13": {
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"default_brkout_mode": "1x1G",
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"autoneg": "on"
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},
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"Ethernet14": {
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"default_brkout_mode": "1x1G",
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"autoneg": "on"
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},
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"Ethernet15": {
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"default_brkout_mode": "1x1G",
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"autoneg": "on"
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},
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"Ethernet16": {
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"default_brkout_mode": "1x1G",
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"autoneg": "on"
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},
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"Ethernet17": {
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"default_brkout_mode": "1x1G",
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"autoneg": "on"
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},
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"Ethernet18": {
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"default_brkout_mode": "1x1G",
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"autoneg": "on"
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},
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"Ethernet19": {
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"default_brkout_mode": "1x1G",
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"autoneg": "on"
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},
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"Ethernet20": {
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"default_brkout_mode": "1x1G",
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"autoneg": "on"
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},
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"Ethernet21": {
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"default_brkout_mode": "1x1G",
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"autoneg": "on"
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},
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"Ethernet22": {
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"default_brkout_mode": "1x1G",
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"autoneg": "on"
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},
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"Ethernet23": {
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"default_brkout_mode": "1x1G",
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"autoneg": "on"
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},
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"Ethernet24": {
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"default_brkout_mode": "1x1G",
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"autoneg": "on"
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},
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"Ethernet25": {
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"default_brkout_mode": "1x1G",
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"autoneg": "on"
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},
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"Ethernet26": {
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"default_brkout_mode": "1x1G",
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"autoneg": "on"
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},
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"Ethernet27": {
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"default_brkout_mode": "1x1G",
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"autoneg": "on"
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},
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"Ethernet28": {
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"default_brkout_mode": "1x1G",
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"autoneg": "on"
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},
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"Ethernet29": {
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"default_brkout_mode": "1x1G",
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"autoneg": "on"
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},
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"Ethernet30": {
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"default_brkout_mode": "1x1G",
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"autoneg": "on"
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},
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"Ethernet31": {
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"default_brkout_mode": "1x1G",
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"autoneg": "on"
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},
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"Ethernet32": {
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"default_brkout_mode": "1x1G",
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"autoneg": "on"
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},
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"Ethernet33": {
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"default_brkout_mode": "1x1G",
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"autoneg": "on"
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},
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"Ethernet34": {
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"default_brkout_mode": "1x1G",
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"autoneg": "on"
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},
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"Ethernet35": {
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"default_brkout_mode": "1x1G",
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"autoneg": "on"
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},
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"Ethernet36": {
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"default_brkout_mode": "1x1G",
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"autoneg": "on"
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},
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"Ethernet37": {
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"default_brkout_mode": "1x1G",
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"autoneg": "on"
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},
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"Ethernet38": {
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"default_brkout_mode": "1x1G",
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"autoneg": "on"
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},
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"Ethernet39": {
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"default_brkout_mode": "1x1G",
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"autoneg": "on"
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},
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"Ethernet40": {
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"default_brkout_mode": "1x1G",
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"autoneg": "on"
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},
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"Ethernet41": {
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"default_brkout_mode": "1x1G",
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"autoneg": "on"
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},
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"Ethernet42": {
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"default_brkout_mode": "1x1G",
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"autoneg": "on"
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},
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"Ethernet43": {
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"default_brkout_mode": "1x1G",
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"autoneg": "on"
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},
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"Ethernet44": {
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"default_brkout_mode": "1x1G",
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"autoneg": "on"
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},
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"Ethernet45": {
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"default_brkout_mode": "1x1G",
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"autoneg": "on"
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},
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"Ethernet46": {
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"default_brkout_mode": "1x1G",
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"autoneg": "on"
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},
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"Ethernet47": {
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"default_brkout_mode": "1x1G",
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"autoneg": "on"
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},
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"Ethernet48": {
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"default_brkout_mode": "1x10G"
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},
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"Ethernet49": {
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"default_brkout_mode": "1x10G"
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},
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"Ethernet50": {
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"default_brkout_mode": "1x10G"
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},
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"Ethernet51": {
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"default_brkout_mode": "1x10G"
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},
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"Ethernet52": {
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"default_brkout_mode": "1x10G"
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},
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"Ethernet53": {
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"default_brkout_mode": "1x10G"
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},
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"Ethernet54": {
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"default_brkout_mode": "1x10G"
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},
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"Ethernet55": {
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"default_brkout_mode": "1x10G"
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}
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}
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}
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@ -0,0 +1 @@
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SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/td3-x2-s6301-56st.config.bcm
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# r2, 20230713
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sram_scan_enable=0
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stable_size=0x5500000
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tdma_timeout_usec=15000000
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tslam_timeout_usec=15000000
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sai_mdio_access_clause22=1
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sai_verify_incoming_chksum=0
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robust_hash_disable_egress_vlan=1
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robust_hash_disable_mpls=1
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robust_hash_disable_vlan=1
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port_flex_enable=1
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arl_clean_timeout_usec=15000000
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asf_mem_profile=0
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bcm_num_cos=9
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bcm_stat_flags=1
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bcm_stat_jumbo=9236
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cdma_timeout_usec=15000000
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disable_pcie_firmware_check=1
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dma_desc_timeout_usec=15000000
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fpem_mem_entries=0
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higig2_hdr_mode=1
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ifp_inports_support_enable=1
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ipv6_lpm_128b_enable=1
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l2xmsg_mode=1
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l2_mem_entries=65536
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l3_mem_entries=32768
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max_vp_lags=0
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mem_scan_enable=1
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miim_intr_enable=0
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module_64ports=1
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multicast_l2_range=4095
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multicast_l3_range=0
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os=unix
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# global setting
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pbmp_xport_xe=0x1fe00000000000000
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pbmp_xport_ge=0x00001fffffffffffe
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phy_chain_tx_lane_map_physical{25}=0x2310
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phy_chain_rx_lane_map_physical{25}=0x2310
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phy_chain_tx_lane_map_physical{41}=0x3102
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phy_chain_rx_lane_map_physical{41}=0x3102
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port_gmii_mode_25=1
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port_gmii_mode_26=1
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port_gmii_mode_27=1
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port_gmii_mode_28=1
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port_gmii_mode_29=1
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port_gmii_mode_30=1
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port_gmii_mode_31=1
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port_gmii_mode_32=1
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port_gmii_mode_33=1
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port_gmii_mode_34=1
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port_gmii_mode_35=1
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port_gmii_mode_36=1
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port_gmii_mode_37=1
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port_gmii_mode_38=1
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port_gmii_mode_39=1
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port_gmii_mode_40=1
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port_gmii_mode_41=1
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port_gmii_mode_42=1
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port_gmii_mode_43=1
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port_gmii_mode_44=1
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port_gmii_mode_45=1
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port_gmii_mode_46=1
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port_gmii_mode_47=1
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port_gmii_mode_48=1
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# GPHY0
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portmap_1=1:1
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portmap_2=2:1
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portmap_3=3:1
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portmap_4=4:1
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# GPHY1
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portmap_5=5:1
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portmap_6=6:1
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portmap_7=7:1
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portmap_8=8:1
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# GPHY2
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portmap_9=9:1
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portmap_10=10:1
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portmap_11=11:1
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portmap_12=12:1
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# GPHY3
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portmap_13=13:1
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portmap_14=14:1
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portmap_15=15:1
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portmap_16=16:1
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# GPHY4
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portmap_17=17:1
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portmap_18=18:1
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portmap_19=19:1
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portmap_20=20:1
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# GPHY5
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portmap_21=21:1
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portmap_22=22:1
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portmap_23=23:1
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portmap_24=24:1
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phy_port_primary_and_offset_1.0=0x0100
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phy_port_primary_and_offset_2.0=0x0101
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phy_port_primary_and_offset_3.0=0x0102
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phy_port_primary_and_offset_4.0=0x0103
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phy_port_primary_and_offset_5.0=0x0104
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phy_port_primary_and_offset_6.0=0x0105
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phy_port_primary_and_offset_7.0=0x0106
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phy_port_primary_and_offset_8.0=0x0107
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phy_port_primary_and_offset_9.0=0x0900
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phy_port_primary_and_offset_10.0=0x0901
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phy_port_primary_and_offset_11.0=0x0902
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phy_port_primary_and_offset_12.0=0x0903
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phy_port_primary_and_offset_13.0=0x0904
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phy_port_primary_and_offset_14.0=0x0905
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phy_port_primary_and_offset_15.0=0x0906
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phy_port_primary_and_offset_16.0=0x0907
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phy_port_primary_and_offset_17.0=0x1100
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phy_port_primary_and_offset_18.0=0x1101
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phy_port_primary_and_offset_19.0=0x1102
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phy_port_primary_and_offset_20.0=0x1103
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phy_port_primary_and_offset_21.0=0x1104
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phy_port_primary_and_offset_22.0=0x1105
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phy_port_primary_and_offset_23.0=0x1106
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phy_port_primary_and_offset_24.0=0x1107
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# Comment out configuration on PHY ports
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# MCQ 0 - QSGMII
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portmap_25=25:1
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portmap_26=26:1
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portmap_27=27:1
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portmap_28=28:1
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portmap_29=29:1
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portmap_30=30:1
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portmap_31=31:1
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portmap_32=32:1
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# 54182_1 PHY ADDR 0x1-0x8
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port_phy_addr_25=0x01
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port_phy_addr_26=0x02
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port_phy_addr_27=0x03
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port_phy_addr_28=0x04
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port_phy_addr_29=0x05
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port_phy_addr_30=0x06
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port_phy_addr_31=0x07
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port_phy_addr_32=0x08
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phy_port_primary_and_offset_25.0=0x1900
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phy_port_primary_and_offset_26.0=0x1901
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phy_port_primary_and_offset_27.0=0x1902
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phy_port_primary_and_offset_28.0=0x1903
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phy_port_primary_and_offset_29.0=0x1904
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phy_port_primary_and_offset_30.0=0x1905
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phy_port_primary_and_offset_31.0=0x1906
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phy_port_primary_and_offset_32.0=0x1907
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# MCQ 1 - QSGMII
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portmap_33=33:1
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portmap_34=34:1
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portmap_35=35:1
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portmap_36=36:1
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portmap_37=37:1
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portmap_38=38:1
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portmap_39=39:1
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portmap_40=40:1
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# 54182_2 PHY ADDR 0x21-0x28
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port_phy_addr_33=0x21
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port_phy_addr_34=0x22
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port_phy_addr_35=0x23
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port_phy_addr_36=0x24
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port_phy_addr_37=0x25
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port_phy_addr_38=0x26
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port_phy_addr_39=0x27
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port_phy_addr_40=0x28
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phy_port_primary_and_offset_33.0=0x2100
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phy_port_primary_and_offset_34.0=0x2101
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phy_port_primary_and_offset_35.0=0x2102
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phy_port_primary_and_offset_36.0=0x2103
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phy_port_primary_and_offset_37.0=0x2104
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phy_port_primary_and_offset_38.0=0x2105
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phy_port_primary_and_offset_39.0=0x2106
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phy_port_primary_and_offset_40.0=0x2107
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# MCQ2-2L 50182
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portmap_41=41:1
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portmap_42=42:1
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portmap_43=43:1
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portmap_44=44:1
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portmap_45=45:1
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portmap_46=46:1
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portmap_47=47:1
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portmap_48=48:1
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# 54182_3 PHY ADDR 0x41-0x48
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port_phy_addr_41=0x41
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port_phy_addr_42=0x42
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port_phy_addr_43=0x43
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port_phy_addr_44=0x44
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port_phy_addr_45=0x45
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port_phy_addr_46=0x46
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port_phy_addr_47=0x47
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port_phy_addr_48=0x48
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phy_port_primary_and_offset_41.0=0x2900
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phy_port_primary_and_offset_42.0=0x2901
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phy_port_primary_and_offset_43.0=0x2902
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phy_port_primary_and_offset_44.0=0x2903
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phy_port_primary_and_offset_45.0=0x2904
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phy_port_primary_and_offset_46.0=0x2905
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phy_port_primary_and_offset_47.0=0x2906
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phy_port_primary_and_offset_48.0=0x2907
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# TSCF SFP
|
||||
portmap_57=57:10
|
||||
portmap_58=58:10
|
||||
portmap_59=59:10
|
||||
portmap_60=60:10
|
||||
|
||||
portmap_61=61:10
|
||||
portmap_62=62:10
|
||||
portmap_63=63:10
|
||||
portmap_64=64:10
|
||||
|
||||
|
||||
dport_map_enable=1
|
||||
|
||||
dport_map_port_25=1
|
||||
dport_map_port_26=2
|
||||
dport_map_port_27=3
|
||||
dport_map_port_28=4
|
||||
dport_map_port_29=5
|
||||
dport_map_port_30=6
|
||||
dport_map_port_31=7
|
||||
dport_map_port_32=8
|
||||
dport_map_port_33=9
|
||||
dport_map_port_34=10
|
||||
dport_map_port_35=11
|
||||
dport_map_port_36=12
|
||||
dport_map_port_37=13
|
||||
dport_map_port_38=14
|
||||
dport_map_port_39=15
|
||||
dport_map_port_40=16
|
||||
dport_map_port_41=17
|
||||
dport_map_port_42=18
|
||||
dport_map_port_43=19
|
||||
dport_map_port_44=20
|
||||
dport_map_port_45=21
|
||||
dport_map_port_46=22
|
||||
dport_map_port_47=23
|
||||
dport_map_port_48=24
|
||||
dport_map_port_1=25
|
||||
dport_map_port_2=26
|
||||
dport_map_port_3=27
|
||||
dport_map_port_4=28
|
||||
dport_map_port_5=29
|
||||
dport_map_port_6=30
|
||||
dport_map_port_7=31
|
||||
dport_map_port_8=32
|
||||
dport_map_port_9=33
|
||||
dport_map_port_10=34
|
||||
dport_map_port_11=35
|
||||
dport_map_port_12=36
|
||||
dport_map_port_13=37
|
||||
dport_map_port_14=38
|
||||
dport_map_port_15=39
|
||||
dport_map_port_16=40
|
||||
dport_map_port_17=41
|
||||
dport_map_port_18=42
|
||||
dport_map_port_19=43
|
||||
dport_map_port_20=44
|
||||
dport_map_port_21=45
|
||||
dport_map_port_22=46
|
||||
dport_map_port_23=47
|
||||
dport_map_port_24=48
|
||||
dport_map_port_57=49
|
||||
dport_map_port_58=50
|
||||
dport_map_port_59=51
|
||||
dport_map_port_60=52
|
||||
dport_map_port_64=53
|
||||
dport_map_port_63=54
|
||||
dport_map_port_62=55
|
||||
dport_map_port_61=56
|
||||
|
||||
BIN
device/ufispace/x86_64-ufispace_s6301_56st-r0/custom_led.bin
Normal file
BIN
device/ufispace/x86_64-ufispace_s6301_56st-r0/custom_led.bin
Normal file
Binary file not shown.
@ -0,0 +1 @@
|
||||
UFISPACE-S6301-56ST t1
|
||||
10
device/ufispace/x86_64-ufispace_s6301_56st-r0/fancontrol
Normal file
10
device/ufispace/x86_64-ufispace_s6301_56st-r0/fancontrol
Normal file
@ -0,0 +1,10 @@
|
||||
# Configuration file generated by pwmconfig, changes will be lost
|
||||
INTERVAL=10
|
||||
DEVPATH=
|
||||
DEVNAME=
|
||||
FCTEMPS=
|
||||
FCFANS=
|
||||
MINTEMP=
|
||||
MAXTEMP=
|
||||
MINSTART=
|
||||
MINSTOP=
|
||||
@ -0,0 +1,4 @@
|
||||
CONSOLE_PORT=0x3f8
|
||||
CONSOLE_DEV=0
|
||||
CONSOLE_SPEED=115200
|
||||
ONIE_PLATFORM_EXTRA_CMDLINE_LINUX="module_blacklist=gpio_ich nomodeset pcie_aspm=off"
|
||||
@ -0,0 +1,4 @@
|
||||
led stop
|
||||
m0 load 0 0x3800 /usr/share/sonic/platform/custom_led.bin
|
||||
led auto on
|
||||
led start
|
||||
178
device/ufispace/x86_64-ufispace_s6301_56st-r0/pcie.yaml
Normal file
178
device/ufispace/x86_64-ufispace_s6301_56st-r0/pcie.yaml
Normal file
@ -0,0 +1,178 @@
|
||||
- bus: '00'
|
||||
dev: '00'
|
||||
fn: '0'
|
||||
id: '1980'
|
||||
name: 'Host bridge: Intel Corporation Atom Processor C3000 Series System Agent (rev
|
||||
11)'
|
||||
- bus: '00'
|
||||
dev: '04'
|
||||
fn: '0'
|
||||
id: 19a1
|
||||
name: 'Host bridge: Intel Corporation Atom Processor C3000 Series Error Registers
|
||||
(rev 11)'
|
||||
- bus: '00'
|
||||
dev: '05'
|
||||
fn: '0'
|
||||
id: 19a2
|
||||
name: 'Generic system peripheral [0807]: Intel Corporation Atom Processor C3000
|
||||
Series Root Complex Event Collector (rev 11)'
|
||||
- bus: '00'
|
||||
dev: '06'
|
||||
fn: '0'
|
||||
id: 19a3
|
||||
name: 'PCI bridge: Intel Corporation Atom Processor C3000 Series Integrated QAT
|
||||
Root Port (rev 11)'
|
||||
- bus: '00'
|
||||
dev: 09
|
||||
fn: '0'
|
||||
id: 19a4
|
||||
name: 'PCI bridge: Intel Corporation Atom Processor C3000 Series PCI Express Root
|
||||
Port #0 (rev 11)'
|
||||
- bus: '00'
|
||||
dev: 0a
|
||||
fn: '0'
|
||||
id: 19a5
|
||||
name: 'PCI bridge: Intel Corporation Atom Processor C3000 Series PCI Express Root
|
||||
Port #1 (rev 11)'
|
||||
- bus: '00'
|
||||
dev: 0b
|
||||
fn: '0'
|
||||
id: 19a6
|
||||
name: 'PCI bridge: Intel Corporation Atom Processor C3000 Series PCI Express Root
|
||||
Port #2 (rev 11)'
|
||||
- bus: '00'
|
||||
dev: 0c
|
||||
fn: '0'
|
||||
id: 19a7
|
||||
name: 'PCI bridge: Intel Corporation Atom Processor C3000 Series PCI Express Root
|
||||
Port #3 (rev 11)'
|
||||
- bus: '00'
|
||||
dev: 0e
|
||||
fn: '0'
|
||||
id: 19a8
|
||||
name: 'PCI bridge: Intel Corporation Atom Processor C3000 Series PCI Express Root
|
||||
Port #4 (rev 11)'
|
||||
- bus: '00'
|
||||
dev: 0f
|
||||
fn: '0'
|
||||
id: 19a9
|
||||
name: 'PCI bridge: Intel Corporation Atom Processor C3000 Series PCI Express Root
|
||||
Port #5 (rev 11)'
|
||||
- bus: '00'
|
||||
dev: '10'
|
||||
fn: '0'
|
||||
id: 19aa
|
||||
name: 'PCI bridge: Intel Corporation Atom Processor C3000 Series PCI Express Root
|
||||
Port #6 (rev 11)'
|
||||
- bus: '00'
|
||||
dev: '11'
|
||||
fn: '0'
|
||||
id: 19ab
|
||||
name: 'PCI bridge: Intel Corporation Atom Processor C3000 Series PCI Express Root
|
||||
Port #7 (rev 11)'
|
||||
- bus: '00'
|
||||
dev: '12'
|
||||
fn: '0'
|
||||
id: 19ac
|
||||
name: 'System peripheral: Intel Corporation Atom Processor C3000 Series SMBus Contoller
|
||||
- Host (rev 11)'
|
||||
- bus: '00'
|
||||
dev: '14'
|
||||
fn: '0'
|
||||
id: 19c2
|
||||
name: 'SATA controller: Intel Corporation Atom Processor C3000 Series SATA Controller
|
||||
1 (rev 11)'
|
||||
- bus: '00'
|
||||
dev: '15'
|
||||
fn: '0'
|
||||
id: 19d0
|
||||
name: 'USB controller: Intel Corporation Atom Processor C3000 Series USB 3.0 xHCI
|
||||
Controller (rev 11)'
|
||||
- bus: '00'
|
||||
dev: '16'
|
||||
fn: '0'
|
||||
id: 19d1
|
||||
name: 'PCI bridge: Intel Corporation Atom Processor C3000 Series Integrated LAN
|
||||
Root Port #0 (rev 11)'
|
||||
- bus: '00'
|
||||
dev: '17'
|
||||
fn: '0'
|
||||
id: 19d2
|
||||
name: 'PCI bridge: Intel Corporation Atom Processor C3000 Series Integrated LAN
|
||||
Root Port #1 (rev 11)'
|
||||
- bus: '00'
|
||||
dev: '18'
|
||||
fn: '0'
|
||||
id: 19d3
|
||||
name: 'Communication controller: Intel Corporation Atom Processor C3000 Series ME
|
||||
HECI 1 (rev 11)'
|
||||
- bus: '00'
|
||||
dev: 1c
|
||||
fn: '0'
|
||||
id: 19db
|
||||
name: 'SD Host controller: Intel Corporation Device 19db (rev 11)'
|
||||
- bus: '00'
|
||||
dev: 1f
|
||||
fn: '0'
|
||||
id: 19dc
|
||||
name: 'ISA bridge: Intel Corporation Atom Processor C3000 Series LPC or eSPI (rev
|
||||
11)'
|
||||
- bus: '00'
|
||||
dev: 1f
|
||||
fn: '2'
|
||||
id: 19de
|
||||
name: 'Memory controller: Intel Corporation Atom Processor C3000 Series Power Management
|
||||
Controller (rev 11)'
|
||||
- bus: '00'
|
||||
dev: 1f
|
||||
fn: '4'
|
||||
id: 19df
|
||||
name: 'SMBus: Intel Corporation Atom Processor C3000 Series SMBus controller (rev
|
||||
11)'
|
||||
- bus: '00'
|
||||
dev: 1f
|
||||
fn: '5'
|
||||
id: 19e0
|
||||
name: 'Serial bus controller [0c80]: Intel Corporation Atom Processor C3000 Series
|
||||
SPI Controller (rev 11)'
|
||||
- bus: '01'
|
||||
dev: '00'
|
||||
fn: '0'
|
||||
id: 19e2
|
||||
name: 'Co-processor: Intel Corporation Atom Processor C3000 Series QuickAssist Technology
|
||||
(rev 11)'
|
||||
- bus: '02'
|
||||
dev: '00'
|
||||
fn: '0'
|
||||
id: b277
|
||||
name: 'Ethernet controller: Broadcom Inc. and subsidiaries Device b277 (rev 02)'
|
||||
- bus: '07'
|
||||
dev: '00'
|
||||
fn: '0'
|
||||
id: '1533'
|
||||
name: 'Ethernet controller: Intel Corporation I210 Gigabit Network Connection (rev
|
||||
03)'
|
||||
- bus: 0a
|
||||
dev: '00'
|
||||
fn: '0'
|
||||
id: 15c3
|
||||
name: 'Ethernet controller: Intel Corporation Ethernet Connection X553 Backplane
|
||||
(rev 11)'
|
||||
- bus: 0a
|
||||
dev: '00'
|
||||
fn: '1'
|
||||
id: 15c3
|
||||
name: 'Ethernet controller: Intel Corporation Ethernet Connection X553 Backplane
|
||||
(rev 11)'
|
||||
- bus: 0b
|
||||
dev: '00'
|
||||
fn: '0'
|
||||
id: 15c3
|
||||
name: 'Ethernet controller: Intel Corporation Ethernet Connection X553 Backplane
|
||||
(rev 11)'
|
||||
- bus: 0b
|
||||
dev: '00'
|
||||
fn: '1'
|
||||
id: 15c3
|
||||
name: 'Ethernet controller: Intel Corporation Ethernet Connection X553 Backplane
|
||||
(rev 11)'
|
||||
@ -0,0 +1,79 @@
|
||||
{
|
||||
|
||||
"XCVR":
|
||||
{
|
||||
"xcvr_present":
|
||||
{
|
||||
"i2c":
|
||||
{
|
||||
"valmap-SFP+": {"0":true, "1":false }
|
||||
}
|
||||
|
||||
},
|
||||
"plug_status":
|
||||
{
|
||||
"inserted": "1",
|
||||
"removed": "0"
|
||||
}
|
||||
},
|
||||
"PSU":
|
||||
{
|
||||
"psu_present":
|
||||
{
|
||||
"i2c":
|
||||
{
|
||||
"valmap": { "1":true, "0":false }
|
||||
}
|
||||
},
|
||||
|
||||
"psu_power_good":
|
||||
{
|
||||
"i2c":
|
||||
{
|
||||
"valmap": { "1": true, "0":false }
|
||||
}
|
||||
},
|
||||
"psu_support_list":
|
||||
[
|
||||
{"Mfr_id": "ASPOWER","Model": "U1A-K10150-DRB-13", "Dir": "EXHAUST"},
|
||||
{"Mfr_id": "ASPOWER","Model": "U1A-K0150-B-13", "Dir": "INTAKE"},
|
||||
{"Mfr_id": "ASPOWER","Model": "U1D-K0150-A-13", "Dir": "EXHAUST"},
|
||||
{"Mfr_id": "ASPOWER","Model": "U1D-K0150-B-13", "Dir": "INTAKE"}
|
||||
],
|
||||
"PSU_FAN_MAX_SPEED":"13000"
|
||||
},
|
||||
|
||||
"FAN":
|
||||
{
|
||||
"direction":
|
||||
{
|
||||
"i2c":
|
||||
{
|
||||
"valmap": {"0":"INTAKE", "1":"EXHAUST"}
|
||||
}
|
||||
},
|
||||
|
||||
"present":
|
||||
{
|
||||
"i2c":
|
||||
{
|
||||
"valmap": {"1":true, "0":false}
|
||||
}
|
||||
},
|
||||
|
||||
"FAN_MAX_SPEED":"25000"
|
||||
},
|
||||
|
||||
"LED":
|
||||
{
|
||||
"capability":
|
||||
{
|
||||
"ro": ["SYS_LED", "FAN_LED", "PSU1_LED", "PSU2_LED"],
|
||||
"rw": ["ID_LED"]
|
||||
}
|
||||
},
|
||||
"REBOOT_CAUSE":
|
||||
{
|
||||
"reboot_cause_file": "/host/reboot-cause/reboot-cause.txt"
|
||||
}
|
||||
}
|
||||
2277
device/ufispace/x86_64-ufispace_s6301_56st-r0/pddf/pddf-device.json
Normal file
2277
device/ufispace/x86_64-ufispace_s6301_56st-r0/pddf/pddf-device.json
Normal file
File diff suppressed because it is too large
Load Diff
651
device/ufispace/x86_64-ufispace_s6301_56st-r0/platform.json
Normal file
651
device/ufispace/x86_64-ufispace_s6301_56st-r0/platform.json
Normal file
@ -0,0 +1,651 @@
|
||||
{
|
||||
"chassis": {
|
||||
"name": "S6301-56ST",
|
||||
"components": [
|
||||
{
|
||||
"name": "CPLD1"
|
||||
},
|
||||
{
|
||||
"name": "BIOS"
|
||||
}
|
||||
],
|
||||
"fans": [
|
||||
{
|
||||
"name": "Fantray1"
|
||||
},
|
||||
{
|
||||
"name": "Fantray2"
|
||||
}
|
||||
],
|
||||
"fan_drawers":[
|
||||
{
|
||||
"name": "Fantray1",
|
||||
"num_fans" : 1,
|
||||
"fans": [
|
||||
{
|
||||
"name": "Fantray1"
|
||||
}
|
||||
]
|
||||
},
|
||||
{
|
||||
"name": "Fantray2",
|
||||
"num_fans" : 1,
|
||||
"fans": [
|
||||
{
|
||||
"name": "Fantray2"
|
||||
}
|
||||
]
|
||||
}
|
||||
],
|
||||
"psus": [
|
||||
{
|
||||
"name": "PSU1",
|
||||
"fans": [
|
||||
{
|
||||
"name": "PSU1_FAN1"
|
||||
}
|
||||
],
|
||||
"thermals": [
|
||||
{
|
||||
"name": "PSU1_TEMP1"
|
||||
}
|
||||
]
|
||||
},
|
||||
{
|
||||
"name": "PSU2",
|
||||
"fans": [
|
||||
{
|
||||
"name": "PSU2_FAN1"
|
||||
}
|
||||
],
|
||||
"thermals": [
|
||||
{
|
||||
"name": "PSU2_TEMP1"
|
||||
}
|
||||
]
|
||||
}
|
||||
],
|
||||
"thermals": [
|
||||
{
|
||||
"name": "Temp_FAN1"
|
||||
},
|
||||
{
|
||||
"name": "Temp_FAN2"
|
||||
},
|
||||
{
|
||||
"name": "Temp_PSUDB"
|
||||
},
|
||||
{
|
||||
"name": "Temp_MAC"
|
||||
},
|
||||
{
|
||||
"name": "Temp_INLET"
|
||||
}
|
||||
],
|
||||
"sfps": [
|
||||
{
|
||||
"name": "Ethernet0"
|
||||
},
|
||||
{
|
||||
"name": "Ethernet1"
|
||||
},
|
||||
{
|
||||
"name": "Ethernet2"
|
||||
},
|
||||
{
|
||||
"name": "Ethernet3"
|
||||
},
|
||||
{
|
||||
"name": "Ethernet4"
|
||||
},
|
||||
{
|
||||
"name": "Ethernet5"
|
||||
},
|
||||
{
|
||||
"name": "Ethernet6"
|
||||
},
|
||||
{
|
||||
"name": "Ethernet7"
|
||||
},
|
||||
{
|
||||
"name": "Ethernet8"
|
||||
},
|
||||
{
|
||||
"name": "Ethernet9"
|
||||
},
|
||||
{
|
||||
"name": "Ethernet10"
|
||||
},
|
||||
{
|
||||
"name": "Ethernet11"
|
||||
},
|
||||
{
|
||||
"name": "Ethernet12"
|
||||
},
|
||||
{
|
||||
"name": "Ethernet13"
|
||||
},
|
||||
{
|
||||
"name": "Ethernet14"
|
||||
},
|
||||
{
|
||||
"name": "Ethernet15"
|
||||
},
|
||||
{
|
||||
"name": "Ethernet16"
|
||||
},
|
||||
{
|
||||
"name": "Ethernet17"
|
||||
},
|
||||
{
|
||||
"name": "Ethernet18"
|
||||
},
|
||||
{
|
||||
"name": "Ethernet19"
|
||||
},
|
||||
{
|
||||
"name": "Ethernet20"
|
||||
},
|
||||
{
|
||||
"name": "Ethernet21"
|
||||
},
|
||||
{
|
||||
"name": "Ethernet22"
|
||||
},
|
||||
{
|
||||
"name": "Ethernet23"
|
||||
},
|
||||
{
|
||||
"name": "Ethernet24"
|
||||
},
|
||||
{
|
||||
"name": "Ethernet25"
|
||||
},
|
||||
{
|
||||
"name": "Ethernet26"
|
||||
},
|
||||
{
|
||||
"name": "Ethernet27"
|
||||
},
|
||||
{
|
||||
"name": "Ethernet28"
|
||||
},
|
||||
{
|
||||
"name": "Ethernet29"
|
||||
},
|
||||
{
|
||||
"name": "Ethernet30"
|
||||
},
|
||||
{
|
||||
"name": "Ethernet31"
|
||||
},
|
||||
{
|
||||
"name": "Ethernet32"
|
||||
},
|
||||
{
|
||||
"name": "Ethernet33"
|
||||
},
|
||||
{
|
||||
"name": "Ethernet34"
|
||||
},
|
||||
{
|
||||
"name": "Ethernet35"
|
||||
},
|
||||
{
|
||||
"name": "Ethernet36"
|
||||
},
|
||||
{
|
||||
"name": "Ethernet37"
|
||||
},
|
||||
{
|
||||
"name": "Ethernet38"
|
||||
},
|
||||
{
|
||||
"name": "Ethernet39"
|
||||
},
|
||||
{
|
||||
"name": "Ethernet40"
|
||||
},
|
||||
{
|
||||
"name": "Ethernet41"
|
||||
},
|
||||
{
|
||||
"name": "Ethernet42"
|
||||
},
|
||||
{
|
||||
"name": "Ethernet43"
|
||||
},
|
||||
{
|
||||
"name": "Ethernet44"
|
||||
},
|
||||
{
|
||||
"name": "Ethernet45"
|
||||
},
|
||||
{
|
||||
"name": "Ethernet46"
|
||||
},
|
||||
{
|
||||
"name": "Ethernet47"
|
||||
},
|
||||
{
|
||||
"name": "Ethernet48"
|
||||
},
|
||||
{
|
||||
"name": "Ethernet49"
|
||||
},
|
||||
{
|
||||
"name": "Ethernet50"
|
||||
},
|
||||
{
|
||||
"name": "Ethernet51"
|
||||
},
|
||||
{
|
||||
"name": "Ethernet52"
|
||||
},
|
||||
{
|
||||
"name": "Ethernet53"
|
||||
},
|
||||
{
|
||||
"name": "Ethernet54"
|
||||
},
|
||||
{
|
||||
"name": "Ethernet55"
|
||||
}
|
||||
]
|
||||
},
|
||||
"interfaces": {
|
||||
"Ethernet0": {
|
||||
"index": "0",
|
||||
"lanes": "25",
|
||||
"breakout_modes": {
|
||||
"1x1G": ["Eth0(Port0)"]
|
||||
}
|
||||
},
|
||||
"Ethernet1": {
|
||||
"index": "1",
|
||||
"lanes": "26",
|
||||
"breakout_modes": {
|
||||
"1x1G": ["Eth1(Port1)"]
|
||||
}
|
||||
},
|
||||
"Ethernet2": {
|
||||
"index": "2",
|
||||
"lanes": "27",
|
||||
"breakout_modes": {
|
||||
"1x1G": ["Eth2(Port2)"]
|
||||
}
|
||||
},
|
||||
"Ethernet3": {
|
||||
"index": "3",
|
||||
"lanes": "28",
|
||||
"breakout_modes": {
|
||||
"1x1G": ["Eth3(Port3)"]
|
||||
}
|
||||
},
|
||||
"Ethernet4": {
|
||||
"index": "4",
|
||||
"lanes": "29",
|
||||
"breakout_modes": {
|
||||
"1x1G": ["Eth4(Port4)"]
|
||||
}
|
||||
},
|
||||
"Ethernet5": {
|
||||
"index": "5",
|
||||
"lanes": "30",
|
||||
"breakout_modes": {
|
||||
"1x1G": ["Eth5(Port5)"]
|
||||
}
|
||||
},
|
||||
"Ethernet6": {
|
||||
"index": "6",
|
||||
"lanes": "31",
|
||||
"breakout_modes": {
|
||||
"1x1G": ["Eth6(Port6)"]
|
||||
}
|
||||
},
|
||||
"Ethernet7": {
|
||||
"index": "7",
|
||||
"lanes": "32",
|
||||
"breakout_modes": {
|
||||
"1x1G": ["Eth7(Port7)"]
|
||||
}
|
||||
},
|
||||
"Ethernet8": {
|
||||
"index": "8",
|
||||
"lanes": "33",
|
||||
"breakout_modes": {
|
||||
"1x1G": ["Eth8(Port8)"]
|
||||
}
|
||||
},
|
||||
"Ethernet9": {
|
||||
"index": "9",
|
||||
"lanes": "34",
|
||||
"breakout_modes": {
|
||||
"1x1G": ["Eth9(Port9)"]
|
||||
}
|
||||
},
|
||||
"Ethernet10": {
|
||||
"index": "10",
|
||||
"lanes": "35",
|
||||
"breakout_modes": {
|
||||
"1x1G": ["Eth10(Port10)"]
|
||||
}
|
||||
},
|
||||
"Ethernet11": {
|
||||
"index": "11",
|
||||
"lanes": "36",
|
||||
"breakout_modes": {
|
||||
"1x1G": ["Eth11(Port11)"]
|
||||
}
|
||||
},
|
||||
"Ethernet12": {
|
||||
"index": "12",
|
||||
"lanes": "37",
|
||||
"breakout_modes": {
|
||||
"1x1G": ["Eth12(Port12)"]
|
||||
}
|
||||
},
|
||||
"Ethernet13": {
|
||||
"index": "13",
|
||||
"lanes": "38",
|
||||
"breakout_modes": {
|
||||
"1x1G": ["Eth13(Port13)"]
|
||||
}
|
||||
},
|
||||
"Ethernet14": {
|
||||
"index": "14",
|
||||
"lanes": "39",
|
||||
"breakout_modes": {
|
||||
"1x1G": ["Eth14(Port14)"]
|
||||
}
|
||||
},
|
||||
"Ethernet15": {
|
||||
"index": "15",
|
||||
"lanes": "40",
|
||||
"breakout_modes": {
|
||||
"1x1G": ["Eth15(Port15)"]
|
||||
}
|
||||
},
|
||||
"Ethernet16": {
|
||||
"index": "16",
|
||||
"lanes": "41",
|
||||
"breakout_modes": {
|
||||
"1x1G": ["Eth16(Port16)"]
|
||||
}
|
||||
},
|
||||
"Ethernet17": {
|
||||
"index": "17",
|
||||
"lanes": "42",
|
||||
"breakout_modes": {
|
||||
"1x1G": ["Eth17(Port17)"]
|
||||
}
|
||||
},
|
||||
"Ethernet18": {
|
||||
"index": "18",
|
||||
"lanes": "43",
|
||||
"breakout_modes": {
|
||||
"1x1G": ["Eth18(Port18)"]
|
||||
}
|
||||
},
|
||||
"Ethernet19": {
|
||||
"index": "19",
|
||||
"lanes": "44",
|
||||
"breakout_modes": {
|
||||
"1x1G": ["Eth19(Port19)"]
|
||||
}
|
||||
},
|
||||
"Ethernet20": {
|
||||
"index": "20",
|
||||
"lanes": "45",
|
||||
"breakout_modes": {
|
||||
"1x1G": ["Eth20(Port20)"]
|
||||
}
|
||||
},
|
||||
"Ethernet21": {
|
||||
"index": "21",
|
||||
"lanes": "46",
|
||||
"breakout_modes": {
|
||||
"1x1G": ["Eth21(Port21)"]
|
||||
}
|
||||
},
|
||||
"Ethernet22": {
|
||||
"index": "22",
|
||||
"lanes": "47",
|
||||
"breakout_modes": {
|
||||
"1x1G": ["Eth22(Port22)"]
|
||||
}
|
||||
},
|
||||
"Ethernet23": {
|
||||
"index": "23",
|
||||
"lanes": "48",
|
||||
"breakout_modes": {
|
||||
"1x1G": ["Eth23(Port23)"]
|
||||
}
|
||||
},
|
||||
"Ethernet24": {
|
||||
"index": "24",
|
||||
"lanes": "1",
|
||||
"breakout_modes": {
|
||||
"1x1G": ["Eth24(Port24)"]
|
||||
}
|
||||
},
|
||||
"Ethernet25": {
|
||||
"index": "25",
|
||||
"lanes": "2",
|
||||
"breakout_modes": {
|
||||
"1x1G": ["Eth25(Port25)"]
|
||||
}
|
||||
},
|
||||
"Ethernet26": {
|
||||
"index": "26",
|
||||
"lanes": "3",
|
||||
"breakout_modes": {
|
||||
"1x1G": ["Eth26(Port26)"]
|
||||
}
|
||||
},
|
||||
"Ethernet27": {
|
||||
"index": "27",
|
||||
"lanes": "4",
|
||||
"breakout_modes": {
|
||||
"1x1G": ["Eth27(Port27)"]
|
||||
}
|
||||
},
|
||||
"Ethernet28": {
|
||||
"index": "28",
|
||||
"lanes": "5",
|
||||
"breakout_modes": {
|
||||
"1x1G": ["Eth28(Port28)"]
|
||||
}
|
||||
},
|
||||
"Ethernet29": {
|
||||
"index": "29",
|
||||
"lanes": "6",
|
||||
"breakout_modes": {
|
||||
"1x1G": ["Eth29(Port29)"]
|
||||
}
|
||||
},
|
||||
"Ethernet30": {
|
||||
"index": "30",
|
||||
"lanes": "7",
|
||||
"breakout_modes": {
|
||||
"1x1G": ["Eth30(Port30)"]
|
||||
}
|
||||
},
|
||||
"Ethernet31": {
|
||||
"index": "31",
|
||||
"lanes": "8",
|
||||
"breakout_modes": {
|
||||
"1x1G": ["Eth31(Port31)"]
|
||||
}
|
||||
},
|
||||
"Ethernet32": {
|
||||
"index": "32",
|
||||
"lanes": "9",
|
||||
"breakout_modes": {
|
||||
"1x1G": ["Eth32(Port32)"]
|
||||
}
|
||||
},
|
||||
"Ethernet33": {
|
||||
"index": "33",
|
||||
"lanes": "10",
|
||||
"breakout_modes": {
|
||||
"1x1G": ["Eth33(Port33)"]
|
||||
}
|
||||
},
|
||||
"Ethernet34": {
|
||||
"index": "34",
|
||||
"lanes": "11",
|
||||
"breakout_modes": {
|
||||
"1x1G": ["Eth34(Port34)"]
|
||||
}
|
||||
},
|
||||
"Ethernet35": {
|
||||
"index": "35",
|
||||
"lanes": "12",
|
||||
"breakout_modes": {
|
||||
"1x1G": ["Eth35(Port35)"]
|
||||
}
|
||||
},
|
||||
"Ethernet36": {
|
||||
"index": "36",
|
||||
"lanes": "13",
|
||||
"breakout_modes": {
|
||||
"1x1G": ["Eth36(Port36)"]
|
||||
}
|
||||
},
|
||||
"Ethernet37": {
|
||||
"index": "37",
|
||||
"lanes": "14",
|
||||
"breakout_modes": {
|
||||
"1x1G": ["Eth37(Port37)"]
|
||||
}
|
||||
},
|
||||
"Ethernet38": {
|
||||
"index": "38",
|
||||
"lanes": "15",
|
||||
"breakout_modes": {
|
||||
"1x1G": ["Eth38(Port38)"]
|
||||
}
|
||||
},
|
||||
"Ethernet39": {
|
||||
"index": "39",
|
||||
"lanes": "16",
|
||||
"breakout_modes": {
|
||||
"1x1G": ["Eth39(Port39)"]
|
||||
}
|
||||
},
|
||||
"Ethernet40": {
|
||||
"index": "40",
|
||||
"lanes": "17",
|
||||
"breakout_modes": {
|
||||
"1x1G": ["Eth40(Port40)"]
|
||||
}
|
||||
},
|
||||
"Ethernet41": {
|
||||
"index": "41",
|
||||
"lanes": "18",
|
||||
"breakout_modes": {
|
||||
"1x1G": ["Eth41(Port41)"]
|
||||
}
|
||||
},
|
||||
"Ethernet42": {
|
||||
"index": "42",
|
||||
"lanes": "19",
|
||||
"breakout_modes": {
|
||||
"1x1G": ["Eth42(Port42)"]
|
||||
}
|
||||
},
|
||||
"Ethernet43": {
|
||||
"index": "43",
|
||||
"lanes": "20",
|
||||
"breakout_modes": {
|
||||
"1x1G": ["Eth43(Port43)"]
|
||||
}
|
||||
},
|
||||
"Ethernet44": {
|
||||
"index": "44",
|
||||
"lanes": "21",
|
||||
"breakout_modes": {
|
||||
"1x1G": ["Eth44(Port44)"]
|
||||
}
|
||||
},
|
||||
"Ethernet45": {
|
||||
"index": "45",
|
||||
"lanes": "22",
|
||||
"breakout_modes": {
|
||||
"1x1G": ["Eth45(Port45)"]
|
||||
}
|
||||
},
|
||||
"Ethernet46": {
|
||||
"index": "46",
|
||||
"lanes": "23",
|
||||
"breakout_modes": {
|
||||
"1x1G": ["Eth46(Port46)"]
|
||||
}
|
||||
},
|
||||
"Ethernet47": {
|
||||
"index": "47",
|
||||
"lanes": "24",
|
||||
"breakout_modes": {
|
||||
"1x1G": ["Eth47(Port47)"]
|
||||
}
|
||||
},
|
||||
"Ethernet48": {
|
||||
"index": "48",
|
||||
"lanes": "57",
|
||||
"breakout_modes": {
|
||||
"1x10G": ["Eth48(Port48)"]
|
||||
}
|
||||
},
|
||||
"Ethernet49": {
|
||||
"index": "49",
|
||||
"lanes": "58",
|
||||
"breakout_modes": {
|
||||
"1x10G": ["Eth49(Port49)"]
|
||||
}
|
||||
},
|
||||
"Ethernet50": {
|
||||
"index": "50",
|
||||
"lanes": "59",
|
||||
"breakout_modes": {
|
||||
"1x10G": ["Eth50(Port50)"]
|
||||
}
|
||||
},
|
||||
"Ethernet51": {
|
||||
"index": "51",
|
||||
"lanes": "60",
|
||||
"breakout_modes": {
|
||||
"1x10G": ["Eth51(Port51)"]
|
||||
}
|
||||
},
|
||||
"Ethernet52": {
|
||||
"index": "52",
|
||||
"lanes": "64",
|
||||
"breakout_modes": {
|
||||
"1x10G": ["Eth52(Port52)"]
|
||||
}
|
||||
},
|
||||
"Ethernet53": {
|
||||
"index": "53",
|
||||
"lanes": "63",
|
||||
"breakout_modes": {
|
||||
"1x10G": ["Eth53(Port53)"]
|
||||
}
|
||||
},
|
||||
"Ethernet54": {
|
||||
"index": "54",
|
||||
"lanes": "62",
|
||||
"breakout_modes": {
|
||||
"1x10G": ["Eth54(Port54)"]
|
||||
}
|
||||
},
|
||||
"Ethernet55": {
|
||||
"index": "55",
|
||||
"lanes": "61",
|
||||
"breakout_modes": {
|
||||
"1x10G": ["Eth55(Port55)"]
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
@ -0,0 +1 @@
|
||||
broadcom
|
||||
@ -0,0 +1,10 @@
|
||||
{
|
||||
"chassis": {
|
||||
"x86_64-ufispace_s6301_56st-r0": {
|
||||
"component": {
|
||||
"CPLD1": { },
|
||||
"BIOS": { }
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
@ -0,0 +1,2 @@
|
||||
SYNCD_SHM_SIZE=256m
|
||||
|
||||
@ -0,0 +1,9 @@
|
||||
{
|
||||
"skip_pcied": false,
|
||||
"skip_fancontrol": false,
|
||||
"skip_thermalctld": false,
|
||||
"skip_ledd": true,
|
||||
"skip_xcvrd": false,
|
||||
"skip_psud": false,
|
||||
"skip_syseepromd": false
|
||||
}
|
||||
@ -0,0 +1 @@
|
||||
# libsensors configuration file
|
||||
@ -0,0 +1,15 @@
|
||||
{
|
||||
"services_to_ignore": [],
|
||||
"devices_to_ignore": [
|
||||
"asic",
|
||||
"psu",
|
||||
"fan"
|
||||
],
|
||||
"user_defined_checkers": [],
|
||||
"polling_interval": 60,
|
||||
"led_color": {
|
||||
"fault": "yellow_blink",
|
||||
"normal": "green",
|
||||
"booting": "green_blink"
|
||||
}
|
||||
}
|
||||
@ -0,0 +1,166 @@
|
||||
{
|
||||
"interfaces": {
|
||||
"Ethernet0": {
|
||||
"default_brkout_mode": "1x10G"
|
||||
},
|
||||
"Ethernet1": {
|
||||
"default_brkout_mode": "1x10G"
|
||||
},
|
||||
"Ethernet2": {
|
||||
"default_brkout_mode": "1x10G"
|
||||
},
|
||||
"Ethernet3": {
|
||||
"default_brkout_mode": "1x10G"
|
||||
},
|
||||
"Ethernet4": {
|
||||
"default_brkout_mode": "1x10G"
|
||||
},
|
||||
"Ethernet5": {
|
||||
"default_brkout_mode": "1x10G"
|
||||
},
|
||||
"Ethernet6": {
|
||||
"default_brkout_mode": "1x10G"
|
||||
},
|
||||
"Ethernet7": {
|
||||
"default_brkout_mode": "1x10G"
|
||||
},
|
||||
"Ethernet8": {
|
||||
"default_brkout_mode": "1x10G"
|
||||
},
|
||||
"Ethernet9": {
|
||||
"default_brkout_mode": "1x10G"
|
||||
},
|
||||
"Ethernet10": {
|
||||
"default_brkout_mode": "1x10G"
|
||||
},
|
||||
"Ethernet11": {
|
||||
"default_brkout_mode": "1x10G"
|
||||
},
|
||||
"Ethernet12": {
|
||||
"default_brkout_mode": "1x10G"
|
||||
},
|
||||
"Ethernet13": {
|
||||
"default_brkout_mode": "1x10G"
|
||||
},
|
||||
"Ethernet14": {
|
||||
"default_brkout_mode": "1x10G"
|
||||
},
|
||||
"Ethernet15": {
|
||||
"default_brkout_mode": "1x10G"
|
||||
},
|
||||
"Ethernet16": {
|
||||
"default_brkout_mode": "1x10G"
|
||||
},
|
||||
"Ethernet17": {
|
||||
"default_brkout_mode": "1x10G"
|
||||
},
|
||||
"Ethernet18": {
|
||||
"default_brkout_mode": "1x10G"
|
||||
},
|
||||
"Ethernet19": {
|
||||
"default_brkout_mode": "1x10G"
|
||||
},
|
||||
"Ethernet20": {
|
||||
"default_brkout_mode": "1x10G"
|
||||
},
|
||||
"Ethernet21": {
|
||||
"default_brkout_mode": "1x10G"
|
||||
},
|
||||
"Ethernet22": {
|
||||
"default_brkout_mode": "1x10G"
|
||||
},
|
||||
"Ethernet23": {
|
||||
"default_brkout_mode": "1x10G"
|
||||
},
|
||||
"Ethernet24": {
|
||||
"default_brkout_mode": "1x10G"
|
||||
},
|
||||
"Ethernet25": {
|
||||
"default_brkout_mode": "1x10G"
|
||||
},
|
||||
"Ethernet26": {
|
||||
"default_brkout_mode": "1x10G"
|
||||
},
|
||||
"Ethernet27": {
|
||||
"default_brkout_mode": "1x10G"
|
||||
},
|
||||
"Ethernet28": {
|
||||
"default_brkout_mode": "1x10G"
|
||||
},
|
||||
"Ethernet29": {
|
||||
"default_brkout_mode": "1x10G"
|
||||
},
|
||||
"Ethernet30": {
|
||||
"default_brkout_mode": "1x10G"
|
||||
},
|
||||
"Ethernet31": {
|
||||
"default_brkout_mode": "1x10G"
|
||||
},
|
||||
"Ethernet32": {
|
||||
"default_brkout_mode": "1x10G"
|
||||
},
|
||||
"Ethernet33": {
|
||||
"default_brkout_mode": "1x10G"
|
||||
},
|
||||
"Ethernet34": {
|
||||
"default_brkout_mode": "1x10G"
|
||||
},
|
||||
"Ethernet35": {
|
||||
"default_brkout_mode": "1x10G"
|
||||
},
|
||||
"Ethernet36": {
|
||||
"default_brkout_mode": "1x10G"
|
||||
},
|
||||
"Ethernet37": {
|
||||
"default_brkout_mode": "1x10G"
|
||||
},
|
||||
"Ethernet38": {
|
||||
"default_brkout_mode": "1x10G"
|
||||
},
|
||||
"Ethernet39": {
|
||||
"default_brkout_mode": "1x10G"
|
||||
},
|
||||
"Ethernet40": {
|
||||
"default_brkout_mode": "1x10G"
|
||||
},
|
||||
"Ethernet41": {
|
||||
"default_brkout_mode": "1x10G"
|
||||
},
|
||||
"Ethernet42": {
|
||||
"default_brkout_mode": "1x10G"
|
||||
},
|
||||
"Ethernet43": {
|
||||
"default_brkout_mode": "1x10G"
|
||||
},
|
||||
"Ethernet44": {
|
||||
"default_brkout_mode": "1x10G"
|
||||
},
|
||||
"Ethernet45": {
|
||||
"default_brkout_mode": "1x10G"
|
||||
},
|
||||
"Ethernet46": {
|
||||
"default_brkout_mode": "1x10G"
|
||||
},
|
||||
"Ethernet47": {
|
||||
"default_brkout_mode": "1x10G"
|
||||
},
|
||||
"Ethernet48": {
|
||||
"default_brkout_mode": "1x100G[40G]"
|
||||
},
|
||||
"Ethernet52": {
|
||||
"default_brkout_mode": "1x100G[40G]"
|
||||
},
|
||||
"Ethernet56": {
|
||||
"default_brkout_mode": "1x100G[40G]"
|
||||
},
|
||||
"Ethernet60": {
|
||||
"default_brkout_mode": "1x100G[40G]"
|
||||
},
|
||||
"Ethernet64": {
|
||||
"default_brkout_mode": "1x100G[40G]"
|
||||
},
|
||||
"Ethernet68": {
|
||||
"default_brkout_mode": "1x100G[40G]"
|
||||
}
|
||||
}
|
||||
}
|
||||
@ -0,0 +1 @@
|
||||
SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/td3-x5-s7801-54xs.config.bcm
|
||||
@ -0,0 +1,502 @@
|
||||
# cfg version: r1, 20230628
|
||||
|
||||
pbmp_xport_xe=0x7fffffffffffffffdfffffffffffffffe
|
||||
|
||||
|
||||
#FC 0
|
||||
phy_chain_tx_polarity_flip_physical{1}=0x0
|
||||
phy_chain_tx_polarity_flip_physical{2}=0x0
|
||||
phy_chain_tx_polarity_flip_physical{3}=0x0
|
||||
phy_chain_tx_polarity_flip_physical{4}=0x0
|
||||
|
||||
phy_chain_rx_polarity_flip_physical{1}=0x0
|
||||
phy_chain_rx_polarity_flip_physical{2}=0x0
|
||||
phy_chain_rx_polarity_flip_physical{3}=0x0
|
||||
phy_chain_rx_polarity_flip_physical{4}=0x0
|
||||
|
||||
phy_chain_tx_lane_map_physical{1.0}=0x0123
|
||||
phy_chain_rx_lane_map_physical{1.0}=0x0123
|
||||
|
||||
#FC 1
|
||||
phy_chain_tx_polarity_flip_physical{5}=0x0
|
||||
phy_chain_tx_polarity_flip_physical{6}=0x0
|
||||
phy_chain_tx_polarity_flip_physical{7}=0x0
|
||||
phy_chain_tx_polarity_flip_physical{8}=0x0
|
||||
|
||||
phy_chain_rx_polarity_flip_physical{5}=0x1
|
||||
phy_chain_rx_polarity_flip_physical{6}=0x1
|
||||
phy_chain_rx_polarity_flip_physical{7}=0x1
|
||||
phy_chain_rx_polarity_flip_physical{8}=0x1
|
||||
|
||||
phy_chain_tx_lane_map_physical{5.0}=0x0123
|
||||
phy_chain_rx_lane_map_physical{5.0}=0x0123
|
||||
|
||||
#FC 2
|
||||
phy_chain_tx_polarity_flip_physical{9}=0x0
|
||||
phy_chain_tx_polarity_flip_physical{10}=0x0
|
||||
phy_chain_tx_polarity_flip_physical{11}=0x0
|
||||
phy_chain_tx_polarity_flip_physical{12}=0x0
|
||||
|
||||
phy_chain_rx_polarity_flip_physical{9}=0x1
|
||||
phy_chain_rx_polarity_flip_physical{10}=0x1
|
||||
phy_chain_rx_polarity_flip_physical{11}=0x1
|
||||
phy_chain_rx_polarity_flip_physical{12}=0x1
|
||||
|
||||
phy_chain_tx_lane_map_physical{9.0}=0x0123
|
||||
phy_chain_rx_lane_map_physical{9.0}=0x0123
|
||||
|
||||
#FC 3
|
||||
phy_chain_tx_polarity_flip_physical{13}=0x0
|
||||
phy_chain_tx_polarity_flip_physical{14}=0x0
|
||||
phy_chain_tx_polarity_flip_physical{15}=0x0
|
||||
phy_chain_tx_polarity_flip_physical{16}=0x0
|
||||
|
||||
phy_chain_rx_polarity_flip_physical{13}=0x1
|
||||
phy_chain_rx_polarity_flip_physical{14}=0x1
|
||||
phy_chain_rx_polarity_flip_physical{15}=0x1
|
||||
phy_chain_rx_polarity_flip_physical{16}=0x1
|
||||
|
||||
phy_chain_tx_lane_map_physical{13.0}=0x0123
|
||||
phy_chain_rx_lane_map_physical{13.0}=0x0123
|
||||
|
||||
#FC 4
|
||||
phy_chain_tx_polarity_flip_physical{17}=0x0
|
||||
phy_chain_tx_polarity_flip_physical{18}=0x0
|
||||
phy_chain_tx_polarity_flip_physical{19}=0x0
|
||||
phy_chain_tx_polarity_flip_physical{20}=0x0
|
||||
|
||||
phy_chain_rx_polarity_flip_physical{17}=0x0
|
||||
phy_chain_rx_polarity_flip_physical{18}=0x0
|
||||
phy_chain_rx_polarity_flip_physical{19}=0x0
|
||||
phy_chain_rx_polarity_flip_physical{20}=0x0
|
||||
|
||||
phy_chain_tx_lane_map_physical{17.0}=0x0123
|
||||
phy_chain_rx_lane_map_physical{17.0}=0x0123
|
||||
|
||||
#FC 5
|
||||
phy_chain_tx_polarity_flip_physical{21}=0x0
|
||||
phy_chain_tx_polarity_flip_physical{22}=0x0
|
||||
phy_chain_tx_polarity_flip_physical{23}=0x0
|
||||
phy_chain_tx_polarity_flip_physical{24}=0x0
|
||||
|
||||
phy_chain_rx_polarity_flip_physical{21}=0x1
|
||||
phy_chain_rx_polarity_flip_physical{22}=0x1
|
||||
phy_chain_rx_polarity_flip_physical{23}=0x1
|
||||
phy_chain_rx_polarity_flip_physical{24}=0x1
|
||||
|
||||
phy_chain_tx_lane_map_physical{21.0}=0x0123
|
||||
phy_chain_rx_lane_map_physical{21.0}=0x0123
|
||||
|
||||
#FC 6
|
||||
phy_chain_tx_polarity_flip_physical{25}=0x0
|
||||
phy_chain_tx_polarity_flip_physical{26}=0x0
|
||||
phy_chain_tx_polarity_flip_physical{27}=0x0
|
||||
phy_chain_tx_polarity_flip_physical{28}=0x0
|
||||
|
||||
phy_chain_rx_polarity_flip_physical{25}=0x1
|
||||
phy_chain_rx_polarity_flip_physical{26}=0x1
|
||||
phy_chain_rx_polarity_flip_physical{27}=0x1
|
||||
phy_chain_rx_polarity_flip_physical{28}=0x1
|
||||
|
||||
phy_chain_tx_lane_map_physical{25.0}=0x0123
|
||||
phy_chain_rx_lane_map_physical{25.0}=0x0123
|
||||
|
||||
#FC 7 not use
|
||||
phy_chain_tx_polarity_flip_physical{29}=0x0
|
||||
phy_chain_tx_polarity_flip_physical{30}=0x0
|
||||
phy_chain_tx_polarity_flip_physical{31}=0x0
|
||||
phy_chain_tx_polarity_flip_physical{32}=0x0
|
||||
|
||||
phy_chain_rx_polarity_flip_physical{29}=0x0
|
||||
phy_chain_rx_polarity_flip_physical{30}=0x0
|
||||
phy_chain_rx_polarity_flip_physical{31}=0x0
|
||||
phy_chain_rx_polarity_flip_physical{32}=0x0
|
||||
|
||||
phy_chain_tx_lane_map_physical{29.0}=0x0123
|
||||
phy_chain_rx_lane_map_physical{29.0}=0x0123
|
||||
|
||||
#FC 8
|
||||
phy_chain_tx_polarity_flip_physical{33}=0x1
|
||||
phy_chain_tx_polarity_flip_physical{34}=0x0
|
||||
phy_chain_tx_polarity_flip_physical{35}=0x1
|
||||
phy_chain_tx_polarity_flip_physical{36}=0x1
|
||||
|
||||
phy_chain_rx_polarity_flip_physical{33}=0x0
|
||||
phy_chain_rx_polarity_flip_physical{34}=0x0
|
||||
phy_chain_rx_polarity_flip_physical{35}=0x1
|
||||
phy_chain_rx_polarity_flip_physical{36}=0x0
|
||||
|
||||
phy_chain_tx_lane_map_physical{33.0}=0x3120
|
||||
phy_chain_rx_lane_map_physical{33.0}=0x0213
|
||||
|
||||
#FC 9
|
||||
phy_chain_tx_polarity_flip_physical{37}=0x0
|
||||
phy_chain_tx_polarity_flip_physical{38}=0x0
|
||||
phy_chain_tx_polarity_flip_physical{39}=0x1
|
||||
phy_chain_tx_polarity_flip_physical{40}=0x1
|
||||
|
||||
phy_chain_rx_polarity_flip_physical{37}=0x1
|
||||
phy_chain_rx_polarity_flip_physical{38}=0x1
|
||||
phy_chain_rx_polarity_flip_physical{39}=0x0
|
||||
phy_chain_rx_polarity_flip_physical{40}=0x0
|
||||
|
||||
phy_chain_tx_lane_map_physical{37.0}=0x2031
|
||||
phy_chain_rx_lane_map_physical{37.0}=0x1302
|
||||
|
||||
#FC 10
|
||||
phy_chain_tx_polarity_flip_physical{41}=0x0
|
||||
phy_chain_tx_polarity_flip_physical{42}=0x0
|
||||
phy_chain_tx_polarity_flip_physical{43}=0x0
|
||||
phy_chain_tx_polarity_flip_physical{44}=0x0
|
||||
|
||||
phy_chain_rx_polarity_flip_physical{41}=0x1
|
||||
phy_chain_rx_polarity_flip_physical{42}=0x1
|
||||
phy_chain_rx_polarity_flip_physical{43}=0x1
|
||||
phy_chain_rx_polarity_flip_physical{44}=0x1
|
||||
|
||||
phy_chain_tx_lane_map_physical{41.0}=0x3210
|
||||
phy_chain_rx_lane_map_physical{41.0}=0x0123
|
||||
|
||||
#FC 11
|
||||
phy_chain_tx_polarity_flip_physical{45}=0x0
|
||||
phy_chain_tx_polarity_flip_physical{46}=0x0
|
||||
phy_chain_tx_polarity_flip_physical{47}=0x1
|
||||
phy_chain_tx_polarity_flip_physical{48}=0x1
|
||||
|
||||
phy_chain_rx_polarity_flip_physical{45}=0x0
|
||||
phy_chain_rx_polarity_flip_physical{46}=0x0
|
||||
phy_chain_rx_polarity_flip_physical{47}=0x0
|
||||
phy_chain_rx_polarity_flip_physical{48}=0x1
|
||||
|
||||
phy_chain_tx_lane_map_physical{45.0}=0x3120
|
||||
phy_chain_rx_lane_map_physical{45.0}=0x2130
|
||||
|
||||
#FC 12
|
||||
phy_chain_tx_polarity_flip_physical{49}=0x1
|
||||
phy_chain_tx_polarity_flip_physical{50}=0x0
|
||||
phy_chain_tx_polarity_flip_physical{51}=0x0
|
||||
phy_chain_tx_polarity_flip_physical{52}=0x1
|
||||
|
||||
phy_chain_rx_polarity_flip_physical{49}=0x0
|
||||
phy_chain_rx_polarity_flip_physical{50}=0x1
|
||||
phy_chain_rx_polarity_flip_physical{51}=0x1
|
||||
phy_chain_rx_polarity_flip_physical{52}=0x0
|
||||
|
||||
phy_chain_tx_lane_map_physical{49.0}=0x3201
|
||||
phy_chain_rx_lane_map_physical{49.0}=0x1023
|
||||
|
||||
#FC 13
|
||||
phy_chain_tx_polarity_flip_physical{53}=0x0
|
||||
phy_chain_tx_polarity_flip_physical{54}=0x0
|
||||
phy_chain_tx_polarity_flip_physical{55}=0x1
|
||||
phy_chain_tx_polarity_flip_physical{56}=0x1
|
||||
|
||||
phy_chain_rx_polarity_flip_physical{53}=0x0
|
||||
phy_chain_rx_polarity_flip_physical{54}=0x0
|
||||
phy_chain_rx_polarity_flip_physical{55}=0x0
|
||||
phy_chain_rx_polarity_flip_physical{56}=0x1
|
||||
|
||||
phy_chain_tx_lane_map_physical{53.0}=0x3120
|
||||
phy_chain_rx_lane_map_physical{53.0}=0x2130
|
||||
|
||||
#FC 14
|
||||
phy_chain_tx_polarity_flip_physical{57}=0x1
|
||||
phy_chain_tx_polarity_flip_physical{58}=0x0
|
||||
phy_chain_tx_polarity_flip_physical{59}=0x0
|
||||
phy_chain_tx_polarity_flip_physical{60}=0x1
|
||||
|
||||
phy_chain_rx_polarity_flip_physical{57}=0x0
|
||||
phy_chain_rx_polarity_flip_physical{58}=0x1
|
||||
phy_chain_rx_polarity_flip_physical{59}=0x1
|
||||
phy_chain_rx_polarity_flip_physical{60}=0x0
|
||||
|
||||
phy_chain_tx_lane_map_physical{57.0}=0x3201
|
||||
phy_chain_rx_lane_map_physical{57.0}=0x1023
|
||||
|
||||
#FC 15
|
||||
phy_chain_tx_polarity_flip_physical{61}=0x0
|
||||
phy_chain_tx_polarity_flip_physical{62}=0x0
|
||||
phy_chain_tx_polarity_flip_physical{63}=0x0
|
||||
phy_chain_tx_polarity_flip_physical{64}=0x0
|
||||
|
||||
phy_chain_rx_polarity_flip_physical{61}=0x0
|
||||
phy_chain_rx_polarity_flip_physical{62}=0x0
|
||||
phy_chain_rx_polarity_flip_physical{63}=0x0
|
||||
phy_chain_rx_polarity_flip_physical{64}=0x0
|
||||
|
||||
phy_chain_tx_lane_map_physical{61.0}=0x3210
|
||||
phy_chain_rx_lane_map_physical{61.0}=0x3210
|
||||
|
||||
#FC 16
|
||||
phy_chain_tx_polarity_flip_physical{65}=0x0
|
||||
phy_chain_tx_polarity_flip_physical{66}=0x0
|
||||
phy_chain_tx_polarity_flip_physical{67}=0x0
|
||||
phy_chain_tx_polarity_flip_physical{68}=0x0
|
||||
|
||||
phy_chain_rx_polarity_flip_physical{65}=0x1
|
||||
phy_chain_rx_polarity_flip_physical{66}=0x1
|
||||
phy_chain_rx_polarity_flip_physical{67}=0x1
|
||||
phy_chain_rx_polarity_flip_physical{68}=0x1
|
||||
|
||||
phy_chain_tx_lane_map_physical{65.0}=0x3210
|
||||
phy_chain_rx_lane_map_physical{65.0}=0x3210
|
||||
|
||||
#FC 17
|
||||
phy_chain_tx_polarity_flip_physical{69}=0x0
|
||||
phy_chain_tx_polarity_flip_physical{70}=0x0
|
||||
phy_chain_tx_polarity_flip_physical{71}=0x0
|
||||
phy_chain_tx_polarity_flip_physical{72}=0x0
|
||||
|
||||
phy_chain_rx_polarity_flip_physical{69}=0x1
|
||||
phy_chain_rx_polarity_flip_physical{70}=0x1
|
||||
phy_chain_rx_polarity_flip_physical{71}=0x1
|
||||
phy_chain_rx_polarity_flip_physical{72}=0x1
|
||||
|
||||
phy_chain_tx_lane_map_physical{69.0}=0x3210
|
||||
phy_chain_rx_lane_map_physical{69.0}=0x3210
|
||||
|
||||
#FC 18
|
||||
phy_chain_tx_polarity_flip_physical{73}=0x0
|
||||
phy_chain_tx_polarity_flip_physical{74}=0x0
|
||||
phy_chain_tx_polarity_flip_physical{75}=0x0
|
||||
phy_chain_tx_polarity_flip_physical{76}=0x0
|
||||
|
||||
phy_chain_rx_polarity_flip_physical{73}=0x1
|
||||
phy_chain_rx_polarity_flip_physical{74}=0x1
|
||||
phy_chain_rx_polarity_flip_physical{75}=0x1
|
||||
phy_chain_rx_polarity_flip_physical{76}=0x1
|
||||
|
||||
phy_chain_tx_lane_map_physical{73.0}=0x3210
|
||||
phy_chain_rx_lane_map_physical{73.0}=0x3210
|
||||
|
||||
#FC 19 not use
|
||||
phy_chain_tx_polarity_flip_physical{77}=0x0
|
||||
phy_chain_tx_polarity_flip_physical{78}=0x0
|
||||
phy_chain_tx_polarity_flip_physical{79}=0x0
|
||||
phy_chain_tx_polarity_flip_physical{80}=0x0
|
||||
|
||||
phy_chain_rx_polarity_flip_physical{77}=0x0
|
||||
phy_chain_rx_polarity_flip_physical{78}=0x0
|
||||
phy_chain_rx_polarity_flip_physical{79}=0x0
|
||||
phy_chain_rx_polarity_flip_physical{80}=0x0
|
||||
|
||||
phy_chain_tx_lane_map_physical{77.0}=0x3210
|
||||
phy_chain_rx_lane_map_physical{77.0}=0x3210
|
||||
|
||||
|
||||
#FC0 sfp28 port 0-3
|
||||
portmap_1=1:10
|
||||
portmap_2=2:10
|
||||
portmap_3=3:10
|
||||
portmap_4=4:10
|
||||
|
||||
#FC1 sfp28 port 4-7
|
||||
portmap_5=5:10
|
||||
portmap_6=6:10
|
||||
portmap_7=7:10
|
||||
portmap_8=8:10
|
||||
|
||||
#FC2 sfp28 port 8-11
|
||||
portmap_9=9:10
|
||||
portmap_10=10:10
|
||||
portmap_11=11:10
|
||||
portmap_12=12:10
|
||||
|
||||
#FC3 sfp28 port 12-15
|
||||
portmap_13=13:10
|
||||
portmap_14=14:10
|
||||
portmap_15=15:10
|
||||
portmap_16=16:10
|
||||
|
||||
#FC4 sfp28 port 16-19
|
||||
portmap_17=17:10
|
||||
portmap_18=18:10
|
||||
portmap_19=19:10
|
||||
portmap_20=20:10
|
||||
|
||||
#FC5 sfp28 port 20-23
|
||||
portmap_21=21:10
|
||||
portmap_22=22:10
|
||||
portmap_23=23:10
|
||||
portmap_24=24:10
|
||||
|
||||
#FC6 sfp28 port 24-27
|
||||
portmap_25=25:10
|
||||
portmap_26=26:10
|
||||
portmap_27=27:10
|
||||
portmap_28=28:10
|
||||
|
||||
#FC7 not use
|
||||
|
||||
#FC10 sfp28 port 28-31
|
||||
portmap_33=41:10
|
||||
portmap_34=42:10
|
||||
portmap_35=43:10
|
||||
portmap_36=44:10
|
||||
|
||||
#FC15 sfp28 port 32-35
|
||||
portmap_37=61:10
|
||||
portmap_38=62:10
|
||||
portmap_39=63:10
|
||||
portmap_40=64:10
|
||||
|
||||
#FC16 sfp28 port 36-39
|
||||
portmap_41=65:10
|
||||
portmap_42=66:10
|
||||
portmap_43=67:10
|
||||
portmap_44=68:10
|
||||
|
||||
#FC17 sfp28 port 40-43
|
||||
portmap_45=69:10
|
||||
portmap_46=70:10
|
||||
portmap_47=71:10
|
||||
portmap_48=72:10
|
||||
|
||||
#FC18 sfp28 port 44-47
|
||||
portmap_49=73:10
|
||||
portmap_50=74:10
|
||||
portmap_51=75:10
|
||||
portmap_52=76:10
|
||||
|
||||
#FC9 qsfp port 48
|
||||
portmap_29=37:100
|
||||
|
||||
#FC8 qsfp port 49
|
||||
portmap_30=33:100
|
||||
|
||||
#FC11 qsfp port 50
|
||||
portmap_53=45:100
|
||||
|
||||
#FC12 qsfp port 51
|
||||
portmap_54=49:100
|
||||
|
||||
#FC13 qsfp port 52
|
||||
portmap_55=53:100
|
||||
|
||||
#FC14 qsfp port 53
|
||||
portmap_59=57:100
|
||||
|
||||
#FC19 not use
|
||||
|
||||
# dport
|
||||
dport_map_enable=1
|
||||
|
||||
dport_map_port_1=1
|
||||
dport_map_port_2=2
|
||||
dport_map_port_3=3
|
||||
dport_map_port_4=4
|
||||
dport_map_port_5=5
|
||||
dport_map_port_6=6
|
||||
dport_map_port_7=7
|
||||
dport_map_port_8=8
|
||||
dport_map_port_9=9
|
||||
dport_map_port_10=10
|
||||
dport_map_port_11=11
|
||||
dport_map_port_12=12
|
||||
dport_map_port_13=13
|
||||
dport_map_port_14=14
|
||||
dport_map_port_15=15
|
||||
dport_map_port_16=16
|
||||
dport_map_port_17=17
|
||||
dport_map_port_18=18
|
||||
dport_map_port_19=19
|
||||
dport_map_port_20=20
|
||||
dport_map_port_21=21
|
||||
dport_map_port_22=22
|
||||
dport_map_port_23=23
|
||||
dport_map_port_24=24
|
||||
dport_map_port_25=25
|
||||
dport_map_port_26=26
|
||||
dport_map_port_27=27
|
||||
dport_map_port_28=28
|
||||
dport_map_port_33=29
|
||||
dport_map_port_34=30
|
||||
dport_map_port_35=31
|
||||
dport_map_port_36=32
|
||||
dport_map_port_37=33
|
||||
dport_map_port_38=34
|
||||
dport_map_port_39=35
|
||||
dport_map_port_40=36
|
||||
dport_map_port_41=37
|
||||
dport_map_port_42=38
|
||||
dport_map_port_43=39
|
||||
dport_map_port_44=40
|
||||
dport_map_port_45=41
|
||||
dport_map_port_46=42
|
||||
dport_map_port_47=43
|
||||
dport_map_port_48=44
|
||||
dport_map_port_49=45
|
||||
dport_map_port_50=46
|
||||
dport_map_port_51=47
|
||||
dport_map_port_52=48
|
||||
dport_map_port_29=49
|
||||
dport_map_port_30=50
|
||||
dport_map_port_53=51
|
||||
dport_map_port_54=52
|
||||
dport_map_port_55=53
|
||||
dport_map_port_59=54
|
||||
|
||||
# cfg for timing
|
||||
ptp_bs_fref_0=50000000
|
||||
ptp_bs_fref_1=50000000
|
||||
|
||||
port_flex_enable=1
|
||||
oversubscribe_mode=1
|
||||
core_clock_frequency=1525
|
||||
|
||||
#25G,10G and 1G support
|
||||
serdes_10g_at_25g_vco=1
|
||||
serdes_1000x_at_25g_vco=1
|
||||
|
||||
l2xmsg_mode=1
|
||||
l2xmsg_hostbuf_size=16384
|
||||
module_64ports=0
|
||||
|
||||
#Interrupts and Parity
|
||||
max_vp_lags=0
|
||||
schan_intr_enable=0
|
||||
tdma_timeout_usec=5000000
|
||||
stable_size=0x5500000
|
||||
|
||||
#Default L3 profile
|
||||
l2_mem_entries=40960
|
||||
l3_alpm_enable=2
|
||||
l3_alpm_ipv6_128b_bkt_rsvd=1
|
||||
l3_mem_entries=40960
|
||||
|
||||
#Tunnels
|
||||
use_all_splithorizon_groups=1
|
||||
sai_tunnel_support=1
|
||||
bcm_tunnel_term_compatible_mode=1
|
||||
|
||||
#RIOT Enable
|
||||
riot_enable=1
|
||||
riot_overlay_l3_intf_mem_size=8192
|
||||
riot_overlay_l3_egress_mem_size=32768
|
||||
l3_ecmp_levels=2
|
||||
riot_overlay_ecmp_resilient_hash_size=16384
|
||||
pfc_deadlock_seq_control=1
|
||||
|
||||
mem_cache_enable=0
|
||||
ifp_inports_support_enable=1
|
||||
ipv6_lpm_128b_enable=0x1
|
||||
l3_max_ecmp_mode=1
|
||||
lpm_scaling_enable=0
|
||||
bcm_num_cos=10
|
||||
default_cpu_tx_queue=9
|
||||
mmu_lossless=0
|
||||
host_as_route_disable=1
|
||||
sai_fast_convergence_support=1
|
||||
flow_init_mode=1
|
||||
sai_interface_type_auto_detect=0
|
||||
mpls_mem_entries=16384
|
||||
vlan_xlate_1_mem_entries=65536
|
||||
vlan_xlate_2_mem_entries=16384
|
||||
sai_nbr_bcast_ifp_optimized=1
|
||||
sai_brcm_sonic_acl_enhancements=1
|
||||
|
||||
# Reduced Trap Group QSET for BRCM Sonic
|
||||
sai_brcm_sonic_trap_group=1
|
||||
l2_entry_used_as_my_station=1
|
||||
multi_hash_recurse_depth_l3=2
|
||||
|
||||
BIN
device/ufispace/x86_64-ufispace_s7801_54xs-r0/custom_led.bin
Normal file
BIN
device/ufispace/x86_64-ufispace_s7801_54xs-r0/custom_led.bin
Normal file
Binary file not shown.
@ -0,0 +1 @@
|
||||
UFISPACE-S7801-54XS t1
|
||||
10
device/ufispace/x86_64-ufispace_s7801_54xs-r0/fancontrol
Normal file
10
device/ufispace/x86_64-ufispace_s7801_54xs-r0/fancontrol
Normal file
@ -0,0 +1,10 @@
|
||||
# Configuration file generated by pwmconfig, changes will be lost
|
||||
INTERVAL=10
|
||||
DEVPATH=
|
||||
DEVNAME=
|
||||
FCTEMPS=
|
||||
FCFANS=
|
||||
MINTEMP=
|
||||
MAXTEMP=
|
||||
MINSTART=
|
||||
MINSTOP=
|
||||
@ -0,0 +1,4 @@
|
||||
CONSOLE_PORT=0x3f8
|
||||
CONSOLE_DEV=0
|
||||
CONSOLE_SPEED=115200
|
||||
ONIE_PLATFORM_EXTRA_CMDLINE_LINUX="module_blacklist=gpio_ich nomodeset pcie_aspm=off"
|
||||
@ -0,0 +1,3 @@
|
||||
m0 load 0 0x3800 /usr/share/sonic/platform/custom_led.bin
|
||||
led auto on
|
||||
led start
|
||||
172
device/ufispace/x86_64-ufispace_s7801_54xs-r0/pcie.yaml
Normal file
172
device/ufispace/x86_64-ufispace_s7801_54xs-r0/pcie.yaml
Normal file
@ -0,0 +1,172 @@
|
||||
- bus: '00'
|
||||
dev: '00'
|
||||
fn: '0'
|
||||
id: '1980'
|
||||
name: 'Host bridge: Intel Corporation Atom Processor C3000 Series System Agent (rev
|
||||
11)'
|
||||
- bus: '00'
|
||||
dev: '04'
|
||||
fn: '0'
|
||||
id: 19a1
|
||||
name: 'Host bridge: Intel Corporation Atom Processor C3000 Series Error Registers
|
||||
(rev 11)'
|
||||
- bus: '00'
|
||||
dev: '05'
|
||||
fn: '0'
|
||||
id: 19a2
|
||||
name: 'Generic system peripheral [0807]: Intel Corporation Atom Processor C3000
|
||||
Series Root Complex Event Collector (rev 11)'
|
||||
- bus: '00'
|
||||
dev: '06'
|
||||
fn: '0'
|
||||
id: 19a3
|
||||
name: 'PCI bridge: Intel Corporation Atom Processor C3000 Series Integrated QAT
|
||||
Root Port (rev 11)'
|
||||
- bus: '00'
|
||||
dev: 09
|
||||
fn: '0'
|
||||
id: 19a4
|
||||
name: 'PCI bridge: Intel Corporation Atom Processor C3000 Series PCI Express Root
|
||||
Port #0 (rev 11)'
|
||||
- bus: '00'
|
||||
dev: 0a
|
||||
fn: '0'
|
||||
id: 19a5
|
||||
name: 'PCI bridge: Intel Corporation Atom Processor C3000 Series PCI Express Root
|
||||
Port #1 (rev 11)'
|
||||
- bus: '00'
|
||||
dev: 0b
|
||||
fn: '0'
|
||||
id: 19a6
|
||||
name: 'PCI bridge: Intel Corporation Atom Processor C3000 Series PCI Express Root
|
||||
Port #2 (rev 11)'
|
||||
- bus: '00'
|
||||
dev: 0e
|
||||
fn: '0'
|
||||
id: 19a8
|
||||
name: 'PCI bridge: Intel Corporation Atom Processor C3000 Series PCI Express Root
|
||||
Port #4 (rev 11)'
|
||||
- bus: '00'
|
||||
dev: 0f
|
||||
fn: '0'
|
||||
id: 19a9
|
||||
name: 'PCI bridge: Intel Corporation Atom Processor C3000 Series PCI Express Root
|
||||
Port #5 (rev 11)'
|
||||
- bus: '00'
|
||||
dev: '10'
|
||||
fn: '0'
|
||||
id: 19aa
|
||||
name: 'PCI bridge: Intel Corporation Atom Processor C3000 Series PCI Express Root
|
||||
Port #6 (rev 11)'
|
||||
- bus: '00'
|
||||
dev: '11'
|
||||
fn: '0'
|
||||
id: 19ab
|
||||
name: 'PCI bridge: Intel Corporation Atom Processor C3000 Series PCI Express Root
|
||||
Port #7 (rev 11)'
|
||||
- bus: '00'
|
||||
dev: '12'
|
||||
fn: '0'
|
||||
id: 19ac
|
||||
name: 'System peripheral: Intel Corporation Atom Processor C3000 Series SMBus Contoller
|
||||
- Host (rev 11)'
|
||||
- bus: '00'
|
||||
dev: '14'
|
||||
fn: '0'
|
||||
id: 19c2
|
||||
name: 'SATA controller: Intel Corporation Atom Processor C3000 Series SATA Controller
|
||||
1 (rev 11)'
|
||||
- bus: '00'
|
||||
dev: '15'
|
||||
fn: '0'
|
||||
id: 19d0
|
||||
name: 'USB controller: Intel Corporation Atom Processor C3000 Series USB 3.0 xHCI
|
||||
Controller (rev 11)'
|
||||
- bus: '00'
|
||||
dev: '16'
|
||||
fn: '0'
|
||||
id: 19d1
|
||||
name: 'PCI bridge: Intel Corporation Atom Processor C3000 Series Integrated LAN
|
||||
Root Port #0 (rev 11)'
|
||||
- bus: '00'
|
||||
dev: '17'
|
||||
fn: '0'
|
||||
id: 19d2
|
||||
name: 'PCI bridge: Intel Corporation Atom Processor C3000 Series Integrated LAN
|
||||
Root Port #1 (rev 11)'
|
||||
- bus: '00'
|
||||
dev: '18'
|
||||
fn: '0'
|
||||
id: 19d3
|
||||
name: 'Communication controller: Intel Corporation Atom Processor C3000 Series ME
|
||||
HECI 1 (rev 11)'
|
||||
- bus: '00'
|
||||
dev: 1c
|
||||
fn: '0'
|
||||
id: 19db
|
||||
name: 'SD Host controller: Intel Corporation Device 19db (rev 11)'
|
||||
- bus: '00'
|
||||
dev: 1f
|
||||
fn: '0'
|
||||
id: 19dc
|
||||
name: 'ISA bridge: Intel Corporation Atom Processor C3000 Series LPC or eSPI (rev
|
||||
11)'
|
||||
- bus: '00'
|
||||
dev: 1f
|
||||
fn: '2'
|
||||
id: 19de
|
||||
name: 'Memory controller: Intel Corporation Atom Processor C3000 Series Power Management
|
||||
Controller (rev 11)'
|
||||
- bus: '00'
|
||||
dev: 1f
|
||||
fn: '4'
|
||||
id: 19df
|
||||
name: 'SMBus: Intel Corporation Atom Processor C3000 Series SMBus controller (rev
|
||||
11)'
|
||||
- bus: '00'
|
||||
dev: 1f
|
||||
fn: '5'
|
||||
id: 19e0
|
||||
name: 'Serial bus controller [0c80]: Intel Corporation Atom Processor C3000 Series
|
||||
SPI Controller (rev 11)'
|
||||
- bus: '01'
|
||||
dev: '00'
|
||||
fn: '0'
|
||||
id: 19e2
|
||||
name: 'Co-processor: Intel Corporation Atom Processor C3000 Series QuickAssist Technology
|
||||
(rev 11)'
|
||||
- bus: '04'
|
||||
dev: '00'
|
||||
fn: '0'
|
||||
id: b771
|
||||
name: 'Ethernet controller: Broadcom Inc. and subsidiaries Device b771 (rev 01)'
|
||||
- bus: '06'
|
||||
dev: '00'
|
||||
fn: '0'
|
||||
id: '1533'
|
||||
name: 'Ethernet controller: Intel Corporation I210 Gigabit Network Connection (rev
|
||||
03)'
|
||||
- bus: 09
|
||||
dev: '00'
|
||||
fn: '0'
|
||||
id: 15c3
|
||||
name: 'Ethernet controller: Intel Corporation Ethernet Connection X553 Backplane
|
||||
(rev 11)'
|
||||
- bus: 09
|
||||
dev: '00'
|
||||
fn: '1'
|
||||
id: 15c3
|
||||
name: 'Ethernet controller: Intel Corporation Ethernet Connection X553 Backplane
|
||||
(rev 11)'
|
||||
- bus: 0a
|
||||
dev: '00'
|
||||
fn: '0'
|
||||
id: 15c3
|
||||
name: 'Ethernet controller: Intel Corporation Ethernet Connection X553 Backplane
|
||||
(rev 11)'
|
||||
- bus: 0a
|
||||
dev: '00'
|
||||
fn: '1'
|
||||
id: 15c3
|
||||
name: 'Ethernet controller: Intel Corporation Ethernet Connection X553 Backplane
|
||||
(rev 11)'
|
||||
@ -0,0 +1,97 @@
|
||||
{
|
||||
|
||||
"XCVR":
|
||||
{
|
||||
"xcvr_present":
|
||||
{
|
||||
"i2c":
|
||||
{
|
||||
"valmap-SFP": {"1":true, "0":false },
|
||||
"valmap-SFP28": {"1":true, "0":false },
|
||||
"valmap-QSFP28": {"1":true, "0":false },
|
||||
"valmap-QSFP-DD": {"1":true, "0":false}
|
||||
}
|
||||
},
|
||||
|
||||
"plug_status":
|
||||
{
|
||||
"inserted": "1",
|
||||
"removed": "0"
|
||||
}
|
||||
},
|
||||
"PSU":
|
||||
{
|
||||
"psu_present":
|
||||
{
|
||||
"i2c":
|
||||
{
|
||||
"valmap": { "1":true, "0":false }
|
||||
},
|
||||
"bmc":
|
||||
{
|
||||
"valmap": { "0x0280|":true, "0x0180|":false }
|
||||
}
|
||||
},
|
||||
|
||||
"psu_power_good":
|
||||
{
|
||||
"i2c":
|
||||
{
|
||||
"valmap": { "1": true, "0":false }
|
||||
},
|
||||
"bmc":
|
||||
{
|
||||
"valmap": { "0x0280|":true, "0x0180|":false }
|
||||
}
|
||||
},
|
||||
|
||||
"psu_fan_dir":
|
||||
{
|
||||
"bmc":
|
||||
{
|
||||
"valmap": {"0": "UNKNOWN", "1":"INTAKE", "2":"EXHAUST"}
|
||||
}
|
||||
},
|
||||
|
||||
"psu_support_list":
|
||||
[
|
||||
{"Manufacturer": "FSPGROUP", "Name": "YNEB0450BM", "MaxSpd": "PSU_FAN_MAX_SPEED_AC"},
|
||||
{"Manufacturer": "FSPGROUP", "Name": "YNEB0450AM", "MaxSpd": "PSU_FAN_MAX_SPEED_DC"},
|
||||
{"Manufacturer": "DELTA", "Name": "DPS-450AB-27", "MaxSpd": "PSU_FAN_MAX_SPEED_AC"},
|
||||
{"Manufacturer": "DELTA", "Name": "DPS-450AB-28", "MaxSpd": "PSU_FAN_MAX_SPEED_DC"}
|
||||
],
|
||||
|
||||
"valmap": {
|
||||
"PSU_FAN_MAX_SPEED":"20000",
|
||||
"PSU_FAN_MAX_SPEED_AC":"20000",
|
||||
"PSU_FAN_MAX_SPEED_DC":"18000"
|
||||
}
|
||||
},
|
||||
"FAN":
|
||||
{
|
||||
"direction":
|
||||
{
|
||||
"bmc":
|
||||
{
|
||||
"valmap": {"0": "UNKNOWN", "1":"INTAKE", "2":"EXHAUST"}
|
||||
}
|
||||
},
|
||||
|
||||
"present":
|
||||
{
|
||||
"i2c":
|
||||
{
|
||||
"valmap": {"1":true, "0":false}
|
||||
},
|
||||
"bmc":
|
||||
{
|
||||
"valmap": { "0x0280|":true, "0x0180|":false, "Device Present":true, "Device Absent":false}
|
||||
}
|
||||
},
|
||||
"FAN_MAX_SPEED":"25000"
|
||||
},
|
||||
"REBOOT_CAUSE":
|
||||
{
|
||||
"reboot_cause_file": "/host/reboot-cause/reboot-cause.txt"
|
||||
}
|
||||
}
|
||||
7850
device/ufispace/x86_64-ufispace_s7801_54xs-r0/pddf/pddf-device.json
Normal file
7850
device/ufispace/x86_64-ufispace_s7801_54xs-r0/pddf/pddf-device.json
Normal file
File diff suppressed because it is too large
Load Diff
691
device/ufispace/x86_64-ufispace_s7801_54xs-r0/platform.json
Normal file
691
device/ufispace/x86_64-ufispace_s7801_54xs-r0/platform.json
Normal file
@ -0,0 +1,691 @@
|
||||
{
|
||||
"chassis": {
|
||||
"name": "S7801-54XS",
|
||||
"components": [
|
||||
{
|
||||
"name": "CPLD1"
|
||||
},
|
||||
{
|
||||
"name": "CPLD2"
|
||||
},
|
||||
{
|
||||
"name": "BIOS"
|
||||
},
|
||||
{
|
||||
"name": "BMC"
|
||||
}
|
||||
],
|
||||
"fans": [
|
||||
{
|
||||
"name": "Fan_1"
|
||||
},
|
||||
{
|
||||
"name": "Fan_2"
|
||||
},
|
||||
{
|
||||
"name": "Fan_3"
|
||||
},
|
||||
{
|
||||
"name": "Fan_4"
|
||||
},
|
||||
{
|
||||
"name": "Fan_5"
|
||||
}
|
||||
],
|
||||
"fan_drawers":[
|
||||
{
|
||||
"name": "Fantray1",
|
||||
"num_fans" : 1,
|
||||
"fans": [
|
||||
{
|
||||
"name": "Fan_1"
|
||||
}
|
||||
]
|
||||
},
|
||||
{
|
||||
"name": "Fantray2",
|
||||
"num_fans" : 1,
|
||||
"fans": [
|
||||
{
|
||||
"name": "Fan_2"
|
||||
}
|
||||
]
|
||||
},
|
||||
{
|
||||
"name": "Fantray3",
|
||||
"num_fans" : 1,
|
||||
"fans": [
|
||||
{
|
||||
"name": "Fan_3"
|
||||
}
|
||||
]
|
||||
},
|
||||
{
|
||||
"name": "Fantray4",
|
||||
"num_fans" : 1,
|
||||
"fans": [
|
||||
{
|
||||
"name": "Fan_4"
|
||||
}
|
||||
]
|
||||
},
|
||||
{
|
||||
"name": "Fantray5",
|
||||
"num_fans" : 1,
|
||||
"fans": [
|
||||
{
|
||||
"name": "Fan_5"
|
||||
}
|
||||
]
|
||||
}
|
||||
],
|
||||
"psus": [
|
||||
{
|
||||
"name": "PSU1",
|
||||
"fans": [
|
||||
{
|
||||
"name": "PSU1_FAN1"
|
||||
}
|
||||
],
|
||||
"thermals": [
|
||||
{
|
||||
"name": "PSU1_TEMP1"
|
||||
}
|
||||
]
|
||||
},
|
||||
{
|
||||
"name": "PSU2",
|
||||
"fans": [
|
||||
{
|
||||
"name": "PSU2_FAN1"
|
||||
}
|
||||
],
|
||||
"thermals": [
|
||||
{
|
||||
"name": "PSU2_TEMP1"
|
||||
}
|
||||
]
|
||||
}
|
||||
],
|
||||
"thermals": [
|
||||
{
|
||||
"name": "TEMP_MAC"
|
||||
},
|
||||
{
|
||||
"name": "TEMP_ENV_MACCASE"
|
||||
},
|
||||
{
|
||||
"name": "TEMP_ENV_PSUCASE"
|
||||
},
|
||||
{
|
||||
"name": "TEMP_ENV_FANCONN"
|
||||
},
|
||||
{
|
||||
"name": "TEMP_ENV_FANCARD"
|
||||
},
|
||||
{
|
||||
"name": "TEMP_ENV_BMC"
|
||||
},
|
||||
{
|
||||
"name": "PSU-0-Thermal"
|
||||
},
|
||||
{
|
||||
"name": "PSU-1-Thermal"
|
||||
}
|
||||
],
|
||||
"sfps": [
|
||||
{
|
||||
"name": "Ethernet0"
|
||||
},
|
||||
{
|
||||
"name": "Ethernet1"
|
||||
},
|
||||
{
|
||||
"name": "Ethernet2"
|
||||
},
|
||||
{
|
||||
"name": "Ethernet3"
|
||||
},
|
||||
{
|
||||
"name": "Ethernet4"
|
||||
},
|
||||
{
|
||||
"name": "Ethernet5"
|
||||
},
|
||||
{
|
||||
"name": "Ethernet6"
|
||||
},
|
||||
{
|
||||
"name": "Ethernet7"
|
||||
},
|
||||
{
|
||||
"name": "Ethernet8"
|
||||
},
|
||||
{
|
||||
"name": "Ethernet9"
|
||||
},
|
||||
{
|
||||
"name": "Ethernet10"
|
||||
},
|
||||
{
|
||||
"name": "Ethernet11"
|
||||
},
|
||||
{
|
||||
"name": "Ethernet12"
|
||||
},
|
||||
{
|
||||
"name": "Ethernet13"
|
||||
},
|
||||
{
|
||||
"name": "Ethernet14"
|
||||
},
|
||||
{
|
||||
"name": "Ethernet15"
|
||||
},
|
||||
{
|
||||
"name": "Ethernet16"
|
||||
},
|
||||
{
|
||||
"name": "Ethernet17"
|
||||
},
|
||||
{
|
||||
"name": "Ethernet18"
|
||||
},
|
||||
{
|
||||
"name": "Ethernet19"
|
||||
},
|
||||
{
|
||||
"name": "Ethernet20"
|
||||
},
|
||||
{
|
||||
"name": "Ethernet21"
|
||||
},
|
||||
{
|
||||
"name": "Ethernet22"
|
||||
},
|
||||
{
|
||||
"name": "Ethernet23"
|
||||
},
|
||||
{
|
||||
"name": "Ethernet24"
|
||||
},
|
||||
{
|
||||
"name": "Ethernet25"
|
||||
},
|
||||
{
|
||||
"name": "Ethernet26"
|
||||
},
|
||||
{
|
||||
"name": "Ethernet27"
|
||||
},
|
||||
{
|
||||
"name": "Ethernet28"
|
||||
},
|
||||
{
|
||||
"name": "Ethernet29"
|
||||
},
|
||||
{
|
||||
"name": "Ethernet30"
|
||||
},
|
||||
{
|
||||
"name": "Ethernet31"
|
||||
},
|
||||
{
|
||||
"name": "Ethernet32"
|
||||
},
|
||||
{
|
||||
"name": "Ethernet33"
|
||||
},
|
||||
{
|
||||
"name": "Ethernet34"
|
||||
},
|
||||
{
|
||||
"name": "Ethernet35"
|
||||
},
|
||||
{
|
||||
"name": "Ethernet36"
|
||||
},
|
||||
{
|
||||
"name": "Ethernet37"
|
||||
},
|
||||
{
|
||||
"name": "Ethernet38"
|
||||
},
|
||||
{
|
||||
"name": "Ethernet39"
|
||||
},
|
||||
{
|
||||
"name": "Ethernet40"
|
||||
},
|
||||
{
|
||||
"name": "Ethernet41"
|
||||
},
|
||||
{
|
||||
"name": "Ethernet42"
|
||||
},
|
||||
{
|
||||
"name": "Ethernet43"
|
||||
},
|
||||
{
|
||||
"name": "Ethernet44"
|
||||
},
|
||||
{
|
||||
"name": "Ethernet45"
|
||||
},
|
||||
{
|
||||
"name": "Ethernet46"
|
||||
},
|
||||
{
|
||||
"name": "Ethernet47"
|
||||
},
|
||||
{
|
||||
"name": "Ethernet48"
|
||||
},
|
||||
{
|
||||
"name": "Ethernet52"
|
||||
},
|
||||
{
|
||||
"name": "Ethernet56"
|
||||
},
|
||||
{
|
||||
"name": "Ethernet60"
|
||||
},
|
||||
{
|
||||
"name": "Ethernet64"
|
||||
},
|
||||
{
|
||||
"name": "Ethernet68"
|
||||
},
|
||||
{
|
||||
"name": "Ethernet72"
|
||||
}
|
||||
]
|
||||
},
|
||||
"interfaces": {
|
||||
"Ethernet0": {
|
||||
"index": "0",
|
||||
"lanes": "1",
|
||||
"breakout_modes": {
|
||||
"1x10G" : [ "Eth0(Port0)" ]
|
||||
}
|
||||
},
|
||||
"Ethernet1": {
|
||||
"index": "1",
|
||||
"lanes": "2",
|
||||
"breakout_modes": {
|
||||
"1x10G" : [ "Eth1(Port1)" ]
|
||||
}
|
||||
},
|
||||
"Ethernet2": {
|
||||
"index": "2",
|
||||
"lanes": "3",
|
||||
"breakout_modes": {
|
||||
"1x10G" : [ "Eth2(Port2)" ]
|
||||
}
|
||||
},
|
||||
"Ethernet3": {
|
||||
"index": "3",
|
||||
"lanes": "4",
|
||||
"breakout_modes": {
|
||||
"1x10G" : [ "Eth3(Port3)" ]
|
||||
}
|
||||
},
|
||||
"Ethernet4": {
|
||||
"index": "4",
|
||||
"lanes": "5",
|
||||
"breakout_modes": {
|
||||
"1x10G" : [ "Eth4(Port4)" ]
|
||||
}
|
||||
},
|
||||
"Ethernet5": {
|
||||
"index": "5",
|
||||
"lanes": "6",
|
||||
"breakout_modes": {
|
||||
"1x10G" : [ "Eth5(Port5)" ]
|
||||
}
|
||||
},
|
||||
"Ethernet6": {
|
||||
"index": "6",
|
||||
"lanes": "7",
|
||||
"breakout_modes": {
|
||||
"1x10G" : [ "Eth6(Port6)" ]
|
||||
}
|
||||
},
|
||||
"Ethernet7": {
|
||||
"index": "7",
|
||||
"lanes": "8",
|
||||
"breakout_modes": {
|
||||
"1x10G" : [ "Eth7(Port7)" ]
|
||||
}
|
||||
},
|
||||
"Ethernet8": {
|
||||
"index": "8",
|
||||
"lanes": "9",
|
||||
"breakout_modes": {
|
||||
"1x10G" : [ "Eth8(Port8)" ]
|
||||
}
|
||||
},
|
||||
"Ethernet9": {
|
||||
"index": "9",
|
||||
"lanes": "10",
|
||||
"breakout_modes": {
|
||||
"1x10G" : [ "Eth9(Port9)" ]
|
||||
}
|
||||
},
|
||||
"Ethernet10": {
|
||||
"index": "10",
|
||||
"lanes": "11",
|
||||
"breakout_modes": {
|
||||
"1x10G" : [ "Eth10(Port10)" ]
|
||||
}
|
||||
},
|
||||
"Ethernet11": {
|
||||
"index": "11",
|
||||
"lanes": "12",
|
||||
"breakout_modes": {
|
||||
"1x10G" : [ "Eth11(Port11)" ]
|
||||
}
|
||||
},
|
||||
"Ethernet12": {
|
||||
"index": "12",
|
||||
"lanes": "13",
|
||||
"breakout_modes": {
|
||||
"1x10G" : [ "Eth12(Port12)" ]
|
||||
}
|
||||
},
|
||||
"Ethernet13": {
|
||||
"index": "13",
|
||||
"lanes": "14",
|
||||
"breakout_modes": {
|
||||
"1x10G" : [ "Eth13(Port13)" ]
|
||||
}
|
||||
},
|
||||
"Ethernet14": {
|
||||
"index": "14",
|
||||
"lanes": "15",
|
||||
"breakout_modes": {
|
||||
"1x10G" : [ "Eth14(Port14)" ]
|
||||
}
|
||||
},
|
||||
"Ethernet15": {
|
||||
"index": "15",
|
||||
"lanes": "16",
|
||||
"breakout_modes": {
|
||||
"1x10G" : [ "Eth15(Port15)" ]
|
||||
}
|
||||
},
|
||||
"Ethernet16": {
|
||||
"index": "16",
|
||||
"lanes": "17",
|
||||
"breakout_modes": {
|
||||
"1x10G" : [ "Eth16(Port16)" ]
|
||||
}
|
||||
},
|
||||
"Ethernet17": {
|
||||
"index": "17",
|
||||
"lanes": "18",
|
||||
"breakout_modes": {
|
||||
"1x10G" : [ "Eth17(Port17)" ]
|
||||
}
|
||||
},
|
||||
"Ethernet18": {
|
||||
"index": "18",
|
||||
"lanes": "19",
|
||||
"breakout_modes": {
|
||||
"1x10G" : [ "Eth18(Port18)" ]
|
||||
}
|
||||
},
|
||||
"Ethernet19": {
|
||||
"index": "19",
|
||||
"lanes": "20",
|
||||
"breakout_modes": {
|
||||
"1x10G" : [ "Eth19(Port19)" ]
|
||||
}
|
||||
},
|
||||
"Ethernet20": {
|
||||
"index": "20",
|
||||
"lanes": "21",
|
||||
"breakout_modes": {
|
||||
"1x10G" : [ "Eth20(Port20)" ]
|
||||
}
|
||||
},
|
||||
"Ethernet21": {
|
||||
"index": "21",
|
||||
"lanes": "22",
|
||||
"breakout_modes": {
|
||||
"1x10G" : [ "Eth21(Port21)" ]
|
||||
}
|
||||
},
|
||||
"Ethernet22": {
|
||||
"index": "22",
|
||||
"lanes": "23",
|
||||
"breakout_modes": {
|
||||
"1x10G" : [ "Eth22(Port22)" ]
|
||||
}
|
||||
},
|
||||
"Ethernet23": {
|
||||
"index": "23",
|
||||
"lanes": "24",
|
||||
"breakout_modes": {
|
||||
"1x10G" : [ "Eth23(Port23)" ]
|
||||
}
|
||||
},
|
||||
"Ethernet24": {
|
||||
"index": "24",
|
||||
"lanes": "25",
|
||||
"breakout_modes": {
|
||||
"1x10G" : [ "Eth24(Port24)" ]
|
||||
}
|
||||
},
|
||||
"Ethernet25": {
|
||||
"index": "25",
|
||||
"lanes": "26",
|
||||
"breakout_modes": {
|
||||
"1x10G" : [ "Eth25(Port25)" ]
|
||||
}
|
||||
},
|
||||
"Ethernet26": {
|
||||
"index": "26",
|
||||
"lanes": "27",
|
||||
"breakout_modes": {
|
||||
"1x10G" : [ "Eth26(Port26)" ]
|
||||
}
|
||||
},
|
||||
"Ethernet27": {
|
||||
"index": "27",
|
||||
"lanes": "28",
|
||||
"breakout_modes": {
|
||||
"1x10G" : [ "Eth27(Port27)" ]
|
||||
}
|
||||
},
|
||||
"Ethernet28": {
|
||||
"index": "28",
|
||||
"lanes": "41",
|
||||
"breakout_modes": {
|
||||
"1x10G" : [ "Eth28(Port28)" ]
|
||||
}
|
||||
},
|
||||
"Ethernet29": {
|
||||
"index": "29",
|
||||
"lanes": "42",
|
||||
"breakout_modes": {
|
||||
"1x10G" : [ "Eth29(Port29)" ]
|
||||
}
|
||||
},
|
||||
"Ethernet30": {
|
||||
"index": "30",
|
||||
"lanes": "43",
|
||||
"breakout_modes": {
|
||||
"1x10G" : [ "Eth30(Port30)" ]
|
||||
}
|
||||
},
|
||||
"Ethernet31": {
|
||||
"index": "31",
|
||||
"lanes": "44",
|
||||
"breakout_modes": {
|
||||
"1x10G" : [ "Eth31(Port31)" ]
|
||||
}
|
||||
},
|
||||
"Ethernet32": {
|
||||
"index": "32",
|
||||
"lanes": "61",
|
||||
"breakout_modes": {
|
||||
"1x10G" : [ "Eth32(Port32)" ]
|
||||
}
|
||||
},
|
||||
"Ethernet33": {
|
||||
"index": "33",
|
||||
"lanes": "62",
|
||||
"breakout_modes": {
|
||||
"1x10G" : [ "Eth33(Port33)" ]
|
||||
}
|
||||
},
|
||||
"Ethernet34": {
|
||||
"index": "34",
|
||||
"lanes": "63",
|
||||
"breakout_modes": {
|
||||
"1x10G" : [ "Eth34(Port34)" ]
|
||||
}
|
||||
},
|
||||
"Ethernet35": {
|
||||
"index": "35",
|
||||
"lanes": "64",
|
||||
"breakout_modes": {
|
||||
"1x10G" : [ "Eth35(Port35)" ]
|
||||
}
|
||||
},
|
||||
"Ethernet36": {
|
||||
"index": "36",
|
||||
"lanes": "65",
|
||||
"breakout_modes": {
|
||||
"1x10G" : [ "Eth36(Port36)" ]
|
||||
}
|
||||
},
|
||||
"Ethernet37": {
|
||||
"index": "37",
|
||||
"lanes": "66",
|
||||
"breakout_modes": {
|
||||
"1x10G" : [ "Eth37(Port37)" ]
|
||||
}
|
||||
},
|
||||
"Ethernet38": {
|
||||
"index": "38",
|
||||
"lanes": "67",
|
||||
"breakout_modes": {
|
||||
"1x10G" : [ "Eth38(Port38)" ]
|
||||
}
|
||||
},
|
||||
"Ethernet39": {
|
||||
"index": "39",
|
||||
"lanes": "68",
|
||||
"breakout_modes": {
|
||||
"1x10G" : [ "Eth39(Port39)" ]
|
||||
}
|
||||
},
|
||||
"Ethernet40": {
|
||||
"index": "40",
|
||||
"lanes": "69",
|
||||
"breakout_modes": {
|
||||
"1x10G" : [ "Eth40(Port40)" ]
|
||||
}
|
||||
},
|
||||
"Ethernet41": {
|
||||
"index": "41",
|
||||
"lanes": "70",
|
||||
"breakout_modes": {
|
||||
"1x10G" : [ "Eth41(Port41)" ]
|
||||
}
|
||||
},
|
||||
"Ethernet42": {
|
||||
"index": "42",
|
||||
"lanes": "71",
|
||||
"breakout_modes": {
|
||||
"1x10G" : [ "Eth42(Port42)" ]
|
||||
}
|
||||
},
|
||||
"Ethernet43": {
|
||||
"index": "43",
|
||||
"lanes": "72",
|
||||
"breakout_modes": {
|
||||
"1x10G" : [ "Eth43(Port43)" ]
|
||||
}
|
||||
},
|
||||
"Ethernet44": {
|
||||
"index": "44",
|
||||
"lanes": "73",
|
||||
"breakout_modes": {
|
||||
"1x10G" : [ "Eth44(Port44)" ]
|
||||
}
|
||||
},
|
||||
"Ethernet45": {
|
||||
"index": "45",
|
||||
"lanes": "74",
|
||||
"breakout_modes": {
|
||||
"1x10G" : [ "Eth45(Port45)" ]
|
||||
}
|
||||
},
|
||||
"Ethernet46": {
|
||||
"index": "46",
|
||||
"lanes": "75",
|
||||
"breakout_modes": {
|
||||
"1x10G" : [ "Eth46(Port46)" ]
|
||||
}
|
||||
},
|
||||
"Ethernet47": {
|
||||
"index": "47",
|
||||
"lanes": "76",
|
||||
"breakout_modes": {
|
||||
"1x10G" : [ "Eth47(Port47)" ]
|
||||
}
|
||||
},
|
||||
"Ethernet48": {
|
||||
"index": "48,48,48,48",
|
||||
"lanes": "37,38,39,40",
|
||||
"breakout_modes": {
|
||||
"1x100G[40G]" : [ "Eth48(Port48)" ]
|
||||
}
|
||||
},
|
||||
"Ethernet52": {
|
||||
"index": "49,49,49,49",
|
||||
"lanes": "33,34,35,36",
|
||||
"breakout_modes": {
|
||||
"1x100G[40G]" : [ "Eth49(Port49)" ]
|
||||
}
|
||||
},
|
||||
"Ethernet56": {
|
||||
"index": "50,50,50,50",
|
||||
"lanes": "45,46,47,48",
|
||||
"breakout_modes": {
|
||||
"1x100G[40G]" : [ "Eth50(Port50)" ]
|
||||
}
|
||||
},
|
||||
"Ethernet60": {
|
||||
"index": "51,51,51,51",
|
||||
"lanes": "49,50,51,52",
|
||||
"breakout_modes": {
|
||||
"1x100G[40G]" : [ "Eth51(Port51)" ]
|
||||
}
|
||||
},
|
||||
"Ethernet64": {
|
||||
"index": "52,52,52,52",
|
||||
"lanes": "53,54,55,56",
|
||||
"breakout_modes": {
|
||||
"1x100G[40G]": ["Eth52(Port52)"],
|
||||
"2x50G": ["Eth52/1(Port52)", "Eth52/2(Port52)"],
|
||||
"4x25G": ["Eth52/1(Port52)", "Eth52/2(Port52)", "Eth52/3(Port52)", "Eth52/4(Port52)"],
|
||||
"4x10G": ["Eth52/1(Port52)", "Eth52/2(Port52)", "Eth52/3(Port52)", "Eth52/4(Port52)"]
|
||||
}
|
||||
},
|
||||
"Ethernet68": {
|
||||
"index": "53,53,53,53",
|
||||
"lanes": "57,58,59,60",
|
||||
"breakout_modes": {
|
||||
"1x100G[40G]": ["Eth53(Port53)"],
|
||||
"2x50G": ["Eth53/1(Port53)", "Eth53/2(Port53)"],
|
||||
"4x25G": ["Eth53/1(Port53)", "Eth53/2(Port53)", "Eth53/3(Port53)", "Eth53/4(Port53)"],
|
||||
"4x10G": ["Eth53/1(Port53)", "Eth53/2(Port53)", "Eth53/3(Port53)", "Eth53/4(Port53)"]
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
@ -0,0 +1 @@
|
||||
broadcom
|
||||
@ -0,0 +1,12 @@
|
||||
{
|
||||
"chassis": {
|
||||
"x86_64-ufispace_s7801_54xs-r0": {
|
||||
"component": {
|
||||
"CPLD1": { },
|
||||
"CPLD2": { },
|
||||
"BIOS": { },
|
||||
"BMC": {}
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
@ -0,0 +1 @@
|
||||
SYNCD_SHM_SIZE=256m
|
||||
@ -0,0 +1,9 @@
|
||||
{
|
||||
"skip_pcied": false,
|
||||
"skip_fancontrol": false,
|
||||
"skip_thermalctld": false,
|
||||
"skip_ledd": true,
|
||||
"skip_xcvrd": false,
|
||||
"skip_psud": false,
|
||||
"skip_syseepromd": false
|
||||
}
|
||||
@ -0,0 +1 @@
|
||||
# libsensors configuration file
|
||||
@ -0,0 +1,15 @@
|
||||
{
|
||||
"services_to_ignore": [],
|
||||
"devices_to_ignore": [
|
||||
"asic",
|
||||
"psu",
|
||||
"fan"
|
||||
],
|
||||
"user_defined_checkers": [],
|
||||
"polling_interval": 60,
|
||||
"led_color": {
|
||||
"fault": "yellow",
|
||||
"normal": "green",
|
||||
"booting": "green_blink"
|
||||
}
|
||||
}
|
||||
@ -0,0 +1,166 @@
|
||||
{
|
||||
"interfaces": {
|
||||
"Ethernet0": {
|
||||
"default_brkout_mode": "1x25G[10G]"
|
||||
},
|
||||
"Ethernet1": {
|
||||
"default_brkout_mode": "1x25G[10G]"
|
||||
},
|
||||
"Ethernet2": {
|
||||
"default_brkout_mode": "1x25G[10G]"
|
||||
},
|
||||
"Ethernet3": {
|
||||
"default_brkout_mode": "1x25G[10G]"
|
||||
},
|
||||
"Ethernet4": {
|
||||
"default_brkout_mode": "1x25G[10G]"
|
||||
},
|
||||
"Ethernet5": {
|
||||
"default_brkout_mode": "1x25G[10G]"
|
||||
},
|
||||
"Ethernet6": {
|
||||
"default_brkout_mode": "1x25G[10G]"
|
||||
},
|
||||
"Ethernet7": {
|
||||
"default_brkout_mode": "1x25G[10G]"
|
||||
},
|
||||
"Ethernet8": {
|
||||
"default_brkout_mode": "1x25G[10G]"
|
||||
},
|
||||
"Ethernet9": {
|
||||
"default_brkout_mode": "1x25G[10G]"
|
||||
},
|
||||
"Ethernet10": {
|
||||
"default_brkout_mode": "1x25G[10G]"
|
||||
},
|
||||
"Ethernet11": {
|
||||
"default_brkout_mode": "1x25G[10G]"
|
||||
},
|
||||
"Ethernet12": {
|
||||
"default_brkout_mode": "1x25G[10G]"
|
||||
},
|
||||
"Ethernet13": {
|
||||
"default_brkout_mode": "1x25G[10G]"
|
||||
},
|
||||
"Ethernet14": {
|
||||
"default_brkout_mode": "1x25G[10G]"
|
||||
},
|
||||
"Ethernet15": {
|
||||
"default_brkout_mode": "1x25G[10G]"
|
||||
},
|
||||
"Ethernet16": {
|
||||
"default_brkout_mode": "1x25G[10G]"
|
||||
},
|
||||
"Ethernet17": {
|
||||
"default_brkout_mode": "1x25G[10G]"
|
||||
},
|
||||
"Ethernet18": {
|
||||
"default_brkout_mode": "1x25G[10G]"
|
||||
},
|
||||
"Ethernet19": {
|
||||
"default_brkout_mode": "1x25G[10G]"
|
||||
},
|
||||
"Ethernet20": {
|
||||
"default_brkout_mode": "1x25G[10G]"
|
||||
},
|
||||
"Ethernet21": {
|
||||
"default_brkout_mode": "1x25G[10G]"
|
||||
},
|
||||
"Ethernet22": {
|
||||
"default_brkout_mode": "1x25G[10G]"
|
||||
},
|
||||
"Ethernet23": {
|
||||
"default_brkout_mode": "1x25G[10G]"
|
||||
},
|
||||
"Ethernet24": {
|
||||
"default_brkout_mode": "1x25G[10G]"
|
||||
},
|
||||
"Ethernet25": {
|
||||
"default_brkout_mode": "1x25G[10G]"
|
||||
},
|
||||
"Ethernet26": {
|
||||
"default_brkout_mode": "1x25G[10G]"
|
||||
},
|
||||
"Ethernet27": {
|
||||
"default_brkout_mode": "1x25G[10G]"
|
||||
},
|
||||
"Ethernet28": {
|
||||
"default_brkout_mode": "1x25G[10G]"
|
||||
},
|
||||
"Ethernet29": {
|
||||
"default_brkout_mode": "1x25G[10G]"
|
||||
},
|
||||
"Ethernet30": {
|
||||
"default_brkout_mode": "1x25G[10G]"
|
||||
},
|
||||
"Ethernet31": {
|
||||
"default_brkout_mode": "1x25G[10G]"
|
||||
},
|
||||
"Ethernet32": {
|
||||
"default_brkout_mode": "1x25G[10G]"
|
||||
},
|
||||
"Ethernet33": {
|
||||
"default_brkout_mode": "1x25G[10G]"
|
||||
},
|
||||
"Ethernet34": {
|
||||
"default_brkout_mode": "1x25G[10G]"
|
||||
},
|
||||
"Ethernet35": {
|
||||
"default_brkout_mode": "1x25G[10G]"
|
||||
},
|
||||
"Ethernet36": {
|
||||
"default_brkout_mode": "1x25G[10G]"
|
||||
},
|
||||
"Ethernet37": {
|
||||
"default_brkout_mode": "1x25G[10G]"
|
||||
},
|
||||
"Ethernet38": {
|
||||
"default_brkout_mode": "1x25G[10G]"
|
||||
},
|
||||
"Ethernet39": {
|
||||
"default_brkout_mode": "1x25G[10G]"
|
||||
},
|
||||
"Ethernet40": {
|
||||
"default_brkout_mode": "1x25G[10G]"
|
||||
},
|
||||
"Ethernet41": {
|
||||
"default_brkout_mode": "1x25G[10G]"
|
||||
},
|
||||
"Ethernet42": {
|
||||
"default_brkout_mode": "1x25G[10G]"
|
||||
},
|
||||
"Ethernet43": {
|
||||
"default_brkout_mode": "1x25G[10G]"
|
||||
},
|
||||
"Ethernet44": {
|
||||
"default_brkout_mode": "1x25G[10G]"
|
||||
},
|
||||
"Ethernet45": {
|
||||
"default_brkout_mode": "1x25G[10G]"
|
||||
},
|
||||
"Ethernet46": {
|
||||
"default_brkout_mode": "1x25G[10G]"
|
||||
},
|
||||
"Ethernet47": {
|
||||
"default_brkout_mode": "1x25G[10G]"
|
||||
},
|
||||
"Ethernet48": {
|
||||
"default_brkout_mode": "1x100G[40G]"
|
||||
},
|
||||
"Ethernet52": {
|
||||
"default_brkout_mode": "1x100G[40G]"
|
||||
},
|
||||
"Ethernet56": {
|
||||
"default_brkout_mode": "1x100G[40G]"
|
||||
},
|
||||
"Ethernet60": {
|
||||
"default_brkout_mode": "1x100G[40G]"
|
||||
},
|
||||
"Ethernet64": {
|
||||
"default_brkout_mode": "1x100G[40G]"
|
||||
},
|
||||
"Ethernet68": {
|
||||
"default_brkout_mode": "1x100G[40G]"
|
||||
}
|
||||
}
|
||||
}
|
||||
@ -0,0 +1 @@
|
||||
SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/td3-x5-s8901-54xc.config.bcm
|
||||
@ -0,0 +1,502 @@
|
||||
# cfg version: r2, 20230515
|
||||
|
||||
pbmp_xport_xe=0x7fffffffffffffffdfffffffffffffffe
|
||||
|
||||
|
||||
#FC 0
|
||||
phy_chain_tx_polarity_flip_physical{1}=0x0
|
||||
phy_chain_tx_polarity_flip_physical{2}=0x0
|
||||
phy_chain_tx_polarity_flip_physical{3}=0x0
|
||||
phy_chain_tx_polarity_flip_physical{4}=0x0
|
||||
|
||||
phy_chain_rx_polarity_flip_physical{1}=0x0
|
||||
phy_chain_rx_polarity_flip_physical{2}=0x0
|
||||
phy_chain_rx_polarity_flip_physical{3}=0x0
|
||||
phy_chain_rx_polarity_flip_physical{4}=0x0
|
||||
|
||||
phy_chain_tx_lane_map_physical{1.0}=0x0123
|
||||
phy_chain_rx_lane_map_physical{1.0}=0x0123
|
||||
|
||||
#FC 1
|
||||
phy_chain_tx_polarity_flip_physical{5}=0x0
|
||||
phy_chain_tx_polarity_flip_physical{6}=0x0
|
||||
phy_chain_tx_polarity_flip_physical{7}=0x0
|
||||
phy_chain_tx_polarity_flip_physical{8}=0x0
|
||||
|
||||
phy_chain_rx_polarity_flip_physical{5}=0x1
|
||||
phy_chain_rx_polarity_flip_physical{6}=0x1
|
||||
phy_chain_rx_polarity_flip_physical{7}=0x1
|
||||
phy_chain_rx_polarity_flip_physical{8}=0x1
|
||||
|
||||
phy_chain_tx_lane_map_physical{5.0}=0x0123
|
||||
phy_chain_rx_lane_map_physical{5.0}=0x0123
|
||||
|
||||
#FC 2
|
||||
phy_chain_tx_polarity_flip_physical{9}=0x0
|
||||
phy_chain_tx_polarity_flip_physical{10}=0x0
|
||||
phy_chain_tx_polarity_flip_physical{11}=0x0
|
||||
phy_chain_tx_polarity_flip_physical{12}=0x0
|
||||
|
||||
phy_chain_rx_polarity_flip_physical{9}=0x1
|
||||
phy_chain_rx_polarity_flip_physical{10}=0x1
|
||||
phy_chain_rx_polarity_flip_physical{11}=0x1
|
||||
phy_chain_rx_polarity_flip_physical{12}=0x1
|
||||
|
||||
phy_chain_tx_lane_map_physical{9.0}=0x0123
|
||||
phy_chain_rx_lane_map_physical{9.0}=0x0123
|
||||
|
||||
#FC 3
|
||||
phy_chain_tx_polarity_flip_physical{13}=0x0
|
||||
phy_chain_tx_polarity_flip_physical{14}=0x0
|
||||
phy_chain_tx_polarity_flip_physical{15}=0x0
|
||||
phy_chain_tx_polarity_flip_physical{16}=0x0
|
||||
|
||||
phy_chain_rx_polarity_flip_physical{13}=0x1
|
||||
phy_chain_rx_polarity_flip_physical{14}=0x1
|
||||
phy_chain_rx_polarity_flip_physical{15}=0x1
|
||||
phy_chain_rx_polarity_flip_physical{16}=0x1
|
||||
|
||||
phy_chain_tx_lane_map_physical{13.0}=0x0123
|
||||
phy_chain_rx_lane_map_physical{13.0}=0x0123
|
||||
|
||||
#FC 4
|
||||
phy_chain_tx_polarity_flip_physical{17}=0x0
|
||||
phy_chain_tx_polarity_flip_physical{18}=0x0
|
||||
phy_chain_tx_polarity_flip_physical{19}=0x0
|
||||
phy_chain_tx_polarity_flip_physical{20}=0x0
|
||||
|
||||
phy_chain_rx_polarity_flip_physical{17}=0x0
|
||||
phy_chain_rx_polarity_flip_physical{18}=0x0
|
||||
phy_chain_rx_polarity_flip_physical{19}=0x0
|
||||
phy_chain_rx_polarity_flip_physical{20}=0x0
|
||||
|
||||
phy_chain_tx_lane_map_physical{17.0}=0x0123
|
||||
phy_chain_rx_lane_map_physical{17.0}=0x0123
|
||||
|
||||
#FC 5
|
||||
phy_chain_tx_polarity_flip_physical{21}=0x0
|
||||
phy_chain_tx_polarity_flip_physical{22}=0x0
|
||||
phy_chain_tx_polarity_flip_physical{23}=0x0
|
||||
phy_chain_tx_polarity_flip_physical{24}=0x0
|
||||
|
||||
phy_chain_rx_polarity_flip_physical{21}=0x1
|
||||
phy_chain_rx_polarity_flip_physical{22}=0x1
|
||||
phy_chain_rx_polarity_flip_physical{23}=0x1
|
||||
phy_chain_rx_polarity_flip_physical{24}=0x1
|
||||
|
||||
phy_chain_tx_lane_map_physical{21.0}=0x0123
|
||||
phy_chain_rx_lane_map_physical{21.0}=0x0123
|
||||
|
||||
#FC 6
|
||||
phy_chain_tx_polarity_flip_physical{25}=0x0
|
||||
phy_chain_tx_polarity_flip_physical{26}=0x0
|
||||
phy_chain_tx_polarity_flip_physical{27}=0x0
|
||||
phy_chain_tx_polarity_flip_physical{28}=0x0
|
||||
|
||||
phy_chain_rx_polarity_flip_physical{25}=0x1
|
||||
phy_chain_rx_polarity_flip_physical{26}=0x1
|
||||
phy_chain_rx_polarity_flip_physical{27}=0x1
|
||||
phy_chain_rx_polarity_flip_physical{28}=0x1
|
||||
|
||||
phy_chain_tx_lane_map_physical{25.0}=0x0123
|
||||
phy_chain_rx_lane_map_physical{25.0}=0x0123
|
||||
|
||||
#FC 7 not use
|
||||
phy_chain_tx_polarity_flip_physical{29}=0x0
|
||||
phy_chain_tx_polarity_flip_physical{30}=0x0
|
||||
phy_chain_tx_polarity_flip_physical{31}=0x0
|
||||
phy_chain_tx_polarity_flip_physical{32}=0x0
|
||||
|
||||
phy_chain_rx_polarity_flip_physical{29}=0x0
|
||||
phy_chain_rx_polarity_flip_physical{30}=0x0
|
||||
phy_chain_rx_polarity_flip_physical{31}=0x0
|
||||
phy_chain_rx_polarity_flip_physical{32}=0x0
|
||||
|
||||
phy_chain_tx_lane_map_physical{29.0}=0x0123
|
||||
phy_chain_rx_lane_map_physical{29.0}=0x0123
|
||||
|
||||
#FC 8
|
||||
phy_chain_tx_polarity_flip_physical{33}=0x1
|
||||
phy_chain_tx_polarity_flip_physical{34}=0x0
|
||||
phy_chain_tx_polarity_flip_physical{35}=0x1
|
||||
phy_chain_tx_polarity_flip_physical{36}=0x1
|
||||
|
||||
phy_chain_rx_polarity_flip_physical{33}=0x0
|
||||
phy_chain_rx_polarity_flip_physical{34}=0x0
|
||||
phy_chain_rx_polarity_flip_physical{35}=0x1
|
||||
phy_chain_rx_polarity_flip_physical{36}=0x0
|
||||
|
||||
phy_chain_tx_lane_map_physical{33.0}=0x3120
|
||||
phy_chain_rx_lane_map_physical{33.0}=0x0213
|
||||
|
||||
#FC 9
|
||||
phy_chain_tx_polarity_flip_physical{37}=0x0
|
||||
phy_chain_tx_polarity_flip_physical{38}=0x0
|
||||
phy_chain_tx_polarity_flip_physical{39}=0x1
|
||||
phy_chain_tx_polarity_flip_physical{40}=0x1
|
||||
|
||||
phy_chain_rx_polarity_flip_physical{37}=0x1
|
||||
phy_chain_rx_polarity_flip_physical{38}=0x1
|
||||
phy_chain_rx_polarity_flip_physical{39}=0x0
|
||||
phy_chain_rx_polarity_flip_physical{40}=0x0
|
||||
|
||||
phy_chain_tx_lane_map_physical{37.0}=0x2031
|
||||
phy_chain_rx_lane_map_physical{37.0}=0x1302
|
||||
|
||||
#FC 10
|
||||
phy_chain_tx_polarity_flip_physical{41}=0x0
|
||||
phy_chain_tx_polarity_flip_physical{42}=0x0
|
||||
phy_chain_tx_polarity_flip_physical{43}=0x0
|
||||
phy_chain_tx_polarity_flip_physical{44}=0x0
|
||||
|
||||
phy_chain_rx_polarity_flip_physical{41}=0x1
|
||||
phy_chain_rx_polarity_flip_physical{42}=0x1
|
||||
phy_chain_rx_polarity_flip_physical{43}=0x1
|
||||
phy_chain_rx_polarity_flip_physical{44}=0x1
|
||||
|
||||
phy_chain_tx_lane_map_physical{41.0}=0x3210
|
||||
phy_chain_rx_lane_map_physical{41.0}=0x0123
|
||||
|
||||
#FC 11
|
||||
phy_chain_tx_polarity_flip_physical{45}=0x0
|
||||
phy_chain_tx_polarity_flip_physical{46}=0x0
|
||||
phy_chain_tx_polarity_flip_physical{47}=0x1
|
||||
phy_chain_tx_polarity_flip_physical{48}=0x1
|
||||
|
||||
phy_chain_rx_polarity_flip_physical{45}=0x0
|
||||
phy_chain_rx_polarity_flip_physical{46}=0x0
|
||||
phy_chain_rx_polarity_flip_physical{47}=0x0
|
||||
phy_chain_rx_polarity_flip_physical{48}=0x1
|
||||
|
||||
phy_chain_tx_lane_map_physical{45.0}=0x3120
|
||||
phy_chain_rx_lane_map_physical{45.0}=0x2130
|
||||
|
||||
#FC 12
|
||||
phy_chain_tx_polarity_flip_physical{49}=0x1
|
||||
phy_chain_tx_polarity_flip_physical{50}=0x0
|
||||
phy_chain_tx_polarity_flip_physical{51}=0x0
|
||||
phy_chain_tx_polarity_flip_physical{52}=0x1
|
||||
|
||||
phy_chain_rx_polarity_flip_physical{49}=0x0
|
||||
phy_chain_rx_polarity_flip_physical{50}=0x1
|
||||
phy_chain_rx_polarity_flip_physical{51}=0x1
|
||||
phy_chain_rx_polarity_flip_physical{52}=0x0
|
||||
|
||||
phy_chain_tx_lane_map_physical{49.0}=0x3201
|
||||
phy_chain_rx_lane_map_physical{49.0}=0x1023
|
||||
|
||||
#FC 13
|
||||
phy_chain_tx_polarity_flip_physical{53}=0x0
|
||||
phy_chain_tx_polarity_flip_physical{54}=0x0
|
||||
phy_chain_tx_polarity_flip_physical{55}=0x1
|
||||
phy_chain_tx_polarity_flip_physical{56}=0x1
|
||||
|
||||
phy_chain_rx_polarity_flip_physical{53}=0x0
|
||||
phy_chain_rx_polarity_flip_physical{54}=0x0
|
||||
phy_chain_rx_polarity_flip_physical{55}=0x0
|
||||
phy_chain_rx_polarity_flip_physical{56}=0x1
|
||||
|
||||
phy_chain_tx_lane_map_physical{53.0}=0x3120
|
||||
phy_chain_rx_lane_map_physical{53.0}=0x2130
|
||||
|
||||
#FC 14
|
||||
phy_chain_tx_polarity_flip_physical{57}=0x1
|
||||
phy_chain_tx_polarity_flip_physical{58}=0x0
|
||||
phy_chain_tx_polarity_flip_physical{59}=0x0
|
||||
phy_chain_tx_polarity_flip_physical{60}=0x1
|
||||
|
||||
phy_chain_rx_polarity_flip_physical{57}=0x0
|
||||
phy_chain_rx_polarity_flip_physical{58}=0x1
|
||||
phy_chain_rx_polarity_flip_physical{59}=0x1
|
||||
phy_chain_rx_polarity_flip_physical{60}=0x0
|
||||
|
||||
phy_chain_tx_lane_map_physical{57.0}=0x3201
|
||||
phy_chain_rx_lane_map_physical{57.0}=0x1023
|
||||
|
||||
#FC 15
|
||||
phy_chain_tx_polarity_flip_physical{61}=0x0
|
||||
phy_chain_tx_polarity_flip_physical{62}=0x0
|
||||
phy_chain_tx_polarity_flip_physical{63}=0x0
|
||||
phy_chain_tx_polarity_flip_physical{64}=0x0
|
||||
|
||||
phy_chain_rx_polarity_flip_physical{61}=0x0
|
||||
phy_chain_rx_polarity_flip_physical{62}=0x0
|
||||
phy_chain_rx_polarity_flip_physical{63}=0x0
|
||||
phy_chain_rx_polarity_flip_physical{64}=0x0
|
||||
|
||||
phy_chain_tx_lane_map_physical{61.0}=0x3210
|
||||
phy_chain_rx_lane_map_physical{61.0}=0x3210
|
||||
|
||||
#FC 16
|
||||
phy_chain_tx_polarity_flip_physical{65}=0x0
|
||||
phy_chain_tx_polarity_flip_physical{66}=0x0
|
||||
phy_chain_tx_polarity_flip_physical{67}=0x0
|
||||
phy_chain_tx_polarity_flip_physical{68}=0x0
|
||||
|
||||
phy_chain_rx_polarity_flip_physical{65}=0x1
|
||||
phy_chain_rx_polarity_flip_physical{66}=0x1
|
||||
phy_chain_rx_polarity_flip_physical{67}=0x1
|
||||
phy_chain_rx_polarity_flip_physical{68}=0x1
|
||||
|
||||
phy_chain_tx_lane_map_physical{65.0}=0x3210
|
||||
phy_chain_rx_lane_map_physical{65.0}=0x3210
|
||||
|
||||
#FC 17
|
||||
phy_chain_tx_polarity_flip_physical{69}=0x0
|
||||
phy_chain_tx_polarity_flip_physical{70}=0x0
|
||||
phy_chain_tx_polarity_flip_physical{71}=0x0
|
||||
phy_chain_tx_polarity_flip_physical{72}=0x0
|
||||
|
||||
phy_chain_rx_polarity_flip_physical{69}=0x1
|
||||
phy_chain_rx_polarity_flip_physical{70}=0x1
|
||||
phy_chain_rx_polarity_flip_physical{71}=0x1
|
||||
phy_chain_rx_polarity_flip_physical{72}=0x1
|
||||
|
||||
phy_chain_tx_lane_map_physical{69.0}=0x3210
|
||||
phy_chain_rx_lane_map_physical{69.0}=0x3210
|
||||
|
||||
#FC 18
|
||||
phy_chain_tx_polarity_flip_physical{73}=0x0
|
||||
phy_chain_tx_polarity_flip_physical{74}=0x0
|
||||
phy_chain_tx_polarity_flip_physical{75}=0x0
|
||||
phy_chain_tx_polarity_flip_physical{76}=0x0
|
||||
|
||||
phy_chain_rx_polarity_flip_physical{73}=0x1
|
||||
phy_chain_rx_polarity_flip_physical{74}=0x1
|
||||
phy_chain_rx_polarity_flip_physical{75}=0x1
|
||||
phy_chain_rx_polarity_flip_physical{76}=0x1
|
||||
|
||||
phy_chain_tx_lane_map_physical{73.0}=0x3210
|
||||
phy_chain_rx_lane_map_physical{73.0}=0x3210
|
||||
|
||||
#FC 19 not use
|
||||
phy_chain_tx_polarity_flip_physical{77}=0x0
|
||||
phy_chain_tx_polarity_flip_physical{78}=0x0
|
||||
phy_chain_tx_polarity_flip_physical{79}=0x0
|
||||
phy_chain_tx_polarity_flip_physical{80}=0x0
|
||||
|
||||
phy_chain_rx_polarity_flip_physical{77}=0x0
|
||||
phy_chain_rx_polarity_flip_physical{78}=0x0
|
||||
phy_chain_rx_polarity_flip_physical{79}=0x0
|
||||
phy_chain_rx_polarity_flip_physical{80}=0x0
|
||||
|
||||
phy_chain_tx_lane_map_physical{77.0}=0x3210
|
||||
phy_chain_rx_lane_map_physical{77.0}=0x3210
|
||||
|
||||
|
||||
#FC0 sfp28 port 0-3
|
||||
portmap_1=1:25
|
||||
portmap_2=2:25
|
||||
portmap_3=3:25
|
||||
portmap_4=4:25
|
||||
|
||||
#FC1 sfp28 port 4-7
|
||||
portmap_5=5:25
|
||||
portmap_6=6:25
|
||||
portmap_7=7:25
|
||||
portmap_8=8:25
|
||||
|
||||
#FC2 sfp28 port 8-11
|
||||
portmap_9=9:25
|
||||
portmap_10=10:25
|
||||
portmap_11=11:25
|
||||
portmap_12=12:25
|
||||
|
||||
#FC3 sfp28 port 12-15
|
||||
portmap_13=13:25
|
||||
portmap_14=14:25
|
||||
portmap_15=15:25
|
||||
portmap_16=16:25
|
||||
|
||||
#FC4 sfp28 port 16-19
|
||||
portmap_17=17:25
|
||||
portmap_18=18:25
|
||||
portmap_19=19:25
|
||||
portmap_20=20:25
|
||||
|
||||
#FC5 sfp28 port 20-23
|
||||
portmap_21=21:25
|
||||
portmap_22=22:25
|
||||
portmap_23=23:25
|
||||
portmap_24=24:25
|
||||
|
||||
#FC6 sfp28 port 24-27
|
||||
portmap_25=25:25
|
||||
portmap_26=26:25
|
||||
portmap_27=27:25
|
||||
portmap_28=28:25
|
||||
|
||||
#FC7 not use
|
||||
|
||||
#FC10 sfp28 port 28-31
|
||||
portmap_33=41:25
|
||||
portmap_34=42:25
|
||||
portmap_35=43:25
|
||||
portmap_36=44:25
|
||||
|
||||
#FC15 sfp28 port 32-35
|
||||
portmap_37=61:25
|
||||
portmap_38=62:25
|
||||
portmap_39=63:25
|
||||
portmap_40=64:25
|
||||
|
||||
#FC16 sfp28 port 36-39
|
||||
portmap_41=65:25
|
||||
portmap_42=66:25
|
||||
portmap_43=67:25
|
||||
portmap_44=68:25
|
||||
|
||||
#FC17 sfp28 port 40-43
|
||||
portmap_45=69:25
|
||||
portmap_46=70:25
|
||||
portmap_47=71:25
|
||||
portmap_48=72:25
|
||||
|
||||
#FC18 sfp28 port 44-47
|
||||
portmap_49=73:25
|
||||
portmap_50=74:25
|
||||
portmap_51=75:25
|
||||
portmap_52=76:25
|
||||
|
||||
#FC9 qsfp port 48
|
||||
portmap_29=37:100
|
||||
|
||||
#FC8 qsfp port 49
|
||||
portmap_30=33:100
|
||||
|
||||
#FC11 qsfp port 50
|
||||
portmap_53=45:100
|
||||
|
||||
#FC12 qsfp port 51
|
||||
portmap_54=49:100
|
||||
|
||||
#FC13 qsfp port 52
|
||||
portmap_55=53:100
|
||||
|
||||
#FC14 qsfp port 53
|
||||
portmap_59=57:100
|
||||
|
||||
#FC19 not use
|
||||
|
||||
# dport
|
||||
dport_map_enable=1
|
||||
|
||||
dport_map_port_1=1
|
||||
dport_map_port_2=2
|
||||
dport_map_port_3=3
|
||||
dport_map_port_4=4
|
||||
dport_map_port_5=5
|
||||
dport_map_port_6=6
|
||||
dport_map_port_7=7
|
||||
dport_map_port_8=8
|
||||
dport_map_port_9=9
|
||||
dport_map_port_10=10
|
||||
dport_map_port_11=11
|
||||
dport_map_port_12=12
|
||||
dport_map_port_13=13
|
||||
dport_map_port_14=14
|
||||
dport_map_port_15=15
|
||||
dport_map_port_16=16
|
||||
dport_map_port_17=17
|
||||
dport_map_port_18=18
|
||||
dport_map_port_19=19
|
||||
dport_map_port_20=20
|
||||
dport_map_port_21=21
|
||||
dport_map_port_22=22
|
||||
dport_map_port_23=23
|
||||
dport_map_port_24=24
|
||||
dport_map_port_25=25
|
||||
dport_map_port_26=26
|
||||
dport_map_port_27=27
|
||||
dport_map_port_28=28
|
||||
dport_map_port_33=29
|
||||
dport_map_port_34=30
|
||||
dport_map_port_35=31
|
||||
dport_map_port_36=32
|
||||
dport_map_port_37=33
|
||||
dport_map_port_38=34
|
||||
dport_map_port_39=35
|
||||
dport_map_port_40=36
|
||||
dport_map_port_41=37
|
||||
dport_map_port_42=38
|
||||
dport_map_port_43=39
|
||||
dport_map_port_44=40
|
||||
dport_map_port_45=41
|
||||
dport_map_port_46=42
|
||||
dport_map_port_47=43
|
||||
dport_map_port_48=44
|
||||
dport_map_port_49=45
|
||||
dport_map_port_50=46
|
||||
dport_map_port_51=47
|
||||
dport_map_port_52=48
|
||||
dport_map_port_29=49
|
||||
dport_map_port_30=50
|
||||
dport_map_port_53=51
|
||||
dport_map_port_54=52
|
||||
dport_map_port_55=53
|
||||
dport_map_port_59=54
|
||||
|
||||
# cfg for timing
|
||||
ptp_bs_fref_0=50000000
|
||||
ptp_bs_fref_1=50000000
|
||||
|
||||
port_flex_enable=1
|
||||
oversubscribe_mode=1
|
||||
core_clock_frequency=1525
|
||||
|
||||
#25G,10G and 1G support
|
||||
serdes_10g_at_25g_vco=1
|
||||
serdes_1000x_at_25g_vco=1
|
||||
|
||||
l2xmsg_mode=1
|
||||
l2xmsg_hostbuf_size=16384
|
||||
module_64ports=0
|
||||
|
||||
#Interrupts and Parity
|
||||
max_vp_lags=0
|
||||
schan_intr_enable=0
|
||||
tdma_timeout_usec=5000000
|
||||
stable_size=0x5500000
|
||||
|
||||
#Default L3 profile
|
||||
l2_mem_entries=40960
|
||||
l3_alpm_enable=2
|
||||
l3_alpm_ipv6_128b_bkt_rsvd=1
|
||||
l3_mem_entries=40960
|
||||
|
||||
#Tunnels
|
||||
use_all_splithorizon_groups=1
|
||||
sai_tunnel_support=1
|
||||
bcm_tunnel_term_compatible_mode=1
|
||||
|
||||
#RIOT Enable
|
||||
riot_enable=1
|
||||
riot_overlay_l3_intf_mem_size=8192
|
||||
riot_overlay_l3_egress_mem_size=32768
|
||||
l3_ecmp_levels=2
|
||||
riot_overlay_ecmp_resilient_hash_size=16384
|
||||
pfc_deadlock_seq_control=1
|
||||
|
||||
mem_cache_enable=0
|
||||
ifp_inports_support_enable=1
|
||||
ipv6_lpm_128b_enable=0x1
|
||||
l3_max_ecmp_mode=1
|
||||
lpm_scaling_enable=0
|
||||
bcm_num_cos=10
|
||||
default_cpu_tx_queue=9
|
||||
mmu_lossless=0
|
||||
host_as_route_disable=1
|
||||
sai_fast_convergence_support=1
|
||||
flow_init_mode=1
|
||||
sai_interface_type_auto_detect=0
|
||||
mpls_mem_entries=16384
|
||||
vlan_xlate_1_mem_entries=65536
|
||||
vlan_xlate_2_mem_entries=16384
|
||||
sai_nbr_bcast_ifp_optimized=1
|
||||
sai_brcm_sonic_acl_enhancements=1
|
||||
|
||||
# Reduced Trap Group QSET for BRCM Sonic
|
||||
sai_brcm_sonic_trap_group=1
|
||||
l2_entry_used_as_my_station=1
|
||||
multi_hash_recurse_depth_l3=2
|
||||
|
||||
BIN
device/ufispace/x86_64-ufispace_s8901_54xc-r0/custom_led.bin
Normal file
BIN
device/ufispace/x86_64-ufispace_s8901_54xc-r0/custom_led.bin
Normal file
Binary file not shown.
@ -0,0 +1 @@
|
||||
UFISPACE-S8901-54XC t1
|
||||
10
device/ufispace/x86_64-ufispace_s8901_54xc-r0/fancontrol
Normal file
10
device/ufispace/x86_64-ufispace_s8901_54xc-r0/fancontrol
Normal file
@ -0,0 +1,10 @@
|
||||
# Configuration file generated by pwmconfig, changes will be lost
|
||||
INTERVAL=10
|
||||
DEVPATH=
|
||||
DEVNAME=
|
||||
FCTEMPS=
|
||||
FCFANS=
|
||||
MINTEMP=
|
||||
MAXTEMP=
|
||||
MINSTART=
|
||||
MINSTOP=
|
||||
@ -0,0 +1,4 @@
|
||||
CONSOLE_PORT=0x3f8
|
||||
CONSOLE_DEV=0
|
||||
CONSOLE_SPEED=115200
|
||||
ONIE_PLATFORM_EXTRA_CMDLINE_LINUX="module_blacklist=gpio_ich nomodeset pcie_aspm=off"
|
||||
@ -0,0 +1,3 @@
|
||||
m0 load 0 0x3800 /usr/share/sonic/platform/custom_led.bin
|
||||
led auto on
|
||||
led start
|
||||
172
device/ufispace/x86_64-ufispace_s8901_54xc-r0/pcie.yaml
Normal file
172
device/ufispace/x86_64-ufispace_s8901_54xc-r0/pcie.yaml
Normal file
@ -0,0 +1,172 @@
|
||||
- bus: '00'
|
||||
dev: '00'
|
||||
fn: '0'
|
||||
id: '1980'
|
||||
name: 'Host bridge: Intel Corporation Atom Processor C3000 Series System Agent (rev
|
||||
11)'
|
||||
- bus: '00'
|
||||
dev: '04'
|
||||
fn: '0'
|
||||
id: 19a1
|
||||
name: 'Host bridge: Intel Corporation Atom Processor C3000 Series Error Registers
|
||||
(rev 11)'
|
||||
- bus: '00'
|
||||
dev: '05'
|
||||
fn: '0'
|
||||
id: 19a2
|
||||
name: 'Generic system peripheral [0807]: Intel Corporation Atom Processor C3000
|
||||
Series Root Complex Event Collector (rev 11)'
|
||||
- bus: '00'
|
||||
dev: '06'
|
||||
fn: '0'
|
||||
id: 19a3
|
||||
name: 'PCI bridge: Intel Corporation Atom Processor C3000 Series Integrated QAT
|
||||
Root Port (rev 11)'
|
||||
- bus: '00'
|
||||
dev: 09
|
||||
fn: '0'
|
||||
id: 19a4
|
||||
name: 'PCI bridge: Intel Corporation Atom Processor C3000 Series PCI Express Root
|
||||
Port #0 (rev 11)'
|
||||
- bus: '00'
|
||||
dev: 0a
|
||||
fn: '0'
|
||||
id: 19a5
|
||||
name: 'PCI bridge: Intel Corporation Atom Processor C3000 Series PCI Express Root
|
||||
Port #1 (rev 11)'
|
||||
- bus: '00'
|
||||
dev: 0b
|
||||
fn: '0'
|
||||
id: 19a6
|
||||
name: 'PCI bridge: Intel Corporation Atom Processor C3000 Series PCI Express Root
|
||||
Port #2 (rev 11)'
|
||||
- bus: '00'
|
||||
dev: 0e
|
||||
fn: '0'
|
||||
id: 19a8
|
||||
name: 'PCI bridge: Intel Corporation Atom Processor C3000 Series PCI Express Root
|
||||
Port #4 (rev 11)'
|
||||
- bus: '00'
|
||||
dev: 0f
|
||||
fn: '0'
|
||||
id: 19a9
|
||||
name: 'PCI bridge: Intel Corporation Atom Processor C3000 Series PCI Express Root
|
||||
Port #5 (rev 11)'
|
||||
- bus: '00'
|
||||
dev: '10'
|
||||
fn: '0'
|
||||
id: 19aa
|
||||
name: 'PCI bridge: Intel Corporation Atom Processor C3000 Series PCI Express Root
|
||||
Port #6 (rev 11)'
|
||||
- bus: '00'
|
||||
dev: '11'
|
||||
fn: '0'
|
||||
id: 19ab
|
||||
name: 'PCI bridge: Intel Corporation Atom Processor C3000 Series PCI Express Root
|
||||
Port #7 (rev 11)'
|
||||
- bus: '00'
|
||||
dev: '12'
|
||||
fn: '0'
|
||||
id: 19ac
|
||||
name: 'System peripheral: Intel Corporation Atom Processor C3000 Series SMBus Contoller
|
||||
- Host (rev 11)'
|
||||
- bus: '00'
|
||||
dev: '14'
|
||||
fn: '0'
|
||||
id: 19c2
|
||||
name: 'SATA controller: Intel Corporation Atom Processor C3000 Series SATA Controller
|
||||
1 (rev 11)'
|
||||
- bus: '00'
|
||||
dev: '15'
|
||||
fn: '0'
|
||||
id: 19d0
|
||||
name: 'USB controller: Intel Corporation Atom Processor C3000 Series USB 3.0 xHCI
|
||||
Controller (rev 11)'
|
||||
- bus: '00'
|
||||
dev: '16'
|
||||
fn: '0'
|
||||
id: 19d1
|
||||
name: 'PCI bridge: Intel Corporation Atom Processor C3000 Series Integrated LAN
|
||||
Root Port #0 (rev 11)'
|
||||
- bus: '00'
|
||||
dev: '17'
|
||||
fn: '0'
|
||||
id: 19d2
|
||||
name: 'PCI bridge: Intel Corporation Atom Processor C3000 Series Integrated LAN
|
||||
Root Port #1 (rev 11)'
|
||||
- bus: '00'
|
||||
dev: '18'
|
||||
fn: '0'
|
||||
id: 19d3
|
||||
name: 'Communication controller: Intel Corporation Atom Processor C3000 Series ME
|
||||
HECI 1 (rev 11)'
|
||||
- bus: '00'
|
||||
dev: 1c
|
||||
fn: '0'
|
||||
id: 19db
|
||||
name: 'SD Host controller: Intel Corporation Device 19db (rev 11)'
|
||||
- bus: '00'
|
||||
dev: 1f
|
||||
fn: '0'
|
||||
id: 19dc
|
||||
name: 'ISA bridge: Intel Corporation Atom Processor C3000 Series LPC or eSPI (rev
|
||||
11)'
|
||||
- bus: '00'
|
||||
dev: 1f
|
||||
fn: '2'
|
||||
id: 19de
|
||||
name: 'Memory controller: Intel Corporation Atom Processor C3000 Series Power Management
|
||||
Controller (rev 11)'
|
||||
- bus: '00'
|
||||
dev: 1f
|
||||
fn: '4'
|
||||
id: 19df
|
||||
name: 'SMBus: Intel Corporation Atom Processor C3000 Series SMBus controller (rev
|
||||
11)'
|
||||
- bus: '00'
|
||||
dev: 1f
|
||||
fn: '5'
|
||||
id: 19e0
|
||||
name: 'Serial bus controller [0c80]: Intel Corporation Atom Processor C3000 Series
|
||||
SPI Controller (rev 11)'
|
||||
- bus: '01'
|
||||
dev: '00'
|
||||
fn: '0'
|
||||
id: 19e2
|
||||
name: 'Co-processor: Intel Corporation Atom Processor C3000 Series QuickAssist Technology
|
||||
(rev 11)'
|
||||
- bus: '04'
|
||||
dev: '00'
|
||||
fn: '0'
|
||||
id: b770
|
||||
name: 'Ethernet controller: Broadcom Inc. and subsidiaries Device b770 (rev 01)'
|
||||
- bus: '06'
|
||||
dev: '00'
|
||||
fn: '0'
|
||||
id: '1533'
|
||||
name: 'Ethernet controller: Intel Corporation I210 Gigabit Network Connection (rev
|
||||
03)'
|
||||
- bus: 09
|
||||
dev: '00'
|
||||
fn: '0'
|
||||
id: 15c3
|
||||
name: 'Ethernet controller: Intel Corporation Ethernet Connection X553 Backplane
|
||||
(rev 11)'
|
||||
- bus: 09
|
||||
dev: '00'
|
||||
fn: '1'
|
||||
id: 15c3
|
||||
name: 'Ethernet controller: Intel Corporation Ethernet Connection X553 Backplane
|
||||
(rev 11)'
|
||||
- bus: 0a
|
||||
dev: '00'
|
||||
fn: '0'
|
||||
id: 15c3
|
||||
name: 'Ethernet controller: Intel Corporation Ethernet Connection X553 Backplane
|
||||
(rev 11)'
|
||||
- bus: 0a
|
||||
dev: '00'
|
||||
fn: '1'
|
||||
id: 15c3
|
||||
name: 'Ethernet controller: Intel Corporation Ethernet Connection X553 Backplane
|
||||
(rev 11)'
|
||||
@ -0,0 +1,97 @@
|
||||
{
|
||||
|
||||
"XCVR":
|
||||
{
|
||||
"xcvr_present":
|
||||
{
|
||||
"i2c":
|
||||
{
|
||||
"valmap-SFP": {"1":true, "0":false },
|
||||
"valmap-SFP28": {"1":true, "0":false },
|
||||
"valmap-QSFP28": {"1":true, "0":false },
|
||||
"valmap-QSFP-DD": {"1":true, "0":false}
|
||||
}
|
||||
},
|
||||
|
||||
"plug_status":
|
||||
{
|
||||
"inserted": "1",
|
||||
"removed": "0"
|
||||
}
|
||||
},
|
||||
"PSU":
|
||||
{
|
||||
"psu_present":
|
||||
{
|
||||
"i2c":
|
||||
{
|
||||
"valmap": { "1":true, "0":false }
|
||||
},
|
||||
"bmc":
|
||||
{
|
||||
"valmap": { "0x0280|":true, "0x0180|":false }
|
||||
}
|
||||
},
|
||||
|
||||
"psu_power_good":
|
||||
{
|
||||
"i2c":
|
||||
{
|
||||
"valmap": { "1": true, "0":false }
|
||||
},
|
||||
"bmc":
|
||||
{
|
||||
"valmap": { "0x0280|":true, "0x0180|":false }
|
||||
}
|
||||
},
|
||||
|
||||
"psu_fan_dir":
|
||||
{
|
||||
"bmc":
|
||||
{
|
||||
"valmap": {"0": "UNKNOWN", "1":"INTAKE", "2":"EXHAUST"}
|
||||
}
|
||||
},
|
||||
|
||||
"psu_support_list":
|
||||
[
|
||||
{"Manufacturer": "FSPGROUP", "Name": "YNEB0450BM", "MaxSpd": "PSU_FAN_MAX_SPEED_AC"},
|
||||
{"Manufacturer": "FSPGROUP", "Name": "YNEB0450AM", "MaxSpd": "PSU_FAN_MAX_SPEED_DC"},
|
||||
{"Manufacturer": "DELTA", "Name": "DPS-450AB-27", "MaxSpd": "PSU_FAN_MAX_SPEED_AC"},
|
||||
{"Manufacturer": "DELTA", "Name": "DPS-450AB-28", "MaxSpd": "PSU_FAN_MAX_SPEED_DC"}
|
||||
],
|
||||
|
||||
"valmap": {
|
||||
"PSU_FAN_MAX_SPEED":"20000",
|
||||
"PSU_FAN_MAX_SPEED_AC":"20000",
|
||||
"PSU_FAN_MAX_SPEED_DC":"18000"
|
||||
}
|
||||
},
|
||||
"FAN":
|
||||
{
|
||||
"direction":
|
||||
{
|
||||
"bmc":
|
||||
{
|
||||
"valmap": {"0": "UNKNOWN", "1":"INTAKE", "2":"EXHAUST"}
|
||||
}
|
||||
},
|
||||
|
||||
"present":
|
||||
{
|
||||
"i2c":
|
||||
{
|
||||
"valmap": {"1":true, "0":false}
|
||||
},
|
||||
"bmc":
|
||||
{
|
||||
"valmap": { "0x0280|":true, "0x0180|":false, "Device Present":true, "Device Absent":false}
|
||||
}
|
||||
},
|
||||
"FAN_MAX_SPEED":"25000"
|
||||
},
|
||||
"REBOOT_CAUSE":
|
||||
{
|
||||
"reboot_cause_file": "/host/reboot-cause/reboot-cause.txt"
|
||||
}
|
||||
}
|
||||
7850
device/ufispace/x86_64-ufispace_s8901_54xc-r0/pddf/pddf-device.json
Normal file
7850
device/ufispace/x86_64-ufispace_s8901_54xc-r0/pddf/pddf-device.json
Normal file
File diff suppressed because it is too large
Load Diff
691
device/ufispace/x86_64-ufispace_s8901_54xc-r0/platform.json
Normal file
691
device/ufispace/x86_64-ufispace_s8901_54xc-r0/platform.json
Normal file
@ -0,0 +1,691 @@
|
||||
{
|
||||
"chassis": {
|
||||
"name": "S8901-54XC",
|
||||
"components": [
|
||||
{
|
||||
"name": "CPLD1"
|
||||
},
|
||||
{
|
||||
"name": "CPLD2"
|
||||
},
|
||||
{
|
||||
"name": "BIOS"
|
||||
},
|
||||
{
|
||||
"name": "BMC"
|
||||
}
|
||||
],
|
||||
"fans": [
|
||||
{
|
||||
"name": "Fan_1"
|
||||
},
|
||||
{
|
||||
"name": "Fan_2"
|
||||
},
|
||||
{
|
||||
"name": "Fan_3"
|
||||
},
|
||||
{
|
||||
"name": "Fan_4"
|
||||
},
|
||||
{
|
||||
"name": "Fan_5"
|
||||
}
|
||||
],
|
||||
"fan_drawers":[
|
||||
{
|
||||
"name": "Fantray1",
|
||||
"num_fans" : 1,
|
||||
"fans": [
|
||||
{
|
||||
"name": "Fan_1"
|
||||
}
|
||||
]
|
||||
},
|
||||
{
|
||||
"name": "Fantray2",
|
||||
"num_fans" : 1,
|
||||
"fans": [
|
||||
{
|
||||
"name": "Fan_2"
|
||||
}
|
||||
]
|
||||
},
|
||||
{
|
||||
"name": "Fantray3",
|
||||
"num_fans" : 1,
|
||||
"fans": [
|
||||
{
|
||||
"name": "Fan_3"
|
||||
}
|
||||
]
|
||||
},
|
||||
{
|
||||
"name": "Fantray4",
|
||||
"num_fans" : 1,
|
||||
"fans": [
|
||||
{
|
||||
"name": "Fan_4"
|
||||
}
|
||||
]
|
||||
},
|
||||
{
|
||||
"name": "Fantray5",
|
||||
"num_fans" : 1,
|
||||
"fans": [
|
||||
{
|
||||
"name": "Fan_5"
|
||||
}
|
||||
]
|
||||
}
|
||||
],
|
||||
"psus": [
|
||||
{
|
||||
"name": "PSU1",
|
||||
"fans": [
|
||||
{
|
||||
"name": "PSU1_FAN1"
|
||||
}
|
||||
],
|
||||
"thermals": [
|
||||
{
|
||||
"name": "PSU1_TEMP1"
|
||||
}
|
||||
]
|
||||
},
|
||||
{
|
||||
"name": "PSU2",
|
||||
"fans": [
|
||||
{
|
||||
"name": "PSU2_FAN1"
|
||||
}
|
||||
],
|
||||
"thermals": [
|
||||
{
|
||||
"name": "PSU2_TEMP1"
|
||||
}
|
||||
]
|
||||
}
|
||||
],
|
||||
"thermals": [
|
||||
{
|
||||
"name": "TEMP_MAC"
|
||||
},
|
||||
{
|
||||
"name": "TEMP_ENV_MACCASE"
|
||||
},
|
||||
{
|
||||
"name": "TEMP_ENV_PSUCASE"
|
||||
},
|
||||
{
|
||||
"name": "TEMP_ENV_FANCONN"
|
||||
},
|
||||
{
|
||||
"name": "TEMP_ENV_FANCARD"
|
||||
},
|
||||
{
|
||||
"name": "TEMP_ENV_BMC"
|
||||
},
|
||||
{
|
||||
"name": "PSU-0-Thermal"
|
||||
},
|
||||
{
|
||||
"name": "PSU-1-Thermal"
|
||||
}
|
||||
],
|
||||
"sfps": [
|
||||
{
|
||||
"name": "Ethernet0"
|
||||
},
|
||||
{
|
||||
"name": "Ethernet1"
|
||||
},
|
||||
{
|
||||
"name": "Ethernet2"
|
||||
},
|
||||
{
|
||||
"name": "Ethernet3"
|
||||
},
|
||||
{
|
||||
"name": "Ethernet4"
|
||||
},
|
||||
{
|
||||
"name": "Ethernet5"
|
||||
},
|
||||
{
|
||||
"name": "Ethernet6"
|
||||
},
|
||||
{
|
||||
"name": "Ethernet7"
|
||||
},
|
||||
{
|
||||
"name": "Ethernet8"
|
||||
},
|
||||
{
|
||||
"name": "Ethernet9"
|
||||
},
|
||||
{
|
||||
"name": "Ethernet10"
|
||||
},
|
||||
{
|
||||
"name": "Ethernet11"
|
||||
},
|
||||
{
|
||||
"name": "Ethernet12"
|
||||
},
|
||||
{
|
||||
"name": "Ethernet13"
|
||||
},
|
||||
{
|
||||
"name": "Ethernet14"
|
||||
},
|
||||
{
|
||||
"name": "Ethernet15"
|
||||
},
|
||||
{
|
||||
"name": "Ethernet16"
|
||||
},
|
||||
{
|
||||
"name": "Ethernet17"
|
||||
},
|
||||
{
|
||||
"name": "Ethernet18"
|
||||
},
|
||||
{
|
||||
"name": "Ethernet19"
|
||||
},
|
||||
{
|
||||
"name": "Ethernet20"
|
||||
},
|
||||
{
|
||||
"name": "Ethernet21"
|
||||
},
|
||||
{
|
||||
"name": "Ethernet22"
|
||||
},
|
||||
{
|
||||
"name": "Ethernet23"
|
||||
},
|
||||
{
|
||||
"name": "Ethernet24"
|
||||
},
|
||||
{
|
||||
"name": "Ethernet25"
|
||||
},
|
||||
{
|
||||
"name": "Ethernet26"
|
||||
},
|
||||
{
|
||||
"name": "Ethernet27"
|
||||
},
|
||||
{
|
||||
"name": "Ethernet28"
|
||||
},
|
||||
{
|
||||
"name": "Ethernet29"
|
||||
},
|
||||
{
|
||||
"name": "Ethernet30"
|
||||
},
|
||||
{
|
||||
"name": "Ethernet31"
|
||||
},
|
||||
{
|
||||
"name": "Ethernet32"
|
||||
},
|
||||
{
|
||||
"name": "Ethernet33"
|
||||
},
|
||||
{
|
||||
"name": "Ethernet34"
|
||||
},
|
||||
{
|
||||
"name": "Ethernet35"
|
||||
},
|
||||
{
|
||||
"name": "Ethernet36"
|
||||
},
|
||||
{
|
||||
"name": "Ethernet37"
|
||||
},
|
||||
{
|
||||
"name": "Ethernet38"
|
||||
},
|
||||
{
|
||||
"name": "Ethernet39"
|
||||
},
|
||||
{
|
||||
"name": "Ethernet40"
|
||||
},
|
||||
{
|
||||
"name": "Ethernet41"
|
||||
},
|
||||
{
|
||||
"name": "Ethernet42"
|
||||
},
|
||||
{
|
||||
"name": "Ethernet43"
|
||||
},
|
||||
{
|
||||
"name": "Ethernet44"
|
||||
},
|
||||
{
|
||||
"name": "Ethernet45"
|
||||
},
|
||||
{
|
||||
"name": "Ethernet46"
|
||||
},
|
||||
{
|
||||
"name": "Ethernet47"
|
||||
},
|
||||
{
|
||||
"name": "Ethernet48"
|
||||
},
|
||||
{
|
||||
"name": "Ethernet52"
|
||||
},
|
||||
{
|
||||
"name": "Ethernet56"
|
||||
},
|
||||
{
|
||||
"name": "Ethernet60"
|
||||
},
|
||||
{
|
||||
"name": "Ethernet64"
|
||||
},
|
||||
{
|
||||
"name": "Ethernet68"
|
||||
},
|
||||
{
|
||||
"name": "Ethernet72"
|
||||
}
|
||||
]
|
||||
},
|
||||
"interfaces": {
|
||||
"Ethernet0": {
|
||||
"index": "0",
|
||||
"lanes": "1",
|
||||
"breakout_modes": {
|
||||
"1x25G[10G]" : [ "Eth0(Port0)" ]
|
||||
}
|
||||
},
|
||||
"Ethernet1": {
|
||||
"index": "1",
|
||||
"lanes": "2",
|
||||
"breakout_modes": {
|
||||
"1x25G[10G]" : [ "Eth1(Port1)" ]
|
||||
}
|
||||
},
|
||||
"Ethernet2": {
|
||||
"index": "2",
|
||||
"lanes": "3",
|
||||
"breakout_modes": {
|
||||
"1x25G[10G]" : [ "Eth2(Port2)" ]
|
||||
}
|
||||
},
|
||||
"Ethernet3": {
|
||||
"index": "3",
|
||||
"lanes": "4",
|
||||
"breakout_modes": {
|
||||
"1x25G[10G]" : [ "Eth3(Port3)" ]
|
||||
}
|
||||
},
|
||||
"Ethernet4": {
|
||||
"index": "4",
|
||||
"lanes": "5",
|
||||
"breakout_modes": {
|
||||
"1x25G[10G]" : [ "Eth4(Port4)" ]
|
||||
}
|
||||
},
|
||||
"Ethernet5": {
|
||||
"index": "5",
|
||||
"lanes": "6",
|
||||
"breakout_modes": {
|
||||
"1x25G[10G]" : [ "Eth5(Port5)" ]
|
||||
}
|
||||
},
|
||||
"Ethernet6": {
|
||||
"index": "6",
|
||||
"lanes": "7",
|
||||
"breakout_modes": {
|
||||
"1x25G[10G]" : [ "Eth6(Port6)" ]
|
||||
}
|
||||
},
|
||||
"Ethernet7": {
|
||||
"index": "7",
|
||||
"lanes": "8",
|
||||
"breakout_modes": {
|
||||
"1x25G[10G]" : [ "Eth7(Port7)" ]
|
||||
}
|
||||
},
|
||||
"Ethernet8": {
|
||||
"index": "8",
|
||||
"lanes": "9",
|
||||
"breakout_modes": {
|
||||
"1x25G[10G]" : [ "Eth8(Port8)" ]
|
||||
}
|
||||
},
|
||||
"Ethernet9": {
|
||||
"index": "9",
|
||||
"lanes": "10",
|
||||
"breakout_modes": {
|
||||
"1x25G[10G]" : [ "Eth9(Port9)" ]
|
||||
}
|
||||
},
|
||||
"Ethernet10": {
|
||||
"index": "10",
|
||||
"lanes": "11",
|
||||
"breakout_modes": {
|
||||
"1x25G[10G]" : [ "Eth10(Port10)" ]
|
||||
}
|
||||
},
|
||||
"Ethernet11": {
|
||||
"index": "11",
|
||||
"lanes": "12",
|
||||
"breakout_modes": {
|
||||
"1x25G[10G]" : [ "Eth11(Port11)" ]
|
||||
}
|
||||
},
|
||||
"Ethernet12": {
|
||||
"index": "12",
|
||||
"lanes": "13",
|
||||
"breakout_modes": {
|
||||
"1x25G[10G]" : [ "Eth12(Port12)" ]
|
||||
}
|
||||
},
|
||||
"Ethernet13": {
|
||||
"index": "13",
|
||||
"lanes": "14",
|
||||
"breakout_modes": {
|
||||
"1x25G[10G]" : [ "Eth13(Port13)" ]
|
||||
}
|
||||
},
|
||||
"Ethernet14": {
|
||||
"index": "14",
|
||||
"lanes": "15",
|
||||
"breakout_modes": {
|
||||
"1x25G[10G]" : [ "Eth14(Port14)" ]
|
||||
}
|
||||
},
|
||||
"Ethernet15": {
|
||||
"index": "15",
|
||||
"lanes": "16",
|
||||
"breakout_modes": {
|
||||
"1x25G[10G]" : [ "Eth15(Port15)" ]
|
||||
}
|
||||
},
|
||||
"Ethernet16": {
|
||||
"index": "16",
|
||||
"lanes": "17",
|
||||
"breakout_modes": {
|
||||
"1x25G[10G]" : [ "Eth16(Port16)" ]
|
||||
}
|
||||
},
|
||||
"Ethernet17": {
|
||||
"index": "17",
|
||||
"lanes": "18",
|
||||
"breakout_modes": {
|
||||
"1x25G[10G]" : [ "Eth17(Port17)" ]
|
||||
}
|
||||
},
|
||||
"Ethernet18": {
|
||||
"index": "18",
|
||||
"lanes": "19",
|
||||
"breakout_modes": {
|
||||
"1x25G[10G]" : [ "Eth18(Port18)" ]
|
||||
}
|
||||
},
|
||||
"Ethernet19": {
|
||||
"index": "19",
|
||||
"lanes": "20",
|
||||
"breakout_modes": {
|
||||
"1x25G[10G]" : [ "Eth19(Port19)" ]
|
||||
}
|
||||
},
|
||||
"Ethernet20": {
|
||||
"index": "20",
|
||||
"lanes": "21",
|
||||
"breakout_modes": {
|
||||
"1x25G[10G]" : [ "Eth20(Port20)" ]
|
||||
}
|
||||
},
|
||||
"Ethernet21": {
|
||||
"index": "21",
|
||||
"lanes": "22",
|
||||
"breakout_modes": {
|
||||
"1x25G[10G]" : [ "Eth21(Port21)" ]
|
||||
}
|
||||
},
|
||||
"Ethernet22": {
|
||||
"index": "22",
|
||||
"lanes": "23",
|
||||
"breakout_modes": {
|
||||
"1x25G[10G]" : [ "Eth22(Port22)" ]
|
||||
}
|
||||
},
|
||||
"Ethernet23": {
|
||||
"index": "23",
|
||||
"lanes": "24",
|
||||
"breakout_modes": {
|
||||
"1x25G[10G]" : [ "Eth23(Port23)" ]
|
||||
}
|
||||
},
|
||||
"Ethernet24": {
|
||||
"index": "24",
|
||||
"lanes": "25",
|
||||
"breakout_modes": {
|
||||
"1x25G[10G]" : [ "Eth24(Port24)" ]
|
||||
}
|
||||
},
|
||||
"Ethernet25": {
|
||||
"index": "25",
|
||||
"lanes": "26",
|
||||
"breakout_modes": {
|
||||
"1x25G[10G]" : [ "Eth25(Port25)" ]
|
||||
}
|
||||
},
|
||||
"Ethernet26": {
|
||||
"index": "26",
|
||||
"lanes": "27",
|
||||
"breakout_modes": {
|
||||
"1x25G[10G]" : [ "Eth26(Port26)" ]
|
||||
}
|
||||
},
|
||||
"Ethernet27": {
|
||||
"index": "27",
|
||||
"lanes": "28",
|
||||
"breakout_modes": {
|
||||
"1x25G[10G]" : [ "Eth27(Port27)" ]
|
||||
}
|
||||
},
|
||||
"Ethernet28": {
|
||||
"index": "28",
|
||||
"lanes": "41",
|
||||
"breakout_modes": {
|
||||
"1x25G[10G]" : [ "Eth28(Port28)" ]
|
||||
}
|
||||
},
|
||||
"Ethernet29": {
|
||||
"index": "29",
|
||||
"lanes": "42",
|
||||
"breakout_modes": {
|
||||
"1x25G[10G]" : [ "Eth29(Port29)" ]
|
||||
}
|
||||
},
|
||||
"Ethernet30": {
|
||||
"index": "30",
|
||||
"lanes": "43",
|
||||
"breakout_modes": {
|
||||
"1x25G[10G]" : [ "Eth30(Port30)" ]
|
||||
}
|
||||
},
|
||||
"Ethernet31": {
|
||||
"index": "31",
|
||||
"lanes": "44",
|
||||
"breakout_modes": {
|
||||
"1x25G[10G]" : [ "Eth31(Port31)" ]
|
||||
}
|
||||
},
|
||||
"Ethernet32": {
|
||||
"index": "32",
|
||||
"lanes": "61",
|
||||
"breakout_modes": {
|
||||
"1x25G[10G]" : [ "Eth32(Port32)" ]
|
||||
}
|
||||
},
|
||||
"Ethernet33": {
|
||||
"index": "33",
|
||||
"lanes": "62",
|
||||
"breakout_modes": {
|
||||
"1x25G[10G]" : [ "Eth33(Port33)" ]
|
||||
}
|
||||
},
|
||||
"Ethernet34": {
|
||||
"index": "34",
|
||||
"lanes": "63",
|
||||
"breakout_modes": {
|
||||
"1x25G[10G]" : [ "Eth34(Port34)" ]
|
||||
}
|
||||
},
|
||||
"Ethernet35": {
|
||||
"index": "35",
|
||||
"lanes": "64",
|
||||
"breakout_modes": {
|
||||
"1x25G[10G]" : [ "Eth35(Port35)" ]
|
||||
}
|
||||
},
|
||||
"Ethernet36": {
|
||||
"index": "36",
|
||||
"lanes": "65",
|
||||
"breakout_modes": {
|
||||
"1x25G[10G]" : [ "Eth36(Port36)" ]
|
||||
}
|
||||
},
|
||||
"Ethernet37": {
|
||||
"index": "37",
|
||||
"lanes": "66",
|
||||
"breakout_modes": {
|
||||
"1x25G[10G]" : [ "Eth37(Port37)" ]
|
||||
}
|
||||
},
|
||||
"Ethernet38": {
|
||||
"index": "38",
|
||||
"lanes": "67",
|
||||
"breakout_modes": {
|
||||
"1x25G[10G]" : [ "Eth38(Port38)" ]
|
||||
}
|
||||
},
|
||||
"Ethernet39": {
|
||||
"index": "39",
|
||||
"lanes": "68",
|
||||
"breakout_modes": {
|
||||
"1x25G[10G]" : [ "Eth39(Port39)" ]
|
||||
}
|
||||
},
|
||||
"Ethernet40": {
|
||||
"index": "40",
|
||||
"lanes": "69",
|
||||
"breakout_modes": {
|
||||
"1x25G[10G]" : [ "Eth40(Port40)" ]
|
||||
}
|
||||
},
|
||||
"Ethernet41": {
|
||||
"index": "41",
|
||||
"lanes": "70",
|
||||
"breakout_modes": {
|
||||
"1x25G[10G]" : [ "Eth41(Port41)" ]
|
||||
}
|
||||
},
|
||||
"Ethernet42": {
|
||||
"index": "42",
|
||||
"lanes": "71",
|
||||
"breakout_modes": {
|
||||
"1x25G[10G]" : [ "Eth42(Port42)" ]
|
||||
}
|
||||
},
|
||||
"Ethernet43": {
|
||||
"index": "43",
|
||||
"lanes": "72",
|
||||
"breakout_modes": {
|
||||
"1x25G[10G]" : [ "Eth43(Port43)" ]
|
||||
}
|
||||
},
|
||||
"Ethernet44": {
|
||||
"index": "44",
|
||||
"lanes": "73",
|
||||
"breakout_modes": {
|
||||
"1x25G[10G]" : [ "Eth44(Port44)" ]
|
||||
}
|
||||
},
|
||||
"Ethernet45": {
|
||||
"index": "45",
|
||||
"lanes": "74",
|
||||
"breakout_modes": {
|
||||
"1x25G[10G]" : [ "Eth45(Port45)" ]
|
||||
}
|
||||
},
|
||||
"Ethernet46": {
|
||||
"index": "46",
|
||||
"lanes": "75",
|
||||
"breakout_modes": {
|
||||
"1x25G[10G]" : [ "Eth46(Port46)" ]
|
||||
}
|
||||
},
|
||||
"Ethernet47": {
|
||||
"index": "47",
|
||||
"lanes": "76",
|
||||
"breakout_modes": {
|
||||
"1x25G[10G]" : [ "Eth47(Port47)" ]
|
||||
}
|
||||
},
|
||||
"Ethernet48": {
|
||||
"index": "48,48,48,48",
|
||||
"lanes": "37,38,39,40",
|
||||
"breakout_modes": {
|
||||
"1x100G[40G]" : [ "Eth48(Port48)" ]
|
||||
}
|
||||
},
|
||||
"Ethernet52": {
|
||||
"index": "49,49,49,49",
|
||||
"lanes": "33,34,35,36",
|
||||
"breakout_modes": {
|
||||
"1x100G[40G]" : [ "Eth49(Port49)" ]
|
||||
}
|
||||
},
|
||||
"Ethernet56": {
|
||||
"index": "50,50,50,50",
|
||||
"lanes": "45,46,47,48",
|
||||
"breakout_modes": {
|
||||
"1x100G[40G]" : [ "Eth50(Port50)" ]
|
||||
}
|
||||
},
|
||||
"Ethernet60": {
|
||||
"index": "51,51,51,51",
|
||||
"lanes": "49,50,51,52",
|
||||
"breakout_modes": {
|
||||
"1x100G[40G]" : [ "Eth51(Port51)" ]
|
||||
}
|
||||
},
|
||||
"Ethernet64": {
|
||||
"index": "52,52,52,52",
|
||||
"lanes": "53,54,55,56",
|
||||
"breakout_modes": {
|
||||
"1x100G[40G]" : [ "Eth52(Port52)" ],
|
||||
"2x50G": ["Eth52/1(Port52)", "Eth52/2(Port52)"],
|
||||
"4x25G": ["Eth52/1(Port52)", "Eth52/2(Port52)", "Eth52/3(Port52)", "Eth52/4(Port52)"],
|
||||
"4x10G": ["Eth52/1(Port52)", "Eth52/2(Port52)", "Eth52/3(Port52)", "Eth52/4(Port52)"]
|
||||
}
|
||||
},
|
||||
"Ethernet68": {
|
||||
"index": "53,53,53,53",
|
||||
"lanes": "57,58,59,60",
|
||||
"breakout_modes": {
|
||||
"1x100G[40G]" : [ "Eth53(Port53)" ],
|
||||
"2x50G": ["Eth53/1(Port53)", "Eth53/2(Port53)"],
|
||||
"4x25G": ["Eth53/1(Port53)", "Eth53/2(Port53)", "Eth53/3(Port53)", "Eth53/4(Port53)"],
|
||||
"4x10G": ["Eth53/1(Port53)", "Eth53/2(Port53)", "Eth53/3(Port53)", "Eth53/4(Port53)"]
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
@ -0,0 +1 @@
|
||||
broadcom
|
||||
@ -0,0 +1,12 @@
|
||||
{
|
||||
"chassis": {
|
||||
"x86_64-ufispace_s8901_54xc-r0": {
|
||||
"component": {
|
||||
"CPLD1": { },
|
||||
"CPLD2": { },
|
||||
"BIOS": { },
|
||||
"BMC": {}
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
@ -0,0 +1 @@
|
||||
SYNCD_SHM_SIZE=256m
|
||||
@ -0,0 +1,9 @@
|
||||
{
|
||||
"skip_pcied": false,
|
||||
"skip_fancontrol": false,
|
||||
"skip_thermalctld": false,
|
||||
"skip_ledd": true,
|
||||
"skip_xcvrd": false,
|
||||
"skip_psud": false,
|
||||
"skip_syseepromd": false
|
||||
}
|
||||
@ -0,0 +1 @@
|
||||
# libsensors configuration file
|
||||
@ -0,0 +1,15 @@
|
||||
{
|
||||
"services_to_ignore": [],
|
||||
"devices_to_ignore": [
|
||||
"asic",
|
||||
"psu",
|
||||
"fan"
|
||||
],
|
||||
"user_defined_checkers": [],
|
||||
"polling_interval": 60,
|
||||
"led_color": {
|
||||
"fault": "yellow",
|
||||
"normal": "green",
|
||||
"booting": "green_blink"
|
||||
}
|
||||
}
|
||||
@ -0,0 +1,136 @@
|
||||
{
|
||||
"interfaces": {
|
||||
"Ethernet0": {
|
||||
"default_brkout_mode": "1x100G[40G]"
|
||||
},
|
||||
|
||||
"Ethernet4": {
|
||||
"default_brkout_mode": "1x100G[40G]"
|
||||
},
|
||||
|
||||
"Ethernet8": {
|
||||
"default_brkout_mode": "1x100G[40G]"
|
||||
},
|
||||
|
||||
"Ethernet12": {
|
||||
"default_brkout_mode": "1x100G[40G]"
|
||||
},
|
||||
|
||||
"Ethernet16": {
|
||||
"default_brkout_mode": "1x100G[40G]"
|
||||
},
|
||||
|
||||
"Ethernet20": {
|
||||
"default_brkout_mode": "1x100G[40G]"
|
||||
},
|
||||
|
||||
"Ethernet24": {
|
||||
"default_brkout_mode": "1x100G[40G]"
|
||||
},
|
||||
|
||||
"Ethernet28": {
|
||||
"default_brkout_mode": "1x100G[40G]"
|
||||
},
|
||||
|
||||
"Ethernet32": {
|
||||
"default_brkout_mode": "1x100G[40G]"
|
||||
},
|
||||
|
||||
"Ethernet36": {
|
||||
"default_brkout_mode": "1x100G[40G]"
|
||||
},
|
||||
|
||||
"Ethernet40": {
|
||||
"default_brkout_mode": "1x100G[40G]"
|
||||
},
|
||||
|
||||
"Ethernet44": {
|
||||
"default_brkout_mode": "1x100G[40G]"
|
||||
},
|
||||
|
||||
"Ethernet48": {
|
||||
"default_brkout_mode": "1x100G[40G]"
|
||||
},
|
||||
|
||||
"Ethernet52": {
|
||||
"default_brkout_mode": "1x100G[40G]"
|
||||
},
|
||||
|
||||
"Ethernet56": {
|
||||
"default_brkout_mode": "1x100G[40G]"
|
||||
},
|
||||
|
||||
"Ethernet60": {
|
||||
"default_brkout_mode": "1x100G[40G]"
|
||||
},
|
||||
|
||||
"Ethernet64": {
|
||||
"default_brkout_mode": "1x100G[40G]"
|
||||
},
|
||||
|
||||
"Ethernet68": {
|
||||
"default_brkout_mode": "1x100G[40G]"
|
||||
},
|
||||
|
||||
"Ethernet72": {
|
||||
"default_brkout_mode": "1x100G[40G]"
|
||||
},
|
||||
|
||||
"Ethernet76": {
|
||||
"default_brkout_mode": "1x100G[40G]"
|
||||
},
|
||||
|
||||
"Ethernet80": {
|
||||
"default_brkout_mode": "1x100G[40G]"
|
||||
},
|
||||
|
||||
"Ethernet84": {
|
||||
"default_brkout_mode": "1x100G[40G]"
|
||||
},
|
||||
|
||||
"Ethernet88": {
|
||||
"default_brkout_mode": "1x100G[40G]"
|
||||
},
|
||||
|
||||
"Ethernet92": {
|
||||
"default_brkout_mode": "1x100G[40G]"
|
||||
},
|
||||
|
||||
"Ethernet96": {
|
||||
"default_brkout_mode": "1x100G[40G]"
|
||||
},
|
||||
|
||||
"Ethernet100": {
|
||||
"default_brkout_mode": "1x100G[40G]"
|
||||
},
|
||||
|
||||
"Ethernet104": {
|
||||
"default_brkout_mode": "1x100G[40G]"
|
||||
},
|
||||
|
||||
"Ethernet108": {
|
||||
"default_brkout_mode": "1x100G[40G]"
|
||||
},
|
||||
|
||||
"Ethernet112": {
|
||||
"default_brkout_mode": "1x100G[40G]"
|
||||
},
|
||||
|
||||
"Ethernet116": {
|
||||
"default_brkout_mode": "1x100G[40G]"
|
||||
},
|
||||
|
||||
"Ethernet120": {
|
||||
"default_brkout_mode": "1x100G[40G]"
|
||||
},
|
||||
|
||||
"Ethernet124": {
|
||||
"default_brkout_mode": "1x100G[40G]"
|
||||
},
|
||||
|
||||
"Ethernet128": {
|
||||
"default_brkout_mode": "1x10G"
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
@ -0,0 +1 @@
|
||||
SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/td3-x7-s9110-32x.config.bcm
|
||||
@ -0,0 +1,671 @@
|
||||
# cfg version: r2, 20230713
|
||||
|
||||
pbmp_xport_xe=0xFFFFFFFFFFFFFFFFFfffffffffffffffe
|
||||
|
||||
# Software config lane swaps
|
||||
|
||||
#FC0 QSFP port 0
|
||||
phy_chain_rx_lane_map_physical{1}=0x2310
|
||||
phy_chain_tx_lane_map_physical{1}=0x0132
|
||||
|
||||
#FC1 QSFP port 1
|
||||
phy_chain_rx_lane_map_physical{5}=0x3120
|
||||
phy_chain_tx_lane_map_physical{5}=0x1203
|
||||
|
||||
#FC2 QSFP port 2
|
||||
phy_chain_rx_lane_map_physical{9}=0x2310
|
||||
phy_chain_tx_lane_map_physical{9}=0x0213
|
||||
|
||||
#FC3 QSFP port 3
|
||||
phy_chain_rx_lane_map_physical{13}=0x3120
|
||||
phy_chain_tx_lane_map_physical{13}=0x1203
|
||||
|
||||
#FC4 QSFP port 4
|
||||
phy_chain_rx_lane_map_physical{17}=0x2310
|
||||
phy_chain_tx_lane_map_physical{17}=0x0132
|
||||
|
||||
#FC5 QSFP port 5
|
||||
phy_chain_rx_lane_map_physical{21}=0x3120
|
||||
phy_chain_tx_lane_map_physical{21}=0x1203
|
||||
|
||||
#FC6 QSFP port 6
|
||||
phy_chain_rx_lane_map_physical{25}=0x2310
|
||||
phy_chain_tx_lane_map_physical{25}=0x0132
|
||||
|
||||
#FC7 QSFP port 7
|
||||
phy_chain_rx_lane_map_physical{29}=0x3120
|
||||
phy_chain_tx_lane_map_physical{29}=0x1203
|
||||
|
||||
#FC8 QSFP port 8
|
||||
phy_chain_rx_lane_map_physical{33}=0x2310
|
||||
phy_chain_tx_lane_map_physical{33}=0x0132
|
||||
|
||||
#FC9 QSFP port 9
|
||||
phy_chain_rx_lane_map_physical{37}=0x3120
|
||||
phy_chain_tx_lane_map_physical{37}=0x1203
|
||||
|
||||
#FC10 QSFP port 10
|
||||
phy_chain_rx_lane_map_physical{41}=0x2310
|
||||
phy_chain_tx_lane_map_physical{41}=0x0132
|
||||
|
||||
#FC11 QSFP port 11
|
||||
phy_chain_rx_lane_map_physical{45}=0x3120
|
||||
phy_chain_tx_lane_map_physical{45}=0x1203
|
||||
|
||||
#FC12 QSFP port 12
|
||||
phy_chain_rx_lane_map_physical{49}=0x1320
|
||||
phy_chain_tx_lane_map_physical{49}=0x0231
|
||||
|
||||
#FC13 QSFP port 13
|
||||
phy_chain_rx_lane_map_physical{53}=0x3120
|
||||
phy_chain_tx_lane_map_physical{53}=0x1203
|
||||
|
||||
#FC14 QSFP port 14
|
||||
phy_chain_rx_lane_map_physical{57}=0x2310
|
||||
phy_chain_tx_lane_map_physical{57}=0x0132
|
||||
|
||||
#FC15 QSFP port 15
|
||||
phy_chain_rx_lane_map_physical{61}=0x3120
|
||||
phy_chain_tx_lane_map_physical{61}=0x1203
|
||||
|
||||
#FC16 QSFP port 17
|
||||
phy_chain_rx_lane_map_physical{65}=0x3021
|
||||
phy_chain_tx_lane_map_physical{65}=0x0312
|
||||
|
||||
#FC17 QSFP port 16
|
||||
phy_chain_rx_lane_map_physical{69}=0x1032
|
||||
phy_chain_tx_lane_map_physical{69}=0x3201
|
||||
|
||||
#FC18 QSFP port 19
|
||||
phy_chain_rx_lane_map_physical{73}=0x3021
|
||||
phy_chain_tx_lane_map_physical{73}=0x1302
|
||||
|
||||
#FC19 QSFP port 18
|
||||
phy_chain_rx_lane_map_physical{77}=0x2013
|
||||
phy_chain_tx_lane_map_physical{77}=0x3210
|
||||
|
||||
#FC20 QSFP port 21
|
||||
phy_chain_rx_lane_map_physical{81}=0x3021
|
||||
phy_chain_tx_lane_map_physical{81}=0x1302
|
||||
|
||||
#FC21 QSFP port 20
|
||||
phy_chain_rx_lane_map_physical{85}=0x2031
|
||||
phy_chain_tx_lane_map_physical{85}=0x3201
|
||||
|
||||
#FC22 QSFP port 23
|
||||
phy_chain_rx_lane_map_physical{89}=0x3021
|
||||
phy_chain_tx_lane_map_physical{89}=0x1302
|
||||
|
||||
#FC23 QSFP port 22
|
||||
phy_chain_rx_lane_map_physical{93}=0x2031
|
||||
phy_chain_tx_lane_map_physical{93}=0x3201
|
||||
|
||||
#FC24 QSFP port 25
|
||||
phy_chain_rx_lane_map_physical{97}=0x3021
|
||||
phy_chain_tx_lane_map_physical{97}=0x1302
|
||||
|
||||
#FC25 QSFP port 24
|
||||
phy_chain_rx_lane_map_physical{101}=0x2031
|
||||
phy_chain_tx_lane_map_physical{101}=0x1302
|
||||
|
||||
#FC26 QSFP port 27
|
||||
phy_chain_rx_lane_map_physical{105}=0x3021
|
||||
phy_chain_tx_lane_map_physical{105}=0x1302
|
||||
|
||||
#FC27 QSFP port 26
|
||||
phy_chain_rx_lane_map_physical{109}=0x2031
|
||||
phy_chain_tx_lane_map_physical{109}=0x1302
|
||||
|
||||
#FC28 QSFP port 29
|
||||
phy_chain_rx_lane_map_physical{113}=0x2031
|
||||
phy_chain_tx_lane_map_physical{113}=0x1302
|
||||
|
||||
#FC29 QSFP port 28
|
||||
phy_chain_rx_lane_map_physical{117}=0x2031
|
||||
phy_chain_tx_lane_map_physical{117}=0x1302
|
||||
|
||||
#FC30 QSFP port 31
|
||||
phy_chain_rx_lane_map_physical{121}=0x2031
|
||||
phy_chain_tx_lane_map_physical{121}=0x1302
|
||||
|
||||
#FC31 QSFP port 30
|
||||
phy_chain_rx_lane_map_physical{125}=0x2031
|
||||
phy_chain_tx_lane_map_physical{125}=0x3201
|
||||
|
||||
#MC management port (front port)
|
||||
phy_chain_rx_lane_map_physical{129}=0x3210
|
||||
phy_chain_tx_lane_map_physical{129}=0x3210
|
||||
|
||||
|
||||
####### Polarity flips after lane swaps ######
|
||||
|
||||
#FC0 QSFP port 0
|
||||
phy_chain_rx_polarity_flip_physical{1}=0x1
|
||||
phy_chain_rx_polarity_flip_physical{2}=0x0
|
||||
phy_chain_rx_polarity_flip_physical{3}=0x0
|
||||
phy_chain_rx_polarity_flip_physical{4}=0x1
|
||||
|
||||
phy_chain_tx_polarity_flip_physical{1}=0x1
|
||||
phy_chain_tx_polarity_flip_physical{2}=0x0
|
||||
phy_chain_tx_polarity_flip_physical{3}=0x0
|
||||
phy_chain_tx_polarity_flip_physical{4}=0x1
|
||||
|
||||
#FC1 QSFP port 1
|
||||
phy_chain_rx_polarity_flip_physical{5}=0x0
|
||||
phy_chain_rx_polarity_flip_physical{6}=0x0
|
||||
phy_chain_rx_polarity_flip_physical{7}=0x1
|
||||
phy_chain_rx_polarity_flip_physical{8}=0x1
|
||||
|
||||
phy_chain_tx_polarity_flip_physical{5}=0x0
|
||||
phy_chain_tx_polarity_flip_physical{6}=0x1
|
||||
phy_chain_tx_polarity_flip_physical{7}=0x1
|
||||
phy_chain_tx_polarity_flip_physical{8}=0x1
|
||||
|
||||
#FC2 QSFP port 2
|
||||
phy_chain_rx_polarity_flip_physical{9}=0x1
|
||||
phy_chain_rx_polarity_flip_physical{10}=0x0
|
||||
phy_chain_rx_polarity_flip_physical{11}=0x0
|
||||
phy_chain_rx_polarity_flip_physical{12}=0x1
|
||||
|
||||
phy_chain_tx_polarity_flip_physical{9}=0x0
|
||||
phy_chain_tx_polarity_flip_physical{10}=0x1
|
||||
phy_chain_tx_polarity_flip_physical{11}=0x1
|
||||
phy_chain_tx_polarity_flip_physical{12}=0x0
|
||||
|
||||
#FC3 QSFP port 3
|
||||
phy_chain_rx_polarity_flip_physical{13}=0x0
|
||||
phy_chain_rx_polarity_flip_physical{14}=0x0
|
||||
phy_chain_rx_polarity_flip_physical{15}=0x1
|
||||
phy_chain_rx_polarity_flip_physical{16}=0x1
|
||||
|
||||
phy_chain_tx_polarity_flip_physical{13}=0x0
|
||||
phy_chain_tx_polarity_flip_physical{14}=0x1
|
||||
phy_chain_tx_polarity_flip_physical{15}=0x1
|
||||
phy_chain_tx_polarity_flip_physical{16}=0x1
|
||||
|
||||
#FC4 QSFP port 4
|
||||
phy_chain_rx_polarity_flip_physical{17}=0x1
|
||||
phy_chain_rx_polarity_flip_physical{18}=0x0
|
||||
phy_chain_rx_polarity_flip_physical{19}=0x0
|
||||
phy_chain_rx_polarity_flip_physical{20}=0x1
|
||||
|
||||
phy_chain_tx_polarity_flip_physical{17}=0x0
|
||||
phy_chain_tx_polarity_flip_physical{18}=0x0
|
||||
phy_chain_tx_polarity_flip_physical{19}=0x1
|
||||
phy_chain_tx_polarity_flip_physical{20}=0x1
|
||||
|
||||
#FC5 QSFP port 5
|
||||
phy_chain_rx_polarity_flip_physical{21}=0x0
|
||||
phy_chain_rx_polarity_flip_physical{22}=0x0
|
||||
phy_chain_rx_polarity_flip_physical{23}=0x1
|
||||
phy_chain_rx_polarity_flip_physical{24}=0x1
|
||||
|
||||
phy_chain_tx_polarity_flip_physical{21}=0x0
|
||||
phy_chain_tx_polarity_flip_physical{22}=0x1
|
||||
phy_chain_tx_polarity_flip_physical{23}=0x1
|
||||
phy_chain_tx_polarity_flip_physical{24}=0x1
|
||||
|
||||
#FC6 QSFP port 6
|
||||
phy_chain_rx_polarity_flip_physical{25}=0x0
|
||||
phy_chain_rx_polarity_flip_physical{26}=0x1
|
||||
phy_chain_rx_polarity_flip_physical{27}=0x1
|
||||
phy_chain_rx_polarity_flip_physical{28}=0x0
|
||||
|
||||
phy_chain_tx_polarity_flip_physical{25}=0x1
|
||||
phy_chain_tx_polarity_flip_physical{26}=0x0
|
||||
phy_chain_tx_polarity_flip_physical{27}=0x0
|
||||
phy_chain_tx_polarity_flip_physical{28}=0x0
|
||||
|
||||
#FC7 QSFP port 7
|
||||
phy_chain_rx_polarity_flip_physical{29}=0x1
|
||||
phy_chain_rx_polarity_flip_physical{30}=0x1
|
||||
phy_chain_rx_polarity_flip_physical{31}=0x0
|
||||
phy_chain_rx_polarity_flip_physical{32}=0x0
|
||||
|
||||
phy_chain_tx_polarity_flip_physical{29}=0x0
|
||||
phy_chain_tx_polarity_flip_physical{30}=0x1
|
||||
phy_chain_tx_polarity_flip_physical{31}=0x1
|
||||
phy_chain_tx_polarity_flip_physical{32}=0x1
|
||||
|
||||
#FC8 QSFP port 8
|
||||
phy_chain_rx_polarity_flip_physical{33}=0x0
|
||||
phy_chain_rx_polarity_flip_physical{34}=0x1
|
||||
phy_chain_rx_polarity_flip_physical{35}=0x1
|
||||
phy_chain_rx_polarity_flip_physical{36}=0x0
|
||||
|
||||
phy_chain_tx_polarity_flip_physical{33}=0x0
|
||||
phy_chain_tx_polarity_flip_physical{34}=0x0
|
||||
phy_chain_tx_polarity_flip_physical{35}=0x1
|
||||
phy_chain_tx_polarity_flip_physical{36}=0x1
|
||||
|
||||
#FC9 QSFP port 9
|
||||
phy_chain_rx_polarity_flip_physical{37}=0x1
|
||||
phy_chain_rx_polarity_flip_physical{38}=0x1
|
||||
phy_chain_rx_polarity_flip_physical{39}=0x0
|
||||
phy_chain_rx_polarity_flip_physical{40}=0x0
|
||||
|
||||
phy_chain_tx_polarity_flip_physical{37}=0x0
|
||||
phy_chain_tx_polarity_flip_physical{38}=0x1
|
||||
phy_chain_tx_polarity_flip_physical{39}=0x1
|
||||
phy_chain_tx_polarity_flip_physical{40}=0x1
|
||||
|
||||
#FC10 QSFP port 10
|
||||
phy_chain_rx_polarity_flip_physical{41}=0x0
|
||||
phy_chain_rx_polarity_flip_physical{42}=0x1
|
||||
phy_chain_rx_polarity_flip_physical{43}=0x1
|
||||
phy_chain_rx_polarity_flip_physical{44}=0x0
|
||||
|
||||
phy_chain_tx_polarity_flip_physical{41}=0x1
|
||||
phy_chain_tx_polarity_flip_physical{42}=0x0
|
||||
phy_chain_tx_polarity_flip_physical{43}=0x0
|
||||
phy_chain_tx_polarity_flip_physical{44}=0x1
|
||||
|
||||
#FC11 QSFP port 11
|
||||
phy_chain_rx_polarity_flip_physical{45}=0x1
|
||||
phy_chain_rx_polarity_flip_physical{46}=0x1
|
||||
phy_chain_rx_polarity_flip_physical{47}=0x0
|
||||
phy_chain_rx_polarity_flip_physical{48}=0x0
|
||||
|
||||
phy_chain_tx_polarity_flip_physical{45}=0x0
|
||||
phy_chain_tx_polarity_flip_physical{46}=0x1
|
||||
phy_chain_tx_polarity_flip_physical{47}=0x1
|
||||
phy_chain_tx_polarity_flip_physical{48}=0x1
|
||||
|
||||
#FC12 QSFP port 12
|
||||
phy_chain_rx_polarity_flip_physical{49}=0x0
|
||||
phy_chain_rx_polarity_flip_physical{50}=0x0
|
||||
phy_chain_rx_polarity_flip_physical{51}=0x1
|
||||
phy_chain_rx_polarity_flip_physical{52}=0x1
|
||||
|
||||
phy_chain_tx_polarity_flip_physical{49}=0x1
|
||||
phy_chain_tx_polarity_flip_physical{50}=0x0
|
||||
phy_chain_tx_polarity_flip_physical{51}=0x0
|
||||
phy_chain_tx_polarity_flip_physical{52}=0x1
|
||||
|
||||
#FC13 QSFP port 13
|
||||
phy_chain_rx_polarity_flip_physical{53}=0x0
|
||||
phy_chain_rx_polarity_flip_physical{54}=0x0
|
||||
phy_chain_rx_polarity_flip_physical{55}=0x1
|
||||
phy_chain_rx_polarity_flip_physical{56}=0x1
|
||||
|
||||
phy_chain_tx_polarity_flip_physical{53}=0x1
|
||||
phy_chain_tx_polarity_flip_physical{54}=0x0
|
||||
phy_chain_tx_polarity_flip_physical{55}=0x0
|
||||
phy_chain_tx_polarity_flip_physical{56}=0x0
|
||||
|
||||
#FC14 QSFP port 14
|
||||
phy_chain_rx_polarity_flip_physical{57}=0x1
|
||||
phy_chain_rx_polarity_flip_physical{58}=0x0
|
||||
phy_chain_rx_polarity_flip_physical{59}=0x0
|
||||
phy_chain_rx_polarity_flip_physical{60}=0x1
|
||||
|
||||
phy_chain_tx_polarity_flip_physical{57}=0x1
|
||||
phy_chain_tx_polarity_flip_physical{58}=0x1
|
||||
phy_chain_tx_polarity_flip_physical{59}=0x1
|
||||
phy_chain_tx_polarity_flip_physical{60}=0x0
|
||||
|
||||
#FC15 QSFP port 15
|
||||
phy_chain_rx_polarity_flip_physical{61}=0x0
|
||||
phy_chain_rx_polarity_flip_physical{62}=0x0
|
||||
phy_chain_rx_polarity_flip_physical{63}=0x1
|
||||
phy_chain_rx_polarity_flip_physical{64}=0x1
|
||||
|
||||
phy_chain_tx_polarity_flip_physical{61}=0x1
|
||||
phy_chain_tx_polarity_flip_physical{62}=0x0
|
||||
phy_chain_tx_polarity_flip_physical{63}=0x0
|
||||
phy_chain_tx_polarity_flip_physical{64}=0x0
|
||||
|
||||
#FC16 QSFP port 17
|
||||
phy_chain_rx_polarity_flip_physical{65}=0x1
|
||||
phy_chain_rx_polarity_flip_physical{66}=0x1
|
||||
phy_chain_rx_polarity_flip_physical{67}=0x0
|
||||
phy_chain_rx_polarity_flip_physical{68}=0x0
|
||||
|
||||
phy_chain_tx_polarity_flip_physical{65}=0x1
|
||||
phy_chain_tx_polarity_flip_physical{66}=0x0
|
||||
phy_chain_tx_polarity_flip_physical{67}=0x0
|
||||
phy_chain_tx_polarity_flip_physical{68}=0x0
|
||||
|
||||
#FC17 QSFP port 16
|
||||
phy_chain_rx_polarity_flip_physical{69}=0x1
|
||||
phy_chain_rx_polarity_flip_physical{70}=0x0
|
||||
phy_chain_rx_polarity_flip_physical{71}=0x1
|
||||
phy_chain_rx_polarity_flip_physical{72}=0x1
|
||||
|
||||
phy_chain_tx_polarity_flip_physical{69}=0x1
|
||||
phy_chain_tx_polarity_flip_physical{70}=0x0
|
||||
phy_chain_tx_polarity_flip_physical{71}=0x0
|
||||
phy_chain_tx_polarity_flip_physical{72}=0x0
|
||||
|
||||
#FC18 QSFP port 19
|
||||
phy_chain_rx_polarity_flip_physical{73}=0x1
|
||||
phy_chain_rx_polarity_flip_physical{74}=0x1
|
||||
phy_chain_rx_polarity_flip_physical{75}=0x0
|
||||
phy_chain_rx_polarity_flip_physical{76}=0x0
|
||||
|
||||
phy_chain_tx_polarity_flip_physical{73}=0x1
|
||||
phy_chain_tx_polarity_flip_physical{74}=0x1
|
||||
phy_chain_tx_polarity_flip_physical{75}=0x0
|
||||
phy_chain_tx_polarity_flip_physical{76}=0x1
|
||||
|
||||
#FC19 QSFP port 18
|
||||
phy_chain_rx_polarity_flip_physical{77}=0x0
|
||||
phy_chain_rx_polarity_flip_physical{78}=0x0
|
||||
phy_chain_rx_polarity_flip_physical{79}=0x1
|
||||
phy_chain_rx_polarity_flip_physical{80}=0x1
|
||||
|
||||
phy_chain_tx_polarity_flip_physical{77}=0x0
|
||||
phy_chain_tx_polarity_flip_physical{78}=0x0
|
||||
phy_chain_tx_polarity_flip_physical{79}=0x0
|
||||
phy_chain_tx_polarity_flip_physical{80}=0x0
|
||||
|
||||
#FC20 QSFP port 21
|
||||
phy_chain_rx_polarity_flip_physical{81}=0x1
|
||||
phy_chain_rx_polarity_flip_physical{82}=0x1
|
||||
phy_chain_rx_polarity_flip_physical{83}=0x0
|
||||
phy_chain_rx_polarity_flip_physical{84}=0x0
|
||||
|
||||
phy_chain_tx_polarity_flip_physical{81}=0x1
|
||||
phy_chain_tx_polarity_flip_physical{82}=0x1
|
||||
phy_chain_tx_polarity_flip_physical{83}=0x0
|
||||
phy_chain_tx_polarity_flip_physical{84}=0x1
|
||||
|
||||
#FC21 QSFP port 20
|
||||
phy_chain_rx_polarity_flip_physical{85}=0x0
|
||||
phy_chain_rx_polarity_flip_physical{86}=0x1
|
||||
phy_chain_rx_polarity_flip_physical{87}=0x1
|
||||
phy_chain_rx_polarity_flip_physical{88}=0x0
|
||||
|
||||
phy_chain_tx_polarity_flip_physical{85}=0x0
|
||||
phy_chain_tx_polarity_flip_physical{86}=0x0
|
||||
phy_chain_tx_polarity_flip_physical{87}=0x1
|
||||
phy_chain_tx_polarity_flip_physical{88}=0x0
|
||||
|
||||
#FC22 QSFP port 23
|
||||
phy_chain_rx_polarity_flip_physical{89}=0x1
|
||||
phy_chain_rx_polarity_flip_physical{90}=0x1
|
||||
phy_chain_rx_polarity_flip_physical{91}=0x0
|
||||
phy_chain_rx_polarity_flip_physical{92}=0x0
|
||||
|
||||
phy_chain_tx_polarity_flip_physical{89}=0x1
|
||||
phy_chain_tx_polarity_flip_physical{90}=0x1
|
||||
phy_chain_tx_polarity_flip_physical{91}=0x0
|
||||
phy_chain_tx_polarity_flip_physical{92}=0x1
|
||||
|
||||
#FC23 QSFP port 22
|
||||
phy_chain_rx_polarity_flip_physical{93}=0x0
|
||||
phy_chain_rx_polarity_flip_physical{94}=0x1
|
||||
phy_chain_rx_polarity_flip_physical{95}=0x1
|
||||
phy_chain_rx_polarity_flip_physical{96}=0x0
|
||||
|
||||
phy_chain_tx_polarity_flip_physical{93}=0x0
|
||||
phy_chain_tx_polarity_flip_physical{94}=0x1
|
||||
phy_chain_tx_polarity_flip_physical{95}=0x1
|
||||
phy_chain_tx_polarity_flip_physical{96}=0x0
|
||||
|
||||
#FC24 QSFP port 25
|
||||
phy_chain_rx_polarity_flip_physical{97}=0x1
|
||||
phy_chain_rx_polarity_flip_physical{98}=0x1
|
||||
phy_chain_rx_polarity_flip_physical{99}=0x0
|
||||
phy_chain_rx_polarity_flip_physical{100}=0x0
|
||||
|
||||
phy_chain_tx_polarity_flip_physical{97}=0x1
|
||||
phy_chain_tx_polarity_flip_physical{98}=0x1
|
||||
phy_chain_tx_polarity_flip_physical{99}=0x0
|
||||
phy_chain_tx_polarity_flip_physical{100}=0x1
|
||||
|
||||
#FC25 QSFP port 24
|
||||
phy_chain_rx_polarity_flip_physical{101}=0x0
|
||||
phy_chain_rx_polarity_flip_physical{102}=0x1
|
||||
phy_chain_rx_polarity_flip_physical{103}=0x1
|
||||
phy_chain_rx_polarity_flip_physical{104}=0x0
|
||||
|
||||
phy_chain_tx_polarity_flip_physical{101}=0x1
|
||||
phy_chain_tx_polarity_flip_physical{102}=0x0
|
||||
phy_chain_tx_polarity_flip_physical{103}=0x0
|
||||
phy_chain_tx_polarity_flip_physical{104}=0x1
|
||||
|
||||
#FC26 QSFP port 27
|
||||
phy_chain_rx_polarity_flip_physical{105}=0x0
|
||||
phy_chain_rx_polarity_flip_physical{106}=0x0
|
||||
phy_chain_rx_polarity_flip_physical{107}=0x1
|
||||
phy_chain_rx_polarity_flip_physical{108}=0x1
|
||||
|
||||
phy_chain_tx_polarity_flip_physical{105}=0x1
|
||||
phy_chain_tx_polarity_flip_physical{106}=0x1
|
||||
phy_chain_tx_polarity_flip_physical{107}=0x0
|
||||
phy_chain_tx_polarity_flip_physical{108}=0x1
|
||||
|
||||
#FC27 QSFP port 26
|
||||
phy_chain_rx_polarity_flip_physical{109}=0x1
|
||||
phy_chain_rx_polarity_flip_physical{110}=0x0
|
||||
phy_chain_rx_polarity_flip_physical{111}=0x0
|
||||
phy_chain_rx_polarity_flip_physical{112}=0x1
|
||||
|
||||
phy_chain_tx_polarity_flip_physical{109}=0x1
|
||||
phy_chain_tx_polarity_flip_physical{110}=0x0
|
||||
phy_chain_tx_polarity_flip_physical{111}=0x0
|
||||
phy_chain_tx_polarity_flip_physical{112}=0x0
|
||||
|
||||
#FC28 QSFP port 29
|
||||
phy_chain_rx_polarity_flip_physical{113}=0x0
|
||||
phy_chain_rx_polarity_flip_physical{114}=0x1
|
||||
phy_chain_rx_polarity_flip_physical{115}=0x1
|
||||
phy_chain_rx_polarity_flip_physical{116}=0x0
|
||||
|
||||
phy_chain_tx_polarity_flip_physical{113}=0x1
|
||||
phy_chain_tx_polarity_flip_physical{114}=0x1
|
||||
phy_chain_tx_polarity_flip_physical{115}=0x0
|
||||
phy_chain_tx_polarity_flip_physical{116}=0x1
|
||||
|
||||
#FC29 QSFP port 28
|
||||
phy_chain_rx_polarity_flip_physical{117}=0x1
|
||||
phy_chain_rx_polarity_flip_physical{118}=0x0
|
||||
phy_chain_rx_polarity_flip_physical{119}=0x0
|
||||
phy_chain_rx_polarity_flip_physical{120}=0x1
|
||||
|
||||
phy_chain_tx_polarity_flip_physical{117}=0x1
|
||||
phy_chain_tx_polarity_flip_physical{118}=0x0
|
||||
phy_chain_tx_polarity_flip_physical{119}=0x0
|
||||
phy_chain_tx_polarity_flip_physical{120}=0x1
|
||||
|
||||
#FC30 QSFP port 31
|
||||
phy_chain_rx_polarity_flip_physical{121}=0x1
|
||||
phy_chain_rx_polarity_flip_physical{122}=0x1
|
||||
phy_chain_rx_polarity_flip_physical{123}=0x0
|
||||
phy_chain_rx_polarity_flip_physical{124}=0x0
|
||||
|
||||
phy_chain_tx_polarity_flip_physical{121}=0x1
|
||||
phy_chain_tx_polarity_flip_physical{122}=0x1
|
||||
phy_chain_tx_polarity_flip_physical{123}=0x0
|
||||
phy_chain_tx_polarity_flip_physical{124}=0x1
|
||||
|
||||
#FC31 QSFP port 30
|
||||
phy_chain_rx_polarity_flip_physical{125}=0x1
|
||||
phy_chain_rx_polarity_flip_physical{126}=0x0
|
||||
phy_chain_rx_polarity_flip_physical{127}=0x0
|
||||
phy_chain_rx_polarity_flip_physical{128}=0x1
|
||||
|
||||
phy_chain_tx_polarity_flip_physical{125}=0x0
|
||||
phy_chain_tx_polarity_flip_physical{126}=0x0
|
||||
phy_chain_tx_polarity_flip_physical{127}=0x1
|
||||
phy_chain_tx_polarity_flip_physical{128}=0x0
|
||||
|
||||
#MC
|
||||
phy_chain_rx_polarity_flip_physical{129}=0x0
|
||||
phy_chain_rx_polarity_flip_physical{130}=0x0
|
||||
phy_chain_rx_polarity_flip_physical{131}=0x0
|
||||
phy_chain_rx_polarity_flip_physical{132}=0x0
|
||||
|
||||
phy_chain_tx_polarity_flip_physical{129}=0x0
|
||||
phy_chain_tx_polarity_flip_physical{130}=0x0
|
||||
phy_chain_tx_polarity_flip_physical{131}=0x0
|
||||
phy_chain_tx_polarity_flip_physical{132}=0x0
|
||||
|
||||
|
||||
#Portmap setting
|
||||
#FC0 QSFP port 0
|
||||
portmap_1=1:100
|
||||
|
||||
#FC1 QSFP port 1
|
||||
portmap_5=5:100
|
||||
|
||||
#FC2 QSFP port 2
|
||||
portmap_9=9:100
|
||||
|
||||
#FC3 QSFP port 3
|
||||
portmap_13=13:100
|
||||
|
||||
#FC4 QSFP port 4
|
||||
portmap_17=17:100
|
||||
|
||||
#FC5 QSFP port 5
|
||||
portmap_21=21:100
|
||||
|
||||
#FC6 QSFP port 6
|
||||
portmap_25=25:100
|
||||
|
||||
#FC7 QSFP port 7
|
||||
portmap_29=29:100
|
||||
|
||||
#FC8 QSFP port 8
|
||||
portmap_33=33:100
|
||||
|
||||
#FC9 QSFP port 9
|
||||
portmap_37=37:100
|
||||
|
||||
#FC10 QSFP port 10
|
||||
portmap_41=41:100
|
||||
|
||||
#FC11 QSFP port 11
|
||||
portmap_45=45:100
|
||||
|
||||
#FC12 QSFP port 12
|
||||
portmap_49=49:100
|
||||
|
||||
#FC13 QSFP port 13
|
||||
portmap_53=53:100
|
||||
|
||||
#FC14 QSFP port 14
|
||||
portmap_57=57:100
|
||||
|
||||
#FC15 QSFP port 15
|
||||
portmap_61=61:100
|
||||
|
||||
#MC port 66 - management port (front port)
|
||||
portmap_66=129:10:m
|
||||
|
||||
|
||||
#FC16 QSFP port 17
|
||||
portmap_67=65:100
|
||||
|
||||
#FC17 QSFP port 16
|
||||
portmap_71=69:100
|
||||
|
||||
#FC18 QSFP port 19
|
||||
portmap_75=73:100
|
||||
|
||||
#FC19 QSFP port 18
|
||||
portmap_79=77:100
|
||||
|
||||
#FC20 QSFP port 21
|
||||
portmap_83=81:100
|
||||
|
||||
#FC21 QSFP port 20
|
||||
portmap_87=85:100
|
||||
|
||||
#FC22 QSFP port 23
|
||||
portmap_91=89:100
|
||||
|
||||
#FC23 QSFP port 22
|
||||
portmap_95=93:100
|
||||
|
||||
#FC24 QSFP port 25
|
||||
portmap_99=97:100
|
||||
|
||||
#FC25 QSFP port 24
|
||||
portmap_103=101:100
|
||||
|
||||
#FC26 QSFP port 27
|
||||
portmap_107=105:100
|
||||
|
||||
#FC27 QSFP port 26
|
||||
portmap_111=109:100
|
||||
|
||||
#FC28 QSFP port 29
|
||||
portmap_115=113:100
|
||||
|
||||
#FC29 QSFP port 28
|
||||
portmap_119=117:100
|
||||
|
||||
#FC30 QSFP port 31
|
||||
portmap_123=121:100
|
||||
|
||||
#FC31 QSFP port 30
|
||||
portmap_127=125:100
|
||||
|
||||
|
||||
dport_map_enable=1
|
||||
|
||||
dport_map_port_1=1
|
||||
dport_map_port_5=2
|
||||
dport_map_port_9=3
|
||||
dport_map_port_13=4
|
||||
dport_map_port_17=5
|
||||
dport_map_port_21=6
|
||||
dport_map_port_25=7
|
||||
dport_map_port_29=8
|
||||
dport_map_port_33=9
|
||||
dport_map_port_37=10
|
||||
dport_map_port_41=11
|
||||
dport_map_port_45=12
|
||||
dport_map_port_49=13
|
||||
dport_map_port_53=14
|
||||
dport_map_port_57=15
|
||||
dport_map_port_61=16
|
||||
dport_map_port_71=17
|
||||
dport_map_port_67=18
|
||||
dport_map_port_79=19
|
||||
dport_map_port_75=20
|
||||
dport_map_port_87=21
|
||||
dport_map_port_83=22
|
||||
dport_map_port_95=23
|
||||
dport_map_port_91=24
|
||||
dport_map_port_103=25
|
||||
dport_map_port_99=26
|
||||
dport_map_port_111=27
|
||||
dport_map_port_107=28
|
||||
dport_map_port_119=29
|
||||
dport_map_port_115=30
|
||||
dport_map_port_127=31
|
||||
dport_map_port_123=32
|
||||
dport_map_port_66=33
|
||||
|
||||
|
||||
core_clock_frequency=1525
|
||||
dpp_clock_ratio=2:3
|
||||
oversubscribe_mode=1
|
||||
parity_enable=0
|
||||
mem_cache_enable=0
|
||||
l2_mem_entries=32768
|
||||
l3_mem_entries=16384
|
||||
fpem_mem_entries=131072
|
||||
l2xmsg_mode=1
|
||||
bcm_num_cos=10
|
||||
bcm_stat_interval=2000000
|
||||
cdma_timeout_usec=3000000
|
||||
ipv6_lpm_128b_enable=0x1
|
||||
l3_max_ecmp_mode=1
|
||||
lpm_scaling_enable=0
|
||||
max_vp_lags=0
|
||||
miim_intr_enable=0
|
||||
module_64ports=1
|
||||
schan_intr_enable=0
|
||||
stable_size=0x5500000
|
||||
tdma_timeout_usec=3000000
|
||||
skip_L2_USER_ENTRY=0
|
||||
bcm_tunnel_term_compatible_mode=1
|
||||
ifp_inports_support_enable=1
|
||||
port_flex_enable=1
|
||||
|
||||
|
||||
BIN
device/ufispace/x86_64-ufispace_s9110_32x-r0/custom_led.bin
Executable file
BIN
device/ufispace/x86_64-ufispace_s9110_32x-r0/custom_led.bin
Executable file
Binary file not shown.
1
device/ufispace/x86_64-ufispace_s9110_32x-r0/default_sku
Normal file
1
device/ufispace/x86_64-ufispace_s9110_32x-r0/default_sku
Normal file
@ -0,0 +1 @@
|
||||
UFISPACE-S9110-32X t1
|
||||
10
device/ufispace/x86_64-ufispace_s9110_32x-r0/fancontrol
Normal file
10
device/ufispace/x86_64-ufispace_s9110_32x-r0/fancontrol
Normal file
@ -0,0 +1,10 @@
|
||||
# Configuration file generated by pwmconfig, changes will be lost
|
||||
INTERVAL=10
|
||||
DEVPATH=
|
||||
DEVNAME=
|
||||
FCTEMPS=
|
||||
FCFANS=
|
||||
MINTEMP=
|
||||
MAXTEMP=
|
||||
MINSTART=
|
||||
MINSTOP=
|
||||
@ -0,0 +1,4 @@
|
||||
CONSOLE_PORT=0x3f8
|
||||
CONSOLE_DEV=0
|
||||
CONSOLE_SPEED=115200
|
||||
ONIE_PLATFORM_EXTRA_CMDLINE_LINUX="module_blacklist=gpio_ich nomodeset pcie_aspm=off"
|
||||
4
device/ufispace/x86_64-ufispace_s9110_32x-r0/led_proc_init.soc
Executable file
4
device/ufispace/x86_64-ufispace_s9110_32x-r0/led_proc_init.soc
Executable file
@ -0,0 +1,4 @@
|
||||
led stop
|
||||
m0 load 0 0x3800 /usr/share/sonic/platform/custom_led.bin
|
||||
led auto on
|
||||
led start
|
||||
172
device/ufispace/x86_64-ufispace_s9110_32x-r0/pcie.yaml
Normal file
172
device/ufispace/x86_64-ufispace_s9110_32x-r0/pcie.yaml
Normal file
@ -0,0 +1,172 @@
|
||||
- bus: '00'
|
||||
dev: '00'
|
||||
fn: '0'
|
||||
id: '1980'
|
||||
name: 'Host bridge: Intel Corporation Atom Processor C3000 Series System Agent (rev
|
||||
11)'
|
||||
- bus: '00'
|
||||
dev: '04'
|
||||
fn: '0'
|
||||
id: 19a1
|
||||
name: 'Host bridge: Intel Corporation Atom Processor C3000 Series Error Registers
|
||||
(rev 11)'
|
||||
- bus: '00'
|
||||
dev: '05'
|
||||
fn: '0'
|
||||
id: 19a2
|
||||
name: 'Generic system peripheral [0807]: Intel Corporation Atom Processor C3000
|
||||
Series Root Complex Event Collector (rev 11)'
|
||||
- bus: '00'
|
||||
dev: '06'
|
||||
fn: '0'
|
||||
id: 19a3
|
||||
name: 'PCI bridge: Intel Corporation Atom Processor C3000 Series Integrated QAT
|
||||
Root Port (rev 11)'
|
||||
- bus: '00'
|
||||
dev: 09
|
||||
fn: '0'
|
||||
id: 19a4
|
||||
name: 'PCI bridge: Intel Corporation Atom Processor C3000 Series PCI Express Root
|
||||
Port #0 (rev 11)'
|
||||
- bus: '00'
|
||||
dev: 0a
|
||||
fn: '0'
|
||||
id: 19a5
|
||||
name: 'PCI bridge: Intel Corporation Atom Processor C3000 Series PCI Express Root
|
||||
Port #1 (rev 11)'
|
||||
- bus: '00'
|
||||
dev: 0b
|
||||
fn: '0'
|
||||
id: 19a6
|
||||
name: 'PCI bridge: Intel Corporation Atom Processor C3000 Series PCI Express Root
|
||||
Port #2 (rev 11)'
|
||||
- bus: '00'
|
||||
dev: 0e
|
||||
fn: '0'
|
||||
id: 19a8
|
||||
name: 'PCI bridge: Intel Corporation Atom Processor C3000 Series PCI Express Root
|
||||
Port #4 (rev 11)'
|
||||
- bus: '00'
|
||||
dev: 0f
|
||||
fn: '0'
|
||||
id: 19a9
|
||||
name: 'PCI bridge: Intel Corporation Atom Processor C3000 Series PCI Express Root
|
||||
Port #5 (rev 11)'
|
||||
- bus: '00'
|
||||
dev: '10'
|
||||
fn: '0'
|
||||
id: 19aa
|
||||
name: 'PCI bridge: Intel Corporation Atom Processor C3000 Series PCI Express Root
|
||||
Port #6 (rev 11)'
|
||||
- bus: '00'
|
||||
dev: '11'
|
||||
fn: '0'
|
||||
id: 19ab
|
||||
name: 'PCI bridge: Intel Corporation Atom Processor C3000 Series PCI Express Root
|
||||
Port #7 (rev 11)'
|
||||
- bus: '00'
|
||||
dev: '12'
|
||||
fn: '0'
|
||||
id: 19ac
|
||||
name: 'System peripheral: Intel Corporation Atom Processor C3000 Series SMBus Contoller
|
||||
- Host (rev 11)'
|
||||
- bus: '00'
|
||||
dev: '14'
|
||||
fn: '0'
|
||||
id: 19c2
|
||||
name: 'SATA controller: Intel Corporation Atom Processor C3000 Series SATA Controller
|
||||
1 (rev 11)'
|
||||
- bus: '00'
|
||||
dev: '15'
|
||||
fn: '0'
|
||||
id: 19d0
|
||||
name: 'USB controller: Intel Corporation Atom Processor C3000 Series USB 3.0 xHCI
|
||||
Controller (rev 11)'
|
||||
- bus: '00'
|
||||
dev: '16'
|
||||
fn: '0'
|
||||
id: 19d1
|
||||
name: 'PCI bridge: Intel Corporation Atom Processor C3000 Series Integrated LAN
|
||||
Root Port #0 (rev 11)'
|
||||
- bus: '00'
|
||||
dev: '17'
|
||||
fn: '0'
|
||||
id: 19d2
|
||||
name: 'PCI bridge: Intel Corporation Atom Processor C3000 Series Integrated LAN
|
||||
Root Port #1 (rev 11)'
|
||||
- bus: '00'
|
||||
dev: '18'
|
||||
fn: '0'
|
||||
id: 19d3
|
||||
name: 'Communication controller: Intel Corporation Atom Processor C3000 Series ME
|
||||
HECI 1 (rev 11)'
|
||||
- bus: '00'
|
||||
dev: 1c
|
||||
fn: '0'
|
||||
id: 19db
|
||||
name: 'SD Host controller: Intel Corporation Device 19db (rev 11)'
|
||||
- bus: '00'
|
||||
dev: 1f
|
||||
fn: '0'
|
||||
id: 19dc
|
||||
name: 'ISA bridge: Intel Corporation Atom Processor C3000 Series LPC or eSPI (rev
|
||||
11)'
|
||||
- bus: '00'
|
||||
dev: 1f
|
||||
fn: '2'
|
||||
id: 19de
|
||||
name: 'Memory controller: Intel Corporation Atom Processor C3000 Series Power Management
|
||||
Controller (rev 11)'
|
||||
- bus: '00'
|
||||
dev: 1f
|
||||
fn: '4'
|
||||
id: 19df
|
||||
name: 'SMBus: Intel Corporation Atom Processor C3000 Series SMBus controller (rev
|
||||
11)'
|
||||
- bus: '00'
|
||||
dev: 1f
|
||||
fn: '5'
|
||||
id: 19e0
|
||||
name: 'Serial bus controller [0c80]: Intel Corporation Atom Processor C3000 Series
|
||||
SPI Controller (rev 11)'
|
||||
- bus: '01'
|
||||
dev: '00'
|
||||
fn: '0'
|
||||
id: 19e2
|
||||
name: 'Co-processor: Intel Corporation Atom Processor C3000 Series QuickAssist Technology
|
||||
(rev 11)'
|
||||
- bus: '04'
|
||||
dev: '00'
|
||||
fn: '0'
|
||||
id: b870
|
||||
name: 'Ethernet controller: Broadcom Inc. and subsidiaries Device b870 (rev 01)'
|
||||
- bus: '06'
|
||||
dev: '00'
|
||||
fn: '0'
|
||||
id: '1533'
|
||||
name: 'Ethernet controller: Intel Corporation I210 Gigabit Network Connection (rev
|
||||
03)'
|
||||
- bus: 09
|
||||
dev: '00'
|
||||
fn: '0'
|
||||
id: 15c3
|
||||
name: 'Ethernet controller: Intel Corporation Ethernet Connection X553 Backplane
|
||||
(rev 11)'
|
||||
- bus: 09
|
||||
dev: '00'
|
||||
fn: '1'
|
||||
id: 15c3
|
||||
name: 'Ethernet controller: Intel Corporation Ethernet Connection X553 Backplane
|
||||
(rev 11)'
|
||||
- bus: 0a
|
||||
dev: '00'
|
||||
fn: '0'
|
||||
id: 15c3
|
||||
name: 'Ethernet controller: Intel Corporation Ethernet Connection X553 Backplane
|
||||
(rev 11)'
|
||||
- bus: 0a
|
||||
dev: '00'
|
||||
fn: '1'
|
||||
id: 15c3
|
||||
name: 'Ethernet controller: Intel Corporation Ethernet Connection X553 Backplane
|
||||
(rev 11)'
|
||||
@ -0,0 +1,85 @@
|
||||
{
|
||||
|
||||
"XCVR":
|
||||
{
|
||||
"xcvr_present":
|
||||
{
|
||||
"i2c":
|
||||
{
|
||||
"valmap-SFP": {"1":true, "0":false },
|
||||
"valmap-QSFP-DD": {"1":true, "0":false},
|
||||
"valmap-QSFP": {"1":true, "0":false}
|
||||
}
|
||||
},
|
||||
"status":
|
||||
{
|
||||
"inserted": "1",
|
||||
"removed": "0"
|
||||
}
|
||||
},
|
||||
|
||||
"PSU":
|
||||
{
|
||||
"psu_present":
|
||||
{
|
||||
"i2c":
|
||||
{
|
||||
"valmap": { "1":true, "0":false }
|
||||
}
|
||||
},
|
||||
|
||||
"psu_power_good":
|
||||
{
|
||||
"i2c":
|
||||
{
|
||||
"valmap": { "1": true, "0":false }
|
||||
}
|
||||
},
|
||||
|
||||
"psu_fan_dir":
|
||||
{
|
||||
"bmc":
|
||||
{
|
||||
"valmap": {"0": "UNKNOWN", "1":"INTAKE", "2":"EXHAUST"}
|
||||
}
|
||||
},
|
||||
"psu_support_list":
|
||||
[
|
||||
{"Manufacturer": "FSPGROUP","Name": "YNEE0750EM", "MaxSpd": "PSU_AC_FAN_MAX_SPEED"},
|
||||
{"Manufacturer": "FSPGROUP","Name": "YNEE0750BM", "MaxSpd": "PSU_AC_FAN_MAX_SPEED"},
|
||||
{"Manufacturer": "FSPGROUP","Name": "YNEE0750AM", "MaxSpd": "PSU_DC_FAN_MAX_SPEED"}
|
||||
],
|
||||
|
||||
"valmap": {"PSU_AC_FAN_MAX_SPEED": "26500", "PSU_DC_FAN_MAX_SPEED":"29000"}
|
||||
},
|
||||
|
||||
"FAN":
|
||||
{
|
||||
"direction":
|
||||
{
|
||||
"bmc":
|
||||
{
|
||||
"valmap": {"0": "UNKNOWN", "1":"INTAKE", "2":"EXHAUST"}
|
||||
}
|
||||
},
|
||||
|
||||
"present":
|
||||
{
|
||||
"i2c":
|
||||
{
|
||||
"valmap": {"1":true, "0":false}
|
||||
},
|
||||
"bmc":
|
||||
{
|
||||
"valmap": {"Device Present":true, "Device Absent":false}
|
||||
}
|
||||
},
|
||||
"FAN_R_MAX_SPEED":"32000",
|
||||
"FAN_F_MAX_SPEED":"36200"
|
||||
},
|
||||
|
||||
"REBOOT_CAUSE":
|
||||
{
|
||||
"reboot_cause_file": "/host/reboot-cause/reboot-cause.txt"
|
||||
}
|
||||
}
|
||||
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
@ -0,0 +1 @@
|
||||
pddf-device-pvt.json
|
||||
596
device/ufispace/x86_64-ufispace_s9110_32x-r0/platform-beta.json
Normal file
596
device/ufispace/x86_64-ufispace_s9110_32x-r0/platform-beta.json
Normal file
@ -0,0 +1,596 @@
|
||||
{
|
||||
"chassis": {
|
||||
"name": "S9110-32X",
|
||||
"components": [
|
||||
{
|
||||
"name": "CPLD1"
|
||||
},
|
||||
{
|
||||
"name": "CPLD2"
|
||||
},
|
||||
{
|
||||
"name": "BIOS"
|
||||
},
|
||||
{
|
||||
"name": "BMC"
|
||||
}
|
||||
],
|
||||
"fans": [
|
||||
{
|
||||
"name": "Fantray1_1"
|
||||
},
|
||||
{
|
||||
"name": "Fantray1_2"
|
||||
},
|
||||
{
|
||||
"name": "Fantray2_1"
|
||||
},
|
||||
{
|
||||
"name": "Fantray2_2"
|
||||
},
|
||||
{
|
||||
"name": "Fantray3_1"
|
||||
},
|
||||
{
|
||||
"name": "Fantray3_2"
|
||||
},
|
||||
{
|
||||
"name": "Fantray4_1"
|
||||
},
|
||||
{
|
||||
"name": "Fantray4_2"
|
||||
}
|
||||
],
|
||||
"fan_drawers":[
|
||||
{
|
||||
"name": "Fantray1",
|
||||
"num_fans" : 2,
|
||||
"fans": [
|
||||
{
|
||||
"name": "Fantray1_1"
|
||||
},
|
||||
{
|
||||
"name": "Fantray1_2"
|
||||
}
|
||||
]
|
||||
},
|
||||
{
|
||||
"name": "Fantray2",
|
||||
"num_fans" : 2,
|
||||
"fans": [
|
||||
{
|
||||
"name": "Fantray2_1"
|
||||
},
|
||||
{
|
||||
"name": "Fantray2_2"
|
||||
}
|
||||
]
|
||||
},
|
||||
{
|
||||
"name": "Fantray3",
|
||||
"num_fans" : 2,
|
||||
"fans": [
|
||||
{
|
||||
"name": "Fantray3_1"
|
||||
},
|
||||
{
|
||||
"name": "Fantray3_2"
|
||||
}
|
||||
]
|
||||
}
|
||||
],
|
||||
"psus": [
|
||||
{
|
||||
"name": "PSU1",
|
||||
"fans": [
|
||||
{
|
||||
"name": "PSU1_FAN1"
|
||||
}
|
||||
],
|
||||
"thermals": [
|
||||
{
|
||||
"name": "PSU1_TEMP1"
|
||||
}
|
||||
]
|
||||
},
|
||||
{
|
||||
"name": "PSU2",
|
||||
"fans": [
|
||||
{
|
||||
"name": "PSU2_FAN1"
|
||||
}
|
||||
],
|
||||
"thermals": [
|
||||
{
|
||||
"name": "PSU2_TEMP1"
|
||||
}
|
||||
]
|
||||
}
|
||||
],
|
||||
"thermals": [
|
||||
{
|
||||
"name": "TEMP_MAC"
|
||||
},
|
||||
{
|
||||
"name": "TEMP_ENV_MACCASE"
|
||||
},
|
||||
{
|
||||
"name": "TEMP_ENV_SSDCASE"
|
||||
},
|
||||
{
|
||||
"name": "TEMP_ENV_PSUCASE"
|
||||
},
|
||||
{
|
||||
"name": "TEMP_ENV_BMC"
|
||||
},
|
||||
{
|
||||
"name": "TEMP_PSU0_TEMP1"
|
||||
},
|
||||
{
|
||||
"name": "TEMP_PSU1_TEMP1"
|
||||
}
|
||||
],
|
||||
"sfps": [
|
||||
{
|
||||
"name": "Ethernet0"
|
||||
},
|
||||
{
|
||||
"name": "Ethernet4"
|
||||
},
|
||||
{
|
||||
"name": "Ethernet8"
|
||||
},
|
||||
{
|
||||
"name": "Ethernet12"
|
||||
},
|
||||
{
|
||||
"name": "Ethernet16"
|
||||
},
|
||||
{
|
||||
"name": "Ethernet20"
|
||||
},
|
||||
{
|
||||
"name": "Ethernet24"
|
||||
},
|
||||
{
|
||||
"name": "Ethernet28"
|
||||
},
|
||||
{
|
||||
"name": "Ethernet32"
|
||||
},
|
||||
{
|
||||
"name": "Ethernet36"
|
||||
},
|
||||
{
|
||||
"name": "Ethernet40"
|
||||
},
|
||||
{
|
||||
"name": "Ethernet44"
|
||||
},
|
||||
{
|
||||
"name": "Ethernet48"
|
||||
},
|
||||
{
|
||||
"name": "Ethernet52"
|
||||
},
|
||||
{
|
||||
"name": "Ethernet56"
|
||||
},
|
||||
{
|
||||
"name": "Ethernet60"
|
||||
},
|
||||
{
|
||||
"name": "Ethernet64"
|
||||
},
|
||||
{
|
||||
"name": "Ethernet68"
|
||||
},
|
||||
{
|
||||
"name": "Ethernet72"
|
||||
},
|
||||
{
|
||||
"name": "Ethernet76"
|
||||
},
|
||||
{
|
||||
"name": "Ethernet80"
|
||||
},
|
||||
{
|
||||
"name": "Ethernet84"
|
||||
},
|
||||
{
|
||||
"name": "Ethernet88"
|
||||
},
|
||||
{
|
||||
"name": "Ethernet92"
|
||||
},
|
||||
{
|
||||
"name": "Ethernet96"
|
||||
},
|
||||
{
|
||||
"name": "Ethernet100"
|
||||
},
|
||||
{
|
||||
"name": "Ethernet104"
|
||||
},
|
||||
{
|
||||
"name": "Ethernet108"
|
||||
},
|
||||
{
|
||||
"name": "Ethernet112"
|
||||
},
|
||||
{
|
||||
"name": "Ethernet116"
|
||||
},
|
||||
{
|
||||
"name": "Ethernet120"
|
||||
},
|
||||
{
|
||||
"name": "Ethernet124"
|
||||
},
|
||||
{
|
||||
"name": "Ethernet128"
|
||||
}
|
||||
]
|
||||
},
|
||||
"interfaces": {
|
||||
"Ethernet0": {
|
||||
"index": "0,0,0,0",
|
||||
"lanes": "1,2,3,4",
|
||||
"breakout_modes": {
|
||||
"1x100G[40G]": ["Eth0(Port0)"],
|
||||
"2x50G": ["Eth0/1(Port0)", "Eth0/2(Port0)"],
|
||||
"4x25G": ["Eth0/1(Port0)", "Eth0/2(Port0)", "Eth0/3(Port0)", "Eth0/4(Port0)"],
|
||||
"4x10G": ["Eth0/1(Port0)", "Eth0/2(Port0)", "Eth0/3(Port0)", "Eth0/4(Port0)"]
|
||||
}
|
||||
},
|
||||
|
||||
"Ethernet4": {
|
||||
"index": "1,1,1,1",
|
||||
"lanes": "5,6,7,8",
|
||||
"breakout_modes": {
|
||||
"1x100G[40G]": ["Eth1(Port1)"],
|
||||
"2x50G": ["Eth1/1(Port1)", "Eth1/2(Port1)"],
|
||||
"4x25G": ["Eth1/1(Port1)", "Eth1/2(Port1)", "Eth1/3(Port1)", "Eth1/4(Port1)"],
|
||||
"4x10G": ["Eth1/1(Port1)", "Eth1/2(Port1)", "Eth1/3(Port1)", "Eth1/4(Port1)"]
|
||||
}
|
||||
},
|
||||
|
||||
"Ethernet8": {
|
||||
"index": "2,2,2,2",
|
||||
"lanes": "9,10,11,12",
|
||||
"breakout_modes": {
|
||||
"1x100G[40G]": ["Eth2(Port2)"],
|
||||
"2x50G": ["Eth2/1(Port2)", "Eth2/2(Port2)"],
|
||||
"4x25G": ["Eth2/1(Port2)", "Eth2/2(Port2)", "Eth2/3(Port2)", "Eth2/4(Port2)"],
|
||||
"4x10G": ["Eth2/1(Port2)", "Eth2/2(Port2)", "Eth2/3(Port2)", "Eth2/4(Port2)"]
|
||||
}
|
||||
},
|
||||
|
||||
"Ethernet12": {
|
||||
"index": "3,3,3,3",
|
||||
"lanes": "13,14,15,16",
|
||||
"breakout_modes": {
|
||||
"1x100G[40G]": ["Eth3(Port3)"],
|
||||
"2x50G": ["Eth3/1(Port3)", "Eth3/2(Port3)"],
|
||||
"4x25G": ["Eth3/1(Port3)", "Eth3/2(Port3)", "Eth3/3(Port3)", "Eth3/4(Port3)"],
|
||||
"4x10G": ["Eth3/1(Port3)", "Eth3/2(Port3)", "Eth3/3(Port3)", "Eth3/4(Port3)"]
|
||||
}
|
||||
},
|
||||
|
||||
"Ethernet16": {
|
||||
"index": "4,4,4,4",
|
||||
"lanes": "17,18,19,20",
|
||||
"breakout_modes": {
|
||||
"1x100G[40G]": ["Eth4(Port4)"],
|
||||
"2x50G": ["Eth4/1(Port4)", "Eth4/2(Port4)"],
|
||||
"4x25G": ["Eth4/1(Port4)", "Eth4/2(Port4)", "Eth4/3(Port4)", "Eth4/4(Port4)"],
|
||||
"4x10G": ["Eth4/1(Port4)", "Eth4/2(Port4)", "Eth4/3(Port4)", "Eth4/4(Port4)"]
|
||||
}
|
||||
},
|
||||
|
||||
"Ethernet20": {
|
||||
"index": "5,5,5,5",
|
||||
"lanes": "21,22,23,24",
|
||||
"breakout_modes": {
|
||||
"1x100G[40G]": ["Eth5(Port5)"],
|
||||
"2x50G": ["Eth5/1(Port5)", "Eth5/2(Port5)"],
|
||||
"4x25G": ["Eth5/1(Port5)", "Eth5/2(Port5)", "Eth5/3(Port5)", "Eth5/4(Port5)"],
|
||||
"4x10G": ["Eth5/1(Port5)", "Eth5/2(Port5)", "Eth5/3(Port5)", "Eth5/4(Port5)"]
|
||||
}
|
||||
},
|
||||
|
||||
"Ethernet24": {
|
||||
"index": "6,6,6,6",
|
||||
"lanes": "25,26,27,28",
|
||||
"breakout_modes": {
|
||||
"1x100G[40G]": ["Eth6(Port6)"],
|
||||
"2x50G": ["Eth6/1(Port6)", "Eth6/2(Port6)"],
|
||||
"4x25G": ["Eth6/1(Port6)", "Eth6/2(Port6)", "Eth6/3(Port6)", "Eth6/4(Port6)"],
|
||||
"4x10G": ["Eth6/1(Port6)", "Eth6/2(Port6)", "Eth6/3(Port6)", "Eth6/4(Port6)"]
|
||||
}
|
||||
},
|
||||
|
||||
"Ethernet28": {
|
||||
"index": "7,7,7,7",
|
||||
"lanes": "29,30,31,32",
|
||||
"breakout_modes": {
|
||||
"1x100G[40G]": ["Eth7(Port7)"],
|
||||
"2x50G": ["Eth7/1(Port7)", "Eth7/2(Port7)"],
|
||||
"4x25G": ["Eth7/1(Port7)", "Eth7/2(Port7)", "Eth7/3(Port7)", "Eth7/4(Port7)"],
|
||||
"4x10G": ["Eth7/1(Port7)", "Eth7/2(Port7)", "Eth7/3(Port7)", "Eth7/4(Port7)"]
|
||||
}
|
||||
},
|
||||
|
||||
"Ethernet32": {
|
||||
"index": "8,8,8,8",
|
||||
"lanes": "33,34,35,36",
|
||||
"breakout_modes": {
|
||||
"1x100G[40G]": ["Eth8(Port8)"],
|
||||
"2x50G": ["Eth8/1(Port8)", "Eth8/2(Port8)"],
|
||||
"4x25G": ["Eth8/1(Port8)", "Eth8/2(Port8)", "Eth8/3(Port8)", "Eth8/4(Port8)"],
|
||||
"4x10G": ["Eth8/1(Port8)", "Eth8/2(Port8)", "Eth8/3(Port8)", "Eth8/4(Port8)"]
|
||||
}
|
||||
},
|
||||
|
||||
"Ethernet36": {
|
||||
"index": "9,9,9,9",
|
||||
"lanes": "37,38,39,40",
|
||||
"breakout_modes": {
|
||||
"1x100G[40G]": ["Eth9(Port9)"],
|
||||
"2x50G": ["Eth9/1(Port9)", "Eth9/2(Port9)"],
|
||||
"4x25G": ["Eth9/1(Port9)", "Eth9/2(Port9)", "Eth9/3(Port9)", "Eth9/4(Port9)"],
|
||||
"4x10G": ["Eth9/1(Port9)", "Eth9/2(Port9)", "Eth9/3(Port9)", "Eth9/4(Port9)"]
|
||||
}
|
||||
},
|
||||
|
||||
"Ethernet40": {
|
||||
"index": "10,10,10,10",
|
||||
"lanes": "41,42,43,44",
|
||||
"breakout_modes": {
|
||||
"1x100G[40G]": ["Eth10(Port10)"],
|
||||
"2x50G": ["Eth10/1(Port10)", "Eth10/2(Port10)"],
|
||||
"4x25G": ["Eth10/1(Port10)", "Eth10/2(Port10)", "Eth10/3(Port10)", "Eth10/4(Port10)"],
|
||||
"4x10G": ["Eth10/1(Port10)", "Eth10/2(Port10)", "Eth10/3(Port10)", "Eth10/4(Port10)"]
|
||||
}
|
||||
},
|
||||
|
||||
"Ethernet44": {
|
||||
"index": "11,11,11,11",
|
||||
"lanes": "45,46,47,48",
|
||||
"breakout_modes": {
|
||||
"1x100G[40G]": ["Eth11(Port11)"],
|
||||
"2x50G": ["Eth11/1(Port11)", "Eth11/2(Port11)"],
|
||||
"4x25G": ["Eth11/1(Port11)", "Eth11/2(Port11)", "Eth11/3(Port11)", "Eth11/4(Port11)"],
|
||||
"4x10G": ["Eth11/1(Port11)", "Eth11/2(Port11)", "Eth11/3(Port11)", "Eth11/4(Port11)"]
|
||||
}
|
||||
},
|
||||
|
||||
"Ethernet48": {
|
||||
"index": "12,12,12,12",
|
||||
"lanes": "49,50,51,52",
|
||||
"breakout_modes": {
|
||||
"1x100G[40G]": ["Eth12(Port12)"],
|
||||
"2x50G": ["Eth12/1(Port12)", "Eth12/2(Port12)"],
|
||||
"4x25G": ["Eth12/1(Port12)", "Eth12/2(Port12)", "Eth12/3(Port12)", "Eth12/4(Port12)"],
|
||||
"4x10G": ["Eth12/1(Port12)", "Eth12/2(Port12)", "Eth12/3(Port12)", "Eth12/4(Port12)"]
|
||||
}
|
||||
},
|
||||
|
||||
"Ethernet52": {
|
||||
"index": "13,13,13,13",
|
||||
"lanes": "53,54,55,56",
|
||||
"breakout_modes": {
|
||||
"1x100G[40G]": ["Eth13(Port13)"],
|
||||
"2x50G": ["Eth13/1(Port13)", "Eth13/2(Port13)"],
|
||||
"4x25G": ["Eth13/1(Port13)", "Eth13/2(Port13)", "Eth13/3(Port13)", "Eth13/4(Port13)"],
|
||||
"4x10G": ["Eth13/1(Port13)", "Eth13/2(Port13)", "Eth13/3(Port13)", "Eth13/4(Port13)"]
|
||||
}
|
||||
},
|
||||
|
||||
"Ethernet56": {
|
||||
"index": "14,14,14,14",
|
||||
"lanes": "57,58,59,60",
|
||||
"breakout_modes": {
|
||||
"1x100G[40G]": ["Eth14(Port14)"],
|
||||
"2x50G": ["Eth14/1(Port14)", "Eth14/2(Port14)"],
|
||||
"4x25G": ["Eth14/1(Port14)", "Eth14/2(Port14)", "Eth14/3(Port14)", "Eth14/4(Port14)"],
|
||||
"4x10G": ["Eth14/1(Port14)", "Eth14/2(Port14)", "Eth14/3(Port14)", "Eth14/4(Port14)"]
|
||||
}
|
||||
},
|
||||
|
||||
"Ethernet60": {
|
||||
"index": "15,15,15,15",
|
||||
"lanes": "61,62,63,64",
|
||||
"breakout_modes": {
|
||||
"1x100G[40G]": ["Eth15(Port15)"],
|
||||
"2x50G": ["Eth15/1(Port15)", "Eth15/2(Port15)"],
|
||||
"4x25G": ["Eth15/1(Port15)", "Eth15/2(Port15)", "Eth15/3(Port15)", "Eth15/4(Port15)"],
|
||||
"4x10G": ["Eth15/1(Port15)", "Eth15/2(Port15)", "Eth15/3(Port15)", "Eth15/4(Port15)"]
|
||||
}
|
||||
},
|
||||
|
||||
"Ethernet64": {
|
||||
"index": "16,16,16,16",
|
||||
"lanes": "69,70,71,72",
|
||||
"breakout_modes": {
|
||||
"1x100G[40G]": ["Eth16(Port16)"],
|
||||
"2x50G": ["Eth16/1(Port16)", "Eth16/2(Port16)"],
|
||||
"4x25G": ["Eth16/1(Port16)", "Eth16/2(Port16)", "Eth16/3(Port16)", "Eth16/4(Port16)"],
|
||||
"4x10G": ["Eth16/1(Port16)", "Eth16/2(Port16)", "Eth16/3(Port16)", "Eth16/4(Port16)"]
|
||||
}
|
||||
},
|
||||
|
||||
"Ethernet68": {
|
||||
"index": "17,17,17,17",
|
||||
"lanes": "65,66,67,68",
|
||||
"breakout_modes": {
|
||||
"1x100G[40G]": ["Eth17(Port17)"],
|
||||
"2x50G": ["Eth17/1(Port17)", "Eth17/2(Port17)"],
|
||||
"4x25G": ["Eth17/1(Port17)", "Eth17/2(Port17)", "Eth17/3(Port17)", "Eth17/4(Port17)"],
|
||||
"4x10G": ["Eth17/1(Port17)", "Eth17/2(Port17)", "Eth17/3(Port17)", "Eth17/4(Port17)"]
|
||||
}
|
||||
},
|
||||
|
||||
"Ethernet72": {
|
||||
"index": "18,18,18,18",
|
||||
"lanes": "77,78,79,80",
|
||||
"breakout_modes": {
|
||||
"1x100G[40G]": ["Eth18(Port18)"],
|
||||
"2x50G": ["Eth18/1(Port18)", "Eth18/2(Port18)"],
|
||||
"4x25G": ["Eth18/1(Port18)", "Eth18/2(Port18)", "Eth18/3(Port18)", "Eth18/4(Port18)"],
|
||||
"4x10G": ["Eth18/1(Port18)", "Eth18/2(Port18)", "Eth18/3(Port18)", "Eth18/4(Port18)"]
|
||||
}
|
||||
},
|
||||
|
||||
"Ethernet76": {
|
||||
"index": "19,19,19,19",
|
||||
"lanes": "73,74,75,76",
|
||||
"breakout_modes": {
|
||||
"1x100G[40G]": ["Eth19(Port19)"],
|
||||
"2x50G": ["Eth19/1(Port19)", "Eth19/2(Port19)"],
|
||||
"4x25G": ["Eth19/1(Port19)", "Eth19/2(Port19)", "Eth19/3(Port19)", "Eth19/4(Port19)"],
|
||||
"4x10G": ["Eth19/1(Port19)", "Eth19/2(Port19)", "Eth19/3(Port19)", "Eth19/4(Port19)"]
|
||||
}
|
||||
},
|
||||
|
||||
"Ethernet80": {
|
||||
"index": "20,20,20,20",
|
||||
"lanes": "85,86,87,88",
|
||||
"breakout_modes": {
|
||||
"1x100G[40G]": ["Eth20(Port20)"],
|
||||
"2x50G": ["Eth20/1(Port20)", "Eth20/2(Port20)"],
|
||||
"4x25G": ["Eth20/1(Port20)", "Eth20/2(Port20)", "Eth20/3(Port20)", "Eth20/4(Port20)"],
|
||||
"4x10G": ["Eth20/1(Port20)", "Eth20/2(Port20)", "Eth20/3(Port20)", "Eth20/4(Port20)"]
|
||||
}
|
||||
},
|
||||
|
||||
"Ethernet84": {
|
||||
"index": "21,21,21,21",
|
||||
"lanes": "81,82,83,84",
|
||||
"breakout_modes": {
|
||||
"1x100G[40G]": ["Eth21(Port21)"],
|
||||
"2x50G": ["Eth21/1(Port21)", "Eth21/2(Port21)"],
|
||||
"4x25G": ["Eth21/1(Port21)", "Eth21/2(Port21)", "Eth21/3(Port21)", "Eth21/4(Port21)"],
|
||||
"4x10G": ["Eth21/1(Port21)", "Eth21/2(Port21)", "Eth21/3(Port21)", "Eth21/4(Port21)"]
|
||||
}
|
||||
},
|
||||
|
||||
"Ethernet88": {
|
||||
"index": "22,22,22,22",
|
||||
"lanes": "93,94,95,96",
|
||||
"breakout_modes": {
|
||||
"1x100G[40G]": ["Eth22(Port22)"],
|
||||
"2x50G": ["Eth22/1(Port22)", "Eth22/2(Port22)"],
|
||||
"4x25G": ["Eth22/1(Port22)", "Eth22/2(Port22)", "Eth22/3(Port22)", "Eth22/4(Port22)"],
|
||||
"4x10G": ["Eth22/1(Port22)", "Eth22/2(Port22)", "Eth22/3(Port22)", "Eth22/4(Port22)"]
|
||||
}
|
||||
},
|
||||
|
||||
"Ethernet92": {
|
||||
"index": "23,23,23,23",
|
||||
"lanes": "89,90,91,92",
|
||||
"breakout_modes": {
|
||||
"1x100G[40G]": ["Eth23(Port23)"],
|
||||
"2x50G": ["Eth23/1(Port23)", "Eth23/2(Port23)"],
|
||||
"4x25G": ["Eth23/1(Port23)", "Eth23/2(Port23)", "Eth23/3(Port23)", "Eth23/4(Port23)"],
|
||||
"4x10G": ["Eth23/1(Port23)", "Eth23/2(Port23)", "Eth23/3(Port23)", "Eth23/4(Port23)"]
|
||||
}
|
||||
},
|
||||
|
||||
"Ethernet96": {
|
||||
"index": "24,24,24,24",
|
||||
"lanes": "101,102,103,104",
|
||||
"breakout_modes": {
|
||||
"1x100G[40G]": ["Eth24(Port24)"],
|
||||
"2x50G": ["Eth24/1(Port24)", "Eth24/2(Port24)"],
|
||||
"4x25G": ["Eth24/1(Port24)", "Eth24/2(Port24)", "Eth24/3(Port24)", "Eth24/4(Port24)"],
|
||||
"4x10G": ["Eth24/1(Port24)", "Eth24/2(Port24)", "Eth24/3(Port24)", "Eth24/4(Port24)"]
|
||||
}
|
||||
},
|
||||
|
||||
"Ethernet100": {
|
||||
"index": "25,25,25,25",
|
||||
"lanes": "97,98,99,100",
|
||||
"breakout_modes": {
|
||||
"1x100G[40G]": ["Eth25(Port25)"],
|
||||
"2x50G": ["Eth25/1(Port25)", "Eth25/2(Port25)"],
|
||||
"4x25G": ["Eth25/1(Port25)", "Eth25/2(Port25)", "Eth25/3(Port25)", "Eth25/4(Port25)"],
|
||||
"4x10G": ["Eth25/1(Port25)", "Eth25/2(Port25)", "Eth25/3(Port25)", "Eth25/4(Port25)"]
|
||||
}
|
||||
},
|
||||
|
||||
"Ethernet104": {
|
||||
"index": "26,26,26,26",
|
||||
"lanes": "109,110,111,112",
|
||||
"breakout_modes": {
|
||||
"1x100G[40G]": ["Eth26(Port26)"],
|
||||
"2x50G": ["Eth26/1(Port26)", "Eth26/2(Port26)"],
|
||||
"4x25G": ["Eth26/1(Port26)", "Eth26/2(Port26)", "Eth26/3(Port26)", "Eth26/4(Port26)"],
|
||||
"4x10G": ["Eth26/1(Port26)", "Eth26/2(Port26)", "Eth26/3(Port26)", "Eth26/4(Port26)"]
|
||||
}
|
||||
},
|
||||
|
||||
"Ethernet108": {
|
||||
"index": "27,27,27,27",
|
||||
"lanes": "105,106,107,108",
|
||||
"breakout_modes": {
|
||||
"1x100G[40G]": ["Eth27(Port27)"],
|
||||
"2x50G": ["Eth27/1(Port27)", "Eth27/2(Port27)"],
|
||||
"4x25G": ["Eth27/1(Port27)", "Eth27/2(Port27)", "Eth27/3(Port27)", "Eth27/4(Port27)"],
|
||||
"4x10G": ["Eth27/1(Port27)", "Eth27/2(Port27)", "Eth27/3(Port27)", "Eth27/4(Port27)"]
|
||||
}
|
||||
},
|
||||
|
||||
"Ethernet112": {
|
||||
"index": "28,28,28,28",
|
||||
"lanes": "117,118,119,120",
|
||||
"breakout_modes": {
|
||||
"1x100G[40G]": ["Eth28(Port28)"],
|
||||
"2x50G": ["Eth28/1(Port28)", "Eth28/2(Port28)"],
|
||||
"4x25G": ["Eth28/1(Port28)", "Eth28/2(Port28)", "Eth28/3(Port28)", "Eth28/4(Port28)"],
|
||||
"4x10G": ["Eth28/1(Port28)", "Eth28/2(Port28)", "Eth28/3(Port28)", "Eth28/4(Port28)"]
|
||||
}
|
||||
},
|
||||
|
||||
"Ethernet116": {
|
||||
"index": "29,29,29,29",
|
||||
"lanes": "113,114,115,116",
|
||||
"breakout_modes": {
|
||||
"1x100G[40G]": ["Eth29(Port29)"],
|
||||
"2x50G": ["Eth29/1(Port29)", "Eth29/2(Port29)"],
|
||||
"4x25G": ["Eth29/1(Port29)", "Eth29/2(Port29)", "Eth29/3(Port29)", "Eth29/4(Port29)"],
|
||||
"4x10G": ["Eth29/1(Port29)", "Eth29/2(Port29)", "Eth29/3(Port29)", "Eth29/4(Port29)"]
|
||||
}
|
||||
},
|
||||
|
||||
"Ethernet120": {
|
||||
"index": "30,30,30,30",
|
||||
"lanes": "125,126,127,128",
|
||||
"breakout_modes": {
|
||||
"1x100G[40G]": ["Eth30(Port30)"],
|
||||
"2x50G": ["Eth30/1(Port30)", "Eth30/2(Port30)"],
|
||||
"4x25G": ["Eth30/1(Port30)", "Eth30/2(Port30)", "Eth30/3(Port30)", "Eth30/4(Port30)"],
|
||||
"4x10G": ["Eth30/1(Port30)", "Eth30/2(Port30)", "Eth30/3(Port30)", "Eth30/4(Port30)"]
|
||||
}
|
||||
},
|
||||
|
||||
"Ethernet124": {
|
||||
"index": "31,31,31,31",
|
||||
"lanes": "121,122,123,124",
|
||||
"breakout_modes": {
|
||||
"1x100G[40G]": ["Eth31(Port31)"],
|
||||
"2x50G": ["Eth31/1(Port31)", "Eth31/2(Port31)"],
|
||||
"4x25G": ["Eth31/1(Port31)", "Eth31/2(Port31)", "Eth31/3(Port31)", "Eth31/4(Port31)"],
|
||||
"4x10G": ["Eth31/1(Port31)", "Eth31/2(Port31)", "Eth31/3(Port31)", "Eth31/4(Port31)"]
|
||||
}
|
||||
},
|
||||
"Ethernet128": {
|
||||
"index": "32",
|
||||
"lanes": "129",
|
||||
"breakout_modes": {
|
||||
"1x10G": ["Eth32(Port32)"]
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
590
device/ufispace/x86_64-ufispace_s9110_32x-r0/platform-pvt.json
Normal file
590
device/ufispace/x86_64-ufispace_s9110_32x-r0/platform-pvt.json
Normal file
@ -0,0 +1,590 @@
|
||||
{
|
||||
"chassis": {
|
||||
"name": "S9110-32X",
|
||||
"components": [
|
||||
{
|
||||
"name": "CPLD1"
|
||||
},
|
||||
{
|
||||
"name": "CPLD2"
|
||||
},
|
||||
{
|
||||
"name": "BIOS"
|
||||
},
|
||||
{
|
||||
"name": "BMC"
|
||||
}
|
||||
],
|
||||
"fans": [
|
||||
{
|
||||
"name": "Fantray1_1"
|
||||
},
|
||||
{
|
||||
"name": "Fantray1_2"
|
||||
},
|
||||
{
|
||||
"name": "Fantray2_1"
|
||||
},
|
||||
{
|
||||
"name": "Fantray2_2"
|
||||
},
|
||||
{
|
||||
"name": "Fantray3_1"
|
||||
},
|
||||
{
|
||||
"name": "Fantray3_2"
|
||||
}
|
||||
],
|
||||
"fan_drawers":[
|
||||
{
|
||||
"name": "Fantray1",
|
||||
"num_fans" : 2,
|
||||
"fans": [
|
||||
{
|
||||
"name": "Fantray1_1"
|
||||
},
|
||||
{
|
||||
"name": "Fantray1_2"
|
||||
}
|
||||
]
|
||||
},
|
||||
{
|
||||
"name": "Fantray2",
|
||||
"num_fans" : 2,
|
||||
"fans": [
|
||||
{
|
||||
"name": "Fantray2_1"
|
||||
},
|
||||
{
|
||||
"name": "Fantray2_2"
|
||||
}
|
||||
]
|
||||
},
|
||||
{
|
||||
"name": "Fantray3",
|
||||
"num_fans" : 2,
|
||||
"fans": [
|
||||
{
|
||||
"name": "Fantray3_1"
|
||||
},
|
||||
{
|
||||
"name": "Fantray3_2"
|
||||
}
|
||||
]
|
||||
}
|
||||
],
|
||||
"psus": [
|
||||
{
|
||||
"name": "PSU1",
|
||||
"fans": [
|
||||
{
|
||||
"name": "PSU1_FAN1"
|
||||
}
|
||||
],
|
||||
"thermals": [
|
||||
{
|
||||
"name": "PSU1_TEMP1"
|
||||
}
|
||||
]
|
||||
},
|
||||
{
|
||||
"name": "PSU2",
|
||||
"fans": [
|
||||
{
|
||||
"name": "PSU2_FAN1"
|
||||
}
|
||||
],
|
||||
"thermals": [
|
||||
{
|
||||
"name": "PSU2_TEMP1"
|
||||
}
|
||||
]
|
||||
}
|
||||
],
|
||||
"thermals": [
|
||||
{
|
||||
"name": "TEMP_MAC"
|
||||
},
|
||||
{
|
||||
"name": "TEMP_ENV_MACCASE"
|
||||
},
|
||||
{
|
||||
"name": "TEMP_ENV_SSDCASE"
|
||||
},
|
||||
{
|
||||
"name": "TEMP_ENV_PSUCASE"
|
||||
},
|
||||
{
|
||||
"name": "TEMP_ENV_BMC"
|
||||
},
|
||||
{
|
||||
"name": "TEMP_PSU0_TEMP1"
|
||||
},
|
||||
{
|
||||
"name": "TEMP_PSU1_TEMP1"
|
||||
}
|
||||
],
|
||||
"sfps": [
|
||||
{
|
||||
"name": "Ethernet0"
|
||||
},
|
||||
{
|
||||
"name": "Ethernet4"
|
||||
},
|
||||
{
|
||||
"name": "Ethernet8"
|
||||
},
|
||||
{
|
||||
"name": "Ethernet12"
|
||||
},
|
||||
{
|
||||
"name": "Ethernet16"
|
||||
},
|
||||
{
|
||||
"name": "Ethernet20"
|
||||
},
|
||||
{
|
||||
"name": "Ethernet24"
|
||||
},
|
||||
{
|
||||
"name": "Ethernet28"
|
||||
},
|
||||
{
|
||||
"name": "Ethernet32"
|
||||
},
|
||||
{
|
||||
"name": "Ethernet36"
|
||||
},
|
||||
{
|
||||
"name": "Ethernet40"
|
||||
},
|
||||
{
|
||||
"name": "Ethernet44"
|
||||
},
|
||||
{
|
||||
"name": "Ethernet48"
|
||||
},
|
||||
{
|
||||
"name": "Ethernet52"
|
||||
},
|
||||
{
|
||||
"name": "Ethernet56"
|
||||
},
|
||||
{
|
||||
"name": "Ethernet60"
|
||||
},
|
||||
{
|
||||
"name": "Ethernet64"
|
||||
},
|
||||
{
|
||||
"name": "Ethernet68"
|
||||
},
|
||||
{
|
||||
"name": "Ethernet72"
|
||||
},
|
||||
{
|
||||
"name": "Ethernet76"
|
||||
},
|
||||
{
|
||||
"name": "Ethernet80"
|
||||
},
|
||||
{
|
||||
"name": "Ethernet84"
|
||||
},
|
||||
{
|
||||
"name": "Ethernet88"
|
||||
},
|
||||
{
|
||||
"name": "Ethernet92"
|
||||
},
|
||||
{
|
||||
"name": "Ethernet96"
|
||||
},
|
||||
{
|
||||
"name": "Ethernet100"
|
||||
},
|
||||
{
|
||||
"name": "Ethernet104"
|
||||
},
|
||||
{
|
||||
"name": "Ethernet108"
|
||||
},
|
||||
{
|
||||
"name": "Ethernet112"
|
||||
},
|
||||
{
|
||||
"name": "Ethernet116"
|
||||
},
|
||||
{
|
||||
"name": "Ethernet120"
|
||||
},
|
||||
{
|
||||
"name": "Ethernet124"
|
||||
},
|
||||
{
|
||||
"name": "Ethernet128"
|
||||
}
|
||||
]
|
||||
},
|
||||
"interfaces": {
|
||||
"Ethernet0": {
|
||||
"index": "0,0,0,0",
|
||||
"lanes": "1,2,3,4",
|
||||
"breakout_modes": {
|
||||
"1x100G[40G]": ["Eth0(Port0)"],
|
||||
"2x50G": ["Eth0/1(Port0)", "Eth0/2(Port0)"],
|
||||
"4x25G": ["Eth0/1(Port0)", "Eth0/2(Port0)", "Eth0/3(Port0)", "Eth0/4(Port0)"],
|
||||
"4x10G": ["Eth0/1(Port0)", "Eth0/2(Port0)", "Eth0/3(Port0)", "Eth0/4(Port0)"]
|
||||
}
|
||||
},
|
||||
|
||||
"Ethernet4": {
|
||||
"index": "1,1,1,1",
|
||||
"lanes": "5,6,7,8",
|
||||
"breakout_modes": {
|
||||
"1x100G[40G]": ["Eth1(Port1)"],
|
||||
"2x50G": ["Eth1/1(Port1)", "Eth1/2(Port1)"],
|
||||
"4x25G": ["Eth1/1(Port1)", "Eth1/2(Port1)", "Eth1/3(Port1)", "Eth1/4(Port1)"],
|
||||
"4x10G": ["Eth1/1(Port1)", "Eth1/2(Port1)", "Eth1/3(Port1)", "Eth1/4(Port1)"]
|
||||
}
|
||||
},
|
||||
|
||||
"Ethernet8": {
|
||||
"index": "2,2,2,2",
|
||||
"lanes": "9,10,11,12",
|
||||
"breakout_modes": {
|
||||
"1x100G[40G]": ["Eth2(Port2)"],
|
||||
"2x50G": ["Eth2/1(Port2)", "Eth2/2(Port2)"],
|
||||
"4x25G": ["Eth2/1(Port2)", "Eth2/2(Port2)", "Eth2/3(Port2)", "Eth2/4(Port2)"],
|
||||
"4x10G": ["Eth2/1(Port2)", "Eth2/2(Port2)", "Eth2/3(Port2)", "Eth2/4(Port2)"]
|
||||
}
|
||||
},
|
||||
|
||||
"Ethernet12": {
|
||||
"index": "3,3,3,3",
|
||||
"lanes": "13,14,15,16",
|
||||
"breakout_modes": {
|
||||
"1x100G[40G]": ["Eth3(Port3)"],
|
||||
"2x50G": ["Eth3/1(Port3)", "Eth3/2(Port3)"],
|
||||
"4x25G": ["Eth3/1(Port3)", "Eth3/2(Port3)", "Eth3/3(Port3)", "Eth3/4(Port3)"],
|
||||
"4x10G": ["Eth3/1(Port3)", "Eth3/2(Port3)", "Eth3/3(Port3)", "Eth3/4(Port3)"]
|
||||
}
|
||||
},
|
||||
|
||||
"Ethernet16": {
|
||||
"index": "4,4,4,4",
|
||||
"lanes": "17,18,19,20",
|
||||
"breakout_modes": {
|
||||
"1x100G[40G]": ["Eth4(Port4)"],
|
||||
"2x50G": ["Eth4/1(Port4)", "Eth4/2(Port4)"],
|
||||
"4x25G": ["Eth4/1(Port4)", "Eth4/2(Port4)", "Eth4/3(Port4)", "Eth4/4(Port4)"],
|
||||
"4x10G": ["Eth4/1(Port4)", "Eth4/2(Port4)", "Eth4/3(Port4)", "Eth4/4(Port4)"]
|
||||
}
|
||||
},
|
||||
|
||||
"Ethernet20": {
|
||||
"index": "5,5,5,5",
|
||||
"lanes": "21,22,23,24",
|
||||
"breakout_modes": {
|
||||
"1x100G[40G]": ["Eth5(Port5)"],
|
||||
"2x50G": ["Eth5/1(Port5)", "Eth5/2(Port5)"],
|
||||
"4x25G": ["Eth5/1(Port5)", "Eth5/2(Port5)", "Eth5/3(Port5)", "Eth5/4(Port5)"],
|
||||
"4x10G": ["Eth5/1(Port5)", "Eth5/2(Port5)", "Eth5/3(Port5)", "Eth5/4(Port5)"]
|
||||
}
|
||||
},
|
||||
|
||||
"Ethernet24": {
|
||||
"index": "6,6,6,6",
|
||||
"lanes": "25,26,27,28",
|
||||
"breakout_modes": {
|
||||
"1x100G[40G]": ["Eth6(Port6)"],
|
||||
"2x50G": ["Eth6/1(Port6)", "Eth6/2(Port6)"],
|
||||
"4x25G": ["Eth6/1(Port6)", "Eth6/2(Port6)", "Eth6/3(Port6)", "Eth6/4(Port6)"],
|
||||
"4x10G": ["Eth6/1(Port6)", "Eth6/2(Port6)", "Eth6/3(Port6)", "Eth6/4(Port6)"]
|
||||
}
|
||||
},
|
||||
|
||||
"Ethernet28": {
|
||||
"index": "7,7,7,7",
|
||||
"lanes": "29,30,31,32",
|
||||
"breakout_modes": {
|
||||
"1x100G[40G]": ["Eth7(Port7)"],
|
||||
"2x50G": ["Eth7/1(Port7)", "Eth7/2(Port7)"],
|
||||
"4x25G": ["Eth7/1(Port7)", "Eth7/2(Port7)", "Eth7/3(Port7)", "Eth7/4(Port7)"],
|
||||
"4x10G": ["Eth7/1(Port7)", "Eth7/2(Port7)", "Eth7/3(Port7)", "Eth7/4(Port7)"]
|
||||
}
|
||||
},
|
||||
|
||||
"Ethernet32": {
|
||||
"index": "8,8,8,8",
|
||||
"lanes": "33,34,35,36",
|
||||
"breakout_modes": {
|
||||
"1x100G[40G]": ["Eth8(Port8)"],
|
||||
"2x50G": ["Eth8/1(Port8)", "Eth8/2(Port8)"],
|
||||
"4x25G": ["Eth8/1(Port8)", "Eth8/2(Port8)", "Eth8/3(Port8)", "Eth8/4(Port8)"],
|
||||
"4x10G": ["Eth8/1(Port8)", "Eth8/2(Port8)", "Eth8/3(Port8)", "Eth8/4(Port8)"]
|
||||
}
|
||||
},
|
||||
|
||||
"Ethernet36": {
|
||||
"index": "9,9,9,9",
|
||||
"lanes": "37,38,39,40",
|
||||
"breakout_modes": {
|
||||
"1x100G[40G]": ["Eth9(Port9)"],
|
||||
"2x50G": ["Eth9/1(Port9)", "Eth9/2(Port9)"],
|
||||
"4x25G": ["Eth9/1(Port9)", "Eth9/2(Port9)", "Eth9/3(Port9)", "Eth9/4(Port9)"],
|
||||
"4x10G": ["Eth9/1(Port9)", "Eth9/2(Port9)", "Eth9/3(Port9)", "Eth9/4(Port9)"]
|
||||
}
|
||||
},
|
||||
|
||||
"Ethernet40": {
|
||||
"index": "10,10,10,10",
|
||||
"lanes": "41,42,43,44",
|
||||
"breakout_modes": {
|
||||
"1x100G[40G]": ["Eth10(Port10)"],
|
||||
"2x50G": ["Eth10/1(Port10)", "Eth10/2(Port10)"],
|
||||
"4x25G": ["Eth10/1(Port10)", "Eth10/2(Port10)", "Eth10/3(Port10)", "Eth10/4(Port10)"],
|
||||
"4x10G": ["Eth10/1(Port10)", "Eth10/2(Port10)", "Eth10/3(Port10)", "Eth10/4(Port10)"]
|
||||
}
|
||||
},
|
||||
|
||||
"Ethernet44": {
|
||||
"index": "11,11,11,11",
|
||||
"lanes": "45,46,47,48",
|
||||
"breakout_modes": {
|
||||
"1x100G[40G]": ["Eth11(Port11)"],
|
||||
"2x50G": ["Eth11/1(Port11)", "Eth11/2(Port11)"],
|
||||
"4x25G": ["Eth11/1(Port11)", "Eth11/2(Port11)", "Eth11/3(Port11)", "Eth11/4(Port11)"],
|
||||
"4x10G": ["Eth11/1(Port11)", "Eth11/2(Port11)", "Eth11/3(Port11)", "Eth11/4(Port11)"]
|
||||
}
|
||||
},
|
||||
|
||||
"Ethernet48": {
|
||||
"index": "12,12,12,12",
|
||||
"lanes": "49,50,51,52",
|
||||
"breakout_modes": {
|
||||
"1x100G[40G]": ["Eth12(Port12)"],
|
||||
"2x50G": ["Eth12/1(Port12)", "Eth12/2(Port12)"],
|
||||
"4x25G": ["Eth12/1(Port12)", "Eth12/2(Port12)", "Eth12/3(Port12)", "Eth12/4(Port12)"],
|
||||
"4x10G": ["Eth12/1(Port12)", "Eth12/2(Port12)", "Eth12/3(Port12)", "Eth12/4(Port12)"]
|
||||
}
|
||||
},
|
||||
|
||||
"Ethernet52": {
|
||||
"index": "13,13,13,13",
|
||||
"lanes": "53,54,55,56",
|
||||
"breakout_modes": {
|
||||
"1x100G[40G]": ["Eth13(Port13)"],
|
||||
"2x50G": ["Eth13/1(Port13)", "Eth13/2(Port13)"],
|
||||
"4x25G": ["Eth13/1(Port13)", "Eth13/2(Port13)", "Eth13/3(Port13)", "Eth13/4(Port13)"],
|
||||
"4x10G": ["Eth13/1(Port13)", "Eth13/2(Port13)", "Eth13/3(Port13)", "Eth13/4(Port13)"]
|
||||
}
|
||||
},
|
||||
|
||||
"Ethernet56": {
|
||||
"index": "14,14,14,14",
|
||||
"lanes": "57,58,59,60",
|
||||
"breakout_modes": {
|
||||
"1x100G[40G]": ["Eth14(Port14)"],
|
||||
"2x50G": ["Eth14/1(Port14)", "Eth14/2(Port14)"],
|
||||
"4x25G": ["Eth14/1(Port14)", "Eth14/2(Port14)", "Eth14/3(Port14)", "Eth14/4(Port14)"],
|
||||
"4x10G": ["Eth14/1(Port14)", "Eth14/2(Port14)", "Eth14/3(Port14)", "Eth14/4(Port14)"]
|
||||
}
|
||||
},
|
||||
|
||||
"Ethernet60": {
|
||||
"index": "15,15,15,15",
|
||||
"lanes": "61,62,63,64",
|
||||
"breakout_modes": {
|
||||
"1x100G[40G]": ["Eth15(Port15)"],
|
||||
"2x50G": ["Eth15/1(Port15)", "Eth15/2(Port15)"],
|
||||
"4x25G": ["Eth15/1(Port15)", "Eth15/2(Port15)", "Eth15/3(Port15)", "Eth15/4(Port15)"],
|
||||
"4x10G": ["Eth15/1(Port15)", "Eth15/2(Port15)", "Eth15/3(Port15)", "Eth15/4(Port15)"]
|
||||
}
|
||||
},
|
||||
|
||||
"Ethernet64": {
|
||||
"index": "16,16,16,16",
|
||||
"lanes": "69,70,71,72",
|
||||
"breakout_modes": {
|
||||
"1x100G[40G]": ["Eth16(Port16)"],
|
||||
"2x50G": ["Eth16/1(Port16)", "Eth16/2(Port16)"],
|
||||
"4x25G": ["Eth16/1(Port16)", "Eth16/2(Port16)", "Eth16/3(Port16)", "Eth16/4(Port16)"],
|
||||
"4x10G": ["Eth16/1(Port16)", "Eth16/2(Port16)", "Eth16/3(Port16)", "Eth16/4(Port16)"]
|
||||
}
|
||||
},
|
||||
|
||||
"Ethernet68": {
|
||||
"index": "17,17,17,17",
|
||||
"lanes": "65,66,67,68",
|
||||
"breakout_modes": {
|
||||
"1x100G[40G]": ["Eth17(Port17)"],
|
||||
"2x50G": ["Eth17/1(Port17)", "Eth17/2(Port17)"],
|
||||
"4x25G": ["Eth17/1(Port17)", "Eth17/2(Port17)", "Eth17/3(Port17)", "Eth17/4(Port17)"],
|
||||
"4x10G": ["Eth17/1(Port17)", "Eth17/2(Port17)", "Eth17/3(Port17)", "Eth17/4(Port17)"]
|
||||
}
|
||||
},
|
||||
|
||||
"Ethernet72": {
|
||||
"index": "18,18,18,18",
|
||||
"lanes": "77,78,79,80",
|
||||
"breakout_modes": {
|
||||
"1x100G[40G]": ["Eth18(Port18)"],
|
||||
"2x50G": ["Eth18/1(Port18)", "Eth18/2(Port18)"],
|
||||
"4x25G": ["Eth18/1(Port18)", "Eth18/2(Port18)", "Eth18/3(Port18)", "Eth18/4(Port18)"],
|
||||
"4x10G": ["Eth18/1(Port18)", "Eth18/2(Port18)", "Eth18/3(Port18)", "Eth18/4(Port18)"]
|
||||
}
|
||||
},
|
||||
|
||||
"Ethernet76": {
|
||||
"index": "19,19,19,19",
|
||||
"lanes": "73,74,75,76",
|
||||
"breakout_modes": {
|
||||
"1x100G[40G]": ["Eth19(Port19)"],
|
||||
"2x50G": ["Eth19/1(Port19)", "Eth19/2(Port19)"],
|
||||
"4x25G": ["Eth19/1(Port19)", "Eth19/2(Port19)", "Eth19/3(Port19)", "Eth19/4(Port19)"],
|
||||
"4x10G": ["Eth19/1(Port19)", "Eth19/2(Port19)", "Eth19/3(Port19)", "Eth19/4(Port19)"]
|
||||
}
|
||||
},
|
||||
|
||||
"Ethernet80": {
|
||||
"index": "20,20,20,20",
|
||||
"lanes": "85,86,87,88",
|
||||
"breakout_modes": {
|
||||
"1x100G[40G]": ["Eth20(Port20)"],
|
||||
"2x50G": ["Eth20/1(Port20)", "Eth20/2(Port20)"],
|
||||
"4x25G": ["Eth20/1(Port20)", "Eth20/2(Port20)", "Eth20/3(Port20)", "Eth20/4(Port20)"],
|
||||
"4x10G": ["Eth20/1(Port20)", "Eth20/2(Port20)", "Eth20/3(Port20)", "Eth20/4(Port20)"]
|
||||
}
|
||||
},
|
||||
|
||||
"Ethernet84": {
|
||||
"index": "21,21,21,21",
|
||||
"lanes": "81,82,83,84",
|
||||
"breakout_modes": {
|
||||
"1x100G[40G]": ["Eth21(Port21)"],
|
||||
"2x50G": ["Eth21/1(Port21)", "Eth21/2(Port21)"],
|
||||
"4x25G": ["Eth21/1(Port21)", "Eth21/2(Port21)", "Eth21/3(Port21)", "Eth21/4(Port21)"],
|
||||
"4x10G": ["Eth21/1(Port21)", "Eth21/2(Port21)", "Eth21/3(Port21)", "Eth21/4(Port21)"]
|
||||
}
|
||||
},
|
||||
|
||||
"Ethernet88": {
|
||||
"index": "22,22,22,22",
|
||||
"lanes": "93,94,95,96",
|
||||
"breakout_modes": {
|
||||
"1x100G[40G]": ["Eth22(Port22)"],
|
||||
"2x50G": ["Eth22/1(Port22)", "Eth22/2(Port22)"],
|
||||
"4x25G": ["Eth22/1(Port22)", "Eth22/2(Port22)", "Eth22/3(Port22)", "Eth22/4(Port22)"],
|
||||
"4x10G": ["Eth22/1(Port22)", "Eth22/2(Port22)", "Eth22/3(Port22)", "Eth22/4(Port22)"]
|
||||
}
|
||||
},
|
||||
|
||||
"Ethernet92": {
|
||||
"index": "23,23,23,23",
|
||||
"lanes": "89,90,91,92",
|
||||
"breakout_modes": {
|
||||
"1x100G[40G]": ["Eth23(Port23)"],
|
||||
"2x50G": ["Eth23/1(Port23)", "Eth23/2(Port23)"],
|
||||
"4x25G": ["Eth23/1(Port23)", "Eth23/2(Port23)", "Eth23/3(Port23)", "Eth23/4(Port23)"],
|
||||
"4x10G": ["Eth23/1(Port23)", "Eth23/2(Port23)", "Eth23/3(Port23)", "Eth23/4(Port23)"]
|
||||
}
|
||||
},
|
||||
|
||||
"Ethernet96": {
|
||||
"index": "24,24,24,24",
|
||||
"lanes": "101,102,103,104",
|
||||
"breakout_modes": {
|
||||
"1x100G[40G]": ["Eth24(Port24)"],
|
||||
"2x50G": ["Eth24/1(Port24)", "Eth24/2(Port24)"],
|
||||
"4x25G": ["Eth24/1(Port24)", "Eth24/2(Port24)", "Eth24/3(Port24)", "Eth24/4(Port24)"],
|
||||
"4x10G": ["Eth24/1(Port24)", "Eth24/2(Port24)", "Eth24/3(Port24)", "Eth24/4(Port24)"]
|
||||
}
|
||||
},
|
||||
|
||||
"Ethernet100": {
|
||||
"index": "25,25,25,25",
|
||||
"lanes": "97,98,99,100",
|
||||
"breakout_modes": {
|
||||
"1x100G[40G]": ["Eth25(Port25)"],
|
||||
"2x50G": ["Eth25/1(Port25)", "Eth25/2(Port25)"],
|
||||
"4x25G": ["Eth25/1(Port25)", "Eth25/2(Port25)", "Eth25/3(Port25)", "Eth25/4(Port25)"],
|
||||
"4x10G": ["Eth25/1(Port25)", "Eth25/2(Port25)", "Eth25/3(Port25)", "Eth25/4(Port25)"]
|
||||
}
|
||||
},
|
||||
|
||||
"Ethernet104": {
|
||||
"index": "26,26,26,26",
|
||||
"lanes": "109,110,111,112",
|
||||
"breakout_modes": {
|
||||
"1x100G[40G]": ["Eth26(Port26)"],
|
||||
"2x50G": ["Eth26/1(Port26)", "Eth26/2(Port26)"],
|
||||
"4x25G": ["Eth26/1(Port26)", "Eth26/2(Port26)", "Eth26/3(Port26)", "Eth26/4(Port26)"],
|
||||
"4x10G": ["Eth26/1(Port26)", "Eth26/2(Port26)", "Eth26/3(Port26)", "Eth26/4(Port26)"]
|
||||
}
|
||||
},
|
||||
|
||||
"Ethernet108": {
|
||||
"index": "27,27,27,27",
|
||||
"lanes": "105,106,107,108",
|
||||
"breakout_modes": {
|
||||
"1x100G[40G]": ["Eth27(Port27)"],
|
||||
"2x50G": ["Eth27/1(Port27)", "Eth27/2(Port27)"],
|
||||
"4x25G": ["Eth27/1(Port27)", "Eth27/2(Port27)", "Eth27/3(Port27)", "Eth27/4(Port27)"],
|
||||
"4x10G": ["Eth27/1(Port27)", "Eth27/2(Port27)", "Eth27/3(Port27)", "Eth27/4(Port27)"]
|
||||
}
|
||||
},
|
||||
|
||||
"Ethernet112": {
|
||||
"index": "28,28,28,28",
|
||||
"lanes": "117,118,119,120",
|
||||
"breakout_modes": {
|
||||
"1x100G[40G]": ["Eth28(Port28)"],
|
||||
"2x50G": ["Eth28/1(Port28)", "Eth28/2(Port28)"],
|
||||
"4x25G": ["Eth28/1(Port28)", "Eth28/2(Port28)", "Eth28/3(Port28)", "Eth28/4(Port28)"],
|
||||
"4x10G": ["Eth28/1(Port28)", "Eth28/2(Port28)", "Eth28/3(Port28)", "Eth28/4(Port28)"]
|
||||
}
|
||||
},
|
||||
|
||||
"Ethernet116": {
|
||||
"index": "29,29,29,29",
|
||||
"lanes": "113,114,115,116",
|
||||
"breakout_modes": {
|
||||
"1x100G[40G]": ["Eth29(Port29)"],
|
||||
"2x50G": ["Eth29/1(Port29)", "Eth29/2(Port29)"],
|
||||
"4x25G": ["Eth29/1(Port29)", "Eth29/2(Port29)", "Eth29/3(Port29)", "Eth29/4(Port29)"],
|
||||
"4x10G": ["Eth29/1(Port29)", "Eth29/2(Port29)", "Eth29/3(Port29)", "Eth29/4(Port29)"]
|
||||
}
|
||||
},
|
||||
|
||||
"Ethernet120": {
|
||||
"index": "30,30,30,30",
|
||||
"lanes": "125,126,127,128",
|
||||
"breakout_modes": {
|
||||
"1x100G[40G]": ["Eth30(Port30)"],
|
||||
"2x50G": ["Eth30/1(Port30)", "Eth30/2(Port30)"],
|
||||
"4x25G": ["Eth30/1(Port30)", "Eth30/2(Port30)", "Eth30/3(Port30)", "Eth30/4(Port30)"],
|
||||
"4x10G": ["Eth30/1(Port30)", "Eth30/2(Port30)", "Eth30/3(Port30)", "Eth30/4(Port30)"]
|
||||
}
|
||||
},
|
||||
|
||||
"Ethernet124": {
|
||||
"index": "31,31,31,31",
|
||||
"lanes": "121,122,123,124",
|
||||
"breakout_modes": {
|
||||
"1x100G[40G]": ["Eth31(Port31)"],
|
||||
"2x50G": ["Eth31/1(Port31)", "Eth31/2(Port31)"],
|
||||
"4x25G": ["Eth31/1(Port31)", "Eth31/2(Port31)", "Eth31/3(Port31)", "Eth31/4(Port31)"],
|
||||
"4x10G": ["Eth31/1(Port31)", "Eth31/2(Port31)", "Eth31/3(Port31)", "Eth31/4(Port31)"]
|
||||
}
|
||||
},
|
||||
"Ethernet128": {
|
||||
"index": "32",
|
||||
"lanes": "129",
|
||||
"breakout_modes": {
|
||||
"1x10G": ["Eth32(Port32)"]
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
1
device/ufispace/x86_64-ufispace_s9110_32x-r0/platform.json
Symbolic link
1
device/ufispace/x86_64-ufispace_s9110_32x-r0/platform.json
Symbolic link
@ -0,0 +1 @@
|
||||
platform-pvt.json
|
||||
@ -0,0 +1 @@
|
||||
broadcom
|
||||
@ -0,0 +1,12 @@
|
||||
{
|
||||
"chassis": {
|
||||
"x86_64-ufispace_s9110_32x-r0": {
|
||||
"component": {
|
||||
"CPLD1": { },
|
||||
"CPLD2": { },
|
||||
"BIOS": { },
|
||||
"BMC": {}
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
@ -0,0 +1 @@
|
||||
SYNCD_SHM_SIZE=256m
|
||||
@ -0,0 +1,9 @@
|
||||
{
|
||||
"skip_pcied": false,
|
||||
"skip_fancontrol": false,
|
||||
"skip_thermalctld": false,
|
||||
"skip_ledd": true,
|
||||
"skip_xcvrd": false,
|
||||
"skip_psud": false,
|
||||
"skip_syseepromd": false
|
||||
}
|
||||
@ -0,0 +1 @@
|
||||
# libsensors configuration file
|
||||
@ -0,0 +1,15 @@
|
||||
{
|
||||
"services_to_ignore": [],
|
||||
"devices_to_ignore": [
|
||||
"asic",
|
||||
"psu",
|
||||
"fan"
|
||||
],
|
||||
"user_defined_checkers": [],
|
||||
"polling_interval": 60,
|
||||
"led_color": {
|
||||
"fault": "yellow_blink",
|
||||
"normal": "green",
|
||||
"booting": "green_blink"
|
||||
}
|
||||
}
|
||||
@ -82,7 +82,11 @@ $(SONIC_ONE_IMAGE)_LAZY_INSTALLS += $(DELL_S6000_PLATFORM_MODULE) \
|
||||
$(NOKIA_IXR7250_PLATFORM_MODULE) \
|
||||
$(TENCENT_TCS8400_PLATFORM_MODULE) \
|
||||
$(TENCENT_TCS9400_PLATFORM_MODULE) \
|
||||
$(UFISPACE_S9300_32D_PLATFORM_MODULE)
|
||||
$(UFISPACE_S9300_32D_PLATFORM_MODULE) \
|
||||
$(UFISPACE_S9110_32X_PLATFORM_MODULE) \
|
||||
$(UFISPACE_S8901_54XC_PLATFORM_MODULE) \
|
||||
$(UFISPACE_S7801_54XS_PLATFORM_MODULE) \
|
||||
$(UFISPACE_S6301_56ST_PLATFORM_MODULE)
|
||||
|
||||
$(SONIC_ONE_IMAGE)_LAZY_BUILD_INSTALLS = $(BRCM_OPENNSL_KERNEL) $(BRCM_DNX_OPENNSL_KERNEL)
|
||||
ifeq ($(INSTALL_DEBUG_TOOLS),y)
|
||||
|
||||
@ -1,8 +1,16 @@
|
||||
# UfiSpace Platform modules
|
||||
|
||||
UFISPACE_S9300_32D_PLATFORM_MODULE_VERSION = 1.0.0
|
||||
UFISPACE_S9110_32X_PLATFORM_MODULE_VERSION = 1.0.0
|
||||
UFISPACE_S8901_54XC_PLATFORM_MODULE_VERSION = 1.0.0
|
||||
UFISPACE_S7801_54XS_PLATFORM_MODULE_VERSION = 1.0.0
|
||||
UFISPACE_S6301_56ST_PLATFORM_MODULE_VERSION = 1.0.0
|
||||
|
||||
export UFISPACE_S9300_32D_PLATFORM_MODULE_VERSION
|
||||
export UFISPACE_S9110_32X_PLATFORM_MODULE_VERSION
|
||||
export UFISPACE_S8901_54XC_PLATFORM_MODULE_VERSION
|
||||
export UFISPACE_S7801_54XS_PLATFORM_MODULE_VERSION
|
||||
export UFISPACE_S6301_56ST_PLATFORM_MODULE_VERSION
|
||||
|
||||
UFISPACE_S9300_32D_PLATFORM_MODULE = sonic-platform-ufispace-s9300-32d_$(UFISPACE_S9300_32D_PLATFORM_MODULE_VERSION)_amd64.deb
|
||||
$(UFISPACE_S9300_32D_PLATFORM_MODULE)_SRC_PATH = $(PLATFORM_PATH)/sonic-platform-modules-ufispace
|
||||
@ -10,3 +18,18 @@ $(UFISPACE_S9300_32D_PLATFORM_MODULE)_DEPENDS += $(LINUX_HEADERS) $(LINUX_HEADER
|
||||
$(UFISPACE_S9300_32D_PLATFORM_MODULE)_PLATFORM = x86_64-ufispace_s9300_32d-r0
|
||||
SONIC_DPKG_DEBS += $(UFISPACE_S9300_32D_PLATFORM_MODULE)
|
||||
|
||||
UFISPACE_S9110_32X_PLATFORM_MODULE = sonic-platform-ufispace-s9110-32x_$(UFISPACE_S9110_32X_PLATFORM_MODULE_VERSION)_amd64.deb
|
||||
$(UFISPACE_S9110_32X_PLATFORM_MODULE)_PLATFORM = x86_64-ufispace_s9110_32x-r0
|
||||
$(eval $(call add_extra_package,$(UFISPACE_S9300_32D_PLATFORM_MODULE),$(UFISPACE_S9110_32X_PLATFORM_MODULE)))
|
||||
|
||||
UFISPACE_S8901_54XC_PLATFORM_MODULE = sonic-platform-ufispace-s8901-54xc_$(UFISPACE_S8901_54XC_PLATFORM_MODULE_VERSION)_amd64.deb
|
||||
$(UFISPACE_S8901_54XC_PLATFORM_MODULE)_PLATFORM = x86_64-ufispace_s8901_54xc-r0
|
||||
$(eval $(call add_extra_package,$(UFISPACE_S9300_32D_PLATFORM_MODULE),$(UFISPACE_S8901_54XC_PLATFORM_MODULE)))
|
||||
|
||||
UFISPACE_S7801_54XS_PLATFORM_MODULE = sonic-platform-ufispace-s7801-54xs_$(UFISPACE_S7801_54XS_PLATFORM_MODULE_VERSION)_amd64.deb
|
||||
$(UFISPACE_S7801_54XS_PLATFORM_MODULE)_PLATFORM = x86_64-ufispace_s7801_54xs-r0
|
||||
$(eval $(call add_extra_package,$(UFISPACE_S9300_32D_PLATFORM_MODULE),$(UFISPACE_S7801_54XS_PLATFORM_MODULE)))
|
||||
|
||||
UFISPACE_S6301_56ST_PLATFORM_MODULE = sonic-platform-ufispace-s6301-56st_$(UFISPACE_S6301_56ST_PLATFORM_MODULE_VERSION)_amd64.deb
|
||||
$(UFISPACE_S6301_56ST_PLATFORM_MODULE)_PLATFORM = x86_64-ufispace_s6301_56st-r0
|
||||
$(eval $(call add_extra_package,$(UFISPACE_S9300_32D_PLATFORM_MODULE),$(UFISPACE_S6301_56ST_PLATFORM_MODULE)))
|
||||
@ -1,3 +1,27 @@
|
||||
sonic-ufispace-platform-modules (1.0.0) unstable; urgency=low
|
||||
|
||||
* Add support for S6301-56ST
|
||||
|
||||
-- Ufispace <leo.yt.lin@ufispace.com> Thu, 27 Jul 2023 15:50:23 +0800
|
||||
|
||||
sonic-ufispace-platform-modules (1.0.0) unstable; urgency=low
|
||||
|
||||
* Add support for S7801-54XS
|
||||
|
||||
-- Ufispace <jason.cy.tsai@ufispace.com> Thu, 27 Jul 2023 11:49:07 +0800
|
||||
|
||||
sonic-ufispace-platform-modules (1.0.0) unstable; urgency=low
|
||||
|
||||
* Add support for S8901-54XC
|
||||
|
||||
-- Ufispace <jason.cy.tsai@ufispace.com> Thu, 27 Jul 2023 11:12:21 +0800
|
||||
|
||||
sonic-ufispace-platform-modules (1.0.0) unstable; urgency=low
|
||||
|
||||
* Add support for S9110-32X.
|
||||
|
||||
-- Ufispace <nonodark.huang@ufispace.com> Wed, 26 Jul 2023 18:03:14 +0800
|
||||
|
||||
sonic-ufispace-platform-modules (1.0.0) unstable; urgency=low
|
||||
|
||||
* Add support for S9300-32D.
|
||||
|
||||
@ -1,7 +1,7 @@
|
||||
Source: sonic-ufispace-platform-modules
|
||||
Section: main
|
||||
Priority: extra
|
||||
Maintainer: Leo Lin <leo.yt.lin@ufispace.com>
|
||||
Maintainer: Leo Lin <leo.yt.lin@ufispace.com>, Nonodark Huang <nonodark.huang@ufispace.com>, Jason Tsai <jason.cy.tsai@ufispace.com>
|
||||
Build-Depends: debhelper (>= 9), bzip2
|
||||
Standards-Version: 1.0.0
|
||||
|
||||
@ -9,3 +9,18 @@ Package: sonic-platform-ufispace-s9300-32d
|
||||
Architecture: amd64
|
||||
Description: This package contains s9300-32d platform driver utility for SONiC project.
|
||||
|
||||
Package: sonic-platform-ufispace-s9110-32x
|
||||
Architecture: amd64
|
||||
Description: This package contains s9110-32x platform driver utility for SONiC project.
|
||||
|
||||
Package: sonic-platform-ufispace-s8901-54xc
|
||||
Architecture: amd64
|
||||
Description: This package contains s8901-54xc platform driver utility for SONiC project.
|
||||
|
||||
Package: sonic-platform-ufispace-s7801-54xs
|
||||
Architecture: amd64
|
||||
Description: This package contains s7801-54xs platform driver utility for SONiC project.
|
||||
|
||||
Package: sonic-platform-ufispace-s6301-56st
|
||||
Architecture: amd64
|
||||
Description: This package contains s6301-56st platform driver utility for SONiC project.
|
||||
@ -20,6 +20,10 @@ KVERSION ?= $(shell uname -r)
|
||||
KERNEL_SRC := /lib/modules/$(KVERSION)
|
||||
MOD_SRC_DIR:= $(shell pwd)
|
||||
MODULE_DIRS:= s9300-32d
|
||||
MODULE_DIRS += s9110-32x
|
||||
MODULE_DIRS += s8901-54xc
|
||||
MODULE_DIRS += s7801-54xs
|
||||
MODULE_DIRS += s6301-56st
|
||||
MODULE_DIR := modules
|
||||
UTILS_DIR := utils
|
||||
SERVICE_DIR := service
|
||||
|
||||
@ -0,0 +1 @@
|
||||
s6301-56st/sonic_platform-1.0-py3-none-any.whl usr/share/sonic/device/x86_64-ufispace_s6301_56st-r0/pddf
|
||||
@ -0,0 +1,3 @@
|
||||
depmod -a
|
||||
systemctl enable pddf-platform-init.service
|
||||
systemctl start pddf-platform-init.service
|
||||
@ -0,0 +1,2 @@
|
||||
systemctl stop pddf-platform-init.service
|
||||
systemctl disable pddf-platform-init.service
|
||||
@ -0,0 +1 @@
|
||||
s7801-54xs/sonic_platform-1.0-py3-none-any.whl usr/share/sonic/device/x86_64-ufispace_s7801_54xs-r0/pddf
|
||||
@ -0,0 +1,3 @@
|
||||
depmod -a
|
||||
systemctl enable pddf-platform-init.service
|
||||
systemctl start pddf-platform-init.service
|
||||
@ -0,0 +1,2 @@
|
||||
systemctl stop pddf-platform-init.service
|
||||
systemctl disable pddf-platform-init.service
|
||||
@ -0,0 +1 @@
|
||||
s8901-54xc/sonic_platform-1.0-py3-none-any.whl usr/share/sonic/device/x86_64-ufispace_s8901_54xc-r0/pddf
|
||||
@ -0,0 +1,3 @@
|
||||
depmod -a
|
||||
systemctl enable pddf-platform-init.service
|
||||
systemctl start pddf-platform-init.service
|
||||
@ -0,0 +1,2 @@
|
||||
systemctl stop pddf-platform-init.service
|
||||
systemctl disable pddf-platform-init.service
|
||||
@ -0,0 +1 @@
|
||||
s9110-32x/sonic_platform-1.0-py3-none-any.whl usr/share/sonic/device/x86_64-ufispace_s9110_32x-r0/pddf
|
||||
@ -0,0 +1,3 @@
|
||||
depmod -a
|
||||
systemctl enable pddf-platform-init.service
|
||||
systemctl start pddf-platform-init.service
|
||||
@ -0,0 +1,2 @@
|
||||
systemctl stop pddf-platform-init.service
|
||||
systemctl disable pddf-platform-init.service
|
||||
@ -0,0 +1,6 @@
|
||||
|
||||
MODULE_NAME = x86-64-ufispace-s6301-56st-sys-eeprom.o x86-64-ufispace-s6301-56st-lpc.o
|
||||
obj-m := $(MODULE_NAME)
|
||||
|
||||
CFLAGS_pddf_custom_sysstatus_module.o := -I$(M)/../../../../pddf/i2c/modules/include
|
||||
KBUILD_EXTRA_SYMBOLS := $(M)/../../../../pddf/i2c/Module.symvers.PDDF
|
||||
@ -0,0 +1,829 @@
|
||||
/*
|
||||
* A lpc driver for the ufispace_s6301_56st
|
||||
*
|
||||
* Copyright (C) 2017-2020 UfiSpace Technology Corporation.
|
||||
* Jason Tsai <jason.cy.tsai@ufispace.com>
|
||||
* Leo Lin <leo.yt.lin@ufispace.com>
|
||||
*
|
||||
* Based on ad7414.c
|
||||
* Copyright 2006 Stefan Roese <sr at denx.de>, DENX Software Engineering
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation; either version 2 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
|
||||
*/
|
||||
#include <linux/module.h>
|
||||
#include <linux/delay.h>
|
||||
#include <linux/io.h>
|
||||
#include <linux/platform_device.h>
|
||||
#include <stdbool.h>
|
||||
#include <linux/hwmon-sysfs.h>
|
||||
#include <linux/gpio.h>
|
||||
|
||||
#define BSP_LOG_R(fmt, args...) \
|
||||
_bsp_log (LOG_READ, KERN_INFO "%s:%s[%d]: " fmt "\r\n", \
|
||||
__FILE__, __func__, __LINE__, ##args)
|
||||
#define BSP_LOG_W(fmt, args...) \
|
||||
_bsp_log (LOG_WRITE, KERN_INFO "%s:%s[%d]: " fmt "\r\n", \
|
||||
__FILE__, __func__, __LINE__, ##args)
|
||||
|
||||
#define BSP_PR(level, fmt, args...) _bsp_log (LOG_SYS, level "[BSP]" fmt "\r\n", ##args)
|
||||
#define DRIVER_NAME "x86_64_ufispace_s6301_56st_lpc"
|
||||
|
||||
/* LPC registers */
|
||||
|
||||
#define REG_BASE_CPU 0x600
|
||||
#define REG_BASE_MB 0x700
|
||||
|
||||
//MB CPLD
|
||||
#define REG_MB_BRD_ID_0 (REG_BASE_MB + 0x00)
|
||||
#define REG_MB_BRD_ID_1 (REG_BASE_MB + 0x01)
|
||||
#define REG_MB_CPLD_VERSION (REG_BASE_MB + 0x02)
|
||||
#define REG_MB_CPLD_BUILD (REG_BASE_MB + 0x04)
|
||||
#define REG_MB_EXTEND_ID (REG_BASE_MB + 0x06)
|
||||
#define REG_MB_MUX_RESET (REG_BASE_MB + 0x43)
|
||||
#define REG_MB_FAN_STATUS (REG_BASE_MB + 0x55)
|
||||
#define REG_MB_PSU_STATUS (REG_BASE_MB + 0x59)
|
||||
#define REG_MB_PORT_LED_CLR (REG_BASE_MB + 0x80)
|
||||
#define REG_MB_SYS_LED_CTRL_1 (REG_BASE_MB + 0x81)
|
||||
#define REG_MB_SYS_LED_STATUS_1 (REG_BASE_MB + 0x82)
|
||||
#define REG_MB_SYS_LED_STATUS_2 (REG_BASE_MB + 0x83)
|
||||
#define REG_MB_SYS_LED_STATUS_3 (REG_BASE_MB + 0x84)
|
||||
|
||||
#define MASK_ALL (0xFF)
|
||||
|
||||
#define MDELAY_LPC (5)
|
||||
#define MDELAY_RESET_INTERVAL (100)
|
||||
#define MDELAY_RESET_FINISH (500)
|
||||
|
||||
#define MULTIBIT_SET(addr, mask, value) (((addr)&((0xff)^(mask)))|((value)&(mask)))
|
||||
|
||||
|
||||
/* LPC sysfs attributes index */
|
||||
enum lpc_sysfs_attributes {
|
||||
//MB CPLD
|
||||
ATT_MB_BRD_ID_0,
|
||||
ATT_MB_BRD_ID_1,
|
||||
ATT_MB_CPLD_1_VERSION,
|
||||
ATT_MB_CPLD_1_VERSION_H,
|
||||
ATT_MB_BRD_SKU_ID,
|
||||
ATT_MB_BRD_HW_ID,
|
||||
ATT_MB_BRD_ID_TYPE,
|
||||
ATT_MB_BRD_BUILD_ID,
|
||||
ATT_MB_BRD_DEPH_ID,
|
||||
ATT_MB_BRD_EXT_ID,
|
||||
ATT_MB_MUX_RESET,
|
||||
ATT_MB_FAN_STATUS,
|
||||
ATT_MB_PSU_STATUS,
|
||||
ATT_MB_PORT_LED_CLR,
|
||||
ATT_MB_LED_SYS,
|
||||
ATT_MB_LED_ID,
|
||||
ATT_MB_LED_POE,
|
||||
ATT_MB_LED_SPD,
|
||||
ATT_MB_LED_FAN,
|
||||
ATT_MB_LED_LNK,
|
||||
ATT_MB_LED_PWR0,
|
||||
ATT_MB_LED_PWR1,
|
||||
//BSP
|
||||
ATT_BSP_VERSION,
|
||||
ATT_BSP_DEBUG,
|
||||
ATT_BSP_PR_INFO,
|
||||
ATT_BSP_PR_ERR,
|
||||
ATT_BSP_REG,
|
||||
ATT_BSP_REG_VALUE,
|
||||
ATT_BSP_GPIO_MAX,
|
||||
ATT_MAX
|
||||
};
|
||||
|
||||
enum bases {
|
||||
BASE_DEC,
|
||||
BASE_HEX,
|
||||
BASE_NONE
|
||||
|
||||
};
|
||||
|
||||
enum bsp_log_types {
|
||||
LOG_NONE,
|
||||
LOG_RW,
|
||||
LOG_READ,
|
||||
LOG_WRITE,
|
||||
LOG_SYS
|
||||
};
|
||||
|
||||
enum bsp_log_ctrl {
|
||||
LOG_DISABLE,
|
||||
LOG_ENABLE
|
||||
};
|
||||
|
||||
struct lpc_data_s {
|
||||
struct mutex access_lock;
|
||||
};
|
||||
|
||||
struct lpc_data_s *lpc_data;
|
||||
char bsp_version[16];
|
||||
char bsp_debug[32];
|
||||
char bsp_reg[8]="0x0";
|
||||
u8 enable_log_read=LOG_DISABLE;
|
||||
u8 enable_log_write=LOG_DISABLE;
|
||||
u8 enable_log_sys=LOG_ENABLE;
|
||||
|
||||
/* mask len and shift */
|
||||
static void _get_len_shift(u8 mask, u8 *len, u8 *shift)
|
||||
{
|
||||
int i;
|
||||
bool found=false;
|
||||
*len=0;
|
||||
*shift=0;
|
||||
|
||||
for(i=0; i<8; ++i) {
|
||||
if(mask & 1) {
|
||||
*len = *len + 1;
|
||||
if(!found) {
|
||||
*shift = i;
|
||||
found = true;
|
||||
}
|
||||
}
|
||||
mask >>= 1;
|
||||
}
|
||||
}
|
||||
|
||||
/* reg mask and shift */
|
||||
static u8 _mask_shift(u8 val, u8 mask)
|
||||
{
|
||||
u8 shift=0;
|
||||
u8 len;
|
||||
|
||||
_get_len_shift(mask, &len, &shift);
|
||||
|
||||
return (val & mask) >> shift;
|
||||
}
|
||||
|
||||
static u8 _bit_operation(u8 reg_val, u8 bit, u8 bit_val)
|
||||
{
|
||||
if(bit_val == 0)
|
||||
reg_val = reg_val & ~(1 << bit);
|
||||
else
|
||||
reg_val = reg_val | (1 << bit);
|
||||
return reg_val;
|
||||
}
|
||||
|
||||
static int _bsp_log(u8 log_type, char *fmt, ...)
|
||||
{
|
||||
if((log_type==LOG_READ && enable_log_read) ||
|
||||
(log_type==LOG_WRITE && enable_log_write) ||
|
||||
(log_type==LOG_SYS && enable_log_sys) ) {
|
||||
va_list args;
|
||||
int r;
|
||||
|
||||
va_start(args, fmt);
|
||||
r = vprintk(fmt, args);
|
||||
va_end(args);
|
||||
|
||||
return r;
|
||||
} else {
|
||||
return 0;
|
||||
}
|
||||
}
|
||||
|
||||
static int _config_bsp_log(u8 log_type)
|
||||
{
|
||||
switch(log_type) {
|
||||
case LOG_NONE:
|
||||
enable_log_read = LOG_DISABLE;
|
||||
enable_log_write = LOG_DISABLE;
|
||||
break;
|
||||
case LOG_RW:
|
||||
enable_log_read = LOG_ENABLE;
|
||||
enable_log_write = LOG_ENABLE;
|
||||
break;
|
||||
case LOG_READ:
|
||||
enable_log_read = LOG_ENABLE;
|
||||
enable_log_write = LOG_DISABLE;
|
||||
break;
|
||||
case LOG_WRITE:
|
||||
enable_log_read = LOG_DISABLE;
|
||||
enable_log_write = LOG_ENABLE;
|
||||
break;
|
||||
default:
|
||||
return -EINVAL;
|
||||
}
|
||||
return 0;
|
||||
}
|
||||
|
||||
/* get lpc register value */
|
||||
static u8 _read_lpc_reg(u16 reg, u8 mask)
|
||||
{
|
||||
u8 reg_val=0x0, reg_mk_shf_val=0x0;
|
||||
|
||||
mutex_lock(&lpc_data->access_lock);
|
||||
reg_val = inb(reg);
|
||||
mutex_unlock(&lpc_data->access_lock);
|
||||
|
||||
reg_mk_shf_val = _mask_shift(reg_val, mask);
|
||||
|
||||
BSP_LOG_R("reg=0x%03x, reg_val=0x%02x, mask=0x%02x, reg_mk_shf_val=0x%02x", reg, reg_val, mask, reg_mk_shf_val);
|
||||
|
||||
return reg_mk_shf_val;
|
||||
}
|
||||
|
||||
/* get lpc register value */
|
||||
static ssize_t read_lpc_reg(u16 reg, u8 mask, u8 base, char *buf)
|
||||
{
|
||||
u8 reg_val;
|
||||
int len=0;
|
||||
|
||||
reg_val = _read_lpc_reg(reg, mask);
|
||||
if(base == BASE_HEX) {
|
||||
len=sprintf(buf, "0x%02x\n", reg_val);
|
||||
} else {
|
||||
len=sprintf(buf,"%d\n", reg_val);
|
||||
}
|
||||
|
||||
return len;
|
||||
}
|
||||
|
||||
/* set lpc register value */
|
||||
static ssize_t write_lpc_reg(u16 reg, u8 mask, const char *buf, size_t count)
|
||||
{
|
||||
u8 reg_val, reg_val_now, shift, mask_len;
|
||||
|
||||
if(kstrtou8(buf, 0, ®_val) < 0)
|
||||
return -EINVAL;
|
||||
|
||||
_get_len_shift(mask, &mask_len, &shift);
|
||||
|
||||
// set signal bit
|
||||
if(mask_len == 1) {
|
||||
reg_val_now = _read_lpc_reg(reg, MASK_ALL);
|
||||
reg_val = _bit_operation(reg_val_now, shift, reg_val);
|
||||
// set multi bit
|
||||
} else if (mask_len > 1) {
|
||||
reg_val_now = _read_lpc_reg(reg, MASK_ALL);
|
||||
reg_val = MULTIBIT_SET(reg_val_now, mask, reg_val<<shift);
|
||||
}
|
||||
|
||||
mutex_lock(&lpc_data->access_lock);
|
||||
|
||||
outb(reg_val, reg);
|
||||
mdelay(MDELAY_LPC);
|
||||
|
||||
mutex_unlock(&lpc_data->access_lock);
|
||||
|
||||
BSP_LOG_W("reg=0x%03x, reg_val=0x%02x, mask=0x%02x", reg, reg_val, mask);
|
||||
|
||||
return count;
|
||||
}
|
||||
|
||||
/* get bsp value */
|
||||
static ssize_t read_bsp(char *buf, char *str)
|
||||
{
|
||||
ssize_t len=0;
|
||||
|
||||
mutex_lock(&lpc_data->access_lock);
|
||||
len=sprintf(buf, "%s", str);
|
||||
mutex_unlock(&lpc_data->access_lock);
|
||||
|
||||
BSP_LOG_R("reg_val=%s", str);
|
||||
|
||||
return len;
|
||||
}
|
||||
|
||||
/* set bsp value */
|
||||
static ssize_t write_bsp(const char *buf, char *str, size_t str_len, size_t count)
|
||||
{
|
||||
mutex_lock(&lpc_data->access_lock);
|
||||
snprintf(str, str_len, "%s", buf);
|
||||
mutex_unlock(&lpc_data->access_lock);
|
||||
|
||||
BSP_LOG_W("reg_val=%s", str);
|
||||
|
||||
return count;
|
||||
}
|
||||
|
||||
/* get mb cpld version in human readable format */
|
||||
static ssize_t read_mb_cpld_1_version_h(struct device *dev,
|
||||
struct device_attribute *da, char *buf)
|
||||
{
|
||||
ssize_t len=0;
|
||||
u16 reg = REG_MB_CPLD_VERSION;
|
||||
u8 mask = MASK_ALL;
|
||||
u8 mask_major = 0b11000000;
|
||||
u8 mask_minor = 0b00111111;
|
||||
u8 reg_val;
|
||||
u8 major, minor, build;
|
||||
|
||||
mutex_lock(&lpc_data->access_lock);
|
||||
reg_val = _mask_shift(inb(reg), mask);
|
||||
mutex_unlock(&lpc_data->access_lock);
|
||||
major = _mask_shift(reg_val, mask_major);
|
||||
minor = _mask_shift(reg_val, mask_minor);
|
||||
BSP_LOG_R("reg=0x%03x, reg_val=0x%02x", reg, reg_val);
|
||||
|
||||
reg = REG_MB_CPLD_BUILD;
|
||||
mutex_lock(&lpc_data->access_lock);
|
||||
reg_val = _mask_shift(inb(reg), mask);
|
||||
mutex_unlock(&lpc_data->access_lock);
|
||||
build = reg_val;
|
||||
BSP_LOG_R("reg=0x%03x, reg_val=0x%02x", reg, reg_val);
|
||||
|
||||
len=sprintf(buf, "%d.%02d.%03d\n", major, minor, build);
|
||||
return len;
|
||||
}
|
||||
|
||||
/* set mb_mux_reset register value */
|
||||
static ssize_t write_mb_mux_reset(struct device *dev,
|
||||
struct device_attribute *da, const char *buf, size_t count)
|
||||
{
|
||||
u8 val = 0;
|
||||
u8 reg_val = 0;
|
||||
static int mux_reset_flag = 0;
|
||||
|
||||
if(kstrtou8(buf, 0, &val) < 0)
|
||||
return -EINVAL;
|
||||
|
||||
if(mux_reset_flag == 0) {
|
||||
if(val == 0) {
|
||||
mutex_lock(&lpc_data->access_lock);
|
||||
mux_reset_flag = 1;
|
||||
printk(KERN_INFO "i2c mux reset is triggered...\n");
|
||||
reg_val = inb(REG_MB_MUX_RESET);
|
||||
outb((reg_val & 0b11111000), REG_MB_MUX_RESET);
|
||||
mdelay(100);
|
||||
outb((reg_val | 0b00000111), REG_MB_MUX_RESET);
|
||||
mdelay(500);
|
||||
mux_reset_flag = 0;
|
||||
mutex_unlock(&lpc_data->access_lock);
|
||||
} else {
|
||||
return -EINVAL;
|
||||
}
|
||||
} else {
|
||||
printk(KERN_INFO "i2c mux is resetting... (ignore)\n");
|
||||
mutex_lock(&lpc_data->access_lock);
|
||||
mutex_unlock(&lpc_data->access_lock);
|
||||
}
|
||||
|
||||
return count;
|
||||
}
|
||||
|
||||
/* get lpc register value */
|
||||
static ssize_t read_lpc_callback(struct device *dev,
|
||||
struct device_attribute *da, char *buf)
|
||||
{
|
||||
struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
|
||||
u16 reg = 0;
|
||||
u8 mask = MASK_ALL;
|
||||
u8 base = BASE_DEC;
|
||||
|
||||
switch (attr->index) {
|
||||
//MB CPLD
|
||||
case ATT_MB_BRD_ID_0:
|
||||
reg = REG_MB_BRD_ID_0;
|
||||
break;
|
||||
case ATT_MB_BRD_ID_1:
|
||||
reg = REG_MB_BRD_ID_1;
|
||||
break;
|
||||
case ATT_MB_CPLD_1_VERSION:
|
||||
reg = REG_MB_CPLD_VERSION;
|
||||
break;
|
||||
case ATT_MB_BRD_SKU_ID:
|
||||
reg = REG_MB_BRD_ID_0;
|
||||
mask = 0xFF;
|
||||
break;
|
||||
case ATT_MB_BRD_HW_ID:
|
||||
reg = REG_MB_BRD_ID_1;
|
||||
mask = 0x3;
|
||||
break;
|
||||
case ATT_MB_BRD_ID_TYPE:
|
||||
reg = REG_MB_BRD_ID_1;
|
||||
mask = 0x80;
|
||||
break;
|
||||
case ATT_MB_BRD_BUILD_ID:
|
||||
reg = REG_MB_BRD_ID_1;
|
||||
mask = 0x18;
|
||||
break;
|
||||
case ATT_MB_BRD_DEPH_ID:
|
||||
reg = REG_MB_BRD_ID_1;
|
||||
mask = 0x4;
|
||||
break;
|
||||
case ATT_MB_BRD_EXT_ID:
|
||||
reg = REG_MB_EXTEND_ID;
|
||||
mask = 0x07;
|
||||
break;
|
||||
case ATT_MB_MUX_RESET:
|
||||
reg = REG_MB_MUX_RESET;
|
||||
mask = 0x07;
|
||||
base = BASE_HEX;
|
||||
break;
|
||||
case ATT_MB_FAN_STATUS:
|
||||
reg = REG_MB_FAN_STATUS;
|
||||
base = BASE_HEX;
|
||||
break;
|
||||
case ATT_MB_PSU_STATUS:
|
||||
reg = REG_MB_PSU_STATUS;
|
||||
base = BASE_HEX;
|
||||
break;
|
||||
case ATT_MB_PORT_LED_CLR:
|
||||
reg = REG_MB_PORT_LED_CLR;
|
||||
mask = 0x1;
|
||||
base = BASE_HEX;
|
||||
break;
|
||||
case ATT_MB_LED_SYS:
|
||||
reg = REG_MB_SYS_LED_CTRL_1;
|
||||
mask = 0xF0;
|
||||
base = BASE_HEX;
|
||||
break;
|
||||
case ATT_MB_LED_ID:
|
||||
reg = REG_MB_SYS_LED_CTRL_1;
|
||||
mask = 0xF;
|
||||
base = BASE_HEX;
|
||||
break;
|
||||
case ATT_MB_LED_POE:
|
||||
reg = REG_MB_SYS_LED_STATUS_1;
|
||||
mask = 0xF0;
|
||||
base = BASE_HEX;
|
||||
break;
|
||||
case ATT_MB_LED_SPD:
|
||||
reg = REG_MB_SYS_LED_STATUS_1;
|
||||
mask = 0xF;
|
||||
base = BASE_HEX;
|
||||
break;
|
||||
case ATT_MB_LED_FAN:
|
||||
reg = REG_MB_SYS_LED_STATUS_2;
|
||||
mask = 0xF0;
|
||||
base = BASE_HEX;
|
||||
break;
|
||||
case ATT_MB_LED_LNK:
|
||||
reg = REG_MB_SYS_LED_STATUS_2;
|
||||
mask = 0xF;
|
||||
base = BASE_HEX;
|
||||
break;
|
||||
case ATT_MB_LED_PWR1:
|
||||
reg = REG_MB_SYS_LED_STATUS_3;
|
||||
mask = 0xF0;
|
||||
base = BASE_HEX;
|
||||
break;
|
||||
case ATT_MB_LED_PWR0:
|
||||
reg = REG_MB_SYS_LED_STATUS_3;
|
||||
mask = 0xF;
|
||||
base = BASE_HEX;
|
||||
break;
|
||||
//BSP
|
||||
case ATT_BSP_REG_VALUE:
|
||||
if (kstrtou16(bsp_reg, 0, ®) < 0)
|
||||
return -EINVAL;
|
||||
|
||||
mask = MASK_ALL;
|
||||
break;
|
||||
default:
|
||||
return -EINVAL;
|
||||
}
|
||||
return read_lpc_reg(reg, mask, base, buf);
|
||||
}
|
||||
|
||||
/* set lpc register value */
|
||||
static ssize_t write_lpc_callback(struct device *dev,
|
||||
struct device_attribute *da, const char *buf, size_t count)
|
||||
{
|
||||
struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
|
||||
u16 reg = 0;
|
||||
u8 mask = MASK_ALL;
|
||||
|
||||
switch (attr->index) {
|
||||
case ATT_MB_PORT_LED_CLR:
|
||||
reg = REG_MB_PORT_LED_CLR;
|
||||
mask = 0x1;
|
||||
break;
|
||||
case ATT_MB_LED_SYS:
|
||||
reg = REG_MB_SYS_LED_CTRL_1;
|
||||
mask = 0xF0;
|
||||
break;
|
||||
case ATT_MB_LED_ID:
|
||||
reg = REG_MB_SYS_LED_CTRL_1;
|
||||
mask = 0xF;
|
||||
break;
|
||||
default:
|
||||
return -EINVAL;
|
||||
}
|
||||
return write_lpc_reg(reg, mask, buf, count);
|
||||
}
|
||||
|
||||
/* get bsp parameter value */
|
||||
static ssize_t read_bsp_callback(struct device *dev,
|
||||
struct device_attribute *da, char *buf)
|
||||
{
|
||||
struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
|
||||
int str_len=0;
|
||||
char *str=NULL;
|
||||
|
||||
switch (attr->index) {
|
||||
case ATT_BSP_VERSION:
|
||||
str = bsp_version;
|
||||
str_len = sizeof(bsp_version);
|
||||
break;
|
||||
case ATT_BSP_DEBUG:
|
||||
str = bsp_debug;
|
||||
str_len = sizeof(bsp_debug);
|
||||
break;
|
||||
case ATT_BSP_REG:
|
||||
str = bsp_reg;
|
||||
str_len = sizeof(bsp_reg);
|
||||
break;
|
||||
default:
|
||||
return -EINVAL;
|
||||
}
|
||||
return read_bsp(buf, str);
|
||||
}
|
||||
|
||||
/* set bsp parameter value */
|
||||
static ssize_t write_bsp_callback(struct device *dev,
|
||||
struct device_attribute *da, const char *buf, size_t count)
|
||||
{
|
||||
struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
|
||||
int str_len=0;
|
||||
char *str=NULL;
|
||||
u16 reg = 0;
|
||||
u8 bsp_debug_u8 = 0;
|
||||
|
||||
switch (attr->index) {
|
||||
case ATT_BSP_VERSION:
|
||||
str = bsp_version;
|
||||
str_len = sizeof(str);
|
||||
break;
|
||||
case ATT_BSP_DEBUG:
|
||||
str = bsp_debug;
|
||||
str_len = sizeof(str);
|
||||
break;
|
||||
case ATT_BSP_REG:
|
||||
if(kstrtou16(buf, 0, ®) < 0)
|
||||
return -EINVAL;
|
||||
|
||||
str = bsp_reg;
|
||||
str_len = sizeof(str);
|
||||
break;
|
||||
default:
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
if(attr->index == ATT_BSP_DEBUG) {
|
||||
if(kstrtou8(buf, 0, &bsp_debug_u8) < 0) {
|
||||
return -EINVAL;
|
||||
} else if (_config_bsp_log(bsp_debug_u8) < 0) {
|
||||
return -EINVAL;
|
||||
}
|
||||
}
|
||||
|
||||
return write_bsp(buf, str, str_len, count);
|
||||
}
|
||||
|
||||
static ssize_t write_bsp_pr_callback(struct device *dev,
|
||||
struct device_attribute *da, const char *buf, size_t count)
|
||||
{
|
||||
struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
|
||||
int str_len = strlen(buf);
|
||||
|
||||
if(str_len <= 0)
|
||||
return str_len;
|
||||
|
||||
switch (attr->index) {
|
||||
case ATT_BSP_PR_INFO:
|
||||
BSP_PR(KERN_INFO, "%s", buf);
|
||||
break;
|
||||
case ATT_BSP_PR_ERR:
|
||||
BSP_PR(KERN_ERR, "%s", buf);
|
||||
break;
|
||||
default:
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
return str_len;
|
||||
}
|
||||
|
||||
/* get gpio max value */
|
||||
static ssize_t read_gpio_max_callback(struct device *dev,
|
||||
struct device_attribute *da,
|
||||
char *buf)
|
||||
{
|
||||
struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
|
||||
|
||||
if (attr->index == ATT_BSP_GPIO_MAX) {
|
||||
return sprintf(buf, "%d\n", ARCH_NR_GPIOS-1);
|
||||
}
|
||||
return -1;
|
||||
}
|
||||
|
||||
//SENSOR_DEVICE_ATTR - MB
|
||||
static SENSOR_DEVICE_ATTR(board_id_0, S_IRUGO, read_lpc_callback, NULL, ATT_MB_BRD_ID_0);
|
||||
static SENSOR_DEVICE_ATTR(board_id_1, S_IRUGO, read_lpc_callback, NULL, ATT_MB_BRD_ID_1);
|
||||
static SENSOR_DEVICE_ATTR(mb_cpld_1_version, S_IRUGO, read_lpc_callback, NULL, ATT_MB_CPLD_1_VERSION);
|
||||
static SENSOR_DEVICE_ATTR(mb_cpld_1_version_h, S_IRUGO, read_mb_cpld_1_version_h, NULL, ATT_MB_CPLD_1_VERSION_H);
|
||||
static SENSOR_DEVICE_ATTR(board_sku_id, S_IRUGO, read_lpc_callback, NULL, ATT_MB_BRD_SKU_ID);
|
||||
static SENSOR_DEVICE_ATTR(board_hw_id, S_IRUGO, read_lpc_callback, NULL, ATT_MB_BRD_HW_ID);
|
||||
static SENSOR_DEVICE_ATTR(board_id_type, S_IRUGO, read_lpc_callback, NULL, ATT_MB_BRD_ID_TYPE);
|
||||
static SENSOR_DEVICE_ATTR(board_build_id, S_IRUGO, read_lpc_callback, NULL, ATT_MB_BRD_BUILD_ID);
|
||||
static SENSOR_DEVICE_ATTR(board_deph_id, S_IRUGO, read_lpc_callback, NULL, ATT_MB_BRD_DEPH_ID);
|
||||
static SENSOR_DEVICE_ATTR(board_ext_id, S_IRUGO, read_lpc_callback, NULL, ATT_MB_BRD_EXT_ID);
|
||||
static SENSOR_DEVICE_ATTR(mux_reset, S_IRUGO | S_IWUSR, read_lpc_callback, write_mb_mux_reset, ATT_MB_MUX_RESET);
|
||||
static SENSOR_DEVICE_ATTR(fan_status, S_IRUGO, read_lpc_callback, NULL, ATT_MB_FAN_STATUS);
|
||||
static SENSOR_DEVICE_ATTR(psu_status, S_IRUGO, read_lpc_callback, NULL, ATT_MB_PSU_STATUS);
|
||||
static SENSOR_DEVICE_ATTR(port_led_clear, S_IRUGO | S_IWUSR, read_lpc_callback, write_lpc_callback, ATT_MB_PORT_LED_CLR);
|
||||
static SENSOR_DEVICE_ATTR(led_sys, S_IRUGO | S_IWUSR, read_lpc_callback, write_lpc_callback, ATT_MB_LED_SYS);
|
||||
static SENSOR_DEVICE_ATTR(led_id, S_IRUGO | S_IWUSR, read_lpc_callback, write_lpc_callback, ATT_MB_LED_ID);
|
||||
static SENSOR_DEVICE_ATTR(led_poe, S_IRUGO, read_lpc_callback, NULL, ATT_MB_LED_POE);
|
||||
static SENSOR_DEVICE_ATTR(led_spd, S_IRUGO, read_lpc_callback, NULL, ATT_MB_LED_SPD);
|
||||
static SENSOR_DEVICE_ATTR(led_fan, S_IRUGO, read_lpc_callback, NULL, ATT_MB_LED_FAN);
|
||||
static SENSOR_DEVICE_ATTR(led_lnk, S_IRUGO, read_lpc_callback, NULL, ATT_MB_LED_LNK);
|
||||
static SENSOR_DEVICE_ATTR(led_pwr1, S_IRUGO, read_lpc_callback, NULL, ATT_MB_LED_PWR1);
|
||||
static SENSOR_DEVICE_ATTR(led_pwr0, S_IRUGO, read_lpc_callback, NULL, ATT_MB_LED_PWR0);
|
||||
|
||||
//SENSOR_DEVICE_ATTR - BSP
|
||||
static SENSOR_DEVICE_ATTR(bsp_version , S_IRUGO | S_IWUSR, read_bsp_callback, write_bsp_callback, ATT_BSP_VERSION);
|
||||
static SENSOR_DEVICE_ATTR(bsp_debug , S_IRUGO | S_IWUSR, read_bsp_callback, write_bsp_callback, ATT_BSP_DEBUG);
|
||||
static SENSOR_DEVICE_ATTR(bsp_pr_info , S_IWUSR , NULL , write_bsp_pr_callback, ATT_BSP_PR_INFO);
|
||||
static SENSOR_DEVICE_ATTR(bsp_pr_err , S_IWUSR , NULL , write_bsp_pr_callback, ATT_BSP_PR_ERR);
|
||||
static SENSOR_DEVICE_ATTR(bsp_reg , S_IRUGO | S_IWUSR, read_lpc_callback, write_bsp_callback, ATT_BSP_REG);
|
||||
static SENSOR_DEVICE_ATTR(bsp_reg_value, S_IRUGO , read_lpc_callback, NULL, ATT_BSP_REG_VALUE);
|
||||
static SENSOR_DEVICE_ATTR(bsp_gpio_max, S_IRUGO , read_gpio_max_callback, NULL, ATT_BSP_GPIO_MAX);
|
||||
|
||||
|
||||
static struct attribute *mb_cpld_attrs[] = {
|
||||
&sensor_dev_attr_board_id_0.dev_attr.attr,
|
||||
&sensor_dev_attr_board_id_1.dev_attr.attr,
|
||||
&sensor_dev_attr_mb_cpld_1_version.dev_attr.attr,
|
||||
&sensor_dev_attr_mb_cpld_1_version_h.dev_attr.attr,
|
||||
&sensor_dev_attr_board_sku_id.dev_attr.attr,
|
||||
&sensor_dev_attr_board_hw_id.dev_attr.attr,
|
||||
&sensor_dev_attr_board_id_type.dev_attr.attr,
|
||||
&sensor_dev_attr_board_build_id.dev_attr.attr,
|
||||
&sensor_dev_attr_board_deph_id.dev_attr.attr,
|
||||
&sensor_dev_attr_board_ext_id.dev_attr.attr,
|
||||
&sensor_dev_attr_mux_reset.dev_attr.attr,
|
||||
&sensor_dev_attr_fan_status.dev_attr.attr,
|
||||
&sensor_dev_attr_psu_status.dev_attr.attr,
|
||||
&sensor_dev_attr_port_led_clear.dev_attr.attr,
|
||||
&sensor_dev_attr_led_sys.dev_attr.attr,
|
||||
&sensor_dev_attr_led_id.dev_attr.attr,
|
||||
&sensor_dev_attr_led_poe.dev_attr.attr,
|
||||
&sensor_dev_attr_led_spd.dev_attr.attr,
|
||||
&sensor_dev_attr_led_fan.dev_attr.attr,
|
||||
&sensor_dev_attr_led_lnk.dev_attr.attr,
|
||||
&sensor_dev_attr_led_pwr0.dev_attr.attr,
|
||||
&sensor_dev_attr_led_pwr1.dev_attr.attr,
|
||||
NULL,
|
||||
};
|
||||
|
||||
static struct attribute *bsp_attrs[] = {
|
||||
&sensor_dev_attr_bsp_version.dev_attr.attr,
|
||||
&sensor_dev_attr_bsp_debug.dev_attr.attr,
|
||||
&sensor_dev_attr_bsp_pr_info.dev_attr.attr,
|
||||
&sensor_dev_attr_bsp_pr_err.dev_attr.attr,
|
||||
&sensor_dev_attr_bsp_reg.dev_attr.attr,
|
||||
&sensor_dev_attr_bsp_reg_value.dev_attr.attr,
|
||||
&sensor_dev_attr_bsp_gpio_max.dev_attr.attr,
|
||||
NULL,
|
||||
};
|
||||
|
||||
static struct attribute_group mb_cpld_attr_grp = {
|
||||
.name = "mb_cpld",
|
||||
.attrs = mb_cpld_attrs,
|
||||
};
|
||||
|
||||
static struct attribute_group bsp_attr_grp = {
|
||||
.name = "bsp",
|
||||
.attrs = bsp_attrs,
|
||||
};
|
||||
|
||||
static void lpc_dev_release( struct device * dev)
|
||||
{
|
||||
return;
|
||||
}
|
||||
|
||||
static struct platform_device lpc_dev = {
|
||||
.name = DRIVER_NAME,
|
||||
.id = -1,
|
||||
.dev = {
|
||||
.release = lpc_dev_release,
|
||||
}
|
||||
};
|
||||
|
||||
static int lpc_drv_probe(struct platform_device *pdev)
|
||||
{
|
||||
int i = 0, grp_num = 2;
|
||||
int err[5] = {0};
|
||||
struct attribute_group *grp;
|
||||
|
||||
lpc_data = devm_kzalloc(&pdev->dev, sizeof(struct lpc_data_s),
|
||||
GFP_KERNEL);
|
||||
if(!lpc_data)
|
||||
return -ENOMEM;
|
||||
|
||||
mutex_init(&lpc_data->access_lock);
|
||||
|
||||
for (i=0; i<grp_num; ++i) {
|
||||
switch (i) {
|
||||
case 0:
|
||||
grp = &mb_cpld_attr_grp;
|
||||
break;
|
||||
case 1:
|
||||
grp = &bsp_attr_grp;
|
||||
break;
|
||||
default:
|
||||
break;
|
||||
}
|
||||
|
||||
err[i] = sysfs_create_group(&pdev->dev.kobj, grp);
|
||||
if(err[i]) {
|
||||
printk(KERN_ERR "Cannot create sysfs for group %s\n", grp->name);
|
||||
goto exit;
|
||||
} else {
|
||||
continue;
|
||||
}
|
||||
}
|
||||
|
||||
return 0;
|
||||
|
||||
exit:
|
||||
for (i=0; i<grp_num; ++i) {
|
||||
switch (i) {
|
||||
case 0:
|
||||
grp = &mb_cpld_attr_grp;
|
||||
break;
|
||||
case 1:
|
||||
grp = &bsp_attr_grp;
|
||||
break;
|
||||
default:
|
||||
break;
|
||||
}
|
||||
|
||||
sysfs_remove_group(&pdev->dev.kobj, grp);
|
||||
if(!err[i]) {
|
||||
//remove previous successful cases
|
||||
continue;
|
||||
} else {
|
||||
//remove first failed case, then return
|
||||
return err[i];
|
||||
}
|
||||
}
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int lpc_drv_remove(struct platform_device *pdev)
|
||||
{
|
||||
sysfs_remove_group(&pdev->dev.kobj, &mb_cpld_attr_grp);
|
||||
sysfs_remove_group(&pdev->dev.kobj, &bsp_attr_grp);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static struct platform_driver lpc_drv = {
|
||||
.probe = lpc_drv_probe,
|
||||
.remove = __exit_p(lpc_drv_remove),
|
||||
.driver = {
|
||||
.name = DRIVER_NAME,
|
||||
},
|
||||
};
|
||||
|
||||
int lpc_init(void)
|
||||
{
|
||||
int err = 0;
|
||||
|
||||
err = platform_driver_register(&lpc_drv);
|
||||
if(err) {
|
||||
printk(KERN_ERR "%s(#%d): platform_driver_register failed(%d)\n",
|
||||
__func__, __LINE__, err);
|
||||
|
||||
return err;
|
||||
}
|
||||
|
||||
err = platform_device_register(&lpc_dev);
|
||||
if(err) {
|
||||
printk(KERN_ERR "%s(#%d): platform_device_register failed(%d)\n",
|
||||
__func__, __LINE__, err);
|
||||
platform_driver_unregister(&lpc_drv);
|
||||
return err;
|
||||
}
|
||||
|
||||
return err;
|
||||
}
|
||||
|
||||
void lpc_exit(void)
|
||||
{
|
||||
platform_driver_unregister(&lpc_drv);
|
||||
platform_device_unregister(&lpc_dev);
|
||||
}
|
||||
|
||||
MODULE_AUTHOR("Leo Lin <leo.yt.lin@ufispace.com>");
|
||||
MODULE_DESCRIPTION("x86_64_ufispace_s6301_56st_lpc driver");
|
||||
MODULE_LICENSE("GPL");
|
||||
|
||||
module_init(lpc_init);
|
||||
module_exit(lpc_exit);
|
||||
@ -0,0 +1,273 @@
|
||||
/*
|
||||
* Copyright (C) 1998, 1999 Frodo Looijaard <frodol@dds.nl> and
|
||||
* Philip Edelbrock <phil@netroedge.com>
|
||||
* Copyright (C) 2003 Greg Kroah-Hartman <greg@kroah.com>
|
||||
* Copyright (C) 2003 IBM Corp.
|
||||
* Copyright (C) 2004 Jean Delvare <jdelvare@suse.de>
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation; either version 2 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*/
|
||||
|
||||
/* enable dev_dbg print out */
|
||||
//#define DEBUG
|
||||
|
||||
#define __STDC_WANT_LIB_EXT1__ 1
|
||||
#include <linux/kernel.h>
|
||||
#include <linux/module.h>
|
||||
#include <linux/slab.h>
|
||||
#include <linux/delay.h>
|
||||
#include <linux/jiffies.h>
|
||||
#include <linux/i2c.h>
|
||||
#include <linux/mutex.h>
|
||||
|
||||
/* Addresses to scan */
|
||||
static const unsigned short normal_i2c[] = { /*0x50, 0x51, 0x52, 0x53, 0x54,
|
||||
0x55, 0x56, 0x57,*/ I2C_CLIENT_END };
|
||||
|
||||
/* Size of EEPROM in bytes */
|
||||
#define EEPROM_SIZE 512
|
||||
|
||||
#define SLICE_BITS (6)
|
||||
#define SLICE_SIZE (1 << SLICE_BITS)
|
||||
#define SLICE_NUM (EEPROM_SIZE/SLICE_SIZE)
|
||||
|
||||
/* Each client has this additional data */
|
||||
struct eeprom_data {
|
||||
struct mutex update_lock;
|
||||
u8 valid; /* bitfield, bit!=0 if slice is valid */
|
||||
unsigned long last_updated[SLICE_NUM]; /* In jiffies, 8 slices */
|
||||
u8 data[EEPROM_SIZE]; /* Register values */
|
||||
};
|
||||
|
||||
|
||||
static void sys_eeprom_update_client(struct i2c_client *client, u8 slice)
|
||||
{
|
||||
struct eeprom_data *data = i2c_get_clientdata(client);
|
||||
int i, j;
|
||||
int ret;
|
||||
int addr;
|
||||
|
||||
mutex_lock(&data->update_lock);
|
||||
|
||||
if (!(data->valid & (1 << slice)) ||
|
||||
time_after(jiffies, data->last_updated[slice] + 300 * HZ)) {
|
||||
dev_dbg(&client->dev, "Starting eeprom update, slice %u\n", slice);
|
||||
|
||||
addr = slice << SLICE_BITS;
|
||||
|
||||
ret = i2c_smbus_write_byte_data(client, (u8)((addr >> 8) & 0xFF), (u8)(addr & 0xFF));
|
||||
/* select the eeprom address */
|
||||
if (ret < 0) {
|
||||
dev_err(&client->dev, "address set failed\n");
|
||||
goto exit;
|
||||
}
|
||||
|
||||
if (!i2c_check_functionality(client->adapter, I2C_FUNC_SMBUS_READ_BYTE)) {
|
||||
goto exit;
|
||||
}
|
||||
|
||||
for (i = slice << SLICE_BITS; i < (slice + 1) << SLICE_BITS; i+= SLICE_SIZE) {
|
||||
for (j = i; j < (i+SLICE_SIZE); j++) {
|
||||
int res;
|
||||
|
||||
res = i2c_smbus_read_byte(client);
|
||||
if (res < 0) {
|
||||
goto exit;
|
||||
}
|
||||
|
||||
data->data[j] = res & 0xFF;
|
||||
}
|
||||
}
|
||||
|
||||
data->last_updated[slice] = jiffies;
|
||||
data->valid |= (1 << slice);
|
||||
}
|
||||
exit:
|
||||
mutex_unlock(&data->update_lock);
|
||||
}
|
||||
|
||||
static ssize_t sys_eeprom_read(struct file *filp, struct kobject *kobj,
|
||||
struct bin_attribute *bin_attr,
|
||||
char *buf, loff_t off, size_t count)
|
||||
{
|
||||
struct i2c_client *client = to_i2c_client(container_of(kobj, struct device, kobj));
|
||||
struct eeprom_data *data = i2c_get_clientdata(client);
|
||||
u8 slice;
|
||||
|
||||
if (off > EEPROM_SIZE) {
|
||||
return 0;
|
||||
}
|
||||
if (off + count > EEPROM_SIZE) {
|
||||
count = EEPROM_SIZE - off;
|
||||
}
|
||||
if (count == 0) {
|
||||
return 0;
|
||||
}
|
||||
|
||||
/* Only refresh slices which contain requested bytes */
|
||||
for (slice = off >> SLICE_BITS; slice <= (off + count - 1) >> SLICE_BITS; slice++) {
|
||||
sys_eeprom_update_client(client, slice);
|
||||
}
|
||||
|
||||
memcpy(buf, &data->data[off], count);
|
||||
|
||||
return count;
|
||||
}
|
||||
|
||||
static ssize_t sys_eeprom_write(struct file *filp, struct kobject *kobj,
|
||||
struct bin_attribute *bin_attr,
|
||||
char *buf, loff_t off, size_t count)
|
||||
{
|
||||
struct i2c_client *client = to_i2c_client(container_of(kobj, struct device, kobj));
|
||||
struct eeprom_data *data = i2c_get_clientdata(client);
|
||||
int ret;
|
||||
int i;
|
||||
u8 cmd;
|
||||
u16 value16;
|
||||
|
||||
dev_dbg(&client->dev, "sys_eeprom_write off=%d, count=%d\n", (int)off, (int)count);
|
||||
|
||||
if (off > EEPROM_SIZE) {
|
||||
return 0;
|
||||
}
|
||||
if (off + count > EEPROM_SIZE) {
|
||||
count = EEPROM_SIZE - off;
|
||||
}
|
||||
if (count == 0) {
|
||||
return 0;
|
||||
}
|
||||
|
||||
mutex_lock(&data->update_lock);
|
||||
|
||||
for(i=0; i < count; i++) {
|
||||
/* write command */
|
||||
cmd = (off >> 8) & 0xff;
|
||||
value16 = off & 0xff;
|
||||
value16 |= buf[i] << 8;
|
||||
ret = i2c_smbus_write_word_data(client, cmd, value16);
|
||||
|
||||
if (ret < 0) {
|
||||
dev_err(&client->dev, "write address failed at %d \n", (int)off);
|
||||
goto exit;
|
||||
}
|
||||
|
||||
off++;
|
||||
|
||||
/* need to wait for write complete */
|
||||
udelay(10000);
|
||||
}
|
||||
exit:
|
||||
mutex_unlock(&data->update_lock);
|
||||
/* force to update client when reading */
|
||||
for(i=0; i < SLICE_NUM; i++) {
|
||||
data->last_updated[i] = 0;
|
||||
}
|
||||
|
||||
return count;
|
||||
}
|
||||
|
||||
static struct bin_attribute sys_eeprom_attr = {
|
||||
.attr = {
|
||||
.name = "eeprom",
|
||||
.mode = S_IRUGO | S_IWUSR,
|
||||
},
|
||||
.size = EEPROM_SIZE,
|
||||
.read = sys_eeprom_read,
|
||||
.write = sys_eeprom_write,
|
||||
};
|
||||
|
||||
/* Return 0 if detection is successful, -ENODEV otherwise */
|
||||
static int sys_eeprom_detect(struct i2c_client *client, struct i2c_board_info *info)
|
||||
{
|
||||
struct i2c_adapter *adapter = client->adapter;
|
||||
|
||||
/* EDID EEPROMs are often 24C00 EEPROMs, which answer to all
|
||||
addresses 0x50-0x57, but we only care about 0x51 and 0x55. So decline
|
||||
attaching to addresses >= 0x56 on DDC buses */
|
||||
if (!(adapter->class & I2C_CLASS_SPD) && client->addr >= 0x56) {
|
||||
return -ENODEV;
|
||||
}
|
||||
|
||||
if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_READ_BYTE)
|
||||
&& !i2c_check_functionality(adapter, I2C_FUNC_SMBUS_WRITE_BYTE_DATA)) {
|
||||
return -ENODEV;
|
||||
}
|
||||
|
||||
strlcpy(info->type, "eeprom", I2C_NAME_SIZE);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int sys_eeprom_probe(struct i2c_client *client,
|
||||
const struct i2c_device_id *id)
|
||||
{
|
||||
struct eeprom_data *data;
|
||||
int err;
|
||||
|
||||
if (!(data = kzalloc(sizeof(struct eeprom_data), GFP_KERNEL))) {
|
||||
err = -ENOMEM;
|
||||
goto exit;
|
||||
}
|
||||
|
||||
#ifdef __STDC_LIB_EXT1__
|
||||
memset_s(data->data, EEPROM_SIZE, 0xff, EEPROM_SIZE);
|
||||
#else
|
||||
memset(data->data, 0xff, EEPROM_SIZE);
|
||||
#endif
|
||||
|
||||
i2c_set_clientdata(client, data);
|
||||
mutex_init(&data->update_lock);
|
||||
|
||||
/* create the sysfs eeprom file */
|
||||
err = sysfs_create_bin_file(&client->dev.kobj, &sys_eeprom_attr);
|
||||
if (err) {
|
||||
goto exit_kfree;
|
||||
}
|
||||
|
||||
return 0;
|
||||
|
||||
exit_kfree:
|
||||
kfree(data);
|
||||
exit:
|
||||
return err;
|
||||
}
|
||||
|
||||
static int sys_eeprom_remove(struct i2c_client *client)
|
||||
{
|
||||
sysfs_remove_bin_file(&client->dev.kobj, &sys_eeprom_attr);
|
||||
kfree(i2c_get_clientdata(client));
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static const struct i2c_device_id sys_eeprom_id[] = {
|
||||
{ "sys_eeprom", 0 },
|
||||
{ }
|
||||
};
|
||||
|
||||
static struct i2c_driver sys_eeprom_driver = {
|
||||
.driver = {
|
||||
.name = "sys_eeprom",
|
||||
},
|
||||
.probe = sys_eeprom_probe,
|
||||
.remove = sys_eeprom_remove,
|
||||
.id_table = sys_eeprom_id,
|
||||
|
||||
.class = I2C_CLASS_DDC | I2C_CLASS_SPD,
|
||||
.detect = sys_eeprom_detect,
|
||||
.address_list = normal_i2c,
|
||||
};
|
||||
|
||||
module_i2c_driver(sys_eeprom_driver);
|
||||
|
||||
MODULE_AUTHOR("Leo Lin <leo.yt.lin@ufispace.com>");
|
||||
MODULE_DESCRIPTION("UfiSpace System EEPROM driver");
|
||||
MODULE_LICENSE("GPL");
|
||||
Some files were not shown because too many files have changed in this diff Show More
Loading…
Reference in New Issue
Block a user