Fix ecmp hash polarization by enable hash seed/offset config on T1 and upgrade xgs SAI to 8.4.35.0 (#17505)
Why I did it To fix ecmp hash polarization issue. Work item tracking Microsoft ADO (number only): 26085143 How I did it Add sai_hash_seed_config_hash_offset_enable=1 in all config.bcm that Broadcom T1 uses. HardwareSku Force10-S6100-T1 Force10-S6100-ITPAC-T1 Force10-S6100 Celestica-DX010-C32 Arista-7260CX3-C64 Arista-7060CX-32S-Q32 Arista-7060CX-32S-C32-T1 Arista-7060CX-32S-C32 Arista-7050QX32S-Q32 Arista-7050QX-32S-S4Q31 Arista-7050-QX32 Arista-7050-QX-32SInclude Broadcom's fix by upgrading xgs SAI version to 8.4.35.0. 8.4.35.0: [CSP 00012324019] back-porting SONIC-75006 to SAI8.4 8.4.34.0: [CSP 00012318293] back-porting SONIC-81534 to SAI8.4; ECMP LB traffic polarization, configure hash_offset along with hash_seed attr Run qual with only xgs SAI version upgraded to 8.4.35.0: on TH2: https://elastictest.org/scheduler/testplan/6579b36ccfacd86e78e3e885?leftSideViewMode=detail&prop=status&order=ascending on TH: https://elastictest.org/scheduler/testplan/657a75f8c1d3b51fc1d585b4?leftSideViewMode=detail&prop=status&order=ascending How to verify it use tests/ecmp/test_ecmp_sai_value.py to verify.
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SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/td2-a7050-qx32-32x40G.config.bcm
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SAI_NUM_ECMP_MEMBERS=32
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{# Get sai.profile based on switch_role #}
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{%- if DEVICE_METADATA is defined -%}
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{%- set switch_role = DEVICE_METADATA['localhost']['type'] -%}
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{%- if 'leafrouter' in switch_role.lower() -%}
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{% set sai_profile_contents = 'SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/td2-a7050-qx32-32x40G-t1.config.bcm' -%}
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{%- else %}
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{%- set sai_profile_contents = 'SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/td2-a7050-qx32-32x40G-t0.config.bcm' -%}
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{%- endif %}
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{%- else %}
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{%- set sai_profile_contents = 'SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/td2-a7050-qx32-32x40G-t0.config.bcm' -%}
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{%- endif %}
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{# Write the contents of sai_ profile_filename to sai.profile file #}
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{{ sai_profile_contents }}
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SAI_NUM_ECMP_MEMBERS=32
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#/******************************************************************************
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# *
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# * File: config.bcm.cloverdales (7050-QX32)
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# * Name:
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# *
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# * Description: This file contains SDK properties for an Arista
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# * Cloverdales platform.
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# *
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# *-----------------------------------------------------------------------------
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# ******************************************************************************/
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####################################################################
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# BCM Config file for Cloverdale platform
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# - 32x40g Portmode
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sai_hash_seed_config_hash_offset_enable=1
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# Old LPM only configuration
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# l2_mem_entries=163840
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# l3_mem_entries=90112
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# l3_alpm_enable=0
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# ipv6_lpm_128b_enable=0
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#
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# ALPM enable
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l3_alpm_enable=2
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ipv6_lpm_128b_enable=1
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l2_mem_entries=32768
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l3_mem_entries=16384
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# disables bcmALPMDH (ALPM distributed hitbit) thread. This thread is purely for debug purpose
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l3_alpm_hit_skip=1
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# Disable Counting ACL Drop towards interface RX_DRP counter
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sai_adjust_acl_drop_in_rx_drop=1
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# From old config file
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os=unix
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higig2_hdr_mode=1
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# Parity
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parity_correction=1
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parity_enable=1
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stat_if_parity_enable=0
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# l2 thread related config vars
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l2xmsg_hostbuf_size=8192
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l2xmsg_mode=1
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bcm_num_cos=10
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bcm_stat_interval=2000000
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lls_num_l2uc=12
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max_vp_lags=0
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miim_intr_enable=0
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mmu_lossless=0
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module_64ports=0
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schan_intr_enable=0
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stable_size=0x2000000
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tdma_timeout_usec=5000000
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# for GLC transceiver
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phy_an_c73=0x0
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phy_an_c37=0x3
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###########################
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#port_init_speed_xe=40000
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#port_init_speed_xe.0=40000
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#load_firmware=0x0102
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load_firmware.0=2
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#########################
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# All ports are in oversubscription mode
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pbmp_oversubscribe=0x1fffffffffffffffffffffffffe
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pbmp_xport_xe.0=0x1fffffffe
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phy_84328_1.0=1
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phy_84328_2.0=1
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phy_84328_29.0=1
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phy_84328_3.0=1
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phy_84328_30.0=1
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phy_84328_31.0=1
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phy_84328_32.0=1
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phy_84328_4.0=1
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phy_an_c37_1.0=3
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phy_an_c37_10.0=3
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phy_an_c37_11.0=3
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phy_an_c37_12.0=3
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phy_an_c37_13.0=3
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phy_an_c37_14.0=3
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phy_an_c37_15.0=3
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phy_an_c37_16.0=3
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phy_an_c37_17.0=3
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phy_an_c37_18.0=3
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phy_an_c37_19.0=3
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phy_an_c37_2.0=3
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phy_an_c37_20.0=3
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phy_an_c37_21.0=3
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phy_an_c37_22.0=3
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phy_an_c37_23.0=3
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phy_an_c37_24.0=3
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phy_an_c37_25.0=3
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phy_an_c37_26.0=3
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phy_an_c37_27.0=3
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phy_an_c37_28.0=3
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phy_an_c37_29.0=3
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phy_an_c37_3.0=3
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phy_an_c37_30.0=3
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phy_an_c37_31.0=3
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phy_an_c37_32.0=3
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phy_an_c37_4.0=3
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phy_an_c37_5.0=3
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phy_an_c37_6.0=3
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phy_an_c37_7.0=3
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phy_an_c37_8.0=3
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phy_an_c37_9.0=3
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phy_an_c73_1.0=1
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phy_an_c73_10.0=1
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phy_an_c73_11.0=1
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phy_an_c73_12.0=1
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phy_an_c73_13.0=1
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phy_an_c73_14.0=1
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phy_an_c73_15.0=1
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phy_an_c73_16.0=1
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phy_an_c73_17.0=1
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phy_an_c73_18.0=1
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phy_an_c73_19.0=1
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phy_an_c73_2.0=1
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phy_an_c73_20.0=1
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phy_an_c73_21.0=1
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phy_an_c73_22.0=1
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phy_an_c73_23.0=1
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phy_an_c73_24.0=1
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phy_an_c73_25.0=1
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phy_an_c73_26.0=1
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phy_an_c73_27.0=1
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phy_an_c73_28.0=1
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phy_an_c73_29.0=1
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phy_an_c73_3.0=1
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phy_an_c73_30.0=1
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phy_an_c73_31.0=1
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phy_an_c73_32.0=1
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phy_an_c73_4.0=1
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phy_an_c73_5.0=1
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phy_an_c73_6.0=1
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phy_an_c73_7.0=1
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phy_an_c73_8.0=1
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phy_an_c73_9.0=1
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phy_aux_voltage_enable_1.0=0x1
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phy_aux_voltage_enable_2.0=0x1
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phy_aux_voltage_enable_29.0=0x1
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phy_aux_voltage_enable_3.0=0x1
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phy_aux_voltage_enable_30.0=0x1
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phy_aux_voltage_enable_31.0=0x1
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phy_aux_voltage_enable_32.0=0x1
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phy_aux_voltage_enable_4.0=0x1
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phy_ext_rom_boot.0=0
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phy_ext_rom_boot_1.0=0x0
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phy_ext_rom_boot_2.0=0x0
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phy_ext_rom_boot_29.0=0x0
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phy_ext_rom_boot_3.0=0x0
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phy_ext_rom_boot_30.0=0x0
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phy_ext_rom_boot_31.0=0x0
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phy_ext_rom_boot_32.0=0x0
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phy_ext_rom_boot_4.0=0x0
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phy_line_tx_mode_1.0=1
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phy_line_tx_mode_2.0=1
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phy_line_tx_mode_29.0=1
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phy_line_tx_mode_3.0=1
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phy_line_tx_mode_30.0=1
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phy_line_tx_mode_31.0=1
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phy_line_tx_mode_32.0=1
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phy_line_tx_mode_4.0=1
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phy_rx_polarity_flip_1.0=0x0
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phy_rx_polarity_flip_2.0=0x0
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phy_rx_polarity_flip_29.0=0x0
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phy_rx_polarity_flip_3.0=0x0
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phy_rx_polarity_flip_30.0=0x0
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phy_rx_polarity_flip_31.0=0x0
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phy_rx_polarity_flip_32.0=0x0
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phy_rx_polarity_flip_4.0=0x0
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phy_system_tx_mode_1.0=0
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phy_system_tx_mode_2.0=0
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phy_system_tx_mode_29.0=0
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phy_system_tx_mode_3.0=0
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phy_system_tx_mode_30.0=0
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phy_system_tx_mode_31.0=0
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phy_system_tx_mode_32.0=0
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phy_system_tx_mode_4.0=0
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phy_tx_polarity_flip_1.0=0x0
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phy_tx_polarity_flip_2.0=0x0
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phy_tx_polarity_flip_29.0=0x0
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phy_tx_polarity_flip_3.0=0x0
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phy_tx_polarity_flip_30.0=0x0
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phy_tx_polarity_flip_31.0=0x0
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phy_tx_polarity_flip_32.0=0x0
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phy_tx_polarity_flip_4.0=0x0
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phy_xaui_rx_polarity_flip_1.0=0x0
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phy_xaui_rx_polarity_flip_10.0=0x0
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phy_xaui_rx_polarity_flip_11.0=0x0
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phy_xaui_rx_polarity_flip_12.0=0x0
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phy_xaui_rx_polarity_flip_13.0=0x0
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phy_xaui_rx_polarity_flip_14.0=0x0
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phy_xaui_rx_polarity_flip_15.0=0x0
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phy_xaui_rx_polarity_flip_16.0=0x0
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phy_xaui_rx_polarity_flip_17.0=0x0
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phy_xaui_rx_polarity_flip_18.0=0x0
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phy_xaui_rx_polarity_flip_19.0=0x0
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phy_xaui_rx_polarity_flip_2.0=0x0
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phy_xaui_rx_polarity_flip_20.0=0x0
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phy_xaui_rx_polarity_flip_21.0=0x0
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phy_xaui_rx_polarity_flip_22.0=0x0
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phy_xaui_rx_polarity_flip_23.0=0x0
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phy_xaui_rx_polarity_flip_24.0=0x0
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phy_xaui_rx_polarity_flip_25.0=0x0
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phy_xaui_rx_polarity_flip_26.0=0x0
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phy_xaui_rx_polarity_flip_27.0=0x0
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phy_xaui_rx_polarity_flip_28.0=0x0
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phy_xaui_rx_polarity_flip_29.0=0x0
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phy_xaui_rx_polarity_flip_3.0=0x0
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phy_xaui_rx_polarity_flip_30.0=0x0
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phy_xaui_rx_polarity_flip_31.0=0x0
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phy_xaui_rx_polarity_flip_32.0=0x0
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phy_xaui_rx_polarity_flip_4.0=0x0
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phy_xaui_rx_polarity_flip_5.0=0x0
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phy_xaui_rx_polarity_flip_6.0=0x0
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phy_xaui_rx_polarity_flip_7.0=0x0
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phy_xaui_rx_polarity_flip_8.0=0x0
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phy_xaui_rx_polarity_flip_9.0=0x0
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phy_xaui_tx_polarity_flip_1.0=0x0
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phy_xaui_tx_polarity_flip_10.0=0x0
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phy_xaui_tx_polarity_flip_11.0=0x0
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phy_xaui_tx_polarity_flip_12.0=0x0
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phy_xaui_tx_polarity_flip_13.0=0x0
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phy_xaui_tx_polarity_flip_14.0=0x0
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phy_xaui_tx_polarity_flip_15.0=0x0
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phy_xaui_tx_polarity_flip_16.0=0x0
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phy_xaui_tx_polarity_flip_17.0=0x0
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phy_xaui_tx_polarity_flip_18.0=0x0
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phy_xaui_tx_polarity_flip_19.0=0x0
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phy_xaui_tx_polarity_flip_2.0=0x0
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phy_xaui_tx_polarity_flip_20.0=0x0
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phy_xaui_tx_polarity_flip_21.0=0x0
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phy_xaui_tx_polarity_flip_22.0=0x0
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phy_xaui_tx_polarity_flip_23.0=0x0
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phy_xaui_tx_polarity_flip_24.0=0x0
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phy_xaui_tx_polarity_flip_25.0=0x0
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phy_xaui_tx_polarity_flip_26.0=0x0
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phy_xaui_tx_polarity_flip_27.0=0x0
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phy_xaui_tx_polarity_flip_28.0=0x0
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phy_xaui_tx_polarity_flip_29.0=0x0
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phy_xaui_tx_polarity_flip_3.0=0x0
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phy_xaui_tx_polarity_flip_30.0=0x0
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phy_xaui_tx_polarity_flip_31.0=0x0
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phy_xaui_tx_polarity_flip_32.0=0x0
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phy_xaui_tx_polarity_flip_4.0=0x0
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phy_xaui_tx_polarity_flip_5.0=0x0
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phy_xaui_tx_polarity_flip_6.0=0x0
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phy_xaui_tx_polarity_flip_7.0=0x0
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phy_xaui_tx_polarity_flip_8.0=0x0
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phy_xaui_tx_polarity_flip_9.0=0x0
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port_init_autoneg_10.0=0
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port_init_autoneg_11.0=0
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port_init_autoneg_12.0=0
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port_init_autoneg_13.0=0
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port_init_autoneg_14.0=0
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port_init_autoneg_15.0=0
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port_init_autoneg_16.0=0
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port_init_autoneg_17.0=0
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port_init_autoneg_18.0=0
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port_init_autoneg_19.0=0
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port_init_autoneg_20.0=0
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port_init_autoneg_21.0=0
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port_init_autoneg_22.0=0
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port_init_autoneg_23.0=0
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port_init_autoneg_24.0=0
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port_init_autoneg_25.0=0
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port_init_autoneg_26.0=0
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port_init_autoneg_27.0=0
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port_init_autoneg_28.0=0
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port_init_autoneg_5.0=0
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port_init_autoneg_6.0=0
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port_init_autoneg_7.0=0
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port_init_autoneg_8.0=0
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port_init_autoneg_9.0=0
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port_init_cl72_hg.0=0x11
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port_phy_addr_1.0=0x4
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port_phy_addr_10.0=0x7f
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port_phy_addr_11.0=0x7f
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port_phy_addr_12.0=0x7f
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port_phy_addr_13.0=0x7f
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port_phy_addr_14.0=0x7f
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port_phy_addr_15.0=0x7f
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port_phy_addr_16.0=0x7f
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port_phy_addr_17.0=0x7f
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port_phy_addr_18.0=0x7f
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port_phy_addr_19.0=0x7f
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port_phy_addr_2.0=0x0
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port_phy_addr_20.0=0x7f
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port_phy_addr_21.0=0x7f
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port_phy_addr_22.0=0x7f
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port_phy_addr_23.0=0x7f
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port_phy_addr_24.0=0x7f
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port_phy_addr_25.0=0x7f
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port_phy_addr_26.0=0x7f
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port_phy_addr_27.0=0x7f
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port_phy_addr_28.0=0x7f
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port_phy_addr_29.0=0x54
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port_phy_addr_3.0=0x2c
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port_phy_addr_30.0=0x50
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port_phy_addr_31.0=0x7c
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port_phy_addr_32.0=0x78
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port_phy_addr_4.0=0x28
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port_phy_addr_5.0=0x7f
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port_phy_addr_6.0=0x7f
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port_phy_addr_7.0=0x7f
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port_phy_addr_8.0=0x7f
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port_phy_addr_9.0=0x7f
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port_phy_clause_1.0=0x2d
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port_phy_clause_2.0=0x2d
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port_phy_clause_29.0=0x2d
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port_phy_clause_3.0=0x2d
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port_phy_clause_30.0=0x2d
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port_phy_clause_31.0=0x2d
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port_phy_clause_32.0=0x2d
|
||||
port_phy_clause_4.0=0x2d
|
||||
port_phy_id0_1.0=0x600d
|
||||
port_phy_id0_2.0=0x600d
|
||||
port_phy_id0_29.0=0x600d
|
||||
port_phy_id0_3.0=0x600d
|
||||
port_phy_id0_30.0=0x600d
|
||||
port_phy_id0_31.0=0x600d
|
||||
port_phy_id0_32.0=0x600d
|
||||
port_phy_id0_4.0=0x600d
|
||||
port_phy_id1_1.0=0x8500
|
||||
port_phy_id1_2.0=0x8500
|
||||
port_phy_id1_29.0=0x8500
|
||||
port_phy_id1_3.0=0x8500
|
||||
port_phy_id1_30.0=0x8500
|
||||
port_phy_id1_31.0=0x8500
|
||||
port_phy_id1_32.0=0x8500
|
||||
port_phy_id1_4.0=0x8500
|
||||
portmap_1.0=125:40
|
||||
portmap_10.0=33:40
|
||||
portmap_11.0=45:40
|
||||
portmap_12.0=41:40
|
||||
portmap_13.0=53:40
|
||||
portmap_14.0=49:40
|
||||
portmap_15.0=69:40
|
||||
portmap_16.0=65:40
|
||||
portmap_17.0=77:40
|
||||
portmap_18.0=73:40
|
||||
portmap_19.0=93:40
|
||||
portmap_2.0=121:40
|
||||
portmap_20.0=89:40
|
||||
portmap_21.0=101:40
|
||||
portmap_22.0=97:40
|
||||
portmap_23.0=109:40
|
||||
portmap_24.0=105:40
|
||||
portmap_25.0=61:40
|
||||
portmap_26.0=57:40
|
||||
portmap_27.0=81:40
|
||||
portmap_28.0=85:40
|
||||
portmap_29.0=117:40
|
||||
portmap_3.0=13:40
|
||||
portmap_30.0=113:40
|
||||
portmap_31.0=5:40
|
||||
portmap_32.0=1:40
|
||||
portmap_4.0=9:40
|
||||
portmap_5.0=17:40
|
||||
portmap_6.0=21:40
|
||||
portmap_7.0=25:40
|
||||
portmap_8.0=29:40
|
||||
portmap_9.0=37:40
|
||||
serdes_firmware_mode_1.0=1
|
||||
serdes_firmware_mode_10.0=2
|
||||
serdes_firmware_mode_11.0=2
|
||||
serdes_firmware_mode_12.0=2
|
||||
serdes_firmware_mode_13.0=2
|
||||
serdes_firmware_mode_14.0=2
|
||||
serdes_firmware_mode_15.0=2
|
||||
serdes_firmware_mode_16.0=2
|
||||
serdes_firmware_mode_17.0=2
|
||||
serdes_firmware_mode_18.0=2
|
||||
serdes_firmware_mode_19.0=2
|
||||
serdes_firmware_mode_2.0=1
|
||||
serdes_firmware_mode_20.0=2
|
||||
serdes_firmware_mode_21.0=2
|
||||
serdes_firmware_mode_22.0=2
|
||||
serdes_firmware_mode_23.0=2
|
||||
serdes_firmware_mode_24.0=2
|
||||
serdes_firmware_mode_25.0=2
|
||||
serdes_firmware_mode_26.0=2
|
||||
serdes_firmware_mode_27.0=2
|
||||
serdes_firmware_mode_28.0=2
|
||||
serdes_firmware_mode_29.0=1
|
||||
serdes_firmware_mode_3.0=1
|
||||
serdes_firmware_mode_30.0=1
|
||||
serdes_firmware_mode_31.0=1
|
||||
serdes_firmware_mode_32.0=1
|
||||
serdes_firmware_mode_4.0=1
|
||||
serdes_firmware_mode_5.0=2
|
||||
serdes_firmware_mode_6.0=2
|
||||
serdes_firmware_mode_7.0=2
|
||||
serdes_firmware_mode_8.0=2
|
||||
serdes_firmware_mode_9.0=2
|
||||
xgxs_lcpll_xtal_refclk.0=1
|
||||
xgxs_rx_lane_map_1.0=0x0123
|
||||
xgxs_rx_lane_map_10.0=0x3120
|
||||
xgxs_rx_lane_map_11.0=0x3120
|
||||
xgxs_rx_lane_map_12.0=0x3120
|
||||
xgxs_rx_lane_map_13.0=0x3120
|
||||
xgxs_rx_lane_map_14.0=0x3120
|
||||
xgxs_rx_lane_map_15.0=0x3120
|
||||
xgxs_rx_lane_map_16.0=0x3120
|
||||
xgxs_rx_lane_map_17.0=0x3120
|
||||
xgxs_rx_lane_map_18.0=0x3120
|
||||
xgxs_rx_lane_map_19.0=0x3120
|
||||
xgxs_rx_lane_map_2.0=0x0123
|
||||
xgxs_rx_lane_map_20.0=0x3120
|
||||
xgxs_rx_lane_map_21.0=0x3120
|
||||
xgxs_rx_lane_map_22.0=0x3120
|
||||
xgxs_rx_lane_map_23.0=0x3120
|
||||
xgxs_rx_lane_map_24.0=0x3120
|
||||
xgxs_rx_lane_map_25.0=0x2031
|
||||
xgxs_rx_lane_map_26.0=0x2031
|
||||
xgxs_rx_lane_map_27.0=0x0213
|
||||
xgxs_rx_lane_map_28.0=0x0213
|
||||
xgxs_rx_lane_map_29.0=0x0123
|
||||
xgxs_rx_lane_map_3.0=0x0123
|
||||
xgxs_rx_lane_map_30.0=0x0123
|
||||
xgxs_rx_lane_map_31.0=0x0123
|
||||
xgxs_rx_lane_map_32.0=0x0123
|
||||
xgxs_rx_lane_map_4.0=0x0123
|
||||
xgxs_rx_lane_map_5.0=0x2031
|
||||
xgxs_rx_lane_map_6.0=0x2031
|
||||
xgxs_rx_lane_map_7.0=0x2031
|
||||
xgxs_rx_lane_map_8.0=0x2031
|
||||
xgxs_rx_lane_map_9.0=0x3120
|
||||
xgxs_tx_lane_map_1.0=0x0123
|
||||
xgxs_tx_lane_map_10.0=0x3120
|
||||
xgxs_tx_lane_map_11.0=0x3120
|
||||
xgxs_tx_lane_map_12.0=0x3120
|
||||
xgxs_tx_lane_map_13.0=0x3120
|
||||
xgxs_tx_lane_map_14.0=0x3120
|
||||
xgxs_tx_lane_map_15.0=0x3120
|
||||
xgxs_tx_lane_map_16.0=0x3120
|
||||
xgxs_tx_lane_map_17.0=0x3120
|
||||
xgxs_tx_lane_map_18.0=0x3120
|
||||
xgxs_tx_lane_map_19.0=0x3120
|
||||
xgxs_tx_lane_map_2.0=0x0123
|
||||
xgxs_tx_lane_map_20.0=0x3120
|
||||
xgxs_tx_lane_map_21.0=0x3120
|
||||
xgxs_tx_lane_map_22.0=0x3120
|
||||
xgxs_tx_lane_map_23.0=0x3120
|
||||
xgxs_tx_lane_map_24.0=0x3120
|
||||
xgxs_tx_lane_map_25.0=0x2031
|
||||
xgxs_tx_lane_map_26.0=0x2031
|
||||
xgxs_tx_lane_map_27.0=0x0213
|
||||
xgxs_tx_lane_map_28.0=0x0213
|
||||
xgxs_tx_lane_map_29.0=0x0123
|
||||
xgxs_tx_lane_map_3.0=0x0123
|
||||
xgxs_tx_lane_map_30.0=0x0123
|
||||
xgxs_tx_lane_map_31.0=0x0123
|
||||
xgxs_tx_lane_map_32.0=0x0123
|
||||
xgxs_tx_lane_map_4.0=0x0123
|
||||
xgxs_tx_lane_map_5.0=0x1302
|
||||
xgxs_tx_lane_map_6.0=0x1302
|
||||
xgxs_tx_lane_map_7.0=0x1302
|
||||
xgxs_tx_lane_map_8.0=0x1302
|
||||
xgxs_tx_lane_map_9.0=0x3120
|
||||
|
||||
##########################################
|
||||
#skip_L2_USER_ENTRY=0
|
||||
phy_aux_voltage_enable=1
|
||||
###############################
|
||||
serdes_fiber_pref=1
|
||||
###############################
|
||||
mdio_output_delay.0=0x0d
|
||||
###############################
|
||||
serdes_sgmii_m=0
|
||||
xgxs_lcpll_xtal_refclk=1
|
||||
xgxs_lcpll_xtal_refclk.1=1
|
||||
xgxs_lcpll_xtal_refclk.2=1
|
||||
xgxs_lcpll_xtal_refclk.3=1
|
||||
tdma_intr_enable=1
|
||||
tslam_intr_enable=1
|
||||
tslam_dma_enable.2=1
|
||||
tslam_dma_enable.3=1
|
||||
#dport_map_port=0
|
||||
#dport_map_enable=0
|
||||
#dport_map_indexed=0
|
||||
#bcm_xlate_port_enable.0=0
|
||||
#xgxs_pdetect_1=0
|
||||
table_dma_enable.0=1
|
||||
table_dma_enable.1=1
|
||||
table_dma_enable.2=1
|
||||
table_dma_enable.3=1
|
||||
serdes_driver_current_lane0_1=2
|
||||
serdes_pre_driver_current_lane0_1=2
|
||||
serdes_preemphasis_lane0_1=0x8fc0
|
||||
serdes_driver_current_lane1_1=2
|
||||
serdes_pre_driver_current_lane1_1=2
|
||||
serdes_preemphasis_lane1_1=0x8fc0
|
||||
serdes_driver_current_lane2_1=2
|
||||
serdes_pre_driver_current_lane2_1=2
|
||||
serdes_preemphasis_lane2_1=0x8fc0
|
||||
serdes_driver_current_lane3_1=2
|
||||
serdes_pre_driver_current_lane3_1=2
|
||||
serdes_preemphasis_lane3_1=0x8fc0
|
||||
serdes_driver_current_lane0_2=3
|
||||
serdes_pre_driver_current_lane0_2=2
|
||||
serdes_preemphasis_lane0_2=0x8fc0
|
||||
serdes_driver_current_lane1_2=3
|
||||
serdes_pre_driver_current_lane1_2=2
|
||||
serdes_preemphasis_lane1_2=0x8fc0
|
||||
serdes_driver_current_lane2_2=3
|
||||
serdes_pre_driver_current_lane2_2=2
|
||||
serdes_preemphasis_lane2_2=0x8fc0
|
||||
serdes_driver_current_lane3_2=3
|
||||
serdes_pre_driver_current_lane3_2=2
|
||||
serdes_preemphasis_lane3_2=0x8fc0
|
||||
serdes_driver_current_lane0_3=2
|
||||
serdes_pre_driver_current_lane0_3=2
|
||||
serdes_preemphasis_lane0_3=0x8fc0
|
||||
serdes_driver_current_lane1_3=2
|
||||
serdes_pre_driver_current_lane1_3=2
|
||||
serdes_preemphasis_lane1_3=0x8fc0
|
||||
serdes_driver_current_lane2_3=2
|
||||
serdes_pre_driver_current_lane2_3=2
|
||||
serdes_preemphasis_lane2_3=0x8fc0
|
||||
serdes_driver_current_lane3_3=2
|
||||
serdes_pre_driver_current_lane3_3=2
|
||||
serdes_preemphasis_lane3_3=0x8fc0
|
||||
serdes_driver_current_lane0_4=2
|
||||
serdes_pre_driver_current_lane0_4=2
|
||||
serdes_preemphasis_lane0_4=0x8fc0
|
||||
serdes_driver_current_lane1_4=2
|
||||
serdes_pre_driver_current_lane1_4=2
|
||||
serdes_preemphasis_lane1_4=0x8fc0
|
||||
serdes_driver_current_lane2_4=2
|
||||
serdes_pre_driver_current_lane2_4=2
|
||||
serdes_preemphasis_lane2_4=0x8fc0
|
||||
serdes_driver_current_lane3_4=2
|
||||
serdes_pre_driver_current_lane3_4=2
|
||||
serdes_preemphasis_lane3_4=0x8fc0
|
||||
serdes_driver_current_lane0_5=4
|
||||
serdes_pre_driver_current_lane0_5=4
|
||||
serdes_preemphasis_lane0_5=0xbf00
|
||||
serdes_driver_current_lane1_5=4
|
||||
serdes_pre_driver_current_lane1_5=4
|
||||
serdes_preemphasis_lane1_5=0xbf00
|
||||
serdes_driver_current_lane2_5=4
|
||||
serdes_pre_driver_current_lane2_5=4
|
||||
serdes_preemphasis_lane2_5=0xbf00
|
||||
serdes_driver_current_lane3_5=4
|
||||
serdes_pre_driver_current_lane3_5=4
|
||||
serdes_preemphasis_lane3_5=0xbf00
|
||||
serdes_driver_current_lane0_6=4
|
||||
serdes_pre_driver_current_lane0_6=4
|
||||
serdes_preemphasis_lane0_6=0xbb10
|
||||
serdes_driver_current_lane1_6=4
|
||||
serdes_pre_driver_current_lane1_6=4
|
||||
serdes_preemphasis_lane1_6=0xbb10
|
||||
serdes_driver_current_lane2_6=4
|
||||
serdes_pre_driver_current_lane2_6=4
|
||||
serdes_preemphasis_lane2_6=0xbb10
|
||||
serdes_driver_current_lane3_6=4
|
||||
serdes_pre_driver_current_lane3_6=4
|
||||
serdes_preemphasis_lane3_6=0xbb10
|
||||
serdes_driver_current_lane0_7=3
|
||||
serdes_pre_driver_current_lane0_7=3
|
||||
serdes_preemphasis_lane0_7=0xcad0
|
||||
serdes_driver_current_lane1_7=3
|
||||
serdes_pre_driver_current_lane1_7=3
|
||||
serdes_preemphasis_lane1_7=0xcad0
|
||||
serdes_driver_current_lane2_7=3
|
||||
serdes_pre_driver_current_lane2_7=3
|
||||
serdes_preemphasis_lane2_7=0xcad0
|
||||
serdes_driver_current_lane3_7=3
|
||||
serdes_pre_driver_current_lane3_7=3
|
||||
serdes_preemphasis_lane3_7=0xcad0
|
||||
serdes_driver_current_lane0_8=3
|
||||
serdes_pre_driver_current_lane0_8=3
|
||||
serdes_preemphasis_lane0_8=0xcad0
|
||||
serdes_driver_current_lane1_8=3
|
||||
serdes_pre_driver_current_lane1_8=3
|
||||
serdes_preemphasis_lane1_8=0xcad0
|
||||
serdes_driver_current_lane2_8=3
|
||||
serdes_pre_driver_current_lane2_8=3
|
||||
serdes_preemphasis_lane2_8=0xcad0
|
||||
serdes_driver_current_lane3_8=3
|
||||
serdes_pre_driver_current_lane3_8=3
|
||||
serdes_preemphasis_lane3_8=0xcad0
|
||||
serdes_driver_current_lane0_9=3
|
||||
serdes_pre_driver_current_lane0_9=3
|
||||
serdes_preemphasis_lane0_9=0xc2f0
|
||||
serdes_driver_current_lane1_9=3
|
||||
serdes_pre_driver_current_lane1_9=3
|
||||
serdes_preemphasis_lane1_9=0xc2f0
|
||||
serdes_driver_current_lane2_9=3
|
||||
serdes_pre_driver_current_lane2_9=3
|
||||
serdes_preemphasis_lane2_9=0xc2f0
|
||||
serdes_driver_current_lane3_9=3
|
||||
serdes_pre_driver_current_lane3_9=3
|
||||
serdes_preemphasis_lane3_9=0xc2f0
|
||||
serdes_driver_current_lane0_10=3
|
||||
serdes_pre_driver_current_lane0_10=3
|
||||
serdes_preemphasis_lane0_10=0xc6e0
|
||||
serdes_driver_current_lane1_10=3
|
||||
serdes_pre_driver_current_lane1_10=3
|
||||
serdes_preemphasis_lane1_10=0xc6e0
|
||||
serdes_driver_current_lane2_10=3
|
||||
serdes_pre_driver_current_lane2_10=3
|
||||
serdes_preemphasis_lane2_10=0xc6e0
|
||||
serdes_driver_current_lane3_10=3
|
||||
serdes_pre_driver_current_lane3_10=3
|
||||
serdes_preemphasis_lane3_10=0xc6e0
|
||||
serdes_driver_current_lane0_11=3
|
||||
serdes_pre_driver_current_lane0_11=3
|
||||
serdes_preemphasis_lane0_11=0xc2f0
|
||||
serdes_driver_current_lane1_11=3
|
||||
serdes_pre_driver_current_lane1_11=3
|
||||
serdes_preemphasis_lane1_11=0xc2f0
|
||||
serdes_driver_current_lane2_11=3
|
||||
serdes_pre_driver_current_lane2_11=3
|
||||
serdes_preemphasis_lane2_11=0xc2f0
|
||||
serdes_driver_current_lane3_11=3
|
||||
serdes_pre_driver_current_lane3_11=3
|
||||
serdes_preemphasis_lane3_11=0xc2f0
|
||||
serdes_driver_current_lane0_12=3
|
||||
serdes_pre_driver_current_lane0_12=3
|
||||
serdes_preemphasis_lane0_12=0xc2f0
|
||||
serdes_driver_current_lane1_12=3
|
||||
serdes_pre_driver_current_lane1_12=3
|
||||
serdes_preemphasis_lane1_12=0xc2f0
|
||||
serdes_driver_current_lane2_12=3
|
||||
serdes_pre_driver_current_lane2_12=3
|
||||
serdes_preemphasis_lane2_12=0xc2f0
|
||||
serdes_driver_current_lane3_12=3
|
||||
serdes_pre_driver_current_lane3_12=3
|
||||
serdes_preemphasis_lane3_12=0xc2f0
|
||||
serdes_driver_current_lane0_13=3
|
||||
serdes_pre_driver_current_lane0_13=3
|
||||
serdes_preemphasis_lane0_13=0xc2f0
|
||||
serdes_driver_current_lane1_13=3
|
||||
serdes_pre_driver_current_lane1_13=3
|
||||
serdes_preemphasis_lane1_13=0xc2f0
|
||||
serdes_driver_current_lane2_13=3
|
||||
serdes_pre_driver_current_lane2_13=3
|
||||
serdes_preemphasis_lane2_13=0xc2f0
|
||||
serdes_driver_current_lane3_13=3
|
||||
serdes_pre_driver_current_lane3_13=3
|
||||
serdes_preemphasis_lane3_13=0xc2f0
|
||||
serdes_driver_current_lane0_14=3
|
||||
serdes_pre_driver_current_lane0_14=3
|
||||
serdes_preemphasis_lane0_14=0xc2f0
|
||||
serdes_driver_current_lane1_14=3
|
||||
serdes_pre_driver_current_lane1_14=3
|
||||
serdes_preemphasis_lane1_14=0xc2f0
|
||||
serdes_driver_current_lane2_14=3
|
||||
serdes_pre_driver_current_lane2_14=3
|
||||
serdes_preemphasis_lane2_14=0xc2f0
|
||||
serdes_driver_current_lane3_14=3
|
||||
serdes_pre_driver_current_lane3_14=3
|
||||
serdes_preemphasis_lane3_14=0xc2f0
|
||||
serdes_driver_current_lane0_15=3
|
||||
serdes_pre_driver_current_lane0_15=3
|
||||
serdes_preemphasis_lane0_15=0xc2f0
|
||||
serdes_driver_current_lane1_15=3
|
||||
serdes_pre_driver_current_lane1_15=3
|
||||
serdes_preemphasis_lane1_15=0xc2f0
|
||||
serdes_driver_current_lane2_15=3
|
||||
serdes_pre_driver_current_lane2_15=3
|
||||
serdes_preemphasis_lane2_15=0xc2f0
|
||||
serdes_driver_current_lane3_15=3
|
||||
serdes_pre_driver_current_lane3_15=3
|
||||
serdes_preemphasis_lane3_15=0xc2f0
|
||||
serdes_driver_current_lane0_16=3
|
||||
serdes_pre_driver_current_lane0_16=3
|
||||
serdes_preemphasis_lane0_16=0xc2f0
|
||||
serdes_driver_current_lane1_16=3
|
||||
serdes_pre_driver_current_lane1_16=3
|
||||
serdes_preemphasis_lane1_16=0xc2f0
|
||||
serdes_driver_current_lane2_16=3
|
||||
serdes_pre_driver_current_lane2_16=3
|
||||
serdes_preemphasis_lane2_16=0xc2f0
|
||||
serdes_driver_current_lane3_16=3
|
||||
serdes_pre_driver_current_lane3_16=3
|
||||
serdes_preemphasis_lane3_16=0xc2f0
|
||||
serdes_driver_current_lane0_17=3
|
||||
serdes_pre_driver_current_lane0_17=3
|
||||
serdes_preemphasis_lane0_17=0xc2f0
|
||||
serdes_driver_current_lane1_17=3
|
||||
serdes_pre_driver_current_lane1_17=3
|
||||
serdes_preemphasis_lane1_17=0xc2f0
|
||||
serdes_driver_current_lane2_17=3
|
||||
serdes_pre_driver_current_lane2_17=3
|
||||
serdes_preemphasis_lane2_17=0xc2f0
|
||||
serdes_driver_current_lane3_17=3
|
||||
serdes_pre_driver_current_lane3_17=3
|
||||
serdes_preemphasis_lane3_17=0xc2f0
|
||||
serdes_driver_current_lane0_18=3
|
||||
serdes_pre_driver_current_lane0_18=3
|
||||
serdes_preemphasis_lane0_18=0xc2f0
|
||||
serdes_driver_current_lane1_18=3
|
||||
serdes_pre_driver_current_lane1_18=3
|
||||
serdes_preemphasis_lane1_18=0xc2f0
|
||||
serdes_driver_current_lane2_18=3
|
||||
serdes_pre_driver_current_lane2_18=3
|
||||
serdes_preemphasis_lane2_18=0xc2f0
|
||||
serdes_driver_current_lane3_18=3
|
||||
serdes_pre_driver_current_lane3_18=3
|
||||
serdes_preemphasis_lane3_18=0xc2f0
|
||||
serdes_driver_current_lane0_19=3
|
||||
serdes_pre_driver_current_lane0_19=3
|
||||
serdes_preemphasis_lane0_19=0xc2f0
|
||||
serdes_driver_current_lane1_19=3
|
||||
serdes_pre_driver_current_lane1_19=3
|
||||
serdes_preemphasis_lane1_19=0xc2f0
|
||||
serdes_driver_current_lane2_19=3
|
||||
serdes_pre_driver_current_lane2_19=3
|
||||
serdes_preemphasis_lane2_19=0xc2f0
|
||||
serdes_driver_current_lane3_19=3
|
||||
serdes_pre_driver_current_lane3_19=3
|
||||
serdes_preemphasis_lane3_19=0xc2f0
|
||||
serdes_driver_current_lane0_20=3
|
||||
serdes_pre_driver_current_lane0_20=3
|
||||
serdes_preemphasis_lane0_20=0xc2f0
|
||||
serdes_driver_current_lane1_20=3
|
||||
serdes_pre_driver_current_lane1_20=3
|
||||
serdes_preemphasis_lane1_20=0xc2f0
|
||||
serdes_driver_current_lane2_20=3
|
||||
serdes_pre_driver_current_lane2_20=3
|
||||
serdes_preemphasis_lane2_20=0xc2f0
|
||||
serdes_driver_current_lane3_20=3
|
||||
serdes_pre_driver_current_lane3_20=3
|
||||
serdes_preemphasis_lane3_20=0xc2f0
|
||||
serdes_driver_current_lane0_21=3
|
||||
serdes_pre_driver_current_lane0_21=3
|
||||
serdes_preemphasis_lane0_21=0xc6e0
|
||||
serdes_driver_current_lane1_21=3
|
||||
serdes_pre_driver_current_lane1_21=3
|
||||
serdes_preemphasis_lane1_21=0xc6e0
|
||||
serdes_driver_current_lane2_21=3
|
||||
serdes_pre_driver_current_lane2_21=3
|
||||
serdes_preemphasis_lane2_21=0xc6e0
|
||||
serdes_driver_current_lane3_21=3
|
||||
serdes_pre_driver_current_lane3_21=3
|
||||
serdes_preemphasis_lane3_21=0xc6e0
|
||||
serdes_driver_current_lane0_22=3
|
||||
serdes_pre_driver_current_lane0_22=3
|
||||
serdes_preemphasis_lane0_22=0xc6e0
|
||||
serdes_driver_current_lane1_22=3
|
||||
serdes_pre_driver_current_lane1_22=3
|
||||
serdes_preemphasis_lane1_22=0xc6e0
|
||||
serdes_driver_current_lane2_22=3
|
||||
serdes_pre_driver_current_lane2_22=3
|
||||
serdes_preemphasis_lane2_22=0xc6e0
|
||||
serdes_driver_current_lane3_22=3
|
||||
serdes_pre_driver_current_lane3_22=3
|
||||
serdes_preemphasis_lane3_22=0xc6e0
|
||||
serdes_driver_current_lane0_23=3
|
||||
serdes_pre_driver_current_lane0_23=3
|
||||
serdes_preemphasis_lane0_23=0xcad0
|
||||
serdes_driver_current_lane1_23=3
|
||||
serdes_pre_driver_current_lane1_23=3
|
||||
serdes_preemphasis_lane1_23=0xcad0
|
||||
serdes_driver_current_lane2_23=3
|
||||
serdes_pre_driver_current_lane2_23=3
|
||||
serdes_preemphasis_lane2_23=0xcad0
|
||||
serdes_driver_current_lane3_23=3
|
||||
serdes_pre_driver_current_lane3_23=3
|
||||
serdes_preemphasis_lane3_23=0xcad0
|
||||
serdes_driver_current_lane0_24=3
|
||||
serdes_pre_driver_current_lane0_24=3
|
||||
serdes_preemphasis_lane0_24=0xcad0
|
||||
serdes_driver_current_lane1_24=3
|
||||
serdes_pre_driver_current_lane1_24=3
|
||||
serdes_preemphasis_lane1_24=0xcad0
|
||||
serdes_driver_current_lane2_24=3
|
||||
serdes_pre_driver_current_lane2_24=3
|
||||
serdes_preemphasis_lane2_24=0xcad0
|
||||
serdes_driver_current_lane3_24=3
|
||||
serdes_pre_driver_current_lane3_24=3
|
||||
serdes_preemphasis_lane3_24=0xcad0
|
||||
serdes_driver_current_lane0_25=5
|
||||
serdes_pre_driver_current_lane0_25=5
|
||||
serdes_preemphasis_lane0_25=0xc2f0
|
||||
serdes_driver_current_lane1_25=5
|
||||
serdes_pre_driver_current_lane1_25=5
|
||||
serdes_preemphasis_lane1_25=0xc2f0
|
||||
serdes_driver_current_lane2_25=5
|
||||
serdes_pre_driver_current_lane2_25=5
|
||||
serdes_preemphasis_lane2_25=0xc2f0
|
||||
serdes_driver_current_lane3_25=5
|
||||
serdes_pre_driver_current_lane3_25=5
|
||||
serdes_preemphasis_lane3_25=0xc2f0
|
||||
serdes_driver_current_lane0_26=5
|
||||
serdes_pre_driver_current_lane0_26=5
|
||||
serdes_preemphasis_lane0_26=0xc2f0
|
||||
serdes_driver_current_lane1_26=5
|
||||
serdes_pre_driver_current_lane1_26=5
|
||||
serdes_preemphasis_lane1_26=0xc2f0
|
||||
serdes_driver_current_lane2_26=5
|
||||
serdes_pre_driver_current_lane2_26=5
|
||||
serdes_preemphasis_lane2_26=0xc2f0
|
||||
serdes_driver_current_lane3_26=5
|
||||
serdes_pre_driver_current_lane3_26=5
|
||||
serdes_preemphasis_lane3_26=0xc2f0
|
||||
serdes_driver_current_lane0_27=5
|
||||
serdes_pre_driver_current_lane0_27=5
|
||||
serdes_preemphasis_lane0_27=0xc2f0
|
||||
serdes_driver_current_lane1_27=5
|
||||
serdes_pre_driver_current_lane1_27=5
|
||||
serdes_preemphasis_lane1_27=0xc2f0
|
||||
serdes_driver_current_lane2_27=5
|
||||
serdes_pre_driver_current_lane2_27=5
|
||||
serdes_preemphasis_lane2_27=0xc2f0
|
||||
serdes_driver_current_lane3_27=5
|
||||
serdes_pre_driver_current_lane3_27=5
|
||||
serdes_preemphasis_lane3_27=0xc2f0
|
||||
serdes_driver_current_lane0_28=8
|
||||
serdes_pre_driver_current_lane0_28=6
|
||||
serdes_preemphasis_lane0_28=0xc2f0
|
||||
serdes_driver_current_lane1_28=8
|
||||
serdes_pre_driver_current_lane1_28=6
|
||||
serdes_preemphasis_lane1_28=0xc2f0
|
||||
serdes_driver_current_lane2_28=8
|
||||
serdes_pre_driver_current_lane2_28=6
|
||||
serdes_preemphasis_lane2_28=0xc2f0
|
||||
serdes_driver_current_lane3_28=8
|
||||
serdes_pre_driver_current_lane3_28=6
|
||||
serdes_preemphasis_lane3_28=0xc2f0
|
||||
serdes_driver_current_lane0_29=2
|
||||
serdes_pre_driver_current_lane0_29=2
|
||||
serdes_preemphasis_lane0_29=0x8fc0
|
||||
serdes_driver_current_lane1_29=2
|
||||
serdes_pre_driver_current_lane1_29=2
|
||||
serdes_preemphasis_lane1_29=0x8fc0
|
||||
serdes_driver_current_lane2_29=2
|
||||
serdes_pre_driver_current_lane2_29=2
|
||||
serdes_preemphasis_lane2_29=0x8fc0
|
||||
serdes_driver_current_lane3_29=2
|
||||
serdes_pre_driver_current_lane3_29=2
|
||||
serdes_preemphasis_lane3_29=0x8fc0
|
||||
serdes_driver_current_lane0_30=2
|
||||
serdes_pre_driver_current_lane0_30=2
|
||||
serdes_preemphasis_lane0_30=0x8fc0
|
||||
serdes_driver_current_lane1_30=2
|
||||
serdes_pre_driver_current_lane1_30=2
|
||||
serdes_preemphasis_lane1_30=0x8fc0
|
||||
serdes_driver_current_lane2_30=2
|
||||
serdes_pre_driver_current_lane2_30=2
|
||||
serdes_preemphasis_lane2_30=0x8fc0
|
||||
serdes_driver_current_lane3_30=2
|
||||
serdes_pre_driver_current_lane3_30=2
|
||||
serdes_preemphasis_lane3_30=0x8fc0
|
||||
serdes_driver_current_lane0_31=2
|
||||
serdes_pre_driver_current_lane0_31=2
|
||||
serdes_preemphasis_lane0_31=0x8fc0
|
||||
serdes_driver_current_lane1_31=2
|
||||
serdes_pre_driver_current_lane1_31=2
|
||||
serdes_preemphasis_lane1_31=0x8fc0
|
||||
serdes_driver_current_lane2_31=2
|
||||
serdes_pre_driver_current_lane2_31=2
|
||||
serdes_preemphasis_lane2_31=0x8fc0
|
||||
serdes_driver_current_lane3_31=2
|
||||
serdes_pre_driver_current_lane3_31=2
|
||||
serdes_preemphasis_lane3_31=0x8fc0
|
||||
serdes_driver_current_lane0_32=2
|
||||
serdes_pre_driver_current_lane0_32=2
|
||||
serdes_preemphasis_lane0_32=0x8fc0
|
||||
serdes_driver_current_lane1_32=2
|
||||
serdes_pre_driver_current_lane1_32=2
|
||||
serdes_preemphasis_lane1_32=0x8fc0
|
||||
serdes_driver_current_lane2_32=2
|
||||
serdes_pre_driver_current_lane2_32=2
|
||||
serdes_preemphasis_lane2_32=0x8fc0
|
||||
serdes_driver_current_lane3_32=2
|
||||
serdes_pre_driver_current_lane3_32=2
|
||||
serdes_preemphasis_lane3_32=0x8fc0
|
@ -1,2 +0,0 @@
|
||||
SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/td2-a7050-q31s4-31x40G-4x10G.config.bcm
|
||||
SAI_NUM_ECMP_MEMBERS=64
|
@ -0,0 +1,14 @@
|
||||
{# Get sai.profile based on switch_role #}
|
||||
{%- if DEVICE_METADATA is defined -%}
|
||||
{%- set switch_role = DEVICE_METADATA['localhost']['type'] -%}
|
||||
{%- if 'leafrouter' in switch_role.lower() -%}
|
||||
{% set sai_profile_contents = 'SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/td2-a7050-q31s4-31x40G-4x10G-t1.config.bcm' -%}
|
||||
{%- else %}
|
||||
{%- set sai_profile_contents = 'SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/td2-a7050-q31s4-31x40G-4x10G-t0.config.bcm' -%}
|
||||
{%- endif %}
|
||||
{%- else %}
|
||||
{%- set sai_profile_contents = 'SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/td2-a7050-q31s4-31x40G-4x10G-t0.config.bcm' -%}
|
||||
{%- endif %}
|
||||
{# Write the contents of sai_ profile_filename to sai.profile file #}
|
||||
{{ sai_profile_contents }}
|
||||
SAI_NUM_ECMP_MEMBERS=64
|
@ -0,0 +1,713 @@
|
||||
# ALPM enable
|
||||
l3_alpm_enable=2
|
||||
ipv6_lpm_128b_enable=1
|
||||
l2_mem_entries=32768
|
||||
l3_mem_entries=16384
|
||||
|
||||
sai_hash_seed_config_hash_offset_enable=1
|
||||
|
||||
# disables bcmALPMDH (ALPM distributed hitbit) thread. This thread is purely for debug purpose
|
||||
l3_alpm_hit_skip=1
|
||||
|
||||
# Disable Counting ACL Drop towards interface RX_DRP counter
|
||||
sai_adjust_acl_drop_in_rx_drop=1
|
||||
|
||||
# From old config file
|
||||
os=unix
|
||||
higig2_hdr_mode=1
|
||||
|
||||
# Parity
|
||||
parity_correction=1
|
||||
parity_enable=1
|
||||
stat_if_parity_enable=0
|
||||
|
||||
# l2 thread related config vars
|
||||
l2xmsg_hostbuf_size=8192
|
||||
l2xmsg_mode=1
|
||||
|
||||
bcm_num_cos=10
|
||||
bcm_stat_interval=2000000
|
||||
lls_num_l2uc=12
|
||||
max_vp_lags=0
|
||||
miim_intr_enable=0
|
||||
mmu_lossless=0
|
||||
module_64ports=0
|
||||
|
||||
stable_size=0x2000000
|
||||
|
||||
tdma_timeout_usec=5000000
|
||||
tslam_timeout_usec=15000000
|
||||
cdma_timeout_usec=15000000
|
||||
dma_desc_timeout_usec=15000000
|
||||
|
||||
###############################
|
||||
serdes_fiber_pref=1
|
||||
###############################
|
||||
mdio_output_delay=0x0d
|
||||
###############################
|
||||
xgxs_lcpll_xtal_refclk=1
|
||||
tdma_intr_enable=1
|
||||
tslam_intr_enable=1
|
||||
table_dma_enable=1
|
||||
|
||||
arl_clean_timeout_usec=15000000
|
||||
bcm_stat_flags=1
|
||||
bcm_stat_jumbo.0=9236
|
||||
|
||||
pbmp_oversubscribe.0=0x1fffffffffffffffffffffffffe
|
||||
pbmp_xport_xe.0=0x1fffffffffffffffffffffffffe
|
||||
phy_an_c37_1.0=3
|
||||
phy_an_c37_5.0=3
|
||||
phy_an_c37_9.0=3
|
||||
phy_an_c37_13.0=3
|
||||
phy_an_c37_17.0=3
|
||||
phy_an_c37_21.0=3
|
||||
phy_an_c37_25.0=3
|
||||
phy_an_c37_29.0=3
|
||||
phy_an_c37_33.0=3
|
||||
phy_an_c37_37.0=3
|
||||
phy_an_c37_41.0=3
|
||||
phy_an_c37_45.0=3
|
||||
phy_an_c37_49.0=3
|
||||
phy_an_c37_53.0=3
|
||||
phy_an_c37_57.0=3
|
||||
phy_an_c37_61.0=3
|
||||
phy_an_c37_65.0=3
|
||||
phy_an_c37_69.0=3
|
||||
phy_an_c37_73.0=3
|
||||
phy_an_c37_77.0=3
|
||||
phy_an_c37_81.0=3
|
||||
phy_an_c37_85.0=3
|
||||
phy_an_c37_89.0=3
|
||||
phy_an_c37_93.0=3
|
||||
phy_an_c37_97.0=0
|
||||
phy_an_c37_98.0=0
|
||||
phy_an_c37_99.0=0
|
||||
phy_an_c37_100.0=0
|
||||
phy_an_c37_101.0=0
|
||||
phy_an_c37_102.0=0
|
||||
phy_an_c37_103.0=0
|
||||
phy_an_c37_104.0=0
|
||||
phy_an_c73_1.0=0
|
||||
phy_an_c73_5.0=0
|
||||
phy_an_c73_9.0=0
|
||||
phy_an_c73_13.0=0
|
||||
phy_an_c73_17.0=0
|
||||
phy_an_c73_21.0=0
|
||||
phy_an_c73_25.0=0
|
||||
phy_an_c73_29.0=0
|
||||
phy_an_c73_33.0=0
|
||||
phy_an_c73_37.0=0
|
||||
phy_an_c73_41.0=0
|
||||
phy_an_c73_45.0=0
|
||||
phy_an_c73_49.0=0
|
||||
phy_an_c73_53.0=0
|
||||
phy_an_c73_57.0=0
|
||||
phy_an_c73_61.0=0
|
||||
phy_an_c73_65.0=0
|
||||
phy_an_c73_69.0=0
|
||||
phy_an_c73_73.0=0
|
||||
phy_an_c73_77.0=0
|
||||
phy_an_c73_81.0=0
|
||||
phy_an_c73_85.0=0
|
||||
phy_an_c73_89.0=0
|
||||
phy_an_c73_93.0=0
|
||||
phy_an_c73_97.0=2
|
||||
phy_an_c73_98.0=2
|
||||
phy_an_c73_99.0=2
|
||||
phy_an_c73_100.0=2
|
||||
phy_an_c73_101.0=2
|
||||
phy_an_c73_102.0=2
|
||||
phy_an_c73_103.0=2
|
||||
phy_an_c73_104.0=2
|
||||
phy_xaui_rx_polarity_flip_1.0=0x0
|
||||
phy_xaui_rx_polarity_flip_5.0=0x0
|
||||
phy_xaui_rx_polarity_flip_9.0=0x4
|
||||
phy_xaui_rx_polarity_flip_13.0=0x0
|
||||
phy_xaui_rx_polarity_flip_17.0=0xb
|
||||
phy_xaui_rx_polarity_flip_21.0=0x3
|
||||
phy_xaui_rx_polarity_flip_25.0=0xb
|
||||
phy_xaui_rx_polarity_flip_29.0=0xf
|
||||
phy_xaui_rx_polarity_flip_33.0=0xb
|
||||
phy_xaui_rx_polarity_flip_37.0=0x3
|
||||
phy_xaui_rx_polarity_flip_41.0=0xb
|
||||
phy_xaui_rx_polarity_flip_45.0=0x0
|
||||
phy_xaui_rx_polarity_flip_49.0=0x4
|
||||
phy_xaui_rx_polarity_flip_53.0=0xc
|
||||
phy_xaui_rx_polarity_flip_57.0=0x4
|
||||
phy_xaui_rx_polarity_flip_61.0=0x0
|
||||
phy_xaui_rx_polarity_flip_65.0=0xb
|
||||
phy_xaui_rx_polarity_flip_69.0=0x3
|
||||
phy_xaui_rx_polarity_flip_73.0=0xb
|
||||
phy_xaui_rx_polarity_flip_77.0=0xf
|
||||
phy_xaui_rx_polarity_flip_81.0=0xb
|
||||
phy_xaui_rx_polarity_flip_85.0=0x3
|
||||
phy_xaui_rx_polarity_flip_89.0=0x4
|
||||
phy_xaui_rx_polarity_flip_93.0=0x0
|
||||
phy_xaui_rx_polarity_flip_97.0=0xb
|
||||
phy_xaui_rx_polarity_flip_98.0=0x3
|
||||
phy_xaui_rx_polarity_flip_99.0=0x4
|
||||
phy_xaui_rx_polarity_flip_100.0=0x0
|
||||
phy_xaui_rx_polarity_flip_101.0=0x0
|
||||
phy_xaui_rx_polarity_flip_102.0=0xe
|
||||
phy_xaui_rx_polarity_flip_103.0=0x0
|
||||
phy_xaui_rx_polarity_flip_104.0=0x0
|
||||
phy_xaui_tx_polarity_flip_1.0=0x0
|
||||
phy_xaui_tx_polarity_flip_5.0=0x0
|
||||
phy_xaui_tx_polarity_flip_9.0=0x2
|
||||
phy_xaui_tx_polarity_flip_13.0=0x0
|
||||
phy_xaui_tx_polarity_flip_17.0=0xd
|
||||
phy_xaui_tx_polarity_flip_21.0=0xc
|
||||
phy_xaui_tx_polarity_flip_25.0=0xd
|
||||
phy_xaui_tx_polarity_flip_29.0=0xf
|
||||
phy_xaui_tx_polarity_flip_33.0=0xd
|
||||
phy_xaui_tx_polarity_flip_37.0=0xc
|
||||
phy_xaui_tx_polarity_flip_41.0=0xd
|
||||
phy_xaui_tx_polarity_flip_45.0=0x0
|
||||
phy_xaui_tx_polarity_flip_49.0=0x2
|
||||
phy_xaui_tx_polarity_flip_53.0=0x3
|
||||
phy_xaui_tx_polarity_flip_57.0=0x2
|
||||
phy_xaui_tx_polarity_flip_61.0=0x0
|
||||
phy_xaui_tx_polarity_flip_65.0=0xd
|
||||
phy_xaui_tx_polarity_flip_69.0=0xc
|
||||
phy_xaui_tx_polarity_flip_73.0=0xd
|
||||
phy_xaui_tx_polarity_flip_77.0=0xf
|
||||
phy_xaui_tx_polarity_flip_81.0=0xd
|
||||
phy_xaui_tx_polarity_flip_85.0=0xc
|
||||
phy_xaui_tx_polarity_flip_89.0=0x2
|
||||
phy_xaui_tx_polarity_flip_93.0=0x0
|
||||
phy_xaui_tx_polarity_flip_97.0=0xd
|
||||
phy_xaui_tx_polarity_flip_98.0=0xc
|
||||
phy_xaui_tx_polarity_flip_99.0=0x2
|
||||
phy_xaui_tx_polarity_flip_100.0=0x0
|
||||
phy_xaui_tx_polarity_flip_101.0=0x0
|
||||
phy_xaui_tx_polarity_flip_102.0=0x7
|
||||
phy_xaui_tx_polarity_flip_103.0=0x2
|
||||
phy_xaui_tx_polarity_flip_104.0=0x0
|
||||
port_init_autoneg_1.0=0
|
||||
port_init_autoneg_5.0=0
|
||||
port_init_autoneg_9.0=0
|
||||
port_init_autoneg_13.0=0
|
||||
port_init_autoneg_17.0=0
|
||||
port_init_autoneg_21.0=0
|
||||
port_init_autoneg_25.0=0
|
||||
port_init_autoneg_29.0=0
|
||||
port_init_autoneg_33.0=0
|
||||
port_init_autoneg_37.0=0
|
||||
port_init_autoneg_41.0=0
|
||||
port_init_autoneg_45.0=0
|
||||
port_init_autoneg_49.0=0
|
||||
port_init_autoneg_53.0=0
|
||||
port_init_autoneg_57.0=0
|
||||
port_init_autoneg_61.0=0
|
||||
port_init_autoneg_65.0=0
|
||||
port_init_autoneg_69.0=0
|
||||
port_init_autoneg_73.0=0
|
||||
port_init_autoneg_77.0=0
|
||||
port_init_autoneg_81.0=0
|
||||
port_init_autoneg_85.0=0
|
||||
port_init_autoneg_89.0=0
|
||||
port_init_autoneg_93.0=0
|
||||
port_init_autoneg_97.0=0
|
||||
port_init_autoneg_98.0=0
|
||||
port_init_autoneg_99.0=0
|
||||
port_init_autoneg_100.0=0
|
||||
port_init_autoneg_101.0=0
|
||||
port_init_autoneg_102.0=0
|
||||
port_init_autoneg_103.0=0
|
||||
port_init_autoneg_104.0=0
|
||||
port_init_cl72.0=0
|
||||
portmap_1.0=9:10
|
||||
portmap_2.0=10:10
|
||||
portmap_3.0=11:10
|
||||
portmap_4.0=12:10
|
||||
portmap_5.0=13:40
|
||||
portmap_9.0=17:40
|
||||
portmap_13.0=21:40
|
||||
portmap_17.0=29:40
|
||||
portmap_21.0=25:40
|
||||
portmap_25.0=33:40
|
||||
portmap_29.0=37:40
|
||||
portmap_33.0=45:40
|
||||
portmap_37.0=41:40
|
||||
portmap_41.0=49:40
|
||||
portmap_45.0=53:40
|
||||
portmap_49.0=69:40
|
||||
portmap_53.0=65:40
|
||||
portmap_57.0=73:40
|
||||
portmap_61.0=77:40
|
||||
portmap_65.0=93:40
|
||||
portmap_69.0=89:40
|
||||
portmap_73.0=97:40
|
||||
portmap_77.0=101:40
|
||||
portmap_81.0=109:40
|
||||
portmap_85.0=105:40
|
||||
portmap_89.0=121:40
|
||||
portmap_93.0=125:40
|
||||
portmap_97.0=61:40
|
||||
portmap_98.0=57:40
|
||||
portmap_99.0=81:40
|
||||
portmap_100.0=85:40
|
||||
portmap_101.0=117:40
|
||||
portmap_102.0=113:40
|
||||
portmap_103.0=1:40
|
||||
portmap_104.0=5:40
|
||||
schan_intr_enable=0
|
||||
serdes_firmware_mode_1.0=2
|
||||
serdes_firmware_mode_5.0=2
|
||||
serdes_firmware_mode_9.0=2
|
||||
serdes_firmware_mode_13.0=2
|
||||
serdes_firmware_mode_17.0=2
|
||||
serdes_firmware_mode_21.0=2
|
||||
serdes_firmware_mode_25.0=2
|
||||
serdes_firmware_mode_29.0=2
|
||||
serdes_firmware_mode_33.0=2
|
||||
serdes_firmware_mode_37.0=2
|
||||
serdes_firmware_mode_41.0=2
|
||||
serdes_firmware_mode_45.0=2
|
||||
serdes_firmware_mode_49.0=2
|
||||
serdes_firmware_mode_53.0=2
|
||||
serdes_firmware_mode_57.0=2
|
||||
serdes_firmware_mode_61.0=2
|
||||
serdes_firmware_mode_65.0=2
|
||||
serdes_firmware_mode_69.0=2
|
||||
serdes_firmware_mode_73.0=2
|
||||
serdes_firmware_mode_77.0=2
|
||||
serdes_firmware_mode_81.0=2
|
||||
serdes_firmware_mode_85.0=2
|
||||
serdes_firmware_mode_89.0=2
|
||||
serdes_firmware_mode_93.0=2
|
||||
serdes_firmware_mode_97.0=2
|
||||
serdes_firmware_mode_98.0=2
|
||||
serdes_firmware_mode_99.0=2
|
||||
serdes_firmware_mode_100.0=2
|
||||
serdes_firmware_mode_101.0=2
|
||||
serdes_firmware_mode_102.0=2
|
||||
serdes_firmware_mode_103.0=2
|
||||
serdes_firmware_mode_104.0=2
|
||||
xgxs_rx_lane_map_1.0=0x3210
|
||||
xgxs_rx_lane_map_5.0=0x0321
|
||||
xgxs_rx_lane_map_9.0=0x1302
|
||||
xgxs_rx_lane_map_13.0=0x0213
|
||||
xgxs_rx_lane_map_17.0=0x1302
|
||||
xgxs_rx_lane_map_21.0=0x1302
|
||||
xgxs_rx_lane_map_25.0=0x1302
|
||||
xgxs_rx_lane_map_29.0=0x0213
|
||||
xgxs_rx_lane_map_33.0=0x1302
|
||||
xgxs_rx_lane_map_37.0=0x1302
|
||||
xgxs_rx_lane_map_41.0=0x1302
|
||||
xgxs_rx_lane_map_45.0=0x0213
|
||||
xgxs_rx_lane_map_49.0=0x1302
|
||||
xgxs_rx_lane_map_53.0=0x1302
|
||||
xgxs_rx_lane_map_57.0=0x1302
|
||||
xgxs_rx_lane_map_61.0=0x0213
|
||||
xgxs_rx_lane_map_65.0=0x1302
|
||||
xgxs_rx_lane_map_69.0=0x1302
|
||||
xgxs_rx_lane_map_73.0=0x1302
|
||||
xgxs_rx_lane_map_77.0=0x0213
|
||||
xgxs_rx_lane_map_81.0=0x1302
|
||||
xgxs_rx_lane_map_85.0=0x1302
|
||||
xgxs_rx_lane_map_89.0=0x1302
|
||||
xgxs_rx_lane_map_93.0=0x0213
|
||||
xgxs_rx_lane_map_97.0=0x1302
|
||||
xgxs_rx_lane_map_98.0=0x1302
|
||||
xgxs_rx_lane_map_99.0=0x1302
|
||||
xgxs_rx_lane_map_100.0=0x0213
|
||||
xgxs_rx_lane_map_101.0=0x0213
|
||||
xgxs_rx_lane_map_102.0=0x1302
|
||||
xgxs_rx_lane_map_103.0=0x0123
|
||||
xgxs_rx_lane_map_104.0=0x2031
|
||||
xgxs_tx_lane_map_1.0=0x0123
|
||||
xgxs_tx_lane_map_5.0=0x0321
|
||||
xgxs_tx_lane_map_9.0=0x2031
|
||||
xgxs_tx_lane_map_13.0=0x0213
|
||||
xgxs_tx_lane_map_17.0=0x2031
|
||||
xgxs_tx_lane_map_21.0=0x2031
|
||||
xgxs_tx_lane_map_25.0=0x2031
|
||||
xgxs_tx_lane_map_29.0=0x0213
|
||||
xgxs_tx_lane_map_33.0=0x2031
|
||||
xgxs_tx_lane_map_37.0=0x2031
|
||||
xgxs_tx_lane_map_41.0=0x2031
|
||||
xgxs_tx_lane_map_45.0=0x0213
|
||||
xgxs_tx_lane_map_49.0=0x2031
|
||||
xgxs_tx_lane_map_53.0=0x2031
|
||||
xgxs_tx_lane_map_57.0=0x2031
|
||||
xgxs_tx_lane_map_61.0=0x0213
|
||||
xgxs_tx_lane_map_65.0=0x2031
|
||||
xgxs_tx_lane_map_69.0=0x2031
|
||||
xgxs_tx_lane_map_73.0=0x2031
|
||||
xgxs_tx_lane_map_77.0=0x0213
|
||||
xgxs_tx_lane_map_81.0=0x2031
|
||||
xgxs_tx_lane_map_85.0=0x2031
|
||||
xgxs_tx_lane_map_89.0=0x2031
|
||||
xgxs_tx_lane_map_93.0=0x0213
|
||||
xgxs_tx_lane_map_97.0=0x2031
|
||||
xgxs_tx_lane_map_98.0=0x2031
|
||||
xgxs_tx_lane_map_99.0=0x2031
|
||||
xgxs_tx_lane_map_100.0=0x0213
|
||||
xgxs_tx_lane_map_101.0=0x0213
|
||||
xgxs_tx_lane_map_102.0=0x2031
|
||||
xgxs_tx_lane_map_103.0=0x3120
|
||||
xgxs_tx_lane_map_104.0=0x1302
|
||||
|
||||
# tuning parameters
|
||||
serdes_preemphasis_lane0_1.0=0x81f7
|
||||
serdes_preemphasis_lane1_1.0=0x81f7
|
||||
serdes_preemphasis_lane2_1.0=0x81f7
|
||||
serdes_preemphasis_lane3_1.0=0x81f7
|
||||
serdes_pre_driver_current_lane0_5.0=0x7
|
||||
serdes_driver_current_lane0_5.0=0x7
|
||||
serdes_preemphasis_lane0_5.0=0xc2f0
|
||||
serdes_pre_driver_current_lane1_5.0=0x7
|
||||
serdes_driver_current_lane1_5.0=0x7
|
||||
serdes_preemphasis_lane1_5.0=0xc2f0
|
||||
serdes_pre_driver_current_lane2_5.0=0x7
|
||||
serdes_driver_current_lane2_5.0=0x7
|
||||
serdes_preemphasis_lane2_5.0=0xc2f0
|
||||
serdes_pre_driver_current_lane3_5.0=0x7
|
||||
serdes_driver_current_lane3_5.0=0x7
|
||||
serdes_preemphasis_lane3_5.0=0xc2f0
|
||||
serdes_pre_driver_current_lane0_9.0=0x7
|
||||
serdes_driver_current_lane0_9.0=0x7
|
||||
serdes_preemphasis_lane0_9.0=0xbb10
|
||||
serdes_pre_driver_current_lane1_9.0=0x7
|
||||
serdes_driver_current_lane1_9.0=0x7
|
||||
serdes_preemphasis_lane1_9.0=0xbb10
|
||||
serdes_pre_driver_current_lane2_9.0=0x7
|
||||
serdes_driver_current_lane2_9.0=0x7
|
||||
serdes_preemphasis_lane2_9.0=0xbb10
|
||||
serdes_pre_driver_current_lane3_9.0=0x7
|
||||
serdes_driver_current_lane3_9.0=0x7
|
||||
serdes_preemphasis_lane3_9.0=0xbb10
|
||||
serdes_pre_driver_current_lane0_13.0=0x7
|
||||
serdes_driver_current_lane0_13.0=0x7
|
||||
serdes_preemphasis_lane0_13.0=0xbb10
|
||||
serdes_pre_driver_current_lane1_13.0=0x7
|
||||
serdes_driver_current_lane1_13.0=0x7
|
||||
serdes_preemphasis_lane1_13.0=0xbb10
|
||||
serdes_pre_driver_current_lane2_13.0=0x7
|
||||
serdes_driver_current_lane2_13.0=0x7
|
||||
serdes_preemphasis_lane2_13.0=0xbb10
|
||||
serdes_pre_driver_current_lane3_13.0=0x7
|
||||
serdes_driver_current_lane3_13.0=0x7
|
||||
serdes_preemphasis_lane3_13.0=0xbb10
|
||||
serdes_pre_driver_current_lane0_17.0=0x6
|
||||
serdes_driver_current_lane0_17.0=0x6
|
||||
serdes_preemphasis_lane0_17.0=0xb720
|
||||
serdes_pre_driver_current_lane1_17.0=0x6
|
||||
serdes_driver_current_lane1_17.0=0x6
|
||||
serdes_preemphasis_lane1_17.0=0xb720
|
||||
serdes_pre_driver_current_lane2_17.0=0x6
|
||||
serdes_driver_current_lane2_17.0=0x6
|
||||
serdes_preemphasis_lane2_17.0=0xb720
|
||||
serdes_pre_driver_current_lane3_17.0=0x6
|
||||
serdes_driver_current_lane3_17.0=0x6
|
||||
serdes_preemphasis_lane3_17.0=0xb720
|
||||
serdes_pre_driver_current_lane0_21.0=0x7
|
||||
serdes_driver_current_lane0_21.0=0x7
|
||||
serdes_preemphasis_lane0_21.0=0xbb10
|
||||
serdes_pre_driver_current_lane1_21.0=0x7
|
||||
serdes_driver_current_lane1_21.0=0x7
|
||||
serdes_preemphasis_lane1_21.0=0xbb10
|
||||
serdes_pre_driver_current_lane2_21.0=0x7
|
||||
serdes_driver_current_lane2_21.0=0x7
|
||||
serdes_preemphasis_lane2_21.0=0xbb10
|
||||
serdes_pre_driver_current_lane3_21.0=0x7
|
||||
serdes_driver_current_lane3_21.0=0x7
|
||||
serdes_preemphasis_lane3_21.0=0xbb10
|
||||
serdes_pre_driver_current_lane0_25.0=0x5
|
||||
serdes_driver_current_lane0_25.0=0x5
|
||||
serdes_preemphasis_lane0_25.0=0xb720
|
||||
serdes_pre_driver_current_lane1_25.0=0x5
|
||||
serdes_driver_current_lane1_25.0=0x5
|
||||
serdes_preemphasis_lane1_25.0=0xb720
|
||||
serdes_pre_driver_current_lane2_25.0=0x5
|
||||
serdes_driver_current_lane2_25.0=0x5
|
||||
serdes_preemphasis_lane2_25.0=0xb720
|
||||
serdes_pre_driver_current_lane3_25.0=0x5
|
||||
serdes_driver_current_lane3_25.0=0x5
|
||||
serdes_preemphasis_lane3_25.0=0xb720
|
||||
serdes_pre_driver_current_lane0_29.0=0x5
|
||||
serdes_driver_current_lane0_29.0=0x5
|
||||
serdes_preemphasis_lane0_29.0=0xb720
|
||||
serdes_pre_driver_current_lane1_29.0=0x5
|
||||
serdes_driver_current_lane1_29.0=0x5
|
||||
serdes_preemphasis_lane1_29.0=0xb720
|
||||
serdes_pre_driver_current_lane2_29.0=0x5
|
||||
serdes_driver_current_lane2_29.0=0x5
|
||||
serdes_preemphasis_lane2_29.0=0xb720
|
||||
serdes_pre_driver_current_lane3_29.0=0x5
|
||||
serdes_driver_current_lane3_29.0=0x5
|
||||
serdes_preemphasis_lane3_29.0=0xb720
|
||||
serdes_pre_driver_current_lane0_33.0=0x4
|
||||
serdes_driver_current_lane0_33.0=0x4
|
||||
serdes_preemphasis_lane0_33.0=0xb720
|
||||
serdes_pre_driver_current_lane1_33.0=0x4
|
||||
serdes_driver_current_lane1_33.0=0x4
|
||||
serdes_preemphasis_lane1_33.0=0xb720
|
||||
serdes_pre_driver_current_lane2_33.0=0x4
|
||||
serdes_driver_current_lane2_33.0=0x4
|
||||
serdes_preemphasis_lane2_33.0=0xb720
|
||||
serdes_pre_driver_current_lane3_33.0=0x4
|
||||
serdes_driver_current_lane3_33.0=0x4
|
||||
serdes_preemphasis_lane3_33.0=0xb720
|
||||
serdes_pre_driver_current_lane0_37.0=0x5
|
||||
serdes_driver_current_lane0_37.0=0x5
|
||||
serdes_preemphasis_lane0_37.0=0xb720
|
||||
serdes_pre_driver_current_lane1_37.0=0x5
|
||||
serdes_driver_current_lane1_37.0=0x5
|
||||
serdes_preemphasis_lane1_37.0=0xb720
|
||||
serdes_pre_driver_current_lane2_37.0=0x5
|
||||
serdes_driver_current_lane2_37.0=0x5
|
||||
serdes_preemphasis_lane2_37.0=0xb720
|
||||
serdes_pre_driver_current_lane3_37.0=0x5
|
||||
serdes_driver_current_lane3_37.0=0x5
|
||||
serdes_preemphasis_lane3_37.0=0xb720
|
||||
serdes_pre_driver_current_lane0_41.0=0x3
|
||||
serdes_driver_current_lane0_41.0=0x3
|
||||
serdes_preemphasis_lane0_41.0=0xb330
|
||||
serdes_pre_driver_current_lane1_41.0=0x3
|
||||
serdes_driver_current_lane1_41.0=0x3
|
||||
serdes_preemphasis_lane1_41.0=0xb330
|
||||
serdes_pre_driver_current_lane2_41.0=0x3
|
||||
serdes_driver_current_lane2_41.0=0x3
|
||||
serdes_preemphasis_lane2_41.0=0xb330
|
||||
serdes_pre_driver_current_lane3_41.0=0x3
|
||||
serdes_driver_current_lane3_41.0=0x3
|
||||
serdes_preemphasis_lane3_41.0=0xb330
|
||||
serdes_pre_driver_current_lane0_45.0=0x4
|
||||
serdes_driver_current_lane0_45.0=0x4
|
||||
serdes_preemphasis_lane0_45.0=0xb720
|
||||
serdes_pre_driver_current_lane1_45.0=0x4
|
||||
serdes_driver_current_lane1_45.0=0x4
|
||||
serdes_preemphasis_lane1_45.0=0xb720
|
||||
serdes_pre_driver_current_lane2_45.0=0x4
|
||||
serdes_driver_current_lane2_45.0=0x4
|
||||
serdes_preemphasis_lane2_45.0=0xb720
|
||||
serdes_pre_driver_current_lane3_45.0=0x4
|
||||
serdes_driver_current_lane3_45.0=0x4
|
||||
serdes_preemphasis_lane3_45.0=0xb720
|
||||
serdes_pre_driver_current_lane0_49.0=0x3
|
||||
serdes_driver_current_lane0_49.0=0x3
|
||||
serdes_preemphasis_lane0_49.0=0xb330
|
||||
serdes_pre_driver_current_lane1_49.0=0x3
|
||||
serdes_driver_current_lane1_49.0=0x3
|
||||
serdes_preemphasis_lane1_49.0=0xb330
|
||||
serdes_pre_driver_current_lane2_49.0=0x3
|
||||
serdes_driver_current_lane2_49.0=0x3
|
||||
serdes_preemphasis_lane2_49.0=0xb330
|
||||
serdes_pre_driver_current_lane3_49.0=0x3
|
||||
serdes_driver_current_lane3_49.0=0x3
|
||||
serdes_preemphasis_lane3_49.0=0xb330
|
||||
serdes_pre_driver_current_lane0_53.0=0x4
|
||||
serdes_driver_current_lane0_53.0=0x4
|
||||
serdes_preemphasis_lane0_53.0=0xb720
|
||||
serdes_pre_driver_current_lane1_53.0=0x4
|
||||
serdes_driver_current_lane1_53.0=0x4
|
||||
serdes_preemphasis_lane1_53.0=0xb720
|
||||
serdes_pre_driver_current_lane2_53.0=0x4
|
||||
serdes_driver_current_lane2_53.0=0x4
|
||||
serdes_preemphasis_lane2_53.0=0xb720
|
||||
serdes_pre_driver_current_lane3_53.0=0x4
|
||||
serdes_driver_current_lane3_53.0=0x4
|
||||
serdes_preemphasis_lane3_53.0=0xb720
|
||||
serdes_pre_driver_current_lane0_57.0=0x3
|
||||
serdes_driver_current_lane0_57.0=0x3
|
||||
serdes_preemphasis_lane0_57.0=0xb330
|
||||
serdes_pre_driver_current_lane1_57.0=0x3
|
||||
serdes_driver_current_lane1_57.0=0x3
|
||||
serdes_preemphasis_lane1_57.0=0xb330
|
||||
serdes_pre_driver_current_lane2_57.0=0x3
|
||||
serdes_driver_current_lane2_57.0=0x3
|
||||
serdes_preemphasis_lane2_57.0=0xb330
|
||||
serdes_pre_driver_current_lane3_57.0=0x3
|
||||
serdes_driver_current_lane3_57.0=0x3
|
||||
serdes_preemphasis_lane3_57.0=0xb330
|
||||
serdes_pre_driver_current_lane0_61.0=0x4
|
||||
serdes_driver_current_lane0_61.0=0x4
|
||||
serdes_preemphasis_lane0_61.0=0xb720
|
||||
serdes_pre_driver_current_lane1_61.0=0x4
|
||||
serdes_driver_current_lane1_61.0=0x4
|
||||
serdes_preemphasis_lane1_61.0=0xb720
|
||||
serdes_pre_driver_current_lane2_61.0=0x4
|
||||
serdes_driver_current_lane2_61.0=0x4
|
||||
serdes_preemphasis_lane2_61.0=0xb720
|
||||
serdes_pre_driver_current_lane3_61.0=0x4
|
||||
serdes_driver_current_lane3_61.0=0x4
|
||||
serdes_preemphasis_lane3_61.0=0xb720
|
||||
serdes_pre_driver_current_lane0_65.0=0x4
|
||||
serdes_driver_current_lane0_65.0=0x4
|
||||
serdes_preemphasis_lane0_65.0=0xb720
|
||||
serdes_pre_driver_current_lane1_65.0=0x4
|
||||
serdes_driver_current_lane1_65.0=0x4
|
||||
serdes_preemphasis_lane1_65.0=0xb720
|
||||
serdes_pre_driver_current_lane2_65.0=0x4
|
||||
serdes_driver_current_lane2_65.0=0x4
|
||||
serdes_preemphasis_lane2_65.0=0xb720
|
||||
serdes_pre_driver_current_lane3_65.0=0x4
|
||||
serdes_driver_current_lane3_65.0=0x4
|
||||
serdes_preemphasis_lane3_65.0=0xb720
|
||||
serdes_pre_driver_current_lane0_69.0=0x4
|
||||
serdes_driver_current_lane0_69.0=0x4
|
||||
serdes_preemphasis_lane0_69.0=0xb720
|
||||
serdes_pre_driver_current_lane1_69.0=0x4
|
||||
serdes_driver_current_lane1_69.0=0x4
|
||||
serdes_preemphasis_lane1_69.0=0xb720
|
||||
serdes_pre_driver_current_lane2_69.0=0x4
|
||||
serdes_driver_current_lane2_69.0=0x4
|
||||
serdes_preemphasis_lane2_69.0=0xb720
|
||||
serdes_pre_driver_current_lane3_69.0=0x4
|
||||
serdes_driver_current_lane3_69.0=0x4
|
||||
serdes_preemphasis_lane3_69.0=0xb720
|
||||
serdes_pre_driver_current_lane0_73.0=0x4
|
||||
serdes_driver_current_lane0_73.0=0x4
|
||||
serdes_preemphasis_lane0_73.0=0xb720
|
||||
serdes_pre_driver_current_lane1_73.0=0x4
|
||||
serdes_driver_current_lane1_73.0=0x4
|
||||
serdes_preemphasis_lane1_73.0=0xb720
|
||||
serdes_pre_driver_current_lane2_73.0=0x4
|
||||
serdes_driver_current_lane2_73.0=0x4
|
||||
serdes_preemphasis_lane2_73.0=0xb720
|
||||
serdes_pre_driver_current_lane3_73.0=0x4
|
||||
serdes_driver_current_lane3_73.0=0x4
|
||||
serdes_preemphasis_lane3_73.0=0xb720
|
||||
serdes_pre_driver_current_lane0_77.0=0x5
|
||||
serdes_driver_current_lane0_77.0=0x5
|
||||
serdes_preemphasis_lane0_77.0=0xb720
|
||||
serdes_pre_driver_current_lane1_77.0=0x5
|
||||
serdes_driver_current_lane1_77.0=0x5
|
||||
serdes_preemphasis_lane1_77.0=0xb720
|
||||
serdes_pre_driver_current_lane2_77.0=0x5
|
||||
serdes_driver_current_lane2_77.0=0x5
|
||||
serdes_preemphasis_lane2_77.0=0xb720
|
||||
serdes_pre_driver_current_lane3_77.0=0x5
|
||||
serdes_driver_current_lane3_77.0=0x5
|
||||
serdes_preemphasis_lane3_77.0=0xb720
|
||||
serdes_pre_driver_current_lane0_81.0=0x5
|
||||
serdes_driver_current_lane0_81.0=0x5
|
||||
serdes_preemphasis_lane0_81.0=0xb720
|
||||
serdes_pre_driver_current_lane1_81.0=0x5
|
||||
serdes_driver_current_lane1_81.0=0x5
|
||||
serdes_preemphasis_lane1_81.0=0xb720
|
||||
serdes_pre_driver_current_lane2_81.0=0x5
|
||||
serdes_driver_current_lane2_81.0=0x5
|
||||
serdes_preemphasis_lane2_81.0=0xb720
|
||||
serdes_pre_driver_current_lane3_81.0=0x5
|
||||
serdes_driver_current_lane3_81.0=0x5
|
||||
serdes_preemphasis_lane3_81.0=0xb720
|
||||
serdes_pre_driver_current_lane0_85.0=0x5
|
||||
serdes_driver_current_lane0_85.0=0x5
|
||||
serdes_preemphasis_lane0_85.0=0xb720
|
||||
serdes_pre_driver_current_lane1_85.0=0x5
|
||||
serdes_driver_current_lane1_85.0=0x5
|
||||
serdes_preemphasis_lane1_85.0=0xb720
|
||||
serdes_pre_driver_current_lane2_85.0=0x5
|
||||
serdes_driver_current_lane2_85.0=0x5
|
||||
serdes_preemphasis_lane2_85.0=0xb720
|
||||
serdes_pre_driver_current_lane3_85.0=0x5
|
||||
serdes_driver_current_lane3_85.0=0x5
|
||||
serdes_preemphasis_lane3_85.0=0xb720
|
||||
serdes_pre_driver_current_lane0_89.0=0x6
|
||||
serdes_driver_current_lane0_89.0=0x6
|
||||
serdes_preemphasis_lane0_89.0=0xb720
|
||||
serdes_pre_driver_current_lane1_89.0=0x6
|
||||
serdes_driver_current_lane1_89.0=0x6
|
||||
serdes_preemphasis_lane1_89.0=0xb720
|
||||
serdes_pre_driver_current_lane2_89.0=0x6
|
||||
serdes_driver_current_lane2_89.0=0x6
|
||||
serdes_preemphasis_lane2_89.0=0xb720
|
||||
serdes_pre_driver_current_lane3_89.0=0x6
|
||||
serdes_driver_current_lane3_89.0=0x6
|
||||
serdes_preemphasis_lane3_89.0=0xb720
|
||||
serdes_pre_driver_current_lane0_93.0=0x7
|
||||
serdes_driver_current_lane0_93.0=0x7
|
||||
serdes_preemphasis_lane0_93.0=0xbb10
|
||||
serdes_pre_driver_current_lane1_93.0=0x7
|
||||
serdes_driver_current_lane1_93.0=0x7
|
||||
serdes_preemphasis_lane1_93.0=0xbb10
|
||||
serdes_pre_driver_current_lane2_93.0=0x7
|
||||
serdes_driver_current_lane2_93.0=0x7
|
||||
serdes_preemphasis_lane2_93.0=0xbb10
|
||||
serdes_pre_driver_current_lane3_93.0=0x7
|
||||
serdes_driver_current_lane3_93.0=0x7
|
||||
serdes_preemphasis_lane3_93.0=0xbb10
|
||||
serdes_pre_driver_current_lane0_97.0=0x5
|
||||
serdes_driver_current_lane0_97.0=0x5
|
||||
serdes_preemphasis_lane0_97.0=0xb720
|
||||
serdes_pre_driver_current_lane1_97.0=0x5
|
||||
serdes_driver_current_lane1_97.0=0x5
|
||||
serdes_preemphasis_lane1_97.0=0xb720
|
||||
serdes_pre_driver_current_lane2_97.0=0x5
|
||||
serdes_driver_current_lane2_97.0=0x5
|
||||
serdes_preemphasis_lane2_97.0=0xb720
|
||||
serdes_pre_driver_current_lane3_97.0=0x5
|
||||
serdes_driver_current_lane3_97.0=0x5
|
||||
serdes_preemphasis_lane3_97.0=0xb720
|
||||
serdes_pre_driver_current_lane0_98.0=0x6
|
||||
serdes_driver_current_lane0_98.0=0x6
|
||||
serdes_preemphasis_lane0_98.0=0xb720
|
||||
serdes_pre_driver_current_lane1_98.0=0x6
|
||||
serdes_driver_current_lane1_98.0=0x6
|
||||
serdes_preemphasis_lane1_98.0=0xb720
|
||||
serdes_pre_driver_current_lane2_98.0=0x6
|
||||
serdes_driver_current_lane2_98.0=0x6
|
||||
serdes_preemphasis_lane2_98.0=0xb720
|
||||
serdes_pre_driver_current_lane3_98.0=0x6
|
||||
serdes_driver_current_lane3_98.0=0x6
|
||||
serdes_preemphasis_lane3_98.0=0xb720
|
||||
serdes_pre_driver_current_lane0_99.0=0x5
|
||||
serdes_driver_current_lane0_99.0=0x5
|
||||
serdes_preemphasis_lane0_99.0=0xb720
|
||||
serdes_pre_driver_current_lane1_99.0=0x5
|
||||
serdes_driver_current_lane1_99.0=0x5
|
||||
serdes_preemphasis_lane1_99.0=0xb720
|
||||
serdes_pre_driver_current_lane2_99.0=0x5
|
||||
serdes_driver_current_lane2_99.0=0x5
|
||||
serdes_preemphasis_lane2_99.0=0xb720
|
||||
serdes_pre_driver_current_lane3_99.0=0x5
|
||||
serdes_driver_current_lane3_99.0=0x5
|
||||
serdes_preemphasis_lane3_99.0=0xb720
|
||||
serdes_pre_driver_current_lane0_100.0=0x7
|
||||
serdes_driver_current_lane0_100.0=0x7
|
||||
serdes_preemphasis_lane0_100.0=0xbb10
|
||||
serdes_pre_driver_current_lane1_100.0=0x7
|
||||
serdes_driver_current_lane1_100.0=0x7
|
||||
serdes_preemphasis_lane1_100.0=0xbb10
|
||||
serdes_pre_driver_current_lane2_100.0=0x7
|
||||
serdes_driver_current_lane2_100.0=0x7
|
||||
serdes_preemphasis_lane2_100.0=0xbb10
|
||||
serdes_pre_driver_current_lane3_100.0=0x7
|
||||
serdes_driver_current_lane3_100.0=0x7
|
||||
serdes_preemphasis_lane3_100.0=0xbb10
|
||||
serdes_pre_driver_current_lane0_101.0=0x7
|
||||
serdes_driver_current_lane0_101.0=0x7
|
||||
serdes_preemphasis_lane0_101.0=0xbb10
|
||||
serdes_pre_driver_current_lane1_101.0=0x7
|
||||
serdes_driver_current_lane1_101.0=0x7
|
||||
serdes_preemphasis_lane1_101.0=0xbb10
|
||||
serdes_pre_driver_current_lane2_101.0=0x7
|
||||
serdes_driver_current_lane2_101.0=0x7
|
||||
serdes_preemphasis_lane2_101.0=0xbb10
|
||||
serdes_pre_driver_current_lane3_101.0=0x7
|
||||
serdes_driver_current_lane3_101.0=0x7
|
||||
serdes_preemphasis_lane3_101.0=0xbb10
|
||||
serdes_pre_driver_current_lane0_102.0=0x7
|
||||
serdes_driver_current_lane0_102.0=0x7
|
||||
serdes_preemphasis_lane0_102.0=0xbb10
|
||||
serdes_pre_driver_current_lane1_102.0=0x7
|
||||
serdes_driver_current_lane1_102.0=0x7
|
||||
serdes_preemphasis_lane1_102.0=0xbb10
|
||||
serdes_pre_driver_current_lane2_102.0=0x7
|
||||
serdes_driver_current_lane2_102.0=0x7
|
||||
serdes_preemphasis_lane2_102.0=0xbb10
|
||||
serdes_pre_driver_current_lane3_102.0=0x7
|
||||
serdes_driver_current_lane3_102.0=0x7
|
||||
serdes_preemphasis_lane3_102.0=0xbb10
|
||||
serdes_preemphasis_lane0_103.0=0x81f4
|
||||
serdes_preemphasis_lane1_103.0=0x81f4
|
||||
serdes_preemphasis_lane2_103.0=0x81f4
|
||||
serdes_preemphasis_lane3_103.0=0x81f4
|
||||
serdes_preemphasis_lane0_104.0=0x81f5
|
||||
serdes_preemphasis_lane1_104.0=0x81f5
|
||||
serdes_preemphasis_lane2_104.0=0x81f5
|
||||
serdes_preemphasis_lane3_104.0=0x81f5
|
@ -1,2 +0,0 @@
|
||||
SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/td2-a7050-qx32s-32x40G.config.bcm
|
||||
SAI_NUM_ECMP_MEMBERS=64
|
@ -0,0 +1,14 @@
|
||||
{# Get sai.profile based on switch_role #}
|
||||
{%- if DEVICE_METADATA is defined -%}
|
||||
{%- set switch_role = DEVICE_METADATA['localhost']['type'] -%}
|
||||
{%- if 'leafrouter' in switch_role.lower() -%}
|
||||
{% set sai_profile_contents = 'SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/td2-a7050-qx32s-32x40G-t1.config.bcm' -%}
|
||||
{%- else %}
|
||||
{%- set sai_profile_contents = 'SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/td2-a7050-qx32s-32x40G-t0.config.bcm' -%}
|
||||
{%- endif %}
|
||||
{%- else %}
|
||||
{%- set sai_profile_contents = 'SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/td2-a7050-qx32s-32x40G-t0.config.bcm' -%}
|
||||
{%- endif %}
|
||||
{# Write the contents of sai_ profile_filename to sai.profile file #}
|
||||
{{ sai_profile_contents }}
|
||||
SAI_NUM_ECMP_MEMBERS=64
|
@ -0,0 +1,752 @@
|
||||
#/******************************************************************************
|
||||
# *
|
||||
# * File: config.bcm.clearlake (7050-QX32S)
|
||||
# * Name:
|
||||
# *
|
||||
# * Description: This file contains SDK properties for an Arista
|
||||
# * Clearlake platform.
|
||||
# *
|
||||
# *-----------------------------------------------------------------------------
|
||||
# ******************************************************************************/
|
||||
####################################################################
|
||||
# BCM Config file for Clearlake platform
|
||||
# - 32x40g Portmode
|
||||
|
||||
# ALPM enable
|
||||
l3_alpm_enable=2
|
||||
ipv6_lpm_128b_enable=1
|
||||
l2_mem_entries=32768
|
||||
l3_mem_entries=16384
|
||||
|
||||
sai_hash_seed_config_hash_offset_enable=1
|
||||
|
||||
# disables bcmALPMDH (ALPM distributed hitbit) thread. This thread is purely for debug purpose
|
||||
l3_alpm_hit_skip=1
|
||||
|
||||
# Disable Counting ACL Drop towards interface RX_DRP counter
|
||||
sai_adjust_acl_drop_in_rx_drop=1
|
||||
|
||||
# From old config file
|
||||
os=unix
|
||||
higig2_hdr_mode=1
|
||||
|
||||
# Parity
|
||||
parity_correction=1
|
||||
parity_enable=1
|
||||
stat_if_parity_enable=0
|
||||
|
||||
# l2 thread related config vars
|
||||
l2xmsg_hostbuf_size=8192
|
||||
l2xmsg_mode=1
|
||||
|
||||
bcm_num_cos=10
|
||||
bcm_stat_interval=2000000
|
||||
lls_num_l2uc=12
|
||||
max_vp_lags=0
|
||||
miim_intr_enable=0
|
||||
mmu_lossless=0
|
||||
module_64ports=0
|
||||
|
||||
stable_size=0x2000000
|
||||
|
||||
schan_intr_enable=0
|
||||
tdma_timeout_usec=5000000
|
||||
tslam_timeout_usec=15000000
|
||||
cdma_timeout_usec=15000000
|
||||
dma_desc_timeout_usec=15000000
|
||||
|
||||
###############################
|
||||
serdes_fiber_pref=1
|
||||
###############################
|
||||
mdio_output_delay=0x0d
|
||||
###############################
|
||||
xgxs_lcpll_xtal_refclk=1
|
||||
tdma_intr_enable=1
|
||||
tslam_intr_enable=1
|
||||
table_dma_enable=1
|
||||
|
||||
pbmp_oversubscribe.0=0x1fffffffffffffffffffffffffe
|
||||
pbmp_xport_xe.0=0x1fffffffffffffffffffffffffe
|
||||
phy_an_c37_1.0=3
|
||||
phy_an_c37_5.0=3
|
||||
phy_an_c37_9.0=3
|
||||
phy_an_c37_13.0=3
|
||||
phy_an_c37_17.0=3
|
||||
phy_an_c37_21.0=3
|
||||
phy_an_c37_25.0=3
|
||||
phy_an_c37_29.0=3
|
||||
phy_an_c37_33.0=3
|
||||
phy_an_c37_37.0=3
|
||||
phy_an_c37_41.0=3
|
||||
phy_an_c37_45.0=3
|
||||
phy_an_c37_49.0=3
|
||||
phy_an_c37_53.0=3
|
||||
phy_an_c37_57.0=3
|
||||
phy_an_c37_61.0=3
|
||||
phy_an_c37_65.0=3
|
||||
phy_an_c37_69.0=3
|
||||
phy_an_c37_73.0=3
|
||||
phy_an_c37_77.0=3
|
||||
phy_an_c37_81.0=3
|
||||
phy_an_c37_85.0=3
|
||||
phy_an_c37_89.0=3
|
||||
phy_an_c37_93.0=3
|
||||
phy_an_c37_97.0=0
|
||||
phy_an_c37_98.0=0
|
||||
phy_an_c37_99.0=0
|
||||
phy_an_c37_100.0=0
|
||||
phy_an_c37_101.0=0
|
||||
phy_an_c37_102.0=0
|
||||
phy_an_c37_103.0=0
|
||||
phy_an_c37_104.0=0
|
||||
phy_an_c73_1.0=0
|
||||
phy_an_c73_5.0=0
|
||||
phy_an_c73_9.0=0
|
||||
phy_an_c73_13.0=0
|
||||
phy_an_c73_17.0=0
|
||||
phy_an_c73_21.0=0
|
||||
phy_an_c73_25.0=0
|
||||
phy_an_c73_29.0=0
|
||||
phy_an_c73_33.0=0
|
||||
phy_an_c73_37.0=0
|
||||
phy_an_c73_41.0=0
|
||||
phy_an_c73_45.0=0
|
||||
phy_an_c73_49.0=0
|
||||
phy_an_c73_53.0=0
|
||||
phy_an_c73_57.0=0
|
||||
phy_an_c73_61.0=0
|
||||
phy_an_c73_65.0=0
|
||||
phy_an_c73_69.0=0
|
||||
phy_an_c73_73.0=0
|
||||
phy_an_c73_77.0=0
|
||||
phy_an_c73_81.0=0
|
||||
phy_an_c73_85.0=0
|
||||
phy_an_c73_89.0=0
|
||||
phy_an_c73_93.0=0
|
||||
phy_an_c73_97.0=2
|
||||
phy_an_c73_98.0=2
|
||||
phy_an_c73_99.0=2
|
||||
phy_an_c73_100.0=2
|
||||
phy_an_c73_101.0=2
|
||||
phy_an_c73_102.0=2
|
||||
phy_an_c73_103.0=2
|
||||
phy_an_c73_104.0=2
|
||||
phy_xaui_rx_polarity_flip_1.0=0x0
|
||||
phy_xaui_rx_polarity_flip_5.0=0x0
|
||||
phy_xaui_rx_polarity_flip_9.0=0x4
|
||||
phy_xaui_rx_polarity_flip_13.0=0x0
|
||||
phy_xaui_rx_polarity_flip_17.0=0xb
|
||||
phy_xaui_rx_polarity_flip_21.0=0x3
|
||||
phy_xaui_rx_polarity_flip_25.0=0xb
|
||||
phy_xaui_rx_polarity_flip_29.0=0xf
|
||||
phy_xaui_rx_polarity_flip_33.0=0xb
|
||||
phy_xaui_rx_polarity_flip_37.0=0x3
|
||||
phy_xaui_rx_polarity_flip_41.0=0xb
|
||||
phy_xaui_rx_polarity_flip_45.0=0x0
|
||||
phy_xaui_rx_polarity_flip_49.0=0x4
|
||||
phy_xaui_rx_polarity_flip_53.0=0xc
|
||||
phy_xaui_rx_polarity_flip_57.0=0x4
|
||||
phy_xaui_rx_polarity_flip_61.0=0x0
|
||||
phy_xaui_rx_polarity_flip_65.0=0xb
|
||||
phy_xaui_rx_polarity_flip_69.0=0x3
|
||||
phy_xaui_rx_polarity_flip_73.0=0xb
|
||||
phy_xaui_rx_polarity_flip_77.0=0xf
|
||||
phy_xaui_rx_polarity_flip_81.0=0xb
|
||||
phy_xaui_rx_polarity_flip_85.0=0x3
|
||||
phy_xaui_rx_polarity_flip_89.0=0x4
|
||||
phy_xaui_rx_polarity_flip_93.0=0x0
|
||||
phy_xaui_rx_polarity_flip_97.0=0xb
|
||||
phy_xaui_rx_polarity_flip_98.0=0x3
|
||||
phy_xaui_rx_polarity_flip_99.0=0x4
|
||||
phy_xaui_rx_polarity_flip_100.0=0x0
|
||||
phy_xaui_rx_polarity_flip_101.0=0x0
|
||||
phy_xaui_rx_polarity_flip_102.0=0xe
|
||||
phy_xaui_rx_polarity_flip_103.0=0x0
|
||||
phy_xaui_rx_polarity_flip_104.0=0x0
|
||||
phy_xaui_tx_polarity_flip_1.0=0x0
|
||||
phy_xaui_tx_polarity_flip_5.0=0x0
|
||||
phy_xaui_tx_polarity_flip_9.0=0x2
|
||||
phy_xaui_tx_polarity_flip_13.0=0x0
|
||||
phy_xaui_tx_polarity_flip_17.0=0xd
|
||||
phy_xaui_tx_polarity_flip_21.0=0xc
|
||||
phy_xaui_tx_polarity_flip_25.0=0xd
|
||||
phy_xaui_tx_polarity_flip_29.0=0xf
|
||||
phy_xaui_tx_polarity_flip_33.0=0xd
|
||||
phy_xaui_tx_polarity_flip_37.0=0xc
|
||||
phy_xaui_tx_polarity_flip_41.0=0xd
|
||||
phy_xaui_tx_polarity_flip_45.0=0x0
|
||||
phy_xaui_tx_polarity_flip_49.0=0x2
|
||||
phy_xaui_tx_polarity_flip_53.0=0x3
|
||||
phy_xaui_tx_polarity_flip_57.0=0x2
|
||||
phy_xaui_tx_polarity_flip_61.0=0x0
|
||||
phy_xaui_tx_polarity_flip_65.0=0xd
|
||||
phy_xaui_tx_polarity_flip_69.0=0xc
|
||||
phy_xaui_tx_polarity_flip_73.0=0xd
|
||||
phy_xaui_tx_polarity_flip_77.0=0xf
|
||||
phy_xaui_tx_polarity_flip_81.0=0xd
|
||||
phy_xaui_tx_polarity_flip_85.0=0xc
|
||||
phy_xaui_tx_polarity_flip_89.0=0x2
|
||||
phy_xaui_tx_polarity_flip_93.0=0x0
|
||||
phy_xaui_tx_polarity_flip_97.0=0xd
|
||||
phy_xaui_tx_polarity_flip_98.0=0xc
|
||||
phy_xaui_tx_polarity_flip_99.0=0x2
|
||||
phy_xaui_tx_polarity_flip_100.0=0x0
|
||||
phy_xaui_tx_polarity_flip_101.0=0x0
|
||||
phy_xaui_tx_polarity_flip_102.0=0x7
|
||||
phy_xaui_tx_polarity_flip_103.0=0x2
|
||||
phy_xaui_tx_polarity_flip_104.0=0x0
|
||||
port_init_autoneg_1.0=0
|
||||
port_init_autoneg_5.0=0
|
||||
port_init_autoneg_9.0=0
|
||||
port_init_autoneg_13.0=0
|
||||
port_init_autoneg_17.0=0
|
||||
port_init_autoneg_21.0=0
|
||||
port_init_autoneg_25.0=0
|
||||
port_init_autoneg_29.0=0
|
||||
port_init_autoneg_33.0=0
|
||||
port_init_autoneg_37.0=0
|
||||
port_init_autoneg_41.0=0
|
||||
port_init_autoneg_45.0=0
|
||||
port_init_autoneg_49.0=0
|
||||
port_init_autoneg_53.0=0
|
||||
port_init_autoneg_57.0=0
|
||||
port_init_autoneg_61.0=0
|
||||
port_init_autoneg_65.0=0
|
||||
port_init_autoneg_69.0=0
|
||||
port_init_autoneg_73.0=0
|
||||
port_init_autoneg_77.0=0
|
||||
port_init_autoneg_81.0=0
|
||||
port_init_autoneg_85.0=0
|
||||
port_init_autoneg_89.0=0
|
||||
port_init_autoneg_93.0=0
|
||||
port_init_autoneg_97.0=0
|
||||
port_init_autoneg_98.0=0
|
||||
port_init_autoneg_99.0=0
|
||||
port_init_autoneg_100.0=0
|
||||
port_init_autoneg_101.0=0
|
||||
port_init_autoneg_102.0=0
|
||||
port_init_autoneg_103.0=0
|
||||
port_init_autoneg_104.0=0
|
||||
port_init_cl72_hg.0=0x11
|
||||
port_phy_addr_1.0=0x7f
|
||||
port_phy_addr_5.0=0x7f
|
||||
port_phy_addr_9.0=0x7f
|
||||
port_phy_addr_13.0=0x7f
|
||||
port_phy_addr_17.0=0x7f
|
||||
port_phy_addr_21.0=0x7f
|
||||
port_phy_addr_25.0=0x7f
|
||||
port_phy_addr_29.0=0x7f
|
||||
port_phy_addr_33.0=0x7f
|
||||
port_phy_addr_37.0=0x7f
|
||||
port_phy_addr_41.0=0x7f
|
||||
port_phy_addr_45.0=0x7f
|
||||
port_phy_addr_49.0=0x7f
|
||||
port_phy_addr_53.0=0x7f
|
||||
port_phy_addr_57.0=0x7f
|
||||
port_phy_addr_61.0=0x7f
|
||||
port_phy_addr_65.0=0x7f
|
||||
port_phy_addr_69.0=0x7f
|
||||
port_phy_addr_73.0=0x7f
|
||||
port_phy_addr_77.0=0x7f
|
||||
port_phy_addr_81.0=0x7f
|
||||
port_phy_addr_85.0=0x7f
|
||||
port_phy_addr_89.0=0x7f
|
||||
port_phy_addr_93.0=0x7f
|
||||
port_phy_addr_97.0=0x7f
|
||||
port_phy_addr_98.0=0x7f
|
||||
port_phy_addr_99.0=0x7f
|
||||
port_phy_addr_100.0=0x7f
|
||||
port_phy_addr_101.0=0x7f
|
||||
port_phy_addr_102.0=0x7f
|
||||
port_phy_addr_103.0=0x7f
|
||||
port_phy_addr_104.0=0x7f
|
||||
portmap_1.0=9:40
|
||||
portmap_5.0=13:40
|
||||
portmap_9.0=17:40
|
||||
portmap_13.0=21:40
|
||||
portmap_17.0=29:40
|
||||
portmap_21.0=25:40
|
||||
portmap_25.0=33:40
|
||||
portmap_29.0=37:40
|
||||
portmap_33.0=45:40
|
||||
portmap_37.0=41:40
|
||||
portmap_41.0=49:40
|
||||
portmap_45.0=53:40
|
||||
portmap_49.0=69:40
|
||||
portmap_53.0=65:40
|
||||
portmap_57.0=73:40
|
||||
portmap_61.0=77:40
|
||||
portmap_65.0=93:40
|
||||
portmap_69.0=89:40
|
||||
portmap_73.0=97:40
|
||||
portmap_77.0=101:40
|
||||
portmap_81.0=109:40
|
||||
portmap_85.0=105:40
|
||||
portmap_89.0=121:40
|
||||
portmap_93.0=125:40
|
||||
portmap_97.0=61:40
|
||||
portmap_98.0=57:40
|
||||
portmap_99.0=81:40
|
||||
portmap_100.0=85:40
|
||||
portmap_101.0=117:40
|
||||
portmap_102.0=113:40
|
||||
portmap_103.0=1:40
|
||||
portmap_104.0=5:40
|
||||
serdes_firmware_mode_1.0=2
|
||||
serdes_firmware_mode_5.0=2
|
||||
serdes_firmware_mode_9.0=2
|
||||
serdes_firmware_mode_13.0=2
|
||||
serdes_firmware_mode_17.0=2
|
||||
serdes_firmware_mode_21.0=2
|
||||
serdes_firmware_mode_25.0=2
|
||||
serdes_firmware_mode_29.0=2
|
||||
serdes_firmware_mode_33.0=2
|
||||
serdes_firmware_mode_37.0=2
|
||||
serdes_firmware_mode_41.0=2
|
||||
serdes_firmware_mode_45.0=2
|
||||
serdes_firmware_mode_49.0=2
|
||||
serdes_firmware_mode_53.0=2
|
||||
serdes_firmware_mode_57.0=2
|
||||
serdes_firmware_mode_61.0=2
|
||||
serdes_firmware_mode_65.0=2
|
||||
serdes_firmware_mode_69.0=2
|
||||
serdes_firmware_mode_73.0=2
|
||||
serdes_firmware_mode_77.0=2
|
||||
serdes_firmware_mode_81.0=2
|
||||
serdes_firmware_mode_85.0=2
|
||||
serdes_firmware_mode_89.0=2
|
||||
serdes_firmware_mode_93.0=2
|
||||
serdes_firmware_mode_97.0=2
|
||||
serdes_firmware_mode_98.0=2
|
||||
serdes_firmware_mode_99.0=2
|
||||
serdes_firmware_mode_100.0=2
|
||||
serdes_firmware_mode_101.0=2
|
||||
serdes_firmware_mode_102.0=2
|
||||
serdes_firmware_mode_103.0=2
|
||||
serdes_firmware_mode_104.0=2
|
||||
xgxs_rx_lane_map_1.0=0x3210
|
||||
xgxs_rx_lane_map_5.0=0x0321
|
||||
xgxs_rx_lane_map_9.0=0x1302
|
||||
xgxs_rx_lane_map_13.0=0x0213
|
||||
xgxs_rx_lane_map_17.0=0x1302
|
||||
xgxs_rx_lane_map_21.0=0x1302
|
||||
xgxs_rx_lane_map_25.0=0x1302
|
||||
xgxs_rx_lane_map_29.0=0x0213
|
||||
xgxs_rx_lane_map_33.0=0x1302
|
||||
xgxs_rx_lane_map_37.0=0x1302
|
||||
xgxs_rx_lane_map_41.0=0x1302
|
||||
xgxs_rx_lane_map_45.0=0x0213
|
||||
xgxs_rx_lane_map_49.0=0x1302
|
||||
xgxs_rx_lane_map_53.0=0x1302
|
||||
xgxs_rx_lane_map_57.0=0x1302
|
||||
xgxs_rx_lane_map_61.0=0x0213
|
||||
xgxs_rx_lane_map_65.0=0x1302
|
||||
xgxs_rx_lane_map_69.0=0x1302
|
||||
xgxs_rx_lane_map_73.0=0x1302
|
||||
xgxs_rx_lane_map_77.0=0x0213
|
||||
xgxs_rx_lane_map_81.0=0x1302
|
||||
xgxs_rx_lane_map_85.0=0x1302
|
||||
xgxs_rx_lane_map_89.0=0x1302
|
||||
xgxs_rx_lane_map_93.0=0x0213
|
||||
xgxs_rx_lane_map_97.0=0x1302
|
||||
xgxs_rx_lane_map_98.0=0x1302
|
||||
xgxs_rx_lane_map_99.0=0x1302
|
||||
xgxs_rx_lane_map_100.0=0x0213
|
||||
xgxs_rx_lane_map_101.0=0x0213
|
||||
xgxs_rx_lane_map_102.0=0x1302
|
||||
xgxs_rx_lane_map_103.0=0x0123
|
||||
xgxs_rx_lane_map_104.0=0x2031
|
||||
xgxs_tx_lane_map_1.0=0x0123
|
||||
xgxs_tx_lane_map_5.0=0x0321
|
||||
xgxs_tx_lane_map_9.0=0x2031
|
||||
xgxs_tx_lane_map_13.0=0x0213
|
||||
xgxs_tx_lane_map_17.0=0x2031
|
||||
xgxs_tx_lane_map_21.0=0x2031
|
||||
xgxs_tx_lane_map_25.0=0x2031
|
||||
xgxs_tx_lane_map_29.0=0x0213
|
||||
xgxs_tx_lane_map_33.0=0x2031
|
||||
xgxs_tx_lane_map_37.0=0x2031
|
||||
xgxs_tx_lane_map_41.0=0x2031
|
||||
xgxs_tx_lane_map_45.0=0x0213
|
||||
xgxs_tx_lane_map_49.0=0x2031
|
||||
xgxs_tx_lane_map_53.0=0x2031
|
||||
xgxs_tx_lane_map_57.0=0x2031
|
||||
xgxs_tx_lane_map_61.0=0x0213
|
||||
xgxs_tx_lane_map_65.0=0x2031
|
||||
xgxs_tx_lane_map_69.0=0x2031
|
||||
xgxs_tx_lane_map_73.0=0x2031
|
||||
xgxs_tx_lane_map_77.0=0x0213
|
||||
xgxs_tx_lane_map_81.0=0x2031
|
||||
xgxs_tx_lane_map_85.0=0x2031
|
||||
xgxs_tx_lane_map_89.0=0x2031
|
||||
xgxs_tx_lane_map_93.0=0x0213
|
||||
xgxs_tx_lane_map_97.0=0x2031
|
||||
xgxs_tx_lane_map_98.0=0x2031
|
||||
xgxs_tx_lane_map_99.0=0x2031
|
||||
xgxs_tx_lane_map_100.0=0x0213
|
||||
xgxs_tx_lane_map_101.0=0x0213
|
||||
xgxs_tx_lane_map_102.0=0x2031
|
||||
xgxs_tx_lane_map_103.0=0x3120
|
||||
xgxs_tx_lane_map_104.0=0x1302
|
||||
|
||||
# tuning parameters
|
||||
serdes_preemphasis_lane0_1.0=0x81f7
|
||||
serdes_preemphasis_lane1_1.0=0x81f7
|
||||
serdes_preemphasis_lane2_1.0=0x81f7
|
||||
serdes_preemphasis_lane3_1.0=0x81f7
|
||||
serdes_pre_driver_current_lane0_5.0=0x7
|
||||
serdes_driver_current_lane0_5.0=0x7
|
||||
serdes_preemphasis_lane0_5.0=0xc2f0
|
||||
serdes_pre_driver_current_lane1_5.0=0x7
|
||||
serdes_driver_current_lane1_5.0=0x7
|
||||
serdes_preemphasis_lane1_5.0=0xc2f0
|
||||
serdes_pre_driver_current_lane2_5.0=0x7
|
||||
serdes_driver_current_lane2_5.0=0x7
|
||||
serdes_preemphasis_lane2_5.0=0xc2f0
|
||||
serdes_pre_driver_current_lane3_5.0=0x7
|
||||
serdes_driver_current_lane3_5.0=0x7
|
||||
serdes_preemphasis_lane3_5.0=0xc2f0
|
||||
serdes_pre_driver_current_lane0_9.0=0x7
|
||||
serdes_driver_current_lane0_9.0=0x7
|
||||
serdes_preemphasis_lane0_9.0=0xbb10
|
||||
serdes_pre_driver_current_lane1_9.0=0x7
|
||||
serdes_driver_current_lane1_9.0=0x7
|
||||
serdes_preemphasis_lane1_9.0=0xbb10
|
||||
serdes_pre_driver_current_lane2_9.0=0x7
|
||||
serdes_driver_current_lane2_9.0=0x7
|
||||
serdes_preemphasis_lane2_9.0=0xbb10
|
||||
serdes_pre_driver_current_lane3_9.0=0x7
|
||||
serdes_driver_current_lane3_9.0=0x7
|
||||
serdes_preemphasis_lane3_9.0=0xbb10
|
||||
serdes_pre_driver_current_lane0_13.0=0x7
|
||||
serdes_driver_current_lane0_13.0=0x7
|
||||
serdes_preemphasis_lane0_13.0=0xbb10
|
||||
serdes_pre_driver_current_lane1_13.0=0x7
|
||||
serdes_driver_current_lane1_13.0=0x7
|
||||
serdes_preemphasis_lane1_13.0=0xbb10
|
||||
serdes_pre_driver_current_lane2_13.0=0x7
|
||||
serdes_driver_current_lane2_13.0=0x7
|
||||
serdes_preemphasis_lane2_13.0=0xbb10
|
||||
serdes_pre_driver_current_lane3_13.0=0x7
|
||||
serdes_driver_current_lane3_13.0=0x7
|
||||
serdes_preemphasis_lane3_13.0=0xbb10
|
||||
serdes_pre_driver_current_lane0_17.0=0x6
|
||||
serdes_driver_current_lane0_17.0=0x6
|
||||
serdes_preemphasis_lane0_17.0=0xb720
|
||||
serdes_pre_driver_current_lane1_17.0=0x6
|
||||
serdes_driver_current_lane1_17.0=0x6
|
||||
serdes_preemphasis_lane1_17.0=0xb720
|
||||
serdes_pre_driver_current_lane2_17.0=0x6
|
||||
serdes_driver_current_lane2_17.0=0x6
|
||||
serdes_preemphasis_lane2_17.0=0xb720
|
||||
serdes_pre_driver_current_lane3_17.0=0x6
|
||||
serdes_driver_current_lane3_17.0=0x6
|
||||
serdes_preemphasis_lane3_17.0=0xb720
|
||||
serdes_pre_driver_current_lane0_21.0=0x7
|
||||
serdes_driver_current_lane0_21.0=0x7
|
||||
serdes_preemphasis_lane0_21.0=0xbb10
|
||||
serdes_pre_driver_current_lane1_21.0=0x7
|
||||
serdes_driver_current_lane1_21.0=0x7
|
||||
serdes_preemphasis_lane1_21.0=0xbb10
|
||||
serdes_pre_driver_current_lane2_21.0=0x7
|
||||
serdes_driver_current_lane2_21.0=0x7
|
||||
serdes_preemphasis_lane2_21.0=0xbb10
|
||||
serdes_pre_driver_current_lane3_21.0=0x7
|
||||
serdes_driver_current_lane3_21.0=0x7
|
||||
serdes_preemphasis_lane3_21.0=0xbb10
|
||||
serdes_pre_driver_current_lane0_25.0=0x5
|
||||
serdes_driver_current_lane0_25.0=0x5
|
||||
serdes_preemphasis_lane0_25.0=0xb720
|
||||
serdes_pre_driver_current_lane1_25.0=0x5
|
||||
serdes_driver_current_lane1_25.0=0x5
|
||||
serdes_preemphasis_lane1_25.0=0xb720
|
||||
serdes_pre_driver_current_lane2_25.0=0x5
|
||||
serdes_driver_current_lane2_25.0=0x5
|
||||
serdes_preemphasis_lane2_25.0=0xb720
|
||||
serdes_pre_driver_current_lane3_25.0=0x5
|
||||
serdes_driver_current_lane3_25.0=0x5
|
||||
serdes_preemphasis_lane3_25.0=0xb720
|
||||
serdes_pre_driver_current_lane0_29.0=0x5
|
||||
serdes_driver_current_lane0_29.0=0x5
|
||||
serdes_preemphasis_lane0_29.0=0xb720
|
||||
serdes_pre_driver_current_lane1_29.0=0x5
|
||||
serdes_driver_current_lane1_29.0=0x5
|
||||
serdes_preemphasis_lane1_29.0=0xb720
|
||||
serdes_pre_driver_current_lane2_29.0=0x5
|
||||
serdes_driver_current_lane2_29.0=0x5
|
||||
serdes_preemphasis_lane2_29.0=0xb720
|
||||
serdes_pre_driver_current_lane3_29.0=0x5
|
||||
serdes_driver_current_lane3_29.0=0x5
|
||||
serdes_preemphasis_lane3_29.0=0xb720
|
||||
serdes_pre_driver_current_lane0_33.0=0x4
|
||||
serdes_driver_current_lane0_33.0=0x4
|
||||
serdes_preemphasis_lane0_33.0=0xb720
|
||||
serdes_pre_driver_current_lane1_33.0=0x4
|
||||
serdes_driver_current_lane1_33.0=0x4
|
||||
serdes_preemphasis_lane1_33.0=0xb720
|
||||
serdes_pre_driver_current_lane2_33.0=0x4
|
||||
serdes_driver_current_lane2_33.0=0x4
|
||||
serdes_preemphasis_lane2_33.0=0xb720
|
||||
serdes_pre_driver_current_lane3_33.0=0x4
|
||||
serdes_driver_current_lane3_33.0=0x4
|
||||
serdes_preemphasis_lane3_33.0=0xb720
|
||||
serdes_pre_driver_current_lane0_37.0=0x5
|
||||
serdes_driver_current_lane0_37.0=0x5
|
||||
serdes_preemphasis_lane0_37.0=0xb720
|
||||
serdes_pre_driver_current_lane1_37.0=0x5
|
||||
serdes_driver_current_lane1_37.0=0x5
|
||||
serdes_preemphasis_lane1_37.0=0xb720
|
||||
serdes_pre_driver_current_lane2_37.0=0x5
|
||||
serdes_driver_current_lane2_37.0=0x5
|
||||
serdes_preemphasis_lane2_37.0=0xb720
|
||||
serdes_pre_driver_current_lane3_37.0=0x5
|
||||
serdes_driver_current_lane3_37.0=0x5
|
||||
serdes_preemphasis_lane3_37.0=0xb720
|
||||
serdes_pre_driver_current_lane0_41.0=0x3
|
||||
serdes_driver_current_lane0_41.0=0x3
|
||||
serdes_preemphasis_lane0_41.0=0xb330
|
||||
serdes_pre_driver_current_lane1_41.0=0x3
|
||||
serdes_driver_current_lane1_41.0=0x3
|
||||
serdes_preemphasis_lane1_41.0=0xb330
|
||||
serdes_pre_driver_current_lane2_41.0=0x3
|
||||
serdes_driver_current_lane2_41.0=0x3
|
||||
serdes_preemphasis_lane2_41.0=0xb330
|
||||
serdes_pre_driver_current_lane3_41.0=0x3
|
||||
serdes_driver_current_lane3_41.0=0x3
|
||||
serdes_preemphasis_lane3_41.0=0xb330
|
||||
serdes_pre_driver_current_lane0_45.0=0x4
|
||||
serdes_driver_current_lane0_45.0=0x4
|
||||
serdes_preemphasis_lane0_45.0=0xb720
|
||||
serdes_pre_driver_current_lane1_45.0=0x4
|
||||
serdes_driver_current_lane1_45.0=0x4
|
||||
serdes_preemphasis_lane1_45.0=0xb720
|
||||
serdes_pre_driver_current_lane2_45.0=0x4
|
||||
serdes_driver_current_lane2_45.0=0x4
|
||||
serdes_preemphasis_lane2_45.0=0xb720
|
||||
serdes_pre_driver_current_lane3_45.0=0x4
|
||||
serdes_driver_current_lane3_45.0=0x4
|
||||
serdes_preemphasis_lane3_45.0=0xb720
|
||||
serdes_pre_driver_current_lane0_49.0=0x3
|
||||
serdes_driver_current_lane0_49.0=0x3
|
||||
serdes_preemphasis_lane0_49.0=0xb330
|
||||
serdes_pre_driver_current_lane1_49.0=0x3
|
||||
serdes_driver_current_lane1_49.0=0x3
|
||||
serdes_preemphasis_lane1_49.0=0xb330
|
||||
serdes_pre_driver_current_lane2_49.0=0x3
|
||||
serdes_driver_current_lane2_49.0=0x3
|
||||
serdes_preemphasis_lane2_49.0=0xb330
|
||||
serdes_pre_driver_current_lane3_49.0=0x3
|
||||
serdes_driver_current_lane3_49.0=0x3
|
||||
serdes_preemphasis_lane3_49.0=0xb330
|
||||
serdes_pre_driver_current_lane0_53.0=0x4
|
||||
serdes_driver_current_lane0_53.0=0x4
|
||||
serdes_preemphasis_lane0_53.0=0xb720
|
||||
serdes_pre_driver_current_lane1_53.0=0x4
|
||||
serdes_driver_current_lane1_53.0=0x4
|
||||
serdes_preemphasis_lane1_53.0=0xb720
|
||||
serdes_pre_driver_current_lane2_53.0=0x4
|
||||
serdes_driver_current_lane2_53.0=0x4
|
||||
serdes_preemphasis_lane2_53.0=0xb720
|
||||
serdes_pre_driver_current_lane3_53.0=0x4
|
||||
serdes_driver_current_lane3_53.0=0x4
|
||||
serdes_preemphasis_lane3_53.0=0xb720
|
||||
serdes_pre_driver_current_lane0_57.0=0x3
|
||||
serdes_driver_current_lane0_57.0=0x3
|
||||
serdes_preemphasis_lane0_57.0=0xb330
|
||||
serdes_pre_driver_current_lane1_57.0=0x3
|
||||
serdes_driver_current_lane1_57.0=0x3
|
||||
serdes_preemphasis_lane1_57.0=0xb330
|
||||
serdes_pre_driver_current_lane2_57.0=0x3
|
||||
serdes_driver_current_lane2_57.0=0x3
|
||||
serdes_preemphasis_lane2_57.0=0xb330
|
||||
serdes_pre_driver_current_lane3_57.0=0x3
|
||||
serdes_driver_current_lane3_57.0=0x3
|
||||
serdes_preemphasis_lane3_57.0=0xb330
|
||||
serdes_pre_driver_current_lane0_61.0=0x4
|
||||
serdes_driver_current_lane0_61.0=0x4
|
||||
serdes_preemphasis_lane0_61.0=0xb720
|
||||
serdes_pre_driver_current_lane1_61.0=0x4
|
||||
serdes_driver_current_lane1_61.0=0x4
|
||||
serdes_preemphasis_lane1_61.0=0xb720
|
||||
serdes_pre_driver_current_lane2_61.0=0x4
|
||||
serdes_driver_current_lane2_61.0=0x4
|
||||
serdes_preemphasis_lane2_61.0=0xb720
|
||||
serdes_pre_driver_current_lane3_61.0=0x4
|
||||
serdes_driver_current_lane3_61.0=0x4
|
||||
serdes_preemphasis_lane3_61.0=0xb720
|
||||
serdes_pre_driver_current_lane0_65.0=0x4
|
||||
serdes_driver_current_lane0_65.0=0x4
|
||||
serdes_preemphasis_lane0_65.0=0xb720
|
||||
serdes_pre_driver_current_lane1_65.0=0x4
|
||||
serdes_driver_current_lane1_65.0=0x4
|
||||
serdes_preemphasis_lane1_65.0=0xb720
|
||||
serdes_pre_driver_current_lane2_65.0=0x4
|
||||
serdes_driver_current_lane2_65.0=0x4
|
||||
serdes_preemphasis_lane2_65.0=0xb720
|
||||
serdes_pre_driver_current_lane3_65.0=0x4
|
||||
serdes_driver_current_lane3_65.0=0x4
|
||||
serdes_preemphasis_lane3_65.0=0xb720
|
||||
serdes_pre_driver_current_lane0_69.0=0x4
|
||||
serdes_driver_current_lane0_69.0=0x4
|
||||
serdes_preemphasis_lane0_69.0=0xb720
|
||||
serdes_pre_driver_current_lane1_69.0=0x4
|
||||
serdes_driver_current_lane1_69.0=0x4
|
||||
serdes_preemphasis_lane1_69.0=0xb720
|
||||
serdes_pre_driver_current_lane2_69.0=0x4
|
||||
serdes_driver_current_lane2_69.0=0x4
|
||||
serdes_preemphasis_lane2_69.0=0xb720
|
||||
serdes_pre_driver_current_lane3_69.0=0x4
|
||||
serdes_driver_current_lane3_69.0=0x4
|
||||
serdes_preemphasis_lane3_69.0=0xb720
|
||||
serdes_pre_driver_current_lane0_73.0=0x4
|
||||
serdes_driver_current_lane0_73.0=0x4
|
||||
serdes_preemphasis_lane0_73.0=0xb720
|
||||
serdes_pre_driver_current_lane1_73.0=0x4
|
||||
serdes_driver_current_lane1_73.0=0x4
|
||||
serdes_preemphasis_lane1_73.0=0xb720
|
||||
serdes_pre_driver_current_lane2_73.0=0x4
|
||||
serdes_driver_current_lane2_73.0=0x4
|
||||
serdes_preemphasis_lane2_73.0=0xb720
|
||||
serdes_pre_driver_current_lane3_73.0=0x4
|
||||
serdes_driver_current_lane3_73.0=0x4
|
||||
serdes_preemphasis_lane3_73.0=0xb720
|
||||
serdes_pre_driver_current_lane0_77.0=0x5
|
||||
serdes_driver_current_lane0_77.0=0x5
|
||||
serdes_preemphasis_lane0_77.0=0xb720
|
||||
serdes_pre_driver_current_lane1_77.0=0x5
|
||||
serdes_driver_current_lane1_77.0=0x5
|
||||
serdes_preemphasis_lane1_77.0=0xb720
|
||||
serdes_pre_driver_current_lane2_77.0=0x5
|
||||
serdes_driver_current_lane2_77.0=0x5
|
||||
serdes_preemphasis_lane2_77.0=0xb720
|
||||
serdes_pre_driver_current_lane3_77.0=0x5
|
||||
serdes_driver_current_lane3_77.0=0x5
|
||||
serdes_preemphasis_lane3_77.0=0xb720
|
||||
serdes_pre_driver_current_lane0_81.0=0x5
|
||||
serdes_driver_current_lane0_81.0=0x5
|
||||
serdes_preemphasis_lane0_81.0=0xb720
|
||||
serdes_pre_driver_current_lane1_81.0=0x5
|
||||
serdes_driver_current_lane1_81.0=0x5
|
||||
serdes_preemphasis_lane1_81.0=0xb720
|
||||
serdes_pre_driver_current_lane2_81.0=0x5
|
||||
serdes_driver_current_lane2_81.0=0x5
|
||||
serdes_preemphasis_lane2_81.0=0xb720
|
||||
serdes_pre_driver_current_lane3_81.0=0x5
|
||||
serdes_driver_current_lane3_81.0=0x5
|
||||
serdes_preemphasis_lane3_81.0=0xb720
|
||||
serdes_pre_driver_current_lane0_85.0=0x5
|
||||
serdes_driver_current_lane0_85.0=0x5
|
||||
serdes_preemphasis_lane0_85.0=0xb720
|
||||
serdes_pre_driver_current_lane1_85.0=0x5
|
||||
serdes_driver_current_lane1_85.0=0x5
|
||||
serdes_preemphasis_lane1_85.0=0xb720
|
||||
serdes_pre_driver_current_lane2_85.0=0x5
|
||||
serdes_driver_current_lane2_85.0=0x5
|
||||
serdes_preemphasis_lane2_85.0=0xb720
|
||||
serdes_pre_driver_current_lane3_85.0=0x5
|
||||
serdes_driver_current_lane3_85.0=0x5
|
||||
serdes_preemphasis_lane3_85.0=0xb720
|
||||
serdes_pre_driver_current_lane0_89.0=0x6
|
||||
serdes_driver_current_lane0_89.0=0x6
|
||||
serdes_preemphasis_lane0_89.0=0xb720
|
||||
serdes_pre_driver_current_lane1_89.0=0x6
|
||||
serdes_driver_current_lane1_89.0=0x6
|
||||
serdes_preemphasis_lane1_89.0=0xb720
|
||||
serdes_pre_driver_current_lane2_89.0=0x6
|
||||
serdes_driver_current_lane2_89.0=0x6
|
||||
serdes_preemphasis_lane2_89.0=0xb720
|
||||
serdes_pre_driver_current_lane3_89.0=0x6
|
||||
serdes_driver_current_lane3_89.0=0x6
|
||||
serdes_preemphasis_lane3_89.0=0xb720
|
||||
serdes_pre_driver_current_lane0_93.0=0x7
|
||||
serdes_driver_current_lane0_93.0=0x7
|
||||
serdes_preemphasis_lane0_93.0=0xbb10
|
||||
serdes_pre_driver_current_lane1_93.0=0x7
|
||||
serdes_driver_current_lane1_93.0=0x7
|
||||
serdes_preemphasis_lane1_93.0=0xbb10
|
||||
serdes_pre_driver_current_lane2_93.0=0x7
|
||||
serdes_driver_current_lane2_93.0=0x7
|
||||
serdes_preemphasis_lane2_93.0=0xbb10
|
||||
serdes_pre_driver_current_lane3_93.0=0x7
|
||||
serdes_driver_current_lane3_93.0=0x7
|
||||
serdes_preemphasis_lane3_93.0=0xbb10
|
||||
serdes_pre_driver_current_lane0_97.0=0x5
|
||||
serdes_driver_current_lane0_97.0=0x5
|
||||
serdes_preemphasis_lane0_97.0=0xb720
|
||||
serdes_pre_driver_current_lane1_97.0=0x5
|
||||
serdes_driver_current_lane1_97.0=0x5
|
||||
serdes_preemphasis_lane1_97.0=0xb720
|
||||
serdes_pre_driver_current_lane2_97.0=0x5
|
||||
serdes_driver_current_lane2_97.0=0x5
|
||||
serdes_preemphasis_lane2_97.0=0xb720
|
||||
serdes_pre_driver_current_lane3_97.0=0x5
|
||||
serdes_driver_current_lane3_97.0=0x5
|
||||
serdes_preemphasis_lane3_97.0=0xb720
|
||||
serdes_pre_driver_current_lane0_98.0=0x6
|
||||
serdes_driver_current_lane0_98.0=0x6
|
||||
serdes_preemphasis_lane0_98.0=0xb720
|
||||
serdes_pre_driver_current_lane1_98.0=0x6
|
||||
serdes_driver_current_lane1_98.0=0x6
|
||||
serdes_preemphasis_lane1_98.0=0xb720
|
||||
serdes_pre_driver_current_lane2_98.0=0x6
|
||||
serdes_driver_current_lane2_98.0=0x6
|
||||
serdes_preemphasis_lane2_98.0=0xb720
|
||||
serdes_pre_driver_current_lane3_98.0=0x6
|
||||
serdes_driver_current_lane3_98.0=0x6
|
||||
serdes_preemphasis_lane3_98.0=0xb720
|
||||
serdes_pre_driver_current_lane0_99.0=0x5
|
||||
serdes_driver_current_lane0_99.0=0x5
|
||||
serdes_preemphasis_lane0_99.0=0xb720
|
||||
serdes_pre_driver_current_lane1_99.0=0x5
|
||||
serdes_driver_current_lane1_99.0=0x5
|
||||
serdes_preemphasis_lane1_99.0=0xb720
|
||||
serdes_pre_driver_current_lane2_99.0=0x5
|
||||
serdes_driver_current_lane2_99.0=0x5
|
||||
serdes_preemphasis_lane2_99.0=0xb720
|
||||
serdes_pre_driver_current_lane3_99.0=0x5
|
||||
serdes_driver_current_lane3_99.0=0x5
|
||||
serdes_preemphasis_lane3_99.0=0xb720
|
||||
serdes_pre_driver_current_lane0_100.0=0x7
|
||||
serdes_driver_current_lane0_100.0=0x7
|
||||
serdes_preemphasis_lane0_100.0=0xbb10
|
||||
serdes_pre_driver_current_lane1_100.0=0x7
|
||||
serdes_driver_current_lane1_100.0=0x7
|
||||
serdes_preemphasis_lane1_100.0=0xbb10
|
||||
serdes_pre_driver_current_lane2_100.0=0x7
|
||||
serdes_driver_current_lane2_100.0=0x7
|
||||
serdes_preemphasis_lane2_100.0=0xbb10
|
||||
serdes_pre_driver_current_lane3_100.0=0x7
|
||||
serdes_driver_current_lane3_100.0=0x7
|
||||
serdes_preemphasis_lane3_100.0=0xbb10
|
||||
serdes_pre_driver_current_lane0_101.0=0x7
|
||||
serdes_driver_current_lane0_101.0=0x7
|
||||
serdes_preemphasis_lane0_101.0=0xbb10
|
||||
serdes_pre_driver_current_lane1_101.0=0x7
|
||||
serdes_driver_current_lane1_101.0=0x7
|
||||
serdes_preemphasis_lane1_101.0=0xbb10
|
||||
serdes_pre_driver_current_lane2_101.0=0x7
|
||||
serdes_driver_current_lane2_101.0=0x7
|
||||
serdes_preemphasis_lane2_101.0=0xbb10
|
||||
serdes_pre_driver_current_lane3_101.0=0x7
|
||||
serdes_driver_current_lane3_101.0=0x7
|
||||
serdes_preemphasis_lane3_101.0=0xbb10
|
||||
serdes_pre_driver_current_lane0_102.0=0x7
|
||||
serdes_driver_current_lane0_102.0=0x7
|
||||
serdes_preemphasis_lane0_102.0=0xbb10
|
||||
serdes_pre_driver_current_lane1_102.0=0x7
|
||||
serdes_driver_current_lane1_102.0=0x7
|
||||
serdes_preemphasis_lane1_102.0=0xbb10
|
||||
serdes_pre_driver_current_lane2_102.0=0x7
|
||||
serdes_driver_current_lane2_102.0=0x7
|
||||
serdes_preemphasis_lane2_102.0=0xbb10
|
||||
serdes_pre_driver_current_lane3_102.0=0x7
|
||||
serdes_driver_current_lane3_102.0=0x7
|
||||
serdes_preemphasis_lane3_102.0=0xbb10
|
||||
serdes_preemphasis_lane0_103.0=0x81f4
|
||||
serdes_preemphasis_lane1_103.0=0x81f4
|
||||
serdes_preemphasis_lane2_103.0=0x81f4
|
||||
serdes_preemphasis_lane3_103.0=0x81f4
|
||||
serdes_preemphasis_lane0_104.0=0x81f5
|
||||
serdes_preemphasis_lane1_104.0=0x81f5
|
||||
serdes_preemphasis_lane2_104.0=0x81f5
|
||||
serdes_preemphasis_lane3_104.0=0x81f5
|
@ -1,2 +0,0 @@
|
||||
SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/th-a7060-cx32s-32x100G-t1.config.bcm
|
||||
SAI_NUM_ECMP_MEMBERS=64
|
@ -0,0 +1,14 @@
|
||||
{# Get sai.profile based on switch_role #}
|
||||
{%- if DEVICE_METADATA is defined -%}
|
||||
{%- set switch_role = DEVICE_METADATA['localhost']['type'] -%}
|
||||
{%- if 'leafrouter' in switch_role.lower() -%}
|
||||
{% set sai_profile_contents = 'SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/th-a7060-cx32s-32x100G-t1.config.bcm' -%}
|
||||
{%- else %}
|
||||
{%- set sai_profile_contents = 'SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/th-a7060-cx32s-32x100G-t0.config.bcm' -%}
|
||||
{%- endif %}
|
||||
{%- else %}
|
||||
{%- set sai_profile_contents = 'SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/th-a7060-cx32s-32x100G-t1.config.bcm' -%}
|
||||
{%- endif %}
|
||||
{# Write the contents of sai_ profile_filename to sai.profile file #}
|
||||
{{ sai_profile_contents }}
|
||||
SAI_NUM_ECMP_MEMBERS=64
|
@ -0,0 +1,453 @@
|
||||
# Arista 7060CX-32S
|
||||
|
||||
# disables bcmALPMDH (ALPM distributed hitbit) thread. This thread is purely for debug purpose
|
||||
l3_alpm_hit_skip=1
|
||||
|
||||
# Disable Counting ACL Drop towards interface RX_DRP counter
|
||||
sai_adjust_acl_drop_in_rx_drop=1
|
||||
|
||||
phy_an_allow_pll_change=1
|
||||
arl_clean_timeout_usec=15000000
|
||||
asf_mem_profile=2
|
||||
bcm_num_cos=10
|
||||
bcm_stat_flags=1
|
||||
bcm_stat_jumbo=9236
|
||||
cdma_timeout_usec=15000000
|
||||
dma_desc_timeout_usec=15000000
|
||||
higig2_hdr_mode=1
|
||||
ipv6_lpm_128b_enable=1
|
||||
l3_alpm_enable=2
|
||||
lpm_scaling_enable=0
|
||||
l2xmsg_mode=1
|
||||
max_vp_lags=0
|
||||
miim_intr_enable=0
|
||||
module_64ports=1
|
||||
os=unix
|
||||
oversubscribe_mode=1
|
||||
ptp_bs_fref.0=25000000
|
||||
ptp_ts_pll_fref.0=25000000
|
||||
robust_hash_disable_egress_vlan.0=1
|
||||
robust_hash_disable_mpls.0=1
|
||||
robust_hash_disable_vlan.0=1
|
||||
tdma_timeout_usec.0=15000000
|
||||
tslam_timeout_usec.0=15000000
|
||||
pbmp_xport_xe.0=0x7ffffffffffffffffffffffffffffffffe
|
||||
phy_an_allow_pll_change_hg.0=0
|
||||
phy_an_c73_1.0=1
|
||||
phy_an_c73_2.0=1
|
||||
phy_an_c73_3.0=1
|
||||
phy_an_c73_4.0=1
|
||||
phy_an_c73_5.0=1
|
||||
phy_an_c73_6.0=1
|
||||
phy_an_c73_7.0=1
|
||||
phy_an_c73_8.0=1
|
||||
phy_an_c73_34.0=1
|
||||
phy_an_c73_35.0=1
|
||||
phy_an_c73_36.0=1
|
||||
phy_an_c73_37.0=1
|
||||
phy_an_c73_38.0=1
|
||||
phy_an_c73_39.0=1
|
||||
phy_an_c73_40.0=1
|
||||
phy_an_c73_41.0=1
|
||||
phy_an_c73_68.0=1
|
||||
phy_an_c73_69.0=1
|
||||
phy_an_c73_70.0=1
|
||||
phy_an_c73_71.0=1
|
||||
phy_an_c73_72.0=1
|
||||
phy_an_c73_73.0=1
|
||||
phy_an_c73_74.0=1
|
||||
phy_an_c73_75.0=1
|
||||
phy_an_c73_102.0=1
|
||||
phy_an_c73_103.0=1
|
||||
phy_an_c73_104.0=1
|
||||
phy_an_c73_105.0=1
|
||||
phy_an_c73_106.0=1
|
||||
phy_an_c73_107.0=1
|
||||
phy_an_c73_108.0=1
|
||||
phy_an_c73_109.0=1
|
||||
phy_an_fec_1.0=1
|
||||
phy_an_fec_2.0=1
|
||||
phy_an_fec_3.0=1
|
||||
phy_an_fec_4.0=1
|
||||
phy_an_fec_5.0=1
|
||||
phy_an_fec_6.0=1
|
||||
phy_an_fec_7.0=1
|
||||
phy_an_fec_8.0=1
|
||||
phy_an_fec_9.0=1
|
||||
phy_an_fec_10.0=1
|
||||
phy_an_fec_11.0=1
|
||||
phy_an_fec_12.0=1
|
||||
phy_an_fec_13.0=1
|
||||
phy_an_fec_14.0=1
|
||||
phy_an_fec_15.0=1
|
||||
phy_an_fec_16.0=1
|
||||
phy_an_fec_17.0=1
|
||||
phy_an_fec_18.0=1
|
||||
phy_an_fec_19.0=1
|
||||
phy_an_fec_20.0=1
|
||||
phy_an_fec_21.0=1
|
||||
phy_an_fec_22.0=1
|
||||
phy_an_fec_23.0=1
|
||||
phy_an_fec_24.0=1
|
||||
phy_an_fec_25.0=1
|
||||
phy_an_fec_26.0=1
|
||||
phy_an_fec_27.0=1
|
||||
phy_an_fec_28.0=1
|
||||
phy_an_fec_29.0=1
|
||||
phy_an_fec_30.0=1
|
||||
phy_an_fec_31.0=1
|
||||
phy_an_fec_32.0=1
|
||||
phy_an_fec_34.0=1
|
||||
phy_an_fec_38.0=1
|
||||
phy_an_fec_39.0=1
|
||||
phy_an_fec_40.0=1
|
||||
phy_an_fec_41.0=1
|
||||
phy_an_fec_42.0=1
|
||||
phy_an_fec_43.0=1
|
||||
phy_an_fec_44.0=1
|
||||
phy_an_fec_45.0=1
|
||||
phy_an_fec_46.0=1
|
||||
phy_an_fec_47.0=1
|
||||
phy_an_fec_48.0=1
|
||||
phy_an_fec_49.0=1
|
||||
phy_an_fec_50.0=1
|
||||
phy_an_fec_51.0=1
|
||||
phy_an_fec_52.0=1
|
||||
phy_an_fec_53.0=1
|
||||
phy_an_fec_54.0=1
|
||||
phy_an_fec_55.0=1
|
||||
phy_an_fec_56.0=1
|
||||
phy_an_fec_57.0=1
|
||||
phy_an_fec_58.0=1
|
||||
phy_an_fec_59.0=1
|
||||
phy_an_fec_60.0=1
|
||||
phy_an_fec_61.0=1
|
||||
phy_an_fec_62.0=1
|
||||
phy_an_fec_63.0=1
|
||||
phy_an_fec_64.0=1
|
||||
phy_an_fec_65.0=1
|
||||
phy_an_fec_68.0=1
|
||||
phy_an_fec_69.0=1
|
||||
phy_an_fec_70.0=1
|
||||
phy_an_fec_71.0=1
|
||||
phy_an_fec_72.0=1
|
||||
phy_an_fec_73.0=1
|
||||
phy_an_fec_74.0=1
|
||||
phy_an_fec_75.0=1
|
||||
phy_an_fec_76.0=1
|
||||
phy_an_fec_77.0=1
|
||||
phy_an_fec_78.0=1
|
||||
phy_an_fec_79.0=1
|
||||
phy_an_fec_80.0=1
|
||||
phy_an_fec_81.0=1
|
||||
phy_an_fec_82.0=1
|
||||
phy_an_fec_83.0=1
|
||||
phy_an_fec_84.0=1
|
||||
phy_an_fec_85.0=1
|
||||
phy_an_fec_86.0=1
|
||||
phy_an_fec_87.0=1
|
||||
phy_an_fec_88.0=1
|
||||
phy_an_fec_89.0=1
|
||||
phy_an_fec_90.0=1
|
||||
phy_an_fec_91.0=1
|
||||
phy_an_fec_92.0=1
|
||||
phy_an_fec_93.0=1
|
||||
phy_an_fec_94.0=1
|
||||
phy_an_fec_95.0=1
|
||||
phy_an_fec_96.0=1
|
||||
phy_an_fec_97.0=1
|
||||
phy_an_fec_98.0=1
|
||||
phy_an_fec_99.0=1
|
||||
phy_an_fec_102.0=1
|
||||
phy_an_fec_103.0=1
|
||||
phy_an_fec_104.0=1
|
||||
phy_an_fec_105.0=1
|
||||
phy_an_fec_106.0=1
|
||||
phy_an_fec_107.0=1
|
||||
phy_an_fec_108.0=1
|
||||
phy_an_fec_109.0=1
|
||||
phy_an_fec_110.0=1
|
||||
phy_an_fec_111.0=1
|
||||
phy_an_fec_112.0=1
|
||||
phy_an_fec_113.0=1
|
||||
phy_an_fec_114.0=1
|
||||
phy_an_fec_115.0=1
|
||||
phy_an_fec_116.0=1
|
||||
phy_an_fec_117.0=1
|
||||
phy_an_fec_118.0=1
|
||||
phy_an_fec_119.0=1
|
||||
phy_an_fec_120.0=1
|
||||
phy_an_fec_121.0=1
|
||||
phy_an_fec_122.0=1
|
||||
phy_an_fec_123.0=1
|
||||
phy_an_fec_124.0=1
|
||||
phy_an_fec_125.0=1
|
||||
phy_an_fec_126.0=1
|
||||
phy_an_fec_127.0=1
|
||||
phy_an_fec_128.0=1
|
||||
phy_an_fec_129.0=1
|
||||
phy_an_fec_130.0=1
|
||||
phy_an_fec_131.0=1
|
||||
phy_an_fec_132.0=1
|
||||
phy_an_fec_133.0=1
|
||||
phy_xaui_rx_polarity_flip_1.0=0x1
|
||||
phy_xaui_rx_polarity_flip_2.0=0x5
|
||||
phy_xaui_rx_polarity_flip_3.0=0x1
|
||||
phy_xaui_rx_polarity_flip_4.0=0x7
|
||||
phy_xaui_rx_polarity_flip_5.0=0xc
|
||||
phy_xaui_rx_polarity_flip_6.0=0xf
|
||||
phy_xaui_rx_polarity_flip_7.0=0xc
|
||||
phy_xaui_rx_polarity_flip_8.0=0xf
|
||||
phy_xaui_rx_polarity_flip_34.0=0x0
|
||||
phy_xaui_rx_polarity_flip_35.0=0x7
|
||||
phy_xaui_rx_polarity_flip_36.0=0x4
|
||||
phy_xaui_rx_polarity_flip_37.0=0x7
|
||||
phy_xaui_rx_polarity_flip_38.0=0x4
|
||||
phy_xaui_rx_polarity_flip_39.0=0x6
|
||||
phy_xaui_rx_polarity_flip_40.0=0x1
|
||||
phy_xaui_rx_polarity_flip_41.0=0x2
|
||||
phy_xaui_rx_polarity_flip_68.0=0xd
|
||||
phy_xaui_rx_polarity_flip_69.0=0x6
|
||||
phy_xaui_rx_polarity_flip_70.0=0x1
|
||||
phy_xaui_rx_polarity_flip_71.0=0x8
|
||||
phy_xaui_rx_polarity_flip_72.0=0x7
|
||||
phy_xaui_rx_polarity_flip_73.0=0xc
|
||||
phy_xaui_rx_polarity_flip_74.0=0x7
|
||||
phy_xaui_rx_polarity_flip_75.0=0x8
|
||||
phy_xaui_rx_polarity_flip_102.0=0xb
|
||||
phy_xaui_rx_polarity_flip_103.0=0xc
|
||||
phy_xaui_rx_polarity_flip_104.0=0x3
|
||||
phy_xaui_rx_polarity_flip_105.0=0xc
|
||||
phy_xaui_rx_polarity_flip_106.0=0xb
|
||||
phy_xaui_rx_polarity_flip_107.0=0x5
|
||||
phy_xaui_rx_polarity_flip_108.0=0x1
|
||||
phy_xaui_rx_polarity_flip_109.0=0x9
|
||||
phy_xaui_tx_polarity_flip_1.0=0x0
|
||||
phy_xaui_tx_polarity_flip_2.0=0xe
|
||||
phy_xaui_tx_polarity_flip_3.0=0x2
|
||||
phy_xaui_tx_polarity_flip_4.0=0xe
|
||||
phy_xaui_tx_polarity_flip_5.0=0xc
|
||||
phy_xaui_tx_polarity_flip_6.0=0xf
|
||||
phy_xaui_tx_polarity_flip_7.0=0xc
|
||||
phy_xaui_tx_polarity_flip_8.0=0xf
|
||||
phy_xaui_tx_polarity_flip_34.0=0x0
|
||||
phy_xaui_tx_polarity_flip_35.0=0xe
|
||||
phy_xaui_tx_polarity_flip_36.0=0x0
|
||||
phy_xaui_tx_polarity_flip_37.0=0xe
|
||||
phy_xaui_tx_polarity_flip_38.0=0xf
|
||||
phy_xaui_tx_polarity_flip_39.0=0xe
|
||||
phy_xaui_tx_polarity_flip_40.0=0x6
|
||||
phy_xaui_tx_polarity_flip_41.0=0xb
|
||||
phy_xaui_tx_polarity_flip_68.0=0x9
|
||||
phy_xaui_tx_polarity_flip_69.0=0xb
|
||||
phy_xaui_tx_polarity_flip_70.0=0xd
|
||||
phy_xaui_tx_polarity_flip_71.0=0x9
|
||||
phy_xaui_tx_polarity_flip_72.0=0x6
|
||||
phy_xaui_tx_polarity_flip_73.0=0xc
|
||||
phy_xaui_tx_polarity_flip_74.0=0x9
|
||||
phy_xaui_tx_polarity_flip_75.0=0x9
|
||||
phy_xaui_tx_polarity_flip_102.0=0x6
|
||||
phy_xaui_tx_polarity_flip_103.0=0xb
|
||||
phy_xaui_tx_polarity_flip_104.0=0x6
|
||||
phy_xaui_tx_polarity_flip_105.0=0xb
|
||||
phy_xaui_tx_polarity_flip_106.0=0x6
|
||||
phy_xaui_tx_polarity_flip_107.0=0xf
|
||||
phy_xaui_tx_polarity_flip_108.0=0x6
|
||||
phy_xaui_tx_polarity_flip_109.0=0xc
|
||||
portmap_1.0=1:100
|
||||
portmap_2.0=5:100
|
||||
portmap_3.0=9:100
|
||||
portmap_4.0=13:100
|
||||
portmap_5.0=17:100
|
||||
portmap_6.0=21:100
|
||||
portmap_7.0=25:100
|
||||
portmap_8.0=29:100
|
||||
portmap_34.0=33:100
|
||||
portmap_35.0=37:100
|
||||
portmap_36.0=41:100
|
||||
portmap_37.0=45:100
|
||||
portmap_38.0=49:100
|
||||
portmap_39.0=53:100
|
||||
portmap_40.0=57:100
|
||||
portmap_41.0=61:100
|
||||
portmap_68.0=65:100
|
||||
portmap_69.0=69:100
|
||||
portmap_70.0=73:100
|
||||
portmap_71.0=77:100
|
||||
portmap_72.0=81:100
|
||||
portmap_73.0=85:100
|
||||
portmap_74.0=89:100
|
||||
portmap_75.0=93:100
|
||||
portmap_102.0=97:100
|
||||
portmap_103.0=101:100
|
||||
portmap_104.0=105:100
|
||||
portmap_105.0=109:100
|
||||
portmap_106.0=113:100
|
||||
portmap_107.0=117:100
|
||||
portmap_108.0=121:100
|
||||
portmap_109.0=125:100
|
||||
port_phy_addr_1.0=0xff
|
||||
port_phy_addr_2.0=0xff
|
||||
port_phy_addr_3.0=0xff
|
||||
port_phy_addr_4.0=0xff
|
||||
port_phy_addr_5.0=0xff
|
||||
port_phy_addr_6.0=0xff
|
||||
port_phy_addr_7.0=0xff
|
||||
port_phy_addr_8.0=0xff
|
||||
port_phy_addr_34.0=0xff
|
||||
port_phy_addr_35.0=0xff
|
||||
port_phy_addr_36.0=0xff
|
||||
port_phy_addr_37.0=0xff
|
||||
port_phy_addr_38.0=0xff
|
||||
port_phy_addr_39.0=0xff
|
||||
port_phy_addr_40.0=0xff
|
||||
port_phy_addr_41.0=0xff
|
||||
port_phy_addr_68.0=0xff
|
||||
port_phy_addr_69.0=0xff
|
||||
port_phy_addr_70.0=0xff
|
||||
port_phy_addr_71.0=0xff
|
||||
port_phy_addr_72.0=0xff
|
||||
port_phy_addr_73.0=0xff
|
||||
port_phy_addr_74.0=0xff
|
||||
port_phy_addr_75.0=0xff
|
||||
port_phy_addr_102.0=0xff
|
||||
port_phy_addr_103.0=0xff
|
||||
port_phy_addr_104.0=0xff
|
||||
port_phy_addr_105.0=0xff
|
||||
port_phy_addr_106.0=0xff
|
||||
port_phy_addr_107.0=0xff
|
||||
port_phy_addr_108.0=0xff
|
||||
port_phy_addr_109.0=0xff
|
||||
xgxs_rx_lane_map_1.0=0x3210
|
||||
xgxs_rx_lane_map_2.0=0x3210
|
||||
xgxs_rx_lane_map_3.0=0x3210
|
||||
xgxs_rx_lane_map_4.0=0x3210
|
||||
xgxs_rx_lane_map_5.0=0x0123
|
||||
xgxs_rx_lane_map_6.0=0x2301
|
||||
xgxs_rx_lane_map_7.0=0x0123
|
||||
xgxs_rx_lane_map_8.0=0x2301
|
||||
xgxs_rx_lane_map_34.0=0x0123
|
||||
xgxs_rx_lane_map_35.0=0x0321
|
||||
xgxs_rx_lane_map_36.0=0x0321
|
||||
xgxs_rx_lane_map_37.0=0x0321
|
||||
xgxs_rx_lane_map_38.0=0x1230
|
||||
xgxs_rx_lane_map_39.0=0x2301
|
||||
xgxs_rx_lane_map_40.0=0x1230
|
||||
xgxs_rx_lane_map_41.0=0x2103
|
||||
xgxs_rx_lane_map_68.0=0x1230
|
||||
xgxs_rx_lane_map_69.0=0x2301
|
||||
xgxs_rx_lane_map_70.0=0x1230
|
||||
xgxs_rx_lane_map_71.0=0x2103
|
||||
xgxs_rx_lane_map_72.0=0x1230
|
||||
xgxs_rx_lane_map_73.0=0x2301
|
||||
xgxs_rx_lane_map_74.0=0x1230
|
||||
xgxs_rx_lane_map_75.0=0x2103
|
||||
xgxs_rx_lane_map_102.0=0x3210
|
||||
xgxs_rx_lane_map_103.0=0x3210
|
||||
xgxs_rx_lane_map_104.0=0x3210
|
||||
xgxs_rx_lane_map_105.0=0x3210
|
||||
xgxs_rx_lane_map_106.0=0x3210
|
||||
xgxs_rx_lane_map_107.0=0x3210
|
||||
xgxs_rx_lane_map_108.0=0x3210
|
||||
xgxs_rx_lane_map_109.0=0x3210
|
||||
xgxs_tx_lane_map_1.0=0x0321
|
||||
xgxs_tx_lane_map_2.0=0x2301
|
||||
xgxs_tx_lane_map_3.0=0x0321
|
||||
xgxs_tx_lane_map_4.0=0x2301
|
||||
xgxs_tx_lane_map_5.0=0x0123
|
||||
xgxs_tx_lane_map_6.0=0x0123
|
||||
xgxs_tx_lane_map_7.0=0x0123
|
||||
xgxs_tx_lane_map_8.0=0x0123
|
||||
xgxs_tx_lane_map_34.0=0x2301
|
||||
xgxs_tx_lane_map_35.0=0x0321
|
||||
xgxs_tx_lane_map_36.0=0x2301
|
||||
xgxs_tx_lane_map_37.0=0x0321
|
||||
xgxs_tx_lane_map_38.0=0x0123
|
||||
xgxs_tx_lane_map_39.0=0x1230
|
||||
xgxs_tx_lane_map_40.0=0x2301
|
||||
xgxs_tx_lane_map_41.0=0x1032
|
||||
xgxs_tx_lane_map_68.0=0x0123
|
||||
xgxs_tx_lane_map_69.0=0x1230
|
||||
xgxs_tx_lane_map_70.0=0x2301
|
||||
xgxs_tx_lane_map_71.0=0x1032
|
||||
xgxs_tx_lane_map_72.0=0x0123
|
||||
xgxs_tx_lane_map_73.0=0x1230
|
||||
xgxs_tx_lane_map_74.0=0x2301
|
||||
xgxs_tx_lane_map_75.0=0x1032
|
||||
xgxs_tx_lane_map_102.0=0x0321
|
||||
xgxs_tx_lane_map_103.0=0x2301
|
||||
xgxs_tx_lane_map_104.0=0x0321
|
||||
xgxs_tx_lane_map_105.0=0x2301
|
||||
xgxs_tx_lane_map_106.0=0x0321
|
||||
xgxs_tx_lane_map_107.0=0x2301
|
||||
xgxs_tx_lane_map_108.0=0x0321
|
||||
xgxs_tx_lane_map_109.0=0x2301
|
||||
|
||||
# tuning parameters for 25g serdes fiber
|
||||
serdes_driver_current_1=0xa
|
||||
serdes_preemphasis_1=0x284008
|
||||
serdes_driver_current_2=0xa
|
||||
serdes_preemphasis_2=0x284008
|
||||
serdes_driver_current_3=0xa
|
||||
serdes_preemphasis_3=0x284008
|
||||
serdes_driver_current_4=0xa
|
||||
serdes_preemphasis_4=0x284008
|
||||
serdes_driver_current_5=0xa
|
||||
serdes_preemphasis_5=0x284008
|
||||
serdes_driver_current_6=0xa
|
||||
serdes_preemphasis_6=0x284008
|
||||
serdes_driver_current_7=0xa
|
||||
serdes_preemphasis_7=0x284008
|
||||
serdes_driver_current_8=0xd
|
||||
serdes_preemphasis_8=0x303808
|
||||
serdes_driver_current_34=0xd
|
||||
serdes_preemphasis_34=0x303808
|
||||
serdes_driver_current_35=0xd
|
||||
serdes_preemphasis_35=0x303808
|
||||
serdes_driver_current_36=0xd
|
||||
serdes_preemphasis_36=0x303808
|
||||
serdes_driver_current_37=0xd
|
||||
serdes_preemphasis_37=0x303808
|
||||
serdes_driver_current_38=0xf
|
||||
serdes_preemphasis_38=0x373108
|
||||
serdes_driver_current_39=0xf
|
||||
serdes_preemphasis_39=0x373108
|
||||
serdes_driver_current_40=0xf
|
||||
serdes_preemphasis_40=0x373108
|
||||
serdes_driver_current_41=0xf
|
||||
serdes_preemphasis_41=0x373108
|
||||
serdes_driver_current_68=0xf
|
||||
serdes_preemphasis_68=0x373108
|
||||
serdes_driver_current_69=0xf
|
||||
serdes_preemphasis_69=0x373108
|
||||
serdes_driver_current_70=0xf
|
||||
serdes_preemphasis_70=0x373108
|
||||
serdes_driver_current_71=0xf
|
||||
serdes_preemphasis_71=0x373108
|
||||
serdes_driver_current_72=0xd
|
||||
serdes_preemphasis_72=0x303808
|
||||
serdes_driver_current_73=0xd
|
||||
serdes_preemphasis_73=0x303808
|
||||
serdes_driver_current_74=0xd
|
||||
serdes_preemphasis_74=0x303808
|
||||
serdes_driver_current_75=0xd
|
||||
serdes_preemphasis_75=0x303808
|
||||
serdes_driver_current_102=0xa
|
||||
serdes_preemphasis_102=0x284008
|
||||
serdes_driver_current_103=0xa
|
||||
serdes_preemphasis_103=0x284008
|
||||
serdes_driver_current_104=0xa
|
||||
serdes_preemphasis_104=0x284008
|
||||
serdes_driver_current_105=0xa
|
||||
serdes_preemphasis_105=0x284008
|
||||
serdes_driver_current_106=0xa
|
||||
serdes_preemphasis_106=0x284008
|
||||
serdes_driver_current_107=0xa
|
||||
serdes_preemphasis_107=0x284008
|
||||
serdes_driver_current_108=0xa
|
||||
serdes_preemphasis_108=0x284008
|
||||
serdes_driver_current_109=0xa
|
||||
serdes_preemphasis_109=0x284008
|
||||
|
||||
mmu_init_config="MSFT-TH-Tier1"
|
||||
phy_an_lt_msft=1
|
@ -3,6 +3,8 @@
|
||||
# disables bcmALPMDH (ALPM distributed hitbit) thread. This thread is purely for debug purpose
|
||||
l3_alpm_hit_skip=1
|
||||
|
||||
sai_hash_seed_config_hash_offset_enable=1
|
||||
|
||||
# Disable Counting ACL Drop towards interface RX_DRP counter
|
||||
sai_adjust_acl_drop_in_rx_drop=1
|
||||
|
||||
|
@ -6,6 +6,8 @@ l3_alpm_hit_skip=1
|
||||
# Disable Counting ACL Drop towards interface RX_DRP counter
|
||||
sai_adjust_acl_drop_in_rx_drop=1
|
||||
|
||||
sai_hash_seed_config_hash_offset_enable=1
|
||||
|
||||
phy_an_allow_pll_change=1
|
||||
arl_clean_timeout_usec=15000000
|
||||
asf_mem_profile=2
|
||||
|
@ -3,12 +3,16 @@
|
||||
{%- set IPinIP_sock = '' -%}
|
||||
{%- set map_prio = '' -%}
|
||||
{%- set pfcwd_sock = '' -%}
|
||||
{%- set hash_seed_offset_enable = '' -%}
|
||||
{%- if DEVICE_METADATA is defined and DEVICE_METADATA['localhost'] is defined -%}
|
||||
{%- if DEVICE_METADATA['localhost']['type'] is defined -%}
|
||||
{%- set switch_role = DEVICE_METADATA['localhost']['type'] -%}
|
||||
{%- if 'torrouter' in switch_role.lower() or 'torswitch' in switch_role.lower() %}
|
||||
{%- set mmu_sock = 'mmu_init_config="MSFT-TH2-Tier0"' -%}
|
||||
{%- endif %}
|
||||
{%- if 'leafrouter' in switch_role.lower() %}
|
||||
{%- set hash_seed_offset_enable = 'sai_hash_seed_config_hash_offset_enable=1' -%}
|
||||
{%- endif %}
|
||||
{%- endif %}
|
||||
{%- if DEVICE_METADATA['localhost']['subtype'] is defined -%}
|
||||
{%- set switch_subtype = DEVICE_METADATA['localhost']['subtype'] -%}
|
||||
@ -1051,3 +1055,4 @@ serdes_preemphasis_117=0x133c06
|
||||
{{ mmu_sock }}
|
||||
{{ IPinIP_sock }}
|
||||
phy_an_lt_msft=1
|
||||
{{ hash_seed_offset_enable }}
|
||||
|
@ -1,6 +1,8 @@
|
||||
# Define default OS / SAL
|
||||
os=unix
|
||||
|
||||
sai_hash_seed_config_hash_offset_enable=1
|
||||
|
||||
# all XPORTs to XE ports
|
||||
#pbmp_xport_xe=0x1fffffffe
|
||||
pbmp_xport_xe=0x1fffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffe
|
||||
|
@ -1,5 +1,7 @@
|
||||
#TH S6100 64x40
|
||||
|
||||
sai_hash_seed_config_hash_offset_enable=1
|
||||
|
||||
# disables bcmALPMDH (ALPM distributed hitbit) thread. This thread is purely for debug purpose
|
||||
l3_alpm_hit_skip=1
|
||||
|
||||
|
@ -1,4 +1,4 @@
|
||||
LIBSAIBCM_XGS_VERSION = 8.4.31.0
|
||||
LIBSAIBCM_XGS_VERSION = 8.4.35.0
|
||||
LIBSAIBCM_DNX_VERSION = 9.2.12.1
|
||||
LIBSAIBCM_XGS_BRANCH_NAME = SAI_8.4.0_GA
|
||||
LIBSAIBCM_DNX_BRANCH_NAME = SAI_9.2.0.3
|
||||
|
@ -127,6 +127,7 @@ portmap
|
||||
prbs_polynomial
|
||||
ptp_bs_fref
|
||||
ptp_ts_pll_fref
|
||||
sai_hash_seed_config_hash_offset_enable
|
||||
rate_ext_mdio_divisor
|
||||
robust_hash_disable_egress_vlan
|
||||
robust_hash_disable_mpls
|
||||
|
Reference in New Issue
Block a user