Merge f811c88389
into fb29a4047c
This commit is contained in:
commit
12e0cc2f17
@ -1,57 +0,0 @@
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|||||||
# name lanes alias index speed autoneg
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|
||||||
Ethernet0 26 Ethernet1/0/1 1 1000 1
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||||||
Ethernet1 25 Ethernet1/0/2 2 1000 1
|
|
||||||
Ethernet2 28 Ethernet1/0/3 3 1000 1
|
|
||||||
Ethernet3 27 Ethernet1/0/4 4 1000 1
|
|
||||||
Ethernet4 30 Ethernet1/0/5 5 1000 1
|
|
||||||
Ethernet5 29 Ethernet1/0/6 6 1000 1
|
|
||||||
Ethernet6 32 Ethernet1/0/7 7 1000 1
|
|
||||||
Ethernet7 31 Ethernet1/0/8 8 1000 1
|
|
||||||
Ethernet8 34 Ethernet1/0/9 9 1000 1
|
|
||||||
Ethernet9 33 Ethernet1/0/10 10 1000 1
|
|
||||||
Ethernet10 36 Ethernet1/0/11 11 1000 1
|
|
||||||
Ethernet11 35 Ethernet1/0/12 12 1000 1
|
|
||||||
Ethernet12 38 Ethernet1/0/13 13 1000 1
|
|
||||||
Ethernet13 37 Ethernet1/0/14 14 1000 1
|
|
||||||
Ethernet14 40 Ethernet1/0/15 15 1000 1
|
|
||||||
Ethernet15 39 Ethernet1/0/16 16 1000 1
|
|
||||||
Ethernet16 42 Ethernet1/0/17 17 1000 1
|
|
||||||
Ethernet17 41 Ethernet1/0/18 18 1000 1
|
|
||||||
Ethernet18 44 Ethernet1/0/19 19 1000 1
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|
||||||
Ethernet19 43 Ethernet1/0/20 20 1000 1
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|
||||||
Ethernet20 50 Ethernet1/0/21 21 1000 1
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||||||
Ethernet21 49 Ethernet1/0/22 22 1000 1
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||||||
Ethernet22 52 Ethernet1/0/23 23 1000 1
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|
||||||
Ethernet23 51 Ethernet1/0/24 24 1000 1
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|
||||||
Ethernet24 2 Ethernet1/0/25 25 1000 1
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|
||||||
Ethernet25 1 Ethernet1/0/26 26 1000 1
|
|
||||||
Ethernet26 4 Ethernet1/0/27 27 1000 1
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|
||||||
Ethernet27 3 Ethernet1/0/28 28 1000 1
|
|
||||||
Ethernet28 6 Ethernet1/0/29 29 1000 1
|
|
||||||
Ethernet29 5 Ethernet1/0/30 30 1000 1
|
|
||||||
Ethernet30 8 Ethernet1/0/31 31 1000 1
|
|
||||||
Ethernet31 7 Ethernet1/0/32 32 1000 1
|
|
||||||
Ethernet32 10 Ethernet1/0/33 33 1000 1
|
|
||||||
Ethernet33 9 Ethernet1/0/34 34 1000 1
|
|
||||||
Ethernet34 12 Ethernet1/0/35 35 1000 1
|
|
||||||
Ethernet35 11 Ethernet1/0/36 36 1000 1
|
|
||||||
Ethernet36 14 Ethernet1/0/37 37 1000 1
|
|
||||||
Ethernet37 13 Ethernet1/0/38 38 1000 1
|
|
||||||
Ethernet38 16 Ethernet1/0/39 39 1000 1
|
|
||||||
Ethernet39 15 Ethernet1/0/40 40 1000 1
|
|
||||||
Ethernet40 18 Ethernet1/0/41 41 1000 1
|
|
||||||
Ethernet41 17 Ethernet1/0/42 42 1000 1
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|
||||||
Ethernet42 20 Ethernet1/0/43 43 1000 1
|
|
||||||
Ethernet43 19 Ethernet1/0/44 44 1000 1
|
|
||||||
Ethernet44 22 Ethernet1/0/45 45 1000 1
|
|
||||||
Ethernet45 21 Ethernet1/0/46 46 1000 1
|
|
||||||
Ethernet46 24 Ethernet1/0/47 47 1000 1
|
|
||||||
Ethernet47 23 Ethernet1/0/48 48 1000 1
|
|
||||||
Ethernet48 60 Ethernet1/0/49 49 10000 0
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|
||||||
Ethernet49 58 Ethernet1/0/50 50 10000 0
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|
||||||
Ethernet50 59 Ethernet1/0/51 51 10000 0
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|
||||||
Ethernet51 57 Ethernet1/0/52 52 10000 0
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|
||||||
Ethernet52 62 Ethernet1/0/53 53 10000 0
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|
||||||
Ethernet53 64 Ethernet1/0/54 54 10000 0
|
|
||||||
Ethernet54 61 Ethernet1/0/55 55 10000 0
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|
||||||
Ethernet55 63 Ethernet1/0/56 56 10000 0
|
|
@ -1 +0,0 @@
|
|||||||
SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/belgite.config.bcm
|
|
Binary file not shown.
@ -1 +0,0 @@
|
|||||||
CELESTICA-BELGITE t1
|
|
@ -1,686 +0,0 @@
|
|||||||
{
|
|
||||||
"PLATFORM":
|
|
||||||
{
|
|
||||||
"num_psus":2,
|
|
||||||
"num_fantrays":3,
|
|
||||||
"num_fans_pertray":1,
|
|
||||||
"num_ports":56,
|
|
||||||
"num_temps":4,
|
|
||||||
"pddf_dev_types":
|
|
||||||
{
|
|
||||||
"description":"Belgite - Below is the list of supported PDDF device types (chip names) for various components. If any component uses some other driver, we will create the client using 'echo <dev-address> <dev-type> > <path>/new_device' method",
|
|
||||||
"CPLD":
|
|
||||||
[
|
|
||||||
"i2c_cpld"
|
|
||||||
],
|
|
||||||
"PSU":
|
|
||||||
[
|
|
||||||
"psu_eeprom",
|
|
||||||
"psu_pmbus"
|
|
||||||
],
|
|
||||||
"FAN":
|
|
||||||
[
|
|
||||||
"fan_ctrl",
|
|
||||||
"fan_eeprom",
|
|
||||||
"fan_cpld"
|
|
||||||
],
|
|
||||||
"PORT_MODULE":
|
|
||||||
[
|
|
||||||
"pddf_xcvr"
|
|
||||||
]
|
|
||||||
},
|
|
||||||
"std_perm_kos":
|
|
||||||
[
|
|
||||||
"i2c-ismt",
|
|
||||||
"i2c-i801"
|
|
||||||
],
|
|
||||||
"std_kos":
|
|
||||||
[
|
|
||||||
"i2c_dev",
|
|
||||||
"i2c_mux_pca954x",
|
|
||||||
"gpio_pca953x",
|
|
||||||
"mc24lc64t",
|
|
||||||
"optoe"
|
|
||||||
],
|
|
||||||
"pddf_kos":
|
|
||||||
[
|
|
||||||
"pddf_client_module",
|
|
||||||
"pddf_mux_module",
|
|
||||||
"pddf_psu_driver_module",
|
|
||||||
"pddf_psu_module",
|
|
||||||
"pddf_gpio_module",
|
|
||||||
"pddf_xcvr_module",
|
|
||||||
"pddf_xcvr_driver_module",
|
|
||||||
"pddf_led_module",
|
|
||||||
"pddf_fan_driver_module",
|
|
||||||
"pddf_fan_module",
|
|
||||||
"pddf_led_module"
|
|
||||||
],
|
|
||||||
"custom_kos":
|
|
||||||
[
|
|
||||||
"pddf_custom_psu"
|
|
||||||
]
|
|
||||||
},
|
|
||||||
"SYSTEM":
|
|
||||||
{
|
|
||||||
"dev_info": {"device_type":"CPU", "device_name":"ROOT_COMPLEX", "device_parent":null},
|
|
||||||
"i2c":
|
|
||||||
{
|
|
||||||
"CONTROLLERS":
|
|
||||||
[
|
|
||||||
{ "dev_name":"i2c-0", "dev":"SMBUS0" }
|
|
||||||
]
|
|
||||||
}
|
|
||||||
},
|
|
||||||
"SMBUS0":
|
|
||||||
{
|
|
||||||
"dev_info": {"device_type": "SMBUS", "device_name": "SMBUS0", "device_parent": "SYSTEM"},
|
|
||||||
"i2c":
|
|
||||||
{
|
|
||||||
"topo_info": {"dev_addr": "0x0"},
|
|
||||||
"DEVICES":
|
|
||||||
[
|
|
||||||
{"dev": "EEPROM1"},
|
|
||||||
{"dev": "MUX1"}
|
|
||||||
]
|
|
||||||
}
|
|
||||||
},
|
|
||||||
"EEPROM1":
|
|
||||||
{
|
|
||||||
"dev_info": {"device_type": "EEPROM", "device_name": "EEPROM1", "device_parent": "SMBUS0"},
|
|
||||||
"i2c":
|
|
||||||
{
|
|
||||||
"topo_info": {"parent_bus": "0x0", "dev_addr": "0x52", "dev_type": "24lc64t"},
|
|
||||||
"dev_attr": {"access_mode": "BLOCK"},
|
|
||||||
"attr_list":
|
|
||||||
[
|
|
||||||
{"attr_name": "eeprom"}
|
|
||||||
]
|
|
||||||
}
|
|
||||||
},
|
|
||||||
"MUX1":
|
|
||||||
{
|
|
||||||
"dev_info": { "device_type":"MUX", "device_name":"MUX1", "device_parent":"SMBUS0"},
|
|
||||||
"i2c":
|
|
||||||
{
|
|
||||||
"topo_info": { "parent_bus":"0x0", "dev_addr":"0x70", "dev_type":"pca9548"},
|
|
||||||
"dev_attr": { "virt_bus":"0x2"},
|
|
||||||
"channel":
|
|
||||||
[
|
|
||||||
{"chn":"0", "dev":"CPLD1" },
|
|
||||||
{"chn":"0", "dev":"FAN-CTRL1" },
|
|
||||||
{"chn":"2", "dev":"PSU1" },
|
|
||||||
{"chn":"2", "dev":"PSU2" },
|
|
||||||
{"chn":"3", "dev":"TEMP1"},
|
|
||||||
{"chn":"3", "dev":"TEMP2"},
|
|
||||||
{"chn":"4", "dev":"TEMP3"},
|
|
||||||
{"chn":"4", "dev":"TEMP4"},
|
|
||||||
{"chn":"7", "dev":"MUX2"}
|
|
||||||
]
|
|
||||||
}
|
|
||||||
},
|
|
||||||
"MUX2":
|
|
||||||
{
|
|
||||||
"dev_info": { "device_type":"MUX", "device_name":"MUX2", "device_parent":"MUX1"},
|
|
||||||
"i2c":
|
|
||||||
{
|
|
||||||
"topo_info": { "parent_bus":"0x9", "dev_addr":"0x71", "dev_type":"pca9548"},
|
|
||||||
"dev_attr": { "virt_bus":"0x10"},
|
|
||||||
"channel":
|
|
||||||
[
|
|
||||||
{"chn":"0", "dev":"PORT49"},
|
|
||||||
{"chn":"1", "dev":"PORT50"},
|
|
||||||
{"chn":"2", "dev":"PORT51"},
|
|
||||||
{"chn":"3", "dev":"PORT52"},
|
|
||||||
{"chn":"4", "dev":"PORT53"},
|
|
||||||
{"chn":"5", "dev":"PORT54"},
|
|
||||||
{"chn":"6", "dev":"PORT55"},
|
|
||||||
{"chn":"7", "dev":"PORT56"}
|
|
||||||
]
|
|
||||||
}
|
|
||||||
},
|
|
||||||
"CPLD1":
|
|
||||||
{
|
|
||||||
"dev_info": {"device_type": "CPLD", "device_name": "CPLD1", "device_parent": "MUX1"},
|
|
||||||
"i2c":
|
|
||||||
{
|
|
||||||
"topo_info": {"parent_bus": "0x2", "dev_addr": "0x32", "dev_type": "i2c_cpld"},
|
|
||||||
"dev_attr": {}
|
|
||||||
}
|
|
||||||
},
|
|
||||||
"PSU1":
|
|
||||||
{
|
|
||||||
"dev_info": { "device_type":"PSU", "device_name":"PSU1", "device_parent":"MUX1"},
|
|
||||||
"dev_attr": { "dev_idx":"1", "num_psu_fans": "1"},
|
|
||||||
"i2c":
|
|
||||||
{
|
|
||||||
"interface":
|
|
||||||
[
|
|
||||||
{ "itf":"pmbus", "dev":"PSU1-PMBUS" }
|
|
||||||
]
|
|
||||||
}
|
|
||||||
},
|
|
||||||
"PSU1-PMBUS":
|
|
||||||
{
|
|
||||||
"dev_info": { "device_type":"PSU-PMBUS", "device_name":"PSU1-PMBUS", "device_parent":"MUX1", "virt_parent":"PSU1"},
|
|
||||||
"i2c":
|
|
||||||
{
|
|
||||||
"topo_info":{ "parent_bus":"0x4", "dev_addr":"0x58", "dev_type":"psu_pmbus"},
|
|
||||||
"attr_list":
|
|
||||||
[
|
|
||||||
{ "attr_name":"psu_present", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x41", "attr_mask":"0x10", "attr_cmpval":"0x0", "attr_len":"1"},
|
|
||||||
{ "attr_name":"psu_power_good", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x41", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"},
|
|
||||||
{ "attr_name":"psu_model_name", "attr_devaddr":"0x58", "attr_devtype":"pmbus", "attr_offset":"0x9a", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"16" },
|
|
||||||
{ "attr_name":"psu_mfr_id", "attr_devaddr":"0x58", "attr_devtype":"pmbus", "attr_offset":"0x99", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"7" },
|
|
||||||
{ "attr_name":"psu_serial_num", "attr_devaddr":"0x58", "attr_devtype":"pmbus", "attr_offset":"0x9e", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"16" },
|
|
||||||
{ "attr_name":"psu_v_in", "attr_devaddr":"0x58", "attr_devtype":"pmbus", "attr_offset":"0x88", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"},
|
|
||||||
{ "attr_name":"psu_i_in", "attr_devaddr":"0x58", "attr_devtype":"pmbus", "attr_offset":"0x89", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"},
|
|
||||||
{ "attr_name":"psu_p_in", "attr_devaddr":"0x58", "attr_devtype":"pmbus", "attr_offset":"0xa7", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"},
|
|
||||||
{ "attr_name":"psu_v_out", "attr_devaddr":"0x58", "attr_devtype":"pmbus", "attr_offset":"0x8b", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"},
|
|
||||||
{ "attr_name":"psu_i_out", "attr_devaddr":"0x58", "attr_devtype":"pmbus", "attr_offset":"0x8c", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"},
|
|
||||||
{ "attr_name":"psu_p_out", "attr_devaddr":"0x58", "attr_devtype":"pmbus", "attr_offset":"0x96", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"},
|
|
||||||
{ "attr_name":"psu_fan_dir", "attr_devaddr":"0x58", "attr_devtype":"pmbus", "attr_offset":"0xc5", "attr_mask":"0x18", "attr_cmpval":"0x08", "attr_len":"1"},
|
|
||||||
{ "attr_name":"psu_fan1_speed_rpm", "attr_devaddr":"0x58", "attr_devtype":"pmbus", "attr_offset":"0x90", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"},
|
|
||||||
{ "attr_name":"psu_temp1_input", "attr_devaddr":"0x58", "attr_devtype":"pmbus", "attr_offset":"0x8d", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"}
|
|
||||||
]
|
|
||||||
}
|
|
||||||
},
|
|
||||||
"PSU2":
|
|
||||||
{
|
|
||||||
"dev_info": { "device_type":"PSU", "device_name":"PSU2", "device_parent":"MUX1" },
|
|
||||||
"dev_attr": { "dev_idx":"2", "num_psu_fans":"1"},
|
|
||||||
"i2c":
|
|
||||||
{
|
|
||||||
"interface":
|
|
||||||
[
|
|
||||||
{ "itf":"pmbus", "dev":"PSU2-PMBUS"}
|
|
||||||
]
|
|
||||||
}
|
|
||||||
},
|
|
||||||
"PSU2-PMBUS":
|
|
||||||
{
|
|
||||||
"dev_info": {"device_type":"PSU-PMBUS", "device_name":"PSU2-PMBUS", "device_parent":"MUX1", "virt_parent":"PSU2"},
|
|
||||||
"i2c":
|
|
||||||
{
|
|
||||||
"topo_info": { "parent_bus":"0x4", "dev_addr":"0x59", "dev_type":"psu_pmbus"},
|
|
||||||
"attr_list":
|
|
||||||
[
|
|
||||||
{ "attr_name":"psu_present", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x41", "attr_mask":"0x20", "attr_cmpval":"0x0", "attr_len":"1"},
|
|
||||||
{ "attr_name":"psu_power_good", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x41", "attr_mask":"0x8", "attr_cmpval":"0x0", "attr_len":"1"},
|
|
||||||
{ "attr_name":"psu_model_name", "attr_devaddr":"0x59", "attr_devtype":"pmbus", "attr_offset":"0x9a", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"16" },
|
|
||||||
{ "attr_name":"psu_mfr_id", "attr_devaddr":"0x59", "attr_devtype":"pmbus", "attr_offset":"0x99", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"7" },
|
|
||||||
{ "attr_name":"psu_serial_num", "attr_devaddr":"0x59", "attr_devtype":"pmbus", "attr_offset":"0x9e", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"16" },
|
|
||||||
{ "attr_name":"psu_v_in", "attr_devaddr":"0x59", "attr_devtype":"pmbus", "attr_offset":"0x88", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"},
|
|
||||||
{ "attr_name":"psu_i_in", "attr_devaddr":"0x59", "attr_devtype":"pmbus", "attr_offset":"0x89", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"},
|
|
||||||
{ "attr_name":"psu_p_in", "attr_devaddr":"0x59", "attr_devtype":"pmbus", "attr_offset":"0xa7", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"},
|
|
||||||
{ "attr_name":"psu_v_out", "attr_devaddr":"0x59", "attr_devtype":"pmbus", "attr_offset":"0x8b", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"},
|
|
||||||
{ "attr_name":"psu_i_out", "attr_devaddr":"0x59", "attr_devtype":"pmbus", "attr_offset":"0x8c", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"},
|
|
||||||
{ "attr_name":"psu_p_out", "attr_devaddr":"0x59", "attr_devtype":"pmbus", "attr_offset":"0x96", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"},
|
|
||||||
{ "attr_name":"psu_fan_dir", "attr_devaddr":"0x59", "attr_devtype":"pmbus", "attr_offset":"0xc5", "attr_mask":"0x18", "attr_cmpval":"0x08", "attr_len":"1"},
|
|
||||||
{ "attr_name":"psu_fan1_speed_rpm", "attr_devaddr":"0x59", "attr_devtype":"pmbus", "attr_offset":"0x90", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"},
|
|
||||||
{ "attr_name":"psu_temp1_input", "attr_devaddr":"0x59", "attr_devtype":"pmbus", "attr_offset":"0x8d", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"}
|
|
||||||
]
|
|
||||||
}
|
|
||||||
},
|
|
||||||
"TEMP1":
|
|
||||||
{
|
|
||||||
"dev_info": { "device_type":"TEMP_SENSOR", "device_name":"TEMP1", "device_parent":"MUX1"},
|
|
||||||
"dev_attr": { "display_name":"LM75_U10"},
|
|
||||||
"i2c":
|
|
||||||
{
|
|
||||||
"topo_info": { "parent_bus":"0x5", "dev_addr":"0x48", "dev_type":"lm75"},
|
|
||||||
"attr_list":
|
|
||||||
[
|
|
||||||
{ "attr_name": "temp1_high_threshold", "drv_attr_name":"temp1_max"},
|
|
||||||
{ "attr_name": "temp1_max_hyst"},
|
|
||||||
{ "attr_name": "temp1_input"}
|
|
||||||
]
|
|
||||||
}
|
|
||||||
},
|
|
||||||
"TEMP2":
|
|
||||||
{
|
|
||||||
"dev_info": { "device_type":"TEMP_SENSOR", "device_name":"TEMP2", "device_parent":"MUX1"},
|
|
||||||
"dev_attr": { "display_name":"LM75_U4"},
|
|
||||||
"i2c":
|
|
||||||
{
|
|
||||||
"topo_info": { "parent_bus":"0x5", "dev_addr":"0x49", "dev_type":"lm75"},
|
|
||||||
"attr_list":
|
|
||||||
[
|
|
||||||
{ "attr_name": "temp1_high_threshold", "drv_attr_name":"temp1_max"},
|
|
||||||
{ "attr_name": "temp1_max_hyst"},
|
|
||||||
{ "attr_name": "temp1_input"}
|
|
||||||
]
|
|
||||||
}
|
|
||||||
},
|
|
||||||
"TEMP3":
|
|
||||||
{
|
|
||||||
"dev_info": { "device_type":"TEMP_SENSOR", "device_name":"TEMP3", "device_parent":"MUX1"},
|
|
||||||
"dev_attr": { "display_name":"LM75_U7"},
|
|
||||||
"i2c":
|
|
||||||
{
|
|
||||||
"topo_info": { "parent_bus":"0x6", "dev_addr":"0x4a", "dev_type":"lm75"},
|
|
||||||
"attr_list":
|
|
||||||
[
|
|
||||||
{ "attr_name": "temp1_high_threshold", "drv_attr_name":"temp1_max"},
|
|
||||||
{ "attr_name": "temp1_max_hyst"},
|
|
||||||
{ "attr_name": "temp1_input"}
|
|
||||||
]
|
|
||||||
}
|
|
||||||
},
|
|
||||||
"TEMP4":
|
|
||||||
{
|
|
||||||
"dev_info": { "device_type":"TEMP_SENSOR", "device_name":"TEMP4", "device_parent":"MUX1"},
|
|
||||||
"dev_attr": { "display_name":"LM75_U60"},
|
|
||||||
"i2c":
|
|
||||||
{
|
|
||||||
"topo_info": { "parent_bus":"0x6", "dev_addr":"0x49", "dev_type":"lm75"},
|
|
||||||
"attr_list":
|
|
||||||
[
|
|
||||||
{ "attr_name": "temp1_high_threshold", "drv_attr_name":"temp1_max"},
|
|
||||||
{ "attr_name": "temp1_max_hyst"},
|
|
||||||
{ "attr_name": "temp1_input"}
|
|
||||||
]
|
|
||||||
}
|
|
||||||
},
|
|
||||||
"PORT49":
|
|
||||||
{
|
|
||||||
"dev_info": { "device_type":"SFP28", "device_name":"PORT49", "device_parent":"MUX2"},
|
|
||||||
"dev_attr": { "dev_idx":"49"},
|
|
||||||
"i2c":
|
|
||||||
{
|
|
||||||
"interface":
|
|
||||||
[
|
|
||||||
{ "itf":"eeprom", "dev":"PORT49-EEPROM" },
|
|
||||||
{ "itf":"control", "dev":"PORT49-CTRL" }
|
|
||||||
]
|
|
||||||
}
|
|
||||||
},
|
|
||||||
"PORT49-EEPROM":
|
|
||||||
{
|
|
||||||
"dev_info": { "device_type":"", "device_name":"PORT49-EEPROM", "device_parent":"MUX2", "virt_parent":"PORT49"},
|
|
||||||
"i2c":
|
|
||||||
{
|
|
||||||
"topo_info": { "parent_bus":"0x10", "dev_addr":"0x50", "dev_type":"optoe2"},
|
|
||||||
"attr_list":
|
|
||||||
[
|
|
||||||
{ "attr_name":"eeprom"}
|
|
||||||
]
|
|
||||||
}
|
|
||||||
},
|
|
||||||
"PORT49-CTRL":
|
|
||||||
{
|
|
||||||
"dev_info": { "device_type":"", "device_name":"PORT49-CTRL", "device_parent":"MUX2", "virt_parent":"PORT49"},
|
|
||||||
"i2c":
|
|
||||||
{
|
|
||||||
"topo_info": { "parent_bus":"0x10", "dev_addr":"0x66", "dev_type":"pddf_xcvr"},
|
|
||||||
"attr_list":
|
|
||||||
[
|
|
||||||
{ "attr_name":"xcvr_txfault", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x47", "attr_mask":"0x0", "attr_cmpval":"0x1", "attr_len":"1"},
|
|
||||||
{ "attr_name":"xcvr_txdisable", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x4a", "attr_mask":"0x0", "attr_cmpval":"0x1", "attr_len":"1"},
|
|
||||||
{ "attr_name":"xcvr_lpmode", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x4a", "attr_mask":"0x0", "attr_cmpval":"0x1", "attr_len":"1"},
|
|
||||||
{ "attr_name":"xcvr_present", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x49", "attr_mask":"0x0", "attr_cmpval":"0x1", "attr_len":"1"},
|
|
||||||
{ "attr_name":"xcvr_rxlos", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x48", "attr_mask":"0x0", "attr_cmpval":"0x1", "attr_len":"1"}
|
|
||||||
]
|
|
||||||
}
|
|
||||||
},
|
|
||||||
"PORT50":
|
|
||||||
{
|
|
||||||
"dev_info": { "device_type":"SFP28", "device_name":"PORT50", "device_parent":"MUX2"},
|
|
||||||
"dev_attr": { "dev_idx":"50"},
|
|
||||||
"i2c":
|
|
||||||
{
|
|
||||||
"interface":
|
|
||||||
[
|
|
||||||
{ "itf":"eeprom", "dev":"PORT50-EEPROM" },
|
|
||||||
{ "itf":"control", "dev":"PORT50-CTRL" }
|
|
||||||
]
|
|
||||||
}
|
|
||||||
},
|
|
||||||
"PORT50-EEPROM":
|
|
||||||
{
|
|
||||||
"dev_info": { "device_type":"", "device_name":"PORT50-EEPROM", "device_parent":"MUX2", "virt_parent":"PORT50"},
|
|
||||||
"i2c":
|
|
||||||
{
|
|
||||||
"topo_info": { "parent_bus":"0x11", "dev_addr":"0x50", "dev_type":"optoe2"},
|
|
||||||
"attr_list":
|
|
||||||
[
|
|
||||||
{ "attr_name":"eeprom"}
|
|
||||||
]
|
|
||||||
}
|
|
||||||
},
|
|
||||||
"PORT50-CTRL":
|
|
||||||
{
|
|
||||||
"dev_info": { "device_type":"", "device_name":"PORT50-CTRL", "device_parent":"MUX2", "virt_parent":"PORT50"},
|
|
||||||
"i2c":
|
|
||||||
{
|
|
||||||
"topo_info": { "parent_bus":"0x11", "dev_addr":"0x66", "dev_type":"pddf_xcvr"},
|
|
||||||
"attr_list":
|
|
||||||
[
|
|
||||||
{ "attr_name":"xcvr_txfault", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x47", "attr_mask":"0x1", "attr_cmpval":"0x2", "attr_len":"1"},
|
|
||||||
{ "attr_name":"xcvr_txdisable", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x4a", "attr_mask":"0x1", "attr_cmpval":"0x2", "attr_len":"1"},
|
|
||||||
{ "attr_name":"xcvr_lpmode", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x4a", "attr_mask":"0x1", "attr_cmpval":"0x2", "attr_len":"1"},
|
|
||||||
{ "attr_name":"xcvr_present", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x49", "attr_mask":"0x1", "attr_cmpval":"0x2", "attr_len":"1"},
|
|
||||||
{ "attr_name":"xcvr_rxlos", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x48", "attr_mask":"0x1", "attr_cmpval":"0x2", "attr_len":"1"}
|
|
||||||
|
|
||||||
]
|
|
||||||
}
|
|
||||||
},
|
|
||||||
"PORT51":
|
|
||||||
{
|
|
||||||
"dev_info": { "device_type":"SFP28", "device_name":"PORT51", "device_parent":"MUX2"},
|
|
||||||
"dev_attr": { "dev_idx":"51"},
|
|
||||||
"i2c":
|
|
||||||
{
|
|
||||||
"interface":
|
|
||||||
[
|
|
||||||
{ "itf":"eeprom", "dev":"PORT51-EEPROM" },
|
|
||||||
{ "itf":"control", "dev":"PORT51-CTRL" }
|
|
||||||
]
|
|
||||||
}
|
|
||||||
},
|
|
||||||
"PORT51-EEPROM":
|
|
||||||
{
|
|
||||||
"dev_info": { "device_type":"", "device_name":"PORT51-EEPROM", "device_parent":"MUX2", "virt_parent":"PORT51"},
|
|
||||||
"i2c":
|
|
||||||
{
|
|
||||||
"topo_info": { "parent_bus":"0x12", "dev_addr":"0x50", "dev_type":"optoe2"},
|
|
||||||
"attr_list":
|
|
||||||
[
|
|
||||||
{ "attr_name":"eeprom"}
|
|
||||||
]
|
|
||||||
}
|
|
||||||
},
|
|
||||||
"PORT51-CTRL":
|
|
||||||
{
|
|
||||||
"dev_info": { "device_type":"", "device_name":"PORT51-CTRL", "device_parent":"MUX2", "virt_parent":"PORT51"},
|
|
||||||
"i2c":
|
|
||||||
{
|
|
||||||
"topo_info": { "parent_bus":"0x12", "dev_addr":"0x66", "dev_type":"pddf_xcvr"},
|
|
||||||
"attr_list":
|
|
||||||
[
|
|
||||||
{ "attr_name":"xcvr_txfault", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x47", "attr_mask":"0x2", "attr_cmpval":"0x4", "attr_len":"1"},
|
|
||||||
{ "attr_name":"xcvr_txdisable", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x4a", "attr_mask":"0x2", "attr_cmpval":"0x4", "attr_len":"1"},
|
|
||||||
{ "attr_name":"xcvr_lpmode", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x4a", "attr_mask":"0x2", "attr_cmpval":"0x4", "attr_len":"1"},
|
|
||||||
{ "attr_name":"xcvr_present", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x49", "attr_mask":"0x2", "attr_cmpval":"0x4", "attr_len":"1"},
|
|
||||||
{ "attr_name":"xcvr_rxlos", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x48", "attr_mask":"0x2", "attr_cmpval":"0x4", "attr_len":"1"}
|
|
||||||
]
|
|
||||||
}
|
|
||||||
},
|
|
||||||
"PORT52":
|
|
||||||
{
|
|
||||||
"dev_info": { "device_type":"SFP28", "device_name":"PORT52", "device_parent":"MUX2"},
|
|
||||||
"dev_attr": { "dev_idx":"52"},
|
|
||||||
"i2c":
|
|
||||||
{
|
|
||||||
"interface":
|
|
||||||
[
|
|
||||||
{ "itf":"eeprom", "dev":"PORT52-EEPROM" },
|
|
||||||
{ "itf":"control", "dev":"PORT52-CTRL" }
|
|
||||||
]
|
|
||||||
}
|
|
||||||
},
|
|
||||||
"PORT52-EEPROM":
|
|
||||||
{
|
|
||||||
"dev_info": { "device_type":"", "device_name":"PORT52-EEPROM", "device_parent":"MUX2", "virt_parent":"PORT52"},
|
|
||||||
"i2c":
|
|
||||||
{
|
|
||||||
"topo_info": { "parent_bus":"0x13", "dev_addr":"0x50", "dev_type":"optoe2"},
|
|
||||||
"attr_list":
|
|
||||||
[
|
|
||||||
{ "attr_name":"eeprom"}
|
|
||||||
]
|
|
||||||
}
|
|
||||||
},
|
|
||||||
"PORT52-CTRL":
|
|
||||||
{
|
|
||||||
"dev_info": { "device_type":"", "device_name":"PORT52-CTRL", "device_parent":"MUX2", "virt_parent":"PORT52"},
|
|
||||||
"i2c":
|
|
||||||
{
|
|
||||||
"topo_info": { "parent_bus":"0x13", "dev_addr":"0x66", "dev_type":"pddf_xcvr"},
|
|
||||||
"attr_list":
|
|
||||||
[
|
|
||||||
{ "attr_name":"xcvr_txfault", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x47", "attr_mask":"0x3", "attr_cmpval":"0x8", "attr_len":"1"},
|
|
||||||
{ "attr_name":"xcvr_txdisable", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x4a", "attr_mask":"0x3", "attr_cmpval":"0x8", "attr_len":"1"},
|
|
||||||
{ "attr_name":"xcvr_lpmode", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x4a", "attr_mask":"0x3", "attr_cmpval":"0x8", "attr_len":"1"},
|
|
||||||
{ "attr_name":"xcvr_present", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x49", "attr_mask":"0x3", "attr_cmpval":"0x8", "attr_len":"1"},
|
|
||||||
{ "attr_name":"xcvr_rxlos", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x48", "attr_mask":"0x3", "attr_cmpval":"0x8", "attr_len":"1"}
|
|
||||||
|
|
||||||
]
|
|
||||||
}
|
|
||||||
},
|
|
||||||
"PORT53":
|
|
||||||
{
|
|
||||||
"dev_info": { "device_type":"SFP28", "device_name":"PORT53", "device_parent":"MUX2"},
|
|
||||||
"dev_attr": { "dev_idx":"53"},
|
|
||||||
"i2c":
|
|
||||||
{
|
|
||||||
"interface":
|
|
||||||
[
|
|
||||||
{ "itf":"eeprom", "dev":"PORT53-EEPROM" },
|
|
||||||
{ "itf":"control", "dev":"PORT53-CTRL" }
|
|
||||||
]
|
|
||||||
}
|
|
||||||
},
|
|
||||||
"PORT53-EEPROM":
|
|
||||||
{
|
|
||||||
"dev_info": { "device_type":"", "device_name":"PORT53-EEPROM", "device_parent":"MUX2", "virt_parent":"PORT53"},
|
|
||||||
"i2c":
|
|
||||||
{
|
|
||||||
"topo_info": { "parent_bus":"0x14", "dev_addr":"0x50", "dev_type":"optoe2"},
|
|
||||||
"attr_list":
|
|
||||||
[
|
|
||||||
{ "attr_name":"eeprom"}
|
|
||||||
]
|
|
||||||
}
|
|
||||||
},
|
|
||||||
"PORT53-CTRL":
|
|
||||||
{
|
|
||||||
"dev_info": { "device_type":"", "device_name":"PORT53-CTRL", "device_parent":"MUX2", "virt_parent":"PORT53"},
|
|
||||||
"i2c":
|
|
||||||
{
|
|
||||||
"topo_info": { "parent_bus":"0x14", "dev_addr":"0x66", "dev_type":"pddf_xcvr"},
|
|
||||||
"attr_list":
|
|
||||||
[
|
|
||||||
{ "attr_name":"xcvr_txfault", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x47", "attr_mask":"0x4", "attr_cmpval":"0x10", "attr_len":"1"},
|
|
||||||
{ "attr_name":"xcvr_txdisable", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x4a", "attr_mask":"0x4", "attr_cmpval":"0x10", "attr_len":"1"},
|
|
||||||
{ "attr_name":"xcvr_lpmode", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x4a", "attr_mask":"0x4", "attr_cmpval":"0x10", "attr_len":"1"},
|
|
||||||
{ "attr_name":"xcvr_present", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x49", "attr_mask":"0x4", "attr_cmpval":"0x10", "attr_len":"1"},
|
|
||||||
{ "attr_name":"xcvr_rxlos", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x48", "attr_mask":"0x4", "attr_cmpval":"0x10", "attr_len":"1"}
|
|
||||||
|
|
||||||
]
|
|
||||||
}
|
|
||||||
},
|
|
||||||
"PORT54":
|
|
||||||
{
|
|
||||||
"dev_info": { "device_type":"SFP28", "device_name":"PORT54", "device_parent":"MUX2"},
|
|
||||||
"dev_attr": { "dev_idx":"54"},
|
|
||||||
"i2c":
|
|
||||||
{
|
|
||||||
"interface":
|
|
||||||
[
|
|
||||||
{ "itf":"eeprom", "dev":"PORT54-EEPROM" },
|
|
||||||
{ "itf":"control", "dev":"PORT54-CTRL" }
|
|
||||||
]
|
|
||||||
}
|
|
||||||
},
|
|
||||||
"PORT54-EEPROM":
|
|
||||||
{
|
|
||||||
"dev_info": { "device_type":"", "device_name":"PORT54-EEPROM", "device_parent":"MUX2", "virt_parent":"PORT54"},
|
|
||||||
"i2c":
|
|
||||||
{
|
|
||||||
"topo_info": { "parent_bus":"0x15", "dev_addr":"0x50", "dev_type":"optoe2"},
|
|
||||||
"attr_list":
|
|
||||||
[
|
|
||||||
{ "attr_name":"eeprom"}
|
|
||||||
]
|
|
||||||
}
|
|
||||||
},
|
|
||||||
"PORT54-CTRL":
|
|
||||||
{
|
|
||||||
"dev_info": { "device_type":"", "device_name":"PORT54-CTRL", "device_parent":"MUX2", "virt_parent":"PORT54"},
|
|
||||||
"i2c":
|
|
||||||
{
|
|
||||||
"topo_info": { "parent_bus":"0x15", "dev_addr":"0x66", "dev_type":"pddf_xcvr"},
|
|
||||||
"attr_list":
|
|
||||||
[
|
|
||||||
{ "attr_name":"xcvr_txfault", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x47", "attr_mask":"0x5", "attr_cmpval":"0x20", "attr_len":"1"},
|
|
||||||
{ "attr_name":"xcvr_txdisable", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x4a", "attr_mask":"0x5", "attr_cmpval":"0x20", "attr_len":"1"},
|
|
||||||
{ "attr_name":"xcvr_lpmode", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x4a", "attr_mask":"0x5", "attr_cmpval":"0x20", "attr_len":"1"},
|
|
||||||
{ "attr_name":"xcvr_present", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x49", "attr_mask":"0x5", "attr_cmpval":"0x20", "attr_len":"1"},
|
|
||||||
{ "attr_name":"xcvr_rxlos", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x48", "attr_mask":"0x5", "attr_cmpval":"0x20", "attr_len":"1"}
|
|
||||||
]
|
|
||||||
}
|
|
||||||
},
|
|
||||||
"PORT55":
|
|
||||||
{
|
|
||||||
"dev_info": { "device_type":"SFP28", "device_name":"PORT55", "device_parent":"MUX2"},
|
|
||||||
"dev_attr": { "dev_idx":"55"},
|
|
||||||
"i2c":
|
|
||||||
{
|
|
||||||
"interface":
|
|
||||||
[
|
|
||||||
{ "itf":"eeprom", "dev":"PORT55-EEPROM" },
|
|
||||||
{ "itf":"control", "dev":"PORT55-CTRL" }
|
|
||||||
]
|
|
||||||
}
|
|
||||||
},
|
|
||||||
"PORT55-EEPROM":
|
|
||||||
{
|
|
||||||
"dev_info": { "device_type":"", "device_name":"PORT55-EEPROM", "device_parent":"MUX2", "virt_parent":"PORT55"},
|
|
||||||
"i2c":
|
|
||||||
{
|
|
||||||
"topo_info": { "parent_bus":"0x16", "dev_addr":"0x50", "dev_type":"optoe2"},
|
|
||||||
"attr_list":
|
|
||||||
[
|
|
||||||
{ "attr_name":"eeprom"}
|
|
||||||
]
|
|
||||||
}
|
|
||||||
},
|
|
||||||
"PORT55-CTRL":
|
|
||||||
{
|
|
||||||
"dev_info": { "device_type":"", "device_name":"PORT55-CTRL", "device_parent":"MUX2", "virt_parent":"PORT55"},
|
|
||||||
"i2c":
|
|
||||||
{
|
|
||||||
"topo_info": { "parent_bus":"0x16", "dev_addr":"0x66", "dev_type":"pddf_xcvr"},
|
|
||||||
"attr_list":
|
|
||||||
[
|
|
||||||
{ "attr_name":"xcvr_txfault", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x47", "attr_mask":"0x6", "attr_cmpval":"0x40", "attr_len":"1"},
|
|
||||||
{ "attr_name":"xcvr_txdisable", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x4a", "attr_mask":"0x6", "attr_cmpval":"0x40", "attr_len":"1"},
|
|
||||||
{ "attr_name":"xcvr_lpmode", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x4a", "attr_mask":"0x6", "attr_cmpval":"0x40", "attr_len":"1"},
|
|
||||||
{ "attr_name":"xcvr_present", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x49", "attr_mask":"0x6", "attr_cmpval":"0x40", "attr_len":"1"},
|
|
||||||
{ "attr_name":"xcvr_rxlos", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x48", "attr_mask":"0x6", "attr_cmpval":"0x40", "attr_len":"1"}
|
|
||||||
]
|
|
||||||
}
|
|
||||||
},
|
|
||||||
"PORT56":
|
|
||||||
{
|
|
||||||
"dev_info": { "device_type":"SFP28", "device_name":"PORT56", "device_parent":"MUX2"},
|
|
||||||
"dev_attr": { "dev_idx":"56"},
|
|
||||||
"i2c":
|
|
||||||
{
|
|
||||||
"interface":
|
|
||||||
[
|
|
||||||
{ "itf":"eeprom", "dev":"PORT56-EEPROM" },
|
|
||||||
{ "itf":"control", "dev":"PORT56-CTRL" }
|
|
||||||
]
|
|
||||||
}
|
|
||||||
},
|
|
||||||
"PORT56-EEPROM":
|
|
||||||
{
|
|
||||||
"dev_info": { "device_type":"", "device_name":"PORT56-EEPROM", "device_parent":"MUX2", "virt_parent":"PORT56"},
|
|
||||||
"i2c":
|
|
||||||
{
|
|
||||||
"topo_info": { "parent_bus":"0x17", "dev_addr":"0x50", "dev_type":"optoe2"},
|
|
||||||
"attr_list":
|
|
||||||
[
|
|
||||||
{ "attr_name":"eeprom"}
|
|
||||||
]
|
|
||||||
}
|
|
||||||
},
|
|
||||||
"PORT56-CTRL":
|
|
||||||
{
|
|
||||||
"dev_info": { "device_type":"", "device_name":"PORT56-CTRL", "device_parent":"MUX2", "virt_parent":"PORT56"},
|
|
||||||
"i2c":
|
|
||||||
{
|
|
||||||
"topo_info": { "parent_bus":"0x17", "dev_addr":"0x66", "dev_type":"pddf_xcvr"},
|
|
||||||
"attr_list":
|
|
||||||
[
|
|
||||||
{ "attr_name":"xcvr_txfault", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x47", "attr_mask":"0x7", "attr_cmpval":"0x80", "attr_len":"1"},
|
|
||||||
{ "attr_name":"xcvr_txdisable", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x4a", "attr_mask":"0x7", "attr_cmpval":"0x80", "attr_len":"1"},
|
|
||||||
{ "attr_name":"xcvr_lpmode", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x4a", "attr_mask":"0x7", "attr_cmpval":"0x80", "attr_len":"1"},
|
|
||||||
{ "attr_name":"xcvr_present", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x49", "attr_mask":"0x7", "attr_cmpval":"0x80", "attr_len":"1"},
|
|
||||||
{ "attr_name":"xcvr_rxlos", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x48", "attr_mask":"0x7", "attr_cmpval":"0x80", "attr_len":"1"}
|
|
||||||
]
|
|
||||||
}
|
|
||||||
},
|
|
||||||
"FAN-CTRL1":
|
|
||||||
{
|
|
||||||
"dev_info": { "device_type":"FAN", "device_name":"FAN-CTRL1", "device_parent":"MUX1"},
|
|
||||||
"i2c":
|
|
||||||
{
|
|
||||||
"topo_info": { "parent_bus":"0x2", "dev_addr":"0x66", "dev_type":"fan_cpld"},
|
|
||||||
"dev_attr": { "num_fantrays":"3"},
|
|
||||||
"attr_list":
|
|
||||||
[
|
|
||||||
{ "attr_name":"fan1_pwm", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x32", "attr_mask":"0xff", "attr_cmpval":"0x0", "attr_len":"1"},
|
|
||||||
{ "attr_name":"fan2_pwm", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x36", "attr_mask":"0xff", "attr_cmpval":"0x0", "attr_len":"1"},
|
|
||||||
{ "attr_name":"fan3_pwm", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x3a", "attr_mask":"0xff", "attr_cmpval":"0x0", "attr_len":"1"},
|
|
||||||
{ "attr_name":"fan1_direction", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x88", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"},
|
|
||||||
{ "attr_name":"fan2_direction", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x88", "attr_mask":"0x2", "attr_cmpval":"0x0", "attr_len":"1"},
|
|
||||||
{ "attr_name":"fan3_direction", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x88", "attr_mask":"0x1", "attr_cmpval":"0x0", "attr_len":"1"},
|
|
||||||
{ "attr_name":"fan1_input", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x31", "attr_mask":"0xff", "attr_len":"1", "attr_mult":"150", "attr_is_divisor":0},
|
|
||||||
{ "attr_name":"fan2_input", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x35", "attr_mask":"0xff", "attr_len":"1", "attr_mult":"150" , "attr_is_divisor":0},
|
|
||||||
{ "attr_name":"fan3_input", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x39", "attr_mask":"0xff", "attr_len":"1", "attr_mult":"150", "attr_is_divisor":0}
|
|
||||||
]
|
|
||||||
}
|
|
||||||
},
|
|
||||||
"SYS_LED":
|
|
||||||
{
|
|
||||||
"dev_info": { "device_type":"LED", "device_name":"SYS_LED"},
|
|
||||||
"dev_attr": { "index":"0", "flag": "rw"},
|
|
||||||
"i2c" : {
|
|
||||||
"attr_list":
|
|
||||||
[
|
|
||||||
{"attr_name":"amber","swpld_addr":"0x32","attr_devtype":"cpld","attr_devname":"CPLD1", "bits":"5:4","descr":"","value":"0x1","swpld_addr_offset":"0x43"},
|
|
||||||
{"attr_name":"green","swpld_addr":"0x32","attr_devtype":"cpld","attr_devname":"CPLD1", "bits":"5:4","descr":"","value":"0x2","swpld_addr_offset":"0x43"},
|
|
||||||
{"attr_name":"off","swpld_addr":"0x32","attr_devtype":"cpld","attr_devname":"CPLD1", "bits":"5:4","descr":"","value":"0x0","swpld_addr_offset":"0x43"}
|
|
||||||
]
|
|
||||||
}
|
|
||||||
},
|
|
||||||
"FANTRAY1_LED":
|
|
||||||
{
|
|
||||||
"dev_info": { "device_type":"LED", "device_name":"FANTRAY_LED"},
|
|
||||||
"dev_attr": { "index":"0", "flag": "rw"},
|
|
||||||
"i2c" : {
|
|
||||||
"attr_list":
|
|
||||||
[
|
|
||||||
{"attr_name":"green","attr_devtype":"cpld","attr_devname":"CPLD1","bits":"1:0","descr":"","value":"0x1","swpld_addr":"0x32","swpld_addr_offset":"0x33"},
|
|
||||||
{"attr_name":"red","attr_devtype":"cpld","attr_devname":"CPLD1","bits":"1:0","descr":"","value":"0x2","swpld_addr":"0x32","swpld_addr_offset":"0x33"}
|
|
||||||
]
|
|
||||||
}
|
|
||||||
},
|
|
||||||
"FANTRAY2_LED":
|
|
||||||
{
|
|
||||||
"dev_info": { "device_type":"LED", "device_name":"FANTRAY_LED"},
|
|
||||||
"dev_attr": { "index":"1", "flag": "rw"},
|
|
||||||
"i2c" : {
|
|
||||||
"attr_list":
|
|
||||||
[
|
|
||||||
{"attr_name":"green","attr_devtype":"cpld","attr_devname":"CPLD1","bits":"1:0","descr":"","value":"0x1","swpld_addr":"0x32","swpld_addr_offset":"0x37"},
|
|
||||||
{"attr_name":"red","attr_devtype":"cpld","attr_devname":"CPLD1B","bits":"1:0","descr":"","value":"0x2","swpld_addr":"0x32","swpld_addr_offset":"0x37"}
|
|
||||||
]
|
|
||||||
}
|
|
||||||
},
|
|
||||||
"FANTRAY3_LED":
|
|
||||||
{
|
|
||||||
"dev_info": { "device_type":"LED", "device_name":"FANTRAY_LED"},
|
|
||||||
"dev_attr": { "index":"2", "flag": "rw"},
|
|
||||||
"i2c" : {
|
|
||||||
"attr_list":
|
|
||||||
[
|
|
||||||
{"attr_name":"green","attr_devtype":"cpld","attr_devname":"CPLD1","bits":"1:0","descr":"","value":"0x1","swpld_addr":"0x32","swpld_addr_offset":"0x3b"},
|
|
||||||
{"attr_name":"red","attr_devtype":"cpld","attr_devname":"CPLD1","bits":"1:0","descr":"","value":"0x2","swpld_addr":"0x32","swpld_addr_offset":"0x3b"}
|
|
||||||
]
|
|
||||||
}
|
|
||||||
}
|
|
||||||
}
|
|
@ -1,10 +0,0 @@
|
|||||||
{
|
|
||||||
"chassis": {
|
|
||||||
"E1070": {
|
|
||||||
"component": {
|
|
||||||
"SWCPLD": {},
|
|
||||||
"BIOS": {}
|
|
||||||
}
|
|
||||||
}
|
|
||||||
}
|
|
||||||
}
|
|
57
device/celestica/x86_64-cel_ds1000-r0/DS1000/port_config.ini
Normal file
57
device/celestica/x86_64-cel_ds1000-r0/DS1000/port_config.ini
Normal file
@ -0,0 +1,57 @@
|
|||||||
|
# name lanes alias index speed autoneg
|
||||||
|
Ethernet0 26 Eth1/1 1 1000 1
|
||||||
|
Ethernet1 25 Eth2/1 2 1000 1
|
||||||
|
Ethernet2 28 Eth3/1 3 1000 1
|
||||||
|
Ethernet3 27 Eth4/1 4 1000 1
|
||||||
|
Ethernet4 30 Eth5/1 5 1000 1
|
||||||
|
Ethernet5 29 Eth6/1 6 1000 1
|
||||||
|
Ethernet6 32 Eth7/1 7 1000 1
|
||||||
|
Ethernet7 31 Eth8/1 8 1000 1
|
||||||
|
Ethernet8 34 Eth9/1 9 1000 1
|
||||||
|
Ethernet9 33 Eth10/1 10 1000 1
|
||||||
|
Ethernet10 36 Eth11/1 11 1000 1
|
||||||
|
Ethernet11 35 Eth12/1 12 1000 1
|
||||||
|
Ethernet12 38 Eth13/1 13 1000 1
|
||||||
|
Ethernet13 37 Eth14/1 14 1000 1
|
||||||
|
Ethernet14 40 Eth15/1 15 1000 1
|
||||||
|
Ethernet15 39 Eth16/1 16 1000 1
|
||||||
|
Ethernet16 42 Eth17/1 17 1000 1
|
||||||
|
Ethernet17 41 Eth18/1 18 1000 1
|
||||||
|
Ethernet18 44 Eth19/1 19 1000 1
|
||||||
|
Ethernet19 43 Eth20/1 20 1000 1
|
||||||
|
Ethernet20 50 Eth21/1 21 1000 1
|
||||||
|
Ethernet21 49 Eth22/1 22 1000 1
|
||||||
|
Ethernet22 52 Eth23/1 23 1000 1
|
||||||
|
Ethernet23 51 Eth24/1 24 1000 1
|
||||||
|
Ethernet24 2 Eth25/1 25 1000 1
|
||||||
|
Ethernet25 1 Eth26/1 26 1000 1
|
||||||
|
Ethernet26 4 Eth27/1 27 1000 1
|
||||||
|
Ethernet27 3 Eth28/1 28 1000 1
|
||||||
|
Ethernet28 6 Eth29/1 29 1000 1
|
||||||
|
Ethernet29 5 Eth30/1 30 1000 1
|
||||||
|
Ethernet30 8 Eth31/1 31 1000 1
|
||||||
|
Ethernet31 7 Eth32/1 32 1000 1
|
||||||
|
Ethernet32 10 Eth33/1 33 1000 1
|
||||||
|
Ethernet33 9 Eth34/1 34 1000 1
|
||||||
|
Ethernet34 12 Eth35/1 35 1000 1
|
||||||
|
Ethernet35 11 Eth36/1 36 1000 1
|
||||||
|
Ethernet36 14 Eth37/1 37 1000 1
|
||||||
|
Ethernet37 13 Eth38/1 38 1000 1
|
||||||
|
Ethernet38 16 Eth39/1 39 1000 1
|
||||||
|
Ethernet39 15 Eth40/1 40 1000 1
|
||||||
|
Ethernet40 18 Eth41/1 41 1000 1
|
||||||
|
Ethernet41 17 Eth42/1 42 1000 1
|
||||||
|
Ethernet42 20 Eth43/1 43 1000 1
|
||||||
|
Ethernet43 19 Eth44/1 44 1000 1
|
||||||
|
Ethernet44 22 Eth45/1 45 1000 1
|
||||||
|
Ethernet45 21 Eth46/1 46 1000 1
|
||||||
|
Ethernet46 24 Eth47/1 47 1000 1
|
||||||
|
Ethernet47 23 Eth48/1 48 1000 1
|
||||||
|
Ethernet48 60 Eth49/1 49 10000 0
|
||||||
|
Ethernet49 58 Eth50/1 50 10000 0
|
||||||
|
Ethernet50 59 Eth51/1 51 10000 0
|
||||||
|
Ethernet51 57 Eth52/1 52 10000 0
|
||||||
|
Ethernet52 62 Eth53/1 53 10000 0
|
||||||
|
Ethernet53 64 Eth54/1 54 10000 0
|
||||||
|
Ethernet54 61 Eth55/1 55 10000 0
|
||||||
|
Ethernet55 63 Eth56/1 56 10000 0
|
1
device/celestica/x86_64-cel_ds1000-r0/DS1000/sai.profile
Normal file
1
device/celestica/x86_64-cel_ds1000-r0/DS1000/sai.profile
Normal file
@ -0,0 +1 @@
|
|||||||
|
SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/ds1000.config.bcm
|
BIN
device/celestica/x86_64-cel_ds1000-r0/custom_led.bin
Executable file
BIN
device/celestica/x86_64-cel_ds1000-r0/custom_led.bin
Executable file
Binary file not shown.
1
device/celestica/x86_64-cel_ds1000-r0/default_sku
Normal file
1
device/celestica/x86_64-cel_ds1000-r0/default_sku
Normal file
@ -0,0 +1 @@
|
|||||||
|
DS1000 t1
|
@ -1,4 +1,4 @@
|
|||||||
CONSOLE_PORT=0x3f8
|
CONSOLE_PORT=0xe060
|
||||||
CONSOLE_DEV=0
|
CONSOLE_DEV=0
|
||||||
CONSOLE_SPEED=9600
|
CONSOLE_SPEED=115200
|
||||||
ONIE_PLATFORM_EXTRA_CMDLINE_LINUX="intel_iommu=off modprobe.blacklist=gpio_ich,i2c-ismt,i2c_ismt,i2c-i801,i2c_i801 crashkernel=0M-2G:256M,2G-4G:320M,4G-8G:384M,8G-:448M acpi_no_watchdog"
|
ONIE_PLATFORM_EXTRA_CMDLINE_LINUX="intel_iommu=off modprobe.blacklist=gpio_ich,i2c-ismt,i2c_ismt,i2c-i801,i2c_i801 crashkernel=0M-2G:256M,2G-4G:320M,4G-8G:384M,8G-:448M acpi_no_watchdog"
|
@ -89,14 +89,25 @@ Here is an exception, please keep in mind:
|
|||||||
#include <shared/cmicfw/cmicx_led_public.h>
|
#include <shared/cmicfw/cmicx_led_public.h>
|
||||||
|
|
||||||
#define ACTIVITY_TICKS 2
|
#define ACTIVITY_TICKS 2
|
||||||
#define READ_LED_ACCU_DATA(base, port) (*((uint16 *)(base + ((port - 1) * sizeof(uint32)))))
|
|
||||||
#define WRITE_LED_SEND_DATA(base, port, val) (*((uint16 *)(base + ((port - 1) * sizeof(uint32)))) = val)
|
/*! Macro to calculate LED RAM address. */
|
||||||
|
#define LED_HW_RAM_ADDR(base, port) \
|
||||||
|
(base + (port * sizeof(uint32)))
|
||||||
|
|
||||||
|
/*! Macro to read LED RAM. */
|
||||||
|
#define LED_HW_RAM_READ16(base, port) \
|
||||||
|
*((uint16 *) LED_HW_RAM_ADDR(base, port))
|
||||||
|
|
||||||
|
/*! Macro to write LED RAM. */
|
||||||
|
#define LED_HW_RAM_WRITE16(base, port, val) \
|
||||||
|
*((uint16 *) LED_HW_RAM_ADDR(base, port)) = (val)
|
||||||
|
|
||||||
#define PORT_NUM_TOTAL 56
|
#define PORT_NUM_TOTAL 56
|
||||||
|
|
||||||
#define LED_GREEN_BICOLOR 0x2 //bit : 10
|
#define LED_GREEN_BICOLOR 0x2 //bit : 10
|
||||||
#define LED_AMBER_BICOLOR 0x1 //bit : 01
|
#define LED_AMBER_BICOLOR 0x1 //bit : 01
|
||||||
#define LED_OFF_BICOLOR 0x3 //bit : 11
|
#define LED_OFF_BICOLOR 0x3 //bit : 11
|
||||||
|
#define LED_SW_LINK_UP 0x1
|
||||||
|
|
||||||
unsigned short portmap[] = {
|
unsigned short portmap[] = {
|
||||||
25, 26, 27, 28, 29, 30, 31, 32,
|
25, 26, 27, 28, 29, 30, 31, 32,
|
||||||
@ -123,24 +134,26 @@ unsigned short portmap[] = {
|
|||||||
void custom_led_handler(soc_led_custom_handler_ctrl_t *ctrl,
|
void custom_led_handler(soc_led_custom_handler_ctrl_t *ctrl,
|
||||||
uint32 activity_count)
|
uint32 activity_count)
|
||||||
{
|
{
|
||||||
unsigned short accu_val = 0, send_val = 0;
|
uint8 idx = 0;
|
||||||
unsigned short port, physical_port;
|
uint16 accu_val = 0, send_val = 0;
|
||||||
|
uint16 uc_port = 0, physical_port = 0;
|
||||||
|
|
||||||
/* Physical port numbers to be used */
|
/* Physical port numbers to be used */
|
||||||
for(port = 1; port <= PORT_NUM_TOTAL; port++) {
|
for(uc_port = 0; uc_port < PORT_NUM_TOTAL; uc_port++) {
|
||||||
|
|
||||||
physical_port = portmap[port-1];
|
// change to zero-based
|
||||||
|
physical_port = portmap[uc_port] - 1;
|
||||||
|
|
||||||
/* Read value from led_ram bank0 */
|
/* Read value from led_ram bank0 */
|
||||||
accu_val = READ_LED_ACCU_DATA(ctrl->accu_ram_base, physical_port);
|
accu_val = LED_HW_RAM_READ16(ctrl->accu_ram_base, physical_port);
|
||||||
|
|
||||||
send_val = 0xff;
|
send_val = LED_OFF_BICOLOR;
|
||||||
|
|
||||||
if (((accu_val & LED_OUTPUT_RX) || (accu_val & LED_OUTPUT_TX)) && (activity_count & ACTIVITY_TICKS))
|
if (((accu_val & LED_HW_RX) || (accu_val & LED_HW_TX)) && (activity_count & ACTIVITY_TICKS))
|
||||||
{
|
{
|
||||||
send_val = LED_OFF_BICOLOR;
|
send_val = LED_OFF_BICOLOR;
|
||||||
}
|
}
|
||||||
else if ( accu_val & LED_OUTPUT_LINK_UP)
|
else if (ctrl->led_control_data[physical_port] & LED_SW_LINK_UP)
|
||||||
{
|
{
|
||||||
send_val = LED_GREEN_BICOLOR;
|
send_val = LED_GREEN_BICOLOR;
|
||||||
}
|
}
|
||||||
@ -150,20 +163,29 @@ void custom_led_handler(soc_led_custom_handler_ctrl_t *ctrl,
|
|||||||
}
|
}
|
||||||
|
|
||||||
/* Write value to led_ram bank1 */
|
/* Write value to led_ram bank1 */
|
||||||
WRITE_LED_SEND_DATA(ctrl->pat_ram_base, port, send_val);
|
LED_HW_RAM_WRITE16(ctrl->pat_ram_base, uc_port, send_val);
|
||||||
} /* for */
|
} /* for */
|
||||||
|
|
||||||
/* Send the pattern over LED interface 1 for ports 1 - 56*/
|
/* Configure LED HW interfaces based on board configuration */
|
||||||
ctrl->intf_ctrl[1].valid = 1;
|
for (idx = 0; idx < LED_HW_INTF_MAX_NUM; idx++) {
|
||||||
ctrl->intf_ctrl[1].start_row = 0;
|
soc_led_intf_ctrl_t *lic = &ctrl->intf_ctrl[idx];
|
||||||
ctrl->intf_ctrl[1].end_row = 55;
|
switch (idx) {
|
||||||
ctrl->intf_ctrl[1].pat_width = 2;
|
case 0:
|
||||||
|
lic->valid = 0;
|
||||||
|
break;
|
||||||
|
case 1:
|
||||||
|
lic->valid = 1;
|
||||||
|
lic->start_row = 0;
|
||||||
|
lic->end_row = 55;
|
||||||
|
lic->pat_width = 2;
|
||||||
|
break;
|
||||||
|
default:
|
||||||
|
|
||||||
/* Invalidate rest of the interfaces */
|
/* Invalidate rest of the interfaces */
|
||||||
ctrl->intf_ctrl[0].valid = 0;
|
lic->valid = 0;
|
||||||
ctrl->intf_ctrl[2].valid = 0;
|
break;
|
||||||
ctrl->intf_ctrl[3].valid = 0;
|
}
|
||||||
ctrl->intf_ctrl[4].valid = 0;
|
}
|
||||||
|
|
||||||
return;
|
return;
|
||||||
|
|
@ -1,121 +1,143 @@
|
|||||||
- bus: '00'
|
- bus: '00'
|
||||||
dev: '00'
|
dev: '00'
|
||||||
fn: '0'
|
fn: '0'
|
||||||
id: 1980
|
id: '1980'
|
||||||
name: 'Host bridge: Intel Corporation Atom Processor C3000 Series System Agent'
|
name: 'Host bridge: Intel Corporation Atom Processor C3000 Series System Agent (rev
|
||||||
|
11)'
|
||||||
- bus: '00'
|
- bus: '00'
|
||||||
dev: '04'
|
dev: '04'
|
||||||
fn: '0'
|
fn: '0'
|
||||||
id: 19a1
|
id: 19a1
|
||||||
name: 'Host bridge: Intel Corporation Atom Processor C3000 Series Error Registers'
|
name: 'Host bridge: Intel Corporation Atom Processor C3000 Series Error Registers
|
||||||
|
(rev 11)'
|
||||||
- bus: '00'
|
- bus: '00'
|
||||||
dev: '05'
|
dev: '05'
|
||||||
fn: '0'
|
fn: '0'
|
||||||
id: 19a2
|
id: 19a2
|
||||||
name: 'Generic system peripheral [0807]: Intel Corporation Atom Processor C3000 Series Root Complex Event Collector'
|
name: 'Generic system peripheral [0807]: Intel Corporation Atom Processor C3000
|
||||||
|
Series Root Complex Event Collector (rev 11)'
|
||||||
- bus: '00'
|
- bus: '00'
|
||||||
dev: '06'
|
dev: '06'
|
||||||
fn: '0'
|
fn: '0'
|
||||||
id: 19e2
|
id: 19a3
|
||||||
name: 'PCI bridge: Intel Corporation Atom Processor C3000 Series Integrated QAT Root Port'
|
name: 'PCI bridge: Intel Corporation Atom Processor C3000 Series Integrated QAT
|
||||||
|
Root Port (rev 11)'
|
||||||
- bus: '00'
|
- bus: '00'
|
||||||
dev: '09'
|
dev: 09
|
||||||
fn: '0'
|
fn: '0'
|
||||||
id: b277
|
id: 19a4
|
||||||
name: 'PCI bridge: Intel Corporation Atom Processor C3000 Series PCI Express Root Port'
|
name: 'PCI bridge: Intel Corporation Atom Processor C3000 Series PCI Express Root
|
||||||
|
Port #0 (rev 11)'
|
||||||
- bus: '00'
|
- bus: '00'
|
||||||
dev: '0b'
|
dev: 0b
|
||||||
fn: '0'
|
fn: '0'
|
||||||
id: 1533
|
id: 19a6
|
||||||
name: 'PCI bridge: Intel Corporation Atom Processor C3000 Series PCI Express Root Port'
|
name: 'PCI bridge: Intel Corporation Atom Processor C3000 Series PCI Express Root
|
||||||
|
Port #2 (rev 11)'
|
||||||
- bus: '00'
|
- bus: '00'
|
||||||
dev: '0e'
|
dev: 0e
|
||||||
fn: '0'
|
fn: '0'
|
||||||
id: 19a8
|
id: 19a8
|
||||||
name: 'PCI bridge: Intel Corporation Atom Processor C3000 Series PCI Express Root Port'
|
name: 'PCI bridge: Intel Corporation Atom Processor C3000 Series PCI Express Root
|
||||||
|
Port #4 (rev 11)'
|
||||||
- bus: '00'
|
- bus: '00'
|
||||||
dev: '12'
|
dev: '12'
|
||||||
fn: '0'
|
fn: '0'
|
||||||
id: 19ac
|
id: 19ac
|
||||||
name: 'System peripheral: Intel Corporation DNV SMBus Contoller - Host'
|
name: 'System peripheral: Intel Corporation Atom Processor C3000 Series SMBus Contoller
|
||||||
|
- Host (rev 11)'
|
||||||
- bus: '00'
|
- bus: '00'
|
||||||
dev: '14'
|
dev: '14'
|
||||||
fn: '0'
|
fn: '0'
|
||||||
id: 19c2
|
id: 19c2
|
||||||
name: 'SATA controller: Intel Corporation DNV SATA Controller 1'
|
name: 'SATA controller: Intel Corporation Atom Processor C3000 Series SATA Controller
|
||||||
|
1 (rev 11)'
|
||||||
- bus: '00'
|
- bus: '00'
|
||||||
dev: '15'
|
dev: '15'
|
||||||
fn: '0'
|
fn: '0'
|
||||||
id: 19d0
|
id: 19d0
|
||||||
name: 'USB controller: Intel Corporation Atom Processor C3000 Series USB 3.0 xHCI Controller'
|
name: 'USB controller: Intel Corporation Atom Processor C3000 Series USB 3.0 xHCI
|
||||||
|
Controller (rev 11)'
|
||||||
- bus: '00'
|
- bus: '00'
|
||||||
dev: '16'
|
dev: '16'
|
||||||
fn: '0'
|
fn: '0'
|
||||||
id: 15ce
|
id: 19d1
|
||||||
name: 'PCI bridge: Intel Corporation Atom Processor C3000 Series Integrated LAN Root Port'
|
name: 'PCI bridge: Intel Corporation Atom Processor C3000 Series Integrated LAN
|
||||||
|
Root Port #0 (rev 11)'
|
||||||
- bus: '00'
|
- bus: '00'
|
||||||
dev: '18'
|
dev: '18'
|
||||||
fn: '0'
|
fn: '0'
|
||||||
id: 19d3
|
id: 19d3
|
||||||
name: 'Communication controller: Intel Corporation Atom Processor C3000 Series ME HECI 1'
|
name: 'Communication controller: Intel Corporation Atom Processor C3000 Series ME
|
||||||
|
HECI 1 (rev 11)'
|
||||||
- bus: '00'
|
- bus: '00'
|
||||||
dev: '1a'
|
dev: 1a
|
||||||
fn: '0'
|
fn: '0'
|
||||||
id: 19d8
|
id: 19d8
|
||||||
name: 'Serial controller: Intel Corporation Atom Processor C3000 Series HSUART Controller'
|
name: 'Serial controller: Intel Corporation Atom Processor C3000 Series HSUART Controller
|
||||||
|
(rev 11)'
|
||||||
- bus: '00'
|
- bus: '00'
|
||||||
dev: '1a'
|
dev: 1a
|
||||||
fn: '1'
|
fn: '1'
|
||||||
id: 19d8
|
id: 19d8
|
||||||
name: 'Serial controller: Intel Corporation Atom Processor C3000 Series HSUART Controller'
|
name: 'Serial controller: Intel Corporation Atom Processor C3000 Series HSUART Controller
|
||||||
|
(rev 11)'
|
||||||
- bus: '00'
|
- bus: '00'
|
||||||
dev: '1a'
|
dev: 1a
|
||||||
fn: '2'
|
fn: '2'
|
||||||
id: 19d8
|
id: 19d8
|
||||||
name: 'Serial controller: Intel Corporation Atom Processor C3000 Series HSUART Controller'
|
name: 'Serial controller: Intel Corporation Atom Processor C3000 Series HSUART Controller
|
||||||
|
(rev 11)'
|
||||||
- bus: '00'
|
- bus: '00'
|
||||||
dev: '1f'
|
dev: 1f
|
||||||
fn: '0'
|
fn: '0'
|
||||||
id: 19dc
|
id: 19dc
|
||||||
name: 'ISA bridge: Intel Corporation DNV LPC or eSPI'
|
name: 'ISA bridge: Intel Corporation Atom Processor C3000 Series LPC or eSPI (rev
|
||||||
|
11)'
|
||||||
- bus: '00'
|
- bus: '00'
|
||||||
dev: '1f'
|
dev: 1f
|
||||||
fn: '2'
|
fn: '2'
|
||||||
id: 19de
|
id: 19de
|
||||||
name: 'Memory controller: Intel Corporation Atom Processor C3000 Series Power Management Controller'
|
name: 'Memory controller: Intel Corporation Atom Processor C3000 Series Power Management
|
||||||
|
Controller (rev 11)'
|
||||||
- bus: '00'
|
- bus: '00'
|
||||||
dev: '1f'
|
dev: 1f
|
||||||
fn: '4'
|
fn: '4'
|
||||||
id: 19df
|
id: 19df
|
||||||
name: 'SMBus: Intel Corporation DNV SMBus controller'
|
name: 'SMBus: Intel Corporation Atom Processor C3000 Series SMBus controller (rev
|
||||||
|
11)'
|
||||||
- bus: '00'
|
- bus: '00'
|
||||||
dev: '1f'
|
dev: 1f
|
||||||
fn: '5'
|
fn: '5'
|
||||||
id: 19e0
|
id: 19e0
|
||||||
name: 'Serial bus controller [0c80]: Intel Corporation DNV SPI Controller'
|
name: 'Serial bus controller [0c80]: Intel Corporation Atom Processor C3000 Series
|
||||||
|
SPI Controller (rev 11)'
|
||||||
- bus: '01'
|
- bus: '01'
|
||||||
dev: '00'
|
dev: '00'
|
||||||
fn: '0'
|
fn: '0'
|
||||||
id: 19e2
|
id: 19e2
|
||||||
name: 'Co-processor: Intel Corporation Atom Processor C3000 Series QuickAssist Technology'
|
name: 'Co-processor: Intel Corporation Atom Processor C3000 Series QuickAssist Technology
|
||||||
|
(rev 11)'
|
||||||
- bus: '02'
|
- bus: '02'
|
||||||
dev: '00'
|
dev: '00'
|
||||||
fn: '0'
|
fn: '0'
|
||||||
id: b277
|
id: b277
|
||||||
name: 'Ethernet controller: Broadcom Limited Device b277'
|
name: 'Ethernet controller: Broadcom Inc. and subsidiaries Device b277 (rev 02)'
|
||||||
- bus: '03'
|
- bus: '03'
|
||||||
dev: '00'
|
dev: '00'
|
||||||
fn: '0'
|
fn: '0'
|
||||||
id: 1533
|
id: '1533'
|
||||||
name: 'Ethernet controller: Intel Corporation I210 Gigabit Network Connection'
|
name: 'Ethernet controller: Intel Corporation I210 Gigabit Network Connection (rev
|
||||||
|
03)'
|
||||||
- bus: '05'
|
- bus: '05'
|
||||||
dev: '00'
|
dev: '00'
|
||||||
fn: '0'
|
fn: '0'
|
||||||
id: 15ce
|
id: 15c2
|
||||||
name: 'Ethernet controller: Intel Corporation Ethernet Connection X553 10 GbE SFP+'
|
name: 'Ethernet controller: Intel Corporation Ethernet Connection X553 Backplane
|
||||||
|
(rev 11)'
|
||||||
- bus: '05'
|
- bus: '05'
|
||||||
dev: '00'
|
dev: '00'
|
||||||
fn: '1'
|
fn: '1'
|
||||||
id: 15ce
|
id: 15c2
|
||||||
name: 'Ethernet controller: Intel Corporation Ethernet Connection X553 10 GbE SFP+'
|
name: 'Ethernet controller: Intel Corporation Ethernet Connection X553 Backplane
|
||||||
|
(rev 11)'
|
@ -29,7 +29,7 @@
|
|||||||
{
|
{
|
||||||
"i2c":
|
"i2c":
|
||||||
{
|
{
|
||||||
"valmap": { "0":"INTAKE", "1":"EXHAUST" }
|
"valmap": { "0":"intake", "1":"exhaust" }
|
||||||
}
|
}
|
||||||
},
|
},
|
||||||
"PSU_FAN_MAX_SPEED":"18000"
|
"PSU_FAN_MAX_SPEED":"18000"
|
||||||
@ -40,7 +40,7 @@
|
|||||||
{
|
{
|
||||||
"i2c":
|
"i2c":
|
||||||
{
|
{
|
||||||
"valmap": {"1":"EXHAUST", "0":"INTAKE"}
|
"valmap": {"1":"exhaust", "0":"intake"}
|
||||||
}
|
}
|
||||||
},
|
},
|
||||||
"present":
|
"present":
|
@ -8,7 +8,7 @@
|
|||||||
"num_temps":4,
|
"num_temps":4,
|
||||||
"pddf_dev_types":
|
"pddf_dev_types":
|
||||||
{
|
{
|
||||||
"description":"Belgite - Below is the list of supported PDDF device types (chip names) for various components. If any component uses some other driver, we will create the client using 'echo <dev-address> <dev-type> > <path>/new_device' method",
|
"description":"DS1000 - Below is the list of supported PDDF device types (chip names) for various components. If any component uses some other driver, we will create the client using 'echo <dev-address> <dev-type> > <path>/new_device' method",
|
||||||
"CPLD":
|
"CPLD":
|
||||||
[
|
[
|
||||||
"i2c_cpld"
|
"i2c_cpld"
|
||||||
@ -224,13 +224,13 @@
|
|||||||
"TEMP1":
|
"TEMP1":
|
||||||
{
|
{
|
||||||
"dev_info": { "device_type":"TEMP_SENSOR", "device_name":"TEMP1", "device_parent":"MUX1"},
|
"dev_info": { "device_type":"TEMP_SENSOR", "device_name":"TEMP1", "device_parent":"MUX1"},
|
||||||
"dev_attr": { "display_name":"LM75_U10"},
|
"dev_attr": { "display_name":"Front Left Temp"},
|
||||||
"i2c":
|
"i2c":
|
||||||
{
|
{
|
||||||
"topo_info": { "parent_bus":"0x5", "dev_addr":"0x48", "dev_type":"lm75"},
|
"topo_info": { "parent_bus":"0x5", "dev_addr":"0x48", "dev_type":"lm75"},
|
||||||
"attr_list":
|
"attr_list":
|
||||||
[
|
[
|
||||||
{ "attr_name": "temp1_high_threshold", "drv_attr_name":"temp1_max"},
|
{ "attr_name": "temp1_max"},
|
||||||
{ "attr_name": "temp1_max_hyst"},
|
{ "attr_name": "temp1_max_hyst"},
|
||||||
{ "attr_name": "temp1_input"}
|
{ "attr_name": "temp1_input"}
|
||||||
]
|
]
|
||||||
@ -239,13 +239,13 @@
|
|||||||
"TEMP2":
|
"TEMP2":
|
||||||
{
|
{
|
||||||
"dev_info": { "device_type":"TEMP_SENSOR", "device_name":"TEMP2", "device_parent":"MUX1"},
|
"dev_info": { "device_type":"TEMP_SENSOR", "device_name":"TEMP2", "device_parent":"MUX1"},
|
||||||
"dev_attr": { "display_name":"LM75_U4"},
|
"dev_attr": { "display_name":"Front Right Temp"},
|
||||||
"i2c":
|
"i2c":
|
||||||
{
|
{
|
||||||
"topo_info": { "parent_bus":"0x5", "dev_addr":"0x49", "dev_type":"lm75"},
|
"topo_info": { "parent_bus":"0x5", "dev_addr":"0x49", "dev_type":"lm75"},
|
||||||
"attr_list":
|
"attr_list":
|
||||||
[
|
[
|
||||||
{ "attr_name": "temp1_high_threshold", "drv_attr_name":"temp1_max"},
|
{ "attr_name": "temp1_max"},
|
||||||
{ "attr_name": "temp1_max_hyst"},
|
{ "attr_name": "temp1_max_hyst"},
|
||||||
{ "attr_name": "temp1_input"}
|
{ "attr_name": "temp1_input"}
|
||||||
]
|
]
|
||||||
@ -254,13 +254,13 @@
|
|||||||
"TEMP3":
|
"TEMP3":
|
||||||
{
|
{
|
||||||
"dev_info": { "device_type":"TEMP_SENSOR", "device_name":"TEMP3", "device_parent":"MUX1"},
|
"dev_info": { "device_type":"TEMP_SENSOR", "device_name":"TEMP3", "device_parent":"MUX1"},
|
||||||
"dev_attr": { "display_name":"LM75_U7"},
|
"dev_attr": { "display_name":"Rear Right Temp"},
|
||||||
"i2c":
|
"i2c":
|
||||||
{
|
{
|
||||||
"topo_info": { "parent_bus":"0x6", "dev_addr":"0x4a", "dev_type":"lm75"},
|
"topo_info": { "parent_bus":"0x6", "dev_addr":"0x4a", "dev_type":"lm75"},
|
||||||
"attr_list":
|
"attr_list":
|
||||||
[
|
[
|
||||||
{ "attr_name": "temp1_high_threshold", "drv_attr_name":"temp1_max"},
|
{ "attr_name": "temp1_max"},
|
||||||
{ "attr_name": "temp1_max_hyst"},
|
{ "attr_name": "temp1_max_hyst"},
|
||||||
{ "attr_name": "temp1_input"}
|
{ "attr_name": "temp1_input"}
|
||||||
]
|
]
|
||||||
@ -269,13 +269,13 @@
|
|||||||
"TEMP4":
|
"TEMP4":
|
||||||
{
|
{
|
||||||
"dev_info": { "device_type":"TEMP_SENSOR", "device_name":"TEMP4", "device_parent":"MUX1"},
|
"dev_info": { "device_type":"TEMP_SENSOR", "device_name":"TEMP4", "device_parent":"MUX1"},
|
||||||
"dev_attr": { "display_name":"LM75_U60"},
|
"dev_attr": { "display_name":"ASIC External Temp"},
|
||||||
"i2c":
|
"i2c":
|
||||||
{
|
{
|
||||||
"topo_info": { "parent_bus":"0x6", "dev_addr":"0x49", "dev_type":"lm75"},
|
"topo_info": { "parent_bus":"0x6", "dev_addr":"0x49", "dev_type":"lm75"},
|
||||||
"attr_list":
|
"attr_list":
|
||||||
[
|
[
|
||||||
{ "attr_name": "temp1_high_threshold", "drv_attr_name":"temp1_max"},
|
{ "attr_name": "temp1_max"},
|
||||||
{ "attr_name": "temp1_max_hyst"},
|
{ "attr_name": "temp1_max_hyst"},
|
||||||
{ "attr_name": "temp1_input"}
|
{ "attr_name": "temp1_input"}
|
||||||
]
|
]
|
||||||
@ -360,7 +360,6 @@
|
|||||||
{ "attr_name":"xcvr_lpmode", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x4a", "attr_mask":"0x1", "attr_cmpval":"0x2", "attr_len":"1"},
|
{ "attr_name":"xcvr_lpmode", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x4a", "attr_mask":"0x1", "attr_cmpval":"0x2", "attr_len":"1"},
|
||||||
{ "attr_name":"xcvr_present", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x49", "attr_mask":"0x1", "attr_cmpval":"0x2", "attr_len":"1"},
|
{ "attr_name":"xcvr_present", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x49", "attr_mask":"0x1", "attr_cmpval":"0x2", "attr_len":"1"},
|
||||||
{ "attr_name":"xcvr_rxlos", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x48", "attr_mask":"0x1", "attr_cmpval":"0x2", "attr_len":"1"}
|
{ "attr_name":"xcvr_rxlos", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x48", "attr_mask":"0x1", "attr_cmpval":"0x2", "attr_len":"1"}
|
||||||
|
|
||||||
]
|
]
|
||||||
}
|
}
|
||||||
},
|
},
|
||||||
@ -443,7 +442,6 @@
|
|||||||
{ "attr_name":"xcvr_lpmode", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x4a", "attr_mask":"0x3", "attr_cmpval":"0x8", "attr_len":"1"},
|
{ "attr_name":"xcvr_lpmode", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x4a", "attr_mask":"0x3", "attr_cmpval":"0x8", "attr_len":"1"},
|
||||||
{ "attr_name":"xcvr_present", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x49", "attr_mask":"0x3", "attr_cmpval":"0x8", "attr_len":"1"},
|
{ "attr_name":"xcvr_present", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x49", "attr_mask":"0x3", "attr_cmpval":"0x8", "attr_len":"1"},
|
||||||
{ "attr_name":"xcvr_rxlos", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x48", "attr_mask":"0x3", "attr_cmpval":"0x8", "attr_len":"1"}
|
{ "attr_name":"xcvr_rxlos", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x48", "attr_mask":"0x3", "attr_cmpval":"0x8", "attr_len":"1"}
|
||||||
|
|
||||||
]
|
]
|
||||||
}
|
}
|
||||||
},
|
},
|
||||||
@ -485,7 +483,6 @@
|
|||||||
{ "attr_name":"xcvr_lpmode", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x4a", "attr_mask":"0x4", "attr_cmpval":"0x10", "attr_len":"1"},
|
{ "attr_name":"xcvr_lpmode", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x4a", "attr_mask":"0x4", "attr_cmpval":"0x10", "attr_len":"1"},
|
||||||
{ "attr_name":"xcvr_present", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x49", "attr_mask":"0x4", "attr_cmpval":"0x10", "attr_len":"1"},
|
{ "attr_name":"xcvr_present", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x49", "attr_mask":"0x4", "attr_cmpval":"0x10", "attr_len":"1"},
|
||||||
{ "attr_name":"xcvr_rxlos", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x48", "attr_mask":"0x4", "attr_cmpval":"0x10", "attr_len":"1"}
|
{ "attr_name":"xcvr_rxlos", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x48", "attr_mask":"0x4", "attr_cmpval":"0x10", "attr_len":"1"}
|
||||||
|
|
||||||
]
|
]
|
||||||
}
|
}
|
||||||
},
|
},
|
||||||
@ -640,9 +637,9 @@
|
|||||||
"i2c" : {
|
"i2c" : {
|
||||||
"attr_list":
|
"attr_list":
|
||||||
[
|
[
|
||||||
{"attr_name":"STATUS_LED_COLOR_AMBER","swpld_addr":"0x32","attr_devtype":"cpld","attr_devname":"CPLD1", "bits":"5:4","descr":"","value":"0x1","swpld_addr_offset":"0x43"},
|
{"attr_name":"amber","swpld_addr":"0x32","attr_devtype":"cpld","attr_devname":"CPLD1", "bits":"5:4","descr":"","value":"0x1","swpld_addr_offset":"0x43"},
|
||||||
{"attr_name":"STATUS_LED_COLOR_GREEN","swpld_addr":"0x32","attr_devtype":"cpld","attr_devname":"CPLD1", "bits":"5:4","descr":"","value":"0x2","swpld_addr_offset":"0x43"},
|
{"attr_name":"green","swpld_addr":"0x32","attr_devtype":"cpld","attr_devname":"CPLD1", "bits":"5:4","descr":"","value":"0x2","swpld_addr_offset":"0x43"},
|
||||||
{"attr_name":"STATUS_LED_COLOR_OFF","swpld_addr":"0x32","attr_devtype":"cpld","attr_devname":"CPLD1", "bits":"5:4","descr":"","value":"0x3","swpld_addr_offset":"0x43"}
|
{"attr_name":"off","swpld_addr":"0x32","attr_devtype":"cpld","attr_devname":"CPLD1", "bits":"5:4","descr":"","value":"0x3","swpld_addr_offset":"0x43"}
|
||||||
]
|
]
|
||||||
}
|
}
|
||||||
},
|
},
|
||||||
@ -653,8 +650,8 @@
|
|||||||
"i2c" : {
|
"i2c" : {
|
||||||
"attr_list":
|
"attr_list":
|
||||||
[
|
[
|
||||||
{"attr_name":"STATUS_LED_COLOR_GREEN","attr_devtype":"cpld","attr_devname":"CPLD1","bits":"1:0","descr":"","value":"0x1","swpld_addr":"0x32","swpld_addr_offset":"0x33"},
|
{"attr_name":"green","attr_devtype":"cpld","attr_devname":"CPLD1","bits":"1:0","descr":"","value":"0x1","swpld_addr":"0x32","swpld_addr_offset":"0x33"},
|
||||||
{"attr_name":"STATUS_LED_COLOR_AMBER","attr_devtype":"cpld","attr_devname":"CPLD1","bits":"1:0","descr":"","value":"0x2","swpld_addr":"0x32","swpld_addr_offset":"0x33"}
|
{"attr_name":"amber","attr_devtype":"cpld","attr_devname":"CPLD1","bits":"1:0","descr":"","value":"0x2","swpld_addr":"0x32","swpld_addr_offset":"0x33"}
|
||||||
]
|
]
|
||||||
}
|
}
|
||||||
},
|
},
|
||||||
@ -665,8 +662,8 @@
|
|||||||
"i2c" : {
|
"i2c" : {
|
||||||
"attr_list":
|
"attr_list":
|
||||||
[
|
[
|
||||||
{"attr_name":"STATUS_LED_COLOR_GREEN","attr_devtype":"cpld","attr_devname":"CPLD1","bits":"1:0","descr":"","value":"0x1","swpld_addr":"0x32","swpld_addr_offset":"0x37"},
|
{"attr_name":"green","attr_devtype":"cpld","attr_devname":"CPLD1","bits":"1:0","descr":"","value":"0x1","swpld_addr":"0x32","swpld_addr_offset":"0x37"},
|
||||||
{"attr_name":"STATUS_LED_COLOR_AMBER","attr_devtype":"cpld","attr_devname":"CPLD1","bits":"1:0","descr":"","value":"0x2","swpld_addr":"0x32","swpld_addr_offset":"0x37"}
|
{"attr_name":"amber","attr_devtype":"cpld","attr_devname":"CPLD1","bits":"1:0","descr":"","value":"0x2","swpld_addr":"0x32","swpld_addr_offset":"0x37"}
|
||||||
]
|
]
|
||||||
}
|
}
|
||||||
},
|
},
|
||||||
@ -677,8 +674,8 @@
|
|||||||
"i2c" : {
|
"i2c" : {
|
||||||
"attr_list":
|
"attr_list":
|
||||||
[
|
[
|
||||||
{"attr_name":"STATUS_LED_COLOR_GREEN","attr_devtype":"cpld","attr_devname":"CPLD1","bits":"1:0","descr":"","value":"0x1","swpld_addr":"0x32","swpld_addr_offset":"0x3b"},
|
{"attr_name":"green","attr_devtype":"cpld","attr_devname":"CPLD1","bits":"1:0","descr":"","value":"0x1","swpld_addr":"0x32","swpld_addr_offset":"0x3b"},
|
||||||
{"attr_name":"STATUS_LED_COLOR_AMBER","attr_devtype":"cpld","attr_devname":"CPLD1","bits":"1:0","descr":"","value":"0x2","swpld_addr":"0x32","swpld_addr_offset":"0x3b"}
|
{"attr_name":"amber","attr_devtype":"cpld","attr_devname":"CPLD1","bits":"1:0","descr":"","value":"0x2","swpld_addr":"0x32","swpld_addr_offset":"0x3b"}
|
||||||
]
|
]
|
||||||
}
|
}
|
||||||
}
|
}
|
@ -1,6 +1,6 @@
|
|||||||
{
|
{
|
||||||
"chassis": {
|
"chassis": {
|
||||||
"name": "E1070",
|
"name": "DS1000",
|
||||||
"status_led": {
|
"status_led": {
|
||||||
"controllable": true,
|
"controllable": true,
|
||||||
"colors": ["green", "amber", "off"]
|
"colors": ["green", "amber", "off"]
|
||||||
@ -8,15 +8,21 @@
|
|||||||
"thermal_manager": false,
|
"thermal_manager": false,
|
||||||
"components": [
|
"components": [
|
||||||
{
|
{
|
||||||
"name": "SWCPLD"
|
"name": "CPLD SW"
|
||||||
},
|
},
|
||||||
{
|
{
|
||||||
"name": "BIOS"
|
"name": "BIOS"
|
||||||
|
},
|
||||||
|
{
|
||||||
|
"name": "ONIE"
|
||||||
|
},
|
||||||
|
{
|
||||||
|
"name": "SSD"
|
||||||
}
|
}
|
||||||
],
|
],
|
||||||
"fans": [
|
"fans": [
|
||||||
{
|
{
|
||||||
"name": "Fantray1_1",
|
"name": "Fan 1",
|
||||||
"speed": {
|
"speed": {
|
||||||
"controllable": true
|
"controllable": true
|
||||||
},
|
},
|
||||||
@ -26,7 +32,7 @@
|
|||||||
}
|
}
|
||||||
},
|
},
|
||||||
{
|
{
|
||||||
"name": "Fantray2_1",
|
"name": "Fan 2",
|
||||||
"speed": {
|
"speed": {
|
||||||
"controllable": true
|
"controllable": true
|
||||||
},
|
},
|
||||||
@ -36,37 +42,7 @@
|
|||||||
}
|
}
|
||||||
},
|
},
|
||||||
{
|
{
|
||||||
"name": "Fantray3_1",
|
"name": "Fan 3",
|
||||||
"speed": {
|
|
||||||
"controllable": true
|
|
||||||
},
|
|
||||||
"status_led": {
|
|
||||||
"controllable": true,
|
|
||||||
"colors": ["green", "amber","off"]
|
|
||||||
}
|
|
||||||
},
|
|
||||||
{
|
|
||||||
"name": "Fantray1_1",
|
|
||||||
"speed": {
|
|
||||||
"controllable": true
|
|
||||||
},
|
|
||||||
"status_led": {
|
|
||||||
"controllable": true,
|
|
||||||
"colors": ["green", "amber","off"]
|
|
||||||
}
|
|
||||||
},
|
|
||||||
{
|
|
||||||
"name": "Fantray2_1",
|
|
||||||
"speed": {
|
|
||||||
"controllable": true
|
|
||||||
},
|
|
||||||
"status_led": {
|
|
||||||
"controllable": true,
|
|
||||||
"colors": ["green", "amber","off"]
|
|
||||||
}
|
|
||||||
},
|
|
||||||
{
|
|
||||||
"name": "Fantray3_1",
|
|
||||||
"speed": {
|
"speed": {
|
||||||
"controllable": true
|
"controllable": true
|
||||||
},
|
},
|
||||||
@ -78,7 +54,7 @@
|
|||||||
],
|
],
|
||||||
"fan_drawers": [
|
"fan_drawers": [
|
||||||
{
|
{
|
||||||
"name": "Fantray1",
|
"name": "Drawer 1",
|
||||||
"speed": {
|
"speed": {
|
||||||
"controllable": false
|
"controllable": false
|
||||||
},
|
},
|
||||||
@ -88,7 +64,7 @@
|
|||||||
"max_consumed_power": false,
|
"max_consumed_power": false,
|
||||||
"fans": [
|
"fans": [
|
||||||
{
|
{
|
||||||
"name": "Fantray1_1",
|
"name": "Fan 1",
|
||||||
"speed": {
|
"speed": {
|
||||||
"controllable": false
|
"controllable": false
|
||||||
},
|
},
|
||||||
@ -99,7 +75,7 @@
|
|||||||
]
|
]
|
||||||
},
|
},
|
||||||
{
|
{
|
||||||
"name": "Fantray2",
|
"name": "Drawer 2",
|
||||||
"speed": {
|
"speed": {
|
||||||
"controllable": false
|
"controllable": false
|
||||||
},
|
},
|
||||||
@ -109,7 +85,7 @@
|
|||||||
"max_consumed_power": false,
|
"max_consumed_power": false,
|
||||||
"fans": [
|
"fans": [
|
||||||
{
|
{
|
||||||
"name": "Fantray2_1",
|
"name": "Fan 2",
|
||||||
"speed": {
|
"speed": {
|
||||||
"controllable": false
|
"controllable": false
|
||||||
},
|
},
|
||||||
@ -120,7 +96,7 @@
|
|||||||
]
|
]
|
||||||
},
|
},
|
||||||
{
|
{
|
||||||
"name": "Fantray3",
|
"name": "Drawer 3",
|
||||||
"speed": {
|
"speed": {
|
||||||
"controllable": false
|
"controllable": false
|
||||||
},
|
},
|
||||||
@ -130,7 +106,7 @@
|
|||||||
"max_consumed_power": false,
|
"max_consumed_power": false,
|
||||||
"fans": [
|
"fans": [
|
||||||
{
|
{
|
||||||
"name": "Fantray3_1",
|
"name": "Fan 3",
|
||||||
"speed": {
|
"speed": {
|
||||||
"controllable": false
|
"controllable": false
|
||||||
},
|
},
|
||||||
@ -146,7 +122,7 @@
|
|||||||
"name": "PSU 1",
|
"name": "PSU 1",
|
||||||
"fans": [
|
"fans": [
|
||||||
{
|
{
|
||||||
"name": "PSU1_FAN1",
|
"name": "PSU 1 Fan 1",
|
||||||
"speed": {
|
"speed": {
|
||||||
"controllable": false
|
"controllable": false
|
||||||
},
|
},
|
||||||
@ -170,7 +146,7 @@
|
|||||||
"name": "PSU 2",
|
"name": "PSU 2",
|
||||||
"fans": [
|
"fans": [
|
||||||
{
|
{
|
||||||
"name": "PSU2_FAN1",
|
"name": "PSU 2 Fan 1",
|
||||||
"speed": {
|
"speed": {
|
||||||
"controllable": false
|
"controllable": false
|
||||||
},
|
},
|
||||||
@ -193,175 +169,31 @@
|
|||||||
],
|
],
|
||||||
"thermals": [
|
"thermals": [
|
||||||
{
|
{
|
||||||
"name": "LM75_U10",
|
"name": "Front Left Temp",
|
||||||
"controllable": false,
|
"controllable": false,
|
||||||
"low-threshold": false,
|
"low-threshold": false,
|
||||||
"low-crit-threshold": true
|
"low-crit-threshold": true
|
||||||
},
|
},
|
||||||
{
|
{
|
||||||
"name": "LM75_U4",
|
"name": "Front Right Temp",
|
||||||
"controllable": false,
|
"controllable": false,
|
||||||
"low-threshold": false,
|
"low-threshold": false,
|
||||||
"low-crit-threshold": true
|
"low-crit-threshold": true
|
||||||
},
|
},
|
||||||
{
|
{
|
||||||
"name": "LM75_U7",
|
"name": "Rear Right Temp",
|
||||||
"controllable": false,
|
"controllable": false,
|
||||||
"low-threshold": false,
|
"low-threshold": false,
|
||||||
"low-crit-threshold": true
|
"low-crit-threshold": true
|
||||||
},
|
},
|
||||||
{
|
{
|
||||||
"name": "LM75_U60",
|
"name": "ASIC External Temp",
|
||||||
"controllable": false,
|
"controllable": false,
|
||||||
"low-threshold": false,
|
"low-threshold": false,
|
||||||
"low-crit-threshold": true
|
"low-crit-threshold": true
|
||||||
}
|
}
|
||||||
],
|
],
|
||||||
"sfps": [
|
"sfps": [
|
||||||
{
|
|
||||||
"name": "PORT0"
|
|
||||||
},
|
|
||||||
{
|
|
||||||
"name": "PORT1"
|
|
||||||
},
|
|
||||||
{
|
|
||||||
"name": "PORT2"
|
|
||||||
},
|
|
||||||
{
|
|
||||||
"name": "PORT3"
|
|
||||||
},
|
|
||||||
{
|
|
||||||
"name": "PORT4"
|
|
||||||
},
|
|
||||||
{
|
|
||||||
"name": "PORT5"
|
|
||||||
},
|
|
||||||
{
|
|
||||||
"name": "PORT6"
|
|
||||||
},
|
|
||||||
{
|
|
||||||
"name": "PORT7"
|
|
||||||
},
|
|
||||||
{
|
|
||||||
"name": "PORT8"
|
|
||||||
},
|
|
||||||
{
|
|
||||||
"name": "PORT9"
|
|
||||||
},
|
|
||||||
{
|
|
||||||
"name": "PORT10"
|
|
||||||
},
|
|
||||||
{
|
|
||||||
"name": "PORT11"
|
|
||||||
},
|
|
||||||
{
|
|
||||||
"name": "PORT12"
|
|
||||||
},
|
|
||||||
{
|
|
||||||
"name": "PORT13"
|
|
||||||
},
|
|
||||||
{
|
|
||||||
"name": "PORT14"
|
|
||||||
},
|
|
||||||
{
|
|
||||||
"name": "PORT15"
|
|
||||||
},
|
|
||||||
{
|
|
||||||
"name": "PORT16"
|
|
||||||
},
|
|
||||||
{
|
|
||||||
"name": "PORT17"
|
|
||||||
},
|
|
||||||
{
|
|
||||||
"name": "PORT18"
|
|
||||||
},
|
|
||||||
{
|
|
||||||
"name": "PORT19"
|
|
||||||
},
|
|
||||||
{
|
|
||||||
"name": "PORT20"
|
|
||||||
},
|
|
||||||
{
|
|
||||||
"name": "PORT21"
|
|
||||||
},
|
|
||||||
{
|
|
||||||
"name": "PORT22"
|
|
||||||
},
|
|
||||||
{
|
|
||||||
"name": "PORT23"
|
|
||||||
},
|
|
||||||
{
|
|
||||||
"name": "PORT24"
|
|
||||||
},
|
|
||||||
{
|
|
||||||
"name": "PORT25"
|
|
||||||
},
|
|
||||||
{
|
|
||||||
"name": "PORT26"
|
|
||||||
},
|
|
||||||
{
|
|
||||||
"name": "PORT27"
|
|
||||||
},
|
|
||||||
{
|
|
||||||
"name": "PORT28"
|
|
||||||
},
|
|
||||||
{
|
|
||||||
"name": "PORT29"
|
|
||||||
},
|
|
||||||
{
|
|
||||||
"name": "PORT30"
|
|
||||||
},
|
|
||||||
{
|
|
||||||
"name": "PORT31"
|
|
||||||
},
|
|
||||||
{
|
|
||||||
"name": "PORT32"
|
|
||||||
},
|
|
||||||
{
|
|
||||||
"name": "PORT33"
|
|
||||||
},
|
|
||||||
{
|
|
||||||
"name": "PORT34"
|
|
||||||
},
|
|
||||||
{
|
|
||||||
"name": "PORT35"
|
|
||||||
},
|
|
||||||
{
|
|
||||||
"name": "PORT36"
|
|
||||||
},
|
|
||||||
{
|
|
||||||
"name": "PORT37"
|
|
||||||
},
|
|
||||||
{
|
|
||||||
"name": "PORT38"
|
|
||||||
},
|
|
||||||
{
|
|
||||||
"name": "PORT39"
|
|
||||||
},
|
|
||||||
{
|
|
||||||
"name": "PORT40"
|
|
||||||
},
|
|
||||||
{
|
|
||||||
"name": "PORT41"
|
|
||||||
},
|
|
||||||
{
|
|
||||||
"name": "PORT42"
|
|
||||||
},
|
|
||||||
{
|
|
||||||
"name": "PORT43"
|
|
||||||
},
|
|
||||||
{
|
|
||||||
"name": "PORT44"
|
|
||||||
},
|
|
||||||
{
|
|
||||||
"name": "PORT45"
|
|
||||||
},
|
|
||||||
{
|
|
||||||
"name": "PORT46"
|
|
||||||
},
|
|
||||||
{
|
|
||||||
"name": "PORT47"
|
|
||||||
},
|
|
||||||
{
|
{
|
||||||
"name": "PORT48"
|
"name": "PORT48"
|
||||||
},
|
},
|
||||||
@ -393,392 +225,392 @@
|
|||||||
"index": "1",
|
"index": "1",
|
||||||
"lanes": "26",
|
"lanes": "26",
|
||||||
"breakout_modes": {
|
"breakout_modes": {
|
||||||
"1x1000[100,10]": ["Ethernet1/0/1"]
|
"1x1000[100,10]": ["Eth1/1"]
|
||||||
}
|
}
|
||||||
},
|
},
|
||||||
"Ethernet1": {
|
"Ethernet1": {
|
||||||
"index": "2",
|
"index": "2",
|
||||||
"lanes": "25",
|
"lanes": "25",
|
||||||
"breakout_modes": {
|
"breakout_modes": {
|
||||||
"1x1000[100,10]": ["Ethernet1/0/2"]
|
"1x1000[100,10]": ["Eth2/1"]
|
||||||
}
|
}
|
||||||
},
|
},
|
||||||
"Ethernet2": {
|
"Ethernet2": {
|
||||||
"index": "3",
|
"index": "3",
|
||||||
"lanes": "28",
|
"lanes": "28",
|
||||||
"breakout_modes": {
|
"breakout_modes": {
|
||||||
"1x1000[100,10]": ["Ethernet1/0/3"]
|
"1x1000[100,10]": ["Eth3/1"]
|
||||||
}
|
}
|
||||||
},
|
},
|
||||||
"Ethernet3": {
|
"Ethernet3": {
|
||||||
"index": "4",
|
"index": "4",
|
||||||
"lanes": "27",
|
"lanes": "27",
|
||||||
"breakout_modes": {
|
"breakout_modes": {
|
||||||
"1x1000[100,10]": ["Ethernet1/0/4"]
|
"1x1000[100,10]": ["Eth4/1"]
|
||||||
}
|
}
|
||||||
},
|
},
|
||||||
"Ethernet4": {
|
"Ethernet4": {
|
||||||
"index": "5",
|
"index": "5",
|
||||||
"lanes": "30",
|
"lanes": "30",
|
||||||
"breakout_modes": {
|
"breakout_modes": {
|
||||||
"1x1000[100,10]": ["Ethernet1/0/5"]
|
"1x1000[100,10]": ["Eth5/1"]
|
||||||
}
|
}
|
||||||
},
|
},
|
||||||
"Ethernet5": {
|
"Ethernet5": {
|
||||||
"index": "6",
|
"index": "6",
|
||||||
"lanes": "29",
|
"lanes": "29",
|
||||||
"breakout_modes": {
|
"breakout_modes": {
|
||||||
"1x1000[100,10]": ["Ethernet1/0/6"]
|
"1x1000[100,10]": ["Eth6/1"]
|
||||||
}
|
}
|
||||||
},
|
},
|
||||||
"Ethernet6": {
|
"Ethernet6": {
|
||||||
"index": "7",
|
"index": "7",
|
||||||
"lanes": "32",
|
"lanes": "32",
|
||||||
"breakout_modes": {
|
"breakout_modes": {
|
||||||
"1x1000[100,10]": ["Ethernet1/0/7"]
|
"1x1000[100,10]": ["Eth7/1"]
|
||||||
}
|
}
|
||||||
},
|
},
|
||||||
"Ethernet7": {
|
"Ethernet7": {
|
||||||
"index": "8",
|
"index": "8",
|
||||||
"lanes": "31",
|
"lanes": "31",
|
||||||
"breakout_modes": {
|
"breakout_modes": {
|
||||||
"1x1000[100,10]": ["Ethernet1/0/8"]
|
"1x1000[100,10]": ["Eth8/1"]
|
||||||
}
|
}
|
||||||
},
|
},
|
||||||
"Ethernet8": {
|
"Ethernet8": {
|
||||||
"index": "9",
|
"index": "9",
|
||||||
"lanes": "34",
|
"lanes": "34",
|
||||||
"breakout_modes": {
|
"breakout_modes": {
|
||||||
"1x1000[100,10]": ["Ethernet1/0/9"]
|
"1x1000[100,10]": ["Eth9/1"]
|
||||||
}
|
}
|
||||||
},
|
},
|
||||||
"Ethernet9": {
|
"Ethernet9": {
|
||||||
"index": "10",
|
"index": "10",
|
||||||
"lanes": "33",
|
"lanes": "33",
|
||||||
"breakout_modes": {
|
"breakout_modes": {
|
||||||
"1x1000[100,10]": ["Ethernet1/0/10"]
|
"1x1000[100,10]": ["Eth10/1"]
|
||||||
}
|
}
|
||||||
},
|
},
|
||||||
"Ethernet10": {
|
"Ethernet10": {
|
||||||
"index": "11",
|
"index": "11",
|
||||||
"lanes": "36",
|
"lanes": "36",
|
||||||
"breakout_modes": {
|
"breakout_modes": {
|
||||||
"1x1000[100,10]": ["Ethernet1/0/11"]
|
"1x1000[100,10]": ["Eth11/1"]
|
||||||
}
|
}
|
||||||
},
|
},
|
||||||
"Ethernet11": {
|
"Ethernet11": {
|
||||||
"index": "12",
|
"index": "12",
|
||||||
"lanes": "35",
|
"lanes": "35",
|
||||||
"breakout_modes": {
|
"breakout_modes": {
|
||||||
"1x1000[100,10]": ["Ethernet1/0/12"]
|
"1x1000[100,10]": ["Eth12/1"]
|
||||||
}
|
}
|
||||||
},
|
},
|
||||||
"Ethernet12": {
|
"Ethernet12": {
|
||||||
"index": "13",
|
"index": "13",
|
||||||
"lanes": "38",
|
"lanes": "38",
|
||||||
"breakout_modes": {
|
"breakout_modes": {
|
||||||
"1x1000[100,10]": ["Ethernet1/0/13"]
|
"1x1000[100,10]": ["Eth13/1"]
|
||||||
}
|
}
|
||||||
},
|
},
|
||||||
"Ethernet13": {
|
"Ethernet13": {
|
||||||
"index": "14",
|
"index": "14",
|
||||||
"lanes": "37",
|
"lanes": "37",
|
||||||
"breakout_modes": {
|
"breakout_modes": {
|
||||||
"1x1000[100,10]": ["Ethernet1/0/14"]
|
"1x1000[100,10]": ["Eth14/1"]
|
||||||
}
|
}
|
||||||
},
|
},
|
||||||
"Ethernet14": {
|
"Ethernet14": {
|
||||||
"index": "15",
|
"index": "15",
|
||||||
"lanes": "40",
|
"lanes": "40",
|
||||||
"breakout_modes": {
|
"breakout_modes": {
|
||||||
"1x1000[100,10]": ["Ethernet1/0/15"]
|
"1x1000[100,10]": ["Eth15/1"]
|
||||||
}
|
}
|
||||||
},
|
},
|
||||||
"Ethernet15": {
|
"Ethernet15": {
|
||||||
"index": "16",
|
"index": "16",
|
||||||
"lanes": "39",
|
"lanes": "39",
|
||||||
"breakout_modes": {
|
"breakout_modes": {
|
||||||
"1x1000[100,10]": ["Ethernet1/0/16"]
|
"1x1000[100,10]": ["Eth16/1"]
|
||||||
}
|
}
|
||||||
},
|
},
|
||||||
"Ethernet16": {
|
"Ethernet16": {
|
||||||
"index": "17",
|
"index": "17",
|
||||||
"lanes": "42",
|
"lanes": "42",
|
||||||
"breakout_modes": {
|
"breakout_modes": {
|
||||||
"1x1000[100,10]": ["Ethernet1/0/17"]
|
"1x1000[100,10]": ["Eth17/1"]
|
||||||
}
|
}
|
||||||
},
|
},
|
||||||
"Ethernet17": {
|
"Ethernet17": {
|
||||||
"index": "18",
|
"index": "18",
|
||||||
"lanes": "41",
|
"lanes": "41",
|
||||||
"breakout_modes": {
|
"breakout_modes": {
|
||||||
"1x1000[100,10]": ["Ethernet1/0/18"]
|
"1x1000[100,10]": ["Eth18/1"]
|
||||||
}
|
}
|
||||||
},
|
},
|
||||||
"Ethernet18": {
|
"Ethernet18": {
|
||||||
"index": "19",
|
"index": "19",
|
||||||
"lanes": "44",
|
"lanes": "44",
|
||||||
"breakout_modes": {
|
"breakout_modes": {
|
||||||
"1x1000[100,10]": ["Ethernet1/0/19"]
|
"1x1000[100,10]": ["Eth19/1"]
|
||||||
}
|
}
|
||||||
},
|
},
|
||||||
"Ethernet19": {
|
"Ethernet19": {
|
||||||
"index": "20",
|
"index": "20",
|
||||||
"lanes": "43",
|
"lanes": "43",
|
||||||
"breakout_modes": {
|
"breakout_modes": {
|
||||||
"1x1000[100,10]": ["Ethernet1/0/20"]
|
"1x1000[100,10]": ["Eth20/1"]
|
||||||
}
|
}
|
||||||
},
|
},
|
||||||
"Ethernet20": {
|
"Ethernet20": {
|
||||||
"index": "21",
|
"index": "21",
|
||||||
"lanes": "50",
|
"lanes": "50",
|
||||||
"breakout_modes": {
|
"breakout_modes": {
|
||||||
"1x1000[100,10]": ["Ethernet1/0/21"]
|
"1x1000[100,10]": ["Eth21/1"]
|
||||||
}
|
}
|
||||||
},
|
},
|
||||||
"Ethernet21": {
|
"Ethernet21": {
|
||||||
"index": "22",
|
"index": "22",
|
||||||
"lanes": "49",
|
"lanes": "49",
|
||||||
"breakout_modes": {
|
"breakout_modes": {
|
||||||
"1x1000[100,10]": ["Ethernet1/0/22"]
|
"1x1000[100,10]": ["Eth22/1"]
|
||||||
}
|
}
|
||||||
},
|
},
|
||||||
"Ethernet22": {
|
"Ethernet22": {
|
||||||
"index": "23",
|
"index": "23",
|
||||||
"lanes": "52",
|
"lanes": "52",
|
||||||
"breakout_modes": {
|
"breakout_modes": {
|
||||||
"1x1000[100,10]": ["Ethernet1/0/23"]
|
"1x1000[100,10]": ["Eth23/1"]
|
||||||
}
|
}
|
||||||
},
|
},
|
||||||
"Ethernet23": {
|
"Ethernet23": {
|
||||||
"index": "24",
|
"index": "24",
|
||||||
"lanes": "51",
|
"lanes": "51",
|
||||||
"breakout_modes": {
|
"breakout_modes": {
|
||||||
"1x1000[100,10]": ["Ethernet1/0/24"]
|
"1x1000[100,10]": ["Eth24/1"]
|
||||||
}
|
}
|
||||||
},
|
},
|
||||||
"Ethernet24": {
|
"Ethernet24": {
|
||||||
"index": "25",
|
"index": "25",
|
||||||
"lanes": "2",
|
"lanes": "2",
|
||||||
"breakout_modes": {
|
"breakout_modes": {
|
||||||
"1x1000[100,10]": ["Ethernet1/0/25"]
|
"1x1000[100,10]": ["Eth25/1"]
|
||||||
}
|
}
|
||||||
},
|
},
|
||||||
"Ethernet25": {
|
"Ethernet25": {
|
||||||
"index": "26",
|
"index": "26",
|
||||||
"lanes": "1",
|
"lanes": "1",
|
||||||
"breakout_modes": {
|
"breakout_modes": {
|
||||||
"1x1000[100,10]": ["Ethernet1/0/26"]
|
"1x1000[100,10]": ["Eth26/1"]
|
||||||
}
|
}
|
||||||
},
|
},
|
||||||
"Ethernet26": {
|
"Ethernet26": {
|
||||||
"index": "27",
|
"index": "27",
|
||||||
"lanes": "4",
|
"lanes": "4",
|
||||||
"breakout_modes": {
|
"breakout_modes": {
|
||||||
"1x1000[100,10]": ["Ethernet1/0/27"]
|
"1x1000[100,10]": ["Eth27/1"]
|
||||||
}
|
}
|
||||||
},
|
},
|
||||||
"Ethernet27": {
|
"Ethernet27": {
|
||||||
"index": "28",
|
"index": "28",
|
||||||
"lanes": "3",
|
"lanes": "3",
|
||||||
"breakout_modes": {
|
"breakout_modes": {
|
||||||
"1x1000[100,10]": ["Ethernet1/0/28"]
|
"1x1000[100,10]": ["Eth28/1"]
|
||||||
}
|
}
|
||||||
},
|
},
|
||||||
"Ethernet28": {
|
"Ethernet28": {
|
||||||
"index": "29",
|
"index": "29",
|
||||||
"lanes": "6",
|
"lanes": "6",
|
||||||
"breakout_modes": {
|
"breakout_modes": {
|
||||||
"1x1000[100,10]": ["Ethernet1/0/29"]
|
"1x1000[100,10]": ["Eth29/1"]
|
||||||
}
|
}
|
||||||
},
|
},
|
||||||
"Ethernet29": {
|
"Ethernet29": {
|
||||||
"index": "30",
|
"index": "30",
|
||||||
"lanes": "5",
|
"lanes": "5",
|
||||||
"breakout_modes": {
|
"breakout_modes": {
|
||||||
"1x1000[100,10]": ["Ethernet1/0/30"]
|
"1x1000[100,10]": ["Eth30/1"]
|
||||||
}
|
}
|
||||||
},
|
},
|
||||||
"Ethernet30": {
|
"Ethernet30": {
|
||||||
"index": "31",
|
"index": "31",
|
||||||
"lanes": "8",
|
"lanes": "8",
|
||||||
"breakout_modes": {
|
"breakout_modes": {
|
||||||
"1x1000[100,10]": ["Ethernet1/0/31"]
|
"1x1000[100,10]": ["Eth31/1"]
|
||||||
}
|
}
|
||||||
},
|
},
|
||||||
"Ethernet31": {
|
"Ethernet31": {
|
||||||
"index": "32",
|
"index": "32",
|
||||||
"lanes": "7",
|
"lanes": "7",
|
||||||
"breakout_modes": {
|
"breakout_modes": {
|
||||||
"1x1000[100,10]": ["Ethernet1/0/32"]
|
"1x1000[100,10]": ["Eth32/1"]
|
||||||
}
|
}
|
||||||
},
|
},
|
||||||
"Ethernet32": {
|
"Ethernet32": {
|
||||||
"index": "33",
|
"index": "33",
|
||||||
"lanes": "10",
|
"lanes": "10",
|
||||||
"breakout_modes": {
|
"breakout_modes": {
|
||||||
"1x1000[100,10]": ["Ethernet1/0/33"]
|
"1x1000[100,10]": ["Eth33/1"]
|
||||||
}
|
}
|
||||||
},
|
},
|
||||||
"Ethernet33": {
|
"Ethernet33": {
|
||||||
"index": "34",
|
"index": "34",
|
||||||
"lanes": "9",
|
"lanes": "9",
|
||||||
"breakout_modes": {
|
"breakout_modes": {
|
||||||
"1x1000[100,10]": ["Ethernet1/0/34"]
|
"1x1000[100,10]": ["Eth34/1"]
|
||||||
}
|
}
|
||||||
},
|
},
|
||||||
"Ethernet34": {
|
"Ethernet34": {
|
||||||
"index": "35",
|
"index": "35",
|
||||||
"lanes": "12",
|
"lanes": "12",
|
||||||
"breakout_modes": {
|
"breakout_modes": {
|
||||||
"1x1000[100,10]": ["Ethernet1/0/35"]
|
"1x1000[100,10]": ["Eth35/1"]
|
||||||
}
|
}
|
||||||
},
|
},
|
||||||
"Ethernet35": {
|
"Ethernet35": {
|
||||||
"index": "36",
|
"index": "36",
|
||||||
"lanes": "11",
|
"lanes": "11",
|
||||||
"breakout_modes": {
|
"breakout_modes": {
|
||||||
"1x1000[100,10]": ["Ethernet1/0/36"]
|
"1x1000[100,10]": ["Eth36/1"]
|
||||||
}
|
}
|
||||||
},
|
},
|
||||||
"Ethernet36": {
|
"Ethernet36": {
|
||||||
"index": "37",
|
"index": "37",
|
||||||
"lanes": "14",
|
"lanes": "14",
|
||||||
"breakout_modes": {
|
"breakout_modes": {
|
||||||
"1x1000[100,10]": ["Ethernet1/0/37"]
|
"1x1000[100,10]": ["Eth37/1"]
|
||||||
}
|
}
|
||||||
},
|
},
|
||||||
"Ethernet37": {
|
"Ethernet37": {
|
||||||
"index": "38",
|
"index": "38",
|
||||||
"lanes": "13",
|
"lanes": "13",
|
||||||
"breakout_modes": {
|
"breakout_modes": {
|
||||||
"1x1000[100,10]": ["Ethernet1/0/38"]
|
"1x1000[100,10]": ["Eth38/1"]
|
||||||
}
|
}
|
||||||
},
|
},
|
||||||
"Ethernet38": {
|
"Ethernet38": {
|
||||||
"index": "39",
|
"index": "39",
|
||||||
"lanes": "16",
|
"lanes": "16",
|
||||||
"breakout_modes": {
|
"breakout_modes": {
|
||||||
"1x1000[100,10]": ["Ethernet1/0/39"]
|
"1x1000[100,10]": ["Eth39/1"]
|
||||||
}
|
}
|
||||||
},
|
},
|
||||||
"Ethernet39": {
|
"Ethernet39": {
|
||||||
"index": "40",
|
"index": "40",
|
||||||
"lanes": "15",
|
"lanes": "15",
|
||||||
"breakout_modes": {
|
"breakout_modes": {
|
||||||
"1x1000[100,10]": ["Ethernet1/0/40"]
|
"1x1000[100,10]": ["Eth40/1"]
|
||||||
}
|
}
|
||||||
},
|
},
|
||||||
"Ethernet40": {
|
"Ethernet40": {
|
||||||
"index": "41",
|
"index": "41",
|
||||||
"lanes": "18",
|
"lanes": "18",
|
||||||
"breakout_modes": {
|
"breakout_modes": {
|
||||||
"1x1000[100,10]": ["Ethernet1/0/41"]
|
"1x1000[100,10]": ["Eth41/1"]
|
||||||
}
|
}
|
||||||
},
|
},
|
||||||
"Ethernet41": {
|
"Ethernet41": {
|
||||||
"index": "42",
|
"index": "42",
|
||||||
"lanes": "17",
|
"lanes": "17",
|
||||||
"breakout_modes": {
|
"breakout_modes": {
|
||||||
"1x1000[100,10]": ["Ethernet1/0/42"]
|
"1x1000[100,10]": ["Eth42/1"]
|
||||||
}
|
}
|
||||||
},
|
},
|
||||||
"Ethernet42": {
|
"Ethernet42": {
|
||||||
"index": "43",
|
"index": "43",
|
||||||
"lanes": "20",
|
"lanes": "20",
|
||||||
"breakout_modes": {
|
"breakout_modes": {
|
||||||
"1x1000[100,10]": ["Ethernet1/0/43"]
|
"1x1000[100,10]": ["Eth43/1"]
|
||||||
}
|
}
|
||||||
},
|
},
|
||||||
"Ethernet43": {
|
"Ethernet43": {
|
||||||
"index": "44",
|
"index": "44",
|
||||||
"lanes": "19",
|
"lanes": "19",
|
||||||
"breakout_modes": {
|
"breakout_modes": {
|
||||||
"1x1000[100,10]": ["Ethernet1/0/44"]
|
"1x1000[100,10]": ["Eth44/1"]
|
||||||
}
|
}
|
||||||
},
|
},
|
||||||
"Ethernet44": {
|
"Ethernet44": {
|
||||||
"index": "45",
|
"index": "45",
|
||||||
"lanes": "22",
|
"lanes": "22",
|
||||||
"breakout_modes": {
|
"breakout_modes": {
|
||||||
"1x1000[100,10]": ["Ethernet1/0/45"]
|
"1x1000[100,10]": ["Eth45/1"]
|
||||||
}
|
}
|
||||||
},
|
},
|
||||||
"Ethernet45": {
|
"Ethernet45": {
|
||||||
"index": "46",
|
"index": "46",
|
||||||
"lanes": "21",
|
"lanes": "21",
|
||||||
"breakout_modes": {
|
"breakout_modes": {
|
||||||
"1x1000[100,10]": ["Ethernet1/0/46"]
|
"1x1000[100,10]": ["Eth46/1"]
|
||||||
}
|
}
|
||||||
},
|
},
|
||||||
"Ethernet46": {
|
"Ethernet46": {
|
||||||
"index": "47",
|
"index": "47",
|
||||||
"lanes": "24",
|
"lanes": "24",
|
||||||
"breakout_modes": {
|
"breakout_modes": {
|
||||||
"1x1000[100,10]": ["Ethernet1/0/47"]
|
"1x1000[100,10]": ["Eth47/1"]
|
||||||
}
|
}
|
||||||
},
|
},
|
||||||
"Ethernet47": {
|
"Ethernet47": {
|
||||||
"index": "48",
|
"index": "48",
|
||||||
"lanes": "23",
|
"lanes": "23",
|
||||||
"breakout_modes": {
|
"breakout_modes": {
|
||||||
"1x1000[100,10]": ["Ethernet1/0/48"]
|
"1x1000[100,10]": ["Eth48/1"]
|
||||||
}
|
}
|
||||||
},
|
},
|
||||||
"Ethernet48": {
|
"Ethernet48": {
|
||||||
"index": "49",
|
"index": "49",
|
||||||
"lanes": "60",
|
"lanes": "60",
|
||||||
"breakout_modes": {
|
"breakout_modes": {
|
||||||
"1x10G[1G]": ["Ethernet1/0/49"]
|
"1x10G[1G]": ["Eth49/1"]
|
||||||
}
|
}
|
||||||
},
|
},
|
||||||
"Ethernet49": {
|
"Ethernet49": {
|
||||||
"index": "50",
|
"index": "50",
|
||||||
"lanes": "58",
|
"lanes": "58",
|
||||||
"breakout_modes": {
|
"breakout_modes": {
|
||||||
"1x10G[1G]": ["Ethernet1/0/50"]
|
"1x10G[1G]": ["Eth50/1"]
|
||||||
}
|
}
|
||||||
},
|
},
|
||||||
"Ethernet50": {
|
"Ethernet50": {
|
||||||
"index": "51",
|
"index": "51",
|
||||||
"lanes": "59",
|
"lanes": "59",
|
||||||
"breakout_modes": {
|
"breakout_modes": {
|
||||||
"1x10G[1G]": ["Ethernet1/0/51"]
|
"1x10G[1G]": ["Eth51/1"]
|
||||||
}
|
}
|
||||||
},
|
},
|
||||||
"Ethernet51": {
|
"Ethernet51": {
|
||||||
"index": "52",
|
"index": "52",
|
||||||
"lanes": "57",
|
"lanes": "57",
|
||||||
"breakout_modes": {
|
"breakout_modes": {
|
||||||
"1x10G[1G]": ["Ethernet1/0/52"]
|
"1x10G[1G]": ["Eth52/1"]
|
||||||
}
|
}
|
||||||
},
|
},
|
||||||
"Ethernet52": {
|
"Ethernet52": {
|
||||||
"index": "53",
|
"index": "53",
|
||||||
"lanes": "62",
|
"lanes": "62",
|
||||||
"breakout_modes": {
|
"breakout_modes": {
|
||||||
"1x10G[1G]": ["Ethernet1/0/53"]
|
"1x10G[1G]": ["Eth53/1"]
|
||||||
}
|
}
|
||||||
},
|
},
|
||||||
"Ethernet53": {
|
"Ethernet53": {
|
||||||
"index": "54",
|
"index": "54",
|
||||||
"lanes": "64",
|
"lanes": "64",
|
||||||
"breakout_modes": {
|
"breakout_modes": {
|
||||||
"1x10G[1G]": ["Ethernet1/0/54"]
|
"1x10G[1G]": ["Eth54/1"]
|
||||||
}
|
}
|
||||||
},
|
},
|
||||||
"Ethernet54": {
|
"Ethernet54": {
|
||||||
"index": "55",
|
"index": "55",
|
||||||
"lanes": "61",
|
"lanes": "61",
|
||||||
"breakout_modes": {
|
"breakout_modes": {
|
||||||
"1x10G[1G]": ["Ethernet1/0/55"]
|
"1x10G[1G]": ["Eth55/1"]
|
||||||
}
|
}
|
||||||
},
|
},
|
||||||
"Ethernet55": {
|
"Ethernet55": {
|
||||||
"index": "56",
|
"index": "56",
|
||||||
"lanes": "63",
|
"lanes": "63",
|
||||||
"breakout_modes": {
|
"breakout_modes": {
|
||||||
"1x10G[1G]": ["Ethernet1/0/56"]
|
"1x10G[1G]": ["Eth56/1"]
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
}
|
}
|
@ -0,0 +1,12 @@
|
|||||||
|
{
|
||||||
|
"chassis": {
|
||||||
|
"DS1000": {
|
||||||
|
"component": {
|
||||||
|
"BIOS": {},
|
||||||
|
"ONIE": {},
|
||||||
|
"CPLD SW": {},
|
||||||
|
"SSD": {}
|
||||||
|
}
|
||||||
|
}
|
||||||
|
}
|
||||||
|
}
|
3
device/celestica/x86_64-cel_ds1000-r0/platform_reboot
Executable file
3
device/celestica/x86_64-cel_ds1000-r0/platform_reboot
Executable file
@ -0,0 +1,3 @@
|
|||||||
|
#!/bin/bash
|
||||||
|
|
||||||
|
/usr/local/bin/ds1000_platform_shutdown.sh system
|
45
device/celestica/x86_64-cel_ds1000-r0/sensors.conf
Normal file
45
device/celestica/x86_64-cel_ds1000-r0/sensors.conf
Normal file
@ -0,0 +1,45 @@
|
|||||||
|
# libsensors configuration file for Celestica DS1000
|
||||||
|
|
||||||
|
bus "i2c-6" "i2c-0-mux (chan_id 4)"
|
||||||
|
bus "i2c-4" "i2c-0-mux (chan_id 2)"
|
||||||
|
bus "i2c-2" "i2c-0-mux (chan_id 0)"
|
||||||
|
bus "i2c-5" "i2c-0-mux (chan_id 3)"
|
||||||
|
|
||||||
|
chip "fan_cpld-i2c-2-66"
|
||||||
|
label fan1 "Fantray1_1 speed"
|
||||||
|
label fan2 "Fantray2_1 speed"
|
||||||
|
label fan3 "Fantray3_1 speed"
|
||||||
|
|
||||||
|
chip "psu_pmbus-i2c-4-58"
|
||||||
|
label fan1 "PSU1 fan speed"
|
||||||
|
label in3 "PSU1 output voltage"
|
||||||
|
label temp1 "PSU1 temperature"
|
||||||
|
label power2 "PSU1 output power"
|
||||||
|
label curr2 "PSU1 output current"
|
||||||
|
|
||||||
|
chip "psu_pmbus-i2c-4-59"
|
||||||
|
label fan1 "PSU2 fan speed"
|
||||||
|
label in3 "PSU2 output voltage"
|
||||||
|
label temp1 "PSU2 temperature"
|
||||||
|
label power2 "PSU2 output power"
|
||||||
|
label curr2 "PSU2 output current"
|
||||||
|
|
||||||
|
chip "lm75-i2c-5-48"
|
||||||
|
label temp1 "Front Left Temp"
|
||||||
|
set temp1_max 50
|
||||||
|
set temp1_max_hyst 45
|
||||||
|
|
||||||
|
chip "lm75-i2c-5-49"
|
||||||
|
label temp1 "Front Right Temp"
|
||||||
|
set temp1_max 50
|
||||||
|
set temp1_max_hyst 45
|
||||||
|
|
||||||
|
chip "lm75-i2c-6-4a"
|
||||||
|
label temp1 "Rear Right Temp"
|
||||||
|
set temp1_max 50
|
||||||
|
set temp1_max_hyst 45
|
||||||
|
|
||||||
|
chip "lm75-i2c-6-49"
|
||||||
|
set temp1_max 110
|
||||||
|
set temp1_max_hyst 105
|
||||||
|
label temp1 "ASIC External Temp"
|
@ -3,8 +3,8 @@
|
|||||||
"devices_to_ignore": [
|
"devices_to_ignore": [
|
||||||
"asic",
|
"asic",
|
||||||
"psu.temperature",
|
"psu.temperature",
|
||||||
"PSU1_FAN1",
|
"PSU 1 Fan 1",
|
||||||
"PSU2_FAN1"
|
"PSU 2 Fan 1"
|
||||||
],
|
],
|
||||||
"user_defined_checkers": [],
|
"user_defined_checkers": [],
|
||||||
"polling_interval": 60,
|
"polling_interval": 60,
|
Binary file not shown.
284
device/celestica/x86_64-cel_questone_2-r0/Questone_2/hwsku.json
Normal file
284
device/celestica/x86_64-cel_questone_2-r0/Questone_2/hwsku.json
Normal file
@ -0,0 +1,284 @@
|
|||||||
|
{
|
||||||
|
"interfaces": {
|
||||||
|
"Ethernet0": {
|
||||||
|
"default_brkout_mode": "1x25G",
|
||||||
|
"autoneg": "off",
|
||||||
|
"fec": "rs"
|
||||||
|
},
|
||||||
|
"Ethernet1": {
|
||||||
|
"default_brkout_mode": "1x25G",
|
||||||
|
"autoneg": "off",
|
||||||
|
"fec": "rs"
|
||||||
|
},
|
||||||
|
"Ethernet2": {
|
||||||
|
"default_brkout_mode": "1x25G",
|
||||||
|
"autoneg": "off",
|
||||||
|
"fec": "rs"
|
||||||
|
},
|
||||||
|
"Ethernet3": {
|
||||||
|
"default_brkout_mode": "1x25G",
|
||||||
|
"autoneg": "off",
|
||||||
|
"fec": "rs"
|
||||||
|
},
|
||||||
|
"Ethernet4": {
|
||||||
|
"default_brkout_mode": "1x25G",
|
||||||
|
"autoneg": "off",
|
||||||
|
"fec": "rs"
|
||||||
|
},
|
||||||
|
"Ethernet5": {
|
||||||
|
"default_brkout_mode": "1x25G",
|
||||||
|
"autoneg": "off",
|
||||||
|
"fec": "rs"
|
||||||
|
},
|
||||||
|
"Ethernet6": {
|
||||||
|
"default_brkout_mode": "1x25G",
|
||||||
|
"autoneg": "off",
|
||||||
|
"fec": "rs"
|
||||||
|
},
|
||||||
|
"Ethernet7": {
|
||||||
|
"default_brkout_mode": "1x25G",
|
||||||
|
"autoneg": "off",
|
||||||
|
"fec": "rs"
|
||||||
|
},
|
||||||
|
"Ethernet8": {
|
||||||
|
"default_brkout_mode": "1x25G",
|
||||||
|
"autoneg": "off",
|
||||||
|
"fec": "rs"
|
||||||
|
},
|
||||||
|
"Ethernet9": {
|
||||||
|
"default_brkout_mode": "1x25G",
|
||||||
|
"autoneg": "off",
|
||||||
|
"fec": "rs"
|
||||||
|
},
|
||||||
|
"Ethernet10": {
|
||||||
|
"default_brkout_mode": "1x25G",
|
||||||
|
"autoneg": "off",
|
||||||
|
"fec": "rs"
|
||||||
|
},
|
||||||
|
"Ethernet11": {
|
||||||
|
"default_brkout_mode": "1x25G",
|
||||||
|
"autoneg": "off",
|
||||||
|
"fec": "rs"
|
||||||
|
},
|
||||||
|
"Ethernet12": {
|
||||||
|
"default_brkout_mode": "1x25G",
|
||||||
|
"autoneg": "off",
|
||||||
|
"fec": "rs"
|
||||||
|
},
|
||||||
|
"Ethernet13": {
|
||||||
|
"default_brkout_mode": "1x25G",
|
||||||
|
"autoneg": "off",
|
||||||
|
"fec": "rs"
|
||||||
|
},
|
||||||
|
"Ethernet14": {
|
||||||
|
"default_brkout_mode": "1x25G",
|
||||||
|
"autoneg": "off",
|
||||||
|
"fec": "rs"
|
||||||
|
},
|
||||||
|
"Ethernet15": {
|
||||||
|
"default_brkout_mode": "1x25G",
|
||||||
|
"autoneg": "off",
|
||||||
|
"fec": "rs"
|
||||||
|
},
|
||||||
|
"Ethernet16": {
|
||||||
|
"default_brkout_mode": "1x25G",
|
||||||
|
"autoneg": "off",
|
||||||
|
"fec": "rs"
|
||||||
|
},
|
||||||
|
"Ethernet17": {
|
||||||
|
"default_brkout_mode": "1x25G",
|
||||||
|
"autoneg": "off",
|
||||||
|
"fec": "rs"
|
||||||
|
},
|
||||||
|
"Ethernet18": {
|
||||||
|
"default_brkout_mode": "1x25G",
|
||||||
|
"autoneg": "off",
|
||||||
|
"fec": "rs"
|
||||||
|
},
|
||||||
|
"Ethernet19": {
|
||||||
|
"default_brkout_mode": "1x25G",
|
||||||
|
"autoneg": "off",
|
||||||
|
"fec": "rs"
|
||||||
|
},
|
||||||
|
"Ethernet20": {
|
||||||
|
"default_brkout_mode": "1x25G",
|
||||||
|
"autoneg": "off",
|
||||||
|
"fec": "rs"
|
||||||
|
},
|
||||||
|
"Ethernet21": {
|
||||||
|
"default_brkout_mode": "1x25G",
|
||||||
|
"autoneg": "off",
|
||||||
|
"fec": "rs"
|
||||||
|
},
|
||||||
|
"Ethernet22": {
|
||||||
|
"default_brkout_mode": "1x25G",
|
||||||
|
"autoneg": "off",
|
||||||
|
"fec": "rs"
|
||||||
|
},
|
||||||
|
"Ethernet23": {
|
||||||
|
"default_brkout_mode": "1x25G",
|
||||||
|
"autoneg": "off",
|
||||||
|
"fec": "rs"
|
||||||
|
},
|
||||||
|
"Ethernet24": {
|
||||||
|
"default_brkout_mode": "1x25G",
|
||||||
|
"autoneg": "off",
|
||||||
|
"fec": "rs"
|
||||||
|
},
|
||||||
|
"Ethernet25": {
|
||||||
|
"default_brkout_mode": "1x25G",
|
||||||
|
"autoneg": "off",
|
||||||
|
"fec": "rs"
|
||||||
|
},
|
||||||
|
"Ethernet26": {
|
||||||
|
"default_brkout_mode": "1x25G",
|
||||||
|
"autoneg": "off",
|
||||||
|
"fec": "rs"
|
||||||
|
},
|
||||||
|
"Ethernet27": {
|
||||||
|
"default_brkout_mode": "1x25G",
|
||||||
|
"autoneg": "off",
|
||||||
|
"fec": "rs"
|
||||||
|
},
|
||||||
|
"Ethernet28": {
|
||||||
|
"default_brkout_mode": "1x25G",
|
||||||
|
"autoneg": "off",
|
||||||
|
"fec": "rs"
|
||||||
|
},
|
||||||
|
"Ethernet29": {
|
||||||
|
"default_brkout_mode": "1x25G",
|
||||||
|
"autoneg": "off",
|
||||||
|
"fec": "rs"
|
||||||
|
},
|
||||||
|
"Ethernet30": {
|
||||||
|
"default_brkout_mode": "1x25G",
|
||||||
|
"autoneg": "off",
|
||||||
|
"fec": "rs"
|
||||||
|
},
|
||||||
|
"Ethernet31": {
|
||||||
|
"default_brkout_mode": "1x25G",
|
||||||
|
"autoneg": "off",
|
||||||
|
"fec": "rs"
|
||||||
|
},
|
||||||
|
"Ethernet32": {
|
||||||
|
"default_brkout_mode": "1x25G",
|
||||||
|
"autoneg": "off",
|
||||||
|
"fec": "rs"
|
||||||
|
},
|
||||||
|
"Ethernet33": {
|
||||||
|
"default_brkout_mode": "1x25G",
|
||||||
|
"autoneg": "off",
|
||||||
|
"fec": "rs"
|
||||||
|
},
|
||||||
|
"Ethernet34": {
|
||||||
|
"default_brkout_mode": "1x25G",
|
||||||
|
"autoneg": "off",
|
||||||
|
"fec": "rs"
|
||||||
|
},
|
||||||
|
"Ethernet35": {
|
||||||
|
"default_brkout_mode": "1x25G",
|
||||||
|
"autoneg": "off",
|
||||||
|
"fec": "rs"
|
||||||
|
},
|
||||||
|
"Ethernet36": {
|
||||||
|
"default_brkout_mode": "1x25G",
|
||||||
|
"autoneg": "off",
|
||||||
|
"fec": "rs"
|
||||||
|
},
|
||||||
|
"Ethernet37": {
|
||||||
|
"default_brkout_mode": "1x25G",
|
||||||
|
"autoneg": "off",
|
||||||
|
"fec": "rs"
|
||||||
|
},
|
||||||
|
"Ethernet38": {
|
||||||
|
"default_brkout_mode": "1x25G",
|
||||||
|
"autoneg": "off",
|
||||||
|
"fec": "rs"
|
||||||
|
},
|
||||||
|
"Ethernet39": {
|
||||||
|
"default_brkout_mode": "1x25G",
|
||||||
|
"autoneg": "off",
|
||||||
|
"fec": "rs"
|
||||||
|
},
|
||||||
|
"Ethernet40": {
|
||||||
|
"default_brkout_mode": "1x25G",
|
||||||
|
"autoneg": "off",
|
||||||
|
"fec": "rs"
|
||||||
|
},
|
||||||
|
"Ethernet41": {
|
||||||
|
"default_brkout_mode": "1x25G",
|
||||||
|
"autoneg": "off",
|
||||||
|
"fec": "rs"
|
||||||
|
},
|
||||||
|
"Ethernet42": {
|
||||||
|
"default_brkout_mode": "1x25G",
|
||||||
|
"autoneg": "off",
|
||||||
|
"fec": "rs"
|
||||||
|
},
|
||||||
|
"Ethernet43": {
|
||||||
|
"default_brkout_mode": "1x25G",
|
||||||
|
"autoneg": "off",
|
||||||
|
"fec": "rs"
|
||||||
|
},
|
||||||
|
"Ethernet44": {
|
||||||
|
"default_brkout_mode": "1x25G",
|
||||||
|
"autoneg": "off",
|
||||||
|
"fec": "rs"
|
||||||
|
},
|
||||||
|
"Ethernet45": {
|
||||||
|
"default_brkout_mode": "1x25G",
|
||||||
|
"autoneg": "off",
|
||||||
|
"fec": "rs"
|
||||||
|
},
|
||||||
|
"Ethernet46": {
|
||||||
|
"default_brkout_mode": "1x25G",
|
||||||
|
"autoneg": "off",
|
||||||
|
"fec": "rs"
|
||||||
|
},
|
||||||
|
"Ethernet47": {
|
||||||
|
"default_brkout_mode": "1x25G",
|
||||||
|
"autoneg": "off",
|
||||||
|
"fec": "rs"
|
||||||
|
},
|
||||||
|
"Ethernet48": {
|
||||||
|
"default_brkout_mode": "1x100G",
|
||||||
|
"autoneg": "off",
|
||||||
|
"fec": "rs"
|
||||||
|
},
|
||||||
|
"Ethernet52": {
|
||||||
|
"default_brkout_mode": "1x100G",
|
||||||
|
"autoneg": "off",
|
||||||
|
"fec": "rs"
|
||||||
|
},
|
||||||
|
"Ethernet56": {
|
||||||
|
"default_brkout_mode": "1x100G",
|
||||||
|
"autoneg": "off",
|
||||||
|
"fec": "rs"
|
||||||
|
},
|
||||||
|
"Ethernet60": {
|
||||||
|
"default_brkout_mode": "1x100G",
|
||||||
|
"autoneg": "off",
|
||||||
|
"fec": "rs"
|
||||||
|
},
|
||||||
|
"Ethernet64": {
|
||||||
|
"default_brkout_mode": "1x100G",
|
||||||
|
"autoneg": "off",
|
||||||
|
"fec": "rs"
|
||||||
|
},
|
||||||
|
"Ethernet68": {
|
||||||
|
"default_brkout_mode": "1x100G",
|
||||||
|
"autoneg": "off",
|
||||||
|
"fec": "rs"
|
||||||
|
},
|
||||||
|
"Ethernet72": {
|
||||||
|
"default_brkout_mode": "1x100G",
|
||||||
|
"autoneg": "off",
|
||||||
|
"fec": "rs"
|
||||||
|
},
|
||||||
|
"Ethernet76": {
|
||||||
|
"default_brkout_mode": "1x100G",
|
||||||
|
"autoneg": "off",
|
||||||
|
"fec": "rs"
|
||||||
|
}
|
||||||
|
}
|
||||||
|
}
|
@ -0,0 +1,396 @@
|
|||||||
|
{
|
||||||
|
"interfaces": {
|
||||||
|
"Ethernet0": {
|
||||||
|
"index": "1",
|
||||||
|
"lanes": "49",
|
||||||
|
"breakout_modes": {
|
||||||
|
"1x25G": ["Eth1/1"]
|
||||||
|
}
|
||||||
|
},
|
||||||
|
"Ethernet1": {
|
||||||
|
"index": "2",
|
||||||
|
"lanes": "50",
|
||||||
|
"breakout_modes": {
|
||||||
|
"1x25G": ["Eth2/1"]
|
||||||
|
}
|
||||||
|
},
|
||||||
|
"Ethernet2": {
|
||||||
|
"index": "3",
|
||||||
|
"lanes": "51",
|
||||||
|
"breakout_modes": {
|
||||||
|
"1x25G": ["Eth3/1"]
|
||||||
|
}
|
||||||
|
},
|
||||||
|
"Ethernet3": {
|
||||||
|
"index": "4",
|
||||||
|
"lanes": "52",
|
||||||
|
"breakout_modes": {
|
||||||
|
"1x25G": ["Eth4/1"]
|
||||||
|
}
|
||||||
|
},
|
||||||
|
"Ethernet4": {
|
||||||
|
"index": "5",
|
||||||
|
"lanes": "57",
|
||||||
|
"breakout_modes": {
|
||||||
|
"1x25G": ["Eth5/1"]
|
||||||
|
}
|
||||||
|
},
|
||||||
|
"Ethernet5": {
|
||||||
|
"index": "6",
|
||||||
|
"lanes": "58",
|
||||||
|
"breakout_modes": {
|
||||||
|
"1x25G": ["Eth6/1"]
|
||||||
|
}
|
||||||
|
},
|
||||||
|
"Ethernet6": {
|
||||||
|
"index": "7",
|
||||||
|
"lanes": "59",
|
||||||
|
"breakout_modes": {
|
||||||
|
"1x25G": ["Eth7/1"]
|
||||||
|
}
|
||||||
|
},
|
||||||
|
"Ethernet7": {
|
||||||
|
"index": "8",
|
||||||
|
"lanes": "60",
|
||||||
|
"breakout_modes": {
|
||||||
|
"1x25G": ["Eth8/1"]
|
||||||
|
}
|
||||||
|
},
|
||||||
|
"Ethernet8": {
|
||||||
|
"index": "9",
|
||||||
|
"lanes": "61",
|
||||||
|
"breakout_modes": {
|
||||||
|
"1x25G": ["Eth9/1"]
|
||||||
|
}
|
||||||
|
},
|
||||||
|
"Ethernet9": {
|
||||||
|
"index": "10",
|
||||||
|
"lanes": "62",
|
||||||
|
"breakout_modes": {
|
||||||
|
"1x25G": ["Eth10/1"]
|
||||||
|
}
|
||||||
|
},
|
||||||
|
"Ethernet10": {
|
||||||
|
"index": "11",
|
||||||
|
"lanes": "63",
|
||||||
|
"breakout_modes": {
|
||||||
|
"1x25G": ["Eth11/1"]
|
||||||
|
}
|
||||||
|
},
|
||||||
|
"Ethernet11": {
|
||||||
|
"index": "12",
|
||||||
|
"lanes": "64",
|
||||||
|
"breakout_modes": {
|
||||||
|
"1x25G": ["Eth12/1"]
|
||||||
|
}
|
||||||
|
},
|
||||||
|
"Ethernet12": {
|
||||||
|
"index": "13",
|
||||||
|
"lanes": "77",
|
||||||
|
"breakout_modes": {
|
||||||
|
"1x25G": ["Eth13/1"]
|
||||||
|
}
|
||||||
|
},
|
||||||
|
"Ethernet13": {
|
||||||
|
"index": "14",
|
||||||
|
"lanes": "78",
|
||||||
|
"breakout_modes": {
|
||||||
|
"1x25G": ["Eth14/1"]
|
||||||
|
}
|
||||||
|
},
|
||||||
|
"Ethernet14": {
|
||||||
|
"index": "15",
|
||||||
|
"lanes": "79",
|
||||||
|
"breakout_modes": {
|
||||||
|
"1x25G": ["Eth15/1"]
|
||||||
|
}
|
||||||
|
},
|
||||||
|
"Ethernet15": {
|
||||||
|
"index": "16",
|
||||||
|
"lanes": "80",
|
||||||
|
"breakout_modes": {
|
||||||
|
"1x25G": ["Eth16/1"]
|
||||||
|
}
|
||||||
|
},
|
||||||
|
"Ethernet16": {
|
||||||
|
"index": "17",
|
||||||
|
"lanes": "85",
|
||||||
|
"breakout_modes": {
|
||||||
|
"1x25G": ["Eth17/1"]
|
||||||
|
}
|
||||||
|
},
|
||||||
|
"Ethernet17": {
|
||||||
|
"index": "18",
|
||||||
|
"lanes": "86",
|
||||||
|
"breakout_modes": {
|
||||||
|
"1x25G": ["Eth18/1"]
|
||||||
|
}
|
||||||
|
},
|
||||||
|
"Ethernet18": {
|
||||||
|
"index": "19",
|
||||||
|
"lanes": "87",
|
||||||
|
"breakout_modes": {
|
||||||
|
"1x25G": ["Eth19/1"]
|
||||||
|
}
|
||||||
|
},
|
||||||
|
"Ethernet19": {
|
||||||
|
"index": "20",
|
||||||
|
"lanes": "88",
|
||||||
|
"breakout_modes": {
|
||||||
|
"1x25G": ["Eth20/1"]
|
||||||
|
}
|
||||||
|
},
|
||||||
|
"Ethernet20": {
|
||||||
|
"index": "21",
|
||||||
|
"lanes": "93",
|
||||||
|
"breakout_modes": {
|
||||||
|
"1x25G": ["Eth21/1"]
|
||||||
|
}
|
||||||
|
},
|
||||||
|
"Ethernet21": {
|
||||||
|
"index": "22",
|
||||||
|
"lanes": "94",
|
||||||
|
"breakout_modes": {
|
||||||
|
"1x25G": ["Eth22/1"]
|
||||||
|
}
|
||||||
|
},
|
||||||
|
"Ethernet22": {
|
||||||
|
"index": "23",
|
||||||
|
"lanes": "95",
|
||||||
|
"breakout_modes": {
|
||||||
|
"1x25G": ["Eth23/1"]
|
||||||
|
}
|
||||||
|
},
|
||||||
|
"Ethernet23": {
|
||||||
|
"index": "24",
|
||||||
|
"lanes": "96",
|
||||||
|
"breakout_modes": {
|
||||||
|
"1x25G": ["Eth24/1"]
|
||||||
|
}
|
||||||
|
},
|
||||||
|
"Ethernet24": {
|
||||||
|
"index": "25",
|
||||||
|
"lanes": "13",
|
||||||
|
"breakout_modes": {
|
||||||
|
"1x25G": ["Eth25/1"]
|
||||||
|
}
|
||||||
|
},
|
||||||
|
"Ethernet25": {
|
||||||
|
"index": "26",
|
||||||
|
"lanes": "14",
|
||||||
|
"breakout_modes": {
|
||||||
|
"1x25G": ["Eth26/1"]
|
||||||
|
}
|
||||||
|
},
|
||||||
|
"Ethernet26": {
|
||||||
|
"index": "27",
|
||||||
|
"lanes": "15",
|
||||||
|
"breakout_modes": {
|
||||||
|
"1x25G": ["Eth27/1"]
|
||||||
|
}
|
||||||
|
},
|
||||||
|
"Ethernet27": {
|
||||||
|
"index": "28",
|
||||||
|
"lanes": "16",
|
||||||
|
"breakout_modes": {
|
||||||
|
"1x25G": ["Eth28/1"]
|
||||||
|
}
|
||||||
|
},
|
||||||
|
"Ethernet28": {
|
||||||
|
"index": "29",
|
||||||
|
"lanes": "21",
|
||||||
|
"breakout_modes": {
|
||||||
|
"1x25G": ["Eth29/1"]
|
||||||
|
}
|
||||||
|
},
|
||||||
|
"Ethernet29": {
|
||||||
|
"index": "30",
|
||||||
|
"lanes": "22",
|
||||||
|
"breakout_modes": {
|
||||||
|
"1x25G": ["Eth30/1"]
|
||||||
|
}
|
||||||
|
},
|
||||||
|
"Ethernet30": {
|
||||||
|
"index": "31",
|
||||||
|
"lanes": "23",
|
||||||
|
"breakout_modes": {
|
||||||
|
"1x25G": ["Eth31/1"]
|
||||||
|
}
|
||||||
|
},
|
||||||
|
"Ethernet31": {
|
||||||
|
"index": "32",
|
||||||
|
"lanes": "24",
|
||||||
|
"breakout_modes": {
|
||||||
|
"1x25G": ["Eth32/1"]
|
||||||
|
}
|
||||||
|
},
|
||||||
|
"Ethernet32": {
|
||||||
|
"index": "33",
|
||||||
|
"lanes": "29",
|
||||||
|
"breakout_modes": {
|
||||||
|
"1x25G": ["Eth33/1"]
|
||||||
|
}
|
||||||
|
},
|
||||||
|
"Ethernet33": {
|
||||||
|
"index": "34",
|
||||||
|
"lanes": "30",
|
||||||
|
"breakout_modes": {
|
||||||
|
"1x25G": ["Eth34/1"]
|
||||||
|
}
|
||||||
|
},
|
||||||
|
"Ethernet34": {
|
||||||
|
"index": "35",
|
||||||
|
"lanes": "31",
|
||||||
|
"breakout_modes": {
|
||||||
|
"1x25G": ["Eth35/1"]
|
||||||
|
}
|
||||||
|
},
|
||||||
|
"Ethernet35": {
|
||||||
|
"index": "36",
|
||||||
|
"lanes": "32",
|
||||||
|
"breakout_modes": {
|
||||||
|
"1x25G": ["Eth36/1"]
|
||||||
|
}
|
||||||
|
},
|
||||||
|
"Ethernet36": {
|
||||||
|
"index": "37",
|
||||||
|
"lanes": "97",
|
||||||
|
"breakout_modes": {
|
||||||
|
"1x25G": ["Eth37/1"]
|
||||||
|
}
|
||||||
|
},
|
||||||
|
"Ethernet37": {
|
||||||
|
"index": "38",
|
||||||
|
"lanes": "98",
|
||||||
|
"breakout_modes": {
|
||||||
|
"1x25G": ["Eth38/1"]
|
||||||
|
}
|
||||||
|
},
|
||||||
|
"Ethernet38": {
|
||||||
|
"index": "39",
|
||||||
|
"lanes": "99",
|
||||||
|
"breakout_modes": {
|
||||||
|
"1x25G": ["Eth39/1"]
|
||||||
|
}
|
||||||
|
},
|
||||||
|
"Ethernet39": {
|
||||||
|
"index": "40",
|
||||||
|
"lanes": "100",
|
||||||
|
"breakout_modes": {
|
||||||
|
"1x25G": ["Eth40/1"]
|
||||||
|
}
|
||||||
|
},
|
||||||
|
"Ethernet40": {
|
||||||
|
"index": "41",
|
||||||
|
"lanes": "105",
|
||||||
|
"breakout_modes": {
|
||||||
|
"1x25G": ["Eth41/1"]
|
||||||
|
}
|
||||||
|
},
|
||||||
|
"Ethernet41": {
|
||||||
|
"index": "42",
|
||||||
|
"lanes": "106",
|
||||||
|
"breakout_modes": {
|
||||||
|
"1x25G": ["Eth42/1"]
|
||||||
|
}
|
||||||
|
},
|
||||||
|
"Ethernet42": {
|
||||||
|
"index": "43",
|
||||||
|
"lanes": "107",
|
||||||
|
"breakout_modes": {
|
||||||
|
"1x25G": ["Eth43/1"]
|
||||||
|
}
|
||||||
|
},
|
||||||
|
"Ethernet43": {
|
||||||
|
"index": "44",
|
||||||
|
"lanes": "108",
|
||||||
|
"breakout_modes": {
|
||||||
|
"1x25G": ["Eth44/1"]
|
||||||
|
}
|
||||||
|
},
|
||||||
|
"Ethernet44": {
|
||||||
|
"index": "45",
|
||||||
|
"lanes": "113",
|
||||||
|
"breakout_modes": {
|
||||||
|
"1x25G": ["Eth45/1"]
|
||||||
|
}
|
||||||
|
},
|
||||||
|
"Ethernet45": {
|
||||||
|
"index": "46",
|
||||||
|
"lanes": "114",
|
||||||
|
"breakout_modes": {
|
||||||
|
"1x25G": ["Eth46/1"]
|
||||||
|
}
|
||||||
|
},
|
||||||
|
"Ethernet46": {
|
||||||
|
"index": "47",
|
||||||
|
"lanes": "115",
|
||||||
|
"breakout_modes": {
|
||||||
|
"1x25G": ["Eth47/1"]
|
||||||
|
}
|
||||||
|
},
|
||||||
|
"Ethernet47": {
|
||||||
|
"index": "48",
|
||||||
|
"lanes": "116",
|
||||||
|
"breakout_modes": {
|
||||||
|
"1x25G": ["Eth48/1"]
|
||||||
|
}
|
||||||
|
},
|
||||||
|
"Ethernet48": {
|
||||||
|
"index": "49,49,49,49",
|
||||||
|
"lanes": "65,66,67,68",
|
||||||
|
"breakout_modes": {
|
||||||
|
"1x100G": ["Eth49/1"]
|
||||||
|
}
|
||||||
|
},
|
||||||
|
"Ethernet52": {
|
||||||
|
"index": "50,50,50,50",
|
||||||
|
"lanes": "69,70,71,72",
|
||||||
|
"breakout_modes": {
|
||||||
|
"1x100G": ["Eth50/1"]
|
||||||
|
}
|
||||||
|
},
|
||||||
|
"Ethernet56": {
|
||||||
|
"index": "51,51,51,51",
|
||||||
|
"lanes": "121,122,123,124",
|
||||||
|
"breakout_modes": {
|
||||||
|
"1x100G": ["Eth51/1"]
|
||||||
|
}
|
||||||
|
},
|
||||||
|
"Ethernet60": {
|
||||||
|
"index": "52,52,52,52",
|
||||||
|
"lanes": "125,126,127,128",
|
||||||
|
"breakout_modes": {
|
||||||
|
"1x100G": ["Eth52/1"]
|
||||||
|
}
|
||||||
|
},
|
||||||
|
"Ethernet64": {
|
||||||
|
"index": "53,53,53,53",
|
||||||
|
"lanes": "1,2,3,4",
|
||||||
|
"breakout_modes": {
|
||||||
|
"1x100G": ["Eth53/1"]
|
||||||
|
}
|
||||||
|
},
|
||||||
|
"Ethernet68": {
|
||||||
|
"index": "54,54,54,54",
|
||||||
|
"lanes": "33,34,35,36",
|
||||||
|
"breakout_modes": {
|
||||||
|
"1x100G": ["Eth54/1"]
|
||||||
|
}
|
||||||
|
},
|
||||||
|
"Ethernet72": {
|
||||||
|
"index": "55,55,55,55",
|
||||||
|
"lanes": "5,6,7,8",
|
||||||
|
"breakout_modes": {
|
||||||
|
"1x100G": ["Eth55/1"]
|
||||||
|
}
|
||||||
|
},
|
||||||
|
"Ethernet76": {
|
||||||
|
"index": "56,56,56,56",
|
||||||
|
"lanes": "41,42,43,44",
|
||||||
|
"breakout_modes": {
|
||||||
|
"1x100G": ["Eth56/1"]
|
||||||
|
}
|
||||||
|
}
|
||||||
|
}
|
||||||
|
}
|
@ -0,0 +1,17 @@
|
|||||||
|
{
|
||||||
|
"chassis": {
|
||||||
|
"Questone_2": {
|
||||||
|
"component": {
|
||||||
|
"BIOS": {},
|
||||||
|
"ONIE": {},
|
||||||
|
"BMC": {},
|
||||||
|
"FPGA": {},
|
||||||
|
"CPLD COMe": {},
|
||||||
|
"CPLD BASE": {},
|
||||||
|
"CPLD SW1": {},
|
||||||
|
"CPLD SW2": {},
|
||||||
|
"SSD": {}
|
||||||
|
}
|
||||||
|
}
|
||||||
|
}
|
||||||
|
}
|
@ -0,0 +1,57 @@
|
|||||||
|
# name lanes alias index speed mtu admin_status fec
|
||||||
|
Ethernet0 49 Eth1/1 1 25000 9216 up rs
|
||||||
|
Ethernet1 50 Eth2/1 2 25000 9216 up rs
|
||||||
|
Ethernet2 51 Eth3/1 3 25000 9216 up rs
|
||||||
|
Ethernet3 52 Eth4/1 4 25000 9216 up rs
|
||||||
|
Ethernet4 57 Eth5/1 5 25000 9216 up rs
|
||||||
|
Ethernet5 58 Eth6/1 6 25000 9216 up rs
|
||||||
|
Ethernet6 59 Eth7/1 7 25000 9216 up rs
|
||||||
|
Ethernet7 60 Eth8/1 8 25000 9216 up rs
|
||||||
|
Ethernet8 61 Eth9/1 9 25000 9216 up rs
|
||||||
|
Ethernet9 62 Eth10/1 10 25000 9216 up rs
|
||||||
|
Ethernet10 63 Eth11/1 11 25000 9216 up rs
|
||||||
|
Ethernet11 64 Eth12/1 12 25000 9216 up rs
|
||||||
|
Ethernet12 77 Eth13/1 13 25000 9216 up rs
|
||||||
|
Ethernet13 78 Eth14/1 14 25000 9216 up rs
|
||||||
|
Ethernet14 79 Eth15/1 15 25000 9216 up rs
|
||||||
|
Ethernet15 80 Eth16/1 16 25000 9216 up rs
|
||||||
|
Ethernet16 85 Eth17/1 17 25000 9216 up rs
|
||||||
|
Ethernet17 86 Eth18/1 18 25000 9216 up rs
|
||||||
|
Ethernet18 87 Eth19/1 19 25000 9216 up rs
|
||||||
|
Ethernet19 88 Eth20/1 20 25000 9216 up rs
|
||||||
|
Ethernet20 93 Eth21/1 21 25000 9216 up rs
|
||||||
|
Ethernet21 94 Eth22/1 22 25000 9216 up rs
|
||||||
|
Ethernet22 95 Eth23/1 23 25000 9216 up rs
|
||||||
|
Ethernet23 96 Eth24/1 24 25000 9216 up rs
|
||||||
|
Ethernet24 13 Eth25/1 25 25000 9216 up rs
|
||||||
|
Ethernet25 14 Eth26/1 26 25000 9216 up rs
|
||||||
|
Ethernet26 15 Eth27/1 27 25000 9216 up rs
|
||||||
|
Ethernet27 16 Eth28/1 28 25000 9216 up rs
|
||||||
|
Ethernet28 21 Eth29/1 29 25000 9216 up rs
|
||||||
|
Ethernet29 22 Eth30/1 30 25000 9216 up rs
|
||||||
|
Ethernet30 23 Eth31/1 31 25000 9216 up rs
|
||||||
|
Ethernet31 24 Eth32/1 32 25000 9216 up rs
|
||||||
|
Ethernet32 29 Eth33/1 33 25000 9216 up rs
|
||||||
|
Ethernet33 30 Eth34/1 34 25000 9216 up rs
|
||||||
|
Ethernet34 31 Eth35/1 35 25000 9216 up rs
|
||||||
|
Ethernet35 32 Eth36/1 36 25000 9216 up rs
|
||||||
|
Ethernet36 97 Eth37/1 37 25000 9216 up rs
|
||||||
|
Ethernet37 98 Eth38/1 38 25000 9216 up rs
|
||||||
|
Ethernet38 99 Eth39/1 39 25000 9216 up rs
|
||||||
|
Ethernet39 100 Eth40/1 40 25000 9216 up rs
|
||||||
|
Ethernet40 105 Eth41/1 41 25000 9216 up rs
|
||||||
|
Ethernet41 106 Eth42/1 42 25000 9216 up rs
|
||||||
|
Ethernet42 107 Eth43/1 43 25000 9216 up rs
|
||||||
|
Ethernet43 108 Eth44/1 44 25000 9216 up rs
|
||||||
|
Ethernet44 113 Eth45/1 45 25000 9216 up rs
|
||||||
|
Ethernet45 114 Eth46/1 46 25000 9216 up rs
|
||||||
|
Ethernet46 115 Eth47/1 47 25000 9216 up rs
|
||||||
|
Ethernet47 116 Eth48/1 48 25000 9216 up rs
|
||||||
|
Ethernet48 65,66,67,68 Eth49/1 49 100000 9216 up rs
|
||||||
|
Ethernet52 69,70,71,72 Eth50/1 50 100000 9216 up rs
|
||||||
|
Ethernet56 121,122,123,124 Eth51/1 51 100000 9216 up rs
|
||||||
|
Ethernet60 125,126,127,128 Eth52/1 52 100000 9216 up rs
|
||||||
|
Ethernet64 1,2,3,4 Eth53/1 53 100000 9216 up rs
|
||||||
|
Ethernet68 33,34,35,36 Eth54/1 54 100000 9216 up rs
|
||||||
|
Ethernet72 5,6,7,8 Eth55/1 55 100000 9216 up rs
|
||||||
|
Ethernet76 41,42,43,44 Eth56/1 56 100000 9216 up rs
|
@ -0,0 +1 @@
|
|||||||
|
SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/td3-as13-48f8h.config.bcm
|
@ -0,0 +1,357 @@
|
|||||||
|
help_cli_enable=1
|
||||||
|
ifp_inports_support_enable=1
|
||||||
|
ipv6_lpm_128b_enable=0x1
|
||||||
|
l2_mem_entries=32768
|
||||||
|
l2xmsg_mode=1
|
||||||
|
l3_max_ecmp_mode=1
|
||||||
|
l3_mem_entries=49152
|
||||||
|
l3_alpm_enable=2
|
||||||
|
bcm_stat_interval=1000000
|
||||||
|
host_as_route_disable=1
|
||||||
|
lpm_scaling_enable=1
|
||||||
|
max_vp_lags=0
|
||||||
|
mem_cache_enable=0
|
||||||
|
memlist_enable=1
|
||||||
|
miim_intr_enable=0
|
||||||
|
module_64ports=1
|
||||||
|
oversubscribe_mode=1
|
||||||
|
parity_enable=1
|
||||||
|
serdes_lane_config_dfe=on
|
||||||
|
#serdes_fec_enable=1
|
||||||
|
serdes_if_type_xe=13
|
||||||
|
serdes_if_type_ce=14
|
||||||
|
pbmp_gport_stack.0=0x0000000000000000000000000000000000000000000000000000000000000000
|
||||||
|
#pbmp_xport_xe=0x48878787f8787808dfe1e0203e1e1e022
|
||||||
|
pbmp_xport_xe=0x8808787f87808088221e1e1fe1e1e1fe
|
||||||
|
|
||||||
|
|
||||||
|
portmap_1.0=1:100
|
||||||
|
portmap_5.0=5:100
|
||||||
|
portmap_13.0=13:25
|
||||||
|
portmap_14.0=14:25
|
||||||
|
portmap_15.0=15:25
|
||||||
|
portmap_16.0=16:25
|
||||||
|
portmap_21.0=21:25
|
||||||
|
portmap_22.0=22:25
|
||||||
|
portmap_23.0=23:25
|
||||||
|
portmap_24.0=24:25
|
||||||
|
portmap_29.0=29:25
|
||||||
|
portmap_30.0=30:25
|
||||||
|
portmap_31.0=31:25
|
||||||
|
portmap_32.0=32:25
|
||||||
|
portmap_33.0=33:100
|
||||||
|
portmap_41.0=41:100
|
||||||
|
portmap_49.0=49:25
|
||||||
|
portmap_50.0=50:25
|
||||||
|
portmap_51.0=51:25
|
||||||
|
portmap_52.0=52:25
|
||||||
|
portmap_57.0=57:25
|
||||||
|
portmap_58.0=58:25
|
||||||
|
portmap_59.0=59:25
|
||||||
|
portmap_60.0=60:25
|
||||||
|
portmap_61.0=61:25
|
||||||
|
portmap_62.0=62:25
|
||||||
|
portmap_63.0=63:25
|
||||||
|
portmap_64.0=64:25
|
||||||
|
portmap_67.0=65:100
|
||||||
|
portmap_71.0=69:100
|
||||||
|
portmap_79.0=77:25
|
||||||
|
portmap_80.0=78:25
|
||||||
|
portmap_81.0=79:25
|
||||||
|
portmap_82.0=80:25
|
||||||
|
portmap_87.0=85:25
|
||||||
|
portmap_88.0=86:25
|
||||||
|
portmap_89.0=87:25
|
||||||
|
portmap_90.0=88:25
|
||||||
|
portmap_95.0=93:25
|
||||||
|
portmap_96.0=94:25
|
||||||
|
portmap_97.0=95:25
|
||||||
|
portmap_98.0=96:25
|
||||||
|
portmap_99.0=97:25
|
||||||
|
portmap_100.0=98:25
|
||||||
|
portmap_101.0=99:25
|
||||||
|
portmap_102.0=100:25
|
||||||
|
portmap_107.0=105:25
|
||||||
|
portmap_108.0=106:25
|
||||||
|
portmap_109.0=107:25
|
||||||
|
portmap_110.0=108:25
|
||||||
|
portmap_115.0=113:25
|
||||||
|
portmap_116.0=114:25
|
||||||
|
portmap_117.0=115:25
|
||||||
|
portmap_118.0=116:25
|
||||||
|
portmap_123.0=121:100
|
||||||
|
portmap_127.0=125:100
|
||||||
|
|
||||||
|
phy_chain_tx_lane_map_physical{1.0}=0x0123
|
||||||
|
phy_chain_rx_lane_map_physical{1.0}=0x1302
|
||||||
|
phy_chain_tx_lane_map_physical{5.0}=0x1032
|
||||||
|
phy_chain_rx_lane_map_physical{5.0}=0x1302
|
||||||
|
phy_chain_tx_lane_map_physical{13.0}=0x0123
|
||||||
|
phy_chain_rx_lane_map_physical{13.0}=0x1032
|
||||||
|
phy_chain_tx_lane_map_physical{21.0}=0x0123
|
||||||
|
phy_chain_rx_lane_map_physical{21.0}=0x1032
|
||||||
|
phy_chain_tx_lane_map_physical{29.0}=0x0123
|
||||||
|
phy_chain_rx_lane_map_physical{29.0}=0x1032
|
||||||
|
phy_chain_tx_lane_map_physical{33.0}=0x1302
|
||||||
|
phy_chain_rx_lane_map_physical{33.0}=0x1032
|
||||||
|
phy_chain_tx_lane_map_physical{41.0}=0x3120
|
||||||
|
phy_chain_rx_lane_map_physical{41.0}=0x1032
|
||||||
|
phy_chain_tx_lane_map_physical{49.0}=0x0123
|
||||||
|
phy_chain_rx_lane_map_physical{49.0}=0x1032
|
||||||
|
phy_chain_tx_lane_map_physical{57.0}=0x0123
|
||||||
|
phy_chain_rx_lane_map_physical{57.0}=0x1032
|
||||||
|
phy_chain_tx_lane_map_physical{61.0}=0x0123
|
||||||
|
phy_chain_rx_lane_map_physical{61.0}=0x1032
|
||||||
|
phy_chain_tx_lane_map_physical{65.0}=0x1302
|
||||||
|
phy_chain_rx_lane_map_physical{65.0}=0x1023
|
||||||
|
phy_chain_tx_lane_map_physical{69.0}=0x1032
|
||||||
|
phy_chain_rx_lane_map_physical{69.0}=0x0213
|
||||||
|
phy_chain_tx_lane_map_physical{77.0}=0x3210
|
||||||
|
phy_chain_rx_lane_map_physical{77.0}=0x2301
|
||||||
|
phy_chain_tx_lane_map_physical{85.0}=0x3210
|
||||||
|
phy_chain_rx_lane_map_physical{85.0}=0x2301
|
||||||
|
phy_chain_tx_lane_map_physical{93.0}=0x3210
|
||||||
|
phy_chain_rx_lane_map_physical{93.0}=0x2301
|
||||||
|
phy_chain_tx_lane_map_physical{97.0}=0x3210
|
||||||
|
phy_chain_rx_lane_map_physical{97.0}=0x2301
|
||||||
|
phy_chain_tx_lane_map_physical{105.0}=0x3210
|
||||||
|
phy_chain_rx_lane_map_physical{105.0}=0x2301
|
||||||
|
phy_chain_tx_lane_map_physical{113.0}=0x3210
|
||||||
|
phy_chain_rx_lane_map_physical{113.0}=0x2301
|
||||||
|
phy_chain_tx_lane_map_physical{121.0}=0x2301
|
||||||
|
phy_chain_rx_lane_map_physical{121.0}=0x2031
|
||||||
|
phy_chain_tx_lane_map_physical{125.0}=0x0132
|
||||||
|
phy_chain_rx_lane_map_physical{125.0}=0x3012
|
||||||
|
phy_chain_tx_polarity_flip_physical{1.0}=0x0
|
||||||
|
phy_chain_rx_polarity_flip_physical{1.0}=0x0
|
||||||
|
phy_chain_tx_polarity_flip_physical{2.0}=0x0
|
||||||
|
phy_chain_rx_polarity_flip_physical{2.0}=0x1
|
||||||
|
phy_chain_tx_polarity_flip_physical{3.0}=0x1
|
||||||
|
phy_chain_rx_polarity_flip_physical{3.0}=0x1
|
||||||
|
phy_chain_tx_polarity_flip_physical{4.0}=0x0
|
||||||
|
phy_chain_rx_polarity_flip_physical{4.0}=0x1
|
||||||
|
phy_chain_tx_polarity_flip_physical{5.0}=0x0
|
||||||
|
phy_chain_rx_polarity_flip_physical{5.0}=0x1
|
||||||
|
phy_chain_tx_polarity_flip_physical{6.0}=0x1
|
||||||
|
phy_chain_rx_polarity_flip_physical{6.0}=0x0
|
||||||
|
phy_chain_tx_polarity_flip_physical{7.0}=0x1
|
||||||
|
phy_chain_rx_polarity_flip_physical{7.0}=0x0
|
||||||
|
phy_chain_tx_polarity_flip_physical{8.0}=0x1
|
||||||
|
phy_chain_rx_polarity_flip_physical{8.0}=0x0
|
||||||
|
phy_chain_tx_polarity_flip_physical{13.0}=0x0
|
||||||
|
phy_chain_rx_polarity_flip_physical{13.0}=0x1
|
||||||
|
phy_chain_tx_polarity_flip_physical{14.0}=0x1
|
||||||
|
phy_chain_rx_polarity_flip_physical{14.0}=0x0
|
||||||
|
phy_chain_tx_polarity_flip_physical{15.0}=0x0
|
||||||
|
phy_chain_rx_polarity_flip_physical{15.0}=0x1
|
||||||
|
phy_chain_tx_polarity_flip_physical{16.0}=0x1
|
||||||
|
phy_chain_rx_polarity_flip_physical{16.0}=0x0
|
||||||
|
phy_chain_tx_polarity_flip_physical{21.0}=0x0
|
||||||
|
phy_chain_rx_polarity_flip_physical{21.0}=0x1
|
||||||
|
phy_chain_tx_polarity_flip_physical{22.0}=0x1
|
||||||
|
phy_chain_rx_polarity_flip_physical{22.0}=0x0
|
||||||
|
phy_chain_tx_polarity_flip_physical{23.0}=0x0
|
||||||
|
phy_chain_rx_polarity_flip_physical{23.0}=0x1
|
||||||
|
phy_chain_tx_polarity_flip_physical{24.0}=0x1
|
||||||
|
phy_chain_rx_polarity_flip_physical{24.0}=0x0
|
||||||
|
phy_chain_tx_polarity_flip_physical{29.0}=0x0
|
||||||
|
phy_chain_rx_polarity_flip_physical{29.0}=0x1
|
||||||
|
phy_chain_tx_polarity_flip_physical{30.0}=0x1
|
||||||
|
phy_chain_rx_polarity_flip_physical{30.0}=0x1
|
||||||
|
phy_chain_tx_polarity_flip_physical{31.0}=0x0
|
||||||
|
phy_chain_rx_polarity_flip_physical{31.0}=0x1
|
||||||
|
phy_chain_tx_polarity_flip_physical{32.0}=0x1
|
||||||
|
phy_chain_rx_polarity_flip_physical{32.0}=0x0
|
||||||
|
phy_chain_tx_polarity_flip_physical{33.0}=0x1
|
||||||
|
phy_chain_rx_polarity_flip_physical{33.0}=0x0
|
||||||
|
phy_chain_tx_polarity_flip_physical{34.0}=0x1
|
||||||
|
phy_chain_rx_polarity_flip_physical{34.0}=0x1
|
||||||
|
phy_chain_tx_polarity_flip_physical{35.0}=0x1
|
||||||
|
phy_chain_rx_polarity_flip_physical{35.0}=0x0
|
||||||
|
phy_chain_tx_polarity_flip_physical{36.0}=0x0
|
||||||
|
phy_chain_rx_polarity_flip_physical{36.0}=0x0
|
||||||
|
phy_chain_tx_polarity_flip_physical{41.0}=0x0
|
||||||
|
phy_chain_rx_polarity_flip_physical{41.0}=0x0
|
||||||
|
phy_chain_tx_polarity_flip_physical{42.0}=0x1
|
||||||
|
phy_chain_rx_polarity_flip_physical{42.0}=0x1
|
||||||
|
phy_chain_tx_polarity_flip_physical{43.0}=0x1
|
||||||
|
phy_chain_rx_polarity_flip_physical{43.0}=0x0
|
||||||
|
phy_chain_tx_polarity_flip_physical{44.0}=0x0
|
||||||
|
phy_chain_rx_polarity_flip_physical{44.0}=0x0
|
||||||
|
phy_chain_tx_polarity_flip_physical{49.0}=0x1
|
||||||
|
phy_chain_rx_polarity_flip_physical{49.0}=0x0
|
||||||
|
phy_chain_tx_polarity_flip_physical{50.0}=0x0
|
||||||
|
phy_chain_rx_polarity_flip_physical{50.0}=0x1
|
||||||
|
phy_chain_tx_polarity_flip_physical{51.0}=0x1
|
||||||
|
phy_chain_rx_polarity_flip_physical{51.0}=0x0
|
||||||
|
phy_chain_tx_polarity_flip_physical{52.0}=0x0
|
||||||
|
phy_chain_rx_polarity_flip_physical{52.0}=0x1
|
||||||
|
phy_chain_tx_polarity_flip_physical{57.0}=0x1
|
||||||
|
phy_chain_rx_polarity_flip_physical{57.0}=0x0
|
||||||
|
phy_chain_tx_polarity_flip_physical{58.0}=0x0
|
||||||
|
phy_chain_rx_polarity_flip_physical{58.0}=0x1
|
||||||
|
phy_chain_tx_polarity_flip_physical{59.0}=0x1
|
||||||
|
phy_chain_rx_polarity_flip_physical{59.0}=0x0
|
||||||
|
phy_chain_tx_polarity_flip_physical{60.0}=0x0
|
||||||
|
phy_chain_rx_polarity_flip_physical{60.0}=0x1
|
||||||
|
phy_chain_tx_polarity_flip_physical{61.0}=0x1
|
||||||
|
phy_chain_rx_polarity_flip_physical{61.0}=0x1
|
||||||
|
phy_chain_tx_polarity_flip_physical{62.0}=0x0
|
||||||
|
phy_chain_rx_polarity_flip_physical{62.0}=0x0
|
||||||
|
phy_chain_tx_polarity_flip_physical{63.0}=0x1
|
||||||
|
phy_chain_rx_polarity_flip_physical{63.0}=0x1
|
||||||
|
phy_chain_tx_polarity_flip_physical{64.0}=0x0
|
||||||
|
phy_chain_rx_polarity_flip_physical{64.0}=0x0
|
||||||
|
phy_chain_tx_polarity_flip_physical{65.0}=0x1
|
||||||
|
phy_chain_rx_polarity_flip_physical{65.0}=0x0
|
||||||
|
phy_chain_tx_polarity_flip_physical{66.0}=0x0
|
||||||
|
phy_chain_rx_polarity_flip_physical{66.0}=0x0
|
||||||
|
phy_chain_tx_polarity_flip_physical{67.0}=0x1
|
||||||
|
phy_chain_rx_polarity_flip_physical{67.0}=0x0
|
||||||
|
phy_chain_tx_polarity_flip_physical{68.0}=0x1
|
||||||
|
phy_chain_rx_polarity_flip_physical{68.0}=0x0
|
||||||
|
phy_chain_tx_polarity_flip_physical{69.0}=0x0
|
||||||
|
phy_chain_rx_polarity_flip_physical{69.0}=0x1
|
||||||
|
phy_chain_tx_polarity_flip_physical{70.0}=0x1
|
||||||
|
phy_chain_rx_polarity_flip_physical{70.0}=0x0
|
||||||
|
phy_chain_tx_polarity_flip_physical{71.0}=0x0
|
||||||
|
phy_chain_rx_polarity_flip_physical{71.0}=0x0
|
||||||
|
phy_chain_tx_polarity_flip_physical{72.0}=0x1
|
||||||
|
phy_chain_rx_polarity_flip_physical{72.0}=0x1
|
||||||
|
phy_chain_tx_polarity_flip_physical{77.0}=0x0
|
||||||
|
phy_chain_rx_polarity_flip_physical{77.0}=0x1
|
||||||
|
phy_chain_tx_polarity_flip_physical{78.0}=0x1
|
||||||
|
phy_chain_rx_polarity_flip_physical{78.0}=0x0
|
||||||
|
phy_chain_tx_polarity_flip_physical{79.0}=0x0
|
||||||
|
phy_chain_rx_polarity_flip_physical{79.0}=0x1
|
||||||
|
phy_chain_tx_polarity_flip_physical{80.0}=0x1
|
||||||
|
phy_chain_rx_polarity_flip_physical{80.0}=0x0
|
||||||
|
phy_chain_tx_polarity_flip_physical{85.0}=0x0
|
||||||
|
phy_chain_rx_polarity_flip_physical{85.0}=0x1
|
||||||
|
phy_chain_tx_polarity_flip_physical{86.0}=0x1
|
||||||
|
phy_chain_rx_polarity_flip_physical{86.0}=0x0
|
||||||
|
phy_chain_tx_polarity_flip_physical{87.0}=0x0
|
||||||
|
phy_chain_rx_polarity_flip_physical{87.0}=0x1
|
||||||
|
phy_chain_tx_polarity_flip_physical{88.0}=0x1
|
||||||
|
phy_chain_rx_polarity_flip_physical{88.0}=0x0
|
||||||
|
phy_chain_tx_polarity_flip_physical{93.0}=0x0
|
||||||
|
phy_chain_rx_polarity_flip_physical{93.0}=0x1
|
||||||
|
phy_chain_tx_polarity_flip_physical{94.0}=0x1
|
||||||
|
phy_chain_rx_polarity_flip_physical{94.0}=0x0
|
||||||
|
phy_chain_tx_polarity_flip_physical{95.0}=0x0
|
||||||
|
phy_chain_rx_polarity_flip_physical{95.0}=0x1
|
||||||
|
phy_chain_tx_polarity_flip_physical{96.0}=0x1
|
||||||
|
phy_chain_rx_polarity_flip_physical{96.0}=0x0
|
||||||
|
phy_chain_tx_polarity_flip_physical{97.0}=0x1
|
||||||
|
phy_chain_rx_polarity_flip_physical{97.0}=0x1
|
||||||
|
phy_chain_tx_polarity_flip_physical{98.0}=0x0
|
||||||
|
phy_chain_rx_polarity_flip_physical{98.0}=0x0
|
||||||
|
phy_chain_tx_polarity_flip_physical{99.0}=0x1
|
||||||
|
phy_chain_rx_polarity_flip_physical{99.0}=0x1
|
||||||
|
phy_chain_tx_polarity_flip_physical{100.0}=0x0
|
||||||
|
phy_chain_rx_polarity_flip_physical{100.0}=0x0
|
||||||
|
phy_chain_tx_polarity_flip_physical{105.0}=0x1
|
||||||
|
phy_chain_rx_polarity_flip_physical{105.0}=0x0
|
||||||
|
phy_chain_tx_polarity_flip_physical{106.0}=0x0
|
||||||
|
phy_chain_rx_polarity_flip_physical{106.0}=0x1
|
||||||
|
phy_chain_tx_polarity_flip_physical{107.0}=0x1
|
||||||
|
phy_chain_rx_polarity_flip_physical{107.0}=0x0
|
||||||
|
phy_chain_tx_polarity_flip_physical{108.0}=0x0
|
||||||
|
phy_chain_rx_polarity_flip_physical{108.0}=0x1
|
||||||
|
phy_chain_tx_polarity_flip_physical{113.0}=0x1
|
||||||
|
phy_chain_rx_polarity_flip_physical{113.0}=0x0
|
||||||
|
phy_chain_tx_polarity_flip_physical{114.0}=0x0
|
||||||
|
phy_chain_rx_polarity_flip_physical{114.0}=0x1
|
||||||
|
phy_chain_tx_polarity_flip_physical{115.0}=0x1
|
||||||
|
phy_chain_rx_polarity_flip_physical{115.0}=0x0
|
||||||
|
phy_chain_tx_polarity_flip_physical{116.0}=0x0
|
||||||
|
phy_chain_rx_polarity_flip_physical{116.0}=0x1
|
||||||
|
phy_chain_tx_polarity_flip_physical{121.0}=0x0
|
||||||
|
phy_chain_rx_polarity_flip_physical{121.0}=0x1
|
||||||
|
phy_chain_tx_polarity_flip_physical{122.0}=0x1
|
||||||
|
phy_chain_rx_polarity_flip_physical{122.0}=0x0
|
||||||
|
phy_chain_tx_polarity_flip_physical{123.0}=0x0
|
||||||
|
phy_chain_rx_polarity_flip_physical{123.0}=0x0
|
||||||
|
phy_chain_tx_polarity_flip_physical{124.0}=0x1
|
||||||
|
phy_chain_rx_polarity_flip_physical{124.0}=0x0
|
||||||
|
phy_chain_tx_polarity_flip_physical{125.0}=0x1
|
||||||
|
phy_chain_rx_polarity_flip_physical{125.0}=0x0
|
||||||
|
phy_chain_tx_polarity_flip_physical{126.0}=0x1
|
||||||
|
phy_chain_rx_polarity_flip_physical{126.0}=0x1
|
||||||
|
phy_chain_tx_polarity_flip_physical{127.0}=0x0
|
||||||
|
phy_chain_rx_polarity_flip_physical{127.0}=0x0
|
||||||
|
phy_chain_tx_polarity_flip_physical{128.0}=0x0
|
||||||
|
phy_chain_rx_polarity_flip_physical{128.0}=0x0
|
||||||
|
|
||||||
|
#MC P/N flip
|
||||||
|
phy_chain_tx_polarity_flip_physical{129.0}=0x0
|
||||||
|
phy_chain_rx_polarity_flip_physical{129.0}=0x1
|
||||||
|
phy_chain_tx_polarity_flip_physical{130.0}=0x0
|
||||||
|
phy_chain_rx_polarity_flip_physical{130.0}=0x0
|
||||||
|
phy_chain_tx_polarity_flip_physical{131.0}=0x1
|
||||||
|
phy_chain_rx_polarity_flip_physical{131.0}=0x0
|
||||||
|
phy_chain_tx_polarity_flip_physical{132.0}=0x0
|
||||||
|
phy_chain_rx_polarity_flip_physical{132.0}=0x1
|
||||||
|
|
||||||
|
dport_map_port_49=1
|
||||||
|
dport_map_port_50=2
|
||||||
|
dport_map_port_51=3
|
||||||
|
dport_map_port_52=4
|
||||||
|
dport_map_port_57=5
|
||||||
|
dport_map_port_58=6
|
||||||
|
dport_map_port_59=7
|
||||||
|
dport_map_port_60=8
|
||||||
|
dport_map_port_61=9
|
||||||
|
dport_map_port_62=10
|
||||||
|
dport_map_port_63=11
|
||||||
|
dport_map_port_64=12
|
||||||
|
dport_map_port_79=13
|
||||||
|
dport_map_port_80=14
|
||||||
|
dport_map_port_81=15
|
||||||
|
dport_map_port_82=16
|
||||||
|
dport_map_port_87=17
|
||||||
|
dport_map_port_88=18
|
||||||
|
dport_map_port_89=19
|
||||||
|
dport_map_port_90=20
|
||||||
|
dport_map_port_95=21
|
||||||
|
dport_map_port_96=22
|
||||||
|
dport_map_port_97=23
|
||||||
|
dport_map_port_98=24
|
||||||
|
dport_map_port_13=25
|
||||||
|
dport_map_port_14=26
|
||||||
|
dport_map_port_15=27
|
||||||
|
dport_map_port_16=28
|
||||||
|
dport_map_port_21=29
|
||||||
|
dport_map_port_22=30
|
||||||
|
dport_map_port_23=31
|
||||||
|
dport_map_port_24=32
|
||||||
|
dport_map_port_29=33
|
||||||
|
dport_map_port_30=34
|
||||||
|
dport_map_port_31=35
|
||||||
|
dport_map_port_32=36
|
||||||
|
dport_map_port_99=37
|
||||||
|
dport_map_port_100=38
|
||||||
|
dport_map_port_101=39
|
||||||
|
dport_map_port_102=40
|
||||||
|
dport_map_port_107=41
|
||||||
|
dport_map_port_108=42
|
||||||
|
dport_map_port_109=43
|
||||||
|
dport_map_port_110=44
|
||||||
|
dport_map_port_115=45
|
||||||
|
dport_map_port_116=46
|
||||||
|
dport_map_port_117=47
|
||||||
|
dport_map_port_118=48
|
||||||
|
dport_map_port_67=49
|
||||||
|
dport_map_port_71=50
|
||||||
|
dport_map_port_123=51
|
||||||
|
dport_map_port_127=52
|
||||||
|
dport_map_port_1=53
|
||||||
|
dport_map_port_33=54
|
||||||
|
dport_map_port_5=55
|
||||||
|
dport_map_port_41=56
|
||||||
|
|
||||||
|
reglist_enable=1
|
||||||
|
scache_filename=/tmp/scache
|
||||||
|
schan_intr_enable=0
|
||||||
|
stable_size=0x5500000
|
||||||
|
tdma_timeout_usec=3000000
|
BIN
device/celestica/x86_64-cel_questone_2-r0/Questone_2A/custom_led.bin
Executable file
BIN
device/celestica/x86_64-cel_questone_2-r0/Questone_2A/custom_led.bin
Executable file
Binary file not shown.
284
device/celestica/x86_64-cel_questone_2-r0/Questone_2A/hwsku.json
Normal file
284
device/celestica/x86_64-cel_questone_2-r0/Questone_2A/hwsku.json
Normal file
@ -0,0 +1,284 @@
|
|||||||
|
{
|
||||||
|
"interfaces": {
|
||||||
|
"Ethernet0": {
|
||||||
|
"default_brkout_mode": "1x25G",
|
||||||
|
"autoneg": "off",
|
||||||
|
"fec": "rs"
|
||||||
|
},
|
||||||
|
"Ethernet1": {
|
||||||
|
"default_brkout_mode": "1x25G",
|
||||||
|
"autoneg": "off",
|
||||||
|
"fec": "rs"
|
||||||
|
},
|
||||||
|
"Ethernet2": {
|
||||||
|
"default_brkout_mode": "1x25G",
|
||||||
|
"autoneg": "off",
|
||||||
|
"fec": "rs"
|
||||||
|
},
|
||||||
|
"Ethernet3": {
|
||||||
|
"default_brkout_mode": "1x25G",
|
||||||
|
"autoneg": "off",
|
||||||
|
"fec": "rs"
|
||||||
|
},
|
||||||
|
"Ethernet4": {
|
||||||
|
"default_brkout_mode": "1x25G",
|
||||||
|
"autoneg": "off",
|
||||||
|
"fec": "rs"
|
||||||
|
},
|
||||||
|
"Ethernet5": {
|
||||||
|
"default_brkout_mode": "1x25G",
|
||||||
|
"autoneg": "off",
|
||||||
|
"fec": "rs"
|
||||||
|
},
|
||||||
|
"Ethernet6": {
|
||||||
|
"default_brkout_mode": "1x25G",
|
||||||
|
"autoneg": "off",
|
||||||
|
"fec": "rs"
|
||||||
|
},
|
||||||
|
"Ethernet7": {
|
||||||
|
"default_brkout_mode": "1x25G",
|
||||||
|
"autoneg": "off",
|
||||||
|
"fec": "rs"
|
||||||
|
},
|
||||||
|
"Ethernet8": {
|
||||||
|
"default_brkout_mode": "1x25G",
|
||||||
|
"autoneg": "off",
|
||||||
|
"fec": "rs"
|
||||||
|
},
|
||||||
|
"Ethernet9": {
|
||||||
|
"default_brkout_mode": "1x25G",
|
||||||
|
"autoneg": "off",
|
||||||
|
"fec": "rs"
|
||||||
|
},
|
||||||
|
"Ethernet10": {
|
||||||
|
"default_brkout_mode": "1x25G",
|
||||||
|
"autoneg": "off",
|
||||||
|
"fec": "rs"
|
||||||
|
},
|
||||||
|
"Ethernet11": {
|
||||||
|
"default_brkout_mode": "1x25G",
|
||||||
|
"autoneg": "off",
|
||||||
|
"fec": "rs"
|
||||||
|
},
|
||||||
|
"Ethernet12": {
|
||||||
|
"default_brkout_mode": "1x25G",
|
||||||
|
"autoneg": "off",
|
||||||
|
"fec": "rs"
|
||||||
|
},
|
||||||
|
"Ethernet13": {
|
||||||
|
"default_brkout_mode": "1x25G",
|
||||||
|
"autoneg": "off",
|
||||||
|
"fec": "rs"
|
||||||
|
},
|
||||||
|
"Ethernet14": {
|
||||||
|
"default_brkout_mode": "1x25G",
|
||||||
|
"autoneg": "off",
|
||||||
|
"fec": "rs"
|
||||||
|
},
|
||||||
|
"Ethernet15": {
|
||||||
|
"default_brkout_mode": "1x25G",
|
||||||
|
"autoneg": "off",
|
||||||
|
"fec": "rs"
|
||||||
|
},
|
||||||
|
"Ethernet16": {
|
||||||
|
"default_brkout_mode": "1x25G",
|
||||||
|
"autoneg": "off",
|
||||||
|
"fec": "rs"
|
||||||
|
},
|
||||||
|
"Ethernet17": {
|
||||||
|
"default_brkout_mode": "1x25G",
|
||||||
|
"autoneg": "off",
|
||||||
|
"fec": "rs"
|
||||||
|
},
|
||||||
|
"Ethernet18": {
|
||||||
|
"default_brkout_mode": "1x25G",
|
||||||
|
"autoneg": "off",
|
||||||
|
"fec": "rs"
|
||||||
|
},
|
||||||
|
"Ethernet19": {
|
||||||
|
"default_brkout_mode": "1x25G",
|
||||||
|
"autoneg": "off",
|
||||||
|
"fec": "rs"
|
||||||
|
},
|
||||||
|
"Ethernet20": {
|
||||||
|
"default_brkout_mode": "1x25G",
|
||||||
|
"autoneg": "off",
|
||||||
|
"fec": "rs"
|
||||||
|
},
|
||||||
|
"Ethernet21": {
|
||||||
|
"default_brkout_mode": "1x25G",
|
||||||
|
"autoneg": "off",
|
||||||
|
"fec": "rs"
|
||||||
|
},
|
||||||
|
"Ethernet22": {
|
||||||
|
"default_brkout_mode": "1x25G",
|
||||||
|
"autoneg": "off",
|
||||||
|
"fec": "rs"
|
||||||
|
},
|
||||||
|
"Ethernet23": {
|
||||||
|
"default_brkout_mode": "1x25G",
|
||||||
|
"autoneg": "off",
|
||||||
|
"fec": "rs"
|
||||||
|
},
|
||||||
|
"Ethernet24": {
|
||||||
|
"default_brkout_mode": "1x25G",
|
||||||
|
"autoneg": "off",
|
||||||
|
"fec": "rs"
|
||||||
|
},
|
||||||
|
"Ethernet25": {
|
||||||
|
"default_brkout_mode": "1x25G",
|
||||||
|
"autoneg": "off",
|
||||||
|
"fec": "rs"
|
||||||
|
},
|
||||||
|
"Ethernet26": {
|
||||||
|
"default_brkout_mode": "1x25G",
|
||||||
|
"autoneg": "off",
|
||||||
|
"fec": "rs"
|
||||||
|
},
|
||||||
|
"Ethernet27": {
|
||||||
|
"default_brkout_mode": "1x25G",
|
||||||
|
"autoneg": "off",
|
||||||
|
"fec": "rs"
|
||||||
|
},
|
||||||
|
"Ethernet28": {
|
||||||
|
"default_brkout_mode": "1x25G",
|
||||||
|
"autoneg": "off",
|
||||||
|
"fec": "rs"
|
||||||
|
},
|
||||||
|
"Ethernet29": {
|
||||||
|
"default_brkout_mode": "1x25G",
|
||||||
|
"autoneg": "off",
|
||||||
|
"fec": "rs"
|
||||||
|
},
|
||||||
|
"Ethernet30": {
|
||||||
|
"default_brkout_mode": "1x25G",
|
||||||
|
"autoneg": "off",
|
||||||
|
"fec": "rs"
|
||||||
|
},
|
||||||
|
"Ethernet31": {
|
||||||
|
"default_brkout_mode": "1x25G",
|
||||||
|
"autoneg": "off",
|
||||||
|
"fec": "rs"
|
||||||
|
},
|
||||||
|
"Ethernet32": {
|
||||||
|
"default_brkout_mode": "1x25G",
|
||||||
|
"autoneg": "off",
|
||||||
|
"fec": "rs"
|
||||||
|
},
|
||||||
|
"Ethernet33": {
|
||||||
|
"default_brkout_mode": "1x25G",
|
||||||
|
"autoneg": "off",
|
||||||
|
"fec": "rs"
|
||||||
|
},
|
||||||
|
"Ethernet34": {
|
||||||
|
"default_brkout_mode": "1x25G",
|
||||||
|
"autoneg": "off",
|
||||||
|
"fec": "rs"
|
||||||
|
},
|
||||||
|
"Ethernet35": {
|
||||||
|
"default_brkout_mode": "1x25G",
|
||||||
|
"autoneg": "off",
|
||||||
|
"fec": "rs"
|
||||||
|
},
|
||||||
|
"Ethernet36": {
|
||||||
|
"default_brkout_mode": "1x25G",
|
||||||
|
"autoneg": "off",
|
||||||
|
"fec": "rs"
|
||||||
|
},
|
||||||
|
"Ethernet37": {
|
||||||
|
"default_brkout_mode": "1x25G",
|
||||||
|
"autoneg": "off",
|
||||||
|
"fec": "rs"
|
||||||
|
},
|
||||||
|
"Ethernet38": {
|
||||||
|
"default_brkout_mode": "1x25G",
|
||||||
|
"autoneg": "off",
|
||||||
|
"fec": "rs"
|
||||||
|
},
|
||||||
|
"Ethernet39": {
|
||||||
|
"default_brkout_mode": "1x25G",
|
||||||
|
"autoneg": "off",
|
||||||
|
"fec": "rs"
|
||||||
|
},
|
||||||
|
"Ethernet40": {
|
||||||
|
"default_brkout_mode": "1x25G",
|
||||||
|
"autoneg": "off",
|
||||||
|
"fec": "rs"
|
||||||
|
},
|
||||||
|
"Ethernet41": {
|
||||||
|
"default_brkout_mode": "1x25G",
|
||||||
|
"autoneg": "off",
|
||||||
|
"fec": "rs"
|
||||||
|
},
|
||||||
|
"Ethernet42": {
|
||||||
|
"default_brkout_mode": "1x25G",
|
||||||
|
"autoneg": "off",
|
||||||
|
"fec": "rs"
|
||||||
|
},
|
||||||
|
"Ethernet43": {
|
||||||
|
"default_brkout_mode": "1x25G",
|
||||||
|
"autoneg": "off",
|
||||||
|
"fec": "rs"
|
||||||
|
},
|
||||||
|
"Ethernet44": {
|
||||||
|
"default_brkout_mode": "1x25G",
|
||||||
|
"autoneg": "off",
|
||||||
|
"fec": "rs"
|
||||||
|
},
|
||||||
|
"Ethernet45": {
|
||||||
|
"default_brkout_mode": "1x25G",
|
||||||
|
"autoneg": "off",
|
||||||
|
"fec": "rs"
|
||||||
|
},
|
||||||
|
"Ethernet46": {
|
||||||
|
"default_brkout_mode": "1x25G",
|
||||||
|
"autoneg": "off",
|
||||||
|
"fec": "rs"
|
||||||
|
},
|
||||||
|
"Ethernet47": {
|
||||||
|
"default_brkout_mode": "1x25G",
|
||||||
|
"autoneg": "off",
|
||||||
|
"fec": "rs"
|
||||||
|
},
|
||||||
|
"Ethernet48": {
|
||||||
|
"default_brkout_mode": "1x100G",
|
||||||
|
"autoneg": "off",
|
||||||
|
"fec": "rs"
|
||||||
|
},
|
||||||
|
"Ethernet52": {
|
||||||
|
"default_brkout_mode": "1x100G",
|
||||||
|
"autoneg": "off",
|
||||||
|
"fec": "rs"
|
||||||
|
},
|
||||||
|
"Ethernet56": {
|
||||||
|
"default_brkout_mode": "1x100G",
|
||||||
|
"autoneg": "off",
|
||||||
|
"fec": "rs"
|
||||||
|
},
|
||||||
|
"Ethernet60": {
|
||||||
|
"default_brkout_mode": "1x100G",
|
||||||
|
"autoneg": "off",
|
||||||
|
"fec": "rs"
|
||||||
|
},
|
||||||
|
"Ethernet64": {
|
||||||
|
"default_brkout_mode": "1x100G",
|
||||||
|
"autoneg": "off",
|
||||||
|
"fec": "rs"
|
||||||
|
},
|
||||||
|
"Ethernet68": {
|
||||||
|
"default_brkout_mode": "1x100G",
|
||||||
|
"autoneg": "off",
|
||||||
|
"fec": "rs"
|
||||||
|
},
|
||||||
|
"Ethernet72": {
|
||||||
|
"default_brkout_mode": "1x100G",
|
||||||
|
"autoneg": "off",
|
||||||
|
"fec": "rs"
|
||||||
|
},
|
||||||
|
"Ethernet76": {
|
||||||
|
"default_brkout_mode": "1x100G",
|
||||||
|
"autoneg": "off",
|
||||||
|
"fec": "rs"
|
||||||
|
}
|
||||||
|
}
|
||||||
|
}
|
@ -0,0 +1,396 @@
|
|||||||
|
{
|
||||||
|
"interfaces": {
|
||||||
|
"Ethernet0": {
|
||||||
|
"index": "1",
|
||||||
|
"lanes": "29",
|
||||||
|
"breakout_modes": {
|
||||||
|
"1x25G": ["Eth1/1"]
|
||||||
|
}
|
||||||
|
},
|
||||||
|
"Ethernet1": {
|
||||||
|
"index": "2",
|
||||||
|
"lanes": "30",
|
||||||
|
"breakout_modes": {
|
||||||
|
"1x25G": ["Eth2/1"]
|
||||||
|
}
|
||||||
|
},
|
||||||
|
"Ethernet2": {
|
||||||
|
"index": "3",
|
||||||
|
"lanes": "31",
|
||||||
|
"breakout_modes": {
|
||||||
|
"1x25G": ["Eth3/1"]
|
||||||
|
}
|
||||||
|
},
|
||||||
|
"Ethernet3": {
|
||||||
|
"index": "4",
|
||||||
|
"lanes": "32",
|
||||||
|
"breakout_modes": {
|
||||||
|
"1x25G": ["Eth4/1"]
|
||||||
|
}
|
||||||
|
},
|
||||||
|
"Ethernet4": {
|
||||||
|
"index": "5",
|
||||||
|
"lanes": "33",
|
||||||
|
"breakout_modes": {
|
||||||
|
"1x25G": ["Eth5/1"]
|
||||||
|
}
|
||||||
|
},
|
||||||
|
"Ethernet5": {
|
||||||
|
"index": "6",
|
||||||
|
"lanes": "34",
|
||||||
|
"breakout_modes": {
|
||||||
|
"1x25G": ["Eth6/1"]
|
||||||
|
}
|
||||||
|
},
|
||||||
|
"Ethernet6": {
|
||||||
|
"index": "7",
|
||||||
|
"lanes": "35",
|
||||||
|
"breakout_modes": {
|
||||||
|
"1x25G": ["Eth7/1"]
|
||||||
|
}
|
||||||
|
},
|
||||||
|
"Ethernet7": {
|
||||||
|
"index": "8",
|
||||||
|
"lanes": "36",
|
||||||
|
"breakout_modes": {
|
||||||
|
"1x25G": ["Eth8/1"]
|
||||||
|
}
|
||||||
|
},
|
||||||
|
"Ethernet8": {
|
||||||
|
"index": "9",
|
||||||
|
"lanes": "37",
|
||||||
|
"breakout_modes": {
|
||||||
|
"1x25G": ["Eth9/1"]
|
||||||
|
}
|
||||||
|
},
|
||||||
|
"Ethernet9": {
|
||||||
|
"index": "10",
|
||||||
|
"lanes": "38",
|
||||||
|
"breakout_modes": {
|
||||||
|
"1x25G": ["Eth10/1"]
|
||||||
|
}
|
||||||
|
},
|
||||||
|
"Ethernet10": {
|
||||||
|
"index": "11",
|
||||||
|
"lanes": "39",
|
||||||
|
"breakout_modes": {
|
||||||
|
"1x25G": ["Eth11/1"]
|
||||||
|
}
|
||||||
|
},
|
||||||
|
"Ethernet11": {
|
||||||
|
"index": "12",
|
||||||
|
"lanes": "40",
|
||||||
|
"breakout_modes": {
|
||||||
|
"1x25G": ["Eth12/1"]
|
||||||
|
}
|
||||||
|
},
|
||||||
|
"Ethernet12": {
|
||||||
|
"index": "13",
|
||||||
|
"lanes": "49",
|
||||||
|
"breakout_modes": {
|
||||||
|
"1x25G": ["Eth13/1"]
|
||||||
|
}
|
||||||
|
},
|
||||||
|
"Ethernet13": {
|
||||||
|
"index": "14",
|
||||||
|
"lanes": "50",
|
||||||
|
"breakout_modes": {
|
||||||
|
"1x25G": ["Eth14/1"]
|
||||||
|
}
|
||||||
|
},
|
||||||
|
"Ethernet14": {
|
||||||
|
"index": "15",
|
||||||
|
"lanes": "51",
|
||||||
|
"breakout_modes": {
|
||||||
|
"1x25G": ["Eth15/1"]
|
||||||
|
}
|
||||||
|
},
|
||||||
|
"Ethernet15": {
|
||||||
|
"index": "16",
|
||||||
|
"lanes": "52",
|
||||||
|
"breakout_modes": {
|
||||||
|
"1x25G": ["Eth16/1"]
|
||||||
|
}
|
||||||
|
},
|
||||||
|
"Ethernet16": {
|
||||||
|
"index": "17",
|
||||||
|
"lanes": "53",
|
||||||
|
"breakout_modes": {
|
||||||
|
"1x25G": ["Eth17/1"]
|
||||||
|
}
|
||||||
|
},
|
||||||
|
"Ethernet17": {
|
||||||
|
"index": "18",
|
||||||
|
"lanes": "54",
|
||||||
|
"breakout_modes": {
|
||||||
|
"1x25G": ["Eth18/1"]
|
||||||
|
}
|
||||||
|
},
|
||||||
|
"Ethernet18": {
|
||||||
|
"index": "19",
|
||||||
|
"lanes": "55",
|
||||||
|
"breakout_modes": {
|
||||||
|
"1x25G": ["Eth19/1"]
|
||||||
|
}
|
||||||
|
},
|
||||||
|
"Ethernet19": {
|
||||||
|
"index": "20",
|
||||||
|
"lanes": "56",
|
||||||
|
"breakout_modes": {
|
||||||
|
"1x25G": ["Eth20/1"]
|
||||||
|
}
|
||||||
|
},
|
||||||
|
"Ethernet20": {
|
||||||
|
"index": "21",
|
||||||
|
"lanes": "57",
|
||||||
|
"breakout_modes": {
|
||||||
|
"1x25G": ["Eth21/1"]
|
||||||
|
}
|
||||||
|
},
|
||||||
|
"Ethernet21": {
|
||||||
|
"index": "22",
|
||||||
|
"lanes": "58",
|
||||||
|
"breakout_modes": {
|
||||||
|
"1x25G": ["Eth22/1"]
|
||||||
|
}
|
||||||
|
},
|
||||||
|
"Ethernet22": {
|
||||||
|
"index": "23",
|
||||||
|
"lanes": "59",
|
||||||
|
"breakout_modes": {
|
||||||
|
"1x25G": ["Eth23/1"]
|
||||||
|
}
|
||||||
|
},
|
||||||
|
"Ethernet23": {
|
||||||
|
"index": "24",
|
||||||
|
"lanes": "60",
|
||||||
|
"breakout_modes": {
|
||||||
|
"1x25G": ["Eth24/1"]
|
||||||
|
}
|
||||||
|
},
|
||||||
|
"Ethernet24": {
|
||||||
|
"index": "25",
|
||||||
|
"lanes": "9",
|
||||||
|
"breakout_modes": {
|
||||||
|
"1x25G": ["Eth25/1"]
|
||||||
|
}
|
||||||
|
},
|
||||||
|
"Ethernet25": {
|
||||||
|
"index": "26",
|
||||||
|
"lanes": "10",
|
||||||
|
"breakout_modes": {
|
||||||
|
"1x25G": ["Eth26/1"]
|
||||||
|
}
|
||||||
|
},
|
||||||
|
"Ethernet26": {
|
||||||
|
"index": "27",
|
||||||
|
"lanes": "11",
|
||||||
|
"breakout_modes": {
|
||||||
|
"1x25G": ["Eth27/1"]
|
||||||
|
}
|
||||||
|
},
|
||||||
|
"Ethernet27": {
|
||||||
|
"index": "28",
|
||||||
|
"lanes": "12",
|
||||||
|
"breakout_modes": {
|
||||||
|
"1x25G": ["Eth28/1"]
|
||||||
|
}
|
||||||
|
},
|
||||||
|
"Ethernet28": {
|
||||||
|
"index": "29",
|
||||||
|
"lanes": "13",
|
||||||
|
"breakout_modes": {
|
||||||
|
"1x25G": ["Eth29/1"]
|
||||||
|
}
|
||||||
|
},
|
||||||
|
"Ethernet29": {
|
||||||
|
"index": "30",
|
||||||
|
"lanes": "14",
|
||||||
|
"breakout_modes": {
|
||||||
|
"1x25G": ["Eth30/1"]
|
||||||
|
}
|
||||||
|
},
|
||||||
|
"Ethernet30": {
|
||||||
|
"index": "31",
|
||||||
|
"lanes": "15",
|
||||||
|
"breakout_modes": {
|
||||||
|
"1x25G": ["Eth31/1"]
|
||||||
|
}
|
||||||
|
},
|
||||||
|
"Ethernet31": {
|
||||||
|
"index": "32",
|
||||||
|
"lanes": "16",
|
||||||
|
"breakout_modes": {
|
||||||
|
"1x25G": ["Eth32/1"]
|
||||||
|
}
|
||||||
|
},
|
||||||
|
"Ethernet32": {
|
||||||
|
"index": "33",
|
||||||
|
"lanes": "17",
|
||||||
|
"breakout_modes": {
|
||||||
|
"1x25G": ["Eth33/1"]
|
||||||
|
}
|
||||||
|
},
|
||||||
|
"Ethernet33": {
|
||||||
|
"index": "34",
|
||||||
|
"lanes": "18",
|
||||||
|
"breakout_modes": {
|
||||||
|
"1x25G": ["Eth34/1"]
|
||||||
|
}
|
||||||
|
},
|
||||||
|
"Ethernet34": {
|
||||||
|
"index": "35",
|
||||||
|
"lanes": "19",
|
||||||
|
"breakout_modes": {
|
||||||
|
"1x25G": ["Eth35/1"]
|
||||||
|
}
|
||||||
|
},
|
||||||
|
"Ethernet35": {
|
||||||
|
"index": "36",
|
||||||
|
"lanes": "20",
|
||||||
|
"breakout_modes": {
|
||||||
|
"1x25G": ["Eth36/1"]
|
||||||
|
}
|
||||||
|
},
|
||||||
|
"Ethernet36": {
|
||||||
|
"index": "37",
|
||||||
|
"lanes": "61",
|
||||||
|
"breakout_modes": {
|
||||||
|
"1x25G": ["Eth37/1"]
|
||||||
|
}
|
||||||
|
},
|
||||||
|
"Ethernet37": {
|
||||||
|
"index": "38",
|
||||||
|
"lanes": "62",
|
||||||
|
"breakout_modes": {
|
||||||
|
"1x25G": ["Eth38/1"]
|
||||||
|
}
|
||||||
|
},
|
||||||
|
"Ethernet38": {
|
||||||
|
"index": "39",
|
||||||
|
"lanes": "63",
|
||||||
|
"breakout_modes": {
|
||||||
|
"1x25G": ["Eth39/1"]
|
||||||
|
}
|
||||||
|
},
|
||||||
|
"Ethernet39": {
|
||||||
|
"index": "40",
|
||||||
|
"lanes": "64",
|
||||||
|
"breakout_modes": {
|
||||||
|
"1x25G": ["Eth40/1"]
|
||||||
|
}
|
||||||
|
},
|
||||||
|
"Ethernet40": {
|
||||||
|
"index": "41",
|
||||||
|
"lanes": "65",
|
||||||
|
"breakout_modes": {
|
||||||
|
"1x25G": ["Eth41/1"]
|
||||||
|
}
|
||||||
|
},
|
||||||
|
"Ethernet41": {
|
||||||
|
"index": "42",
|
||||||
|
"lanes": "66",
|
||||||
|
"breakout_modes": {
|
||||||
|
"1x25G": ["Eth42/1"]
|
||||||
|
}
|
||||||
|
},
|
||||||
|
"Ethernet42": {
|
||||||
|
"index": "43",
|
||||||
|
"lanes": "67",
|
||||||
|
"breakout_modes": {
|
||||||
|
"1x25G": ["Eth43/1"]
|
||||||
|
}
|
||||||
|
},
|
||||||
|
"Ethernet43": {
|
||||||
|
"index": "44",
|
||||||
|
"lanes": "68",
|
||||||
|
"breakout_modes": {
|
||||||
|
"1x25G": ["Eth44/1"]
|
||||||
|
}
|
||||||
|
},
|
||||||
|
"Ethernet44": {
|
||||||
|
"index": "45",
|
||||||
|
"lanes": "69",
|
||||||
|
"breakout_modes": {
|
||||||
|
"1x25G": ["Eth45/1"]
|
||||||
|
}
|
||||||
|
},
|
||||||
|
"Ethernet45": {
|
||||||
|
"index": "46",
|
||||||
|
"lanes": "70",
|
||||||
|
"breakout_modes": {
|
||||||
|
"1x25G": ["Eth46/1"]
|
||||||
|
}
|
||||||
|
},
|
||||||
|
"Ethernet46": {
|
||||||
|
"index": "47",
|
||||||
|
"lanes": "71",
|
||||||
|
"breakout_modes": {
|
||||||
|
"1x25G": ["Eth47/1"]
|
||||||
|
}
|
||||||
|
},
|
||||||
|
"Ethernet47": {
|
||||||
|
"index": "48",
|
||||||
|
"lanes": "72",
|
||||||
|
"breakout_modes": {
|
||||||
|
"1x25G": ["Eth48/1"]
|
||||||
|
}
|
||||||
|
},
|
||||||
|
"Ethernet48": {
|
||||||
|
"index": "49,49,49,49",
|
||||||
|
"lanes": "41,42,43,44",
|
||||||
|
"breakout_modes": {
|
||||||
|
"1x100G": ["Eth49/1"]
|
||||||
|
}
|
||||||
|
},
|
||||||
|
"Ethernet52": {
|
||||||
|
"index": "50,50,50,50",
|
||||||
|
"lanes": "45,46,47,48",
|
||||||
|
"breakout_modes": {
|
||||||
|
"1x100G": ["Eth50/1"]
|
||||||
|
}
|
||||||
|
},
|
||||||
|
"Ethernet56": {
|
||||||
|
"index": "51,51,51,51",
|
||||||
|
"lanes": "73,74,75,76",
|
||||||
|
"breakout_modes": {
|
||||||
|
"1x100G": ["Eth51/1"]
|
||||||
|
}
|
||||||
|
},
|
||||||
|
"Ethernet60": {
|
||||||
|
"index": "52,52,52,52",
|
||||||
|
"lanes": "77,78,79,80",
|
||||||
|
"breakout_modes": {
|
||||||
|
"1x100G": ["Eth52/1"]
|
||||||
|
}
|
||||||
|
},
|
||||||
|
"Ethernet64": {
|
||||||
|
"index": "53,53,53,53",
|
||||||
|
"lanes": "1,2,3,4",
|
||||||
|
"breakout_modes": {
|
||||||
|
"1x100G": ["Eth53/1"]
|
||||||
|
}
|
||||||
|
},
|
||||||
|
"Ethernet68": {
|
||||||
|
"index": "54,54,54,54",
|
||||||
|
"lanes": "21,22,23,24",
|
||||||
|
"breakout_modes": {
|
||||||
|
"1x100G": ["Eth54/1"]
|
||||||
|
}
|
||||||
|
},
|
||||||
|
"Ethernet72": {
|
||||||
|
"index": "55,55,55,55",
|
||||||
|
"lanes": "5,6,7,8",
|
||||||
|
"breakout_modes": {
|
||||||
|
"1x100G": ["Eth55/1"]
|
||||||
|
}
|
||||||
|
},
|
||||||
|
"Ethernet76": {
|
||||||
|
"index": "56,56,56,56",
|
||||||
|
"lanes": "25,26,27,28",
|
||||||
|
"breakout_modes": {
|
||||||
|
"1x100G": ["Eth56/1"]
|
||||||
|
}
|
||||||
|
}
|
||||||
|
}
|
||||||
|
}
|
@ -0,0 +1,17 @@
|
|||||||
|
{
|
||||||
|
"chassis": {
|
||||||
|
"Questone_2A": {
|
||||||
|
"component": {
|
||||||
|
"BIOS": {},
|
||||||
|
"ONIE": {},
|
||||||
|
"BMC": {},
|
||||||
|
"FPGA": {},
|
||||||
|
"CPLD COMe": {},
|
||||||
|
"CPLD BASE": {},
|
||||||
|
"CPLD SW1": {},
|
||||||
|
"CPLD SW2": {},
|
||||||
|
"SSD": {}
|
||||||
|
}
|
||||||
|
}
|
||||||
|
}
|
||||||
|
}
|
@ -0,0 +1,57 @@
|
|||||||
|
# name lanes alias index speed mtu admin_status fec
|
||||||
|
Ethernet0 29 Eth1/1 1 25000 9216 up rs
|
||||||
|
Ethernet1 30 Eth2/1 2 25000 9216 up rs
|
||||||
|
Ethernet2 31 Eth3/1 3 25000 9216 up rs
|
||||||
|
Ethernet3 32 Eth4/1 4 25000 9216 up rs
|
||||||
|
Ethernet4 33 Eth5/1 5 25000 9216 up rs
|
||||||
|
Ethernet5 34 Eth6/1 6 25000 9216 up rs
|
||||||
|
Ethernet6 35 Eth7/1 7 25000 9216 up rs
|
||||||
|
Ethernet7 36 Eth8/1 8 25000 9216 up rs
|
||||||
|
Ethernet8 37 Eth9/1 9 25000 9216 up rs
|
||||||
|
Ethernet9 38 Eth10/1 10 25000 9216 up rs
|
||||||
|
Ethernet10 39 Eth11/1 11 25000 9216 up rs
|
||||||
|
Ethernet11 40 Eth12/1 12 25000 9216 up rs
|
||||||
|
Ethernet12 49 Eth13/1 13 25000 9216 up rs
|
||||||
|
Ethernet13 50 Eth14/1 14 25000 9216 up rs
|
||||||
|
Ethernet14 51 Eth15/1 15 25000 9216 up rs
|
||||||
|
Ethernet15 52 Eth16/1 16 25000 9216 up rs
|
||||||
|
Ethernet16 53 Eth17/1 17 25000 9216 up rs
|
||||||
|
Ethernet17 54 Eth18/1 18 25000 9216 up rs
|
||||||
|
Ethernet18 55 Eth19/1 19 25000 9216 up rs
|
||||||
|
Ethernet19 56 Eth20/1 20 25000 9216 up rs
|
||||||
|
Ethernet20 57 Eth21/1 21 25000 9216 up rs
|
||||||
|
Ethernet21 58 Eth22/1 22 25000 9216 up rs
|
||||||
|
Ethernet22 59 Eth23/1 23 25000 9216 up rs
|
||||||
|
Ethernet23 60 Eth24/1 24 25000 9216 up rs
|
||||||
|
Ethernet24 9 Eth25/1 25 25000 9216 up rs
|
||||||
|
Ethernet25 10 Eth26/1 26 25000 9216 up rs
|
||||||
|
Ethernet26 11 Eth27/1 27 25000 9216 up rs
|
||||||
|
Ethernet27 12 Eth28/1 28 25000 9216 up rs
|
||||||
|
Ethernet28 13 Eth29/1 29 25000 9216 up rs
|
||||||
|
Ethernet29 14 Eth30/1 30 25000 9216 up rs
|
||||||
|
Ethernet30 15 Eth31/1 31 25000 9216 up rs
|
||||||
|
Ethernet31 16 Eth32/1 32 25000 9216 up rs
|
||||||
|
Ethernet32 17 Eth33/1 33 25000 9216 up rs
|
||||||
|
Ethernet33 18 Eth34/1 34 25000 9216 up rs
|
||||||
|
Ethernet34 19 Eth35/1 35 25000 9216 up rs
|
||||||
|
Ethernet35 20 Eth36/1 36 25000 9216 up rs
|
||||||
|
Ethernet36 61 Eth37/1 37 25000 9216 up rs
|
||||||
|
Ethernet37 62 Eth38/1 38 25000 9216 up rs
|
||||||
|
Ethernet38 63 Eth39/1 39 25000 9216 up rs
|
||||||
|
Ethernet39 64 Eth40/1 40 25000 9216 up rs
|
||||||
|
Ethernet40 65 Eth41/1 41 25000 9216 up rs
|
||||||
|
Ethernet41 66 Eth42/1 42 25000 9216 up rs
|
||||||
|
Ethernet42 67 Eth43/1 43 25000 9216 up rs
|
||||||
|
Ethernet43 68 Eth44/1 44 25000 9216 up rs
|
||||||
|
Ethernet44 69 Eth45/1 45 25000 9216 up rs
|
||||||
|
Ethernet45 70 Eth46/1 46 25000 9216 up rs
|
||||||
|
Ethernet46 71 Eth47/1 47 25000 9216 up rs
|
||||||
|
Ethernet47 72 Eth48/1 48 25000 9216 up rs
|
||||||
|
Ethernet48 41,42,43,44 Eth49/1 49 100000 9216 up rs
|
||||||
|
Ethernet52 45,46,47,48 Eth50/1 50 100000 9216 up rs
|
||||||
|
Ethernet56 73,74,75,76 Eth51/1 51 100000 9216 up rs
|
||||||
|
Ethernet60 77,78,79,80 Eth52/1 52 100000 9216 up rs
|
||||||
|
Ethernet64 1,2,3,4 Eth53/1 53 100000 9216 up rs
|
||||||
|
Ethernet68 21,22,23,24 Eth54/1 54 100000 9216 up rs
|
||||||
|
Ethernet72 5,6,7,8 Eth55/1 55 100000 9216 up rs
|
||||||
|
Ethernet76 25,26,27,28 Eth56/1 56 100000 9216 up rs
|
@ -0,0 +1,16 @@
|
|||||||
|
{# Get sai.profile based on vxlan_profile. Vxlan's config.bcm file is the default one #}
|
||||||
|
{%- set sai_profile_contents = 'SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/td3-as13-48f8h-vxlan.config.bcm' -%}
|
||||||
|
{%- if DEVICE_METADATA is defined and DEVICE_METADATA['localhost'] is defined -%}
|
||||||
|
{%- if DEVICE_METADATA['localhost']['vxlan_profile'] is defined -%}
|
||||||
|
{%- set vxlan_profile = DEVICE_METADATA['localhost']['vxlan_profile'] -%}
|
||||||
|
{%- if 'enable' in vxlan_profile.lower() %}
|
||||||
|
{% set sai_profile_contents = 'SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/td3-as13-48f8h-vxlan.config.bcm' -%}
|
||||||
|
{%- else %}
|
||||||
|
{%- set sai_profile_contents = 'SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/td3-as13-48f8h.config.bcm' -%}
|
||||||
|
{%- endif %}
|
||||||
|
{%- else %}
|
||||||
|
{%- set sai_profile_contents = 'SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/td3-as13-48f8h-vxlan.config.bcm' -%}
|
||||||
|
{%- endif %}
|
||||||
|
{%- endif %}
|
||||||
|
{# Write the contents of sai_profile_filename to sai.profile file #}
|
||||||
|
{{ sai_profile_contents }}
|
@ -0,0 +1,423 @@
|
|||||||
|
ptp_ts_pll_fref=50000000
|
||||||
|
ptp_bs_fref_0=50000000
|
||||||
|
ptp_bs_fref_1=50000000
|
||||||
|
oversubscribe_mode=1
|
||||||
|
pbmp_xport_xe=0x11ffffffe1ffffffe
|
||||||
|
stable_size=0x5500000
|
||||||
|
ifp_inports_support_enable=1
|
||||||
|
|
||||||
|
#FC0
|
||||||
|
portmap_1.0=1:100
|
||||||
|
|
||||||
|
#FC1
|
||||||
|
portmap_2.0=5:100
|
||||||
|
|
||||||
|
#FC2
|
||||||
|
portmap_3.0=9:25
|
||||||
|
portmap_4.0=10:25
|
||||||
|
portmap_5.0=11:25
|
||||||
|
portmap_6.0=12:25
|
||||||
|
|
||||||
|
#FC3
|
||||||
|
portmap_7.0=13:25
|
||||||
|
portmap_8.0=14:25
|
||||||
|
portmap_9.0=15:25
|
||||||
|
portmap_10.0=16:25
|
||||||
|
|
||||||
|
#FC4
|
||||||
|
portmap_11.0=17:25
|
||||||
|
portmap_12.0=18:25
|
||||||
|
portmap_13.0=19:25
|
||||||
|
portmap_14.0=20:25
|
||||||
|
|
||||||
|
#FC5
|
||||||
|
portmap_15.0=21:100
|
||||||
|
|
||||||
|
#FC6
|
||||||
|
portmap_16.0=25:100
|
||||||
|
|
||||||
|
#FC7
|
||||||
|
portmap_17.0=29:25
|
||||||
|
portmap_18.0=30:25
|
||||||
|
portmap_19.0=31:25
|
||||||
|
portmap_20.0=32:25
|
||||||
|
|
||||||
|
#FC8
|
||||||
|
portmap_21.0=33:25
|
||||||
|
portmap_22.0=34:25
|
||||||
|
portmap_23.0=35:25
|
||||||
|
portmap_24.0=36:25
|
||||||
|
|
||||||
|
#FC9
|
||||||
|
portmap_25.0=37:25
|
||||||
|
portmap_26.0=38:25
|
||||||
|
portmap_27.0=39:25
|
||||||
|
portmap_28.0=40:25
|
||||||
|
|
||||||
|
#FC10
|
||||||
|
portmap_33.0=41:100
|
||||||
|
|
||||||
|
#FC11
|
||||||
|
portmap_34.0=45:100
|
||||||
|
|
||||||
|
#FC12
|
||||||
|
portmap_35.0=49:25
|
||||||
|
portmap_36.0=50:25
|
||||||
|
portmap_37.0=51:25
|
||||||
|
portmap_38.0=52:25
|
||||||
|
|
||||||
|
#FC13
|
||||||
|
portmap_39.0=53:25
|
||||||
|
portmap_40.0=54:25
|
||||||
|
portmap_41.0=55:25
|
||||||
|
portmap_42.0=56:25
|
||||||
|
|
||||||
|
#FC14
|
||||||
|
portmap_43.0=57:25
|
||||||
|
portmap_44.0=58:25
|
||||||
|
portmap_45.0=59:25
|
||||||
|
portmap_46.0=60:25
|
||||||
|
|
||||||
|
#FC15
|
||||||
|
portmap_47.0=61:25
|
||||||
|
portmap_48.0=62:25
|
||||||
|
portmap_49.0=63:25
|
||||||
|
portmap_50.0=64:25
|
||||||
|
|
||||||
|
#FC16
|
||||||
|
portmap_51.0=65:25
|
||||||
|
portmap_52.0=66:25
|
||||||
|
portmap_53.0=67:25
|
||||||
|
portmap_54.0=68:25
|
||||||
|
|
||||||
|
#FC17
|
||||||
|
portmap_55.0=69:25
|
||||||
|
portmap_56.0=70:25
|
||||||
|
portmap_57.0=71:25
|
||||||
|
portmap_58.0=72:25
|
||||||
|
|
||||||
|
#FC18
|
||||||
|
portmap_59.0=73:100
|
||||||
|
|
||||||
|
#FC19
|
||||||
|
portmap_60.0=77:100
|
||||||
|
|
||||||
|
|
||||||
|
#portmap_64.0=81:10
|
||||||
|
|
||||||
|
phy_chain_tx_lane_map_physical{1.0}=0x0123
|
||||||
|
phy_chain_rx_lane_map_physical{1.0}=0x1302
|
||||||
|
phy_chain_tx_lane_map_physical{5.0}=0x1032
|
||||||
|
phy_chain_rx_lane_map_physical{5.0}=0x1302
|
||||||
|
phy_chain_tx_lane_map_physical{9.0}=0x0123
|
||||||
|
phy_chain_rx_lane_map_physical{9.0}=0x1032
|
||||||
|
phy_chain_tx_lane_map_physical{13.0}=0x0123
|
||||||
|
phy_chain_rx_lane_map_physical{13.0}=0x1032
|
||||||
|
phy_chain_tx_lane_map_physical{17.0}=0x0123
|
||||||
|
phy_chain_rx_lane_map_physical{17.0}=0x1032
|
||||||
|
phy_chain_tx_lane_map_physical{21.0}=0x1302
|
||||||
|
phy_chain_rx_lane_map_physical{21.0}=0x1032
|
||||||
|
phy_chain_tx_lane_map_physical{25.0}=0x3120
|
||||||
|
phy_chain_rx_lane_map_physical{25.0}=0x1032
|
||||||
|
phy_chain_tx_lane_map_physical{29.0}=0x0123
|
||||||
|
phy_chain_rx_lane_map_physical{29.0}=0x1032
|
||||||
|
phy_chain_tx_lane_map_physical{33.0}=0x0123
|
||||||
|
phy_chain_rx_lane_map_physical{33.0}=0x1032
|
||||||
|
phy_chain_tx_lane_map_physical{37.0}=0x0123
|
||||||
|
phy_chain_rx_lane_map_physical{37.0}=0x1032
|
||||||
|
phy_chain_tx_lane_map_physical{41.0}=0x1302
|
||||||
|
phy_chain_rx_lane_map_physical{41.0}=0x1023
|
||||||
|
phy_chain_tx_lane_map_physical{45.0}=0x1032
|
||||||
|
phy_chain_rx_lane_map_physical{45.0}=0x0213
|
||||||
|
phy_chain_tx_lane_map_physical{49.0}=0x3210
|
||||||
|
phy_chain_rx_lane_map_physical{49.0}=0x2301
|
||||||
|
phy_chain_tx_lane_map_physical{53.0}=0x3210
|
||||||
|
phy_chain_rx_lane_map_physical{53.0}=0x2301
|
||||||
|
phy_chain_tx_lane_map_physical{57.0}=0x3210
|
||||||
|
phy_chain_rx_lane_map_physical{57.0}=0x2301
|
||||||
|
phy_chain_tx_lane_map_physical{61.0}=0x3210
|
||||||
|
phy_chain_rx_lane_map_physical{61.0}=0x2301
|
||||||
|
phy_chain_tx_lane_map_physical{65.0}=0x3210
|
||||||
|
phy_chain_rx_lane_map_physical{65.0}=0x2301
|
||||||
|
phy_chain_tx_lane_map_physical{69.0}=0x3210
|
||||||
|
phy_chain_rx_lane_map_physical{69.0}=0x2301
|
||||||
|
phy_chain_tx_lane_map_physical{73.0}=0x2301
|
||||||
|
phy_chain_rx_lane_map_physical{73.0}=0x2031
|
||||||
|
phy_chain_tx_lane_map_physical{77.0}=0x0132
|
||||||
|
phy_chain_rx_lane_map_physical{77.0}=0x3012
|
||||||
|
phy_chain_tx_lane_map_physical{81.0}=0x3210
|
||||||
|
phy_chain_rx_lane_map_physical{81.0}=0x3201
|
||||||
|
|
||||||
|
#FC0
|
||||||
|
phy_chain_tx_polarity_flip_physical{1.0}=0x0
|
||||||
|
phy_chain_rx_polarity_flip_physical{1.0}=0x0
|
||||||
|
phy_chain_tx_polarity_flip_physical{2.0}=0x0
|
||||||
|
phy_chain_rx_polarity_flip_physical{2.0}=0x1
|
||||||
|
phy_chain_tx_polarity_flip_physical{3.0}=0x1
|
||||||
|
phy_chain_rx_polarity_flip_physical{3.0}=0x1
|
||||||
|
phy_chain_tx_polarity_flip_physical{4.0}=0x0
|
||||||
|
phy_chain_rx_polarity_flip_physical{4.0}=0x1
|
||||||
|
|
||||||
|
#FC1
|
||||||
|
phy_chain_tx_polarity_flip_physical{5.0}=0x0
|
||||||
|
phy_chain_rx_polarity_flip_physical{5.0}=0x1
|
||||||
|
phy_chain_tx_polarity_flip_physical{6.0}=0x1
|
||||||
|
phy_chain_rx_polarity_flip_physical{6.0}=0x0
|
||||||
|
phy_chain_tx_polarity_flip_physical{7.0}=0x1
|
||||||
|
phy_chain_rx_polarity_flip_physical{7.0}=0x0
|
||||||
|
phy_chain_tx_polarity_flip_physical{8.0}=0x1
|
||||||
|
phy_chain_rx_polarity_flip_physical{8.0}=0x0
|
||||||
|
|
||||||
|
#FC2
|
||||||
|
phy_chain_tx_polarity_flip_physical{9.0}=0x0
|
||||||
|
phy_chain_rx_polarity_flip_physical{9.0}=0x1
|
||||||
|
phy_chain_tx_polarity_flip_physical{10.0}=0x1
|
||||||
|
phy_chain_rx_polarity_flip_physical{10.0}=0x0
|
||||||
|
phy_chain_tx_polarity_flip_physical{11.0}=0x0
|
||||||
|
phy_chain_rx_polarity_flip_physical{11.0}=0x1
|
||||||
|
phy_chain_tx_polarity_flip_physical{12.0}=0x1
|
||||||
|
phy_chain_rx_polarity_flip_physical{12.0}=0x0
|
||||||
|
|
||||||
|
#FC3
|
||||||
|
phy_chain_tx_polarity_flip_physical{13.0}=0x0
|
||||||
|
phy_chain_rx_polarity_flip_physical{13.0}=0x1
|
||||||
|
phy_chain_tx_polarity_flip_physical{14.0}=0x1
|
||||||
|
phy_chain_rx_polarity_flip_physical{14.0}=0x0
|
||||||
|
phy_chain_tx_polarity_flip_physical{15.0}=0x0
|
||||||
|
phy_chain_rx_polarity_flip_physical{15.0}=0x1
|
||||||
|
phy_chain_tx_polarity_flip_physical{16.0}=0x1
|
||||||
|
phy_chain_rx_polarity_flip_physical{16.0}=0x0
|
||||||
|
|
||||||
|
#FC4
|
||||||
|
phy_chain_tx_polarity_flip_physical{17.0}=0x0
|
||||||
|
phy_chain_rx_polarity_flip_physical{17.0}=0x1
|
||||||
|
phy_chain_tx_polarity_flip_physical{18.0}=0x1
|
||||||
|
phy_chain_rx_polarity_flip_physical{18.0}=0x1
|
||||||
|
phy_chain_tx_polarity_flip_physical{19.0}=0x0
|
||||||
|
phy_chain_rx_polarity_flip_physical{19.0}=0x1
|
||||||
|
phy_chain_tx_polarity_flip_physical{20.0}=0x1
|
||||||
|
phy_chain_rx_polarity_flip_physical{20.0}=0x0
|
||||||
|
|
||||||
|
#FC5
|
||||||
|
phy_chain_tx_polarity_flip_physical{21.0}=0x1
|
||||||
|
phy_chain_rx_polarity_flip_physical{21.0}=0x0
|
||||||
|
phy_chain_tx_polarity_flip_physical{22.0}=0x1
|
||||||
|
phy_chain_rx_polarity_flip_physical{22.0}=0x1
|
||||||
|
phy_chain_tx_polarity_flip_physical{23.0}=0x1
|
||||||
|
phy_chain_rx_polarity_flip_physical{23.0}=0x0
|
||||||
|
phy_chain_tx_polarity_flip_physical{24.0}=0x0
|
||||||
|
phy_chain_rx_polarity_flip_physical{24.0}=0x0
|
||||||
|
|
||||||
|
#FC6
|
||||||
|
phy_chain_tx_polarity_flip_physical{25.0}=0x0
|
||||||
|
phy_chain_rx_polarity_flip_physical{25.0}=0x0
|
||||||
|
phy_chain_tx_polarity_flip_physical{26.0}=0x1
|
||||||
|
phy_chain_rx_polarity_flip_physical{26.0}=0x1
|
||||||
|
phy_chain_tx_polarity_flip_physical{27.0}=0x1
|
||||||
|
phy_chain_rx_polarity_flip_physical{27.0}=0x0
|
||||||
|
phy_chain_tx_polarity_flip_physical{28.0}=0x0
|
||||||
|
phy_chain_rx_polarity_flip_physical{28.0}=0x0
|
||||||
|
|
||||||
|
#FC7
|
||||||
|
phy_chain_tx_polarity_flip_physical{29.0}=0x1
|
||||||
|
phy_chain_rx_polarity_flip_physical{29.0}=0x0
|
||||||
|
phy_chain_tx_polarity_flip_physical{30.0}=0x0
|
||||||
|
phy_chain_rx_polarity_flip_physical{30.0}=0x1
|
||||||
|
phy_chain_tx_polarity_flip_physical{31.0}=0x1
|
||||||
|
phy_chain_rx_polarity_flip_physical{31.0}=0x0
|
||||||
|
phy_chain_tx_polarity_flip_physical{32.0}=0x0
|
||||||
|
phy_chain_rx_polarity_flip_physical{32.0}=0x1
|
||||||
|
|
||||||
|
#FC8
|
||||||
|
phy_chain_tx_polarity_flip_physical{33.0}=0x1
|
||||||
|
phy_chain_rx_polarity_flip_physical{33.0}=0x0
|
||||||
|
phy_chain_tx_polarity_flip_physical{34.0}=0x0
|
||||||
|
phy_chain_rx_polarity_flip_physical{34.0}=0x1
|
||||||
|
phy_chain_tx_polarity_flip_physical{35.0}=0x1
|
||||||
|
phy_chain_rx_polarity_flip_physical{35.0}=0x0
|
||||||
|
phy_chain_tx_polarity_flip_physical{36.0}=0x0
|
||||||
|
phy_chain_rx_polarity_flip_physical{36.0}=0x1
|
||||||
|
|
||||||
|
#FC9
|
||||||
|
phy_chain_tx_polarity_flip_physical{37.0}=0x1
|
||||||
|
phy_chain_rx_polarity_flip_physical{37.0}=0x1
|
||||||
|
phy_chain_tx_polarity_flip_physical{38.0}=0x0
|
||||||
|
phy_chain_rx_polarity_flip_physical{38.0}=0x0
|
||||||
|
phy_chain_tx_polarity_flip_physical{39.0}=0x1
|
||||||
|
phy_chain_rx_polarity_flip_physical{39.0}=0x1
|
||||||
|
phy_chain_tx_polarity_flip_physical{40.0}=0x0
|
||||||
|
phy_chain_rx_polarity_flip_physical{40.0}=0x0
|
||||||
|
|
||||||
|
#FC10
|
||||||
|
phy_chain_tx_polarity_flip_physical{41.0}=0x1
|
||||||
|
phy_chain_rx_polarity_flip_physical{41.0}=0x0
|
||||||
|
phy_chain_tx_polarity_flip_physical{42.0}=0x0
|
||||||
|
phy_chain_rx_polarity_flip_physical{42.0}=0x0
|
||||||
|
phy_chain_tx_polarity_flip_physical{43.0}=0x1
|
||||||
|
phy_chain_rx_polarity_flip_physical{43.0}=0x0
|
||||||
|
phy_chain_tx_polarity_flip_physical{44.0}=0x1
|
||||||
|
phy_chain_rx_polarity_flip_physical{44.0}=0x0
|
||||||
|
|
||||||
|
#FC11
|
||||||
|
phy_chain_tx_polarity_flip_physical{45.0}=0x0
|
||||||
|
phy_chain_rx_polarity_flip_physical{45.0}=0x1
|
||||||
|
phy_chain_tx_polarity_flip_physical{46.0}=0x1
|
||||||
|
phy_chain_rx_polarity_flip_physical{46.0}=0x0
|
||||||
|
phy_chain_tx_polarity_flip_physical{47.0}=0x0
|
||||||
|
phy_chain_rx_polarity_flip_physical{47.0}=0x0
|
||||||
|
phy_chain_tx_polarity_flip_physical{48.0}=0x1
|
||||||
|
phy_chain_rx_polarity_flip_physical{48.0}=0x1
|
||||||
|
|
||||||
|
#FC12
|
||||||
|
phy_chain_tx_polarity_flip_physical{49.0}=0x0
|
||||||
|
phy_chain_rx_polarity_flip_physical{49.0}=0x1
|
||||||
|
phy_chain_tx_polarity_flip_physical{50.0}=0x1
|
||||||
|
phy_chain_rx_polarity_flip_physical{50.0}=0x0
|
||||||
|
phy_chain_tx_polarity_flip_physical{51.0}=0x0
|
||||||
|
phy_chain_rx_polarity_flip_physical{51.0}=0x1
|
||||||
|
phy_chain_tx_polarity_flip_physical{52.0}=0x1
|
||||||
|
phy_chain_rx_polarity_flip_physical{52.0}=0x0
|
||||||
|
|
||||||
|
#FC13
|
||||||
|
phy_chain_tx_polarity_flip_physical{53.0}=0x0
|
||||||
|
phy_chain_rx_polarity_flip_physical{53.0}=0x1
|
||||||
|
phy_chain_tx_polarity_flip_physical{54.0}=0x1
|
||||||
|
phy_chain_rx_polarity_flip_physical{54.0}=0x0
|
||||||
|
phy_chain_tx_polarity_flip_physical{55.0}=0x0
|
||||||
|
phy_chain_rx_polarity_flip_physical{55.0}=0x1
|
||||||
|
phy_chain_tx_polarity_flip_physical{56.0}=0x1
|
||||||
|
phy_chain_rx_polarity_flip_physical{56.0}=0x0
|
||||||
|
|
||||||
|
#FC14
|
||||||
|
phy_chain_tx_polarity_flip_physical{57.0}=0x0
|
||||||
|
phy_chain_rx_polarity_flip_physical{57.0}=0x1
|
||||||
|
phy_chain_tx_polarity_flip_physical{58.0}=0x1
|
||||||
|
phy_chain_rx_polarity_flip_physical{58.0}=0x0
|
||||||
|
phy_chain_tx_polarity_flip_physical{59.0}=0x0
|
||||||
|
phy_chain_rx_polarity_flip_physical{59.0}=0x1
|
||||||
|
phy_chain_tx_polarity_flip_physical{60.0}=0x1
|
||||||
|
phy_chain_rx_polarity_flip_physical{60.0}=0x0
|
||||||
|
|
||||||
|
#FC15
|
||||||
|
phy_chain_tx_polarity_flip_physical{61.0}=0x1
|
||||||
|
phy_chain_rx_polarity_flip_physical{61.0}=0x1
|
||||||
|
phy_chain_tx_polarity_flip_physical{62.0}=0x0
|
||||||
|
phy_chain_rx_polarity_flip_physical{62.0}=0x0
|
||||||
|
phy_chain_tx_polarity_flip_physical{63.0}=0x1
|
||||||
|
phy_chain_rx_polarity_flip_physical{63.0}=0x1
|
||||||
|
phy_chain_tx_polarity_flip_physical{64.0}=0x0
|
||||||
|
phy_chain_rx_polarity_flip_physical{64.0}=0x0
|
||||||
|
|
||||||
|
#FC16
|
||||||
|
phy_chain_tx_polarity_flip_physical{65.0}=0x1
|
||||||
|
phy_chain_rx_polarity_flip_physical{65.0}=0x0
|
||||||
|
phy_chain_tx_polarity_flip_physical{66.0}=0x0
|
||||||
|
phy_chain_rx_polarity_flip_physical{66.0}=0x1
|
||||||
|
phy_chain_tx_polarity_flip_physical{67.0}=0x1
|
||||||
|
phy_chain_rx_polarity_flip_physical{67.0}=0x0
|
||||||
|
phy_chain_tx_polarity_flip_physical{68.0}=0x0
|
||||||
|
phy_chain_rx_polarity_flip_physical{68.0}=0x1
|
||||||
|
|
||||||
|
#FC17
|
||||||
|
phy_chain_tx_polarity_flip_physical{69.0}=0x1
|
||||||
|
phy_chain_rx_polarity_flip_physical{69.0}=0x0
|
||||||
|
phy_chain_tx_polarity_flip_physical{70.0}=0x0
|
||||||
|
phy_chain_rx_polarity_flip_physical{70.0}=0x1
|
||||||
|
phy_chain_tx_polarity_flip_physical{71.0}=0x1
|
||||||
|
phy_chain_rx_polarity_flip_physical{71.0}=0x0
|
||||||
|
phy_chain_tx_polarity_flip_physical{72.0}=0x0
|
||||||
|
phy_chain_rx_polarity_flip_physical{72.0}=0x1
|
||||||
|
|
||||||
|
#FC18
|
||||||
|
phy_chain_tx_polarity_flip_physical{73.0}=0x0
|
||||||
|
phy_chain_rx_polarity_flip_physical{73.0}=0x1
|
||||||
|
phy_chain_tx_polarity_flip_physical{74.0}=0x1
|
||||||
|
phy_chain_rx_polarity_flip_physical{74.0}=0x0
|
||||||
|
phy_chain_tx_polarity_flip_physical{75.0}=0x0
|
||||||
|
phy_chain_rx_polarity_flip_physical{75.0}=0x0
|
||||||
|
phy_chain_tx_polarity_flip_physical{76.0}=0x1
|
||||||
|
phy_chain_rx_polarity_flip_physical{76.0}=0x0
|
||||||
|
|
||||||
|
#FC19
|
||||||
|
phy_chain_tx_polarity_flip_physical{77.0}=0x1
|
||||||
|
phy_chain_rx_polarity_flip_physical{77.0}=0x0
|
||||||
|
phy_chain_tx_polarity_flip_physical{78.0}=0x1
|
||||||
|
phy_chain_rx_polarity_flip_physical{78.0}=0x1
|
||||||
|
phy_chain_tx_polarity_flip_physical{79.0}=0x0
|
||||||
|
phy_chain_rx_polarity_flip_physical{79.0}=0x0
|
||||||
|
phy_chain_tx_polarity_flip_physical{80.0}=0x0
|
||||||
|
phy_chain_rx_polarity_flip_physical{80.0}=0x0
|
||||||
|
|
||||||
|
|
||||||
|
phy_chain_tx_polarity_flip_physical{81.0}=0x0
|
||||||
|
phy_chain_rx_polarity_flip_physical{81.0}=0x1
|
||||||
|
|
||||||
|
|
||||||
|
dport_map_port_17=1
|
||||||
|
dport_map_port_18=2
|
||||||
|
dport_map_port_19=3
|
||||||
|
dport_map_port_20=4
|
||||||
|
dport_map_port_21=5
|
||||||
|
dport_map_port_22=6
|
||||||
|
dport_map_port_23=7
|
||||||
|
dport_map_port_24=8
|
||||||
|
dport_map_port_25=9
|
||||||
|
dport_map_port_26=10
|
||||||
|
dport_map_port_27=11
|
||||||
|
dport_map_port_28=12
|
||||||
|
dport_map_port_35=13
|
||||||
|
dport_map_port_36=14
|
||||||
|
dport_map_port_37=15
|
||||||
|
dport_map_port_38=16
|
||||||
|
dport_map_port_39=17
|
||||||
|
dport_map_port_40=18
|
||||||
|
dport_map_port_41=19
|
||||||
|
dport_map_port_42=20
|
||||||
|
dport_map_port_43=21
|
||||||
|
dport_map_port_44=22
|
||||||
|
dport_map_port_45=23
|
||||||
|
dport_map_port_46=24
|
||||||
|
dport_map_port_3=25
|
||||||
|
dport_map_port_4=26
|
||||||
|
dport_map_port_5=27
|
||||||
|
dport_map_port_6=28
|
||||||
|
dport_map_port_7=29
|
||||||
|
dport_map_port_8=30
|
||||||
|
dport_map_port_9=31
|
||||||
|
dport_map_port_10=32
|
||||||
|
dport_map_port_11=33
|
||||||
|
dport_map_port_12=34
|
||||||
|
dport_map_port_13=35
|
||||||
|
dport_map_port_14=36
|
||||||
|
dport_map_port_47=37
|
||||||
|
dport_map_port_48=38
|
||||||
|
dport_map_port_49=39
|
||||||
|
dport_map_port_50=40
|
||||||
|
dport_map_port_51=41
|
||||||
|
dport_map_port_52=42
|
||||||
|
dport_map_port_53=43
|
||||||
|
dport_map_port_54=44
|
||||||
|
dport_map_port_55=45
|
||||||
|
dport_map_port_56=46
|
||||||
|
dport_map_port_57=47
|
||||||
|
dport_map_port_58=48
|
||||||
|
dport_map_port_33=49
|
||||||
|
dport_map_port_34=50
|
||||||
|
dport_map_port_59=51
|
||||||
|
dport_map_port_60=52
|
||||||
|
dport_map_port_1=53
|
||||||
|
dport_map_port_15=54
|
||||||
|
dport_map_port_2=55
|
||||||
|
dport_map_port_16=56
|
||||||
|
#dport_map_port_64=57
|
||||||
|
|
||||||
|
#VxLAN
|
||||||
|
sai_tunnel_support=1
|
||||||
|
use_all_splithorizon_groups=1
|
||||||
|
bcm_tunnel_term_compatible_mode=1
|
||||||
|
flow_init_mode=1
|
||||||
|
l3_ecmp_levels=2
|
||||||
|
riot_enable=1
|
||||||
|
riot_overlay_l3_intf_mem_size=8192
|
||||||
|
riot_overlay_l3_egress_mem_size=32768
|
||||||
|
riot_overlay_ecmp_resilient_hash_size=16384
|
412
device/celestica/x86_64-cel_questone_2-r0/Questone_2A/td3-as13-48f8h.config.bcm
Executable file
412
device/celestica/x86_64-cel_questone_2-r0/Questone_2A/td3-as13-48f8h.config.bcm
Executable file
@ -0,0 +1,412 @@
|
|||||||
|
ptp_ts_pll_fref=50000000
|
||||||
|
ptp_bs_fref_0=50000000
|
||||||
|
ptp_bs_fref_1=50000000
|
||||||
|
oversubscribe_mode=1
|
||||||
|
pbmp_xport_xe=0x11ffffffe1ffffffe
|
||||||
|
stable_size=0x5500000
|
||||||
|
ifp_inports_support_enable=1
|
||||||
|
|
||||||
|
#FC0
|
||||||
|
portmap_1.0=1:100
|
||||||
|
|
||||||
|
#FC1
|
||||||
|
portmap_2.0=5:100
|
||||||
|
|
||||||
|
#FC2
|
||||||
|
portmap_3.0=9:25
|
||||||
|
portmap_4.0=10:25
|
||||||
|
portmap_5.0=11:25
|
||||||
|
portmap_6.0=12:25
|
||||||
|
|
||||||
|
#FC3
|
||||||
|
portmap_7.0=13:25
|
||||||
|
portmap_8.0=14:25
|
||||||
|
portmap_9.0=15:25
|
||||||
|
portmap_10.0=16:25
|
||||||
|
|
||||||
|
#FC4
|
||||||
|
portmap_11.0=17:25
|
||||||
|
portmap_12.0=18:25
|
||||||
|
portmap_13.0=19:25
|
||||||
|
portmap_14.0=20:25
|
||||||
|
|
||||||
|
#FC5
|
||||||
|
portmap_15.0=21:100
|
||||||
|
|
||||||
|
#FC6
|
||||||
|
portmap_16.0=25:100
|
||||||
|
|
||||||
|
#FC7
|
||||||
|
portmap_17.0=29:25
|
||||||
|
portmap_18.0=30:25
|
||||||
|
portmap_19.0=31:25
|
||||||
|
portmap_20.0=32:25
|
||||||
|
|
||||||
|
#FC8
|
||||||
|
portmap_21.0=33:25
|
||||||
|
portmap_22.0=34:25
|
||||||
|
portmap_23.0=35:25
|
||||||
|
portmap_24.0=36:25
|
||||||
|
|
||||||
|
#FC9
|
||||||
|
portmap_25.0=37:25
|
||||||
|
portmap_26.0=38:25
|
||||||
|
portmap_27.0=39:25
|
||||||
|
portmap_28.0=40:25
|
||||||
|
|
||||||
|
#FC10
|
||||||
|
portmap_33.0=41:100
|
||||||
|
|
||||||
|
#FC11
|
||||||
|
portmap_34.0=45:100
|
||||||
|
|
||||||
|
#FC12
|
||||||
|
portmap_35.0=49:25
|
||||||
|
portmap_36.0=50:25
|
||||||
|
portmap_37.0=51:25
|
||||||
|
portmap_38.0=52:25
|
||||||
|
|
||||||
|
#FC13
|
||||||
|
portmap_39.0=53:25
|
||||||
|
portmap_40.0=54:25
|
||||||
|
portmap_41.0=55:25
|
||||||
|
portmap_42.0=56:25
|
||||||
|
|
||||||
|
#FC14
|
||||||
|
portmap_43.0=57:25
|
||||||
|
portmap_44.0=58:25
|
||||||
|
portmap_45.0=59:25
|
||||||
|
portmap_46.0=60:25
|
||||||
|
|
||||||
|
#FC15
|
||||||
|
portmap_47.0=61:25
|
||||||
|
portmap_48.0=62:25
|
||||||
|
portmap_49.0=63:25
|
||||||
|
portmap_50.0=64:25
|
||||||
|
|
||||||
|
#FC16
|
||||||
|
portmap_51.0=65:25
|
||||||
|
portmap_52.0=66:25
|
||||||
|
portmap_53.0=67:25
|
||||||
|
portmap_54.0=68:25
|
||||||
|
|
||||||
|
#FC17
|
||||||
|
portmap_55.0=69:25
|
||||||
|
portmap_56.0=70:25
|
||||||
|
portmap_57.0=71:25
|
||||||
|
portmap_58.0=72:25
|
||||||
|
|
||||||
|
#FC18
|
||||||
|
portmap_59.0=73:100
|
||||||
|
|
||||||
|
#FC19
|
||||||
|
portmap_60.0=77:100
|
||||||
|
|
||||||
|
|
||||||
|
#portmap_64.0=81:10
|
||||||
|
|
||||||
|
phy_chain_tx_lane_map_physical{1.0}=0x0123
|
||||||
|
phy_chain_rx_lane_map_physical{1.0}=0x1302
|
||||||
|
phy_chain_tx_lane_map_physical{5.0}=0x1032
|
||||||
|
phy_chain_rx_lane_map_physical{5.0}=0x1302
|
||||||
|
phy_chain_tx_lane_map_physical{9.0}=0x0123
|
||||||
|
phy_chain_rx_lane_map_physical{9.0}=0x1032
|
||||||
|
phy_chain_tx_lane_map_physical{13.0}=0x0123
|
||||||
|
phy_chain_rx_lane_map_physical{13.0}=0x1032
|
||||||
|
phy_chain_tx_lane_map_physical{17.0}=0x0123
|
||||||
|
phy_chain_rx_lane_map_physical{17.0}=0x1032
|
||||||
|
phy_chain_tx_lane_map_physical{21.0}=0x1302
|
||||||
|
phy_chain_rx_lane_map_physical{21.0}=0x1032
|
||||||
|
phy_chain_tx_lane_map_physical{25.0}=0x3120
|
||||||
|
phy_chain_rx_lane_map_physical{25.0}=0x1032
|
||||||
|
phy_chain_tx_lane_map_physical{29.0}=0x0123
|
||||||
|
phy_chain_rx_lane_map_physical{29.0}=0x1032
|
||||||
|
phy_chain_tx_lane_map_physical{33.0}=0x0123
|
||||||
|
phy_chain_rx_lane_map_physical{33.0}=0x1032
|
||||||
|
phy_chain_tx_lane_map_physical{37.0}=0x0123
|
||||||
|
phy_chain_rx_lane_map_physical{37.0}=0x1032
|
||||||
|
phy_chain_tx_lane_map_physical{41.0}=0x1302
|
||||||
|
phy_chain_rx_lane_map_physical{41.0}=0x1023
|
||||||
|
phy_chain_tx_lane_map_physical{45.0}=0x1032
|
||||||
|
phy_chain_rx_lane_map_physical{45.0}=0x0213
|
||||||
|
phy_chain_tx_lane_map_physical{49.0}=0x3210
|
||||||
|
phy_chain_rx_lane_map_physical{49.0}=0x2301
|
||||||
|
phy_chain_tx_lane_map_physical{53.0}=0x3210
|
||||||
|
phy_chain_rx_lane_map_physical{53.0}=0x2301
|
||||||
|
phy_chain_tx_lane_map_physical{57.0}=0x3210
|
||||||
|
phy_chain_rx_lane_map_physical{57.0}=0x2301
|
||||||
|
phy_chain_tx_lane_map_physical{61.0}=0x3210
|
||||||
|
phy_chain_rx_lane_map_physical{61.0}=0x2301
|
||||||
|
phy_chain_tx_lane_map_physical{65.0}=0x3210
|
||||||
|
phy_chain_rx_lane_map_physical{65.0}=0x2301
|
||||||
|
phy_chain_tx_lane_map_physical{69.0}=0x3210
|
||||||
|
phy_chain_rx_lane_map_physical{69.0}=0x2301
|
||||||
|
phy_chain_tx_lane_map_physical{73.0}=0x2301
|
||||||
|
phy_chain_rx_lane_map_physical{73.0}=0x2031
|
||||||
|
phy_chain_tx_lane_map_physical{77.0}=0x0132
|
||||||
|
phy_chain_rx_lane_map_physical{77.0}=0x3012
|
||||||
|
phy_chain_tx_lane_map_physical{81.0}=0x3210
|
||||||
|
phy_chain_rx_lane_map_physical{81.0}=0x3201
|
||||||
|
|
||||||
|
#FC0
|
||||||
|
phy_chain_tx_polarity_flip_physical{1.0}=0x0
|
||||||
|
phy_chain_rx_polarity_flip_physical{1.0}=0x0
|
||||||
|
phy_chain_tx_polarity_flip_physical{2.0}=0x0
|
||||||
|
phy_chain_rx_polarity_flip_physical{2.0}=0x1
|
||||||
|
phy_chain_tx_polarity_flip_physical{3.0}=0x1
|
||||||
|
phy_chain_rx_polarity_flip_physical{3.0}=0x1
|
||||||
|
phy_chain_tx_polarity_flip_physical{4.0}=0x0
|
||||||
|
phy_chain_rx_polarity_flip_physical{4.0}=0x1
|
||||||
|
|
||||||
|
#FC1
|
||||||
|
phy_chain_tx_polarity_flip_physical{5.0}=0x0
|
||||||
|
phy_chain_rx_polarity_flip_physical{5.0}=0x1
|
||||||
|
phy_chain_tx_polarity_flip_physical{6.0}=0x1
|
||||||
|
phy_chain_rx_polarity_flip_physical{6.0}=0x0
|
||||||
|
phy_chain_tx_polarity_flip_physical{7.0}=0x1
|
||||||
|
phy_chain_rx_polarity_flip_physical{7.0}=0x0
|
||||||
|
phy_chain_tx_polarity_flip_physical{8.0}=0x1
|
||||||
|
phy_chain_rx_polarity_flip_physical{8.0}=0x0
|
||||||
|
|
||||||
|
#FC2
|
||||||
|
phy_chain_tx_polarity_flip_physical{9.0}=0x0
|
||||||
|
phy_chain_rx_polarity_flip_physical{9.0}=0x1
|
||||||
|
phy_chain_tx_polarity_flip_physical{10.0}=0x1
|
||||||
|
phy_chain_rx_polarity_flip_physical{10.0}=0x0
|
||||||
|
phy_chain_tx_polarity_flip_physical{11.0}=0x0
|
||||||
|
phy_chain_rx_polarity_flip_physical{11.0}=0x1
|
||||||
|
phy_chain_tx_polarity_flip_physical{12.0}=0x1
|
||||||
|
phy_chain_rx_polarity_flip_physical{12.0}=0x0
|
||||||
|
|
||||||
|
#FC3
|
||||||
|
phy_chain_tx_polarity_flip_physical{13.0}=0x0
|
||||||
|
phy_chain_rx_polarity_flip_physical{13.0}=0x1
|
||||||
|
phy_chain_tx_polarity_flip_physical{14.0}=0x1
|
||||||
|
phy_chain_rx_polarity_flip_physical{14.0}=0x0
|
||||||
|
phy_chain_tx_polarity_flip_physical{15.0}=0x0
|
||||||
|
phy_chain_rx_polarity_flip_physical{15.0}=0x1
|
||||||
|
phy_chain_tx_polarity_flip_physical{16.0}=0x1
|
||||||
|
phy_chain_rx_polarity_flip_physical{16.0}=0x0
|
||||||
|
|
||||||
|
#FC4
|
||||||
|
phy_chain_tx_polarity_flip_physical{17.0}=0x0
|
||||||
|
phy_chain_rx_polarity_flip_physical{17.0}=0x1
|
||||||
|
phy_chain_tx_polarity_flip_physical{18.0}=0x1
|
||||||
|
phy_chain_rx_polarity_flip_physical{18.0}=0x1
|
||||||
|
phy_chain_tx_polarity_flip_physical{19.0}=0x0
|
||||||
|
phy_chain_rx_polarity_flip_physical{19.0}=0x1
|
||||||
|
phy_chain_tx_polarity_flip_physical{20.0}=0x1
|
||||||
|
phy_chain_rx_polarity_flip_physical{20.0}=0x0
|
||||||
|
|
||||||
|
#FC5
|
||||||
|
phy_chain_tx_polarity_flip_physical{21.0}=0x1
|
||||||
|
phy_chain_rx_polarity_flip_physical{21.0}=0x0
|
||||||
|
phy_chain_tx_polarity_flip_physical{22.0}=0x1
|
||||||
|
phy_chain_rx_polarity_flip_physical{22.0}=0x1
|
||||||
|
phy_chain_tx_polarity_flip_physical{23.0}=0x1
|
||||||
|
phy_chain_rx_polarity_flip_physical{23.0}=0x0
|
||||||
|
phy_chain_tx_polarity_flip_physical{24.0}=0x0
|
||||||
|
phy_chain_rx_polarity_flip_physical{24.0}=0x0
|
||||||
|
|
||||||
|
#FC6
|
||||||
|
phy_chain_tx_polarity_flip_physical{25.0}=0x0
|
||||||
|
phy_chain_rx_polarity_flip_physical{25.0}=0x0
|
||||||
|
phy_chain_tx_polarity_flip_physical{26.0}=0x1
|
||||||
|
phy_chain_rx_polarity_flip_physical{26.0}=0x1
|
||||||
|
phy_chain_tx_polarity_flip_physical{27.0}=0x1
|
||||||
|
phy_chain_rx_polarity_flip_physical{27.0}=0x0
|
||||||
|
phy_chain_tx_polarity_flip_physical{28.0}=0x0
|
||||||
|
phy_chain_rx_polarity_flip_physical{28.0}=0x0
|
||||||
|
|
||||||
|
#FC7
|
||||||
|
phy_chain_tx_polarity_flip_physical{29.0}=0x1
|
||||||
|
phy_chain_rx_polarity_flip_physical{29.0}=0x0
|
||||||
|
phy_chain_tx_polarity_flip_physical{30.0}=0x0
|
||||||
|
phy_chain_rx_polarity_flip_physical{30.0}=0x1
|
||||||
|
phy_chain_tx_polarity_flip_physical{31.0}=0x1
|
||||||
|
phy_chain_rx_polarity_flip_physical{31.0}=0x0
|
||||||
|
phy_chain_tx_polarity_flip_physical{32.0}=0x0
|
||||||
|
phy_chain_rx_polarity_flip_physical{32.0}=0x1
|
||||||
|
|
||||||
|
#FC8
|
||||||
|
phy_chain_tx_polarity_flip_physical{33.0}=0x1
|
||||||
|
phy_chain_rx_polarity_flip_physical{33.0}=0x0
|
||||||
|
phy_chain_tx_polarity_flip_physical{34.0}=0x0
|
||||||
|
phy_chain_rx_polarity_flip_physical{34.0}=0x1
|
||||||
|
phy_chain_tx_polarity_flip_physical{35.0}=0x1
|
||||||
|
phy_chain_rx_polarity_flip_physical{35.0}=0x0
|
||||||
|
phy_chain_tx_polarity_flip_physical{36.0}=0x0
|
||||||
|
phy_chain_rx_polarity_flip_physical{36.0}=0x1
|
||||||
|
|
||||||
|
#FC9
|
||||||
|
phy_chain_tx_polarity_flip_physical{37.0}=0x1
|
||||||
|
phy_chain_rx_polarity_flip_physical{37.0}=0x1
|
||||||
|
phy_chain_tx_polarity_flip_physical{38.0}=0x0
|
||||||
|
phy_chain_rx_polarity_flip_physical{38.0}=0x0
|
||||||
|
phy_chain_tx_polarity_flip_physical{39.0}=0x1
|
||||||
|
phy_chain_rx_polarity_flip_physical{39.0}=0x1
|
||||||
|
phy_chain_tx_polarity_flip_physical{40.0}=0x0
|
||||||
|
phy_chain_rx_polarity_flip_physical{40.0}=0x0
|
||||||
|
|
||||||
|
#FC10
|
||||||
|
phy_chain_tx_polarity_flip_physical{41.0}=0x1
|
||||||
|
phy_chain_rx_polarity_flip_physical{41.0}=0x0
|
||||||
|
phy_chain_tx_polarity_flip_physical{42.0}=0x0
|
||||||
|
phy_chain_rx_polarity_flip_physical{42.0}=0x0
|
||||||
|
phy_chain_tx_polarity_flip_physical{43.0}=0x1
|
||||||
|
phy_chain_rx_polarity_flip_physical{43.0}=0x0
|
||||||
|
phy_chain_tx_polarity_flip_physical{44.0}=0x1
|
||||||
|
phy_chain_rx_polarity_flip_physical{44.0}=0x0
|
||||||
|
|
||||||
|
#FC11
|
||||||
|
phy_chain_tx_polarity_flip_physical{45.0}=0x0
|
||||||
|
phy_chain_rx_polarity_flip_physical{45.0}=0x1
|
||||||
|
phy_chain_tx_polarity_flip_physical{46.0}=0x1
|
||||||
|
phy_chain_rx_polarity_flip_physical{46.0}=0x0
|
||||||
|
phy_chain_tx_polarity_flip_physical{47.0}=0x0
|
||||||
|
phy_chain_rx_polarity_flip_physical{47.0}=0x0
|
||||||
|
phy_chain_tx_polarity_flip_physical{48.0}=0x1
|
||||||
|
phy_chain_rx_polarity_flip_physical{48.0}=0x1
|
||||||
|
|
||||||
|
#FC12
|
||||||
|
phy_chain_tx_polarity_flip_physical{49.0}=0x0
|
||||||
|
phy_chain_rx_polarity_flip_physical{49.0}=0x1
|
||||||
|
phy_chain_tx_polarity_flip_physical{50.0}=0x1
|
||||||
|
phy_chain_rx_polarity_flip_physical{50.0}=0x0
|
||||||
|
phy_chain_tx_polarity_flip_physical{51.0}=0x0
|
||||||
|
phy_chain_rx_polarity_flip_physical{51.0}=0x1
|
||||||
|
phy_chain_tx_polarity_flip_physical{52.0}=0x1
|
||||||
|
phy_chain_rx_polarity_flip_physical{52.0}=0x0
|
||||||
|
|
||||||
|
#FC13
|
||||||
|
phy_chain_tx_polarity_flip_physical{53.0}=0x0
|
||||||
|
phy_chain_rx_polarity_flip_physical{53.0}=0x1
|
||||||
|
phy_chain_tx_polarity_flip_physical{54.0}=0x1
|
||||||
|
phy_chain_rx_polarity_flip_physical{54.0}=0x0
|
||||||
|
phy_chain_tx_polarity_flip_physical{55.0}=0x0
|
||||||
|
phy_chain_rx_polarity_flip_physical{55.0}=0x1
|
||||||
|
phy_chain_tx_polarity_flip_physical{56.0}=0x1
|
||||||
|
phy_chain_rx_polarity_flip_physical{56.0}=0x0
|
||||||
|
|
||||||
|
#FC14
|
||||||
|
phy_chain_tx_polarity_flip_physical{57.0}=0x0
|
||||||
|
phy_chain_rx_polarity_flip_physical{57.0}=0x1
|
||||||
|
phy_chain_tx_polarity_flip_physical{58.0}=0x1
|
||||||
|
phy_chain_rx_polarity_flip_physical{58.0}=0x0
|
||||||
|
phy_chain_tx_polarity_flip_physical{59.0}=0x0
|
||||||
|
phy_chain_rx_polarity_flip_physical{59.0}=0x1
|
||||||
|
phy_chain_tx_polarity_flip_physical{60.0}=0x1
|
||||||
|
phy_chain_rx_polarity_flip_physical{60.0}=0x0
|
||||||
|
|
||||||
|
#FC15
|
||||||
|
phy_chain_tx_polarity_flip_physical{61.0}=0x1
|
||||||
|
phy_chain_rx_polarity_flip_physical{61.0}=0x1
|
||||||
|
phy_chain_tx_polarity_flip_physical{62.0}=0x0
|
||||||
|
phy_chain_rx_polarity_flip_physical{62.0}=0x0
|
||||||
|
phy_chain_tx_polarity_flip_physical{63.0}=0x1
|
||||||
|
phy_chain_rx_polarity_flip_physical{63.0}=0x1
|
||||||
|
phy_chain_tx_polarity_flip_physical{64.0}=0x0
|
||||||
|
phy_chain_rx_polarity_flip_physical{64.0}=0x0
|
||||||
|
|
||||||
|
#FC16
|
||||||
|
phy_chain_tx_polarity_flip_physical{65.0}=0x1
|
||||||
|
phy_chain_rx_polarity_flip_physical{65.0}=0x0
|
||||||
|
phy_chain_tx_polarity_flip_physical{66.0}=0x0
|
||||||
|
phy_chain_rx_polarity_flip_physical{66.0}=0x1
|
||||||
|
phy_chain_tx_polarity_flip_physical{67.0}=0x1
|
||||||
|
phy_chain_rx_polarity_flip_physical{67.0}=0x0
|
||||||
|
phy_chain_tx_polarity_flip_physical{68.0}=0x0
|
||||||
|
phy_chain_rx_polarity_flip_physical{68.0}=0x1
|
||||||
|
|
||||||
|
#FC17
|
||||||
|
phy_chain_tx_polarity_flip_physical{69.0}=0x1
|
||||||
|
phy_chain_rx_polarity_flip_physical{69.0}=0x0
|
||||||
|
phy_chain_tx_polarity_flip_physical{70.0}=0x0
|
||||||
|
phy_chain_rx_polarity_flip_physical{70.0}=0x1
|
||||||
|
phy_chain_tx_polarity_flip_physical{71.0}=0x1
|
||||||
|
phy_chain_rx_polarity_flip_physical{71.0}=0x0
|
||||||
|
phy_chain_tx_polarity_flip_physical{72.0}=0x0
|
||||||
|
phy_chain_rx_polarity_flip_physical{72.0}=0x1
|
||||||
|
|
||||||
|
#FC18
|
||||||
|
phy_chain_tx_polarity_flip_physical{73.0}=0x0
|
||||||
|
phy_chain_rx_polarity_flip_physical{73.0}=0x1
|
||||||
|
phy_chain_tx_polarity_flip_physical{74.0}=0x1
|
||||||
|
phy_chain_rx_polarity_flip_physical{74.0}=0x0
|
||||||
|
phy_chain_tx_polarity_flip_physical{75.0}=0x0
|
||||||
|
phy_chain_rx_polarity_flip_physical{75.0}=0x0
|
||||||
|
phy_chain_tx_polarity_flip_physical{76.0}=0x1
|
||||||
|
phy_chain_rx_polarity_flip_physical{76.0}=0x0
|
||||||
|
|
||||||
|
#FC19
|
||||||
|
phy_chain_tx_polarity_flip_physical{77.0}=0x1
|
||||||
|
phy_chain_rx_polarity_flip_physical{77.0}=0x0
|
||||||
|
phy_chain_tx_polarity_flip_physical{78.0}=0x1
|
||||||
|
phy_chain_rx_polarity_flip_physical{78.0}=0x1
|
||||||
|
phy_chain_tx_polarity_flip_physical{79.0}=0x0
|
||||||
|
phy_chain_rx_polarity_flip_physical{79.0}=0x0
|
||||||
|
phy_chain_tx_polarity_flip_physical{80.0}=0x0
|
||||||
|
phy_chain_rx_polarity_flip_physical{80.0}=0x0
|
||||||
|
|
||||||
|
|
||||||
|
phy_chain_tx_polarity_flip_physical{81.0}=0x0
|
||||||
|
phy_chain_rx_polarity_flip_physical{81.0}=0x1
|
||||||
|
|
||||||
|
|
||||||
|
dport_map_port_17=1
|
||||||
|
dport_map_port_18=2
|
||||||
|
dport_map_port_19=3
|
||||||
|
dport_map_port_20=4
|
||||||
|
dport_map_port_21=5
|
||||||
|
dport_map_port_22=6
|
||||||
|
dport_map_port_23=7
|
||||||
|
dport_map_port_24=8
|
||||||
|
dport_map_port_25=9
|
||||||
|
dport_map_port_26=10
|
||||||
|
dport_map_port_27=11
|
||||||
|
dport_map_port_28=12
|
||||||
|
dport_map_port_35=13
|
||||||
|
dport_map_port_36=14
|
||||||
|
dport_map_port_37=15
|
||||||
|
dport_map_port_38=16
|
||||||
|
dport_map_port_39=17
|
||||||
|
dport_map_port_40=18
|
||||||
|
dport_map_port_41=19
|
||||||
|
dport_map_port_42=20
|
||||||
|
dport_map_port_43=21
|
||||||
|
dport_map_port_44=22
|
||||||
|
dport_map_port_45=23
|
||||||
|
dport_map_port_46=24
|
||||||
|
dport_map_port_3=25
|
||||||
|
dport_map_port_4=26
|
||||||
|
dport_map_port_5=27
|
||||||
|
dport_map_port_6=28
|
||||||
|
dport_map_port_7=29
|
||||||
|
dport_map_port_8=30
|
||||||
|
dport_map_port_9=31
|
||||||
|
dport_map_port_10=32
|
||||||
|
dport_map_port_11=33
|
||||||
|
dport_map_port_12=34
|
||||||
|
dport_map_port_13=35
|
||||||
|
dport_map_port_14=36
|
||||||
|
dport_map_port_47=37
|
||||||
|
dport_map_port_48=38
|
||||||
|
dport_map_port_49=39
|
||||||
|
dport_map_port_50=40
|
||||||
|
dport_map_port_51=41
|
||||||
|
dport_map_port_52=42
|
||||||
|
dport_map_port_53=43
|
||||||
|
dport_map_port_54=44
|
||||||
|
dport_map_port_55=45
|
||||||
|
dport_map_port_56=46
|
||||||
|
dport_map_port_57=47
|
||||||
|
dport_map_port_58=48
|
||||||
|
dport_map_port_33=49
|
||||||
|
dport_map_port_34=50
|
||||||
|
dport_map_port_59=51
|
||||||
|
dport_map_port_60=52
|
||||||
|
dport_map_port_1=53
|
||||||
|
dport_map_port_15=54
|
||||||
|
dport_map_port_2=55
|
||||||
|
dport_map_port_16=56
|
||||||
|
#dport_map_port_64=57
|
4
device/celestica/x86_64-cel_questone_2-r0/installer.conf
Normal file
4
device/celestica/x86_64-cel_questone_2-r0/installer.conf
Normal file
@ -0,0 +1,4 @@
|
|||||||
|
CONSOLE_PORT=0xe060
|
||||||
|
CONSOLE_DEV=0
|
||||||
|
CONSOLE_SPEED=115200
|
||||||
|
ONIE_PLATFORM_EXTRA_CMDLINE_LINUX="processor.max_cstate=1 intel_idle.max_cstate=0 intel_iommu=off thermal.off=1 noirqdebug"
|
@ -0,0 +1,8 @@
|
|||||||
|
#Enable all ports
|
||||||
|
#port all en=1
|
||||||
|
#sleep 6
|
||||||
|
#linkscan 250000; port xe,ce linkscan=on
|
||||||
|
|
||||||
|
#Load LED
|
||||||
|
m0 load 0 0x3800 /usr/share/sonic/platform/custom_led.bin
|
||||||
|
led auto on; led start
|
@ -0,0 +1,3 @@
|
|||||||
|
linkscan 250000; port xe,ce linkscan=on
|
||||||
|
sleep 1
|
||||||
|
led auto on; led start
|
153
device/celestica/x86_64-cel_questone_2-r0/pcie.yaml
Normal file
153
device/celestica/x86_64-cel_questone_2-r0/pcie.yaml
Normal file
@ -0,0 +1,153 @@
|
|||||||
|
- bus: '00'
|
||||||
|
dev: '00'
|
||||||
|
fn: '0'
|
||||||
|
id: '1980'
|
||||||
|
name: 'Host bridge: Intel Corporation Atom Processor C3000 Series System Agent (rev
|
||||||
|
11)'
|
||||||
|
- bus: '00'
|
||||||
|
dev: '04'
|
||||||
|
fn: '0'
|
||||||
|
id: 19a1
|
||||||
|
name: 'Host bridge: Intel Corporation Atom Processor C3000 Series Error Registers
|
||||||
|
(rev 11)'
|
||||||
|
- bus: '00'
|
||||||
|
dev: '05'
|
||||||
|
fn: '0'
|
||||||
|
id: 19a2
|
||||||
|
name: 'Generic system peripheral [0807]: Intel Corporation Atom Processor C3000
|
||||||
|
Series Root Complex Event Collector (rev 11)'
|
||||||
|
- bus: '00'
|
||||||
|
dev: '06'
|
||||||
|
fn: '0'
|
||||||
|
id: 19a3
|
||||||
|
name: 'PCI bridge: Intel Corporation Atom Processor C3000 Series Integrated QAT
|
||||||
|
Root Port (rev 11)'
|
||||||
|
- bus: '00'
|
||||||
|
dev: 09
|
||||||
|
fn: '0'
|
||||||
|
id: 19a4
|
||||||
|
name: 'PCI bridge: Intel Corporation Atom Processor C3000 Series PCI Express Root
|
||||||
|
Port #0 (rev 11)'
|
||||||
|
- bus: '00'
|
||||||
|
dev: '10'
|
||||||
|
fn: '0'
|
||||||
|
id: 19aa
|
||||||
|
name: 'PCI bridge: Intel Corporation Atom Processor C3000 Series PCI Express Root
|
||||||
|
Port #6 (rev 11)'
|
||||||
|
- bus: '00'
|
||||||
|
dev: '11'
|
||||||
|
fn: '0'
|
||||||
|
id: 19ab
|
||||||
|
name: 'PCI bridge: Intel Corporation Atom Processor C3000 Series PCI Express Root
|
||||||
|
Port #7 (rev 11)'
|
||||||
|
- bus: '00'
|
||||||
|
dev: '12'
|
||||||
|
fn: '0'
|
||||||
|
id: 19ac
|
||||||
|
name: 'System peripheral: Intel Corporation Atom Processor C3000 Series SMBus Contoller
|
||||||
|
- Host (rev 11)'
|
||||||
|
- bus: '00'
|
||||||
|
dev: '14'
|
||||||
|
fn: '0'
|
||||||
|
id: 19c2
|
||||||
|
name: 'SATA controller: Intel Corporation Atom Processor C3000 Series SATA Controller
|
||||||
|
1 (rev 11)'
|
||||||
|
- bus: '00'
|
||||||
|
dev: '15'
|
||||||
|
fn: '0'
|
||||||
|
id: 19d0
|
||||||
|
name: 'USB controller: Intel Corporation Atom Processor C3000 Series USB 3.0 xHCI
|
||||||
|
Controller (rev 11)'
|
||||||
|
- bus: '00'
|
||||||
|
dev: '16'
|
||||||
|
fn: '0'
|
||||||
|
id: 19d1
|
||||||
|
name: 'PCI bridge: Intel Corporation Atom Processor C3000 Series Integrated LAN
|
||||||
|
Root Port #0 (rev 11)'
|
||||||
|
- bus: '00'
|
||||||
|
dev: '18'
|
||||||
|
fn: '0'
|
||||||
|
id: 19d3
|
||||||
|
name: 'Communication controller: Intel Corporation Atom Processor C3000 Series ME
|
||||||
|
HECI 1 (rev 11)'
|
||||||
|
- bus: '00'
|
||||||
|
dev: 1a
|
||||||
|
fn: '0'
|
||||||
|
id: 19d8
|
||||||
|
name: 'Serial controller: Intel Corporation Atom Processor C3000 Series HSUART Controller
|
||||||
|
(rev 11)'
|
||||||
|
- bus: '00'
|
||||||
|
dev: 1a
|
||||||
|
fn: '1'
|
||||||
|
id: 19d8
|
||||||
|
name: 'Serial controller: Intel Corporation Atom Processor C3000 Series HSUART Controller
|
||||||
|
(rev 11)'
|
||||||
|
- bus: '00'
|
||||||
|
dev: 1a
|
||||||
|
fn: '2'
|
||||||
|
id: 19d8
|
||||||
|
name: 'Serial controller: Intel Corporation Atom Processor C3000 Series HSUART Controller
|
||||||
|
(rev 11)'
|
||||||
|
- bus: '00'
|
||||||
|
dev: 1c
|
||||||
|
fn: '0'
|
||||||
|
id: 19db
|
||||||
|
name: 'SD Host controller: Intel Corporation Device 19db (rev 11)'
|
||||||
|
- bus: '00'
|
||||||
|
dev: 1f
|
||||||
|
fn: '0'
|
||||||
|
id: 19dc
|
||||||
|
name: 'ISA bridge: Intel Corporation Atom Processor C3000 Series LPC or eSPI (rev
|
||||||
|
11)'
|
||||||
|
- bus: '00'
|
||||||
|
dev: 1f
|
||||||
|
fn: '2'
|
||||||
|
id: 19de
|
||||||
|
name: 'Memory controller: Intel Corporation Atom Processor C3000 Series Power Management
|
||||||
|
Controller (rev 11)'
|
||||||
|
- bus: '00'
|
||||||
|
dev: 1f
|
||||||
|
fn: '4'
|
||||||
|
id: 19df
|
||||||
|
name: 'SMBus: Intel Corporation Atom Processor C3000 Series SMBus controller (rev
|
||||||
|
11)'
|
||||||
|
- bus: '00'
|
||||||
|
dev: 1f
|
||||||
|
fn: '5'
|
||||||
|
id: 19e0
|
||||||
|
name: 'Serial bus controller [0c80]: Intel Corporation Atom Processor C3000 Series
|
||||||
|
SPI Controller (rev 11)'
|
||||||
|
- bus: '01'
|
||||||
|
dev: '00'
|
||||||
|
fn: '0'
|
||||||
|
id: 19e2
|
||||||
|
name: 'Co-processor: Intel Corporation Atom Processor C3000 Series QuickAssist Technology
|
||||||
|
(rev 11)'
|
||||||
|
- bus: '02'
|
||||||
|
dev: '00'
|
||||||
|
fn: '0'
|
||||||
|
id: b770
|
||||||
|
name: 'Ethernet controller: Broadcom Inc. and subsidiaries Device b770 (rev 01)'
|
||||||
|
- bus: '03'
|
||||||
|
dev: '00'
|
||||||
|
fn: '0'
|
||||||
|
id: '7021'
|
||||||
|
name: 'Memory controller: Xilinx Corporation Device 7021'
|
||||||
|
- bus: '04'
|
||||||
|
dev: '00'
|
||||||
|
fn: '0'
|
||||||
|
id: '1533'
|
||||||
|
name: 'Ethernet controller: Intel Corporation I210 Gigabit Network Connection (rev
|
||||||
|
03)'
|
||||||
|
- bus: '05'
|
||||||
|
dev: '00'
|
||||||
|
fn: '0'
|
||||||
|
id: 15c2
|
||||||
|
name: 'Ethernet controller: Intel Corporation Ethernet Connection X553 Backplane
|
||||||
|
(rev 11)'
|
||||||
|
- bus: '05'
|
||||||
|
dev: '00'
|
||||||
|
fn: '1'
|
||||||
|
id: 15c2
|
||||||
|
name: 'Ethernet controller: Intel Corporation Ethernet Connection X553 Backplane
|
||||||
|
(rev 11)'
|
1
device/celestica/x86_64-cel_questone_2-r0/platform_asic
Normal file
1
device/celestica/x86_64-cel_questone_2-r0/platform_asic
Normal file
@ -0,0 +1 @@
|
|||||||
|
broadcom
|
6
device/celestica/x86_64-cel_questone_2-r0/platform_reboot
Executable file
6
device/celestica/x86_64-cel_questone_2-r0/platform_reboot
Executable file
@ -0,0 +1,6 @@
|
|||||||
|
#!/bin/bash
|
||||||
|
|
||||||
|
# Set all LEDs to BMC's control
|
||||||
|
ipmitool raw 0x3a 0x0f 0x02 0x01 &> /dev/null
|
||||||
|
|
||||||
|
/usr/local/bin/questone2_platform_shutdown.sh system
|
23
device/celestica/x86_64-cel_questone_2-r0/plugins/eeprom.py
Normal file
23
device/celestica/x86_64-cel_questone_2-r0/plugins/eeprom.py
Normal file
@ -0,0 +1,23 @@
|
|||||||
|
#!/usr/bin/env python
|
||||||
|
|
||||||
|
#############################################################################
|
||||||
|
# Celestica DX010
|
||||||
|
#
|
||||||
|
# Platform and model specific eeprom subclass, inherits from the base class,
|
||||||
|
# and provides the followings:
|
||||||
|
# - the eeprom format definition
|
||||||
|
# - specific encoder/decoder if there is special need
|
||||||
|
#############################################################################
|
||||||
|
|
||||||
|
try:
|
||||||
|
from sonic_eeprom import eeprom_tlvinfo
|
||||||
|
except ImportError as e:
|
||||||
|
raise ImportError (str(e) + "- required module not found")
|
||||||
|
|
||||||
|
|
||||||
|
class board(eeprom_tlvinfo.TlvInfoDecoder):
|
||||||
|
|
||||||
|
def __init__(self, name, path, cpld_root, ro):
|
||||||
|
self.eeprom_path = "/sys/class/i2c-adapter/i2c-0/0-0056/eeprom"
|
||||||
|
super(board, self).__init__(self.eeprom_path, 0, '', True)
|
||||||
|
|
312
device/celestica/x86_64-cel_questone_2-r0/plugins/sfputil.py
Executable file
312
device/celestica/x86_64-cel_questone_2-r0/plugins/sfputil.py
Executable file
@ -0,0 +1,312 @@
|
|||||||
|
#!/usr/bin/env python
|
||||||
|
#
|
||||||
|
# Platform-specific SFP transceiver interface for SONiC
|
||||||
|
#
|
||||||
|
|
||||||
|
try:
|
||||||
|
import time
|
||||||
|
from sonic_sfp.sfputilbase import SfpUtilBase
|
||||||
|
import struct
|
||||||
|
except ImportError as e:
|
||||||
|
raise ImportError("%s - required module not found" % str(e))
|
||||||
|
|
||||||
|
|
||||||
|
class SfpUtil(SfpUtilBase):
|
||||||
|
"""Platform-specific SfpUtil class"""
|
||||||
|
|
||||||
|
PORT_START = 0
|
||||||
|
PORT_END = 55
|
||||||
|
QSFP_PORT_START = 48
|
||||||
|
QSFP_PORT_END = 55
|
||||||
|
__xcvr_presence = {}
|
||||||
|
|
||||||
|
EEPROM_OFFSET = 9
|
||||||
|
PORT_INFO_PATH = '/sys/class/questone2_fpga'
|
||||||
|
|
||||||
|
_port_name = ""
|
||||||
|
_port_to_eeprom_mapping = {}
|
||||||
|
_port_to_i2cbus_mapping = {}
|
||||||
|
|
||||||
|
@property
|
||||||
|
def port_start(self):
|
||||||
|
return self.PORT_START
|
||||||
|
|
||||||
|
@property
|
||||||
|
def port_end(self):
|
||||||
|
return self.PORT_END
|
||||||
|
|
||||||
|
@property
|
||||||
|
def qsfp_ports(self):
|
||||||
|
return range(self.QSFP_PORT_START, self.QSFP_PORT_END + 1)
|
||||||
|
|
||||||
|
@property
|
||||||
|
def port_to_eeprom_mapping(self):
|
||||||
|
return self._port_to_eeprom_mapping
|
||||||
|
|
||||||
|
@property
|
||||||
|
def port_to_i2cbus_mapping(self):
|
||||||
|
return self._port_to_i2cbus_mapping
|
||||||
|
|
||||||
|
def get_port_name(self, port_num):
|
||||||
|
if port_num in self.qsfp_ports:
|
||||||
|
self._port_name = "QSFP" + str(port_num - self.QSFP_PORT_START + 1)
|
||||||
|
else:
|
||||||
|
self._port_name = "SFP" + str(port_num + 1)
|
||||||
|
return self._port_name
|
||||||
|
|
||||||
|
def get_eeprom_dom_raw(self, port_num):
|
||||||
|
if port_num in self.qsfp_ports:
|
||||||
|
# QSFP DOM EEPROM is also at addr 0x50 and thus also stored in eeprom_ifraw
|
||||||
|
return None
|
||||||
|
else:
|
||||||
|
# Read dom eeprom at addr 0x51
|
||||||
|
return self._read_eeprom_devid(port_num, self.DOM_EEPROM_ADDR, 256)
|
||||||
|
|
||||||
|
def __init__(self):
|
||||||
|
# Override port_to_eeprom_mapping for class initialization
|
||||||
|
eeprom_path = '/sys/bus/i2c/devices/i2c-{0}/{0}-0050/eeprom'
|
||||||
|
|
||||||
|
for x in range(self.PORT_START, self.PORT_END+1):
|
||||||
|
# port_index = 0 , it's path = /sys/bus/i2c/devices/i2c-10/10-0050/eeprom
|
||||||
|
# port_index = 55, it's path = /sys/bus/i2c/devices/i2c-65/65-0050/eeprom
|
||||||
|
# so the real offset is 10
|
||||||
|
self.port_to_i2cbus_mapping[x] = (x + 1 + self.EEPROM_OFFSET)
|
||||||
|
self.port_to_eeprom_mapping[x] = eeprom_path.format(
|
||||||
|
x + 1 + self.EEPROM_OFFSET)
|
||||||
|
SfpUtilBase.__init__(self)
|
||||||
|
for x in range(self.PORT_START, self.PORT_END+1):
|
||||||
|
self.__xcvr_presence[x] = self.get_presence(x)
|
||||||
|
|
||||||
|
def _do_write_file(self, file_handle, offset, value):
|
||||||
|
file_handle.seek(offset)
|
||||||
|
file_handle.write(hex(value))
|
||||||
|
file_handle.close()
|
||||||
|
|
||||||
|
def get_presence(self, port_num):
|
||||||
|
|
||||||
|
# Check for invalid port_num
|
||||||
|
if port_num not in range(self.port_start, self.port_end + 1):
|
||||||
|
return False
|
||||||
|
|
||||||
|
# Get path for access port presence status
|
||||||
|
port_name = self.get_port_name(port_num)
|
||||||
|
sysfs_filename = "qsfp_modprs" if port_num in self.qsfp_ports else "sfp_modabs"
|
||||||
|
reg_path = "/".join([self.PORT_INFO_PATH, port_name, sysfs_filename])
|
||||||
|
|
||||||
|
# Read status
|
||||||
|
try:
|
||||||
|
reg_file = open(reg_path)
|
||||||
|
content = reg_file.readline().rstrip()
|
||||||
|
reg_value = int(content)
|
||||||
|
except IOError as e:
|
||||||
|
print "Error: unable to open file: %s" % str(e)
|
||||||
|
return False
|
||||||
|
|
||||||
|
# Module present is active low
|
||||||
|
if reg_value == 0:
|
||||||
|
return True
|
||||||
|
|
||||||
|
return False
|
||||||
|
|
||||||
|
def get_low_power_mode(self, port_num):
|
||||||
|
if not self.get_presence(port_num):
|
||||||
|
return None
|
||||||
|
|
||||||
|
eeprom_raw = []
|
||||||
|
eeprom_raw.append("0x00")
|
||||||
|
|
||||||
|
lpmode = False
|
||||||
|
eeprom_path = '/sys/bus/i2c/devices/i2c-{0}/{0}-0050/eeprom'.format(port_num + 1 + self.EEPROM_OFFSET)
|
||||||
|
if port_num >= 49:
|
||||||
|
try:
|
||||||
|
with open(eeprom_path, mode="rb", buffering=0) as eeprom:
|
||||||
|
eeprom.seek(93)
|
||||||
|
raw = eeprom.read(1)
|
||||||
|
eeprom.close()
|
||||||
|
except Exception as err:
|
||||||
|
return None
|
||||||
|
|
||||||
|
if len(raw) == 0:
|
||||||
|
return None
|
||||||
|
eeprom_raw[0] = hex(ord(raw[0]))[2:].zfill(2)
|
||||||
|
|
||||||
|
power_data = int(eeprom_raw[0], 16)
|
||||||
|
# if lpmod, power-override bit and power-set bit are both setted
|
||||||
|
# bit0 bit1
|
||||||
|
lpmode = power_data & 0x03 != 0
|
||||||
|
else:
|
||||||
|
return None
|
||||||
|
|
||||||
|
return lpmode
|
||||||
|
|
||||||
|
def set_low_power_mode(self, port_num, lpmode):
|
||||||
|
# Check for invalid QSFP port_num
|
||||||
|
if port_num not in self.qsfp_ports:
|
||||||
|
return False
|
||||||
|
|
||||||
|
if not self.get_presence(port_num):
|
||||||
|
return False
|
||||||
|
eeprom_path = '/sys/bus/i2c/devices/i2c-{0}/{0}-0050/eeprom'.format(port_num + 1 + self.EEPROM_OFFSET)
|
||||||
|
try:
|
||||||
|
reg_file = open(eeprom_path, mode="wb+")
|
||||||
|
except IOError as e:
|
||||||
|
print "Error: unable to open file: %s" % str(e)
|
||||||
|
return False
|
||||||
|
|
||||||
|
reg_file.seek(93)
|
||||||
|
power_raw = reg_file.read(1)
|
||||||
|
if power_raw is None:
|
||||||
|
return False
|
||||||
|
power_data = int(hex(ord(power_raw))[2:].zfill(2), 16)
|
||||||
|
|
||||||
|
if lpmode:
|
||||||
|
power_data |= 0x03
|
||||||
|
else:
|
||||||
|
power_data &= ~(0x03)
|
||||||
|
|
||||||
|
reg_file.seek(93)
|
||||||
|
reg_file.write(struct.pack('B', int(power_data)))
|
||||||
|
reg_file.close()
|
||||||
|
|
||||||
|
return True
|
||||||
|
|
||||||
|
def reset(self, port_num):
|
||||||
|
# Check for invalid QSFP port_num
|
||||||
|
if port_num not in self.qsfp_ports:
|
||||||
|
return False
|
||||||
|
|
||||||
|
try:
|
||||||
|
port_name = self.get_port_name(port_num)
|
||||||
|
reg_file = open(
|
||||||
|
"/".join([self.PORT_INFO_PATH, port_name, "qsfp_reset"]), "w")
|
||||||
|
except IOError as e:
|
||||||
|
print "Error: unable to open file: %s" % str(e)
|
||||||
|
return False
|
||||||
|
|
||||||
|
# Convert our register value back to a hex string and write back
|
||||||
|
reg_file.seek(0)
|
||||||
|
reg_file.write(hex(0))
|
||||||
|
reg_file.close()
|
||||||
|
|
||||||
|
# Sleep 1 second to allow it to settle
|
||||||
|
time.sleep(1)
|
||||||
|
|
||||||
|
# Flip the bit back high and write back to the register to take port out of reset
|
||||||
|
try:
|
||||||
|
reg_file = open(
|
||||||
|
"/".join([self.PORT_INFO_PATH, port_name, "qsfp_reset"]), "w")
|
||||||
|
except IOError as e:
|
||||||
|
print "Error: unable to open file: %s" % str(e)
|
||||||
|
return False
|
||||||
|
|
||||||
|
reg_file.seek(0)
|
||||||
|
reg_file.write(hex(1))
|
||||||
|
reg_file.close()
|
||||||
|
|
||||||
|
return True
|
||||||
|
|
||||||
|
def get_transceiver_change_event(self, timeout=0):
|
||||||
|
"""
|
||||||
|
To detect if any transceiver change event happens.
|
||||||
|
"""
|
||||||
|
start_ms = time.time() * 1000
|
||||||
|
xcvr_change_event_dict = {}
|
||||||
|
event = False
|
||||||
|
|
||||||
|
while True:
|
||||||
|
time.sleep(0.5)
|
||||||
|
for port in range(self.port_start, self.port_end+1):
|
||||||
|
curr_presence = self.get_presence(port)
|
||||||
|
if curr_presence != self.__xcvr_presence[port]:
|
||||||
|
if curr_presence is True:
|
||||||
|
xcvr_change_event_dict[str(port)] = '1'
|
||||||
|
self.__xcvr_presence[port] = True
|
||||||
|
elif curr_presence is False:
|
||||||
|
xcvr_change_event_dict[str(port)] = '0'
|
||||||
|
self.__xcvr_presence[port] = False
|
||||||
|
event = True
|
||||||
|
|
||||||
|
if event is True:
|
||||||
|
return True, xcvr_change_event_dict
|
||||||
|
|
||||||
|
if timeout:
|
||||||
|
now_ms = time.time() * 1000
|
||||||
|
if (now_ms - start_ms >= timeout):
|
||||||
|
return True, xcvr_change_event_dict
|
||||||
|
|
||||||
|
def tx_disable(self, port_num, disable):
|
||||||
|
"""
|
||||||
|
@param port_num index of physical port
|
||||||
|
@param disable, True -- disable port tx signal
|
||||||
|
False -- enable port tx signal
|
||||||
|
@return True when operation success, False on failure.
|
||||||
|
"""
|
||||||
|
TX_DISABLE_BYTE_OFFSET = 86
|
||||||
|
if port_num not in range(self.port_start, self.port_end + 1) or type(disable) != bool:
|
||||||
|
return False
|
||||||
|
|
||||||
|
# QSFP, set eeprom to disable tx
|
||||||
|
if port_num in self.qsfp_ports:
|
||||||
|
presence = self.get_presence(port_num)
|
||||||
|
if not presence:
|
||||||
|
return True
|
||||||
|
|
||||||
|
disable = b'\x0f' if disable else b'\x00'
|
||||||
|
# open eeprom
|
||||||
|
try:
|
||||||
|
with open(self.port_to_eeprom_mapping[port_num], mode="wb", buffering=0) as sysfsfile:
|
||||||
|
sysfsfile.seek(TX_DISABLE_BYTE_OFFSET)
|
||||||
|
sysfsfile.write(bytearray(disable))
|
||||||
|
except IOError:
|
||||||
|
return False
|
||||||
|
|
||||||
|
# SFP, set tx_disable pin
|
||||||
|
else:
|
||||||
|
try:
|
||||||
|
disable = hex(1) if disable else hex(0)
|
||||||
|
port_name = self.get_port_name(port_num)
|
||||||
|
reg_file = open(
|
||||||
|
"/".join([self.PORT_INFO_PATH, port_name, "sfp_txdisable"]), "w")
|
||||||
|
reg_file.write(disable)
|
||||||
|
reg_file.close()
|
||||||
|
except IOError as e:
|
||||||
|
print "Error: unable to open file: %s" % str(e)
|
||||||
|
return False
|
||||||
|
|
||||||
|
return True
|
||||||
|
|
||||||
|
def reset_all(self):
|
||||||
|
result = True
|
||||||
|
port_sysfs_path = []
|
||||||
|
for port in range(self.port_start, self.port_end+1):
|
||||||
|
if port not in self.qsfp_ports:
|
||||||
|
continue
|
||||||
|
|
||||||
|
presence = self.get_presence(port)
|
||||||
|
if not presence:
|
||||||
|
continue
|
||||||
|
|
||||||
|
try:
|
||||||
|
port_name = self.get_port_name(port)
|
||||||
|
sysfs_path = "/".join([self.PORT_INFO_PATH,
|
||||||
|
port_name, "qsfp_reset"])
|
||||||
|
reg_file = open(sysfs_path, "w")
|
||||||
|
port_sysfs_path.append(sysfs_path)
|
||||||
|
except IOError as e:
|
||||||
|
result = False
|
||||||
|
continue
|
||||||
|
|
||||||
|
self._do_write_file(reg_file, 0, 0)
|
||||||
|
|
||||||
|
time.sleep(1)
|
||||||
|
|
||||||
|
for sysfs_path in port_sysfs_path:
|
||||||
|
try:
|
||||||
|
reg_file = open(sysfs_path, "w")
|
||||||
|
except IOError as e:
|
||||||
|
result = False
|
||||||
|
continue
|
||||||
|
|
||||||
|
self._do_write_file(reg_file, 0, 1)
|
||||||
|
|
||||||
|
return result
|
@ -0,0 +1,5 @@
|
|||||||
|
{
|
||||||
|
"skip_ledd": true,
|
||||||
|
"skip_fancontrol": true,
|
||||||
|
"skip_xcvrd_cmis_mgr": true
|
||||||
|
}
|
@ -0,0 +1,13 @@
|
|||||||
|
{
|
||||||
|
"services_to_ignore": [],
|
||||||
|
"devices_to_ignore": [
|
||||||
|
"psu.temperature"
|
||||||
|
],
|
||||||
|
"user_defined_checkers": [],
|
||||||
|
"polling_interval": 60,
|
||||||
|
"led_color": {
|
||||||
|
"fault": "amber",
|
||||||
|
"normal": "green",
|
||||||
|
"booting": "green_blink_1hz"
|
||||||
|
}
|
||||||
|
}
|
4
device/celestica/x86_64-cel_questone_2-r0/warm-reboot_plugin
Executable file
4
device/celestica/x86_64-cel_questone_2-r0/warm-reboot_plugin
Executable file
@ -0,0 +1,4 @@
|
|||||||
|
#!/bin/bash
|
||||||
|
|
||||||
|
# Set all LEDs to BMC's control
|
||||||
|
ipmitool raw 0x3a 0x0f 0x02 0x01 &> /dev/null
|
@ -0,0 +1,2 @@
|
|||||||
|
{%- set default_topo = 't1' %}
|
||||||
|
{%- include 'buffers_config.j2' %}
|
@ -0,0 +1,46 @@
|
|||||||
|
{%- set default_cable = '300m' %}
|
||||||
|
|
||||||
|
{%- macro generate_port_lists(PORT_ALL) %}
|
||||||
|
{# Generate list of ports #}
|
||||||
|
{% for port_idx in range(0,32) %}
|
||||||
|
{% if PORT_ALL.append("Ethernet%d" % (port_idx * 4)) %}{% endif %}
|
||||||
|
{% endfor %}
|
||||||
|
{%- endmacro %}
|
||||||
|
|
||||||
|
{%- macro generate_buffer_pool_and_profiles() %}
|
||||||
|
"BUFFER_POOL": {
|
||||||
|
"ingress_lossless_pool": {
|
||||||
|
"xoff": "4625920",
|
||||||
|
"size": "12766208",
|
||||||
|
"type": "ingress",
|
||||||
|
"mode": "dynamic"
|
||||||
|
},
|
||||||
|
"egress_lossless_pool": {
|
||||||
|
"size": "12766208",
|
||||||
|
"type": "egress",
|
||||||
|
"mode": "static"
|
||||||
|
},
|
||||||
|
"egress_lossy_pool": {
|
||||||
|
"size": "7326924",
|
||||||
|
"type": "egress",
|
||||||
|
"mode": "dynamic"
|
||||||
|
}
|
||||||
|
},
|
||||||
|
"BUFFER_PROFILE": {
|
||||||
|
"ingress_lossy_profile": {
|
||||||
|
"pool":"[BUFFER_POOL|ingress_lossless_pool]",
|
||||||
|
"size":"0",
|
||||||
|
"dynamic_th":"3"
|
||||||
|
},
|
||||||
|
"egress_lossless_profile": {
|
||||||
|
"pool":"[BUFFER_POOL|egress_lossless_pool]",
|
||||||
|
"size":"0",
|
||||||
|
"static_th":"12766208"
|
||||||
|
},
|
||||||
|
"egress_lossy_profile": {
|
||||||
|
"pool":"[BUFFER_POOL|egress_lossless_pool]",
|
||||||
|
"size":"1518",
|
||||||
|
"dynamic_th":"3"
|
||||||
|
}
|
||||||
|
},
|
||||||
|
{%- endmacro %}
|
@ -0,0 +1,45 @@
|
|||||||
|
{%- set default_cable = '300m' %}
|
||||||
|
|
||||||
|
{%- macro generate_port_lists(PORT_ALL) %}
|
||||||
|
{# Generate list of ports #}
|
||||||
|
{% for port_idx in range(0,32) %}
|
||||||
|
{% if PORT_ALL.append("Ethernet%d" % (port_idx * 4)) %}{% endif %}
|
||||||
|
{% endfor %}
|
||||||
|
{%- endmacro %}
|
||||||
|
|
||||||
|
{%- macro generate_buffer_pool_and_profiles() %}
|
||||||
|
"BUFFER_POOL": {
|
||||||
|
"ingress_lossless_pool": {
|
||||||
|
"size": "12766208",
|
||||||
|
"type": "ingress",
|
||||||
|
"mode": "dynamic"
|
||||||
|
},
|
||||||
|
"egress_lossless_pool": {
|
||||||
|
"size": "12766208",
|
||||||
|
"type": "egress",
|
||||||
|
"mode": "static"
|
||||||
|
},
|
||||||
|
"egress_lossy_pool": {
|
||||||
|
"size": "7326924",
|
||||||
|
"type": "egress",
|
||||||
|
"mode": "dynamic"
|
||||||
|
}
|
||||||
|
},
|
||||||
|
"BUFFER_PROFILE": {
|
||||||
|
"ingress_lossy_profile": {
|
||||||
|
"pool":"[BUFFER_POOL|ingress_lossless_pool]",
|
||||||
|
"size":"0",
|
||||||
|
"dynamic_th":"3"
|
||||||
|
},
|
||||||
|
"egress_lossless_profile": {
|
||||||
|
"pool":"[BUFFER_POOL|egress_lossless_pool]",
|
||||||
|
"size":"0",
|
||||||
|
"static_th":"12766208"
|
||||||
|
},
|
||||||
|
"egress_lossy_profile": {
|
||||||
|
"pool":"[BUFFER_POOL|egress_lossless_pool]",
|
||||||
|
"size":"1518",
|
||||||
|
"dynamic_th":"3"
|
||||||
|
}
|
||||||
|
},
|
||||||
|
{%- endmacro %}
|
@ -0,0 +1,46 @@
|
|||||||
|
{%- set default_cable = '300m' %}
|
||||||
|
|
||||||
|
{%- macro generate_port_lists(PORT_ALL) %}
|
||||||
|
{# Generate list of ports #}
|
||||||
|
{% for port_idx in range(0,32) %}
|
||||||
|
{% if PORT_ALL.append("Ethernet%d" % (port_idx * 4)) %}{% endif %}
|
||||||
|
{% endfor %}
|
||||||
|
{%- endmacro %}
|
||||||
|
|
||||||
|
{%- macro generate_buffer_pool_and_profiles() %}
|
||||||
|
"BUFFER_POOL": {
|
||||||
|
"ingress_lossless_pool": {
|
||||||
|
"xoff": "4625920",
|
||||||
|
"size": "12766208",
|
||||||
|
"type": "ingress",
|
||||||
|
"mode": "dynamic"
|
||||||
|
},
|
||||||
|
"egress_lossless_pool": {
|
||||||
|
"size": "12766208",
|
||||||
|
"type": "egress",
|
||||||
|
"mode": "static"
|
||||||
|
},
|
||||||
|
"egress_lossy_pool": {
|
||||||
|
"size": "7326924",
|
||||||
|
"type": "egress",
|
||||||
|
"mode": "dynamic"
|
||||||
|
}
|
||||||
|
},
|
||||||
|
"BUFFER_PROFILE": {
|
||||||
|
"ingress_lossy_profile": {
|
||||||
|
"pool":"[BUFFER_POOL|ingress_lossless_pool]",
|
||||||
|
"size":"0",
|
||||||
|
"dynamic_th":"3"
|
||||||
|
},
|
||||||
|
"egress_lossless_profile": {
|
||||||
|
"pool":"[BUFFER_POOL|egress_lossless_pool]",
|
||||||
|
"size":"0",
|
||||||
|
"static_th":"12766208"
|
||||||
|
},
|
||||||
|
"egress_lossy_profile": {
|
||||||
|
"pool":"[BUFFER_POOL|egress_lossless_pool]",
|
||||||
|
"size":"1518",
|
||||||
|
"dynamic_th":"3"
|
||||||
|
}
|
||||||
|
},
|
||||||
|
{%- endmacro %}
|
169
device/celestica/x86_64-cel_seastone_2-r0/Seastone_2/hwsku.json
Normal file
169
device/celestica/x86_64-cel_seastone_2-r0/Seastone_2/hwsku.json
Normal file
@ -0,0 +1,169 @@
|
|||||||
|
{
|
||||||
|
"interfaces": {
|
||||||
|
"Ethernet0": {
|
||||||
|
"default_brkout_mode": "1x100G",
|
||||||
|
"autoneg": "off",
|
||||||
|
"fec": "rs"
|
||||||
|
},
|
||||||
|
"Ethernet4": {
|
||||||
|
"default_brkout_mode": "1x100G",
|
||||||
|
"autoneg": "off",
|
||||||
|
"fec": "rs"
|
||||||
|
},
|
||||||
|
"Ethernet8": {
|
||||||
|
"default_brkout_mode": "1x100G",
|
||||||
|
"autoneg": "off",
|
||||||
|
"fec": "rs"
|
||||||
|
},
|
||||||
|
"Ethernet12": {
|
||||||
|
"default_brkout_mode": "1x100G",
|
||||||
|
"autoneg": "off",
|
||||||
|
"fec": "rs"
|
||||||
|
},
|
||||||
|
"Ethernet16": {
|
||||||
|
"default_brkout_mode": "1x100G",
|
||||||
|
"autoneg": "off",
|
||||||
|
"fec": "rs"
|
||||||
|
},
|
||||||
|
"Ethernet20": {
|
||||||
|
"default_brkout_mode": "1x100G",
|
||||||
|
"autoneg": "off",
|
||||||
|
"fec": "rs"
|
||||||
|
},
|
||||||
|
"Ethernet24": {
|
||||||
|
"default_brkout_mode": "1x100G",
|
||||||
|
"autoneg": "off",
|
||||||
|
"fec": "rs"
|
||||||
|
},
|
||||||
|
"Ethernet28": {
|
||||||
|
"default_brkout_mode": "1x100G",
|
||||||
|
"autoneg": "off",
|
||||||
|
"fec": "rs"
|
||||||
|
},
|
||||||
|
"Ethernet32": {
|
||||||
|
"default_brkout_mode": "1x100G",
|
||||||
|
"autoneg": "off",
|
||||||
|
"fec": "rs"
|
||||||
|
},
|
||||||
|
"Ethernet36": {
|
||||||
|
"default_brkout_mode": "1x100G",
|
||||||
|
"autoneg": "off",
|
||||||
|
"fec": "rs"
|
||||||
|
},
|
||||||
|
"Ethernet40": {
|
||||||
|
"default_brkout_mode": "1x100G",
|
||||||
|
"autoneg": "off",
|
||||||
|
"fec": "rs"
|
||||||
|
},
|
||||||
|
"Ethernet44": {
|
||||||
|
"default_brkout_mode": "1x100G",
|
||||||
|
"autoneg": "off",
|
||||||
|
"fec": "rs"
|
||||||
|
},
|
||||||
|
"Ethernet48": {
|
||||||
|
"default_brkout_mode": "1x100G",
|
||||||
|
"autoneg": "off",
|
||||||
|
"fec": "rs"
|
||||||
|
},
|
||||||
|
"Ethernet52": {
|
||||||
|
"default_brkout_mode": "1x100G",
|
||||||
|
"autoneg": "off",
|
||||||
|
"fec": "rs"
|
||||||
|
},
|
||||||
|
"Ethernet56": {
|
||||||
|
"default_brkout_mode": "1x100G",
|
||||||
|
"autoneg": "off",
|
||||||
|
"fec": "rs"
|
||||||
|
},
|
||||||
|
"Ethernet60": {
|
||||||
|
"default_brkout_mode": "1x100G",
|
||||||
|
"autoneg": "off",
|
||||||
|
"fec": "rs"
|
||||||
|
},
|
||||||
|
"Ethernet64": {
|
||||||
|
"default_brkout_mode": "1x100G",
|
||||||
|
"autoneg": "off",
|
||||||
|
"fec": "rs"
|
||||||
|
},
|
||||||
|
"Ethernet68": {
|
||||||
|
"default_brkout_mode": "1x100G",
|
||||||
|
"autoneg": "off",
|
||||||
|
"fec": "rs"
|
||||||
|
},
|
||||||
|
"Ethernet72": {
|
||||||
|
"default_brkout_mode": "1x100G",
|
||||||
|
"autoneg": "off",
|
||||||
|
"fec": "rs"
|
||||||
|
},
|
||||||
|
"Ethernet76": {
|
||||||
|
"default_brkout_mode": "1x100G",
|
||||||
|
"autoneg": "off",
|
||||||
|
"fec": "rs"
|
||||||
|
},
|
||||||
|
"Ethernet80": {
|
||||||
|
"default_brkout_mode": "1x100G",
|
||||||
|
"autoneg": "off",
|
||||||
|
"fec": "rs"
|
||||||
|
},
|
||||||
|
"Ethernet84": {
|
||||||
|
"default_brkout_mode": "1x100G",
|
||||||
|
"autoneg": "off",
|
||||||
|
"fec": "rs"
|
||||||
|
},
|
||||||
|
"Ethernet88": {
|
||||||
|
"default_brkout_mode": "1x100G",
|
||||||
|
"autoneg": "off",
|
||||||
|
"fec": "rs"
|
||||||
|
},
|
||||||
|
"Ethernet92": {
|
||||||
|
"default_brkout_mode": "1x100G",
|
||||||
|
"autoneg": "off",
|
||||||
|
"fec": "rs"
|
||||||
|
},
|
||||||
|
"Ethernet96": {
|
||||||
|
"default_brkout_mode": "1x100G",
|
||||||
|
"autoneg": "off",
|
||||||
|
"fec": "rs"
|
||||||
|
},
|
||||||
|
"Ethernet100": {
|
||||||
|
"default_brkout_mode": "1x100G",
|
||||||
|
"autoneg": "off",
|
||||||
|
"fec": "rs"
|
||||||
|
},
|
||||||
|
"Ethernet104": {
|
||||||
|
"default_brkout_mode": "1x100G",
|
||||||
|
"autoneg": "off",
|
||||||
|
"fec": "rs"
|
||||||
|
},
|
||||||
|
"Ethernet108": {
|
||||||
|
"default_brkout_mode": "1x100G",
|
||||||
|
"autoneg": "off",
|
||||||
|
"fec": "rs"
|
||||||
|
},
|
||||||
|
"Ethernet112": {
|
||||||
|
"default_brkout_mode": "1x100G",
|
||||||
|
"autoneg": "off",
|
||||||
|
"fec": "rs"
|
||||||
|
},
|
||||||
|
"Ethernet116": {
|
||||||
|
"default_brkout_mode": "1x100G",
|
||||||
|
"autoneg": "off",
|
||||||
|
"fec": "rs"
|
||||||
|
},
|
||||||
|
"Ethernet120": {
|
||||||
|
"default_brkout_mode": "1x100G",
|
||||||
|
"autoneg": "off",
|
||||||
|
"fec": "rs"
|
||||||
|
},
|
||||||
|
"Ethernet124": {
|
||||||
|
"default_brkout_mode": "1x100G",
|
||||||
|
"autoneg": "off",
|
||||||
|
"fec": "rs"
|
||||||
|
},
|
||||||
|
"Ethernet128": {
|
||||||
|
"default_brkout_mode": "1x10G",
|
||||||
|
"autoneg": "off",
|
||||||
|
"fec": "none"
|
||||||
|
}
|
||||||
|
}
|
||||||
|
}
|
@ -0,0 +1,3 @@
|
|||||||
|
l2_mem_entries=139264
|
||||||
|
l3_mem_entries=8192
|
||||||
|
l3_alpm_enable=0
|
@ -0,0 +1,3 @@
|
|||||||
|
l2_mem_entries=40000
|
||||||
|
l3_mem_entries=40000
|
||||||
|
l3_alpm_enable=2
|
@ -0,0 +1,17 @@
|
|||||||
|
# PG lossless profiles.
|
||||||
|
# speed cable size xon xoff threshold xon_offset
|
||||||
|
10000 5m 56368 18432 55120 -3 2496
|
||||||
|
25000 5m 56368 18432 55120 -3 2496
|
||||||
|
40000 5m 56368 18432 55120 -3 2496
|
||||||
|
50000 5m 56368 18432 55120 -3 2496
|
||||||
|
100000 5m 56368 18432 55120 -3 2496
|
||||||
|
10000 40m 56368 18432 55120 -3 2496
|
||||||
|
25000 40m 56368 18432 55120 -3 2496
|
||||||
|
40000 40m 56368 18432 55120 -3 2496
|
||||||
|
50000 40m 56368 18432 55120 -3 2496
|
||||||
|
100000 40m 56368 18432 55120 -3 2496
|
||||||
|
10000 300m 56368 18432 55120 -3 2496
|
||||||
|
25000 300m 56368 18432 55120 -3 2496
|
||||||
|
40000 300m 56368 18432 55120 -3 2496
|
||||||
|
50000 300m 56368 18432 55120 -3 2496
|
||||||
|
100000 300m 56368 18432 55120 -3 2496
|
@ -1,34 +1,34 @@
|
|||||||
# name lanes alias fec index speed
|
# name lanes alias index speed valid_speeds
|
||||||
Ethernet0 1,2,3,4 QSFP1 rs 1 100000
|
Ethernet0 1,2,3,4 Eth1/1 1 100000 100000,40000
|
||||||
Ethernet4 5,6,7,8 QSFP2 rs 2 100000
|
Ethernet4 5,6,7,8 Eth2/1 2 100000 100000,40000
|
||||||
Ethernet8 9,10,11,12 QSFP3 rs 3 100000
|
Ethernet8 9,10,11,12 Eth3/1 3 100000 100000,40000
|
||||||
Ethernet12 13,14,15,16 QSFP4 rs 4 100000
|
Ethernet12 13,14,15,16 Eth4/1 4 100000 100000,40000
|
||||||
Ethernet16 17,18,19,20 QSFP5 rs 5 100000
|
Ethernet16 17,18,19,20 Eth5/1 5 100000 100000,40000
|
||||||
Ethernet20 21,22,23,24 QSFP6 rs 6 100000
|
Ethernet20 21,22,23,24 Eth6/1 6 100000 100000,40000
|
||||||
Ethernet24 25,26,27,28 QSFP7 rs 7 100000
|
Ethernet24 25,26,27,28 Eth7/1 7 100000 100000,40000
|
||||||
Ethernet28 29,30,31,32 QSFP8 rs 8 100000
|
Ethernet28 29,30,31,32 Eth8/1 8 100000 100000,40000
|
||||||
Ethernet32 33,34,35,36 QSFP9 rs 9 100000
|
Ethernet32 33,34,35,36 Eth9/1 9 100000 100000,40000
|
||||||
Ethernet36 37,38,39,40 QSFP10 rs 10 100000
|
Ethernet36 37,38,39,40 Eth10/1 10 100000 100000,40000
|
||||||
Ethernet40 41,42,43,44 QSFP11 rs 11 100000
|
Ethernet40 41,42,43,44 Eth11/1 11 100000 100000,40000
|
||||||
Ethernet44 45,46,47,48 QSFP12 rs 12 100000
|
Ethernet44 45,46,47,48 Eth12/1 12 100000 100000,40000
|
||||||
Ethernet48 49,50,51,52 QSFP13 rs 13 100000
|
Ethernet48 49,50,51,52 Eth13/1 13 100000 100000,40000
|
||||||
Ethernet52 53,54,55,56 QSFP14 rs 14 100000
|
Ethernet52 53,54,55,56 Eth14/1 14 100000 100000,40000
|
||||||
Ethernet56 57,58,59,60 QSFP15 rs 15 100000
|
Ethernet56 57,58,59,60 Eth15/1 15 100000 100000,40000
|
||||||
Ethernet60 61,62,63,64 QSFP16 rs 16 100000
|
Ethernet60 61,62,63,64 Eth16/1 16 100000 100000,40000
|
||||||
Ethernet64 65,66,67,68 QSFP17 rs 17 100000
|
Ethernet64 65,66,67,68 Eth17/1 17 100000 100000,40000
|
||||||
Ethernet68 69,70,71,72 QSFP18 rs 18 100000
|
Ethernet68 69,70,71,72 Eth18/1 18 100000 100000,40000
|
||||||
Ethernet72 73,74,75,76 QSFP19 rs 19 100000
|
Ethernet72 73,74,75,76 Eth19/1 19 100000 100000,40000
|
||||||
Ethernet76 77,78,79,80 QSFP20 rs 20 100000
|
Ethernet76 77,78,79,80 Eth20/1 20 100000 100000,40000
|
||||||
Ethernet80 81,82,83,84 QSFP21 rs 21 100000
|
Ethernet80 81,82,83,84 Eth21/1 21 100000 100000,40000
|
||||||
Ethernet84 85,86,87,88 QSFP22 rs 22 100000
|
Ethernet84 85,86,87,88 Eth22/1 22 100000 100000,40000
|
||||||
Ethernet88 89,90,91,92 QSFP23 rs 23 100000
|
Ethernet88 89,90,91,92 Eth23/1 23 100000 100000,40000
|
||||||
Ethernet92 93,94,95,96 QSFP24 rs 24 100000
|
Ethernet92 93,94,95,96 Eth24/1 24 100000 100000,40000
|
||||||
Ethernet96 97,98,99,100 QSFP25 rs 25 100000
|
Ethernet96 97,98,99,100 Eth25/1 25 100000 100000,40000
|
||||||
Ethernet100 101,102,103,104 QSFP26 rs 26 100000
|
Ethernet100 101,102,103,104 Eth26/1 26 100000 100000,40000
|
||||||
Ethernet104 105,106,107,108 QSFP27 rs 27 100000
|
Ethernet104 105,106,107,108 Eth27/1 27 100000 100000,40000
|
||||||
Ethernet108 109,110,111,112 QSFP28 rs 28 100000
|
Ethernet108 109,110,111,112 Eth28/1 28 100000 100000,40000
|
||||||
Ethernet112 113,114,115,116 QSFP29 rs 29 100000
|
Ethernet112 113,114,115,116 Eth29/1 29 100000 100000,40000
|
||||||
Ethernet116 117,118,119,120 QSFP30 rs 30 100000
|
Ethernet116 117,118,119,120 Eth30/1 30 100000 100000,40000
|
||||||
Ethernet120 121,122,123,124 QSFP31 rs 31 100000
|
Ethernet120 121,122,123,124 Eth31/1 31 100000 100000,40000
|
||||||
Ethernet124 125,126,127,128 QSFP32 rs 32 100000
|
Ethernet124 125,126,127,128 Eth32/1 32 100000 100000,40000
|
||||||
Ethernet128 129 SFP1 none 33 10000
|
Ethernet128 129 Eth33/1 33 10000 10000,1000
|
||||||
|
@ -0,0 +1 @@
|
|||||||
|
{%- include 'qos_config.j2' %}
|
@ -1,2 +0,0 @@
|
|||||||
SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/td3-seastone_2-32x100G.config.bcm
|
|
||||||
SAI_NUM_ECMP_MEMBERS=64
|
|
@ -0,0 +1,17 @@
|
|||||||
|
{# Get sai.profile based on vxlan_profile. Vxlan's config.bcm file is the default one #}
|
||||||
|
{%- set sai_profile_contents = 'SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/td3-seastone_2-32x100G-vxlan.config.bcm' -%}
|
||||||
|
{%- if DEVICE_METADATA is defined and DEVICE_METADATA['localhost'] is defined -%}
|
||||||
|
{%- if DEVICE_METADATA['localhost']['vxlan_profile'] is defined -%}
|
||||||
|
{%- set vxlan_profile = DEVICE_METADATA['localhost']['vxlan_profile'] -%}
|
||||||
|
{%- if 'enable' in vxlan_profile.lower() %}
|
||||||
|
{% set sai_profile_contents = 'SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/td3-seastone_2-32x100G-vxlan.config.bcm' -%}
|
||||||
|
{%- else %}
|
||||||
|
{%- set sai_profile_contents = 'SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/td3-seastone_2-32x100G.config.bcm' -%}
|
||||||
|
{%- endif %}
|
||||||
|
{%- else %}
|
||||||
|
{%- set sai_profile_contents = 'SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/td3-seastone_2-32x100G-vxlan.config.bcm' -%}
|
||||||
|
{%- endif %}
|
||||||
|
{%- endif %}
|
||||||
|
{# Write the contents of sai_profile_filename to sai.profile file #}
|
||||||
|
{{ sai_profile_contents }}
|
||||||
|
SAI_NUM_ECMP_MEMBERS=64
|
@ -0,0 +1,576 @@
|
|||||||
|
help_cli_enable=1
|
||||||
|
ifp_inports_support_enable=1
|
||||||
|
ipv6_lpm_128b_enable=0x1
|
||||||
|
l2_mem_entries=32768
|
||||||
|
l2xmsg_mode=1
|
||||||
|
l3_max_ecmp_mode=1
|
||||||
|
l3_mem_entries=16384
|
||||||
|
lpm_scaling_enable=1
|
||||||
|
max_vp_lags=0
|
||||||
|
#mem_cache_enable=0
|
||||||
|
memlist_enable=1
|
||||||
|
reglist_enable=1
|
||||||
|
#scache_filename=/tmp/scache
|
||||||
|
schan_intr_enable=0
|
||||||
|
stable_size=0x5500000
|
||||||
|
tdma_timeout_usec=3000000
|
||||||
|
miim_intr_enable=0
|
||||||
|
module_64ports=1
|
||||||
|
oversubscribe_mode=1
|
||||||
|
parity_enable=0
|
||||||
|
serdes_lane_config_dfe=on
|
||||||
|
#serdes_fec_enable=1
|
||||||
|
serdes_if_type_ce=14
|
||||||
|
pbmp_gport_stack.0=0x0000000000000000000000000000000000000000000000000000000000000000
|
||||||
|
pbmp_xport_xe=0x3ffffffffffffffffffffffffffffffffe
|
||||||
|
port_flex_enable=1
|
||||||
|
|
||||||
|
ptp_ts_pll_fref=50000000
|
||||||
|
ptp_bs_fref_0=50000000
|
||||||
|
ptp_bs_fref_1=50000000
|
||||||
|
bcm_tunnel_term_compatible_mode=1
|
||||||
|
phy_an_c73=1
|
||||||
|
|
||||||
|
portmap_1=1:100
|
||||||
|
portmap_5=5:100
|
||||||
|
portmap_9=9:100
|
||||||
|
portmap_13=13:100
|
||||||
|
portmap_17=17:100
|
||||||
|
portmap_21=21:100
|
||||||
|
portmap_25=25:100
|
||||||
|
portmap_29=29:100
|
||||||
|
portmap_33=33:100
|
||||||
|
portmap_37=37:100
|
||||||
|
portmap_41=41:100
|
||||||
|
portmap_45=45:100
|
||||||
|
portmap_49=49:100
|
||||||
|
portmap_53=53:100
|
||||||
|
portmap_57=57:100
|
||||||
|
portmap_61=61:100
|
||||||
|
portmap_67=65:100
|
||||||
|
portmap_71=69:100
|
||||||
|
portmap_75=73:100
|
||||||
|
portmap_79=77:100
|
||||||
|
portmap_83=81:100
|
||||||
|
portmap_87=85:100
|
||||||
|
portmap_91=89:100
|
||||||
|
portmap_95=93:100
|
||||||
|
portmap_99=97:100
|
||||||
|
portmap_103=101:100
|
||||||
|
portmap_107=105:100
|
||||||
|
portmap_111=109:100
|
||||||
|
portmap_115=113:100
|
||||||
|
portmap_119=117:100
|
||||||
|
portmap_123=121:100
|
||||||
|
portmap_127=125:100
|
||||||
|
portmap_66=129:10:m
|
||||||
|
#portmap_130=128:10:m
|
||||||
|
|
||||||
|
#wc0 lane swap
|
||||||
|
phy_chain_tx_lane_map_physical{1.0}=0x0132
|
||||||
|
phy_chain_rx_lane_map_physical{1.0}=0x3210
|
||||||
|
|
||||||
|
#wc1 lane swap
|
||||||
|
phy_chain_tx_lane_map_physical{5.0}=0x2301
|
||||||
|
phy_chain_rx_lane_map_physical{5.0}=0x2031
|
||||||
|
|
||||||
|
#wc2 lane swap
|
||||||
|
phy_chain_tx_lane_map_physical{9.0}=0x0132
|
||||||
|
phy_chain_rx_lane_map_physical{9.0}=0x3210
|
||||||
|
|
||||||
|
#wc3 lane swap
|
||||||
|
phy_chain_tx_lane_map_physical{13.0}=0x3201
|
||||||
|
phy_chain_rx_lane_map_physical{13.0}=0x2031
|
||||||
|
|
||||||
|
#wc4 lane swap
|
||||||
|
phy_chain_tx_lane_map_physical{17.0}=0x0123
|
||||||
|
phy_chain_rx_lane_map_physical{17.0}=0x3210
|
||||||
|
|
||||||
|
#wc5 lane swap
|
||||||
|
phy_chain_tx_lane_map_physical{21.0}=0x2301
|
||||||
|
phy_chain_rx_lane_map_physical{21.0}=0x2031
|
||||||
|
|
||||||
|
#wc6 lane swap
|
||||||
|
phy_chain_tx_lane_map_physical{25.0}=0x0123
|
||||||
|
phy_chain_rx_lane_map_physical{25.0}=0x3210
|
||||||
|
|
||||||
|
#wc7 lane swap
|
||||||
|
phy_chain_tx_lane_map_physical{29.0}=0x3201
|
||||||
|
phy_chain_rx_lane_map_physical{29.0}=0x2031
|
||||||
|
|
||||||
|
#wc8 lane swap
|
||||||
|
phy_chain_tx_lane_map_physical{33.0}=0x0213
|
||||||
|
phy_chain_rx_lane_map_physical{33.0}=0x1302
|
||||||
|
|
||||||
|
#wc9 lane swap
|
||||||
|
phy_chain_tx_lane_map_physical{37.0}=0x1302
|
||||||
|
phy_chain_rx_lane_map_physical{37.0}=0x2031
|
||||||
|
|
||||||
|
#wc10 lane swap
|
||||||
|
phy_chain_tx_lane_map_physical{41.0}=0x0231
|
||||||
|
phy_chain_rx_lane_map_physical{41.0}=0x3120
|
||||||
|
|
||||||
|
#wc11 lane swap
|
||||||
|
phy_chain_tx_lane_map_physical{45.0}=0x1302
|
||||||
|
phy_chain_rx_lane_map_physical{45.0}=0x2031
|
||||||
|
|
||||||
|
#wc12 lane swap
|
||||||
|
phy_chain_tx_lane_map_physical{49.0}=0x2103
|
||||||
|
phy_chain_rx_lane_map_physical{49.0}=0x3120
|
||||||
|
|
||||||
|
#wc13 lane swap
|
||||||
|
phy_chain_tx_lane_map_physical{53.0}=0x2301
|
||||||
|
phy_chain_rx_lane_map_physical{53.0}=0x2031
|
||||||
|
|
||||||
|
#wc14 lane swap
|
||||||
|
phy_chain_tx_lane_map_physical{57.0}=0x0123
|
||||||
|
phy_chain_rx_lane_map_physical{57.0}=0x2301
|
||||||
|
|
||||||
|
#wc15 lane swap
|
||||||
|
phy_chain_tx_lane_map_physical{61.0}=0x3210
|
||||||
|
phy_chain_rx_lane_map_physical{61.0}=0x1032
|
||||||
|
|
||||||
|
#wc16 lane swap
|
||||||
|
phy_chain_tx_lane_map_physical{65.0}=0x3210
|
||||||
|
phy_chain_rx_lane_map_physical{65.0}=0x1023
|
||||||
|
|
||||||
|
#wc17 lane swap
|
||||||
|
phy_chain_tx_lane_map_physical{69.0}=0x0123
|
||||||
|
phy_chain_rx_lane_map_physical{69.0}=0x1302
|
||||||
|
|
||||||
|
#wc18 lane swap
|
||||||
|
phy_chain_tx_lane_map_physical{73.0}=0x2301
|
||||||
|
phy_chain_rx_lane_map_physical{73.0}=0x1032
|
||||||
|
|
||||||
|
#wc19 lane swap
|
||||||
|
phy_chain_tx_lane_map_physical{77.0}=0x2013
|
||||||
|
phy_chain_rx_lane_map_physical{77.0}=0x3120
|
||||||
|
|
||||||
|
#wc20 lane swap
|
||||||
|
phy_chain_tx_lane_map_physical{81.0}=0x1302
|
||||||
|
phy_chain_rx_lane_map_physical{81.0}=0x2031
|
||||||
|
|
||||||
|
#wc21 lane swap
|
||||||
|
phy_chain_tx_lane_map_physical{85.0}=0x0123
|
||||||
|
phy_chain_rx_lane_map_physical{85.0}=0x2130
|
||||||
|
|
||||||
|
#wc22 lane swap
|
||||||
|
phy_chain_tx_lane_map_physical{89.0}=0x2301
|
||||||
|
phy_chain_rx_lane_map_physical{89.0}=0x2031
|
||||||
|
|
||||||
|
#wc23 lane swap
|
||||||
|
phy_chain_tx_lane_map_physical{93.0}=0x0312
|
||||||
|
phy_chain_rx_lane_map_physical{93.0}=0x2310
|
||||||
|
|
||||||
|
#wc24 lane swap
|
||||||
|
phy_chain_tx_lane_map_physical{97.0}=0x2301
|
||||||
|
phy_chain_rx_lane_map_physical{97.0}=0x1032
|
||||||
|
|
||||||
|
#wc25 lane swap
|
||||||
|
phy_chain_tx_lane_map_physical{101.0}=0x0123
|
||||||
|
phy_chain_rx_lane_map_physical{101.0}=0x3210
|
||||||
|
|
||||||
|
#wc26 lane swap
|
||||||
|
phy_chain_tx_lane_map_physical{105.0}=0x2301
|
||||||
|
phy_chain_rx_lane_map_physical{105.0}=0x1032
|
||||||
|
|
||||||
|
#wc27 lane swap
|
||||||
|
phy_chain_tx_lane_map_physical{109.0}=0x0123
|
||||||
|
phy_chain_rx_lane_map_physical{109.0}=0x3210
|
||||||
|
|
||||||
|
#wc28 lane swap
|
||||||
|
phy_chain_tx_lane_map_physical{113.0}=0x2301
|
||||||
|
phy_chain_rx_lane_map_physical{113.0}=0x2031
|
||||||
|
|
||||||
|
#wc29 lane swap
|
||||||
|
phy_chain_tx_lane_map_physical{117.0}=0x0123
|
||||||
|
phy_chain_rx_lane_map_physical{117.0}=0x3210
|
||||||
|
|
||||||
|
#wc30 lane swap
|
||||||
|
phy_chain_tx_lane_map_physical{121.0}=0x2301
|
||||||
|
phy_chain_rx_lane_map_physical{121.0}=0x1032
|
||||||
|
|
||||||
|
#wc31 lane swap
|
||||||
|
phy_chain_tx_lane_map_physical{125.0}=0x0123
|
||||||
|
phy_chain_rx_lane_map_physical{125.0}=0x3210
|
||||||
|
|
||||||
|
#MC lane swap
|
||||||
|
phy_chain_tx_lane_map_physical{129.0}=0x3210
|
||||||
|
phy_chain_rx_lane_map_physical{129.0}=0x0231
|
||||||
|
|
||||||
|
|
||||||
|
#wc0 P/N flip
|
||||||
|
phy_chain_tx_polarity_flip_physical{1.0}=0x0
|
||||||
|
phy_chain_rx_polarity_flip_physical{1.0}=0x0
|
||||||
|
phy_chain_tx_polarity_flip_physical{2.0}=0x0
|
||||||
|
phy_chain_rx_polarity_flip_physical{2.0}=0x1
|
||||||
|
phy_chain_tx_polarity_flip_physical{3.0}=0x0
|
||||||
|
phy_chain_rx_polarity_flip_physical{3.0}=0x0
|
||||||
|
phy_chain_tx_polarity_flip_physical{4.0}=0x1
|
||||||
|
phy_chain_rx_polarity_flip_physical{4.0}=0x1
|
||||||
|
|
||||||
|
#wc1 P/N flip
|
||||||
|
phy_chain_tx_polarity_flip_physical{5.0}=0x0
|
||||||
|
phy_chain_rx_polarity_flip_physical{5.0}=0x0
|
||||||
|
phy_chain_tx_polarity_flip_physical{6.0}=0x1
|
||||||
|
phy_chain_rx_polarity_flip_physical{6.0}=0x1
|
||||||
|
phy_chain_tx_polarity_flip_physical{7.0}=0x0
|
||||||
|
phy_chain_rx_polarity_flip_physical{7.0}=0x1
|
||||||
|
phy_chain_tx_polarity_flip_physical{8.0}=0x1
|
||||||
|
phy_chain_rx_polarity_flip_physical{8.0}=0x1
|
||||||
|
|
||||||
|
#wc2 P/N flip
|
||||||
|
phy_chain_tx_polarity_flip_physical{9.0}=0x0
|
||||||
|
phy_chain_rx_polarity_flip_physical{9.0}=0x0
|
||||||
|
phy_chain_tx_polarity_flip_physical{10.0}=0x0
|
||||||
|
phy_chain_rx_polarity_flip_physical{10.0}=0x1
|
||||||
|
phy_chain_tx_polarity_flip_physical{11.0}=0x0
|
||||||
|
phy_chain_rx_polarity_flip_physical{11.0}=0x0
|
||||||
|
phy_chain_tx_polarity_flip_physical{12.0}=0x1
|
||||||
|
phy_chain_rx_polarity_flip_physical{12.0}=0x1
|
||||||
|
|
||||||
|
#wc3 P/N flip
|
||||||
|
phy_chain_tx_polarity_flip_physical{13.0}=0x0
|
||||||
|
phy_chain_rx_polarity_flip_physical{13.0}=0x0
|
||||||
|
phy_chain_tx_polarity_flip_physical{14.0}=0x1
|
||||||
|
phy_chain_rx_polarity_flip_physical{14.0}=0x1
|
||||||
|
phy_chain_tx_polarity_flip_physical{15.0}=0x0
|
||||||
|
phy_chain_rx_polarity_flip_physical{15.0}=0x1
|
||||||
|
phy_chain_tx_polarity_flip_physical{16.0}=0x0
|
||||||
|
phy_chain_rx_polarity_flip_physical{16.0}=0x1
|
||||||
|
|
||||||
|
#wc4 P/N flip
|
||||||
|
phy_chain_tx_polarity_flip_physical{17.0}=0x0
|
||||||
|
phy_chain_rx_polarity_flip_physical{17.0}=0x0
|
||||||
|
phy_chain_tx_polarity_flip_physical{18.0}=0x1
|
||||||
|
phy_chain_rx_polarity_flip_physical{18.0}=0x1
|
||||||
|
phy_chain_tx_polarity_flip_physical{19.0}=0x0
|
||||||
|
phy_chain_rx_polarity_flip_physical{19.0}=0x0
|
||||||
|
phy_chain_tx_polarity_flip_physical{20.0}=0x1
|
||||||
|
phy_chain_rx_polarity_flip_physical{20.0}=0x1
|
||||||
|
|
||||||
|
#wc5 P/N flip
|
||||||
|
phy_chain_tx_polarity_flip_physical{21.0}=0x0
|
||||||
|
phy_chain_rx_polarity_flip_physical{21.0}=0x0
|
||||||
|
phy_chain_tx_polarity_flip_physical{22.0}=0x1
|
||||||
|
phy_chain_rx_polarity_flip_physical{22.0}=0x1
|
||||||
|
phy_chain_tx_polarity_flip_physical{23.0}=0x0
|
||||||
|
phy_chain_rx_polarity_flip_physical{23.0}=0x1
|
||||||
|
phy_chain_tx_polarity_flip_physical{24.0}=0x1
|
||||||
|
phy_chain_rx_polarity_flip_physical{24.0}=0x1
|
||||||
|
|
||||||
|
#wc6 P/N flip
|
||||||
|
phy_chain_tx_polarity_flip_physical{25.0}=0x0
|
||||||
|
phy_chain_rx_polarity_flip_physical{25.0}=0x1
|
||||||
|
phy_chain_tx_polarity_flip_physical{26.0}=0x1
|
||||||
|
phy_chain_rx_polarity_flip_physical{26.0}=0x0
|
||||||
|
phy_chain_tx_polarity_flip_physical{27.0}=0x0
|
||||||
|
phy_chain_rx_polarity_flip_physical{27.0}=0x1
|
||||||
|
phy_chain_tx_polarity_flip_physical{28.0}=0x1
|
||||||
|
phy_chain_rx_polarity_flip_physical{28.0}=0x0
|
||||||
|
|
||||||
|
#wc7 P/N flip
|
||||||
|
phy_chain_tx_polarity_flip_physical{29.0}=0x1
|
||||||
|
phy_chain_rx_polarity_flip_physical{29.0}=0x1
|
||||||
|
phy_chain_tx_polarity_flip_physical{30.0}=0x1
|
||||||
|
phy_chain_rx_polarity_flip_physical{30.0}=0x0
|
||||||
|
phy_chain_tx_polarity_flip_physical{31.0}=0x0
|
||||||
|
phy_chain_rx_polarity_flip_physical{31.0}=0x0
|
||||||
|
phy_chain_tx_polarity_flip_physical{32.0}=0x0
|
||||||
|
phy_chain_rx_polarity_flip_physical{32.0}=0x0
|
||||||
|
|
||||||
|
#wc8 P/N flip
|
||||||
|
phy_chain_tx_polarity_flip_physical{33.0}=0x1
|
||||||
|
phy_chain_rx_polarity_flip_physical{33.0}=0x1
|
||||||
|
phy_chain_tx_polarity_flip_physical{34.0}=0x0
|
||||||
|
phy_chain_rx_polarity_flip_physical{34.0}=0x0
|
||||||
|
phy_chain_tx_polarity_flip_physical{35.0}=0x0
|
||||||
|
phy_chain_rx_polarity_flip_physical{35.0}=0x0
|
||||||
|
phy_chain_tx_polarity_flip_physical{36.0}=0x1
|
||||||
|
phy_chain_rx_polarity_flip_physical{36.0}=0x0
|
||||||
|
|
||||||
|
#wc9 P/N flip
|
||||||
|
phy_chain_tx_polarity_flip_physical{37.0}=0x1
|
||||||
|
phy_chain_rx_polarity_flip_physical{37.0}=0x1
|
||||||
|
phy_chain_tx_polarity_flip_physical{38.0}=0x1
|
||||||
|
phy_chain_rx_polarity_flip_physical{38.0}=0x0
|
||||||
|
phy_chain_tx_polarity_flip_physical{39.0}=0x1
|
||||||
|
phy_chain_rx_polarity_flip_physical{39.0}=0x0
|
||||||
|
phy_chain_tx_polarity_flip_physical{40.0}=0x0
|
||||||
|
phy_chain_rx_polarity_flip_physical{40.0}=0x1
|
||||||
|
|
||||||
|
#wc10 P/N flip
|
||||||
|
phy_chain_tx_polarity_flip_physical{41.0}=0x1
|
||||||
|
phy_chain_rx_polarity_flip_physical{41.0}=0x1
|
||||||
|
phy_chain_tx_polarity_flip_physical{42.0}=0x0
|
||||||
|
phy_chain_rx_polarity_flip_physical{42.0}=0x1
|
||||||
|
phy_chain_tx_polarity_flip_physical{43.0}=0x1
|
||||||
|
phy_chain_rx_polarity_flip_physical{43.0}=0x0
|
||||||
|
phy_chain_tx_polarity_flip_physical{44.0}=0x1
|
||||||
|
phy_chain_rx_polarity_flip_physical{44.0}=0x1
|
||||||
|
|
||||||
|
#wc11 P/N flip
|
||||||
|
phy_chain_tx_polarity_flip_physical{45.0}=0x1
|
||||||
|
phy_chain_rx_polarity_flip_physical{45.0}=0x0
|
||||||
|
phy_chain_tx_polarity_flip_physical{46.0}=0x1
|
||||||
|
phy_chain_rx_polarity_flip_physical{46.0}=0x0
|
||||||
|
phy_chain_tx_polarity_flip_physical{47.0}=0x1
|
||||||
|
phy_chain_rx_polarity_flip_physical{47.0}=0x1
|
||||||
|
phy_chain_tx_polarity_flip_physical{48.0}=0x0
|
||||||
|
phy_chain_rx_polarity_flip_physical{48.0}=0x1
|
||||||
|
|
||||||
|
#wc12 P/N flip
|
||||||
|
phy_chain_tx_polarity_flip_physical{49.0}=0x1
|
||||||
|
phy_chain_rx_polarity_flip_physical{49.0}=0x0
|
||||||
|
phy_chain_tx_polarity_flip_physical{50.0}=0x1
|
||||||
|
phy_chain_rx_polarity_flip_physical{50.0}=0x0
|
||||||
|
phy_chain_tx_polarity_flip_physical{51.0}=0x0
|
||||||
|
phy_chain_rx_polarity_flip_physical{51.0}=0x1
|
||||||
|
phy_chain_tx_polarity_flip_physical{52.0}=0x1
|
||||||
|
phy_chain_rx_polarity_flip_physical{52.0}=0x1
|
||||||
|
|
||||||
|
#wc13 P/N flip
|
||||||
|
phy_chain_tx_polarity_flip_physical{53.0}=0x0
|
||||||
|
phy_chain_rx_polarity_flip_physical{53.0}=0x0
|
||||||
|
phy_chain_tx_polarity_flip_physical{54.0}=0x1
|
||||||
|
phy_chain_rx_polarity_flip_physical{54.0}=0x1
|
||||||
|
phy_chain_tx_polarity_flip_physical{55.0}=0x0
|
||||||
|
phy_chain_rx_polarity_flip_physical{55.0}=0x1
|
||||||
|
phy_chain_tx_polarity_flip_physical{56.0}=0x1
|
||||||
|
phy_chain_rx_polarity_flip_physical{56.0}=0x1
|
||||||
|
|
||||||
|
#wc14 P/N flip
|
||||||
|
phy_chain_tx_polarity_flip_physical{57.0}=0x1
|
||||||
|
phy_chain_rx_polarity_flip_physical{57.0}=0x0
|
||||||
|
phy_chain_tx_polarity_flip_physical{58.0}=0x1
|
||||||
|
phy_chain_rx_polarity_flip_physical{58.0}=0x1
|
||||||
|
phy_chain_tx_polarity_flip_physical{59.0}=0x0
|
||||||
|
phy_chain_rx_polarity_flip_physical{59.0}=0x0
|
||||||
|
phy_chain_tx_polarity_flip_physical{60.0}=0x1
|
||||||
|
phy_chain_rx_polarity_flip_physical{60.0}=0x1
|
||||||
|
|
||||||
|
#wc15 P/N flip
|
||||||
|
phy_chain_tx_polarity_flip_physical{61.0}=0x0
|
||||||
|
phy_chain_rx_polarity_flip_physical{61.0}=0x1
|
||||||
|
phy_chain_tx_polarity_flip_physical{62.0}=0x1
|
||||||
|
phy_chain_rx_polarity_flip_physical{62.0}=0x0
|
||||||
|
phy_chain_tx_polarity_flip_physical{63.0}=0x0
|
||||||
|
phy_chain_rx_polarity_flip_physical{63.0}=0x1
|
||||||
|
phy_chain_tx_polarity_flip_physical{64.0}=0x0
|
||||||
|
phy_chain_rx_polarity_flip_physical{64.0}=0x0
|
||||||
|
|
||||||
|
#wc16 P/N flip
|
||||||
|
phy_chain_tx_polarity_flip_physical{65.0}=0x1
|
||||||
|
phy_chain_rx_polarity_flip_physical{65.0}=0x0
|
||||||
|
phy_chain_tx_polarity_flip_physical{66.0}=0x0
|
||||||
|
phy_chain_rx_polarity_flip_physical{66.0}=0x0
|
||||||
|
phy_chain_tx_polarity_flip_physical{67.0}=0x1
|
||||||
|
phy_chain_rx_polarity_flip_physical{67.0}=0x1
|
||||||
|
phy_chain_tx_polarity_flip_physical{68.0}=0x0
|
||||||
|
phy_chain_rx_polarity_flip_physical{68.0}=0x0
|
||||||
|
|
||||||
|
#wc17 P/N flip
|
||||||
|
phy_chain_tx_polarity_flip_physical{69.0}=0x1
|
||||||
|
phy_chain_rx_polarity_flip_physical{69.0}=0x1
|
||||||
|
phy_chain_tx_polarity_flip_physical{70.0}=0x0
|
||||||
|
phy_chain_rx_polarity_flip_physical{70.0}=0x0
|
||||||
|
phy_chain_tx_polarity_flip_physical{71.0}=0x1
|
||||||
|
phy_chain_rx_polarity_flip_physical{71.0}=0x0
|
||||||
|
phy_chain_tx_polarity_flip_physical{72.0}=0x0
|
||||||
|
phy_chain_rx_polarity_flip_physical{72.0}=0x0
|
||||||
|
|
||||||
|
#wc18 P/N flip
|
||||||
|
phy_chain_tx_polarity_flip_physical{73.0}=0x0
|
||||||
|
phy_chain_rx_polarity_flip_physical{73.0}=0x1
|
||||||
|
phy_chain_tx_polarity_flip_physical{74.0}=0x1
|
||||||
|
phy_chain_rx_polarity_flip_physical{74.0}=0x0
|
||||||
|
phy_chain_tx_polarity_flip_physical{75.0}=0x0
|
||||||
|
phy_chain_rx_polarity_flip_physical{75.0}=0x1
|
||||||
|
phy_chain_tx_polarity_flip_physical{76.0}=0x1
|
||||||
|
phy_chain_rx_polarity_flip_physical{76.0}=0x0
|
||||||
|
|
||||||
|
#wc19 P/N flip
|
||||||
|
phy_chain_tx_polarity_flip_physical{77.0}=0x0
|
||||||
|
phy_chain_rx_polarity_flip_physical{77.0}=0x0
|
||||||
|
phy_chain_tx_polarity_flip_physical{78.0}=0x0
|
||||||
|
phy_chain_rx_polarity_flip_physical{78.0}=0x0
|
||||||
|
phy_chain_tx_polarity_flip_physical{79.0}=0x1
|
||||||
|
phy_chain_rx_polarity_flip_physical{79.0}=0x1
|
||||||
|
phy_chain_tx_polarity_flip_physical{80.0}=0x1
|
||||||
|
phy_chain_rx_polarity_flip_physical{80.0}=0x1
|
||||||
|
|
||||||
|
#wc20 P/N flip
|
||||||
|
phy_chain_tx_polarity_flip_physical{81.0}=0x0
|
||||||
|
phy_chain_rx_polarity_flip_physical{81.0}=0x0
|
||||||
|
phy_chain_tx_polarity_flip_physical{82.0}=0x0
|
||||||
|
phy_chain_rx_polarity_flip_physical{82.0}=0x0
|
||||||
|
phy_chain_tx_polarity_flip_physical{83.0}=0x1
|
||||||
|
phy_chain_rx_polarity_flip_physical{83.0}=0x1
|
||||||
|
phy_chain_tx_polarity_flip_physical{84.0}=0x1
|
||||||
|
phy_chain_rx_polarity_flip_physical{84.0}=0x0
|
||||||
|
|
||||||
|
#wc21 P/N flip
|
||||||
|
phy_chain_tx_polarity_flip_physical{85.0}=0x1
|
||||||
|
phy_chain_rx_polarity_flip_physical{85.0}=0x1
|
||||||
|
phy_chain_tx_polarity_flip_physical{86.0}=0x0
|
||||||
|
phy_chain_rx_polarity_flip_physical{86.0}=0x1
|
||||||
|
phy_chain_tx_polarity_flip_physical{87.0}=0x1
|
||||||
|
phy_chain_rx_polarity_flip_physical{87.0}=0x0
|
||||||
|
phy_chain_tx_polarity_flip_physical{88.0}=0x0
|
||||||
|
phy_chain_rx_polarity_flip_physical{88.0}=0x0
|
||||||
|
|
||||||
|
#wc22 P/N flip
|
||||||
|
phy_chain_tx_polarity_flip_physical{89.0}=0x1
|
||||||
|
phy_chain_rx_polarity_flip_physical{89.0}=0x0
|
||||||
|
phy_chain_tx_polarity_flip_physical{90.0}=0x0
|
||||||
|
phy_chain_rx_polarity_flip_physical{90.0}=0x0
|
||||||
|
phy_chain_tx_polarity_flip_physical{91.0}=0x1
|
||||||
|
phy_chain_rx_polarity_flip_physical{91.0}=0x1
|
||||||
|
phy_chain_tx_polarity_flip_physical{92.0}=0x0
|
||||||
|
phy_chain_rx_polarity_flip_physical{92.0}=0x1
|
||||||
|
|
||||||
|
#wc23 P/N flip
|
||||||
|
phy_chain_tx_polarity_flip_physical{93.0}=0x1
|
||||||
|
phy_chain_rx_polarity_flip_physical{93.0}=0x1
|
||||||
|
phy_chain_tx_polarity_flip_physical{94.0}=0x1
|
||||||
|
phy_chain_rx_polarity_flip_physical{94.0}=0x1
|
||||||
|
phy_chain_tx_polarity_flip_physical{95.0}=0x0
|
||||||
|
phy_chain_rx_polarity_flip_physical{95.0}=0x0
|
||||||
|
phy_chain_tx_polarity_flip_physical{96.0}=0x0
|
||||||
|
phy_chain_rx_polarity_flip_physical{96.0}=0x1
|
||||||
|
|
||||||
|
#wc24 P/N flip
|
||||||
|
phy_chain_tx_polarity_flip_physical{97.0}=0x1
|
||||||
|
phy_chain_rx_polarity_flip_physical{97.0}=0x1
|
||||||
|
phy_chain_tx_polarity_flip_physical{98.0}=0x0
|
||||||
|
phy_chain_rx_polarity_flip_physical{98.0}=0x0
|
||||||
|
phy_chain_tx_polarity_flip_physical{99.0}=0x1
|
||||||
|
phy_chain_rx_polarity_flip_physical{99.0}=0x1
|
||||||
|
phy_chain_tx_polarity_flip_physical{100.0}=0x0
|
||||||
|
phy_chain_rx_polarity_flip_physical{100.0}=0x0
|
||||||
|
|
||||||
|
#wc25 P/N flip
|
||||||
|
phy_chain_tx_polarity_flip_physical{101.0}=0x1
|
||||||
|
phy_chain_rx_polarity_flip_physical{101.0}=0x0
|
||||||
|
phy_chain_tx_polarity_flip_physical{102.0}=0x0
|
||||||
|
phy_chain_rx_polarity_flip_physical{102.0}=0x1
|
||||||
|
phy_chain_tx_polarity_flip_physical{103.0}=0x1
|
||||||
|
phy_chain_rx_polarity_flip_physical{103.0}=0x0
|
||||||
|
phy_chain_tx_polarity_flip_physical{104.0}=0x0
|
||||||
|
phy_chain_rx_polarity_flip_physical{104.0}=0x0
|
||||||
|
|
||||||
|
#wc26 P/N flip
|
||||||
|
phy_chain_tx_polarity_flip_physical{105.0}=0x1
|
||||||
|
phy_chain_rx_polarity_flip_physical{105.0}=0x0
|
||||||
|
phy_chain_tx_polarity_flip_physical{106.0}=0x0
|
||||||
|
phy_chain_rx_polarity_flip_physical{106.0}=0x1
|
||||||
|
phy_chain_tx_polarity_flip_physical{107.0}=0x1
|
||||||
|
phy_chain_rx_polarity_flip_physical{107.0}=0x0
|
||||||
|
phy_chain_tx_polarity_flip_physical{108.0}=0x0
|
||||||
|
phy_chain_rx_polarity_flip_physical{108.0}=0x1
|
||||||
|
|
||||||
|
#wc27 P/N flip
|
||||||
|
phy_chain_tx_polarity_flip_physical{109.0}=0x1
|
||||||
|
phy_chain_rx_polarity_flip_physical{109.0}=0x1
|
||||||
|
phy_chain_tx_polarity_flip_physical{110.0}=0x0
|
||||||
|
phy_chain_rx_polarity_flip_physical{110.0}=0x0
|
||||||
|
phy_chain_tx_polarity_flip_physical{111.0}=0x1
|
||||||
|
phy_chain_rx_polarity_flip_physical{111.0}=0x1
|
||||||
|
phy_chain_tx_polarity_flip_physical{112.0}=0x0
|
||||||
|
phy_chain_rx_polarity_flip_physical{112.0}=0x0
|
||||||
|
|
||||||
|
#wc28 P/N flip
|
||||||
|
phy_chain_tx_polarity_flip_physical{113.0}=0x1
|
||||||
|
phy_chain_rx_polarity_flip_physical{113.0}=0x1
|
||||||
|
phy_chain_tx_polarity_flip_physical{114.0}=0x0
|
||||||
|
phy_chain_rx_polarity_flip_physical{114.0}=0x0
|
||||||
|
phy_chain_tx_polarity_flip_physical{115.0}=0x1
|
||||||
|
phy_chain_rx_polarity_flip_physical{115.0}=0x0
|
||||||
|
phy_chain_tx_polarity_flip_physical{116.0}=0x0
|
||||||
|
phy_chain_rx_polarity_flip_physical{116.0}=0x0
|
||||||
|
|
||||||
|
#wc29 P/N flip
|
||||||
|
phy_chain_tx_polarity_flip_physical{117.0}=0x1
|
||||||
|
phy_chain_rx_polarity_flip_physical{117.0}=0x1
|
||||||
|
phy_chain_tx_polarity_flip_physical{118.0}=0x0
|
||||||
|
phy_chain_rx_polarity_flip_physical{118.0}=0x0
|
||||||
|
phy_chain_tx_polarity_flip_physical{119.0}=0x1
|
||||||
|
phy_chain_rx_polarity_flip_physical{119.0}=0x1
|
||||||
|
phy_chain_tx_polarity_flip_physical{120.0}=0x0
|
||||||
|
phy_chain_rx_polarity_flip_physical{120.0}=0x0
|
||||||
|
|
||||||
|
#wc30 P/N flip
|
||||||
|
phy_chain_tx_polarity_flip_physical{121.0}=0x1
|
||||||
|
phy_chain_rx_polarity_flip_physical{121.0}=0x0
|
||||||
|
phy_chain_tx_polarity_flip_physical{122.0}=0x0
|
||||||
|
phy_chain_rx_polarity_flip_physical{122.0}=0x1
|
||||||
|
phy_chain_tx_polarity_flip_physical{123.0}=0x1
|
||||||
|
phy_chain_rx_polarity_flip_physical{123.0}=0x0
|
||||||
|
phy_chain_tx_polarity_flip_physical{124.0}=0x0
|
||||||
|
phy_chain_rx_polarity_flip_physical{124.0}=0x1
|
||||||
|
|
||||||
|
#wc31 P/N flip
|
||||||
|
phy_chain_tx_polarity_flip_physical{125.0}=0x1
|
||||||
|
phy_chain_rx_polarity_flip_physical{125.0}=0x1
|
||||||
|
phy_chain_tx_polarity_flip_physical{126.0}=0x0
|
||||||
|
phy_chain_rx_polarity_flip_physical{126.0}=0x0
|
||||||
|
phy_chain_tx_polarity_flip_physical{127.0}=0x1
|
||||||
|
phy_chain_rx_polarity_flip_physical{127.0}=0x1
|
||||||
|
phy_chain_tx_polarity_flip_physical{128.0}=0x0
|
||||||
|
phy_chain_rx_polarity_flip_physical{128.0}=0x0
|
||||||
|
|
||||||
|
#MC P/N flip
|
||||||
|
phy_chain_tx_polarity_flip_physical{129.0}=0x1
|
||||||
|
phy_chain_rx_polarity_flip_physical{129.0}=0x0
|
||||||
|
phy_chain_tx_polarity_flip_physical{130.0}=0x0
|
||||||
|
phy_chain_rx_polarity_flip_physical{130.0}=0x0
|
||||||
|
phy_chain_tx_polarity_flip_physical{131.0}=0x1
|
||||||
|
phy_chain_rx_polarity_flip_physical{131.0}=0x1
|
||||||
|
phy_chain_tx_polarity_flip_physical{132.0}=0x0
|
||||||
|
phy_chain_rx_polarity_flip_physical{132.0}=0x1
|
||||||
|
|
||||||
|
|
||||||
|
# configuration for 100G optical module
|
||||||
|
serdes_preemphasis_1=0x164608
|
||||||
|
serdes_preemphasis_5=0x164608
|
||||||
|
serdes_preemphasis_9=0x164608
|
||||||
|
serdes_preemphasis_13=0x134908
|
||||||
|
serdes_preemphasis_17=0x134908
|
||||||
|
serdes_preemphasis_21=0x134908
|
||||||
|
serdes_preemphasis_25=0x124a08
|
||||||
|
serdes_preemphasis_29=0x124a08
|
||||||
|
serdes_preemphasis_33=0x114b08
|
||||||
|
serdes_preemphasis_37=0x114b08
|
||||||
|
serdes_preemphasis_41=0x0f4d08
|
||||||
|
serdes_preemphasis_45=0x0f4d08
|
||||||
|
serdes_preemphasis_49=0x0d4f08
|
||||||
|
serdes_preemphasis_53=0x0d4f08
|
||||||
|
serdes_preemphasis_57=0x0d4f08
|
||||||
|
serdes_preemphasis_61=0x0d4f08
|
||||||
|
serdes_preemphasis_67=0x0d4f08
|
||||||
|
serdes_preemphasis_71=0x0d4f08
|
||||||
|
serdes_preemphasis_75=0x0d4f08
|
||||||
|
serdes_preemphasis_79=0x0d4f08
|
||||||
|
serdes_preemphasis_83=0x0d4f08
|
||||||
|
serdes_preemphasis_87=0x0f4d08
|
||||||
|
serdes_preemphasis_91=0x0f4d08
|
||||||
|
serdes_preemphasis_95=0x0f4d08
|
||||||
|
serdes_preemphasis_99=0x114b08
|
||||||
|
serdes_preemphasis_103=0x114b08
|
||||||
|
serdes_preemphasis_107=0x114b08
|
||||||
|
serdes_preemphasis_111=0x124a08
|
||||||
|
serdes_preemphasis_115=0x134908
|
||||||
|
serdes_preemphasis_119=0x134908
|
||||||
|
serdes_preemphasis_123=0x134908
|
||||||
|
serdes_preemphasis_127=0x164608
|
||||||
|
|
||||||
|
#VxLAN
|
||||||
|
sai_tunnel_support=1
|
||||||
|
use_all_splithorizon_groups=1
|
||||||
|
bcm_tunnel_term_compatible_mode=1
|
||||||
|
flow_init_mode=1
|
||||||
|
l3_ecmp_levels=2
|
||||||
|
riot_enable=1
|
||||||
|
riot_overlay_l3_intf_mem_size=8192
|
||||||
|
riot_overlay_l3_egress_mem_size=32768
|
||||||
|
riot_overlay_ecmp_resilient_hash_size=16384
|
@ -1,4 +1,3 @@
|
|||||||
sai_load_hw_config=/etc/bcm/flex/bcm56870_a0_premium_issu/b870.6.4.1/
|
|
||||||
help_cli_enable=1
|
help_cli_enable=1
|
||||||
ifp_inports_support_enable=1
|
ifp_inports_support_enable=1
|
||||||
ipv6_lpm_128b_enable=0x1
|
ipv6_lpm_128b_enable=0x1
|
||||||
@ -8,8 +7,13 @@ l3_max_ecmp_mode=1
|
|||||||
l3_mem_entries=16384
|
l3_mem_entries=16384
|
||||||
lpm_scaling_enable=1
|
lpm_scaling_enable=1
|
||||||
max_vp_lags=0
|
max_vp_lags=0
|
||||||
mem_cache_enable=0
|
#mem_cache_enable=0
|
||||||
memlist_enable=1
|
memlist_enable=1
|
||||||
|
reglist_enable=1
|
||||||
|
#scache_filename=/tmp/scache
|
||||||
|
schan_intr_enable=0
|
||||||
|
stable_size=0x5500000
|
||||||
|
tdma_timeout_usec=3000000
|
||||||
miim_intr_enable=0
|
miim_intr_enable=0
|
||||||
module_64ports=1
|
module_64ports=1
|
||||||
oversubscribe_mode=1
|
oversubscribe_mode=1
|
||||||
@ -18,47 +22,49 @@ serdes_lane_config_dfe=on
|
|||||||
#serdes_fec_enable=1
|
#serdes_fec_enable=1
|
||||||
serdes_if_type_ce=14
|
serdes_if_type_ce=14
|
||||||
pbmp_gport_stack.0=0x0000000000000000000000000000000000000000000000000000000000000000
|
pbmp_gport_stack.0=0x0000000000000000000000000000000000000000000000000000000000000000
|
||||||
pbmp_xport_xe=0x888888888888888c2222222222222222
|
pbmp_xport_xe=0x3ffffffffffffffffffffffffffffffffe
|
||||||
|
port_flex_enable=1
|
||||||
|
|
||||||
ptp_ts_pll_fref=50000000
|
ptp_ts_pll_fref=50000000
|
||||||
ptp_bs_fref_0=50000000
|
ptp_bs_fref_0=50000000
|
||||||
ptp_bs_fref_1=50000000
|
ptp_bs_fref_1=50000000
|
||||||
|
bcm_tunnel_term_compatible_mode=1
|
||||||
|
phy_an_c73=1
|
||||||
|
|
||||||
portmap_1.0=1:100
|
portmap_1=1:100
|
||||||
portmap_5.0=5:100
|
portmap_5=5:100
|
||||||
portmap_9.0=9:100
|
portmap_9=9:100
|
||||||
portmap_13.0=13:100
|
portmap_13=13:100
|
||||||
portmap_17.0=17:100
|
portmap_17=17:100
|
||||||
portmap_21.0=21:100
|
portmap_21=21:100
|
||||||
portmap_25.0=25:100
|
portmap_25=25:100
|
||||||
portmap_29.0=29:100
|
portmap_29=29:100
|
||||||
portmap_33.0=33:100
|
portmap_33=33:100
|
||||||
portmap_37.0=37:100
|
portmap_37=37:100
|
||||||
portmap_41.0=41:100
|
portmap_41=41:100
|
||||||
portmap_45.0=45:100
|
portmap_45=45:100
|
||||||
portmap_49.0=49:100
|
portmap_49=49:100
|
||||||
portmap_53.0=53:100
|
portmap_53=53:100
|
||||||
portmap_57.0=57:100
|
portmap_57=57:100
|
||||||
portmap_61.0=61:100
|
portmap_61=61:100
|
||||||
|
portmap_67=65:100
|
||||||
portmap_67.0=65:100
|
portmap_71=69:100
|
||||||
portmap_71.0=69:100
|
portmap_75=73:100
|
||||||
portmap_75.0=73:100
|
portmap_79=77:100
|
||||||
portmap_79.0=77:100
|
portmap_83=81:100
|
||||||
portmap_83.0=81:100
|
portmap_87=85:100
|
||||||
portmap_87.0=85:100
|
portmap_91=89:100
|
||||||
portmap_91.0=89:100
|
portmap_95=93:100
|
||||||
portmap_95.0=93:100
|
portmap_99=97:100
|
||||||
portmap_99.0=97:100
|
portmap_103=101:100
|
||||||
portmap_103.0=101:100
|
portmap_107=105:100
|
||||||
portmap_107.0=105:100
|
portmap_111=109:100
|
||||||
portmap_111.0=109:100
|
portmap_115=113:100
|
||||||
portmap_115.0=113:100
|
portmap_119=117:100
|
||||||
portmap_119.0=117:100
|
portmap_123=121:100
|
||||||
portmap_123.0=121:100
|
portmap_127=125:100
|
||||||
portmap_127.0=125:100
|
portmap_66=129:10:m
|
||||||
portmap_66.0=129:10:m
|
#portmap_130=128:10:m
|
||||||
#portmap_130.0=128:10:m
|
|
||||||
|
|
||||||
#wc0 lane swap
|
#wc0 lane swap
|
||||||
phy_chain_tx_lane_map_physical{1.0}=0x0132
|
phy_chain_tx_lane_map_physical{1.0}=0x0132
|
||||||
@ -518,45 +524,11 @@ phy_chain_tx_polarity_flip_physical{129.0}=0x1
|
|||||||
phy_chain_rx_polarity_flip_physical{129.0}=0x0
|
phy_chain_rx_polarity_flip_physical{129.0}=0x0
|
||||||
phy_chain_tx_polarity_flip_physical{130.0}=0x0
|
phy_chain_tx_polarity_flip_physical{130.0}=0x0
|
||||||
phy_chain_rx_polarity_flip_physical{130.0}=0x0
|
phy_chain_rx_polarity_flip_physical{130.0}=0x0
|
||||||
phy_chain_tx_polarity_flip_physical{131.0}=0x0
|
phy_chain_tx_polarity_flip_physical{131.0}=0x1
|
||||||
phy_chain_rx_polarity_flip_physical{131.0}=0x0
|
phy_chain_rx_polarity_flip_physical{131.0}=0x1
|
||||||
phy_chain_tx_polarity_flip_physical{132.0}=0x0
|
phy_chain_tx_polarity_flip_physical{132.0}=0x0
|
||||||
phy_chain_rx_polarity_flip_physical{132.0}=0x0
|
phy_chain_rx_polarity_flip_physical{132.0}=0x1
|
||||||
|
|
||||||
dport_map_port_1=1
|
|
||||||
dport_map_port_5=2
|
|
||||||
dport_map_port_9=3
|
|
||||||
dport_map_port_13=4
|
|
||||||
dport_map_port_17=5
|
|
||||||
dport_map_port_21=6
|
|
||||||
dport_map_port_25=7
|
|
||||||
dport_map_port_29=8
|
|
||||||
dport_map_port_33=9
|
|
||||||
dport_map_port_37=10
|
|
||||||
dport_map_port_41=11
|
|
||||||
dport_map_port_45=12
|
|
||||||
dport_map_port_49=13
|
|
||||||
dport_map_port_53=14
|
|
||||||
dport_map_port_57=15
|
|
||||||
dport_map_port_61=16
|
|
||||||
dport_map_port_67=17
|
|
||||||
dport_map_port_71=18
|
|
||||||
dport_map_port_75=19
|
|
||||||
dport_map_port_79=20
|
|
||||||
dport_map_port_83=21
|
|
||||||
dport_map_port_87=22
|
|
||||||
dport_map_port_91=23
|
|
||||||
dport_map_port_95=24
|
|
||||||
dport_map_port_99=25
|
|
||||||
dport_map_port_103=26
|
|
||||||
dport_map_port_107=27
|
|
||||||
dport_map_port_111=28
|
|
||||||
dport_map_port_115=29
|
|
||||||
dport_map_port_119=30
|
|
||||||
dport_map_port_123=31
|
|
||||||
dport_map_port_127=32
|
|
||||||
dport_map_port_66=33
|
|
||||||
#dport_map_port_130=34
|
|
||||||
|
|
||||||
# configuration for 100G optical module
|
# configuration for 100G optical module
|
||||||
serdes_preemphasis_1=0x164608
|
serdes_preemphasis_1=0x164608
|
||||||
@ -592,8 +564,3 @@ serdes_preemphasis_119=0x134908
|
|||||||
serdes_preemphasis_123=0x134908
|
serdes_preemphasis_123=0x134908
|
||||||
serdes_preemphasis_127=0x164608
|
serdes_preemphasis_127=0x164608
|
||||||
|
|
||||||
reglist_enable=1
|
|
||||||
scache_filename=/tmp/scache
|
|
||||||
schan_intr_enable=0
|
|
||||||
stable_size=0x5500000
|
|
||||||
tdma_timeout_usec=3000000
|
|
||||||
|
@ -1,3 +1,4 @@
|
|||||||
|
CONSOLE_PORT=0xe060
|
||||||
CONSOLE_DEV=0
|
CONSOLE_DEV=0
|
||||||
CONSOLE_SPEED=115200
|
CONSOLE_SPEED=115200
|
||||||
ONIE_PLATFORM_EXTRA_CMDLINE_LINUX="earlycon=uart8250,mmio,0xdf37b000"
|
ONIE_PLATFORM_EXTRA_CMDLINE_LINUX="intel_iommu=off thermal.off=1 noirqdebug acpi_no_watchdog earlycon=uart8250,mmio,0xdf37b000"
|
||||||
|
@ -1,5 +1,2 @@
|
|||||||
linkscan off
|
m0 load 0 0x3800 /usr/share/sonic/platform/custom_led.bin
|
||||||
m0 load 0 0x3800 /usr/share/sonic/platform/custom.bin
|
|
||||||
sleep 10
|
|
||||||
led auto on; led start
|
led auto on; led start
|
||||||
linkscan on
|
|
||||||
|
153
device/celestica/x86_64-cel_seastone_2-r0/pcie.yaml
Normal file
153
device/celestica/x86_64-cel_seastone_2-r0/pcie.yaml
Normal file
@ -0,0 +1,153 @@
|
|||||||
|
- bus: '00'
|
||||||
|
dev: '00'
|
||||||
|
fn: '0'
|
||||||
|
id: '1980'
|
||||||
|
name: 'Host bridge: Intel Corporation Atom Processor C3000 Series System Agent (rev
|
||||||
|
11)'
|
||||||
|
- bus: '00'
|
||||||
|
dev: '04'
|
||||||
|
fn: '0'
|
||||||
|
id: 19a1
|
||||||
|
name: 'Host bridge: Intel Corporation Atom Processor C3000 Series Error Registers
|
||||||
|
(rev 11)'
|
||||||
|
- bus: '00'
|
||||||
|
dev: '05'
|
||||||
|
fn: '0'
|
||||||
|
id: 19a2
|
||||||
|
name: 'Generic system peripheral [0807]: Intel Corporation Atom Processor C3000
|
||||||
|
Series Root Complex Event Collector (rev 11)'
|
||||||
|
- bus: '00'
|
||||||
|
dev: '06'
|
||||||
|
fn: '0'
|
||||||
|
id: 19a3
|
||||||
|
name: 'PCI bridge: Intel Corporation Atom Processor C3000 Series Integrated QAT
|
||||||
|
Root Port (rev 11)'
|
||||||
|
- bus: '00'
|
||||||
|
dev: 09
|
||||||
|
fn: '0'
|
||||||
|
id: 19a4
|
||||||
|
name: 'PCI bridge: Intel Corporation Atom Processor C3000 Series PCI Express Root
|
||||||
|
Port #0 (rev 11)'
|
||||||
|
- bus: '00'
|
||||||
|
dev: '10'
|
||||||
|
fn: '0'
|
||||||
|
id: 19aa
|
||||||
|
name: 'PCI bridge: Intel Corporation Atom Processor C3000 Series PCI Express Root
|
||||||
|
Port #6 (rev 11)'
|
||||||
|
- bus: '00'
|
||||||
|
dev: '11'
|
||||||
|
fn: '0'
|
||||||
|
id: 19ab
|
||||||
|
name: 'PCI bridge: Intel Corporation Atom Processor C3000 Series PCI Express Root
|
||||||
|
Port #7 (rev 11)'
|
||||||
|
- bus: '00'
|
||||||
|
dev: '12'
|
||||||
|
fn: '0'
|
||||||
|
id: 19ac
|
||||||
|
name: 'System peripheral: Intel Corporation Atom Processor C3000 Series SMBus Contoller
|
||||||
|
- Host (rev 11)'
|
||||||
|
- bus: '00'
|
||||||
|
dev: '14'
|
||||||
|
fn: '0'
|
||||||
|
id: 19c2
|
||||||
|
name: 'SATA controller: Intel Corporation Atom Processor C3000 Series SATA Controller
|
||||||
|
1 (rev 11)'
|
||||||
|
- bus: '00'
|
||||||
|
dev: '15'
|
||||||
|
fn: '0'
|
||||||
|
id: 19d0
|
||||||
|
name: 'USB controller: Intel Corporation Atom Processor C3000 Series USB 3.0 xHCI
|
||||||
|
Controller (rev 11)'
|
||||||
|
- bus: '00'
|
||||||
|
dev: '16'
|
||||||
|
fn: '0'
|
||||||
|
id: 19d1
|
||||||
|
name: 'PCI bridge: Intel Corporation Atom Processor C3000 Series Integrated LAN
|
||||||
|
Root Port #0 (rev 11)'
|
||||||
|
- bus: '00'
|
||||||
|
dev: '18'
|
||||||
|
fn: '0'
|
||||||
|
id: 19d3
|
||||||
|
name: 'Communication controller: Intel Corporation Atom Processor C3000 Series ME
|
||||||
|
HECI 1 (rev 11)'
|
||||||
|
- bus: '00'
|
||||||
|
dev: 1a
|
||||||
|
fn: '0'
|
||||||
|
id: 19d8
|
||||||
|
name: 'Serial controller: Intel Corporation Atom Processor C3000 Series HSUART Controller
|
||||||
|
(rev 11)'
|
||||||
|
- bus: '00'
|
||||||
|
dev: 1a
|
||||||
|
fn: '1'
|
||||||
|
id: 19d8
|
||||||
|
name: 'Serial controller: Intel Corporation Atom Processor C3000 Series HSUART Controller
|
||||||
|
(rev 11)'
|
||||||
|
- bus: '00'
|
||||||
|
dev: 1a
|
||||||
|
fn: '2'
|
||||||
|
id: 19d8
|
||||||
|
name: 'Serial controller: Intel Corporation Atom Processor C3000 Series HSUART Controller
|
||||||
|
(rev 11)'
|
||||||
|
- bus: '00'
|
||||||
|
dev: 1c
|
||||||
|
fn: '0'
|
||||||
|
id: 19db
|
||||||
|
name: 'SD Host controller: Intel Corporation Device 19db (rev 11)'
|
||||||
|
- bus: '00'
|
||||||
|
dev: 1f
|
||||||
|
fn: '0'
|
||||||
|
id: 19dc
|
||||||
|
name: 'ISA bridge: Intel Corporation Atom Processor C3000 Series LPC or eSPI (rev
|
||||||
|
11)'
|
||||||
|
- bus: '00'
|
||||||
|
dev: 1f
|
||||||
|
fn: '2'
|
||||||
|
id: 19de
|
||||||
|
name: 'Memory controller: Intel Corporation Atom Processor C3000 Series Power Management
|
||||||
|
Controller (rev 11)'
|
||||||
|
- bus: '00'
|
||||||
|
dev: 1f
|
||||||
|
fn: '4'
|
||||||
|
id: 19df
|
||||||
|
name: 'SMBus: Intel Corporation Atom Processor C3000 Series SMBus controller (rev
|
||||||
|
11)'
|
||||||
|
- bus: '00'
|
||||||
|
dev: 1f
|
||||||
|
fn: '5'
|
||||||
|
id: 19e0
|
||||||
|
name: 'Serial bus controller [0c80]: Intel Corporation Atom Processor C3000 Series
|
||||||
|
SPI Controller (rev 11)'
|
||||||
|
- bus: '01'
|
||||||
|
dev: '00'
|
||||||
|
fn: '0'
|
||||||
|
id: 19e2
|
||||||
|
name: 'Co-processor: Intel Corporation Atom Processor C3000 Series QuickAssist Technology
|
||||||
|
(rev 11)'
|
||||||
|
- bus: '02'
|
||||||
|
dev: '00'
|
||||||
|
fn: '0'
|
||||||
|
id: b870
|
||||||
|
name: 'Ethernet controller: Broadcom Inc. and subsidiaries Device b870 (rev 01)'
|
||||||
|
- bus: '03'
|
||||||
|
dev: '00'
|
||||||
|
fn: '0'
|
||||||
|
id: '7021'
|
||||||
|
name: 'Memory controller: Xilinx Corporation Device 7021'
|
||||||
|
- bus: '04'
|
||||||
|
dev: '00'
|
||||||
|
fn: '0'
|
||||||
|
id: '1533'
|
||||||
|
name: 'Ethernet controller: Intel Corporation I210 Gigabit Network Connection (rev
|
||||||
|
03)'
|
||||||
|
- bus: '05'
|
||||||
|
dev: '00'
|
||||||
|
fn: '0'
|
||||||
|
id: 15c2
|
||||||
|
name: 'Ethernet controller: Intel Corporation Ethernet Connection X553 Backplane
|
||||||
|
(rev 11)'
|
||||||
|
- bus: '05'
|
||||||
|
dev: '00'
|
||||||
|
fn: '1'
|
||||||
|
id: 15c2
|
||||||
|
name: 'Ethernet controller: Intel Corporation Ethernet Connection X553 Backplane
|
||||||
|
(rev 11)'
|
235
device/celestica/x86_64-cel_seastone_2-r0/platform.json
Normal file
235
device/celestica/x86_64-cel_seastone_2-r0/platform.json
Normal file
@ -0,0 +1,235 @@
|
|||||||
|
{
|
||||||
|
"interfaces": {
|
||||||
|
"Ethernet0": {
|
||||||
|
"index": "1,1,1,1",
|
||||||
|
"lanes": "1,2,3,4",
|
||||||
|
"breakout_modes": {
|
||||||
|
"1x100G": ["Eth1/1"]
|
||||||
|
}
|
||||||
|
},
|
||||||
|
"Ethernet4": {
|
||||||
|
"index": "2,2,2,2",
|
||||||
|
"lanes": "5,6,7,8",
|
||||||
|
"breakout_modes": {
|
||||||
|
"1x100G": ["Eth2/1"]
|
||||||
|
}
|
||||||
|
},
|
||||||
|
"Ethernet8": {
|
||||||
|
"index": "3,3,3,3",
|
||||||
|
"lanes": "9,10,11,12",
|
||||||
|
"breakout_modes": {
|
||||||
|
"1x100G": ["Eth3/1"]
|
||||||
|
}
|
||||||
|
},
|
||||||
|
"Ethernet12": {
|
||||||
|
"index": "4,4,4,4",
|
||||||
|
"lanes": "13,14,15,16",
|
||||||
|
"breakout_modes": {
|
||||||
|
"1x100G": ["Eth4/1"]
|
||||||
|
}
|
||||||
|
},
|
||||||
|
"Ethernet16": {
|
||||||
|
"index": "5,5,5,5",
|
||||||
|
"lanes": "17,18,19,20",
|
||||||
|
"breakout_modes": {
|
||||||
|
"1x100G": ["Eth5/1"]
|
||||||
|
}
|
||||||
|
},
|
||||||
|
"Ethernet20": {
|
||||||
|
"index": "6,6,6,6",
|
||||||
|
"lanes": "21,22,23,24",
|
||||||
|
"breakout_modes": {
|
||||||
|
"1x100G": ["Eth6/1"]
|
||||||
|
}
|
||||||
|
},
|
||||||
|
"Ethernet24": {
|
||||||
|
"index": "7,7,7,7",
|
||||||
|
"lanes": "25,26,27,28",
|
||||||
|
"breakout_modes": {
|
||||||
|
"1x100G": ["Eth7/1"]
|
||||||
|
}
|
||||||
|
},
|
||||||
|
"Ethernet28": {
|
||||||
|
"index": "8,8,8,8",
|
||||||
|
"lanes": "29,30,31,32",
|
||||||
|
"breakout_modes": {
|
||||||
|
"1x100G": ["Eth8/1"]
|
||||||
|
}
|
||||||
|
},
|
||||||
|
"Ethernet32": {
|
||||||
|
"index": "9,9,9,9",
|
||||||
|
"lanes": "33,34,35,36",
|
||||||
|
"breakout_modes": {
|
||||||
|
"1x100G": ["Eth9/1"]
|
||||||
|
}
|
||||||
|
},
|
||||||
|
"Ethernet36": {
|
||||||
|
"index": "10,10,10,10",
|
||||||
|
"lanes": "37,38,39,40",
|
||||||
|
"breakout_modes": {
|
||||||
|
"1x100G": ["Eth10/1"]
|
||||||
|
}
|
||||||
|
},
|
||||||
|
"Ethernet40": {
|
||||||
|
"index": "11,11,11,11",
|
||||||
|
"lanes": "41,42,43,44",
|
||||||
|
"breakout_modes": {
|
||||||
|
"1x100G": ["Eth11/1"]
|
||||||
|
}
|
||||||
|
},
|
||||||
|
"Ethernet44": {
|
||||||
|
"index": "12,12,12,12",
|
||||||
|
"lanes": "45,46,47,48",
|
||||||
|
"breakout_modes": {
|
||||||
|
"1x100G": ["Eth12/1"]
|
||||||
|
}
|
||||||
|
},
|
||||||
|
"Ethernet48": {
|
||||||
|
"index": "13,13,13,13",
|
||||||
|
"lanes": "49,50,51,52",
|
||||||
|
"breakout_modes": {
|
||||||
|
"1x100G": ["Eth13/1"]
|
||||||
|
}
|
||||||
|
},
|
||||||
|
"Ethernet52": {
|
||||||
|
"index": "14,14,14,14",
|
||||||
|
"lanes": "53,54,55,56",
|
||||||
|
"breakout_modes": {
|
||||||
|
"1x100G": ["Eth14/1"]
|
||||||
|
}
|
||||||
|
},
|
||||||
|
"Ethernet56": {
|
||||||
|
"index": "15,15,15,15",
|
||||||
|
"lanes": "57,58,59,60",
|
||||||
|
"breakout_modes": {
|
||||||
|
"1x100G": ["Eth15/1"]
|
||||||
|
}
|
||||||
|
},
|
||||||
|
"Ethernet60": {
|
||||||
|
"index": "16,16,16,16",
|
||||||
|
"lanes": "61,62,63,64",
|
||||||
|
"breakout_modes": {
|
||||||
|
"1x100G": ["Eth16/1"]
|
||||||
|
}
|
||||||
|
},
|
||||||
|
"Ethernet64": {
|
||||||
|
"index": "17,17,17,17",
|
||||||
|
"lanes": "65,66,67,68",
|
||||||
|
"breakout_modes": {
|
||||||
|
"1x100G": ["Eth17/1"]
|
||||||
|
}
|
||||||
|
},
|
||||||
|
"Ethernet68": {
|
||||||
|
"index": "18,18,18,18",
|
||||||
|
"lanes": "69,70,71,72",
|
||||||
|
"breakout_modes": {
|
||||||
|
"1x100G": ["Eth18/1"]
|
||||||
|
}
|
||||||
|
},
|
||||||
|
"Ethernet72": {
|
||||||
|
"index": "19,19,19,19",
|
||||||
|
"lanes": "73,74,75,76",
|
||||||
|
"breakout_modes": {
|
||||||
|
"1x100G": ["Eth19/1"]
|
||||||
|
}
|
||||||
|
},
|
||||||
|
"Ethernet76": {
|
||||||
|
"index": "20,20,20,20",
|
||||||
|
"lanes": "77,78,79,80",
|
||||||
|
"breakout_modes": {
|
||||||
|
"1x100G": ["Eth20/1"]
|
||||||
|
}
|
||||||
|
},
|
||||||
|
"Ethernet80": {
|
||||||
|
"index": "21,21,21,21",
|
||||||
|
"lanes": "81,82,83,84",
|
||||||
|
"breakout_modes": {
|
||||||
|
"1x100G": ["Eth21/1"]
|
||||||
|
}
|
||||||
|
},
|
||||||
|
"Ethernet84": {
|
||||||
|
"index": "22,22,22,22",
|
||||||
|
"lanes": "85,86,87,88",
|
||||||
|
"breakout_modes": {
|
||||||
|
"1x100G": ["Eth22/1"]
|
||||||
|
}
|
||||||
|
},
|
||||||
|
"Ethernet88": {
|
||||||
|
"index": "23,23,23,23",
|
||||||
|
"lanes": "89,90,91,92",
|
||||||
|
"breakout_modes": {
|
||||||
|
"1x100G": ["Eth23/1"]
|
||||||
|
}
|
||||||
|
},
|
||||||
|
"Ethernet92": {
|
||||||
|
"index": "24,24,24,24",
|
||||||
|
"lanes": "93,94,95,96",
|
||||||
|
"breakout_modes": {
|
||||||
|
"1x100G": ["Eth24/1"]
|
||||||
|
}
|
||||||
|
},
|
||||||
|
"Ethernet96": {
|
||||||
|
"index": "25,25,25,25",
|
||||||
|
"lanes": "97,98,99,100",
|
||||||
|
"breakout_modes": {
|
||||||
|
"1x100G": ["Eth25/1"]
|
||||||
|
}
|
||||||
|
},
|
||||||
|
"Ethernet100": {
|
||||||
|
"index": "26,26,26,26",
|
||||||
|
"lanes": "101,102,103,104",
|
||||||
|
"breakout_modes": {
|
||||||
|
"1x100G": ["Eth26/1"]
|
||||||
|
}
|
||||||
|
},
|
||||||
|
"Ethernet104": {
|
||||||
|
"index": "27,27,27,27",
|
||||||
|
"lanes": "105,106,107,108",
|
||||||
|
"breakout_modes": {
|
||||||
|
"1x100G": ["Eth27/1"]
|
||||||
|
}
|
||||||
|
},
|
||||||
|
"Ethernet108": {
|
||||||
|
"index": "28,28,28,28",
|
||||||
|
"lanes": "109,110,111,112",
|
||||||
|
"breakout_modes": {
|
||||||
|
"1x100G": ["Eth28/1"]
|
||||||
|
}
|
||||||
|
},
|
||||||
|
"Ethernet112": {
|
||||||
|
"index": "29,29,29,29",
|
||||||
|
"lanes": "113,114,115,116",
|
||||||
|
"breakout_modes": {
|
||||||
|
"1x100G": ["Eth29/1"]
|
||||||
|
}
|
||||||
|
},
|
||||||
|
"Ethernet116": {
|
||||||
|
"index": "30,30,30,30",
|
||||||
|
"lanes": "117,118,119,120",
|
||||||
|
"breakout_modes": {
|
||||||
|
"1x100G": ["Eth30/1"]
|
||||||
|
}
|
||||||
|
},
|
||||||
|
"Ethernet120": {
|
||||||
|
"index": "31,31,31,31",
|
||||||
|
"lanes": "121,122,123,124",
|
||||||
|
"breakout_modes": {
|
||||||
|
"1x100G": ["Eth31/1"]
|
||||||
|
}
|
||||||
|
},
|
||||||
|
"Ethernet124": {
|
||||||
|
"index": "32,32,32,32",
|
||||||
|
"lanes": "125,126,127,128",
|
||||||
|
"breakout_modes": {
|
||||||
|
"1x100G": ["Eth32/1"]
|
||||||
|
}
|
||||||
|
},
|
||||||
|
"Ethernet128": {
|
||||||
|
"index": "33",
|
||||||
|
"lanes": "129",
|
||||||
|
"breakout_modes": {
|
||||||
|
"1x10G": ["Eth33/1"]
|
||||||
|
}
|
||||||
|
}
|
||||||
|
}
|
||||||
|
}
|
@ -0,0 +1,17 @@
|
|||||||
|
{
|
||||||
|
"chassis": {
|
||||||
|
"Seastone_2": {
|
||||||
|
"component": {
|
||||||
|
"BIOS": {},
|
||||||
|
"ONIE": {},
|
||||||
|
"BMC": {},
|
||||||
|
"FPGA": {},
|
||||||
|
"CPLD COMe": {},
|
||||||
|
"CPLD BASE": {},
|
||||||
|
"CPLD SW1": {},
|
||||||
|
"CPLD SW2": {},
|
||||||
|
"SSD": {}
|
||||||
|
}
|
||||||
|
}
|
||||||
|
}
|
||||||
|
}
|
6
device/celestica/x86_64-cel_seastone_2-r0/platform_reboot
Executable file
6
device/celestica/x86_64-cel_seastone_2-r0/platform_reboot
Executable file
@ -0,0 +1,6 @@
|
|||||||
|
#!/bin/bash
|
||||||
|
|
||||||
|
# Set all LEDs to BMC's control
|
||||||
|
ipmitool raw 0x3a 0x0f 0x02 0x01 &> /dev/null
|
||||||
|
|
||||||
|
/usr/local/bin/seastone2_platform_shutdown.sh system
|
@ -1,9 +1,10 @@
|
|||||||
|
import os.path
|
||||||
|
import subprocess
|
||||||
import sys
|
import sys
|
||||||
import re
|
import re
|
||||||
|
|
||||||
try:
|
try:
|
||||||
from sonic_psu.psu_base import PsuBase
|
from sonic_psu.psu_base import PsuBase
|
||||||
from sonic_py_common.general import getstatusoutput_noshell_pipe
|
|
||||||
except ImportError as e:
|
except ImportError as e:
|
||||||
raise ImportError(str(e) + "- required module not found")
|
raise ImportError(str(e) + "- required module not found")
|
||||||
|
|
||||||
@ -12,16 +13,16 @@ class PsuUtil(PsuBase):
|
|||||||
"""Platform-specific PSUutil class"""
|
"""Platform-specific PSUutil class"""
|
||||||
|
|
||||||
def __init__(self):
|
def __init__(self):
|
||||||
self.ipmi_sensor = ["ipmitool", "sensor"]
|
self.ipmi_sensor = "ipmitool sensor"
|
||||||
PsuBase.__init__(self)
|
PsuBase.__init__(self)
|
||||||
|
|
||||||
def run_command(self, cmd1, cmd2):
|
def run_command(self, command):
|
||||||
exitcode, out = getstatusoutput_noshell_pipe(cmd1, cmd2)
|
proc = subprocess.Popen(command, shell=True, universal_newlines=True, stdout=subprocess.PIPE)
|
||||||
i = 0
|
(out, err) = proc.communicate()
|
||||||
while i < 2:
|
|
||||||
if exitcode[i] != 0:
|
if proc.returncode != 0:
|
||||||
sys.exit(exitcode[i])
|
sys.exit(proc.returncode)
|
||||||
i += 1
|
|
||||||
return out
|
return out
|
||||||
|
|
||||||
def find_value(self, grep_string):
|
def find_value(self, grep_string):
|
||||||
@ -49,8 +50,7 @@ class PsuUtil(PsuBase):
|
|||||||
return False
|
return False
|
||||||
|
|
||||||
grep_key = "PSUL_Status" if index == 1 else "PSUR_Status"
|
grep_key = "PSUL_Status" if index == 1 else "PSUR_Status"
|
||||||
grep_cmd = ["grep", grep_key]
|
grep_string = self.run_command(self.ipmi_sensor + ' | grep ' + grep_key)
|
||||||
grep_string = self.run_command(self.ipmi_sensor, grep_cmd)
|
|
||||||
status_byte = self.find_value(grep_string)
|
status_byte = self.find_value(grep_string)
|
||||||
|
|
||||||
if status_byte is None:
|
if status_byte is None:
|
||||||
@ -74,8 +74,7 @@ class PsuUtil(PsuBase):
|
|||||||
return False
|
return False
|
||||||
|
|
||||||
grep_key = "PSUL_Status" if index == 1 else "PSUR_Status"
|
grep_key = "PSUL_Status" if index == 1 else "PSUR_Status"
|
||||||
grep_cmd = ["grep", grep_key]
|
grep_string = self.run_command(self.ipmi_sensor + ' | grep ' + grep_key)
|
||||||
grep_string = self.run_command(self.ipmi_sensor, grep_cmd)
|
|
||||||
status_byte = self.find_value(grep_string)
|
status_byte = self.find_value(grep_string)
|
||||||
|
|
||||||
if status_byte is None:
|
if status_byte is None:
|
||||||
|
@ -1,7 +1,5 @@
|
|||||||
{
|
{
|
||||||
"skip_ledd": true,
|
"skip_ledd": true,
|
||||||
"skip_xcvrd": false,
|
"skip_fancontrol": true,
|
||||||
"skip_psud": false,
|
"skip_xcvrd_cmis_mgr": true
|
||||||
"skip_syseepromd": false,
|
|
||||||
"skip_fancontrol": true
|
|
||||||
}
|
}
|
@ -1,45 +0,0 @@
|
|||||||
{
|
|
||||||
"eeprom": "/sys/class/i2c-adapter/i2c-0/0-0056/eeprom",
|
|
||||||
"get_reboot_cause": {
|
|
||||||
"output_source": "ipmitool",
|
|
||||||
"command": "ipmitool raw 0x3a 0x0c 0x0 0x2 0x06",
|
|
||||||
"output_translator": {
|
|
||||||
"00": "Hardware - Other",
|
|
||||||
"11": "Hardware - Other",
|
|
||||||
"22": "Non-Hardware",
|
|
||||||
"33": "Hardware - Other",
|
|
||||||
"44": "Non-Hardware",
|
|
||||||
"55": "Non-Hardware",
|
|
||||||
"77": "Watchdog",
|
|
||||||
"88": "Thermal Overload: CPU",
|
|
||||||
"99": "Thermal Overload: ASIC"
|
|
||||||
}
|
|
||||||
},
|
|
||||||
"get_reboot_description": {
|
|
||||||
"output_source": "ipmitool",
|
|
||||||
"command": "ipmitool raw 0x3a 0x0c 0x0 0x2 0x06",
|
|
||||||
"output_translator": {
|
|
||||||
"00": "The last reset is power cycle reset (set register 0xA164)",
|
|
||||||
"11": "The last reset is Power on reset",
|
|
||||||
"22": "The last reset is soft-set CPU warm reset",
|
|
||||||
"33": "The last reset is soft-set CPU cold reset",
|
|
||||||
"44": "The last reset is CPU warm reset",
|
|
||||||
"55": "The last reset is CPU cold reset",
|
|
||||||
"77": "The last reset is watchdog reset",
|
|
||||||
"88": "The last reset is CPU thermal overload",
|
|
||||||
"99": "The last reset is ASIC thermal overload"
|
|
||||||
}
|
|
||||||
},
|
|
||||||
"get_watchdog": {
|
|
||||||
"output_source": "class",
|
|
||||||
"host_path": "/usr/share/sonic/device/x86_64-cel_seastone_2-r0/sonic_platform_config/watchdog.py",
|
|
||||||
"pmon_path": "/usr/share/sonic/platform/sonic_platform_config/watchdog.py",
|
|
||||||
"class": "Watchdog"
|
|
||||||
},
|
|
||||||
"get_change_event": {
|
|
||||||
"output_source": "class",
|
|
||||||
"host_path": "/usr/share/sonic/device/x86_64-cel_seastone_2-r0/sonic_platform_config/event.py",
|
|
||||||
"pmon_path": "/usr/share/sonic/platform/sonic_platform_config/event.py",
|
|
||||||
"class": "SfpEvent"
|
|
||||||
}
|
|
||||||
}
|
|
@ -1,62 +0,0 @@
|
|||||||
{
|
|
||||||
"component_num": 5,
|
|
||||||
"get_name": {
|
|
||||||
"output_source": "value_list",
|
|
||||||
"value_list": [
|
|
||||||
"BIOS",
|
|
||||||
"CPLD_BASEBOARD",
|
|
||||||
"CPLD_SWITCHBOARD",
|
|
||||||
"FPGA",
|
|
||||||
"BMC"
|
|
||||||
]
|
|
||||||
},
|
|
||||||
"get_description": {
|
|
||||||
"output_source": "value_list",
|
|
||||||
"value_list": [
|
|
||||||
"Used to perform hardware initialization during the booting process",
|
|
||||||
"Used to control the system power & reset, Control FAN, UART Mux etc",
|
|
||||||
"Used for managing QSFP ports",
|
|
||||||
"Used for managing I2C, SPI, PCIe etc",
|
|
||||||
"Used for monitoring and managing whole system"
|
|
||||||
]
|
|
||||||
},
|
|
||||||
"get_firmware_version": {
|
|
||||||
"output_source": "function",
|
|
||||||
"function": [
|
|
||||||
"_get_bios_ver",
|
|
||||||
"_get_base_cpld_ver",
|
|
||||||
"_get_sw_cpld_ver",
|
|
||||||
"_get_fpga_ver",
|
|
||||||
"_get_bmc_ver"
|
|
||||||
]
|
|
||||||
},
|
|
||||||
"_get_bmc_ver": {
|
|
||||||
"output_source": "ipmitool",
|
|
||||||
"command": "ipmitool mc info | grep 'Firmware Revision'",
|
|
||||||
"output_translator": "'{}'.split(':')[-1].strip()"
|
|
||||||
},
|
|
||||||
"_get_bios_ver": {
|
|
||||||
"output_source": "txt_file",
|
|
||||||
"path": "/sys/class/dmi/id/bios_version"
|
|
||||||
},
|
|
||||||
"_get_base_cpld_ver": {
|
|
||||||
"output_source": "hex_version_file",
|
|
||||||
"num_of_points": 1,
|
|
||||||
"num_of_bits": 8,
|
|
||||||
"path": "/sys/devices/platform/baseboard/version"
|
|
||||||
},
|
|
||||||
"_get_sw_cpld_ver": {
|
|
||||||
"output_source": "hex_version_getreg",
|
|
||||||
"num_of_points": 1,
|
|
||||||
"num_of_bits": 8,
|
|
||||||
"reg_addr": "0x00",
|
|
||||||
"path": "/sys/devices/platform/switchboard/CPLD1/getreg"
|
|
||||||
},
|
|
||||||
"_get_fpga_ver": {
|
|
||||||
"output_source": "hex_version_getreg",
|
|
||||||
"num_of_points": 1,
|
|
||||||
"num_of_bits": 32,
|
|
||||||
"reg_addr": "0x00",
|
|
||||||
"path": "/sys/devices/platform/switchboard/FPGA/getreg"
|
|
||||||
}
|
|
||||||
}
|
|
@ -1,117 +0,0 @@
|
|||||||
#############################################################################
|
|
||||||
# Celestica Seastone2
|
|
||||||
#
|
|
||||||
# SfpEvent contains an implementation of SONiC Platform Base API
|
|
||||||
#
|
|
||||||
#############################################################################
|
|
||||||
try:
|
|
||||||
import time
|
|
||||||
import os
|
|
||||||
from sonic_platform.common import Common
|
|
||||||
except ImportError as e:
|
|
||||||
raise ImportError(str(e) + "- required module not found")
|
|
||||||
|
|
||||||
|
|
||||||
PLATFORM_PATH = "/sys/devices/platform/"
|
|
||||||
SWITCH_BRD_PLATFORM = "switchboard"
|
|
||||||
POLL_INTERVAL = 1
|
|
||||||
|
|
||||||
|
|
||||||
class SfpEvent:
|
|
||||||
''' Listen to insert/remove sfp events '''
|
|
||||||
|
|
||||||
PORT_INFO_DIR = 'SFF'
|
|
||||||
PATH_INT_SYSFS = "{0}/{port_name}/{type_prefix}_isr_flags"
|
|
||||||
PATH_INTMASK_SYSFS = "{0}/{port_name}/{type_prefix}_isr_mask"
|
|
||||||
PATH_PRS_SYSFS = "{0}/{port_name}/{prs_file_name}"
|
|
||||||
PRESENT_EN = 0x01
|
|
||||||
|
|
||||||
def __init__(self, sfp_list):
|
|
||||||
self.num_sfp = len(sfp_list)
|
|
||||||
self._api_common = Common()
|
|
||||||
self._initialize_interrupts()
|
|
||||||
|
|
||||||
def _initialize_interrupts(self):
|
|
||||||
sfp_info_obj = {}
|
|
||||||
port_info_path = os.path.join(
|
|
||||||
PLATFORM_PATH, SWITCH_BRD_PLATFORM, self.PORT_INFO_DIR)
|
|
||||||
|
|
||||||
for index in range(self.num_sfp):
|
|
||||||
port_num = index + 1
|
|
||||||
if port_num <= 32:
|
|
||||||
port_name = "QSFP{}".format(port_num)
|
|
||||||
port_type = "qsfp"
|
|
||||||
sysfs_prs_file = "{}_modprs".format(port_type)
|
|
||||||
else:
|
|
||||||
port_name = "SFP{}".format(port_num - 32)
|
|
||||||
port_type = "sfp"
|
|
||||||
sysfs_prs_file = "{}_modabs".format(port_type)
|
|
||||||
|
|
||||||
sfp_info_obj[index] = {}
|
|
||||||
sfp_info_obj[index]['intmask_sysfs'] = self.PATH_INTMASK_SYSFS.format(
|
|
||||||
port_info_path,
|
|
||||||
port_name=port_name,
|
|
||||||
type_prefix=port_type)
|
|
||||||
|
|
||||||
sfp_info_obj[index]['int_sysfs'] = self.PATH_INT_SYSFS.format(
|
|
||||||
port_info_path,
|
|
||||||
port_name=port_name,
|
|
||||||
type_prefix=port_type)
|
|
||||||
|
|
||||||
sfp_info_obj[index]['prs_sysfs'] = self.PATH_PRS_SYSFS.format(
|
|
||||||
port_info_path,
|
|
||||||
port_name=port_name,
|
|
||||||
prs_file_name=sysfs_prs_file)
|
|
||||||
|
|
||||||
self._api_common.write_txt_file(
|
|
||||||
sfp_info_obj[index]["intmask_sysfs"], hex(self.PRESENT_EN))
|
|
||||||
|
|
||||||
self.sfp_info_obj = sfp_info_obj
|
|
||||||
|
|
||||||
def _is_port_device_present(self, port_idx):
|
|
||||||
prs_path = self.sfp_info_obj[port_idx]["prs_sysfs"]
|
|
||||||
is_present = 1 - int(self._api_common.read_txt_file(prs_path))
|
|
||||||
return is_present
|
|
||||||
|
|
||||||
def _update_port_event_object(self, interrup_devices, port_dict):
|
|
||||||
for port_idx in interrup_devices:
|
|
||||||
device_id = str(port_idx + 1)
|
|
||||||
port_dict[device_id] = str(self._is_port_device_present(port_idx))
|
|
||||||
return port_dict
|
|
||||||
|
|
||||||
def _clear_event_flag(self, path):
|
|
||||||
self._api_common.write_txt_file(path, hex(0xff))
|
|
||||||
time.sleep(0.1)
|
|
||||||
self._api_common.write_txt_file(path, hex(0x0))
|
|
||||||
|
|
||||||
def _check_all_port_interrupt_event(self):
|
|
||||||
interrupt_devices = {}
|
|
||||||
for i in range(self.num_sfp):
|
|
||||||
int_sysfs = self.sfp_info_obj[i]["int_sysfs"]
|
|
||||||
interrupt_flags = self._api_common.read_txt_file(int_sysfs)
|
|
||||||
if interrupt_flags != '0x00':
|
|
||||||
interrupt_devices[i] = 1
|
|
||||||
self._clear_event_flag(int_sysfs)
|
|
||||||
return interrupt_devices
|
|
||||||
|
|
||||||
def get_event(self, timeout):
|
|
||||||
sleep_time = min(
|
|
||||||
timeout, POLL_INTERVAL) if timeout != 0 else POLL_INTERVAL
|
|
||||||
start_milli_time = int(round(time.time() * 1000))
|
|
||||||
int_sfp = {}
|
|
||||||
|
|
||||||
while True:
|
|
||||||
chk_sfp = self._check_all_port_interrupt_event()
|
|
||||||
int_sfp = self._update_port_event_object(
|
|
||||||
chk_sfp, int_sfp) if chk_sfp else int_sfp
|
|
||||||
current_milli_time = int(round(time.time() * 1000))
|
|
||||||
if (int_sfp) or \
|
|
||||||
(timeout != 0 and current_milli_time - start_milli_time > timeout):
|
|
||||||
break
|
|
||||||
|
|
||||||
time.sleep(sleep_time)
|
|
||||||
|
|
||||||
change_dict = dict()
|
|
||||||
change_dict['sfp'] = int_sfp
|
|
||||||
|
|
||||||
return True, change_dict
|
|
@ -1,200 +0,0 @@
|
|||||||
{
|
|
||||||
"fan_num_per_drawer": 2,
|
|
||||||
"drawer_num": 4,
|
|
||||||
"get_name": {
|
|
||||||
"output_source": "value_list",
|
|
||||||
"value_list": [
|
|
||||||
"Fan1-F",
|
|
||||||
"Fan1-R",
|
|
||||||
"Fan2-F",
|
|
||||||
"Fan2-R",
|
|
||||||
"Fan3-F",
|
|
||||||
"Fan3-R",
|
|
||||||
"Fan4-F",
|
|
||||||
"Fan4-R"
|
|
||||||
]
|
|
||||||
},
|
|
||||||
"get_presence": {
|
|
||||||
"output_source": "ipmitool",
|
|
||||||
"command": "ipmitool raw 0x3a 0x03 0x03 {}",
|
|
||||||
"argument": [
|
|
||||||
"0x00",
|
|
||||||
"0x00",
|
|
||||||
"0x01",
|
|
||||||
"0x01",
|
|
||||||
"0x02",
|
|
||||||
"0x02",
|
|
||||||
"0x03",
|
|
||||||
"0x03"
|
|
||||||
],
|
|
||||||
"output_translator": "True if '00' in '{}' else False"
|
|
||||||
},
|
|
||||||
"get_model": {
|
|
||||||
"output_source": "ipmitool",
|
|
||||||
"command": "ipmitool fru list {} | grep 'Board Part Number'",
|
|
||||||
"argument": [
|
|
||||||
"5",
|
|
||||||
"5",
|
|
||||||
"6",
|
|
||||||
"6",
|
|
||||||
"7",
|
|
||||||
"7",
|
|
||||||
"8",
|
|
||||||
"8"
|
|
||||||
],
|
|
||||||
"output_translator": "'{}'.split()[-1]"
|
|
||||||
},
|
|
||||||
"get_serial": {
|
|
||||||
"output_source": "ipmitool",
|
|
||||||
"command": "ipmitool fru list {} | grep 'Board Serial'",
|
|
||||||
"argument": [
|
|
||||||
"5",
|
|
||||||
"5",
|
|
||||||
"6",
|
|
||||||
"6",
|
|
||||||
"7",
|
|
||||||
"7",
|
|
||||||
"8",
|
|
||||||
"8"
|
|
||||||
],
|
|
||||||
"output_translator": "'{}'.split()[-1]"
|
|
||||||
},
|
|
||||||
"get_direction": {
|
|
||||||
"output_source": "ipmitool",
|
|
||||||
"command": "ipmitool fru list {} | grep 'F2B\\|B2F'",
|
|
||||||
"argument": [
|
|
||||||
"5",
|
|
||||||
"5",
|
|
||||||
"6",
|
|
||||||
"6",
|
|
||||||
"7",
|
|
||||||
"7",
|
|
||||||
"8",
|
|
||||||
"8"
|
|
||||||
],
|
|
||||||
"output_translator": "'intake' if 'B2F' in '{}' else 'exhaust'"
|
|
||||||
},
|
|
||||||
"get_speed": {
|
|
||||||
"output_source": "ipmitool",
|
|
||||||
"command": "ipmitool raw 0x04 0x2d {}",
|
|
||||||
"argument": [
|
|
||||||
"0x81",
|
|
||||||
"0x80",
|
|
||||||
"0x83",
|
|
||||||
"0x82",
|
|
||||||
"0x85",
|
|
||||||
"0x84",
|
|
||||||
"0x87",
|
|
||||||
"0x86"
|
|
||||||
],
|
|
||||||
"output_translator": "int('{}'.split()[0],16)*150",
|
|
||||||
"max_front": 23000,
|
|
||||||
"max_rear": 20500
|
|
||||||
},
|
|
||||||
"get_target_speed": {
|
|
||||||
"output_source": "value",
|
|
||||||
"value": "N/A"
|
|
||||||
},
|
|
||||||
"get_speed_tolerance": {
|
|
||||||
"output_source": "value",
|
|
||||||
"value": 10
|
|
||||||
},
|
|
||||||
"set_speed": {
|
|
||||||
"set_method": "ipmitool",
|
|
||||||
"input_translator": "hex(int({} * 255 / 100.0))",
|
|
||||||
"command": "ipmitool raw 0x3a 0x0c 0x00 0x03 {}",
|
|
||||||
"argument": [
|
|
||||||
"0x40 {}",
|
|
||||||
"0x40 {}",
|
|
||||||
"0x44 {}",
|
|
||||||
"0x44 {}",
|
|
||||||
"0x4c {}",
|
|
||||||
"0x4c {}",
|
|
||||||
"0x50 {}",
|
|
||||||
"0x50 {}"
|
|
||||||
]
|
|
||||||
},
|
|
||||||
"set_status_led": {
|
|
||||||
"set_method": "ipmitool",
|
|
||||||
"avaliable_input": [
|
|
||||||
"off",
|
|
||||||
"amber",
|
|
||||||
"green"
|
|
||||||
],
|
|
||||||
"input_translator": {
|
|
||||||
"off": "0x0",
|
|
||||||
"amber": "0x1",
|
|
||||||
"green": "0x2"
|
|
||||||
},
|
|
||||||
"command": "ipmitool raw 0x3a 0x0a {}",
|
|
||||||
"argument": [
|
|
||||||
"0x4 {}",
|
|
||||||
"0x4 {}",
|
|
||||||
"0x5 {}",
|
|
||||||
"0x5 {}",
|
|
||||||
"0x6 {}",
|
|
||||||
"0x6 {}",
|
|
||||||
"0x7 {}",
|
|
||||||
"0x7 {}"
|
|
||||||
]
|
|
||||||
},
|
|
||||||
"get_status_led": {
|
|
||||||
"output_source": "ipmitool",
|
|
||||||
"command": "ipmitool raw 0x3a 0x0b {}",
|
|
||||||
"argument": [
|
|
||||||
"0x4",
|
|
||||||
"0x4",
|
|
||||||
"0x5",
|
|
||||||
"0x5",
|
|
||||||
"0x6",
|
|
||||||
"0x6",
|
|
||||||
"0x7",
|
|
||||||
"0x7"
|
|
||||||
],
|
|
||||||
"output_translator": {
|
|
||||||
"00": "off",
|
|
||||||
"01": "amber",
|
|
||||||
"02": "green"
|
|
||||||
}
|
|
||||||
},
|
|
||||||
"psu_fan": [
|
|
||||||
{
|
|
||||||
"num_of_fan": 1,
|
|
||||||
"get_name": {
|
|
||||||
"output_source": "value_list",
|
|
||||||
"value_list": [
|
|
||||||
"PSU-R-Fan"
|
|
||||||
]
|
|
||||||
},
|
|
||||||
"get_speed": {
|
|
||||||
"output_source": "ipmitool",
|
|
||||||
"command": "ipmitool raw 0x04 0x2d {}",
|
|
||||||
"argument": [
|
|
||||||
"0x8b"
|
|
||||||
],
|
|
||||||
"output_translator": "int('{}'.split()[0],16)*100",
|
|
||||||
"max_front": 22600,
|
|
||||||
"max_rear": 22600
|
|
||||||
}
|
|
||||||
},
|
|
||||||
{
|
|
||||||
"num_of_fan": 1,
|
|
||||||
"get_name": {
|
|
||||||
"output_source": "value_list",
|
|
||||||
"value_list": [
|
|
||||||
"PSU-L-Fan"
|
|
||||||
]
|
|
||||||
},
|
|
||||||
"get_speed": {
|
|
||||||
"output_source": "ipmitool",
|
|
||||||
"command": "ipmitool raw 0x04 0x2d {}",
|
|
||||||
"argument": [
|
|
||||||
"0x8a"
|
|
||||||
],
|
|
||||||
"output_translator": "int('{}'.split()[0],16)*100",
|
|
||||||
"max_front": 22600,
|
|
||||||
"max_rear": 22600
|
|
||||||
}
|
|
||||||
}
|
|
||||||
]
|
|
||||||
}
|
|
@ -1,135 +0,0 @@
|
|||||||
{
|
|
||||||
"psu_num": 2,
|
|
||||||
"fan_per_psu_num": 1,
|
|
||||||
"get_name": {
|
|
||||||
"output_source": "value_list",
|
|
||||||
"value_list": [
|
|
||||||
"PSU-R",
|
|
||||||
"PSU-L"
|
|
||||||
]
|
|
||||||
},
|
|
||||||
"get_power": {
|
|
||||||
"output_source": "ipmitool",
|
|
||||||
"command": "ipmitool sdr | grep {}",
|
|
||||||
"argument": [
|
|
||||||
"PSUR_POut",
|
|
||||||
"PSUL_POut"
|
|
||||||
],
|
|
||||||
"output_translator": "float('{}'.split()[2])"
|
|
||||||
},
|
|
||||||
"get_current": {
|
|
||||||
"output_source": "ipmitool",
|
|
||||||
"command": "ipmitool sdr | grep {}",
|
|
||||||
"argument": [
|
|
||||||
"PSUR_COut",
|
|
||||||
"PSUL_COut"
|
|
||||||
],
|
|
||||||
"output_translator": "float('{}'.split()[2])"
|
|
||||||
},
|
|
||||||
"get_voltage": {
|
|
||||||
"output_source": "ipmitool",
|
|
||||||
"command": "ipmitool sdr | grep {}",
|
|
||||||
"argument": [
|
|
||||||
"PSUR_VOut",
|
|
||||||
"PSUL_VOut"
|
|
||||||
],
|
|
||||||
"output_translator": "float('{}'.split()[2])"
|
|
||||||
},
|
|
||||||
"get_voltage_high_threshold": {
|
|
||||||
"output_source": "ipmitool",
|
|
||||||
"command": "ipmitool sensor list | grep {}",
|
|
||||||
"argument": [
|
|
||||||
"PSUR_Temp2",
|
|
||||||
"PSUL_Temp2"
|
|
||||||
],
|
|
||||||
"output_translator": "float(0 if '{0}'.split()[-3]=='na' else '{0}'.split()[-3])"
|
|
||||||
},
|
|
||||||
"get_voltage_low_threshold": {
|
|
||||||
"output_source": "ipmitool",
|
|
||||||
"command": "ipmitool sensor list | grep {}",
|
|
||||||
"argument": [
|
|
||||||
"PSUR_Temp2",
|
|
||||||
"PSUL_Temp2"
|
|
||||||
],
|
|
||||||
"output_translator": "float(0 if '{0}'.split()[-9]=='na' else '{0}'.split()[-9])"
|
|
||||||
},
|
|
||||||
"get_presence": {
|
|
||||||
"output_source": "ipmitool",
|
|
||||||
"command": "ipmitool raw 0x3a 0x0c 0x00 0x2 0x60",
|
|
||||||
"output_translator": [
|
|
||||||
"True if (int('{}', 16) >> 4 & 1) == 0 else False",
|
|
||||||
"True if (int('{}', 16) >> 5 & 1) == 0 else False"
|
|
||||||
]
|
|
||||||
},
|
|
||||||
"get_model": {
|
|
||||||
"output_source": "ipmitool",
|
|
||||||
"command": "ipmitool fru list {} | grep 'Product Part Number'",
|
|
||||||
"argument": [
|
|
||||||
"4",
|
|
||||||
"3"
|
|
||||||
],
|
|
||||||
"output_translator": "'{}'.split()[-1]"
|
|
||||||
},
|
|
||||||
"get_serial": {
|
|
||||||
"output_source": "ipmitool",
|
|
||||||
"command": "ipmitool fru list {} | grep 'Product Serial'",
|
|
||||||
"argument": [
|
|
||||||
"4",
|
|
||||||
"3"
|
|
||||||
],
|
|
||||||
"output_translator": "'{}'.split()[-1]"
|
|
||||||
},
|
|
||||||
"get_powergood_status": {
|
|
||||||
"output_source": "ipmitool",
|
|
||||||
"command": "ipmitool raw 0x3a 0x0c 0x0 0x2 0x60",
|
|
||||||
"output_translator": [
|
|
||||||
"True if (int('{}', 16) >> 2 & 1) == 1 else False",
|
|
||||||
"True if (int('{}', 16) >> 3 & 1) == 1 else False"
|
|
||||||
]
|
|
||||||
},
|
|
||||||
"set_status_led": {
|
|
||||||
"set_method": "ipmitool",
|
|
||||||
"avaliable_input": [
|
|
||||||
"amber"
|
|
||||||
],
|
|
||||||
"input_translator": {
|
|
||||||
"amber": "0x1"
|
|
||||||
},
|
|
||||||
"command": "ipmitool raw 0x3a 0x0a {}",
|
|
||||||
"argument": [
|
|
||||||
"0x3 {}",
|
|
||||||
"0x2 {}"
|
|
||||||
]
|
|
||||||
},
|
|
||||||
"get_status_led": {
|
|
||||||
"output_source": "ipmitool",
|
|
||||||
"command": "ipmitool raw 0x3a 0x0b {}",
|
|
||||||
"argument": [
|
|
||||||
"0x3",
|
|
||||||
"0x2"
|
|
||||||
],
|
|
||||||
"output_translator": {
|
|
||||||
"00": "green",
|
|
||||||
"01": "amber"
|
|
||||||
},
|
|
||||||
"default_output": "off"
|
|
||||||
},
|
|
||||||
"get_temperature": {
|
|
||||||
"output_source": "ipmitool",
|
|
||||||
"command": "ipmitool sdr | grep {}",
|
|
||||||
"argument": [
|
|
||||||
"PSUR_Temp2",
|
|
||||||
"PSUL_Temp2"
|
|
||||||
],
|
|
||||||
"output_translator": "float('{}'.split()[2])"
|
|
||||||
},
|
|
||||||
"get_temperature_high_threshold": {
|
|
||||||
"output_source": "ipmitool",
|
|
||||||
"command": "ipmitool sensor list | grep {}",
|
|
||||||
"argument": [
|
|
||||||
"PSUR_Temp2",
|
|
||||||
"PSUL_Temp2"
|
|
||||||
],
|
|
||||||
"output_translator": "float(0 if '{0}'.split()[-3]=='na' else '{0}'.split()[-3])"
|
|
||||||
}
|
|
||||||
}
|
|
@ -1,143 +0,0 @@
|
|||||||
{
|
|
||||||
"port_num": 33,
|
|
||||||
"eeprom_path": "/sys/bus/i2c/devices/i2c-{0}/{0}-0050/eeprom",
|
|
||||||
"port_i2c_mapping": [
|
|
||||||
2,
|
|
||||||
3,
|
|
||||||
4,
|
|
||||||
5,
|
|
||||||
6,
|
|
||||||
7,
|
|
||||||
8,
|
|
||||||
9,
|
|
||||||
10,
|
|
||||||
11,
|
|
||||||
12,
|
|
||||||
13,
|
|
||||||
14,
|
|
||||||
15,
|
|
||||||
16,
|
|
||||||
17,
|
|
||||||
18,
|
|
||||||
19,
|
|
||||||
20,
|
|
||||||
21,
|
|
||||||
22,
|
|
||||||
23,
|
|
||||||
24,
|
|
||||||
25,
|
|
||||||
26,
|
|
||||||
27,
|
|
||||||
28,
|
|
||||||
29,
|
|
||||||
30,
|
|
||||||
31,
|
|
||||||
32,
|
|
||||||
33,
|
|
||||||
34
|
|
||||||
],
|
|
||||||
"get_presence": {
|
|
||||||
"output_source": "sysfs_value",
|
|
||||||
"sysfs_path": "/sys/devices/platform/switchboard/SFF/{}",
|
|
||||||
"argument": "$ref:_presence_file",
|
|
||||||
"output_translator": "False if '{}' == '1' else True"
|
|
||||||
},
|
|
||||||
"get_lpmode": {
|
|
||||||
"output_source": "sysfs_value",
|
|
||||||
"sysfs_path": "/sys/devices/platform/switchboard/SFF/{}/qsfp_lpmode",
|
|
||||||
"argument": "$ref:_port_name",
|
|
||||||
"output_translator": "True if '{}' == '1' else False"
|
|
||||||
},
|
|
||||||
"get_reset_status": {
|
|
||||||
"output_source": "sysfs_value",
|
|
||||||
"sysfs_path": "/sys/devices/platform/switchboard/SFF/{}/qsfp_reset",
|
|
||||||
"argument": "$ref:_port_name",
|
|
||||||
"output_translator": "False if '{}' == '1' else True"
|
|
||||||
},
|
|
||||||
"reset": {
|
|
||||||
"set_method": "sysfs_value",
|
|
||||||
"write_offset": 0,
|
|
||||||
"sysfs_path": "/sys/devices/platform/switchboard/SFF/{}/qsfp_reset",
|
|
||||||
"argument": "$ref:_port_name"
|
|
||||||
},
|
|
||||||
"set_lpmode": {
|
|
||||||
"set_method": "sysfs_value",
|
|
||||||
"input_translator": {
|
|
||||||
"True": "0x1",
|
|
||||||
"False": "0x0"
|
|
||||||
},
|
|
||||||
"write_offset": 0,
|
|
||||||
"sysfs_path": "/sys/devices/platform/switchboard/SFF/{}/qsfp_lpmode",
|
|
||||||
"argument": "$ref:_port_name"
|
|
||||||
},
|
|
||||||
"_port_name": [
|
|
||||||
"QSFP1",
|
|
||||||
"QSFP2",
|
|
||||||
"QSFP3",
|
|
||||||
"QSFP4",
|
|
||||||
"QSFP5",
|
|
||||||
"QSFP6",
|
|
||||||
"QSFP7",
|
|
||||||
"QSFP8",
|
|
||||||
"QSFP9",
|
|
||||||
"QSFP10",
|
|
||||||
"QSFP11",
|
|
||||||
"QSFP12",
|
|
||||||
"QSFP13",
|
|
||||||
"QSFP14",
|
|
||||||
"QSFP15",
|
|
||||||
"QSFP16",
|
|
||||||
"QSFP17",
|
|
||||||
"QSFP18",
|
|
||||||
"QSFP19",
|
|
||||||
"QSFP20",
|
|
||||||
"QSFP21",
|
|
||||||
"QSFP22",
|
|
||||||
"QSFP23",
|
|
||||||
"QSFP24",
|
|
||||||
"QSFP25",
|
|
||||||
"QSFP26",
|
|
||||||
"QSFP27",
|
|
||||||
"QSFP28",
|
|
||||||
"QSFP29",
|
|
||||||
"QSFP30",
|
|
||||||
"QSFP31",
|
|
||||||
"QSFP32",
|
|
||||||
"SFP1"
|
|
||||||
],
|
|
||||||
"_presence_file": [
|
|
||||||
"QSFP1/qsfp_modprs",
|
|
||||||
"QSFP2/qsfp_modprs",
|
|
||||||
"QSFP3/qsfp_modprs",
|
|
||||||
"QSFP4/qsfp_modprs",
|
|
||||||
"QSFP5/qsfp_modprs",
|
|
||||||
"QSFP6/qsfp_modprs",
|
|
||||||
"QSFP7/qsfp_modprs",
|
|
||||||
"QSFP8/qsfp_modprs",
|
|
||||||
"QSFP9/qsfp_modprs",
|
|
||||||
"QSFP10/qsfp_modprs",
|
|
||||||
"QSFP11/qsfp_modprs",
|
|
||||||
"QSFP12/qsfp_modprs",
|
|
||||||
"QSFP13/qsfp_modprs",
|
|
||||||
"QSFP14/qsfp_modprs",
|
|
||||||
"QSFP15/qsfp_modprs",
|
|
||||||
"QSFP16/qsfp_modprs",
|
|
||||||
"QSFP17/qsfp_modprs",
|
|
||||||
"QSFP18/qsfp_modprs",
|
|
||||||
"QSFP19/qsfp_modprs",
|
|
||||||
"QSFP20/qsfp_modprs",
|
|
||||||
"QSFP21/qsfp_modprs",
|
|
||||||
"QSFP22/qsfp_modprs",
|
|
||||||
"QSFP23/qsfp_modprs",
|
|
||||||
"QSFP24/qsfp_modprs",
|
|
||||||
"QSFP25/qsfp_modprs",
|
|
||||||
"QSFP26/qsfp_modprs",
|
|
||||||
"QSFP27/qsfp_modprs",
|
|
||||||
"QSFP28/qsfp_modprs",
|
|
||||||
"QSFP29/qsfp_modprs",
|
|
||||||
"QSFP30/qsfp_modprs",
|
|
||||||
"QSFP31/qsfp_modprs",
|
|
||||||
"QSFP32/qsfp_modprs",
|
|
||||||
"SFP1/sfp_modabs"
|
|
||||||
]
|
|
||||||
}
|
|
@ -1,105 +0,0 @@
|
|||||||
{
|
|
||||||
"thermal_num": 9,
|
|
||||||
"get_name": {
|
|
||||||
"output_source": "value_list",
|
|
||||||
"value_list": [
|
|
||||||
"Base_Temp_U5",
|
|
||||||
"Base_Temp_U7",
|
|
||||||
"CPU_Temp",
|
|
||||||
"Switch_Temp_U1",
|
|
||||||
"Switch_Temp_U18",
|
|
||||||
"Switch_Temp_U28",
|
|
||||||
"Switch_Temp_U29",
|
|
||||||
"Switch_U21_Temp",
|
|
||||||
"Switch_U33_Temp"
|
|
||||||
]
|
|
||||||
},
|
|
||||||
"get_temperature": {
|
|
||||||
"output_source": "ipmitool",
|
|
||||||
"command": "ipmitool raw 0x04 0x2D {}",
|
|
||||||
"argument": [
|
|
||||||
"0x1",
|
|
||||||
"0x2",
|
|
||||||
"0x7",
|
|
||||||
"0x3",
|
|
||||||
"0x4",
|
|
||||||
"0x5",
|
|
||||||
"0x6",
|
|
||||||
"0x56",
|
|
||||||
"0x4C"
|
|
||||||
],
|
|
||||||
"output_translator": "int('{}'.split()[0],16)"
|
|
||||||
},
|
|
||||||
"get_high_threshold": {
|
|
||||||
"output_source": "ipmitool",
|
|
||||||
"command": "ipmitool raw 0x04 0x27 {}",
|
|
||||||
"argument": [
|
|
||||||
"0x1",
|
|
||||||
"0x2",
|
|
||||||
"0x7",
|
|
||||||
"0x3",
|
|
||||||
"0x4",
|
|
||||||
"0x5",
|
|
||||||
"0x6",
|
|
||||||
"0x56",
|
|
||||||
"0x4c"
|
|
||||||
],
|
|
||||||
"output_translator": "int('{}'.split()[4], 16)"
|
|
||||||
},
|
|
||||||
"get_low_threshold": {
|
|
||||||
"output_source": "value",
|
|
||||||
"value": "N/A"
|
|
||||||
},
|
|
||||||
"set_high_threshold": {
|
|
||||||
"set_method": "ipmitool",
|
|
||||||
"command": "ipmitool sensor thresh {}",
|
|
||||||
"input_translator": "{}",
|
|
||||||
"argument": [
|
|
||||||
"Base_Temp_U5 unc {}",
|
|
||||||
"Base_Temp_U7 unc {}",
|
|
||||||
"CPU_Temp unc {}",
|
|
||||||
"Switch_Temp_U1 unc {}",
|
|
||||||
"Switch_Temp_U18 unc {}",
|
|
||||||
"Switch_Temp_U28 unc {}",
|
|
||||||
"Switch_Temp_U29 unc {}",
|
|
||||||
"Switch_U21_Temp unc {}",
|
|
||||||
"Switch_U33_Temp unc {}"
|
|
||||||
]
|
|
||||||
},
|
|
||||||
"set_low_threshold": {
|
|
||||||
"output_source": "ipmitool",
|
|
||||||
"command": "ipmitool sensor thresh {}",
|
|
||||||
"input_translator": "{}",
|
|
||||||
"argument": [
|
|
||||||
"Base_Temp_U5 lnc {}",
|
|
||||||
"Base_Temp_U7 lnc {}",
|
|
||||||
"CPU_Temp lnc {}",
|
|
||||||
"Switch_Temp_U1 lnc {}",
|
|
||||||
"Switch_Temp_U18 lnc {}",
|
|
||||||
"Switch_Temp_U28 lnc {}",
|
|
||||||
"Switch_Temp_U29 lnc {}",
|
|
||||||
"Switch_U21_Temp lnc {}",
|
|
||||||
"Switch_U33_Temp lnc {}"
|
|
||||||
]
|
|
||||||
},
|
|
||||||
"get_high_critical_threshold": {
|
|
||||||
"output_source": "ipmitool",
|
|
||||||
"command": "ipmitool raw 0x04 0x27 {}",
|
|
||||||
"argument": [
|
|
||||||
"0x1",
|
|
||||||
"0x2",
|
|
||||||
"0x7",
|
|
||||||
"0x3",
|
|
||||||
"0x4",
|
|
||||||
"0x5",
|
|
||||||
"0x6",
|
|
||||||
"0x56",
|
|
||||||
"0x4c"
|
|
||||||
],
|
|
||||||
"output_translator": "int('{}'.split()[5], 16)"
|
|
||||||
},
|
|
||||||
"get_low_critical_threshold": {
|
|
||||||
"output_source": "value",
|
|
||||||
"value": "N/A"
|
|
||||||
}
|
|
||||||
}
|
|
@ -1,191 +0,0 @@
|
|||||||
#############################################################################
|
|
||||||
# Celestica Seastone2
|
|
||||||
#
|
|
||||||
# Watchdog contains an implementation of SONiC Platform Base API
|
|
||||||
#
|
|
||||||
#############################################################################
|
|
||||||
import os
|
|
||||||
import time
|
|
||||||
|
|
||||||
try:
|
|
||||||
from sonic_platform_base.watchdog_base import WatchdogBase
|
|
||||||
from sonic_platform.common import Common
|
|
||||||
except ImportError as e:
|
|
||||||
raise ImportError(str(e) + "- required module not found")
|
|
||||||
|
|
||||||
PLATFORM_CPLD_PATH = '/sys/devices/platform/baseboard/'
|
|
||||||
GETREG_FILE = 'getreg'
|
|
||||||
SETREG_FILE = 'setreg'
|
|
||||||
WDT_ENABLE_REG = '0xA181'
|
|
||||||
WDT_TIMER_L_BIT_REG = '0xA182'
|
|
||||||
WDT_TIMER_M_BIT_REG = '0xA183'
|
|
||||||
WDT_TIMER_H_BIT_REG = '0xA184'
|
|
||||||
WDT_KEEP_ALVIVE_REG = '0xA185'
|
|
||||||
ENABLE_CMD = '0x1'
|
|
||||||
DISABLE_CMD = '0x0'
|
|
||||||
WDT_COMMON_ERROR = -1
|
|
||||||
|
|
||||||
|
|
||||||
class Watchdog(WatchdogBase):
|
|
||||||
|
|
||||||
def __init__(self):
|
|
||||||
WatchdogBase.__init__(self)
|
|
||||||
|
|
||||||
self._api_common = Common()
|
|
||||||
|
|
||||||
# Init cpld reg path
|
|
||||||
self.setreg_path = os.path.join(PLATFORM_CPLD_PATH, SETREG_FILE)
|
|
||||||
self.getreg_path = os.path.join(PLATFORM_CPLD_PATH, GETREG_FILE)
|
|
||||||
|
|
||||||
# Set default value
|
|
||||||
self._disable()
|
|
||||||
self.armed = False
|
|
||||||
self.timeout = self._gettimeout()
|
|
||||||
|
|
||||||
def _enable(self):
|
|
||||||
"""
|
|
||||||
Turn on the watchdog timer
|
|
||||||
"""
|
|
||||||
# echo 0xA181 0x1 > /sys/devices/platform/baseboard/setreg
|
|
||||||
enable_val = '{} {}'.format(WDT_ENABLE_REG, ENABLE_CMD)
|
|
||||||
return self._api_common.write_txt_file(self.setreg_path, enable_val)
|
|
||||||
|
|
||||||
def _disable(self):
|
|
||||||
"""
|
|
||||||
Turn off the watchdog timer
|
|
||||||
"""
|
|
||||||
# echo 0xA181 0x0 > /sys/devices/platform/baseboard/setreg
|
|
||||||
disable_val = '{} {}'.format(WDT_ENABLE_REG, DISABLE_CMD)
|
|
||||||
return self._api_common.write_txt_file(self.setreg_path, disable_val)
|
|
||||||
|
|
||||||
def _keepalive(self):
|
|
||||||
"""
|
|
||||||
Keep alive watchdog timer
|
|
||||||
"""
|
|
||||||
# echo 0xA185 0x1 > /sys/devices/platform/baseboard/setreg
|
|
||||||
enable_val = '{} {}'.format(WDT_KEEP_ALVIVE_REG, ENABLE_CMD)
|
|
||||||
return self._api_common.write_txt_file(self.setreg_path, enable_val)
|
|
||||||
|
|
||||||
def _get_level_hex(self, sub_hex):
|
|
||||||
sub_hex_str = sub_hex.replace("x", "0")
|
|
||||||
return hex(int(sub_hex_str, 16))
|
|
||||||
|
|
||||||
def _seconds_to_lmh_hex(self, seconds):
|
|
||||||
ms = seconds*1000 # calculate timeout in ms format
|
|
||||||
hex_str = hex(ms)
|
|
||||||
l = self._get_level_hex(hex_str[-2:])
|
|
||||||
m = self._get_level_hex(hex_str[-4:-2])
|
|
||||||
h = self._get_level_hex(hex_str[-6:-4])
|
|
||||||
return (l, m, h)
|
|
||||||
|
|
||||||
def _settimeout(self, seconds):
|
|
||||||
"""
|
|
||||||
Set watchdog timer timeout
|
|
||||||
@param seconds - timeout in seconds
|
|
||||||
@return is the actual set timeout
|
|
||||||
"""
|
|
||||||
# max = 0xffffff = 16777.215 seconds
|
|
||||||
|
|
||||||
(l, m, h) = self._seconds_to_lmh_hex(seconds)
|
|
||||||
set_h_val = '{} {}'.format(WDT_TIMER_H_BIT_REG, h)
|
|
||||||
set_m_val = '{} {}'.format(WDT_TIMER_M_BIT_REG, m)
|
|
||||||
set_l_val = '{} {}'.format(WDT_TIMER_L_BIT_REG, l)
|
|
||||||
|
|
||||||
self._api_common.write_txt_file(
|
|
||||||
self.setreg_path, set_h_val) # set high bit
|
|
||||||
self._api_common.write_txt_file(
|
|
||||||
self.setreg_path, set_m_val) # set med bit
|
|
||||||
self._api_common.write_txt_file(
|
|
||||||
self.setreg_path, set_l_val) # set low bit
|
|
||||||
|
|
||||||
return seconds
|
|
||||||
|
|
||||||
def _gettimeout(self):
|
|
||||||
"""
|
|
||||||
Get watchdog timeout
|
|
||||||
@return watchdog timeout
|
|
||||||
"""
|
|
||||||
|
|
||||||
h_bit = self._api_common.get_reg(
|
|
||||||
self.getreg_path, WDT_TIMER_H_BIT_REG)
|
|
||||||
m_bit = self._api_common.get_reg(
|
|
||||||
self.getreg_path, WDT_TIMER_M_BIT_REG)
|
|
||||||
l_bit = self._api_common.get_reg(
|
|
||||||
self.getreg_path, WDT_TIMER_L_BIT_REG)
|
|
||||||
|
|
||||||
hex_time = '0x{}{}{}'.format(h_bit[2:], m_bit[2:], l_bit[2:])
|
|
||||||
ms = int(hex_time, 16)
|
|
||||||
return int(float(ms)/1000)
|
|
||||||
|
|
||||||
#################################################################
|
|
||||||
|
|
||||||
def arm(self, seconds):
|
|
||||||
"""
|
|
||||||
Arm the hardware watchdog with a timeout of <seconds> seconds.
|
|
||||||
If the watchdog is currently armed, calling this function will
|
|
||||||
simply reset the timer to the provided value. If the underlying
|
|
||||||
hardware does not support the value provided in <seconds>, this
|
|
||||||
method should arm the watchdog with the *next greater* available
|
|
||||||
value.
|
|
||||||
Returns:
|
|
||||||
An integer specifying the *actual* number of seconds the watchdog
|
|
||||||
was armed with. On failure returns -1.
|
|
||||||
"""
|
|
||||||
|
|
||||||
ret = WDT_COMMON_ERROR
|
|
||||||
if seconds < 0:
|
|
||||||
return ret
|
|
||||||
|
|
||||||
try:
|
|
||||||
if self.timeout != seconds:
|
|
||||||
self.timeout = self._settimeout(seconds)
|
|
||||||
|
|
||||||
if self.armed:
|
|
||||||
self._keepalive()
|
|
||||||
else:
|
|
||||||
self._enable()
|
|
||||||
self.armed = True
|
|
||||||
|
|
||||||
ret = self.timeout
|
|
||||||
self.arm_timestamp = time.time()
|
|
||||||
except IOError as e:
|
|
||||||
pass
|
|
||||||
|
|
||||||
return ret
|
|
||||||
|
|
||||||
def disarm(self):
|
|
||||||
"""
|
|
||||||
Disarm the hardware watchdog
|
|
||||||
Returns:
|
|
||||||
A boolean, True if watchdog is disarmed successfully, False if not
|
|
||||||
"""
|
|
||||||
disarmed = False
|
|
||||||
if self.is_armed():
|
|
||||||
try:
|
|
||||||
self._disable()
|
|
||||||
self.armed = False
|
|
||||||
disarmed = True
|
|
||||||
except IOError:
|
|
||||||
pass
|
|
||||||
|
|
||||||
return disarmed
|
|
||||||
|
|
||||||
def is_armed(self):
|
|
||||||
"""
|
|
||||||
Retrieves the armed state of the hardware watchdog.
|
|
||||||
Returns:
|
|
||||||
A boolean, True if watchdog is armed, False if not
|
|
||||||
"""
|
|
||||||
|
|
||||||
return self.armed
|
|
||||||
|
|
||||||
def get_remaining_time(self):
|
|
||||||
"""
|
|
||||||
If the watchdog is armed, retrieve the number of seconds remaining on
|
|
||||||
the watchdog timer
|
|
||||||
Returns:
|
|
||||||
An integer specifying the number of seconds remaining on thei
|
|
||||||
watchdog timer. If the watchdog is not armed, returns -1.
|
|
||||||
"""
|
|
||||||
|
|
||||||
return int(self.timeout - (time.time() - self.arm_timestamp)) if self.armed else WDT_COMMON_ERROR
|
|
@ -0,0 +1,13 @@
|
|||||||
|
{
|
||||||
|
"services_to_ignore": [],
|
||||||
|
"devices_to_ignore": [
|
||||||
|
"psu.temperature"
|
||||||
|
],
|
||||||
|
"user_defined_checkers": [],
|
||||||
|
"polling_interval": 60,
|
||||||
|
"led_color": {
|
||||||
|
"fault": "amber",
|
||||||
|
"normal": "green",
|
||||||
|
"booting": "green_blink_1hz"
|
||||||
|
}
|
||||||
|
}
|
4
device/celestica/x86_64-cel_seastone_2-r0/warm-reboot_plugin
Executable file
4
device/celestica/x86_64-cel_seastone_2-r0/warm-reboot_plugin
Executable file
@ -0,0 +1,4 @@
|
|||||||
|
#!/bin/bash
|
||||||
|
|
||||||
|
# Set all LEDs to BMC's control
|
||||||
|
ipmitool raw 0x3a 0x0f 0x02 0x01 &> /dev/null
|
@ -9,10 +9,6 @@ phy_enable=0
|
|||||||
phy_null=1
|
phy_null=1
|
||||||
pll_bypass=1
|
pll_bypass=1
|
||||||
|
|
||||||
init_all_modules=0
|
|
||||||
|
|
||||||
sai_tunnel_global_sip_mask_enable=1
|
|
||||||
|
|
||||||
portmap_20=33:100:2
|
portmap_20=33:100:2
|
||||||
portmap_21=35:100:2
|
portmap_21=35:100:2
|
||||||
portmap_22=37:100:2
|
portmap_22=37:100:2
|
||||||
|
@ -0,0 +1,164 @@
|
|||||||
|
{
|
||||||
|
"interfaces": {
|
||||||
|
"Ethernet0": {
|
||||||
|
"default_brkout_mode": "1x400G",
|
||||||
|
"autoneg": "off",
|
||||||
|
"fec": "rs"
|
||||||
|
},
|
||||||
|
"Ethernet8": {
|
||||||
|
"default_brkout_mode": "1x400G",
|
||||||
|
"autoneg": "off",
|
||||||
|
"fec": "rs"
|
||||||
|
},
|
||||||
|
"Ethernet16": {
|
||||||
|
"default_brkout_mode": "1x400G",
|
||||||
|
"autoneg": "off",
|
||||||
|
"fec": "rs"
|
||||||
|
},
|
||||||
|
"Ethernet24": {
|
||||||
|
"default_brkout_mode": "1x400G",
|
||||||
|
"autoneg": "off",
|
||||||
|
"fec": "rs"
|
||||||
|
},
|
||||||
|
"Ethernet32": {
|
||||||
|
"default_brkout_mode": "1x400G",
|
||||||
|
"autoneg": "off",
|
||||||
|
"fec": "rs"
|
||||||
|
},
|
||||||
|
"Ethernet40": {
|
||||||
|
"default_brkout_mode": "1x400G",
|
||||||
|
"autoneg": "off",
|
||||||
|
"fec": "rs"
|
||||||
|
},
|
||||||
|
"Ethernet48": {
|
||||||
|
"default_brkout_mode": "1x400G",
|
||||||
|
"autoneg": "off",
|
||||||
|
"fec": "rs"
|
||||||
|
},
|
||||||
|
"Ethernet56": {
|
||||||
|
"default_brkout_mode": "1x400G",
|
||||||
|
"autoneg": "off",
|
||||||
|
"fec": "rs"
|
||||||
|
},
|
||||||
|
"Ethernet64": {
|
||||||
|
"default_brkout_mode": "1x400G",
|
||||||
|
"autoneg": "off",
|
||||||
|
"fec": "rs"
|
||||||
|
},
|
||||||
|
"Ethernet72": {
|
||||||
|
"default_brkout_mode": "1x400G",
|
||||||
|
"autoneg": "off",
|
||||||
|
"fec": "rs"
|
||||||
|
},
|
||||||
|
"Ethernet80": {
|
||||||
|
"default_brkout_mode": "1x400G",
|
||||||
|
"autoneg": "off",
|
||||||
|
"fec": "rs"
|
||||||
|
},
|
||||||
|
"Ethernet88": {
|
||||||
|
"default_brkout_mode": "1x400G",
|
||||||
|
"autoneg": "off",
|
||||||
|
"fec": "rs"
|
||||||
|
},
|
||||||
|
"Ethernet96": {
|
||||||
|
"default_brkout_mode": "1x400G",
|
||||||
|
"autoneg": "off",
|
||||||
|
"fec": "rs"
|
||||||
|
},
|
||||||
|
"Ethernet104": {
|
||||||
|
"default_brkout_mode": "1x400G",
|
||||||
|
"autoneg": "off",
|
||||||
|
"fec": "rs"
|
||||||
|
},
|
||||||
|
"Ethernet112": {
|
||||||
|
"default_brkout_mode": "1x400G",
|
||||||
|
"autoneg": "off",
|
||||||
|
"fec": "rs"
|
||||||
|
},
|
||||||
|
"Ethernet120": {
|
||||||
|
"default_brkout_mode": "1x400G",
|
||||||
|
"autoneg": "off",
|
||||||
|
"fec": "rs"
|
||||||
|
},
|
||||||
|
"Ethernet128": {
|
||||||
|
"default_brkout_mode": "1x400G",
|
||||||
|
"autoneg": "off",
|
||||||
|
"fec": "rs"
|
||||||
|
},
|
||||||
|
"Ethernet136": {
|
||||||
|
"default_brkout_mode": "1x400G",
|
||||||
|
"autoneg": "off",
|
||||||
|
"fec": "rs"
|
||||||
|
},
|
||||||
|
"Ethernet144": {
|
||||||
|
"default_brkout_mode": "1x400G",
|
||||||
|
"autoneg": "off",
|
||||||
|
"fec": "rs"
|
||||||
|
},
|
||||||
|
"Ethernet152": {
|
||||||
|
"default_brkout_mode": "1x400G",
|
||||||
|
"autoneg": "off",
|
||||||
|
"fec": "rs"
|
||||||
|
},
|
||||||
|
"Ethernet160": {
|
||||||
|
"default_brkout_mode": "1x400G",
|
||||||
|
"autoneg": "off",
|
||||||
|
"fec": "rs"
|
||||||
|
},
|
||||||
|
"Ethernet168": {
|
||||||
|
"default_brkout_mode": "1x400G",
|
||||||
|
"autoneg": "off",
|
||||||
|
"fec": "rs"
|
||||||
|
},
|
||||||
|
"Ethernet176": {
|
||||||
|
"default_brkout_mode": "1x400G",
|
||||||
|
"autoneg": "off",
|
||||||
|
"fec": "rs"
|
||||||
|
},
|
||||||
|
"Ethernet184": {
|
||||||
|
"default_brkout_mode": "1x400G",
|
||||||
|
"autoneg": "off",
|
||||||
|
"fec": "rs"
|
||||||
|
},
|
||||||
|
"Ethernet192": {
|
||||||
|
"default_brkout_mode": "1x400G",
|
||||||
|
"autoneg": "off",
|
||||||
|
"fec": "rs"
|
||||||
|
},
|
||||||
|
"Ethernet200": {
|
||||||
|
"default_brkout_mode": "1x400G",
|
||||||
|
"autoneg": "off",
|
||||||
|
"fec": "rs"
|
||||||
|
},
|
||||||
|
"Ethernet208": {
|
||||||
|
"default_brkout_mode": "1x400G",
|
||||||
|
"autoneg": "off",
|
||||||
|
"fec": "rs"
|
||||||
|
},
|
||||||
|
"Ethernet216": {
|
||||||
|
"default_brkout_mode": "1x400G",
|
||||||
|
"autoneg": "off",
|
||||||
|
"fec": "rs"
|
||||||
|
},
|
||||||
|
"Ethernet224": {
|
||||||
|
"default_brkout_mode": "1x400G",
|
||||||
|
"autoneg": "off",
|
||||||
|
"fec": "rs"
|
||||||
|
},
|
||||||
|
"Ethernet232": {
|
||||||
|
"default_brkout_mode": "1x400G",
|
||||||
|
"autoneg": "off",
|
||||||
|
"fec": "rs"
|
||||||
|
},
|
||||||
|
"Ethernet240": {
|
||||||
|
"default_brkout_mode": "1x400G",
|
||||||
|
"autoneg": "off",
|
||||||
|
"fec": "rs"
|
||||||
|
},
|
||||||
|
"Ethernet248": {
|
||||||
|
"default_brkout_mode": "1x400G",
|
||||||
|
"autoneg": "off",
|
||||||
|
"fec": "rs"
|
||||||
|
}
|
||||||
|
}
|
||||||
|
}
|
@ -1,33 +1,33 @@
|
|||||||
# name lanes alias index speed
|
# name lanes alias index speed
|
||||||
Ethernet0 33,34,35,36,37,38,39,40 QSFPDD1 1 400000
|
Ethernet0 33,34,35,36,37,38,39,40 Eth1/1 1 400000
|
||||||
Ethernet4 41,42,43,44,45,46,47,48 QSFPDD2 2 400000
|
Ethernet8 41,42,43,44,45,46,47,48 Eth2/1 2 400000
|
||||||
Ethernet8 49,50,51,52,53,54,55,56 QSFPDD3 3 400000
|
Ethernet16 49,50,51,52,53,54,55,56 Eth3/1 3 400000
|
||||||
Ethernet12 57,58,59,60,61,62,63,64 QSFPDD4 4 400000
|
Ethernet24 57,58,59,60,61,62,63,64 Eth4/1 4 400000
|
||||||
Ethernet16 65,66,67,68,69,70,71,72 QSFPDD5 5 400000
|
Ethernet32 65,66,67,68,69,70,71,72 Eth5/1 5 400000
|
||||||
Ethernet20 73,74,75,76,77,78,79,80 QSFPDD6 6 400000
|
Ethernet40 73,74,75,76,77,78,79,80 Eth6/1 6 400000
|
||||||
Ethernet24 81,82,83,84,85,86,87,88 QSFPDD7 7 400000
|
Ethernet48 81,82,83,84,85,86,87,88 Eth7/1 7 400000
|
||||||
Ethernet28 89,90,91,92,93,94,95,96 QSFPDD8 8 400000
|
Ethernet56 89,90,91,92,93,94,95,96 Eth8/1 8 400000
|
||||||
Ethernet32 1,2,3,4,5,6,7,8 QSFPDD9 9 400000
|
Ethernet64 1,2,3,4,5,6,7,8 Eth9/1 9 400000
|
||||||
Ethernet36 9,10,11,12,13,14,15,16 QSFPDD10 10 400000
|
Ethernet72 9,10,11,12,13,14,15,16 Eth10/1 10 400000
|
||||||
Ethernet40 17,18,19,20,21,22,23,24 QSFPDD11 11 400000
|
Ethernet80 17,18,19,20,21,22,23,24 Eth11/1 11 400000
|
||||||
Ethernet44 25,26,27,28,29,30,31,32 QSFPDD12 12 400000
|
Ethernet88 25,26,27,28,29,30,31,32 Eth12/1 12 400000
|
||||||
Ethernet48 97,98,99,100,101,102,103,104 QSFPDD13 13 400000
|
Ethernet96 97,98,99,100,101,102,103,104 Eth13/1 13 400000
|
||||||
Ethernet52 105,106,107,108,109,110,111,112 QSFPDD14 14 400000
|
Ethernet104 105,106,107,108,109,110,111,112 Eth14/1 14 400000
|
||||||
Ethernet56 113,114,115,116,117,118,119,120 QSFPDD15 15 400000
|
Ethernet112 113,114,115,116,117,118,119,120 Eth15/1 15 400000
|
||||||
Ethernet60 121,122,123,124,125,126,127,128 QSFPDD16 16 400000
|
Ethernet120 121,122,123,124,125,126,127,128 Eth16/1 16 400000
|
||||||
Ethernet64 129,130,131,132,133,134,135,136 QSFPDD17 17 400000
|
Ethernet128 129,130,131,132,133,134,135,136 Eth17/1 17 400000
|
||||||
Ethernet68 137,138,139,140,141,142,143,144 QSFPDD18 18 400000
|
Ethernet136 137,138,139,140,141,142,143,144 Eth18/1 18 400000
|
||||||
Ethernet72 145,146,147,148,149,150,151,152 QSFPDD19 19 400000
|
Ethernet144 145,146,147,148,149,150,151,152 Eth19/1 19 400000
|
||||||
Ethernet76 153,154,155,156,157,158,159,160 QSFPDD20 20 400000
|
Ethernet152 153,154,155,156,157,158,159,160 Eth20/1 20 400000
|
||||||
Ethernet80 225,226,227,228,229,230,231,232 QSFPDD21 21 400000
|
Ethernet160 225,226,227,228,229,230,231,232 Eth21/1 21 400000
|
||||||
Ethernet84 233,234,235,236,237,238,239,240 QSFPDD22 22 400000
|
Ethernet168 233,234,235,236,237,238,239,240 Eth22/1 22 400000
|
||||||
Ethernet88 241,242,243,244,245,246,247,248 QSFPDD23 23 400000
|
Ethernet176 241,242,243,244,245,246,247,248 Eth23/1 23 400000
|
||||||
Ethernet92 249,250,251,252,253,254,255,256 QSFPDD24 24 400000
|
Ethernet184 249,250,251,252,253,254,255,256 Eth24/1 24 400000
|
||||||
Ethernet96 161,162,163,164,165,166,167,168 QSFPDD25 25 400000
|
Ethernet192 161,162,163,164,165,166,167,168 Eth25/1 25 400000
|
||||||
Ethernet100 169,170,171,172,173,174,175,176 QSFPDD26 26 400000
|
Ethernet200 169,170,171,172,173,174,175,176 Eth26/1 26 400000
|
||||||
Ethernet104 177,178,179,180,181,182,183,184 QSFPDD27 27 400000
|
Ethernet208 177,178,179,180,181,182,183,184 Eth27/1 27 400000
|
||||||
Ethernet108 185,186,187,188,189,190,191,192 QSFPDD28 28 400000
|
Ethernet216 185,186,187,188,189,190,191,192 Eth28/1 28 400000
|
||||||
Ethernet112 193,194,195,196,197,198,199,200 QSFPDD29 29 400000
|
Ethernet224 193,194,195,196,197,198,199,200 Eth29/1 29 400000
|
||||||
Ethernet116 201,202,203,204,205,206,207,208 QSFPDD30 30 400000
|
Ethernet232 201,202,203,204,205,206,207,208 Eth30/1 30 400000
|
||||||
Ethernet120 209,210,211,212,213,214,215,216 QSFPDD31 31 400000
|
Ethernet240 209,210,211,212,213,214,215,216 Eth31/1 31 400000
|
||||||
Ethernet124 217,218,219,220,221,222,223,224 QSFPDD32 32 400000
|
Ethernet248 217,218,219,220,221,222,223,224 Eth32/1 32 400000
|
||||||
|
@ -1,5 +1,5 @@
|
|||||||
|
|
||||||
pbmp_xport_xe.0=0x8111181111c1111811118111181111c111182222
|
pbmp_xport_xe.0=0x8ffff8ffffcffff8ffff8ffff8ffffcffff8ffff
|
||||||
ccm_dma_enable=0
|
ccm_dma_enable=0
|
||||||
ccmdma_intr_enable=0
|
ccmdma_intr_enable=0
|
||||||
ctr_evict_enable=0
|
ctr_evict_enable=0
|
||||||
@ -10,8 +10,6 @@ phy_enable=0
|
|||||||
phy_null=1
|
phy_null=1
|
||||||
pll_bypass=1
|
pll_bypass=1
|
||||||
|
|
||||||
init_all_modules=0
|
|
||||||
|
|
||||||
sai_tunnel_global_sip_mask_enable=1
|
sai_tunnel_global_sip_mask_enable=1
|
||||||
|
|
||||||
|
|
||||||
@ -183,38 +181,38 @@ serdes_core_tx_polarity_flip_physical{209}=0xe9
|
|||||||
serdes_core_rx_polarity_flip_physical{217}=0xec
|
serdes_core_rx_polarity_flip_physical{217}=0xec
|
||||||
serdes_core_tx_polarity_flip_physical{217}=0x68
|
serdes_core_tx_polarity_flip_physical{217}=0x68
|
||||||
|
|
||||||
dport_map_port_20=1
|
#dport_map_port_20=1
|
||||||
dport_map_port_24=2
|
#dport_map_port_24=2
|
||||||
dport_map_port_28=3
|
#dport_map_port_28=3
|
||||||
dport_map_port_32=4
|
#dport_map_port_32=4
|
||||||
dport_map_port_40=5
|
#dport_map_port_40=5
|
||||||
dport_map_port_44=6
|
#dport_map_port_44=6
|
||||||
dport_map_port_48=7
|
#dport_map_port_48=7
|
||||||
dport_map_port_52=8
|
#dport_map_port_52=8
|
||||||
dport_map_port_1=9
|
#dport_map_port_1=9
|
||||||
dport_map_port_5=10
|
#dport_map_port_5=10
|
||||||
dport_map_port_9=11
|
#dport_map_port_9=11
|
||||||
dport_map_port_13=12
|
#dport_map_port_13=12
|
||||||
dport_map_port_60=13
|
#dport_map_port_60=13
|
||||||
dport_map_port_64=14
|
#dport_map_port_64=14
|
||||||
dport_map_port_68=15
|
#dport_map_port_68=15
|
||||||
dport_map_port_72=16
|
#dport_map_port_72=16
|
||||||
dport_map_port_80=17
|
#dport_map_port_80=17
|
||||||
dport_map_port_84=18
|
#dport_map_port_84=18
|
||||||
dport_map_port_88=19
|
#dport_map_port_88=19
|
||||||
dport_map_port_92=20
|
#dport_map_port_92=20
|
||||||
dport_map_port_140=21
|
#dport_map_port_140=21
|
||||||
dport_map_port_144=22
|
#dport_map_port_144=22
|
||||||
dport_map_port_148=23
|
#dport_map_port_148=23
|
||||||
dport_map_port_152=24
|
#dport_map_port_152=24
|
||||||
dport_map_port_100=25
|
#dport_map_port_100=25
|
||||||
dport_map_port_104=26
|
#dport_map_port_104=26
|
||||||
dport_map_port_108=27
|
#dport_map_port_108=27
|
||||||
dport_map_port_112=28
|
#dport_map_port_112=28
|
||||||
dport_map_port_120=29
|
#dport_map_port_120=29
|
||||||
dport_map_port_124=30
|
#dport_map_port_124=30
|
||||||
dport_map_port_128=31
|
#dport_map_port_128=31
|
||||||
dport_map_port_132=32
|
#dport_map_port_132=32
|
||||||
|
|
||||||
#dport_map_port_38=33
|
#dport_map_port_38=33
|
||||||
#dport_map_port_118=34
|
#dport_map_port_118=34
|
||||||
|
434
device/celestica/x86_64-cel_silverstone-r0/pcie.yaml
Normal file
434
device/celestica/x86_64-cel_silverstone-r0/pcie.yaml
Normal file
@ -0,0 +1,434 @@
|
|||||||
|
- bus: '00'
|
||||||
|
dev: '00'
|
||||||
|
fn: '0'
|
||||||
|
id: 6f00
|
||||||
|
name: 'Host bridge: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon D DMI2
|
||||||
|
(rev 03)'
|
||||||
|
- bus: '00'
|
||||||
|
dev: '01'
|
||||||
|
fn: '0'
|
||||||
|
id: 6f02
|
||||||
|
name: 'PCI bridge: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon D PCI
|
||||||
|
Express Root Port 1 (rev 03)'
|
||||||
|
- bus: '00'
|
||||||
|
dev: '02'
|
||||||
|
fn: '0'
|
||||||
|
id: 6f04
|
||||||
|
name: 'PCI bridge: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon D PCI
|
||||||
|
Express Root Port 2 (rev 03)'
|
||||||
|
- bus: '00'
|
||||||
|
dev: '02'
|
||||||
|
fn: '2'
|
||||||
|
id: 6f06
|
||||||
|
name: 'PCI bridge: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon D PCI
|
||||||
|
Express Root Port 2 (rev 03)'
|
||||||
|
- bus: '00'
|
||||||
|
dev: '03'
|
||||||
|
fn: '0'
|
||||||
|
id: 6f08
|
||||||
|
name: 'PCI bridge: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon D PCI
|
||||||
|
Express Root Port 3 (rev 03)'
|
||||||
|
- bus: '00'
|
||||||
|
dev: '03'
|
||||||
|
fn: '1'
|
||||||
|
id: 6f09
|
||||||
|
name: 'PCI bridge: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon D PCI
|
||||||
|
Express Root Port 3 (rev 03)'
|
||||||
|
- bus: '00'
|
||||||
|
dev: '03'
|
||||||
|
fn: '2'
|
||||||
|
id: 6f0a
|
||||||
|
name: 'PCI bridge: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon D PCI
|
||||||
|
Express Root Port 3 (rev 03)'
|
||||||
|
- bus: '00'
|
||||||
|
dev: '03'
|
||||||
|
fn: '3'
|
||||||
|
id: 6f0b
|
||||||
|
name: 'PCI bridge: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon D PCI
|
||||||
|
Express Root Port 3 (rev 03)'
|
||||||
|
- bus: '00'
|
||||||
|
dev: '05'
|
||||||
|
fn: '0'
|
||||||
|
id: 6f28
|
||||||
|
name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
|
||||||
|
D Map/VTd_Misc/System Management (rev 03)'
|
||||||
|
- bus: '00'
|
||||||
|
dev: '05'
|
||||||
|
fn: '1'
|
||||||
|
id: 6f29
|
||||||
|
name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
|
||||||
|
D IIO Hot Plug (rev 03)'
|
||||||
|
- bus: '00'
|
||||||
|
dev: '05'
|
||||||
|
fn: '2'
|
||||||
|
id: 6f2a
|
||||||
|
name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
|
||||||
|
D IIO RAS/Control Status/Global Errors (rev 03)'
|
||||||
|
- bus: '00'
|
||||||
|
dev: '05'
|
||||||
|
fn: '4'
|
||||||
|
id: 6f2c
|
||||||
|
name: 'PIC: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon D I/O APIC (rev
|
||||||
|
03)'
|
||||||
|
- bus: '00'
|
||||||
|
dev: 1c
|
||||||
|
fn: '0'
|
||||||
|
id: 8c10
|
||||||
|
name: 'PCI bridge: Intel Corporation 8 Series/C220 Series Chipset Family PCI Express
|
||||||
|
Root Port #1 (rev d5)'
|
||||||
|
- bus: '00'
|
||||||
|
dev: 1c
|
||||||
|
fn: '1'
|
||||||
|
id: 8c12
|
||||||
|
name: 'PCI bridge: Intel Corporation 8 Series/C220 Series Chipset Family PCI Express
|
||||||
|
Root Port #2 (rev d5)'
|
||||||
|
- bus: '00'
|
||||||
|
dev: 1c
|
||||||
|
fn: '2'
|
||||||
|
id: 8c14
|
||||||
|
name: 'PCI bridge: Intel Corporation 8 Series/C220 Series Chipset Family PCI Express
|
||||||
|
Root Port #3 (rev d5)'
|
||||||
|
- bus: '00'
|
||||||
|
dev: 1d
|
||||||
|
fn: '0'
|
||||||
|
id: 8c26
|
||||||
|
name: 'USB controller: Intel Corporation 8 Series/C220 Series Chipset Family USB
|
||||||
|
EHCI #1 (rev 05)'
|
||||||
|
- bus: '00'
|
||||||
|
dev: 1f
|
||||||
|
fn: '0'
|
||||||
|
id: 8c54
|
||||||
|
name: 'ISA bridge: Intel Corporation C224 Series Chipset Family Server Standard
|
||||||
|
SKU LPC Controller (rev 05)'
|
||||||
|
- bus: '00'
|
||||||
|
dev: 1f
|
||||||
|
fn: '2'
|
||||||
|
id: 8c02
|
||||||
|
name: 'SATA controller: Intel Corporation 8 Series/C220 Series Chipset Family 6-port
|
||||||
|
SATA Controller 1 [AHCI mode] (rev 05)'
|
||||||
|
- bus: '00'
|
||||||
|
dev: 1f
|
||||||
|
fn: '3'
|
||||||
|
id: 8c22
|
||||||
|
name: 'SMBus: Intel Corporation 8 Series/C220 Series Chipset Family SMBus Controller
|
||||||
|
(rev 05)'
|
||||||
|
- bus: '02'
|
||||||
|
dev: '00'
|
||||||
|
fn: '0'
|
||||||
|
id: 6f50
|
||||||
|
name: 'System peripheral: Intel Corporation Xeon Processor D Family QuickData Technology
|
||||||
|
Register DMA Channel 0'
|
||||||
|
- bus: '02'
|
||||||
|
dev: '00'
|
||||||
|
fn: '1'
|
||||||
|
id: 6f51
|
||||||
|
name: 'System peripheral: Intel Corporation Xeon Processor D Family QuickData Technology
|
||||||
|
Register DMA Channel 1'
|
||||||
|
- bus: '02'
|
||||||
|
dev: '00'
|
||||||
|
fn: '2'
|
||||||
|
id: 6f52
|
||||||
|
name: 'System peripheral: Intel Corporation Xeon Processor D Family QuickData Technology
|
||||||
|
Register DMA Channel 2'
|
||||||
|
- bus: '02'
|
||||||
|
dev: '00'
|
||||||
|
fn: '3'
|
||||||
|
id: 6f53
|
||||||
|
name: 'System peripheral: Intel Corporation Xeon Processor D Family QuickData Technology
|
||||||
|
Register DMA Channel 3'
|
||||||
|
- bus: '03'
|
||||||
|
dev: '00'
|
||||||
|
fn: '0'
|
||||||
|
id: 15ab
|
||||||
|
name: 'Ethernet controller: Intel Corporation Ethernet Connection X552 10 GbE Backplane'
|
||||||
|
- bus: '03'
|
||||||
|
dev: '00'
|
||||||
|
fn: '1'
|
||||||
|
id: 15ab
|
||||||
|
name: 'Ethernet controller: Intel Corporation Ethernet Connection X552 10 GbE Backplane'
|
||||||
|
- bus: '05'
|
||||||
|
dev: '00'
|
||||||
|
fn: '0'
|
||||||
|
id: b980
|
||||||
|
name: 'Ethernet controller: Broadcom Inc. and subsidiaries Device b980 (rev 11)'
|
||||||
|
- bus: 09
|
||||||
|
dev: '00'
|
||||||
|
fn: '0'
|
||||||
|
id: '7021'
|
||||||
|
name: 'Memory controller: Xilinx Corporation Device 7021'
|
||||||
|
- bus: 0a
|
||||||
|
dev: '00'
|
||||||
|
fn: '0'
|
||||||
|
id: '1533'
|
||||||
|
name: 'Ethernet controller: Intel Corporation I210 Gigabit Network Connection (rev
|
||||||
|
03)'
|
||||||
|
- bus: 0b
|
||||||
|
dev: '00'
|
||||||
|
fn: '0'
|
||||||
|
id: '1533'
|
||||||
|
name: 'Ethernet controller: Intel Corporation I210 Gigabit Network Connection (rev
|
||||||
|
03)'
|
||||||
|
- bus: ff
|
||||||
|
dev: 0b
|
||||||
|
fn: '0'
|
||||||
|
id: 6f81
|
||||||
|
name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
|
||||||
|
D R3 QPI Link 0/1 (rev 03)'
|
||||||
|
- bus: ff
|
||||||
|
dev: 0b
|
||||||
|
fn: '1'
|
||||||
|
id: 6f36
|
||||||
|
name: 'Performance counters: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
|
||||||
|
D R3 QPI Link 0/1 (rev 03)'
|
||||||
|
- bus: ff
|
||||||
|
dev: 0b
|
||||||
|
fn: '2'
|
||||||
|
id: 6f37
|
||||||
|
name: 'Performance counters: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
|
||||||
|
D R3 QPI Link 0/1 (rev 03)'
|
||||||
|
- bus: ff
|
||||||
|
dev: 0b
|
||||||
|
fn: '3'
|
||||||
|
id: 6f76
|
||||||
|
name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
|
||||||
|
D R3 QPI Link Debug (rev 03)'
|
||||||
|
- bus: ff
|
||||||
|
dev: 0c
|
||||||
|
fn: '0'
|
||||||
|
id: 6fe0
|
||||||
|
name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
|
||||||
|
D Caching Agent (rev 03)'
|
||||||
|
- bus: ff
|
||||||
|
dev: 0c
|
||||||
|
fn: '1'
|
||||||
|
id: 6fe1
|
||||||
|
name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
|
||||||
|
D Caching Agent (rev 03)'
|
||||||
|
- bus: ff
|
||||||
|
dev: 0f
|
||||||
|
fn: '0'
|
||||||
|
id: 6ff8
|
||||||
|
name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
|
||||||
|
D Caching Agent (rev 03)'
|
||||||
|
- bus: ff
|
||||||
|
dev: 0f
|
||||||
|
fn: '4'
|
||||||
|
id: 6ffc
|
||||||
|
name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
|
||||||
|
D Caching Agent (rev 03)'
|
||||||
|
- bus: ff
|
||||||
|
dev: 0f
|
||||||
|
fn: '5'
|
||||||
|
id: 6ffd
|
||||||
|
name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
|
||||||
|
D Caching Agent (rev 03)'
|
||||||
|
- bus: ff
|
||||||
|
dev: 0f
|
||||||
|
fn: '6'
|
||||||
|
id: 6ffe
|
||||||
|
name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
|
||||||
|
D Caching Agent (rev 03)'
|
||||||
|
- bus: ff
|
||||||
|
dev: '10'
|
||||||
|
fn: '0'
|
||||||
|
id: 6f1d
|
||||||
|
name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
|
||||||
|
D R2PCIe Agent (rev 03)'
|
||||||
|
- bus: ff
|
||||||
|
dev: '10'
|
||||||
|
fn: '1'
|
||||||
|
id: 6f34
|
||||||
|
name: 'Performance counters: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
|
||||||
|
D R2PCIe Agent (rev 03)'
|
||||||
|
- bus: ff
|
||||||
|
dev: '10'
|
||||||
|
fn: '5'
|
||||||
|
id: 6f1e
|
||||||
|
name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
|
||||||
|
D Ubox (rev 03)'
|
||||||
|
- bus: ff
|
||||||
|
dev: '10'
|
||||||
|
fn: '6'
|
||||||
|
id: 6f7d
|
||||||
|
name: 'Performance counters: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
|
||||||
|
D Ubox (rev 03)'
|
||||||
|
- bus: ff
|
||||||
|
dev: '10'
|
||||||
|
fn: '7'
|
||||||
|
id: 6f1f
|
||||||
|
name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
|
||||||
|
D Ubox (rev 03)'
|
||||||
|
- bus: ff
|
||||||
|
dev: '12'
|
||||||
|
fn: '0'
|
||||||
|
id: 6fa0
|
||||||
|
name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
|
||||||
|
D Home Agent 0 (rev 03)'
|
||||||
|
- bus: ff
|
||||||
|
dev: '12'
|
||||||
|
fn: '1'
|
||||||
|
id: 6f30
|
||||||
|
name: 'Performance counters: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
|
||||||
|
D Home Agent 0 (rev 03)'
|
||||||
|
- bus: ff
|
||||||
|
dev: '13'
|
||||||
|
fn: '0'
|
||||||
|
id: 6fa8
|
||||||
|
name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
|
||||||
|
D Memory Controller 0 - Target Address/Thermal/RAS (rev 03)'
|
||||||
|
- bus: ff
|
||||||
|
dev: '13'
|
||||||
|
fn: '1'
|
||||||
|
id: 6f71
|
||||||
|
name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
|
||||||
|
D Memory Controller 0 - Target Address/Thermal/RAS (rev 03)'
|
||||||
|
- bus: ff
|
||||||
|
dev: '13'
|
||||||
|
fn: '2'
|
||||||
|
id: 6faa
|
||||||
|
name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
|
||||||
|
D Memory Controller 0 - Channel Target Address Decoder (rev 03)'
|
||||||
|
- bus: ff
|
||||||
|
dev: '13'
|
||||||
|
fn: '3'
|
||||||
|
id: 6fab
|
||||||
|
name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
|
||||||
|
D Memory Controller 0 - Channel Target Address Decoder (rev 03)'
|
||||||
|
- bus: ff
|
||||||
|
dev: '13'
|
||||||
|
fn: '4'
|
||||||
|
id: 6fac
|
||||||
|
name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
|
||||||
|
D Memory Controller 0 - Channel Target Address Decoder (rev 03)'
|
||||||
|
- bus: ff
|
||||||
|
dev: '13'
|
||||||
|
fn: '5'
|
||||||
|
id: 6fad
|
||||||
|
name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
|
||||||
|
D Memory Controller 0 - Channel Target Address Decoder (rev 03)'
|
||||||
|
- bus: ff
|
||||||
|
dev: '13'
|
||||||
|
fn: '6'
|
||||||
|
id: 6fae
|
||||||
|
name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
|
||||||
|
D DDRIO Channel 0/1 Broadcast (rev 03)'
|
||||||
|
- bus: ff
|
||||||
|
dev: '13'
|
||||||
|
fn: '7'
|
||||||
|
id: 6faf
|
||||||
|
name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
|
||||||
|
D DDRIO Global Broadcast (rev 03)'
|
||||||
|
- bus: ff
|
||||||
|
dev: '14'
|
||||||
|
fn: '0'
|
||||||
|
id: 6fb0
|
||||||
|
name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
|
||||||
|
D Memory Controller 0 - Channel 0 Thermal Control (rev 03)'
|
||||||
|
- bus: ff
|
||||||
|
dev: '14'
|
||||||
|
fn: '1'
|
||||||
|
id: 6fb1
|
||||||
|
name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
|
||||||
|
D Memory Controller 0 - Channel 1 Thermal Control (rev 03)'
|
||||||
|
- bus: ff
|
||||||
|
dev: '14'
|
||||||
|
fn: '2'
|
||||||
|
id: 6fb2
|
||||||
|
name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
|
||||||
|
D Memory Controller 0 - Channel 0 Error (rev 03)'
|
||||||
|
- bus: ff
|
||||||
|
dev: '14'
|
||||||
|
fn: '3'
|
||||||
|
id: 6fb3
|
||||||
|
name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
|
||||||
|
D Memory Controller 0 - Channel 1 Error (rev 03)'
|
||||||
|
- bus: ff
|
||||||
|
dev: '14'
|
||||||
|
fn: '4'
|
||||||
|
id: 6fbc
|
||||||
|
name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
|
||||||
|
D DDRIO Channel 0/1 Interface (rev 03)'
|
||||||
|
- bus: ff
|
||||||
|
dev: '14'
|
||||||
|
fn: '5'
|
||||||
|
id: 6fbd
|
||||||
|
name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
|
||||||
|
D DDRIO Channel 0/1 Interface (rev 03)'
|
||||||
|
- bus: ff
|
||||||
|
dev: '14'
|
||||||
|
fn: '6'
|
||||||
|
id: 6fbe
|
||||||
|
name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
|
||||||
|
D DDRIO Channel 0/1 Interface (rev 03)'
|
||||||
|
- bus: ff
|
||||||
|
dev: '14'
|
||||||
|
fn: '7'
|
||||||
|
id: 6fbf
|
||||||
|
name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
|
||||||
|
D DDRIO Channel 0/1 Interface (rev 03)'
|
||||||
|
- bus: ff
|
||||||
|
dev: '15'
|
||||||
|
fn: '0'
|
||||||
|
id: 6fb4
|
||||||
|
name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
|
||||||
|
D Memory Controller 0 - Channel 2 Thermal Control (rev 03)'
|
||||||
|
- bus: ff
|
||||||
|
dev: '15'
|
||||||
|
fn: '1'
|
||||||
|
id: 6fb5
|
||||||
|
name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
|
||||||
|
D Memory Controller 0 - Channel 3 Thermal Control (rev 03)'
|
||||||
|
- bus: ff
|
||||||
|
dev: '15'
|
||||||
|
fn: '2'
|
||||||
|
id: 6fb6
|
||||||
|
name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
|
||||||
|
D Memory Controller 0 - Channel 2 Error (rev 03)'
|
||||||
|
- bus: ff
|
||||||
|
dev: '15'
|
||||||
|
fn: '3'
|
||||||
|
id: 6fb7
|
||||||
|
name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
|
||||||
|
D Memory Controller 0 - Channel 3 Error (rev 03)'
|
||||||
|
- bus: ff
|
||||||
|
dev: 1e
|
||||||
|
fn: '0'
|
||||||
|
id: 6f98
|
||||||
|
name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
|
||||||
|
D Power Control Unit (rev 03)'
|
||||||
|
- bus: ff
|
||||||
|
dev: 1e
|
||||||
|
fn: '1'
|
||||||
|
id: 6f99
|
||||||
|
name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
|
||||||
|
D Power Control Unit (rev 03)'
|
||||||
|
- bus: ff
|
||||||
|
dev: 1e
|
||||||
|
fn: '2'
|
||||||
|
id: 6f9a
|
||||||
|
name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
|
||||||
|
D Power Control Unit (rev 03)'
|
||||||
|
- bus: ff
|
||||||
|
dev: 1e
|
||||||
|
fn: '3'
|
||||||
|
id: 6fc0
|
||||||
|
name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
|
||||||
|
D Power Control Unit (rev 03)'
|
||||||
|
- bus: ff
|
||||||
|
dev: 1e
|
||||||
|
fn: '4'
|
||||||
|
id: 6f9c
|
||||||
|
name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
|
||||||
|
D Power Control Unit (rev 03)'
|
||||||
|
- bus: ff
|
||||||
|
dev: 1f
|
||||||
|
fn: '0'
|
||||||
|
id: 6f88
|
||||||
|
name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
|
||||||
|
D Power Control Unit (rev 03)'
|
||||||
|
- bus: ff
|
||||||
|
dev: 1f
|
||||||
|
fn: '2'
|
||||||
|
id: 6f8a
|
||||||
|
name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
|
||||||
|
D Power Control Unit (rev 03)'
|
484
device/celestica/x86_64-cel_silverstone-r0/platform.json
Normal file
484
device/celestica/x86_64-cel_silverstone-r0/platform.json
Normal file
@ -0,0 +1,484 @@
|
|||||||
|
{
|
||||||
|
"interfaces": {
|
||||||
|
"Ethernet0": {
|
||||||
|
"index": "1,1,1,1,1,1,1,1",
|
||||||
|
"lanes": "33,34,35,36,37,38,39,40",
|
||||||
|
"breakout_modes": {
|
||||||
|
"1x400G": ["Eth1/1"],
|
||||||
|
"2x100G": ["Eth1/1", "Eth1/5"],
|
||||||
|
"2x40G": ["Eth1/1", "Eth1/5"],
|
||||||
|
"4x100G": ["Eth1/1", "Eth1/3", "Eth1/5", "Eth1/7"],
|
||||||
|
"1x100G(2)": ["Eth1/1"],
|
||||||
|
"1x100G(4)": ["Eth1/1"],
|
||||||
|
"1x40G(4)": ["Eth1/1"],
|
||||||
|
"4x25G(4)": ["Eth1/1", "Eth1/2", "Eth1/3", "Eth1/4"],
|
||||||
|
"4x10G(4)": ["Eth1/1", "Eth1/2", "Eth1/3", "Eth1/4"]
|
||||||
|
}
|
||||||
|
},
|
||||||
|
"Ethernet8": {
|
||||||
|
"index": "2,2,2,2,2,2,2,2",
|
||||||
|
"lanes": "41,42,43,44,45,46,47,48",
|
||||||
|
"breakout_modes": {
|
||||||
|
"1x400G": ["Eth2/1"],
|
||||||
|
"2x100G": ["Eth2/1", "Eth2/5"],
|
||||||
|
"2x40G": ["Eth2/1", "Eth2/5"],
|
||||||
|
"4x100G": ["Eth2/1", "Eth2/3", "Eth2/5", "Eth2/7"],
|
||||||
|
"1x100G(2)": ["Eth2/1"],
|
||||||
|
"1x100G(4)": ["Eth2/1"],
|
||||||
|
"1x40G(4)": ["Eth2/1"],
|
||||||
|
"4x25G(4)": ["Eth2/1", "Eth2/2", "Eth2/3", "Eth2/4"],
|
||||||
|
"4x10G(4)": ["Eth2/1", "Eth2/2", "Eth2/3", "Eth2/4"]
|
||||||
|
}
|
||||||
|
},
|
||||||
|
"Ethernet16": {
|
||||||
|
"index": "3,3,3,3,3,3,3,3",
|
||||||
|
"lanes": "49,50,51,52,53,54,55,56",
|
||||||
|
"breakout_modes": {
|
||||||
|
"1x400G": ["Eth3/1"],
|
||||||
|
"2x100G": ["Eth3/1", "Eth3/5"],
|
||||||
|
"2x40G": ["Eth3/1", "Eth3/5"],
|
||||||
|
"4x100G": ["Eth3/1", "Eth3/3", "Eth3/5", "Eth3/7"],
|
||||||
|
"1x100G(2)": ["Eth3/1"],
|
||||||
|
"1x100G(4)": ["Eth3/1"],
|
||||||
|
"1x40G(4)": ["Eth3/1"],
|
||||||
|
"4x25G(4)": ["Eth3/1", "Eth3/2", "Eth3/3", "Eth3/4"],
|
||||||
|
"4x10G(4)": ["Eth3/1", "Eth3/2", "Eth3/3", "Eth3/4"]
|
||||||
|
}
|
||||||
|
},
|
||||||
|
"Ethernet24": {
|
||||||
|
"index": "4,4,4,4,4,4,4,4",
|
||||||
|
"lanes": "57,58,59,60,61,62,63,64",
|
||||||
|
"breakout_modes": {
|
||||||
|
"1x400G": ["Eth4/1"],
|
||||||
|
"2x100G": ["Eth4/1", "Eth4/5"],
|
||||||
|
"2x40G": ["Eth4/1", "Eth4/5"],
|
||||||
|
"4x100G": ["Eth4/1", "Eth4/3", "Eth4/5", "Eth4/7"],
|
||||||
|
"1x100G(2)": ["Eth4/1"],
|
||||||
|
"1x100G(4)": ["Eth4/1"],
|
||||||
|
"1x40G(4)": ["Eth4/1"],
|
||||||
|
"4x25G(4)": ["Eth4/1", "Eth4/2", "Eth4/3", "Eth4/4"],
|
||||||
|
"4x10G(4)": ["Eth4/1", "Eth4/2", "Eth4/3", "Eth4/4"]
|
||||||
|
}
|
||||||
|
},
|
||||||
|
"Ethernet32": {
|
||||||
|
"index": "5,5,5,5,5,5,5,5",
|
||||||
|
"lanes": "65,66,67,68,69,70,71,72",
|
||||||
|
"breakout_modes": {
|
||||||
|
"1x400G": ["Eth5/1"],
|
||||||
|
"2x100G": ["Eth5/1", "Eth5/5"],
|
||||||
|
"2x40G": ["Eth5/1", "Eth5/5"],
|
||||||
|
"4x100G": ["Eth5/1", "Eth5/3", "Eth5/5", "Eth5/7"],
|
||||||
|
"1x100G(2)": ["Eth5/1"],
|
||||||
|
"1x100G(4)": ["Eth5/1"],
|
||||||
|
"1x40G(4)": ["Eth5/1"],
|
||||||
|
"4x25G(4)": ["Eth5/1", "Eth5/2", "Eth5/3", "Eth5/4"],
|
||||||
|
"4x10G(4)": ["Eth5/1", "Eth5/2", "Eth5/3", "Eth5/4"]
|
||||||
|
}
|
||||||
|
},
|
||||||
|
"Ethernet40": {
|
||||||
|
"index": "6,6,6,6,6,6,6,6",
|
||||||
|
"lanes": "73,74,75,76,77,78,79,80",
|
||||||
|
"breakout_modes": {
|
||||||
|
"1x400G": ["Eth6/1"],
|
||||||
|
"2x100G": ["Eth6/1", "Eth6/5"],
|
||||||
|
"2x40G": ["Eth6/1", "Eth6/5"],
|
||||||
|
"4x100G": ["Eth6/1", "Eth6/3", "Eth6/5", "Eth6/7"],
|
||||||
|
"1x100G(2)": ["Eth6/1"],
|
||||||
|
"1x100G(4)": ["Eth6/1"],
|
||||||
|
"1x40G(4)": ["Eth6/1"],
|
||||||
|
"4x25G(4)": ["Eth6/1", "Eth6/2", "Eth6/3", "Eth6/4"],
|
||||||
|
"4x10G(4)": ["Eth6/1", "Eth6/2", "Eth6/3", "Eth6/4"]
|
||||||
|
}
|
||||||
|
},
|
||||||
|
"Ethernet48": {
|
||||||
|
"index": "7,7,7,7,7,7,7,7",
|
||||||
|
"lanes": "81,82,83,84,85,86,87,88",
|
||||||
|
"breakout_modes": {
|
||||||
|
"1x400G": ["Eth7/1"],
|
||||||
|
"2x100G": ["Eth7/1", "Eth7/5"],
|
||||||
|
"2x40G": ["Eth7/1", "Eth7/5"],
|
||||||
|
"4x100G": ["Eth7/1", "Eth7/3", "Eth7/5", "Eth7/7"],
|
||||||
|
"1x100G(2)": ["Eth7/1"],
|
||||||
|
"1x100G(4)": ["Eth7/1"],
|
||||||
|
"1x40G(4)": ["Eth7/1"],
|
||||||
|
"4x25G(4)": ["Eth7/1", "Eth7/2", "Eth7/3", "Eth7/4"],
|
||||||
|
"4x10G(4)": ["Eth7/1", "Eth7/2", "Eth7/3", "Eth7/4"]
|
||||||
|
}
|
||||||
|
},
|
||||||
|
"Ethernet56": {
|
||||||
|
"index": "8,8,8,8,8,8,8,8",
|
||||||
|
"lanes": "89,90,91,92,93,94,95,96",
|
||||||
|
"breakout_modes": {
|
||||||
|
"1x400G": ["Eth8/1"],
|
||||||
|
"2x100G": ["Eth8/1", "Eth8/5"],
|
||||||
|
"2x40G": ["Eth8/1", "Eth8/5"],
|
||||||
|
"4x100G": ["Eth8/1", "Eth8/3", "Eth8/5", "Eth8/7"],
|
||||||
|
"1x100G(2)": ["Eth8/1"],
|
||||||
|
"1x100G(4)": ["Eth8/1"],
|
||||||
|
"1x40G(4)": ["Eth8/1"],
|
||||||
|
"4x25G(4)": ["Eth8/1", "Eth8/2", "Eth8/3", "Eth8/4"],
|
||||||
|
"4x10G(4)": ["Eth8/1", "Eth8/2", "Eth8/3", "Eth8/4"]
|
||||||
|
}
|
||||||
|
},
|
||||||
|
"Ethernet64": {
|
||||||
|
"index": "9,9,9,9,9,9,9,9",
|
||||||
|
"lanes": "1,2,3,4,5,6,7,8",
|
||||||
|
"breakout_modes": {
|
||||||
|
"1x400G": ["Eth9/1"],
|
||||||
|
"2x100G": ["Eth9/1", "Eth9/5"],
|
||||||
|
"2x40G": ["Eth9/1", "Eth9/5"],
|
||||||
|
"4x100G": ["Eth9/1", "Eth9/3", "Eth9/5", "Eth9/7"],
|
||||||
|
"1x100G(2)": ["Eth9/1"],
|
||||||
|
"1x100G(4)": ["Eth9/1"],
|
||||||
|
"1x40G(4)": ["Eth9/1"],
|
||||||
|
"4x25G(4)": ["Eth9/1", "Eth9/2", "Eth9/3", "Eth9/4"],
|
||||||
|
"4x10G(4)": ["Eth9/1", "Eth9/2", "Eth9/3", "Eth9/4"]
|
||||||
|
}
|
||||||
|
},
|
||||||
|
"Ethernet72": {
|
||||||
|
"index": "10,10,10,10,10,10,10,10",
|
||||||
|
"lanes": "9,10,11,12,13,14,15,16",
|
||||||
|
"breakout_modes": {
|
||||||
|
"1x400G": ["Eth10/1"],
|
||||||
|
"2x100G": ["Eth10/1", "Eth10/5"],
|
||||||
|
"2x40G": ["Eth10/1", "Eth10/5"],
|
||||||
|
"4x100G": ["Eth10/1", "Eth10/3", "Eth10/5", "Eth10/7"],
|
||||||
|
"1x100G(2)": ["Eth10/1"],
|
||||||
|
"1x100G(4)": ["Eth10/1"],
|
||||||
|
"1x40G(4)": ["Eth10/1"],
|
||||||
|
"4x25G(4)": ["Eth10/1", "Eth10/2", "Eth10/3", "Eth10/4"],
|
||||||
|
"4x10G(4)": ["Eth10/1", "Eth10/2", "Eth10/3", "Eth10/4"]
|
||||||
|
}
|
||||||
|
},
|
||||||
|
"Ethernet80": {
|
||||||
|
"index": "11,11,11,11,11,11,11,11",
|
||||||
|
"lanes": "17,18,19,20,21,22,23,24",
|
||||||
|
"breakout_modes": {
|
||||||
|
"1x400G": ["Eth11/1"],
|
||||||
|
"2x100G": ["Eth11/1", "Eth11/5"],
|
||||||
|
"2x40G": ["Eth11/1", "Eth11/5"],
|
||||||
|
"4x100G": ["Eth11/1", "Eth11/3", "Eth11/5", "Eth11/7"],
|
||||||
|
"1x100G(2)": ["Eth11/1"],
|
||||||
|
"1x100G(4)": ["Eth11/1"],
|
||||||
|
"1x40G(4)": ["Eth11/1"],
|
||||||
|
"4x25G(4)": ["Eth11/1", "Eth11/2", "Eth11/3", "Eth11/4"],
|
||||||
|
"4x10G(4)": ["Eth11/1", "Eth11/2", "Eth11/3", "Eth11/4"]
|
||||||
|
}
|
||||||
|
},
|
||||||
|
"Ethernet88": {
|
||||||
|
"index": "12,12,12,12,12,12,12,12",
|
||||||
|
"lanes": "25,26,27,28,29,30,31,32",
|
||||||
|
"breakout_modes": {
|
||||||
|
"1x400G": ["Eth12/1"],
|
||||||
|
"2x100G": ["Eth12/1", "Eth12/5"],
|
||||||
|
"2x40G": ["Eth12/1", "Eth12/5"],
|
||||||
|
"4x100G": ["Eth12/1", "Eth12/3", "Eth12/5", "Eth12/7"],
|
||||||
|
"1x100G(2)": ["Eth12/1"],
|
||||||
|
"1x100G(4)": ["Eth12/1"],
|
||||||
|
"1x40G(4)": ["Eth12/1"],
|
||||||
|
"4x25G(4)": ["Eth12/1", "Eth12/2", "Eth12/3", "Eth12/4"],
|
||||||
|
"4x10G(4)": ["Eth12/1", "Eth12/2", "Eth12/3", "Eth12/4"]
|
||||||
|
}
|
||||||
|
},
|
||||||
|
"Ethernet96": {
|
||||||
|
"index": "13,13,13,13,13,13,13,13",
|
||||||
|
"lanes": "97,98,99,100,101,102,103,104",
|
||||||
|
"breakout_modes": {
|
||||||
|
"1x400G": ["Eth13/1"],
|
||||||
|
"2x100G": ["Eth13/1", "Eth13/5"],
|
||||||
|
"2x40G": ["Eth13/1", "Eth13/5"],
|
||||||
|
"4x100G": ["Eth13/1", "Eth13/3", "Eth13/5", "Eth13/7"],
|
||||||
|
"1x100G(2)": ["Eth13/1"],
|
||||||
|
"1x100G(4)": ["Eth13/1"],
|
||||||
|
"1x40G(4)": ["Eth13/1"],
|
||||||
|
"4x25G(4)": ["Eth13/1", "Eth13/2", "Eth13/3", "Eth13/4"],
|
||||||
|
"4x10G(4)": ["Eth13/1", "Eth13/2", "Eth13/3", "Eth13/4"]
|
||||||
|
}
|
||||||
|
},
|
||||||
|
"Ethernet104": {
|
||||||
|
"index": "14,14,14,14,14,14,14,14",
|
||||||
|
"lanes": "105,106,107,108,109,110,111,112",
|
||||||
|
"breakout_modes": {
|
||||||
|
"1x400G": ["Eth14/1"],
|
||||||
|
"2x100G": ["Eth14/1", "Eth14/5"],
|
||||||
|
"2x40G": ["Eth14/1", "Eth14/5"],
|
||||||
|
"4x100G": ["Eth14/1", "Eth14/3", "Eth14/5", "Eth14/7"],
|
||||||
|
"1x100G(2)": ["Eth14/1"],
|
||||||
|
"1x100G(4)": ["Eth14/1"],
|
||||||
|
"1x40G(4)": ["Eth14/1"],
|
||||||
|
"4x25G(4)": ["Eth14/1", "Eth14/2", "Eth14/3", "Eth14/4"],
|
||||||
|
"4x10G(4)": ["Eth14/1", "Eth14/2", "Eth14/3", "Eth14/4"]
|
||||||
|
}
|
||||||
|
},
|
||||||
|
"Ethernet112": {
|
||||||
|
"index": "15,15,15,15,15,15,15,15",
|
||||||
|
"lanes": "113,114,115,116,117,118,119,120",
|
||||||
|
"breakout_modes": {
|
||||||
|
"1x400G": ["Eth15/1"],
|
||||||
|
"2x100G": ["Eth15/1", "Eth15/5"],
|
||||||
|
"2x40G": ["Eth15/1", "Eth15/5"],
|
||||||
|
"4x100G": ["Eth15/1", "Eth15/3", "Eth15/5", "Eth15/7"],
|
||||||
|
"1x100G(2)": ["Eth15/1"],
|
||||||
|
"1x100G(4)": ["Eth15/1"],
|
||||||
|
"1x40G(4)": ["Eth15/1"],
|
||||||
|
"4x25G(4)": ["Eth15/1", "Eth15/2", "Eth15/3", "Eth15/4"],
|
||||||
|
"4x10G(4)": ["Eth15/1", "Eth15/2", "Eth15/3", "Eth15/4"]
|
||||||
|
}
|
||||||
|
},
|
||||||
|
"Ethernet120": {
|
||||||
|
"index": "16,16,16,16,16,16,16,16",
|
||||||
|
"lanes": "121,122,123,124,125,126,127,128",
|
||||||
|
"breakout_modes": {
|
||||||
|
"1x400G": ["Eth16/1"],
|
||||||
|
"2x100G": ["Eth16/1", "Eth16/5"],
|
||||||
|
"2x40G": ["Eth16/1", "Eth16/5"],
|
||||||
|
"4x100G": ["Eth16/1", "Eth16/3", "Eth16/5", "Eth16/7"],
|
||||||
|
"1x100G(2)": ["Eth16/1"],
|
||||||
|
"1x100G(4)": ["Eth16/1"],
|
||||||
|
"1x40G(4)": ["Eth16/1"],
|
||||||
|
"4x25G(4)": ["Eth16/1", "Eth16/2", "Eth16/3", "Eth16/4"],
|
||||||
|
"4x10G(4)": ["Eth16/1", "Eth16/2", "Eth16/3", "Eth16/4"]
|
||||||
|
}
|
||||||
|
},
|
||||||
|
"Ethernet128": {
|
||||||
|
"index": "17,17,17,17,17,17,17,17",
|
||||||
|
"lanes": "129,130,131,132,133,134,135,136",
|
||||||
|
"breakout_modes": {
|
||||||
|
"1x400G": ["Eth17/1"],
|
||||||
|
"2x100G": ["Eth17/1", "Eth17/5"],
|
||||||
|
"2x40G": ["Eth17/1", "Eth17/5"],
|
||||||
|
"4x100G": ["Eth17/1", "Eth17/3", "Eth17/5", "Eth17/7"],
|
||||||
|
"1x100G(2)": ["Eth17/1"],
|
||||||
|
"1x100G(4)": ["Eth17/1"],
|
||||||
|
"1x40G(4)": ["Eth17/1"],
|
||||||
|
"4x25G(4)": ["Eth17/1", "Eth17/2", "Eth17/3", "Eth17/4"],
|
||||||
|
"4x10G(4)": ["Eth17/1", "Eth17/2", "Eth17/3", "Eth17/4"]
|
||||||
|
}
|
||||||
|
},
|
||||||
|
"Ethernet136": {
|
||||||
|
"index": "18,18,18,18,18,18,18,18",
|
||||||
|
"lanes": "137,138,139,140,141,142,143,144",
|
||||||
|
"breakout_modes": {
|
||||||
|
"1x400G": ["Eth18/1"],
|
||||||
|
"2x100G": ["Eth18/1", "Eth18/5"],
|
||||||
|
"2x40G": ["Eth18/1", "Eth18/5"],
|
||||||
|
"4x100G": ["Eth18/1", "Eth18/3", "Eth18/5", "Eth18/7"],
|
||||||
|
"1x100G(2)": ["Eth18/1"],
|
||||||
|
"1x100G(4)": ["Eth18/1"],
|
||||||
|
"1x40G(4)": ["Eth18/1"],
|
||||||
|
"4x25G(4)": ["Eth18/1", "Eth18/2", "Eth18/3", "Eth18/4"],
|
||||||
|
"4x10G(4)": ["Eth18/1", "Eth18/2", "Eth18/3", "Eth18/4"]
|
||||||
|
}
|
||||||
|
},
|
||||||
|
"Ethernet144": {
|
||||||
|
"index": "19,19,19,19,19,19,19,19",
|
||||||
|
"lanes": "145,146,147,148,149,150,151,152",
|
||||||
|
"breakout_modes": {
|
||||||
|
"1x400G": ["Eth19/1"],
|
||||||
|
"2x100G": ["Eth19/1", "Eth19/5"],
|
||||||
|
"2x40G": ["Eth19/1", "Eth19/5"],
|
||||||
|
"4x100G": ["Eth19/1", "Eth19/3", "Eth19/5", "Eth19/7"],
|
||||||
|
"1x100G(2)": ["Eth19/1"],
|
||||||
|
"1x100G(4)": ["Eth19/1"],
|
||||||
|
"1x40G(4)": ["Eth19/1"],
|
||||||
|
"4x25G(4)": ["Eth19/1", "Eth19/2", "Eth19/3", "Eth19/4"],
|
||||||
|
"4x10G(4)": ["Eth19/1", "Eth19/2", "Eth19/3", "Eth19/4"]
|
||||||
|
}
|
||||||
|
},
|
||||||
|
"Ethernet152": {
|
||||||
|
"index": "20,20,20,20,20,20,20,20",
|
||||||
|
"lanes": "153,154,155,156,157,158,159,160",
|
||||||
|
"breakout_modes": {
|
||||||
|
"1x400G": ["Eth20/1"],
|
||||||
|
"2x100G": ["Eth20/1", "Eth20/5"],
|
||||||
|
"2x40G": ["Eth20/1", "Eth20/5"],
|
||||||
|
"4x100G": ["Eth20/1", "Eth20/3", "Eth20/5", "Eth20/7"],
|
||||||
|
"1x100G(2)": ["Eth20/1"],
|
||||||
|
"1x100G(4)": ["Eth20/1"],
|
||||||
|
"1x40G(4)": ["Eth20/1"],
|
||||||
|
"4x25G(4)": ["Eth20/1", "Eth20/2", "Eth20/3", "Eth20/4"],
|
||||||
|
"4x10G(4)": ["Eth20/1", "Eth20/2", "Eth20/3", "Eth20/4"]
|
||||||
|
}
|
||||||
|
},
|
||||||
|
"Ethernet160": {
|
||||||
|
"index": "21,21,21,21,21,21,21,21",
|
||||||
|
"lanes": "225,226,227,228,229,230,231,232",
|
||||||
|
"breakout_modes": {
|
||||||
|
"1x400G": ["Eth21/1"],
|
||||||
|
"2x100G": ["Eth21/1", "Eth21/5"],
|
||||||
|
"2x40G": ["Eth21/1", "Eth21/5"],
|
||||||
|
"4x100G": ["Eth21/1", "Eth21/3", "Eth21/5", "Eth21/7"],
|
||||||
|
"1x100G(2)": ["Eth21/1"],
|
||||||
|
"1x100G(4)": ["Eth21/1"],
|
||||||
|
"1x40G(4)": ["Eth21/1"],
|
||||||
|
"4x25G(4)": ["Eth21/1", "Eth21/2", "Eth21/3", "Eth21/4"],
|
||||||
|
"4x10G(4)": ["Eth21/1", "Eth21/2", "Eth21/3", "Eth21/4"]
|
||||||
|
}
|
||||||
|
},
|
||||||
|
"Ethernet168": {
|
||||||
|
"index": "22,22,22,22,22,22,22,22",
|
||||||
|
"lanes": "233,234,235,236,237,238,239,240",
|
||||||
|
"breakout_modes": {
|
||||||
|
"1x400G": ["Eth22/1"],
|
||||||
|
"2x100G": ["Eth22/1", "Eth22/5"],
|
||||||
|
"2x40G": ["Eth22/1", "Eth22/5"],
|
||||||
|
"4x100G": ["Eth22/1", "Eth22/3", "Eth22/5", "Eth22/7"],
|
||||||
|
"1x100G(2)": ["Eth22/1"],
|
||||||
|
"1x100G(4)": ["Eth22/1"],
|
||||||
|
"1x40G(4)": ["Eth22/1"],
|
||||||
|
"4x25G(4)": ["Eth22/1", "Eth22/2", "Eth22/3", "Eth22/4"],
|
||||||
|
"4x10G(4)": ["Eth22/1", "Eth22/2", "Eth22/3", "Eth22/4"]
|
||||||
|
}
|
||||||
|
},
|
||||||
|
"Ethernet176": {
|
||||||
|
"index": "23,23,23,23,23,23,23,23",
|
||||||
|
"lanes": "241,242,243,244,245,246,247,248",
|
||||||
|
"breakout_modes": {
|
||||||
|
"1x400G": ["Eth23/1"],
|
||||||
|
"2x100G": ["Eth23/1", "Eth23/5"],
|
||||||
|
"2x40G": ["Eth23/1", "Eth23/5"],
|
||||||
|
"4x100G": ["Eth23/1", "Eth23/3", "Eth23/5", "Eth23/7"],
|
||||||
|
"1x100G(2)": ["Eth23/1"],
|
||||||
|
"1x100G(4)": ["Eth23/1"],
|
||||||
|
"1x40G(4)": ["Eth23/1"],
|
||||||
|
"4x25G(4)": ["Eth23/1", "Eth23/2", "Eth23/3", "Eth23/4"],
|
||||||
|
"4x10G(4)": ["Eth23/1", "Eth23/2", "Eth23/3", "Eth23/4"]
|
||||||
|
}
|
||||||
|
},
|
||||||
|
"Ethernet184": {
|
||||||
|
"index": "24,24,24,24,24,24,24,24",
|
||||||
|
"lanes": "249,250,251,252,253,254,255,256",
|
||||||
|
"breakout_modes": {
|
||||||
|
"1x400G": ["Eth24/1"],
|
||||||
|
"2x100G": ["Eth24/1", "Eth24/5"],
|
||||||
|
"2x40G": ["Eth24/1", "Eth24/5"],
|
||||||
|
"4x100G": ["Eth24/1", "Eth24/3", "Eth24/5", "Eth24/7"],
|
||||||
|
"1x100G(2)": ["Eth24/1"],
|
||||||
|
"1x100G(4)": ["Eth24/1"],
|
||||||
|
"1x40G(4)": ["Eth24/1"],
|
||||||
|
"4x25G(4)": ["Eth24/1", "Eth24/2", "Eth24/3", "Eth24/4"],
|
||||||
|
"4x10G(4)": ["Eth24/1", "Eth24/2", "Eth24/3", "Eth24/4"]
|
||||||
|
}
|
||||||
|
},
|
||||||
|
"Ethernet192": {
|
||||||
|
"index": "25,25,25,25,25,25,25,25",
|
||||||
|
"lanes": "161,162,163,164,165,166,167,168",
|
||||||
|
"breakout_modes": {
|
||||||
|
"1x400G": ["Eth25/1"],
|
||||||
|
"2x100G": ["Eth25/1", "Eth25/5"],
|
||||||
|
"2x40G": ["Eth25/1", "Eth25/5"],
|
||||||
|
"4x100G": ["Eth25/1", "Eth25/3", "Eth25/5", "Eth25/7"],
|
||||||
|
"1x100G(2)": ["Eth25/1"],
|
||||||
|
"1x100G(4)": ["Eth25/1"],
|
||||||
|
"1x40G(4)": ["Eth25/1"],
|
||||||
|
"4x25G(4)": ["Eth25/1", "Eth25/2", "Eth25/3", "Eth25/4"],
|
||||||
|
"4x10G(4)": ["Eth25/1", "Eth25/2", "Eth25/3", "Eth25/4"]
|
||||||
|
}
|
||||||
|
},
|
||||||
|
"Ethernet200": {
|
||||||
|
"index": "26,26,26,26,26,26,26,26",
|
||||||
|
"lanes": "169,170,171,172,173,174,175,176",
|
||||||
|
"breakout_modes": {
|
||||||
|
"1x400G": ["Eth26/1"],
|
||||||
|
"2x100G": ["Eth26/1", "Eth26/5"],
|
||||||
|
"2x40G": ["Eth26/1", "Eth26/5"],
|
||||||
|
"4x100G": ["Eth26/1", "Eth26/3", "Eth26/5", "Eth26/7"],
|
||||||
|
"1x100G(2)": ["Eth26/1"],
|
||||||
|
"1x100G(4)": ["Eth26/1"],
|
||||||
|
"1x40G(4)": ["Eth26/1"],
|
||||||
|
"4x25G(4)": ["Eth26/1", "Eth26/2", "Eth26/3", "Eth26/4"],
|
||||||
|
"4x10G(4)": ["Eth26/1", "Eth26/2", "Eth26/3", "Eth26/4"]
|
||||||
|
}
|
||||||
|
},
|
||||||
|
"Ethernet208": {
|
||||||
|
"index": "27,27,27,27,27,27,27,27",
|
||||||
|
"lanes": "177,178,179,180,181,182,183,184",
|
||||||
|
"breakout_modes": {
|
||||||
|
"1x400G": ["Eth27/1"],
|
||||||
|
"2x100G": ["Eth27/1", "Eth27/5"],
|
||||||
|
"2x40G": ["Eth27/1", "Eth27/5"],
|
||||||
|
"4x100G": ["Eth27/1", "Eth27/3", "Eth27/5", "Eth27/7"],
|
||||||
|
"1x100G(2)": ["Eth27/1"],
|
||||||
|
"1x100G(4)": ["Eth27/1"],
|
||||||
|
"1x40G(4)": ["Eth27/1"],
|
||||||
|
"4x25G(4)": ["Eth27/1", "Eth27/2", "Eth27/3", "Eth27/4"],
|
||||||
|
"4x10G(4)": ["Eth27/1", "Eth27/2", "Eth27/3", "Eth27/4"]
|
||||||
|
}
|
||||||
|
},
|
||||||
|
"Ethernet216": {
|
||||||
|
"index": "28,28,28,28,28,28,28,28",
|
||||||
|
"lanes": "185,186,187,188,189,190,191,192",
|
||||||
|
"breakout_modes": {
|
||||||
|
"1x400G": ["Eth28/1"],
|
||||||
|
"2x100G": ["Eth28/1", "Eth28/5"],
|
||||||
|
"2x40G": ["Eth28/1", "Eth28/5"],
|
||||||
|
"4x100G": ["Eth28/1", "Eth28/3", "Eth28/5", "Eth28/7"],
|
||||||
|
"1x100G(2)": ["Eth28/1"],
|
||||||
|
"1x100G(4)": ["Eth28/1"],
|
||||||
|
"1x40G(4)": ["Eth28/1"],
|
||||||
|
"4x25G(4)": ["Eth28/1", "Eth28/2", "Eth28/3", "Eth28/4"],
|
||||||
|
"4x10G(4)": ["Eth28/1", "Eth28/2", "Eth28/3", "Eth28/4"]
|
||||||
|
}
|
||||||
|
},
|
||||||
|
"Ethernet224": {
|
||||||
|
"index": "29,29,29,29,29,29,29,29",
|
||||||
|
"lanes": "193,194,195,196,197,198,199,200",
|
||||||
|
"breakout_modes": {
|
||||||
|
"1x400G": ["Eth29/1"],
|
||||||
|
"2x100G": ["Eth29/1", "Eth29/5"],
|
||||||
|
"2x40G": ["Eth29/1", "Eth29/5"],
|
||||||
|
"4x100G": ["Eth29/1", "Eth29/3", "Eth29/5", "Eth29/7"],
|
||||||
|
"1x100G(2)": ["Eth29/1"],
|
||||||
|
"1x100G(4)": ["Eth29/1"],
|
||||||
|
"1x40G(4)": ["Eth29/1"],
|
||||||
|
"4x25G(4)": ["Eth29/1", "Eth29/2", "Eth29/3", "Eth29/4"],
|
||||||
|
"4x10G(4)": ["Eth29/1", "Eth29/2", "Eth29/3", "Eth29/4"]
|
||||||
|
}
|
||||||
|
},
|
||||||
|
"Ethernet232": {
|
||||||
|
"index": "30,30,30,30,30,30,30,30",
|
||||||
|
"lanes": "201,202,203,204,205,206,207,208",
|
||||||
|
"breakout_modes": {
|
||||||
|
"1x400G": ["Eth30/1"],
|
||||||
|
"2x100G": ["Eth30/1", "Eth30/5"],
|
||||||
|
"2x40G": ["Eth30/1", "Eth30/5"],
|
||||||
|
"4x100G": ["Eth30/1", "Eth30/3", "Eth30/5", "Eth30/7"],
|
||||||
|
"1x100G(2)": ["Eth30/1"],
|
||||||
|
"1x100G(4)": ["Eth30/1"],
|
||||||
|
"1x40G(4)": ["Eth30/1"],
|
||||||
|
"4x25G(4)": ["Eth30/1", "Eth30/2", "Eth30/3", "Eth30/4"],
|
||||||
|
"4x10G(4)": ["Eth30/1", "Eth30/2", "Eth30/3", "Eth30/4"]
|
||||||
|
}
|
||||||
|
},
|
||||||
|
"Ethernet240": {
|
||||||
|
"index": "31,31,31,31,31,31,31,31",
|
||||||
|
"lanes": "209,210,211,212,213,214,215,216",
|
||||||
|
"breakout_modes": {
|
||||||
|
"1x400G": ["Eth31/1"],
|
||||||
|
"2x100G": ["Eth31/1", "Eth31/5"],
|
||||||
|
"2x40G": ["Eth31/1", "Eth31/5"],
|
||||||
|
"4x100G": ["Eth31/1", "Eth31/3", "Eth31/5", "Eth31/7"],
|
||||||
|
"1x100G(2)": ["Eth31/1"],
|
||||||
|
"1x100G(4)": ["Eth31/1"],
|
||||||
|
"1x40G(4)": ["Eth31/1"],
|
||||||
|
"4x25G(4)": ["Eth31/1", "Eth31/2", "Eth31/3", "Eth31/4"],
|
||||||
|
"4x10G(4)": ["Eth31/1", "Eth31/2", "Eth31/3", "Eth31/4"]
|
||||||
|
}
|
||||||
|
},
|
||||||
|
"Ethernet248": {
|
||||||
|
"index": "32,32,32,32,32,32,32,32",
|
||||||
|
"lanes": "217,218,219,220,221,222,223,224",
|
||||||
|
"breakout_modes": {
|
||||||
|
"1x400G": ["Eth32/1"],
|
||||||
|
"2x100G": ["Eth32/1", "Eth32/5"],
|
||||||
|
"2x40G": ["Eth32/1", "Eth32/5"],
|
||||||
|
"4x100G": ["Eth32/1", "Eth32/3", "Eth32/5", "Eth32/7"],
|
||||||
|
"1x100G(2)": ["Eth32/1"],
|
||||||
|
"1x100G(4)": ["Eth32/1"],
|
||||||
|
"1x40G(4)": ["Eth32/1"],
|
||||||
|
"4x25G(4)": ["Eth32/1", "Eth32/2", "Eth32/3", "Eth32/4"],
|
||||||
|
"4x10G(4)": ["Eth32/1", "Eth32/2", "Eth32/3", "Eth32/4"]
|
||||||
|
}
|
||||||
|
}
|
||||||
|
}
|
||||||
|
}
|
@ -0,0 +1,18 @@
|
|||||||
|
{
|
||||||
|
"chassis": {
|
||||||
|
"Silverstone": {
|
||||||
|
"component": {
|
||||||
|
"BIOS": {},
|
||||||
|
"ONIE": {},
|
||||||
|
"BMC": {},
|
||||||
|
"FPGA": {},
|
||||||
|
"CPLD COMe": {},
|
||||||
|
"CPLD BASE": {},
|
||||||
|
"CPLD SW1": {},
|
||||||
|
"CPLD SW2": {},
|
||||||
|
"CPLD FAN": {},
|
||||||
|
"SSD": {}
|
||||||
|
}
|
||||||
|
}
|
||||||
|
}
|
||||||
|
}
|
6
device/celestica/x86_64-cel_silverstone-r0/platform_reboot
Executable file
6
device/celestica/x86_64-cel_silverstone-r0/platform_reboot
Executable file
@ -0,0 +1,6 @@
|
|||||||
|
#!/bin/bash
|
||||||
|
|
||||||
|
# Set all LEDs to BMC's control
|
||||||
|
ipmitool raw 0x3a 0x09 0x02 0x01 &> /dev/null
|
||||||
|
|
||||||
|
/usr/local/bin/silverstone_platform_shutdown.sh system
|
@ -1,3 +1,4 @@
|
|||||||
|
import os.path
|
||||||
import subprocess
|
import subprocess
|
||||||
import sys
|
import sys
|
||||||
import re
|
import re
|
||||||
@ -12,13 +13,13 @@ class PsuUtil(PsuBase):
|
|||||||
"""Platform-specific PSUutil class"""
|
"""Platform-specific PSUutil class"""
|
||||||
|
|
||||||
def __init__(self):
|
def __init__(self):
|
||||||
self.ipmi_raw = ["docker", "exec", "-ti", "pmon", "ipmitool", "raw", "0x4", "0x2d", ""]
|
self.ipmi_raw = "docker exec -ti pmon ipmitool raw 0x4 0x2d"
|
||||||
self.psu1_id = "0x2f"
|
self.psu1_id = "0x2f"
|
||||||
self.psu2_id = "0x39"
|
self.psu2_id = "0x39"
|
||||||
PsuBase.__init__(self)
|
PsuBase.__init__(self)
|
||||||
|
|
||||||
def run_command(self, command):
|
def run_command(self, command):
|
||||||
proc = subprocess.Popen(command, universal_newlines=True, stdout=subprocess.PIPE)
|
proc = subprocess.Popen(command, shell=True, universal_newlines=True, stdout=subprocess.PIPE)
|
||||||
(out, err) = proc.communicate()
|
(out, err) = proc.communicate()
|
||||||
|
|
||||||
if proc.returncode != 0:
|
if proc.returncode != 0:
|
||||||
@ -51,8 +52,7 @@ class PsuUtil(PsuBase):
|
|||||||
return False
|
return False
|
||||||
|
|
||||||
psu_id = self.psu1_id if index == 1 else self.psu2_id
|
psu_id = self.psu1_id if index == 1 else self.psu2_id
|
||||||
self.ipmi_raw[8] = psu_id
|
res_string = self.run_command(self.ipmi_raw + ' ' + psu_id)
|
||||||
res_string = self.run_command(self.ipmi_raw)
|
|
||||||
status_byte = self.find_value(res_string)
|
status_byte = self.find_value(res_string)
|
||||||
|
|
||||||
if status_byte is None:
|
if status_byte is None:
|
||||||
@ -76,8 +76,7 @@ class PsuUtil(PsuBase):
|
|||||||
return False
|
return False
|
||||||
|
|
||||||
psu_id = self.psu1_id if index == 1 else self.psu2_id
|
psu_id = self.psu1_id if index == 1 else self.psu2_id
|
||||||
self.ipmi_raw[8] = psu_id
|
res_string = self.run_command(self.ipmi_raw + ' ' + psu_id)
|
||||||
res_string = self.run_command(self.ipmi_raw)
|
|
||||||
status_byte = self.find_value(res_string)
|
status_byte = self.find_value(res_string)
|
||||||
|
|
||||||
if status_byte is None:
|
if status_byte is None:
|
||||||
|
Some files were not shown because too many files have changed in this diff Show More
Reference in New Issue
Block a user