diff --git a/device/ragile/x86_64-ragile_ra-b6510-32c-r0/RA-B6510-32C/port_config.ini b/device/ragile/x86_64-ragile_ra-b6510-32c-r0/RA-B6510-32C/port_config.ini new file mode 100644 index 0000000000..0c6ea53b4c --- /dev/null +++ b/device/ragile/x86_64-ragile_ra-b6510-32c-r0/RA-B6510-32C/port_config.ini @@ -0,0 +1,33 @@ +# name lanes alias index speed +Ethernet1 5,6,7,8 hundredGigE0/1 0 100000 +Ethernet2 1,2,3,4 hundredGigE0/2 1 100000 +Ethernet3 13,14,15,16 hundredGigE0/3 2 100000 +Ethernet4 9,10,11,12 hundredGigE0/4 3 100000 +Ethernet5 21,22,23,24 hundredGigE0/5 4 100000 +Ethernet6 17,18,19,20 hundredGigE0/6 5 100000 +Ethernet7 29,30,31,32 hundredGigE0/7 6 100000 +Ethernet8 25,26,27,28 hundredGigE0/8 7 100000 +Ethernet9 37,38,39,40 hundredGigE0/9 8 100000 +Ethernet10 33,34,35,36 hundredGigE0/10 9 100000 +Ethernet11 45,46,47,48 hundredGigE0/11 10 100000 +Ethernet12 41,42,43,44 hundredGigE0/12 11 100000 +Ethernet13 53,54,55,56 hundredGigE0/13 12 100000 +Ethernet14 49,50,51,52 hundredGigE0/14 13 100000 +Ethernet15 61,62,63,64 hundredGigE0/15 14 100000 +Ethernet16 57,58,59,60 hundredGigE0/16 15 100000 +Ethernet17 69,70,71,72 hundredGigE0/17 16 100000 +Ethernet18 65,66,67,68 hundredGigE0/18 17 100000 +Ethernet19 77,78,79,80 hundredGigE0/19 18 100000 +Ethernet20 73,74,75,76 hundredGigE0/20 19 100000 +Ethernet21 85,86,87,88 hundredGigE0/21 20 100000 +Ethernet22 81,82,83,84 hundredGigE0/22 21 100000 +Ethernet23 93,94,95,96 hundredGigE0/23 22 100000 +Ethernet24 89,90,91,92 hundredGigE0/24 23 100000 +Ethernet25 101,102,103,104 hundredGigE0/25 24 100000 +Ethernet26 97,98,99,100 hundredGigE0/26 25 100000 +Ethernet27 109,110,111,112 hundredGigE0/27 26 100000 +Ethernet28 105,106,107,108 hundredGigE0/28 27 100000 +Ethernet29 117,118,119,120 hundredGigE0/29 28 100000 +Ethernet30 113,114,115,116 hundredGigE0/30 29 100000 +Ethernet31 125,126,127,128 hundredGigE0/31 30 100000 +Ethernet32 121,122,123,124 hundredGigE0/32 31 100000 diff --git a/device/ragile/x86_64-ragile_ra-b6510-32c-r0/RA-B6510-32C/sai.profile b/device/ragile/x86_64-ragile_ra-b6510-32c-r0/RA-B6510-32C/sai.profile new file mode 100644 index 0000000000..af208b17b7 --- /dev/null +++ b/device/ragile/x86_64-ragile_ra-b6510-32c-r0/RA-B6510-32C/sai.profile @@ -0,0 +1 @@ +SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/td3-ra-b6510-32c-32x100G.config.bcm diff --git a/device/ragile/x86_64-ragile_ra-b6510-32c-r0/RA-B6510-32C/td3-ra-b6510-32c-32x100G.config.bcm b/device/ragile/x86_64-ragile_ra-b6510-32c-r0/RA-B6510-32C/td3-ra-b6510-32c-32x100G.config.bcm new file mode 100644 index 0000000000..30780ab6ec --- /dev/null +++ b/device/ragile/x86_64-ragile_ra-b6510-32c-r0/RA-B6510-32C/td3-ra-b6510-32c-32x100G.config.bcm @@ -0,0 +1,453 @@ +cancun_dir=/usr/share/sonic/platform/cancun/sdk_6.5.16/ +l2_mem_entries=32768 +l3_mem_entries=16384 +l3_alpm_enable=2 +ipv6_lpm_128b_enable=0x1 +l2xmsg_mode=0 +l3_max_ecmp_mode=1 +bcm_num_cos=8 +bcm_stat_interval=2000000 +cdma_timeout_usec=3000000 +core_clock_frequency=1525 +dpp_clock_ratio=2:3 +help_cli_enable=1 +ifp_inports_support_enable=1 +#lpm_scaling_enable=1 +max_vp_lags=0 +mem_cache_enable=0 +memlist_enable=1 +miim_intr_enable=0 +module_64ports=1 +oversubscribe_mode=1 +parity_enable=0 +#pbmp_gport_stack.0=0x0000000000000000000000000000000000000000000000000000000000000000 +#pbmp_xport_xe.0=0x00000000000000000000000000000000888ffffffffffff9fffffffffffffffe +pbmp_xport_xe=0xffffffffffffffffffffffffffffffffffffffffe +phy_chain_rx_lane_map_physical{5.0}=0x0123 +phy_chain_rx_lane_map_physical{1.0}=0x0132 +phy_chain_rx_lane_map_physical{13.0}=0x0123 +phy_chain_rx_lane_map_physical{9.0}=0x0132 +phy_chain_rx_lane_map_physical{21.0}=0x0123 +phy_chain_rx_lane_map_physical{17.0}=0x0132 +phy_chain_rx_lane_map_physical{29.0}=0x0123 +phy_chain_rx_lane_map_physical{25.0}=0x0132 +phy_chain_rx_lane_map_physical{37.0}=0x0123 +phy_chain_rx_lane_map_physical{33.0}=0x0132 +phy_chain_rx_lane_map_physical{45.0}=0x0123 +phy_chain_rx_lane_map_physical{41.0}=0x0132 +phy_chain_rx_lane_map_physical{53.0}=0x0123 +phy_chain_rx_lane_map_physical{49.0}=0x0132 +phy_chain_rx_lane_map_physical{61.0}=0x0123 +phy_chain_rx_lane_map_physical{57.0}=0x0132 +phy_chain_rx_lane_map_physical{69.0}=0x2301 +phy_chain_rx_lane_map_physical{65.0}=0x2310 +phy_chain_rx_lane_map_physical{77.0}=0x2301 +phy_chain_rx_lane_map_physical{73.0}=0x2310 +phy_chain_rx_lane_map_physical{85.0}=0x2301 +phy_chain_rx_lane_map_physical{81.0}=0x2310 +phy_chain_rx_lane_map_physical{93.0}=0x2301 +phy_chain_rx_lane_map_physical{89.0}=0x2310 +phy_chain_rx_lane_map_physical{101.0}=0x2301 +phy_chain_rx_lane_map_physical{97.0}=0x2310 +phy_chain_rx_lane_map_physical{109.0}=0x2301 +phy_chain_rx_lane_map_physical{105.0}=0x2310 +phy_chain_rx_lane_map_physical{117.0}=0x2301 +phy_chain_rx_lane_map_physical{113.0}=0x2310 +phy_chain_rx_lane_map_physical{125.0}=0x2301 +phy_chain_rx_lane_map_physical{121.0}=0x2310 + +phy_chain_tx_lane_map_physical{5.0}=0x0123 +phy_chain_tx_lane_map_physical{1.0}=0x2031 +phy_chain_tx_lane_map_physical{13.0}=0x0123 +phy_chain_tx_lane_map_physical{9.0}=0x2031 +phy_chain_tx_lane_map_physical{21.0}=0x0123 +phy_chain_tx_lane_map_physical{17.0}=0x2031 +phy_chain_tx_lane_map_physical{29.0}=0x0123 +phy_chain_tx_lane_map_physical{25.0}=0x2031 +phy_chain_tx_lane_map_physical{37.0}=0x0123 +phy_chain_tx_lane_map_physical{33.0}=0x2031 +phy_chain_tx_lane_map_physical{45.0}=0x0123 +phy_chain_tx_lane_map_physical{41.0}=0x2031 +phy_chain_tx_lane_map_physical{53.0}=0x0123 +phy_chain_tx_lane_map_physical{49.0}=0x2031 +phy_chain_tx_lane_map_physical{61.0}=0x0123 +phy_chain_tx_lane_map_physical{57.0}=0x2031 +phy_chain_tx_lane_map_physical{69.0}=0x2301 +phy_chain_tx_lane_map_physical{65.0}=0x0213 +phy_chain_tx_lane_map_physical{77.0}=0x2301 +phy_chain_tx_lane_map_physical{73.0}=0x0213 +phy_chain_tx_lane_map_physical{85.0}=0x2301 +phy_chain_tx_lane_map_physical{81.0}=0x0213 +phy_chain_tx_lane_map_physical{93.0}=0x2301 +phy_chain_tx_lane_map_physical{89.0}=0x0213 +phy_chain_tx_lane_map_physical{101.0}=0x2301 +phy_chain_tx_lane_map_physical{97.0}=0x0213 +phy_chain_tx_lane_map_physical{109.0}=0x2301 +phy_chain_tx_lane_map_physical{105.0}=0x0213 +phy_chain_tx_lane_map_physical{117.0}=0x2301 +phy_chain_tx_lane_map_physical{113.0}=0x0213 +phy_chain_tx_lane_map_physical{125.0}=0x2301 +phy_chain_tx_lane_map_physical{121.0}=0x0213 + +phy_chain_rx_polarity_flip_physical{5.0}=0x0 +phy_chain_rx_polarity_flip_physical{6.0}=0x1 +phy_chain_rx_polarity_flip_physical{7.0}=0x1 +phy_chain_rx_polarity_flip_physical{8.0}=0x1 +phy_chain_rx_polarity_flip_physical{1.0}=0x0 +phy_chain_rx_polarity_flip_physical{2.0}=0x0 +phy_chain_rx_polarity_flip_physical{3.0}=0x1 +phy_chain_rx_polarity_flip_physical{4.0}=0x1 +phy_chain_rx_polarity_flip_physical{13.0}=0x0 +phy_chain_rx_polarity_flip_physical{14.0}=0x1 +phy_chain_rx_polarity_flip_physical{15.0}=0x1 +phy_chain_rx_polarity_flip_physical{16.0}=0x1 +phy_chain_rx_polarity_flip_physical{9.0}=0x0 +phy_chain_rx_polarity_flip_physical{10.0}=0x0 +phy_chain_rx_polarity_flip_physical{11.0}=0x1 +phy_chain_rx_polarity_flip_physical{12.0}=0x1 +phy_chain_rx_polarity_flip_physical{21.0}=0x0 +phy_chain_rx_polarity_flip_physical{22.0}=0x1 +phy_chain_rx_polarity_flip_physical{23.0}=0x1 +phy_chain_rx_polarity_flip_physical{24.0}=0x1 +phy_chain_rx_polarity_flip_physical{17.0}=0x0 +phy_chain_rx_polarity_flip_physical{18.0}=0x0 +phy_chain_rx_polarity_flip_physical{19.0}=0x1 +phy_chain_rx_polarity_flip_physical{20.0}=0x1 +phy_chain_rx_polarity_flip_physical{29.0}=0x1 +phy_chain_rx_polarity_flip_physical{30.0}=0x0 +phy_chain_rx_polarity_flip_physical{31.0}=0x0 +phy_chain_rx_polarity_flip_physical{32.0}=0x0 +phy_chain_rx_polarity_flip_physical{25.0}=0x1 +phy_chain_rx_polarity_flip_physical{26.0}=0x0 +phy_chain_rx_polarity_flip_physical{27.0}=0x0 +phy_chain_rx_polarity_flip_physical{28.0}=0x0 +phy_chain_rx_polarity_flip_physical{37.0}=0x1 +phy_chain_rx_polarity_flip_physical{38.0}=0x0 +phy_chain_rx_polarity_flip_physical{39.0}=0x0 +phy_chain_rx_polarity_flip_physical{40.0}=0x0 +phy_chain_rx_polarity_flip_physical{33.0}=0x1 +phy_chain_rx_polarity_flip_physical{34.0}=0x1 +phy_chain_rx_polarity_flip_physical{35.0}=0x0 +phy_chain_rx_polarity_flip_physical{36.0}=0x0 +phy_chain_rx_polarity_flip_physical{45.0}=0x1 +phy_chain_rx_polarity_flip_physical{46.0}=0x0 +phy_chain_rx_polarity_flip_physical{47.0}=0x0 +phy_chain_rx_polarity_flip_physical{48.0}=0x0 +phy_chain_rx_polarity_flip_physical{41.0}=0x1 +phy_chain_rx_polarity_flip_physical{42.0}=0x1 +phy_chain_rx_polarity_flip_physical{43.0}=0x0 +phy_chain_rx_polarity_flip_physical{44.0}=0x0 +phy_chain_rx_polarity_flip_physical{53.0}=0x1 +phy_chain_rx_polarity_flip_physical{54.0}=0x0 +phy_chain_rx_polarity_flip_physical{55.0}=0x0 +phy_chain_rx_polarity_flip_physical{56.0}=0x0 +phy_chain_rx_polarity_flip_physical{49.0}=0x1 +phy_chain_rx_polarity_flip_physical{50.0}=0x1 +phy_chain_rx_polarity_flip_physical{51.0}=0x0 +phy_chain_rx_polarity_flip_physical{52.0}=0x0 +phy_chain_rx_polarity_flip_physical{61.0}=0x1 +phy_chain_rx_polarity_flip_physical{62.0}=0x1 +phy_chain_rx_polarity_flip_physical{63.0}=0x0 +phy_chain_rx_polarity_flip_physical{64.0}=0x1 +phy_chain_rx_polarity_flip_physical{57.0}=0x1 +phy_chain_rx_polarity_flip_physical{58.0}=0x1 +phy_chain_rx_polarity_flip_physical{59.0}=0x0 +phy_chain_rx_polarity_flip_physical{60.0}=0x0 +phy_chain_rx_polarity_flip_physical{69.0}=0x1 +phy_chain_rx_polarity_flip_physical{70.0}=0x0 +phy_chain_rx_polarity_flip_physical{71.0}=0x0 +phy_chain_rx_polarity_flip_physical{72.0}=0x0 +phy_chain_rx_polarity_flip_physical{65.0}=0x1 +phy_chain_rx_polarity_flip_physical{66.0}=0x0 +phy_chain_rx_polarity_flip_physical{67.0}=0x0 +phy_chain_rx_polarity_flip_physical{68.0}=0x0 +phy_chain_rx_polarity_flip_physical{77.0}=0x1 +phy_chain_rx_polarity_flip_physical{78.0}=0x0 +phy_chain_rx_polarity_flip_physical{79.0}=0x0 +phy_chain_rx_polarity_flip_physical{80.0}=0x0 +phy_chain_rx_polarity_flip_physical{73.0}=0x1 +phy_chain_rx_polarity_flip_physical{74.0}=0x0 +phy_chain_rx_polarity_flip_physical{75.0}=0x0 +phy_chain_rx_polarity_flip_physical{76.0}=0x0 +phy_chain_rx_polarity_flip_physical{85.0}=0x1 +phy_chain_rx_polarity_flip_physical{86.0}=0x0 +phy_chain_rx_polarity_flip_physical{87.0}=0x0 +phy_chain_rx_polarity_flip_physical{88.0}=0x0 +phy_chain_rx_polarity_flip_physical{81.0}=0x1 +phy_chain_rx_polarity_flip_physical{82.0}=0x0 +phy_chain_rx_polarity_flip_physical{83.0}=0x0 +phy_chain_rx_polarity_flip_physical{84.0}=0x0 +phy_chain_rx_polarity_flip_physical{93.0}=0x1 +phy_chain_rx_polarity_flip_physical{94.0}=0x0 +phy_chain_rx_polarity_flip_physical{95.0}=0x0 +phy_chain_rx_polarity_flip_physical{96.0}=0x0 +phy_chain_rx_polarity_flip_physical{89.0}=0x1 +phy_chain_rx_polarity_flip_physical{90.0}=0x0 +phy_chain_rx_polarity_flip_physical{91.0}=0x0 +phy_chain_rx_polarity_flip_physical{92.0}=0x0 +phy_chain_rx_polarity_flip_physical{101.0}=0x1 +phy_chain_rx_polarity_flip_physical{102.0}=0x0 +phy_chain_rx_polarity_flip_physical{103.0}=0x0 +phy_chain_rx_polarity_flip_physical{104.0}=0x0 +phy_chain_rx_polarity_flip_physical{97.0}=0x1 +phy_chain_rx_polarity_flip_physical{98.0}=0x0 +phy_chain_rx_polarity_flip_physical{99.0}=0x0 +phy_chain_rx_polarity_flip_physical{100.0}=0x0 +phy_chain_rx_polarity_flip_physical{109.0}=0x0 +phy_chain_rx_polarity_flip_physical{110.0}=0x1 +phy_chain_rx_polarity_flip_physical{111.0}=0x1 +phy_chain_rx_polarity_flip_physical{112.0}=0x1 +phy_chain_rx_polarity_flip_physical{105.0}=0x0 +phy_chain_rx_polarity_flip_physical{106.0}=0x1 +phy_chain_rx_polarity_flip_physical{107.0}=0x1 +phy_chain_rx_polarity_flip_physical{108.0}=0x1 +phy_chain_rx_polarity_flip_physical{117.0}=0x0 +phy_chain_rx_polarity_flip_physical{118.0}=0x1 +phy_chain_rx_polarity_flip_physical{119.0}=0x1 +phy_chain_rx_polarity_flip_physical{120.0}=0x1 +phy_chain_rx_polarity_flip_physical{113.0}=0x0 +phy_chain_rx_polarity_flip_physical{114.0}=0x1 +phy_chain_rx_polarity_flip_physical{115.0}=0x1 +phy_chain_rx_polarity_flip_physical{116.0}=0x1 +phy_chain_rx_polarity_flip_physical{125.0}=0x0 +phy_chain_rx_polarity_flip_physical{126.0}=0x1 +phy_chain_rx_polarity_flip_physical{127.0}=0x1 +phy_chain_rx_polarity_flip_physical{128.0}=0x1 +phy_chain_rx_polarity_flip_physical{121.0}=0x0 +phy_chain_rx_polarity_flip_physical{122.0}=0x1 +phy_chain_rx_polarity_flip_physical{123.0}=0x1 +phy_chain_rx_polarity_flip_physical{124.0}=0x1 + +phy_chain_tx_polarity_flip_physical{5.0}=0x1 +phy_chain_tx_polarity_flip_physical{6.0}=0x0 +phy_chain_tx_polarity_flip_physical{7.0}=0x1 +phy_chain_tx_polarity_flip_physical{8.0}=0x0 +phy_chain_tx_polarity_flip_physical{1.0}=0x0 +phy_chain_tx_polarity_flip_physical{2.0}=0x1 +phy_chain_tx_polarity_flip_physical{3.0}=0x1 +phy_chain_tx_polarity_flip_physical{4.0}=0x0 +phy_chain_tx_polarity_flip_physical{13.0}=0x1 +phy_chain_tx_polarity_flip_physical{14.0}=0x0 +phy_chain_tx_polarity_flip_physical{15.0}=0x1 +phy_chain_tx_polarity_flip_physical{16.0}=0x0 +phy_chain_tx_polarity_flip_physical{9.0}=0x0 +phy_chain_tx_polarity_flip_physical{10.0}=0x1 +phy_chain_tx_polarity_flip_physical{11.0}=0x1 +phy_chain_tx_polarity_flip_physical{12.0}=0x0 +phy_chain_tx_polarity_flip_physical{21.0}=0x1 +phy_chain_tx_polarity_flip_physical{22.0}=0x0 +phy_chain_tx_polarity_flip_physical{23.0}=0x1 +phy_chain_tx_polarity_flip_physical{24.0}=0x0 +phy_chain_tx_polarity_flip_physical{17.0}=0x0 +phy_chain_tx_polarity_flip_physical{18.0}=0x1 +phy_chain_tx_polarity_flip_physical{19.0}=0x1 +phy_chain_tx_polarity_flip_physical{20.0}=0x0 +phy_chain_tx_polarity_flip_physical{29.0}=0x1 +phy_chain_tx_polarity_flip_physical{30.0}=0x0 +phy_chain_tx_polarity_flip_physical{31.0}=0x1 +phy_chain_tx_polarity_flip_physical{32.0}=0x0 +phy_chain_tx_polarity_flip_physical{25.0}=0x0 +phy_chain_tx_polarity_flip_physical{26.0}=0x1 +phy_chain_tx_polarity_flip_physical{27.0}=0x1 +phy_chain_tx_polarity_flip_physical{28.0}=0x0 +phy_chain_tx_polarity_flip_physical{37.0}=0x1 +phy_chain_tx_polarity_flip_physical{38.0}=0x0 +phy_chain_tx_polarity_flip_physical{39.0}=0x1 +phy_chain_tx_polarity_flip_physical{40.0}=0x0 +phy_chain_tx_polarity_flip_physical{33.0}=0x0 +phy_chain_tx_polarity_flip_physical{34.0}=0x1 +phy_chain_tx_polarity_flip_physical{35.0}=0x1 +phy_chain_tx_polarity_flip_physical{36.0}=0x0 +phy_chain_tx_polarity_flip_physical{45.0}=0x1 +phy_chain_tx_polarity_flip_physical{46.0}=0x0 +phy_chain_tx_polarity_flip_physical{47.0}=0x1 +phy_chain_tx_polarity_flip_physical{48.0}=0x0 +phy_chain_tx_polarity_flip_physical{41.0}=0x0 +phy_chain_tx_polarity_flip_physical{42.0}=0x1 +phy_chain_tx_polarity_flip_physical{43.0}=0x1 +phy_chain_tx_polarity_flip_physical{44.0}=0x1 +phy_chain_tx_polarity_flip_physical{53.0}=0x0 +phy_chain_tx_polarity_flip_physical{54.0}=0x0 +phy_chain_tx_polarity_flip_physical{55.0}=0x1 +phy_chain_tx_polarity_flip_physical{56.0}=0x1 +phy_chain_tx_polarity_flip_physical{49.0}=0x0 +phy_chain_tx_polarity_flip_physical{50.0}=0x1 +phy_chain_tx_polarity_flip_physical{51.0}=0x1 +phy_chain_tx_polarity_flip_physical{52.0}=0x0 +phy_chain_tx_polarity_flip_physical{61.0}=0x1 +phy_chain_tx_polarity_flip_physical{62.0}=0x0 +phy_chain_tx_polarity_flip_physical{63.0}=0x1 +phy_chain_tx_polarity_flip_physical{64.0}=0x1 +phy_chain_tx_polarity_flip_physical{57.0}=0x0 +phy_chain_tx_polarity_flip_physical{58.0}=0x1 +phy_chain_tx_polarity_flip_physical{59.0}=0x1 +phy_chain_tx_polarity_flip_physical{60.0}=0x0 +phy_chain_tx_polarity_flip_physical{69.0}=0x0 +phy_chain_tx_polarity_flip_physical{70.0}=0x1 +phy_chain_tx_polarity_flip_physical{71.0}=0x0 +phy_chain_tx_polarity_flip_physical{72.0}=0x1 +phy_chain_tx_polarity_flip_physical{65.0}=0x1 +phy_chain_tx_polarity_flip_physical{66.0}=0x0 +phy_chain_tx_polarity_flip_physical{67.0}=0x0 +phy_chain_tx_polarity_flip_physical{68.0}=0x1 +phy_chain_tx_polarity_flip_physical{77.0}=0x0 +phy_chain_tx_polarity_flip_physical{78.0}=0x1 +phy_chain_tx_polarity_flip_physical{79.0}=0x0 +phy_chain_tx_polarity_flip_physical{80.0}=0x1 +phy_chain_tx_polarity_flip_physical{73.0}=0x1 +phy_chain_tx_polarity_flip_physical{74.0}=0x0 +phy_chain_tx_polarity_flip_physical{75.0}=0x0 +phy_chain_tx_polarity_flip_physical{76.0}=0x1 +phy_chain_tx_polarity_flip_physical{85.0}=0x0 +phy_chain_tx_polarity_flip_physical{86.0}=0x1 +phy_chain_tx_polarity_flip_physical{87.0}=0x0 +phy_chain_tx_polarity_flip_physical{88.0}=0x1 +phy_chain_tx_polarity_flip_physical{81.0}=0x1 +phy_chain_tx_polarity_flip_physical{82.0}=0x0 +phy_chain_tx_polarity_flip_physical{83.0}=0x0 +phy_chain_tx_polarity_flip_physical{84.0}=0x1 +phy_chain_tx_polarity_flip_physical{93.0}=0x0 +phy_chain_tx_polarity_flip_physical{94.0}=0x1 +phy_chain_tx_polarity_flip_physical{95.0}=0x0 +phy_chain_tx_polarity_flip_physical{96.0}=0x1 +phy_chain_tx_polarity_flip_physical{89.0}=0x1 +phy_chain_tx_polarity_flip_physical{90.0}=0x0 +phy_chain_tx_polarity_flip_physical{91.0}=0x0 +phy_chain_tx_polarity_flip_physical{92.0}=0x1 +phy_chain_tx_polarity_flip_physical{101.0}=0x0 +phy_chain_tx_polarity_flip_physical{102.0}=0x1 +phy_chain_tx_polarity_flip_physical{103.0}=0x0 +phy_chain_tx_polarity_flip_physical{104.0}=0x1 +phy_chain_tx_polarity_flip_physical{97.0}=0x1 +phy_chain_tx_polarity_flip_physical{98.0}=0x0 +phy_chain_tx_polarity_flip_physical{99.0}=0x0 +phy_chain_tx_polarity_flip_physical{100.0}=0x1 +phy_chain_tx_polarity_flip_physical{109.0}=0x0 +phy_chain_tx_polarity_flip_physical{110.0}=0x1 +phy_chain_tx_polarity_flip_physical{111.0}=0x0 +phy_chain_tx_polarity_flip_physical{112.0}=0x1 +phy_chain_tx_polarity_flip_physical{105.0}=0x1 +phy_chain_tx_polarity_flip_physical{106.0}=0x0 +phy_chain_tx_polarity_flip_physical{107.0}=0x0 +phy_chain_tx_polarity_flip_physical{108.0}=0x1 +phy_chain_tx_polarity_flip_physical{117.0}=0x0 +phy_chain_tx_polarity_flip_physical{118.0}=0x1 +phy_chain_tx_polarity_flip_physical{119.0}=0x0 +phy_chain_tx_polarity_flip_physical{120.0}=0x1 +phy_chain_tx_polarity_flip_physical{113.0}=0x1 +phy_chain_tx_polarity_flip_physical{114.0}=0x0 +phy_chain_tx_polarity_flip_physical{115.0}=0x0 +phy_chain_tx_polarity_flip_physical{116.0}=0x1 +phy_chain_tx_polarity_flip_physical{125.0}=0x0 +phy_chain_tx_polarity_flip_physical{126.0}=0x1 +phy_chain_tx_polarity_flip_physical{127.0}=0x0 +phy_chain_tx_polarity_flip_physical{128.0}=0x1 +phy_chain_tx_polarity_flip_physical{121.0}=0x1 +phy_chain_tx_polarity_flip_physical{122.0}=0x0 +phy_chain_tx_polarity_flip_physical{123.0}=0x0 +phy_chain_tx_polarity_flip_physical{124.0}=0x1 +port_flex_enable=1 +portmap_5=5:100 +portmap_1=1:100 +portmap_13=13:100 +portmap_9=9:100 +portmap_21=21:100 +portmap_17=17:100 +portmap_29=29:100 +portmap_25=25:100 +portmap_37=37:100 +portmap_33=33:100 +portmap_45=45:100 +portmap_41=41:100 +portmap_53=53:100 +portmap_49=49:100 +portmap_61=61:100 +portmap_57=57:100 +portmap_71=69:100 +portmap_67=65:100 +portmap_79=77:100 +portmap_75=73:100 +portmap_87=85:100 +portmap_83=81:100 +portmap_95=93:100 +portmap_91=89:100 +portmap_103=101:100 +portmap_99=97:100 +portmap_111=109:100 +portmap_107=105:100 +portmap_119=117:100 +portmap_115=113:100 +portmap_127=125:100 +portmap_123=121:100 + +dport_map_port_5=1 +dport_map_port_1=2 +dport_map_port_13=3 +dport_map_port_9=4 +dport_map_port_21=5 +dport_map_port_17=6 +dport_map_port_29=7 +dport_map_port_25=8 +dport_map_port_37=9 +dport_map_port_33=10 +dport_map_port_45=11 +dport_map_port_41=12 +dport_map_port_53=13 +dport_map_port_49=14 +dport_map_port_61=15 +dport_map_port_57=16 +dport_map_port_71=17 +dport_map_port_67=18 +dport_map_port_79=19 +dport_map_port_75=20 +dport_map_port_87=21 +dport_map_port_83=22 +dport_map_port_95=23 +dport_map_port_91=24 +dport_map_port_103=25 +dport_map_port_99=26 +dport_map_port_111=27 +dport_map_port_107=28 +dport_map_port_119=29 +dport_map_port_115=30 +dport_map_port_127=31 +dport_map_port_123=32 + +serdes_if_type_5=14 +serdes_if_type_1=14 +serdes_if_type_13=14 +serdes_if_type_9=14 +serdes_if_type_21=14 +serdes_if_type_17=14 +serdes_if_type_29=14 +serdes_if_type_25=14 +serdes_if_type_37=14 +serdes_if_type_33=14 +serdes_if_type_45=14 +serdes_if_type_41=14 +serdes_if_type_53=14 +serdes_if_type_49=14 +serdes_if_type_61=14 +serdes_if_type_57=14 +serdes_if_type_71=14 +serdes_if_type_67=14 +serdes_if_type_79=14 +serdes_if_type_75=14 +serdes_if_type_87=14 +serdes_if_type_83=14 +serdes_if_type_95=14 +serdes_if_type_91=14 +serdes_if_type_103=14 +serdes_if_type_99=14 +serdes_if_type_111=14 +serdes_if_type_107=14 +serdes_if_type_119=14 +serdes_if_type_115=14 +serdes_if_type_127=14 +serdes_if_type_123=14 + +reglist_enable=1 +scache_filename=/tmp/scache +schan_intr_enable=0 +stable_size=0x5500000 +tdma_timeout_usec=3000000 diff --git a/device/ragile/x86_64-ragile_ra-b6510-32c-r0/bcm.rc b/device/ragile/x86_64-ragile_ra-b6510-32c-r0/bcm.rc new file mode 100644 index 0000000000..7f69f10d3b --- /dev/null +++ b/device/ragile/x86_64-ragile_ra-b6510-32c-r0/bcm.rc @@ -0,0 +1 @@ +rcload /usr/share/sonic/platform/led_proc_init.soc diff --git a/device/ragile/x86_64-ragile_ra-b6510-32c-r0/bcm_pre.rc b/device/ragile/x86_64-ragile_ra-b6510-32c-r0/bcm_pre.rc new file mode 100644 index 0000000000..ff9e519180 --- /dev/null +++ b/device/ragile/x86_64-ragile_ra-b6510-32c-r0/bcm_pre.rc @@ -0,0 +1 @@ +m0 load 0 0 /usr/share/sonic/platform/linkscan_led.bin diff --git a/device/ragile/x86_64-ragile_ra-b6510-32c-r0/cancun/sdk_6.5.12/bcm56870_a0_cch.pkg b/device/ragile/x86_64-ragile_ra-b6510-32c-r0/cancun/sdk_6.5.12/bcm56870_a0_cch.pkg new file mode 100644 index 0000000000..26c3c437a5 Binary files /dev/null and b/device/ragile/x86_64-ragile_ra-b6510-32c-r0/cancun/sdk_6.5.12/bcm56870_a0_cch.pkg differ diff --git a/device/ragile/x86_64-ragile_ra-b6510-32c-r0/cancun/sdk_6.5.12/bcm56870_a0_ceh.pkg b/device/ragile/x86_64-ragile_ra-b6510-32c-r0/cancun/sdk_6.5.12/bcm56870_a0_ceh.pkg new file mode 100644 index 0000000000..a429810ef5 Binary files /dev/null and b/device/ragile/x86_64-ragile_ra-b6510-32c-r0/cancun/sdk_6.5.12/bcm56870_a0_ceh.pkg differ diff --git a/device/ragile/x86_64-ragile_ra-b6510-32c-r0/cancun/sdk_6.5.12/bcm56870_a0_cfh.pkg b/device/ragile/x86_64-ragile_ra-b6510-32c-r0/cancun/sdk_6.5.12/bcm56870_a0_cfh.pkg new file mode 100644 index 0000000000..4fc198389b Binary files /dev/null and b/device/ragile/x86_64-ragile_ra-b6510-32c-r0/cancun/sdk_6.5.12/bcm56870_a0_cfh.pkg differ diff --git a/device/ragile/x86_64-ragile_ra-b6510-32c-r0/cancun/sdk_6.5.12/bcm56870_a0_cih.pkg b/device/ragile/x86_64-ragile_ra-b6510-32c-r0/cancun/sdk_6.5.12/bcm56870_a0_cih.pkg new file mode 100644 index 0000000000..4478c1c690 Binary files /dev/null and b/device/ragile/x86_64-ragile_ra-b6510-32c-r0/cancun/sdk_6.5.12/bcm56870_a0_cih.pkg differ diff --git a/device/ragile/x86_64-ragile_ra-b6510-32c-r0/cancun/sdk_6.5.12/bcm56870_a0_cmh.pkg b/device/ragile/x86_64-ragile_ra-b6510-32c-r0/cancun/sdk_6.5.12/bcm56870_a0_cmh.pkg new file mode 100644 index 0000000000..3abde95310 Binary files /dev/null and b/device/ragile/x86_64-ragile_ra-b6510-32c-r0/cancun/sdk_6.5.12/bcm56870_a0_cmh.pkg differ diff --git a/device/ragile/x86_64-ragile_ra-b6510-32c-r0/cancun/sdk_6.5.13/bcm56870_a0_cch.pkg b/device/ragile/x86_64-ragile_ra-b6510-32c-r0/cancun/sdk_6.5.13/bcm56870_a0_cch.pkg new file mode 100644 index 0000000000..f165b122e8 Binary files /dev/null and b/device/ragile/x86_64-ragile_ra-b6510-32c-r0/cancun/sdk_6.5.13/bcm56870_a0_cch.pkg differ diff --git a/device/ragile/x86_64-ragile_ra-b6510-32c-r0/cancun/sdk_6.5.13/bcm56870_a0_ceh.pkg b/device/ragile/x86_64-ragile_ra-b6510-32c-r0/cancun/sdk_6.5.13/bcm56870_a0_ceh.pkg new file mode 100644 index 0000000000..9f33b76ac5 Binary files /dev/null and b/device/ragile/x86_64-ragile_ra-b6510-32c-r0/cancun/sdk_6.5.13/bcm56870_a0_ceh.pkg differ diff --git a/device/ragile/x86_64-ragile_ra-b6510-32c-r0/cancun/sdk_6.5.13/bcm56870_a0_cfh.pkg b/device/ragile/x86_64-ragile_ra-b6510-32c-r0/cancun/sdk_6.5.13/bcm56870_a0_cfh.pkg new file mode 100644 index 0000000000..00c3a165f9 Binary files /dev/null and b/device/ragile/x86_64-ragile_ra-b6510-32c-r0/cancun/sdk_6.5.13/bcm56870_a0_cfh.pkg differ diff --git a/device/ragile/x86_64-ragile_ra-b6510-32c-r0/cancun/sdk_6.5.13/bcm56870_a0_cih.pkg b/device/ragile/x86_64-ragile_ra-b6510-32c-r0/cancun/sdk_6.5.13/bcm56870_a0_cih.pkg new file mode 100644 index 0000000000..f1ddf59cc6 Binary files /dev/null and b/device/ragile/x86_64-ragile_ra-b6510-32c-r0/cancun/sdk_6.5.13/bcm56870_a0_cih.pkg differ diff --git a/device/ragile/x86_64-ragile_ra-b6510-32c-r0/cancun/sdk_6.5.13/bcm56870_a0_cmh.pkg b/device/ragile/x86_64-ragile_ra-b6510-32c-r0/cancun/sdk_6.5.13/bcm56870_a0_cmh.pkg new file mode 100644 index 0000000000..0ad55fd95f Binary files /dev/null and b/device/ragile/x86_64-ragile_ra-b6510-32c-r0/cancun/sdk_6.5.13/bcm56870_a0_cmh.pkg differ diff --git a/device/ragile/x86_64-ragile_ra-b6510-32c-r0/cancun/sdk_6.5.14/bcm56870_a0_cch.pkg b/device/ragile/x86_64-ragile_ra-b6510-32c-r0/cancun/sdk_6.5.14/bcm56870_a0_cch.pkg new file mode 100644 index 0000000000..53f595b57e Binary files /dev/null and b/device/ragile/x86_64-ragile_ra-b6510-32c-r0/cancun/sdk_6.5.14/bcm56870_a0_cch.pkg differ diff --git a/device/ragile/x86_64-ragile_ra-b6510-32c-r0/cancun/sdk_6.5.14/bcm56870_a0_ceh.pkg b/device/ragile/x86_64-ragile_ra-b6510-32c-r0/cancun/sdk_6.5.14/bcm56870_a0_ceh.pkg new file mode 100644 index 0000000000..71c48f21a7 Binary files /dev/null and b/device/ragile/x86_64-ragile_ra-b6510-32c-r0/cancun/sdk_6.5.14/bcm56870_a0_ceh.pkg differ diff --git a/device/ragile/x86_64-ragile_ra-b6510-32c-r0/cancun/sdk_6.5.14/bcm56870_a0_cfh.pkg b/device/ragile/x86_64-ragile_ra-b6510-32c-r0/cancun/sdk_6.5.14/bcm56870_a0_cfh.pkg new file mode 100644 index 0000000000..98d868f76b Binary files /dev/null and b/device/ragile/x86_64-ragile_ra-b6510-32c-r0/cancun/sdk_6.5.14/bcm56870_a0_cfh.pkg differ diff --git a/device/ragile/x86_64-ragile_ra-b6510-32c-r0/cancun/sdk_6.5.14/bcm56870_a0_cih.pkg b/device/ragile/x86_64-ragile_ra-b6510-32c-r0/cancun/sdk_6.5.14/bcm56870_a0_cih.pkg new file mode 100644 index 0000000000..73a0be0e8e Binary files /dev/null and b/device/ragile/x86_64-ragile_ra-b6510-32c-r0/cancun/sdk_6.5.14/bcm56870_a0_cih.pkg differ diff --git a/device/ragile/x86_64-ragile_ra-b6510-32c-r0/cancun/sdk_6.5.14/bcm56870_a0_cmh.pkg b/device/ragile/x86_64-ragile_ra-b6510-32c-r0/cancun/sdk_6.5.14/bcm56870_a0_cmh.pkg new file mode 100644 index 0000000000..b728bfd5a7 Binary files /dev/null and b/device/ragile/x86_64-ragile_ra-b6510-32c-r0/cancun/sdk_6.5.14/bcm56870_a0_cmh.pkg differ diff --git a/device/ragile/x86_64-ragile_ra-b6510-32c-r0/cancun/sdk_6.5.16/bcm56870_a0_cch.pkg b/device/ragile/x86_64-ragile_ra-b6510-32c-r0/cancun/sdk_6.5.16/bcm56870_a0_cch.pkg new file mode 100644 index 0000000000..a921132b97 Binary files /dev/null and b/device/ragile/x86_64-ragile_ra-b6510-32c-r0/cancun/sdk_6.5.16/bcm56870_a0_cch.pkg differ diff --git a/device/ragile/x86_64-ragile_ra-b6510-32c-r0/cancun/sdk_6.5.16/bcm56870_a0_ceh.pkg b/device/ragile/x86_64-ragile_ra-b6510-32c-r0/cancun/sdk_6.5.16/bcm56870_a0_ceh.pkg new file mode 100644 index 0000000000..aaa24ebeec Binary files /dev/null and b/device/ragile/x86_64-ragile_ra-b6510-32c-r0/cancun/sdk_6.5.16/bcm56870_a0_ceh.pkg differ diff --git a/device/ragile/x86_64-ragile_ra-b6510-32c-r0/cancun/sdk_6.5.16/bcm56870_a0_cfh.pkg b/device/ragile/x86_64-ragile_ra-b6510-32c-r0/cancun/sdk_6.5.16/bcm56870_a0_cfh.pkg new file mode 100644 index 0000000000..c4acd218b0 Binary files /dev/null and b/device/ragile/x86_64-ragile_ra-b6510-32c-r0/cancun/sdk_6.5.16/bcm56870_a0_cfh.pkg differ diff --git a/device/ragile/x86_64-ragile_ra-b6510-32c-r0/cancun/sdk_6.5.16/bcm56870_a0_cih.pkg b/device/ragile/x86_64-ragile_ra-b6510-32c-r0/cancun/sdk_6.5.16/bcm56870_a0_cih.pkg new file mode 100644 index 0000000000..a92ae2cf13 Binary files /dev/null and b/device/ragile/x86_64-ragile_ra-b6510-32c-r0/cancun/sdk_6.5.16/bcm56870_a0_cih.pkg differ diff --git a/device/ragile/x86_64-ragile_ra-b6510-32c-r0/cancun/sdk_6.5.16/bcm56870_a0_cmh.pkg b/device/ragile/x86_64-ragile_ra-b6510-32c-r0/cancun/sdk_6.5.16/bcm56870_a0_cmh.pkg new file mode 100644 index 0000000000..74e52b26c9 Binary files /dev/null and b/device/ragile/x86_64-ragile_ra-b6510-32c-r0/cancun/sdk_6.5.16/bcm56870_a0_cmh.pkg differ diff --git a/device/ragile/x86_64-ragile_ra-b6510-32c-r0/custom_led.bin b/device/ragile/x86_64-ragile_ra-b6510-32c-r0/custom_led.bin new file mode 100644 index 0000000000..2800e7b4ee Binary files /dev/null and b/device/ragile/x86_64-ragile_ra-b6510-32c-r0/custom_led.bin differ diff --git a/device/ragile/x86_64-ragile_ra-b6510-32c-r0/default_sku b/device/ragile/x86_64-ragile_ra-b6510-32c-r0/default_sku new file mode 100644 index 0000000000..0a01812d6b --- /dev/null +++ b/device/ragile/x86_64-ragile_ra-b6510-32c-r0/default_sku @@ -0,0 +1 @@ +RA-B6510-32C t1 diff --git a/device/ragile/x86_64-ragile_ra-b6510-32c-r0/dev.xml b/device/ragile/x86_64-ragile_ra-b6510-32c-r0/dev.xml new file mode 100644 index 0000000000..7438d26a39 --- /dev/null +++ b/device/ragile/x86_64-ragile_ra-b6510-32c-r0/dev.xml @@ -0,0 +1,136 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/device/ragile/x86_64-ragile_ra-b6510-32c-r0/fantlv.py b/device/ragile/x86_64-ragile_ra-b6510-32c-r0/fantlv.py new file mode 100644 index 0000000000..3eeaeb0948 --- /dev/null +++ b/device/ragile/x86_64-ragile_ra-b6510-32c-r0/fantlv.py @@ -0,0 +1,217 @@ +#!/usr/bin/python +# -*- coding: utf-8 -*- + +class FantlvException(Exception): + def __init__(self, message='fantlverror', code=-100): + err = 'errcode: {0} message:{1}'.format(code, message) + Exception.__init__(self, err) + self.code = code + self.message = message + +class fan_tlv(object): + HEAD_INFO = "\x01\x7e\x01\xf1" + VERSION = 0x01 + FLAG = 0x7E + HW_VER = 0X01 + TYPE = 0xf1 + TLV_LEN = 00 + _FAN_TLV_HDR_LEN = 6 + _FAN_TLV_CRC_LEN = 2 + + _FAN_TLV_TYPE_NAME = 0x02 + _FAN_TLV_TYPE_SN = 0x03 + _FAN_TLV_TYPE_HW_INFO = 0x05 + _FAN_TLV_TYPE_DEV_TYPE = 0x06 + + _fandecodetime = 0 + + @property + def dstatus(self): + return self._dstatus + + @property + def typename(self): + return self._typename + + @property + def typesn(self): + return self._typesn + + @property + def typehwinfo(self): + return self._typehwinfo + + @property + def typedevtype(self): + return self._typedevtype + + @property + def fanbus(self): + return self._fanbus + + @property + def fanloc(self): + return self._fanloc + + @property + def fandecodetime(self): + return self._fandecodetime + + def __init__(self): + self._typename = "" + self._typesn = "" + self._typehwinfo = "" + self._typedevtype = "" + self._dstatus = 0 + + def strtoarr(self, string): + s = [] + if not isinstance(string, str): + return s + for index in string: + s.append(index) + return s + + def str_to_hex(self,rest_v): + value = 0 + for index in range(len(rest_v)): + value |= ord(rest_v[index]) << ((len(rest_v) - index - 1) * 8) + return value + + def hex_to_str(self,s): + len_t = len(s) + if len_t % 2 != 0: + return 0 + ret = "" + for t in range(0, int(len_t / 2)): + ret += chr(int(s[2 * t:2 * t + 2], 16)) + return ret + + def generate_fan_value(self): + bin_buffer = [chr(0xff)] * 256 + bin_buffer[0] = chr(self.VERSION) + bin_buffer[1] = chr(self.FLAG) + bin_buffer[2] = chr(self.HW_VER) + bin_buffer[3] = chr(self.TYPE) + + temp_t = "%08x" % self.typedevtype + typedevtype_t = self.hex_to_str(temp_t) + total_len = len(self.typename) + len(self.typesn) + \ + len(self.typehwinfo) + len(typedevtype_t) + 8 + + bin_buffer[4] = chr(total_len >> 8) + bin_buffer[5] = chr(total_len & 0x00FF) + + index_start = 6 + bin_buffer[index_start] = chr(self._FAN_TLV_TYPE_NAME) + bin_buffer[index_start + 1] = chr(len(self.typename)) + bin_buffer[index_start + 2: index_start + 2 + + len(self.typename)] = self.strtoarr(self.typename) + index_start = index_start + 2 + len(self.typename) + + bin_buffer[index_start] = chr(self._FAN_TLV_TYPE_SN) + bin_buffer[index_start + 1] = chr(len(self.typesn)) + bin_buffer[index_start + 2:index_start + 2 + + len(self.typesn)] = self.strtoarr(self.typesn) + index_start = index_start + 2 + len(self.typesn) + + bin_buffer[index_start] = chr(self._FAN_TLV_TYPE_HW_INFO) + bin_buffer[index_start + 1] = chr(len(self.typehwinfo)) + bin_buffer[index_start + 2:index_start + 2 + + len(self.typehwinfo)] = self.strtoarr(self.typehwinfo) + index_start = index_start + 2 + len(self.typehwinfo) + + bin_buffer[index_start] = chr(self._FAN_TLV_TYPE_DEV_TYPE) + bin_buffer[index_start + 1] = chr(len(typedevtype_t)) + bin_buffer[index_start + 2:index_start + 2 + + len(typedevtype_t)] = self.strtoarr(typedevtype_t) + index_start = index_start + 2 + len(typedevtype_t) + + crcs = fan_tlv.fancrc(''.join(bin_buffer[0:index_start])) + bin_buffer[index_start] = chr(crcs >> 8) + bin_buffer[index_start + 1] = chr(crcs & 0x00ff) + # printvalue(bin_buffer) + return bin_buffer + + def encode(self): + pass + + def decode(self, e2): + if e2[0:4] != self.HEAD_INFO: + raise FantlvException("Fan tlv head info error,not fan tlv type", -10) + ret = [] + self.VERSION = ord(e2[0]) + self.FLAG = ord(e2[1]) + self.HW_VER = ord(e2[2]) + self.TYPE = ord(e2[3]) + self.TLV_LEN = (ord(e2[4]) << 8) | ord(e2[5]) + + tlv_index = self._FAN_TLV_HDR_LEN + tlv_end = self._FAN_TLV_HDR_LEN + self.TLV_LEN + + if len(e2) < self._FAN_TLV_HDR_LEN + self.TLV_LEN + 2: + raise FantlvException("Fan tlv eeprom len error!", -2) + sumcrc = fan_tlv.fancrc(e2[0:self._FAN_TLV_HDR_LEN + self.TLV_LEN]) + readcrc = ord(e2[self._FAN_TLV_HDR_LEN + self.TLV_LEN] + ) << 8 | ord(e2[self._FAN_TLV_HDR_LEN + self.TLV_LEN + 1]) + if sumcrc != readcrc: + raise FantlvException("Fan tlv eeprom checksum error!", -1) + else: + self._dstatus = 0 + while (tlv_index + 2) < len(e2) and tlv_index < tlv_end: + s = self.decoder( + e2[tlv_index:tlv_index + 2 + ord(e2[tlv_index + 1])]) + tlv_index += ord(e2[tlv_index + 1]) + 2 + ret.append(s) + # sumcrc = fan_tlv.fancrc(e2[0:self._FAN_TLV_HDR_LEN + self.TLV_LEN]) + + return ret + + @staticmethod + def fancrc(t): + sum = 0 + for index in range(len(t)): + sum += ord(t[index]) + return sum + + def decoder(self, t): + try: + name = "" + value = "" + if ord(t[0]) == self._FAN_TLV_TYPE_NAME: + name = "Product Name" + _len = ord(t[1]) + value = t[2:2 + ord(t[1])] + self._typename = value + elif ord(t[0]) == self._FAN_TLV_TYPE_SN: + name = "serial Number" + _len = ord(t[1]) + value = t[2:2 + ord(t[1])] + self._typesn = value + elif ord(t[0]) == self._FAN_TLV_TYPE_HW_INFO: + name = "hardware info" + _len = ord(t[1]) + value = t[2:2 + ord(t[1])] + self._typehwinfo = value + elif ord(t[0]) == self._FAN_TLV_TYPE_DEV_TYPE: + name = "dev type" + _len = ord(t[1]) + value = "0x" + for c in t[2:2 + ord(t[1])]: + value += "%02X" % (ord(c),) + self._typedevtype = int(value,16) + except Exception as e: + print e + return {"name": name, "code": ord(t[0]), "value": value,"lens": _len} + + def __str__(self): + formatstr = "VERSION : 0x%02x \n" \ + " FLAG : 0x%02x \n" \ + " HW_VER : 0x%02x \n" \ + " TYPE : 0x%02x \n" \ + "typename : %s \n" \ + "typesn : %s \n" \ + "typehwinfo : %s \n" + return formatstr % (self.VERSION, self.FLAG, self.HW_VER, self.TYPE, self.typename, self.typesn, self.typehwinfo) + + diff --git a/device/ragile/x86_64-ragile_ra-b6510-32c-r0/fru.py b/device/ragile/x86_64-ragile_ra-b6510-32c-r0/fru.py new file mode 100644 index 0000000000..3f1bef50af --- /dev/null +++ b/device/ragile/x86_64-ragile_ra-b6510-32c-r0/fru.py @@ -0,0 +1,950 @@ +#!/usr/bin/python +# -*- coding: utf-8 -*- +import collections +from bitarray import bitarray +from datetime import datetime, timedelta +import sys + +__DEBUG__ = "N" + + +class FruException(Exception): + def __init__(self, message='fruerror', code=-100): + err = 'errcode: {0} message:{1}'.format(code, message) + Exception.__init__(self, err) + self.code = code + self.message = message + + +def e_print(err): + print("ERROR: " + err) + + +def d_print(debug_info): + if(__DEBUG__ == "Y"): + print(debug_info) + + +class FruUtil(): + @staticmethod + def decodeLength(value): + a = bitarray(8) + a.setall(True) + a[0:1] = 0 + a[1:2] = 0 + x = ord(a.tobytes()) + return x & ord(value) + + @staticmethod + def minToData(): + starttime = datetime(1996, 1, 1, 0, 0, 0) + endtime = datetime.now() + seconds = (endtime - starttime).total_seconds() + mins = seconds / 60 + m = int(round(mins)) + return m + + @staticmethod + def getTimeFormat(): + return datetime.now().strftime('%Y-%m-%d') + + @staticmethod + def getTypeLength(value): + if value is None: + return 0 + a = bitarray(8) + a.setall(False) + a[0:1] = 1 + a[1:2] = 1 + x = ord(a.tobytes()) + return x | len(value) + + @staticmethod + def checksum(b): + result = 0 + for i in range(len(b)): + result += ord(b[i]) + return (0x100 - (result & 0xff)) & 0xff + + +class BaseArea(object): + SUGGESTED_SIZE_COMMON_HEADER = 8 + SUGGESTED_SIZE_INTERNAL_USE_AREA = 72 + SUGGESTED_SIZE_CHASSIS_INFO_AREA = 32 + SUGGESTED_SIZE_BOARD_INFO_AREA = 80 + SUGGESTED_SIZE_PRODUCT_INFO_AREA = 80 + + INITVALUE = b'\x00' + resultvalue = INITVALUE * 256 + COMMON_HEAD_VERSION = b'\x01' + __childList = None + + def __init__(self, name="", size=0, offset=0): + self.__childList = [] + self._offset = offset + self.name = name + self._size = size + self._isPresent = False + self._data = b'\x00' * size + self.__dataoffset = 0 + + @property + def childList(self): + return self.__childList + + @childList.setter + def childList(self, value): + self.__childList = value + + @property + def offset(self): + return self._offset + + @offset.setter + def offset(self, value): + self._offset = value + + @property + def size(self): + return self._size + + @size.setter + def size(self, value): + self._size = value + + @property + def data(self): + return self._data + + @data.setter + def data(self, value): + self._data = value + + @property + def isPresent(self): + return self._isPresent + + @isPresent.setter + def isPresent(self, value): + self._isPresent = value + + +class InternalUseArea(BaseArea): + pass + + +class ChassisInfoArea(BaseArea): + pass + + +class BoardInfoArea(BaseArea): + _boardTime = None + _fields = None + _mfg_date = None + + def __str__(self): + formatstr = "version : %x\n" \ + "length : %d \n" \ + "language : %x \n" \ + "mfg_date : %s \n" \ + "boardManufacturer : %s \n" \ + "boardProductName : %s \n" \ + "boardSerialNumber : %s \n" \ + "boardPartNumber : %s \n" \ + "fruFileId : %s \n" + + tmpstr = formatstr % (ord(self.boardversion), self.size, + self.language, self.getMfgRealData(), + self.boardManufacturer, self.boardProductName, + self.boardSerialNumber, self.boardPartNumber, + self.fruFileId) + for i in range(1, 11): + valtmp = "boardextra%d" % i + if hasattr(self, valtmp): + valtmpval = getattr(self, valtmp) + tmpstr += "boardextra%d : %s \n" % (i, valtmpval) + else: + break + + return tmpstr + + def todict(self): + dic = collections.OrderedDict() + dic["boardversion"] = ord(self.boardversion) + dic["boardlength"] = self.size + dic["boardlanguage"] = self.language + dic["boardmfg_date"] = self.getMfgRealData() + dic["boardManufacturer"] = self.boardManufacturer + dic["boardProductName"] = self.boardProductName + dic["boardSerialNumber"] = self.boardSerialNumber + dic["boardPartNumber"] = self.boardPartNumber + dic["boardfruFileId"] = self.fruFileId + for i in range(1, 11): + valtmp = "boardextra%d" % i + if hasattr(self, valtmp): + valtmpval = getattr(self, valtmp) + dic[valtmp] = valtmpval + else: + break + return dic + + def decodedata(self): + index = 0 + self.areaversion = self.data[index] + index += 1 + d_print("decode length :%d class size:%d" % + ((ord(self.data[index]) * 8), self.size)) + index += 2 + + timetmp = self.data[index: index + 3] + self.mfg_date = ord(timetmp[0]) | ( + ord(timetmp[1]) << 8) | (ord(timetmp[2]) << 16) + d_print("decode getMfgRealData :%s" % self.getMfgRealData()) + index += 3 + + templen = FruUtil.decodeLength(self.data[index]) + self.boardManufacturer = self.data[index + 1: index + templen + 1] + index += templen + 1 + d_print("decode boardManufacturer:%s" % self.boardManufacturer) + + templen = FruUtil.decodeLength(self.data[index]) + self.boardProductName = self.data[index + 1: index + templen + 1] + index += templen + 1 + d_print("decode boardProductName:%s" % self.boardProductName) + + templen = FruUtil.decodeLength(self.data[index]) + self.boardSerialNumber = self.data[index + 1: index + templen + 1] + index += templen + 1 + d_print("decode boardSerialNumber:%s" % self.boardSerialNumber) + + templen = FruUtil.decodeLength(self.data[index]) + self.boardPartNumber = self.data[index + 1: index + templen + 1] + index += templen + 1 + d_print("decode boardPartNumber:%s" % self.boardPartNumber) + + templen = FruUtil.decodeLength(self.data[index]) + self.fruFileId = self.data[index + 1: index + templen + 1] + index += templen + 1 + d_print("decode fruFileId:%s" % self.fruFileId) + + + for i in range(1, 11): + valtmp = "boardextra%d" % i + if self.data[index] != chr(0xc1): + templen = FruUtil.decodeLength(self.data[index]) + tmpval = self.data[index + 1: index + templen + 1] + setattr(self, valtmp, tmpval) + index += templen + 1 + d_print("decode boardextra%d:%s" % (i, tmpval)) + else: + break + + def recalcute(self): + d_print("boardInfoArea version:%x" % ord(self.boardversion)) + d_print("boardInfoArea length:%d" % self.size) + d_print("boardInfoArea language:%x" % self.language) + self.mfg_date = FruUtil.minToData() + d_print("boardInfoArea mfg_date:%x" % self.mfg_date) + + self.data = chr(ord(self.boardversion)) + \ + chr(self.size / 8) + chr(self.language) + + self.data += chr(self.mfg_date & 0xFF) + self.data += chr((self.mfg_date >> 8) & 0xFF) + self.data += chr((self.mfg_date >> 16) & 0xFF) + + d_print("boardInfoArea boardManufacturer:%s" % self.boardManufacturer) + typelength = FruUtil.getTypeLength(self.boardManufacturer) + self.data += chr(typelength) + self.data += self.boardManufacturer + + d_print("boardInfoArea boardProductName:%s" % self.boardProductName) + self.data += chr(FruUtil.getTypeLength(self.boardProductName)) + self.data += self.boardProductName + + d_print("boardInfoArea boardSerialNumber:%s" % self.boardSerialNumber) + self.data += chr(FruUtil.getTypeLength(self.boardSerialNumber)) + self.data += self.boardSerialNumber + + d_print("boardInfoArea boardPartNumber:%s" % self.boardPartNumber) + self.data += chr(FruUtil.getTypeLength(self.boardPartNumber)) + self.data += self.boardPartNumber + + d_print("boardInfoArea fruFileId:%s" % self.fruFileId) + self.data += chr(FruUtil.getTypeLength(self.fruFileId)) + self.data += self.fruFileId + + for i in range(1, 11): + valtmp = "boardextra%d" % i + if hasattr(self, valtmp): + valtmpval = getattr(self, valtmp) + d_print("boardInfoArea boardextra%d:%s" % (i, valtmpval)) + self.data += chr(FruUtil.getTypeLength(valtmpval)) + if valtmpval is None: + pass + else: + self.data += valtmpval + else: + break + + self.data += chr(0xc1) + + if len(self.data) > (self.size - 1): + incr = (len(self.data) - self.size) / 8 + 1 + self.size += incr * 8 + + self.data = self.data[0:1] + chr(self.size / 8) + self.data[2:] + d_print("self data:%d" % len(self.data)) + d_print("self size:%d" % self.size) + d_print("adjust size:%d" % (self.size - len(self.data) - 1)) + self.data = self.data.ljust((self.size - 1), self.INITVALUE) + + # checksum + checksum = FruUtil.checksum(self.data) + d_print("board info checksum:%x" % checksum) + self.data += chr(checksum) + + def getMfgRealData(self): + starttime = datetime(1996, 1, 1, 0, 0, 0) + mactime = starttime + timedelta(minutes=self.mfg_date) + return mactime + + @property + def language(self): + self._language = 25 + return self._language + + @property + def mfg_date(self): + return self._mfg_date + + @mfg_date.setter + def mfg_date(self, val): + self._mfg_date = val + + @property + def boardversion(self): + self._boardversion = self.COMMON_HEAD_VERSION + return self._boardversion + + @property + def fruFileId(self): + return self._FRUFileID + + @fruFileId.setter + def fruFileId(self, val): + self._FRUFileID = val + + @property + def boardPartNumber(self): + return self._boardPartNumber + + @boardPartNumber.setter + def boardPartNumber(self, val): + self._boardPartNumber = val + + @property + def boardSerialNumber(self): + return self._boardSerialNumber + + @boardSerialNumber.setter + def boardSerialNumber(self, val): + self._boardSerialNumber = val + + @property + def boardProductName(self): + return self._boradProductName + + @boardProductName.setter + def boardProductName(self, val): + self._boradProductName = val + + @property + def boardManufacturer(self): + return self._boardManufacturer + + @boardManufacturer.setter + def boardManufacturer(self, val): + self._boardManufacturer = val + + @property + def boardTime(self): + return self._boardTime + + @boardTime.setter + def boardTime(self, val): + self._boardTime = val + + @property + def fields(self): + return self._fields + + @fields.setter + def fields(self, val): + self._fields = val + + +class ProductInfoArea(BaseArea): + _productManufacturer = None + _productAssetTag = None + _FRUFileID = None + + def __str__(self): + formatstr = "version : %x\n" \ + "length : %d \n" \ + "language : %x \n" \ + "productManufacturer : %s \n" \ + "productName : %s \n" \ + "productPartModelName: %s \n" \ + "productVersion : %s \n" \ + "productSerialNumber : %s \n" \ + "productAssetTag : %s \n" \ + "fruFileId : %s \n" + + tmpstr = formatstr % (ord(self.areaversion), self.size, + self.language, self.productManufacturer, + self.productName, self.productPartModelName, + self.productVersion, self.productSerialNumber, + self.productAssetTag, self.fruFileId) + + for i in range(1, 11): + valtmp = "productextra%d" % i + if hasattr(self, valtmp): + valtmpval = getattr(self, valtmp) + tmpstr += "productextra%d : %s \n" % (i, valtmpval) + else: + break + + return tmpstr + + def todict(self): + dic = collections.OrderedDict() + dic["productversion"] = ord(self.areaversion) + dic["productlength"] = self.size + dic["productlanguage"] = self.language + dic["productManufacturer"] = self.productManufacturer + dic["productName"] = self.productName + dic["productPartModelName"] = self.productPartModelName + dic["productVersion"] = int(self.productVersion, 16) + dic["productSerialNumber"] = self.productSerialNumber + dic["productAssetTag"] = self.productAssetTag + dic["productfruFileId"] = self.fruFileId + for i in range(1, 11): + valtmp = "productextra%d" % i + if hasattr(self, valtmp): + valtmpval = getattr(self, valtmp) + dic[valtmp] = valtmpval + else: + break + return dic + + def decodedata(self): + index = 0 + self.areaversion = self.data[index] # 0 + index += 1 + d_print("decode length %d" % (ord(self.data[index]) * 8)) + d_print("class size %d" % self.size) + index += 2 + + templen = FruUtil.decodeLength(self.data[index]) + self.productManufacturer = self.data[index + 1: index + templen + 1] + index += templen + 1 + d_print("decode productManufacturer:%s" % self.productManufacturer) + + templen = FruUtil.decodeLength(self.data[index]) + self.productName = self.data[index + 1: index + templen + 1] + index += templen + 1 + d_print("decode productName:%s" % self.productName) + + templen = FruUtil.decodeLength(self.data[index]) + self.productPartModelName = self.data[index + 1: index + templen + 1] + index += templen + 1 + d_print("decode productPartModelName:%s" % self.productPartModelName) + + templen = FruUtil.decodeLength(self.data[index]) + self.productVersion = self.data[index + 1: index + templen + 1] + index += templen + 1 + d_print("decode productVersion:%s" % self.productVersion) + + templen = FruUtil.decodeLength(self.data[index]) + self.productSerialNumber = self.data[index + 1: index + templen + 1] + index += templen + 1 + d_print("decode productSerialNumber:%s" % self.productSerialNumber) + + templen = FruUtil.decodeLength(self.data[index]) + self.productAssetTag = self.data[index + 1: index + templen + 1] + index += templen + 1 + d_print("decode productAssetTag:%s" % self.productAssetTag) + + templen = FruUtil.decodeLength(self.data[index]) + self.fruFileId = self.data[index + 1: index + templen + 1] + index += templen + 1 + d_print("decode fruFileId:%s" % self.fruFileId) + + for i in range(1, 11): + valtmp = "productextra%d" % i + if self.data[index] != chr(0xc1) and index < self.size - 1: + templen = FruUtil.decodeLength(self.data[index]) + if templen == 0: + break + tmpval = self.data[index + 1: index + templen + 1] + d_print("decode boardextra%d:%s" % (i, tmpval)) + setattr(self, valtmp, tmpval) + index += templen + 1 + else: + break + + @property + def productVersion(self): + return self._productVersion + + @productVersion.setter + def productVersion(self, name): + self._productVersion = name + + @property + def areaversion(self): + self._areaversion = self.COMMON_HEAD_VERSION + return self._areaversion + + @areaversion.setter + def areaversion(self, name): + self._areaversion = name + + @property + def language(self): + self._language = 25 + return self._language + + @property + def productManufacturer(self): + return self._productManufacturer + + @productManufacturer.setter + def productManufacturer(self, name): + self._productManufacturer = name + + @property + def productName(self): + return self._productName + + @productName.setter + def productName(self, name): + self._productName = name + + @property + def productPartModelName(self): + return self._productPartModelName + + @productPartModelName.setter + def productPartModelName(self, name): + self._productPartModelName = name + + @property + def productSerialNumber(self): + return self._productSerialNumber + + @productSerialNumber.setter + def productSerialNumber(self, name): + self._productSerialNumber = name + + @property + def productAssetTag(self): + return self._productAssetTag + + @productAssetTag.setter + def productAssetTag(self, name): + self._productAssetTag = name + + @property + def fruFileId(self): + return self._FRUFileID + + @fruFileId.setter + def fruFileId(self, name): + self._FRUFileID = name + + def recalcute(self): + d_print("product version:%x" % ord(self.areaversion)) + d_print("product length:%d" % self.size) + d_print("product language:%x" % self.language) + self.data = chr(ord(self.areaversion)) + \ + chr(self.size / 8) + chr(self.language) + + typelength = FruUtil.getTypeLength(self.productManufacturer) + self.data += chr(typelength) + self.data += self.productManufacturer + + self.data += chr(FruUtil.getTypeLength(self.productName)) + self.data += self.productName + + self.data += chr(FruUtil.getTypeLength(self.productPartModelName)) + self.data += self.productPartModelName + + self.data += chr(FruUtil.getTypeLength(self.productVersion)) + self.data += self.productVersion + + self.data += chr(FruUtil.getTypeLength(self.productSerialNumber)) + self.data += self.productSerialNumber + + self.data += chr(FruUtil.getTypeLength(self.productAssetTag)) + if self.productAssetTag is not None: + self.data += self.productAssetTag + + self.data += chr(FruUtil.getTypeLength(self.fruFileId)) + self.data += self.fruFileId + + for i in range(1, 11): + valtmp = "productextra%d" % i + if hasattr(self, valtmp): + valtmpval = getattr(self, valtmp) + d_print("boardInfoArea productextra%d:%s" % (i, valtmpval)) + self.data += chr(FruUtil.getTypeLength(valtmpval)) + if valtmpval is None: + pass + else: + self.data += valtmpval + else: + break + + self.data += chr(0xc1) + if len(self.data) > (self.size - 1): + incr = (len(self.data) - self.size) / 8 + 1 + self.size += incr * 8 + d_print("self.data:%d" % len(self.data)) + d_print("self.size:%d" % self.size) + + self.data = self.data[0:1] + chr(self.size / 8) + self.data[2:] + self.data = self.data.ljust((self.size - 1), self.INITVALUE) + checksum = FruUtil.checksum(self.data) + d_print("board info checksum:%x" % checksum) + self.data += chr(checksum) + + +class MultiRecordArea(BaseArea): + pass + + +class Field(object): + + def __init__(self, fieldType="ASCII", fieldData=""): + self.fieldData = fieldData + self.fieldType = fieldType + + @property + def data(self): + return self._data + + @property + def fieldType(self): + return self._fieldType + + @property + def fieldData(self): + return self._fieldData + + +class ipmifru(BaseArea): + _BoardInfoArea = None + _ProductInfoArea = None + _InternalUseArea = None + _ChassisInfoArea = None + _multiRecordArea = None + _productinfoAreaOffset = BaseArea.INITVALUE + _boardInfoAreaOffset = BaseArea.INITVALUE + _internalUserAreaOffset = BaseArea.INITVALUE + _chassicInfoAreaOffset = BaseArea.INITVALUE + _multiRecordAreaOffset = BaseArea.INITVALUE + _bindata = None + _bodybin = None + _version = BaseArea.COMMON_HEAD_VERSION + _zeroCheckSum = None + + def __str__(self): + tmpstr = "" + if self.boardInfoArea.isPresent: + tmpstr += "\nboardinfoarea: \n" + tmpstr += self.boardInfoArea.__str__() + if self.productInfoArea.isPresent: + tmpstr += "\nproductinfoarea: \n" + tmpstr += self.productInfoArea.__str__() + return tmpstr + + def decodeBin(self, eeprom): + commonHead = eeprom[0:8] + d_print("decode version %x" % ord(commonHead[0])) + if self.COMMON_HEAD_VERSION != commonHead[0]: + raise FruException("HEAD VERSION error,not Fru format!", -10) + if FruUtil.checksum(commonHead[0:7]) != ord(commonHead[7]): + strtemp = "check header checksum error [cal:%02x data:%02x]" % ( + FruUtil.checksum(commonHead[0:7]), ord(commonHead[7])) + raise FruException(strtemp, -3) + if commonHead[1] != self.INITVALUE: + d_print("Internal Use Area is present") + self.internalUseArea = InternalUseArea( + name="Internal Use Area", size=self.SUGGESTED_SIZE_INTERNAL_USE_AREA) + self.internalUseArea.isPresent = True + self.internalUserAreaOffset = ord(commonHead[1]) + self.internalUseArea.data = eeprom[self.internalUserAreaOffset * 8: ( + self.internalUserAreaOffset * 8 + self.internalUseArea.size)] + if commonHead[2] != self.INITVALUE: + d_print("Chassis Info Area is present") + self.chassisInfoArea = ChassisInfoArea( + name="Chassis Info Area", size=self.SUGGESTED_SIZE_CHASSIS_INFO_AREA) + self.chassisInfoArea.isPresent = True + self.chassicInfoAreaOffset = ord(commonHead[2]) + self.chassisInfoArea.data = eeprom[self.chassicInfoAreaOffset * 8: ( + self.chassicInfoAreaOffset * 8 + self.chassisInfoArea.size)] + if commonHead[3] != self.INITVALUE: + self.boardInfoArea = BoardInfoArea( + name="Board Info Area", size=self.SUGGESTED_SIZE_BOARD_INFO_AREA) + self.boardInfoArea.isPresent = True + self.boardInfoAreaOffset = ord(commonHead[3]) + self.boardInfoArea.size = ord( + eeprom[self.boardInfoAreaOffset * 8 + 1]) * 8 + d_print("Board Info Area is present size:%d" % + (self.boardInfoArea.size)) + self.boardInfoArea.data = eeprom[self.boardInfoAreaOffset * 8: ( + self.boardInfoAreaOffset * 8 + self.boardInfoArea.size)] + if FruUtil.checksum(self.boardInfoArea.data[:-1]) != ord(self.boardInfoArea.data[-1:]): + print "check boardInfoArea checksum error[cal:%02x data:%02x]" % \ + (FruUtil.checksum( + self.boardInfoArea.data[:-1]), ord(self.boardInfoArea.data[-1:])) + sys.exit(-1) + self.boardInfoArea.decodedata() + if commonHead[4] != self.INITVALUE: + d_print("Product Info Area is present") + self.productInfoArea = ProductInfoArea( + name="Product Info Area ", size=self.SUGGESTED_SIZE_PRODUCT_INFO_AREA) + self.productInfoArea.isPresent = True + self.productinfoAreaOffset = ord(commonHead[4]) + d_print("length offset value: %02x" % + ord(eeprom[self.productinfoAreaOffset * 8 + 1])) + self.productInfoArea.size = ord( + eeprom[self.productinfoAreaOffset * 8 + 1]) * 8 + d_print("Product Info Area is present size:%d" % + (self.productInfoArea.size)) + + self.productInfoArea.data = eeprom[self.productinfoAreaOffset * 8: ( + self.productinfoAreaOffset * 8 + self.productInfoArea.size)] + if FruUtil.checksum(self.productInfoArea.data[:-1]) != ord(self.productInfoArea.data[-1:]): + strtmp = "check productInfoArea checksum error [cal:%02x data:%02x]" % ( + FruUtil.checksum(self.productInfoArea.data[:-1]), ord(self.productInfoArea.data[-1:])) + raise FruException(strtmp, -3) + self.productInfoArea.decodedata() + if commonHead[5] != self.INITVALUE: + self.multiRecordArea = MultiRecordArea( + name="MultiRecord record Area ") + d_print("MultiRecord record present") + self.multiRecordArea.isPresent = True + self.multiRecordAreaOffset = ord(commonHead[5]) + self.multiRecordArea.data = eeprom[self.multiRecordAreaOffset * 8: ( + self.multiRecordAreaOffset * 8 + self.multiRecordArea.size)] + + def initDefault(self): + self.version = self.COMMON_HEAD_VERSION + self.internalUserAreaOffset = self.INITVALUE + self.chassicInfoAreaOffset = self.INITVALUE + self.boardInfoAreaOffset = self.INITVALUE + self.productinfoAreaOffset = self.INITVALUE + self.multiRecordAreaOffset = self.INITVALUE + self.PAD = self.INITVALUE + self.zeroCheckSum = self.INITVALUE + self.offset = self.SUGGESTED_SIZE_COMMON_HEADER + self.productInfoArea = None + self.internalUseArea = None + self.boardInfoArea = None + self.chassisInfoArea = None + self.multiRecordArea = None + # self.recalcute() + + @property + def version(self): + return self._version + + @version.setter + def version(self, name): + self._version = name + + @property + def internalUserAreaOffset(self): + return self._internalUserAreaOffset + + @internalUserAreaOffset.setter + def internalUserAreaOffset(self, obj): + self._internalUserAreaOffset = obj + + @property + def chassicInfoAreaOffset(self): + return self._chassicInfoAreaOffset + + @chassicInfoAreaOffset.setter + def chassicInfoAreaOffset(self, obj): + self._chassicInfoAreaOffset = obj + + @property + def productinfoAreaOffset(self): + return self._productinfoAreaOffset + + @productinfoAreaOffset.setter + def productinfoAreaOffset(self, obj): + self._productinfoAreaOffset = obj + + @property + def boardInfoAreaOffset(self): + return self._boardInfoAreaOffset + + @boardInfoAreaOffset.setter + def boardInfoAreaOffset(self, obj): + self._boardInfoAreaOffset = obj + + @property + def multiRecordAreaOffset(self): + return self._multiRecordAreaOffset + + @multiRecordAreaOffset.setter + def multiRecordAreaOffset(self, obj): + self._multiRecordAreaOffset = obj + + @property + def zeroCheckSum(self): + return self._zeroCheckSum + + @zeroCheckSum.setter + def zeroCheckSum(self, obj): + self._zeroCheckSum = obj + + @property + def productInfoArea(self): + return self._ProductInfoArea + + @productInfoArea.setter + def productInfoArea(self, obj): + self._ProductInfoArea = obj + + @property + def internalUseArea(self): + return self._InternalUseArea + + @internalUseArea.setter + def internalUseArea(self, obj): + self.internalUseArea = obj + + @property + def boardInfoArea(self): + return self._BoardInfoArea + + @boardInfoArea.setter + def boardInfoArea(self, obj): + self._BoardInfoArea = obj + + @property + def chassisInfoArea(self): + return self._ChassisInfoArea + + @chassisInfoArea.setter + def chassisInfoArea(self, obj): + self._ChassisInfoArea = obj + + @property + def multiRecordArea(self): + return self._multiRecordArea + + @multiRecordArea.setter + def multiRecordArea(self, obj): + self._multiRecordArea = obj + + @property + def bindata(self): + return self._bindata + + @bindata.setter + def bindata(self, obj): + self._bindata = obj + + @property + def bodybin(self): + return self._bodybin + + @bodybin.setter + def bodybin(self, obj): + self._bodybin = obj + + def recalcuteCommonHead(self): + self.bindata = "" + self.offset = self.SUGGESTED_SIZE_COMMON_HEADER + d_print("common Header %d" % self.offset) + if self.internalUseArea is not None and self.internalUseArea.isPresent: + self.internalUserAreaOffset = self.offset / 8 + self.offset += self.internalUseArea.size + d_print("internalUseArea is present offset:%d" % self.offset) + + if self.chassisInfoArea is not None and self.chassisInfoArea.isPresent: + self.chassicInfoAreaOffset = self.offset / 8 + self.offset += self.chassisInfoArea.size + d_print("chassisInfoArea is present offset:%d" % self.offset) + + if self.boardInfoArea is not None and self.boardInfoArea.isPresent: + self.boardInfoAreaOffset = self.offset / 8 + self.offset += self.boardInfoArea.size + d_print("boardInfoArea is present offset:%d" % self.offset) + d_print("boardInfoArea is present size:%d" % + self.boardInfoArea.size) + + if self.productInfoArea is not None and self.productInfoArea.isPresent: + self.productinfoAreaOffset = self.offset / 8 + self.offset += self.productInfoArea.size + d_print("productInfoArea is present offset:%d" % self.offset) + + if self.multiRecordArea is not None and self.multiRecordArea.isPresent: + self.multiRecordAreaOffset = self.offset / 8 + d_print("multiRecordArea is present offset:%d" % self.offset) + + if self.internalUserAreaOffset == self.INITVALUE: + self.internalUserAreaOffset = 0 + if self.productinfoAreaOffset == self.INITVALUE: + self.productinfoAreaOffset = 0 + if self.chassicInfoAreaOffset == self.INITVALUE: + self.chassicInfoAreaOffset = 0 + if self.boardInfoAreaOffset == self.INITVALUE: + self.boardInfoAreaOffset = 0 + if self.multiRecordAreaOffset == self.INITVALUE: + self.multiRecordAreaOffset = 0 + + self.zeroCheckSum = (0x100 - ord(self.version) - self.internalUserAreaOffset - self.chassicInfoAreaOffset - self.productinfoAreaOffset + - self.boardInfoAreaOffset - self.multiRecordAreaOffset) & 0xff + d_print("zerochecksum:%x" % self.zeroCheckSum) + self.data = self.version + chr(self.internalUserAreaOffset) + chr(self.chassicInfoAreaOffset) + chr( + self.boardInfoAreaOffset) + chr(self.productinfoAreaOffset) + chr(self.multiRecordAreaOffset) + self.INITVALUE + chr(self.zeroCheckSum) + + self.bindata = self.data + self.bodybin + totallen = len(self.bindata) + d_print("totallen %d" % totallen) + if (totallen < 256): + self.bindata = self.bindata.ljust(256, self.INITVALUE) + else: + raise FruException('bin data more than 256', -2) + + def recalcutebin(self): + self.bodybin = "" + if self.internalUseArea is not None and self.internalUseArea.isPresent: + d_print("internalUseArea present") + self.bodybin += self.internalUseArea.data + if self.chassisInfoArea is not None and self.chassisInfoArea.isPresent: + d_print("chassisInfoArea present") + self.bodybin += self.chassisInfoArea.data + if self.boardInfoArea is not None and self.boardInfoArea.isPresent: + d_print("boardInfoArea present") + self.boardInfoArea.recalcute() + self.bodybin += self.boardInfoArea.data + if self.productInfoArea is not None and self.productInfoArea.isPresent: + d_print("productInfoAreapresent") + self.productInfoArea.recalcute() + self.bodybin += self.productInfoArea.data + if self.multiRecordArea is not None and self.multiRecordArea.isPresent: + d_print("multiRecordArea present") + self.bodybin += self.productInfoArea.data + + def recalcute(self): + self.recalcutebin() + self.recalcuteCommonHead() diff --git a/device/ragile/x86_64-ragile_ra-b6510-32c-r0/installer.conf b/device/ragile/x86_64-ragile_ra-b6510-32c-r0/installer.conf new file mode 100644 index 0000000000..df84611377 --- /dev/null +++ b/device/ragile/x86_64-ragile_ra-b6510-32c-r0/installer.conf @@ -0,0 +1,2 @@ +CONSOLE_SPEED=115200 +ONIE_PLATFORM_EXTRA_CMDLINE_LINUX="intel_pstate=disable intel_idle.max_cstate=0 modprobe.blacklist=fpga_pcie_i2c" diff --git a/device/ragile/x86_64-ragile_ra-b6510-32c-r0/led_proc_init.soc b/device/ragile/x86_64-ragile_ra-b6510-32c-r0/led_proc_init.soc new file mode 100644 index 0000000000..da5105b07f --- /dev/null +++ b/device/ragile/x86_64-ragile_ra-b6510-32c-r0/led_proc_init.soc @@ -0,0 +1,7 @@ +m0 load 0 0x3800 /usr/share/sonic/platform/custom_led.bin + +led auto on + +led start + +linkscan spbm=all force=all interval=250000 diff --git a/device/ragile/x86_64-ragile_ra-b6510-32c-r0/linkscan_led.bin b/device/ragile/x86_64-ragile_ra-b6510-32c-r0/linkscan_led.bin new file mode 100644 index 0000000000..e86cdc1ef6 Binary files /dev/null and b/device/ragile/x86_64-ragile_ra-b6510-32c-r0/linkscan_led.bin differ diff --git a/device/ragile/x86_64-ragile_ra-b6510-32c-r0/minigraph.xml b/device/ragile/x86_64-ragile_ra-b6510-32c-r0/minigraph.xml new file mode 100644 index 0000000000..d33d99d6e7 --- /dev/null +++ b/device/ragile/x86_64-ragile_ra-b6510-32c-r0/minigraph.xml @@ -0,0 +1,63 @@ + + + + + + + + + + + + + switch2 + + + + + + + + + + + + + switch2 + RA-B6510-32C + + + + + + + switch2 + + + DhcpResources + + + + + NtpResources + + 0.debian.pool.ntp.org;1.debian.pool.ntp.org;2.debian.pool.ntp.org;3.debian.pool.ntp.org + + + SyslogResources + + + + + ErspanDestinationIpv4 + + 2.2.2.2 + + + + + + + switch2 + RA-B6510-32C + diff --git a/device/ragile/x86_64-ragile_ra-b6510-32c-r0/monitor.py b/device/ragile/x86_64-ragile_ra-b6510-32c-r0/monitor.py new file mode 100644 index 0000000000..ab4d14ec3d --- /dev/null +++ b/device/ragile/x86_64-ragile_ra-b6510-32c-r0/monitor.py @@ -0,0 +1,315 @@ +#!/usr/bin/python +# -*- coding: UTF-8 -*- +# * onboard temperature sensors +# * FAN trays +# * PSU +# +import os +import xml.etree.ElementTree as ET +import glob +from fru import * +from fantlv import * + + + +MAILBOX_DIR = "/sys/bus/i2c/devices/" +CONFIG_NAME = "dev.xml" + +def getPMCreg(location): + retval = 'ERR' + if (not os.path.isfile(location)): + return "%s %s notfound"% (retval , location) + try: + with open(location, 'r') as fd: + retval = fd.read() + except Exception as error: + pass + + retval = retval.rstrip('\r\n') + retval = retval.lstrip(" ") + return retval +# Get a mailbox register +def get_pmc_register(reg_name): + retval = 'ERR' + mb_reg_file = MAILBOX_DIR + reg_name + filepath = glob.glob(mb_reg_file) + if(len(filepath) == 0): + return "%s %s notfound"% (retval , mb_reg_file) + mb_reg_file = filepath[0] + if (not os.path.isfile(mb_reg_file)): + #print mb_reg_file, 'not found !' + return "%s %s notfound"% (retval , mb_reg_file) + try: + with open(mb_reg_file, 'r') as fd: + retval = fd.read() + except Exception as error: + pass + + retval = retval.rstrip('\r\n') + retval = retval.lstrip(" ") + return retval + +class checktype(): + def __init__(self, test1): + self.test1 = test1 + @staticmethod + def check(name,location, bit, value, tips , err1): + psu_status = int(get_pmc_register(location),16) + val = (psu_status & (1<< bit)) >> bit + if (val != value): + err1["errmsg"] = tips + err1["code"] = -1 + return -1 + else: + err1["errmsg"] = "none" + err1["code"] = 0 + return 0 + @staticmethod + def getValue(location, bit , type): + value_t = get_pmc_register(location) + if value_t.startswith("ERR") : + return value_t + if (type == 1): + return float(value_t)/1000 + elif (type == 2): + return float(value_t)/100 + elif (type == 3): + psu_status = int(value_t,16) + return (psu_status & (1<< bit)) >> bit + elif (type == 4): + return int(value_t,10) + elif (type == 5): + return float(value_t)/1000/1000 + else: + return value_t; +#######temp + @staticmethod + def getTemp(self, name, location , ret_t): + ret2 = self.getValue(location + "temp1_input" ," " ,1); + ret3 = self.getValue(location + "temp1_max" ," ", 1); + ret4 = self.getValue(location + "temp1_max_hyst" ," ", 1); + ret_t["temp1_input"] = ret2 + ret_t["temp1_max"] = ret3 + ret_t["temp1_max_hyst"] = ret4 + @staticmethod + def getLM75(name, location, result): + c1=checktype + r1={} + c1.getTemp(c1, name, location, r1) + result[name] = r1 +##########fanFRU + @staticmethod + def decodeBinByValue(retval): + fru = ipmifru() + fru.decodeBin(retval) + return fru + + @staticmethod + def printbinvalue(b): + index = 0 + print " ", + for width in range(16): + print "%02x " % width, + print "" + for i in range(0, len(b)): + if index % 16 == 0: + print " " + print " %02x " % i, + print "%02x " % ord(b[i]), + index += 1 + print "" + + @staticmethod + def getfruValue(val): + try: + binval = checktype.getValue(val, 0 , 0) + if binval.startswith("ERR"): + return binval + fanpro = {} + ret = checktype.decodeBinByValue(binval) + fanpro['fan_type'] = ret.productInfoArea.productName + fanpro['hw_version'] = ret.productInfoArea.productVersion + fanpro['sn'] = ret.productInfoArea.productSerialNumber + fanpro['fanid'] = ret.productInfoArea.productextra2 + return fanpro + except Exception as error: + return "ERR " + str(error) + + @staticmethod + def getslottlvValue(val): + try: + binval = checktype.getValue(val, 0 , 0) + if binval.startswith("ERR"): + return binval + slotpro = {} + slottlv = fan_tlv() + rets = slottlv.decode(binval) + if len(rets) == 0: + raise Exception("decode fan tlv fail") + slotpro['slot_type'] = slottlv.typename + slotpro['hw_version'] = slottlv.typehwinfo + slotpro['sn'] = slottlv.typesn + slotpro['slotid'] = slottlv.typedevtype + return slotpro + except Exception as error: + return "ERR " + str(error) + + @staticmethod + def getslotfruValue(val): + try: + binval = checktype.getValue(val, 0 , 0) + if binval.startswith("ERR"): + return binval + slotpro = {} + ret = checktype.decodeBinByValue(binval) + slotpro['slot_type'] = ret.boardInfoArea.boardProductName + slotpro['hw_version'] = ret.boardInfoArea.boardextra1 + slotpro['sn'] = ret.boardInfoArea.boardSerialNumber + return slotpro + except Exception as error: + return "ERR " + str(error) + + +class status(): + def __init__(self, productname): + self.productname = productname + + @staticmethod + def getETroot(filename): + tree = ET.parse(filename) + root = tree.getroot() + return root; + + @staticmethod + def getDecodValue(collection, decode): + decodes = collection.find('decode') + testdecode = decodes.find(decode) + test={} + for neighbor in testdecode.iter('code'): + test[neighbor.attrib["key"]]=neighbor.attrib["value"] + return test + @staticmethod + def getfileValue(location): + return checktype.getValue(location," "," ") + @staticmethod + def getETValue(a, filename, tagname): + root = status.getETroot(filename) + for neighbor in root.iter(tagname): + prob_t = {} + prob_t = neighbor.attrib + prob_t['errcode']= 0 + prob_t['errmsg'] = '' + for pros in neighbor.iter("property"): + ret = dict(neighbor.attrib.items() + pros.attrib.items()) + if ret.get('e2type') == 'fru' and ret.get("name") == "fru": + fruval = checktype.getfruValue(ret["location"]) + if isinstance(fruval, str) and fruval.startswith("ERR"): + prob_t['errcode']= -1 + prob_t['errmsg']= fruval + else: + prob_t.update(fruval) + if ret.get("name") == "slot" and ret.get('e2type') == 'tlv': + slotval = checktype.getslottlvValue(ret["location"]) + if isinstance(slotval, str) and slotval.startswith("ERR"): + prob_t['errcode']= -1 + prob_t['errmsg']= slotval + else: + prob_t.update(slotval) + if ret.get("name") == "slot" and ret.get('e2type') == 'fru': + slotval = checktype.getslotfruValue(ret["location"]) + if isinstance(slotval, str) and slotval.startswith("ERR"): + prob_t['errcode']= -1 + prob_t['errmsg']= slotval + else: + prob_t.update(slotval) + + if ('type' not in ret.keys()): + val = "0"; + else: + val = ret["type"] + if ('bit' not in ret.keys()): + bit = "0"; + else: + bit = ret["bit"] + s = checktype.getValue(ret["location"], int(bit),int(val)) + if isinstance(s, str) and s.startswith("ERR"): + prob_t['errcode']= -1 + prob_t['errmsg']= s + if ('default' in ret.keys()): + rt = status.getDecodValue(root,ret['decode']) + prob_t['errmsg']= rt[str(s)] + if str(s) != ret["default"]: + prob_t['errcode']= -1 + break; + else: + if ('decode' in ret.keys()): + rt = status.getDecodValue(root,ret['decode']) + if(ret['decode'] == "psutype" and s.replace("\x00","").rstrip() not in rt.keys()): + prob_t['errcode']= -1 + prob_t['errmsg'] = '%s'% ("Not supported PSU type") + else: + s = rt[str(s).replace("\x00","").rstrip()] + name = ret["name"] + prob_t[name]=str(s) + a.append(prob_t) + @staticmethod + def getCPUValue(a, filename, tagname): + root = status.getETroot(filename) + for neighbor in root.iter(tagname): + location = neighbor.attrib["location"] + L=[] + for dirpath, dirnames, filenames in os.walk(location): + for file in filenames : + if file.endswith("input"): + L.append(os.path.join(dirpath, file)) + L =sorted(L,reverse=False) + for i in range(len(L)): + prob_t = {} + prob_t["name"] = getPMCreg("%s/temp%d_label"%(location,i+1)) + prob_t["temp"] = float(getPMCreg("%s/temp%d_input"%(location,i+1)))/1000 + prob_t["alarm"] = float(getPMCreg("%s/temp%d_crit_alarm"%(location,i+1)))/1000 + prob_t["crit"] = float(getPMCreg("%s/temp%d_crit"%(location,i+1)))/1000 + prob_t["max"] = float(getPMCreg("%s/temp%d_max"%(location,i+1)))/1000 + a.append(prob_t) + + @staticmethod + def getFileName(): + return os.path.dirname(os.path.realpath(__file__)) + "/"+ CONFIG_NAME + @staticmethod + def getFan(ret): + _filename = status.getFileName() + _tagname = "fan" + status.getvalue(ret, _filename, _tagname) + @staticmethod + def checkFan(ret): + _filename = status.getFileName() + # _filename = "/usr/local/bin/" + status.getFileName() + _tagname = "fan" + status.getETValue(ret, _filename, _tagname) + @staticmethod + def getTemp(ret): + _filename = status.getFileName() + #_filename = "/usr/local/bin/" + status.getFileName() + _tagname = "temp" + status.getETValue(ret, _filename, _tagname) + @staticmethod + def getPsu(ret): + _filename = status.getFileName() + # _filename = "/usr/local/bin/" + status.getFileName() + _tagname = "psu" + status.getETValue(ret, _filename, _tagname) + + @staticmethod + def getcputemp(ret): + _filename = status.getFileName() + _tagname = "cpus" + status.getCPUValue(ret, _filename, _tagname) + + @staticmethod + def checkSlot(ret): + _filename = status.getFileName() + # _filename = "/usr/local/bin/" + status.getFileName() + _tagname = "slot" + status.getETValue(ret, _filename, _tagname) + + diff --git a/device/ragile/x86_64-ragile_ra-b6510-32c-r0/pddf/pd-plugin.json b/device/ragile/x86_64-ragile_ra-b6510-32c-r0/pddf/pd-plugin.json new file mode 100644 index 0000000000..ffa06ff743 --- /dev/null +++ b/device/ragile/x86_64-ragile_ra-b6510-32c-r0/pddf/pd-plugin.json @@ -0,0 +1,67 @@ +{ + "XCVR": { + "xcvr_present": { + "i2c": { + "valmap-SFP28": { + "1": true, + "0": false + }, + "valmap-QSFP28": { + "1": true, + "0": false + } + } + } + }, + + "PSU": { + "psu_present": { + "i2c": { + "valmap": { + "1": true, + "0": false + } + } + }, + + "psu_power_good": { + "i2c": { + "valmap": { + "1": true, + "0": false + } + } + }, + + "psu_fan_dir": { + "i2c": { + "valmap": { + "F2B": "EXHAUST", + "B2F": "INTAKE" + } + } + }, + "PSU_FAN_MAX_SPEED": "18000" + }, + + "FAN": { + "direction": { + "i2c": { + "valmap": { + "1": "INTAKE", + "0": "EXHAUST" + } + } + }, + "present": { + "i2c": { + "valmap": { + "1": true, + "0": false + } + } + }, + "duty_cycle_to_pwm": "lambda dc: dc*255/100", + "pwm_to_duty_cycle": "lambda pwm: pwm*100/255" + } +} diff --git a/device/ragile/x86_64-ragile_ra-b6510-32c-r0/pddf/pddf-device.json b/device/ragile/x86_64-ragile_ra-b6510-32c-r0/pddf/pddf-device.json new file mode 100755 index 0000000000..0f337006ed --- /dev/null +++ b/device/ragile/x86_64-ragile_ra-b6510-32c-r0/pddf/pddf-device.json @@ -0,0 +1,4471 @@ +{ + "PLATFORM": { + "num_psus": 2, + "num_fantrays": 5, + "num_fans_pertray": 2, + "num_ports": 32, + "num_temps": 5, + "pddf_dev_types": { + "description": "RA-B6510-32C", + "CPLD": [ + "i2c_cpld" + ], + "PSU": [ + "psu_eeprom", + "psu_pmbus" + ], + "FAN": [ + "fan_ctrl", + "fan_cpld", + "fan_eeprom" + ], + "PORT_MODULE": [ + "pddf_xcvr", + "optoe1", + "optoe2" + ] + }, + "std_kos": [ + "i2c-i801", + "i2c_dev", + "rg_i2c_gpio", + "rg_i2c_algo_bit", + "i2c_mux", + "rg_gpio_xeon", + "i2c_mux_pca9641", + "i2c_mux_pca954x force_create_bus=1", + "ragile_common dfd_my_type=0x404b", + "fpga_pcie_i2c ocore_ctl_startbus=2", + "lpc_dbg", + "fpga_i2c_ocores", + "rg_lpc_cpld", + "lm75", + "optoe", + "at24", + "pmbus_core" + ], + "pddf_kos": [ + "pddf_client_module", + "pddf_cpld_module", + "pddf_cpld_driver", + "pddf_mux_module", + "pddf_xcvr_module", + "pddf_xcvr_driver_module", + "pddf_psu_driver_module", + "pddf_psu_module", + "pddf_fan_driver_module", + "pddf_fan_module", + "pddf_sysstatus_module" + ], + "custom_kos": [ + "pddf_custom_psu", + "pddf_custom_led_module" + ] + + }, + + "SYSTEM": { + "dev_info": { + "device_type": "CPU", + "device_name": "ROOT_COMPLEX", + "device_parent": null + }, + "i2c": { + "CONTROLLERS": [{ + "dev_name": "i2c-0", + "dev": "SMBUS0" + }, { + "dev_name": "i2c-1", + "dev": "I2C-GPIO0" + }, { + "dev_name": "i2c-2", + "dev": "FPGA-OCORE0" + }, { + "dev_name": "i2c-3", + "dev": "FPGA-OCORE1" + },{ + "dev_name": "i2c-4", + "dev": "FPGA-OCORE2" + },{ + "dev_name": "i2c-5", + "dev": "FPGA-OCORE3" + },{ + "dev_name": "i2c-6", + "dev": "FPGA-OCORE4" + },{ + "dev_name": "i2c-7", + "dev": "FPGA-OCORE5" + },{ + "dev_name": "i2c-8", + "dev": "FPGA-OCORE6" + },{ + "dev_name": "i2c-9", + "dev": "FPGA-OCORE7" + },{ + "dev_name": "i2c-10", + "dev": "FPGA-OCORE8" + },{ + "dev_name": "i2c-11", + "dev": "FPGA-OCORE9" + },{ + "dev_name": "i2c-12", + "dev": "FPGA-OCORE10" + },{ + "dev_name": "i2c-13", + "dev": "FPGA-OCORE11" + },{ + "dev_name": "i2c-14", + "dev": "FPGA-OCORE12" + },{ + "dev_name": "i2c-15", + "dev": "FPGA-OCORE13" + }] + } + }, + + "SMBUS0": { + "dev_info": { + "device_type": "SMBUS", + "device_name": "SMBUS0", + "device_parent": "SYSTEM" + }, + "i2c": { + "topo_info": { + "dev_addr": "0x0" + }, + "DEVICES": [] + } + }, + + "I2C-GPIO0": { + "dev_info": { + "device_type": "I2C-GPIO", + "device_name": "I2C-GPIO0", + "device_parent": "SYSTEM" + }, + "i2c": { + "topo_info": { + "dev_addr": "0x1" + }, + "DEVICES": [{ + "dev": "EEPROM1" + } + ] + } + }, + + "EEPROM1": { + "dev_info": { + "device_type": "EEPROM", + "device_name": "EEPROM1", + "device_parent": "I2C-GPIO0" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x1", + "dev_addr": "0x56", + "dev_type": "24c02" + }, + "dev_attr": { + "access_mode": "BLOCK" + }, + "attr_list": [{ + "attr_name": "eeprom" + }] + } + }, + + "FPGA-OCORE0": { + "dev_info": { + "device_type": "FPGA-OCORE", + "device_name": "FPGA-OCORE0", + "device_parent": "SYSTEM" + }, + "i2c": { + "topo_info": { + "dev_addr": "0x2" + }, + "DEVICES": [ + { + "dev": "FAN-CTRL" + }, { + "dev": "MUX0" + } + ] + } + }, + + "FAN-CTRL": { + "dev_info": { + "device_type": "FAN", + "device_name": "FAN-CTRL", + "device_parent": "FPGA-OCORE0" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x2", + "dev_addr": "0x0d", + "dev_type": "fan_cpld" + }, + "dev_attr": { + "num_fantrays": "5" + }, + "attr_list": [{ + "attr_name": "fan1_present", + "attr_offset": "0x30", + "attr_mask": "0x1", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "fan2_present", + "attr_offset": "0x30", + "attr_mask": "0x1", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "fan3_present", + "attr_offset": "0x30", + "attr_mask": "0x2", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "fan4_present", + "attr_offset": "0x30", + "attr_mask": "0x2", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "fan5_present", + "attr_offset": "0x30", + "attr_mask": "0x4", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "fan6_present", + "attr_offset": "0x30", + "attr_mask": "0x4", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "fan7_present", + "attr_offset": "0x30", + "attr_mask": "0x8", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "fan8_present", + "attr_offset": "0x30", + "attr_mask": "0x8", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "fan9_present", + "attr_offset": "0x30", + "attr_mask": "0x10", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "fan10_present", + "attr_offset": "0x30", + "attr_mask": "0x10", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "fan1_input", + "attr_offset": "0x1b", + "attr_mult": "1", + "attr_len": "2" + }, + { + "attr_name": "fan2_input", + "attr_offset": "0x25", + "attr_mult": "1", + "attr_len": "2" + }, + { + "attr_name": "fan3_input", + "attr_offset": "0x1d", + "attr_mult": "1", + "attr_len": "2" + }, + { + "attr_name": "fan4_input", + "attr_offset": "0x27", + "attr_mult": "1", + "attr_len": "2" + }, + { + "attr_name": "fan5_input", + "attr_offset": "0x1f", + "attr_mult": "1", + "attr_len": "2" + }, + { + "attr_name": "fan6_input", + "attr_offset": "0x29", + "attr_mult": "1", + "attr_len": "2" + }, + { + "attr_name": "fan7_input", + "attr_offset": "0x21", + "attr_mult": "1", + "attr_len": "2" + }, + { + "attr_name": "fan8_input", + "attr_offset": "0x2b", + "attr_mult": "1", + "attr_len": "2" + }, + { + "attr_name": "fan9_input", + "attr_offset": "0x23", + "attr_mult": "1", + "attr_len": "2" + }, + { + "attr_name": "fan10_input", + "attr_offset": "0x2d", + "attr_mult": "1", + "attr_len": "2" + }, + { + "attr_name": "fan1_pwm", + "attr_offset": "0x14", + "attr_mask": "0xff", + "attr_len": "1" + }, + { + "attr_name": "fan2_pwm", + "attr_offset": "0x14", + "attr_mask": "0xff", + "attr_len": "1" + }, + { + "attr_name": "fan3_pwm", + "attr_offset": "0x15", + "attr_mask": "0xff", + "attr_len": "1" + }, + { + "attr_name": "fan4_pwm", + "attr_offset": "0x15", + "attr_mask": "0xff", + "attr_len": "1" + }, + { + "attr_name": "fan5_pwm", + "attr_offset": "0x16", + "attr_mask": "0xff", + "attr_len": "1" + }, + { + "attr_name": "fan6_pwm", + "attr_offset": "0x16", + "attr_mask": "0xff", + "attr_len": "1" + }, + { + "attr_name": "fan7_pwm", + "attr_offset": "0x17", + "attr_mask": "0xff", + "attr_len": "1" + }, + { + "attr_name": "fan8_pwm", + "attr_offset": "0x17", + "attr_mask": "0xff", + "attr_len": "1" + }, + { + "attr_name": "fan9_pwm", + "attr_offset": "0x18", + "attr_mask": "0xff", + "attr_len": "1" + }, + { + "attr_name": "fan10_pwm", + "attr_offset": "0x18", + "attr_mask": "0xff", + "attr_len": "1" + }, + { + "attr_name": "fan1_fault", + "attr_offset": "0x31", + "attr_mask": "0x1", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "fan2_fault", + "attr_offset": "0x31", + "attr_mask": "0x1", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "fan3_fault", + "attr_offset": "0x31", + "attr_mask": "0x2", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "fan4_fault", + "attr_offset": "0x31", + "attr_mask": "0x2", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "fan5_fault", + "attr_offset": "0x31", + "attr_mask": "0x4", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "fan6_fault", + "attr_offset": "0x31", + "attr_mask": "0x4", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "fan7_fault", + "attr_offset": "0x31", + "attr_mask": "0x8", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "fan8_fault", + "attr_offset": "0x31", + "attr_mask": "0x8", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "fan9_fault", + "attr_offset": "0x31", + "attr_mask": "0x10", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "fan10_fault", + "attr_offset": "0x31", + "attr_mask": "0x10", + "attr_cmpval": "0x0", + "attr_len": "1" + } + ] + } + }, + + "MUX0": { + "dev_info": { + "device_type": "MUX", + "device_name": "MUX0", + "device_parent": "FPGA-OCORE0" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x2", + "dev_addr": "0x77", + "dev_type": "pca9548" + }, + "dev_attr": { + "virt_bus": "0x10" + }, + "channel": [{ + "chn": "0", + "dev": "FAN1-EEPROM" + }, + { + "chn": "1", + "dev": "FAN2-EEPROM" + }, + { + "chn": "2", + "dev": "FAN3-EEPROM" + }, + { + "chn": "3", + "dev": "FAN4-EEPROM" + }, + { + "chn": "4", + "dev": "FAN5-EEPROM" + } + ] + } + }, + + "FAN1-EEPROM": { + "dev_info": { + "device_type": "EEPROM", + "device_name": "FAN1-EEPROM", + "device_parent": "MUX0" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x10", + "dev_addr": "0x50", + "dev_type": "24c02" + }, + "dev_attr": { + "access_mode": "BLOCK" + }, + "attr_list": [{ + "attr_name": "eeprom" + }] + } + }, + + "FAN2-EEPROM": { + "dev_info": { + "device_type": "EEPROM", + "device_name": "FAN2-EEPROM", + "device_parent": "MUX0" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x11", + "dev_addr": "0x50", + "dev_type": "24c02" + }, + "dev_attr": { + "access_mode": "BLOCK" + }, + "attr_list": [{ + "attr_name": "eeprom" + }] + } + }, + + "FAN3-EEPROM": { + "dev_info": { + "device_type": "EEPROM", + "device_name": "FAN3-EEPROM", + "device_parent": "MUX0" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x12", + "dev_addr": "0x50", + "dev_type": "24c02" + }, + "dev_attr": { + "access_mode": "BLOCK" + }, + "attr_list": [{ + "attr_name": "eeprom" + }] + } + }, + + "FAN4-EEPROM": { + "dev_info": { + "device_type": "EEPROM", + "device_name": "FAN4-EEPROM", + "device_parent": "MUX0" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x13", + "dev_addr": "0x50", + "dev_type": "24c02" + }, + "dev_attr": { + "access_mode": "BLOCK" + }, + "attr_list": [{ + "attr_name": "eeprom" + }] + } + }, + + "FAN5-EEPROM": { + "dev_info": { + "device_type": "EEPROM", + "device_name": "FAN5-EEPROM", + "device_parent": "MUX0" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x14", + "dev_addr": "0x50", + "dev_type": "24c02" + }, + "dev_attr": { + "access_mode": "BLOCK" + }, + "attr_list": [{ + "attr_name": "eeprom" + }] + } + }, + + "FPGA-OCORE1": { + "dev_info": { + "device_type": "FPGA-OCORE", + "device_name": "FPGA-OCORE1", + "device_parent": "SYSTEM" + }, + "i2c": { + "topo_info": { + "dev_addr": "0x3" + }, + "DEVICES": [ + { + "dev": "TEMP1" + }, + { + "dev": "TEMP2" + }, + { + "dev": "TEMP3" + }, + { + "dev": "TEMP4" + }, + { + "dev": "TEMP5" + } + ] + } + }, + + "TEMP1": { + "dev_info": { + "device_type": "TEMP_SENSOR", + "device_name": "TEMP-MAC-INLET-R", + "device_parent": "FPGA-OCORE1" + }, + "dev_attr": { + "display_name": "Temp_MAC_INLET_R" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x3", + "dev_addr": "0x48", + "dev_type": "lm75" + }, + "attr_list": [{ + "attr_name": "temp1_high_threshold", + "drv_attr_name": "temp1_max" + }, + { + "attr_name": "temp1_max_hyst" + }, + { + "attr_name": "temp1_input" + } + ] + } + }, + + "TEMP2": { + "dev_info": { + "device_type": "TEMP_SENSOR", + "device_name": "TEMP-MAC-INLET-F", + "device_parent": "FPGA-OCORE1" + }, + "dev_attr": { + "display_name": "Temp_MAC_INLET_F" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x3", + "dev_addr": "0x49", + "dev_type": "lm75" + }, + "attr_list": [{ + "attr_name": "temp1_high_threshold", + "drv_attr_name": "temp1_max" + }, + { + "attr_name": "temp1_max_hyst" + }, + { + "attr_name": "temp1_input" + } + ] + } + }, + + "TEMP3": { + "dev_info": { + "device_type": "TEMP_SENSOR", + "device_name": "TEMP-MAC-INLET-B", + "device_parent": "FPGA-OCORE1" + }, + "dev_attr": { + "display_name": "Temp_MAC_INLET_B" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x3", + "dev_addr": "0x4a", + "dev_type": "lm75" + }, + "attr_list": [{ + "attr_name": "temp1_high_threshold", + "drv_attr_name": "temp1_max" + }, + { + "attr_name": "temp1_max_hyst" + }, + { + "attr_name": "temp1_input" + } + ] + } + }, + + "TEMP4": { + "dev_info": { + "device_type": "TEMP_SENSOR", + "device_name": "TEMP-MAC-INLET-L", + "device_parent": "FPGA-OCORE1" + }, + "dev_attr": { + "display_name": "Temp_MAC_INLET_L" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x3", + "dev_addr": "0x4b", + "dev_type": "lm75" + }, + "attr_list": [{ + "attr_name": "temp1_high_threshold", + "drv_attr_name": "temp1_max" + }, + { + "attr_name": "temp1_max_hyst" + }, + { + "attr_name": "temp1_input" + } + ] + } + }, + + "TEMP5": { + "dev_info": { + "device_type": "TEMP_SENSOR", + "device_name": "TEMP-CPU-BOARD", + "device_parent": "FPGA-OCORE1" + }, + "dev_attr": { + "display_name": "Temp_CPU_BOARD" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x3", + "dev_addr": "0x4c", + "dev_type": "lm75" + }, + "attr_list": [{ + "attr_name": "temp1_high_threshold", + "drv_attr_name": "temp1_max" + }, + { + "attr_name": "temp1_max_hyst" + }, + { + "attr_name": "temp1_input" + } + ] + } + }, + + "FPGA-OCORE2": { + "dev_info": { + "device_type": "FPGA-OCORE", + "device_name": "FPGA-OCORE2", + "device_parent": "SYSTEM" + }, + "i2c": { + "topo_info": { + "dev_addr": "0x4" + }, + "DEVICES": [ + { + "dev": "MUX1" + } + ] + } + }, + + "MUX1": { + "dev_info": { + "device_type": "MUX", + "device_name": "MUX1", + "device_parent": "FPGA-OCORE2" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x4", + "dev_addr": "0x77", + "dev_type": "pca9548" + }, + "dev_attr": { + "virt_bus": "0x18" + }, + "channel": [{ + "chn": "0", + "dev": "PSU1" + }, + { + "chn": "1", + "dev": "PSU2" + } + ] + } + }, + + "PSU1": { + "dev_info": { + "device_type": "PSU", + "device_name": "PSU1", + "device_parent": "MUX1" + }, + "dev_attr": { + "dev_idx": "1", + "num_psu_fans": "1" + }, + "i2c": { + "interface": [{ + "itf": "pmbus", + "dev": "PSU1-PMBUS" + }, + { + "itf": "eeprom", + "dev": "PSU1-EEPROM" + } + ] + } + }, + + "PSU1-PMBUS": { + "dev_info": { + "device_type": "PSU-PMBUS", + "device_name": "PSU1-PMBUS", + "device_parent": "MUX1", + "virt_parent": "PSU1" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x18", + "dev_addr": "0x58", + "dev_type": "psu_pmbus" + }, + "attr_list": [{ + "attr_name": "psu_present", + "attr_devtype": "io", + "attr_offset": "0x951", + "attr_mask": "0x1", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "psu_model_name", + "attr_devaddr": "0x58", + "attr_devtype": "pmbus", + "attr_offset": "0x9a", + "attr_mask": "0x0", + "attr_cmpval": "0xff", + "attr_len": "12" + }, + { + "attr_name": "psu_power_good", + "attr_devtype": "io", + "attr_offset": "0x951", + "attr_mask": "0x2", + "attr_cmpval": "0x2", + "attr_len": "1" + }, + { + "attr_name": "psu_mfr_id", + "attr_devaddr": "0x58", + "attr_devtype": "pmbus", + "attr_offset": "0x99", + "attr_mask": "0x0", + "attr_cmpval": "0xff", + "attr_len": "10" + }, + { + "attr_name": "psu_fan_dir", + "attr_devaddr": "0x58", + "attr_devtype": "pmbus", + "attr_offset": "0xc3", + "attr_mask": "0x0", + "attr_cmpval": "0xff", + "attr_len": "5" + }, + { + "attr_name": "psu_v_out", + "attr_devaddr": "0x58", + "attr_devtype": "pmbus", + "attr_offset": "0x8b", + "attr_mask": "0x0", + "attr_cmpval": "0xff", + "attr_len": "2" + }, + { + "attr_name": "psu_i_out", + "attr_devaddr": "0x58", + "attr_devtype": "pmbus", + "attr_offset": "0x8c", + "attr_mask": "0x0", + "attr_cmpval": "0xff", + "attr_len": "2" + }, + { + "attr_name": "psu_p_out", + "attr_devaddr": "0x58", + "attr_devtype": "pmbus", + "attr_offset": "0x96", + "attr_mask": "0x0", + "attr_cmpval": "0xff", + "attr_len": "2" + }, + { + "attr_name": "psu_fan1_speed_rpm", + "attr_devaddr": "0x58", + "attr_devtype": "pmbus", + "attr_offset": "0x90", + "attr_mask": "0x0", + "attr_cmpval": "0xff", + "attr_len": "2" + }, + { + "attr_name": "psu_temp1_input", + "attr_devaddr": "0x58", + "attr_devtype": "pmbus", + "attr_offset": "0x8d", + "attr_mask": "0x0", + "attr_cmpval": "0xff", + "attr_len": "2" + } + ] + } + }, + + "PSU1-EEPROM": { + "dev_info": { + "device_type": "PSU-EEPROM", + "device_name": "PSU1-EEPROM", + "device_parent": "MUX1", + "virt_parent": "PSU1" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x18", + "dev_addr": "0x50", + "dev_type": "psu_eeprom" + }, + "attr_list": [{ + "attr_name": "psu_serial_num", + "attr_devaddr": "0x50", + "attr_devtype": "eeprom", + "attr_offset": "0x38", + "attr_mask": "0x0", + "attr_cmpval": "0xff", + "attr_len": "20" + }] + } + }, + + "PSU2": { + "dev_info": { + "device_type": "PSU", + "device_name": "PSU2", + "device_parent": "MUX1" + }, + "dev_attr": { + "dev_idx": "2", + "num_psu_fans": "1" + }, + "i2c": { + "interface": [{ + "itf": "pmbus", + "dev": "PSU2-PMBUS" + }, + { + "itf": "eeprom", + "dev": "PSU2-EEPROM" + } + ] + } + }, + + "PSU2-PMBUS": { + "dev_info": { + "device_type": "PSU-PMBUS", + "device_name": "PSU2-PMBUS", + "device_parent": "MUX1", + "virt_parent": "PSU2" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x19", + "dev_addr": "0x58", + "dev_type": "psu_pmbus" + }, + "attr_list": [{ + "attr_name": "psu_present", + "attr_devtype": "io", + "attr_offset": "0x951", + "attr_mask": "0x10", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "psu_model_name", + "attr_devaddr": "0x58", + "attr_devtype": "pmbus", + "attr_offset": "0x9a", + "attr_mask": "0x0", + "attr_cmpval": "0xff", + "attr_len": "12" + }, + { + "attr_name": "psu_power_good", + "attr_devtype": "io", + "attr_offset": "0x951", + "attr_mask": "0x20", + "attr_cmpval": "0x20", + "attr_len": "1" + }, + { + "attr_name": "psu_mfr_id", + "attr_devaddr": "0x58", + "attr_devtype": "pmbus", + "attr_offset": "0x99", + "attr_mask": "0x0", + "attr_cmpval": "0xff", + "attr_len": "10" + }, + { + "attr_name": "psu_fan_dir", + "attr_devaddr": "0x58", + "attr_devtype": "pmbus", + "attr_offset": "0xc3", + "attr_mask": "0x0", + "attr_cmpval": "0xff", + "attr_len": "5" + }, + { + "attr_name": "psu_v_out", + "attr_devaddr": "0x58", + "attr_devtype": "pmbus", + "attr_offset": "0x8b", + "attr_mask": "0x0", + "attr_cmpval": "0xff", + "attr_len": "2" + }, + { + "attr_name": "psu_i_out", + "attr_devaddr": "0x58", + "attr_devtype": "pmbus", + "attr_offset": "0x8c", + "attr_mask": "0x0", + "attr_cmpval": "0xff", + "attr_len": "2" + }, + { + "attr_name": "psu_p_out", + "attr_devaddr": "0x58", + "attr_devtype": "pmbus", + "attr_offset": "0x96", + "attr_mask": "0x0", + "attr_cmpval": "0xff", + "attr_len": "2" + }, + { + "attr_name": "psu_fan1_speed_rpm", + "attr_devaddr": "0x58", + "attr_devtype": "pmbus", + "attr_offset": "0x90", + "attr_mask": "0x0", + "attr_cmpval": "0xff", + "attr_len": "2" + }, + { + "attr_name": "psu_temp1_input", + "attr_devaddr": "0x58", + "attr_devtype": "pmbus", + "attr_offset": "0x8d", + "attr_mask": "0x0", + "attr_cmpval": "0xff", + "attr_len": "2" + } + ] + } + }, + + "PSU2-EEPROM": { + "dev_info": { + "device_type": "PSU-EEPROM", + "device_name": "PSU2-EEPROM", + "device_parent": "MUX1", + "virt_parent": "PSU2" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x19", + "dev_addr": "0x50", + "dev_type": "psu_eeprom" + }, + "attr_list": [{ + "attr_name": "psu_serial_num", + "attr_devaddr": "0x50", + "attr_devtype": "eeprom", + "attr_offset": "0x38", + "attr_mask": "0x0", + "attr_cmpval": "0xff", + "attr_len": "20" + }] + } + }, + + "FPGA-OCORE3": { + "dev_info": { + "device_type": "FPGA-OCORE", + "device_name": "FPGA-OCORE3", + "device_parent": "SYSTEM" + }, + "i2c": { + "topo_info": { + "dev_addr": "0x5" + }, + "DEVICES": [ + { + "dev": "EEPROM2" + } + ] + } + }, + + "EEPROM2": { + "dev_info": { + "device_type": "EEPROM", + "device_name": "MAC-EEPROM", + "device_parent": "I2C-GPIO0" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x5", + "dev_addr": "0x51", + "dev_type": "24c02" + }, + "dev_attr": { + "access_mode": "BLOCK" + }, + "attr_list": [{ + "attr_name": "eeprom" + }] + } + }, + + "FPGA-OCORE4": { + "dev_info": { + "device_type": "FPGA-OCORE", + "device_name": "FPGA-OCORE4", + "device_parent": "SYSTEM" + }, + "i2c": { + "topo_info": { + "dev_addr": "0x6" + }, + "DEVICES": [ + { + "dev": "CPU_BOARD_CPLD" + } + ] + } + }, + + "CPU_BOARD_CPLD": { + "dev_info": { + "device_type": "CPLD", + "device_name": "CPU_BOARD_CPLD", + "device_parent": "FPGA-OCORE4" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x6", + "dev_addr": "0x0d", + "dev_type": "i2c_cpld" + }, + "dev_attr": {} + } + }, + + "FPGA-OCORE5": { + "dev_info": { + "device_type": "FPGA-OCORE", + "device_name": "FPGA-OCORE5", + "device_parent": "SYSTEM" + }, + "i2c": { + "topo_info": { + "dev_addr": "0x7" + }, + "DEVICES": [] + } + }, + + "FPGA-OCORE6": { + "dev_info": { + "device_type": "FPGA-OCORE", + "device_name": "FPGA-OCORE6", + "device_parent": "SYSTEM" + }, + "i2c": { + "topo_info": { + "dev_addr": "0x8" + }, + "DEVICES": [ + { + "dev": "MAC_BOARD_CPLD1" + }, { + "dev": "MAC_BOARD_CPLD2" + } + ] + } + }, + + "MAC_BOARD_CPLD1": { + "dev_info": { + "device_type": "CPLD", + "device_name": "MAC_BOARD_CPLD1", + "device_parent": "FPGA-OCORE6" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x8", + "dev_addr": "0x30", + "dev_type": "i2c_cpld" + }, + "dev_attr": {} + } + }, + + "MAC_BOARD_CPLD2": { + "dev_info": { + "device_type": "CPLD", + "device_name": "MAC_BOARD_CPLD2", + "device_parent": "FPGA-OCORE6" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x8", + "dev_addr": "0x31", + "dev_type": "i2c_cpld" + }, + "dev_attr": {} + } + }, + + "FPGA-OCORE7": { + "dev_info": { + "device_type": "FPGA-OCORE", + "device_name": "FPGA-OCORE7", + "device_parent": "SYSTEM" + }, + "i2c": { + "topo_info": { + "dev_addr": "0x9" + }, + "DEVICES": [] + } + }, + + "FPGA-OCORE8": { + "dev_info": { + "device_type": "FPGA-OCORE", + "device_name": "FPGA-OCORE8", + "device_parent": "SYSTEM" + }, + "i2c": { + "topo_info": { + "dev_addr": "0xa" + }, + "DEVICES": [] + } + }, + + "FPGA-OCORE9": { + "dev_info": { + "device_type": "FPGA-OCORE", + "device_name": "FPGA-OCORE9", + "device_parent": "SYSTEM" + }, + "i2c": { + "topo_info": { + "dev_addr": "0xb" + }, + "DEVICES": [] + } + }, + + "FPGA-OCORE10": { + "dev_info": { + "device_type": "FPGA-OCORE", + "device_name": "FPGA-OCORE10", + "device_parent": "SYSTEM" + }, + "i2c": { + "topo_info": { + "dev_addr": "0xc" + }, + "DEVICES": [ + { + "dev": "PORT-MUX0" + }, + { + "dev": "PORT-MUX1" + }, + { + "dev": "PORT-MUX2" + }, + { + "dev": "PORT-MUX3" + } + ] + } + }, + + "PORT-MUX0": { + "dev_info": { + "device_type": "MUX", + "device_name": "PORT-MUX0", + "device_parent": "FPGA-OCORE10" + }, + "i2c": { + "topo_info": { + "parent_bus": "0xc", + "dev_addr": "0x70", + "dev_type": "pca9548" + }, + "dev_attr": { + "virt_bus": "0x20" + }, + "channel": [{ + "chn": "0", + "dev": "PORT1" + }, + { + "chn": "1", + "dev": "PORT2" + }, + { + "chn": "2", + "dev": "PORT3" + }, + { + "chn": "3", + "dev": "PORT4" + }, + { + "chn": "4", + "dev": "PORT5" + }, + { + "chn": "5", + "dev": "PORT6" + }, + { + "chn": "6", + "dev": "PORT7" + }, + { + "chn": "7", + "dev": "PORT8" + } + ] + } + }, + + "PORT-MUX1": { + "dev_info": { + "device_type": "MUX", + "device_name": "PORT-MUX1", + "device_parent": "FPGA-OCORE10" + }, + "i2c": { + "topo_info": { + "parent_bus": "0xc", + "dev_addr": "0x71", + "dev_type": "pca9548" + }, + "dev_attr": { + "virt_bus": "0x28" + }, + "channel": [{ + "chn": "0", + "dev": "PORT9" + }, + { + "chn": "1", + "dev": "PORT10" + }, + { + "chn": "2", + "dev": "PORT11" + }, + { + "chn": "3", + "dev": "PORT12" + }, + { + "chn": "4", + "dev": "PORT13" + }, + { + "chn": "5", + "dev": "PORT14" + }, + { + "chn": "6", + "dev": "PORT15" + }, + { + "chn": "7", + "dev": "PORT16" + } + ] + } + }, + + "PORT-MUX2": { + "dev_info": { + "device_type": "MUX", + "device_name": "PORT-MUX2", + "device_parent": "FPGA-OCORE10" + }, + "i2c": { + "topo_info": { + "parent_bus": "0xc", + "dev_addr": "0x72", + "dev_type": "pca9548" + }, + "dev_attr": { + "virt_bus": "0x30" + }, + "channel": [{ + "chn": "0", + "dev": "PORT17" + }, + { + "chn": "1", + "dev": "PORT18" + }, + { + "chn": "2", + "dev": "PORT19" + }, + { + "chn": "3", + "dev": "PORT20" + }, + { + "chn": "4", + "dev": "PORT21" + }, + { + "chn": "5", + "dev": "PORT22" + }, + { + "chn": "6", + "dev": "PORT23" + }, + { + "chn": "7", + "dev": "PORT24" + } + ] + } + }, + + "PORT-MUX3": { + "dev_info": { + "device_type": "MUX", + "device_name": "PORT-MUX3", + "device_parent": "FPGA-OCORE10" + }, + "i2c": { + "topo_info": { + "parent_bus": "0xc", + "dev_addr": "0x73", + "dev_type": "pca9548" + }, + "dev_attr": { + "virt_bus": "0x38" + }, + "channel": [{ + "chn": "0", + "dev": "PORT25" + }, + { + "chn": "1", + "dev": "PORT26" + }, + { + "chn": "2", + "dev": "PORT27" + }, + { + "chn": "3", + "dev": "PORT28" + }, + { + "chn": "4", + "dev": "PORT29" + }, + { + "chn": "5", + "dev": "PORT30" + }, + { + "chn": "6", + "dev": "PORT31" + }, + { + "chn": "7", + "dev": "PORT32" + } + ] + } + }, + + "PORT1": { + "dev_info": { + "device_type": "QSFP", + "device_name": "PORT1", + "device_parent": "PORT-MUX0" + }, + "dev_attr": { + "dev_idx": "1" + }, + "i2c": { + "interface": [{ + "itf": "eeprom", + "dev": "PORT1-EEPROM" + }, { + "itf": "control", + "dev": "PORT1-CTRL" + }] + } + }, + + "PORT1-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT1-EEPROM", + "device_parent": "PORT-MUX0", + "virt_parent": "PORT1" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x20", + "dev_addr": "0x50", + "dev_type": "optoe1" + }, + "attr_list": [{ + "attr_name": "eeprom" + }] + } + }, + + "PORT1-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT1-CTRL", + "device_parent": "PORT-MUX0", + "virt_parent": "PORT1" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x20", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [{ + "attr_name": "xcvr_present", + "attr_devaddr": "0x30", + "attr_devtype": "cpld", + "attr_offset": "0x10", + "attr_mask": "0x0", + "attr_cmpval": "0x0", + "attr_len": "1" + }, { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x30", + "attr_devtype": "cpld", + "attr_offset": "0x14", + "attr_mask": "0x0", + "attr_cmpval": "0x0", + "attr_len": "1" + }] + } + }, + + "PORT2": { + "dev_info": { + "device_type": "QSFP", + "device_name": "PORT2", + "device_parent": "PORT-MUX0" + }, + "dev_attr": { + "dev_idx": "2" + }, + "i2c": { + "interface": [{ + "itf": "eeprom", + "dev": "PORT2-EEPROM" + }, { + "itf": "control", + "dev": "PORT2-CTRL" + }] + } + }, + + "PORT2-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT2-EEPROM", + "device_parent": "PORT-MUX0", + "virt_parent": "PORT2" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x21", + "dev_addr": "0x50", + "dev_type": "optoe1" + }, + "attr_list": [{ + "attr_name": "eeprom" + }] + } + }, + + "PORT2-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT2-CTRL", + "device_parent": "PORT-MUX0", + "virt_parent": "PORT2" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x21", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [{ + "attr_name": "xcvr_present", + "attr_devaddr": "0x30", + "attr_devtype": "cpld", + "attr_offset": "0x10", + "attr_mask": "0x1", + "attr_cmpval": "0x0", + "attr_len": "1" + }, { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x30", + "attr_devtype": "cpld", + "attr_offset": "0x14", + "attr_mask": "0x1", + "attr_cmpval": "0x0", + "attr_len": "1" + }] + } + }, + + "PORT3": { + "dev_info": { + "device_type": "QSFP", + "device_name": "PORT3", + "device_parent": "PORT-MUX0" + }, + "dev_attr": { + "dev_idx": "3" + }, + "i2c": { + "interface": [{ + "itf": "eeprom", + "dev": "PORT3-EEPROM" + }, { + "itf": "control", + "dev": "PORT3-CTRL" + }] + } + }, + + "PORT3-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT3-EEPROM", + "device_parent": "PORT-MUX0", + "virt_parent": "PORT3" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x22", + "dev_addr": "0x50", + "dev_type": "optoe1" + }, + "attr_list": [{ + "attr_name": "eeprom" + }] + } + }, + + "PORT3-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT3-CTRL", + "device_parent": "PORT-MUX0", + "virt_parent": "PORT3" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x22", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [{ + "attr_name": "xcvr_present", + "attr_devaddr": "0x30", + "attr_devtype": "cpld", + "attr_offset": "0x10", + "attr_mask": "0x2", + "attr_cmpval": "0x0", + "attr_len": "1" + }, { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x30", + "attr_devtype": "cpld", + "attr_offset": "0x14", + "attr_mask": "0x2", + "attr_cmpval": "0x0", + "attr_len": "1" + }] + } + }, + + + "PORT4": { + "dev_info": { + "device_type": "QSFP", + "device_name": "PORT4", + "device_parent": "PORT-MUX0" + }, + "dev_attr": { + "dev_idx": "4" + }, + "i2c": { + "interface": [{ + "itf": "eeprom", + "dev": "PORT4-EEPROM" + }, { + "itf": "control", + "dev": "PORT4-CTRL" + }] + } + }, + + "PORT4-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT4-EEPROM", + "device_parent": "PORT-MUX0", + "virt_parent": "PORT4" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x23", + "dev_addr": "0x50", + "dev_type": "optoe1" + }, + "attr_list": [{ + "attr_name": "eeprom" + }] + } + }, + + "PORT4-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT4-CTRL", + "device_parent": "PORT-MUX0", + "virt_parent": "PORT4" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x23", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [{ + "attr_name": "xcvr_present", + "attr_devaddr": "0x30", + "attr_devtype": "cpld", + "attr_offset": "0x10", + "attr_mask": "0x3", + "attr_cmpval": "0x0", + "attr_len": "1" + }, { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x30", + "attr_devtype": "cpld", + "attr_offset": "0x14", + "attr_mask": "0x3", + "attr_cmpval": "0x0", + "attr_len": "1" + }] + } + }, + + + "PORT5": { + "dev_info": { + "device_type": "QSFP", + "device_name": "PORT5", + "device_parent": "PORT-MUX0" + }, + "dev_attr": { + "dev_idx": "5" + }, + "i2c": { + "interface": [{ + "itf": "eeprom", + "dev": "PORT5-EEPROM" + }, { + "itf": "control", + "dev": "PORT5-CTRL" + }] + } + }, + + "PORT5-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT5-EEPROM", + "device_parent": "PORT-MUX0", + "virt_parent": "PORT5" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x24", + "dev_addr": "0x50", + "dev_type": "optoe1" + }, + "attr_list": [{ + "attr_name": "eeprom" + }] + } + }, + + "PORT5-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT5-CTRL", + "device_parent": "PORT-MUX0", + "virt_parent": "PORT5" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x24", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [{ + "attr_name": "xcvr_present", + "attr_devaddr": "0x30", + "attr_devtype": "cpld", + "attr_offset": "0x10", + "attr_mask": "0x4", + "attr_cmpval": "0x0", + "attr_len": "1" + }, { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x30", + "attr_devtype": "cpld", + "attr_offset": "0x14", + "attr_mask": "0x4", + "attr_cmpval": "0x0", + "attr_len": "1" + }] + } + }, + + + "PORT6": { + "dev_info": { + "device_type": "QSFP", + "device_name": "PORT6", + "device_parent": "PORT-MUX0" + }, + "dev_attr": { + "dev_idx": "6" + }, + "i2c": { + "interface": [{ + "itf": "eeprom", + "dev": "PORT6-EEPROM" + }, { + "itf": "control", + "dev": "PORT6-CTRL" + }] + } + }, + + "PORT6-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT6-EEPROM", + "device_parent": "PORT-MUX0", + "virt_parent": "PORT6" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x25", + "dev_addr": "0x50", + "dev_type": "optoe1" + }, + "attr_list": [{ + "attr_name": "eeprom" + }] + } + }, + + "PORT6-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT6-CTRL", + "device_parent": "PORT-MUX0", + "virt_parent": "PORT6" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x25", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [{ + "attr_name": "xcvr_present", + "attr_devaddr": "0x30", + "attr_devtype": "cpld", + "attr_offset": "0x10", + "attr_mask": "0x5", + "attr_cmpval": "0x0", + "attr_len": "1" + }, { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x30", + "attr_devtype": "cpld", + "attr_offset": "0x14", + "attr_mask": "0x5", + "attr_cmpval": "0x0", + "attr_len": "1" + }] + } + }, + + "PORT7": { + "dev_info": { + "device_type": "QSFP", + "device_name": "PORT7", + "device_parent": "PORT-MUX0" + }, + "dev_attr": { + "dev_idx": "7" + }, + "i2c": { + "interface": [{ + "itf": "eeprom", + "dev": "PORT7-EEPROM" + }, { + "itf": "control", + "dev": "PORT7-CTRL" + }] + } + }, + + "PORT7-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT7-EEPROM", + "device_parent": "PORT-MUX0", + "virt_parent": "PORT7" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x26", + "dev_addr": "0x50", + "dev_type": "optoe1" + }, + "attr_list": [{ + "attr_name": "eeprom" + }] + } + }, + + "PORT7-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT7-CTRL", + "device_parent": "PORT-MUX0", + "virt_parent": "PORT7" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x26", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [{ + "attr_name": "xcvr_present", + "attr_devaddr": "0x30", + "attr_devtype": "cpld", + "attr_offset": "0x30", + "attr_mask": "0x6", + "attr_cmpval": "0x0", + "attr_len": "1" + }, { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x30", + "attr_devtype": "cpld", + "attr_offset": "0x14", + "attr_mask": "0x6", + "attr_cmpval": "0x0", + "attr_len": "1" + }] + } + }, + + "PORT8": { + "dev_info": { + "device_type": "QSFP", + "device_name": "PORT8", + "device_parent": "PORT-MUX0" + }, + "dev_attr": { + "dev_idx": "8" + }, + "i2c": { + "interface": [{ + "itf": "eeprom", + "dev": "PORT8-EEPROM" + }, { + "itf": "control", + "dev": "PORT8-CTRL" + }] + } + }, + + "PORT8-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT8-EEPROM", + "device_parent": "PORT-MUX0", + "virt_parent": "PORT8" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x27", + "dev_addr": "0x50", + "dev_type": "optoe1" + }, + "attr_list": [{ + "attr_name": "eeprom" + }] + } + }, + + "PORT8-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT8-CTRL", + "device_parent": "PORT-MUX0", + "virt_parent": "PORT8" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x27", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [{ + "attr_name": "xcvr_present", + "attr_devaddr": "0x30", + "attr_devtype": "cpld", + "attr_offset": "0x10", + "attr_mask": "0x7", + "attr_cmpval": "0x0", + "attr_len": "1" + }, { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x30", + "attr_devtype": "cpld", + "attr_offset": "0x14", + "attr_mask": "0x7", + "attr_cmpval": "0x0", + "attr_len": "1" + }] + } + }, + + "PORT9": { + "dev_info": { + "device_type": "QSFP", + "device_name": "PORT9", + "device_parent": "PORT-MUX1" + }, + "dev_attr": { + "dev_idx": "9" + }, + "i2c": { + "interface": [{ + "itf": "eeprom", + "dev": "PORT9-EEPROM" + }, { + "itf": "control", + "dev": "PORT9-CTRL" + }] + } + }, + + "PORT9-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT9-EEPROM", + "device_parent": "PORT-MUX1", + "virt_parent": "PORT9" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x28", + "dev_addr": "0x50", + "dev_type": "optoe1" + }, + "attr_list": [{ + "attr_name": "eeprom" + }] + } + }, + + "PORT9-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT9-CTRL", + "device_parent": "PORT-MUX1", + "virt_parent": "PORT9" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x28", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [{ + "attr_name": "xcvr_present", + "attr_devaddr": "0x30", + "attr_devtype": "cpld", + "attr_offset": "0x11", + "attr_mask": "0x0", + "attr_cmpval": "0x0", + "attr_len": "1" + }, { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x30", + "attr_devtype": "cpld", + "attr_offset": "0x15", + "attr_mask": "0x0", + "attr_cmpval": "0x0", + "attr_len": "1" + }] + } + }, + + "PORT10": { + "dev_info": { + "device_type": "QSFP", + "device_name": "PORT10", + "device_parent": "PORT-MUX1" + }, + "dev_attr": { + "dev_idx": "10" + }, + "i2c": { + "interface": [{ + "itf": "eeprom", + "dev": "PORT10-EEPROM" + }, { + "itf": "control", + "dev": "PORT10-CTRL" + }] + } + }, + + "PORT10-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT10-EEPROM", + "device_parent": "PORT-MUX1", + "virt_parent": "PORT10" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x29", + "dev_addr": "0x50", + "dev_type": "optoe1" + }, + "attr_list": [{ + "attr_name": "eeprom" + }] + } + }, + + "PORT10-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT10-CTRL", + "device_parent": "PORT-MUX1", + "virt_parent": "PORT10" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x29", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [{ + "attr_name": "xcvr_present", + "attr_devaddr": "0x30", + "attr_devtype": "cpld", + "attr_offset": "0x11", + "attr_mask": "0x1", + "attr_cmpval": "0x0", + "attr_len": "1" + }, { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x30", + "attr_devtype": "cpld", + "attr_offset": "0x15", + "attr_mask": "0x1", + "attr_cmpval": "0x0", + "attr_len": "1" + }] + } + }, + + + "PORT11": { + "dev_info": { + "device_type": "QSFP", + "device_name": "PORT11", + "device_parent": "PORT-MUX1" + }, + "dev_attr": { + "dev_idx": "11" + }, + "i2c": { + "interface": [{ + "itf": "eeprom", + "dev": "PORT11-EEPROM" + }, { + "itf": "control", + "dev": "PORT11-CTRL" + }] + } + }, + + "PORT11-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT11-EEPROM", + "device_parent": "PORT-MUX1", + "virt_parent": "PORT11" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x2a", + "dev_addr": "0x50", + "dev_type": "optoe1" + }, + "attr_list": [{ + "attr_name": "eeprom" + }] + } + }, + + "PORT11-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT11-CTRL", + "device_parent": "PORT-MUX1", + "virt_parent": "PORT11" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x2a", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [{ + "attr_name": "xcvr_present", + "attr_devaddr": "0x30", + "attr_devtype": "cpld", + "attr_offset": "0x11", + "attr_mask": "0x2", + "attr_cmpval": "0x0", + "attr_len": "1" + }, { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x30", + "attr_devtype": "cpld", + "attr_offset": "0x15", + "attr_mask": "0x2", + "attr_cmpval": "0x0", + "attr_len": "1" + }] + } + }, + + + "PORT12": { + "dev_info": { + "device_type": "QSFP", + "device_name": "PORT12", + "device_parent": "PORT-MUX1" + }, + "dev_attr": { + "dev_idx": "12" + }, + "i2c": { + "interface": [{ + "itf": "eeprom", + "dev": "PORT12-EEPROM" + }, { + "itf": "control", + "dev": "PORT12-CTRL" + }] + } + }, + + "PORT12-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT12-EEPROM", + "device_parent": "PORT-MUX1", + "virt_parent": "PORT12" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x2b", + "dev_addr": "0x50", + "dev_type": "optoe1" + }, + "attr_list": [{ + "attr_name": "eeprom" + }] + } + }, + + "PORT12-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT12-CTRL", + "device_parent": "PORT-MUX1", + "virt_parent": "PORT12" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x2b", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [{ + "attr_name": "xcvr_present", + "attr_devaddr": "0x30", + "attr_devtype": "cpld", + "attr_offset": "0x11", + "attr_mask": "0x3", + "attr_cmpval": "0x0", + "attr_len": "1" + }, { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x30", + "attr_devtype": "cpld", + "attr_offset": "0x15", + "attr_mask": "0x3", + "attr_cmpval": "0x0", + "attr_len": "1" + }] + } + }, + + + "PORT13": { + "dev_info": { + "device_type": "QSFP", + "device_name": "PORT13", + "device_parent": "PORT-MUX1" + }, + "dev_attr": { + "dev_idx": "13" + }, + "i2c": { + "interface": [{ + "itf": "eeprom", + "dev": "PORT13-EEPROM" + }, { + "itf": "control", + "dev": "PORT13-CTRL" + }] + } + }, + + "PORT13-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT13-EEPROM", + "device_parent": "PORT-MUX1", + "virt_parent": "PORT13" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x2c", + "dev_addr": "0x50", + "dev_type": "optoe1" + }, + "attr_list": [{ + "attr_name": "eeprom" + }] + } + }, + + "PORT13-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT13-CTRL", + "device_parent": "PORT-MUX1", + "virt_parent": "PORT13" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x2c", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [{ + "attr_name": "xcvr_present", + "attr_devaddr": "0x30", + "attr_devtype": "cpld", + "attr_offset": "0x11", + "attr_mask": "0x4", + "attr_cmpval": "0x0", + "attr_len": "1" + }, { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x30", + "attr_devtype": "cpld", + "attr_offset": "0x15", + "attr_mask": "0x4", + "attr_cmpval": "0x0", + "attr_len": "1" + }] + } + }, + + + "PORT14": { + "dev_info": { + "device_type": "QSFP", + "device_name": "PORT14", + "device_parent": "PORT-MUX1" + }, + "dev_attr": { + "dev_idx": "14" + }, + "i2c": { + "interface": [{ + "itf": "eeprom", + "dev": "PORT14-EEPROM" + }, { + "itf": "control", + "dev": "PORT14-CTRL" + }] + } + }, + + "PORT14-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT14-EEPROM", + "device_parent": "PORT-MUX1", + "virt_parent": "PORT14" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x2d", + "dev_addr": "0x50", + "dev_type": "optoe1" + }, + "attr_list": [{ + "attr_name": "eeprom" + }] + } + }, + + "PORT14-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT14-CTRL", + "device_parent": "PORT-MUX1", + "virt_parent": "PORT14" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x2d", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [{ + "attr_name": "xcvr_present", + "attr_devaddr": "0x30", + "attr_devtype": "cpld", + "attr_offset": "0x11", + "attr_mask": "0x5", + "attr_cmpval": "0x0", + "attr_len": "1" + }, { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x30", + "attr_devtype": "cpld", + "attr_offset": "0x15", + "attr_mask": "0x5", + "attr_cmpval": "0x0", + "attr_len": "1" + }] + } + }, + + "PORT15": { + "dev_info": { + "device_type": "QSFP", + "device_name": "PORT15", + "device_parent": "PORT-MUX1" + }, + "dev_attr": { + "dev_idx": "15" + }, + "i2c": { + "interface": [{ + "itf": "eeprom", + "dev": "PORT15-EEPROM" + }, { + "itf": "control", + "dev": "PORT15-CTRL" + }] + } + }, + + "PORT15-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT15-EEPROM", + "device_parent": "PORT-MUX1", + "virt_parent": "PORT15" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x2e", + "dev_addr": "0x50", + "dev_type": "optoe1" + }, + "attr_list": [{ + "attr_name": "eeprom" + }] + } + }, + + "PORT15-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT15-CTRL", + "device_parent": "PORT-MUX1", + "virt_parent": "PORT15" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x2e", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [{ + "attr_name": "xcvr_present", + "attr_devaddr": "0x30", + "attr_devtype": "cpld", + "attr_offset": "0x11", + "attr_mask": "0x6", + "attr_cmpval": "0x0", + "attr_len": "1" + }, { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x30", + "attr_devtype": "cpld", + "attr_offset": "0x15", + "attr_mask": "0x6", + "attr_cmpval": "0x0", + "attr_len": "1" + }] + } + }, + + "PORT16": { + "dev_info": { + "device_type": "QSFP", + "device_name": "PORT16", + "device_parent": "PORT-MUX1" + }, + "dev_attr": { + "dev_idx": "16" + }, + "i2c": { + "interface": [{ + "itf": "eeprom", + "dev": "PORT16-EEPROM" + }, { + "itf": "control", + "dev": "PORT16-CTRL" + }] + } + }, + + "PORT16-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT16-EEPROM", + "device_parent": "PORT-MUX1", + "virt_parent": "PORT16" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x2f", + "dev_addr": "0x50", + "dev_type": "optoe1" + }, + "attr_list": [{ + "attr_name": "eeprom" + }] + } + }, + + "PORT16-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT16-CTRL", + "device_parent": "PORT-MUX1", + "virt_parent": "PORT16" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x2f", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [{ + "attr_name": "xcvr_present", + "attr_devaddr": "0x30", + "attr_devtype": "cpld", + "attr_offset": "0x11", + "attr_mask": "0x7", + "attr_cmpval": "0x0", + "attr_len": "1" + }, { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x30", + "attr_devtype": "cpld", + "attr_offset": "0x15", + "attr_mask": "0x7", + "attr_cmpval": "0x0", + "attr_len": "1" + }] + } + }, + + "PORT17": { + "dev_info": { + "device_type": "QSFP", + "device_name": "PORT17", + "device_parent": "PORT-MUX2" + }, + "dev_attr": { + "dev_idx": "17" + }, + "i2c": { + "interface": [{ + "itf": "eeprom", + "dev": "PORT17-EEPROM" + }, { + "itf": "control", + "dev": "PORT17-CTRL" + }] + } + }, + + "PORT17-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT17-EEPROM", + "device_parent": "PORT-MUX2", + "virt_parent": "PORT17" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x30", + "dev_addr": "0x50", + "dev_type": "optoe1" + }, + "attr_list": [{ + "attr_name": "eeprom" + }] + } + }, + + "PORT17-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT17-CTRL", + "device_parent": "PORT-MUX2", + "virt_parent": "PORT17" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x30", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [{ + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devtype": "cpld", + "attr_offset": "0x10", + "attr_mask": "0x0", + "attr_cmpval": "0x0", + "attr_len": "1" + }, { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x31", + "attr_devtype": "cpld", + "attr_offset": "0x14", + "attr_mask": "0x0", + "attr_cmpval": "0x0", + "attr_len": "1" + }] + } + }, + + "PORT18": { + "dev_info": { + "device_type": "QSFP", + "device_name": "PORT18", + "device_parent": "PORT-MUX2" + }, + "dev_attr": { + "dev_idx": "18" + }, + "i2c": { + "interface": [{ + "itf": "eeprom", + "dev": "PORT18-EEPROM" + }, { + "itf": "control", + "dev": "PORT18-CTRL" + }] + } + }, + + "PORT18-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT18-EEPROM", + "device_parent": "PORT-MUX2", + "virt_parent": "PORT18" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x31", + "dev_addr": "0x50", + "dev_type": "optoe1" + }, + "attr_list": [{ + "attr_name": "eeprom" + }] + } + }, + + "PORT18-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT18-CTRL", + "device_parent": "PORT-MUX2", + "virt_parent": "PORT18" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x31", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [{ + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devtype": "cpld", + "attr_offset": "0x10", + "attr_mask": "0x1", + "attr_cmpval": "0x0", + "attr_len": "1" + }, { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x31", + "attr_devtype": "cpld", + "attr_offset": "0x14", + "attr_mask": "0x1", + "attr_cmpval": "0x0", + "attr_len": "1" + }] + } + }, + + + "PORT19": { + "dev_info": { + "device_type": "QSFP", + "device_name": "PORT19", + "device_parent": "PORT-MUX2" + }, + "dev_attr": { + "dev_idx": "19" + }, + "i2c": { + "interface": [{ + "itf": "eeprom", + "dev": "PORT19-EEPROM" + }, { + "itf": "control", + "dev": "PORT19-CTRL" + }] + } + }, + + "PORT19-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT19-EEPROM", + "device_parent": "PORT-MUX2", + "virt_parent": "PORT19" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x32", + "dev_addr": "0x50", + "dev_type": "optoe1" + }, + "attr_list": [{ + "attr_name": "eeprom" + }] + } + }, + + "PORT19-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT19-CTRL", + "device_parent": "PORT-MUX2", + "virt_parent": "PORT19" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x32", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [{ + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devtype": "cpld", + "attr_offset": "0x10", + "attr_mask": "0x2", + "attr_cmpval": "0x0", + "attr_len": "1" + }, { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x31", + "attr_devtype": "cpld", + "attr_offset": "0x14", + "attr_mask": "0x2", + "attr_cmpval": "0x0", + "attr_len": "1" + }] + } + }, + + + "PORT20": { + "dev_info": { + "device_type": "QSFP", + "device_name": "PORT20", + "device_parent": "PORT-MUX2" + }, + "dev_attr": { + "dev_idx": "20" + }, + "i2c": { + "interface": [{ + "itf": "eeprom", + "dev": "PORT20-EEPROM" + }, { + "itf": "control", + "dev": "PORT20-CTRL" + }] + } + }, + + "PORT20-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT20-EEPROM", + "device_parent": "PORT-MUX2", + "virt_parent": "PORT20" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x33", + "dev_addr": "0x50", + "dev_type": "optoe1" + }, + "attr_list": [{ + "attr_name": "eeprom" + }] + } + }, + + "PORT20-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT20-CTRL", + "device_parent": "PORT-MUX2", + "virt_parent": "PORT20" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x33", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [{ + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devtype": "cpld", + "attr_offset": "0x10", + "attr_mask": "0x3", + "attr_cmpval": "0x0", + "attr_len": "1" + }, { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x31", + "attr_devtype": "cpld", + "attr_offset": "0x14", + "attr_mask": "0x3", + "attr_cmpval": "0x0", + "attr_len": "1" + }] + } + }, + + + "PORT21": { + "dev_info": { + "device_type": "QSFP", + "device_name": "PORT21", + "device_parent": "PORT-MUX2" + }, + "dev_attr": { + "dev_idx": "21" + }, + "i2c": { + "interface": [{ + "itf": "eeprom", + "dev": "PORT21-EEPROM" + }, { + "itf": "control", + "dev": "PORT21-CTRL" + }] + } + }, + + "PORT21-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT21-EEPROM", + "device_parent": "PORT-MUX2", + "virt_parent": "PORT21" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x34", + "dev_addr": "0x50", + "dev_type": "optoe1" + }, + "attr_list": [{ + "attr_name": "eeprom" + }] + } + }, + + "PORT21-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT21-CTRL", + "device_parent": "PORT-MUX2", + "virt_parent": "PORT21" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x34", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [{ + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devtype": "cpld", + "attr_offset": "0x10", + "attr_mask": "0x4", + "attr_cmpval": "0x0", + "attr_len": "1" + }, { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x31", + "attr_devtype": "cpld", + "attr_offset": "0x14", + "attr_mask": "0x4", + "attr_cmpval": "0x0", + "attr_len": "1" + }] + } + }, + + + "PORT22": { + "dev_info": { + "device_type": "QSFP", + "device_name": "PORT22", + "device_parent": "PORT-MUX2" + }, + "dev_attr": { + "dev_idx": "22" + }, + "i2c": { + "interface": [{ + "itf": "eeprom", + "dev": "PORT22-EEPROM" + }, { + "itf": "control", + "dev": "PORT22-CTRL" + }] + } + }, + + "PORT22-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT22-EEPROM", + "device_parent": "PORT-MUX2", + "virt_parent": "PORT22" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x35", + "dev_addr": "0x50", + "dev_type": "optoe1" + }, + "attr_list": [{ + "attr_name": "eeprom" + }] + } + }, + + "PORT22-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT22-CTRL", + "device_parent": "PORT-MUX2", + "virt_parent": "PORT22" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x35", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [{ + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devtype": "cpld", + "attr_offset": "0x10", + "attr_mask": "0x5", + "attr_cmpval": "0x0", + "attr_len": "1" + }, { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x31", + "attr_devtype": "cpld", + "attr_offset": "0x14", + "attr_mask": "0x5", + "attr_cmpval": "0x0", + "attr_len": "1" + }] + } + }, + + "PORT23": { + "dev_info": { + "device_type": "QSFP", + "device_name": "PORT23", + "device_parent": "PORT-MUX2" + }, + "dev_attr": { + "dev_idx": "23" + }, + "i2c": { + "interface": [{ + "itf": "eeprom", + "dev": "PORT23-EEPROM" + }, { + "itf": "control", + "dev": "PORT23-CTRL" + }] + } + }, + + "PORT23-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT23-EEPROM", + "device_parent": "PORT-MUX2", + "virt_parent": "PORT23" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x36", + "dev_addr": "0x50", + "dev_type": "optoe1" + }, + "attr_list": [{ + "attr_name": "eeprom" + }] + } + }, + + "PORT23-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT23-CTRL", + "device_parent": "PORT-MUX2", + "virt_parent": "PORT23" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x36", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [{ + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devtype": "cpld", + "attr_offset": "0x10", + "attr_mask": "0x6", + "attr_cmpval": "0x0", + "attr_len": "1" + }, { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x31", + "attr_devtype": "cpld", + "attr_offset": "0x14", + "attr_mask": "0x6", + "attr_cmpval": "0x0", + "attr_len": "1" + }] + } + }, + + "PORT24": { + "dev_info": { + "device_type": "QSFP", + "device_name": "PORT24", + "device_parent": "PORT-MUX2" + }, + "dev_attr": { + "dev_idx": "24" + }, + "i2c": { + "interface": [{ + "itf": "eeprom", + "dev": "PORT24-EEPROM" + }, { + "itf": "control", + "dev": "PORT24-CTRL" + }] + } + }, + + "PORT24-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT24-EEPROM", + "device_parent": "PORT-MUX2", + "virt_parent": "PORT24" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x37", + "dev_addr": "0x50", + "dev_type": "optoe1" + }, + "attr_list": [{ + "attr_name": "eeprom" + }] + } + }, + + "PORT24-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT24-CTRL", + "device_parent": "PORT-MUX2", + "virt_parent": "PORT24" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x37", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [{ + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devtype": "cpld", + "attr_offset": "0x10", + "attr_mask": "0x7", + "attr_cmpval": "0x0", + "attr_len": "1" + }, { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x31", + "attr_devtype": "cpld", + "attr_offset": "0x14", + "attr_mask": "0x7", + "attr_cmpval": "0x0", + "attr_len": "1" + }] + } + }, + + "PORT25": { + "dev_info": { + "device_type": "QSFP", + "device_name": "PORT25", + "device_parent": "PORT-MUX3" + }, + "dev_attr": { + "dev_idx": "25" + }, + "i2c": { + "interface": [{ + "itf": "eeprom", + "dev": "PORT25-EEPROM" + }, { + "itf": "control", + "dev": "PORT25-CTRL" + }] + } + }, + + "PORT25-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT25-EEPROM", + "device_parent": "PORT-MUX3", + "virt_parent": "PORT25" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x38", + "dev_addr": "0x50", + "dev_type": "optoe1" + }, + "attr_list": [{ + "attr_name": "eeprom" + }] + } + }, + + "PORT25-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT25-CTRL", + "device_parent": "PORT-MUX3", + "virt_parent": "PORT25" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x38", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [{ + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devtype": "cpld", + "attr_offset": "0x11", + "attr_mask": "0x0", + "attr_cmpval": "0x0", + "attr_len": "1" + }, { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x31", + "attr_devtype": "cpld", + "attr_offset": "0x15", + "attr_mask": "0x0", + "attr_cmpval": "0x0", + "attr_len": "1" + }] + } + }, + + "PORT26": { + "dev_info": { + "device_type": "QSFP", + "device_name": "PORT26", + "device_parent": "PORT-MUX3" + }, + "dev_attr": { + "dev_idx": "26" + }, + "i2c": { + "interface": [{ + "itf": "eeprom", + "dev": "PORT26-EEPROM" + }, { + "itf": "control", + "dev": "PORT26-CTRL" + }] + } + }, + + "PORT26-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT26-EEPROM", + "device_parent": "PORT-MUX3", + "virt_parent": "PORT26" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x39", + "dev_addr": "0x50", + "dev_type": "optoe1" + }, + "attr_list": [{ + "attr_name": "eeprom" + }] + } + }, + + "PORT26-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT26-CTRL", + "device_parent": "PORT-MUX3", + "virt_parent": "PORT26" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x39", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [{ + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devtype": "cpld", + "attr_offset": "0x11", + "attr_mask": "0x1", + "attr_cmpval": "0x0", + "attr_len": "1" + }, { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x31", + "attr_devtype": "cpld", + "attr_offset": "0x15", + "attr_mask": "0x1", + "attr_cmpval": "0x0", + "attr_len": "1" + }] + } + }, + + + "PORT27": { + "dev_info": { + "device_type": "QSFP", + "device_name": "PORT27", + "device_parent": "PORT-MUX3" + }, + "dev_attr": { + "dev_idx": "27" + }, + "i2c": { + "interface": [{ + "itf": "eeprom", + "dev": "PORT27-EEPROM" + }, { + "itf": "control", + "dev": "PORT27-CTRL" + }] + } + }, + + "PORT27-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT27-EEPROM", + "device_parent": "PORT-MUX3", + "virt_parent": "PORT27" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x3a", + "dev_addr": "0x50", + "dev_type": "optoe1" + }, + "attr_list": [{ + "attr_name": "eeprom" + }] + } + }, + + "PORT27-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT27-CTRL", + "device_parent": "PORT-MUX3", + "virt_parent": "PORT27" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x3a", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [{ + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devtype": "cpld", + "attr_offset": "0x11", + "attr_mask": "0x2", + "attr_cmpval": "0x0", + "attr_len": "1" + }, { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x31", + "attr_devtype": "cpld", + "attr_offset": "0x15", + "attr_mask": "0x2", + "attr_cmpval": "0x0", + "attr_len": "1" + }] + } + }, + + + "PORT28": { + "dev_info": { + "device_type": "QSFP", + "device_name": "PORT28", + "device_parent": "PORT-MUX3" + }, + "dev_attr": { + "dev_idx": "28" + }, + "i2c": { + "interface": [{ + "itf": "eeprom", + "dev": "PORT28-EEPROM" + }, { + "itf": "control", + "dev": "PORT28-CTRL" + }] + } + }, + + "PORT28-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT28-EEPROM", + "device_parent": "PORT-MUX3", + "virt_parent": "PORT28" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x3b", + "dev_addr": "0x50", + "dev_type": "optoe1" + }, + "attr_list": [{ + "attr_name": "eeprom" + }] + } + }, + + "PORT28-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT28-CTRL", + "device_parent": "PORT-MUX3", + "virt_parent": "PORT28" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x3b", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [{ + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devtype": "cpld", + "attr_offset": "0x11", + "attr_mask": "0x3", + "attr_cmpval": "0x0", + "attr_len": "1" + }, { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x31", + "attr_devtype": "cpld", + "attr_offset": "0x15", + "attr_mask": "0x3", + "attr_cmpval": "0x0", + "attr_len": "1" + }] + } + }, + + + "PORT29": { + "dev_info": { + "device_type": "QSFP", + "device_name": "PORT29", + "device_parent": "PORT-MUX3" + }, + "dev_attr": { + "dev_idx": "29" + }, + "i2c": { + "interface": [{ + "itf": "eeprom", + "dev": "PORT29-EEPROM" + }, { + "itf": "control", + "dev": "PORT29-CTRL" + }] + } + }, + + "PORT29-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT29-EEPROM", + "device_parent": "PORT-MUX3", + "virt_parent": "PORT29" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x3c", + "dev_addr": "0x50", + "dev_type": "optoe1" + }, + "attr_list": [{ + "attr_name": "eeprom" + }] + } + }, + + "PORT29-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT29-CTRL", + "device_parent": "PORT-MUX3", + "virt_parent": "PORT29" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x3c", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [{ + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devtype": "cpld", + "attr_offset": "0x11", + "attr_mask": "0x4", + "attr_cmpval": "0x0", + "attr_len": "1" + }, { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x31", + "attr_devtype": "cpld", + "attr_offset": "0x15", + "attr_mask": "0x4", + "attr_cmpval": "0x0", + "attr_len": "1" + }] + } + }, + + + "PORT30": { + "dev_info": { + "device_type": "QSFP", + "device_name": "PORT30", + "device_parent": "PORT-MUX3" + }, + "dev_attr": { + "dev_idx": "30" + }, + "i2c": { + "interface": [{ + "itf": "eeprom", + "dev": "PORT30-EEPROM" + }, { + "itf": "control", + "dev": "PORT30-CTRL" + }] + } + }, + + "PORT30-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT30-EEPROM", + "device_parent": "PORT-MUX3", + "virt_parent": "PORT30" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x3d", + "dev_addr": "0x50", + "dev_type": "optoe1" + }, + "attr_list": [{ + "attr_name": "eeprom" + }] + } + }, + + "PORT30-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT30-CTRL", + "device_parent": "PORT-MUX3", + "virt_parent": "PORT30" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x3d", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [{ + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devtype": "cpld", + "attr_offset": "0x11", + "attr_mask": "0x5", + "attr_cmpval": "0x0", + "attr_len": "1" + }, { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x31", + "attr_devtype": "cpld", + "attr_offset": "0x15", + "attr_mask": "0x5", + "attr_cmpval": "0x0", + "attr_len": "1" + }] + } + }, + + "PORT31": { + "dev_info": { + "device_type": "QSFP", + "device_name": "PORT31", + "device_parent": "PORT-MUX3" + }, + "dev_attr": { + "dev_idx": "31" + }, + "i2c": { + "interface": [{ + "itf": "eeprom", + "dev": "PORT31-EEPROM" + }, { + "itf": "control", + "dev": "PORT31-CTRL" + }] + } + }, + + "PORT31-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT31-EEPROM", + "device_parent": "PORT-MUX3", + "virt_parent": "PORT31" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x3e", + "dev_addr": "0x50", + "dev_type": "optoe1" + }, + "attr_list": [{ + "attr_name": "eeprom" + }] + } + }, + + "PORT31-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT31-CTRL", + "device_parent": "PORT-MUX3", + "virt_parent": "PORT31" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x3e", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [{ + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devtype": "cpld", + "attr_offset": "0x11", + "attr_mask": "0x6", + "attr_cmpval": "0x0", + "attr_len": "1" + }, { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x31", + "attr_devtype": "cpld", + "attr_offset": "0x15", + "attr_mask": "0x6", + "attr_cmpval": "0x0", + "attr_len": "1" + }] + } + }, + + "PORT32": { + "dev_info": { + "device_type": "QSFP", + "device_name": "PORT32", + "device_parent": "PORT-MUX3" + }, + "dev_attr": { + "dev_idx": "32" + }, + "i2c": { + "interface": [{ + "itf": "eeprom", + "dev": "PORT32-EEPROM" + }, { + "itf": "control", + "dev": "PORT32-CTRL" + }] + } + }, + + "PORT32-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT32-EEPROM", + "device_parent": "PORT-MUX3", + "virt_parent": "PORT32" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x3f", + "dev_addr": "0x50", + "dev_type": "optoe1" + }, + "attr_list": [{ + "attr_name": "eeprom" + }] + } + }, + + "PORT32-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT32-CTRL", + "device_parent": "PORT-MUX3", + "virt_parent": "PORT32" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x3f", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [{ + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devtype": "cpld", + "attr_offset": "0x11", + "attr_mask": "0x7", + "attr_cmpval": "0x0", + "attr_len": "1" + }, { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x31", + "attr_devtype": "cpld", + "attr_offset": "0x15", + "attr_mask": "0x7", + "attr_cmpval": "0x0", + "attr_len": "1" + }] + } + }, + + "FPGA-OCORE11": { + "dev_info": { + "device_type": "FPGA-OCORE", + "device_name": "FPGA-OCORE11", + "device_parent": "SYSTEM" + }, + "i2c": { + "topo_info": { + "dev_addr": "0xd" + }, + "DEVICES": [] + } + }, + + "FPGA-OCORE12": { + "dev_info": { + "device_type": "FPGA-OCORE", + "device_name": "FPGA-OCORE12", + "device_parent": "SYSTEM" + }, + "i2c": { + "topo_info": { + "dev_addr": "0xe" + }, + "DEVICES": [] + } + }, + + "FPGA-OCORE13": { + "dev_info": { + "device_type": "FPGA-OCORE", + "device_name": "FPGA-OCORE13", + "device_parent": "SYSTEM" + }, + "i2c": { + "topo_info": { + "dev_addr": "0xf" + }, + "DEVICES": [] + } + }, + + "FRONT_BOARD_CPU_LED": { + "dev_info": { + "device_type": "LED", + "device_name": "SYS_LED" + }, + "dev_attr": { + "index": "0" + }, + "i2c": { + "attr_list": [{ + "attr_name": "STATUS_LED_COLOR_RED", + "descr": "Red", + "bits": "2:0", + "value": "0x2", + "swpld_addr": "0x0d", + "swpld_addr_offset": "0x972" + }, + { + "attr_name": "STATUS_LED_COLOR_RED_BLINK", + "descr": "Red Blinking", + "bits": "2:0", + "value": "0x1", + "swpld_addr": "0x0d", + "swpld_addr_offset": "0x972" + }, + { + "attr_name": "STATUS_LED_COLOR_GREEN", + "descr": "Green", + "bits": "2:0", + "value": "0x4", + "swpld_addr": "0x0d", + "swpld_addr_offset": "0x972" + }, + { + "attr_name": "STATUS_LED_COLOR_GREEN_BLINK", + "descr": "Green Blinking", + "bits": "2:0", + "value": "0x3", + "swpld_addr": "0x0d", + "swpld_addr_offset": "0x972" + }, + { + "attr_name": "STATUS_LED_COLOR_AMBER", + "descr": "Amber", + "bits": "2:0", + "value": "0x6", + "swpld_addr": "0x0d", + "swpld_addr_offset": "0x972" + }, + { + "attr_name": "STATUS_LED_COLOR_AMBER_BLINK", + "descr": "Amber Blinking", + "bits": "2:0", + "value": "0x5", + "swpld_addr": "0x0d", + "swpld_addr_offset": "0x972" + }, + { + "attr_name": "STATUS_LED_COLOR_OFF", + "descr": "Off", + "bits": "2:0", + "value": "0x0", + "swpld_addr": "0x0d", + "swpld_addr_offset": "0x972" + } + ] + } + }, + + "FRONT_BOARD_PSU_LED": { + "dev_info": { + "device_type": "LED", + "device_name": "LOC_LED" + }, + "dev_attr": { + "index": "0" + }, + "i2c": { + "attr_list": [{ + "attr_name": "STATUS_LED_COLOR_RED", + "descr": "Red", + "bits": "2:0", + "value": "0x2", + "swpld_addr": "0x0d", + "swpld_addr_offset": "0x973" + }, + { + "attr_name": "STATUS_LED_COLOR_RED_BLINK", + "descr": "Red Blinking", + "bits": "2:0", + "value": "0x1", + "swpld_addr": "0x0d", + "swpld_addr_offset": "0x973" + }, + { + "attr_name": "STATUS_LED_COLOR_GREEN", + "descr": "Green", + "bits": "2:0", + "value": "0x4", + "swpld_addr": "0x0d", + "swpld_addr_offset": "0x973" + }, + { + "attr_name": "STATUS_LED_COLOR_GREEN_BLINK", + "descr": "Green Blinking", + "bits": "2:0", + "value": "0x3", + "swpld_addr": "0x0d", + "swpld_addr_offset": "0x973" + }, + { + "attr_name": "STATUS_LED_COLOR_AMBER", + "descr": "Amber", + "bits": "2:0", + "value": "0x6", + "swpld_addr": "0x0d", + "swpld_addr_offset": "0x973" + }, + { + "attr_name": "STATUS_LED_COLOR_AMBER_BLINK", + "descr": "Amber Blinking", + "bits": "2:0", + "value": "0x5", + "swpld_addr": "0x0d", + "swpld_addr_offset": "0x973" + }, + { + "attr_name": "STATUS_LED_COLOR_OFF", + "descr": "Off", + "bits": "2:0", + "value": "0x0", + "swpld_addr": "0x0d", + "swpld_addr_offset": "0x973" + } + ] + } + }, + + "FRONT_BOARD_FAN_LED": { + "dev_info": { + "device_type": "LED", + "device_name": "FAN_LED" + }, + "dev_attr": { + "index": "0" + }, + "i2c": { + "attr_list": [{ + "attr_name": "STATUS_LED_COLOR_RED", + "descr": "Red", + "bits": "2:0", + "value": "0x2", + "swpld_addr": "0x0d", + "swpld_addr_offset": "0x974" + }, + { + "attr_name": "STATUS_LED_COLOR_RED_BLINK", + "descr": "Red Blinking", + "bits": "2:0", + "value": "0x1", + "swpld_addr": "0x0d", + "swpld_addr_offset": "0x974" + }, + { + "attr_name": "STATUS_LED_COLOR_GREEN", + "descr": "Green", + "bits": "2:0", + "value": "0x4", + "swpld_addr": "0x0d", + "swpld_addr_offset": "0x974" + }, + { + "attr_name": "STATUS_LED_COLOR_GREEN_BLINK", + "descr": "Green Blinking", + "bits": "2:0", + "value": "0x3", + "swpld_addr": "0x0d", + "swpld_addr_offset": "0x974" + }, + { + "attr_name": "STATUS_LED_COLOR_AMBER", + "descr": "Amber", + "bits": "2:0", + "value": "0x6", + "swpld_addr": "0x0d", + "swpld_addr_offset": "0x974" + }, + { + "attr_name": "STATUS_LED_COLOR_AMBER_BLINK", + "descr": "Amber Blinking", + "bits": "2:0", + "value": "0x5", + "swpld_addr": "0x0d", + "swpld_addr_offset": "0x974" + }, + { + "attr_name": "STATUS_LED_COLOR_OFF", + "descr": "Off", + "bits": "2:0", + "value": "0x0", + "swpld_addr": "0x0d", + "swpld_addr_offset": "0x974" + } + ] + } + }, + + "FANTRAY1_LED": { + "dev_info": { + "device_type": "LED", + "device_name": "FANTRAY_LED" + }, + "dev_attr": { + "index": "0" + }, + "i2c": { + "attr_list": [{ + "attr_name": "STATUS_LED_COLOR_RED", + "descr": "Red", + "bits": "2:0", + "value": "0x2", + "swpld_addr": "0x0d", + "swpld_addr_offset": "0x3b" + }, + { + "attr_name": "STATUS_LED_COLOR_RED_BLINK", + "descr": "Red Blinking", + "bits": "2:0", + "value": "0x1", + "swpld_addr": "0x0d", + "swpld_addr_offset": "0x3b" + }, + { + "attr_name": "STATUS_LED_COLOR_GREEN", + "descr": "Green", + "bits": "2:0", + "value": "0x4", + "swpld_addr": "0x0d", + "swpld_addr_offset": "0x3b" + }, + { + "attr_name": "STATUS_LED_COLOR_GREEN_BLINK", + "descr": "Green Blinking", + "bits": "2:0", + "value": "0x3", + "swpld_addr": "0x0d", + "swpld_addr_offset": "0x3b" + }, + { + "attr_name": "STATUS_LED_COLOR_AMBER", + "descr": "Amber", + "bits": "2:0", + "value": "0x6", + "swpld_addr": "0x0d", + "swpld_addr_offset": "0x3b" + }, + { + "attr_name": "STATUS_LED_COLOR_AMBER_BLINK", + "descr": "Amber Blinking", + "bits": "2:0", + "value": "0x5", + "swpld_addr": "0x0d", + "swpld_addr_offset": "0x3b" + }, + { + "attr_name": "STATUS_LED_COLOR_OFF", + "descr": "Off", + "bits": "2:0", + "value": "0x0", + "swpld_addr": "0x0d", + "swpld_addr_offset": "0x3b" + } + ] + } + }, + + "FANTRAY2_LED": { + "dev_info": { + "device_type": "LED", + "device_name": "FANTRAY_LED" + }, + "dev_attr": { + "index": "1" + }, + "i2c": { + "attr_list": [{ + "attr_name": "STATUS_LED_COLOR_RED", + "descr": "Red", + "bits": "2:0", + "value": "0x2", + "swpld_addr": "0x0d", + "swpld_addr_offset": "0x3c" + }, + { + "attr_name": "STATUS_LED_COLOR_RED_BLINK", + "descr": "Red Blinking", + "bits": "2:0", + "value": "0x1", + "swpld_addr": "0x0d", + "swpld_addr_offset": "0x3c" + }, + { + "attr_name": "STATUS_LED_COLOR_GREEN", + "descr": "Green", + "bits": "2:0", + "value": "0x4", + "swpld_addr": "0x0d", + "swpld_addr_offset": "0x3c" + }, + { + "attr_name": "STATUS_LED_COLOR_GREEN_BLINK", + "descr": "Green Blinking", + "bits": "2:0", + "value": "0x3", + "swpld_addr": "0x0d", + "swpld_addr_offset": "0x3c" + }, + { + "attr_name": "STATUS_LED_COLOR_AMBER", + "descr": "Amber", + "bits": "2:0", + "value": "0x6", + "swpld_addr": "0x0d", + "swpld_addr_offset": "0x3c" + }, + { + "attr_name": "STATUS_LED_COLOR_AMBER_BLINK", + "descr": "Amber Blinking", + "bits": "2:0", + "value": "0x5", + "swpld_addr": "0x0d", + "swpld_addr_offset": "0x3c" + }, + { + "attr_name": "STATUS_LED_COLOR_OFF", + "descr": "Off", + "bits": "2:0", + "value": "0x0", + "swpld_addr": "0x0d", + "swpld_addr_offset": "0x3c" + } + ] + } + }, + + "FANTRAY3_LED": { + "dev_info": { + "device_type": "LED", + "device_name": "FANTRAY_LED" + }, + "dev_attr": { + "index": "2" + }, + "i2c": { + "attr_list": [{ + "attr_name": "STATUS_LED_COLOR_RED", + "descr": "Red", + "bits": "2:0", + "value": "0x2", + "swpld_addr": "0x0d", + "swpld_addr_offset": "0x3d" + }, + { + "attr_name": "STATUS_LED_COLOR_RED_BLINK", + "descr": "Red Blinking", + "bits": "2:0", + "value": "0x1", + "swpld_addr": "0x0d", + "swpld_addr_offset": "0x3d" + }, + { + "attr_name": "STATUS_LED_COLOR_GREEN", + "descr": "Green", + "bits": "2:0", + "value": "0x4", + "swpld_addr": "0x0d", + "swpld_addr_offset": "0x3d" + }, + { + "attr_name": "STATUS_LED_COLOR_GREEN_BLINK", + "descr": "Green Blinking", + "bits": "2:0", + "value": "0x3", + "swpld_addr": "0x0d", + "swpld_addr_offset": "0x3d" + }, + { + "attr_name": "STATUS_LED_COLOR_AMBER", + "descr": "Amber", + "bits": "2:0", + "value": "0x6", + "swpld_addr": "0x0d", + "swpld_addr_offset": "0x3d" + }, + { + "attr_name": "STATUS_LED_COLOR_AMBER_BLINK", + "descr": "Amber Blinking", + "bits": "2:0", + "value": "0x5", + "swpld_addr": "0x0d", + "swpld_addr_offset": "0x3d" + }, + { + "attr_name": "STATUS_LED_COLOR_OFF", + "descr": "Off", + "bits": "2:0", + "value": "0x0", + "swpld_addr": "0x0d", + "swpld_addr_offset": "0x3d" + } + ] + } + }, + + "FANTRAY4_LED": { + "dev_info": { + "device_type": "LED", + "device_name": "FANTRAY_LED" + }, + "dev_attr": { + "index": "3" + }, + "i2c": { + "attr_list": [{ + "attr_name": "STATUS_LED_COLOR_RED", + "descr": "Red", + "bits": "2:0", + "value": "0x2", + "swpld_addr": "0x0d", + "swpld_addr_offset": "0x3e" + }, + { + "attr_name": "STATUS_LED_COLOR_RED_BLINK", + "descr": "Red Blinking", + "bits": "2:0", + "value": "0x1", + "swpld_addr": "0x0d", + "swpld_addr_offset": "0x3e" + }, + { + "attr_name": "STATUS_LED_COLOR_GREEN", + "descr": "Green", + "bits": "2:0", + "value": "0x4", + "swpld_addr": "0x0d", + "swpld_addr_offset": "0x3e" + }, + { + "attr_name": "STATUS_LED_COLOR_GREEN_BLINK", + "descr": "Green Blinking", + "bits": "2:0", + "value": "0x3", + "swpld_addr": "0x0d", + "swpld_addr_offset": "0x3e" + }, + { + "attr_name": "STATUS_LED_COLOR_AMBER", + "descr": "Amber", + "bits": "2:0", + "value": "0x6", + "swpld_addr": "0x0d", + "swpld_addr_offset": "0x3e" + }, + { + "attr_name": "STATUS_LED_COLOR_AMBER_BLINK", + "descr": "Amber Blinking", + "bits": "2:0", + "value": "0x5", + "swpld_addr": "0x0d", + "swpld_addr_offset": "0x3e" + }, + { + "attr_name": "STATUS_LED_COLOR_OFF", + "descr": "Off", + "bits": "2:0", + "value": "0x0", + "swpld_addr": "0x0d", + "swpld_addr_offset": "0x3e" + } + ] + } + }, + + "FANTRAY5_LED": { + "dev_info": { + "device_type": "LED", + "device_name": "FANTRAY_LED" + }, + "dev_attr": { + "index": "4" + }, + "i2c": { + "attr_list": [{ + "attr_name": "STATUS_LED_COLOR_RED", + "descr": "Red", + "bits": "2:0", + "value": "0x2", + "swpld_addr": "0x0d", + "swpld_addr_offset": "0x3f" + }, + { + "attr_name": "STATUS_LED_COLOR_RED_BLINK", + "descr": "Red Blinking", + "bits": "2:0", + "value": "0x1", + "swpld_addr": "0x0d", + "swpld_addr_offset": "0x3f" + }, + { + "attr_name": "STATUS_LED_COLOR_GREEN", + "descr": "Green", + "bits": "2:0", + "value": "0x4", + "swpld_addr": "0x0d", + "swpld_addr_offset": "0x3f" + }, + { + "attr_name": "STATUS_LED_COLOR_GREEN_BLINK", + "descr": "Green Blinking", + "bits": "2:0", + "value": "0x3", + "swpld_addr": "0x0d", + "swpld_addr_offset": "0x3f" + }, + { + "attr_name": "STATUS_LED_COLOR_AMBER", + "descr": "Amber", + "bits": "2:0", + "value": "0x6", + "swpld_addr": "0x0d", + "swpld_addr_offset": "0x3f" + }, + { + "attr_name": "STATUS_LED_COLOR_AMBER_BLINK", + "descr": "Amber Blinking", + "bits": "2:0", + "value": "0x5", + "swpld_addr": "0x0d", + "swpld_addr_offset": "0x3f" + }, + { + "attr_name": "STATUS_LED_COLOR_OFF", + "descr": "Off", + "bits": "2:0", + "value": "0x0", + "swpld_addr": "0x0d", + "swpld_addr_offset": "0x3f" + } + ] + } + } +} diff --git a/device/ragile/x86_64-ragile_ra-b6510-32c-r0/pddf_support b/device/ragile/x86_64-ragile_ra-b6510-32c-r0/pddf_support new file mode 100644 index 0000000000..e69de29bb2 diff --git a/device/ragile/x86_64-ragile_ra-b6510-32c-r0/platform_asic b/device/ragile/x86_64-ragile_ra-b6510-32c-r0/platform_asic new file mode 100644 index 0000000000..9604676527 --- /dev/null +++ b/device/ragile/x86_64-ragile_ra-b6510-32c-r0/platform_asic @@ -0,0 +1 @@ +broadcom diff --git a/device/ragile/x86_64-ragile_ra-b6510-32c-r0/plugins/eeprom.py b/device/ragile/x86_64-ragile_ra-b6510-32c-r0/plugins/eeprom.py new file mode 100644 index 0000000000..3384c2cbd6 --- /dev/null +++ b/device/ragile/x86_64-ragile_ra-b6510-32c-r0/plugins/eeprom.py @@ -0,0 +1,13 @@ +#!/usr/bin/env python + +try: + from sonic_eeprom import eeprom_tlvinfo +except ImportError as e: + raise ImportError (str(e) + "- required module not found") + + +class board(eeprom_tlvinfo.TlvInfoDecoder): + + def __init__(self, name, path, cpld_root, ro): + self.eeprom_path = "/sys/bus/i2c/devices/1-0056/eeprom" + super(board, self).__init__(self.eeprom_path, 0, '', True) diff --git a/device/ragile/x86_64-ragile_ra-b6510-32c-r0/plugins/psuutil.py b/device/ragile/x86_64-ragile_ra-b6510-32c-r0/plugins/psuutil.py new file mode 100644 index 0000000000..6d1ef8710c --- /dev/null +++ b/device/ragile/x86_64-ragile_ra-b6510-32c-r0/plugins/psuutil.py @@ -0,0 +1,63 @@ +# +# psuutil.py +# Platform-specific PSU status interface for SONiC +# + +try: + from sonic_psu.psu_base import PsuBase +except ImportError as e: + raise ImportError(str(e) + "- required module not found") + + +class PsuUtil(PsuBase): + """Platform-specific PSUutil class""" + + def __init__(self): + PsuBase.__init__(self) + + def get_num_psus(self): + return 2 + + def get_psu_status(self, index): + if index != 1 and index != 2: + return False + + psu_path = "/sys/bus/i2c/devices/6-000d/psu_status" + + try: + data = open(psu_path, "rb") + except IOError: + return False + + result = int(data.read(2), 16) + data.close() + + if index == 1 and (result & 0x2): + return True + + if index == 2 and (result & 0x20): + return True + + return False + + def get_psu_presence(self, index): + if index != 1 and index != 2: + return False + + psu_path = "/sys/bus/i2c/devices/6-000d/psu_status" + + try: + data = open(psu_path, "rb") + except IOError: + return False + + result = int(data.read(2), 16) + data.close() + + if index == 1 and (result & 0x1) == 0: + return True + + if index == 2 and (result & 0x10) == 0: + return True + + return False diff --git a/device/ragile/x86_64-ragile_ra-b6510-32c-r0/plugins/sfputil.py b/device/ragile/x86_64-ragile_ra-b6510-32c-r0/plugins/sfputil.py new file mode 100644 index 0000000000..51285b5401 --- /dev/null +++ b/device/ragile/x86_64-ragile_ra-b6510-32c-r0/plugins/sfputil.py @@ -0,0 +1,255 @@ +# sfputil.py +# +# Platform-specific SFP transceiver interface for SONiC +# + +try: + import time + import os + from sonic_sfp.sfputilbase import SfpUtilBase +except ImportError as e: + raise ImportError("%s - required module not found" % str(e)) + +class SfpUtil(SfpUtilBase): + """Platform-specific SfpUtil class""" + + PORT_START = 0 + PORT_END = 31 + PORTS_IN_BLOCK = 32 + + EEPROM_OFFSET = 32 + SFP_DEVICE_TYPE = "optoe2" + QSFP_DEVICE_TYPE = "optoe1" + I2C_MAX_ATTEMPT = 3 + + SFP_STATUS_INSERTED = '1' + SFP_STATUS_REMOVED = '0' + + _port_to_eeprom_mapping = {} + port_to_i2cbus_mapping ={} + port_dict = {} + + @property + def port_start(self): + return self.PORT_START + + @property + def port_end(self): + return self.PORT_END + + @property + def qsfp_ports(self): + return range(0, self.PORTS_IN_BLOCK) + + @property + def port_to_eeprom_mapping(self): + return self._port_to_eeprom_mapping + + def __init__(self): + for x in range(self.PORT_START, self.PORTS_IN_BLOCK): + self.port_to_i2cbus_mapping[x] = (x + self.EEPROM_OFFSET) + SfpUtilBase.__init__(self) + + def _sfp_read_file_path(self, file_path, offset, num_bytes): + attempts = 0 + while attempts < self.I2C_MAX_ATTEMPT: + try: + file_path.seek(offset) + read_buf = file_path.read(num_bytes) + except Exception: + attempts += 1 + time.sleep(0.05) + else: + return True, read_buf + return False, None + + def _sfp_eeprom_present(self, sysfs_sfp_i2c_client_eeprompath, offset): + """Tries to read the eeprom file to determine if the + device/sfp is present or not. If sfp present, the read returns + valid bytes. If not, read returns error 'Connection timed out""" + + if not os.path.exists(sysfs_sfp_i2c_client_eeprompath): + return False + else: + with open(sysfs_sfp_i2c_client_eeprompath, "rb", buffering=0) as sysfsfile: + rv, buf = self._sfp_read_file_path(sysfsfile, offset, 1) + return rv + + def _add_new_sfp_device(self, sysfs_sfp_i2c_adapter_path, devaddr, devtype): + try: + sysfs_nd_path = "%s/new_device" % sysfs_sfp_i2c_adapter_path + + # Write device address to new_device file + nd_file = open(sysfs_nd_path, "w") + nd_str = "%s %s" % (devtype, hex(devaddr)) + nd_file.write(nd_str) + nd_file.close() + + except Exception as err: + print("Error writing to new device file: %s" % str(err)) + return 1 + else: + return 0 + + def _get_port_eeprom_path(self, port_num, devid): + sysfs_i2c_adapter_base_path = "" + + if port_num in self.port_to_eeprom_mapping.keys(): + sysfs_sfp_i2c_client_eeprom_path = self.port_to_eeprom_mapping[port_num] + else: + sysfs_i2c_adapter_base_path = "/sys/class/i2c-adapter" + + i2c_adapter_id = self._get_port_i2c_adapter_id(port_num) + if i2c_adapter_id is None: + print("Error getting i2c bus num") + return None + + # Get i2c virtual bus path for the sfp + sysfs_sfp_i2c_adapter_path = "%s/i2c-%s" % (sysfs_i2c_adapter_base_path, + str(i2c_adapter_id)) + + # If i2c bus for port does not exist + if not os.path.exists(sysfs_sfp_i2c_adapter_path): + print("Could not find i2c bus %s. Driver not loaded?" % sysfs_sfp_i2c_adapter_path) + return None + + sysfs_sfp_i2c_client_path = "%s/%s-00%s" % (sysfs_sfp_i2c_adapter_path, + str(i2c_adapter_id), + hex(devid)[-2:]) + + # If sfp device is not present on bus, Add it + if not os.path.exists(sysfs_sfp_i2c_client_path): + if port_num in self.qsfp_ports: + ret = self._add_new_sfp_device( + sysfs_sfp_i2c_adapter_path, devid, self.QSFP_DEVICE_TYPE) + else: + ret = self._add_new_sfp_device( + sysfs_sfp_i2c_adapter_path, devid, self.SFP_DEVICE_TYPE) + if ret != 0: + print("Error adding sfp device") + return None + + sysfs_sfp_i2c_client_eeprom_path = "%s/eeprom" % sysfs_sfp_i2c_client_path + + return sysfs_sfp_i2c_client_eeprom_path + + def _read_eeprom_specific_bytes(self, sysfsfile_eeprom, offset, num_bytes): + eeprom_raw = [] + for i in range(0, num_bytes): + eeprom_raw.append("0x00") + + rv, raw = self._sfp_read_file_path(sysfsfile_eeprom, offset, num_bytes) + if rv == False: + return None + + try: + for n in range(0, num_bytes): + eeprom_raw[n] = hex(ord(raw[n]))[2:].zfill(2) + except Exception: + return None + + return eeprom_raw + + def get_eeprom_dom_raw(self, port_num): + if port_num in self.qsfp_ports: + # QSFP DOM EEPROM is also at addr 0x50 and thus also stored in eeprom_ifraw + return None + else: + # Read dom eeprom at addr 0x51 + return self._read_eeprom_devid(port_num, self.IDENTITY_EEPROM_ADDR, 256) + + def get_presence(self, port_num): + # Check for invalid port_num + if port_num < self.port_start or port_num > self.port_end: + return False + + if port_num <= 7: + presence_path = "/sys/bus/i2c/devices/8-0030/sfp_presence1" + elif port_num >= 8 and port_num <= 15: + presence_path = "/sys/bus/i2c/devices/8-0030/sfp_presence2" + elif port_num >= 16 and port_num <= 23: + presence_path = "/sys/bus/i2c/devices/8-0031/sfp_presence3" + elif port_num >= 24 and port_num <= 31: + presence_path = "/sys/bus/i2c/devices/8-0031/sfp_presence4" + else: + return False + + try: + data = open(presence_path, "rb") + except IOError: + return False + + presence_data = data.read(2) + if presence_data == "": + return False + result = int(presence_data, 16) + data.close() + + # ModPrsL is active low + if result & (1 << (port_num % 8)) == 0: + return True + + return False + + def get_low_power_mode(self, port_num): + # Check for invalid port_num + + return True + + def set_low_power_mode(self, port_num, lpmode): + # Check for invalid port_num + + return True + + def reset(self, port_num): + # Check for invalid port_num + if port_num < self.port_start or port_num > self.port_end: + return False + + return True + + def get_transceiver_change_event(self, timeout=0): + + start_time = time.time() + currernt_port_dict = {} + forever = False + + if timeout == 0: + forever = True + elif timeout > 0: + timeout = timeout / float(1000) # Convert to secs + else: + print ("get_transceiver_change_event:Invalid timeout value", timeout) + return False, {} + + end_time = start_time + timeout + if start_time > end_time: + print ('get_transceiver_change_event:' \ + 'time wrap / invalid timeout value', timeout) + + return False, {} # Time wrap or possibly incorrect timeout + + while timeout >= 0: + # Check for OIR events and return updated port_dict + for x in range(self.PORT_START, self.PORTS_IN_BLOCK): + if self.get_presence(x): + currernt_port_dict[x] = self.SFP_STATUS_INSERTED + else: + currernt_port_dict[x] = self.SFP_STATUS_REMOVED + if (currernt_port_dict == self.port_dict): + if forever: + time.sleep(1) + else: + timeout = end_time - time.time() + if timeout >= 1: + time.sleep(1) # We poll at 1 second granularity + else: + if timeout > 0: + time.sleep(timeout) + return True, {} + else: + # Update reg value + self.port_dict = currernt_port_dict + return True, self.port_dict + print ("get_transceiver_change_event: Should not reach here.") + return False, {} diff --git a/device/ragile/x86_64-ragile_ra-b6510-32c-r0/pmon_daemon_control.json b/device/ragile/x86_64-ragile_ra-b6510-32c-r0/pmon_daemon_control.json new file mode 100644 index 0000000000..94592fa8ce --- /dev/null +++ b/device/ragile/x86_64-ragile_ra-b6510-32c-r0/pmon_daemon_control.json @@ -0,0 +1,3 @@ +{ + "skip_ledd": true +} diff --git a/device/ragile/x86_64-ragile_ra-b6510-32c-r0/sensors.conf b/device/ragile/x86_64-ragile_ra-b6510-32c-r0/sensors.conf new file mode 100644 index 0000000000..9b0569d154 --- /dev/null +++ b/device/ragile/x86_64-ragile_ra-b6510-32c-r0/sensors.conf @@ -0,0 +1,21 @@ +# libsensors configuration file +# ---------------------------------------------- +# + +bus "i2c-2" "i2c-0-mux (chan_id 0)" + +chip "lm75-i2c-2-48" + label temp1 "LM75_0 air_inlet" + set temp1_max 80 + set temp1_max_hyst 75 + +chip "lm75-i2c-2-49" + label temp1 "LM75_1 air_outlet" + set temp1_max 80 + set temp1_max_hyst 75 + +chip "lm75-i2c-2-4a" + label temp1 "LM75_2 hottest" + set temp1_max 80 + set temp1_max_hyst 75 + diff --git a/device/ragile/x86_64-ragile_ra-b6510-32c-r0/systest.py b/device/ragile/x86_64-ragile_ra-b6510-32c-r0/systest.py new file mode 100644 index 0000000000..b40bf45b2c --- /dev/null +++ b/device/ragile/x86_64-ragile_ra-b6510-32c-r0/systest.py @@ -0,0 +1,43 @@ +#!/usr/bin/python +# -*- coding: UTF-8 -*- + +# * onboard interval check +# * FAN trays +# * PSU +# * temp +import time +import datetime +from monitor import status + +def doWork(): + a=[]; + ''' + return: [{'status': '1', 'hw_version': '1.00', 'errcode': 0, 'fan_type': 'M6510-FAN-F', 'errmsg': 'OK', 'Speed': '9778', 'id': 'fan1', 'present': '0', 'sn': '1000000000014'}, + {'id': 'fan2', 'errmsg': 'not present', 'errcode': -1}, + {'id': 'fan3', 'errmsg': 'not present', 'errcode': -1}, + {'id': 'fan4', 'errmsg': 'not present', 'errcode': -1} + ] + description: 1.get id + 2.errcode equal 0 : dev normal + not equal 0 : get errmsg + 3.other message add when all check success + ''' + status.checkFan(a) + #status.getTemp(a) + #status.getPsu(a) + + nowTime=datetime.datetime.now().strftime('%Y-%m-%d %H:%M:%S') + print nowTime + print a +def run(interval): + while True: + try: + time_remaining = interval - time.time()%interval + time.sleep(time_remaining) + doWork() + except Exception as e: + print(e) + +if __name__ == '__main__': + interval = 1 + run(interval) diff --git a/device/ragile/x86_64-ragile_ra-b6920-4s-r0/RA-B6920-4S/port_config.ini b/device/ragile/x86_64-ragile_ra-b6920-4s-r0/RA-B6920-4S/port_config.ini new file mode 100644 index 0000000000..6a516970cd --- /dev/null +++ b/device/ragile/x86_64-ragile_ra-b6920-4s-r0/RA-B6920-4S/port_config.ini @@ -0,0 +1,129 @@ +# name lanes alias index speed +Ethernet1 65,66 hundredGigE0/1 0 100000 +Ethernet2 67,68 hundredGigE0/2 1 100000 +Ethernet3 69,70 hundredGigE0/3 2 100000 +Ethernet4 71,72 hundredGigE0/4 3 100000 +Ethernet5 81,82 hundredGigE0/5 4 100000 +Ethernet6 83,84 hundredGigE0/6 5 100000 +Ethernet7 85,86 hundredGigE0/7 6 100000 +Ethernet8 87,88 hundredGigE0/8 7 100000 +Ethernet9 97,98 hundredGigE0/9 8 100000 +Ethernet10 99,100 hundredGigE0/10 9 100000 +Ethernet11 101,102 hundredGigE0/11 10 100000 +Ethernet12 103,104 hundredGigE0/12 11 100000 +Ethernet13 113,114 hundredGigE0/13 12 100000 +Ethernet14 115,116 hundredGigE0/14 13 100000 +Ethernet15 117,118 hundredGigE0/15 14 100000 +Ethernet16 119,120 hundredGigE0/16 15 100000 +Ethernet17 137,138 hundredGigE0/17 16 100000 +Ethernet18 139,140 hundredGigE0/18 17 100000 +Ethernet19 141,142 hundredGigE0/19 18 100000 +Ethernet20 143,144 hundredGigE0/20 19 100000 +Ethernet21 153,154 hundredGigE0/21 20 100000 +Ethernet22 155,156 hundredGigE0/22 21 100000 +Ethernet23 157,158 hundredGigE0/23 22 100000 +Ethernet24 159,160 hundredGigE0/24 23 100000 +Ethernet25 169,170 hundredGigE0/25 24 100000 +Ethernet26 171,172 hundredGigE0/26 25 100000 +Ethernet27 173,174 hundredGigE0/27 26 100000 +Ethernet28 175,176 hundredGigE0/28 27 100000 +Ethernet29 185,186 hundredGigE0/29 28 100000 +Ethernet30 187,188 hundredGigE0/30 29 100000 +Ethernet31 189,190 hundredGigE0/31 30 100000 +Ethernet32 191,192 hundredGigE0/32 31 100000 +Ethernet33 73,74 hundredGigE0/33 32 100000 +Ethernet34 75,76 hundredGigE0/34 33 100000 +Ethernet35 77,78 hundredGigE0/35 34 100000 +Ethernet36 79,80 hundredGigE0/36 35 100000 +Ethernet37 89,90 hundredGigE0/37 36 100000 +Ethernet38 91,92 hundredGigE0/38 37 100000 +Ethernet39 93,94 hundredGigE0/39 38 100000 +Ethernet40 95,96 hundredGigE0/40 39 100000 +Ethernet41 105,106 hundredGigE0/41 40 100000 +Ethernet42 107,108 hundredGigE0/42 41 100000 +Ethernet43 109,110 hundredGigE0/43 42 100000 +Ethernet44 111,112 hundredGigE0/44 43 100000 +Ethernet45 121,122 hundredGigE0/45 44 100000 +Ethernet46 123,124 hundredGigE0/46 45 100000 +Ethernet47 125,126 hundredGigE0/47 46 100000 +Ethernet48 127,128 hundredGigE0/48 47 100000 +Ethernet49 129,130 hundredGigE0/49 48 100000 +Ethernet50 131,132 hundredGigE0/50 49 100000 +Ethernet51 133,134 hundredGigE0/51 50 100000 +Ethernet52 135,136 hundredGigE0/52 51 100000 +Ethernet53 145,146 hundredGigE0/53 52 100000 +Ethernet54 147,148 hundredGigE0/54 53 100000 +Ethernet55 149,150 hundredGigE0/55 54 100000 +Ethernet56 151,152 hundredGigE0/56 55 100000 +Ethernet57 161,162 hundredGigE0/57 56 100000 +Ethernet58 163,164 hundredGigE0/58 57 100000 +Ethernet59 165,166 hundredGigE0/59 58 100000 +Ethernet60 167,168 hundredGigE0/60 59 100000 +Ethernet61 177,178 hundredGigE0/61 60 100000 +Ethernet62 179,180 hundredGigE0/62 61 100000 +Ethernet63 181,182 hundredGigE0/63 62 100000 +Ethernet64 183,184 hundredGigE0/64 63 100000 +Ethernet65 9,10 hundredGigE0/65 64 100000 +Ethernet66 11,12 hundredGigE0/66 65 100000 +Ethernet67 13,14 hundredGigE0/67 66 100000 +Ethernet68 15,16 hundredGigE0/68 67 100000 +Ethernet69 25,26 hundredGigE0/69 68 100000 +Ethernet70 27,28 hundredGigE0/70 69 100000 +Ethernet71 29,30 hundredGigE0/71 70 100000 +Ethernet72 31,32 hundredGigE0/72 71 100000 +Ethernet73 41,42 hundredGigE0/73 72 100000 +Ethernet74 43,44 hundredGigE0/74 73 100000 +Ethernet75 45,46 hundredGigE0/75 74 100000 +Ethernet76 47,48 hundredGigE0/76 75 100000 +Ethernet77 57,58 hundredGigE0/77 76 100000 +Ethernet78 59,60 hundredGigE0/78 77 100000 +Ethernet79 61,62 hundredGigE0/79 78 100000 +Ethernet80 63,64 hundredGigE0/80 79 100000 +Ethernet81 193,194 hundredGigE0/81 80 100000 +Ethernet82 195,196 hundredGigE0/82 81 100000 +Ethernet83 197,198 hundredGigE0/83 82 100000 +Ethernet84 199,200 hundredGigE0/84 83 100000 +Ethernet85 209,210 hundredGigE0/85 84 100000 +Ethernet86 211,212 hundredGigE0/86 85 100000 +Ethernet87 213,214 hundredGigE0/87 86 100000 +Ethernet88 215,216 hundredGigE0/88 87 100000 +Ethernet89 225,226 hundredGigE0/89 88 100000 +Ethernet90 227,228 hundredGigE0/90 89 100000 +Ethernet91 229,230 hundredGigE0/91 90 100000 +Ethernet92 231,232 hundredGigE0/92 91 100000 +Ethernet93 241,242 hundredGigE0/93 92 100000 +Ethernet94 243,244 hundredGigE0/94 93 100000 +Ethernet95 245,246 hundredGigE0/95 94 100000 +Ethernet96 247,248 hundredGigE0/96 95 100000 +Ethernet97 1,2 hundredGigE0/97 96 100000 +Ethernet98 3,4 hundredGigE0/98 97 100000 +Ethernet99 5,6 hundredGigE0/99 98 100000 +Ethernet100 7,8 hundredGigE0/100 99 100000 +Ethernet101 17,18 hundredGigE0/101 100 100000 +Ethernet102 19,20 hundredGigE0/102 101 100000 +Ethernet103 21,22 hundredGigE0/103 102 100000 +Ethernet104 23,24 hundredGigE0/104 103 100000 +Ethernet105 33,34 hundredGigE0/105 104 100000 +Ethernet106 35,36 hundredGigE0/106 105 100000 +Ethernet107 37,38 hundredGigE0/107 106 100000 +Ethernet108 39,40 hundredGigE0/108 107 100000 +Ethernet109 49,50 hundredGigE0/109 108 100000 +Ethernet110 51,52 hundredGigE0/110 109 100000 +Ethernet111 53,54 hundredGigE0/111 110 100000 +Ethernet112 55,56 hundredGigE0/112 111 100000 +Ethernet113 201,202 hundredGigE0/113 112 100000 +Ethernet114 203,204 hundredGigE0/114 113 100000 +Ethernet115 205,206 hundredGigE0/115 114 100000 +Ethernet116 207,208 hundredGigE0/116 115 100000 +Ethernet117 217,218 hundredGigE0/117 116 100000 +Ethernet118 219,220 hundredGigE0/118 117 100000 +Ethernet119 221,222 hundredGigE0/119 118 100000 +Ethernet120 223,224 hundredGigE0/120 119 100000 +Ethernet121 233,234 hundredGigE0/121 120 100000 +Ethernet122 235,236 hundredGigE0/122 121 100000 +Ethernet123 237,238 hundredGigE0/123 122 100000 +Ethernet124 239,240 hundredGigE0/124 123 100000 +Ethernet125 249,250 hundredGigE0/125 124 100000 +Ethernet126 251,252 hundredGigE0/126 125 100000 +Ethernet127 253,254 hundredGigE0/127 126 100000 +Ethernet128 255,256 hundredGigE0/128 127 100000 diff --git a/device/ragile/x86_64-ragile_ra-b6920-4s-r0/RA-B6920-4S/sai.profile b/device/ragile/x86_64-ragile_ra-b6920-4s-r0/RA-B6920-4S/sai.profile new file mode 100644 index 0000000000..f59730cc94 --- /dev/null +++ b/device/ragile/x86_64-ragile_ra-b6920-4s-r0/RA-B6920-4S/sai.profile @@ -0,0 +1 @@ +SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/th3-ra-b6920-4s-128x100G.config.bcm diff --git a/device/ragile/x86_64-ragile_ra-b6920-4s-r0/RA-B6920-4S/th3-ra-b6920-4s-128x100G.config.bcm b/device/ragile/x86_64-ragile_ra-b6920-4s-r0/RA-B6920-4S/th3-ra-b6920-4s-128x100G.config.bcm new file mode 100644 index 0000000000..61bb14f547 --- /dev/null +++ b/device/ragile/x86_64-ragile_ra-b6920-4s-r0/RA-B6920-4S/th3-ra-b6920-4s-128x100G.config.bcm @@ -0,0 +1,708 @@ + #This is for a 4slot* 32*100G configuration PAM4 mode (2 lanes per 100G) +#rate_ext_mdio_divisor=100 +port_init_cl72=0 +port_init_autoneg=0 +pcie_file=/usr/share/sonic/platform/pcie.cint +capi_level=1 +port_fec=3 +phy_gearbox_enable.0=1 +phy_pin_compatibility_enable.0=0 +cfg_int_phy_ctrl.0=1 +mmu_port_num_mc_queue=2 +bcm_tunnel_term_compatible_mode=1 +pbmp_xport_xe.0=0x8ffff8ffffcffff8ffff8ffff8ffffcffff9fffe +#serdes_tx_taps_ce=pam4:0:140:0:0:0:0 +ccm_dma_enable=0 +ccmdma_intr_enable=0 +ctr_evict_enable=0 +mem_cache_enable=0 +parity_correction=0 +parity_enable=0 +phy_enable=1 +phy_null=1 +fpem_mem_entries=65536 +pll_bypass=1 +init_all_modules=0 +l3_mem_entries=16384 +l3_alpm_enable=2 +ipv6_lpm_128b_enable=0x1 +l3_max_ecmp_mode=1 + +stand_alone_phy_init=1 +port_phy_addr_1.0=0x220 +port_phy_addr_2.0=0x220 +port_phy_addr_3.0=0x220 +port_phy_addr_4.0=0x220 +port_phy_addr_13.0=0x224 +port_phy_addr_14.0=0x224 +port_phy_addr_15.0=0x224 +port_phy_addr_16.0=0x224 +port_phy_addr_20.0=0x248 +port_phy_addr_21.0=0x248 +port_phy_addr_22.0=0x248 +port_phy_addr_23.0=0x248 +port_phy_addr_32.0=0x22c +port_phy_addr_33.0=0x22c +port_phy_addr_34.0=0x22c +port_phy_addr_35.0=0x22c +port_phy_addr_124.0=0x250 +port_phy_addr_125.0=0x250 +port_phy_addr_126.0=0x250 +port_phy_addr_127.0=0x250 +port_phy_addr_128.0=0x254 +port_phy_addr_129.0=0x254 +port_phy_addr_130.0=0x254 +port_phy_addr_131.0=0x254 +port_phy_addr_144.0=0x278 +port_phy_addr_145.0=0x278 +port_phy_addr_146.0=0x278 +port_phy_addr_147.0=0x278 +port_phy_addr_148.0=0x27c +port_phy_addr_149.0=0x27c +port_phy_addr_150.0=0x27c +port_phy_addr_151.0=0x27c +port_phy_addr_5.0=0x140 +port_phy_addr_6.0=0x140 +port_phy_addr_7.0=0x140 +port_phy_addr_8.0=0x140 +port_phy_addr_9.0=0x144 +port_phy_addr_10.0=0x144 +port_phy_addr_11.0=0x144 +port_phy_addr_12.0=0x144 +port_phy_addr_24.0=0x168 +port_phy_addr_25.0=0x168 +port_phy_addr_26.0=0x168 +port_phy_addr_27.0=0x168 +port_phy_addr_28.0=0x14c +port_phy_addr_29.0=0x14c +port_phy_addr_30.0=0x14c +port_phy_addr_31.0=0x14c +port_phy_addr_120.0=0x170 +port_phy_addr_121.0=0x170 +port_phy_addr_122.0=0x170 +port_phy_addr_123.0=0x170 +port_phy_addr_132.0=0x174 +port_phy_addr_133.0=0x174 +port_phy_addr_134.0=0x174 +port_phy_addr_135.0=0x174 +port_phy_addr_140.0=0x218 +port_phy_addr_141.0=0x218 +port_phy_addr_142.0=0x218 +port_phy_addr_143.0=0x218 +port_phy_addr_152.0=0x21c +port_phy_addr_153.0=0x21c +port_phy_addr_154.0=0x21c +port_phy_addr_155.0=0x21c +port_phy_addr_44.0=0x60 +port_phy_addr_45.0=0x60 +port_phy_addr_46.0=0x60 +port_phy_addr_47.0=0x60 +port_phy_addr_52.0=0x64 +port_phy_addr_53.0=0x64 +port_phy_addr_54.0=0x64 +port_phy_addr_55.0=0x64 +port_phy_addr_64.0=0x108 +port_phy_addr_65.0=0x108 +port_phy_addr_66.0=0x108 +port_phy_addr_67.0=0x108 +port_phy_addr_72.0=0x6c +port_phy_addr_73.0=0x6c +port_phy_addr_74.0=0x6c +port_phy_addr_75.0=0x6c +port_phy_addr_80.0=0x110 +port_phy_addr_81.0=0x110 +port_phy_addr_82.0=0x110 +port_phy_addr_83.0=0x110 +port_phy_addr_88.0=0x114 +port_phy_addr_89.0=0x114 +port_phy_addr_90.0=0x114 +port_phy_addr_91.0=0x114 +port_phy_addr_100.0=0x138 +port_phy_addr_101.0=0x138 +port_phy_addr_102.0=0x138 +port_phy_addr_103.0=0x138 +port_phy_addr_108.0=0x13c +port_phy_addr_109.0=0x13c +port_phy_addr_110.0=0x13c +port_phy_addr_111.0=0x13c +port_phy_addr_40.0=0x0 +port_phy_addr_41.0=0x0 +port_phy_addr_42.0=0x0 +port_phy_addr_43.0=0x0 +port_phy_addr_48.0=0x4 +port_phy_addr_49.0=0x4 +port_phy_addr_50.0=0x4 +port_phy_addr_51.0=0x4 +port_phy_addr_60.0=0x28 +port_phy_addr_61.0=0x28 +port_phy_addr_62.0=0x28 +port_phy_addr_63.0=0x28 +port_phy_addr_68.0=0xc +port_phy_addr_69.0=0xc +port_phy_addr_70.0=0xc +port_phy_addr_71.0=0xc +port_phy_addr_84.0=0x30 +port_phy_addr_85.0=0x30 +port_phy_addr_86.0=0x30 +port_phy_addr_87.0=0x30 +port_phy_addr_92.0=0x34 +port_phy_addr_93.0=0x34 +port_phy_addr_94.0=0x34 +port_phy_addr_95.0=0x34 +port_phy_addr_104.0=0x58 +port_phy_addr_105.0=0x58 +port_phy_addr_106.0=0x58 +port_phy_addr_107.0=0x58 +port_phy_addr_112.0=0x5c +port_phy_addr_113.0=0x5c +port_phy_addr_114.0=0x5c +port_phy_addr_115.0=0x5c + +sap_rx_polarity_flip_1.0=0x2000 +sap_rx_polarity_flip_13.0=0x2000 +sap_rx_polarity_flip_20.0=0x2000 +sap_rx_polarity_flip_32.0=0x2000 +sap_rx_polarity_flip_124.0=0x2000 +sap_rx_polarity_flip_128.0=0x2000 +sap_rx_polarity_flip_144.0=0x2000 +sap_rx_polarity_flip_148.0=0x2000 +sap_rx_polarity_flip_5.0=0x2000 +sap_rx_polarity_flip_9.0=0x2000 +sap_rx_polarity_flip_24.0=0x2000 +sap_rx_polarity_flip_28.0=0x2000 +sap_rx_polarity_flip_120.0=0x2000 +sap_rx_polarity_flip_132.0=0x2000 +sap_rx_polarity_flip_140.0=0x2000 +sap_rx_polarity_flip_152.0=0x2000 +sap_rx_polarity_flip_44.0=0x2000 +sap_rx_polarity_flip_52.0=0x2000 +sap_rx_polarity_flip_64.0=0x2000 +sap_rx_polarity_flip_72.0=0x2000 +sap_rx_polarity_flip_80.0=0x2000 +sap_rx_polarity_flip_88.0=0x2000 +sap_rx_polarity_flip_100.0=0x2000 +sap_rx_polarity_flip_108.0=0x2000 +sap_rx_polarity_flip_40.0=0x2000 +sap_rx_polarity_flip_48.0=0x2000 +sap_rx_polarity_flip_60.0=0x2000 +sap_rx_polarity_flip_68.0=0x2000 +sap_rx_polarity_flip_84.0=0x2000 +sap_rx_polarity_flip_92.0=0x2000 +sap_rx_polarity_flip_104.0=0x2000 +sap_rx_polarity_flip_112.0=0x2000 + +sap_tx_polarity_flip_1.0=0x8414 +sap_tx_polarity_flip_13.0=0x8414 +sap_tx_polarity_flip_20.0=0x8414 +sap_tx_polarity_flip_32.0=0x8414 +sap_tx_polarity_flip_124.0=0x8414 +sap_tx_polarity_flip_128.0=0x8414 +sap_tx_polarity_flip_144.0=0x8414 +sap_tx_polarity_flip_148.0=0x8414 +sap_tx_polarity_flip_5.0=0x8414 +sap_tx_polarity_flip_9.0=0x8414 +sap_tx_polarity_flip_24.0=0x8414 +sap_tx_polarity_flip_28.0=0x8414 +sap_tx_polarity_flip_120.0=0x8414 +sap_tx_polarity_flip_132.0=0x8414 +sap_tx_polarity_flip_140.0=0x8414 +sap_tx_polarity_flip_152.0=0x8414 +sap_tx_polarity_flip_44.0=0x8414 +sap_tx_polarity_flip_52.0=0x8414 +sap_tx_polarity_flip_64.0=0x8414 +sap_tx_polarity_flip_72.0=0x8414 +sap_tx_polarity_flip_80.0=0x8414 +sap_tx_polarity_flip_88.0=0x8414 +sap_tx_polarity_flip_100.0=0x8414 +sap_tx_polarity_flip_108.0=0x8414 +sap_tx_polarity_flip_40.0=0x8414 +sap_tx_polarity_flip_48.0=0x8414 +sap_tx_polarity_flip_60.0=0x8414 +sap_tx_polarity_flip_68.0=0x8414 +sap_tx_polarity_flip_84.0=0x8414 +sap_tx_polarity_flip_92.0=0x8414 +sap_tx_polarity_flip_104.0=0x8414 +sap_tx_polarity_flip_112.0=0x8414 + +sap_mdio_num_1.0=9 +sap_mdio_num_13.0=9 +sap_mdio_num_20.0=10 +sap_mdio_num_32.0=9 +sap_mdio_num_124.0=10 +sap_mdio_num_128.0=10 +sap_mdio_num_144.0=11 +sap_mdio_num_148.0=11 +sap_mdio_num_5.0=6 +sap_mdio_num_9.0=6 +sap_mdio_num_24.0=7 +sap_mdio_num_28.0=6 +sap_mdio_num_120.0=7 +sap_mdio_num_132.0=7 +sap_mdio_num_140.0=8 +sap_mdio_num_152.0=8 +sap_mdio_num_44.0=3 +sap_mdio_num_52.0=3 +sap_mdio_num_64.0=4 +sap_mdio_num_72.0=3 +sap_mdio_num_80.0=4 +sap_mdio_num_88.0=4 +sap_mdio_num_100.0=5 +sap_mdio_num_108.0=5 +sap_mdio_num_40.0=0 +sap_mdio_num_48.0=0 +sap_mdio_num_60.0=1 +sap_mdio_num_68.0=0 +sap_mdio_num_84.0=1 +sap_mdio_num_92.0=1 +sap_mdio_num_104.0=2 +sap_mdio_num_112.0=2 + +#slot 1 bc 8 10 12 14 +portmap_40=65:100 +portmap_41=67:100 +portmap_42=69:100 +portmap_43=71:100 + +portmap_48=81:100 +portmap_49=83:100 +portmap_50=85:100 +portmap_51=87:100 + +portmap_60=97:100 +portmap_61=99:100 +portmap_62=101:100 +portmap_63=103:100 + +portmap_68=113:100 +portmap_69=115:100 +portmap_70=117:100 +portmap_71=119:100 + +#slot 1 bc 17 19 21 23 + +portmap_84=137:100 +portmap_85=139:100 +portmap_86=141:100 +portmap_87=143:100 + +portmap_92=153:100 +portmap_93=155:100 +portmap_94=157:100 +portmap_95=159:100 + +portmap_104=169:100 +portmap_105=171:100 +portmap_106=173:100 +portmap_107=175:100 + +portmap_112=185:100 +portmap_113=187:100 +portmap_114=189:100 +portmap_115=191:100 + +phy_chain_rx_lane_map_physical{65.0}=0x37046215 +phy_chain_tx_lane_map_physical{65.0}=0x75140623 +phy_chain_rx_lane_map_physical{81.0}=0x64301572 +phy_chain_tx_lane_map_physical{81.0}=0x52160374 +phy_chain_rx_lane_map_physical{97.0}=0x21537406 +phy_chain_tx_lane_map_physical{97.0}=0x62137450 +phy_chain_rx_lane_map_physical{113.0}=0x26107543 +phy_chain_tx_lane_map_physical{113.0}=0x61023754 +phy_chain_rx_lane_map_physical{137.0}=0x62130457 +phy_chain_tx_lane_map_physical{137.0}=0x15230746 +phy_chain_rx_lane_map_physical{153.0}=0x60157432 +phy_chain_tx_lane_map_physical{153.0}=0x34012576 +phy_chain_rx_lane_map_physical{169.0}=0x53026714 +phy_chain_tx_lane_map_physical{169.0}=0x34612057 +phy_chain_rx_lane_map_physical{185.0}=0x72456103 +phy_chain_tx_lane_map_physical{185.0}=0x25413076 + +serdes_core_rx_polarity_flip_physical{65}=0x48 +serdes_core_tx_polarity_flip_physical{65}=0xb1 +serdes_core_rx_polarity_flip_physical{81}=0x81 +serdes_core_tx_polarity_flip_physical{81}=0x2f +serdes_core_rx_polarity_flip_physical{97}=0x9c +serdes_core_tx_polarity_flip_physical{97}=0x02 +serdes_core_rx_polarity_flip_physical{113}=0xaf +serdes_core_tx_polarity_flip_physical{113}=0xd2 +serdes_core_rx_polarity_flip_physical{137}=0x2b +serdes_core_tx_polarity_flip_physical{137}=0x26 +serdes_core_rx_polarity_flip_physical{153}=0x0a +serdes_core_tx_polarity_flip_physical{153}=0xb0 +serdes_core_rx_polarity_flip_physical{169}=0x0d +serdes_core_tx_polarity_flip_physical{169}=0x3e +serdes_core_rx_polarity_flip_physical{185}=0xa2 +serdes_core_tx_polarity_flip_physical{185}=0x36 + +#slot 2 bc 9 11 13 15 +portmap_44=73:100 +portmap_45=75:100 +portmap_46=77:100 +portmap_47=79:100 + +portmap_52=89:100 +portmap_53=91:100 +portmap_54=93:100 +portmap_55=95:100 + +portmap_64=105:100 +portmap_65=107:100 +portmap_66=109:100 +portmap_67=111:100 + +portmap_72=121:100 +portmap_73=123:100 +portmap_74=125:100 +portmap_75=127:100 + +#bc 16 18 20 22 + +portmap_80=129:100 +portmap_81=131:100 +portmap_82=133:100 +portmap_83=135:100 + +portmap_88=145:100 +portmap_89=147:100 +portmap_90=149:100 +portmap_91=151:100 + +portmap_100=161:100 +portmap_101=163:100 +portmap_102=165:100 +portmap_103=167:100 + +portmap_108=177:100 +portmap_109=179:100 +portmap_110=181:100 +portmap_111=183:100 + +phy_chain_rx_lane_map_physical{73.0}=0x23760415 +phy_chain_tx_lane_map_physical{73.0}=0x31057624 +phy_chain_rx_lane_map_physical{89.0}=0x13204756 +phy_chain_tx_lane_map_physical{89.0}=0x31056724 +phy_chain_rx_lane_map_physical{105.0}=0x62375401 +phy_chain_tx_lane_map_physical{105.0}=0x54762310 +phy_chain_rx_lane_map_physical{121.0}=0x32107546 +phy_chain_tx_lane_map_physical{121.0}=0x67215340 +phy_chain_rx_lane_map_physical{129.0}=0x01236745 +phy_chain_tx_lane_map_physical{129.0}=0x65347012 +phy_chain_rx_lane_map_physical{145.0}=0x65723401 +phy_chain_tx_lane_map_physical{145.0}=0x47650132 +phy_chain_rx_lane_map_physical{161.0}=0x74532601 +phy_chain_tx_lane_map_physical{161.0}=0x67421350 +phy_chain_rx_lane_map_physical{177.0}=0x07516342 +phy_chain_tx_lane_map_physical{177.0}=0x67403152 + +serdes_core_rx_polarity_flip_physical{73}=0xb6 +serdes_core_tx_polarity_flip_physical{73}=0x25 +serdes_core_rx_polarity_flip_physical{89}=0x73 +serdes_core_tx_polarity_flip_physical{89}=0x27 +serdes_core_rx_polarity_flip_physical{105}=0x88 +serdes_core_tx_polarity_flip_physical{105}=0x9a +serdes_core_rx_polarity_flip_physical{121}=0xfa +serdes_core_tx_polarity_flip_physical{121}=0xe3 +serdes_core_rx_polarity_flip_physical{129}=0xf5 +serdes_core_tx_polarity_flip_physical{129}=0xe6 +serdes_core_rx_polarity_flip_physical{145}=0x3e +serdes_core_tx_polarity_flip_physical{145}=0x96 +serdes_core_rx_polarity_flip_physical{161}=0x0b +serdes_core_tx_polarity_flip_physical{161}=0x7a +serdes_core_rx_polarity_flip_physical{177}=0x8d +serdes_core_tx_polarity_flip_physical{177}=0x5a + +#slot 3 +#bc 1 3 5 7 + +portmap_5=9:100 +portmap_6=11:100 +portmap_7=13:100 +portmap_8=15:100 + +portmap_9=25:100 +portmap_10=27:100 +portmap_11=29:100 +portmap_12=31:100 + +portmap_24=41:100 +portmap_25=43:100 +portmap_26=45:100 +portmap_27=47:100 + +portmap_28=57:100 +portmap_29=59:100 +portmap_30=61:100 +portmap_31=63:100 + +#bc 24 26 28 30 +portmap_120=193:100 +portmap_121=195:100 +portmap_122=197:100 +portmap_123=199:100 + +portmap_132=209:100 +portmap_133=211:100 +portmap_134=213:100 +portmap_135=215:100 + +portmap_140=225:100 +portmap_141=227:100 +portmap_142=229:100 +portmap_143=231:100 + +portmap_152=241:100 +portmap_153=243:100 +portmap_154=245:100 +portmap_155=247:100 + +phy_chain_rx_lane_map_physical{9.0}=0x20541673 +phy_chain_tx_lane_map_physical{9.0}=0x32546107 +phy_chain_rx_lane_map_physical{25.0}=0x32104756 +phy_chain_tx_lane_map_physical{25.0}=0x30214756 +phy_chain_rx_lane_map_physical{41.0}=0x23610457 +phy_chain_tx_lane_map_physical{41.0}=0x57463201 +phy_chain_rx_lane_map_physical{57.0}=0x35671042 +phy_chain_tx_lane_map_physical{57.0}=0x47026351 +phy_chain_rx_lane_map_physical{193.0}=0x46712503 +phy_chain_tx_lane_map_physical{193.0}=0x57063241 +phy_chain_rx_lane_map_physical{209.0}=0x54302761 +phy_chain_tx_lane_map_physical{209.0}=0x50674312 +phy_chain_rx_lane_map_physical{225.0}=0x54762310 +phy_chain_tx_lane_map_physical{225.0}=0x65042371 +phy_chain_rx_lane_map_physical{241.0}=0x51026473 +phy_chain_tx_lane_map_physical{241.0}=0x40167532 + +serdes_core_rx_polarity_flip_physical{9}=0xac +serdes_core_tx_polarity_flip_physical{9}=0xfc +serdes_core_rx_polarity_flip_physical{25}=0xf7 +serdes_core_tx_polarity_flip_physical{25}=0x39 +serdes_core_rx_polarity_flip_physical{41}=0xd3 +serdes_core_tx_polarity_flip_physical{41}=0xb6 +serdes_core_rx_polarity_flip_physical{57}=0xad +serdes_core_tx_polarity_flip_physical{57}=0x61 +serdes_core_rx_polarity_flip_physical{193}=0x74 +serdes_core_tx_polarity_flip_physical{193}=0xd0 +serdes_core_rx_polarity_flip_physical{209}=0x9f +serdes_core_tx_polarity_flip_physical{209}=0x41 +serdes_core_rx_polarity_flip_physical{225}=0xfe +serdes_core_tx_polarity_flip_physical{225}=0x47 +serdes_core_rx_polarity_flip_physical{241}=0x5a +serdes_core_tx_polarity_flip_physical{241}=0xd9 + +#slot 4 +#bc 0 2 4 6 +portmap_1=1:100 +portmap_2=3:100 +portmap_3=5:100 +portmap_4=7:100 + +portmap_13=17:100 +portmap_14=19:100 +portmap_15=21:100 +portmap_16=23:100 + +portmap_20=33:100 +portmap_21=35:100 +portmap_22=37:100 +portmap_23=39:100 + +portmap_32=49:100 +portmap_33=51:100 +portmap_34=53:100 +portmap_35=55:100 + +#bc 25 27 29 31 + +portmap_124=201:100 +portmap_125=203:100 +portmap_126=205:100 +portmap_127=207:100 + +portmap_128=217:100 +portmap_129=219:100 +portmap_130=221:100 +portmap_131=223:100 + +portmap_144=233:100 +portmap_145=235:100 +portmap_146=237:100 +portmap_147=239:100 + +portmap_148=249:100 +portmap_149=251:100 +portmap_150=253:100 +portmap_151=255:100 + +phy_chain_rx_lane_map_physical{1.0}=0x62147035 +phy_chain_tx_lane_map_physical{1.0}=0x35046712 +phy_chain_rx_lane_map_physical{17.0}=0x76345012 +phy_chain_tx_lane_map_physical{17.0}=0x45102367 +phy_chain_rx_lane_map_physical{33.0}=0x12063457 +phy_chain_tx_lane_map_physical{33.0}=0x23607541 +phy_chain_rx_lane_map_physical{49.0}=0x03216745 +phy_chain_tx_lane_map_physical{49.0}=0x14650273 +phy_chain_rx_lane_map_physical{201.0}=0x34105627 +phy_chain_tx_lane_map_physical{201.0}=0x12503467 +phy_chain_rx_lane_map_physical{217.0}=0x02476351 +phy_chain_tx_lane_map_physical{217.0}=0x31524067 +phy_chain_rx_lane_map_physical{233.0}=0x10754623 +phy_chain_tx_lane_map_physical{233.0}=0x02314576 +phy_chain_rx_lane_map_physical{249.0}=0x34762510 +phy_chain_tx_lane_map_physical{249.0}=0x40271653 + +serdes_core_rx_polarity_flip_physical{1}=0xe0 +serdes_core_tx_polarity_flip_physical{1}=0xea +serdes_core_rx_polarity_flip_physical{17}=0x42 +serdes_core_tx_polarity_flip_physical{17}=0x8a +serdes_core_rx_polarity_flip_physical{33}=0xd1 +serdes_core_tx_polarity_flip_physical{33}=0x24 +serdes_core_rx_polarity_flip_physical{49}=0x23 +serdes_core_tx_polarity_flip_physical{49}=0xac +serdes_core_rx_polarity_flip_physical{201}=0xa8 +serdes_core_tx_polarity_flip_physical{201}=0x13 +serdes_core_rx_polarity_flip_physical{217}=0xdf +serdes_core_tx_polarity_flip_physical{217}=0x48 +serdes_core_rx_polarity_flip_physical{233}=0xdf +serdes_core_tx_polarity_flip_physical{233}=0x84 +serdes_core_rx_polarity_flip_physical{249}=0xfb +serdes_core_tx_polarity_flip_physical{249}=0xdc + +dport_map_port_40=1 +dport_map_port_41=2 +dport_map_port_42=3 +dport_map_port_43=4 +dport_map_port_48=5 +dport_map_port_49=6 +dport_map_port_50=7 +dport_map_port_51=8 +dport_map_port_60=9 +dport_map_port_61=10 +dport_map_port_62=11 +dport_map_port_63=12 +dport_map_port_68=13 +dport_map_port_69=14 +dport_map_port_70=15 +dport_map_port_71=16 +dport_map_port_84=17 +dport_map_port_85=18 +dport_map_port_86=19 +dport_map_port_87=20 +dport_map_port_92=21 +dport_map_port_93=22 +dport_map_port_94=23 +dport_map_port_95=24 +dport_map_port_104=25 +dport_map_port_105=26 +dport_map_port_106=27 +dport_map_port_107=28 +dport_map_port_112=29 +dport_map_port_113=30 +dport_map_port_114=31 +dport_map_port_115=32 + +dport_map_port_44=33 +dport_map_port_45=34 +dport_map_port_46=35 +dport_map_port_47=36 +dport_map_port_52=37 +dport_map_port_53=38 +dport_map_port_54=39 +dport_map_port_55=40 +dport_map_port_64=41 +dport_map_port_65=42 +dport_map_port_66=43 +dport_map_port_67=44 +dport_map_port_72=45 +dport_map_port_73=46 +dport_map_port_74=47 +dport_map_port_75=48 +dport_map_port_80=49 +dport_map_port_81=50 +dport_map_port_82=51 +dport_map_port_83=52 +dport_map_port_88=53 +dport_map_port_89=54 +dport_map_port_90=55 +dport_map_port_91=56 +dport_map_port_100=57 +dport_map_port_101=58 +dport_map_port_102=59 +dport_map_port_103=60 +dport_map_port_108=61 +dport_map_port_109=62 +dport_map_port_110=63 +dport_map_port_111=64 + +dport_map_port_5=65 +dport_map_port_6=66 +dport_map_port_7=67 +dport_map_port_8=68 +dport_map_port_9=69 +dport_map_port_10=70 +dport_map_port_11=71 +dport_map_port_12=72 +dport_map_port_24=73 +dport_map_port_25=74 +dport_map_port_26=75 +dport_map_port_27=76 +dport_map_port_28=77 +dport_map_port_29=78 +dport_map_port_30=79 +dport_map_port_31=80 +dport_map_port_120=81 +dport_map_port_121=82 +dport_map_port_122=83 +dport_map_port_123=84 +dport_map_port_132=85 +dport_map_port_133=86 +dport_map_port_134=87 +dport_map_port_135=88 +dport_map_port_140=89 +dport_map_port_141=90 +dport_map_port_142=91 +dport_map_port_143=92 +dport_map_port_152=93 +dport_map_port_153=94 +dport_map_port_154=95 +dport_map_port_155=96 + +dport_map_port_1=97 +dport_map_port_2=98 +dport_map_port_3=99 +dport_map_port_4=100 +dport_map_port_13=101 +dport_map_port_14=102 +dport_map_port_15=103 +dport_map_port_16=104 +dport_map_port_20=105 +dport_map_port_21=106 +dport_map_port_22=107 +dport_map_port_23=108 +dport_map_port_32=109 +dport_map_port_33=110 +dport_map_port_34=111 +dport_map_port_35=112 +dport_map_port_124=113 +dport_map_port_125=114 +dport_map_port_126=115 +dport_map_port_127=116 +dport_map_port_128=117 +dport_map_port_129=118 +dport_map_port_130=119 +dport_map_port_131=120 +dport_map_port_144=121 +dport_map_port_145=122 +dport_map_port_146=123 +dport_map_port_147=124 +dport_map_port_148=125 +dport_map_port_149=126 +dport_map_port_150=127 +dport_map_port_151=128 + +#firmware load, use fast load +load_firmware=0x2 + +core_clock_frequency=1325 +dpr_clock_frequency=1000 +device_clock_frequency=1325 +port_flex_enable=1 diff --git a/device/ragile/x86_64-ragile_ra-b6920-4s-r0/bcm.rc b/device/ragile/x86_64-ragile_ra-b6920-4s-r0/bcm.rc new file mode 100644 index 0000000000..7f69f10d3b --- /dev/null +++ b/device/ragile/x86_64-ragile_ra-b6920-4s-r0/bcm.rc @@ -0,0 +1 @@ +rcload /usr/share/sonic/platform/led_proc_init.soc diff --git a/device/ragile/x86_64-ragile_ra-b6920-4s-r0/bcm_pre.rc b/device/ragile/x86_64-ragile_ra-b6920-4s-r0/bcm_pre.rc new file mode 100644 index 0000000000..ff9e519180 --- /dev/null +++ b/device/ragile/x86_64-ragile_ra-b6920-4s-r0/bcm_pre.rc @@ -0,0 +1 @@ +m0 load 0 0 /usr/share/sonic/platform/linkscan_led.bin diff --git a/device/ragile/x86_64-ragile_ra-b6920-4s-r0/custom_led.bin b/device/ragile/x86_64-ragile_ra-b6920-4s-r0/custom_led.bin new file mode 100644 index 0000000000..579e6df527 Binary files /dev/null and b/device/ragile/x86_64-ragile_ra-b6920-4s-r0/custom_led.bin differ diff --git a/device/ragile/x86_64-ragile_ra-b6920-4s-r0/default_sku b/device/ragile/x86_64-ragile_ra-b6920-4s-r0/default_sku new file mode 100644 index 0000000000..7945335f27 --- /dev/null +++ b/device/ragile/x86_64-ragile_ra-b6920-4s-r0/default_sku @@ -0,0 +1 @@ +RA-B6920-4S t1 diff --git a/device/ragile/x86_64-ragile_ra-b6920-4s-r0/dev.xml b/device/ragile/x86_64-ragile_ra-b6920-4s-r0/dev.xml new file mode 100644 index 0000000000..7243bf77c6 --- /dev/null +++ b/device/ragile/x86_64-ragile_ra-b6920-4s-r0/dev.xml @@ -0,0 +1,238 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/device/ragile/x86_64-ragile_ra-b6920-4s-r0/device_data.json b/device/ragile/x86_64-ragile_ra-b6920-4s-r0/device_data.json new file mode 100644 index 0000000000..6bf7042401 --- /dev/null +++ b/device/ragile/x86_64-ragile_ra-b6920-4s-r0/device_data.json @@ -0,0 +1,3716 @@ +{ + "PLATFORM": { + "fan_info": { + "drawer_num": 6, + "fans_per_drawer": 2, + "MAX_FAN_SPEED": 12300, + "MIN_FAN_SPEED": 3690, + "ALLOW-FAN-TYPES": { + "P2EFAN I-F": "exhaust" + } + }, + "psu_info": { + "psu_num": 4, + "fans_per_psu": 1, + "MAX_PSU_FAN_SPEED": 25100, + "MIN_PSU_FAN_SPEED": 6600, + "ALLOW-PSU-TYPES": { + "DPS-1300AB-6 S": "exhaust" + } + }, + "thermal_info": { + "temp_num": 9 + }, + "component_info": { + "comp_num": 13 + }, + "debug": { + "level": 0 + } + }, + "EEPROM-1": { + "eeprom": { + "codec": { + "name": "TLV", + "attrs": { + "path": "/sys/bus/i2c/devices/1-0056/eeprom" + } + } + } + }, + "THERMAL-1": { + "desc": "INLET TEMP", + "temp": { + "codec": { + "name": "SYSFS", + "attrs": { + "path": "/sys/bus/i2c/devices/29-004f/hwmon/*/temp1_input" + } + }, + "post": { + "name": "DIVISION", + "attrs": { + "divisor": 1000, + "nearest": 3 + } + } + }, + "h_thd": { + "default": 70 + }, + "h_crit": { + "default": 80 + } + }, + "THERMAL-2": { + "temp": { + "desc": "OUTLET TEMP", + "codec": { + "name": "SYSFS", + "attrs": { + "path": "/sys/bus/i2c/devices/28-004b/hwmon/*/temp1_input" + } + }, + "post": { + "name": "DIVISION", + "attrs": { + "divisor": 1000, + "nearest": 3 + } + } + }, + "h_thd": { + "default": 85 + }, + "h_crit": { + "default": 90 + } + }, + "THERMAL-3": { + "temp": { + "desc": "BOARD TEMP", + "codec": { + "name": "SYSFS", + "attrs": { + "path": "/sys/bus/i2c/devices/28-004c/hwmon/*/temp1_input" + } + }, + "post": { + "name": "DIVISION", + "attrs": { + "divisor": 1000, + "nearest": 3 + } + } + }, + "h_thd": { + "default": 85 + }, + "h_crit": { + "default": 90 + } + }, + "THERMAL-4": { + "desc": "CPU CORE 0", + "temp": { + "codec": { + "name": "SYSFS", + "attrs": { + "path": "/sys/class/hwmon/hwmon0/temp2_input" + } + }, + "post": { + "name": "DIVISION", + "attrs": { + "divisor": 1000, + "nearest": 3 + } + } + }, + "h_thd": { + "default": 85 + }, + "h_crit": { + "default": 100 + } + }, + "THERMAL-5": { + "desc": "CPU CORE 1", + "temp": { + "codec": { + "name": "SYSFS", + "attrs": { + "path": "/sys/class/hwmon/hwmon0/temp3_input" + } + }, + "post": { + "name": "DIVISION", + "attrs": { + "divisor": 1000, + "nearest": 3 + } + } + }, + "h_thd": { + "default": 85 + }, + "h_crit": { + "default": 100 + } + }, + "THERMAL-6": { + "desc": "CPU CORE 2", + "temp": { + "codec": { + "name": "SYSFS", + "attrs": { + "path": "/sys/class/hwmon/hwmon0/temp4_input" + } + }, + "post": { + "name": "DIVISION", + "attrs": { + "divisor": 1000, + "nearest": 3 + } + } + }, + "h_thd": { + "default": 85 + }, + "h_crit": { + "default": 100 + } + }, + "THERMAL-7": { + "desc": "CPU CORE 3", + "temp": { + "codec": { + "name": "SYSFS", + "attrs": { + "path": "/sys/class/hwmon/hwmon0/temp5_input" + } + }, + "post": { + "name": "DIVISION", + "attrs": { + "divisor": 1000, + "nearest": 3 + } + } + }, + "h_thd": { + "default": 85 + }, + "h_crit": { + "default": 100 + } + }, + "THERMAL-8": { + "desc": "MAC TEMP1", + "temp": { + "codec": { + "name": "SYSFS", + "attrs": { + "path": "/sys/bus/i2c/devices/28-004c/hwmon/*/temp2_input" + } + }, + "post": { + "name": "DIVISION", + "attrs": { + "divisor": 1000, + "nearest": 3 + } + } + }, + "h_thd": { + "default": 100 + }, + "h_crit": { + "default": 105 + } + }, + "THERMAL-9": { + "desc": "MAC TEMP2", + "temp": { + "codec": { + "name": "SYSFS", + "attrs": { + "path": "/sys/bus/i2c/devices/29-004c/hwmon/*/temp2_input" + } + }, + "post": { + "name": "DIVISION", + "attrs": { + "divisor": 1000, + "nearest": 3 + } + } + }, + "h_thd": { + "default": 100 + }, + "h_crit": { + "default": 105 + } + }, + "COMPONENT-1": { + "desc": { + "default": "FAN_CPLD_B" + }, + "version": { + "codec": { + "name": "I2C", + "attrs": { + "bus": "13", + "addr": "0x0d", + "offset": "0x0", + "size": 4 + } + }, + "post_fmtter": { + "name": "TO_STR", + "attrs": { + "base": 16, + "sep": "/" + } + } + } + }, + "COMPONENT-2": { + "desc": { + "default": "FAN_CPLD_A" + }, + "version": { + "codec": { + "name": "I2C", + "attrs": { + "bus": "14", + "addr": "0x0d", + "offset": "0x0", + "size": 4 + } + }, + "post_fmtter": { + "name": "TO_STR", + "attrs": { + "base": 16, + "sep": "/" + } + } + } + }, + "COMPONENT-3": { + "desc": { + "default": "LC1_CPLD_1" + }, + "version": { + "codec": { + "name": "I2C", + "attrs": { + "bus": "3", + "addr": "0x30", + "offset": "0x0", + "size": 4 + } + }, + "post_fmtter": { + "name": "TO_STR", + "attrs": { + "base": 16, + "sep": "/" + } + } + } + }, + "COMPONENT-4": { + "desc": { + "default": "LC1_CPLD_2" + }, + "version": { + "codec": { + "name": "I2C", + "attrs": { + "bus": "3", + "addr": "0x31", + "offset": "0x0", + "size": 4 + } + }, + "post_fmtter": { + "name": "TO_STR", + "attrs": { + "base": 16, + "sep": "/" + } + } + } + }, + "COMPONENT-5": { + "desc": { + "default": "LC2_CPLD_1" + }, + "version": { + "codec": { + "name": "I2C", + "attrs": { + "bus": "4", + "addr": "0x30", + "offset": "0x0", + "size": 4 + } + }, + "post_fmtter": { + "name": "TO_STR", + "attrs": { + "base": 16, + "sep": "/" + } + } + } + }, + "COMPONENT-6": { + "desc": { + "default": "LC2_CPLD_2" + }, + "version": { + "codec": { + "name": "I2C", + "attrs": { + "bus": "4", + "addr": "0x31", + "offset": "0x0", + "size": 4 + } + }, + "post_fmtter": { + "name": "TO_STR", + "attrs": { + "base": 16, + "sep": "/" + } + } + } + }, + "COMPONENT-7": { + "desc": { + "default": "LC3_CPLD_1" + }, + "version": { + "codec": { + "name": "I2C", + "attrs": { + "bus": "5", + "addr": "0x30", + "offset": "0x0", + "size": 4 + } + }, + "post_fmtter": { + "name": "TO_STR", + "attrs": { + "base": 16, + "sep": "/" + } + } + } + }, + "COMPONENT-8": { + "desc": { + "default": "LC3_CPLD_2" + }, + "version": { + "codec": { + "name": "I2C", + "attrs": { + "bus": "5", + "addr": "0x31", + "offset": "0x0", + "size": 4 + } + }, + "post_fmtter": { + "name": "TO_STR", + "attrs": { + "base": 16, + "sep": "/" + } + } + } + }, + "COMPONENT-9": { + "desc": { + "default": "LC4_CPLD_1" + }, + "version": { + "codec": { + "name": "I2C", + "attrs": { + "bus": "6", + "addr": "0x30", + "offset": "0x0", + "size": 4 + } + }, + "post_fmtter": { + "name": "TO_STR", + "attrs": { + "base": 16, + "sep": "/" + } + } + } + }, + "COMPONENT-10": { + "desc": { + "default": "LC4_CPLD_2" + }, + "version": { + "codec": { + "name": "I2C", + "attrs": { + "bus": "6", + "addr": "0x31", + "offset": "0x0", + "size": 4 + } + }, + "post_fmtter": { + "name": "TO_STR", + "attrs": { + "base": 16, + "sep": "/" + } + } + } + }, + "COMPONENT-11": { + "desc": { + "default": "X86_CPLD" + }, + "version": { + "codec": { + "name": "IO", + "attrs": { + "offset": "0x700", + "size": 4 + } + }, + "post_fmtter": { + "name": "TO_STR", + "attrs": { + "base": 16, + "sep": "/" + } + } + } + }, + "COMPONENT-12": { + "desc": { + "default": "MAC_CPLD_B" + }, + "version": { + "codec": { + "name": "IO", + "attrs": { + "offset": "0x900", + "size": 4 + } + }, + "post_fmtter": { + "name": "TO_STR", + "attrs": { + "base": 16, + "sep": "/" + } + } + } + }, + "COMPONENT-13": { + "desc": { + "default": "MAC_CPLD_A" + }, + "version": { + "codec": { + "name": "IO", + "attrs": { + "offset": "0xb00", + "size": 4 + } + }, + "post_fmtter": { + "name": "TO_STR", + "attrs": { + "base": 16, + "sep": "/" + } + } + } + }, + "PSU-1": { + "presence": { + "codec": { + "name": "IO", + "attrs": { + "offset": "0xb27", + "size": "1" + } + }, + "post": { + "name": "CMP", + "attrs": { + "cmpval": 0, + "mask": "0x01" + } + } + }, + "status": { + "codec": { + "name": "IO", + "attrs": { + "offset": "0xb27", + "size": "1" + } + }, + "post": { + "name": "CMP", + "attrs": { + "cmpval": "0x02", + "mask": "0x02" + } + } + }, + "max_power_in": { + "codec": { + "name": "SYSFS", + "attrs": { + "path": "/sys/bus/i2c/devices/23-0058/hwmon/*/power1_max" + } + }, + "post_fmtter": { + "name": "TO_INT" + }, + "post": { + "name": "DIVISION", + "attrs": { + "divisor": 1000000 + } + } + }, + "max_power_out": { + "codec": { + "name": "SYSFS", + "attrs": { + "path": "/sys/bus/i2c/devices/23-0058/hwmon/*/power2_max" + } + }, + "post_fmtter": { + "name": "TO_INT" + }, + "post": { + "name": "DIVISION", + "attrs": { + "divisor": 1000000 + } + } + }, + "v_in": { + "codec": { + "name": "SYSFS", + "attrs": { + "path": "/sys/bus/i2c/devices/23-0058/hwmon/*/in1_input" + } + }, + "post_fmtter": { + "name": "TO_INT" + }, + "post": { + "name": "DIVISION", + "attrs": { + "divisor": 1000 + } + } + }, + "v_in_h_thd": {}, + "v_in_l_thd": {}, + "i_in": { + "codec": { + "name": "SYSFS", + "attrs": { + "path": "/sys/bus/i2c/devices/23-0058/hwmon/*/curr1_input" + } + }, + "post_fmtter": { + "name": "TO_INT" + }, + "post": { + "name": "DIVISION", + "attrs": { + "divisor": 1000 + } + } + }, + "i_in_h_thd": { + "codec": { + "name": "SYSFS", + "attrs": { + "path": "/sys/bus/i2c/devices/23-0058/hwmon/*/curr1_max" + } + }, + "post_fmtter": { + "name": "TO_INT" + }, + "post": { + "name": "DIVISION", + "attrs": { + "divisor": 1000 + } + } + }, + "i_in_l_thd": {}, + "v_out": { + "codec": { + "name": "SYSFS", + "attrs": { + "path": "/sys/bus/i2c/devices/23-0058/hwmon/*/in2_input" + } + }, + "post_fmtter": { + "name": "TO_INT" + }, + "post": { + "name": "DIVISION", + "attrs": { + "divisor": 1000 + } + } + }, + "v_out_h_thd": { + "codec": { + "name": "SYSFS", + "attrs": { + "path": "/sys/bus/i2c/devices/23-0058/hwmon/*/in2_crit" + } + }, + "post_fmtter": { + "name": "TO_INT" + }, + "post": { + "name": "DIVISION", + "attrs": { + "divisor": 1000 + } + } + }, + "v_out_l_thd": {}, + "i_out": { + "codec": { + "name": "SYSFS", + "attrs": { + "path": "/sys/bus/i2c/devices/23-0058/hwmon/*/curr2_input" + } + }, + "post_fmtter": { + "name": "TO_INT" + }, + "post": { + "name": "DIVISION", + "attrs": { + "divisor": 1000 + } + } + }, + "i_out_h_thd": { + "codec": { + "name": "SYSFS", + "attrs": { + "path": "/sys/bus/i2c/devices/23-0058/hwmon/*/curr2_max" + } + }, + "post_fmtter": { + "name": "TO_INT" + }, + "post": { + "name": "DIVISION", + "attrs": { + "divisor": 1000 + } + } + }, + "i_out_l_thd": {}, + "temp": { + "codec": { + "name": "SYSFS", + "attrs": { + "path": "/sys/bus/i2c/devices/23-0058/hwmon/*/temp1_input" + } + }, + "post_fmtter": { + "name": "TO_INT" + }, + "post": { + "name": "DIVISION", + "attrs": { + "divisor": 1000 + } + } + }, + "temp_h_thd": { + "codec": { + "name": "SYSFS", + "attrs": { + "path": "/sys/bus/i2c/devices/23-0058/hwmon/*/temp1_max" + } + }, + "post_fmtter": { + "name": "TO_INT" + }, + "post": { + "name": "DIVISION", + "attrs": { + "divisor": 1000 + } + } + }, + "temp_l_thd": {}, + "power_in": { + "codec": { + "name": "SYSFS", + "attrs": { + "path": "/sys/bus/i2c/devices/23-0058/hwmon/*/power1_input" + } + }, + "post_fmtter": { + "name": "TO_INT" + }, + "post": { + "name": "DIVISION", + "attrs": { + "divisor": 1000000 + } + } + }, + "power_out": { + "codec": { + "name": "SYSFS", + "attrs": { + "path": "/sys/bus/i2c/devices/23-0058/hwmon/*/power2_input" + } + }, + "post_fmtter": { + "name": "TO_INT" + }, + "post": { + "name": "DIVISION", + "attrs": { + "divisor": 1000000 + } + } + }, + "sn": { + "codec": { + "name": "SYSFS", + "attrs": { + "path": "/sys/bus/i2c/devices/23-0050/psu_sn" + } + } + }, + "pn": { + "codec": { + "name": "SYSFS", + "attrs": { + "path": "/sys/bus/i2c/devices/23-0050/psu_type" + } + } + }, + "revision": { + "codec": { + "name": "SYSFS", + "attrs": { + "path": "/sys/bus/i2c/devices/23-0050/psu_hw" + } + } + }, + "led": {}, + "supp": { + "codec": { + "name": "SYSFS", + "attrs": { + "path": "/sys/bus/i2c/devices/23-0050/psu_type" + } + }, + "post": { + "name": "MATCH_LIST", + "attrs": { + "cmpitem": "ALLOW-PSU-TYPES" + } + } + } + }, + "PSU-2": { + "presence": { + "codec": { + "name": "IO", + "attrs": { + "offset": "0xb28", + "size": 1 + } + }, + "post": { + "name": "CMP", + "attrs": { + "cmpval": 0, + "mask": "0x01" + } + } + }, + "status": { + "codec": { + "name": "IO", + "attrs": { + "offset": "0xb28", + "size": 1 + } + }, + "post": { + "name": "CMP", + "attrs": { + "cmpval": "0x02", + "mask": "0x02" + } + } + }, + "max_power_in": { + "codec": { + "name": "SYSFS", + "attrs": { + "path": "/sys/bus/i2c/devices/25-0058/hwmon/*/power1_max" + } + }, + "post_fmtter": { + "name": "TO_INT" + }, + "post": { + "name": "DIVISION", + "attrs": { + "divisor": 1000000 + } + } + }, + "max_power_out": { + "codec": { + "name": "SYSFS", + "attrs": { + "path": "/sys/bus/i2c/devices/25-0058/hwmon/*/power2_max" + } + }, + "post_fmtter": { + "name": "TO_INT" + }, + "post": { + "name": "DIVISION", + "attrs": { + "divisor": 1000000 + } + } + }, + "v_in": { + "codec": { + "name": "SYSFS", + "attrs": { + "path": "/sys/bus/i2c/devices/25-0058/hwmon/*/in1_input" + } + }, + "post_fmtter": { + "name": "TO_INT" + }, + "post": { + "name": "DIVISION", + "attrs": { + "divisor": 1000 + } + } + }, + "v_in_h_thd": {}, + "v_in_l_thd": {}, + "i_in": { + "codec": { + "name": "SYSFS", + "attrs": { + "path": "/sys/bus/i2c/devices/25-0058/hwmon/*/curr1_input" + } + }, + "post_fmtter": { + "name": "TO_INT" + }, + "post": { + "name": "DIVISION", + "attrs": { + "divisor": 1000 + } + } + }, + "i_in_h_thd": { + "codec": { + "name": "SYSFS", + "attrs": { + "path": "/sys/bus/i2c/devices/25-0058/hwmon/*/curr1_max" + } + }, + "post_fmtter": { + "name": "TO_INT" + }, + "post": { + "name": "DIVISION", + "attrs": { + "divisor": 1000 + } + } + }, + "i_in_l_thd": {}, + "v_out": { + "codec": { + "name": "SYSFS", + "attrs": { + "path": "/sys/bus/i2c/devices/25-0058/hwmon/*/in2_input" + } + }, + "post_fmtter": { + "name": "TO_INT" + }, + "post": { + "name": "DIVISION", + "attrs": { + "divisor": 1000 + } + } + }, + "v_out_h_thd": { + "codec": { + "name": "SYSFS", + "attrs": { + "path": "/sys/bus/i2c/devices/25-0058/hwmon/*/in2_crit" + } + }, + "post_fmtter": { + "name": "TO_INT" + }, + "post": { + "name": "DIVISION", + "attrs": { + "divisor": 1000 + } + } + }, + "v_out_l_thd": {}, + "i_out": { + "codec": { + "name": "SYSFS", + "attrs": { + "path": "/sys/bus/i2c/devices/25-0058/hwmon/*/curr2_input" + } + }, + "post_fmtter": { + "name": "TO_INT" + }, + "post": { + "name": "DIVISION", + "attrs": { + "divisor": 1000 + } + } + }, + "i_out_h_thd": { + "codec": { + "name": "SYSFS", + "attrs": { + "path": "/sys/bus/i2c/devices/25-0058/hwmon/*/curr2_max" + } + }, + "post_fmtter": { + "name": "TO_INT" + }, + "post": { + "name": "DIVISION", + "attrs": { + "divisor": 1000 + } + } + }, + "i_out_l_thd": {}, + "temp": { + "codec": { + "name": "SYSFS", + "attrs": { + "path": "/sys/bus/i2c/devices/25-0058/hwmon/*/temp1_input" + } + }, + "post_fmtter": { + "name": "TO_INT" + }, + "post": { + "name": "DIVISION", + "attrs": { + "divisor": 1000 + } + } + }, + "temp_h_thd": { + "codec": { + "name": "SYSFS", + "attrs": { + "path": "/sys/bus/i2c/devices/25-0058/hwmon/*/temp1_max" + } + }, + "post_fmtter": { + "name": "TO_INT" + }, + "post": { + "name": "DIVISION", + "attrs": { + "divisor": 1000 + } + } + }, + "temp_l_thd": {}, + "power_in": { + "codec": { + "name": "SYSFS", + "attrs": { + "path": "/sys/bus/i2c/devices/25-0058/hwmon/*/power1_input" + } + }, + "post_fmtter": { + "name": "TO_INT" + }, + "post": { + "name": "DIVISION", + "attrs": { + "divisor": 1000000 + } + } + }, + "power_out": { + "codec": { + "name": "SYSFS", + "attrs": { + "path": "/sys/bus/i2c/devices/25-0058/hwmon/*/power2_input" + } + }, + "post_fmtter": { + "name": "TO_INT" + }, + "post": { + "name": "DIVISION", + "attrs": { + "divisor": 1000000 + } + } + }, + "sn": { + "codec": { + "name": "SYSFS", + "attrs": { + "path": "/sys/bus/i2c/devices/25-0050/psu_sn" + } + } + }, + "pn": { + "codec": { + "name": "SYSFS", + "attrs": { + "path": "/sys/bus/i2c/devices/25-0050/psu_type" + } + } + }, + "revision": { + "codec": { + "name": "SYSFS", + "attrs": { + "path": "/sys/bus/i2c/devices/25-0050/psu_hw" + } + } + }, + "led": {}, + "supp": { + "codec": { + "name": "SYSFS", + "attrs": { + "path": "/sys/bus/i2c/devices/25-0050/psu_type" + } + }, + "post": { + "name": "MATCH_LIST", + "attrs": { + "cmpitem": "ALLOW-PSU-TYPES" + } + } + } + }, + "PSU-3": { + "presence": { + "codec": { + "name": "IO", + "attrs": { + "offset": "0xb29", + "size": 1 + } + }, + "post": { + "name": "CMP", + "attrs": { + "cmpval": 0, + "mask": "0x01" + } + } + }, + "status": { + "codec": { + "name": "IO", + "attrs": { + "offset": "0xb29", + "size": 1 + } + }, + "post": { + "name": "CMP", + "attrs": { + "cmpval": "0x02", + "mask": "0x02" + } + } + }, + "max_power_in": { + "codec": { + "name": "SYSFS", + "attrs": { + "path": "/sys/bus/i2c/devices/24-0058/hwmon/*/power1_max" + } + }, + "post_fmtter": { + "name": "TO_INT" + }, + "post": { + "name": "DIVISION", + "attrs": { + "divisor": 1000000 + } + } + }, + "max_power_out": { + "codec": { + "name": "SYSFS", + "attrs": { + "path": "/sys/bus/i2c/devices/24-0058/hwmon/*/power2_max" + } + }, + "post_fmtter": { + "name": "TO_INT" + }, + "post": { + "name": "DIVISION", + "attrs": { + "divisor": 1000000 + } + } + }, + "v_in": { + "codec": { + "name": "SYSFS", + "attrs": { + "path": "/sys/bus/i2c/devices/24-0058/hwmon/*/in1_input" + } + }, + "post_fmtter": { + "name": "TO_INT" + }, + "post": { + "name": "DIVISION", + "attrs": { + "divisor": 1000 + } + } + }, + "v_in_h_thd": {}, + "v_in_l_thd": {}, + "i_in": { + "codec": { + "name": "SYSFS", + "attrs": { + "path": "/sys/bus/i2c/devices/24-0058/hwmon/*/curr1_input" + } + }, + "post_fmtter": { + "name": "TO_INT" + }, + "post": { + "name": "DIVISION", + "attrs": { + "divisor": 1000 + } + } + }, + "i_in_h_thd": { + "codec": { + "name": "SYSFS", + "attrs": { + "path": "/sys/bus/i2c/devices/24-0058/hwmon/*/curr1_max" + } + }, + "post_fmtter": { + "name": "TO_INT" + }, + "post": { + "name": "DIVISION", + "attrs": { + "divisor": 1000 + } + } + }, + "i_in_l_thd": {}, + "v_out": { + "codec": { + "name": "SYSFS", + "attrs": { + "path": "/sys/bus/i2c/devices/24-0058/hwmon/*/in2_input" + } + }, + "post_fmtter": { + "name": "TO_INT" + }, + "post": { + "name": "DIVISION", + "attrs": { + "divisor": 1000 + } + } + }, + "v_out_h_thd": { + "codec": { + "name": "SYSFS", + "attrs": { + "path": "/sys/bus/i2c/devices/24-0058/hwmon/*/in2_crit" + } + }, + "post_fmtter": { + "name": "TO_INT" + }, + "post": { + "name": "DIVISION", + "attrs": { + "divisor": 1000 + } + } + }, + "v_out_l_thd": {}, + "i_out": { + "codec": { + "name": "SYSFS", + "attrs": { + "path": "/sys/bus/i2c/devices/24-0058/hwmon/*/curr2_input" + } + }, + "post_fmtter": { + "name": "TO_INT" + }, + "post": { + "name": "DIVISION", + "attrs": { + "divisor": 1000 + } + } + }, + "i_out_h_thd": { + "codec": { + "name": "SYSFS", + "attrs": { + "path": "/sys/bus/i2c/devices/24-0058/hwmon/*/curr2_max" + } + }, + "post_fmtter": { + "name": "TO_INT" + }, + "post": { + "name": "DIVISION", + "attrs": { + "divisor": 1000 + } + } + }, + "i_out_l_thd": {}, + "temp": { + "codec": { + "name": "SYSFS", + "attrs": { + "path": "/sys/bus/i2c/devices/24-0058/hwmon/*/temp1_input" + } + }, + "post_fmtter": { + "name": "TO_INT" + }, + "post": { + "name": "DIVISION", + "attrs": { + "divisor": 1000 + } + } + }, + "temp_h_thd": { + "codec": { + "name": "SYSFS", + "attrs": { + "path": "/sys/bus/i2c/devices/24-0058/hwmon/*/temp1_max" + } + }, + "post_fmtter": { + "name": "TO_INT" + }, + "post": { + "name": "DIVISION", + "attrs": { + "divisor": 1000 + } + } + }, + "temp_l_thd": {}, + "power_in": { + "codec": { + "name": "SYSFS", + "attrs": { + "path": "/sys/bus/i2c/devices/24-0058/hwmon/*/power1_input" + } + }, + "post_fmtter": { + "name": "TO_INT" + }, + "post": { + "name": "DIVISION", + "attrs": { + "divisor": 1000000 + } + } + }, + "power_out": { + "codec": { + "name": "SYSFS", + "attrs": { + "path": "/sys/bus/i2c/devices/24-0058/hwmon/*/power2_input" + } + }, + "post_fmtter": { + "name": "TO_INT" + }, + "post": { + "name": "DIVISION", + "attrs": { + "divisor": 1000000 + } + } + }, + "sn": { + "codec": { + "name": "SYSFS", + "attrs": { + "path": "/sys/bus/i2c/devices/24-0050/psu_sn" + } + } + }, + "pn": { + "codec": { + "name": "SYSFS", + "attrs": { + "path": "/sys/bus/i2c/devices/24-0050/psu_type" + } + } + }, + "revision": { + "codec": { + "name": "SYSFS", + "attrs": { + "path": "/sys/bus/i2c/devices/24-0050/psu_hw" + } + } + }, + "led": {}, + "supp": { + "codec": { + "name": "SYSFS", + "attrs": { + "path": "/sys/bus/i2c/devices/24-0050/psu_type" + } + }, + "post": { + "name": "MATCH_LIST", + "attrs": { + "cmpitem": "ALLOW-PSU-TYPES" + } + } + } + }, + "PSU-4": { + "presence": { + "codec": { + "name": "IO", + "attrs": { + "offset": "0xb2a", + "size": 1 + } + }, + "post": { + "name": "CMP", + "attrs": { + "cmpval": 0, + "mask": "0x01" + } + } + }, + "status": { + "codec": { + "name": "IO", + "attrs": { + "offset": "0xb2a", + "size": 1 + } + }, + "post": { + "name": "CMP", + "attrs": { + "cmpval": "0x02", + "mask": "0x02" + } + } + }, + "max_power_in": { + "codec": { + "name": "SYSFS", + "attrs": { + "path": "/sys/bus/i2c/devices/26-0058/hwmon/*/power1_max" + } + }, + "post_fmtter": { + "name": "TO_INT" + }, + "post": { + "name": "DIVISION", + "attrs": { + "divisor": 1000000 + } + } + }, + "max_power_out": { + "codec": { + "name": "SYSFS", + "attrs": { + "path": "/sys/bus/i2c/devices/26-0058/hwmon/*/power2_max" + } + }, + "post_fmtter": { + "name": "TO_INT" + }, + "post": { + "name": "DIVISION", + "attrs": { + "divisor": 1000000 + } + } + }, + "v_in": { + "codec": { + "name": "SYSFS", + "attrs": { + "path": "/sys/bus/i2c/devices/26-0058/hwmon/*/in1_input" + } + }, + "post_fmtter": { + "name": "TO_INT" + }, + "post": { + "name": "DIVISION", + "attrs": { + "divisor": 1000 + } + } + }, + "v_in_h_thd": {}, + "v_in_l_thd": {}, + "i_in": { + "codec": { + "name": "SYSFS", + "attrs": { + "path": "/sys/bus/i2c/devices/26-0058/hwmon/*/curr1_input" + } + }, + "post_fmtter": { + "name": "TO_INT" + }, + "post": { + "name": "DIVISION", + "attrs": { + "divisor": 1000 + } + } + }, + "i_in_h_thd": { + "codec": { + "name": "SYSFS", + "attrs": { + "path": "/sys/bus/i2c/devices/26-0058/hwmon/*/curr1_max" + } + }, + "post_fmtter": { + "name": "TO_INT" + }, + "post": { + "name": "DIVISION", + "attrs": { + "divisor": 1000 + } + } + }, + "i_in_l_thd": {}, + "v_out": { + "codec": { + "name": "SYSFS", + "attrs": { + "path": "/sys/bus/i2c/devices/26-0058/hwmon/*/in2_input" + } + }, + "post_fmtter": { + "name": "TO_INT" + }, + "post": { + "name": "DIVISION", + "attrs": { + "divisor": 1000 + } + } + }, + "v_out_h_thd": { + "codec": { + "name": "SYSFS", + "attrs": { + "path": "/sys/bus/i2c/devices/26-0058/hwmon/*/in2_crit" + } + }, + "post_fmtter": { + "name": "TO_INT" + }, + "post": { + "name": "DIVISION", + "attrs": { + "divisor": 1000 + } + } + }, + "v_out_l_thd": {}, + "i_out": { + "codec": { + "name": "SYSFS", + "attrs": { + "path": "/sys/bus/i2c/devices/26-0058/hwmon/*/curr2_input" + } + }, + "post_fmtter": { + "name": "TO_INT" + }, + "post": { + "name": "DIVISION", + "attrs": { + "divisor": 1000 + } + } + }, + "i_out_h_thd": { + "codec": { + "name": "SYSFS", + "attrs": { + "path": "/sys/bus/i2c/devices/26-0058/hwmon/*/curr2_max" + } + }, + "post_fmtter": { + "name": "TO_INT" + }, + "post": { + "name": "DIVISION", + "attrs": { + "divisor": 1000 + } + } + }, + "i_out_l_thd": {}, + "temp": { + "codec": { + "name": "SYSFS", + "attrs": { + "path": "/sys/bus/i2c/devices/26-0058/hwmon/*/temp1_input" + } + }, + "post_fmtter": { + "name": "TO_INT" + }, + "post": { + "name": "DIVISION", + "attrs": { + "divisor": 1000 + } + } + }, + "temp_h_thd": { + "codec": { + "name": "SYSFS", + "attrs": { + "path": "/sys/bus/i2c/devices/26-0058/hwmon/*/temp1_max" + } + }, + "post_fmtter": { + "name": "TO_INT" + }, + "post": { + "name": "DIVISION", + "attrs": { + "divisor": 1000 + } + } + }, + "temp_l_thd": {}, + "power_in": { + "codec": { + "name": "SYSFS", + "attrs": { + "path": "/sys/bus/i2c/devices/26-0058/hwmon/*/power1_input" + } + }, + "post_fmtter": { + "name": "TO_INT" + }, + "post": { + "name": "DIVISION", + "attrs": { + "divisor": 1000000 + } + } + }, + "power_out": { + "codec": { + "name": "SYSFS", + "attrs": { + "path": "/sys/bus/i2c/devices/26-0058/hwmon/*/power2_input" + } + }, + "post_fmtter": { + "name": "TO_INT" + }, + "post": { + "name": "DIVISION", + "attrs": { + "divisor": 1000000 + } + } + }, + "sn": { + "codec": { + "name": "SYSFS", + "attrs": { + "path": "/sys/bus/i2c/devices/26-0050/psu_sn" + } + } + }, + "pn": { + "codec": { + "name": "SYSFS", + "attrs": { + "path": "/sys/bus/i2c/devices/26-0050/psu_type" + } + } + }, + "revision": { + "codec": { + "name": "SYSFS", + "attrs": { + "path": "/sys/bus/i2c/devices/26-0050/psu_hw" + } + } + }, + "led": {}, + "supp": { + "codec": { + "name": "SYSFS", + "attrs": { + "path": "/sys/bus/i2c/devices/26-0050/psu_type" + } + }, + "post": { + "name": "MATCH_LIST", + "attrs": { + "cmpitem": "ALLOW-PSU-TYPES" + } + } + } + }, + "PSU-FAN-1": { + "presence": { + "codec": { + "name": "IO", + "attrs": { + "offset": "0xb27", + "size": "1" + } + }, + "post": { + "name": "CMP", + "attrs": { + "cmpval": 0, + "mask": "0x01" + } + } + }, + "status": { + "codec": { + "name": "SYSFS", + "attrs": { + "path": "/sys/bus/i2c/devices/23-0058/hwmon/*/fan1_input" + } + }, + "post": { + "name": "CMP", + "attrs": { + "cmpval": 0, + "opt": "GT" + } + } + }, + "speed_rpm": { + "default": 0, + "codec": { + "name": "SYSFS", + "attrs": { + "path": "/sys/bus/i2c/devices/23-0058/hwmon/*/fan1_input" + } + }, + "post_fmtter": { + "name": "TO_INT" + } + }, + "speed_rpm_h_thd": "MAX_PSU_FAN_SPEED", + "speed_rpm_l_thd": "MIN_PSU_FAN_SPEED", + "speed": { + "default": 0, + "codec": { + "name": "SYSFS", + "attrs": { + "path": "/sys/bus/i2c/devices/23-0058/hwmon/*/fan1_input" + } + }, + "post_fmtter": { + "name": "TO_INT" + }, + "post": { + "name": "PROPORTION", + "attrs": { + "denomi": "MAX_PSU_FAN_SPEED" + } + } + }, + "direction": { + "codec": { + "name": "SYSFS", + "attrs": { + "path": "/sys/bus/i2c/devices/23-0050/psu_type" + } + }, + "post": { + "name": "MATCH_DICT", + "attrs": { + "cmpitem": "ALLOW-PSU-TYPES" + } + } + } + }, + "PSU-FAN-2": { + "presence": { + "codec": { + "name": "IO", + "attrs": { + "offset": "0xb28", + "size": 1 + } + }, + "post": { + "name": "CMP", + "attrs": { + "cmpval": 0, + "mask": "0x01" + } + } + }, + "status": { + "codec": { + "name": "SYSFS", + "attrs": { + "path": "/sys/bus/i2c/devices/25-0058/hwmon/*/fan1_input" + } + }, + "post": { + "name": "CMP", + "attrs": { + "cmpval": 0, + "opt": "GT" + } + } + }, + "speed_rpm": { + "default": 0, + "codec": { + "name": "SYSFS", + "attrs": { + "path": "/sys/bus/i2c/devices/25-0058/hwmon/*/fan1_input" + } + }, + "post_fmtter": { + "name": "TO_INT" + } + }, + "speed_rpm_h_thd": "MAX_PSU_FAN_SPEED", + "speed_rpm_l_thd": "MIN_PSU_FAN_SPEED", + "speed": { + "default": 0, + "codec": { + "name": "SYSFS", + "attrs": { + "path": "/sys/bus/i2c/devices/25-0058/hwmon/*/fan1_input" + } + }, + "post_fmtter": { + "name": "TO_INT" + }, + "post": { + "name": "PROPORTION", + "attrs": { + "denomi": "MAX_PSU_FAN_SPEED" + } + } + }, + "direction": { + "codec": { + "name": "SYSFS", + "attrs": { + "path": "/sys/bus/i2c/devices/25-0050/psu_type" + } + }, + "post": { + "name": "MATCH_DICT", + "attrs": { + "cmpitem": "ALLOW-PSU-TYPES" + } + } + } + }, + "PSU-FAN-3": { + "presence": { + "codec": { + "name": "IO", + "attrs": { + "offset": "0xb29", + "size": 1 + } + }, + "post": { + "name": "CMP", + "attrs": { + "cmpval": 0, + "mask": "0x01" + } + } + }, + "status": { + "codec": { + "name": "SYSFS", + "attrs": { + "path": "/sys/bus/i2c/devices/24-0058/hwmon/*/fan1_input" + } + }, + "post": { + "name": "CMP", + "attrs": { + "cmpval": 0, + "opt": "GT" + } + } + }, + "speed_rpm": { + "default": 0, + "codec": { + "name": "SYSFS", + "attrs": { + "path": "/sys/bus/i2c/devices/24-0058/hwmon/*/fan1_input" + } + }, + "post_fmtter": { + "name": "TO_INT" + } + }, + "speed_rpm_h_thd": "MAX_PSU_FAN_SPEED", + "speed_rpm_l_thd": "MIN_PSU_FAN_SPEED", + "speed": { + "default": 0, + "codec": { + "name": "SYSFS", + "attrs": { + "path": "/sys/bus/i2c/devices/24-0058/hwmon/*/fan1_input" + } + }, + "post_fmtter": { + "name": "TO_INT" + }, + "post": { + "name": "PROPORTION", + "attrs": { + "denomi": "MAX_PSU_FAN_SPEED" + } + } + }, + "direction": { + "codec": { + "name": "SYSFS", + "attrs": { + "path": "/sys/bus/i2c/devices/24-0050/psu_type" + } + }, + "post": { + "name": "MATCH_DICT", + "attrs": { + "cmpitem": "ALLOW-PSU-TYPES" + } + } + } + }, + "PSU-FAN-4": { + "presence": { + "codec": { + "name": "IO", + "attrs": { + "offset": "0xb2a", + "size": 1 + } + }, + "post": { + "name": "CMP", + "attrs": { + "cmpval": 0, + "mask": "0x01" + } + } + }, + "status": { + "codec": { + "name": "SYSFS", + "attrs": { + "path": "/sys/bus/i2c/devices/26-0058/hwmon/*/fan1_input" + } + }, + "post": { + "name": "CMP", + "attrs": { + "cmpval": 0, + "opt": "GT" + } + } + }, + "speed_rpm": { + "default": 0, + "codec": { + "name": "SYSFS", + "attrs": { + "path": "/sys/bus/i2c/devices/26-0058/hwmon/*/fan1_input" + } + }, + "post_fmtter": { + "name": "TO_INT" + } + }, + "speed_rpm_h_thd": "MAX_PSU_FAN_SPEED", + "speed_rpm_l_thd": "MIN_PSU_FAN_SPEED", + "speed": { + "default": 0, + "codec": { + "name": "SYSFS", + "attrs": { + "path": "/sys/bus/i2c/devices/26-0058/hwmon/*/fan1_input" + } + }, + "post_fmtter": { + "name": "TO_INT" + }, + "post": { + "name": "PROPORTION", + "attrs": { + "denomi": "MAX_PSU_FAN_SPEED" + } + } + }, + "direction": { + "codec": { + "name": "SYSFS", + "attrs": { + "path": "/sys/bus/i2c/devices/26-0050/psu_type" + } + }, + "post": { + "name": "MATCH_DICT", + "attrs": { + "cmpitem": "ALLOW-PSU-TYPES" + } + } + } + }, + "FAN-DRAWER-1": { + "fans": ["FAN-1", "FAN-2"], + "presence": { + "codec": { + "name": "SYSFS", + "attrs": { + "path": "/sys/bus/i2c/devices/14-000d/fan_present" + } + }, + "post": { + "name": "CMP", + "attrs": { + "cmpval": 0, + "mask": "0x01" + } + } + }, + "status": { + "codec": { + "name": "SYSFS", + "attrs": { + "path": "/sys/bus/i2c/devices/14-000d/fan_status1" + } + }, + "post": { + "name": "CMP", + "attrs": { + "cmpval": "0x01", + "mask": "0x01" + } + } + }, + "pn": { + "codec": { + "name": "SYSFS", + "attrs": { + "path": "/sys/bus/i2c/devices/63-0050/eeprom" + } + }, + "post_fmtter": { + "name": "FRU", + "attrs": { + "field": "PD.PN" + } + } + }, + "sn": { + "codec": { + "name": "SYSFS", + "attrs": { + "path": "/sys/bus/i2c/devices/63-0050/eeprom" + } + }, + "post_fmtter": { + "name": "FRU", + "attrs": { + "field": "PD.SN" + } + } + }, + "direction": { + "codec": { + "name": "SYSFS", + "attrs": { + "path": "/sys/bus/i2c/devices/63-0050/eeprom" + } + }, + "post_fmtter": { + "name": "FRU", + "attrs": { + "field": "PD.NAME" + } + }, + "post": { + "name": "MATCH_DICT", + "attrs": { + "cmpitem": "ALLOW-FAN-TYPES" + } + } + }, + "led": { + "codec": { + "name": "SYSFS", + "attrs": { + "path": "/sys/bus/i2c/devices/14-000d/fan1_led" + } + }, + "post_fmtter": { + "name": "TO_INT", + "attrs": { + "base": 16 + } + }, + "post": { + "name": "LED", + "attrs": { + "led_type": "Type1" + } + } + }, + "supp": { + "codec": { + "name": "SYSFS", + "attrs": { + "path": "/sys/bus/i2c/devices/63-0050/eeprom" + } + }, + "post_fmtter": { + "name": "FRU", + "attrs": { + "field": "PD.NAME" + } + }, + "post": { + "name": "MATCH_LIST", + "attrs": { + "cmpitem": "ALLOW-FAN-TYPES" + } + } + }, + "hw_ver": { + "codec": { + "name": "SYSFS", + "attrs": { + "path": "/sys/bus/i2c/devices/63-0050/eeprom" + } + }, + "post_fmtter": { + "name": "FRU", + "attrs": { + "field": "PD.VERSION" + } + } + } + }, + "FAN-DRAWER-2": { + "fans": ["FAN-3", "FAN-4"], + "presence": { + "codec": { + "name": "SYSFS", + "attrs": { + "path": "/sys/bus/i2c/devices/13-000d/fan_present" + } + }, + "post": { + "name": "CMP", + "attrs": { + "cmpval": 0, + "mask": "0x01" + } + } + }, + "status": { + "codec": { + "name": "SYSFS", + "attrs": { + "path": "/sys/bus/i2c/devices/13-000d/fan_status1" + } + }, + "post": { + "name": "CMP", + "attrs": { + "cmpval": "0x01", + "mask": "0x01" + } + } + }, + "pn": { + "codec": { + "name": "SYSFS", + "attrs": { + "path": "/sys/bus/i2c/devices/55-0050/eeprom" + } + }, + "post_fmtter": { + "name": "FRU", + "attrs": { + "field": "PD.PN" + } + } + }, + "sn": { + "codec": { + "name": "SYSFS", + "attrs": { + "path": "/sys/bus/i2c/devices/55-0050/eeprom" + } + }, + "post_fmtter": { + "name": "FRU", + "attrs": { + "field": "PD.SN" + } + } + }, + "direction": { + "codec": { + "name": "SYSFS", + "attrs": { + "path": "/sys/bus/i2c/devices/55-0050/eeprom" + } + }, + "post_fmtter": { + "name": "FRU", + "attrs": { + "field": "PD.NAME" + } + }, + "post": { + "name": "MATCH_DICT", + "attrs": { + "cmpitem": "ALLOW-FAN-TYPES" + } + } + }, + "led": { + "codec": { + "name": "SYSFS", + "attrs": { + "path": "/sys/bus/i2c/devices/13-000d/fan2_led" + } + }, + "post_fmtter": { + "name": "TO_INT", + "attrs": { + "base": 16 + } + }, + "post": { + "name": "LED", + "attrs": { + "led_type": "Type1" + } + } + }, + "supp": { + "codec": { + "name": "SYSFS", + "attrs": { + "path": "/sys/bus/i2c/devices/55-0050/eeprom" + } + }, + "post_fmtter": { + "name": "FRU", + "attrs": { + "field": "PD.NAME" + } + }, + "post": { + "name": "MATCH_LIST", + "attrs": { + "cmpitem": "ALLOW-FAN-TYPES" + } + } + }, + "hw_ver": { + "codec": { + "name": "SYSFS", + "attrs": { + "path": "/sys/bus/i2c/devices/55-0050/eeprom" + } + }, + "post_fmtter": { + "name": "FRU", + "attrs": { + "field": "PD.VERSION" + } + } + } + }, + "FAN-DRAWER-3": { + "fans": ["FAN-5", "FAN-6"], + "presence": { + "codec": { + "name": "SYSFS", + "attrs": { + "path": "/sys/bus/i2c/devices/14-000d/fan_present" + } + }, + "post": { + "name": "CMP", + "attrs": { + "cmpval": 0, + "mask": "0x02" + } + } + }, + "status": { + "codec": { + "name": "SYSFS", + "attrs": { + "path": "/sys/bus/i2c/devices/14-000d/fan_status1" + } + }, + "post": { + "name": "CMP", + "attrs": { + "cmpval": "0x02", + "mask": "0x02" + } + } + }, + "pn": { + "codec": { + "name": "SYSFS", + "attrs": { + "path": "/sys/bus/i2c/devices/64-0050/eeprom" + } + }, + "post_fmtter": { + "name": "FRU", + "attrs": { + "field": "PD.PN" + } + } + }, + "sn": { + "codec": { + "name": "SYSFS", + "attrs": { + "path": "/sys/bus/i2c/devices/64-0050/eeprom" + } + }, + "post_fmtter": { + "name": "FRU", + "attrs": { + "field": "PD.SN" + } + } + }, + "direction": { + "codec": { + "name": "SYSFS", + "attrs": { + "path": "/sys/bus/i2c/devices/64-0050/eeprom" + } + }, + "post_fmtter": { + "name": "FRU", + "attrs": { + "field": "PD.NAME" + } + }, + "post": { + "name": "MATCH_DICT", + "attrs": { + "cmpitem": "ALLOW-FAN-TYPES" + } + } + }, + "led": { + "codec": { + "name": "SYSFS", + "attrs": { + "path": "/sys/bus/i2c/devices/14-000d/fan3_led" + } + }, + "post_fmtter": { + "name": "TO_INT", + "attrs": { + "base": 16 + } + }, + "post": { + "name": "LED", + "attrs": { + "led_type": "Type1" + } + } + }, + "supp": { + "codec": { + "name": "SYSFS", + "attrs": { + "path": "/sys/bus/i2c/devices/64-0050/eeprom" + } + }, + "post_fmtter": { + "name": "FRU", + "attrs": { + "field": "PD.NAME" + } + }, + "post": { + "name": "MATCH_LIST", + "attrs": { + "cmpitem": "ALLOW-FAN-TYPES" + } + } + }, + "hw_ver": { + "codec": { + "name": "SYSFS", + "attrs": { + "path": "/sys/bus/i2c/devices/64-0050/eeprom" + } + }, + "post_fmtter": { + "name": "FRU", + "attrs": { + "field": "PD.VERSION" + } + } + } + }, + "FAN-DRAWER-4": { + "fans": ["FAN-7", "FAN-8"], + "presence": { + "codec": { + "name": "SYSFS", + "attrs": { + "path": "/sys/bus/i2c/devices/13-000d/fan_present" + } + }, + "post": { + "name": "CMP", + "attrs": { + "cmpval": 0, + "mask": "0x02" + } + } + }, + "status": { + "codec": { + "name": "SYSFS", + "attrs": { + "path": "/sys/bus/i2c/devices/13-000d/fan_status1" + } + }, + "post": { + "name": "CMP", + "attrs": { + "cmpval": "0x02", + "mask": "0x02" + } + } + }, + "pn": { + "codec": { + "name": "SYSFS", + "attrs": { + "path": "/sys/bus/i2c/devices/56-0050/eeprom" + } + }, + "post_fmtter": { + "name": "FRU", + "attrs": { + "field": "PD.PN" + } + } + }, + "sn": { + "codec": { + "name": "SYSFS", + "attrs": { + "path": "/sys/bus/i2c/devices/56-0050/eeprom" + } + }, + "post_fmtter": { + "name": "FRU", + "attrs": { + "field": "PD.SN" + } + } + }, + "direction": { + "codec": { + "name": "SYSFS", + "attrs": { + "path": "/sys/bus/i2c/devices/56-0050/eeprom" + } + }, + "post_fmtter": { + "name": "FRU", + "attrs": { + "field": "PD.NAME" + } + }, + "post": { + "name": "MATCH_DICT", + "attrs": { + "cmpitem": "ALLOW-FAN-TYPES" + } + } + }, + "led": { + "codec": { + "name": "SYSFS", + "attrs": { + "path": "/sys/bus/i2c/devices/13-000d/fan4_led" + } + }, + "post_fmtter": { + "name": "TO_INT", + "attrs": { + "base": 16 + } + }, + "post": { + "name": "LED", + "attrs": { + "led_type": "Type1" + } + } + }, + "supp": { + "codec": { + "name": "SYSFS", + "attrs": { + "path": "/sys/bus/i2c/devices/56-0050/eeprom" + } + }, + "post_fmtter": { + "name": "FRU", + "attrs": { + "field": "PD.NAME" + } + }, + "post": { + "name": "MATCH_LIST", + "attrs": { + "cmpitem": "ALLOW-FAN-TYPES" + } + } + }, + "hw_ver": { + "codec": { + "name": "SYSFS", + "attrs": { + "path": "/sys/bus/i2c/devices/56-0050/eeprom" + } + }, + "post_fmtter": { + "name": "FRU", + "attrs": { + "field": "PD.VERSION" + } + } + } + }, + "FAN-DRAWER-5": { + "fans": ["FAN-9", "FAN-10"], + "presence": { + "codec": { + "name": "SYSFS", + "attrs": { + "path": "/sys/bus/i2c/devices/14-000d/fan_present" + } + }, + "post": { + "name": "CMP", + "attrs": { + "cmpval": 0, + "mask": "0x04" + } + } + }, + "status": { + "codec": { + "name": "SYSFS", + "attrs": { + "path": "/sys/bus/i2c/devices/14-000d/fan_status1" + } + }, + "post": { + "name": "CMP", + "attrs": { + "cmpval": "0x04", + "mask": "0x04" + } + } + }, + "pn": { + "codec": { + "name": "SYSFS", + "attrs": { + "path": "/sys/bus/i2c/devices/65-0050/eeprom" + } + }, + "post_fmtter": { + "name": "FRU", + "attrs": { + "field": "PD.PN" + } + } + }, + "sn": { + "codec": { + "name": "SYSFS", + "attrs": { + "path": "/sys/bus/i2c/devices/65-0050/eeprom" + } + }, + "post_fmtter": { + "name": "FRU", + "attrs": { + "field": "PD.SN" + } + } + }, + "direction": { + "codec": { + "name": "SYSFS", + "attrs": { + "path": "/sys/bus/i2c/devices/65-0050/eeprom" + } + }, + "post_fmtter": { + "name": "FRU", + "attrs": { + "field": "PD.NAME" + } + }, + "post": { + "name": "MATCH_DICT", + "attrs": { + "cmpitem": "ALLOW-FAN-TYPES" + } + } + }, + "led": { + "codec": { + "name": "SYSFS", + "attrs": { + "path": "/sys/bus/i2c/devices/14-000d/fan5_led" + } + }, + "post_fmtter": { + "name": "TO_INT", + "attrs": { + "base": 16 + } + }, + "post": { + "name": "LED", + "attrs": { + "led_type": "Type1" + } + } + }, + "supp": { + "codec": { + "name": "SYSFS", + "attrs": { + "path": "/sys/bus/i2c/devices/65-0050/eeprom" + } + }, + "post_fmtter": { + "name": "FRU", + "attrs": { + "field": "PD.NAME" + } + }, + "post": { + "name": "MATCH_LIST", + "attrs": { + "cmpitem": "ALLOW-FAN-TYPES" + } + } + }, + "hw_ver": { + "codec": { + "name": "SYSFS", + "attrs": { + "path": "/sys/bus/i2c/devices/65-0050/eeprom" + } + }, + "post_fmtter": { + "name": "FRU", + "attrs": { + "field": "PD.VERSION" + } + } + } + }, + "FAN-DRAWER-6": { + "fans": ["FAN-11", "FAN-12"], + "presence": { + "codec": { + "name": "SYSFS", + "attrs": { + "path": "/sys/bus/i2c/devices/13-000d/fan_present" + } + }, + "post": { + "name": "CMP", + "attrs": { + "cmpval": 0, + "mask": "0x04" + } + } + }, + "status": { + "codec": { + "name": "SYSFS", + "attrs": { + "path": "/sys/bus/i2c/devices/13-000d/fan_status1" + } + }, + "post": { + "name": "CMP", + "attrs": { + "cmpval": "0x04", + "mask": "0x04" + } + } + }, + "pn": { + "codec": { + "name": "SYSFS", + "attrs": { + "path": "/sys/bus/i2c/devices/57-0050/eeprom" + } + }, + "post_fmtter": { + "name": "FRU", + "attrs": { + "field": "PD.PN" + } + } + }, + "sn": { + "codec": { + "name": "SYSFS", + "attrs": { + "path": "/sys/bus/i2c/devices/57-0050/eeprom" + } + }, + "post_fmtter": { + "name": "FRU", + "attrs": { + "field": "PD.SN" + } + } + }, + "direction": { + "codec": { + "name": "SYSFS", + "attrs": { + "path": "/sys/bus/i2c/devices/57-0050/eeprom" + } + }, + "post_fmtter": { + "name": "FRU", + "attrs": { + "field": "PD.NAME" + } + }, + "post": { + "name": "MATCH_DICT", + "attrs": { + "cmpitem": "ALLOW-FAN-TYPES" + } + } + }, + "led": { + "codec": { + "name": "SYSFS", + "attrs": { + "path": "/sys/bus/i2c/devices/13-000d/fan6_led" + } + }, + "post_fmtter": { + "name": "TO_INT", + "attrs": { + "base": 16 + } + }, + "post": { + "name": "LED", + "attrs": { + "led_type": "Type1" + } + } + }, + "supp": { + "codec": { + "name": "SYSFS", + "attrs": { + "path": "/sys/bus/i2c/devices/57-0050/eeprom" + } + }, + "post_fmtter": { + "name": "FRU", + "attrs": { + "field": "PD.NAME" + } + }, + "post": { + "name": "MATCH_LIST", + "attrs": { + "cmpitem": "ALLOW-FAN-TYPES" + } + } + }, + "hw_ver": { + "codec": { + "name": "SYSFS", + "attrs": { + "path": "/sys/bus/i2c/devices/57-0050/eeprom" + } + }, + "post_fmtter": { + "name": "FRU", + "attrs": { + "field": "PD.VERSION" + } + } + } + }, + "FAN-1": { + "speed_rpm": { + "default": 0, + "codec": { + "name": "SYSFS", + "attrs": { + "path": "/sys/bus/i2c/devices/14-000d/fan1_1_real_speed" + } + }, + "post_fmtter": { + "name": "TO_INT" + } + }, + "speed_rpm_h_thd": "MAX_FAN_SPEED", + "speed_rpm_l_thd": "MIN_FAN_SPEED", + "speed": { + "default": 0, + "codec": { + "name": "SYSFS", + "attrs": { + "path": "/sys/bus/i2c/devices/14-000d/fan1_1_real_speed" + } + }, + "post_fmtter": { + "name": "TO_INT" + }, + "post": { + "name": "PROPORTION", + "attrs": { + "denomi": "MAX_FAN_SPEED" + } + } + }, + "pwm": { + "ro": false, + "pre": { + "name": "PROPORTION", + "attrs": { + "denomi": 100, + "total": 255 + } + }, + "pre_fmtter": { + "name": "TO_STR", + "attrs": { + "base": 16 + } + }, + "codec": { + "name": "SYSFS", + "attrs": { + "path": "/sys/bus/i2c/devices/14-000d/fan1_speed_set" + } + }, + "post": { + "name": "PROPORTION", + "attrs": { + "denomi": 255, + "total": 100 + } + }, + "post_fmtter": { + "name": "TO_INT", + "attrs": { + "base": 16 + } + } + }, + "tolerance": 30 + }, + "FAN-2": { + "speed_rpm": { + "default": 0, + "codec": { + "name": "SYSFS", + "attrs": { + "path": "/sys/bus/i2c/devices/14-000d/fan1_2_real_speed" + } + }, + "post_fmtter": { + "name": "TO_INT" + } + }, + "speed_rpm_h_thd": "MAX_FAN_SPEED", + "speed_rpm_l_thd": "MIN_FAN_SPEED", + "speed": { + "default": 0, + "codec": { + "name": "SYSFS", + "attrs": { + "path": "/sys/bus/i2c/devices/14-000d/fan1_2_real_speed" + } + }, + "post_fmtter": { + "name": "TO_INT" + }, + "post": { + "name": "PROPORTION", + "attrs": { + "denomi": "MAX_FAN_SPEED" + } + } + }, + "pwm": { + "ro": false, + "pre": { + "name": "PROPORTION", + "attrs": { + "denomi": 100, + "total": 255 + } + }, + "pre_fmtter": { + "name": "TO_STR", + "attrs": { + "base": 16 + } + }, + "codec": { + "name": "SYSFS", + "attrs": { + "path": "/sys/bus/i2c/devices/14-000d/fan1_speed_set" + } + }, + "post": { + "name": "PROPORTION", + "attrs": { + "denomi": 255, + "total": 100 + } + }, + "post_fmtter": { + "name": "TO_INT", + "attrs": { + "base": 16 + } + } + }, + "tolerance": 30 + }, + "FAN-3": { + "speed_rpm": { + "default": 0, + "codec": { + "name": "SYSFS", + "attrs": { + "path": "/sys/bus/i2c/devices/13-000d/fan2_1_real_speed" + } + }, + "post_fmtter": { + "name": "TO_INT" + } + }, + "speed_rpm_h_thd": "MAX_FAN_SPEED", + "speed_rpm_l_thd": "MIN_FAN_SPEED", + "speed": { + "default": 0, + "codec": { + "name": "SYSFS", + "attrs": { + "path": "/sys/bus/i2c/devices/13-000d/fan2_1_real_speed" + } + }, + "post_fmtter": { + "name": "TO_INT" + }, + "post": { + "name": "PROPORTION", + "attrs": { + "denomi": "MAX_FAN_SPEED" + } + } + }, + "pwm": { + "ro": false, + "pre": { + "name": "PROPORTION", + "attrs": { + "denomi": 100, + "total": 255 + } + }, + "pre_fmtter": { + "name": "TO_STR", + "attrs": { + "base": 16 + } + }, + "codec": { + "name": "SYSFS", + "attrs": { + "path": "/sys/bus/i2c/devices/13-000d/fan2_speed_set" + } + }, + "post": { + "name": "PROPORTION", + "attrs": { + "denomi": 255, + "total": 100 + } + }, + "post_fmtter": { + "name": "TO_INT", + "attrs": { + "base": 16 + } + } + }, + "tolerance": 30 + }, + "FAN-4": { + "speed_rpm": { + "default": 0, + "codec": { + "name": "SYSFS", + "attrs": { + "path": "/sys/bus/i2c/devices/13-000d/fan2_2_real_speed" + } + }, + "post_fmtter": { + "name": "TO_INT" + } + }, + "speed_rpm_h_thd": "MAX_FAN_SPEED", + "speed_rpm_l_thd": "MIN_FAN_SPEED", + "speed": { + "default": 0, + "codec": { + "name": "SYSFS", + "attrs": { + "path": "/sys/bus/i2c/devices/13-000d/fan2_2_real_speed" + } + }, + "post_fmtter": { + "name": "TO_INT" + }, + "post": { + "name": "PROPORTION", + "attrs": { + "denomi": "MAX_FAN_SPEED" + } + } + }, + "pwm": { + "ro": false, + "pre": { + "name": "PROPORTION", + "attrs": { + "denomi": 100, + "total": 255 + } + }, + "pre_fmtter": { + "name": "TO_STR", + "attrs": { + "base": 16 + } + }, + "codec": { + "name": "SYSFS", + "attrs": { + "path": "/sys/bus/i2c/devices/13-000d/fan2_speed_set" + } + }, + "post": { + "name": "PROPORTION", + "attrs": { + "denomi": 255, + "total": 100 + } + }, + "post_fmtter": { + "name": "TO_INT", + "attrs": { + "base": 16 + } + } + }, + "tolerance": 30 + }, + "FAN-5": { + "speed_rpm": { + "default": 0, + "codec": { + "name": "SYSFS", + "attrs": { + "path": "/sys/bus/i2c/devices/14-000d/fan3_1_real_speed" + } + }, + "post_fmtter": { + "name": "TO_INT" + } + }, + "speed_rpm_h_thd": "MAX_FAN_SPEED", + "speed_rpm_l_thd": "MIN_FAN_SPEED", + "speed": { + "default": 0, + "codec": { + "name": "SYSFS", + "attrs": { + "path": "/sys/bus/i2c/devices/14-000d/fan3_1_real_speed" + } + }, + "post_fmtter": { + "name": "TO_INT" + }, + "post": { + "name": "PROPORTION", + "attrs": { + "denomi": "MAX_FAN_SPEED" + } + } + }, + "pwm": { + "ro": false, + "pre": { + "name": "PROPORTION", + "attrs": { + "denomi": 100, + "total": 255 + } + }, + "pre_fmtter": { + "name": "TO_STR", + "attrs": { + "base": 16 + } + }, + "codec": { + "name": "SYSFS", + "attrs": { + "path": "/sys/bus/i2c/devices/14-000d/fan3_speed_set" + } + }, + "post": { + "name": "PROPORTION", + "attrs": { + "denomi": 255, + "total": 100 + } + }, + "post_fmtter": { + "name": "TO_INT", + "attrs": { + "base": 16 + } + } + }, + "tolerance": 30 + }, + "FAN-6": { + "speed_rpm": { + "default": 0, + "codec": { + "name": "SYSFS", + "attrs": { + "path": "/sys/bus/i2c/devices/14-000d/fan3_2_real_speed" + } + }, + "post_fmtter": { + "name": "TO_INT" + } + }, + "speed_rpm_h_thd": "MAX_FAN_SPEED", + "speed_rpm_l_thd": "MIN_FAN_SPEED", + "speed": { + "default": 0, + "codec": { + "name": "SYSFS", + "attrs": { + "path": "/sys/bus/i2c/devices/14-000d/fan3_2_real_speed" + } + }, + "post_fmtter": { + "name": "TO_INT" + }, + "post": { + "name": "PROPORTION", + "attrs": { + "denomi": "MAX_FAN_SPEED" + } + } + }, + "pwm": { + "ro": false, + "pre": { + "name": "PROPORTION", + "attrs": { + "denomi": 100, + "total": 255 + } + }, + "pre_fmtter": { + "name": "TO_STR", + "attrs": { + "base": 16 + } + }, + "codec": { + "name": "SYSFS", + "attrs": { + "path": "/sys/bus/i2c/devices/14-000d/fan3_speed_set" + } + }, + "post": { + "name": "PROPORTION", + "attrs": { + "denomi": 255, + "total": 100 + } + }, + "post_fmtter": { + "name": "TO_INT", + "attrs": { + "base": 16 + } + } + }, + "tolerance": 30 + }, + "FAN-7": { + "speed_rpm": { + "default": 0, + "codec": { + "name": "SYSFS", + "attrs": { + "path": "/sys/bus/i2c/devices/13-000d/fan4_1_real_speed" + } + }, + "post_fmtter": { + "name": "TO_INT" + } + }, + "speed_rpm_h_thd": "MAX_FAN_SPEED", + "speed_rpm_l_thd": "MIN_FAN_SPEED", + "speed": { + "default": 0, + "codec": { + "name": "SYSFS", + "attrs": { + "path": "/sys/bus/i2c/devices/13-000d/fan4_1_real_speed" + } + }, + "post_fmtter": { + "name": "TO_INT" + }, + "post": { + "name": "PROPORTION", + "attrs": { + "denomi": "MAX_FAN_SPEED" + } + } + }, + "pwm": { + "ro": false, + "pre": { + "name": "PROPORTION", + "attrs": { + "denomi": 100, + "total": 255 + } + }, + "pre_fmtter": { + "name": "TO_STR", + "attrs": { + "base": 16 + } + }, + "codec": { + "name": "SYSFS", + "attrs": { + "path": "/sys/bus/i2c/devices/13-000d/fan4_speed_set" + } + }, + "post": { + "name": "PROPORTION", + "attrs": { + "denomi": 255, + "total": 100 + } + }, + "post_fmtter": { + "name": "TO_INT", + "attrs": { + "base": 16 + } + } + }, + "tolerance": 30 + }, + "FAN-8": { + "speed_rpm": { + "default": 0, + "codec": { + "name": "SYSFS", + "attrs": { + "path": "/sys/bus/i2c/devices/13-000d/fan4_2_real_speed" + } + }, + "post_fmtter": { + "name": "TO_INT" + } + }, + "speed_rpm_h_thd": "MAX_FAN_SPEED", + "speed_rpm_l_thd": "MIN_FAN_SPEED", + "speed": { + "default": 0, + "codec": { + "name": "SYSFS", + "attrs": { + "path": "/sys/bus/i2c/devices/13-000d/fan4_2_real_speed" + } + }, + "post_fmtter": { + "name": "TO_INT" + }, + "post": { + "name": "PROPORTION", + "attrs": { + "denomi": "MAX_FAN_SPEED" + } + } + }, + "pwm": { + "ro": false, + "pre": { + "name": "PROPORTION", + "attrs": { + "denomi": 100, + "total": 255 + } + }, + "pre_fmtter": { + "name": "TO_STR", + "attrs": { + "base": 16 + } + }, + "codec": { + "name": "SYSFS", + "attrs": { + "path": "/sys/bus/i2c/devices/13-000d/fan4_speed_set" + } + }, + "post": { + "name": "PROPORTION", + "attrs": { + "denomi": 255, + "total": 100 + } + }, + "post_fmtter": { + "name": "TO_INT", + "attrs": { + "base": 16 + } + } + }, + "tolerance": 30 + }, + "FAN-9": { + "speed_rpm": { + "default": 0, + "codec": { + "name": "SYSFS", + "attrs": { + "path": "/sys/bus/i2c/devices/14-000d/fan5_1_real_speed" + } + }, + "post_fmtter": { + "name": "TO_INT" + } + }, + "speed_rpm_h_thd": "MAX_FAN_SPEED", + "speed_rpm_l_thd": "MIN_FAN_SPEED", + "speed": { + "default": 0, + "codec": { + "name": "SYSFS", + "attrs": { + "path": "/sys/bus/i2c/devices/14-000d/fan5_1_real_speed" + } + }, + "post_fmtter": { + "name": "TO_INT" + }, + "post": { + "name": "PROPORTION", + "attrs": { + "denomi": "MAX_FAN_SPEED" + } + } + }, + "pwm": { + "ro": false, + "pre": { + "name": "PROPORTION", + "attrs": { + "denomi": 100, + "total": 255 + } + }, + "pre_fmtter": { + "name": "TO_STR", + "attrs": { + "base": 16 + } + }, + "codec": { + "name": "SYSFS", + "attrs": { + "path": "/sys/bus/i2c/devices/14-000d/fan5_speed_set" + } + }, + "post": { + "name": "PROPORTION", + "attrs": { + "denomi": 255, + "total": 100 + } + }, + "post_fmtter": { + "name": "TO_INT", + "attrs": { + "base": 16 + } + } + }, + "tolerance": 30 + }, + "FAN-10": { + "speed_rpm": { + "default": 0, + "codec": { + "name": "SYSFS", + "attrs": { + "path": "/sys/bus/i2c/devices/14-000d/fan5_2_real_speed" + } + }, + "post_fmtter": { + "name": "TO_INT" + } + }, + "speed_rpm_h_thd": "MAX_FAN_SPEED", + "speed_rpm_l_thd": "MIN_FAN_SPEED", + "speed": { + "default": 0, + "codec": { + "name": "SYSFS", + "attrs": { + "path": "/sys/bus/i2c/devices/14-000d/fan5_2_real_speed" + } + }, + "post_fmtter": { + "name": "TO_INT" + }, + "post": { + "name": "PROPORTION", + "attrs": { + "denomi": "MAX_FAN_SPEED" + } + } + }, + "pwm": { + "ro": false, + "pre": { + "name": "PROPORTION", + "attrs": { + "denomi": 100, + "total": 255 + } + }, + "pre_fmtter": { + "name": "TO_STR", + "attrs": { + "base": 16 + } + }, + "codec": { + "name": "SYSFS", + "attrs": { + "path": "/sys/bus/i2c/devices/14-000d/fan5_speed_set" + } + }, + "post": { + "name": "PROPORTION", + "attrs": { + "denomi": 255, + "total": 100 + } + }, + "post_fmtter": { + "name": "TO_INT", + "attrs": { + "base": 16 + } + } + }, + "tolerance": 30 + }, + "FAN-11": { + "speed_rpm": { + "default": 0, + "codec": { + "name": "SYSFS", + "attrs": { + "path": "/sys/bus/i2c/devices/13-000d/fan6_1_real_speed" + } + }, + "post_fmtter": { + "name": "TO_INT" + } + }, + "speed_rpm_h_thd": "MAX_FAN_SPEED", + "speed_rpm_l_thd": "MIN_FAN_SPEED", + "speed": { + "default": 0, + "codec": { + "name": "SYSFS", + "attrs": { + "path": "/sys/bus/i2c/devices/13-000d/fan6_1_real_speed" + } + }, + "post_fmtter": { + "name": "TO_INT" + }, + "post": { + "name": "PROPORTION", + "attrs": { + "denomi": "MAX_FAN_SPEED" + } + } + }, + "pwm": { + "ro": false, + "pre": { + "name": "PROPORTION", + "attrs": { + "denomi": 100, + "total": 255 + } + }, + "pre_fmtter": { + "name": "TO_STR", + "attrs": { + "base": 16 + } + }, + "codec": { + "name": "SYSFS", + "attrs": { + "path": "/sys/bus/i2c/devices/13-000d/fan6_speed_set" + } + }, + "post": { + "name": "PROPORTION", + "attrs": { + "denomi": 255, + "total": 100 + } + }, + "post_fmtter": { + "name": "TO_INT", + "attrs": { + "base": 16 + } + } + }, + "tolerance": 30 + }, + "FAN-12": { + "speed_rpm": { + "default": 0, + "codec": { + "name": "SYSFS", + "attrs": { + "path": "/sys/bus/i2c/devices/13-000d/fan6_2_real_speed" + } + }, + "post_fmtter": { + "name": "TO_INT" + } + }, + "speed_rpm_h_thd": "MAX_FAN_SPEED", + "speed_rpm_l_thd": "MIN_FAN_SPEED", + "speed": { + "default": 0, + "codec": { + "name": "SYSFS", + "attrs": { + "path": "/sys/bus/i2c/devices/13-000d/fan6_2_real_speed" + } + }, + "post_fmtter": { + "name": "TO_INT" + }, + "post": { + "name": "PROPORTION", + "attrs": { + "denomi": "MAX_FAN_SPEED" + } + } + }, + "pwm": { + "ro": false, + "pre": { + "name": "PROPORTION", + "attrs": { + "denomi": 100, + "total": 255 + } + }, + "pre_fmtter": { + "name": "TO_STR", + "attrs": { + "base": 16 + } + }, + "codec": { + "name": "SYSFS", + "attrs": { + "path": "/sys/bus/i2c/devices/13-000d/fan6_speed_set" + } + }, + "post": { + "name": "PROPORTION", + "attrs": { + "denomi": 255, + "total": 100 + } + }, + "post_fmtter": { + "name": "TO_INT", + "attrs": { + "base": 16 + } + } + }, + "tolerance": 30 + } +} diff --git a/device/ragile/x86_64-ragile_ra-b6920-4s-r0/installer.conf b/device/ragile/x86_64-ragile_ra-b6920-4s-r0/installer.conf new file mode 100644 index 0000000000..1223b2bef6 --- /dev/null +++ b/device/ragile/x86_64-ragile_ra-b6920-4s-r0/installer.conf @@ -0,0 +1,2 @@ +CONSOLE_SPEED=115200 +ONIE_PLATFORM_EXTRA_CMDLINE_LINUX="intel_pstate=disable intel_idle.max_cstate=0" \ No newline at end of file diff --git a/device/ragile/x86_64-ragile_ra-b6920-4s-r0/led_proc_init.soc b/device/ragile/x86_64-ragile_ra-b6920-4s-r0/led_proc_init.soc new file mode 100644 index 0000000000..da5105b07f --- /dev/null +++ b/device/ragile/x86_64-ragile_ra-b6920-4s-r0/led_proc_init.soc @@ -0,0 +1,7 @@ +m0 load 0 0x3800 /usr/share/sonic/platform/custom_led.bin + +led auto on + +led start + +linkscan spbm=all force=all interval=250000 diff --git a/device/ragile/x86_64-ragile_ra-b6920-4s-r0/linkscan_led.bin b/device/ragile/x86_64-ragile_ra-b6920-4s-r0/linkscan_led.bin new file mode 100644 index 0000000000..c2fa94a2d8 Binary files /dev/null and b/device/ragile/x86_64-ragile_ra-b6920-4s-r0/linkscan_led.bin differ diff --git a/device/ragile/x86_64-ragile_ra-b6920-4s-r0/minigraph.xml b/device/ragile/x86_64-ragile_ra-b6920-4s-r0/minigraph.xml new file mode 100644 index 0000000000..4aa22016c1 --- /dev/null +++ b/device/ragile/x86_64-ragile_ra-b6920-4s-r0/minigraph.xml @@ -0,0 +1,63 @@ + + + + + + + + + + + + + switch2 + + + + + + + + + + + + + switch2 + RA-B6920-4S + + + + + + + switch2 + + + DhcpResources + + + + + NtpResources + + 0.debian.pool.ntp.org;1.debian.pool.ntp.org;2.debian.pool.ntp.org;3.debian.pool.ntp.org + + + SyslogResources + + + + + ErspanDestinationIpv4 + + 2.2.2.2 + + + + + + + switch2 + RA-B6920-4S + diff --git a/device/ragile/x86_64-ragile_ra-b6920-4s-r0/monitor.py b/device/ragile/x86_64-ragile_ra-b6920-4s-r0/monitor.py new file mode 100644 index 0000000000..3aa8fd3f29 --- /dev/null +++ b/device/ragile/x86_64-ragile_ra-b6920-4s-r0/monitor.py @@ -0,0 +1,252 @@ +#!/usr/bin/python +# -*- coding: UTF-8 -*- +# * onboard temperature sensors +# * FAN trays +# * PSU +# +import os +import xml.etree.ElementTree as ET +import glob +from eepromutil.fru import * + +MAILBOX_DIR = "/sys/bus/i2c/devices/" +CONFIG_NAME = "dev.xml" + +def getPMCreg(location): + retval = 'ERR' + if (not os.path.isfile(location)): + return "%s %s notfound"% (retval , location) + try: + with open(location, 'r') as fd: + retval = fd.read() + except Exception as error: + pass + + retval = retval.rstrip('\r\n') + retval = retval.lstrip(" ") + return retval +# Get a mailbox register +def get_pmc_register(reg_name): + retval = 'ERR' + mb_reg_file = reg_name + filepath = glob.glob(mb_reg_file) + if(len(filepath) == 0): + return "%s %s notfound"% (retval , mb_reg_file) + mb_reg_file = filepath[0] + if (not os.path.isfile(mb_reg_file)): + #print mb_reg_file, 'not found !' + return "%s %s notfound"% (retval , mb_reg_file) + try: + with open(mb_reg_file, 'r') as fd: + retval = fd.read() + except Exception as error: + pass + + retval = retval.rstrip('\r\n') + retval = retval.lstrip(" ") + return retval + +class checktype(): + def __init__(self, test1): + self.test1 = test1 + @staticmethod + def check(name,location, bit, value, tips , err1): + psu_status = int(get_pmc_register(location),16) + val = (psu_status & (1<< bit)) >> bit + if (val != value): + err1["errmsg"] = tips + err1["code"] = -1 + return -1 + else: + err1["errmsg"] = "none" + err1["code"] = 0 + return 0 + @staticmethod + def getValue(location, bit , type): + value_t = get_pmc_register(location) + if value_t.startswith("ERR") : + return value_t + if (type == 1): + return float(value_t)/1000 + elif (type == 2): + return float(value_t)/100 + elif (type == 3): + psu_status = int(value_t,16) + return (psu_status & (1<< bit)) >> bit + elif (type == 4): + return int(value_t,10) + else: + return value_t; +#######temp + @staticmethod + def getTemp(self, name, location , ret_t): + ret2 = self.getValue(location + "temp1_input" ," " ,1); + ret3 = self.getValue(location + "temp1_max" ," ", 1); + ret4 = self.getValue(location + "temp1_max_hyst" ," ", 1); + ret_t["temp1_input"] = ret2 + ret_t["temp1_max"] = ret3 + ret_t["temp1_max_hyst"] = ret4 + @staticmethod + def getLM75(name, location, result): + c1=checktype + r1={} + c1.getTemp(c1, name, location, r1) + result[name] = r1 +##########fanFRU + @staticmethod + def decodeBinByValue(retval): + fru = ipmifru() + fru.decodeBin(retval) + return fru + + @staticmethod + def printbinvalue(b): + index = 0 + print " ", + for width in range(16): + print "%02x " % width, + print "" + for i in range(0, len(b)): + if index % 16 == 0: + print " " + print " %02x " % i, + print "%02x " % ord(b[i]), + index += 1 + print "" + + @staticmethod + def getfruValue(val): + binval = checktype.getValue(val, 0 , 0) + fanpro = {} + ret = checktype.decodeBinByValue(binval) + fanpro['fan_type'] = ret.productInfoArea.productName + fanpro['hw_version'] = int(ret.productInfoArea.productVersion, 16) + fanpro['sn'] = ret.productInfoArea.productSerialNumber + fanpro['fanid'] = ret.productInfoArea.productextra2 + return fanpro + + +class status(): + def __init__(self, productname): + self.productname = productname + + @staticmethod + def getETroot(filename): + tree = ET.parse(filename) + root = tree.getroot() + return root; + + @staticmethod + def getDecodValue(collection, decode): + decodes = collection.find('decode') + testdecode = decodes.find(decode) + test={} + for neighbor in testdecode.iter('code'): + test[neighbor.attrib["key"]]=neighbor.attrib["value"] + return test + @staticmethod + def getfileValue(location): + return checktype.getValue(location," "," ") + @staticmethod + def getETValue(a, filename, tagname): + root = status.getETroot(filename) + for neighbor in root.iter(tagname): + prob_t = {} + prob_t = neighbor.attrib + prob_t['errcode']= 0 + prob_t['errmsg'] = '' + for pros in neighbor.iter("property"): + ret = dict(neighbor.attrib.items() + pros.attrib.items()) + if ret.get('e2type') == 'fru' and ret.get("name") == "fru": + fruval = checktype.getfruValue(ret["location"]) + prob_t.update(fruval) + if ('type' not in ret.keys()): + val = "0"; + else: + val = ret["type"] + if ('bit' not in ret.keys()): + bit = "0"; + else: + bit = ret["bit"] + s = checktype.getValue(ret["location"], int(bit),int(val)) + if isinstance(s, str) and s.startswith("ERR"): + prob_t['errcode']= -1 + prob_t['errmsg']= s + if ('default' in ret.keys()): + rt = status.getDecodValue(root,ret['decode']) + prob_t['errmsg']= rt[str(s)] + if str(s) != ret["default"]: + prob_t['errcode']= -1 + break; + else: + if ('decode' in ret.keys()): + rt = status.getDecodValue(root,ret['decode']) + if(ret['decode'] == "psutype" and s.replace("\x00","").rstrip() not in rt.keys()): + prob_t['errcode']= -1 + prob_t['errmsg'] = '%s'% ("Not supported PSU") + else: + s = rt[str(s).replace("\x00","").rstrip()] + name = ret["name"] + prob_t[name]=str(s) + a.append(prob_t) + @staticmethod + def getCPUValue(a, filename, tagname): + root = status.getETroot(filename) + for neighbor in root.iter(tagname): + location = neighbor.attrib["location"] + L=[] + for dirpath, dirnames, filenames in os.walk(location): + for file in filenames : + if file.endswith("input"): + L.append(os.path.join(dirpath, file)) + L =sorted(L,reverse=False) + for i in range(len(L)): + prob_t = {} + prob_t["name"] = getPMCreg("%s/temp%d_label"%(location,i+1)) + prob_t["temp"] = float(getPMCreg("%s/temp%d_input"%(location,i+1)))/1000 + prob_t["alarm"] = float(getPMCreg("%s/temp%d_crit_alarm"%(location,i+1)))/1000 + prob_t["crit"] = float(getPMCreg("%s/temp%d_crit"%(location,i+1)))/1000 + prob_t["max"] = float(getPMCreg("%s/temp%d_max"%(location,i+1)))/1000 + a.append(prob_t) + + @staticmethod + def getFileName(): + return os.path.dirname(os.path.realpath(__file__)) + "/"+ CONFIG_NAME + @staticmethod + def getFan(ret): + _filename = status.getFileName() + _tagname = "fan" + status.getvalue(ret, _filename, _tagname) + @staticmethod + def checkFan(ret): + _filename = status.getFileName() + # _filename = "/usr/local/bin/" + status.getFileName() + _tagname = "fan" + status.getETValue(ret, _filename, _tagname) + @staticmethod + def getTemp(ret): + _filename = status.getFileName() + #_filename = "/usr/local/bin/" + status.getFileName() + _tagname = "temp" + status.getETValue(ret, _filename, _tagname) + @staticmethod + def getPsu(ret): + _filename = status.getFileName() + # _filename = "/usr/local/bin/" + status.getFileName() + _tagname = "psu" + status.getETValue(ret, _filename, _tagname) + + @staticmethod + def getcputemp(ret): + _filename = status.getFileName() + _tagname = "cpus" + status.getCPUValue(ret, _filename, _tagname) + + @staticmethod + def checkSlot(ret): + _filename = status.getFileName() + # _filename = "/usr/local/bin/" + status.getFileName() + _tagname = "slot" + status.getETValue(ret, _filename, _tagname) + + diff --git a/device/ragile/x86_64-ragile_ra-b6920-4s-r0/pddf/pd-plugin.json b/device/ragile/x86_64-ragile_ra-b6920-4s-r0/pddf/pd-plugin.json new file mode 100644 index 0000000000..ffa06ff743 --- /dev/null +++ b/device/ragile/x86_64-ragile_ra-b6920-4s-r0/pddf/pd-plugin.json @@ -0,0 +1,67 @@ +{ + "XCVR": { + "xcvr_present": { + "i2c": { + "valmap-SFP28": { + "1": true, + "0": false + }, + "valmap-QSFP28": { + "1": true, + "0": false + } + } + } + }, + + "PSU": { + "psu_present": { + "i2c": { + "valmap": { + "1": true, + "0": false + } + } + }, + + "psu_power_good": { + "i2c": { + "valmap": { + "1": true, + "0": false + } + } + }, + + "psu_fan_dir": { + "i2c": { + "valmap": { + "F2B": "EXHAUST", + "B2F": "INTAKE" + } + } + }, + "PSU_FAN_MAX_SPEED": "18000" + }, + + "FAN": { + "direction": { + "i2c": { + "valmap": { + "1": "INTAKE", + "0": "EXHAUST" + } + } + }, + "present": { + "i2c": { + "valmap": { + "1": true, + "0": false + } + } + }, + "duty_cycle_to_pwm": "lambda dc: dc*255/100", + "pwm_to_duty_cycle": "lambda pwm: pwm*100/255" + } +} diff --git a/device/ragile/x86_64-ragile_ra-b6920-4s-r0/pddf/pddf-device.json b/device/ragile/x86_64-ragile_ra-b6920-4s-r0/pddf/pddf-device.json new file mode 100755 index 0000000000..9e5c150527 --- /dev/null +++ b/device/ragile/x86_64-ragile_ra-b6920-4s-r0/pddf/pddf-device.json @@ -0,0 +1,13877 @@ +{ + "PLATFORM": { + "num_psus": 4, + "num_fantrays": 6, + "num_fans_pertray": 2, + "num_ports": 128, + "num_temps": 18, + "pddf_dev_types": { + "description": "RA-B6920-4S", + "CPLD": [ + "i2c_cpld" + ], + "PSU": [ + "psu_eeprom", + "psu_pmbus" + ], + "FAN": [ + "fan_ctrl", + "fan_cpld", + "fan_eeprom" + ], + "PORT_MODULE": [ + "pddf_xcvr", + "optoe1", + "optoe2" + ] + }, + "std_kos": [ + "i2c-i801", + "i2c_dev", + "rg_i2c_gpio", + "rg_i2c_algo_bit", + "i2c_mux", + "i2c_mux_pca954x force_create_bus=1", + "lm75", + "tmp401", + "rg_gpio_xeon", + "ragile_common dfd_my_type=0x404d", + "lpc_dbg", + "lpc_cpld_i2c", + "lpc_cpld_i2c_ocores", + "rg_lpc_cpld", + "optoe", + "at24" + ], + "pddf_kos": [ + "pddf_client_module", + "pddf_cpld_module", + "pddf_cpld_driver", + "pddf_mux_module", + "pddf_xcvr_module", + "pddf_xcvr_driver_module", + "pddf_psu_driver_module", + "pddf_psu_module", + "pddf_fan_driver_module", + "pddf_fan_module", + "pddf_sysstatus_module" + ], + "custom_kos": [ + "pddf_custom_fan", + "pddf_custom_psu", + "pddf_custom_xcvr", + "pddf_custom_led_module" + ] + }, + + "SYSTEM": { + "dev_info": { + "device_type": "CPU", + "device_name": "ROOT_COMPLEX", + "device_parent": null + }, + "i2c": { + "CONTROLLERS": [{ + "dev_name": "i2c-0", + "dev": "SMBUS0" + }, { + "dev_name": "i2c-1", + "dev": "I2C-GPIO0" + }, { + "dev_name": "i2c-2", + "dev": "CPLD-OCORE0" + }, { + "dev_name": "i2c-3", + "dev": "CPLD-OCORE1" + },{ + "dev_name": "i2c-4", + "dev": "CPLD-OCORE2" + },{ + "dev_name": "i2c-5", + "dev": "CPLD-OCORE3" + },{ + "dev_name": "i2c-6", + "dev": "CPLD-OCORE4" + }] + } + }, + + "SMBUS0": { + "dev_info": { + "device_type": "SMBUS", + "device_name": "SMBUS0", + "device_parent": "SYSTEM" + }, + "i2c": { + "topo_info": { + "dev_addr": "0x0" + }, + "DEVICES": [] + } + }, + + "I2C-GPIO0": { + "dev_info": { + "device_type": "I2C-GPIO", + "device_name": "I2C-GPIO0", + "device_parent": "SYSTEM" + }, + "i2c": { + "topo_info": { + "dev_addr": "0x1" + }, + "DEVICES": [{ + "dev": "EEPROM1" + } + ] + } + }, + + "EEPROM1": { + "dev_info": { + "device_type": "EEPROM", + "device_name": "EEPROM1", + "device_parent": "I2C-GPIO0" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x1", + "dev_addr": "0x56", + "dev_type": "24c02" + }, + "dev_attr": { + "access_mode": "BLOCK" + }, + "attr_list": [{ + "attr_name": "eeprom" + }] + } + }, + + "CPLD-OCORE0": { + "dev_info": { + "device_type": "CPLD-OCORE", + "device_name": "CPLD-OCORE0", + "device_parent": "SYSTEM" + }, + "i2c": { + "topo_info": { + "dev_addr": "0x2" + }, + "DEVICES": [{ + "dev": "MUX0" + }, { + "dev": "FAN-CTRL" + } + ] + } + }, + + "MUX0": { + "dev_info": { + "device_type": "MUX", + "device_name": "MUX0", + "device_parent": "CPLD-OCORE0" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x2", + "dev_addr": "0x76", + "dev_type": "pca9548" + }, + "dev_attr": { + "virt_bus": "0x07" + }, + "channel": [{ + "chn": "0", + "dev": "MUX1" + }, + { + "chn": "1", + "dev": "MUX2" + }, + { + "chn": "2", + "dev": "MUX3" + }, + { + "chn": "4", + "dev": "MUX4" + }, + { + "chn": "5", + "dev": "MUX5" + }, + { + "chn": "6", + "dev": "V-MUX-CONTROLLER0" + }, + { + "chn": "7", + "dev": "V-MUX-CONTROLLER1" + } + ] + } + }, + + "MUX1": { + "dev_info": { + "device_type": "MUX", + "device_name": "MUX1", + "device_parent": "MUX0" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x7", + "dev_addr": "0x77", + "dev_type": "pca9548" + }, + "dev_attr": { + "virt_bus": "0xf" + }, + "channel": [ + { + "chn": "1", + "dev": "V-CONTROLLER0" + } + ] + } + }, + + "V-CONTROLLER0": { + "dev_info": { + "device_type": "CPU", + "device_name": "V-CONTROLLER0", + "device_parent": "MUX1" + }, + "i2c": { + "CONTROLLERS": [{ + "dev_name": "i2c-16", + "dev": "TEMP-NODE0" + }] + } + }, + + "TEMP-NODE0": { + "dev_info": { + "device_type": "TEMP-NODE", + "device_name": "LC4-TEMP-NODE", + "device_parent": "MUX1" + }, + "i2c": { + "topo_info": { + "dev_addr": "0x10", + "parent_bus": "0x7" + }, + "DEVICES": [{ + "dev": "TEMP1" + },{ + "dev": "TEMP2" + },{ + "dev": "TEMP3" + } + ] + } + }, + + "TEMP1": { + "dev_info": { + "device_type": "TEMP_SENSOR", + "device_name": "LC4-TEMP1", + "device_parent": "MUX1" + }, + "dev_attr": { + "display_name": "LC4-TEMP1" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x10", + "dev_addr": "0x48", + "dev_type": "lm75" + }, + "attr_list": [{ + "attr_name": "temp1_high_threshold", + "drv_attr_name": "temp1_max" + }, + { + "attr_name": "temp1_max_hyst" + }, + { + "attr_name": "temp1_input" + } + ] + } + }, + + "TEMP2": { + "dev_info": { + "device_type": "TEMP_SENSOR", + "device_name": "LC4-TEMP2", + "device_parent": "MUX1" + }, + "dev_attr": { + "display_name": "LC4-TEMP2" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x10", + "dev_addr": "0x49", + "dev_type": "lm75" + }, + "attr_list": [{ + "attr_name": "temp1_high_threshold", + "drv_attr_name": "temp1_max" + }, + { + "attr_name": "temp1_max_hyst" + }, + { + "attr_name": "temp1_input" + } + ] + } + }, + + "TEMP3": { + "dev_info": { + "device_type": "TEMP_SENSOR", + "device_name": "LC4-TEMP3", + "device_parent": "MUX1" + }, + "dev_attr": { + "display_name": "LC4-TEMP3" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x10", + "dev_addr": "0x4d", + "dev_type": "lm75" + }, + "attr_list": [{ + "attr_name": "temp1_high_threshold", + "drv_attr_name": "temp1_max" + }, + { + "attr_name": "temp1_max_hyst" + }, + { + "attr_name": "temp1_input" + } + ] + } + }, + + "MUX2": { + "dev_info": { + "device_type": "MUX", + "device_name": "MUX2", + "device_parent": "MUX0" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x8", + "dev_addr": "0x77", + "dev_type": "pca9548" + }, + "dev_attr": { + "virt_bus": "0x17" + }, + "channel": [{ + "chn": "0", + "dev": "PSU1" + }, + { + "chn": "1", + "dev": "PSU2" + }, + { + "chn": "2", + "dev": "PSU3" + }, + { + "chn": "3", + "dev": "PSU4" + }, + { + "chn": "5", + "dev": "V-CONTROLLER1" + }, + { + "chn": "6", + "dev": "V-CONTROLLER2" + } + ] + } + }, + + "PSU1": { + "dev_info": { + "device_type": "PSU", + "device_name": "PSU1", + "device_parent": "MUX2" + }, + "dev_attr": { + "dev_idx": "1", + "num_psu_fans": "1" + }, + "i2c": { + "interface": [{ + "itf": "pmbus", + "dev": "PSU1-PMBUS" + }, + { + "itf": "eeprom", + "dev": "PSU1-EEPROM" + } + ] + } + }, + + "PSU1-PMBUS": { + "dev_info": { + "device_type": "PSU-PMBUS", + "device_name": "PSU1-PMBUS", + "device_parent": "MUX2", + "virt_parent": "PSU1" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x17", + "dev_addr": "0x58", + "dev_type": "psu_pmbus" + }, + "attr_list": [{ + "attr_name": "psu_present", + "attr_devtype": "io", + "attr_offset": "0xb27", + "attr_mask": "0x1", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "psu_model_name", + "attr_devaddr": "0x58", + "attr_devtype": "pmbus", + "attr_offset": "0x9a", + "attr_mask": "0x0", + "attr_cmpval": "0xff", + "attr_len": "12" + }, + { + "attr_name": "psu_power_good", + "attr_devtype": "io", + "attr_offset": "0xb27", + "attr_mask": "0x2", + "attr_cmpval": "0x2", + "attr_len": "1" + }, + { + "attr_name": "psu_mfr_id", + "attr_devaddr": "0x58", + "attr_devtype": "pmbus", + "attr_offset": "0x99", + "attr_mask": "0x0", + "attr_cmpval": "0xff", + "attr_len": "10" + }, + { + "attr_name": "psu_fan_dir", + "attr_devaddr": "0x58", + "attr_devtype": "pmbus", + "attr_offset": "0xc3", + "attr_mask": "0x0", + "attr_cmpval": "0xff", + "attr_len": "5" + }, + { + "attr_name": "psu_v_out", + "attr_devaddr": "0x58", + "attr_devtype": "pmbus", + "attr_offset": "0x8b", + "attr_mask": "0x0", + "attr_cmpval": "0xff", + "attr_len": "2" + }, + { + "attr_name": "psu_i_out", + "attr_devaddr": "0x58", + "attr_devtype": "pmbus", + "attr_offset": "0x8c", + "attr_mask": "0x0", + "attr_cmpval": "0xff", + "attr_len": "2" + }, + { + "attr_name": "psu_p_out", + "attr_devaddr": "0x58", + "attr_devtype": "pmbus", + "attr_offset": "0x96", + "attr_mask": "0x0", + "attr_cmpval": "0xff", + "attr_len": "2" + }, + { + "attr_name": "psu_fan1_speed_rpm", + "attr_devaddr": "0x58", + "attr_devtype": "pmbus", + "attr_offset": "0x90", + "attr_mask": "0x0", + "attr_cmpval": "0xff", + "attr_len": "2" + }, + { + "attr_name": "psu_temp1_input", + "attr_devaddr": "0x58", + "attr_devtype": "pmbus", + "attr_offset": "0x8d", + "attr_mask": "0x0", + "attr_cmpval": "0xff", + "attr_len": "2" + } + ] + } + }, + + "PSU1-EEPROM": { + "dev_info": { + "device_type": "PSU-EEPROM", + "device_name": "PSU1-EEPROM", + "device_parent": "MUX2", + "virt_parent": "PSU1" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x17", + "dev_addr": "0x50", + "dev_type": "psu_eeprom" + }, + "attr_list": [{ + "attr_name": "psu_serial_num", + "attr_devaddr": "0x50", + "attr_devtype": "eeprom", + "attr_offset": "0x38", + "attr_mask": "0x0", + "attr_cmpval": "0xff", + "attr_len": "20" + }] + } + }, + + "PSU2": { + "dev_info": { + "device_type": "PSU", + "device_name": "PSU2", + "device_parent": "MUX2" + }, + "dev_attr": { + "dev_idx": "2", + "num_psu_fans": "1" + }, + "i2c": { + "interface": [{ + "itf": "pmbus", + "dev": "PSU2-PMBUS" + }, + { + "itf": "eeprom", + "dev": "PSU2-EEPROM" + } + ] + } + }, + + "PSU2-PMBUS": { + "dev_info": { + "device_type": "PSU-PMBUS", + "device_name": "PSU2-PMBUS", + "device_parent": "MUX2", + "virt_parent": "PSU2" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x18", + "dev_addr": "0x58", + "dev_type": "psu_pmbus" + }, + "attr_list": [{ + "attr_name": "psu_present", + "attr_devtype": "io", + "attr_offset": "0xb28", + "attr_mask": "0x01", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "psu_model_name", + "attr_devaddr": "0x58", + "attr_devtype": "pmbus", + "attr_offset": "0x9a", + "attr_mask": "0x0", + "attr_cmpval": "0xff", + "attr_len": "12" + }, + { + "attr_name": "psu_power_good", + "attr_devtype": "io", + "attr_offset": "0xb28", + "attr_mask": "0x02", + "attr_cmpval": "0x02", + "attr_len": "1" + }, + { + "attr_name": "psu_mfr_id", + "attr_devaddr": "0x58", + "attr_devtype": "pmbus", + "attr_offset": "0x99", + "attr_mask": "0x0", + "attr_cmpval": "0xff", + "attr_len": "10" + }, + { + "attr_name": "psu_fan_dir", + "attr_devaddr": "0x58", + "attr_devtype": "pmbus", + "attr_offset": "0xc3", + "attr_mask": "0x0", + "attr_cmpval": "0xff", + "attr_len": "5" + }, + { + "attr_name": "psu_v_out", + "attr_devaddr": "0x58", + "attr_devtype": "pmbus", + "attr_offset": "0x8b", + "attr_mask": "0x0", + "attr_cmpval": "0xff", + "attr_len": "2" + }, + { + "attr_name": "psu_i_out", + "attr_devaddr": "0x58", + "attr_devtype": "pmbus", + "attr_offset": "0x8c", + "attr_mask": "0x0", + "attr_cmpval": "0xff", + "attr_len": "2" + }, + { + "attr_name": "psu_p_out", + "attr_devaddr": "0x58", + "attr_devtype": "pmbus", + "attr_offset": "0x96", + "attr_mask": "0x0", + "attr_cmpval": "0xff", + "attr_len": "2" + }, + { + "attr_name": "psu_fan1_speed_rpm", + "attr_devaddr": "0x58", + "attr_devtype": "pmbus", + "attr_offset": "0x90", + "attr_mask": "0x0", + "attr_cmpval": "0xff", + "attr_len": "2" + }, + { + "attr_name": "psu_temp1_input", + "attr_devaddr": "0x58", + "attr_devtype": "pmbus", + "attr_offset": "0x8d", + "attr_mask": "0x0", + "attr_cmpval": "0xff", + "attr_len": "2" + } + ] + } + }, + + "PSU2-EEPROM": { + "dev_info": { + "device_type": "PSU-EEPROM", + "device_name": "PSU2-EEPROM", + "device_parent": "MUX2", + "virt_parent": "PSU2" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x18", + "dev_addr": "0x50", + "dev_type": "psu_eeprom" + }, + "attr_list": [{ + "attr_name": "psu_serial_num", + "attr_devaddr": "0x50", + "attr_devtype": "eeprom", + "attr_offset": "0x38", + "attr_mask": "0x0", + "attr_cmpval": "0xff", + "attr_len": "20" + }] + } + }, + + "PSU3": { + "dev_info": { + "device_type": "PSU", + "device_name": "PSU3", + "device_parent": "MUX2" + }, + "dev_attr": { + "dev_idx": "3", + "num_psu_fans": "1" + }, + "i2c": { + "interface": [{ + "itf": "pmbus", + "dev": "PSU3-PMBUS" + }, + { + "itf": "eeprom", + "dev": "PSU3-EEPROM" + } + ] + } + }, + + "PSU3-PMBUS": { + "dev_info": { + "device_type": "PSU-PMBUS", + "device_name": "PSU3-PMBUS", + "device_parent": "MUX2", + "virt_parent": "PSU3" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x19", + "dev_addr": "0x58", + "dev_type": "psu_pmbus" + }, + "attr_list": [{ + "attr_name": "psu_present", + "attr_devtype": "io", + "attr_offset": "0xb29", + "attr_mask": "0x01", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "psu_model_name", + "attr_devaddr": "0x58", + "attr_devtype": "pmbus", + "attr_offset": "0x9a", + "attr_mask": "0x0", + "attr_cmpval": "0xff", + "attr_len": "12" + }, + { + "attr_name": "psu_power_good", + "attr_devtype": "io", + "attr_offset": "0xb29", + "attr_mask": "0x02", + "attr_cmpval": "0x02", + "attr_len": "1" + }, + { + "attr_name": "psu_mfr_id", + "attr_devaddr": "0x58", + "attr_devtype": "pmbus", + "attr_offset": "0x99", + "attr_mask": "0x0", + "attr_cmpval": "0xff", + "attr_len": "10" + }, + { + "attr_name": "psu_fan_dir", + "attr_devaddr": "0x58", + "attr_devtype": "pmbus", + "attr_offset": "0xc3", + "attr_mask": "0x0", + "attr_cmpval": "0xff", + "attr_len": "5" + }, + { + "attr_name": "psu_v_out", + "attr_devaddr": "0x58", + "attr_devtype": "pmbus", + "attr_offset": "0x8b", + "attr_mask": "0x0", + "attr_cmpval": "0xff", + "attr_len": "2" + }, + { + "attr_name": "psu_i_out", + "attr_devaddr": "0x58", + "attr_devtype": "pmbus", + "attr_offset": "0x8c", + "attr_mask": "0x0", + "attr_cmpval": "0xff", + "attr_len": "2" + }, + { + "attr_name": "psu_p_out", + "attr_devaddr": "0x58", + "attr_devtype": "pmbus", + "attr_offset": "0x96", + "attr_mask": "0x0", + "attr_cmpval": "0xff", + "attr_len": "2" + }, + { + "attr_name": "psu_fan1_speed_rpm", + "attr_devaddr": "0x58", + "attr_devtype": "pmbus", + "attr_offset": "0x90", + "attr_mask": "0x0", + "attr_cmpval": "0xff", + "attr_len": "2" + }, + { + "attr_name": "psu_temp1_input", + "attr_devaddr": "0x58", + "attr_devtype": "pmbus", + "attr_offset": "0x8d", + "attr_mask": "0x0", + "attr_cmpval": "0xff", + "attr_len": "2" + } + ] + } + }, + + "PSU3-EEPROM": { + "dev_info": { + "device_type": "PSU-EEPROM", + "device_name": "PSU3-EEPROM", + "device_parent": "MUX2", + "virt_parent": "PSU3" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x19", + "dev_addr": "0x50", + "dev_type": "psu_eeprom" + }, + "attr_list": [{ + "attr_name": "psu_serial_num", + "attr_devaddr": "0x50", + "attr_devtype": "eeprom", + "attr_offset": "0x38", + "attr_mask": "0x0", + "attr_cmpval": "0xff", + "attr_len": "20" + }] + } + }, + + "PSU4": { + "dev_info": { + "device_type": "PSU", + "device_name": "PSU4", + "device_parent": "MUX2" + }, + "dev_attr": { + "dev_idx": "4", + "num_psu_fans": "1" + }, + "i2c": { + "interface": [{ + "itf": "pmbus", + "dev": "PSU4-PMBUS" + }, + { + "itf": "eeprom", + "dev": "PSU4-EEPROM" + } + ] + } + }, + + "PSU4-PMBUS": { + "dev_info": { + "device_type": "PSU-PMBUS", + "device_name": "PSU4-PMBUS", + "device_parent": "MUX2", + "virt_parent": "PSU4" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x1a", + "dev_addr": "0x58", + "dev_type": "psu_pmbus" + }, + "attr_list": [{ + "attr_name": "psu_present", + "attr_devtype": "io", + "attr_offset": "0xb2a", + "attr_mask": "0x01", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "psu_model_name", + "attr_devaddr": "0x58", + "attr_devtype": "pmbus", + "attr_offset": "0x9a", + "attr_mask": "0x0", + "attr_cmpval": "0xff", + "attr_len": "12" + }, + { + "attr_name": "psu_power_good", + "attr_devtype": "io", + "attr_offset": "0xb2a", + "attr_mask": "0x02", + "attr_cmpval": "0x02", + "attr_len": "1" + }, + { + "attr_name": "psu_mfr_id", + "attr_devaddr": "0x58", + "attr_devtype": "pmbus", + "attr_offset": "0x99", + "attr_mask": "0x0", + "attr_cmpval": "0xff", + "attr_len": "10" + }, + { + "attr_name": "psu_fan_dir", + "attr_devaddr": "0x58", + "attr_devtype": "pmbus", + "attr_offset": "0xc3", + "attr_mask": "0x0", + "attr_cmpval": "0xff", + "attr_len": "5" + }, + { + "attr_name": "psu_v_out", + "attr_devaddr": "0x58", + "attr_devtype": "pmbus", + "attr_offset": "0x8b", + "attr_mask": "0x0", + "attr_cmpval": "0xff", + "attr_len": "2" + }, + { + "attr_name": "psu_i_out", + "attr_devaddr": "0x58", + "attr_devtype": "pmbus", + "attr_offset": "0x8c", + "attr_mask": "0x0", + "attr_cmpval": "0xff", + "attr_len": "2" + }, + { + "attr_name": "psu_p_out", + "attr_devaddr": "0x58", + "attr_devtype": "pmbus", + "attr_offset": "0x96", + "attr_mask": "0x0", + "attr_cmpval": "0xff", + "attr_len": "2" + }, + { + "attr_name": "psu_fan1_speed_rpm", + "attr_devaddr": "0x58", + "attr_devtype": "pmbus", + "attr_offset": "0x90", + "attr_mask": "0x0", + "attr_cmpval": "0xff", + "attr_len": "2" + }, + { + "attr_name": "psu_temp1_input", + "attr_devaddr": "0x58", + "attr_devtype": "pmbus", + "attr_offset": "0x8d", + "attr_mask": "0x0", + "attr_cmpval": "0xff", + "attr_len": "2" + } + ] + } + }, + + "PSU4-EEPROM": { + "dev_info": { + "device_type": "PSU-EEPROM", + "device_name": "PSU4-EEPROM", + "device_parent": "MUX2", + "virt_parent": "PSU4" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x1a", + "dev_addr": "0x50", + "dev_type": "psu_eeprom" + }, + "attr_list": [{ + "attr_name": "psu_serial_num", + "attr_devaddr": "0x50", + "attr_devtype": "eeprom", + "attr_offset": "0x38", + "attr_mask": "0x0", + "attr_cmpval": "0xff", + "attr_len": "20" + }] + } + }, + + "V-CONTROLLER1": { + "dev_info": { + "device_type": "CPU", + "device_name": "V-CONTROLLER1", + "device_parent": "MUX2" + }, + "i2c": { + "CONTROLLERS": [{ + "dev_name": "i2c-28", + "dev": "TEMP-NODE1" + }] + } + }, + + "TEMP-NODE1": { + "dev_info": { + "device_type": "TEMP-NODE", + "device_name": "MAC-TEMP-NODE0", + "device_parent": "MUX2" + }, + "i2c": { + "topo_info": { + "dev_addr": "0x1c", + "parent_bus": "0x8" + }, + "DEVICES": [{ + "dev": "TEMP4" + } + ] + } + }, + + "TEMP4": { + "dev_info": { + "device_type": "TEMP_SENSOR", + "device_name": "TEMP-MAC-OUTLET", + "device_parent": "MUX2" + }, + "dev_attr": { + "display_name": "Temp_MAC_OUTLET" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x1c", + "dev_addr": "0x4b", + "dev_type": "lm75" + }, + "attr_list": [{ + "attr_name": "temp1_high_threshold", + "drv_attr_name": "temp1_max" + }, + { + "attr_name": "temp1_max_hyst" + }, + { + "attr_name": "temp1_input" + } + ] + } + }, + + "V-CONTROLLER2": { + "dev_info": { + "device_type": "CPU", + "device_name": "V-CONTROLLER2", + "device_parent": "MUX2" + }, + "i2c": { + "CONTROLLERS": [{ + "dev_name": "i2c-29", + "dev": "TEMP-NODE2" + }] + } + }, + + "TEMP-NODE2": { + "dev_info": { + "device_type": "TEMP-NODE", + "device_name": "MAC-TEMP-NODE1", + "device_parent": "MUX2" + }, + "i2c": { + "topo_info": { + "dev_addr": "0x1d", + "parent_bus": "0x8" + }, + "DEVICES": [{ + "dev": "TEMP5" + } + ] + } + }, + + "TEMP5": { + "dev_info": { + "device_type": "TEMP_SENSOR", + "device_name": "TEMP-MAC-INLET", + "device_parent": "MUX2" + }, + "dev_attr": { + "display_name": "Temp_MAC_INLET" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x1d", + "dev_addr": "0x4f", + "dev_type": "lm75" + }, + "attr_list": [{ + "attr_name": "temp1_high_threshold", + "drv_attr_name": "temp1_max" + }, + { + "attr_name": "temp1_max_hyst" + }, + { + "attr_name": "temp1_input" + } + ] + } + }, + + "MUX3": { + "dev_info": { + "device_type": "MUX", + "device_name": "MUX3", + "device_parent": "MUX0" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x9", + "dev_addr": "0x77", + "dev_type": "pca9548" + }, + "dev_attr": { + "virt_bus": "0x1f" + }, + "channel": [ + { + "chn": "1", + "dev": "V-CONTROLLER3" + } + ] + } + }, + + "V-CONTROLLER3": { + "dev_info": { + "device_type": "CPU", + "device_name": "V-CONTROLLER3", + "device_parent": "MUX3" + }, + "i2c": { + "CONTROLLERS": [{ + "dev_name": "i2c-32", + "dev": "TEMP-NODE3" + }] + } + }, + + "TEMP-NODE3": { + "dev_info": { + "device_type": "TEMP-NODE", + "device_name": "LC1-TEMP-NODE", + "device_parent": "MUX3" + }, + "i2c": { + "topo_info": { + "dev_addr": "0x20", + "parent_bus": "0x9" + }, + "DEVICES": [{ + "dev": "TEMP6" + },{ + "dev": "TEMP7" + },{ + "dev": "TEMP8" + } + ] + } + }, + + "TEMP6": { + "dev_info": { + "device_type": "TEMP_SENSOR", + "device_name": "LC1-TEMP0", + "device_parent": "MUX3" + }, + "dev_attr": { + "display_name": "Temp_LC1_A" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x20", + "dev_addr": "0x48", + "dev_type": "lm75" + }, + "attr_list": [{ + "attr_name": "temp1_high_threshold", + "drv_attr_name": "temp1_max" + }, + { + "attr_name": "temp1_max_hyst" + }, + { + "attr_name": "temp1_input" + } + ] + } + }, + + "TEMP7": { + "dev_info": { + "device_type": "TEMP_SENSOR", + "device_name": "LC1-TEMP1", + "device_parent": "MUX3" + }, + "dev_attr": { + "display_name": "Temp_LC1_B" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x20", + "dev_addr": "0x49", + "dev_type": "lm75" + }, + "attr_list": [{ + "attr_name": "temp1_high_threshold", + "drv_attr_name": "temp1_max" + }, + { + "attr_name": "temp1_max_hyst" + }, + { + "attr_name": "temp1_input" + } + ] + } + }, + + "TEMP8": { + "dev_info": { + "device_type": "TEMP_SENSOR", + "device_name": "LC1-TEMP2", + "device_parent": "MUX3" + }, + "dev_attr": { + "display_name": "Temp_LC1_C" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x20", + "dev_addr": "0x4d", + "dev_type": "lm75" + }, + "attr_list": [{ + "attr_name": "temp1_high_threshold", + "drv_attr_name": "temp1_max" + }, + { + "attr_name": "temp1_max_hyst" + }, + { + "attr_name": "temp1_input" + } + ] + } + }, + + "MUX4": { + "dev_info": { + "device_type": "MUX", + "device_name": "MUX4", + "device_parent": "MUX0" + }, + "i2c": { + "topo_info": { + "parent_bus": "0xb", + "dev_addr": "0x77", + "dev_type": "pca9548" + }, + "dev_attr": { + "virt_bus": "0x27" + }, + "channel": [ + { + "chn": "1", + "dev": "V-CONTROLLER4" + } + ] + } + }, + + "V-CONTROLLER4": { + "dev_info": { + "device_type": "CPU", + "device_name": "V-CONTROLLER4", + "device_parent": "MUX4" + }, + "i2c": { + "CONTROLLERS": [{ + "dev_name": "i2c-40", + "dev": "TEMP-NODE4" + }] + } + }, + + "TEMP-NODE4": { + "dev_info": { + "device_type": "TEMP-NODE", + "device_name": "LC3-TEMP-NODE", + "device_parent": "MUX4" + }, + "i2c": { + "topo_info": { + "dev_addr": "0x28", + "parent_bus": "0xb" + }, + "DEVICES": [{ + "dev": "TEMP9" + },{ + "dev": "TEMP10" + },{ + "dev": "TEMP11" + } + ] + } + }, + + "TEMP9": { + "dev_info": { + "device_type": "TEMP_SENSOR", + "device_name": "LC3-TEMP0", + "device_parent": "MUX4" + }, + "dev_attr": { + "display_name": "Temp_LC3_A" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x28", + "dev_addr": "0x48", + "dev_type": "lm75" + }, + "attr_list": [{ + "attr_name": "temp1_high_threshold", + "drv_attr_name": "temp1_max" + }, + { + "attr_name": "temp1_max_hyst" + }, + { + "attr_name": "temp1_input" + } + ] + } + }, + + "TEMP10": { + "dev_info": { + "device_type": "TEMP_SENSOR", + "device_name": "LC3-TEMP1", + "device_parent": "MUX4" + }, + "dev_attr": { + "display_name": "Temp_LC3_B" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x28", + "dev_addr": "0x49", + "dev_type": "lm75" + }, + "attr_list": [{ + "attr_name": "temp1_high_threshold", + "drv_attr_name": "temp1_max" + }, + { + "attr_name": "temp1_max_hyst" + }, + { + "attr_name": "temp1_input" + } + ] + } + }, + + "TEMP11": { + "dev_info": { + "device_type": "TEMP_SENSOR", + "device_name": "LC3-TEMP2", + "device_parent": "MUX4" + }, + "dev_attr": { + "display_name": "Temp_LC3_C" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x28", + "dev_addr": "0x4d", + "dev_type": "lm75" + }, + "attr_list": [{ + "attr_name": "temp1_high_threshold", + "drv_attr_name": "temp1_max" + }, + { + "attr_name": "temp1_max_hyst" + }, + { + "attr_name": "temp1_input" + } + ] + } + }, + + "MUX5": { + "dev_info": { + "device_type": "MUX", + "device_name": "MUX5", + "device_parent": "MUX0" + }, + "i2c": { + "topo_info": { + "parent_bus": "0xc", + "dev_addr": "0x77", + "dev_type": "pca9548" + }, + "dev_attr": { + "virt_bus": "0x2f" + }, + "channel": [ + { + "chn": "1", + "dev": "V-CONTROLLER5" + } + ] + } + }, + + "V-CONTROLLER5": { + "dev_info": { + "device_type": "CPU", + "device_name": "V-CONTROLLER5", + "device_parent": "MUX5" + }, + "i2c": { + "CONTROLLERS": [{ + "dev_name": "i2c-48", + "dev": "TEMP-NODE5" + }] + } + }, + + "TEMP-NODE5": { + "dev_info": { + "device_type": "TEMP-NODE", + "device_name": "LC2-TEMP-NODE", + "device_parent": "MUX5" + }, + "i2c": { + "topo_info": { + "dev_addr": "0x30", + "parent_bus": "0xc" + }, + "DEVICES": [{ + "dev": "TEMP12" + },{ + "dev": "TEMP13" + },{ + "dev": "TEMP14" + } + ] + } + }, + + "TEMP12": { + "dev_info": { + "device_type": "TEMP_SENSOR", + "device_name": "LC2-TEMP0", + "device_parent": "MUX5" + }, + "dev_attr": { + "display_name": "Temp_LC2_A" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x30", + "dev_addr": "0x48", + "dev_type": "lm75" + }, + "attr_list": [{ + "attr_name": "temp1_high_threshold", + "drv_attr_name": "temp1_max" + }, + { + "attr_name": "temp1_max_hyst" + }, + { + "attr_name": "temp1_input" + } + ] + } + }, + + "TEMP13": { + "dev_info": { + "device_type": "TEMP_SENSOR", + "device_name": "LC2-TEMP1", + "device_parent": "MUX5" + }, + "dev_attr": { + "display_name": "Temp_LC2_B" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x30", + "dev_addr": "0x49", + "dev_type": "lm75" + }, + "attr_list": [{ + "attr_name": "temp1_high_threshold", + "drv_attr_name": "temp1_max" + }, + { + "attr_name": "temp1_max_hyst" + }, + { + "attr_name": "temp1_input" + } + ] + } + }, + + "TEMP14": { + "dev_info": { + "device_type": "TEMP_SENSOR", + "device_name": "LC2-TEMP2", + "device_parent": "MUX5" + }, + "dev_attr": { + "display_name": "Temp_LC2_C" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x30", + "dev_addr": "0x4d", + "dev_type": "lm75" + }, + "attr_list": [{ + "attr_name": "temp1_high_threshold", + "drv_attr_name": "temp1_max" + }, + { + "attr_name": "temp1_max_hyst" + }, + { + "attr_name": "temp1_input" + } + ] + } + }, + + "V-MUX-CONTROLLER0": { + "dev_info": { + "device_type": "CPU", + "device_name": "V-MUX-CONTROLLER0", + "device_parent": "MUX1" + }, + "i2c": { + "CONTROLLERS": [{ + "dev_name": "i2c-13", + "dev": "V-NODE0" + }] + } + }, + + "V-NODE0": { + "dev_info": { + "device_type": "NODE", + "device_name": "V-NODE0", + "device_parent": "MUX0" + }, + "i2c": { + "topo_info": { + "dev_addr": "0xd" + }, + "DEVICES": [ + { + "dev": "MUX6" + }, + { + "dev": "FAN-CPLD-B" + } + ] + } + }, + + "MUX6": { + "dev_info": { + "device_type": "MUX", + "device_name": "MUX6", + "device_parent": "MUX0" + }, + "i2c": { + "topo_info": { + "parent_bus": "0xd", + "dev_addr": "0x77", + "dev_type": "pca9548" + }, + "dev_attr": { + "virt_bus": "0x37" + }, + "channel": [{ + "chn": "0", + "dev": "FAN2-EEPROM" + }, + { + "chn": "1", + "dev": "FAN4-EEPROM" + }, + { + "chn": "2", + "dev": "FAN6-EEPROM" + }, + { + "chn": "5", + "dev": "V-CONTROLLER6" + } + ] + } + }, + + "FAN2-EEPROM": { + "dev_info": { + "device_type": "EEPROM", + "device_name": "FAN2-EEPROM", + "device_parent": "MUX6" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x37", + "dev_addr": "0x50", + "dev_type": "24c02" + }, + "dev_attr": { + "access_mode": "BLOCK" + }, + "attr_list": [{ + "attr_name": "eeprom" + }] + } + }, + + "FAN4-EEPROM": { + "dev_info": { + "device_type": "EEPROM", + "device_name": "FAN4-EEPROM", + "device_parent": "MUX6" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x38", + "dev_addr": "0x50", + "dev_type": "24c02" + }, + "dev_attr": { + "access_mode": "BLOCK" + }, + "attr_list": [{ + "attr_name": "eeprom" + }] + } + }, + + "FAN6-EEPROM": { + "dev_info": { + "device_type": "EEPROM", + "device_name": "FAN4-EEPROM", + "device_parent": "MUX6" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x39", + "dev_addr": "0x50", + "dev_type": "24c02" + }, + "dev_attr": { + "access_mode": "BLOCK" + }, + "attr_list": [{ + "attr_name": "eeprom" + }] + } + }, + + "V-CONTROLLER6": { + "dev_info": { + "device_type": "CPU", + "device_name": "V-CONTROLLER6", + "device_parent": "MUX6" + }, + "i2c": { + "CONTROLLERS": [{ + "dev_name": "i2c-60", + "dev": "TEMP-NODE6" + }] + } + }, + + "TEMP-NODE6": { + "dev_info": { + "device_type": "TEMP-NODE", + "device_name": "FAN-CONN-TEMP-NODE-B", + "device_parent": "MUX6" + }, + "i2c": { + "topo_info": { + "dev_addr": "0x30", + "parent_bus": "0xd" + }, + "DEVICES": [{ + "dev": "TEMP15" + },{ + "dev": "TEMP16" + } + ] + } + }, + + "TEMP15": { + "dev_info": { + "device_type": "TEMP_SENSOR", + "device_name": "FAN-CONN-B-TEMP0", + "device_parent": "MUX6" + }, + "dev_attr": { + "display_name": "Temp_FAN_CONN_B_0" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x3c", + "dev_addr": "0x48", + "dev_type": "lm75" + }, + "attr_list": [{ + "attr_name": "temp1_high_threshold", + "drv_attr_name": "temp1_max" + }, + { + "attr_name": "temp1_max_hyst" + }, + { + "attr_name": "temp1_input" + } + ] + } + }, + + "TEMP16": { + "dev_info": { + "device_type": "TEMP_SENSOR", + "device_name": "FAN-CONN-B-TEMP1", + "device_parent": "MUX6" + }, + "dev_attr": { + "display_name": "Temp_FAN_CONN_B_1" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x3c", + "dev_addr": "0x49", + "dev_type": "lm75" + }, + "attr_list": [{ + "attr_name": "temp1_high_threshold", + "drv_attr_name": "temp1_max" + }, + { + "attr_name": "temp1_max_hyst" + }, + { + "attr_name": "temp1_input" + } + ] + } + }, + + "FAN-CPLD-B": { + "dev_info": { + "device_type": "CPLD", + "device_name": "FAN-CPLD-B", + "device_parent": "V-CONTROLLER6" + }, + "i2c": { + "topo_info": { + "parent_bus": "0xd", + "dev_addr": "0x0d", + "dev_type": "i2c_cpld" + }, + "dev_attr": {} + } + }, + + "V-MUX-CONTROLLER1": { + "dev_info": { + "device_type": "CPU", + "device_name": "V-MUX-CONTROLLER1", + "device_parent": "MUX1" + }, + "i2c": { + "CONTROLLERS": [{ + "dev_name": "i2c-14", + "dev": "V-NODE1" + }] + } + }, + + "V-NODE1": { + "dev_info": { + "device_type": "NODE", + "device_name": "V-NODE1", + "device_parent": "MUX0" + }, + "i2c": { + "topo_info": { + "dev_addr": "0xe" + }, + "DEVICES": [ + { + "dev": "MUX7" + }, + { + "dev": "FAN-CPLD-A" + } + ] + } + }, + + "MUX7": { + "dev_info": { + "device_type": "MUX", + "device_name": "MUX7", + "device_parent": "MUX0" + }, + "i2c": { + "topo_info": { + "parent_bus": "0xe", + "dev_addr": "0x77", + "dev_type": "pca9548" + }, + "dev_attr": { + "virt_bus": "0x3f" + }, + "channel": [{ + "chn": "0", + "dev": "FAN1-EEPROM" + }, + { + "chn": "1", + "dev": "FAN3-EEPROM" + }, + { + "chn": "2", + "dev": "FAN5-EEPROM" + }, + { + "chn": "5", + "dev": "V-CONTROLLER7" + } + ] + } + }, + + "FAN1-EEPROM": { + "dev_info": { + "device_type": "EEPROM", + "device_name": "FAN1-EEPROM", + "device_parent": "MUX7" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x3f", + "dev_addr": "0x50", + "dev_type": "24c02" + }, + "dev_attr": { + "access_mode": "BLOCK" + }, + "attr_list": [{ + "attr_name": "eeprom" + }] + } + }, + + "FAN3-EEPROM": { + "dev_info": { + "device_type": "EEPROM", + "device_name": "FAN3-EEPROM", + "device_parent": "MUX7" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x40", + "dev_addr": "0x50", + "dev_type": "24c02" + }, + "dev_attr": { + "access_mode": "BLOCK" + }, + "attr_list": [{ + "attr_name": "eeprom" + }] + } + }, + + "FAN5-EEPROM": { + "dev_info": { + "device_type": "EEPROM", + "device_name": "FAN5-EEPROM", + "device_parent": "MUX7" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x41", + "dev_addr": "0x50", + "dev_type": "24c02" + }, + "dev_attr": { + "access_mode": "BLOCK" + }, + "attr_list": [{ + "attr_name": "eeprom" + }] + } + }, + + "V-CONTROLLER7": { + "dev_info": { + "device_type": "CPU", + "device_name": "V-CONTROLLER7", + "device_parent": "MUX7" + }, + "i2c": { + "CONTROLLERS": [{ + "dev_name": "i2c-68", + "dev": "TEMP-NODE7" + }] + } + }, + + "TEMP-NODE7": { + "dev_info": { + "device_type": "TEMP-NODE", + "device_name": "FAN-CONN-TEMP-NODE-A", + "device_parent": "MUX7" + }, + "i2c": { + "topo_info": { + "dev_addr": "0x44" + }, + "DEVICES": [{ + "dev": "TEMP17" + },{ + "dev": "TEMP18" + } + ] + } + }, + + "TEMP17": { + "dev_info": { + "device_type": "TEMP_SENSOR", + "device_name": "FAN-CONN-A-TEMP0", + "device_parent": "MUX7" + }, + "dev_attr": { + "display_name": "Temp_FAN_CONN_A_0" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x44", + "dev_addr": "0x48", + "dev_type": "lm75" + }, + "attr_list": [{ + "attr_name": "temp1_high_threshold", + "drv_attr_name": "temp1_max" + }, + { + "attr_name": "temp1_max_hyst" + }, + { + "attr_name": "temp1_input" + } + ] + } + }, + + "TEMP18": { + "dev_info": { + "device_type": "TEMP_SENSOR", + "device_name": "FAN-CONN-A-TEMP1", + "device_parent": "MUX7" + }, + "dev_attr": { + "display_name": "Temp_FAN_CONN_A_1" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x44", + "dev_addr": "0x49", + "dev_type": "lm75" + }, + "attr_list": [{ + "attr_name": "temp1_high_threshold", + "drv_attr_name": "temp1_max" + }, + { + "attr_name": "temp1_max_hyst" + }, + { + "attr_name": "temp1_input" + } + ] + } + }, + + "FAN-CPLD-A": { + "dev_info": { + "device_type": "CPLD", + "device_name": "FAN-CPLD-A", + "device_parent": "V-CONTROLLER7" + }, + "i2c": { + "topo_info": { + "parent_bus": "0xe", + "dev_addr": "0x0d", + "dev_type": "i2c_cpld" + }, + "dev_attr": {} + } + }, + + "CPLD-OCORE1": { + "dev_info": { + "device_type": "CPLD-OCORE", + "device_name": "CPLD-OCORE1", + "device_parent": "SYSTEM" + }, + "i2c": { + "topo_info": { + "dev_addr": "0x3" + }, + "DEVICES": [ + { + "dev": "LC1-CPLD-A" + }, + { + "dev": "LC1-CPLD-B" + }, + { + "dev": "LC1-EEPROM" + }, + { + "dev": "LC1-TLV-EEPROM" + }, + { + "dev": "LC1-PORT-MUX0" + }, + { + "dev": "LC1-PORT-MUX1" + }, + { + "dev": "LC1-PORT-MUX2" + }, + { + "dev": "LC1-PORT-MUX3" + } + ] + } + }, + + "LC1-CPLD-A": { + "dev_info": { + "device_type": "CPLD", + "device_name": "LC1-CPLD-A", + "device_parent": "CPLD-OCORE1" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x3", + "dev_addr": "0x30", + "dev_type": "i2c_cpld" + }, + "dev_attr": {} + } + }, + + "LC1-CPLD-B": { + "dev_info": { + "device_type": "CPLD", + "device_name": "LC1-CPLD-B", + "device_parent": "CPLD-OCORE1" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x3", + "dev_addr": "0x31", + "dev_type": "i2c_cpld" + }, + "dev_attr": {} + } + }, + + "LC1-EEPROM": { + "dev_info": { + "device_type": "EEPROM", + "device_name": "LC1-EEPROM", + "device_parent": "CPLD-OCORE1" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x3", + "dev_addr": "0x56", + "dev_type": "24c02" + }, + "dev_attr": { + "access_mode": "BLOCK" + }, + "attr_list": [{ + "attr_name": "eeprom" + }] + } + }, + + "LC1-TLV-EEPROM": { + "dev_info": { + "device_type": "EEPROM", + "device_name": "LC1-TLV-EEPROM", + "device_parent": "CPLD-OCORE1" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x3", + "dev_addr": "0x57", + "dev_type": "24c02" + }, + "dev_attr": { + "access_mode": "BLOCK" + }, + "attr_list": [{ + "attr_name": "eeprom" + }] + } + }, + + "LC1-PORT-MUX0": { + "dev_info": { + "device_type": "MUX", + "device_name": "LC1-PORT-MUX0", + "device_parent": "CPLD-OCORE1" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x3", + "dev_addr": "0x70", + "dev_type": "pca9548" + }, + "dev_attr": { + "virt_bus": "0x47" + }, + "channel": [{ + "chn": "0", + "dev": "PORT1" + }, + { + "chn": "1", + "dev": "PORT2" + }, + { + "chn": "2", + "dev": "PORT3" + }, + { + "chn": "3", + "dev": "PORT4" + }, + { + "chn": "4", + "dev": "PORT5" + }, + { + "chn": "5", + "dev": "PORT6" + }, + { + "chn": "6", + "dev": "PORT7" + }, + { + "chn": "7", + "dev": "PORT8" + } + ] + } + }, + + "PORT1": { + "dev_info": { + "device_type": "QSFP", + "device_name": "PORT1", + "device_parent": "LC1-PORT-MUX0" + }, + "dev_attr": { + "dev_idx": "1" + }, + "i2c": { + "interface": [{ + "itf": "eeprom", + "dev": "PORT1-EEPROM" + }, { + "itf": "control", + "dev": "PORT1-CTRL" + }] + } + }, + + "PORT1-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT1-EEPROM", + "device_parent": "LC1-PORT-MUX0", + "virt_parent": "PORT1" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x47", + "dev_addr": "0x50", + "dev_type": "optoe1" + }, + "attr_list": [{ + "attr_name": "eeprom" + }] + } + }, + + "PORT1-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT1-CTRL", + "device_parent": "LC1-PORT-MUX0", + "virt_parent": "PORT1" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x47", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [{ + "attr_name": "xcvr_present", + "attr_devname": "LC1-CPLD-A", + "attr_devaddr": "0x30", + "attr_devtype": "cpld", + "attr_offset": "0x10", + "attr_mask": "0x0", + "attr_cmpval": "0x0", + "attr_len": "1" + }, { + "attr_name": "xcvr_reset", + "attr_devname": "LC1-CPLD-A", + "attr_devaddr": "0x30", + "attr_devtype": "cpld", + "attr_offset": "0x14", + "attr_mask": "0x0", + "attr_cmpval": "0x0", + "attr_len": "1" + }] + } + }, + + "PORT2": { + "dev_info": { + "device_type": "QSFP", + "device_name": "PORT2", + "device_parent": "LC1-PORT-MUX0" + }, + "dev_attr": { + "dev_idx": "2" + }, + "i2c": { + "interface": [{ + "itf": "eeprom", + "dev": "PORT2-EEPROM" + }, { + "itf": "control", + "dev": "PORT2-CTRL" + }] + } + }, + + "PORT2-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT2-EEPROM", + "device_parent": "LC1-PORT-MUX0", + "virt_parent": "PORT2" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x48", + "dev_addr": "0x50", + "dev_type": "optoe1" + }, + "attr_list": [{ + "attr_name": "eeprom" + }] + } + }, + + "PORT2-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT2-CTRL", + "device_parent": "LC1-PORT-MUX0", + "virt_parent": "PORT2" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x48", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [{ + "attr_name": "xcvr_present", + "attr_devname": "LC1-CPLD-A", + "attr_devaddr": "0x30", + "attr_devtype": "cpld", + "attr_offset": "0x10", + "attr_mask": "0x1", + "attr_cmpval": "0x0", + "attr_len": "1" + }, { + "attr_name": "xcvr_reset", + "attr_devname": "LC1-CPLD-A", + "attr_devaddr": "0x30", + "attr_devtype": "cpld", + "attr_offset": "0x14", + "attr_mask": "0x1", + "attr_cmpval": "0x0", + "attr_len": "1" + }] + } + }, + + "PORT3": { + "dev_info": { + "device_type": "QSFP", + "device_name": "PORT3", + "device_parent": "LC1-PORT-MUX0" + }, + "dev_attr": { + "dev_idx": "3" + }, + "i2c": { + "interface": [{ + "itf": "eeprom", + "dev": "PORT3-EEPROM" + }, { + "itf": "control", + "dev": "PORT3-CTRL" + }] + } + }, + + "PORT3-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT3-EEPROM", + "device_parent": "LC1-PORT-MUX0", + "virt_parent": "PORT3" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x49", + "dev_addr": "0x50", + "dev_type": "optoe1" + }, + "attr_list": [{ + "attr_name": "eeprom" + }] + } + }, + + "PORT3-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT3-CTRL", + "device_parent": "LC1-PORT-MUX0", + "virt_parent": "PORT3" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x49", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [{ + "attr_name": "xcvr_present", + "attr_devname": "LC1-CPLD-A", + "attr_devaddr": "0x30", + "attr_devtype": "cpld", + "attr_offset": "0x10", + "attr_mask": "0x2", + "attr_cmpval": "0x0", + "attr_len": "1" + }, { + "attr_name": "xcvr_reset", + "attr_devname": "LC1-CPLD-A", + "attr_devaddr": "0x30", + "attr_devtype": "cpld", + "attr_offset": "0x14", + "attr_mask": "0x2", + "attr_cmpval": "0x0", + "attr_len": "1" + }] + } + }, + + + "PORT4": { + "dev_info": { + "device_type": "QSFP", + "device_name": "PORT4", + "device_parent": "LC1-PORT-MUX0" + }, + "dev_attr": { + "dev_idx": "4" + }, + "i2c": { + "interface": [{ + "itf": "eeprom", + "dev": "PORT4-EEPROM" + }, { + "itf": "control", + "dev": "PORT4-CTRL" + }] + } + }, + + "PORT4-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT4-EEPROM", + "device_parent": "LC1-PORT-MUX0", + "virt_parent": "PORT4" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x4a", + "dev_addr": "0x50", + "dev_type": "optoe1" + }, + "attr_list": [{ + "attr_name": "eeprom" + }] + } + }, + + "PORT4-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT4-CTRL", + "device_parent": "LC1-PORT-MUX0", + "virt_parent": "PORT4" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x4a", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [{ + "attr_name": "xcvr_present", + "attr_devname": "LC1-CPLD-A", + "attr_devaddr": "0x30", + "attr_devtype": "cpld", + "attr_offset": "0x10", + "attr_mask": "0x3", + "attr_cmpval": "0x0", + "attr_len": "1" + }, { + "attr_name": "xcvr_reset", + "attr_devname": "LC1-CPLD-A", + "attr_devaddr": "0x30", + "attr_devtype": "cpld", + "attr_offset": "0x14", + "attr_mask": "0x3", + "attr_cmpval": "0x0", + "attr_len": "1" + }] + } + }, + + + "PORT5": { + "dev_info": { + "device_type": "QSFP", + "device_name": "PORT5", + "device_parent": "LC1-PORT-MUX0" + }, + "dev_attr": { + "dev_idx": "5" + }, + "i2c": { + "interface": [{ + "itf": "eeprom", + "dev": "PORT5-EEPROM" + }, { + "itf": "control", + "dev": "PORT5-CTRL" + }] + } + }, + + "PORT5-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT5-EEPROM", + "device_parent": "LC1-PORT-MUX0", + "virt_parent": "PORT5" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x4b", + "dev_addr": "0x50", + "dev_type": "optoe1" + }, + "attr_list": [{ + "attr_name": "eeprom" + }] + } + }, + + "PORT5-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT5-CTRL", + "device_parent": "LC1-PORT-MUX0", + "virt_parent": "PORT5" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x4b", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [{ + "attr_name": "xcvr_present", + "attr_devname": "LC1-CPLD-A", + "attr_devaddr": "0x30", + "attr_devtype": "cpld", + "attr_offset": "0x10", + "attr_mask": "0x4", + "attr_cmpval": "0x0", + "attr_len": "1" + }, { + "attr_name": "xcvr_reset", + "attr_devname": "LC1-CPLD-A", + "attr_devaddr": "0x30", + "attr_devtype": "cpld", + "attr_offset": "0x14", + "attr_mask": "0x4", + "attr_cmpval": "0x0", + "attr_len": "1" + }] + } + }, + + + "PORT6": { + "dev_info": { + "device_type": "QSFP", + "device_name": "PORT6", + "device_parent": "LC1-PORT-MUX0" + }, + "dev_attr": { + "dev_idx": "6" + }, + "i2c": { + "interface": [{ + "itf": "eeprom", + "dev": "PORT6-EEPROM" + }, { + "itf": "control", + "dev": "PORT6-CTRL" + }] + } + }, + + "PORT6-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT6-EEPROM", + "device_parent": "LC1-PORT-MUX0", + "virt_parent": "PORT6" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x4c", + "dev_addr": "0x50", + "dev_type": "optoe1" + }, + "attr_list": [{ + "attr_name": "eeprom" + }] + } + }, + + "PORT6-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT6-CTRL", + "device_parent": "LC1-PORT-MUX0", + "virt_parent": "PORT6" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x4c", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [{ + "attr_name": "xcvr_present", + "attr_devname": "LC1-CPLD-A", + "attr_devaddr": "0x30", + "attr_devtype": "cpld", + "attr_offset": "0x10", + "attr_mask": "0x5", + "attr_cmpval": "0x0", + "attr_len": "1" + }, { + "attr_name": "xcvr_reset", + "attr_devname": "LC1-CPLD-A", + "attr_devaddr": "0x30", + "attr_devtype": "cpld", + "attr_offset": "0x14", + "attr_mask": "0x5", + "attr_cmpval": "0x0", + "attr_len": "1" + }] + } + }, + + "PORT7": { + "dev_info": { + "device_type": "QSFP", + "device_name": "PORT7", + "device_parent": "LC1-PORT-MUX0" + }, + "dev_attr": { + "dev_idx": "7" + }, + "i2c": { + "interface": [{ + "itf": "eeprom", + "dev": "PORT7-EEPROM" + }, { + "itf": "control", + "dev": "PORT7-CTRL" + }] + } + }, + + "PORT7-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT7-EEPROM", + "device_parent": "LC1-PORT-MUX0", + "virt_parent": "PORT7" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x4d", + "dev_addr": "0x50", + "dev_type": "optoe1" + }, + "attr_list": [{ + "attr_name": "eeprom" + }] + } + }, + + "PORT7-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT7-CTRL", + "device_parent": "LC1-PORT-MUX0", + "virt_parent": "PORT7" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x4d", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [{ + "attr_name": "xcvr_present", + "attr_devname": "LC1-CPLD-A", + "attr_devaddr": "0x30", + "attr_devtype": "cpld", + "attr_offset": "0x10", + "attr_mask": "0x6", + "attr_cmpval": "0x0", + "attr_len": "1" + }, { + "attr_name": "xcvr_reset", + "attr_devname": "LC1-CPLD-A", + "attr_devaddr": "0x30", + "attr_devtype": "cpld", + "attr_offset": "0x14", + "attr_mask": "0x6", + "attr_cmpval": "0x0", + "attr_len": "1" + }] + } + }, + + "PORT8": { + "dev_info": { + "device_type": "QSFP", + "device_name": "PORT8", + "device_parent": "LC1-PORT-MUX0" + }, + "dev_attr": { + "dev_idx": "8" + }, + "i2c": { + "interface": [{ + "itf": "eeprom", + "dev": "PORT8-EEPROM" + }, { + "itf": "control", + "dev": "PORT8-CTRL" + }] + } + }, + + "PORT8-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT8-EEPROM", + "device_parent": "LC1-PORT-MUX0", + "virt_parent": "PORT8" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x4e", + "dev_addr": "0x50", + "dev_type": "optoe1" + }, + "attr_list": [{ + "attr_name": "eeprom" + }] + } + }, + + "PORT8-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT8-CTRL", + "device_parent": "LC1-PORT-MUX0", + "virt_parent": "PORT8" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x4e", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [{ + "attr_name": "xcvr_present", + "attr_devname": "LC1-CPLD-A", + "attr_devaddr": "0x30", + "attr_devtype": "cpld", + "attr_offset": "0x10", + "attr_mask": "0x7", + "attr_cmpval": "0x0", + "attr_len": "1" + }, { + "attr_name": "xcvr_reset", + "attr_devname": "LC1-CPLD-A", + "attr_devaddr": "0x30", + "attr_devtype": "cpld", + "attr_offset": "0x14", + "attr_mask": "0x7", + "attr_cmpval": "0x0", + "attr_len": "1" + }] + } + }, + + "LC1-PORT-MUX1": { + "dev_info": { + "device_type": "MUX", + "device_name": "LC1-PORT-MUX1", + "device_parent": "CPLD-OCORE1" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x3", + "dev_addr": "0x71", + "dev_type": "pca9548" + }, + "dev_attr": { + "virt_bus": "0x4f" + }, + "channel": [{ + "chn": "0", + "dev": "PORT9" + }, + { + "chn": "1", + "dev": "PORT10" + }, + { + "chn": "2", + "dev": "PORT11" + }, + { + "chn": "3", + "dev": "PORT12" + }, + { + "chn": "4", + "dev": "PORT13" + }, + { + "chn": "5", + "dev": "PORT14" + }, + { + "chn": "6", + "dev": "PORT15" + }, + { + "chn": "7", + "dev": "PORT16" + } + ] + } + }, + + "PORT9": { + "dev_info": { + "device_type": "QSFP", + "device_name": "PORT9", + "device_parent": "LC1-PORT-MUX1" + }, + "dev_attr": { + "dev_idx": "9" + }, + "i2c": { + "interface": [{ + "itf": "eeprom", + "dev": "PORT9-EEPROM" + }, { + "itf": "control", + "dev": "PORT9-CTRL" + }] + } + }, + + "PORT9-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT9-EEPROM", + "device_parent": "LC1-PORT-MUX1", + "virt_parent": "PORT9" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x4f", + "dev_addr": "0x50", + "dev_type": "optoe1" + }, + "attr_list": [{ + "attr_name": "eeprom" + }] + } + }, + + "PORT9-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT9-CTRL", + "device_parent": "LC1-PORT-MUX1", + "virt_parent": "PORT9" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x4f", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [{ + "attr_name": "xcvr_present", + "attr_devname": "LC1-CPLD-A", + "attr_devaddr": "0x30", + "attr_devtype": "cpld", + "attr_offset": "0x11", + "attr_mask": "0x0", + "attr_cmpval": "0x0", + "attr_len": "1" + }, { + "attr_name": "xcvr_reset", + "attr_devname": "LC1-CPLD-A", + "attr_devaddr": "0x30", + "attr_devtype": "cpld", + "attr_offset": "0x15", + "attr_mask": "0x0", + "attr_cmpval": "0x0", + "attr_len": "1" + }] + } + }, + + "PORT10": { + "dev_info": { + "device_type": "QSFP", + "device_name": "PORT10", + "device_parent": "LC1-PORT-MUX1" + }, + "dev_attr": { + "dev_idx": "10" + }, + "i2c": { + "interface": [{ + "itf": "eeprom", + "dev": "PORT10-EEPROM" + }, { + "itf": "control", + "dev": "PORT10-CTRL" + }] + } + }, + + "PORT10-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT10-EEPROM", + "device_parent": "LC1-PORT-MUX1", + "virt_parent": "PORT10" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x50", + "dev_addr": "0x50", + "dev_type": "optoe1" + }, + "attr_list": [{ + "attr_name": "eeprom" + }] + } + }, + + "PORT10-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT10-CTRL", + "device_parent": "LC1-PORT-MUX1", + "virt_parent": "PORT10" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x50", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [{ + "attr_name": "xcvr_present", + "attr_devname": "LC1-CPLD-A", + "attr_devaddr": "0x30", + "attr_devtype": "cpld", + "attr_offset": "0x11", + "attr_mask": "0x1", + "attr_cmpval": "0x0", + "attr_len": "1" + }, { + "attr_name": "xcvr_reset", + "attr_devname": "LC1-CPLD-A", + "attr_devaddr": "0x30", + "attr_devtype": "cpld", + "attr_offset": "0x15", + "attr_mask": "0x1", + "attr_cmpval": "0x0", + "attr_len": "1" + }] + } + }, + + "PORT11": { + "dev_info": { + "device_type": "QSFP", + "device_name": "PORT11", + "device_parent": "LC1-PORT-MUX1" + }, + "dev_attr": { + "dev_idx": "11" + }, + "i2c": { + "interface": [{ + "itf": "eeprom", + "dev": "PORT11-EEPROM" + }, { + "itf": "control", + "dev": "PORT11-CTRL" + }] + } + }, + + "PORT11-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT11-EEPROM", + "device_parent": "LC1-PORT-MUX1", + "virt_parent": "PORT11" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x51", + "dev_addr": "0x50", + "dev_type": "optoe1" + }, + "attr_list": [{ + "attr_name": "eeprom" + }] + } + }, + + "PORT11-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT11-CTRL", + "device_parent": "LC1-PORT-MUX1", + "virt_parent": "PORT11" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x51", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [{ + "attr_name": "xcvr_present", + "attr_devname": "LC1-CPLD-A", + "attr_devaddr": "0x30", + "attr_devtype": "cpld", + "attr_offset": "0x11", + "attr_mask": "0x2", + "attr_cmpval": "0x0", + "attr_len": "1" + }, { + "attr_name": "xcvr_reset", + "attr_devname": "LC1-CPLD-A", + "attr_devaddr": "0x30", + "attr_devtype": "cpld", + "attr_offset": "0x15", + "attr_mask": "0x2", + "attr_cmpval": "0x0", + "attr_len": "1" + }] + } + }, + + "PORT12": { + "dev_info": { + "device_type": "QSFP", + "device_name": "PORT12", + "device_parent": "LC1-PORT-MUX1" + }, + "dev_attr": { + "dev_idx": "12" + }, + "i2c": { + "interface": [{ + "itf": "eeprom", + "dev": "PORT12-EEPROM" + }, { + "itf": "control", + "dev": "PORT12-CTRL" + }] + } + }, + + "PORT12-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT12-EEPROM", + "device_parent": "LC1-PORT-MUX1", + "virt_parent": "PORT12" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x52", + "dev_addr": "0x50", + "dev_type": "optoe1" + }, + "attr_list": [{ + "attr_name": "eeprom" + }] + } + }, + + "PORT12-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT12-CTRL", + "device_parent": "LC1-PORT-MUX1", + "virt_parent": "PORT12" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x52", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [{ + "attr_name": "xcvr_present", + "attr_devname": "LC1-CPLD-A", + "attr_devaddr": "0x30", + "attr_devtype": "cpld", + "attr_offset": "0x11", + "attr_mask": "0x3", + "attr_cmpval": "0x0", + "attr_len": "1" + }, { + "attr_name": "xcvr_reset", + "attr_devname": "LC1-CPLD-A", + "attr_devaddr": "0x30", + "attr_devtype": "cpld", + "attr_offset": "0x15", + "attr_mask": "0x3", + "attr_cmpval": "0x0", + "attr_len": "1" + }] + } + }, + + "PORT13": { + "dev_info": { + "device_type": "QSFP", + "device_name": "PORT13", + "device_parent": "LC1-PORT-MUX1" + }, + "dev_attr": { + "dev_idx": "13" + }, + "i2c": { + "interface": [{ + "itf": "eeprom", + "dev": "PORT13-EEPROM" + }, { + "itf": "control", + "dev": "PORT13-CTRL" + }] + } + }, + + "PORT13-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT13-EEPROM", + "device_parent": "LC1-PORT-MUX1", + "virt_parent": "PORT13" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x53", + "dev_addr": "0x50", + "dev_type": "optoe1" + }, + "attr_list": [{ + "attr_name": "eeprom" + }] + } + }, + + "PORT13-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT13-CTRL", + "device_parent": "LC1-PORT-MUX1", + "virt_parent": "PORT13" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x53", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [{ + "attr_name": "xcvr_present", + "attr_devname": "LC1-CPLD-A", + "attr_devaddr": "0x30", + "attr_devtype": "cpld", + "attr_offset": "0x11", + "attr_mask": "0x4", + "attr_cmpval": "0x0", + "attr_len": "1" + }, { + "attr_name": "xcvr_reset", + "attr_devname": "LC1-CPLD-A", + "attr_devaddr": "0x30", + "attr_devtype": "cpld", + "attr_offset": "0x15", + "attr_mask": "0x4", + "attr_cmpval": "0x0", + "attr_len": "1" + }] + } + }, + + "PORT14": { + "dev_info": { + "device_type": "QSFP", + "device_name": "PORT14", + "device_parent": "LC1-PORT-MUX1" + }, + "dev_attr": { + "dev_idx": "14" + }, + "i2c": { + "interface": [{ + "itf": "eeprom", + "dev": "PORT14-EEPROM" + }, { + "itf": "control", + "dev": "PORT14-CTRL" + }] + } + }, + + "PORT14-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT14-EEPROM", + "device_parent": "LC1-PORT-MUX1", + "virt_parent": "PORT14" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x54", + "dev_addr": "0x50", + "dev_type": "optoe1" + }, + "attr_list": [{ + "attr_name": "eeprom" + }] + } + }, + + "PORT14-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT14-CTRL", + "device_parent": "LC1-PORT-MUX1", + "virt_parent": "PORT14" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x54", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [{ + "attr_name": "xcvr_present", + "attr_devname": "LC1-CPLD-A", + "attr_devaddr": "0x30", + "attr_devtype": "cpld", + "attr_offset": "0x11", + "attr_mask": "0x5", + "attr_cmpval": "0x0", + "attr_len": "1" + }, { + "attr_name": "xcvr_reset", + "attr_devname": "LC1-CPLD-A", + "attr_devaddr": "0x30", + "attr_devtype": "cpld", + "attr_offset": "0x15", + "attr_mask": "0x5", + "attr_cmpval": "0x0", + "attr_len": "1" + }] + } + }, + + "PORT15": { + "dev_info": { + "device_type": "QSFP", + "device_name": "PORT15", + "device_parent": "LC1-PORT-MUX1" + }, + "dev_attr": { + "dev_idx": "15" + }, + "i2c": { + "interface": [{ + "itf": "eeprom", + "dev": "PORT15-EEPROM" + }, { + "itf": "control", + "dev": "PORT15-CTRL" + }] + } + }, + + "PORT15-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT15-EEPROM", + "device_parent": "LC1-PORT-MUX1", + "virt_parent": "PORT15" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x55", + "dev_addr": "0x50", + "dev_type": "optoe1" + }, + "attr_list": [{ + "attr_name": "eeprom" + }] + } + }, + + "PORT15-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT15-CTRL", + "device_parent": "LC1-PORT-MUX1", + "virt_parent": "PORT15" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x55", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [{ + "attr_name": "xcvr_present", + "attr_devname": "LC1-CPLD-A", + "attr_devaddr": "0x30", + "attr_devtype": "cpld", + "attr_offset": "0x11", + "attr_mask": "0x6", + "attr_cmpval": "0x0", + "attr_len": "1" + }, { + "attr_name": "xcvr_reset", + "attr_devname": "LC1-CPLD-A", + "attr_devaddr": "0x30", + "attr_devtype": "cpld", + "attr_offset": "0x15", + "attr_mask": "0x6", + "attr_cmpval": "0x0", + "attr_len": "1" + }] + } + }, + + "PORT16": { + "dev_info": { + "device_type": "QSFP", + "device_name": "PORT16", + "device_parent": "LC1-PORT-MUX1" + }, + "dev_attr": { + "dev_idx": "16" + }, + "i2c": { + "interface": [{ + "itf": "eeprom", + "dev": "PORT16-EEPROM" + }, { + "itf": "control", + "dev": "PORT16-CTRL" + }] + } + }, + + "PORT16-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT16-EEPROM", + "device_parent": "LC1-PORT-MUX1", + "virt_parent": "PORT16" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x56", + "dev_addr": "0x50", + "dev_type": "optoe1" + }, + "attr_list": [{ + "attr_name": "eeprom" + }] + } + }, + + "PORT16-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT16-CTRL", + "device_parent": "LC1-PORT-MUX1", + "virt_parent": "PORT16" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x56", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [{ + "attr_name": "xcvr_present", + "attr_devname": "LC1-CPLD-A", + "attr_devaddr": "0x30", + "attr_devtype": "cpld", + "attr_offset": "0x11", + "attr_mask": "0x7", + "attr_cmpval": "0x0", + "attr_len": "1" + }, { + "attr_name": "xcvr_reset", + "attr_devname": "LC1-CPLD-A", + "attr_devaddr": "0x30", + "attr_devtype": "cpld", + "attr_offset": "0x15", + "attr_mask": "0x7", + "attr_cmpval": "0x0", + "attr_len": "1" + }] + } + }, + + "LC1-PORT-MUX2": { + "dev_info": { + "device_type": "MUX", + "device_name": "LC1-PORT-MUX2", + "device_parent": "CPLD-OCORE1" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x3", + "dev_addr": "0x72", + "dev_type": "pca9548" + }, + "dev_attr": { + "virt_bus": "0x57" + }, + "channel": [{ + "chn": "0", + "dev": "PORT17" + }, + { + "chn": "1", + "dev": "PORT18" + }, + { + "chn": "2", + "dev": "PORT19" + }, + { + "chn": "3", + "dev": "PORT20" + }, + { + "chn": "4", + "dev": "PORT21" + }, + { + "chn": "5", + "dev": "PORT22" + }, + { + "chn": "6", + "dev": "PORT23" + }, + { + "chn": "7", + "dev": "PORT24" + } + ] + } + }, + + "PORT17": { + "dev_info": { + "device_type": "QSFP", + "device_name": "PORT17", + "device_parent": "LC1-PORT-MUX2" + }, + "dev_attr": { + "dev_idx": "17" + }, + "i2c": { + "interface": [{ + "itf": "eeprom", + "dev": "PORT17-EEPROM" + }, { + "itf": "control", + "dev": "PORT17-CTRL" + }] + } + }, + + "PORT17-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT17-EEPROM", + "device_parent": "LC1-PORT-MUX2", + "virt_parent": "PORT17" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x57", + "dev_addr": "0x50", + "dev_type": "optoe1" + }, + "attr_list": [{ + "attr_name": "eeprom" + }] + } + }, + + "PORT17-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT17-CTRL", + "device_parent": "LC1-PORT-MUX2", + "virt_parent": "PORT17" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x57", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [{ + "attr_name": "xcvr_present", + "attr_devname": "LC1-CPLD-B", + "attr_devaddr": "0x31", + "attr_devtype": "cpld", + "attr_offset": "0x10", + "attr_mask": "0x0", + "attr_cmpval": "0x0", + "attr_len": "1" + }, { + "attr_name": "xcvr_reset", + "attr_devname": "LC1-CPLD-B", + "attr_devaddr": "0x31", + "attr_devtype": "cpld", + "attr_offset": "0x14", + "attr_mask": "0x0", + "attr_cmpval": "0x0", + "attr_len": "1" + }] + } + }, + + "PORT18": { + "dev_info": { + "device_type": "QSFP", + "device_name": "PORT18", + "device_parent": "LC1-PORT-MUX2" + }, + "dev_attr": { + "dev_idx": "18" + }, + "i2c": { + "interface": [{ + "itf": "eeprom", + "dev": "PORT18-EEPROM" + }, { + "itf": "control", + "dev": "PORT18-CTRL" + }] + } + }, + + "PORT18-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT18-EEPROM", + "device_parent": "LC1-PORT-MUX2", + "virt_parent": "PORT18" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x58", + "dev_addr": "0x50", + "dev_type": "optoe1" + }, + "attr_list": [{ + "attr_name": "eeprom" + }] + } + }, + + "PORT18-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT18-CTRL", + "device_parent": "LC1-PORT-MUX2", + "virt_parent": "PORT18" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x58", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [{ + "attr_name": "xcvr_present", + "attr_devname": "LC1-CPLD-B", + "attr_devaddr": "0x31", + "attr_devtype": "cpld", + "attr_offset": "0x10", + "attr_mask": "0x1", + "attr_cmpval": "0x0", + "attr_len": "1" + }, { + "attr_name": "xcvr_reset", + "attr_devname": "LC1-CPLD-B", + "attr_devaddr": "0x31", + "attr_devtype": "cpld", + "attr_offset": "0x14", + "attr_mask": "0x1", + "attr_cmpval": "0x0", + "attr_len": "1" + }] + } + }, + + "PORT19": { + "dev_info": { + "device_type": "QSFP", + "device_name": "PORT19", + "device_parent": "LC1-PORT-MUX2" + }, + "dev_attr": { + "dev_idx": "19" + }, + "i2c": { + "interface": [{ + "itf": "eeprom", + "dev": "PORT19-EEPROM" + }, { + "itf": "control", + "dev": "PORT19-CTRL" + }] + } + }, + + "PORT19-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT19-EEPROM", + "device_parent": "LC1-PORT-MUX2", + "virt_parent": "PORT19" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x59", + "dev_addr": "0x50", + "dev_type": "optoe1" + }, + "attr_list": [{ + "attr_name": "eeprom" + }] + } + }, + + "PORT19-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT19-CTRL", + "device_parent": "LC1-PORT-MUX2", + "virt_parent": "PORT19" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x59", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [{ + "attr_name": "xcvr_present", + "attr_devname": "LC1-CPLD-B", + "attr_devaddr": "0x31", + "attr_devtype": "cpld", + "attr_offset": "0x10", + "attr_mask": "0x2", + "attr_cmpval": "0x0", + "attr_len": "1" + }, { + "attr_name": "xcvr_reset", + "attr_devname": "LC1-CPLD-B", + "attr_devaddr": "0x31", + "attr_devtype": "cpld", + "attr_offset": "0x14", + "attr_mask": "0x2", + "attr_cmpval": "0x0", + "attr_len": "1" + }] + } + }, + + "PORT20": { + "dev_info": { + "device_type": "QSFP", + "device_name": "PORT20", + "device_parent": "LC1-PORT-MUX2" + }, + "dev_attr": { + "dev_idx": "20" + }, + "i2c": { + "interface": [{ + "itf": "eeprom", + "dev": "PORT20-EEPROM" + }, { + "itf": "control", + "dev": "PORT20-CTRL" + }] + } + }, + + "PORT20-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT20-EEPROM", + "device_parent": "LC1-PORT-MUX2", + "virt_parent": "PORT20" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x5a", + "dev_addr": "0x50", + "dev_type": "optoe1" + }, + "attr_list": [{ + "attr_name": "eeprom" + }] + } + }, + + "PORT20-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT20-CTRL", + "device_parent": "LC1-PORT-MUX2", + "virt_parent": "PORT20" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x5a", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [{ + "attr_name": "xcvr_present", + "attr_devname": "LC1-CPLD-B", + "attr_devaddr": "0x31", + "attr_devtype": "cpld", + "attr_offset": "0x10", + "attr_mask": "0x3", + "attr_cmpval": "0x0", + "attr_len": "1" + }, { + "attr_name": "xcvr_reset", + "attr_devname": "LC1-CPLD-B", + "attr_devaddr": "0x31", + "attr_devtype": "cpld", + "attr_offset": "0x14", + "attr_mask": "0x3", + "attr_cmpval": "0x0", + "attr_len": "1" + }] + } + }, + + "PORT21": { + "dev_info": { + "device_type": "QSFP", + "device_name": "PORT21", + "device_parent": "LC1-PORT-MUX2" + }, + "dev_attr": { + "dev_idx": "21" + }, + "i2c": { + "interface": [{ + "itf": "eeprom", + "dev": "PORT21-EEPROM" + }, { + "itf": "control", + "dev": "PORT21-CTRL" + }] + } + }, + + "PORT21-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT21-EEPROM", + "device_parent": "LC1-PORT-MUX2", + "virt_parent": "PORT21" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x5b", + "dev_addr": "0x50", + "dev_type": "optoe1" + }, + "attr_list": [{ + "attr_name": "eeprom" + }] + } + }, + + "PORT21-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT21-CTRL", + "device_parent": "LC1-PORT-MUX2", + "virt_parent": "PORT21" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x5b", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [{ + "attr_name": "xcvr_present", + "attr_devname": "LC1-CPLD-B", + "attr_devaddr": "0x31", + "attr_devtype": "cpld", + "attr_offset": "0x10", + "attr_mask": "0x4", + "attr_cmpval": "0x0", + "attr_len": "1" + }, { + "attr_name": "xcvr_reset", + "attr_devname": "LC1-CPLD-B", + "attr_devaddr": "0x31", + "attr_devtype": "cpld", + "attr_offset": "0x14", + "attr_mask": "0x4", + "attr_cmpval": "0x0", + "attr_len": "1" + }] + } + }, + + "PORT22": { + "dev_info": { + "device_type": "QSFP", + "device_name": "PORT22", + "device_parent": "LC1-PORT-MUX2" + }, + "dev_attr": { + "dev_idx": "22" + }, + "i2c": { + "interface": [{ + "itf": "eeprom", + "dev": "PORT22-EEPROM" + }, { + "itf": "control", + "dev": "PORT22-CTRL" + }] + } + }, + + "PORT22-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT22-EEPROM", + "device_parent": "LC1-PORT-MUX2", + "virt_parent": "PORT22" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x5c", + "dev_addr": "0x50", + "dev_type": "optoe1" + }, + "attr_list": [{ + "attr_name": "eeprom" + }] + } + }, + + "PORT22-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT22-CTRL", + "device_parent": "LC1-PORT-MUX2", + "virt_parent": "PORT22" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x5c", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [{ + "attr_name": "xcvr_present", + "attr_devname": "LC1-CPLD-B", + "attr_devaddr": "0x31", + "attr_devtype": "cpld", + "attr_offset": "0x10", + "attr_mask": "0x5", + "attr_cmpval": "0x0", + "attr_len": "1" + }, { + "attr_name": "xcvr_reset", + "attr_devname": "LC1-CPLD-B", + "attr_devaddr": "0x31", + "attr_devtype": "cpld", + "attr_offset": "0x14", + "attr_mask": "0x5", + "attr_cmpval": "0x0", + "attr_len": "1" + }] + } + }, + + "PORT23": { + "dev_info": { + "device_type": "QSFP", + "device_name": "PORT23", + "device_parent": "LC1-PORT-MUX2" + }, + "dev_attr": { + "dev_idx": "23" + }, + "i2c": { + "interface": [{ + "itf": "eeprom", + "dev": "PORT23-EEPROM" + }, { + "itf": "control", + "dev": "PORT23-CTRL" + }] + } + }, + + "PORT23-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT23-EEPROM", + "device_parent": "LC1-PORT-MUX2", + "virt_parent": "PORT23" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x5d", + "dev_addr": "0x50", + "dev_type": "optoe1" + }, + "attr_list": [{ + "attr_name": "eeprom" + }] + } + }, + + "PORT23-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT23-CTRL", + "device_parent": "LC1-PORT-MUX2", + "virt_parent": "PORT23" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x5d", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [{ + "attr_name": "xcvr_present", + "attr_devname": "LC1-CPLD-B", + "attr_devaddr": "0x31", + "attr_devtype": "cpld", + "attr_offset": "0x10", + "attr_mask": "0x6", + "attr_cmpval": "0x0", + "attr_len": "1" + }, { + "attr_name": "xcvr_reset", + "attr_devname": "LC1-CPLD-B", + "attr_devaddr": "0x31", + "attr_devtype": "cpld", + "attr_offset": "0x14", + "attr_mask": "0x6", + "attr_cmpval": "0x0", + "attr_len": "1" + }] + } + }, + + "PORT24": { + "dev_info": { + "device_type": "QSFP", + "device_name": "PORT24", + "device_parent": "LC1-PORT-MUX2" + }, + "dev_attr": { + "dev_idx": "24" + }, + "i2c": { + "interface": [{ + "itf": "eeprom", + "dev": "PORT24-EEPROM" + }, { + "itf": "control", + "dev": "PORT24-CTRL" + }] + } + }, + + "PORT24-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT24-EEPROM", + "device_parent": "LC1-PORT-MUX2", + "virt_parent": "PORT24" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x5e", + "dev_addr": "0x50", + "dev_type": "optoe1" + }, + "attr_list": [{ + "attr_name": "eeprom" + }] + } + }, + + "PORT24-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT24-CTRL", + "device_parent": "LC1-PORT-MUX2", + "virt_parent": "PORT24" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x5e", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [{ + "attr_name": "xcvr_present", + "attr_devname": "LC1-CPLD-B", + "attr_devaddr": "0x31", + "attr_devtype": "cpld", + "attr_offset": "0x10", + "attr_mask": "0x7", + "attr_cmpval": "0x0", + "attr_len": "1" + }, { + "attr_name": "xcvr_reset", + "attr_devname": "LC1-CPLD-B", + "attr_devaddr": "0x31", + "attr_devtype": "cpld", + "attr_offset": "0x14", + "attr_mask": "0x7", + "attr_cmpval": "0x0", + "attr_len": "1" + }] + } + }, + + "LC1-PORT-MUX3": { + "dev_info": { + "device_type": "MUX", + "device_name": "LC1-PORT-MUX3", + "device_parent": "CPLD-OCORE1" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x3", + "dev_addr": "0x73", + "dev_type": "pca9548" + }, + "dev_attr": { + "virt_bus": "0x5f" + }, + "channel": [{ + "chn": "0", + "dev": "PORT25" + }, + { + "chn": "1", + "dev": "PORT26" + }, + { + "chn": "2", + "dev": "PORT27" + }, + { + "chn": "3", + "dev": "PORT28" + }, + { + "chn": "4", + "dev": "PORT29" + }, + { + "chn": "5", + "dev": "PORT30" + }, + { + "chn": "6", + "dev": "PORT31" + }, + { + "chn": "7", + "dev": "PORT32" + } + ] + } + }, + + "PORT25": { + "dev_info": { + "device_type": "QSFP", + "device_name": "PORT25", + "device_parent": "LC1-PORT-MUX3" + }, + "dev_attr": { + "dev_idx": "25" + }, + "i2c": { + "interface": [{ + "itf": "eeprom", + "dev": "PORT25-EEPROM" + }, { + "itf": "control", + "dev": "PORT25-CTRL" + }] + } + }, + + "PORT25-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT25-EEPROM", + "device_parent": "LC1-PORT-MUX3", + "virt_parent": "PORT25" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x5f", + "dev_addr": "0x50", + "dev_type": "optoe1" + }, + "attr_list": [{ + "attr_name": "eeprom" + }] + } + }, + + "PORT25-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT25-CTRL", + "device_parent": "LC1-PORT-MUX3", + "virt_parent": "PORT25" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x5f", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [{ + "attr_name": "xcvr_present", + "attr_devname": "LC1-CPLD-B", + "attr_devaddr": "0x31", + "attr_devtype": "cpld", + "attr_offset": "0x11", + "attr_mask": "0x0", + "attr_cmpval": "0x0", + "attr_len": "1" + }, { + "attr_name": "xcvr_reset", + "attr_devname": "LC1-CPLD-B", + "attr_devaddr": "0x31", + "attr_devtype": "cpld", + "attr_offset": "0x15", + "attr_mask": "0x0", + "attr_cmpval": "0x0", + "attr_len": "1" + }] + } + }, + + "PORT26": { + "dev_info": { + "device_type": "QSFP", + "device_name": "PORT26", + "device_parent": "LC1-PORT-MUX3" + }, + "dev_attr": { + "dev_idx": "26" + }, + "i2c": { + "interface": [{ + "itf": "eeprom", + "dev": "PORT26-EEPROM" + }, { + "itf": "control", + "dev": "PORT26-CTRL" + }] + } + }, + + "PORT26-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT26-EEPROM", + "device_parent": "LC1-PORT-MUX3", + "virt_parent": "PORT26" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x60", + "dev_addr": "0x50", + "dev_type": "optoe1" + }, + "attr_list": [{ + "attr_name": "eeprom" + }] + } + }, + + "PORT26-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT26-CTRL", + "device_parent": "LC1-PORT-MUX3", + "virt_parent": "PORT26" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x60", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [{ + "attr_name": "xcvr_present", + "attr_devname": "LC1-CPLD-B", + "attr_devaddr": "0x31", + "attr_devtype": "cpld", + "attr_offset": "0x11", + "attr_mask": "0x1", + "attr_cmpval": "0x0", + "attr_len": "1" + }, { + "attr_name": "xcvr_reset", + "attr_devname": "LC1-CPLD-B", + "attr_devaddr": "0x31", + "attr_devtype": "cpld", + "attr_offset": "0x15", + "attr_mask": "0x1", + "attr_cmpval": "0x0", + "attr_len": "1" + }] + } + }, + + "PORT27": { + "dev_info": { + "device_type": "QSFP", + "device_name": "PORT27", + "device_parent": "LC1-PORT-MUX3" + }, + "dev_attr": { + "dev_idx": "27" + }, + "i2c": { + "interface": [{ + "itf": "eeprom", + "dev": "PORT27-EEPROM" + }, { + "itf": "control", + "dev": "PORT27-CTRL" + }] + } + }, + + "PORT27-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT27-EEPROM", + "device_parent": "LC1-PORT-MUX3", + "virt_parent": "PORT27" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x61", + "dev_addr": "0x50", + "dev_type": "optoe1" + }, + "attr_list": [{ + "attr_name": "eeprom" + }] + } + }, + + "PORT27-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT27-CTRL", + "device_parent": "LC1-PORT-MUX3", + "virt_parent": "PORT27" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x61", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [{ + "attr_name": "xcvr_present", + "attr_devname": "LC1-CPLD-B", + "attr_devaddr": "0x31", + "attr_devtype": "cpld", + "attr_offset": "0x11", + "attr_mask": "0x2", + "attr_cmpval": "0x0", + "attr_len": "1" + }, { + "attr_name": "xcvr_reset", + "attr_devname": "LC1-CPLD-B", + "attr_devaddr": "0x31", + "attr_devtype": "cpld", + "attr_offset": "0x15", + "attr_mask": "0x2", + "attr_cmpval": "0x0", + "attr_len": "1" + }] + } + }, + + "PORT28": { + "dev_info": { + "device_type": "QSFP", + "device_name": "PORT28", + "device_parent": "LC1-PORT-MUX3" + }, + "dev_attr": { + "dev_idx": "28" + }, + "i2c": { + "interface": [{ + "itf": "eeprom", + "dev": "PORT28-EEPROM" + }, { + "itf": "control", + "dev": "PORT28-CTRL" + }] + } + }, + + "PORT28-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT28-EEPROM", + "device_parent": "LC1-PORT-MUX3", + "virt_parent": "PORT28" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x62", + "dev_addr": "0x50", + "dev_type": "optoe1" + }, + "attr_list": [{ + "attr_name": "eeprom" + }] + } + }, + + "PORT28-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT28-CTRL", + "device_parent": "LC1-PORT-MUX3", + "virt_parent": "PORT28" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x62", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [{ + "attr_name": "xcvr_present", + "attr_devname": "LC1-CPLD-B", + "attr_devaddr": "0x31", + "attr_devtype": "cpld", + "attr_offset": "0x11", + "attr_mask": "0x3", + "attr_cmpval": "0x0", + "attr_len": "1" + }, { + "attr_name": "xcvr_reset", + "attr_devname": "LC1-CPLD-B", + "attr_devaddr": "0x31", + "attr_devtype": "cpld", + "attr_offset": "0x15", + "attr_mask": "0x3", + "attr_cmpval": "0x0", + "attr_len": "1" + }] + } + }, + + "PORT29": { + "dev_info": { + "device_type": "QSFP", + "device_name": "PORT29", + "device_parent": "LC1-PORT-MUX3" + }, + "dev_attr": { + "dev_idx": "29" + }, + "i2c": { + "interface": [{ + "itf": "eeprom", + "dev": "PORT29-EEPROM" + }, { + "itf": "control", + "dev": "PORT29-CTRL" + }] + } + }, + + "PORT29-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT29-EEPROM", + "device_parent": "LC1-PORT-MUX3", + "virt_parent": "PORT29" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x63", + "dev_addr": "0x50", + "dev_type": "optoe1" + }, + "attr_list": [{ + "attr_name": "eeprom" + }] + } + }, + + "PORT29-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT29-CTRL", + "device_parent": "LC1-PORT-MUX3", + "virt_parent": "PORT29" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x63", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [{ + "attr_name": "xcvr_present", + "attr_devname": "LC1-CPLD-B", + "attr_devaddr": "0x31", + "attr_devtype": "cpld", + "attr_offset": "0x11", + "attr_mask": "0x4", + "attr_cmpval": "0x0", + "attr_len": "1" + }, { + "attr_name": "xcvr_reset", + "attr_devname": "LC1-CPLD-B", + "attr_devaddr": "0x31", + "attr_devtype": "cpld", + "attr_offset": "0x15", + "attr_mask": "0x4", + "attr_cmpval": "0x0", + "attr_len": "1" + }] + } + }, + + "PORT30": { + "dev_info": { + "device_type": "QSFP", + "device_name": "PORT30", + "device_parent": "LC1-PORT-MUX3" + }, + "dev_attr": { + "dev_idx": "30" + }, + "i2c": { + "interface": [{ + "itf": "eeprom", + "dev": "PORT30-EEPROM" + }, { + "itf": "control", + "dev": "PORT30-CTRL" + }] + } + }, + + "PORT30-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT30-EEPROM", + "device_parent": "LC1-PORT-MUX3", + "virt_parent": "PORT30" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x64", + "dev_addr": "0x50", + "dev_type": "optoe1" + }, + "attr_list": [{ + "attr_name": "eeprom" + }] + } + }, + + "PORT30-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT30-CTRL", + "device_parent": "LC1-PORT-MUX3", + "virt_parent": "PORT30" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x64", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [{ + "attr_name": "xcvr_present", + "attr_devname": "LC1-CPLD-B", + "attr_devaddr": "0x31", + "attr_devtype": "cpld", + "attr_offset": "0x11", + "attr_mask": "0x5", + "attr_cmpval": "0x0", + "attr_len": "1" + }, { + "attr_name": "xcvr_reset", + "attr_devname": "LC1-CPLD-B", + "attr_devaddr": "0x31", + "attr_devtype": "cpld", + "attr_offset": "0x15", + "attr_mask": "0x5", + "attr_cmpval": "0x0", + "attr_len": "1" + }] + } + }, + + "PORT31": { + "dev_info": { + "device_type": "QSFP", + "device_name": "PORT31", + "device_parent": "LC1-PORT-MUX3" + }, + "dev_attr": { + "dev_idx": "31" + }, + "i2c": { + "interface": [{ + "itf": "eeprom", + "dev": "PORT31-EEPROM" + }, { + "itf": "control", + "dev": "PORT31-CTRL" + }] + } + }, + + "PORT31-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT31-EEPROM", + "device_parent": "LC1-PORT-MUX3", + "virt_parent": "PORT31" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x65", + "dev_addr": "0x50", + "dev_type": "optoe1" + }, + "attr_list": [{ + "attr_name": "eeprom" + }] + } + }, + + "PORT31-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT31-CTRL", + "device_parent": "LC1-PORT-MUX3", + "virt_parent": "PORT31" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x65", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [{ + "attr_name": "xcvr_present", + "attr_devname": "LC1-CPLD-B", + "attr_devaddr": "0x31", + "attr_devtype": "cpld", + "attr_offset": "0x11", + "attr_mask": "0x6", + "attr_cmpval": "0x0", + "attr_len": "1" + }, { + "attr_name": "xcvr_reset", + "attr_devname": "LC1-CPLD-B", + "attr_devaddr": "0x31", + "attr_devtype": "cpld", + "attr_offset": "0x15", + "attr_mask": "0x6", + "attr_cmpval": "0x0", + "attr_len": "1" + }] + } + }, + + "PORT32": { + "dev_info": { + "device_type": "QSFP", + "device_name": "PORT32", + "device_parent": "LC1-PORT-MUX3" + }, + "dev_attr": { + "dev_idx": "32" + }, + "i2c": { + "interface": [{ + "itf": "eeprom", + "dev": "PORT32-EEPROM" + }, { + "itf": "control", + "dev": "PORT32-CTRL" + }] + } + }, + + "PORT32-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT32-EEPROM", + "device_parent": "LC1-PORT-MUX3", + "virt_parent": "PORT32" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x66", + "dev_addr": "0x50", + "dev_type": "optoe1" + }, + "attr_list": [{ + "attr_name": "eeprom" + }] + } + }, + + "PORT32-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT32-CTRL", + "device_parent": "LC1-PORT-MUX3", + "virt_parent": "PORT32" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x66", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [{ + "attr_name": "xcvr_present", + "attr_devname": "LC1-CPLD-B", + "attr_devaddr": "0x31", + "attr_devtype": "cpld", + "attr_offset": "0x11", + "attr_mask": "0x7", + "attr_cmpval": "0x0", + "attr_len": "1" + }, { + "attr_name": "xcvr_reset", + "attr_devname": "LC1-CPLD-B", + "attr_devaddr": "0x31", + "attr_devtype": "cpld", + "attr_offset": "0x15", + "attr_mask": "0x7", + "attr_cmpval": "0x0", + "attr_len": "1" + }] + } + }, + + "CPLD-OCORE2": { + "dev_info": { + "device_type": "CPLD-OCORE", + "device_name": "CPLD-OCORE2", + "device_parent": "SYSTEM" + }, + "i2c": { + "topo_info": { + "dev_addr": "0x4" + }, + "DEVICES": [ + { + "dev": "LC2-CPLD-A" + }, + { + "dev": "LC2-CPLD-B" + }, + { + "dev": "LC2-EEPROM" + }, + { + "dev": "LC2-TLV-EEPROM" + }, + { + "dev": "LC2-PORT-MUX0" + }, + { + "dev": "LC2-PORT-MUX1" + }, + { + "dev": "LC2-PORT-MUX2" + }, + { + "dev": "LC2-PORT-MUX3" + } + ] + } + }, + + "LC2-CPLD-A": { + "dev_info": { + "device_type": "CPLD", + "device_name": "LC2-CPLD-A", + "device_parent": "CPLD-OCORE1" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x4", + "dev_addr": "0x30", + "dev_type": "i2c_cpld" + }, + "dev_attr": {} + } + }, + + "LC2-CPLD-B": { + "dev_info": { + "device_type": "CPLD", + "device_name": "LC2-CPLD-B", + "device_parent": "CPLD-OCORE1" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x4", + "dev_addr": "0x31", + "dev_type": "i2c_cpld" + }, + "dev_attr": {} + } + }, + + "LC2-EEPROM": { + "dev_info": { + "device_type": "EEPROM", + "device_name": "LC2-EEPROM", + "device_parent": "CPLD-OCORE1" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x4", + "dev_addr": "0x56", + "dev_type": "24c02" + }, + "dev_attr": { + "access_mode": "BLOCK" + }, + "attr_list": [{ + "attr_name": "eeprom" + }] + } + }, + + "LC2-TLV-EEPROM": { + "dev_info": { + "device_type": "EEPROM", + "device_name": "LC2-TLV-EEPROM", + "device_parent": "CPLD-OCORE1" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x4", + "dev_addr": "0x57", + "dev_type": "24c02" + }, + "dev_attr": { + "access_mode": "BLOCK" + }, + "attr_list": [{ + "attr_name": "eeprom" + }] + } + }, + + "LC2-PORT-MUX0": { + "dev_info": { + "device_type": "MUX", + "device_name": "LC2-PORT-MUX0", + "device_parent": "CPLD-OCORE2" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x4", + "dev_addr": "0x70", + "dev_type": "pca9548" + }, + "dev_attr": { + "virt_bus": "0x67" + }, + "channel": [{ + "chn": "0", + "dev": "PORT33" + }, + { + "chn": "1", + "dev": "PORT34" + }, + { + "chn": "2", + "dev": "PORT35" + }, + { + "chn": "3", + "dev": "PORT36" + }, + { + "chn": "4", + "dev": "PORT37" + }, + { + "chn": "5", + "dev": "PORT38" + }, + { + "chn": "6", + "dev": "PORT39" + }, + { + "chn": "7", + "dev": "PORT40" + } + ] + } + }, + + "PORT33": { + "dev_info": { + "device_type": "QSFP", + "device_name": "PORT33", + "device_parent": "LC2-PORT-MUX0" + }, + "dev_attr": { + "dev_idx": "33" + }, + "i2c": { + "interface": [{ + "itf": "eeprom", + "dev": "PORT33-EEPROM" + }, { + "itf": "control", + "dev": "PORT33-CTRL" + }] + } + }, + + "PORT33-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT33-EEPROM", + "device_parent": "LC2-PORT-MUX0", + "virt_parent": "PORT33" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x67", + "dev_addr": "0x50", + "dev_type": "optoe1" + }, + "attr_list": [{ + "attr_name": "eeprom" + }] + } + }, + + "PORT33-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT33-CTRL", + "device_parent": "LC2-PORT-MUX0", + "virt_parent": "PORT33" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x67", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [{ + "attr_name": "xcvr_present", + "attr_devname": "LC2-CPLD-A", + "attr_devaddr": "0x30", + "attr_devtype": "cpld", + "attr_offset": "0x10", + "attr_mask": "0x0", + "attr_cmpval": "0x0", + "attr_len": "1" + }, { + "attr_name": "xcvr_reset", + "attr_devname": "LC2-CPLD-A", + "attr_devaddr": "0x30", + "attr_devtype": "cpld", + "attr_offset": "0x14", + "attr_mask": "0x0", + "attr_cmpval": "0x0", + "attr_len": "1" + }] + } + }, + + "PORT34": { + "dev_info": { + "device_type": "QSFP", + "device_name": "PORT34", + "device_parent": "LC2-PORT-MUX0" + }, + "dev_attr": { + "dev_idx": "34" + }, + "i2c": { + "interface": [{ + "itf": "eeprom", + "dev": "PORT34-EEPROM" + }, { + "itf": "control", + "dev": "PORT34-CTRL" + }] + } + }, + + "PORT34-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT34-EEPROM", + "device_parent": "LC2-PORT-MUX0", + "virt_parent": "PORT34" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x68", + "dev_addr": "0x50", + "dev_type": "optoe1" + }, + "attr_list": [{ + "attr_name": "eeprom" + }] + } + }, + + "PORT34-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT34-CTRL", + "device_parent": "LC2-PORT-MUX0", + "virt_parent": "PORT34" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x68", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [{ + "attr_name": "xcvr_present", + "attr_devname": "LC2-CPLD-A", + "attr_devaddr": "0x30", + "attr_devtype": "cpld", + "attr_offset": "0x10", + "attr_mask": "0x1", + "attr_cmpval": "0x0", + "attr_len": "1" + }, { + "attr_name": "xcvr_reset", + "attr_devname": "LC2-CPLD-A", + "attr_devaddr": "0x30", + "attr_devtype": "cpld", + "attr_offset": "0x14", + "attr_mask": "0x1", + "attr_cmpval": "0x0", + "attr_len": "1" + }] + } + }, + + "PORT35": { + "dev_info": { + "device_type": "QSFP", + "device_name": "PORT35", + "device_parent": "LC2-PORT-MUX0" + }, + "dev_attr": { + "dev_idx": "35" + }, + "i2c": { + "interface": [{ + "itf": "eeprom", + "dev": "PORT35-EEPROM" + }, { + "itf": "control", + "dev": "PORT35-CTRL" + }] + } + }, + + "PORT35-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT35-EEPROM", + "device_parent": "LC2-PORT-MUX0", + "virt_parent": "PORT35" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x69", + "dev_addr": "0x50", + "dev_type": "optoe1" + }, + "attr_list": [{ + "attr_name": "eeprom" + }] + } + }, + + "PORT35-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT35-CTRL", + "device_parent": "LC2-PORT-MUX0", + "virt_parent": "PORT35" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x69", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [{ + "attr_name": "xcvr_present", + "attr_devname": "LC2-CPLD-A", + "attr_devaddr": "0x30", + "attr_devtype": "cpld", + "attr_offset": "0x10", + "attr_mask": "0x2", + "attr_cmpval": "0x0", + "attr_len": "1" + }, { + "attr_name": "xcvr_reset", + "attr_devname": "LC2-CPLD-A", + "attr_devaddr": "0x30", + "attr_devtype": "cpld", + "attr_offset": "0x14", + "attr_mask": "0x2", + "attr_cmpval": "0x0", + "attr_len": "1" + }] + } + }, + + "PORT36": { + "dev_info": { + "device_type": "QSFP", + "device_name": "PORT36", + "device_parent": "LC2-PORT-MUX0" + }, + "dev_attr": { + "dev_idx": "36" + }, + "i2c": { + "interface": [{ + "itf": "eeprom", + "dev": "PORT36-EEPROM" + }, { + "itf": "control", + "dev": "PORT36-CTRL" + }] + } + }, + + "PORT36-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT36-EEPROM", + "device_parent": "LC2-PORT-MUX0", + "virt_parent": "PORT36" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x6a", + "dev_addr": "0x50", + "dev_type": "optoe1" + }, + "attr_list": [{ + "attr_name": "eeprom" + }] + } + }, + + "PORT36-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT36-CTRL", + "device_parent": "LC2-PORT-MUX0", + "virt_parent": "PORT36" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x6a", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [{ + "attr_name": "xcvr_present", + "attr_devname": "LC2-CPLD-A", + "attr_devaddr": "0x30", + "attr_devtype": "cpld", + "attr_offset": "0x10", + "attr_mask": "0x3", + "attr_cmpval": "0x0", + "attr_len": "1" + }, { + "attr_name": "xcvr_reset", + "attr_devname": "LC2-CPLD-A", + "attr_devaddr": "0x30", + "attr_devtype": "cpld", + "attr_offset": "0x14", + "attr_mask": "0x3", + "attr_cmpval": "0x0", + "attr_len": "1" + }] + } + }, + + "PORT37": { + "dev_info": { + "device_type": "QSFP", + "device_name": "PORT37", + "device_parent": "LC2-PORT-MUX0" + }, + "dev_attr": { + "dev_idx": "37" + }, + "i2c": { + "interface": [{ + "itf": "eeprom", + "dev": "PORT37-EEPROM" + }, { + "itf": "control", + "dev": "PORT37-CTRL" + }] + } + }, + + "PORT37-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT37-EEPROM", + "device_parent": "LC2-PORT-MUX0", + "virt_parent": "PORT37" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x6b", + "dev_addr": "0x50", + "dev_type": "optoe1" + }, + "attr_list": [{ + "attr_name": "eeprom" + }] + } + }, + + "PORT37-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT37-CTRL", + "device_parent": "LC2-PORT-MUX0", + "virt_parent": "PORT37" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x6b", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [{ + "attr_name": "xcvr_present", + "attr_devname": "LC2-CPLD-A", + "attr_devaddr": "0x30", + "attr_devtype": "cpld", + "attr_offset": "0x10", + "attr_mask": "0x4", + "attr_cmpval": "0x0", + "attr_len": "1" + }, { + "attr_name": "xcvr_reset", + "attr_devname": "LC2-CPLD-A", + "attr_devaddr": "0x30", + "attr_devtype": "cpld", + "attr_offset": "0x14", + "attr_mask": "0x4", + "attr_cmpval": "0x0", + "attr_len": "1" + }] + } + }, + + "PORT38": { + "dev_info": { + "device_type": "QSFP", + "device_name": "PORT38", + "device_parent": "LC2-PORT-MUX0" + }, + "dev_attr": { + "dev_idx": "38" + }, + "i2c": { + "interface": [{ + "itf": "eeprom", + "dev": "PORT38-EEPROM" + }, { + "itf": "control", + "dev": "PORT38-CTRL" + }] + } + }, + + "PORT38-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT38-EEPROM", + "device_parent": "LC2-PORT-MUX0", + "virt_parent": "PORT38" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x6c", + "dev_addr": "0x50", + "dev_type": "optoe1" + }, + "attr_list": [{ + "attr_name": "eeprom" + }] + } + }, + + "PORT38-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT38-CTRL", + "device_parent": "LC2-PORT-MUX0", + "virt_parent": "PORT38" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x6c", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [{ + "attr_name": "xcvr_present", + "attr_devname": "LC2-CPLD-A", + "attr_devaddr": "0x30", + "attr_devtype": "cpld", + "attr_offset": "0x10", + "attr_mask": "0x5", + "attr_cmpval": "0x0", + "attr_len": "1" + }, { + "attr_name": "xcvr_reset", + "attr_devname": "LC2-CPLD-A", + "attr_devaddr": "0x30", + "attr_devtype": "cpld", + "attr_offset": "0x14", + "attr_mask": "0x5", + "attr_cmpval": "0x0", + "attr_len": "1" + }] + } + }, + + "PORT39": { + "dev_info": { + "device_type": "QSFP", + "device_name": "PORT39", + "device_parent": "LC2-PORT-MUX0" + }, + "dev_attr": { + "dev_idx": "39" + }, + "i2c": { + "interface": [{ + "itf": "eeprom", + "dev": "PORT39-EEPROM" + }, { + "itf": "control", + "dev": "PORT39-CTRL" + }] + } + }, + + "PORT39-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT39-EEPROM", + "device_parent": "LC2-PORT-MUX0", + "virt_parent": "PORT39" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x6d", + "dev_addr": "0x50", + "dev_type": "optoe1" + }, + "attr_list": [{ + "attr_name": "eeprom" + }] + } + }, + + "PORT39-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT39-CTRL", + "device_parent": "LC2-PORT-MUX0", + "virt_parent": "PORT39" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x6d", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [{ + "attr_name": "xcvr_present", + "attr_devname": "LC2-CPLD-A", + "attr_devaddr": "0x30", + "attr_devtype": "cpld", + "attr_offset": "0x10", + "attr_mask": "0x6", + "attr_cmpval": "0x0", + "attr_len": "1" + }, { + "attr_name": "xcvr_reset", + "attr_devname": "LC2-CPLD-A", + "attr_devaddr": "0x30", + "attr_devtype": "cpld", + "attr_offset": "0x14", + "attr_mask": "0x6", + "attr_cmpval": "0x0", + "attr_len": "1" + }] + } + }, + + "PORT40": { + "dev_info": { + "device_type": "QSFP", + "device_name": "PORT40", + "device_parent": "LC2-PORT-MUX0" + }, + "dev_attr": { + "dev_idx": "40" + }, + "i2c": { + "interface": [{ + "itf": "eeprom", + "dev": "PORT40-EEPROM" + }, { + "itf": "control", + "dev": "PORT40-CTRL" + }] + } + }, + + "PORT40-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT40-EEPROM", + "device_parent": "LC2-PORT-MUX0", + "virt_parent": "PORT40" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x6e", + "dev_addr": "0x50", + "dev_type": "optoe1" + }, + "attr_list": [{ + "attr_name": "eeprom" + }] + } + }, + + "PORT40-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT40-CTRL", + "device_parent": "LC2-PORT-MUX0", + "virt_parent": "PORT40" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x6e", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [{ + "attr_name": "xcvr_present", + "attr_devname": "LC2-CPLD-A", + "attr_devaddr": "0x30", + "attr_devtype": "cpld", + "attr_offset": "0x10", + "attr_mask": "0x7", + "attr_cmpval": "0x0", + "attr_len": "1" + }, { + "attr_name": "xcvr_reset", + "attr_devname": "LC2-CPLD-A", + "attr_devaddr": "0x30", + "attr_devtype": "cpld", + "attr_offset": "0x14", + "attr_mask": "0x7", + "attr_cmpval": "0x0", + "attr_len": "1" + }] + } + }, + + "LC2-PORT-MUX1": { + "dev_info": { + "device_type": "MUX", + "device_name": "LC2-PORT-MUX1", + "device_parent": "CPLD-OCORE2" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x4", + "dev_addr": "0x71", + "dev_type": "pca9548" + }, + "dev_attr": { + "virt_bus": "0x6f" + }, + "channel": [{ + "chn": "0", + "dev": "PORT41" + }, + { + "chn": "1", + "dev": "PORT42" + }, + { + "chn": "2", + "dev": "PORT43" + }, + { + "chn": "3", + "dev": "PORT44" + }, + { + "chn": "4", + "dev": "PORT45" + }, + { + "chn": "5", + "dev": "PORT46" + }, + { + "chn": "6", + "dev": "PORT47" + }, + { + "chn": "7", + "dev": "PORT48" + } + ] + } + }, + + "PORT41": { + "dev_info": { + "device_type": "QSFP", + "device_name": "PORT41", + "device_parent": "LC2-PORT-MUX1" + }, + "dev_attr": { + "dev_idx": "41" + }, + "i2c": { + "interface": [{ + "itf": "eeprom", + "dev": "PORT41-EEPROM" + }, { + "itf": "control", + "dev": "PORT41-CTRL" + }] + } + }, + + "PORT41-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT41-EEPROM", + "device_parent": "LC2-PORT-MUX1", + "virt_parent": "PORT41" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x6f", + "dev_addr": "0x50", + "dev_type": "optoe1" + }, + "attr_list": [{ + "attr_name": "eeprom" + }] + } + }, + + "PORT41-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT41-CTRL", + "device_parent": "LC2-PORT-MUX1", + "virt_parent": "PORT41" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x6f", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [{ + "attr_name": "xcvr_present", + "attr_devname": "LC2-CPLD-A", + "attr_devaddr": "0x30", + "attr_devtype": "cpld", + "attr_offset": "0x11", + "attr_mask": "0x0", + "attr_cmpval": "0x0", + "attr_len": "1" + }, { + "attr_name": "xcvr_reset", + "attr_devname": "LC2-CPLD-A", + "attr_devaddr": "0x30", + "attr_devtype": "cpld", + "attr_offset": "0x15", + "attr_mask": "0x0", + "attr_cmpval": "0x0", + "attr_len": "1" + }] + } + }, + + "PORT42": { + "dev_info": { + "device_type": "QSFP", + "device_name": "PORT42", + "device_parent": "LC2-PORT-MUX1" + }, + "dev_attr": { + "dev_idx": "42" + }, + "i2c": { + "interface": [{ + "itf": "eeprom", + "dev": "PORT42-EEPROM" + }, { + "itf": "control", + "dev": "PORT42-CTRL" + }] + } + }, + + "PORT42-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT42-EEPROM", + "device_parent": "LC2-PORT-MUX1", + "virt_parent": "PORT42" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x70", + "dev_addr": "0x50", + "dev_type": "optoe1" + }, + "attr_list": [{ + "attr_name": "eeprom" + }] + } + }, + + "PORT42-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT42-CTRL", + "device_parent": "LC2-PORT-MUX1", + "virt_parent": "PORT42" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x70", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [{ + "attr_name": "xcvr_present", + "attr_devname": "LC2-CPLD-A", + "attr_devaddr": "0x30", + "attr_devtype": "cpld", + "attr_offset": "0x11", + "attr_mask": "0x1", + "attr_cmpval": "0x0", + "attr_len": "1" + }, { + "attr_name": "xcvr_reset", + "attr_devname": "LC2-CPLD-A", + "attr_devaddr": "0x30", + "attr_devtype": "cpld", + "attr_offset": "0x15", + "attr_mask": "0x1", + "attr_cmpval": "0x0", + "attr_len": "1" + }] + } + }, + + "PORT43": { + "dev_info": { + "device_type": "QSFP", + "device_name": "PORT43", + "device_parent": "LC2-PORT-MUX1" + }, + "dev_attr": { + "dev_idx": "43" + }, + "i2c": { + "interface": [{ + "itf": "eeprom", + "dev": "PORT43-EEPROM" + }, { + "itf": "control", + "dev": "PORT43-CTRL" + }] + } + }, + + "PORT43-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT43-EEPROM", + "device_parent": "LC2-PORT-MUX1", + "virt_parent": "PORT43" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x71", + "dev_addr": "0x50", + "dev_type": "optoe1" + }, + "attr_list": [{ + "attr_name": "eeprom" + }] + } + }, + + "PORT43-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT43-CTRL", + "device_parent": "LC2-PORT-MUX1", + "virt_parent": "PORT43" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x71", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [{ + "attr_name": "xcvr_present", + "attr_devname": "LC2-CPLD-A", + "attr_devaddr": "0x30", + "attr_devtype": "cpld", + "attr_offset": "0x11", + "attr_mask": "0x2", + "attr_cmpval": "0x0", + "attr_len": "1" + }, { + "attr_name": "xcvr_reset", + "attr_devname": "LC2-CPLD-A", + "attr_devaddr": "0x30", + "attr_devtype": "cpld", + "attr_offset": "0x15", + "attr_mask": "0x2", + "attr_cmpval": "0x0", + "attr_len": "1" + }] + } + }, + + "PORT44": { + "dev_info": { + "device_type": "QSFP", + "device_name": "PORT44", + "device_parent": "LC2-PORT-MUX1" + }, + "dev_attr": { + "dev_idx": "44" + }, + "i2c": { + "interface": [{ + "itf": "eeprom", + "dev": "PORT44-EEPROM" + }, { + "itf": "control", + "dev": "PORT44-CTRL" + }] + } + }, + + "PORT44-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT44-EEPROM", + "device_parent": "LC2-PORT-MUX1", + "virt_parent": "PORT44" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x72", + "dev_addr": "0x50", + "dev_type": "optoe1" + }, + "attr_list": [{ + "attr_name": "eeprom" + }] + } + }, + + "PORT44-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT44-CTRL", + "device_parent": "LC2-PORT-MUX1", + "virt_parent": "PORT44" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x72", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [{ + "attr_name": "xcvr_present", + "attr_devname": "LC2-CPLD-A", + "attr_devaddr": "0x30", + "attr_devtype": "cpld", + "attr_offset": "0x11", + "attr_mask": "0x3", + "attr_cmpval": "0x0", + "attr_len": "1" + }, { + "attr_name": "xcvr_reset", + "attr_devname": "LC2-CPLD-A", + "attr_devaddr": "0x30", + "attr_devtype": "cpld", + "attr_offset": "0x15", + "attr_mask": "0x3", + "attr_cmpval": "0x0", + "attr_len": "1" + }] + } + }, + + "PORT45": { + "dev_info": { + "device_type": "QSFP", + "device_name": "PORT45", + "device_parent": "LC2-PORT-MUX1" + }, + "dev_attr": { + "dev_idx": "45" + }, + "i2c": { + "interface": [{ + "itf": "eeprom", + "dev": "PORT45-EEPROM" + }, { + "itf": "control", + "dev": "PORT45-CTRL" + }] + } + }, + + "PORT45-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT45-EEPROM", + "device_parent": "LC2-PORT-MUX1", + "virt_parent": "PORT45" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x73", + "dev_addr": "0x50", + "dev_type": "optoe1" + }, + "attr_list": [{ + "attr_name": "eeprom" + }] + } + }, + + "PORT45-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT45-CTRL", + "device_parent": "LC2-PORT-MUX1", + "virt_parent": "PORT45" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x73", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [{ + "attr_name": "xcvr_present", + "attr_devname": "LC2-CPLD-A", + "attr_devaddr": "0x30", + "attr_devtype": "cpld", + "attr_offset": "0x11", + "attr_mask": "0x4", + "attr_cmpval": "0x0", + "attr_len": "1" + }, { + "attr_name": "xcvr_reset", + "attr_devname": "LC2-CPLD-A", + "attr_devaddr": "0x30", + "attr_devtype": "cpld", + "attr_offset": "0x15", + "attr_mask": "0x4", + "attr_cmpval": "0x0", + "attr_len": "1" + }] + } + }, + + "PORT46": { + "dev_info": { + "device_type": "QSFP", + "device_name": "PORT46", + "device_parent": "LC2-PORT-MUX1" + }, + "dev_attr": { + "dev_idx": "46" + }, + "i2c": { + "interface": [{ + "itf": "eeprom", + "dev": "PORT46-EEPROM" + }, { + "itf": "control", + "dev": "PORT46-CTRL" + }] + } + }, + + "PORT46-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT46-EEPROM", + "device_parent": "LC2-PORT-MUX1", + "virt_parent": "PORT46" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x74", + "dev_addr": "0x50", + "dev_type": "optoe1" + }, + "attr_list": [{ + "attr_name": "eeprom" + }] + } + }, + + "PORT46-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT46-CTRL", + "device_parent": "LC2-PORT-MUX1", + "virt_parent": "PORT46" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x74", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [{ + "attr_name": "xcvr_present", + "attr_devname": "LC2-CPLD-A", + "attr_devaddr": "0x30", + "attr_devtype": "cpld", + "attr_offset": "0x11", + "attr_mask": "0x5", + "attr_cmpval": "0x0", + "attr_len": "1" + }, { + "attr_name": "xcvr_reset", + "attr_devname": "LC2-CPLD-A", + "attr_devaddr": "0x30", + "attr_devtype": "cpld", + "attr_offset": "0x15", + "attr_mask": "0x5", + "attr_cmpval": "0x0", + "attr_len": "1" + }] + } + }, + + "PORT47": { + "dev_info": { + "device_type": "QSFP", + "device_name": "PORT47", + "device_parent": "LC2-PORT-MUX1" + }, + "dev_attr": { + "dev_idx": "47" + }, + "i2c": { + "interface": [{ + "itf": "eeprom", + "dev": "PORT47-EEPROM" + }, { + "itf": "control", + "dev": "PORT47-CTRL" + }] + } + }, + + "PORT47-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT47-EEPROM", + "device_parent": "LC2-PORT-MUX1", + "virt_parent": "PORT47" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x75", + "dev_addr": "0x50", + "dev_type": "optoe1" + }, + "attr_list": [{ + "attr_name": "eeprom" + }] + } + }, + + "PORT47-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT47-CTRL", + "device_parent": "LC2-PORT-MUX1", + "virt_parent": "PORT47" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x75", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [{ + "attr_name": "xcvr_present", + "attr_devname": "LC2-CPLD-A", + "attr_devaddr": "0x30", + "attr_devtype": "cpld", + "attr_offset": "0x11", + "attr_mask": "0x6", + "attr_cmpval": "0x0", + "attr_len": "1" + }, { + "attr_name": "xcvr_reset", + "attr_devname": "LC2-CPLD-A", + "attr_devaddr": "0x30", + "attr_devtype": "cpld", + "attr_offset": "0x15", + "attr_mask": "0x6", + "attr_cmpval": "0x0", + "attr_len": "1" + }] + } + }, + + "PORT48": { + "dev_info": { + "device_type": "QSFP", + "device_name": "PORT48", + "device_parent": "LC2-PORT-MUX1" + }, + "dev_attr": { + "dev_idx": "48" + }, + "i2c": { + "interface": [{ + "itf": "eeprom", + "dev": "PORT48-EEPROM" + }, { + "itf": "control", + "dev": "PORT48-CTRL" + }] + } + }, + + "PORT48-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT48-EEPROM", + "device_parent": "LC2-PORT-MUX1", + "virt_parent": "PORT48" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x76", + "dev_addr": "0x50", + "dev_type": "optoe1" + }, + "attr_list": [{ + "attr_name": "eeprom" + }] + } + }, + + "PORT48-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT48-CTRL", + "device_parent": "LC2-PORT-MUX1", + "virt_parent": "PORT48" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x76", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [{ + "attr_name": "xcvr_present", + "attr_devname": "LC2-CPLD-A", + "attr_devaddr": "0x30", + "attr_devtype": "cpld", + "attr_offset": "0x11", + "attr_mask": "0x7", + "attr_cmpval": "0x0", + "attr_len": "1" + }, { + "attr_name": "xcvr_reset", + "attr_devname": "LC2-CPLD-A", + "attr_devaddr": "0x30", + "attr_devtype": "cpld", + "attr_offset": "0x15", + "attr_mask": "0x7", + "attr_cmpval": "0x0", + "attr_len": "1" + }] + } + }, + + "LC2-PORT-MUX2": { + "dev_info": { + "device_type": "MUX", + "device_name": "LC2-PORT-MUX2", + "device_parent": "CPLD-OCORE2" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x4", + "dev_addr": "0x72", + "dev_type": "pca9548" + }, + "dev_attr": { + "virt_bus": "0x77" + }, + "channel": [{ + "chn": "0", + "dev": "PORT49" + }, + { + "chn": "1", + "dev": "PORT50" + }, + { + "chn": "2", + "dev": "PORT51" + }, + { + "chn": "3", + "dev": "PORT52" + }, + { + "chn": "4", + "dev": "PORT53" + }, + { + "chn": "5", + "dev": "PORT54" + }, + { + "chn": "6", + "dev": "PORT55" + }, + { + "chn": "7", + "dev": "PORT56" + } + ] + } + }, + + "PORT49": { + "dev_info": { + "device_type": "QSFP", + "device_name": "PORT49", + "device_parent": "LC2-PORT-MUX2" + }, + "dev_attr": { + "dev_idx": "49" + }, + "i2c": { + "interface": [{ + "itf": "eeprom", + "dev": "PORT49-EEPROM" + }, { + "itf": "control", + "dev": "PORT49-CTRL" + }] + } + }, + + "PORT49-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT49-EEPROM", + "device_parent": "LC2-PORT-MUX2", + "virt_parent": "PORT49" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x77", + "dev_addr": "0x50", + "dev_type": "optoe1" + }, + "attr_list": [{ + "attr_name": "eeprom" + }] + } + }, + + "PORT49-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT49-CTRL", + "device_parent": "LC2-PORT-MUX2", + "virt_parent": "PORT49" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x77", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [{ + "attr_name": "xcvr_present", + "attr_devname": "LC2-CPLD-B", + "attr_devaddr": "0x31", + "attr_devtype": "cpld", + "attr_offset": "0x10", + "attr_mask": "0x0", + "attr_cmpval": "0x0", + "attr_len": "1" + }, { + "attr_name": "xcvr_reset", + "attr_devname": "LC2-CPLD-B", + "attr_devaddr": "0x31", + "attr_devtype": "cpld", + "attr_offset": "0x14", + "attr_mask": "0x0", + "attr_cmpval": "0x0", + "attr_len": "1" + }] + } + }, + + "PORT50": { + "dev_info": { + "device_type": "QSFP", + "device_name": "PORT50", + "device_parent": "LC2-PORT-MUX2" + }, + "dev_attr": { + "dev_idx": "50" + }, + "i2c": { + "interface": [{ + "itf": "eeprom", + "dev": "PORT50-EEPROM" + }, { + "itf": "control", + "dev": "PORT50-CTRL" + }] + } + }, + + "PORT50-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT50-EEPROM", + "device_parent": "LC2-PORT-MUX2", + "virt_parent": "PORT50" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x78", + "dev_addr": "0x50", + "dev_type": "optoe1" + }, + "attr_list": [{ + "attr_name": "eeprom" + }] + } + }, + + "PORT50-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT50-CTRL", + "device_parent": "LC2-PORT-MUX2", + "virt_parent": "PORT50" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x78", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [{ + "attr_name": "xcvr_present", + "attr_devname": "LC2-CPLD-B", + "attr_devaddr": "0x31", + "attr_devtype": "cpld", + "attr_offset": "0x10", + "attr_mask": "0x1", + "attr_cmpval": "0x0", + "attr_len": "1" + }, { + "attr_name": "xcvr_reset", + "attr_devname": "LC2-CPLD-B", + "attr_devaddr": "0x31", + "attr_devtype": "cpld", + "attr_offset": "0x14", + "attr_mask": "0x1", + "attr_cmpval": "0x0", + "attr_len": "1" + }] + } + }, + + "PORT51": { + "dev_info": { + "device_type": "QSFP", + "device_name": "PORT51", + "device_parent": "LC2-PORT-MUX2" + }, + "dev_attr": { + "dev_idx": "51" + }, + "i2c": { + "interface": [{ + "itf": "eeprom", + "dev": "PORT51-EEPROM" + }, { + "itf": "control", + "dev": "PORT51-CTRL" + }] + } + }, + + "PORT51-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT51-EEPROM", + "device_parent": "LC2-PORT-MUX2", + "virt_parent": "PORT51" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x79", + "dev_addr": "0x50", + "dev_type": "optoe1" + }, + "attr_list": [{ + "attr_name": "eeprom" + }] + } + }, + + "PORT51-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT51-CTRL", + "device_parent": "LC2-PORT-MUX2", + "virt_parent": "PORT51" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x79", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [{ + "attr_name": "xcvr_present", + "attr_devname": "LC2-CPLD-B", + "attr_devaddr": "0x31", + "attr_devtype": "cpld", + "attr_offset": "0x10", + "attr_mask": "0x2", + "attr_cmpval": "0x0", + "attr_len": "1" + }, { + "attr_name": "xcvr_reset", + "attr_devname": "LC2-CPLD-B", + "attr_devaddr": "0x31", + "attr_devtype": "cpld", + "attr_offset": "0x14", + "attr_mask": "0x2", + "attr_cmpval": "0x0", + "attr_len": "1" + }] + } + }, + + "PORT52": { + "dev_info": { + "device_type": "QSFP", + "device_name": "PORT52", + "device_parent": "LC2-PORT-MUX2" + }, + "dev_attr": { + "dev_idx": "52" + }, + "i2c": { + "interface": [{ + "itf": "eeprom", + "dev": "PORT52-EEPROM" + }, { + "itf": "control", + "dev": "PORT52-CTRL" + }] + } + }, + + "PORT52-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT52-EEPROM", + "device_parent": "LC2-PORT-MUX2", + "virt_parent": "PORT52" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x7a", + "dev_addr": "0x50", + "dev_type": "optoe1" + }, + "attr_list": [{ + "attr_name": "eeprom" + }] + } + }, + + "PORT52-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT52-CTRL", + "device_parent": "LC2-PORT-MUX2", + "virt_parent": "PORT52" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x7a", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [{ + "attr_name": "xcvr_present", + "attr_devname": "LC2-CPLD-B", + "attr_devaddr": "0x31", + "attr_devtype": "cpld", + "attr_offset": "0x10", + "attr_mask": "0x3", + "attr_cmpval": "0x0", + "attr_len": "1" + }, { + "attr_name": "xcvr_reset", + "attr_devname": "LC2-CPLD-B", + "attr_devaddr": "0x31", + "attr_devtype": "cpld", + "attr_offset": "0x14", + "attr_mask": "0x3", + "attr_cmpval": "0x0", + "attr_len": "1" + }] + } + }, + + "PORT53": { + "dev_info": { + "device_type": "QSFP", + "device_name": "PORT53", + "device_parent": "LC2-PORT-MUX2" + }, + "dev_attr": { + "dev_idx": "53" + }, + "i2c": { + "interface": [{ + "itf": "eeprom", + "dev": "PORT53-EEPROM" + }, { + "itf": "control", + "dev": "PORT53-CTRL" + }] + } + }, + + "PORT53-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT53-EEPROM", + "device_parent": "LC2-PORT-MUX2", + "virt_parent": "PORT53" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x7b", + "dev_addr": "0x50", + "dev_type": "optoe1" + }, + "attr_list": [{ + "attr_name": "eeprom" + }] + } + }, + + "PORT53-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT53-CTRL", + "device_parent": "LC2-PORT-MUX2", + "virt_parent": "PORT53" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x7b", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [{ + "attr_name": "xcvr_present", + "attr_devname": "LC2-CPLD-B", + "attr_devaddr": "0x31", + "attr_devtype": "cpld", + "attr_offset": "0x10", + "attr_mask": "0x4", + "attr_cmpval": "0x0", + "attr_len": "1" + }, { + "attr_name": "xcvr_reset", + "attr_devname": "LC2-CPLD-B", + "attr_devaddr": "0x31", + "attr_devtype": "cpld", + "attr_offset": "0x14", + "attr_mask": "0x4", + "attr_cmpval": "0x0", + "attr_len": "1" + }] + } + }, + + "PORT54": { + "dev_info": { + "device_type": "QSFP", + "device_name": "PORT54", + "device_parent": "LC2-PORT-MUX2" + }, + "dev_attr": { + "dev_idx": "54" + }, + "i2c": { + "interface": [{ + "itf": "eeprom", + "dev": "PORT54-EEPROM" + }, { + "itf": "control", + "dev": "PORT54-CTRL" + }] + } + }, + + "PORT54-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT54-EEPROM", + "device_parent": "LC2-PORT-MUX2", + "virt_parent": "PORT54" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x7c", + "dev_addr": "0x50", + "dev_type": "optoe1" + }, + "attr_list": [{ + "attr_name": "eeprom" + }] + } + }, + + "PORT54-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT54-CTRL", + "device_parent": "LC2-PORT-MUX2", + "virt_parent": "PORT54" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x7c", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [{ + "attr_name": "xcvr_present", + "attr_devname": "LC2-CPLD-B", + "attr_devaddr": "0x31", + "attr_devtype": "cpld", + "attr_offset": "0x10", + "attr_mask": "0x5", + "attr_cmpval": "0x0", + "attr_len": "1" + }, { + "attr_name": "xcvr_reset", + "attr_devname": "LC2-CPLD-B", + "attr_devaddr": "0x31", + "attr_devtype": "cpld", + "attr_offset": "0x14", + "attr_mask": "0x5", + "attr_cmpval": "0x0", + "attr_len": "1" + }] + } + }, + + "PORT55": { + "dev_info": { + "device_type": "QSFP", + "device_name": "PORT55", + "device_parent": "LC2-PORT-MUX2" + }, + "dev_attr": { + "dev_idx": "55" + }, + "i2c": { + "interface": [{ + "itf": "eeprom", + "dev": "PORT55-EEPROM" + }, { + "itf": "control", + "dev": "PORT55-CTRL" + }] + } + }, + + "PORT55-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT55-EEPROM", + "device_parent": "LC2-PORT-MUX2", + "virt_parent": "PORT55" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x7d", + "dev_addr": "0x50", + "dev_type": "optoe1" + }, + "attr_list": [{ + "attr_name": "eeprom" + }] + } + }, + + "PORT55-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT55-CTRL", + "device_parent": "LC2-PORT-MUX2", + "virt_parent": "PORT55" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x7d", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [{ + "attr_name": "xcvr_present", + "attr_devname": "LC2-CPLD-B", + "attr_devaddr": "0x31", + "attr_devtype": "cpld", + "attr_offset": "0x10", + "attr_mask": "0x6", + "attr_cmpval": "0x0", + "attr_len": "1" + }, { + "attr_name": "xcvr_reset", + "attr_devname": "LC2-CPLD-B", + "attr_devaddr": "0x31", + "attr_devtype": "cpld", + "attr_offset": "0x14", + "attr_mask": "0x6", + "attr_cmpval": "0x0", + "attr_len": "1" + }] + } + }, + + "PORT56": { + "dev_info": { + "device_type": "QSFP", + "device_name": "PORT56", + "device_parent": "LC2-PORT-MUX2" + }, + "dev_attr": { + "dev_idx": "56" + }, + "i2c": { + "interface": [{ + "itf": "eeprom", + "dev": "PORT56-EEPROM" + }, { + "itf": "control", + "dev": "PORT56-CTRL" + }] + } + }, + + "PORT56-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT56-EEPROM", + "device_parent": "LC2-PORT-MUX2", + "virt_parent": "PORT56" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x7e", + "dev_addr": "0x50", + "dev_type": "optoe1" + }, + "attr_list": [{ + "attr_name": "eeprom" + }] + } + }, + + "PORT56-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT56-CTRL", + "device_parent": "LC2-PORT-MUX2", + "virt_parent": "PORT56" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x7e", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [{ + "attr_name": "xcvr_present", + "attr_devname": "LC2-CPLD-B", + "attr_devaddr": "0x31", + "attr_devtype": "cpld", + "attr_offset": "0x10", + "attr_mask": "0x7", + "attr_cmpval": "0x0", + "attr_len": "1" + }, { + "attr_name": "xcvr_reset", + "attr_devname": "LC2-CPLD-B", + "attr_devaddr": "0x31", + "attr_devtype": "cpld", + "attr_offset": "0x14", + "attr_mask": "0x7", + "attr_cmpval": "0x0", + "attr_len": "1" + }] + } + }, + + "LC2-PORT-MUX3": { + "dev_info": { + "device_type": "MUX", + "device_name": "LC2-PORT-MUX3", + "device_parent": "CPLD-OCORE2" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x4", + "dev_addr": "0x73", + "dev_type": "pca9548" + }, + "dev_attr": { + "virt_bus": "0x7f" + }, + "channel": [{ + "chn": "0", + "dev": "PORT57" + }, + { + "chn": "1", + "dev": "PORT58" + }, + { + "chn": "2", + "dev": "PORT59" + }, + { + "chn": "3", + "dev": "PORT60" + }, + { + "chn": "4", + "dev": "PORT61" + }, + { + "chn": "5", + "dev": "PORT62" + }, + { + "chn": "6", + "dev": "PORT63" + }, + { + "chn": "7", + "dev": "PORT64" + } + ] + } + }, + + "PORT57": { + "dev_info": { + "device_type": "QSFP", + "device_name": "PORT57", + "device_parent": "LC2-PORT-MUX3" + }, + "dev_attr": { + "dev_idx": "57" + }, + "i2c": { + "interface": [{ + "itf": "eeprom", + "dev": "PORT57-EEPROM" + }, { + "itf": "control", + "dev": "PORT57-CTRL" + }] + } + }, + + "PORT57-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT57-EEPROM", + "device_parent": "LC2-PORT-MUX3", + "virt_parent": "PORT57" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x7f", + "dev_addr": "0x50", + "dev_type": "optoe1" + }, + "attr_list": [{ + "attr_name": "eeprom" + }] + } + }, + + "PORT57-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT57-CTRL", + "device_parent": "LC2-PORT-MUX3", + "virt_parent": "PORT57" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x7f", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [{ + "attr_name": "xcvr_present", + "attr_devname": "LC2-CPLD-B", + "attr_devaddr": "0x31", + "attr_devtype": "cpld", + "attr_offset": "0x11", + "attr_mask": "0x0", + "attr_cmpval": "0x0", + "attr_len": "1" + }, { + "attr_name": "xcvr_reset", + "attr_devname": "LC2-CPLD-B", + "attr_devaddr": "0x31", + "attr_devtype": "cpld", + "attr_offset": "0x15", + "attr_mask": "0x0", + "attr_cmpval": "0x0", + "attr_len": "1" + }] + } + }, + + "PORT58": { + "dev_info": { + "device_type": "QSFP", + "device_name": "PORT58", + "device_parent": "LC2-PORT-MUX3" + }, + "dev_attr": { + "dev_idx": "58" + }, + "i2c": { + "interface": [{ + "itf": "eeprom", + "dev": "PORT58-EEPROM" + }, { + "itf": "control", + "dev": "PORT58-CTRL" + }] + } + }, + + "PORT58-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT58-EEPROM", + "device_parent": "LC2-PORT-MUX3", + "virt_parent": "PORT58" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x80", + "dev_addr": "0x50", + "dev_type": "optoe1" + }, + "attr_list": [{ + "attr_name": "eeprom" + }] + } + }, + + "PORT58-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT58-CTRL", + "device_parent": "LC2-PORT-MUX3", + "virt_parent": "PORT58" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x80", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [{ + "attr_name": "xcvr_present", + "attr_devname": "LC2-CPLD-B", + "attr_devaddr": "0x31", + "attr_devtype": "cpld", + "attr_offset": "0x11", + "attr_mask": "0x1", + "attr_cmpval": "0x0", + "attr_len": "1" + }, { + "attr_name": "xcvr_reset", + "attr_devname": "LC2-CPLD-B", + "attr_devaddr": "0x31", + "attr_devtype": "cpld", + "attr_offset": "0x15", + "attr_mask": "0x1", + "attr_cmpval": "0x0", + "attr_len": "1" + }] + } + }, + + "PORT59": { + "dev_info": { + "device_type": "QSFP", + "device_name": "PORT59", + "device_parent": "LC2-PORT-MUX3" + }, + "dev_attr": { + "dev_idx": "59" + }, + "i2c": { + "interface": [{ + "itf": "eeprom", + "dev": "PORT59-EEPROM" + }, { + "itf": "control", + "dev": "PORT59-CTRL" + }] + } + }, + + "PORT59-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT59-EEPROM", + "device_parent": "LC2-PORT-MUX3", + "virt_parent": "PORT59" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x81", + "dev_addr": "0x50", + "dev_type": "optoe1" + }, + "attr_list": [{ + "attr_name": "eeprom" + }] + } + }, + + "PORT59-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT59-CTRL", + "device_parent": "LC2-PORT-MUX3", + "virt_parent": "PORT59" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x81", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [{ + "attr_name": "xcvr_present", + "attr_devname": "LC2-CPLD-B", + "attr_devaddr": "0x31", + "attr_devtype": "cpld", + "attr_offset": "0x11", + "attr_mask": "0x2", + "attr_cmpval": "0x0", + "attr_len": "1" + }, { + "attr_name": "xcvr_reset", + "attr_devname": "LC2-CPLD-B", + "attr_devaddr": "0x31", + "attr_devtype": "cpld", + "attr_offset": "0x15", + "attr_mask": "0x2", + "attr_cmpval": "0x0", + "attr_len": "1" + }] + } + }, + + "PORT60": { + "dev_info": { + "device_type": "QSFP", + "device_name": "PORT60", + "device_parent": "LC2-PORT-MUX3" + }, + "dev_attr": { + "dev_idx": "60" + }, + "i2c": { + "interface": [{ + "itf": "eeprom", + "dev": "PORT60-EEPROM" + }, { + "itf": "control", + "dev": "PORT60-CTRL" + }] + } + }, + + "PORT60-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT60-EEPROM", + "device_parent": "LC2-PORT-MUX3", + "virt_parent": "PORT60" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x82", + "dev_addr": "0x50", + "dev_type": "optoe1" + }, + "attr_list": [{ + "attr_name": "eeprom" + }] + } + }, + + "PORT60-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT60-CTRL", + "device_parent": "LC2-PORT-MUX3", + "virt_parent": "PORT60" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x82", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [{ + "attr_name": "xcvr_present", + "attr_devname": "LC2-CPLD-B", + "attr_devaddr": "0x31", + "attr_devtype": "cpld", + "attr_offset": "0x11", + "attr_mask": "0x3", + "attr_cmpval": "0x0", + "attr_len": "1" + }, { + "attr_name": "xcvr_reset", + "attr_devname": "LC2-CPLD-B", + "attr_devaddr": "0x31", + "attr_devtype": "cpld", + "attr_offset": "0x15", + "attr_mask": "0x3", + "attr_cmpval": "0x0", + "attr_len": "1" + }] + } + }, + + "PORT61": { + "dev_info": { + "device_type": "QSFP", + "device_name": "PORT61", + "device_parent": "LC2-PORT-MUX3" + }, + "dev_attr": { + "dev_idx": "61" + }, + "i2c": { + "interface": [{ + "itf": "eeprom", + "dev": "PORT61-EEPROM" + }, { + "itf": "control", + "dev": "PORT61-CTRL" + }] + } + }, + + "PORT61-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT61-EEPROM", + "device_parent": "LC2-PORT-MUX3", + "virt_parent": "PORT61" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x83", + "dev_addr": "0x50", + "dev_type": "optoe1" + }, + "attr_list": [{ + "attr_name": "eeprom" + }] + } + }, + + "PORT61-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT61-CTRL", + "device_parent": "LC2-PORT-MUX3", + "virt_parent": "PORT61" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x83", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [{ + "attr_name": "xcvr_present", + "attr_devname": "LC2-CPLD-B", + "attr_devaddr": "0x31", + "attr_devtype": "cpld", + "attr_offset": "0x11", + "attr_mask": "0x4", + "attr_cmpval": "0x0", + "attr_len": "1" + }, { + "attr_name": "xcvr_reset", + "attr_devname": "LC2-CPLD-B", + "attr_devaddr": "0x31", + "attr_devtype": "cpld", + "attr_offset": "0x15", + "attr_mask": "0x4", + "attr_cmpval": "0x0", + "attr_len": "1" + }] + } + }, + + "PORT62": { + "dev_info": { + "device_type": "QSFP", + "device_name": "PORT62", + "device_parent": "LC2-PORT-MUX3" + }, + "dev_attr": { + "dev_idx": "62" + }, + "i2c": { + "interface": [{ + "itf": "eeprom", + "dev": "PORT62-EEPROM" + }, { + "itf": "control", + "dev": "PORT62-CTRL" + }] + } + }, + + "PORT62-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT62-EEPROM", + "device_parent": "LC2-PORT-MUX3", + "virt_parent": "PORT62" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x84", + "dev_addr": "0x50", + "dev_type": "optoe1" + }, + "attr_list": [{ + "attr_name": "eeprom" + }] + } + }, + + "PORT62-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT62-CTRL", + "device_parent": "LC2-PORT-MUX3", + "virt_parent": "PORT62" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x84", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [{ + "attr_name": "xcvr_present", + "attr_devname": "LC2-CPLD-B", + "attr_devaddr": "0x31", + "attr_devtype": "cpld", + "attr_offset": "0x11", + "attr_mask": "0x5", + "attr_cmpval": "0x0", + "attr_len": "1" + }, { + "attr_name": "xcvr_reset", + "attr_devname": "LC2-CPLD-B", + "attr_devaddr": "0x31", + "attr_devtype": "cpld", + "attr_offset": "0x15", + "attr_mask": "0x5", + "attr_cmpval": "0x0", + "attr_len": "1" + }] + } + }, + + "PORT63": { + "dev_info": { + "device_type": "QSFP", + "device_name": "PORT63", + "device_parent": "LC2-PORT-MUX3" + }, + "dev_attr": { + "dev_idx": "63" + }, + "i2c": { + "interface": [{ + "itf": "eeprom", + "dev": "PORT63-EEPROM" + }, { + "itf": "control", + "dev": "PORT63-CTRL" + }] + } + }, + + "PORT63-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT63-EEPROM", + "device_parent": "LC2-PORT-MUX3", + "virt_parent": "PORT63" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x85", + "dev_addr": "0x50", + "dev_type": "optoe1" + }, + "attr_list": [{ + "attr_name": "eeprom" + }] + } + }, + + "PORT63-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT63-CTRL", + "device_parent": "LC2-PORT-MUX3", + "virt_parent": "PORT63" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x85", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [{ + "attr_name": "xcvr_present", + "attr_devname": "LC2-CPLD-B", + "attr_devaddr": "0x31", + "attr_devtype": "cpld", + "attr_offset": "0x11", + "attr_mask": "0x6", + "attr_cmpval": "0x0", + "attr_len": "1" + }, { + "attr_name": "xcvr_reset", + "attr_devname": "LC2-CPLD-B", + "attr_devaddr": "0x31", + "attr_devtype": "cpld", + "attr_offset": "0x15", + "attr_mask": "0x6", + "attr_cmpval": "0x0", + "attr_len": "1" + }] + } + }, + + "PORT64": { + "dev_info": { + "device_type": "QSFP", + "device_name": "PORT64", + "device_parent": "LC2-PORT-MUX3" + }, + "dev_attr": { + "dev_idx": "64" + }, + "i2c": { + "interface": [{ + "itf": "eeprom", + "dev": "PORT64-EEPROM" + }, { + "itf": "control", + "dev": "PORT64-CTRL" + }] + } + }, + + "PORT64-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT64-EEPROM", + "device_parent": "LC2-PORT-MUX3", + "virt_parent": "PORT64" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x86", + "dev_addr": "0x50", + "dev_type": "optoe1" + }, + "attr_list": [{ + "attr_name": "eeprom" + }] + } + }, + + "PORT64-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT64-CTRL", + "device_parent": "LC2-PORT-MUX3", + "virt_parent": "PORT64" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x86", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [{ + "attr_name": "xcvr_present", + "attr_devname": "LC2-CPLD-B", + "attr_devaddr": "0x31", + "attr_devtype": "cpld", + "attr_offset": "0x11", + "attr_mask": "0x7", + "attr_cmpval": "0x0", + "attr_len": "1" + }, { + "attr_name": "xcvr_reset", + "attr_devname": "LC2-CPLD-B", + "attr_devaddr": "0x31", + "attr_devtype": "cpld", + "attr_offset": "0x15", + "attr_mask": "0x7", + "attr_cmpval": "0x0", + "attr_len": "1" + }] + } + }, + + "CPLD-OCORE3": { + "dev_info": { + "device_type": "CPLD-OCORE", + "device_name": "CPLD-OCORE3", + "device_parent": "SYSTEM" + }, + "i2c": { + "topo_info": { + "dev_addr": "0x5" + }, + "DEVICES": [ + { + "dev": "LC3-CPLD-A" + }, + { + "dev": "LC3-CPLD-B" + }, + { + "dev": "LC3-EEPROM" + }, + { + "dev": "LC3-TLV-EEPROM" + }, + { + "dev": "LC3-PORT-MUX0" + }, + { + "dev": "LC3-PORT-MUX1" + }, + { + "dev": "LC3-PORT-MUX2" + }, + { + "dev": "LC3-PORT-MUX3" + } + ] + } + }, + + "LC3-CPLD-A": { + "dev_info": { + "device_type": "CPLD", + "device_name": "LC3-CPLD-A", + "device_parent": "CPLD-OCORE1" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x5", + "dev_addr": "0x30", + "dev_type": "i2c_cpld" + }, + "dev_attr": {} + } + }, + + "LC3-CPLD-B": { + "dev_info": { + "device_type": "CPLD", + "device_name": "LC3-CPLD-B", + "device_parent": "CPLD-OCORE1" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x5", + "dev_addr": "0x31", + "dev_type": "i2c_cpld" + }, + "dev_attr": {} + } + }, + + "LC3-EEPROM": { + "dev_info": { + "device_type": "EEPROM", + "device_name": "LC3-EEPROM", + "device_parent": "CPLD-OCORE1" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x5", + "dev_addr": "0x56", + "dev_type": "24c02" + }, + "dev_attr": { + "access_mode": "BLOCK" + }, + "attr_list": [{ + "attr_name": "eeprom" + }] + } + }, + + "LC3-TLV-EEPROM": { + "dev_info": { + "device_type": "EEPROM", + "device_name": "LC3-TLV-EEPROM", + "device_parent": "CPLD-OCORE1" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x5", + "dev_addr": "0x57", + "dev_type": "24c02" + }, + "dev_attr": { + "access_mode": "BLOCK" + }, + "attr_list": [{ + "attr_name": "eeprom" + }] + } + }, + + "LC3-PORT-MUX0": { + "dev_info": { + "device_type": "MUX", + "device_name": "LC3-PORT-MUX0", + "device_parent": "CPLD-OCORE3" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x5", + "dev_addr": "0x70", + "dev_type": "pca9548" + }, + "dev_attr": { + "virt_bus": "0x87" + }, + "channel": [{ + "chn": "0", + "dev": "PORT65" + }, + { + "chn": "1", + "dev": "PORT66" + }, + { + "chn": "2", + "dev": "PORT67" + }, + { + "chn": "3", + "dev": "PORT68" + }, + { + "chn": "4", + "dev": "PORT69" + }, + { + "chn": "5", + "dev": "PORT70" + }, + { + "chn": "6", + "dev": "PORT71" + }, + { + "chn": "7", + "dev": "PORT72" + } + ] + } + }, + + "PORT65": { + "dev_info": { + "device_type": "QSFP", + "device_name": "PORT65", + "device_parent": "LC3-PORT-MUX0" + }, + "dev_attr": { + "dev_idx": "65" + }, + "i2c": { + "interface": [{ + "itf": "eeprom", + "dev": "PORT65-EEPROM" + }, { + "itf": "control", + "dev": "PORT65-CTRL" + }] + } + }, + + "PORT65-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT65-EEPROM", + "device_parent": "LC3-PORT-MUX0", + "virt_parent": "PORT65" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x87", + "dev_addr": "0x50", + "dev_type": "optoe1" + }, + "attr_list": [{ + "attr_name": "eeprom" + }] + } + }, + + "PORT65-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT65-CTRL", + "device_parent": "LC3-PORT-MUX0", + "virt_parent": "PORT65" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x87", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [{ + "attr_name": "xcvr_present", + "attr_devname": "LC3-CPLD-A", + "attr_devaddr": "0x30", + "attr_devtype": "cpld", + "attr_offset": "0x10", + "attr_mask": "0x0", + "attr_cmpval": "0x0", + "attr_len": "1" + }, { + "attr_name": "xcvr_reset", + "attr_devname": "LC3-CPLD-A", + "attr_devaddr": "0x30", + "attr_devtype": "cpld", + "attr_offset": "0x14", + "attr_mask": "0x0", + "attr_cmpval": "0x0", + "attr_len": "1" + }] + } + }, + + "PORT66": { + "dev_info": { + "device_type": "QSFP", + "device_name": "PORT66", + "device_parent": "LC3-PORT-MUX0" + }, + "dev_attr": { + "dev_idx": "66" + }, + "i2c": { + "interface": [{ + "itf": "eeprom", + "dev": "PORT66-EEPROM" + }, { + "itf": "control", + "dev": "PORT66-CTRL" + }] + } + }, + + "PORT66-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT66-EEPROM", + "device_parent": "LC3-PORT-MUX0", + "virt_parent": "PORT66" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x88", + "dev_addr": "0x50", + "dev_type": "optoe1" + }, + "attr_list": [{ + "attr_name": "eeprom" + }] + } + }, + + "PORT66-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT66-CTRL", + "device_parent": "LC3-PORT-MUX0", + "virt_parent": "PORT66" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x88", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [{ + "attr_name": "xcvr_present", + "attr_devname": "LC3-CPLD-A", + "attr_devaddr": "0x30", + "attr_devtype": "cpld", + "attr_offset": "0x10", + "attr_mask": "0x1", + "attr_cmpval": "0x0", + "attr_len": "1" + }, { + "attr_name": "xcvr_reset", + "attr_devname": "LC3-CPLD-A", + "attr_devaddr": "0x30", + "attr_devtype": "cpld", + "attr_offset": "0x14", + "attr_mask": "0x1", + "attr_cmpval": "0x0", + "attr_len": "1" + }] + } + }, + + "PORT67": { + "dev_info": { + "device_type": "QSFP", + "device_name": "PORT67", + "device_parent": "LC3-PORT-MUX0" + }, + "dev_attr": { + "dev_idx": "67" + }, + "i2c": { + "interface": [{ + "itf": "eeprom", + "dev": "PORT67-EEPROM" + }, { + "itf": "control", + "dev": "PORT67-CTRL" + }] + } + }, + + "PORT67-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT67-EEPROM", + "device_parent": "LC3-PORT-MUX0", + "virt_parent": "PORT67" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x89", + "dev_addr": "0x50", + "dev_type": "optoe1" + }, + "attr_list": [{ + "attr_name": "eeprom" + }] + } + }, + + "PORT67-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT67-CTRL", + "device_parent": "LC3-PORT-MUX0", + "virt_parent": "PORT67" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x89", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [{ + "attr_name": "xcvr_present", + "attr_devname": "LC3-CPLD-A", + "attr_devaddr": "0x30", + "attr_devtype": "cpld", + "attr_offset": "0x10", + "attr_mask": "0x2", + "attr_cmpval": "0x0", + "attr_len": "1" + }, { + "attr_name": "xcvr_reset", + "attr_devname": "LC3-CPLD-A", + "attr_devaddr": "0x30", + "attr_devtype": "cpld", + "attr_offset": "0x14", + "attr_mask": "0x2", + "attr_cmpval": "0x0", + "attr_len": "1" + }] + } + }, + + "PORT68": { + "dev_info": { + "device_type": "QSFP", + "device_name": "PORT68", + "device_parent": "LC3-PORT-MUX0" + }, + "dev_attr": { + "dev_idx": "68" + }, + "i2c": { + "interface": [{ + "itf": "eeprom", + "dev": "PORT68-EEPROM" + }, { + "itf": "control", + "dev": "PORT68-CTRL" + }] + } + }, + + "PORT68-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT68-EEPROM", + "device_parent": "LC3-PORT-MUX0", + "virt_parent": "PORT68" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x8a", + "dev_addr": "0x50", + "dev_type": "optoe1" + }, + "attr_list": [{ + "attr_name": "eeprom" + }] + } + }, + + "PORT68-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT68-CTRL", + "device_parent": "LC3-PORT-MUX0", + "virt_parent": "PORT68" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x8a", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [{ + "attr_name": "xcvr_present", + "attr_devname": "LC3-CPLD-A", + "attr_devaddr": "0x30", + "attr_devtype": "cpld", + "attr_offset": "0x10", + "attr_mask": "0x3", + "attr_cmpval": "0x0", + "attr_len": "1" + }, { + "attr_name": "xcvr_reset", + "attr_devname": "LC3-CPLD-A", + "attr_devaddr": "0x30", + "attr_devtype": "cpld", + "attr_offset": "0x14", + "attr_mask": "0x3", + "attr_cmpval": "0x0", + "attr_len": "1" + }] + } + }, + + "PORT69": { + "dev_info": { + "device_type": "QSFP", + "device_name": "PORT69", + "device_parent": "LC3-PORT-MUX0" + }, + "dev_attr": { + "dev_idx": "69" + }, + "i2c": { + "interface": [{ + "itf": "eeprom", + "dev": "PORT69-EEPROM" + }, { + "itf": "control", + "dev": "PORT69-CTRL" + }] + } + }, + + "PORT69-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT69-EEPROM", + "device_parent": "LC3-PORT-MUX0", + "virt_parent": "PORT69" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x8b", + "dev_addr": "0x50", + "dev_type": "optoe1" + }, + "attr_list": [{ + "attr_name": "eeprom" + }] + } + }, + + "PORT69-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT69-CTRL", + "device_parent": "LC3-PORT-MUX0", + "virt_parent": "PORT69" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x8b", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [{ + "attr_name": "xcvr_present", + "attr_devname": "LC3-CPLD-A", + "attr_devaddr": "0x30", + "attr_devtype": "cpld", + "attr_offset": "0x10", + "attr_mask": "0x4", + "attr_cmpval": "0x0", + "attr_len": "1" + }, { + "attr_name": "xcvr_reset", + "attr_devname": "LC3-CPLD-A", + "attr_devaddr": "0x30", + "attr_devtype": "cpld", + "attr_offset": "0x14", + "attr_mask": "0x4", + "attr_cmpval": "0x0", + "attr_len": "1" + }] + } + }, + + "PORT70": { + "dev_info": { + "device_type": "QSFP", + "device_name": "PORT70", + "device_parent": "LC3-PORT-MUX0" + }, + "dev_attr": { + "dev_idx": "70" + }, + "i2c": { + "interface": [{ + "itf": "eeprom", + "dev": "PORT70-EEPROM" + }, { + "itf": "control", + "dev": "PORT70-CTRL" + }] + } + }, + + "PORT70-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT70-EEPROM", + "device_parent": "LC3-PORT-MUX0", + "virt_parent": "PORT70" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x8c", + "dev_addr": "0x50", + "dev_type": "optoe1" + }, + "attr_list": [{ + "attr_name": "eeprom" + }] + } + }, + + "PORT70-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT70-CTRL", + "device_parent": "LC3-PORT-MUX0", + "virt_parent": "PORT70" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x8c", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [{ + "attr_name": "xcvr_present", + "attr_devname": "LC3-CPLD-A", + "attr_devaddr": "0x30", + "attr_devtype": "cpld", + "attr_offset": "0x10", + "attr_mask": "0x5", + "attr_cmpval": "0x0", + "attr_len": "1" + }, { + "attr_name": "xcvr_reset", + "attr_devname": "LC3-CPLD-A", + "attr_devaddr": "0x30", + "attr_devtype": "cpld", + "attr_offset": "0x14", + "attr_mask": "0x5", + "attr_cmpval": "0x0", + "attr_len": "1" + }] + } + }, + + "PORT71": { + "dev_info": { + "device_type": "QSFP", + "device_name": "PORT71", + "device_parent": "LC3-PORT-MUX0" + }, + "dev_attr": { + "dev_idx": "71" + }, + "i2c": { + "interface": [{ + "itf": "eeprom", + "dev": "PORT71-EEPROM" + }, { + "itf": "control", + "dev": "PORT71-CTRL" + }] + } + }, + + "PORT71-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT71-EEPROM", + "device_parent": "LC3-PORT-MUX0", + "virt_parent": "PORT71" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x8d", + "dev_addr": "0x50", + "dev_type": "optoe1" + }, + "attr_list": [{ + "attr_name": "eeprom" + }] + } + }, + + "PORT71-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT71-CTRL", + "device_parent": "LC3-PORT-MUX0", + "virt_parent": "PORT71" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x8d", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [{ + "attr_name": "xcvr_present", + "attr_devname": "LC3-CPLD-A", + "attr_devaddr": "0x30", + "attr_devtype": "cpld", + "attr_offset": "0x10", + "attr_mask": "0x6", + "attr_cmpval": "0x0", + "attr_len": "1" + }, { + "attr_name": "xcvr_reset", + "attr_devname": "LC3-CPLD-A", + "attr_devaddr": "0x30", + "attr_devtype": "cpld", + "attr_offset": "0x14", + "attr_mask": "0x6", + "attr_cmpval": "0x0", + "attr_len": "1" + }] + } + }, + + "PORT72": { + "dev_info": { + "device_type": "QSFP", + "device_name": "PORT72", + "device_parent": "LC3-PORT-MUX0" + }, + "dev_attr": { + "dev_idx": "72" + }, + "i2c": { + "interface": [{ + "itf": "eeprom", + "dev": "PORT72-EEPROM" + }, { + "itf": "control", + "dev": "PORT72-CTRL" + }] + } + }, + + "PORT72-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT72-EEPROM", + "device_parent": "LC3-PORT-MUX0", + "virt_parent": "PORT72" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x8e", + "dev_addr": "0x50", + "dev_type": "optoe1" + }, + "attr_list": [{ + "attr_name": "eeprom" + }] + } + }, + + "PORT72-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT72-CTRL", + "device_parent": "LC3-PORT-MUX0", + "virt_parent": "PORT72" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x8e", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [{ + "attr_name": "xcvr_present", + "attr_devname": "LC3-CPLD-A", + "attr_devaddr": "0x30", + "attr_devtype": "cpld", + "attr_offset": "0x10", + "attr_mask": "0x7", + "attr_cmpval": "0x0", + "attr_len": "1" + }, { + "attr_name": "xcvr_reset", + "attr_devname": "LC3-CPLD-A", + "attr_devaddr": "0x30", + "attr_devtype": "cpld", + "attr_offset": "0x14", + "attr_mask": "0x7", + "attr_cmpval": "0x0", + "attr_len": "1" + }] + } + }, + + "LC3-PORT-MUX1": { + "dev_info": { + "device_type": "MUX", + "device_name": "LC3-PORT-MUX1", + "device_parent": "CPLD-OCORE3" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x5", + "dev_addr": "0x71", + "dev_type": "pca9548" + }, + "dev_attr": { + "virt_bus": "0x8f" + }, + "channel": [{ + "chn": "0", + "dev": "PORT73" + }, + { + "chn": "1", + "dev": "PORT74" + }, + { + "chn": "2", + "dev": "PORT75" + }, + { + "chn": "3", + "dev": "PORT76" + }, + { + "chn": "4", + "dev": "PORT77" + }, + { + "chn": "5", + "dev": "PORT78" + }, + { + "chn": "6", + "dev": "PORT79" + }, + { + "chn": "7", + "dev": "PORT80" + } + ] + } + }, + + "PORT73": { + "dev_info": { + "device_type": "QSFP", + "device_name": "PORT73", + "device_parent": "LC3-PORT-MUX1" + }, + "dev_attr": { + "dev_idx": "73" + }, + "i2c": { + "interface": [{ + "itf": "eeprom", + "dev": "PORT73-EEPROM" + }, { + "itf": "control", + "dev": "PORT73-CTRL" + }] + } + }, + + "PORT73-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT73-EEPROM", + "device_parent": "LC3-PORT-MUX1", + "virt_parent": "PORT73" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x8f", + "dev_addr": "0x50", + "dev_type": "optoe1" + }, + "attr_list": [{ + "attr_name": "eeprom" + }] + } + }, + + "PORT73-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT73-CTRL", + "device_parent": "LC3-PORT-MUX1", + "virt_parent": "PORT73" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x8f", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [{ + "attr_name": "xcvr_present", + "attr_devname": "LC3-CPLD-A", + "attr_devaddr": "0x30", + "attr_devtype": "cpld", + "attr_offset": "0x11", + "attr_mask": "0x0", + "attr_cmpval": "0x0", + "attr_len": "1" + }, { + "attr_name": "xcvr_reset", + "attr_devname": "LC3-CPLD-A", + "attr_devaddr": "0x30", + "attr_devtype": "cpld", + "attr_offset": "0x15", + "attr_mask": "0x0", + "attr_cmpval": "0x0", + "attr_len": "1" + }] + } + }, + + "PORT74": { + "dev_info": { + "device_type": "QSFP", + "device_name": "PORT74", + "device_parent": "LC3-PORT-MUX1" + }, + "dev_attr": { + "dev_idx": "74" + }, + "i2c": { + "interface": [{ + "itf": "eeprom", + "dev": "PORT74-EEPROM" + }, { + "itf": "control", + "dev": "PORT74-CTRL" + }] + } + }, + + "PORT74-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT74-EEPROM", + "device_parent": "LC3-PORT-MUX1", + "virt_parent": "PORT74" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x90", + "dev_addr": "0x50", + "dev_type": "optoe1" + }, + "attr_list": [{ + "attr_name": "eeprom" + }] + } + }, + + "PORT74-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT74-CTRL", + "device_parent": "LC3-PORT-MUX1", + "virt_parent": "PORT74" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x90", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [{ + "attr_name": "xcvr_present", + "attr_devname": "LC3-CPLD-A", + "attr_devaddr": "0x30", + "attr_devtype": "cpld", + "attr_offset": "0x11", + "attr_mask": "0x1", + "attr_cmpval": "0x0", + "attr_len": "1" + }, { + "attr_name": "xcvr_reset", + "attr_devname": "LC3-CPLD-A", + "attr_devaddr": "0x30", + "attr_devtype": "cpld", + "attr_offset": "0x15", + "attr_mask": "0x1", + "attr_cmpval": "0x0", + "attr_len": "1" + }] + } + }, + + "PORT75": { + "dev_info": { + "device_type": "QSFP", + "device_name": "PORT75", + "device_parent": "LC3-PORT-MUX1" + }, + "dev_attr": { + "dev_idx": "75" + }, + "i2c": { + "interface": [{ + "itf": "eeprom", + "dev": "PORT75-EEPROM" + }, { + "itf": "control", + "dev": "PORT75-CTRL" + }] + } + }, + + "PORT75-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT75-EEPROM", + "device_parent": "LC3-PORT-MUX1", + "virt_parent": "PORT75" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x91", + "dev_addr": "0x50", + "dev_type": "optoe1" + }, + "attr_list": [{ + "attr_name": "eeprom" + }] + } + }, + + "PORT75-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT75-CTRL", + "device_parent": "LC3-PORT-MUX1", + "virt_parent": "PORT75" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x91", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [{ + "attr_name": "xcvr_present", + "attr_devname": "LC3-CPLD-A", + "attr_devaddr": "0x30", + "attr_devtype": "cpld", + "attr_offset": "0x11", + "attr_mask": "0x2", + "attr_cmpval": "0x0", + "attr_len": "1" + }, { + "attr_name": "xcvr_reset", + "attr_devname": "LC3-CPLD-A", + "attr_devaddr": "0x30", + "attr_devtype": "cpld", + "attr_offset": "0x15", + "attr_mask": "0x2", + "attr_cmpval": "0x0", + "attr_len": "1" + }] + } + }, + + "PORT76": { + "dev_info": { + "device_type": "QSFP", + "device_name": "PORT76", + "device_parent": "LC3-PORT-MUX1" + }, + "dev_attr": { + "dev_idx": "76" + }, + "i2c": { + "interface": [{ + "itf": "eeprom", + "dev": "PORT76-EEPROM" + }, { + "itf": "control", + "dev": "PORT76-CTRL" + }] + } + }, + + "PORT76-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT76-EEPROM", + "device_parent": "LC3-PORT-MUX1", + "virt_parent": "PORT76" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x92", + "dev_addr": "0x50", + "dev_type": "optoe1" + }, + "attr_list": [{ + "attr_name": "eeprom" + }] + } + }, + + "PORT76-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT76-CTRL", + "device_parent": "LC3-PORT-MUX1", + "virt_parent": "PORT76" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x92", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [{ + "attr_name": "xcvr_present", + "attr_devname": "LC3-CPLD-A", + "attr_devaddr": "0x30", + "attr_devtype": "cpld", + "attr_offset": "0x11", + "attr_mask": "0x3", + "attr_cmpval": "0x0", + "attr_len": "1" + }, { + "attr_name": "xcvr_reset", + "attr_devname": "LC3-CPLD-A", + "attr_devaddr": "0x30", + "attr_devtype": "cpld", + "attr_offset": "0x15", + "attr_mask": "0x3", + "attr_cmpval": "0x0", + "attr_len": "1" + }] + } + }, + + "PORT77": { + "dev_info": { + "device_type": "QSFP", + "device_name": "PORT77", + "device_parent": "LC3-PORT-MUX1" + }, + "dev_attr": { + "dev_idx": "77" + }, + "i2c": { + "interface": [{ + "itf": "eeprom", + "dev": "PORT77-EEPROM" + }, { + "itf": "control", + "dev": "PORT77-CTRL" + }] + } + }, + + "PORT77-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT77-EEPROM", + "device_parent": "LC3-PORT-MUX1", + "virt_parent": "PORT77" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x93", + "dev_addr": "0x50", + "dev_type": "optoe1" + }, + "attr_list": [{ + "attr_name": "eeprom" + }] + } + }, + + "PORT77-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT77-CTRL", + "device_parent": "LC3-PORT-MUX1", + "virt_parent": "PORT77" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x93", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [{ + "attr_name": "xcvr_present", + "attr_devname": "LC3-CPLD-A", + "attr_devaddr": "0x30", + "attr_devtype": "cpld", + "attr_offset": "0x11", + "attr_mask": "0x4", + "attr_cmpval": "0x0", + "attr_len": "1" + }, { + "attr_name": "xcvr_reset", + "attr_devname": "LC3-CPLD-A", + "attr_devaddr": "0x30", + "attr_devtype": "cpld", + "attr_offset": "0x15", + "attr_mask": "0x4", + "attr_cmpval": "0x0", + "attr_len": "1" + }] + } + }, + + "PORT78": { + "dev_info": { + "device_type": "QSFP", + "device_name": "PORT78", + "device_parent": "LC3-PORT-MUX1" + }, + "dev_attr": { + "dev_idx": "78" + }, + "i2c": { + "interface": [{ + "itf": "eeprom", + "dev": "PORT78-EEPROM" + }, { + "itf": "control", + "dev": "PORT78-CTRL" + }] + } + }, + + "PORT78-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT78-EEPROM", + "device_parent": "LC3-PORT-MUX1", + "virt_parent": "PORT78" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x94", + "dev_addr": "0x50", + "dev_type": "optoe1" + }, + "attr_list": [{ + "attr_name": "eeprom" + }] + } + }, + + "PORT78-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT78-CTRL", + "device_parent": "LC3-PORT-MUX1", + "virt_parent": "PORT78" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x94", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [{ + "attr_name": "xcvr_present", + "attr_devname": "LC3-CPLD-A", + "attr_devaddr": "0x30", + "attr_devtype": "cpld", + "attr_offset": "0x11", + "attr_mask": "0x5", + "attr_cmpval": "0x0", + "attr_len": "1" + }, { + "attr_name": "xcvr_reset", + "attr_devname": "LC3-CPLD-A", + "attr_devaddr": "0x30", + "attr_devtype": "cpld", + "attr_offset": "0x15", + "attr_mask": "0x5", + "attr_cmpval": "0x0", + "attr_len": "1" + }] + } + }, + + "PORT79": { + "dev_info": { + "device_type": "QSFP", + "device_name": "PORT79", + "device_parent": "LC3-PORT-MUX1" + }, + "dev_attr": { + "dev_idx": "79" + }, + "i2c": { + "interface": [{ + "itf": "eeprom", + "dev": "PORT79-EEPROM" + }, { + "itf": "control", + "dev": "PORT79-CTRL" + }] + } + }, + + "PORT79-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT79-EEPROM", + "device_parent": "LC3-PORT-MUX1", + "virt_parent": "PORT79" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x95", + "dev_addr": "0x50", + "dev_type": "optoe1" + }, + "attr_list": [{ + "attr_name": "eeprom" + }] + } + }, + + "PORT79-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT79-CTRL", + "device_parent": "LC3-PORT-MUX1", + "virt_parent": "PORT79" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x95", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [{ + "attr_name": "xcvr_present", + "attr_devname": "LC3-CPLD-A", + "attr_devaddr": "0x30", + "attr_devtype": "cpld", + "attr_offset": "0x11", + "attr_mask": "0x6", + "attr_cmpval": "0x0", + "attr_len": "1" + }, { + "attr_name": "xcvr_reset", + "attr_devname": "LC3-CPLD-A", + "attr_devaddr": "0x30", + "attr_devtype": "cpld", + "attr_offset": "0x15", + "attr_mask": "0x6", + "attr_cmpval": "0x0", + "attr_len": "1" + }] + } + }, + + "PORT80": { + "dev_info": { + "device_type": "QSFP", + "device_name": "PORT80", + "device_parent": "LC3-PORT-MUX1" + }, + "dev_attr": { + "dev_idx": "80" + }, + "i2c": { + "interface": [{ + "itf": "eeprom", + "dev": "PORT80-EEPROM" + }, { + "itf": "control", + "dev": "PORT80-CTRL" + }] + } + }, + + "PORT80-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT80-EEPROM", + "device_parent": "LC3-PORT-MUX1", + "virt_parent": "PORT80" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x96", + "dev_addr": "0x50", + "dev_type": "optoe1" + }, + "attr_list": [{ + "attr_name": "eeprom" + }] + } + }, + + "PORT80-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT80-CTRL", + "device_parent": "LC3-PORT-MUX1", + "virt_parent": "PORT80" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x96", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [{ + "attr_name": "xcvr_present", + "attr_devname": "LC3-CPLD-A", + "attr_devaddr": "0x30", + "attr_devtype": "cpld", + "attr_offset": "0x11", + "attr_mask": "0x7", + "attr_cmpval": "0x0", + "attr_len": "1" + }, { + "attr_name": "xcvr_reset", + "attr_devname": "LC3-CPLD-A", + "attr_devaddr": "0x30", + "attr_devtype": "cpld", + "attr_offset": "0x15", + "attr_mask": "0x7", + "attr_cmpval": "0x0", + "attr_len": "1" + }] + } + }, + + "LC3-PORT-MUX2": { + "dev_info": { + "device_type": "MUX", + "device_name": "LC3-PORT-MUX2", + "device_parent": "CPLD-OCORE3" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x5", + "dev_addr": "0x72", + "dev_type": "pca9548" + }, + "dev_attr": { + "virt_bus": "0x97" + }, + "channel": [{ + "chn": "0", + "dev": "PORT81" + }, + { + "chn": "1", + "dev": "PORT82" + }, + { + "chn": "2", + "dev": "PORT83" + }, + { + "chn": "3", + "dev": "PORT84" + }, + { + "chn": "4", + "dev": "PORT85" + }, + { + "chn": "5", + "dev": "PORT86" + }, + { + "chn": "6", + "dev": "PORT87" + }, + { + "chn": "7", + "dev": "PORT88" + } + ] + } + }, + + "PORT81": { + "dev_info": { + "device_type": "QSFP", + "device_name": "PORT81", + "device_parent": "LC3-PORT-MUX2" + }, + "dev_attr": { + "dev_idx": "81" + }, + "i2c": { + "interface": [{ + "itf": "eeprom", + "dev": "PORT81-EEPROM" + }, { + "itf": "control", + "dev": "PORT81-CTRL" + }] + } + }, + + "PORT81-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT81-EEPROM", + "device_parent": "LC3-PORT-MUX2", + "virt_parent": "PORT81" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x97", + "dev_addr": "0x50", + "dev_type": "optoe1" + }, + "attr_list": [{ + "attr_name": "eeprom" + }] + } + }, + + "PORT81-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT81-CTRL", + "device_parent": "LC3-PORT-MUX2", + "virt_parent": "PORT81" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x97", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [{ + "attr_name": "xcvr_present", + "attr_devname": "LC3-CPLD-B", + "attr_devaddr": "0x31", + "attr_devtype": "cpld", + "attr_offset": "0x10", + "attr_mask": "0x0", + "attr_cmpval": "0x0", + "attr_len": "1" + }, { + "attr_name": "xcvr_reset", + "attr_devname": "LC3-CPLD-B", + "attr_devaddr": "0x31", + "attr_devtype": "cpld", + "attr_offset": "0x14", + "attr_mask": "0x0", + "attr_cmpval": "0x0", + "attr_len": "1" + }] + } + }, + + "PORT82": { + "dev_info": { + "device_type": "QSFP", + "device_name": "PORT82", + "device_parent": "LC3-PORT-MUX2" + }, + "dev_attr": { + "dev_idx": "82" + }, + "i2c": { + "interface": [{ + "itf": "eeprom", + "dev": "PORT82-EEPROM" + }, { + "itf": "control", + "dev": "PORT82-CTRL" + }] + } + }, + + "PORT82-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT82-EEPROM", + "device_parent": "LC3-PORT-MUX2", + "virt_parent": "PORT82" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x98", + "dev_addr": "0x50", + "dev_type": "optoe1" + }, + "attr_list": [{ + "attr_name": "eeprom" + }] + } + }, + + "PORT82-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT82-CTRL", + "device_parent": "LC3-PORT-MUX2", + "virt_parent": "PORT82" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x98", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [{ + "attr_name": "xcvr_present", + "attr_devname": "LC3-CPLD-B", + "attr_devaddr": "0x31", + "attr_devtype": "cpld", + "attr_offset": "0x10", + "attr_mask": "0x1", + "attr_cmpval": "0x0", + "attr_len": "1" + }, { + "attr_name": "xcvr_reset", + "attr_devname": "LC3-CPLD-B", + "attr_devaddr": "0x31", + "attr_devtype": "cpld", + "attr_offset": "0x14", + "attr_mask": "0x1", + "attr_cmpval": "0x0", + "attr_len": "1" + }] + } + }, + + "PORT83": { + "dev_info": { + "device_type": "QSFP", + "device_name": "PORT83", + "device_parent": "LC3-PORT-MUX2" + }, + "dev_attr": { + "dev_idx": "83" + }, + "i2c": { + "interface": [{ + "itf": "eeprom", + "dev": "PORT83-EEPROM" + }, { + "itf": "control", + "dev": "PORT83-CTRL" + }] + } + }, + + "PORT83-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT83-EEPROM", + "device_parent": "LC3-PORT-MUX2", + "virt_parent": "PORT83" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x99", + "dev_addr": "0x50", + "dev_type": "optoe1" + }, + "attr_list": [{ + "attr_name": "eeprom" + }] + } + }, + + "PORT83-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT83-CTRL", + "device_parent": "LC3-PORT-MUX2", + "virt_parent": "PORT83" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x99", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [{ + "attr_name": "xcvr_present", + "attr_devname": "LC3-CPLD-B", + "attr_devaddr": "0x31", + "attr_devtype": "cpld", + "attr_offset": "0x10", + "attr_mask": "0x2", + "attr_cmpval": "0x0", + "attr_len": "1" + }, { + "attr_name": "xcvr_reset", + "attr_devname": "LC3-CPLD-B", + "attr_devaddr": "0x31", + "attr_devtype": "cpld", + "attr_offset": "0x14", + "attr_mask": "0x2", + "attr_cmpval": "0x0", + "attr_len": "1" + }] + } + }, + + "PORT84": { + "dev_info": { + "device_type": "QSFP", + "device_name": "PORT84", + "device_parent": "LC3-PORT-MUX2" + }, + "dev_attr": { + "dev_idx": "84" + }, + "i2c": { + "interface": [{ + "itf": "eeprom", + "dev": "PORT84-EEPROM" + }, { + "itf": "control", + "dev": "PORT84-CTRL" + }] + } + }, + + "PORT84-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT84-EEPROM", + "device_parent": "LC3-PORT-MUX2", + "virt_parent": "PORT84" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x9a", + "dev_addr": "0x50", + "dev_type": "optoe1" + }, + "attr_list": [{ + "attr_name": "eeprom" + }] + } + }, + + "PORT84-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT84-CTRL", + "device_parent": "LC3-PORT-MUX2", + "virt_parent": "PORT84" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x9a", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [{ + "attr_name": "xcvr_present", + "attr_devname": "LC3-CPLD-B", + "attr_devaddr": "0x31", + "attr_devtype": "cpld", + "attr_offset": "0x10", + "attr_mask": "0x3", + "attr_cmpval": "0x0", + "attr_len": "1" + }, { + "attr_name": "xcvr_reset", + "attr_devname": "LC3-CPLD-B", + "attr_devaddr": "0x31", + "attr_devtype": "cpld", + "attr_offset": "0x14", + "attr_mask": "0x3", + "attr_cmpval": "0x0", + "attr_len": "1" + }] + } + }, + + "PORT85": { + "dev_info": { + "device_type": "QSFP", + "device_name": "PORT85", + "device_parent": "LC3-PORT-MUX2" + }, + "dev_attr": { + "dev_idx": "85" + }, + "i2c": { + "interface": [{ + "itf": "eeprom", + "dev": "PORT85-EEPROM" + }, { + "itf": "control", + "dev": "PORT85-CTRL" + }] + } + }, + + "PORT85-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT85-EEPROM", + "device_parent": "LC3-PORT-MUX2", + "virt_parent": "PORT85" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x9b", + "dev_addr": "0x50", + "dev_type": "optoe1" + }, + "attr_list": [{ + "attr_name": "eeprom" + }] + } + }, + + "PORT85-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT85-CTRL", + "device_parent": "LC3-PORT-MUX2", + "virt_parent": "PORT85" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x9b", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [{ + "attr_name": "xcvr_present", + "attr_devname": "LC3-CPLD-B", + "attr_devaddr": "0x31", + "attr_devtype": "cpld", + "attr_offset": "0x10", + "attr_mask": "0x4", + "attr_cmpval": "0x0", + "attr_len": "1" + }, { + "attr_name": "xcvr_reset", + "attr_devname": "LC3-CPLD-B", + "attr_devaddr": "0x31", + "attr_devtype": "cpld", + "attr_offset": "0x14", + "attr_mask": "0x4", + "attr_cmpval": "0x0", + "attr_len": "1" + }] + } + }, + + "PORT86": { + "dev_info": { + "device_type": "QSFP", + "device_name": "PORT86", + "device_parent": "LC3-PORT-MUX2" + }, + "dev_attr": { + "dev_idx": "86" + }, + "i2c": { + "interface": [{ + "itf": "eeprom", + "dev": "PORT86-EEPROM" + }, { + "itf": "control", + "dev": "PORT86-CTRL" + }] + } + }, + + "PORT86-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT86-EEPROM", + "device_parent": "LC3-PORT-MUX2", + "virt_parent": "PORT86" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x9c", + "dev_addr": "0x50", + "dev_type": "optoe1" + }, + "attr_list": [{ + "attr_name": "eeprom" + }] + } + }, + + "PORT86-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT86-CTRL", + "device_parent": "LC3-PORT-MUX2", + "virt_parent": "PORT86" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x9c", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [{ + "attr_name": "xcvr_present", + "attr_devname": "LC3-CPLD-B", + "attr_devaddr": "0x31", + "attr_devtype": "cpld", + "attr_offset": "0x10", + "attr_mask": "0x5", + "attr_cmpval": "0x0", + "attr_len": "1" + }, { + "attr_name": "xcvr_reset", + "attr_devname": "LC3-CPLD-B", + "attr_devaddr": "0x31", + "attr_devtype": "cpld", + "attr_offset": "0x14", + "attr_mask": "0x5", + "attr_cmpval": "0x0", + "attr_len": "1" + }] + } + }, + + "PORT87": { + "dev_info": { + "device_type": "QSFP", + "device_name": "PORT87", + "device_parent": "LC3-PORT-MUX2" + }, + "dev_attr": { + "dev_idx": "87" + }, + "i2c": { + "interface": [{ + "itf": "eeprom", + "dev": "PORT87-EEPROM" + }, { + "itf": "control", + "dev": "PORT87-CTRL" + }] + } + }, + + "PORT87-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT87-EEPROM", + "device_parent": "LC3-PORT-MUX2", + "virt_parent": "PORT87" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x9d", + "dev_addr": "0x50", + "dev_type": "optoe1" + }, + "attr_list": [{ + "attr_name": "eeprom" + }] + } + }, + + "PORT87-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT87-CTRL", + "device_parent": "LC3-PORT-MUX2", + "virt_parent": "PORT87" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x9d", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [{ + "attr_name": "xcvr_present", + "attr_devname": "LC3-CPLD-B", + "attr_devaddr": "0x31", + "attr_devtype": "cpld", + "attr_offset": "0x10", + "attr_mask": "0x6", + "attr_cmpval": "0x0", + "attr_len": "1" + }, { + "attr_name": "xcvr_reset", + "attr_devname": "LC3-CPLD-B", + "attr_devaddr": "0x31", + "attr_devtype": "cpld", + "attr_offset": "0x14", + "attr_mask": "0x6", + "attr_cmpval": "0x0", + "attr_len": "1" + }] + } + }, + + "PORT88": { + "dev_info": { + "device_type": "QSFP", + "device_name": "PORT88", + "device_parent": "LC3-PORT-MUX2" + }, + "dev_attr": { + "dev_idx": "88" + }, + "i2c": { + "interface": [{ + "itf": "eeprom", + "dev": "PORT88-EEPROM" + }, { + "itf": "control", + "dev": "PORT88-CTRL" + }] + } + }, + + "PORT88-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT88-EEPROM", + "device_parent": "LC3-PORT-MUX2", + "virt_parent": "PORT88" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x9e", + "dev_addr": "0x50", + "dev_type": "optoe1" + }, + "attr_list": [{ + "attr_name": "eeprom" + }] + } + }, + + "PORT88-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT88-CTRL", + "device_parent": "LC3-PORT-MUX2", + "virt_parent": "PORT88" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x9e", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [{ + "attr_name": "xcvr_present", + "attr_devname": "LC3-CPLD-B", + "attr_devaddr": "0x31", + "attr_devtype": "cpld", + "attr_offset": "0x10", + "attr_mask": "0x7", + "attr_cmpval": "0x0", + "attr_len": "1" + }, { + "attr_name": "xcvr_reset", + "attr_devname": "LC3-CPLD-B", + "attr_devaddr": "0x31", + "attr_devtype": "cpld", + "attr_offset": "0x14", + "attr_mask": "0x7", + "attr_cmpval": "0x0", + "attr_len": "1" + }] + } + }, + + "LC3-PORT-MUX3": { + "dev_info": { + "device_type": "MUX", + "device_name": "LC3-PORT-MUX3", + "device_parent": "CPLD-OCORE3" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x5", + "dev_addr": "0x73", + "dev_type": "pca9548" + }, + "dev_attr": { + "virt_bus": "0x9f" + }, + "channel": [{ + "chn": "0", + "dev": "PORT89" + }, + { + "chn": "1", + "dev": "PORT90" + }, + { + "chn": "2", + "dev": "PORT91" + }, + { + "chn": "3", + "dev": "PORT92" + }, + { + "chn": "4", + "dev": "PORT93" + }, + { + "chn": "5", + "dev": "PORT94" + }, + { + "chn": "6", + "dev": "PORT95" + }, + { + "chn": "7", + "dev": "PORT96" + } + ] + } + }, + + "PORT89": { + "dev_info": { + "device_type": "QSFP", + "device_name": "PORT89", + "device_parent": "LC3-PORT-MUX3" + }, + "dev_attr": { + "dev_idx": "89" + }, + "i2c": { + "interface": [{ + "itf": "eeprom", + "dev": "PORT89-EEPROM" + }, { + "itf": "control", + "dev": "PORT89-CTRL" + }] + } + }, + + "PORT89-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT89-EEPROM", + "device_parent": "LC3-PORT-MUX3", + "virt_parent": "PORT89" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x9f", + "dev_addr": "0x50", + "dev_type": "optoe1" + }, + "attr_list": [{ + "attr_name": "eeprom" + }] + } + }, + + "PORT89-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT89-CTRL", + "device_parent": "LC3-PORT-MUX3", + "virt_parent": "PORT89" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x9f", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [{ + "attr_name": "xcvr_present", + "attr_devname": "LC3-CPLD-B", + "attr_devaddr": "0x31", + "attr_devtype": "cpld", + "attr_offset": "0x11", + "attr_mask": "0x0", + "attr_cmpval": "0x0", + "attr_len": "1" + }, { + "attr_name": "xcvr_reset", + "attr_devname": "LC3-CPLD-B", + "attr_devaddr": "0x31", + "attr_devtype": "cpld", + "attr_offset": "0x15", + "attr_mask": "0x0", + "attr_cmpval": "0x0", + "attr_len": "1" + }] + } + }, + + "PORT90": { + "dev_info": { + "device_type": "QSFP", + "device_name": "PORT90", + "device_parent": "LC3-PORT-MUX3" + }, + "dev_attr": { + "dev_idx": "90" + }, + "i2c": { + "interface": [{ + "itf": "eeprom", + "dev": "PORT90-EEPROM" + }, { + "itf": "control", + "dev": "PORT90-CTRL" + }] + } + }, + + "PORT90-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT90-EEPROM", + "device_parent": "LC3-PORT-MUX3", + "virt_parent": "PORT90" + }, + "i2c": { + "topo_info": { + "parent_bus": "0xa0", + "dev_addr": "0x50", + "dev_type": "optoe1" + }, + "attr_list": [{ + "attr_name": "eeprom" + }] + } + }, + + "PORT90-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT90-CTRL", + "device_parent": "LC3-PORT-MUX3", + "virt_parent": "PORT90" + }, + "i2c": { + "topo_info": { + "parent_bus": "0xa0", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [{ + "attr_name": "xcvr_present", + "attr_devname": "LC3-CPLD-B", + "attr_devaddr": "0x31", + "attr_devtype": "cpld", + "attr_offset": "0x11", + "attr_mask": "0x1", + "attr_cmpval": "0x0", + "attr_len": "1" + }, { + "attr_name": "xcvr_reset", + "attr_devname": "LC3-CPLD-B", + "attr_devaddr": "0x31", + "attr_devtype": "cpld", + "attr_offset": "0x15", + "attr_mask": "0x1", + "attr_cmpval": "0x0", + "attr_len": "1" + }] + } + }, + + "PORT91": { + "dev_info": { + "device_type": "QSFP", + "device_name": "PORT91", + "device_parent": "LC3-PORT-MUX3" + }, + "dev_attr": { + "dev_idx": "91" + }, + "i2c": { + "interface": [{ + "itf": "eeprom", + "dev": "PORT91-EEPROM" + }, { + "itf": "control", + "dev": "PORT91-CTRL" + }] + } + }, + + "PORT91-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT91-EEPROM", + "device_parent": "LC3-PORT-MUX3", + "virt_parent": "PORT91" + }, + "i2c": { + "topo_info": { + "parent_bus": "0xa1", + "dev_addr": "0x50", + "dev_type": "optoe1" + }, + "attr_list": [{ + "attr_name": "eeprom" + }] + } + }, + + "PORT91-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT91-CTRL", + "device_parent": "LC3-PORT-MUX3", + "virt_parent": "PORT91" + }, + "i2c": { + "topo_info": { + "parent_bus": "0xa1", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [{ + "attr_name": "xcvr_present", + "attr_devname": "LC3-CPLD-B", + "attr_devaddr": "0x31", + "attr_devtype": "cpld", + "attr_offset": "0x11", + "attr_mask": "0x2", + "attr_cmpval": "0x0", + "attr_len": "1" + }, { + "attr_name": "xcvr_reset", + "attr_devname": "LC3-CPLD-B", + "attr_devaddr": "0x31", + "attr_devtype": "cpld", + "attr_offset": "0x15", + "attr_mask": "0x2", + "attr_cmpval": "0x0", + "attr_len": "1" + }] + } + }, + + "PORT92": { + "dev_info": { + "device_type": "QSFP", + "device_name": "PORT92", + "device_parent": "LC3-PORT-MUX3" + }, + "dev_attr": { + "dev_idx": "92" + }, + "i2c": { + "interface": [{ + "itf": "eeprom", + "dev": "PORT92-EEPROM" + }, { + "itf": "control", + "dev": "PORT92-CTRL" + }] + } + }, + + "PORT92-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT92-EEPROM", + "device_parent": "LC3-PORT-MUX3", + "virt_parent": "PORT92" + }, + "i2c": { + "topo_info": { + "parent_bus": "0xa2", + "dev_addr": "0x50", + "dev_type": "optoe1" + }, + "attr_list": [{ + "attr_name": "eeprom" + }] + } + }, + + "PORT92-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT92-CTRL", + "device_parent": "LC3-PORT-MUX3", + "virt_parent": "PORT92" + }, + "i2c": { + "topo_info": { + "parent_bus": "0xa2", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [{ + "attr_name": "xcvr_present", + "attr_devname": "LC3-CPLD-B", + "attr_devaddr": "0x31", + "attr_devtype": "cpld", + "attr_offset": "0x11", + "attr_mask": "0x3", + "attr_cmpval": "0x0", + "attr_len": "1" + }, { + "attr_name": "xcvr_reset", + "attr_devname": "LC3-CPLD-B", + "attr_devaddr": "0x31", + "attr_devtype": "cpld", + "attr_offset": "0x15", + "attr_mask": "0x3", + "attr_cmpval": "0x0", + "attr_len": "1" + }] + } + }, + + "PORT93": { + "dev_info": { + "device_type": "QSFP", + "device_name": "PORT93", + "device_parent": "LC3-PORT-MUX3" + }, + "dev_attr": { + "dev_idx": "93" + }, + "i2c": { + "interface": [{ + "itf": "eeprom", + "dev": "PORT93-EEPROM" + }, { + "itf": "control", + "dev": "PORT93-CTRL" + }] + } + }, + + "PORT93-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT93-EEPROM", + "device_parent": "LC3-PORT-MUX3", + "virt_parent": "PORT93" + }, + "i2c": { + "topo_info": { + "parent_bus": "0xa3", + "dev_addr": "0x50", + "dev_type": "optoe1" + }, + "attr_list": [{ + "attr_name": "eeprom" + }] + } + }, + + "PORT93-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT93-CTRL", + "device_parent": "LC3-PORT-MUX3", + "virt_parent": "PORT93" + }, + "i2c": { + "topo_info": { + "parent_bus": "0xa3", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [{ + "attr_name": "xcvr_present", + "attr_devname": "LC3-CPLD-B", + "attr_devaddr": "0x31", + "attr_devtype": "cpld", + "attr_offset": "0x11", + "attr_mask": "0x4", + "attr_cmpval": "0x0", + "attr_len": "1" + }, { + "attr_name": "xcvr_reset", + "attr_devname": "LC3-CPLD-B", + "attr_devaddr": "0x31", + "attr_devtype": "cpld", + "attr_offset": "0x15", + "attr_mask": "0x4", + "attr_cmpval": "0x0", + "attr_len": "1" + }] + } + }, + + "PORT94": { + "dev_info": { + "device_type": "QSFP", + "device_name": "PORT94", + "device_parent": "LC3-PORT-MUX3" + }, + "dev_attr": { + "dev_idx": "94" + }, + "i2c": { + "interface": [{ + "itf": "eeprom", + "dev": "PORT94-EEPROM" + }, { + "itf": "control", + "dev": "PORT94-CTRL" + }] + } + }, + + "PORT94-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT94-EEPROM", + "device_parent": "LC3-PORT-MUX3", + "virt_parent": "PORT94" + }, + "i2c": { + "topo_info": { + "parent_bus": "0xa4", + "dev_addr": "0x50", + "dev_type": "optoe1" + }, + "attr_list": [{ + "attr_name": "eeprom" + }] + } + }, + + "PORT94-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT94-CTRL", + "device_parent": "LC3-PORT-MUX3", + "virt_parent": "PORT94" + }, + "i2c": { + "topo_info": { + "parent_bus": "0xa4", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [{ + "attr_name": "xcvr_present", + "attr_devname": "LC3-CPLD-B", + "attr_devaddr": "0x31", + "attr_devtype": "cpld", + "attr_offset": "0x11", + "attr_mask": "0x5", + "attr_cmpval": "0x0", + "attr_len": "1" + }, { + "attr_name": "xcvr_reset", + "attr_devname": "LC3-CPLD-B", + "attr_devaddr": "0x31", + "attr_devtype": "cpld", + "attr_offset": "0x15", + "attr_mask": "0x5", + "attr_cmpval": "0x0", + "attr_len": "1" + }] + } + }, + + "PORT95": { + "dev_info": { + "device_type": "QSFP", + "device_name": "PORT95", + "device_parent": "LC3-PORT-MUX3" + }, + "dev_attr": { + "dev_idx": "95" + }, + "i2c": { + "interface": [{ + "itf": "eeprom", + "dev": "PORT95-EEPROM" + }, { + "itf": "control", + "dev": "PORT95-CTRL" + }] + } + }, + + "PORT95-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT95-EEPROM", + "device_parent": "LC3-PORT-MUX3", + "virt_parent": "PORT95" + }, + "i2c": { + "topo_info": { + "parent_bus": "0xa5", + "dev_addr": "0x50", + "dev_type": "optoe1" + }, + "attr_list": [{ + "attr_name": "eeprom" + }] + } + }, + + "PORT95-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT95-CTRL", + "device_parent": "LC3-PORT-MUX3", + "virt_parent": "PORT95" + }, + "i2c": { + "topo_info": { + "parent_bus": "0xa5", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [{ + "attr_name": "xcvr_present", + "attr_devname": "LC3-CPLD-B", + "attr_devaddr": "0x31", + "attr_devtype": "cpld", + "attr_offset": "0x11", + "attr_mask": "0x6", + "attr_cmpval": "0x0", + "attr_len": "1" + }, { + "attr_name": "xcvr_reset", + "attr_devname": "LC3-CPLD-B", + "attr_devaddr": "0x31", + "attr_devtype": "cpld", + "attr_offset": "0x15", + "attr_mask": "0x6", + "attr_cmpval": "0x0", + "attr_len": "1" + }] + } + }, + + "PORT96": { + "dev_info": { + "device_type": "QSFP", + "device_name": "PORT96", + "device_parent": "LC3-PORT-MUX3" + }, + "dev_attr": { + "dev_idx": "96" + }, + "i2c": { + "interface": [{ + "itf": "eeprom", + "dev": "PORT96-EEPROM" + }, { + "itf": "control", + "dev": "PORT96-CTRL" + }] + } + }, + + "PORT96-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT96-EEPROM", + "device_parent": "LC3-PORT-MUX3", + "virt_parent": "PORT96" + }, + "i2c": { + "topo_info": { + "parent_bus": "0xa6", + "dev_addr": "0x50", + "dev_type": "optoe1" + }, + "attr_list": [{ + "attr_name": "eeprom" + }] + } + }, + + "PORT96-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT96-CTRL", + "device_parent": "LC3-PORT-MUX3", + "virt_parent": "PORT96" + }, + "i2c": { + "topo_info": { + "parent_bus": "0xa6", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [{ + "attr_name": "xcvr_present", + "attr_devname": "LC3-CPLD-B", + "attr_devaddr": "0x31", + "attr_devtype": "cpld", + "attr_offset": "0x11", + "attr_mask": "0x7", + "attr_cmpval": "0x0", + "attr_len": "1" + }, { + "attr_name": "xcvr_reset", + "attr_devname": "LC3-CPLD-B", + "attr_devaddr": "0x31", + "attr_devtype": "cpld", + "attr_offset": "0x15", + "attr_mask": "0x7", + "attr_cmpval": "0x0", + "attr_len": "1" + }] + } + }, + + "CPLD-OCORE4": { + "dev_info": { + "device_type": "CPLD-OCORE", + "device_name": "CPLD-OCORE4", + "device_parent": "SYSTEM" + }, + "i2c": { + "topo_info": { + "dev_addr": "0x6" + }, + "DEVICES": [ + { + "dev": "LC4-CPLD-A" + }, + { + "dev": "LC4-CPLD-B" + }, + { + "dev": "LC4-EEPROM" + }, + { + "dev": "LC4-TLV-EEPROM" + }, + { + "dev": "LC4-PORT-MUX0" + }, + { + "dev": "LC4-PORT-MUX1" + }, + { + "dev": "LC4-PORT-MUX2" + }, + { + "dev": "LC4-PORT-MUX3" + } + ] + } + }, + + "LC4-CPLD-A": { + "dev_info": { + "device_type": "CPLD", + "device_name": "LC4-CPLD-A", + "device_parent": "CPLD-OCORE1" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x6", + "dev_addr": "0x30", + "dev_type": "i2c_cpld" + }, + "dev_attr": {} + } + }, + + "LC4-CPLD-B": { + "dev_info": { + "device_type": "CPLD", + "device_name": "LC4-CPLD-B", + "device_parent": "CPLD-OCORE1" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x6", + "dev_addr": "0x31", + "dev_type": "i2c_cpld" + }, + "dev_attr": {} + } + }, + + "LC4-EEPROM": { + "dev_info": { + "device_type": "EEPROM", + "device_name": "LC4-EEPROM", + "device_parent": "CPLD-OCORE1" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x6", + "dev_addr": "0x56", + "dev_type": "24c02" + }, + "dev_attr": { + "access_mode": "BLOCK" + }, + "attr_list": [{ + "attr_name": "eeprom" + }] + } + }, + + "LC4-TLV-EEPROM": { + "dev_info": { + "device_type": "EEPROM", + "device_name": "LC4-TLV-EEPROM", + "device_parent": "CPLD-OCORE1" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x6", + "dev_addr": "0x57", + "dev_type": "24c02" + }, + "dev_attr": { + "access_mode": "BLOCK" + }, + "attr_list": [{ + "attr_name": "eeprom" + }] + } + }, + + "LC4-PORT-MUX0": { + "dev_info": { + "device_type": "MUX", + "device_name": "LC4-PORT-MUX0", + "device_parent": "CPLD-OCORE4" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x6", + "dev_addr": "0x70", + "dev_type": "pca9548" + }, + "dev_attr": { + "virt_bus": "0xa7" + }, + "channel": [{ + "chn": "0", + "dev": "PORT97" + }, + { + "chn": "1", + "dev": "PORT98" + }, + { + "chn": "2", + "dev": "PORT99" + }, + { + "chn": "3", + "dev": "PORT100" + }, + { + "chn": "4", + "dev": "PORT101" + }, + { + "chn": "5", + "dev": "PORT102" + }, + { + "chn": "6", + "dev": "PORT103" + }, + { + "chn": "7", + "dev": "PORT104" + } + ] + } + }, + + "PORT97": { + "dev_info": { + "device_type": "QSFP", + "device_name": "PORT97", + "device_parent": "LC4-PORT-MUX0" + }, + "dev_attr": { + "dev_idx": "97" + }, + "i2c": { + "interface": [{ + "itf": "eeprom", + "dev": "PORT97-EEPROM" + }, { + "itf": "control", + "dev": "PORT97-CTRL" + }] + } + }, + + "PORT97-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT97-EEPROM", + "device_parent": "LC4-PORT-MUX0", + "virt_parent": "PORT97" + }, + "i2c": { + "topo_info": { + "parent_bus": "0xa7", + "dev_addr": "0x50", + "dev_type": "optoe1" + }, + "attr_list": [{ + "attr_name": "eeprom" + }] + } + }, + + "PORT97-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT97-CTRL", + "device_parent": "LC4-PORT-MUX0", + "virt_parent": "PORT97" + }, + "i2c": { + "topo_info": { + "parent_bus": "0xa7", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [{ + "attr_name": "xcvr_present", + "attr_devname": "LC4-CPLD-A", + "attr_devaddr": "0x30", + "attr_devtype": "cpld", + "attr_offset": "0x10", + "attr_mask": "0x0", + "attr_cmpval": "0x0", + "attr_len": "1" + }, { + "attr_name": "xcvr_reset", + "attr_devname": "LC4-CPLD-A", + "attr_devaddr": "0x30", + "attr_devtype": "cpld", + "attr_offset": "0x14", + "attr_mask": "0x0", + "attr_cmpval": "0x0", + "attr_len": "1" + }] + } + }, + + "PORT98": { + "dev_info": { + "device_type": "QSFP", + "device_name": "PORT98", + "device_parent": "LC4-PORT-MUX0" + }, + "dev_attr": { + "dev_idx": "98" + }, + "i2c": { + "interface": [{ + "itf": "eeprom", + "dev": "PORT98-EEPROM" + }, { + "itf": "control", + "dev": "PORT98-CTRL" + }] + } + }, + + "PORT98-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT98-EEPROM", + "device_parent": "LC4-PORT-MUX0", + "virt_parent": "PORT98" + }, + "i2c": { + "topo_info": { + "parent_bus": "0xa8", + "dev_addr": "0x50", + "dev_type": "optoe1" + }, + "attr_list": [{ + "attr_name": "eeprom" + }] + } + }, + + "PORT98-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT98-CTRL", + "device_parent": "LC4-PORT-MUX0", + "virt_parent": "PORT98" + }, + "i2c": { + "topo_info": { + "parent_bus": "0xa8", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [{ + "attr_name": "xcvr_present", + "attr_devname": "LC4-CPLD-A", + "attr_devaddr": "0x30", + "attr_devtype": "cpld", + "attr_offset": "0x10", + "attr_mask": "0x1", + "attr_cmpval": "0x0", + "attr_len": "1" + }, { + "attr_name": "xcvr_reset", + "attr_devname": "LC4-CPLD-A", + "attr_devaddr": "0x30", + "attr_devtype": "cpld", + "attr_offset": "0x14", + "attr_mask": "0x1", + "attr_cmpval": "0x0", + "attr_len": "1" + }] + } + }, + + "PORT99": { + "dev_info": { + "device_type": "QSFP", + "device_name": "PORT99", + "device_parent": "LC4-PORT-MUX0" + }, + "dev_attr": { + "dev_idx": "99" + }, + "i2c": { + "interface": [{ + "itf": "eeprom", + "dev": "PORT99-EEPROM" + }, { + "itf": "control", + "dev": "PORT99-CTRL" + }] + } + }, + + "PORT99-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT99-EEPROM", + "device_parent": "LC4-PORT-MUX0", + "virt_parent": "PORT99" + }, + "i2c": { + "topo_info": { + "parent_bus": "0xa9", + "dev_addr": "0x50", + "dev_type": "optoe1" + }, + "attr_list": [{ + "attr_name": "eeprom" + }] + } + }, + + "PORT99-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT99-CTRL", + "device_parent": "LC4-PORT-MUX0", + "virt_parent": "PORT99" + }, + "i2c": { + "topo_info": { + "parent_bus": "0xa9", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [{ + "attr_name": "xcvr_present", + "attr_devname": "LC4-CPLD-A", + "attr_devaddr": "0x30", + "attr_devtype": "cpld", + "attr_offset": "0x10", + "attr_mask": "0x2", + "attr_cmpval": "0x0", + "attr_len": "1" + }, { + "attr_name": "xcvr_reset", + "attr_devname": "LC4-CPLD-A", + "attr_devaddr": "0x30", + "attr_devtype": "cpld", + "attr_offset": "0x14", + "attr_mask": "0x2", + "attr_cmpval": "0x0", + "attr_len": "1" + }] + } + }, + + "PORT100": { + "dev_info": { + "device_type": "QSFP", + "device_name": "PORT100", + "device_parent": "LC4-PORT-MUX0" + }, + "dev_attr": { + "dev_idx": "100" + }, + "i2c": { + "interface": [{ + "itf": "eeprom", + "dev": "PORT100-EEPROM" + }, { + "itf": "control", + "dev": "PORT100-CTRL" + }] + } + }, + + "PORT100-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT100-EEPROM", + "device_parent": "LC4-PORT-MUX0", + "virt_parent": "PORT100" + }, + "i2c": { + "topo_info": { + "parent_bus": "0xaa", + "dev_addr": "0x50", + "dev_type": "optoe1" + }, + "attr_list": [{ + "attr_name": "eeprom" + }] + } + }, + + "PORT100-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT100-CTRL", + "device_parent": "LC4-PORT-MUX0", + "virt_parent": "PORT100" + }, + "i2c": { + "topo_info": { + "parent_bus": "0xaa", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [{ + "attr_name": "xcvr_present", + "attr_devname": "LC4-CPLD-A", + "attr_devaddr": "0x30", + "attr_devtype": "cpld", + "attr_offset": "0x10", + "attr_mask": "0x3", + "attr_cmpval": "0x0", + "attr_len": "1" + }, { + "attr_name": "xcvr_reset", + "attr_devname": "LC4-CPLD-A", + "attr_devaddr": "0x30", + "attr_devtype": "cpld", + "attr_offset": "0x14", + "attr_mask": "0x3", + "attr_cmpval": "0x0", + "attr_len": "1" + }] + } + }, + + "PORT101": { + "dev_info": { + "device_type": "QSFP", + "device_name": "PORT101", + "device_parent": "LC4-PORT-MUX0" + }, + "dev_attr": { + "dev_idx": "101" + }, + "i2c": { + "interface": [{ + "itf": "eeprom", + "dev": "PORT101-EEPROM" + }, { + "itf": "control", + "dev": "PORT101-CTRL" + }] + } + }, + + "PORT101-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT101-EEPROM", + "device_parent": "LC4-PORT-MUX0", + "virt_parent": "PORT101" + }, + "i2c": { + "topo_info": { + "parent_bus": "0xab", + "dev_addr": "0x50", + "dev_type": "optoe1" + }, + "attr_list": [{ + "attr_name": "eeprom" + }] + } + }, + + "PORT101-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT101-CTRL", + "device_parent": "LC4-PORT-MUX0", + "virt_parent": "PORT101" + }, + "i2c": { + "topo_info": { + "parent_bus": "0xab", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [{ + "attr_name": "xcvr_present", + "attr_devname": "LC4-CPLD-A", + "attr_devaddr": "0x30", + "attr_devtype": "cpld", + "attr_offset": "0x10", + "attr_mask": "0x4", + "attr_cmpval": "0x0", + "attr_len": "1" + }, { + "attr_name": "xcvr_reset", + "attr_devname": "LC4-CPLD-A", + "attr_devaddr": "0x30", + "attr_devtype": "cpld", + "attr_offset": "0x14", + "attr_mask": "0x4", + "attr_cmpval": "0x0", + "attr_len": "1" + }] + } + }, + + "PORT102": { + "dev_info": { + "device_type": "QSFP", + "device_name": "PORT102", + "device_parent": "LC4-PORT-MUX0" + }, + "dev_attr": { + "dev_idx": "102" + }, + "i2c": { + "interface": [{ + "itf": "eeprom", + "dev": "PORT102-EEPROM" + }, { + "itf": "control", + "dev": "PORT102-CTRL" + }] + } + }, + + "PORT102-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT102-EEPROM", + "device_parent": "LC4-PORT-MUX0", + "virt_parent": "PORT102" + }, + "i2c": { + "topo_info": { + "parent_bus": "0xac", + "dev_addr": "0x50", + "dev_type": "optoe1" + }, + "attr_list": [{ + "attr_name": "eeprom" + }] + } + }, + + "PORT102-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT102-CTRL", + "device_parent": "LC4-PORT-MUX0", + "virt_parent": "PORT102" + }, + "i2c": { + "topo_info": { + "parent_bus": "0xac", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [{ + "attr_name": "xcvr_present", + "attr_devname": "LC4-CPLD-A", + "attr_devaddr": "0x30", + "attr_devtype": "cpld", + "attr_offset": "0x10", + "attr_mask": "0x5", + "attr_cmpval": "0x0", + "attr_len": "1" + }, { + "attr_name": "xcvr_reset", + "attr_devname": "LC4-CPLD-A", + "attr_devaddr": "0x30", + "attr_devtype": "cpld", + "attr_offset": "0x14", + "attr_mask": "0x5", + "attr_cmpval": "0x0", + "attr_len": "1" + }] + } + }, + + "PORT103": { + "dev_info": { + "device_type": "QSFP", + "device_name": "PORT103", + "device_parent": "LC4-PORT-MUX0" + }, + "dev_attr": { + "dev_idx": "103" + }, + "i2c": { + "interface": [{ + "itf": "eeprom", + "dev": "PORT103-EEPROM" + }, { + "itf": "control", + "dev": "PORT103-CTRL" + }] + } + }, + + "PORT103-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT103-EEPROM", + "device_parent": "LC4-PORT-MUX0", + "virt_parent": "PORT103" + }, + "i2c": { + "topo_info": { + "parent_bus": "0xad", + "dev_addr": "0x50", + "dev_type": "optoe1" + }, + "attr_list": [{ + "attr_name": "eeprom" + }] + } + }, + + "PORT103-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT103-CTRL", + "device_parent": "LC4-PORT-MUX0", + "virt_parent": "PORT103" + }, + "i2c": { + "topo_info": { + "parent_bus": "0xad", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [{ + "attr_name": "xcvr_present", + "attr_devname": "LC4-CPLD-A", + "attr_devaddr": "0x30", + "attr_devtype": "cpld", + "attr_offset": "0x10", + "attr_mask": "0x6", + "attr_cmpval": "0x0", + "attr_len": "1" + }, { + "attr_name": "xcvr_reset", + "attr_devname": "LC4-CPLD-A", + "attr_devaddr": "0x30", + "attr_devtype": "cpld", + "attr_offset": "0x14", + "attr_mask": "0x6", + "attr_cmpval": "0x0", + "attr_len": "1" + }] + } + }, + + "PORT104": { + "dev_info": { + "device_type": "QSFP", + "device_name": "PORT104", + "device_parent": "LC4-PORT-MUX0" + }, + "dev_attr": { + "dev_idx": "104" + }, + "i2c": { + "interface": [{ + "itf": "eeprom", + "dev": "PORT104-EEPROM" + }, { + "itf": "control", + "dev": "PORT104-CTRL" + }] + } + }, + + "PORT104-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT104-EEPROM", + "device_parent": "LC4-PORT-MUX0", + "virt_parent": "PORT104" + }, + "i2c": { + "topo_info": { + "parent_bus": "0xae", + "dev_addr": "0x50", + "dev_type": "optoe1" + }, + "attr_list": [{ + "attr_name": "eeprom" + }] + } + }, + + "PORT104-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT104-CTRL", + "device_parent": "LC4-PORT-MUX0", + "virt_parent": "PORT104" + }, + "i2c": { + "topo_info": { + "parent_bus": "0xae", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [{ + "attr_name": "xcvr_present", + "attr_devname": "LC4-CPLD-A", + "attr_devaddr": "0x30", + "attr_devtype": "cpld", + "attr_offset": "0x10", + "attr_mask": "0x7", + "attr_cmpval": "0x0", + "attr_len": "1" + }, { + "attr_name": "xcvr_reset", + "attr_devname": "LC4-CPLD-A", + "attr_devaddr": "0x30", + "attr_devtype": "cpld", + "attr_offset": "0x14", + "attr_mask": "0x7", + "attr_cmpval": "0x0", + "attr_len": "1" + }] + } + }, + + "LC4-PORT-MUX1": { + "dev_info": { + "device_type": "MUX", + "device_name": "LC4-PORT-MUX1", + "device_parent": "CPLD-OCORE4" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x6", + "dev_addr": "0x71", + "dev_type": "pca9548" + }, + "dev_attr": { + "virt_bus": "0xaf" + }, + "channel": [{ + "chn": "0", + "dev": "PORT105" + }, + { + "chn": "1", + "dev": "PORT106" + }, + { + "chn": "2", + "dev": "PORT107" + }, + { + "chn": "3", + "dev": "PORT108" + }, + { + "chn": "4", + "dev": "PORT109" + }, + { + "chn": "5", + "dev": "PORT110" + }, + { + "chn": "6", + "dev": "PORT111" + }, + { + "chn": "7", + "dev": "PORT112" + } + ] + } + }, + + "PORT105": { + "dev_info": { + "device_type": "QSFP", + "device_name": "PORT105", + "device_parent": "LC4-PORT-MUX1" + }, + "dev_attr": { + "dev_idx": "105" + }, + "i2c": { + "interface": [{ + "itf": "eeprom", + "dev": "PORT105-EEPROM" + }, { + "itf": "control", + "dev": "PORT105-CTRL" + }] + } + }, + + "PORT105-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT105-EEPROM", + "device_parent": "LC4-PORT-MUX1", + "virt_parent": "PORT105" + }, + "i2c": { + "topo_info": { + "parent_bus": "0xaf", + "dev_addr": "0x50", + "dev_type": "optoe1" + }, + "attr_list": [{ + "attr_name": "eeprom" + }] + } + }, + + "PORT105-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT105-CTRL", + "device_parent": "LC4-PORT-MUX1", + "virt_parent": "PORT105" + }, + "i2c": { + "topo_info": { + "parent_bus": "0xaf", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [{ + "attr_name": "xcvr_present", + "attr_devname": "LC4-CPLD-A", + "attr_devaddr": "0x30", + "attr_devtype": "cpld", + "attr_offset": "0x11", + "attr_mask": "0x0", + "attr_cmpval": "0x0", + "attr_len": "1" + }, { + "attr_name": "xcvr_reset", + "attr_devname": "LC4-CPLD-A", + "attr_devaddr": "0x30", + "attr_devtype": "cpld", + "attr_offset": "0x15", + "attr_mask": "0x0", + "attr_cmpval": "0x0", + "attr_len": "1" + }] + } + }, + + "PORT106": { + "dev_info": { + "device_type": "QSFP", + "device_name": "PORT106", + "device_parent": "LC4-PORT-MUX1" + }, + "dev_attr": { + "dev_idx": "106" + }, + "i2c": { + "interface": [{ + "itf": "eeprom", + "dev": "PORT106-EEPROM" + }, { + "itf": "control", + "dev": "PORT106-CTRL" + }] + } + }, + + "PORT106-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT106-EEPROM", + "device_parent": "LC4-PORT-MUX1", + "virt_parent": "PORT106" + }, + "i2c": { + "topo_info": { + "parent_bus": "0xb0", + "dev_addr": "0x50", + "dev_type": "optoe1" + }, + "attr_list": [{ + "attr_name": "eeprom" + }] + } + }, + + "PORT106-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT106-CTRL", + "device_parent": "LC4-PORT-MUX1", + "virt_parent": "PORT106" + }, + "i2c": { + "topo_info": { + "parent_bus": "0xb0", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [{ + "attr_name": "xcvr_present", + "attr_devname": "LC4-CPLD-A", + "attr_devaddr": "0x30", + "attr_devtype": "cpld", + "attr_offset": "0x11", + "attr_mask": "0x1", + "attr_cmpval": "0x0", + "attr_len": "1" + }, { + "attr_name": "xcvr_reset", + "attr_devname": "LC4-CPLD-A", + "attr_devaddr": "0x30", + "attr_devtype": "cpld", + "attr_offset": "0x15", + "attr_mask": "0x1", + "attr_cmpval": "0x0", + "attr_len": "1" + }] + } + }, + + "PORT107": { + "dev_info": { + "device_type": "QSFP", + "device_name": "PORT107", + "device_parent": "LC4-PORT-MUX1" + }, + "dev_attr": { + "dev_idx": "107" + }, + "i2c": { + "interface": [{ + "itf": "eeprom", + "dev": "PORT107-EEPROM" + }, { + "itf": "control", + "dev": "PORT107-CTRL" + }] + } + }, + + "PORT107-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT107-EEPROM", + "device_parent": "LC4-PORT-MUX1", + "virt_parent": "PORT107" + }, + "i2c": { + "topo_info": { + "parent_bus": "0xb1", + "dev_addr": "0x50", + "dev_type": "optoe1" + }, + "attr_list": [{ + "attr_name": "eeprom" + }] + } + }, + + "PORT107-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT107-CTRL", + "device_parent": "LC4-PORT-MUX1", + "virt_parent": "PORT107" + }, + "i2c": { + "topo_info": { + "parent_bus": "0xb1", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [{ + "attr_name": "xcvr_present", + "attr_devname": "LC4-CPLD-A", + "attr_devaddr": "0x30", + "attr_devtype": "cpld", + "attr_offset": "0x11", + "attr_mask": "0x2", + "attr_cmpval": "0x0", + "attr_len": "1" + }, { + "attr_name": "xcvr_reset", + "attr_devname": "LC4-CPLD-A", + "attr_devaddr": "0x30", + "attr_devtype": "cpld", + "attr_offset": "0x15", + "attr_mask": "0x2", + "attr_cmpval": "0x0", + "attr_len": "1" + }] + } + }, + + "PORT108": { + "dev_info": { + "device_type": "QSFP", + "device_name": "PORT108", + "device_parent": "LC4-PORT-MUX1" + }, + "dev_attr": { + "dev_idx": "108" + }, + "i2c": { + "interface": [{ + "itf": "eeprom", + "dev": "PORT108-EEPROM" + }, { + "itf": "control", + "dev": "PORT108-CTRL" + }] + } + }, + + "PORT108-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT108-EEPROM", + "device_parent": "LC4-PORT-MUX1", + "virt_parent": "PORT108" + }, + "i2c": { + "topo_info": { + "parent_bus": "0xb2", + "dev_addr": "0x50", + "dev_type": "optoe1" + }, + "attr_list": [{ + "attr_name": "eeprom" + }] + } + }, + + "PORT108-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT108-CTRL", + "device_parent": "LC4-PORT-MUX1", + "virt_parent": "PORT108" + }, + "i2c": { + "topo_info": { + "parent_bus": "0xb2", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [{ + "attr_name": "xcvr_present", + "attr_devname": "LC4-CPLD-A", + "attr_devaddr": "0x30", + "attr_devtype": "cpld", + "attr_offset": "0x11", + "attr_mask": "0x3", + "attr_cmpval": "0x0", + "attr_len": "1" + }, { + "attr_name": "xcvr_reset", + "attr_devname": "LC4-CPLD-A", + "attr_devaddr": "0x30", + "attr_devtype": "cpld", + "attr_offset": "0x15", + "attr_mask": "0x3", + "attr_cmpval": "0x0", + "attr_len": "1" + }] + } + }, + + "PORT109": { + "dev_info": { + "device_type": "QSFP", + "device_name": "PORT109", + "device_parent": "LC4-PORT-MUX1" + }, + "dev_attr": { + "dev_idx": "109" + }, + "i2c": { + "interface": [{ + "itf": "eeprom", + "dev": "PORT109-EEPROM" + }, { + "itf": "control", + "dev": "PORT109-CTRL" + }] + } + }, + + "PORT109-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT109-EEPROM", + "device_parent": "LC4-PORT-MUX1", + "virt_parent": "PORT109" + }, + "i2c": { + "topo_info": { + "parent_bus": "0xb3", + "dev_addr": "0x50", + "dev_type": "optoe1" + }, + "attr_list": [{ + "attr_name": "eeprom" + }] + } + }, + + "PORT109-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT109-CTRL", + "device_parent": "LC4-PORT-MUX1", + "virt_parent": "PORT109" + }, + "i2c": { + "topo_info": { + "parent_bus": "0xb3", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [{ + "attr_name": "xcvr_present", + "attr_devname": "LC4-CPLD-A", + "attr_devaddr": "0x30", + "attr_devtype": "cpld", + "attr_offset": "0x11", + "attr_mask": "0x4", + "attr_cmpval": "0x0", + "attr_len": "1" + }, { + "attr_name": "xcvr_reset", + "attr_devname": "LC4-CPLD-A", + "attr_devaddr": "0x30", + "attr_devtype": "cpld", + "attr_offset": "0x15", + "attr_mask": "0x4", + "attr_cmpval": "0x0", + "attr_len": "1" + }] + } + }, + + "PORT110": { + "dev_info": { + "device_type": "QSFP", + "device_name": "PORT110", + "device_parent": "LC4-PORT-MUX1" + }, + "dev_attr": { + "dev_idx": "110" + }, + "i2c": { + "interface": [{ + "itf": "eeprom", + "dev": "PORT110-EEPROM" + }, { + "itf": "control", + "dev": "PORT110-CTRL" + }] + } + }, + + "PORT110-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT110-EEPROM", + "device_parent": "LC4-PORT-MUX1", + "virt_parent": "PORT110" + }, + "i2c": { + "topo_info": { + "parent_bus": "0xb4", + "dev_addr": "0x50", + "dev_type": "optoe1" + }, + "attr_list": [{ + "attr_name": "eeprom" + }] + } + }, + + "PORT110-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT110-CTRL", + "device_parent": "LC4-PORT-MUX1", + "virt_parent": "PORT110" + }, + "i2c": { + "topo_info": { + "parent_bus": "0xb4", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [{ + "attr_name": "xcvr_present", + "attr_devname": "LC4-CPLD-A", + "attr_devaddr": "0x30", + "attr_devtype": "cpld", + "attr_offset": "0x11", + "attr_mask": "0x5", + "attr_cmpval": "0x0", + "attr_len": "1" + }, { + "attr_name": "xcvr_reset", + "attr_devname": "LC4-CPLD-A", + "attr_devaddr": "0x30", + "attr_devtype": "cpld", + "attr_offset": "0x15", + "attr_mask": "0x5", + "attr_cmpval": "0x0", + "attr_len": "1" + }] + } + }, + + "PORT111": { + "dev_info": { + "device_type": "QSFP", + "device_name": "PORT111", + "device_parent": "LC4-PORT-MUX1" + }, + "dev_attr": { + "dev_idx": "111" + }, + "i2c": { + "interface": [{ + "itf": "eeprom", + "dev": "PORT111-EEPROM" + }, { + "itf": "control", + "dev": "PORT111-CTRL" + }] + } + }, + + "PORT111-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT111-EEPROM", + "device_parent": "LC4-PORT-MUX1", + "virt_parent": "PORT111" + }, + "i2c": { + "topo_info": { + "parent_bus": "0xb5", + "dev_addr": "0x50", + "dev_type": "optoe1" + }, + "attr_list": [{ + "attr_name": "eeprom" + }] + } + }, + + "PORT111-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT111-CTRL", + "device_parent": "LC4-PORT-MUX1", + "virt_parent": "PORT111" + }, + "i2c": { + "topo_info": { + "parent_bus": "0xb5", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [{ + "attr_name": "xcvr_present", + "attr_devname": "LC4-CPLD-A", + "attr_devaddr": "0x30", + "attr_devtype": "cpld", + "attr_offset": "0x11", + "attr_mask": "0x6", + "attr_cmpval": "0x0", + "attr_len": "1" + }, { + "attr_name": "xcvr_reset", + "attr_devname": "LC4-CPLD-A", + "attr_devaddr": "0x30", + "attr_devtype": "cpld", + "attr_offset": "0x15", + "attr_mask": "0x6", + "attr_cmpval": "0x0", + "attr_len": "1" + }] + } + }, + + "PORT112": { + "dev_info": { + "device_type": "QSFP", + "device_name": "PORT112", + "device_parent": "LC4-PORT-MUX1" + }, + "dev_attr": { + "dev_idx": "112" + }, + "i2c": { + "interface": [{ + "itf": "eeprom", + "dev": "PORT112-EEPROM" + }, { + "itf": "control", + "dev": "PORT112-CTRL" + }] + } + }, + + "PORT112-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT112-EEPROM", + "device_parent": "LC4-PORT-MUX1", + "virt_parent": "PORT112" + }, + "i2c": { + "topo_info": { + "parent_bus": "0xb6", + "dev_addr": "0x50", + "dev_type": "optoe1" + }, + "attr_list": [{ + "attr_name": "eeprom" + }] + } + }, + + "PORT112-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT112-CTRL", + "device_parent": "LC4-PORT-MUX1", + "virt_parent": "PORT112" + }, + "i2c": { + "topo_info": { + "parent_bus": "0xb6", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [{ + "attr_name": "xcvr_present", + "attr_devname": "LC4-CPLD-A", + "attr_devaddr": "0x30", + "attr_devtype": "cpld", + "attr_offset": "0x11", + "attr_mask": "0x7", + "attr_cmpval": "0x0", + "attr_len": "1" + }, { + "attr_name": "xcvr_reset", + "attr_devname": "LC4-CPLD-A", + "attr_devaddr": "0x30", + "attr_devtype": "cpld", + "attr_offset": "0x15", + "attr_mask": "0x7", + "attr_cmpval": "0x0", + "attr_len": "1" + }] + } + }, + + "LC4-PORT-MUX2": { + "dev_info": { + "device_type": "MUX", + "device_name": "LC4-PORT-MUX2", + "device_parent": "CPLD-OCORE4" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x6", + "dev_addr": "0x72", + "dev_type": "pca9548" + }, + "dev_attr": { + "virt_bus": "0xb7" + }, + "channel": [{ + "chn": "0", + "dev": "PORT113" + }, + { + "chn": "1", + "dev": "PORT114" + }, + { + "chn": "2", + "dev": "PORT115" + }, + { + "chn": "3", + "dev": "PORT116" + }, + { + "chn": "4", + "dev": "PORT117" + }, + { + "chn": "5", + "dev": "PORT118" + }, + { + "chn": "6", + "dev": "PORT119" + }, + { + "chn": "7", + "dev": "PORT120" + } + ] + } + }, + + "PORT113": { + "dev_info": { + "device_type": "QSFP", + "device_name": "PORT113", + "device_parent": "LC4-PORT-MUX2" + }, + "dev_attr": { + "dev_idx": "113" + }, + "i2c": { + "interface": [{ + "itf": "eeprom", + "dev": "PORT113-EEPROM" + }, { + "itf": "control", + "dev": "PORT113-CTRL" + }] + } + }, + + "PORT113-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT113-EEPROM", + "device_parent": "LC4-PORT-MUX2", + "virt_parent": "PORT113" + }, + "i2c": { + "topo_info": { + "parent_bus": "0xb7", + "dev_addr": "0x50", + "dev_type": "optoe1" + }, + "attr_list": [{ + "attr_name": "eeprom" + }] + } + }, + + "PORT113-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT113-CTRL", + "device_parent": "LC4-PORT-MUX2", + "virt_parent": "PORT113" + }, + "i2c": { + "topo_info": { + "parent_bus": "0xb7", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [{ + "attr_name": "xcvr_present", + "attr_devname": "LC4-CPLD-B", + "attr_devaddr": "0x31", + "attr_devtype": "cpld", + "attr_offset": "0x10", + "attr_mask": "0x0", + "attr_cmpval": "0x0", + "attr_len": "1" + }, { + "attr_name": "xcvr_reset", + "attr_devname": "LC4-CPLD-B", + "attr_devaddr": "0x31", + "attr_devtype": "cpld", + "attr_offset": "0x14", + "attr_mask": "0x0", + "attr_cmpval": "0x0", + "attr_len": "1" + }] + } + }, + + "PORT114": { + "dev_info": { + "device_type": "QSFP", + "device_name": "PORT114", + "device_parent": "LC4-PORT-MUX2" + }, + "dev_attr": { + "dev_idx": "114" + }, + "i2c": { + "interface": [{ + "itf": "eeprom", + "dev": "PORT114-EEPROM" + }, { + "itf": "control", + "dev": "PORT114-CTRL" + }] + } + }, + + "PORT114-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT114-EEPROM", + "device_parent": "LC4-PORT-MUX2", + "virt_parent": "PORT114" + }, + "i2c": { + "topo_info": { + "parent_bus": "0xb8", + "dev_addr": "0x50", + "dev_type": "optoe1" + }, + "attr_list": [{ + "attr_name": "eeprom" + }] + } + }, + + "PORT114-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT114-CTRL", + "device_parent": "LC4-PORT-MUX2", + "virt_parent": "PORT114" + }, + "i2c": { + "topo_info": { + "parent_bus": "0xb8", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [{ + "attr_name": "xcvr_present", + "attr_devname": "LC4-CPLD-B", + "attr_devaddr": "0x31", + "attr_devtype": "cpld", + "attr_offset": "0x10", + "attr_mask": "0x1", + "attr_cmpval": "0x0", + "attr_len": "1" + }, { + "attr_name": "xcvr_reset", + "attr_devname": "LC4-CPLD-B", + "attr_devaddr": "0x31", + "attr_devtype": "cpld", + "attr_offset": "0x14", + "attr_mask": "0x1", + "attr_cmpval": "0x0", + "attr_len": "1" + }] + } + }, + + "PORT115": { + "dev_info": { + "device_type": "QSFP", + "device_name": "PORT115", + "device_parent": "LC4-PORT-MUX2" + }, + "dev_attr": { + "dev_idx": "115" + }, + "i2c": { + "interface": [{ + "itf": "eeprom", + "dev": "PORT115-EEPROM" + }, { + "itf": "control", + "dev": "PORT115-CTRL" + }] + } + }, + + "PORT115-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT115-EEPROM", + "device_parent": "LC4-PORT-MUX2", + "virt_parent": "PORT115" + }, + "i2c": { + "topo_info": { + "parent_bus": "0xb9", + "dev_addr": "0x50", + "dev_type": "optoe1" + }, + "attr_list": [{ + "attr_name": "eeprom" + }] + } + }, + + "PORT115-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT115-CTRL", + "device_parent": "LC4-PORT-MUX2", + "virt_parent": "PORT115" + }, + "i2c": { + "topo_info": { + "parent_bus": "0xb9", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [{ + "attr_name": "xcvr_present", + "attr_devname": "LC4-CPLD-B", + "attr_devaddr": "0x31", + "attr_devtype": "cpld", + "attr_offset": "0x10", + "attr_mask": "0x2", + "attr_cmpval": "0x0", + "attr_len": "1" + }, { + "attr_name": "xcvr_reset", + "attr_devname": "LC4-CPLD-B", + "attr_devaddr": "0x31", + "attr_devtype": "cpld", + "attr_offset": "0x14", + "attr_mask": "0x2", + "attr_cmpval": "0x0", + "attr_len": "1" + }] + } + }, + + "PORT116": { + "dev_info": { + "device_type": "QSFP", + "device_name": "PORT116", + "device_parent": "LC4-PORT-MUX2" + }, + "dev_attr": { + "dev_idx": "116" + }, + "i2c": { + "interface": [{ + "itf": "eeprom", + "dev": "PORT116-EEPROM" + }, { + "itf": "control", + "dev": "PORT116-CTRL" + }] + } + }, + + "PORT116-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT116-EEPROM", + "device_parent": "LC4-PORT-MUX2", + "virt_parent": "PORT116" + }, + "i2c": { + "topo_info": { + "parent_bus": "0xba", + "dev_addr": "0x50", + "dev_type": "optoe1" + }, + "attr_list": [{ + "attr_name": "eeprom" + }] + } + }, + + "PORT116-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT116-CTRL", + "device_parent": "LC4-PORT-MUX2", + "virt_parent": "PORT116" + }, + "i2c": { + "topo_info": { + "parent_bus": "0xba", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [{ + "attr_name": "xcvr_present", + "attr_devname": "LC4-CPLD-B", + "attr_devaddr": "0x31", + "attr_devtype": "cpld", + "attr_offset": "0x10", + "attr_mask": "0x3", + "attr_cmpval": "0x0", + "attr_len": "1" + }, { + "attr_name": "xcvr_reset", + "attr_devname": "LC4-CPLD-B", + "attr_devaddr": "0x31", + "attr_devtype": "cpld", + "attr_offset": "0x14", + "attr_mask": "0x3", + "attr_cmpval": "0x0", + "attr_len": "1" + }] + } + }, + + "PORT117": { + "dev_info": { + "device_type": "QSFP", + "device_name": "PORT117", + "device_parent": "LC4-PORT-MUX2" + }, + "dev_attr": { + "dev_idx": "117" + }, + "i2c": { + "interface": [{ + "itf": "eeprom", + "dev": "PORT117-EEPROM" + }, { + "itf": "control", + "dev": "PORT117-CTRL" + }] + } + }, + + "PORT117-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT117-EEPROM", + "device_parent": "LC4-PORT-MUX2", + "virt_parent": "PORT117" + }, + "i2c": { + "topo_info": { + "parent_bus": "0xbb", + "dev_addr": "0x50", + "dev_type": "optoe1" + }, + "attr_list": [{ + "attr_name": "eeprom" + }] + } + }, + + "PORT117-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT117-CTRL", + "device_parent": "LC4-PORT-MUX2", + "virt_parent": "PORT117" + }, + "i2c": { + "topo_info": { + "parent_bus": "0xbb", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [{ + "attr_name": "xcvr_present", + "attr_devname": "LC4-CPLD-B", + "attr_devaddr": "0x31", + "attr_devtype": "cpld", + "attr_offset": "0x10", + "attr_mask": "0x4", + "attr_cmpval": "0x0", + "attr_len": "1" + }, { + "attr_name": "xcvr_reset", + "attr_devname": "LC4-CPLD-B", + "attr_devaddr": "0x31", + "attr_devtype": "cpld", + "attr_offset": "0x14", + "attr_mask": "0x4", + "attr_cmpval": "0x0", + "attr_len": "1" + }] + } + }, + + "PORT118": { + "dev_info": { + "device_type": "QSFP", + "device_name": "PORT118", + "device_parent": "LC4-PORT-MUX2" + }, + "dev_attr": { + "dev_idx": "118" + }, + "i2c": { + "interface": [{ + "itf": "eeprom", + "dev": "PORT118-EEPROM" + }, { + "itf": "control", + "dev": "PORT118-CTRL" + }] + } + }, + + "PORT118-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT118-EEPROM", + "device_parent": "LC4-PORT-MUX2", + "virt_parent": "PORT118" + }, + "i2c": { + "topo_info": { + "parent_bus": "0xbc", + "dev_addr": "0x50", + "dev_type": "optoe1" + }, + "attr_list": [{ + "attr_name": "eeprom" + }] + } + }, + + "PORT118-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT118-CTRL", + "device_parent": "LC4-PORT-MUX2", + "virt_parent": "PORT118" + }, + "i2c": { + "topo_info": { + "parent_bus": "0xbc", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [{ + "attr_name": "xcvr_present", + "attr_devname": "LC4-CPLD-B", + "attr_devaddr": "0x31", + "attr_devtype": "cpld", + "attr_offset": "0x10", + "attr_mask": "0x5", + "attr_cmpval": "0x0", + "attr_len": "1" + }, { + "attr_name": "xcvr_reset", + "attr_devname": "LC4-CPLD-B", + "attr_devaddr": "0x31", + "attr_devtype": "cpld", + "attr_offset": "0x14", + "attr_mask": "0x5", + "attr_cmpval": "0x0", + "attr_len": "1" + }] + } + }, + + "PORT119": { + "dev_info": { + "device_type": "QSFP", + "device_name": "PORT119", + "device_parent": "LC4-PORT-MUX2" + }, + "dev_attr": { + "dev_idx": "119" + }, + "i2c": { + "interface": [{ + "itf": "eeprom", + "dev": "PORT119-EEPROM" + }, { + "itf": "control", + "dev": "PORT119-CTRL" + }] + } + }, + + "PORT119-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT119-EEPROM", + "device_parent": "LC4-PORT-MUX2", + "virt_parent": "PORT119" + }, + "i2c": { + "topo_info": { + "parent_bus": "0xbd", + "dev_addr": "0x50", + "dev_type": "optoe1" + }, + "attr_list": [{ + "attr_name": "eeprom" + }] + } + }, + + "PORT119-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT119-CTRL", + "device_parent": "LC4-PORT-MUX2", + "virt_parent": "PORT119" + }, + "i2c": { + "topo_info": { + "parent_bus": "0xbd", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [{ + "attr_name": "xcvr_present", + "attr_devname": "LC4-CPLD-B", + "attr_devaddr": "0x31", + "attr_devtype": "cpld", + "attr_offset": "0x10", + "attr_mask": "0x6", + "attr_cmpval": "0x0", + "attr_len": "1" + }, { + "attr_name": "xcvr_reset", + "attr_devname": "LC4-CPLD-B", + "attr_devaddr": "0x31", + "attr_devtype": "cpld", + "attr_offset": "0x14", + "attr_mask": "0x6", + "attr_cmpval": "0x0", + "attr_len": "1" + }] + } + }, + + "PORT120": { + "dev_info": { + "device_type": "QSFP", + "device_name": "PORT120", + "device_parent": "LC4-PORT-MUX2" + }, + "dev_attr": { + "dev_idx": "120" + }, + "i2c": { + "interface": [{ + "itf": "eeprom", + "dev": "PORT120-EEPROM" + }, { + "itf": "control", + "dev": "PORT120-CTRL" + }] + } + }, + + "PORT120-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT120-EEPROM", + "device_parent": "LC4-PORT-MUX2", + "virt_parent": "PORT120" + }, + "i2c": { + "topo_info": { + "parent_bus": "0xbe", + "dev_addr": "0x50", + "dev_type": "optoe1" + }, + "attr_list": [{ + "attr_name": "eeprom" + }] + } + }, + + "PORT120-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT120-CTRL", + "device_parent": "LC4-PORT-MUX2", + "virt_parent": "PORT120" + }, + "i2c": { + "topo_info": { + "parent_bus": "0xbe", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [{ + "attr_name": "xcvr_present", + "attr_devname": "LC4-CPLD-B", + "attr_devaddr": "0x31", + "attr_devtype": "cpld", + "attr_offset": "0x10", + "attr_mask": "0x7", + "attr_cmpval": "0x0", + "attr_len": "1" + }, { + "attr_name": "xcvr_reset", + "attr_devname": "LC4-CPLD-B", + "attr_devaddr": "0x31", + "attr_devtype": "cpld", + "attr_offset": "0x14", + "attr_mask": "0x7", + "attr_cmpval": "0x0", + "attr_len": "1" + }] + } + }, + + "LC4-PORT-MUX3": { + "dev_info": { + "device_type": "MUX", + "device_name": "LC4-PORT-MUX3", + "device_parent": "CPLD-OCORE4" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x6", + "dev_addr": "0x73", + "dev_type": "pca9548" + }, + "dev_attr": { + "virt_bus": "0xbf" + }, + "channel": [{ + "chn": "0", + "dev": "PORT121" + }, + { + "chn": "1", + "dev": "PORT122" + }, + { + "chn": "2", + "dev": "PORT123" + }, + { + "chn": "3", + "dev": "PORT124" + }, + { + "chn": "4", + "dev": "PORT125" + }, + { + "chn": "5", + "dev": "PORT126" + }, + { + "chn": "6", + "dev": "PORT127" + }, + { + "chn": "7", + "dev": "PORT128" + } + ] + } + }, + + "PORT121": { + "dev_info": { + "device_type": "QSFP", + "device_name": "PORT121", + "device_parent": "LC4-PORT-MUX3" + }, + "dev_attr": { + "dev_idx": "121" + }, + "i2c": { + "interface": [{ + "itf": "eeprom", + "dev": "PORT121-EEPROM" + }, { + "itf": "control", + "dev": "PORT121-CTRL" + }] + } + }, + + "PORT121-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT121-EEPROM", + "device_parent": "LC4-PORT-MUX3", + "virt_parent": "PORT121" + }, + "i2c": { + "topo_info": { + "parent_bus": "0xbf", + "dev_addr": "0x50", + "dev_type": "optoe1" + }, + "attr_list": [{ + "attr_name": "eeprom" + }] + } + }, + + "PORT121-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT121-CTRL", + "device_parent": "LC4-PORT-MUX3", + "virt_parent": "PORT121" + }, + "i2c": { + "topo_info": { + "parent_bus": "0xbf", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [{ + "attr_name": "xcvr_present", + "attr_devname": "LC4-CPLD-B", + "attr_devaddr": "0x31", + "attr_devtype": "cpld", + "attr_offset": "0x11", + "attr_mask": "0x0", + "attr_cmpval": "0x0", + "attr_len": "1" + }, { + "attr_name": "xcvr_reset", + "attr_devname": "LC4-CPLD-B", + "attr_devaddr": "0x31", + "attr_devtype": "cpld", + "attr_offset": "0x15", + "attr_mask": "0x0", + "attr_cmpval": "0x0", + "attr_len": "1" + }] + } + }, + + "PORT122": { + "dev_info": { + "device_type": "QSFP", + "device_name": "PORT122", + "device_parent": "LC4-PORT-MUX3" + }, + "dev_attr": { + "dev_idx": "122" + }, + "i2c": { + "interface": [{ + "itf": "eeprom", + "dev": "PORT122-EEPROM" + }, { + "itf": "control", + "dev": "PORT122-CTRL" + }] + } + }, + + "PORT122-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT122-EEPROM", + "device_parent": "LC4-PORT-MUX3", + "virt_parent": "PORT122" + }, + "i2c": { + "topo_info": { + "parent_bus": "0xc0", + "dev_addr": "0x50", + "dev_type": "optoe1" + }, + "attr_list": [{ + "attr_name": "eeprom" + }] + } + }, + + "PORT122-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT122-CTRL", + "device_parent": "LC4-PORT-MUX3", + "virt_parent": "PORT122" + }, + "i2c": { + "topo_info": { + "parent_bus": "0xc0", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [{ + "attr_name": "xcvr_present", + "attr_devname": "LC4-CPLD-B", + "attr_devaddr": "0x31", + "attr_devtype": "cpld", + "attr_offset": "0x11", + "attr_mask": "0x1", + "attr_cmpval": "0x0", + "attr_len": "1" + }, { + "attr_name": "xcvr_reset", + "attr_devname": "LC4-CPLD-B", + "attr_devaddr": "0x31", + "attr_devtype": "cpld", + "attr_offset": "0x15", + "attr_mask": "0x1", + "attr_cmpval": "0x0", + "attr_len": "1" + }] + } + }, + + "PORT123": { + "dev_info": { + "device_type": "QSFP", + "device_name": "PORT123", + "device_parent": "LC4-PORT-MUX3" + }, + "dev_attr": { + "dev_idx": "123" + }, + "i2c": { + "interface": [{ + "itf": "eeprom", + "dev": "PORT123-EEPROM" + }, { + "itf": "control", + "dev": "PORT123-CTRL" + }] + } + }, + + "PORT123-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT123-EEPROM", + "device_parent": "LC4-PORT-MUX3", + "virt_parent": "PORT123" + }, + "i2c": { + "topo_info": { + "parent_bus": "0xc1", + "dev_addr": "0x50", + "dev_type": "optoe1" + }, + "attr_list": [{ + "attr_name": "eeprom" + }] + } + }, + + "PORT123-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT123-CTRL", + "device_parent": "LC4-PORT-MUX3", + "virt_parent": "PORT123" + }, + "i2c": { + "topo_info": { + "parent_bus": "0xc1", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [{ + "attr_name": "xcvr_present", + "attr_devname": "LC4-CPLD-B", + "attr_devaddr": "0x31", + "attr_devtype": "cpld", + "attr_offset": "0x11", + "attr_mask": "0x2", + "attr_cmpval": "0x0", + "attr_len": "1" + }, { + "attr_name": "xcvr_reset", + "attr_devname": "LC4-CPLD-B", + "attr_devaddr": "0x31", + "attr_devtype": "cpld", + "attr_offset": "0x15", + "attr_mask": "0x2", + "attr_cmpval": "0x0", + "attr_len": "1" + }] + } + }, + + "PORT124": { + "dev_info": { + "device_type": "QSFP", + "device_name": "PORT124", + "device_parent": "LC4-PORT-MUX3" + }, + "dev_attr": { + "dev_idx": "124" + }, + "i2c": { + "interface": [{ + "itf": "eeprom", + "dev": "PORT124-EEPROM" + }, { + "itf": "control", + "dev": "PORT124-CTRL" + }] + } + }, + + "PORT124-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT124-EEPROM", + "device_parent": "LC4-PORT-MUX3", + "virt_parent": "PORT124" + }, + "i2c": { + "topo_info": { + "parent_bus": "0xc2", + "dev_addr": "0x50", + "dev_type": "optoe1" + }, + "attr_list": [{ + "attr_name": "eeprom" + }] + } + }, + + "PORT124-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT124-CTRL", + "device_parent": "LC4-PORT-MUX3", + "virt_parent": "PORT124" + }, + "i2c": { + "topo_info": { + "parent_bus": "0xc2", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [{ + "attr_name": "xcvr_present", + "attr_devname": "LC4-CPLD-B", + "attr_devaddr": "0x31", + "attr_devtype": "cpld", + "attr_offset": "0x11", + "attr_mask": "0x3", + "attr_cmpval": "0x0", + "attr_len": "1" + }, { + "attr_name": "xcvr_reset", + "attr_devname": "LC4-CPLD-B", + "attr_devaddr": "0x31", + "attr_devtype": "cpld", + "attr_offset": "0x15", + "attr_mask": "0x3", + "attr_cmpval": "0x0", + "attr_len": "1" + }] + } + }, + + "PORT125": { + "dev_info": { + "device_type": "QSFP", + "device_name": "PORT125", + "device_parent": "LC4-PORT-MUX3" + }, + "dev_attr": { + "dev_idx": "125" + }, + "i2c": { + "interface": [{ + "itf": "eeprom", + "dev": "PORT125-EEPROM" + }, { + "itf": "control", + "dev": "PORT125-CTRL" + }] + } + }, + + "PORT125-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT125-EEPROM", + "device_parent": "LC4-PORT-MUX3", + "virt_parent": "PORT125" + }, + "i2c": { + "topo_info": { + "parent_bus": "0xc3", + "dev_addr": "0x50", + "dev_type": "optoe1" + }, + "attr_list": [{ + "attr_name": "eeprom" + }] + } + }, + + "PORT125-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT125-CTRL", + "device_parent": "LC4-PORT-MUX3", + "virt_parent": "PORT125" + }, + "i2c": { + "topo_info": { + "parent_bus": "0xc3", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [{ + "attr_name": "xcvr_present", + "attr_devname": "LC4-CPLD-B", + "attr_devaddr": "0x31", + "attr_devtype": "cpld", + "attr_offset": "0x11", + "attr_mask": "0x4", + "attr_cmpval": "0x0", + "attr_len": "1" + }, { + "attr_name": "xcvr_reset", + "attr_devname": "LC4-CPLD-B", + "attr_devaddr": "0x31", + "attr_devtype": "cpld", + "attr_offset": "0x15", + "attr_mask": "0x4", + "attr_cmpval": "0x0", + "attr_len": "1" + }] + } + }, + + "PORT126": { + "dev_info": { + "device_type": "QSFP", + "device_name": "PORT126", + "device_parent": "LC4-PORT-MUX3" + }, + "dev_attr": { + "dev_idx": "126" + }, + "i2c": { + "interface": [{ + "itf": "eeprom", + "dev": "PORT126-EEPROM" + }, { + "itf": "control", + "dev": "PORT126-CTRL" + }] + } + }, + + "PORT126-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT126-EEPROM", + "device_parent": "LC4-PORT-MUX3", + "virt_parent": "PORT126" + }, + "i2c": { + "topo_info": { + "parent_bus": "0xc4", + "dev_addr": "0x50", + "dev_type": "optoe1" + }, + "attr_list": [{ + "attr_name": "eeprom" + }] + } + }, + + "PORT126-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT126-CTRL", + "device_parent": "LC4-PORT-MUX3", + "virt_parent": "PORT126" + }, + "i2c": { + "topo_info": { + "parent_bus": "0xc4", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [{ + "attr_name": "xcvr_present", + "attr_devname": "LC4-CPLD-B", + "attr_devaddr": "0x31", + "attr_devtype": "cpld", + "attr_offset": "0x11", + "attr_mask": "0x5", + "attr_cmpval": "0x0", + "attr_len": "1" + }, { + "attr_name": "xcvr_reset", + "attr_devname": "LC4-CPLD-B", + "attr_devaddr": "0x31", + "attr_devtype": "cpld", + "attr_offset": "0x15", + "attr_mask": "0x5", + "attr_cmpval": "0x0", + "attr_len": "1" + }] + } + }, + + "PORT127": { + "dev_info": { + "device_type": "QSFP", + "device_name": "PORT127", + "device_parent": "LC4-PORT-MUX3" + }, + "dev_attr": { + "dev_idx": "127" + }, + "i2c": { + "interface": [{ + "itf": "eeprom", + "dev": "PORT127-EEPROM" + }, { + "itf": "control", + "dev": "PORT127-CTRL" + }] + } + }, + + "PORT127-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT127-EEPROM", + "device_parent": "LC4-PORT-MUX3", + "virt_parent": "PORT127" + }, + "i2c": { + "topo_info": { + "parent_bus": "0xc5", + "dev_addr": "0x50", + "dev_type": "optoe1" + }, + "attr_list": [{ + "attr_name": "eeprom" + }] + } + }, + + "PORT127-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT127-CTRL", + "device_parent": "LC4-PORT-MUX3", + "virt_parent": "PORT127" + }, + "i2c": { + "topo_info": { + "parent_bus": "0xc5", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [{ + "attr_name": "xcvr_present", + "attr_devname": "LC4-CPLD-B", + "attr_devaddr": "0x31", + "attr_devtype": "cpld", + "attr_offset": "0x11", + "attr_mask": "0x6", + "attr_cmpval": "0x0", + "attr_len": "1" + }, { + "attr_name": "xcvr_reset", + "attr_devname": "LC4-CPLD-B", + "attr_devaddr": "0x31", + "attr_devtype": "cpld", + "attr_offset": "0x15", + "attr_mask": "0x6", + "attr_cmpval": "0x0", + "attr_len": "1" + }] + } + }, + + "PORT128": { + "dev_info": { + "device_type": "QSFP", + "device_name": "PORT128", + "device_parent": "LC4-PORT-MUX3" + }, + "dev_attr": { + "dev_idx": "128" + }, + "i2c": { + "interface": [{ + "itf": "eeprom", + "dev": "PORT128-EEPROM" + }, { + "itf": "control", + "dev": "PORT128-CTRL" + }] + } + }, + + "PORT128-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT128-EEPROM", + "device_parent": "LC4-PORT-MUX3", + "virt_parent": "PORT128" + }, + "i2c": { + "topo_info": { + "parent_bus": "0xc6", + "dev_addr": "0x50", + "dev_type": "optoe1" + }, + "attr_list": [{ + "attr_name": "eeprom" + }] + } + }, + + "PORT128-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT128-CTRL", + "device_parent": "LC4-PORT-MUX3", + "virt_parent": "PORT128" + }, + "i2c": { + "topo_info": { + "parent_bus": "0xc6", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [{ + "attr_name": "xcvr_present", + "attr_devname": "LC4-CPLD-B", + "attr_devaddr": "0x31", + "attr_devtype": "cpld", + "attr_offset": "0x11", + "attr_mask": "0x7", + "attr_cmpval": "0x0", + "attr_len": "1" + }, { + "attr_name": "xcvr_reset", + "attr_devname": "LC4-CPLD-B", + "attr_devaddr": "0x31", + "attr_devtype": "cpld", + "attr_offset": "0x15", + "attr_mask": "0x7", + "attr_cmpval": "0x0", + "attr_len": "1" + }] + } + }, + + "FAN-CTRL": { + "dev_info": { + "device_type": "FAN", + "device_name": "FAN-CTRL", + "device_parent": "CPLD-OCORE0" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x2", + "dev_addr": "0x20", + "dev_type": "fan_cpld" + }, + "dev_attr": { + "num_fantrays": "5" + }, + "attr_list": [{ + "attr_name": "fan1_present", + "attr_devname": "FAN-CPLD-B", + "attr_devtype": "cpld", + "attr_offset": "0x30", + "attr_mask": "0x1", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "fan2_present", + "attr_devname": "FAN-CPLD-B", + "attr_devtype": "cpld", + "attr_offset": "0x30", + "attr_mask": "0x1", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "fan3_present", + "attr_devname": "FAN-CPLD-A", + "attr_devtype": "cpld", + "attr_offset": "0x30", + "attr_mask": "0x1", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "fan4_present", + "attr_devname": "FAN-CPLD-A", + "attr_devtype": "cpld", + "attr_offset": "0x30", + "attr_mask": "0x1", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "fan5_present", + "attr_devname": "FAN-CPLD-B", + "attr_devtype": "cpld", + "attr_offset": "0x30", + "attr_mask": "0x2", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "fan6_present", + "attr_devname": "FAN-CPLD-B", + "attr_devtype": "cpld", + "attr_offset": "0x30", + "attr_mask": "0x2", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "fan7_present", + "attr_devname": "FAN-CPLD-A", + "attr_devtype": "cpld", + "attr_offset": "0x30", + "attr_mask": "0x2", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "fan8_present", + "attr_devname": "FAN-CPLD-A", + "attr_devtype": "cpld", + "attr_offset": "0x30", + "attr_mask": "0x2", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "fan9_present", + "attr_devname": "FAN-CPLD-B", + "attr_devtype": "cpld", + "attr_offset": "0x30", + "attr_mask": "0x04", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "fan10_present", + "attr_devname": "FAN-CPLD-B", + "attr_devtype": "cpld", + "attr_offset": "0x30", + "attr_mask": "0x04", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "fan11_present", + "attr_devname": "FAN-CPLD-A", + "attr_devtype": "cpld", + "attr_offset": "0x30", + "attr_mask": "0x04", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "fan12_present", + "attr_devname": "FAN-CPLD-A", + "attr_devtype": "cpld", + "attr_offset": "0x30", + "attr_mask": "0x04", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "fan1_input", + "attr_devname": "FAN-CPLD-B", + "attr_devtype": "cpld", + "attr_offset": "0x1b", + "attr_mult": "1", + "attr_len": "2" + }, + { + "attr_name": "fan2_input", + "attr_devname": "FAN-CPLD-B", + "attr_devtype": "cpld", + "attr_offset": "0x25", + "attr_mult": "1", + "attr_len": "2" + }, + { + "attr_name": "fan3_input", + "attr_devname": "FAN-CPLD-A", + "attr_devtype": "cpld", + "attr_offset": "0x1b", + "attr_mult": "1", + "attr_len": "2" + }, + { + "attr_name": "fan4_input", + "attr_devname": "FAN-CPLD-A", + "attr_devtype": "cpld", + "attr_offset": "0x25", + "attr_mult": "1", + "attr_len": "2" + }, + { + "attr_name": "fan5_input", + "attr_devname": "FAN-CPLD-B", + "attr_devtype": "cpld", + "attr_offset": "0x1d", + "attr_mult": "1", + "attr_len": "2" + }, + { + "attr_name": "fan6_input", + "attr_devname": "FAN-CPLD-B", + "attr_devtype": "cpld", + "attr_offset": "0x27", + "attr_mult": "1", + "attr_len": "2" + }, + { + "attr_name": "fan7_input", + "attr_devname": "FAN-CPLD-A", + "attr_devtype": "cpld", + "attr_offset": "0x1d", + "attr_mult": "1", + "attr_len": "2" + }, + { + "attr_name": "fan8_input", + "attr_devname": "FAN-CPLD-A", + "attr_devtype": "cpld", + "attr_offset": "0x27", + "attr_mult": "1", + "attr_len": "2" + }, + { + "attr_name": "fan9_input", + "attr_devname": "FAN-CPLD-B", + "attr_devtype": "cpld", + "attr_offset": "0x1f", + "attr_mult": "1", + "attr_len": "2" + }, + { + "attr_name": "fan10_input", + "attr_devname": "FAN-CPLD-B", + "attr_devtype": "cpld", + "attr_offset": "0x29", + "attr_mult": "1", + "attr_len": "2" + }, + { + "attr_name": "fan11_input", + "attr_devname": "FAN-CPLD-A", + "attr_devtype": "cpld", + "attr_offset": "0x1f", + "attr_mult": "1", + "attr_len": "2" + }, + { + "attr_name": "fan12_input", + "attr_devname": "FAN-CPLD-A", + "attr_devtype": "cpld", + "attr_offset": "0x29", + "attr_mult": "1", + "attr_len": "2" + }, + { + "attr_name": "fan1_pwm", + "attr_devname": "FAN-CPLD-B", + "attr_devtype": "cpld", + "attr_offset": "0x14", + "attr_mask": "0xff", + "attr_len": "1" + }, + { + "attr_name": "fan2_pwm", + "attr_devname": "FAN-CPLD-B", + "attr_devtype": "cpld", + "attr_offset": "0x14", + "attr_mask": "0xff", + "attr_len": "1" + }, + { + "attr_name": "fan3_pwm", + "attr_devname": "FAN-CPLD-A", + "attr_devtype": "cpld", + "attr_offset": "0x14", + "attr_mask": "0xff", + "attr_len": "1" + }, + { + "attr_name": "fan4_pwm", + "attr_devname": "FAN-CPLD-A", + "attr_devtype": "cpld", + "attr_offset": "0x14", + "attr_mask": "0xff", + "attr_len": "1" + }, + { + "attr_name": "fan5_pwm", + "attr_devname": "FAN-CPLD-B", + "attr_devtype": "cpld", + "attr_offset": "0x15", + "attr_mask": "0xff", + "attr_len": "1" + }, + { + "attr_name": "fan6_pwm", + "attr_devname": "FAN-CPLD-B", + "attr_devtype": "cpld", + "attr_offset": "0x15", + "attr_mask": "0xff", + "attr_len": "1" + }, + { + "attr_name": "fan7_pwm", + "attr_devname": "FAN-CPLD-A", + "attr_devtype": "cpld", + "attr_offset": "0x15", + "attr_mask": "0xff", + "attr_len": "1" + }, + { + "attr_name": "fan8_pwm", + "attr_devname": "FAN-CPLD-A", + "attr_devtype": "cpld", + "attr_offset": "0x15", + "attr_mask": "0xff", + "attr_len": "1" + }, + { + "attr_name": "fan9_pwm", + "attr_devname": "FAN-CPLD-B", + "attr_devtype": "cpld", + "attr_offset": "0x16", + "attr_mask": "0xff", + "attr_len": "1" + }, + { + "attr_name": "fan10_pwm", + "attr_devname": "FAN-CPLD-B", + "attr_devtype": "cpld", + "attr_offset": "0x16", + "attr_mask": "0xff", + "attr_len": "1" + }, + { + "attr_name": "fan11_pwm", + "attr_devname": "FAN-CPLD-A", + "attr_devtype": "cpld", + "attr_offset": "0x16", + "attr_mask": "0xff", + "attr_len": "1" + }, + { + "attr_name": "fan12_pwm", + "attr_devname": "FAN-CPLD-A", + "attr_devtype": "cpld", + "attr_offset": "0x16", + "attr_mask": "0xff", + "attr_len": "1" + }, + { + "attr_name": "fan1_fault", + "attr_devname": "FAN-CPLD-B", + "attr_devtype": "cpld", + "attr_offset": "0x1a", + "attr_mask": "0x1", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "fan2_fault", + "attr_devname": "FAN-CPLD-B", + "attr_devtype": "cpld", + "attr_offset": "0x1a", + "attr_mask": "0x1", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "fan3_fault", + "attr_devname": "FAN-CPLD-A", + "attr_devtype": "cpld", + "attr_offset": "0x1a", + "attr_mask": "0x1", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "fan4_fault", + "attr_devname": "FAN-CPLD-A", + "attr_devtype": "cpld", + "attr_offset": "0x1a", + "attr_mask": "0x1", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "fan5_fault", + "attr_devname": "FAN-CPLD-B", + "attr_devtype": "cpld", + "attr_offset": "0x1a", + "attr_mask": "0x2", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "fan6_fault", + "attr_devname": "FAN-CPLD-B", + "attr_devtype": "cpld", + "attr_offset": "0x1a", + "attr_mask": "0x2", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "fan7_fault", + "attr_devname": "FAN-CPLD-A", + "attr_devtype": "cpld", + "attr_offset": "0x1a", + "attr_mask": "0x2", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "fan8_fault", + "attr_devname": "FAN-CPLD-A", + "attr_devtype": "cpld", + "attr_offset": "0x1a", + "attr_mask": "0x2", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "fan9_fault", + "attr_devname": "FAN-CPLD-B", + "attr_devtype": "cpld", + "attr_offset": "0x1a", + "attr_mask": "0x04", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "fan10_fault", + "attr_devname": "FAN-CPLD-B", + "attr_devtype": "cpld", + "attr_offset": "0x1a", + "attr_mask": "0x04", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "fan11_fault", + "attr_devname": "FAN-CPLD-A", + "attr_devtype": "cpld", + "attr_offset": "0x1a", + "attr_mask": "0x04", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "fan12_fault", + "attr_devname": "FAN-CPLD-A", + "attr_devtype": "cpld", + "attr_offset": "0x1a", + "attr_mask": "0x04", + "attr_cmpval": "0x0", + "attr_len": "1" + } + ] + } + }, + + "FRONT_BOARD_CPU_LED": { + "dev_info": { + "device_type": "LED", + "device_name": "SYS_LED" + }, + "dev_attr": { + "index": "0" + }, + "i2c": { + "attr_list": [{ + "attr_name": "STATUS_LED_COLOR_RED", + "descr": "Red", + "bits": "2:0", + "value": "0x2", + "swpld_addr": "0x0d", + "swpld_addr_offset": "0xb21" + }, + { + "attr_name": "STATUS_LED_COLOR_RED_BLINK", + "descr": "Red Blinking", + "bits": "2:0", + "value": "0x1", + "swpld_addr": "0x0d", + "swpld_addr_offset": "0xb21" + }, + { + "attr_name": "STATUS_LED_COLOR_GREEN", + "descr": "Green", + "bits": "2:0", + "value": "0x4", + "swpld_addr": "0x0d", + "swpld_addr_offset": "0xb21" + }, + { + "attr_name": "STATUS_LED_COLOR_GREEN_BLINK", + "descr": "Green Blinking", + "bits": "2:0", + "value": "0x3", + "swpld_addr": "0x0d", + "swpld_addr_offset": "0xb21" + }, + { + "attr_name": "STATUS_LED_COLOR_AMBER", + "descr": "Amber", + "bits": "2:0", + "value": "0x6", + "swpld_addr": "0x0d", + "swpld_addr_offset": "0xb21" + }, + { + "attr_name": "STATUS_LED_COLOR_AMBER_BLINK", + "descr": "Amber Blinking", + "bits": "2:0", + "value": "0x5", + "swpld_addr": "0x0d", + "swpld_addr_offset": "0xb21" + }, + { + "attr_name": "STATUS_LED_COLOR_OFF", + "descr": "Off", + "bits": "2:0", + "value": "0x0", + "swpld_addr": "0x0d", + "swpld_addr_offset": "0xb21" + }, + { + "attr_name": "STATUS_LED_COLOR_OFF", + "descr": "Off", + "bits": "2:0", + "value": "0xf", + "swpld_addr": "0x0d", + "swpld_addr_offset": "0xb21" + } + ] + } + }, + + "FRONT_BOARD_PSU_LED": { + "dev_info": { + "device_type": "LED", + "device_name": "SYS_LED" + }, + "dev_attr": { + "index": "1" + }, + "i2c": { + "attr_list": [{ + "attr_name": "STATUS_LED_COLOR_RED", + "descr": "Red", + "bits": "2:0", + "value": "0x2", + "swpld_addr": "0x0d", + "swpld_addr_offset": "0xb22" + }, + { + "attr_name": "STATUS_LED_COLOR_RED_BLINK", + "descr": "Red Blinking", + "bits": "2:0", + "value": "0x1", + "swpld_addr": "0x0d", + "swpld_addr_offset": "0xb22" + }, + { + "attr_name": "STATUS_LED_COLOR_GREEN", + "descr": "Green", + "bits": "2:0", + "value": "0x4", + "swpld_addr": "0x0d", + "swpld_addr_offset": "0xb22" + }, + { + "attr_name": "STATUS_LED_COLOR_GREEN_BLINK", + "descr": "Green Blinking", + "bits": "2:0", + "value": "0x3", + "swpld_addr": "0x0d", + "swpld_addr_offset": "0xb22" + }, + { + "attr_name": "STATUS_LED_COLOR_AMBER", + "descr": "Amber", + "bits": "2:0", + "value": "0x6", + "swpld_addr": "0x0d", + "swpld_addr_offset": "0xb22" + }, + { + "attr_name": "STATUS_LED_COLOR_AMBER_BLINK", + "descr": "Amber Blinking", + "bits": "2:0", + "value": "0x5", + "swpld_addr": "0x0d", + "swpld_addr_offset": "0xb22" + }, + { + "attr_name": "STATUS_LED_COLOR_OFF", + "descr": "Off", + "bits": "2:0", + "value": "0x0", + "swpld_addr": "0x0d", + "swpld_addr_offset": "0xb22" + }, + { + "attr_name": "STATUS_LED_COLOR_OFF", + "descr": "Off", + "bits": "2:0", + "value": "0xf", + "swpld_addr": "0x0d", + "swpld_addr_offset": "0xb22" + } + ] + } + }, + + "FRONT_BOARD_FAN_LED": { + "dev_info": { + "device_type": "LED", + "device_name": "SYS_LED" + }, + "dev_attr": { + "index": "2" + }, + "i2c": { + "attr_list": [{ + "attr_name": "STATUS_LED_COLOR_RED", + "descr": "Red", + "bits": "2:0", + "value": "0x2", + "swpld_addr": "0x0d", + "swpld_addr_offset": "0xb23" + }, + { + "attr_name": "STATUS_LED_COLOR_RED_BLINK", + "descr": "Red Blinking", + "bits": "2:0", + "value": "0x1", + "swpld_addr": "0x0d", + "swpld_addr_offset": "0xb23" + }, + { + "attr_name": "STATUS_LED_COLOR_GREEN", + "descr": "Green", + "bits": "2:0", + "value": "0x4", + "swpld_addr": "0x0d", + "swpld_addr_offset": "0xb23" + }, + { + "attr_name": "STATUS_LED_COLOR_GREEN_BLINK", + "descr": "Green Blinking", + "bits": "2:0", + "value": "0x3", + "swpld_addr": "0x0d", + "swpld_addr_offset": "0xb23" + }, + { + "attr_name": "STATUS_LED_COLOR_AMBER", + "descr": "Amber", + "bits": "2:0", + "value": "0x6", + "swpld_addr": "0x0d", + "swpld_addr_offset": "0xb23" + }, + { + "attr_name": "STATUS_LED_COLOR_AMBER_BLINK", + "descr": "Amber Blinking", + "bits": "2:0", + "value": "0x5", + "swpld_addr": "0x0d", + "swpld_addr_offset": "0xb23" + }, + { + "attr_name": "STATUS_LED_COLOR_OFF", + "descr": "Off", + "bits": "2:0", + "value": "0x0", + "swpld_addr": "0x0d", + "swpld_addr_offset": "0xb23" + }, + { + "attr_name": "STATUS_LED_COLOR_OFF", + "descr": "Off", + "bits": "2:0", + "value": "0xf", + "swpld_addr": "0x0d", + "swpld_addr_offset": "0xb23" + } + ] + } + }, + + "FANTRAY1_LED": { + "dev_info": { + "device_type": "LED", + "device_name": "FANTRAY_LED" + }, + "dev_attr": { + "index": "0" + }, + "i2c": { + "attr_list": [{ + "attr_name": "STATUS_LED_COLOR_RED", + "descr": "Red", + "bits": "2:0", + "value": "0x2", + "swpld_addr": "0x0d", + "swpld_addr_offset": "0x3b" + }, + { + "attr_name": "STATUS_LED_COLOR_RED_BLINK", + "descr": "Red Blinking", + "bits": "2:0", + "value": "0x1", + "swpld_addr": "0x0d", + "swpld_addr_offset": "0x3b" + }, + { + "attr_name": "STATUS_LED_COLOR_GREEN", + "descr": "Green", + "bits": "2:0", + "value": "0x4", + "swpld_addr": "0x0d", + "swpld_addr_offset": "0x3b" + }, + { + "attr_name": "STATUS_LED_COLOR_GREEN_BLINK", + "descr": "Green Blinking", + "bits": "2:0", + "value": "0x3", + "swpld_addr": "0x0d", + "swpld_addr_offset": "0x3b" + }, + { + "attr_name": "STATUS_LED_COLOR_AMBER", + "descr": "Amber", + "bits": "2:0", + "value": "0x6", + "swpld_addr": "0x0d", + "swpld_addr_offset": "0x3b" + }, + { + "attr_name": "STATUS_LED_COLOR_AMBER_BLINK", + "descr": "Amber Blinking", + "bits": "2:0", + "value": "0x5", + "swpld_addr": "0x0d", + "swpld_addr_offset": "0x3b" + }, + { + "attr_name": "STATUS_LED_COLOR_OFF", + "descr": "Off", + "bits": "2:0", + "value": "0x0", + "swpld_addr": "0x0d", + "swpld_addr_offset": "0x3b" + } + ] + } + }, + + "FANTRAY2_LED": { + "dev_info": { + "device_type": "LED", + "device_name": "FANTRAY_LED" + }, + "dev_attr": { + "index": "1" + }, + "i2c": { + "attr_list": [{ + "attr_name": "STATUS_LED_COLOR_RED", + "descr": "Red", + "bits": "2:0", + "value": "0x2", + "swpld_addr": "0x0d", + "swpld_addr_offset": "0x3b" + }, + { + "attr_name": "STATUS_LED_COLOR_RED_BLINK", + "descr": "Red Blinking", + "bits": "2:0", + "value": "0x1", + "swpld_addr": "0x0d", + "swpld_addr_offset": "0x3b" + }, + { + "attr_name": "STATUS_LED_COLOR_GREEN", + "descr": "Green", + "bits": "2:0", + "value": "0x4", + "swpld_addr": "0x0d", + "swpld_addr_offset": "0x3b" + }, + { + "attr_name": "STATUS_LED_COLOR_GREEN_BLINK", + "descr": "Green Blinking", + "bits": "2:0", + "value": "0x3", + "swpld_addr": "0x0d", + "swpld_addr_offset": "0x3b" + }, + { + "attr_name": "STATUS_LED_COLOR_AMBER", + "descr": "Amber", + "bits": "2:0", + "value": "0x6", + "swpld_addr": "0x0d", + "swpld_addr_offset": "0x3b" + }, + { + "attr_name": "STATUS_LED_COLOR_AMBER_BLINK", + "descr": "Amber Blinking", + "bits": "2:0", + "value": "0x5", + "swpld_addr": "0x0d", + "swpld_addr_offset": "0x3b" + }, + { + "attr_name": "STATUS_LED_COLOR_OFF", + "descr": "Off", + "bits": "2:0", + "value": "0x0", + "swpld_addr": "0x0d", + "swpld_addr_offset": "0x3b" + } + ] + } + }, + + "FANTRAY3_LED": { + "dev_info": { + "device_type": "LED", + "device_name": "FANTRAY_LED" + }, + "dev_attr": { + "index": "2" + }, + "i2c": { + "attr_list": [{ + "attr_name": "STATUS_LED_COLOR_RED", + "descr": "Red", + "bits": "2:0", + "value": "0x2", + "swpld_addr": "0x0d", + "swpld_addr_offset": "0x3c" + }, + { + "attr_name": "STATUS_LED_COLOR_RED_BLINK", + "descr": "Red Blinking", + "bits": "2:0", + "value": "0x1", + "swpld_addr": "0x0d", + "swpld_addr_offset": "0x3c" + }, + { + "attr_name": "STATUS_LED_COLOR_GREEN", + "descr": "Green", + "bits": "2:0", + "value": "0x4", + "swpld_addr": "0x0d", + "swpld_addr_offset": "0x3c" + }, + { + "attr_name": "STATUS_LED_COLOR_GREEN_BLINK", + "descr": "Green Blinking", + "bits": "2:0", + "value": "0x3", + "swpld_addr": "0x0d", + "swpld_addr_offset": "0x3c" + }, + { + "attr_name": "STATUS_LED_COLOR_AMBER", + "descr": "Amber", + "bits": "2:0", + "value": "0x6", + "swpld_addr": "0x0d", + "swpld_addr_offset": "0x3c" + }, + { + "attr_name": "STATUS_LED_COLOR_AMBER_BLINK", + "descr": "Amber Blinking", + "bits": "2:0", + "value": "0x5", + "swpld_addr": "0x0d", + "swpld_addr_offset": "0x3c" + }, + { + "attr_name": "STATUS_LED_COLOR_OFF", + "descr": "Off", + "bits": "2:0", + "value": "0x0", + "swpld_addr": "0x0d", + "swpld_addr_offset": "0x3c" + } + ] + } + }, + + "FANTRAY4_LED": { + "dev_info": { + "device_type": "LED", + "device_name": "FANTRAY_LED" + }, + "dev_attr": { + "index": "3" + }, + "i2c": { + "attr_list": [{ + "attr_name": "STATUS_LED_COLOR_RED", + "descr": "Red", + "bits": "2:0", + "value": "0x2", + "swpld_addr": "0x0d", + "swpld_addr_offset": "0x3c" + }, + { + "attr_name": "STATUS_LED_COLOR_RED_BLINK", + "descr": "Red Blinking", + "bits": "2:0", + "value": "0x1", + "swpld_addr": "0x0d", + "swpld_addr_offset": "0x3c" + }, + { + "attr_name": "STATUS_LED_COLOR_GREEN", + "descr": "Green", + "bits": "2:0", + "value": "0x4", + "swpld_addr": "0x0d", + "swpld_addr_offset": "0x3c" + }, + { + "attr_name": "STATUS_LED_COLOR_GREEN_BLINK", + "descr": "Green Blinking", + "bits": "2:0", + "value": "0x3", + "swpld_addr": "0x0d", + "swpld_addr_offset": "0x3c" + }, + { + "attr_name": "STATUS_LED_COLOR_AMBER", + "descr": "Amber", + "bits": "2:0", + "value": "0x6", + "swpld_addr": "0x0d", + "swpld_addr_offset": "0x3c" + }, + { + "attr_name": "STATUS_LED_COLOR_AMBER_BLINK", + "descr": "Amber Blinking", + "bits": "2:0", + "value": "0x5", + "swpld_addr": "0x0d", + "swpld_addr_offset": "0x3c" + }, + { + "attr_name": "STATUS_LED_COLOR_OFF", + "descr": "Off", + "bits": "2:0", + "value": "0x0", + "swpld_addr": "0x0d", + "swpld_addr_offset": "0x3c" + } + ] + } + }, + + "FANTRAY5_LED": { + "dev_info": { + "device_type": "LED", + "device_name": "FANTRAY_LED" + }, + "dev_attr": { + "index": "4" + }, + "i2c": { + "attr_list": [{ + "attr_name": "STATUS_LED_COLOR_RED", + "descr": "Red", + "bits": "2:0", + "value": "0x2", + "swpld_addr": "0x0d", + "swpld_addr_offset": "0x3d" + }, + { + "attr_name": "STATUS_LED_COLOR_RED_BLINK", + "descr": "Red Blinking", + "bits": "2:0", + "value": "0x1", + "swpld_addr": "0x0d", + "swpld_addr_offset": "0x3d" + }, + { + "attr_name": "STATUS_LED_COLOR_GREEN", + "descr": "Green", + "bits": "2:0", + "value": "0x4", + "swpld_addr": "0x0d", + "swpld_addr_offset": "0x3d" + }, + { + "attr_name": "STATUS_LED_COLOR_GREEN_BLINK", + "descr": "Green Blinking", + "bits": "2:0", + "value": "0x3", + "swpld_addr": "0x0d", + "swpld_addr_offset": "0x3d" + }, + { + "attr_name": "STATUS_LED_COLOR_AMBER", + "descr": "Amber", + "bits": "2:0", + "value": "0x6", + "swpld_addr": "0x0d", + "swpld_addr_offset": "0x3d" + }, + { + "attr_name": "STATUS_LED_COLOR_AMBER_BLINK", + "descr": "Amber Blinking", + "bits": "2:0", + "value": "0x5", + "swpld_addr": "0x0d", + "swpld_addr_offset": "0x3d" + }, + { + "attr_name": "STATUS_LED_COLOR_OFF", + "descr": "Off", + "bits": "2:0", + "value": "0x0", + "swpld_addr": "0x0d", + "swpld_addr_offset": "0x3d" + } + ] + } + }, + + "FANTRAY6_LED": { + "dev_info": { + "device_type": "LED", + "device_name": "FANTRAY_LED" + }, + "dev_attr": { + "index": "5" + }, + "i2c": { + "attr_list": [{ + "attr_name": "STATUS_LED_COLOR_RED", + "descr": "Red", + "bits": "2:0", + "value": "0x2", + "swpld_addr": "0x0d", + "swpld_addr_offset": "0x3d" + }, + { + "attr_name": "STATUS_LED_COLOR_RED_BLINK", + "descr": "Red Blinking", + "bits": "2:0", + "value": "0x1", + "swpld_addr": "0x0d", + "swpld_addr_offset": "0x3d" + }, + { + "attr_name": "STATUS_LED_COLOR_GREEN", + "descr": "Green", + "bits": "2:0", + "value": "0x4", + "swpld_addr": "0x0d", + "swpld_addr_offset": "0x3d" + }, + { + "attr_name": "STATUS_LED_COLOR_GREEN_BLINK", + "descr": "Green Blinking", + "bits": "2:0", + "value": "0x3", + "swpld_addr": "0x0d", + "swpld_addr_offset": "0x3d" + }, + { + "attr_name": "STATUS_LED_COLOR_AMBER", + "descr": "Amber", + "bits": "2:0", + "value": "0x6", + "swpld_addr": "0x0d", + "swpld_addr_offset": "0x3d" + }, + { + "attr_name": "STATUS_LED_COLOR_AMBER_BLINK", + "descr": "Amber Blinking", + "bits": "2:0", + "value": "0x5", + "swpld_addr": "0x0d", + "swpld_addr_offset": "0x3d" + }, + { + "attr_name": "STATUS_LED_COLOR_OFF", + "descr": "Off", + "bits": "2:0", + "value": "0x0", + "swpld_addr": "0x0d", + "swpld_addr_offset": "0x3d" + } + ] + } + } +} diff --git a/device/ragile/x86_64-ragile_ra-b6920-4s-r0/pddf_support b/device/ragile/x86_64-ragile_ra-b6920-4s-r0/pddf_support new file mode 100644 index 0000000000..e69de29bb2 diff --git a/device/ragile/x86_64-ragile_ra-b6920-4s-r0/platform_asic b/device/ragile/x86_64-ragile_ra-b6920-4s-r0/platform_asic new file mode 100644 index 0000000000..9604676527 --- /dev/null +++ b/device/ragile/x86_64-ragile_ra-b6920-4s-r0/platform_asic @@ -0,0 +1 @@ +broadcom diff --git a/device/ragile/x86_64-ragile_ra-b6920-4s-r0/platform_components.json b/device/ragile/x86_64-ragile_ra-b6920-4s-r0/platform_components.json new file mode 100644 index 0000000000..80922c7b07 --- /dev/null +++ b/device/ragile/x86_64-ragile_ra-b6920-4s-r0/platform_components.json @@ -0,0 +1,21 @@ +{ + "chassis": { + "RA-B6510-32C": { + "component": { + "COMPONENT-1": {}, + "COMPONENT-2": {}, + "COMPONENT-3": {}, + "COMPONENT-4": {}, + "COMPONENT-5": {}, + "COMPONENT-6": {}, + "COMPONENT-7": {}, + "COMPONENT-8": {}, + "COMPONENT-9": {}, + "COMPONENT-10": {}, + "COMPONENT-11": {}, + "COMPONENT-12": {}, + "COMPONENT-13": {} + } + } + } +} diff --git a/device/ragile/x86_64-ragile_ra-b6920-4s-r0/platform_env.conf b/device/ragile/x86_64-ragile_ra-b6920-4s-r0/platform_env.conf new file mode 100644 index 0000000000..e69de29bb2 diff --git a/device/ragile/x86_64-ragile_ra-b6920-4s-r0/plugins/eeprom.py b/device/ragile/x86_64-ragile_ra-b6920-4s-r0/plugins/eeprom.py new file mode 100644 index 0000000000..3384c2cbd6 --- /dev/null +++ b/device/ragile/x86_64-ragile_ra-b6920-4s-r0/plugins/eeprom.py @@ -0,0 +1,13 @@ +#!/usr/bin/env python + +try: + from sonic_eeprom import eeprom_tlvinfo +except ImportError as e: + raise ImportError (str(e) + "- required module not found") + + +class board(eeprom_tlvinfo.TlvInfoDecoder): + + def __init__(self, name, path, cpld_root, ro): + self.eeprom_path = "/sys/bus/i2c/devices/1-0056/eeprom" + super(board, self).__init__(self.eeprom_path, 0, '', True) diff --git a/device/ragile/x86_64-ragile_ra-b6920-4s-r0/plugins/psuutil.py b/device/ragile/x86_64-ragile_ra-b6920-4s-r0/plugins/psuutil.py new file mode 100644 index 0000000000..25ec4dd6a9 --- /dev/null +++ b/device/ragile/x86_64-ragile_ra-b6920-4s-r0/plugins/psuutil.py @@ -0,0 +1,59 @@ +# +# psuutil.py +# Platform-specific PSU status interface for SONiC +# + +try: + from sonic_psu.psu_base import PsuBase +except ImportError as e: + raise ImportError(str(e) + "- required module not found") + + +class PsuUtil(PsuBase): + """Platform-specific PSUutil class""" + + def __init__(self): + PsuBase.__init__(self) + + def get_num_psus(self): + return 4 + + def get_psu_status(self, index): + if index < 1 or index > 4: + return False + + path_tmp = "/sys/devices/pci0000:00/0000:00:1f.0/psu_status_" + psu_path = "%s%d"%(path_tmp, index) + + try: + data = open(psu_path, "rb") + except IOError: + return False + + result = int(data.read(2), 16) + data.close() + + if (result & 0x2): + return True + + return False + + def get_psu_presence(self, index): + if index < 1 or index > 4: + return False + + path_tmp = "/sys/devices/pci0000:00/0000:00:1f.0/psu_status_" + psu_path = "%s%d"%(path_tmp, index) + + try: + data = open(psu_path, "rb") + except IOError: + return False + + result = int(data.read(2), 16) + data.close() + + if (result & 0x1) == 0: + return True + + return False diff --git a/device/ragile/x86_64-ragile_ra-b6920-4s-r0/plugins/sfputil.py b/device/ragile/x86_64-ragile_ra-b6920-4s-r0/plugins/sfputil.py new file mode 100644 index 0000000000..afa98329a2 --- /dev/null +++ b/device/ragile/x86_64-ragile_ra-b6920-4s-r0/plugins/sfputil.py @@ -0,0 +1,255 @@ +# sfputil.py +# +# Platform-specific SFP transceiver interface for SONiC +# + +try: + import time + import os + from sonic_sfp.sfputilbase import SfpUtilBase +except ImportError as e: + raise ImportError("%s - required module not found" % str(e)) + + +class SfpUtil(SfpUtilBase): + """Platform-specific SfpUtil class""" + + PORT_START = 0 + PORT_END = 127 + PORT_QSFP_START = 0 + PORTS_IN_BLOCK = 128 + + EEPROM_OFFSET = 71 + SFP_DEVICE_TYPE = "optoe2" + QSFP_DEVICE_TYPE = "optoe1" + I2C_MAX_ATTEMPT = 3 + + SFP_STATUS_INSERTED = '1' + SFP_STATUS_REMOVED = '0' + + _port_to_eeprom_mapping = {} + port_to_i2cbus_mapping ={} + port_dict = {} + + @property + def port_start(self): + return self.PORT_START + + @property + def port_end(self): + return self.PORT_END + + @property + def qsfp_ports(self): + return range(self.PORT_QSFP_START, self.PORTS_IN_BLOCK) + + @property + def port_to_eeprom_mapping(self): + return self._port_to_eeprom_mapping + + def __init__(self): + for x in range(self.PORT_START, self.PORTS_IN_BLOCK): + self.port_to_i2cbus_mapping[x] = (x + self.EEPROM_OFFSET) + if self.get_presence(x): + self.port_dict[x] = self.SFP_STATUS_INSERTED + else: + self.port_dict[x] = self.SFP_STATUS_REMOVED + SfpUtilBase.__init__(self) + + def _sfp_read_file_path(self, file_path, offset, num_bytes): + attempts = 0 + while attempts < self.I2C_MAX_ATTEMPT: + try: + file_path.seek(offset) + read_buf = file_path.read(num_bytes) + except Exception: + attempts += 1 + time.sleep(0.05) + else: + return True, read_buf + return False, None + + def _sfp_eeprom_present(self, sysfs_sfp_i2c_client_eeprompath, offset): + """Tries to read the eeprom file to determine if the + device/sfp is present or not. If sfp present, the read returns + valid bytes. If not, read returns error 'Connection timed out""" + + if not os.path.exists(sysfs_sfp_i2c_client_eeprompath): + return False + else: + with open(sysfs_sfp_i2c_client_eeprompath, "rb", buffering=0) as sysfsfile: + rv, buf = self._sfp_read_file_path(sysfsfile, offset, 1) + return rv + + def _add_new_sfp_device(self, sysfs_sfp_i2c_adapter_path, devaddr, devtype): + try: + sysfs_nd_path = "%s/new_device" % sysfs_sfp_i2c_adapter_path + + # Write device address to new_device file + nd_file = open(sysfs_nd_path, "w") + nd_str = "%s %s" % (devtype, hex(devaddr)) + nd_file.write(nd_str) + nd_file.close() + + except Exception as err: + print("Error writing to new device file: %s" % str(err)) + return 1 + else: + return 0 + + def _get_port_eeprom_path(self, port_num, devid): + sysfs_i2c_adapter_base_path = "" + + if port_num in self.port_to_eeprom_mapping.keys(): + sysfs_sfp_i2c_client_eeprom_path = self.port_to_eeprom_mapping[port_num] + else: + sysfs_i2c_adapter_base_path = "/sys/class/i2c-adapter" + + i2c_adapter_id = self._get_port_i2c_adapter_id(port_num) + if i2c_adapter_id is None: + print("Error getting i2c bus num") + return None + + # Get i2c virtual bus path for the sfp + sysfs_sfp_i2c_adapter_path = "%s/i2c-%s" % (sysfs_i2c_adapter_base_path, + str(i2c_adapter_id)) + + # If i2c bus for port does not exist + if not os.path.exists(sysfs_sfp_i2c_adapter_path): + print("Could not find i2c bus %s. Driver not loaded?" % sysfs_sfp_i2c_adapter_path) + return None + + sysfs_sfp_i2c_client_path = "%s/%s-00%s" % (sysfs_sfp_i2c_adapter_path, + str(i2c_adapter_id), + hex(devid)[-2:]) + + # If sfp device is not present on bus, Add it + if not os.path.exists(sysfs_sfp_i2c_client_path): + if port_num in self.qsfp_ports: + ret = self._add_new_sfp_device( + sysfs_sfp_i2c_adapter_path, devid, self.QSFP_DEVICE_TYPE) + else: + ret = self._add_new_sfp_device( + sysfs_sfp_i2c_adapter_path, devid, self.SFP_DEVICE_TYPE) + if ret != 0: + print("Error adding sfp device") + return None + + sysfs_sfp_i2c_client_eeprom_path = "%s/eeprom" % sysfs_sfp_i2c_client_path + + return sysfs_sfp_i2c_client_eeprom_path + + def _read_eeprom_specific_bytes(self, sysfsfile_eeprom, offset, num_bytes): + eeprom_raw = [] + for i in range(0, num_bytes): + eeprom_raw.append("0x00") + + rv, raw = self._sfp_read_file_path(sysfsfile_eeprom, offset, num_bytes) + if rv == False: + return None + + try: + for n in range(0, num_bytes): + eeprom_raw[n] = hex(ord(raw[n]))[2:].zfill(2) + except Exception: + return None + + return eeprom_raw + + def get_eeprom_dom_raw(self, port_num): + if port_num in self.qsfp_ports: + # QSFP DOM EEPROM is also at addr 0x50 and thus also stored in eeprom_ifraw + return None + else: + # Read dom eeprom at addr 0x51 + return self._read_eeprom_devid(port_num, self.IDENTITY_EEPROM_ADDR, 256) + + def get_presence(self, port_num): + # Check for invalid port_num + #return True + if port_num < self.port_start or port_num > self.port_end: + return False + + PRESENCE_OFFSET = 3 + presence_path = "/sys/bus/i2c/devices/%d-003%d/sfp_presence%d" % ((PRESENCE_OFFSET + (port_num // 32)), + ((port_num % 32) // 16), (((port_num % 32) // 8) + 1)) + try: + data = open(presence_path, "rb") + except IOError: + return False + + presence_data = data.read(2) + if presence_data != "": + result = int(presence_data, 16) + else : + return False + data.close() + + # ModPrsL is active low + if result & (1 << (port_num % 8)) == 0: + return True + + return False + + def get_low_power_mode(self, port_num): + # Check for invalid port_num + + return True + + def set_low_power_mode(self, port_num, lpmode): + # Check for invalid port_num + + return True + + def reset(self, port_num): + # Check for invalid port_num + if port_num < self.port_start or port_num > self.port_end: + return False + + return True + + def get_transceiver_change_event(self, timeout=0): + + start_time = time.time() + currernt_port_dict = {} + forever = False + + if timeout == 0: + forever = True + elif timeout > 0: + timeout = timeout / float(1000) # Convert to secs + else: + print ("get_transceiver_change_event:Invalid timeout value", timeout) + return False, {} + + end_time = start_time + timeout + if start_time > end_time: + print ('get_transceiver_change_event:' \ + 'time wrap / invalid timeout value', timeout) + + return False, {} # Time wrap or possibly incorrect timeout + + while timeout >= 0: + # Check for OIR events and return updated port_dict + for x in range(self.PORT_START, self.PORTS_IN_BLOCK): + if self.get_presence(x): + currernt_port_dict[x] = self.SFP_STATUS_INSERTED + else: + currernt_port_dict[x] = self.SFP_STATUS_REMOVED + if (currernt_port_dict == self.port_dict): + if forever: + time.sleep(1) + else: + timeout = end_time - time.time() + if timeout >= 1: + time.sleep(1) # We poll at 1 second granularity + else: + if timeout > 0: + time.sleep(timeout) + return True, {} + else: + # Update reg value + self.port_dict = currernt_port_dict + return True, self.port_dict + print ("get_transceiver_change_event: Should not reach here.") + return False, {} diff --git a/device/ragile/x86_64-ragile_ra-b6920-4s-r0/plugins/ssd_util.py b/device/ragile/x86_64-ragile_ra-b6920-4s-r0/plugins/ssd_util.py new file mode 100644 index 0000000000..b6e5d6d3dd --- /dev/null +++ b/device/ragile/x86_64-ragile_ra-b6920-4s-r0/plugins/ssd_util.py @@ -0,0 +1,98 @@ +# +# ssd_health +# + +from sonic_platform_base.sonic_ssd.ssd_base import SsdBase +from subprocess import Popen, PIPE +from re import findall +from os.path import exists + +INNODISK = "iSmart -d {}" +NOT_AVAILABLE = "N/A" + +class SsdUtil(SsdBase): + + def __init__(self, diskdev): + """ + Constructor + Args: + diskdev: Linux device name to get parameters for + """ + if not isinstance(diskdev, str): + raise TypeError("disk dev type wrong {}".format(type(diskdev))) + + if not exists(diskdev): + raise RuntimeError("disk dev {} not found".format(diskdev)) + + self.model = NOT_AVAILABLE + self.serial = NOT_AVAILABLE + self.firmware = NOT_AVAILABLE + self.temperature = NOT_AVAILABLE + self.health = NOT_AVAILABLE + + self.ssd_info = self._execute_shell(INNODISK.format(diskdev)) + + self.model = self._parse_re(r'Model Name:\s*(.+?)\n', self.ssd_info) + self.serial = self._parse_re(r'Serial Number:\s*(.+?)\n', self.ssd_info) + self.firmware = self._parse_re(r'FW Version:\s*(.+?)\n', self.ssd_info) + self.temperature = self._parse_re(r'Temperature\s*\[\s*(.+?)\]', self.ssd_info) + self.health = self._parse_re(r'Health:\s*(.+?)', self.ssd_info) + + def _execute_shell(self, cmd): + process = Popen(cmd.split(), universal_newlines=True, stdout=PIPE) + output, _ = process.communicate() + return output + + def _parse_re(self, pattern, buffer): + res_list = findall(pattern, buffer) + return res_list[0] if res_list else NOT_AVAILABLE + + def get_health(self): + """ + Retrieves current disk health in percentages + Returns: + A float number of current ssd health + e.g. 83.5 + """ + return self.health + + def get_temperature(self): + """ + Retrieves current disk temperature in Celsius + Returns: + A float number of current temperature in Celsius + e.g. 40.1 + """ + return self.temperature + + def get_model(self): + """ + Retrieves model for the given disk device + Returns: + A string holding disk model as provided by the manufacturer + """ + return self.model + + def get_firmware(self): + """ + Retrieves firmware version for the given disk device + Returns: + A string holding disk firmware version as provided by the manufacturer + """ + return self.firmware + + def get_serial(self): + """ + Retrieves serial number for the given disk device + Returns: + A string holding disk serial number as provided by the manufacturer + """ + return self.serial + + def get_vendor_output(self): + """ + Retrieves vendor specific data for the given disk device + Returns: + A string holding some vendor specific disk information + """ + return self.ssd_info diff --git a/device/ragile/x86_64-ragile_ra-b6920-4s-r0/pmon_daemon_control.json b/device/ragile/x86_64-ragile_ra-b6920-4s-r0/pmon_daemon_control.json new file mode 100644 index 0000000000..94592fa8ce --- /dev/null +++ b/device/ragile/x86_64-ragile_ra-b6920-4s-r0/pmon_daemon_control.json @@ -0,0 +1,3 @@ +{ + "skip_ledd": true +} diff --git a/device/ragile/x86_64-ragile_ra-b6920-4s-r0/sensors.conf b/device/ragile/x86_64-ragile_ra-b6920-4s-r0/sensors.conf new file mode 100644 index 0000000000..56b7eba725 --- /dev/null +++ b/device/ragile/x86_64-ragile_ra-b6920-4s-r0/sensors.conf @@ -0,0 +1,14 @@ +chip "rg_cpld-*" + label fan1 "fan1_inlet" + label fan2 "fan1_outlet" + label fan3 "fan2_inlet" + label fan4 "fan2_outlet" + label fan5 "fan3_inlet" + label fan6 "fan3_outlet" + label fan7 "fan4_inlet" + label fan8 "fan4_outlet" + label fan9 "fan5_inlet" + label fan10 "fan5_outlet" + label fan11 "fan6_inlet" + label fan12 "fan6_outlet" + diff --git a/device/ragile/x86_64-ragile_ra-b6920-4s-r0/systest.py b/device/ragile/x86_64-ragile_ra-b6920-4s-r0/systest.py new file mode 100644 index 0000000000..b40bf45b2c --- /dev/null +++ b/device/ragile/x86_64-ragile_ra-b6920-4s-r0/systest.py @@ -0,0 +1,43 @@ +#!/usr/bin/python +# -*- coding: UTF-8 -*- + +# * onboard interval check +# * FAN trays +# * PSU +# * temp +import time +import datetime +from monitor import status + +def doWork(): + a=[]; + ''' + return: [{'status': '1', 'hw_version': '1.00', 'errcode': 0, 'fan_type': 'M6510-FAN-F', 'errmsg': 'OK', 'Speed': '9778', 'id': 'fan1', 'present': '0', 'sn': '1000000000014'}, + {'id': 'fan2', 'errmsg': 'not present', 'errcode': -1}, + {'id': 'fan3', 'errmsg': 'not present', 'errcode': -1}, + {'id': 'fan4', 'errmsg': 'not present', 'errcode': -1} + ] + description: 1.get id + 2.errcode equal 0 : dev normal + not equal 0 : get errmsg + 3.other message add when all check success + ''' + status.checkFan(a) + #status.getTemp(a) + #status.getPsu(a) + + nowTime=datetime.datetime.now().strftime('%Y-%m-%d %H:%M:%S') + print nowTime + print a +def run(interval): + while True: + try: + time_remaining = interval - time.time()%interval + time.sleep(time_remaining) + doWork() + except Exception as e: + print(e) + +if __name__ == '__main__': + interval = 1 + run(interval) diff --git a/platform/broadcom/one-image.mk b/platform/broadcom/one-image.mk index debd524955..4405070460 100644 --- a/platform/broadcom/one-image.mk +++ b/platform/broadcom/one-image.mk @@ -76,6 +76,8 @@ $(SONIC_ONE_IMAGE)_LAZY_INSTALLS += $(DELL_S6000_PLATFORM_MODULE) \ $(RUIJIE_B6510_48VS8CQ_PLATFORM_MODULE) \ $(RAGILE_RA_B6510_48V8C_PLATFORM_MODULE) \ $(RAGILE_RA_B6910_64C_PLATFORM_MODULE) \ + $(RAGILE_RA_B6510_32C_PLATFORM_MODULE) \ + $(RAGILE_RA_B6920_4S_PLATFORM_MODULE) \ $(NOKIA_IXR7250_PLATFORM_MODULE) $(SONIC_ONE_IMAGE)_LAZY_BUILD_INSTALLS = $(BRCM_OPENNSL_KERNEL) $(BRCM_DNX_OPENNSL_KERNEL) ifeq ($(INSTALL_DEBUG_TOOLS),y) diff --git a/platform/broadcom/platform-modules-ragile.mk b/platform/broadcom/platform-modules-ragile.mk index d13b574407..74ce1b04f4 100644 --- a/platform/broadcom/platform-modules-ragile.mk +++ b/platform/broadcom/platform-modules-ragile.mk @@ -17,3 +17,18 @@ RAGILE_RA_B6910_64C_PLATFORM_MODULE = platform-modules-ragile-ra-b6910-64c_$(RAG $(RAGILE_RA_B6910_64C_PLATFORM_MODULE)_PLATFORM = x86_64-ragile_ra-b6910-64c-r0 $(eval $(call add_extra_package,$(RAGILE_RA_B6510_48V8C_PLATFORM_MODULE),$(RAGILE_RA_B6910_64C_PLATFORM_MODULE))) +## RA-B6510-32C +RAGILE_RA_B6510_32C_PLATFORM_MODULE_VERSION = 1.0 +export RAGILE_RA_B6510_32C_PLATFORM_MODULE_VERSION + +RAGILE_RA_B6510_32C_PLATFORM_MODULE = platform-modules-ragile-ra-b6510-32c_$(RAGILE_RA_B6510_32C_PLATFORM_MODULE_VERSION)_amd64.deb +$(RAGILE_RA_B6510_32C_PLATFORM_MODULE)_PLATFORM = x86_64-ragile_ra-b6510-32c-r0 +$(eval $(call add_extra_package,$(RAGILE_RA_B6510_48V8C_PLATFORM_MODULE),$(RAGILE_RA_B6510_32C_PLATFORM_MODULE))) + +## RA-B6920-4s +RAGILE_RA_B6920_4S_PLATFORM_MODULE_VERSION = 1.0 +export RAGILE_RA_B6920_4S_PLATFORM_MODULE_VERSION + +RAGILE_RA_B6920_4S_PLATFORM_MODULE = platform-modules-ragile-ra-b6920-4s_$(RAGILE_RA_B6920_4S_PLATFORM_MODULE_VERSION)_amd64.deb +$(RAGILE_RA_B6920_4S_PLATFORM_MODULE)_PLATFORM = x86_64-ragile_ra-b6920-4s-r0 +$(eval $(call add_extra_package,$(RAGILE_RA_B6510_48V8C_PLATFORM_MODULE),$(RAGILE_RA_B6920_4S_PLATFORM_MODULE))) diff --git a/platform/broadcom/sonic-platform-modules-ragile/common/modules/Makefile b/platform/broadcom/sonic-platform-modules-ragile/common/modules/Makefile index ab97718992..f7204c8684 100755 --- a/platform/broadcom/sonic-platform-modules-ragile/common/modules/Makefile +++ b/platform/broadcom/sonic-platform-modules-ragile/common/modules/Makefile @@ -5,3 +5,11 @@ obj-m += ragile_platform.o obj-m += i2c-mux-pca9641.o obj-m += i2c-mux-pca954x.o obj-m += csu550.o +ragile_common-objs := ragile_common_module.o +obj-m += ragile_common.o +obj-m += fpga_pcie_i2c.o +obj-m += fpga_i2c_ocores.o +obj-m += lpc_dbg.o +obj-m += lpc_cpld_i2c_ocores.o +obj-m += rg-i2c-algo-bit.o +obj-m += rg-i2c-gpio.o diff --git a/platform/broadcom/sonic-platform-modules-ragile/common/modules/fpga_i2c_ocores.c b/platform/broadcom/sonic-platform-modules-ragile/common/modules/fpga_i2c_ocores.c new file mode 100755 index 0000000000..81068a1402 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ragile/common/modules/fpga_i2c_ocores.c @@ -0,0 +1,906 @@ +/* + * i2c-ocores.c: I2C bus driver for OpenCores I2C controller + * (http://www.opencores.org/projects.cgi/web/i2c/overview). + * + * Peter Korsgaard + * + * Support for the GRLIB port of the controller by + * Andreas Larsson + * + * This file is licensed under the terms of the GNU General Public License + * version 2. This program is licensed "as is" without any warranty of any + * kind, whether express or implied. + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + + +struct ocores_i2c { + void __iomem *base; + u32 reg_shift; + u32 reg_io_width; + wait_queue_head_t wait; + struct i2c_adapter adap; + struct i2c_msg *msg; + int pos; + int nmsgs; + int state; /* see STATE_ */ + spinlock_t process_lock; + struct mutex xfer_lock; + int clock_khz; + void (*setreg)(struct ocores_i2c *i2c, int reg, u8 value); + u8 (*getreg)(struct ocores_i2c *i2c, int reg); +}; + +/* registers */ +#define OCI2C_PRELOW 0x0 +#define OCI2C_PREHIGH 0x4 +#define OCI2C_CONTROL 0x8 +#define OCI2C_DATA 0xc +#define OCI2C_CMD 0x10 /* write only */ +#define OCI2C_STATUS 0x10 /* read only, same address as OCI2C_CMD */ + +#define OCI2C_TRAN_REV 0x14 +#define OCI2C_CMD_REV 0x18 + + +#define OCI2C_CTRL_IEN 0x40 +#define OCI2C_CTRL_EN 0x80 + +#define OCI2C_CMD_START 0x91 +#define OCI2C_CMD_STOP 0x41 +#define OCI2C_CMD_READ 0x21 +#define OCI2C_CMD_WRITE 0x11 +#define OCI2C_CMD_READ_ACK 0x21 +#define OCI2C_CMD_READ_NACK 0x29 +#define OCI2C_CMD_IACK 0x01 + +#define OCI2C_STAT_IF 0x01 +#define OCI2C_STAT_TIP 0x02 +#define OCI2C_STAT_ARBLOST 0x20 +#define OCI2C_STAT_BUSY 0x40 +#define OCI2C_STAT_NACK 0x80 + +#define STATE_DONE 0 +#define STATE_START 1 +#define STATE_WRITE 2 +#define STATE_READ 3 +#define STATE_ERROR 4 + +#define TYPE_OCORES 0 +#define TYPE_GRLIB 1 + +#define BUF_SIZE 256 +#define DEFAULT_I2C_SCL 100 +#define DEFAULT_I2C_PRE 0xF9 + +int g_fpga_i2c_debug = 0; +int g_fpga_i2c_irq = 0; +int g_fpga_i2c_error = 0; +int g_irq_dump_debug = 0; +int g_irq_invalid_cnt = 0; +int g_fpga_debug = 0; + +module_param(g_fpga_i2c_debug, int, S_IRUGO | S_IWUSR); +module_param(g_fpga_i2c_error, int, S_IRUGO | S_IWUSR); +module_param(g_fpga_i2c_irq, int, S_IRUGO | S_IWUSR); +module_param(g_irq_dump_debug, int, S_IRUGO | S_IWUSR); +module_param(g_irq_invalid_cnt, int, S_IRUGO | S_IWUSR); +module_param(g_fpga_debug, int, S_IRUGO | S_IWUSR); + +#define FPGA_I2C_DEBUG(fmt, args...) do { \ + if (g_fpga_debug) { \ + printk(KERN_DEBUG ""fmt, ## args); \ + } \ +} while (0) + +#define FPGA_I2C_DEBUG_DUMP(fmt, args...) do { \ + if (g_irq_dump_debug) { \ + printk(KERN_ERR ""fmt, ## args); \ + } \ +} while (0) + +#define FPGA_I2C_DEBUG_XFER(fmt, args...) do { \ + if (g_fpga_i2c_irq) { \ + printk(KERN_ERR "[FPGA_I2C][XFER][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \ + } \ +} while (0) + +#define FPGA_I2C_DEBUG_VERBOSE(fmt, args...) do { \ + if (g_fpga_i2c_debug) { \ + printk(KERN_ERR "[FPGA_I2C][VER][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \ + } \ +} while (0) + +#define FPGA_I2C_DEBUG_ERROR(fmt, args...) do { \ + if (g_fpga_i2c_error) { \ + printk(KERN_ERR "[FPGA_I2C][ERR][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \ + } \ +} while (0) + +static int check_ocores_i2c(struct i2c_msg *msgs, int num); +static void oc_debug_dump_reg(struct ocores_i2c *i2c); +static void oc_debug_dump_reg_dump(struct ocores_i2c *i2c); +static int oc_set_scl_clk(struct ocores_i2c *i2c, int val); + +static void oc_setreg_8(struct ocores_i2c *i2c, int reg, u8 value) +{ + iowrite8(value, i2c->base + (reg << i2c->reg_shift)); +} + +static void oc_setreg_16(struct ocores_i2c *i2c, int reg, u8 value) +{ + iowrite16(value, i2c->base + (reg << i2c->reg_shift)); +} + +static void oc_setreg_32(struct ocores_i2c *i2c, int reg, u8 value) +{ + iowrite32(value, i2c->base + (reg << i2c->reg_shift)); +} + +static inline u8 oc_getreg_8(struct ocores_i2c *i2c, int reg) +{ + return ioread8(i2c->base + (reg << i2c->reg_shift)); +} + +static inline u8 oc_getreg_16(struct ocores_i2c *i2c, int reg) +{ + return ioread16(i2c->base + (reg << i2c->reg_shift)); +} + +static inline u8 oc_getreg_32(struct ocores_i2c *i2c, int reg) +{ + return ioread32(i2c->base + (reg << i2c->reg_shift)); +} + +static inline void oc_setreg(struct ocores_i2c *i2c, int reg, u8 value) +{ + i2c->setreg(i2c, reg, value); +} + +static inline u8 oc_getreg(struct ocores_i2c *i2c, int reg) +{ + return i2c->getreg(i2c, reg); +} + +#define FPGA_I2C_SPIN_LOCK(lock, flags) spin_lock_irqsave(&(lock), (flags)) +#define FPGA_I2C_SPIN_UNLOCK(lock, flags) spin_unlock_irqrestore(&(lock), (flags)) +#define FPGA_I2C_MUTEX_LOCK(lock) mutex_lock(&(lock)) +#define FPGA_I2C_MUTEX_UNLOCK(lock) mutex_unlock(&(lock)) + +static void ocores_process(struct ocores_i2c *i2c, u8 stat) +{ + struct i2c_msg *msg = i2c->msg; + + FPGA_I2C_DEBUG_XFER("Enter nr %d.\n", i2c->adap.nr); + if ((i2c->state == STATE_DONE) || (i2c->state == STATE_ERROR)) { + /* stop has been sent */ + oc_setreg(i2c, OCI2C_CMD, OCI2C_CMD_IACK); + wake_up(&i2c->wait); + FPGA_I2C_DEBUG_XFER("stop has been sent, exit.\n"); + goto out; + } + + FPGA_I2C_DEBUG_XFER("Enter 111.\n"); + + /* error */ + if (stat & OCI2C_STAT_ARBLOST) { + i2c->state = STATE_ERROR; + oc_setreg(i2c, OCI2C_CMD, OCI2C_CMD_STOP); + FPGA_I2C_DEBUG_XFER("error, exit.\n"); + goto out; + } + + FPGA_I2C_DEBUG_XFER("Enter 222.\n"); + + if (check_ocores_i2c(i2c->msg, i2c->nmsgs) != 0) { + FPGA_I2C_DEBUG("i2c->msg->buf is null, i2c->state:%d exit.\n", i2c->state); + oc_debug_dump_reg_dump(i2c); + i2c->state = STATE_ERROR; + oc_setreg(i2c, OCI2C_CMD, OCI2C_CMD_STOP); + goto out; + } + + if ((i2c->state == STATE_START) || (i2c->state == STATE_WRITE)) { + i2c->state = + (msg->flags & I2C_M_RD) ? STATE_READ : STATE_WRITE; + + if (stat & OCI2C_STAT_NACK) { + i2c->state = STATE_ERROR; + oc_setreg(i2c, OCI2C_CMD, OCI2C_CMD_STOP); + FPGA_I2C_DEBUG_XFER("OCI2C_STAT_NACK, exit.\n"); + goto out; + } + } else { + msg->buf[i2c->pos++] = oc_getreg(i2c, OCI2C_DATA); + } + FPGA_I2C_DEBUG_XFER("Enter 333.\n"); + + /* end of msg? */ + if (i2c->pos == msg->len) { + FPGA_I2C_DEBUG_XFER("Enter end of msg.\n"); + i2c->nmsgs--; + i2c->msg++; + i2c->pos = 0; + msg = i2c->msg; + + if (i2c->nmsgs) { /* end? */ + /* send start? */ + if (!(msg->flags & I2C_M_NOSTART)) { + u8 addr = (msg->addr << 1); + + if (msg->flags & I2C_M_RD) + addr |= 1; + + i2c->state = STATE_START; + + oc_setreg(i2c, OCI2C_DATA, addr); + oc_setreg(i2c, OCI2C_CMD, OCI2C_CMD_START); + FPGA_I2C_DEBUG_XFER("send start, exit.\n"); + goto out; + } + + i2c->state = (msg->flags & I2C_M_RD) + ? STATE_READ : STATE_WRITE; + } else { + i2c->state = STATE_DONE; + oc_setreg(i2c, OCI2C_CMD, OCI2C_CMD_STOP); + FPGA_I2C_DEBUG_XFER("send OCI2C_CMD_STOP, exit.\n"); + goto out; + } + } + + if (i2c->state == STATE_READ) { + oc_setreg(i2c, OCI2C_CMD, i2c->pos == (msg->len-1) ? + OCI2C_CMD_READ_NACK : OCI2C_CMD_READ_ACK); + } else { + oc_setreg(i2c, OCI2C_DATA, msg->buf[i2c->pos++]); + oc_setreg(i2c, OCI2C_CMD, OCI2C_CMD_WRITE); + } + +out: + FPGA_I2C_DEBUG_XFER("normal, exit nr %d.\n", i2c->adap.nr); +} + +static irqreturn_t ocores_isr(int irq, void *dev_id) +{ + struct ocores_i2c *i2c = dev_id; + unsigned long flags; + u8 stat; + + if (!i2c) { + return IRQ_NONE; + } + /* + * If we spin here is because we are in timeout, so we are going + * to be in STATE_ERROR. See ocores_process_timeout() + */ + FPGA_I2C_SPIN_LOCK(i2c->process_lock, flags); + stat = oc_getreg(i2c, OCI2C_STATUS); + if (!(stat & OCI2C_STAT_IF)) { + g_irq_invalid_cnt++; + FPGA_I2C_SPIN_UNLOCK(i2c->process_lock, flags); + return IRQ_NONE; + } + + FPGA_I2C_DEBUG_XFER("Enter, irq %d nr %d addr 0x%x.\n", irq, i2c->adap.nr, (!i2c->msg)?0:i2c->msg->addr); + ocores_process(i2c, stat); + FPGA_I2C_DEBUG_XFER("Leave, irq %d nr %d addr 0x%x.\n", irq, i2c->adap.nr, (!i2c->msg)?0:i2c->msg->addr); + + FPGA_I2C_SPIN_UNLOCK(i2c->process_lock, flags); + return IRQ_HANDLED; +} + +/** + * Process timeout event + * @i2c: ocores I2C device instance + */ +static void ocores_process_timeout(struct ocores_i2c *i2c) +{ + unsigned long flags; + + FPGA_I2C_SPIN_LOCK(i2c->process_lock, flags); + FPGA_I2C_DEBUG_ERROR("wait_event_timeout i2c->state %d.\n", i2c->state); + oc_debug_dump_reg(i2c); + i2c->state = STATE_ERROR; + oc_setreg(i2c, OCI2C_CMD, OCI2C_CMD_STOP); + mdelay(1); + FPGA_I2C_SPIN_UNLOCK(i2c->process_lock, flags); +} + +static int check_ocores_i2c(struct i2c_msg *msgs, int num) +{ + int i; + if (!msgs) { + return -1; + } + for (i = 0; i < num; ++i) { + if (!msgs[i].buf) { + return -1; + } + } + return 0; +} + +static int ocores_xfer(struct i2c_adapter *adap, struct i2c_msg *msgs, int num) +{ + struct ocores_i2c *i2c; + int ret; + unsigned long flags; + int xfer_ret; + + if (!adap || check_ocores_i2c(msgs, num) != 0) { + FPGA_I2C_DEBUG("msgs: %p , num:%d exit.\n", msgs, num); + return -EINVAL; + } + i2c = i2c_get_adapdata(adap); + + FPGA_I2C_MUTEX_LOCK(i2c->xfer_lock); + FPGA_I2C_SPIN_LOCK(i2c->process_lock, flags); + i2c->msg = msgs; + i2c->pos = 0; + i2c->nmsgs = num; + i2c->state = STATE_START; + FPGA_I2C_DEBUG_XFER("Enter, nr %d addr 0x%x num %d.\n", adap->nr, i2c->msg->addr, num); + + oc_setreg(i2c, OCI2C_DATA, + (i2c->msg->addr << 1) | + ((i2c->msg->flags & I2C_M_RD) ? 1:0)); + + oc_setreg(i2c, OCI2C_CMD, OCI2C_CMD_START); + FPGA_I2C_DEBUG_XFER("After, oc_setreg OCI2C_CMD.\n"); + FPGA_I2C_SPIN_UNLOCK(i2c->process_lock, flags); + + ret = wait_event_timeout(i2c->wait, (i2c->state == STATE_ERROR) || + (i2c->state == STATE_DONE), HZ); + + if (ret == 0) { + ocores_process_timeout(i2c); + FPGA_I2C_MUTEX_UNLOCK(i2c->xfer_lock); + return -ETIMEDOUT; + } + xfer_ret = i2c->state; + FPGA_I2C_MUTEX_UNLOCK(i2c->xfer_lock); + return (xfer_ret == STATE_DONE) ? num : -EIO; +} + +static void ocores_init(struct ocores_i2c *i2c) +{ + int prescale; + u8 ctrl = oc_getreg(i2c, OCI2C_CONTROL); + + mutex_init(&i2c->xfer_lock); + spin_lock_init(&i2c->process_lock); + + /* make sure the device is disabled */ + oc_setreg(i2c, OCI2C_CONTROL, ctrl & ~(OCI2C_CTRL_EN|OCI2C_CTRL_IEN)); + + prescale = oc_set_scl_clk(i2c, DEFAULT_I2C_SCL); + FPGA_I2C_DEBUG_VERBOSE("i2c->base 0x%p, i2c->clock_khz %d, prescale 0x%x.\n", i2c->base, i2c->clock_khz, prescale); + + /* Init the device */ + oc_setreg(i2c, OCI2C_CMD, OCI2C_CMD_IACK); + oc_setreg(i2c, OCI2C_CONTROL, ctrl | OCI2C_CTRL_IEN | OCI2C_CTRL_EN); +} + + +static u32 ocores_func(struct i2c_adapter *adap) +{ + return I2C_FUNC_I2C | I2C_FUNC_SMBUS_EMUL; +} + +static const struct i2c_algorithm ocores_algorithm = { + .master_xfer = ocores_xfer, + .functionality = ocores_func, +}; + +static struct i2c_adapter ocores_adapter = { + .owner = THIS_MODULE, + .name = "rg-i2c-ocores", + .class = I2C_CLASS_HWMON | I2C_CLASS_SPD | I2C_CLASS_DEPRECATED, + .algo = &ocores_algorithm, +}; + +static const struct of_device_id ocores_i2c_match[] = { + { + .compatible = "opencores,rg-i2c-ocores", + .data = (void *)TYPE_OCORES, + }, + { + .compatible = "aeroflexgaisler,i2cmst", + .data = (void *)TYPE_GRLIB, + }, + {}, +}; +MODULE_DEVICE_TABLE(of, ocores_i2c_match); + +#ifdef CONFIG_OF +/* Read and write functions for the GRLIB port of the controller. Registers are + * 32-bit big endian and the PRELOW and PREHIGH registers are merged into one + * register. The subsequent registers has their offset decreased accordingly. */ +static u8 oc_getreg_grlib(struct ocores_i2c *i2c, int reg) +{ + u32 rd; + int rreg = reg; + if (reg != OCI2C_PRELOW) + rreg--; + rd = ioread32be(i2c->base + (rreg << i2c->reg_shift)); + if (reg == OCI2C_PREHIGH) + return (u8)(rd >> 8); + else + return (u8)rd; +} + +static void oc_setreg_grlib(struct ocores_i2c *i2c, int reg, u8 value) +{ + u32 curr, wr; + int rreg = reg; + if (reg != OCI2C_PRELOW) + rreg--; + if (reg == OCI2C_PRELOW || reg == OCI2C_PREHIGH) { + curr = ioread32be(i2c->base + (rreg << i2c->reg_shift)); + if (reg == OCI2C_PRELOW) + wr = (curr & 0xff00) | value; + else + wr = (((u32)value) << 8) | (curr & 0xff); + } else { + wr = value; + } + iowrite32be(wr, i2c->base + (rreg << i2c->reg_shift)); +} + +static int ocores_i2c_of_probe(struct platform_device *pdev, + struct ocores_i2c *i2c) +{ + struct device_node *np = pdev->dev.of_node; + const struct of_device_id *match; + u32 val; + + if (of_property_read_u32(np, "reg-shift", &i2c->reg_shift)) { + /* no 'reg-shift', check for deprecated 'regstep' */ + if (!of_property_read_u32(np, "regstep", &val)) { + if (!is_power_of_2(val)) { + dev_err(&pdev->dev, "invalid regstep %d\n", + val); + return -EINVAL; + } + i2c->reg_shift = ilog2(val); + dev_warn(&pdev->dev, + "regstep property deprecated, use reg-shift\n"); + } + } + + if (of_property_read_u32(np, "clock-frequency", &val)) { + dev_err(&pdev->dev, + "Missing required parameter 'clock-frequency'\n"); + return -ENODEV; + } + i2c->clock_khz = val / 1000; + + of_property_read_u32(pdev->dev.of_node, "reg-io-width", + &i2c->reg_io_width); + + match = of_match_node(ocores_i2c_match, pdev->dev.of_node); + if (match && (long)match->data == TYPE_GRLIB) { + dev_dbg(&pdev->dev, "GRLIB variant of i2c-ocores\n"); + i2c->setreg = oc_setreg_grlib; + i2c->getreg = oc_getreg_grlib; + } + + return 0; +} +#else +#define ocores_i2c_of_probe(pdev,i2c) -ENODEV +#endif + + +static void oc_debug_dump_reg_dump(struct ocores_i2c *i2c) +{ + if (i2c) { + FPGA_I2C_DEBUG("base: %p.\n", i2c->base); + FPGA_I2C_DEBUG("reg_shift: %d.\n", i2c->reg_shift); + FPGA_I2C_DEBUG("reg_io_width: %d.\n", i2c->reg_io_width); + FPGA_I2C_DEBUG("adap.nr: %d.\n", i2c->adap.nr); + FPGA_I2C_DEBUG("msg: %p.\n", i2c->msg); + if (i2c->msg) { + FPGA_I2C_DEBUG("msg->buf: %p.\n", i2c->msg->buf); + FPGA_I2C_DEBUG("msg->addr: 0x%x.\n", i2c->msg->addr); + FPGA_I2C_DEBUG("msg->flags: 0x%x.\n", i2c->msg->flags); + FPGA_I2C_DEBUG("msg->len: %d.\n", i2c->msg->len); + } else { + FPGA_I2C_DEBUG("msg: %p is null.\n", i2c->msg); + } + + FPGA_I2C_DEBUG("pos: %d.\n", i2c->pos); + FPGA_I2C_DEBUG("nmsgs: %d.\n", i2c->nmsgs); + FPGA_I2C_DEBUG("state: %d.\n", i2c->state); + FPGA_I2C_DEBUG("clock_khz: %d.\n", i2c->clock_khz); + FPGA_I2C_DEBUG("setreg: %p.\n", i2c->setreg); + FPGA_I2C_DEBUG("getreg: %p.\n", i2c->getreg); + if (i2c->getreg) { + FPGA_I2C_DEBUG("OCI2C_PRELOW: 0x%02x.\n", oc_getreg(i2c, OCI2C_PRELOW)); + FPGA_I2C_DEBUG("OCI2C_PREHIGH: 0x%02x.\n", oc_getreg(i2c, OCI2C_PREHIGH)); + FPGA_I2C_DEBUG("OCI2C_CONTROL: 0x%02x.\n", oc_getreg(i2c, OCI2C_CONTROL)); + FPGA_I2C_DEBUG("OCI2C_DATA: 0x%02x.\n", oc_getreg(i2c, OCI2C_DATA)); + FPGA_I2C_DEBUG("OCI2C_CMD: 0x%02x.\n", oc_getreg(i2c, OCI2C_CMD)); + FPGA_I2C_DEBUG("OCI2C_STATUS: 0x%02x.\n", oc_getreg(i2c, OCI2C_STATUS)); + } else { + FPGA_I2C_DEBUG("getreg: %p is null.\n", i2c->getreg); + } + } else { + FPGA_I2C_DEBUG("i2c %p is null.\n", i2c); + } +} + + +static void oc_debug_dump_reg(struct ocores_i2c *i2c) +{ + if (i2c) { + FPGA_I2C_DEBUG_DUMP("base: %p.\n", i2c->base); + FPGA_I2C_DEBUG_DUMP("reg_shift: %d.\n", i2c->reg_shift); + FPGA_I2C_DEBUG_DUMP("reg_io_width: %d.\n", i2c->reg_io_width); + FPGA_I2C_DEBUG_DUMP("adap.nr: %d.\n", i2c->adap.nr); + FPGA_I2C_DEBUG_DUMP("msg: %p.\n", i2c->msg); + if (i2c->msg) { + FPGA_I2C_DEBUG_DUMP("msg->buf: %p.\n", i2c->msg->buf); + FPGA_I2C_DEBUG_DUMP("msg->addr: 0x%x.\n", i2c->msg->addr); + FPGA_I2C_DEBUG_DUMP("msg->flags: 0x%x.\n", i2c->msg->flags); + FPGA_I2C_DEBUG_DUMP("msg->len: %d.\n", i2c->msg->len); + } else { + FPGA_I2C_DEBUG_DUMP("msg: %p is null.\n", i2c->msg); + } + + FPGA_I2C_DEBUG_DUMP("pos: %d.\n", i2c->pos); + FPGA_I2C_DEBUG_DUMP("nmsgs: %d.\n", i2c->nmsgs); + FPGA_I2C_DEBUG_DUMP("state: %d.\n", i2c->state); + FPGA_I2C_DEBUG_DUMP("clock_khz: %d.\n", i2c->clock_khz); + FPGA_I2C_DEBUG_DUMP("setreg: %p.\n", i2c->setreg); + FPGA_I2C_DEBUG_DUMP("getreg: %p.\n", i2c->getreg); + if (i2c->getreg) { + FPGA_I2C_DEBUG_DUMP("OCI2C_PRELOW: 0x%02x.\n", oc_getreg(i2c, OCI2C_PRELOW)); + FPGA_I2C_DEBUG_DUMP("OCI2C_PREHIGH: 0x%02x.\n", oc_getreg(i2c, OCI2C_PREHIGH)); + FPGA_I2C_DEBUG_DUMP("OCI2C_CONTROL: 0x%02x.\n", oc_getreg(i2c, OCI2C_CONTROL)); + FPGA_I2C_DEBUG_DUMP("OCI2C_DATA: 0x%02x.\n", oc_getreg(i2c, OCI2C_DATA)); + FPGA_I2C_DEBUG_DUMP("OCI2C_CMD: 0x%02x.\n", oc_getreg(i2c, OCI2C_CMD)); + FPGA_I2C_DEBUG_DUMP("OCI2C_STATUS: 0x%02x.\n", oc_getreg(i2c, OCI2C_STATUS)); + } else { + FPGA_I2C_DEBUG_DUMP("getreg: %p is null.\n", i2c->getreg); + } + } else { + FPGA_I2C_DEBUG_DUMP("i2c %p is null.\n", i2c); + } +} + +void oc_debug_dump_reg_exception(void) +{ + int bus_beg, bus_end, bus; + struct i2c_adapter *adap; + struct ocores_i2c *adap_data; + + bus_beg = 1; + bus_end = 14; + for (bus = bus_beg; bus <= bus_end; bus++) { + adap = i2c_get_adapter(bus); + if (adap) { + adap_data = (struct ocores_i2c *)i2c_get_adapdata(adap); + if (adap_data) { + FPGA_I2C_DEBUG_DUMP("bus %d call oc_debug_dump_reg begin.\n", bus); + oc_debug_dump_reg(adap_data); + FPGA_I2C_DEBUG_DUMP("bus %d call oc_debug_dump_reg end.\n", bus); + } else { + FPGA_I2C_DEBUG_DUMP("bus %d i2c_get_adapdata null.\n", bus); + } + i2c_put_adapter(adap); + } else { + FPGA_I2C_DEBUG_DUMP("bus %d i2c_get_adapter null.\n", bus); + } + } +} + +static int oc_calculate_prescale(struct ocores_i2c *i2c, int val) { + if (val <= 0) { + FPGA_I2C_DEBUG_ERROR("input scl clock error, set to default clock: %d.\n", val); + val = DEFAULT_I2C_SCL; + } + return (i2c->clock_khz / (5 * val)) - 1; +} + +static int oc_calculate_scl_clk(struct ocores_i2c *i2c, int prescale) { + if (prescale <= -1) { + FPGA_I2C_DEBUG_ERROR("input prescale error, set to default prescale: %d.\n", prescale); + prescale = DEFAULT_I2C_PRE; + } + return (i2c->clock_khz / (prescale + 1)) / 5; +} + +static int oc_set_scl_clk(struct ocores_i2c *i2c, int val) { + int prescale; + + prescale = oc_calculate_prescale(i2c, val); + oc_setreg(i2c, OCI2C_PRELOW, prescale & 0xff); + oc_setreg(i2c, OCI2C_PREHIGH, prescale >> 8); + return prescale; +} + +static int oc_get_scl_clk(struct ocores_i2c *i2c) { + int prescale, prescale_high, prescale_low; + + prescale_low = oc_getreg(i2c, OCI2C_PRELOW); + prescale_high = oc_getreg(i2c, OCI2C_PREHIGH); + prescale = (prescale_high << 8) + (prescale_low & 0xff); + + return oc_calculate_scl_clk(i2c, prescale); +} + +static ssize_t oc_sysfs_show_scl_clk(struct device *dev, struct device_attribute *attr, char *buf) +{ + struct i2c_adapter *adapter; + struct ocores_i2c *i2c; + int scl_clk; + + adapter = to_i2c_adapter(dev); + i2c = (struct ocores_i2c *)i2c_get_adapdata(adapter); + scl_clk = oc_get_scl_clk(i2c); + return snprintf(buf, BUF_SIZE, "%d\n", scl_clk); +} + +static ssize_t oc_sysfs_set_scl_clk(struct device *dev, struct device_attribute *attr, const char *buf, size_t count) +{ + struct i2c_adapter *adapter; + struct ocores_i2c *i2c; + int val; + int ret; + int prescale; + + adapter = to_i2c_adapter(dev); + i2c = (struct ocores_i2c *)i2c_get_adapdata(adapter); + ret = kstrtoint(buf, 0, &val); + if (ret) { + return ret; + } + FPGA_I2C_MUTEX_LOCK(i2c->xfer_lock); + prescale = oc_set_scl_clk(i2c, val); + FPGA_I2C_DEBUG_VERBOSE("i2c->base 0x%p, i2c->clock_khz %d, scl clk 0x%x.\n", i2c->base, i2c->clock_khz, prescale); + FPGA_I2C_MUTEX_UNLOCK(i2c->xfer_lock); + return count; +} +static ssize_t show_oc_debug_value(struct device *dev, struct device_attribute *da, char *buf) +{ + oc_debug_dump_reg_exception(); + return 0; +} + +static SENSOR_DEVICE_ATTR(oc_debug, S_IRUGO | S_IWUSR, show_oc_debug_value, NULL, 0x15); +static SENSOR_DEVICE_ATTR(oc_scl_clk, S_IRUGO | S_IWUSR, oc_sysfs_show_scl_clk, oc_sysfs_set_scl_clk, 0); + +static struct attribute *oc_debug_sysfs_attrs[] = { + &sensor_dev_attr_oc_debug.dev_attr.attr, + NULL +}; + +static struct attribute *oc_scl_clk_sysfs_attrs[] = { + &sensor_dev_attr_oc_scl_clk.dev_attr.attr, + NULL +}; + +static const struct attribute_group oc_debug_sysfs_group = { + .attrs = oc_debug_sysfs_attrs, +}; + +static const struct attribute_group oc_scl_clk_sysfs_group = { + .attrs = oc_scl_clk_sysfs_attrs, +}; + +static void oc_scl_clk_sysfs_init(struct i2c_adapter *adap) +{ + int ret; + + ret = sysfs_create_group(&adap->dev.kobj, &oc_scl_clk_sysfs_group); + FPGA_I2C_DEBUG_VERBOSE("sysfs_create_group ret %d.\n", ret); + return; +} + +static void oc_scl_clk_sysfs_exit(struct i2c_adapter *adap) +{ + sysfs_remove_group(&adap->dev.kobj, (const struct attribute_group *)&oc_scl_clk_sysfs_group); + FPGA_I2C_DEBUG_VERBOSE("sysfs_remove_group.\n"); + return; +} + +static void oc_debug_sysfs_init(struct platform_device *pdev) +{ + int ret; + + ret = sysfs_create_group(&pdev->dev.kobj, &oc_debug_sysfs_group); + FPGA_I2C_DEBUG_VERBOSE("sysfs_create_group ret %d.\n", ret); + return; +} + +static void oc_debug_sysfs_exit(struct platform_device *pdev) +{ + sysfs_remove_group(&pdev->dev.kobj, (const struct attribute_group *)&oc_debug_sysfs_group); + FPGA_I2C_DEBUG_VERBOSE("sysfs_remove_group.\n"); + return; +} + +static int rg_ocores_i2c_probe(struct platform_device *pdev) +{ + struct ocores_i2c *i2c; + struct rg_ocores_i2c_platform_data *pdata; + struct resource *res; + int irq; + int ret; + int i; + + FPGA_I2C_DEBUG_VERBOSE("Enter.\n"); + irq = platform_get_irq(pdev, 0); + if (irq < 0) { + FPGA_I2C_DEBUG_ERROR("platform_get_irq failed irq %d.\n", irq); + return irq; + } + + i2c = devm_kzalloc(&pdev->dev, sizeof(*i2c), GFP_KERNEL); + if (!i2c) { + FPGA_I2C_DEBUG_ERROR("devm_kzalloc failed.\n"); + return -ENOMEM; + } + res = platform_get_resource(pdev, IORESOURCE_MEM, 0); + i2c->base = devm_ioremap_resource(&pdev->dev, res); + if (IS_ERR(i2c->base)) { + FPGA_I2C_DEBUG_ERROR("devm_ioremap_resource failed.\n"); + return PTR_ERR(i2c->base); + } + + pdata = dev_get_platdata(&pdev->dev); + if (pdata) { + i2c->reg_shift = pdata->reg_shift; + i2c->reg_io_width = pdata->reg_io_width; + i2c->clock_khz = pdata->clock_khz; + } else { + ret = ocores_i2c_of_probe(pdev, i2c); + if (ret) + return ret; + } + + if (i2c->reg_io_width == 0) + i2c->reg_io_width = 1; /* Set to default value */ + + + if (!i2c->setreg || !i2c->getreg) { + switch (i2c->reg_io_width) { + case 1: + i2c->setreg = oc_setreg_8; + i2c->getreg = oc_getreg_8; + break; + + case 2: + i2c->setreg = oc_setreg_16; + i2c->getreg = oc_getreg_16; + break; + + case 4: + i2c->setreg = oc_setreg_32; + i2c->getreg = oc_getreg_32; + break; + + default: + dev_err(&pdev->dev, "Unsupported I/O width (%d)\n", + i2c->reg_io_width); + return -EINVAL; + } + } + + ocores_init(i2c); + + init_waitqueue_head(&i2c->wait); + ret = devm_request_irq(&pdev->dev, irq, ocores_isr, 0, + pdev->name, i2c); + if (ret) { + dev_err(&pdev->dev, "Cannot claim IRQ\n"); + return ret; + } + + /* hook up driver to tree */ + platform_set_drvdata(pdev, i2c); + i2c->adap = ocores_adapter; + if (pdata->nr) { + i2c->adap.nr = pdata->nr; + dev_info(&pdev->dev, "fpga ocores nr is (%d), irq %d \n", i2c->adap.nr, irq); + } + i2c_set_adapdata(&i2c->adap, i2c); + i2c->adap.dev.parent = &pdev->dev; + i2c->adap.dev.of_node = pdev->dev.of_node; + + /* add i2c adapter to i2c tree */ + ret = i2c_add_numbered_adapter(&i2c->adap); + if (ret) { + dev_err(&pdev->dev, "Failed to add adapter\n"); + return ret; + } + + /* add in known devices to the bus */ + if (pdata) { + for (i = 0; i < pdata->num_devices; i++) + i2c_new_device(&i2c->adap, pdata->devices + i); + } + + oc_debug_sysfs_init(pdev); + oc_scl_clk_sysfs_init(&i2c->adap); + return 0; +} + +static int rg_ocores_i2c_remove(struct platform_device *pdev) +{ + struct ocores_i2c *i2c = platform_get_drvdata(pdev); + + /* disable i2c logic */ + oc_setreg(i2c, OCI2C_CONTROL, oc_getreg(i2c, OCI2C_CONTROL) + & ~(OCI2C_CTRL_EN|OCI2C_CTRL_IEN)); + + /* remove adapter & data */ + oc_scl_clk_sysfs_exit(&i2c->adap); + i2c_del_adapter(&i2c->adap); + oc_debug_sysfs_exit(pdev); + + return 0; +} + +#ifdef CONFIG_PM_SLEEP +static int ocores_i2c_suspend(struct device *dev) +{ + struct ocores_i2c *i2c = dev_get_drvdata(dev); + u8 ctrl = oc_getreg(i2c, OCI2C_CONTROL); + + /* make sure the device is disabled */ + oc_setreg(i2c, OCI2C_CONTROL, ctrl & ~(OCI2C_CTRL_EN|OCI2C_CTRL_IEN)); + + return 0; +} + +static int ocores_i2c_resume(struct device *dev) +{ + struct ocores_i2c *i2c = dev_get_drvdata(dev); + + ocores_init(i2c); + + return 0; +} + +static SIMPLE_DEV_PM_OPS(ocores_i2c_pm, ocores_i2c_suspend, ocores_i2c_resume); +#define OCORES_I2C_PM (&ocores_i2c_pm) +#else +#define OCORES_I2C_PM NULL +#endif + +static struct platform_driver ocores_i2c_driver = { + .probe = rg_ocores_i2c_probe, + .remove = rg_ocores_i2c_remove, + .driver = { + .owner = THIS_MODULE, + .name = "rg-i2c-ocores", + .of_match_table = ocores_i2c_match, + .pm = OCORES_I2C_PM, + }, +}; + +module_platform_driver(ocores_i2c_driver); + +MODULE_AUTHOR("Peter Korsgaard "); +MODULE_DESCRIPTION("OpenCores I2C bus driver"); +MODULE_LICENSE("GPL"); +MODULE_ALIAS("platform:ocores-i2c"); diff --git a/platform/broadcom/sonic-platform-modules-ragile/common/modules/fpga_i2c_ocores.h b/platform/broadcom/sonic-platform-modules-ragile/common/modules/fpga_i2c_ocores.h new file mode 100755 index 0000000000..1aedd7793c --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ragile/common/modules/fpga_i2c_ocores.h @@ -0,0 +1,13 @@ +#ifndef _FPGA_I2C_OCORES_H +#define _FPGA_I2C_OCORES_H + +struct rg_ocores_i2c_platform_data { + u32 reg_shift; /* register offset shift value */ + u32 reg_io_width; /* register io read/write width */ + u32 clock_khz; /* input clock in kHz */ + u8 num_devices; /* number of devices in the devices list */ + struct i2c_board_info const *devices; /* devices connected to the bus */ + int nr; /* i2c bus num */ +}; + +#endif /* _FPGA_I2C_OCORES_H */ diff --git a/platform/broadcom/sonic-platform-modules-ragile/common/modules/fpga_pcie_i2c.c b/platform/broadcom/sonic-platform-modules-ragile/common/modules/fpga_pcie_i2c.c new file mode 100755 index 0000000000..82ae9f558f --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ragile/common/modules/fpga_pcie_i2c.c @@ -0,0 +1,1144 @@ +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include +#include +#include + +#include +#include +#if LINUX_VERSION_CODE > KERNEL_VERSION(4, 15, 0) +#include +#else +#include +#endif +#include +#include +#include + + +#ifdef FPGA_PCIE_I2C_DEBUG +#include +#include +#include +#include +#include + +char *enum_log="/home/pciuio-log"; + +void filewrite(char* filename, char* data) +{ + struct file *filp; + mm_segment_t fs; + filp = filp_open(filename, O_RDWR|O_APPEND|O_CREAT, 0644); + if(IS_ERR(filp)) + { + printk("<0>""open file error...\n"); + return; + } + + fs=get_fs(); + set_fs(KERNEL_DS); + filp->f_op->write(filp, data, strlen(data),&filp->f_pos); + set_fs(fs); + filp_close(filp,NULL); +} + +void enum_time_log(char *log) +{ + struct timex txc; + struct rtc_time tm; + char time_str[64]; + int ret = 0; + + do_gettimeofday(&(txc.time)); + rtc_time_to_tm(txc.time.tv_sec,&tm); + memset(time_str, 0x0, 64); + ret = sprintf(time_str, "UTC time:%d-%d-%d %d:%d:%d ", + tm.tm_year+1900, tm.tm_mon, tm.tm_mday, tm.tm_hour, tm.tm_min, tm.tm_sec); + + filewrite(enum_log, time_str); + filewrite(enum_log, log); +} + +void enum_notime_log(char *log) +{ + filewrite(enum_log, log); +} +#else +void enum_time_log(char *log) +{ + return; +} +void enum_notime_log(char *log) +{ + return; +} +#endif + + +static void __iomem *g_fpga_pcie_mem_base = NULL; + +int g_fpga_pcie_debug = 0; +int g_fpga_pcie_error = 0; +int g_fpga_pcie_reset_en = 0; +int ocore_ctl_startbus = 1; +int ocore_ctl_numbers = 14; +module_param(g_fpga_pcie_reset_en, int, S_IRUGO | S_IWUSR); +module_param(g_fpga_pcie_debug, int, S_IRUGO | S_IWUSR); +module_param(g_fpga_pcie_error, int, S_IRUGO | S_IWUSR); +module_param(ocore_ctl_startbus, int, S_IRUGO | S_IWUSR); +module_param(ocore_ctl_numbers, int, S_IRUGO | S_IWUSR); + + +#define FPGA_PCIE_DEBUG_VERBOSE(fmt, args...) do { \ + if (g_fpga_pcie_debug) { \ + printk(KERN_ERR "[FPGA_PCIE][VER][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \ + } \ +} while (0) + +#define FPGA_PCIE_DEBUG_ERROR(fmt, args...) do { \ + if (g_fpga_pcie_error) { \ + printk(KERN_ERR "[FPGA_PCIE][ERR][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \ + } \ +} while (0) + +#define FPGA_MSI_IRQ_NUM (ocore_ctl_numbers) +#define FPGA_MSI_IRQ_BEGIN (0) +#define FPGA_MSI_IRQ_END ((FPGA_MSI_IRQ_BEGIN) + (FPGA_MSI_IRQ_NUM)) +#define FPGA_I2C_OCORE_START_BASE (0x800) +#define FPGA_I2C_OCORE_END_BASE (0x81f) +#define FPGA_I2C_OCORE_CTRL_SIZE (0x20) +#define FPGA_I2C_OCORE_CTRL_START(id) ((FPGA_I2C_OCORE_START_BASE) + (id) * (FPGA_I2C_OCORE_CTRL_SIZE)) +#define FPGA_I2C_OCORE_CTRL_END(id) ((FPGA_I2C_OCORE_END_BASE) + (id) * (FPGA_I2C_OCORE_CTRL_SIZE)) +#define FPGA_I2C_OCORE_CTRL_IRQ(id) (id) + + +#define DEFINE_FPGA_PCIE_OCORE_DATA(_id) \ + static struct rg_ocores_i2c_platform_data rg_i2c_ocore_pdata_##_id = { \ + .reg_shift = 0, \ + .reg_io_width = 4, \ + .clock_khz = 125000, \ + .num_devices = 0, \ + }; + +DEFINE_FPGA_PCIE_OCORE_DATA(0); +DEFINE_FPGA_PCIE_OCORE_DATA(1); +DEFINE_FPGA_PCIE_OCORE_DATA(2); +DEFINE_FPGA_PCIE_OCORE_DATA(3); +DEFINE_FPGA_PCIE_OCORE_DATA(4); +DEFINE_FPGA_PCIE_OCORE_DATA(5); +DEFINE_FPGA_PCIE_OCORE_DATA(6); +DEFINE_FPGA_PCIE_OCORE_DATA(7); +DEFINE_FPGA_PCIE_OCORE_DATA(8); +DEFINE_FPGA_PCIE_OCORE_DATA(9); +DEFINE_FPGA_PCIE_OCORE_DATA(10); +DEFINE_FPGA_PCIE_OCORE_DATA(11); +DEFINE_FPGA_PCIE_OCORE_DATA(12); +DEFINE_FPGA_PCIE_OCORE_DATA(13); +DEFINE_FPGA_PCIE_OCORE_DATA(14); +DEFINE_FPGA_PCIE_OCORE_DATA(15); +DEFINE_FPGA_PCIE_OCORE_DATA(16); +DEFINE_FPGA_PCIE_OCORE_DATA(17); +DEFINE_FPGA_PCIE_OCORE_DATA(18); +DEFINE_FPGA_PCIE_OCORE_DATA(19); +DEFINE_FPGA_PCIE_OCORE_DATA(20); +DEFINE_FPGA_PCIE_OCORE_DATA(21); +DEFINE_FPGA_PCIE_OCORE_DATA(22); +DEFINE_FPGA_PCIE_OCORE_DATA(23); +DEFINE_FPGA_PCIE_OCORE_DATA(24); +DEFINE_FPGA_PCIE_OCORE_DATA(25); +DEFINE_FPGA_PCIE_OCORE_DATA(26); +DEFINE_FPGA_PCIE_OCORE_DATA(27); + +#define DEFINE_FPGA_PCIE_I2C_OCORE_RESOURCES(_id) \ + static const struct resource fpga_pcie_i2c_ocores_resources_##_id[] = { \ + { \ + .start = FPGA_I2C_OCORE_CTRL_START(_id), \ + .end = FPGA_I2C_OCORE_CTRL_END(_id), \ + .flags = IORESOURCE_MEM, \ + }, \ + { \ + .start = FPGA_I2C_OCORE_CTRL_IRQ(_id), \ + .end = FPGA_I2C_OCORE_CTRL_IRQ(_id), \ + .flags = IORESOURCE_IRQ, \ + }, \ + } + +DEFINE_FPGA_PCIE_I2C_OCORE_RESOURCES(0); +DEFINE_FPGA_PCIE_I2C_OCORE_RESOURCES(1); +DEFINE_FPGA_PCIE_I2C_OCORE_RESOURCES(2); +DEFINE_FPGA_PCIE_I2C_OCORE_RESOURCES(3); +DEFINE_FPGA_PCIE_I2C_OCORE_RESOURCES(4); +DEFINE_FPGA_PCIE_I2C_OCORE_RESOURCES(5); +DEFINE_FPGA_PCIE_I2C_OCORE_RESOURCES(6); +DEFINE_FPGA_PCIE_I2C_OCORE_RESOURCES(7); +DEFINE_FPGA_PCIE_I2C_OCORE_RESOURCES(8); +DEFINE_FPGA_PCIE_I2C_OCORE_RESOURCES(9); +DEFINE_FPGA_PCIE_I2C_OCORE_RESOURCES(10); +DEFINE_FPGA_PCIE_I2C_OCORE_RESOURCES(11); +DEFINE_FPGA_PCIE_I2C_OCORE_RESOURCES(12); +DEFINE_FPGA_PCIE_I2C_OCORE_RESOURCES(13); +DEFINE_FPGA_PCIE_I2C_OCORE_RESOURCES(14); +DEFINE_FPGA_PCIE_I2C_OCORE_RESOURCES(15); +DEFINE_FPGA_PCIE_I2C_OCORE_RESOURCES(16); +DEFINE_FPGA_PCIE_I2C_OCORE_RESOURCES(17); +DEFINE_FPGA_PCIE_I2C_OCORE_RESOURCES(18); +DEFINE_FPGA_PCIE_I2C_OCORE_RESOURCES(19); +DEFINE_FPGA_PCIE_I2C_OCORE_RESOURCES(20); +DEFINE_FPGA_PCIE_I2C_OCORE_RESOURCES(21); +DEFINE_FPGA_PCIE_I2C_OCORE_RESOURCES(22); +DEFINE_FPGA_PCIE_I2C_OCORE_RESOURCES(23); +DEFINE_FPGA_PCIE_I2C_OCORE_RESOURCES(24); +DEFINE_FPGA_PCIE_I2C_OCORE_RESOURCES(25); +DEFINE_FPGA_PCIE_I2C_OCORE_RESOURCES(26); +DEFINE_FPGA_PCIE_I2C_OCORE_RESOURCES(27); + +#define DEFINE_FPGA_PCIE_MFD_CELL_CFG(_id) \ +{ \ + .name = "rg-i2c-ocores", \ + .id = (_id), \ + .num_resources = ARRAY_SIZE(fpga_pcie_i2c_ocores_resources_##_id), \ + .resources = fpga_pcie_i2c_ocores_resources_##_id, \ + .platform_data = &rg_i2c_ocore_pdata_##_id, \ + .pdata_size = sizeof(rg_i2c_ocore_pdata_##_id), \ +} + + +static const struct mfd_cell fpga_pcie_cells_bar0_cfg0[] = { + DEFINE_FPGA_PCIE_MFD_CELL_CFG(0), + DEFINE_FPGA_PCIE_MFD_CELL_CFG(1), + DEFINE_FPGA_PCIE_MFD_CELL_CFG(2), + DEFINE_FPGA_PCIE_MFD_CELL_CFG(3), + DEFINE_FPGA_PCIE_MFD_CELL_CFG(4), + DEFINE_FPGA_PCIE_MFD_CELL_CFG(5), + DEFINE_FPGA_PCIE_MFD_CELL_CFG(6), + DEFINE_FPGA_PCIE_MFD_CELL_CFG(7), + DEFINE_FPGA_PCIE_MFD_CELL_CFG(8), + DEFINE_FPGA_PCIE_MFD_CELL_CFG(9), + DEFINE_FPGA_PCIE_MFD_CELL_CFG(10), + DEFINE_FPGA_PCIE_MFD_CELL_CFG(11), + DEFINE_FPGA_PCIE_MFD_CELL_CFG(12), + DEFINE_FPGA_PCIE_MFD_CELL_CFG(13), + DEFINE_FPGA_PCIE_MFD_CELL_CFG(14), + DEFINE_FPGA_PCIE_MFD_CELL_CFG(15), + DEFINE_FPGA_PCIE_MFD_CELL_CFG(16), + DEFINE_FPGA_PCIE_MFD_CELL_CFG(17), + DEFINE_FPGA_PCIE_MFD_CELL_CFG(18), + DEFINE_FPGA_PCIE_MFD_CELL_CFG(19), + DEFINE_FPGA_PCIE_MFD_CELL_CFG(20), + DEFINE_FPGA_PCIE_MFD_CELL_CFG(21), + DEFINE_FPGA_PCIE_MFD_CELL_CFG(22), + DEFINE_FPGA_PCIE_MFD_CELL_CFG(23), + DEFINE_FPGA_PCIE_MFD_CELL_CFG(24), + DEFINE_FPGA_PCIE_MFD_CELL_CFG(25), + DEFINE_FPGA_PCIE_MFD_CELL_CFG(26), + DEFINE_FPGA_PCIE_MFD_CELL_CFG(27), +}; + +struct rgde_dev { + struct uio_info info; + struct pci_dev *pdev; + struct list_head list; + enum xdk_intr_mode mode; +}; + +#if LINUX_VERSION_CODE < KERNEL_VERSION(4,0,36) +/* XXX taken from uio.c, just for dumping */ +struct uio_device { + struct module *owner; + struct device *dev; + int minor; + atomic_t event; + struct fasync_struct *async_queue; + wait_queue_head_t wait; + struct uio_info *info; + struct kobject *map_dir; + struct kobject *portio_dir; +}; +#else +/* do noting add tjm */ +#endif + + +static char *intr_mode; +static enum xdk_intr_mode intr_mode_preferred = XDK_INTR_MODE_MSIX; + + +static struct list_head rgde_dev_que; + +static int rgde_dev_list_dump(void) +{ + char str[256]; + struct rgde_dev *node, *tmp; + struct uio_device *udev; + + list_for_each_entry_safe(node, tmp, &rgde_dev_que, list) { + udev = node->info.uio_dev; + memset(str, 0x0, 256); + sprintf(str, "pciuio device minor:%d\n", udev->minor); + enum_notime_log(str); + } + return 0; +} + +void rgde_dev_que_add(struct rgde_dev *uiodev) +{ + struct rgde_dev *node, *tmp; + + if (uiodev == NULL) { + return; + } + + if (list_empty(&rgde_dev_que)) { + list_add(&uiodev->list, &rgde_dev_que); + return; + } + + list_for_each_entry_safe(node, tmp, &rgde_dev_que, list) { + if (((node->info).uio_dev)->minor > ((uiodev->info).uio_dev)->minor) { + break; + } + } + list_add_tail(&uiodev->list, &node->list); + + return; +} + + +void rgde_dev_que_del(struct rgde_dev *uiodev) +{ + struct rgde_dev *node, *tmp; + + if (uiodev == NULL) { + return; + } + + list_for_each_entry_safe(node, tmp, &rgde_dev_que, list) { + if (((node->info).uio_dev)->minor == ((uiodev->info).uio_dev)->minor) { + list_del(&node->list); + break; + } + } + + return; +} + + +struct pci_dev *rgde_to_pci_device(int minor) +{ + + struct rgde_dev *node, *tmp; + + list_for_each_entry_safe(node, tmp, &rgde_dev_que, list) { + if (node->info.uio_dev->minor == minor) { + return node->pdev; + } + + if (node->info.uio_dev->minor < minor) { + return NULL; + } + } + + return NULL; +} +EXPORT_SYMBOL(rgde_to_pci_device); + +int pkt_get_mod(int logic_dev, int *mod) +{ + *mod = 0; + return 0; +} +EXPORT_SYMBOL(pkt_get_mod); + +int pkt_get_port(int logic_dev, int *port) +{ + *port = 1; + return 0; +} +EXPORT_SYMBOL(pkt_get_port); + +static int rgde_intr_mode_config(char *intr_str) +{ +#if 0 + /* default intr mode : msix */ + if (!intr_str) { + return 0; + } + + if (!strcmp(intr_str, INTR_MODE_MSIX_NAME)) { + intr_mode_preferred = XDK_INTR_MODE_MSIX; + return 0; + } + + if (!strcmp(intr_str, INTR_MODE_LEGACY_NAME)) { + intr_mode_preferred = XDK_INTR_MODE_LEGACY; + return 0; + } + + /* For now, msix & legacy mode supported only. */ + printk("<0>""Error: bad parameter - %s\n", intr_str); + return -EINVAL; +#else + intr_mode_preferred = XDK_INTR_MODE_LEGACY; + return 0; +#endif +} + +/* Remap pci resources described by bar #pci_bar in uio resource n. */ +static int rgde_setup_iomem(struct pci_dev *dev, struct uio_info *info, + int n, int pci_bar, const char *name) +{ + unsigned long addr, len; + void *internal_addr; + + if (n >= ARRAY_SIZE(info->mem)) { + return -EINVAL; + } + + addr = pci_resource_start(dev, pci_bar); + FPGA_PCIE_DEBUG_VERBOSE("iomem phys addr:%lx\n", addr); + len = pci_resource_len(dev, pci_bar); + if (addr == 0 || len == 0) { + return -1; + } + + + internal_addr = ioremap(addr, len); + FPGA_PCIE_DEBUG_VERBOSE("iomem phys addr:0x%lx, len 0x%lx, internal_addr %p.\n", addr, len, internal_addr); + + if (internal_addr == NULL) { + return -1; + } + + FPGA_PCIE_DEBUG_VERBOSE("iomem internal_addr:%p\n", internal_addr); + if (pci_bar == 0) { + + g_fpga_pcie_mem_base = internal_addr; + FPGA_PCIE_DEBUG_VERBOSE("pci_bar %d, set g_fpga_pcie_mem_base %p\n", pci_bar, g_fpga_pcie_mem_base); + } + info->mem[n].name = name; + info->mem[n].addr = addr; + info->mem[n].internal_addr = internal_addr; + info->mem[n].size = len; + info->mem[n].memtype = UIO_MEM_PHYS; + + return 0; +} + +/* Unmap previously ioremap'd resources */ +static void rgde_release_iomem(struct uio_info *info) +{ + int i; + + for (i = 0; i < MAX_UIO_MAPS; i++) { + if (info->mem[i].internal_addr) { + iounmap(info->mem[i].internal_addr); + } + } +} + +/* Get pci port io resources described by bar #pci_bar in uio resource n. */ +static int rgde_setup_ioport(struct pci_dev *dev, struct uio_info *info, + int n, int pci_bar, const char *name) +{ + unsigned long addr, len; + + if (n >= ARRAY_SIZE(info->port)) { + return -EINVAL; + } + + addr = pci_resource_start(dev, pci_bar); + len = pci_resource_len(dev, pci_bar); + if (addr == 0 || len == 0) { + return -EINVAL; + } + + info->port[n].name = name; + info->port[n].start = addr; + info->port[n].size = len; + /* skl : FIX me */ + info->port[n].porttype = UIO_PORT_X86; + + return 0; +} + +static int rgde_setup_bars(struct pci_dev *dev, struct uio_info *info) +{ + int i, iom, iop, ret; + unsigned long flags; + static const char *bar_names[PCI_STD_RESOURCE_END + 1] = { + "BAR0", "BAR1", "BAR2", "BAR3", "BAR4", "BAR5", + }; + iom = 0; + iop = 0; + + for (i = 0; i < ARRAY_SIZE(bar_names); i++) { + if (pci_resource_len(dev, i) != 0 && pci_resource_start(dev, i) != 0) { + + flags = pci_resource_flags(dev, i); + FPGA_PCIE_DEBUG_VERBOSE("flags:%lx\n", flags); + if (flags & IORESOURCE_MEM) { + ret = rgde_setup_iomem(dev, info, iom, i, bar_names[i]); + if (ret != 0) { + return ret; + } + iom++; + } else if (flags & IORESOURCE_IO) { + ret = rgde_setup_ioport(dev, info, iop, i, bar_names[i]); + if (ret != 0) { + return ret; + } + iop++; + } + } + } + + return (iom != 0 || iop != 0) ? ret : -ENOENT; +} + +/** + * This is interrupt handler which will check if the interrupt is for the right device. + * If yes, disable it here and will be enable later. + */ +static irqreturn_t rgde_irqhandler(int irq, struct uio_info *info) +{ + struct rgde_dev *udev = info->priv; + + if (udev->mode == XDK_INTR_MODE_LEGACY /*&& !pci_check_and_mask_intx(udev->pdev)*/) { + return IRQ_NONE; + } + + return IRQ_HANDLED; +} + +/* + * It masks the msix on/off of generating MSI-X messages. + */ +static void rgde_msix_mask_irq(struct msi_desc *desc, int32_t state) +{ + u32 mask_bits = desc->masked; + unsigned offset = desc->msi_attrib.entry_nr * PCI_MSIX_ENTRY_SIZE + + PCI_MSIX_ENTRY_VECTOR_CTRL; + + if (state != 0) { + mask_bits &= ~PCI_MSIX_ENTRY_CTRL_MASKBIT; + } else { + mask_bits |= PCI_MSIX_ENTRY_CTRL_MASKBIT; + } + + if (mask_bits != desc->masked) { + writel(mask_bits, desc->mask_base + offset); + readl(desc->mask_base); + desc->masked = mask_bits; + } +} + +/** + * This is the irqcontrol callback to be registered to uio_info. + * It can be used to disable/enable interrupt from user space processes. + * + * @param info + * pointer to uio_info. + * @param irq_state + * state value. 1 to enable interrupt, 0 to disable interrupt. + * + * @return + * - On success, 0. + * - On failure, a negative value. + */ +static int rgde_irqcontrol(struct uio_info *info, s32 irq_state) +{ + struct rgde_dev *udev = info->priv; + struct pci_dev *pdev = udev->pdev; + + /* pci_cfg_access_lock(pdev); */ + + if (udev->mode == XDK_INTR_MODE_LEGACY) { + pci_intx(pdev, !!irq_state); + } else if (udev->mode == XDK_INTR_MODE_MSIX) { + struct msi_desc *desc; +#if (LINUX_VERSION_CODE < KERNEL_VERSION(4, 3, 0)) + list_for_each_entry(desc, &pdev->msi_list, list) { + rgde_msix_mask_irq(desc, irq_state); + } +#else + list_for_each_entry(desc, &pdev->dev.msi_list, list) { + rgde_msix_mask_irq(desc, irq_state); + } +#endif + } + + //pci_cfg_access_unlock(pdev); + + return 0; +} + +int rgde_reg32_read(int minor, uint64_t offset, uint32_t *data) +{ + struct rgde_dev *node, *tmp; + struct rgde_dev *uiodev; + + FPGA_PCIE_DEBUG_VERBOSE("enter rgde_reg32_read\n"); + uiodev = NULL; + list_for_each_entry_safe(node, tmp, &rgde_dev_que, list) { + if (((node->info).uio_dev)->minor == minor) { + uiodev = node; + break; + } + } + + if (uiodev == NULL) { + return -1; + } + + if (uiodev->info.mem[0].internal_addr == NULL) { + return -1; + } + +#if 0 + FPGA_PCIE_DEBUG_VERBOSE("internal_addr:%x\n", uiodev->info.mem[0].internal_addr); + + memcpy(ioval, (uint8_t *)uiodev->info.mem[0].internal_addr + offset, sizeof(ioval)); + for (i = 0; i < sizeof(ioval); i++) { + FPGA_PCIE_DEBUG_VERBOSE("mem[%x]:%02x\n", (uint32_t)(offset + i), ioval[i]); + } +#endif + + *data = (*((uint32_t *)((uint8_t *)(uiodev->info.mem[0].internal_addr) + offset))); + return 0; +} +EXPORT_SYMBOL(rgde_reg32_read); + +int rgde_reg32_write(int minor, uint64_t offset, uint32_t data) +{ + struct rgde_dev *node, *tmp; + struct rgde_dev *uiodev; + + uiodev = NULL; + list_for_each_entry_safe(node, tmp, &rgde_dev_que, list) { + if (((node->info).uio_dev)->minor == minor) { + uiodev = node; + break; + } + } + + if (uiodev == NULL) { + return -1; + } + + if (uiodev->info.mem[0].internal_addr == NULL) { + return -1; + } + + FPGA_PCIE_DEBUG_VERBOSE("enter rgde_reg32_write\n"); + FPGA_PCIE_DEBUG_VERBOSE("internal_addr:%p,offset:%llx,data:%x\n", uiodev->info.mem[0].internal_addr, offset, data); + + *((uint32_t *)((uint8_t *)(uiodev->info.mem[0].internal_addr) + offset)) = (data); + FPGA_PCIE_DEBUG_VERBOSE("rgde_reg32_write ok!\n"); + return 0; +} +EXPORT_SYMBOL(rgde_reg32_write); + +#if 0 +static void rgde_dump_global_regs(int minor) +{ + struct rgde_dev *node, *tmp; + struct rgde_dev *uiodev; + uint8_t ioval[4]; + int i, j; + + + uiodev = NULL; + list_for_each_entry_safe(node, tmp, &rgde_dev_que, list) { + if (((node->info).uio_dev)->minor == minor) { + uiodev = node; + break; + } + } + + if (uiodev == NULL) { + return ; + } + + if (uiodev->info.mem[0].internal_addr == NULL) { + return ; + } + + FPGA_PCIE_DEBUG_VERBOSE("internal_addr:%p\n", uiodev->info.mem[0].internal_addr); + for (j = 0; j < sizeof(uint32_t) * 6; j += sizeof(uint32_t)) { + memcpy(ioval, (uint8_t *)uiodev->info.mem[0].internal_addr + j, sizeof(ioval)); + for (i = 0; i < sizeof(ioval); i++) { + FPGA_PCIE_DEBUG_VERBOSE("mem[%d]:%02x\n", (uint32_t)(j + i), ioval[i]); + } + } + + return; +} +#endif + +#if 1 + +#define FPGA_PCIE_TEST_REG (0x08) +#define FPGA_PCIE_TEST_VAL (0x5A) + +#define FPGA_PCIE_RESET_PCA9548_BASE (0x20) +#define FPGA_PCIE_RESET_PCA9548_NUM (0x4) +#define FPGA_PCIE_RESET_OCORE_BASE (0x100) +#define FPGA_PCIE_RESET_OCORE_NUM (ocore_ctl_numbers) + +#define FPGA_PCIE_RESET_CPLD_I2C_BASE (0x40) +#define FPGA_PCIE_RESET_CPLD_I2C_NUM (0x4) + + +#define FPGA_PCIE_REG_STEP (0x4) + +#define DFD_CPLD_I2C_RETRY_TIMES 3 +#define DFD_CPLD_I2C_RETRY_DELAY 100 /* ms */ + +#define PCA9548_MAX_CPLD_NUM (32) + +typedef struct fpga_pcie_pca9548_cfg_info_s { + int pca9548_bus; + int pca9548_addr; + int cfg_offset; +} fpga_pcie_pca9548_cfg_info_t; + +typedef struct fpga_pcie_card_info_s { + int dev_type; + fpga_pcie_pca9548_cfg_info_t pca9548_cfg_info[PCA9548_MAX_CPLD_NUM]; +} fpga_pcie_card_info_t; + +static fpga_pcie_card_info_t g_fpga_pcie_card_info[] = { + { + /* RA-B6510-32C */ + .dev_type = 0x404b, + .pca9548_cfg_info = { + { + .pca9548_bus = 12, + .pca9548_addr = 0x70, + .cfg_offset = 0x20, + }, + { + .pca9548_bus = 12, + .pca9548_addr = 0x71, + .cfg_offset = 0x20, + }, + { + .pca9548_bus = 12, + .pca9548_addr = 0x72, + .cfg_offset = 0x20, + }, + { + .pca9548_bus = 12, + .pca9548_addr = 0x73, + .cfg_offset = 0x20, + }, + }, + }, +}; + +extern void pca954x_hw_do_reset_func_register(void* func); +extern int dfd_get_my_card_type(void); + +static void fpga_pcie_setreg_32(int offset, u32 data) +{ + if (g_fpga_pcie_mem_base) { + *((uint32_t *)((uint8_t *)(g_fpga_pcie_mem_base) + offset)) = (data); + } else { + FPGA_PCIE_DEBUG_ERROR("g_fpga_pcie_mem_base is null.\n"); + } + return; +} + + +static inline u32 fpga_pcie_getreg_32(int offset) +{ + u32 data = 0; + + if (g_fpga_pcie_mem_base) { + data = (*((uint32_t *)((uint8_t *)(g_fpga_pcie_mem_base) + offset))); + } else { + FPGA_PCIE_DEBUG_ERROR("g_fpga_pcie_mem_base is null.\n"); + } + return data; +} + +static void fpga_do_cpld_i2c_ctrl(int en) +{ +#if 0 + int i; + int offset; + + for (i = 0; i < FPGA_PCIE_RESET_CPLD_I2C_NUM; i++) { + offset = FPGA_PCIE_RESET_CPLD_I2C_BASE + i * FPGA_PCIE_REG_STEP; + FPGA_PCIE_DEBUG_VERBOSE("offset 0x%x, write en 0x%x.\n", offset, en); + fpga_pcie_setreg_32(offset, en); + } +#endif + return; +} + + +static void fpga_do_ocore_ctrl(int en) +{ + int i; + int offset; + + for (i = 0; i < FPGA_PCIE_RESET_OCORE_NUM; i++) { + offset = FPGA_PCIE_RESET_OCORE_BASE + i * FPGA_PCIE_REG_STEP; + FPGA_PCIE_DEBUG_VERBOSE("offset 0x%x, write en 0x%x.\n", offset, en); + fpga_pcie_setreg_32(offset, en); + } +} + +static void fpga_do_9548_ctrl(int en) +{ + int i; + int offset; + + for (i = 0; i < FPGA_PCIE_RESET_PCA9548_NUM; i++) { + offset = FPGA_PCIE_RESET_PCA9548_BASE + i * FPGA_PCIE_REG_STEP; + FPGA_PCIE_DEBUG_VERBOSE("offset 0x%x, write en 0x%x.\n", offset, en); + fpga_pcie_setreg_32(offset, en); + } + +} + +static void fpga_reset_ocore_i2c(void) +{ + u32 data; + + + if (g_fpga_pcie_reset_en == 0) { + FPGA_PCIE_DEBUG_VERBOSE("g_fpga_pcie_reset_en is 0, do nothing.\n"); + return; + } + + data = fpga_pcie_getreg_32(FPGA_PCIE_TEST_REG); + FPGA_PCIE_DEBUG_VERBOSE("BEGIN FPGA_PCIE_TEST_REG=[0x%x], write 0x%x.\n", data, FPGA_PCIE_TEST_VAL); + fpga_pcie_setreg_32(FPGA_PCIE_TEST_REG, FPGA_PCIE_TEST_VAL); + data = fpga_pcie_getreg_32(FPGA_PCIE_TEST_REG); + FPGA_PCIE_DEBUG_VERBOSE("END FPGA_PCIE_TEST_REG=[0x%x].\n", data); + + + + fpga_do_9548_ctrl(0); + fpga_do_ocore_ctrl(0); + fpga_do_cpld_i2c_ctrl(0); + + mdelay(500); + + + fpga_do_9548_ctrl(1); + fpga_do_ocore_ctrl(1); + fpga_do_cpld_i2c_ctrl(1); + + return; +} + +static void fpga_do_pca9548_reset_ctrl(int offset, int en) +{ + FPGA_PCIE_DEBUG_VERBOSE("offset 0x%x, write en 0x%x.\n", offset, en); + fpga_pcie_setreg_32(offset, en); +} + +fpga_pcie_card_info_t* fpga_pcie_get_card_info(int dev_type) +{ + int i; + int size; + + size = ARRAY_SIZE(g_fpga_pcie_card_info); + + FPGA_PCIE_DEBUG_VERBOSE("Enter dev_type 0x%x size %d.\n", dev_type, size); + for (i = 0; i < size; i++) { + if (g_fpga_pcie_card_info[i].dev_type == dev_type) { + FPGA_PCIE_DEBUG_VERBOSE("match dev_type 0x%x.\n", dev_type); + return &g_fpga_pcie_card_info[i]; + } + } + + FPGA_PCIE_DEBUG_VERBOSE("dismatch dev_type 0x%x.\n", dev_type); + return NULL; +} + +fpga_pcie_pca9548_cfg_info_t* fpga_pcie_get_pca9548_cfg_info(int bus, int addr) +{ + int dev_type; + fpga_pcie_card_info_t *info; + fpga_pcie_pca9548_cfg_info_t *pca9548_cfg_info; + int i; + int size; + + dev_type = dfd_get_my_card_type(); + if (dev_type < 0) { + FPGA_PCIE_DEBUG_ERROR("drv_get_my_dev_type failed ret %d.\n", dev_type); + return NULL; + } + + info = fpga_pcie_get_card_info(dev_type); + if (info == NULL) { + FPGA_PCIE_DEBUG_ERROR("fpga_pcie_get_card_info dev_type %d failed.\n", dev_type); + return NULL; + } + + size = PCA9548_MAX_CPLD_NUM; + for (i = 0; i < size; i++) { + pca9548_cfg_info = &(info->pca9548_cfg_info[i]); + if ((pca9548_cfg_info->pca9548_bus == bus) && (pca9548_cfg_info->pca9548_addr == addr)) { + FPGA_PCIE_DEBUG_VERBOSE("match dev_type 0x%x bus %d addr 0x%x.\n", dev_type, bus, addr); + return pca9548_cfg_info; + } + } + + FPGA_PCIE_DEBUG_VERBOSE("dismatch dev_type 0x%x bus %d addr 0x%x.\n", dev_type, bus, addr); + return NULL; +} + + +void fpga_do_pca954x_reset_func(int bus, int addr) +{ + fpga_pcie_pca9548_cfg_info_t *cfg_info; + + cfg_info = fpga_pcie_get_pca9548_cfg_info(bus, addr); + if (cfg_info == NULL) { + FPGA_PCIE_DEBUG_VERBOSE("fpga_do_pca954x_reset_func do nothing.\n"); + return; + } + + FPGA_PCIE_DEBUG_VERBOSE("bus %d addr 0x%x, cfg_info.offset:0x%x.\n", bus, addr, cfg_info->cfg_offset); + + fpga_do_pca9548_reset_ctrl(cfg_info->cfg_offset, 0); + mdelay(250); + fpga_do_pca9548_reset_ctrl(cfg_info->cfg_offset, 1); +} + +static void fpga_do_pca954x_reset_func_reg(void) +{ + pca954x_hw_do_reset_func_register(fpga_do_pca954x_reset_func); +} + +#endif + + +static int fpga_i2c_ocore_device_init(struct pci_dev *pdev, const struct pci_device_id *id) +{ + int ret, index; + struct rg_ocores_i2c_platform_data *init_nr_ocores; + + for (index = 0 ; index < ARRAY_SIZE(fpga_pcie_cells_bar0_cfg0); index++) { + init_nr_ocores = fpga_pcie_cells_bar0_cfg0[index].platform_data; + init_nr_ocores->nr = ocore_ctl_startbus + index; + } + FPGA_PCIE_DEBUG_VERBOSE("Enter.\n"); + FPGA_PCIE_DEBUG_VERBOSE("Begin mfd_add_devices.\n"); + ret = mfd_add_devices(&pdev->dev, 0, + fpga_pcie_cells_bar0_cfg0, + ocore_ctl_numbers > ARRAY_SIZE(fpga_pcie_cells_bar0_cfg0) ? ARRAY_SIZE(fpga_pcie_cells_bar0_cfg0) : ocore_ctl_numbers , + &pdev->resource[0], pdev->irq, NULL); + FPGA_PCIE_DEBUG_VERBOSE("End mfd_add_devices ret %d.\n", ret); + if (ret) { + dev_err(&pdev->dev, "mfd_add_devices failed: %d\n", ret); + return -1; + } + + fpga_do_pca954x_reset_func_reg(); + FPGA_PCIE_DEBUG_VERBOSE("Call fpga_do_pca954x_reset_func_reg.\n"); + return 0; +} + +static void fpga_pcie_recover(struct pci_dev *pdev, const struct pci_device_id *id) +{ + struct resource *mem_base; + u32 bar0_val; + int ret; + + mem_base = &pdev->resource[0]; + ret = pci_read_config_dword(pdev, PCI_BASE_ADDRESS_0, &bar0_val); + if (ret) { + FPGA_PCIE_DEBUG_ERROR("pci_read_config_dword failed ret %d.\n", ret); + return; + } + FPGA_PCIE_DEBUG_VERBOSE("mem_base->start[0x%llx], bar0_val[0x%x], ret %d.\n", + mem_base->start, bar0_val, ret); + + if (bar0_val != mem_base->start) { + ret = pci_write_config_dword(pdev, PCI_BASE_ADDRESS_0, mem_base->start); + if (ret) { + FPGA_PCIE_DEBUG_ERROR("pci_write_config_dword mem_base->start[0x%llx], failed ret %d.\n", mem_base->start, ret); + return; + } + FPGA_PCIE_DEBUG_VERBOSE("pci_write_config_dword mem_base->start[0x%llx] success.\n", mem_base->start); + } else { + FPGA_PCIE_DEBUG_VERBOSE("mem_base->start[0x%llx], bar0_val[0x%x], do nothing.\n", + mem_base->start, bar0_val); + } +} + +static int fpga_pcie_probe(struct pci_dev *pdev, const struct pci_device_id *id) +{ + int err; + struct rgde_dev *rdev = NULL; + + FPGA_PCIE_DEBUG_VERBOSE("Enter vendor 0x%x, subsystem_vendor 0x%x.\n", pdev->vendor, pdev->subsystem_vendor); + + /* skl : FIX me */ + /* + if ((pdev->vendor != ) || (pdev->subsystem_vendor != )) { + err = -ENODEV; + goto dev_suppport_err:; + }*/ + + + fpga_pcie_recover(pdev, id); + + /* enable device: ask low-level code to enable I/O and memory */ + FPGA_PCIE_DEBUG_VERBOSE("start pci_enable_device!\n"); + err = pci_enable_device(pdev); + if (err) { + FPGA_PCIE_DEBUG_ERROR("pci_enable_device failed: %d\n", err); + goto dev_ebable_err; + } + + FPGA_PCIE_DEBUG_VERBOSE("start pci_set_master!\n"); + pci_set_master(pdev); + + rdev = kzalloc(sizeof(struct rgde_dev), GFP_KERNEL); + if (!rdev) { + err = -ENOMEM; + goto kzalloc_err; + } + + + FPGA_PCIE_DEBUG_VERBOSE("start rgde_setup_bars!\n"); + err = rgde_setup_bars(pdev, &rdev->info); + if (err != 0) { + goto setup_bars_err; + } + + rdev->info.name = "fpga_pcie"; + rdev->info.version = "0.1"; + rdev->info.handler = rgde_irqhandler; + rdev->info.irqcontrol = rgde_irqcontrol; + rdev->info.priv = rdev; + rdev->pdev = pdev; + +#if LINUX_VERSION_CODE >= KERNEL_VERSION(4, 11, 0) + err = pci_alloc_irq_vectors(pdev,FPGA_MSI_IRQ_BEGIN + 1, ocore_ctl_numbers, PCI_IRQ_MSI); +#else + err = pci_enable_msi_range(pdev, FPGA_MSI_IRQ_BEGIN + 1, ocore_ctl_numbers); +#endif + if (err != ocore_ctl_numbers) { + FPGA_PCIE_DEBUG_ERROR("pci_enable_msi_block err %d FPGA_MSI_IRQ_NUM %d.\n", err, + ocore_ctl_numbers); + goto uio_register_err; + } + + FPGA_PCIE_DEBUG_VERBOSE("before pci_set_drvdata.\n"); + + pci_set_drvdata(pdev, rdev); + FPGA_PCIE_DEBUG_VERBOSE("after pci_set_drvdata.\n"); + enum_time_log("rgde_dev_que_add\n"); + + mdelay(100); + + fpga_reset_ocore_i2c(); + + fpga_i2c_ocore_device_init(pdev, id); + return 0; + +uio_register_err: + /* udev_irq_err: */ +setup_bars_err: + rgde_release_iomem(&rdev->info); + pci_disable_msi(rdev->pdev); + pci_release_regions(pdev); + kfree(rdev); +kzalloc_err: + /* request_region_err: */ + pci_disable_device(pdev); +dev_ebable_err: + /* dev_suppport_err: */ + return err; +} + +static void fpga_pcie_remove(struct pci_dev *pdev) +{ + struct rgde_dev *rdev = pci_get_drvdata(pdev); + + FPGA_PCIE_DEBUG_VERBOSE("fpga_pcie_remove.\n"); +#if 0 + enum_time_log("rgde_dev_que_del\n"); + printk("<0>""uio device %d del.\n", rdev->info.uio_dev->minor); +#endif + rgde_dev_que_del(rdev); + rgde_dev_list_dump(); +#if 0 + uio_unregister_device(&rdev->info); +#endif + mfd_remove_devices(&pdev->dev); + rgde_release_iomem(&rdev->info); + pci_disable_msi(rdev->pdev); + //pci_release_regions(pdev); + pci_disable_device(pdev); + kfree(rdev); +} + +/* static DEFINE_PCI_DEVICE_TABLE(fpga_pci_ids) = { */ + +static const struct pci_device_id fpga_pci_ids[] = { + { PCI_DEVICE(0x10ee, 0x7022)}, + {0} +}; +MODULE_DEVICE_TABLE(pci, fpga_pci_ids); + + +static struct pci_driver fpga_pcie_driver = { + .name = "fpga_pcie", + .id_table = fpga_pci_ids,/* only dynamic id's */ + .probe = fpga_pcie_probe, + .remove = fpga_pcie_remove, +}; + +static int __init fpga_pcie_init(void) +{ + int ret; + + FPGA_PCIE_DEBUG_VERBOSE("fpga_pcie_init enter!\n"); + ret = rgde_intr_mode_config(intr_mode); + if (ret < 0) { + return ret; + } + + INIT_LIST_HEAD(&rgde_dev_que); + + return pci_register_driver(&fpga_pcie_driver); +} + +static void __exit fpga_pcie_exit(void) +{ + FPGA_PCIE_DEBUG_VERBOSE("fpga_pcie_exit enter!\n"); + pci_unregister_driver(&fpga_pcie_driver); +} + +module_init(fpga_pcie_init); +module_exit(fpga_pcie_exit); +module_param(intr_mode, charp, S_IRUGO); +MODULE_PARM_DESC(intr_mode, + "pci_uio interrupt mode (default=msix):\n" + " " INTR_MODE_MSIX_NAME " Use MSIX interrupt\n" + " " INTR_MODE_LEGACY_NAME " Use Legacy interrupt\n" + "\n"); +MODULE_DESCRIPTION("UIO Driver for PCI Devices"); +MODULE_LICENSE("GPL"); +MODULE_AUTHOR("support "); diff --git a/platform/broadcom/sonic-platform-modules-ragile/common/modules/fpga_pcie_i2c.h b/platform/broadcom/sonic-platform-modules-ragile/common/modules/fpga_pcie_i2c.h new file mode 100755 index 0000000000..1ea970cc22 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ragile/common/modules/fpga_pcie_i2c.h @@ -0,0 +1,107 @@ +#ifndef _FPGA_PCIE_I2C_H_ +#define _FPGA_PCIE_I2C_H_ + +#ifdef __KERNEL__ +#include +#else +#include +#endif + +#define ENUM_MAX_DEVS (255) + +typedef enum { + CHIP_NONE, + CHIP_PC, +} chiptype_t; + +/* bitmap for ports, 256 ports for now. */ +typedef struct portbitmap_s { + uint8_t bit[32]; +} portbitmap_t; + +typedef struct pc_info_s { + uint8_t ntables; /* number of flow tables */ + uint8_t ncores; /* number of cores */ + uint8_t npipelines; /* number of pipelines */ + uint8_t nports; /* number of ports */ + portbitmap_t pbm_caui; /* bitmap for CAUI ports */ + portbitmap_t pbm_ge; /* bitmap for GE ports */ +} pc_info_t; + +/** + * A structure describing a PCI resource. + */ +struct pci_resource { + uint64_t phys_addr; /**< Physical address, 0 if no resource. */ + uint64_t len; /**< Length of the resource. */ + void *addr; /**< Virtual address, NULL when not mapped. */ +}; + +/** Maximum number of PCI resources. */ +#define PCI_MAX_RESOURCE 6 + +/** Nb. of values in PCI resource format. */ +#define PCI_RESOURCE_FMT_NVAL 3 + +#if 0 +/** IO resource type: memory address space */ +#define IORESOURCE_MEM 0x00000200 +#endif + +typedef struct chipinfo_s { + /* PCI ID */ + uint16_t vendor; + uint16_t dev; + uint8_t rev; + + /* chip properties */ + chiptype_t type; + pc_info_t pc_info; /* if type == CHIP_PC */ +} chipinfo_t; + +typedef struct devinfo_s { + /* static info */ + chipinfo_t chipinfo; + + /* running states */ + uint32_t uiono; /* the "X" in /dev/uioX */ + char *pci_conf_file; /* /sys/devices/ */ + char *dev_file; /* /dev/uioX */ + + struct pci_resource mem_resource[PCI_MAX_RESOURCE]; /**< PCI Memory Resource */ + + uint32_t n_mems; /* no of mem-mapped regions, MUST BE 1 for now */ + uint32_t n_ports;/* no of port-maped regions, MUST BE 0 for now */ +} devinfo_t; + + +#ifdef __KERNEL__ +#include + +struct pci_dev *rgde_to_pci_device(int index); + +int rgde_reg32_read(int minor, uint64_t offset, uint32_t *data); + +int rgde_reg32_write(int minor, uint64_t offset, uint32_t data); + +int pkt_get_mod(int logic_dev, int *mod); + +int pkt_get_port(int logic_dev, int *port); + +/* interrupt mode */ +enum xdk_intr_mode { + XDK_INTR_MODE_NONE = 0, + XDK_INTR_MODE_LEGACY, + XDK_INTR_MODE_MSI, + XDK_INTR_MODE_MSIX +}; + +#define INTR_MODE_NONE_NAME "none" +#define INTR_MODE_LEGACY_NAME "legacy" +#define INTR_MODE_MSI_NAME "msi" +#define INTR_MODE_MSIX_NAME "msix" + +#endif /*__KERNEL__ */ + + +#endif /* _FPGA_PCIE_I2C_H_ */ diff --git a/platform/broadcom/sonic-platform-modules-ragile/common/modules/fpga_reg_defs.h b/platform/broadcom/sonic-platform-modules-ragile/common/modules/fpga_reg_defs.h new file mode 100755 index 0000000000..f80c631856 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ragile/common/modules/fpga_reg_defs.h @@ -0,0 +1,174 @@ +#ifndef _FPGA_REG_DEFS_H_ +#define _FPGA_REG_DEFS_H_ + +/** Define Registers */ +/* Global Registers */ +#define RGDE_REG_GLOBAL_BASE 0x00000000 +#define RGDE_REG_VERSION (RGDE_REG_GLOBAL_BASE + 0x00) +#define RGDE_REG_DATE (RGDE_REG_GLOBAL_BASE + 0x04) +#define RGDE_REG_TEST (RGDE_REG_GLOBAL_BASE + 0x08) +#define RGDE_REG_INT_ENABLE (RGDE_REG_GLOBAL_BASE + 0x10) +#define RGDE_REG_INT_STATUS (RGDE_REG_GLOBAL_BASE + 0x14) + +/* MDIO Registers */ +#define RGDE_REG_MDIO_BASE 0x00000100 +#define RGDE_REG_MDIO_CFG_DT (RGDE_REG_MDIO_BASE + 0x00) +#define RGDE_REG_MDIO_CFG_SPEED (RGDE_REG_MDIO_BASE + 0x04) +#define RGDE_REG_MDIO_CFG_START (RGDE_REG_MDIO_BASE + 0x08) +#define RGDE_REG_MDIO_RDAT (RGDE_REG_MDIO_BASE + 0x10) +#define RGDE_REG_MDIO_STATUS (RGDE_REG_MDIO_BASE + 0x14) + +/* GE0 PORT Registers */ +#define RGDE_REG_GE0_PORT_BASE 0x00001000 +#define RGDE_REG_GE0_PORT_CTL (RGDE_REG_GE0_PORT_BASE + 0x00) +#define RGDE_REG_GE0_PORT_STA (RGDE_REG_GE0_PORT_BASE + 0x04) +#define RGDE_REG_GE0_PORT_MTU (RGDE_REG_GE0_PORT_BASE + 0x08) +#define RGDE_REG_GE0_PORT_RXPKTS (RGDE_REG_GE0_PORT_BASE + 0x10) +#define RGDE_REG_GE0_PORT_RXBYTE (RGDE_REG_GE0_PORT_BASE + 0x18) +#define RGDE_REG_GE0_PORT_RXERR (RGDE_REG_GE0_PORT_BASE + 0x20) +#define RGDE_REG_GE0_PORT_RXDROP (RGDE_REG_GE0_PORT_BASE + 0x28) +#define RGDE_REG_GE0_PORT_RXMULTI (RGDE_REG_GE0_PORT_BASE + 0x30) +#define RGDE_REG_GE0_PORT_RXBRO (RGDE_REG_GE0_PORT_BASE + 0x38) +#define RGDE_REG_GE0_PORT_TXPKTS (RGDE_REG_GE0_PORT_BASE + 0x40) +#define RGDE_REG_GE0_PORT_TXBYTE (RGDE_REG_GE0_PORT_BASE + 0x48) +#define RGDE_REG_GE0_PORT_TXERR (RGDE_REG_GE0_PORT_BASE + 0x50) +#define RGDE_REG_GE0_PORT_TXDROP (RGDE_REG_GE0_PORT_BASE + 0x58) +#define RGDE_REG_GE0_PORT_TXMULT (RGDE_REG_GE0_PORT_BASE + 0x60) +#define RGDE_REG_GE0_PORT_TXBRO (RGDE_REG_GE0_PORT_BASE + 0x68) + +/* GE1 PORT Registers */ +#define RGDE_REG_GE1_PORT_BASE 0x00001100 +#define RGDE_REG_GE1_PORT_CTL (RGDE_REG_GE1_PORT_BASE + 0x00) +#define RGDE_REG_GE1_PORT_STA (RGDE_REG_GE1_PORT_BASE + 0x04) +#define RGDE_REG_GE1_PORT_MTU (RGDE_REG_GE1_PORT_BASE + 0x08) +#define RGDE_REG_GE1_PORT_RXPKTS (RGDE_REG_GE1_PORT_BASE + 0x10) +#define RGDE_REG_GE1_PORT_RXBYTE (RGDE_REG_GE1_PORT_BASE + 0x18) +#define RGDE_REG_GE1_PORT_RXERR (RGDE_REG_GE1_PORT_BASE + 0x20) +#define RGDE_REG_GE1_PORT_RXDROP (RGDE_REG_GE1_PORT_BASE + 0x28) +#define RGDE_REG_GE1_PORT_RXMULTI (RGDE_REG_GE1_PORT_BASE + 0x30) +#define RGDE_REG_GE1_PORT_RXBRO (RGDE_REG_GE1_PORT_BASE + 0x38) +#define RGDE_REG_GE1_PORT_TXPKTS (RGDE_REG_GE1_PORT_BASE + 0x40) +#define RGDE_REG_GE1_PORT_TXBYTE (RGDE_REG_GE1_PORT_BASE + 0x48) +#define RGDE_REG_GE1_PORT_TXERR (RGDE_REG_GE1_PORT_BASE + 0x50) +#define RGDE_REG_GE1_PORT_TXDROP (RGDE_REG_GE1_PORT_BASE + 0x58) +#define RGDE_REG_GE1_PORT_TXMULT (RGDE_REG_GE1_PORT_BASE + 0x60) +#define RGDE_REG_GE1_PORT_TXBRO (RGDE_REG_GE1_PORT_BASE + 0x68) + +/* GE2 PORT Registers */ +#define RGDE_REG_GE2_PORT_BASE 0x00001200 +#define RGDE_REG_GE2_PORT_CTL (RGDE_REG_GE2_PORT_BASE + 0x00) +#define RGDE_REG_GE2_PORT_STA (RGDE_REG_GE2_PORT_BASE + 0x04) +#define RGDE_REG_GE2_PORT_MTU (RGDE_REG_GE2_PORT_BASE + 0x08) +#define RGDE_REG_GE2_PORT_RXPKTS (RGDE_REG_GE2_PORT_BASE + 0x10) +#define RGDE_REG_GE2_PORT_RXBYTE (RGDE_REG_GE2_PORT_BASE + 0x18) +#define RGDE_REG_GE2_PORT_RXERR (RGDE_REG_GE2_PORT_BASE + 0x20) +#define RGDE_REG_GE2_PORT_RXDROP (RGDE_REG_GE2_PORT_BASE + 0x28) +#define RGDE_REG_GE2_PORT_RXMULTI (RGDE_REG_GE2_PORT_BASE + 0x30) +#define RGDE_REG_GE2_PORT_RXBRO (RGDE_REG_GE2_PORT_BASE + 0x38) +#define RGDE_REG_GE2_PORT_TXPKTS (RGDE_REG_GE2_PORT_BASE + 0x40) +#define RGDE_REG_GE2_PORT_TXBYTE (RGDE_REG_GE2_PORT_BASE + 0x48) +#define RGDE_REG_GE2_PORT_TXERR (RGDE_REG_GE2_PORT_BASE + 0x50) +#define RGDE_REG_GE2_PORT_TXDROP (RGDE_REG_GE2_PORT_BASE + 0x58) +#define RGDE_REG_GE2_PORT_TXMULT (RGDE_REG_GE2_PORT_BASE + 0x60) +#define RGDE_REG_GE2_PORT_TXBRO (RGDE_REG_GE2_PORT_BASE + 0x68) + +/* GE3 PORT Registers */ +#define RGDE_REG_GE3_PORT_BASE 0x00001300 +#define RGDE_REG_GE3_PORT_CTL (RGDE_REG_GE3_PORT_BASE + 0x00) +#define RGDE_REG_GE3_PORT_STA (RGDE_REG_GE3_PORT_BASE + 0x04) +#define RGDE_REG_GE3_PORT_MTU (RGDE_REG_GE3_PORT_BASE + 0x08) +#define RGDE_REG_GE3_PORT_RXPKTS (RGDE_REG_GE3_PORT_BASE + 0x10) +#define RGDE_REG_GE3_PORT_RXBYTE (RGDE_REG_GE3_PORT_BASE + 0x18) +#define RGDE_REG_GE3_PORT_RXERR (RGDE_REG_GE3_PORT_BASE + 0x20) +#define RGDE_REG_GE3_PORT_RXDROP (RGDE_REG_GE3_PORT_BASE + 0x28) +#define RGDE_REG_GE3_PORT_RXMULTI (RGDE_REG_GE3_PORT_BASE + 0x30) +#define RGDE_REG_GE3_PORT_RXBRO (RGDE_REG_GE3_PORT_BASE + 0x38) +#define RGDE_REG_GE3_PORT_TXPKTS (RGDE_REG_GE3_PORT_BASE + 0x40) +#define RGDE_REG_GE3_PORT_TXBYTE (RGDE_REG_GE3_PORT_BASE + 0x48) +#define RGDE_REG_GE3_PORT_TXERR (RGDE_REG_GE3_PORT_BASE + 0x50) +#define RGDE_REG_GE3_PORT_TXDROP (RGDE_REG_GE3_PORT_BASE + 0x58) +#define RGDE_REG_GE3_PORT_TXMULT (RGDE_REG_GE3_PORT_BASE + 0x60) +#define RGDE_REG_GE3_PORT_TXBRO (RGDE_REG_GE3_PORT_BASE + 0x68) + +/* GE4 PORT Registers */ +#define RGDE_REG_XGE0_PORT_BASE 0x00001400 +#define RGDE_REG_XGE0_PORT_CTL (RGDE_REG_XGE0_PORT_BASE + 0x00) +#define RGDE_REG_XGE0_PORT_STA (RGDE_REG_XGE0_PORT_BASE + 0x04) +#define RGDE_REG_XGE0_PORT_MTU (RGDE_REG_XGE0_PORT_BASE + 0x08) +#define RGDE_REG_XGE0_PORT_RXPKTS (RGDE_REG_XGE0_PORT_BASE + 0x10) +#define RGDE_REG_XGE0_PORT_RXBYTE (RGDE_REG_XGE0_PORT_BASE + 0x18) +#define RGDE_REG_XGE0_PORT_RXERR (RGDE_REG_XGE0_PORT_BASE + 0x20) +#define RGDE_REG_XGE0_PORT_RXDROP (RGDE_REG_XGE0_PORT_BASE + 0x28) +#define RGDE_REG_XGE0_PORT_RXMULTI (RGDE_REG_XGE0_PORT_BASE + 0x30) +#define RGDE_REG_XGE0_PORT_RXBRO (RGDE_REG_XGE0_PORT_BASE + 0x38) +#define RGDE_REG_XGE0_PORT_TXPKTS (RGDE_REG_XGE0_PORT_BASE + 0x40) +#define RGDE_REG_XGE0_PORT_TXBYTE (RGDE_REG_XGE0_PORT_BASE + 0x48) +#define RGDE_REG_XGE0_PORT_TXERR (RGDE_REG_XGE0_PORT_BASE + 0x50) +#define RGDE_REG_XGE0_PORT_TXDROP (RGDE_REG_XGE0_PORT_BASE + 0x58) +#define RGDE_REG_XGE0_PORT_TXMULT (RGDE_REG_XGE0_PORT_BASE + 0x60) +#define RGDE_REG_XGE0_PORT_TXBRO (RGDE_REG_XGE0_PORT_BASE + 0x68) + +/* GE5 PORT Registers */ +#define RGDE_REG_XGE1_PORT_BASE 0x00001500 +#define RGDE_REG_XGE1_PORT_CTL (RGDE_REG_XGE1_PORT_BASE + 0x00) +#define RGDE_REG_XGE1_PORT_STA (RGDE_REG_XGE1_PORT_BASE + 0x04) +#define RGDE_REG_XGE1_PORT_MTU (RGDE_REG_XGE1_PORT_BASE + 0x08) +#define RGDE_REG_XGE1_PORT_RXPKTS (RGDE_REG_XGE1_PORT_BASE + 0x10) +#define RGDE_REG_XGE1_PORT_RXBYTE (RGDE_REG_XGE1_PORT_BASE + 0x18) +#define RGDE_REG_XGE1_PORT_RXERR (RGDE_REG_XGE1_PORT_BASE + 0x20) +#define RGDE_REG_XGE1_PORT_RXDROP (RGDE_REG_XGE1_PORT_BASE + 0x28) +#define RGDE_REG_XGE1_PORT_RXMULTI (RGDE_REG_XGE1_PORT_BASE + 0x30) +#define RGDE_REG_XGE1_PORT_RXBRO (RGDE_REG_XGE1_PORT_BASE + 0x38) +#define RGDE_REG_XGE1_PORT_TXPKTS (RGDE_REG_XGE1_PORT_BASE + 0x40) +#define RGDE_REG_XGE1_PORT_TXBYTE (RGDE_REG_XGE1_PORT_BASE + 0x48) +#define RGDE_REG_XGE1_PORT_TXERR (RGDE_REG_XGE1_PORT_BASE + 0x50) +#define RGDE_REG_XGE1_PORT_TXDROP (RGDE_REG_XGE1_PORT_BASE + 0x58) +#define RGDE_REG_XGE1_PORT_TXMULT (RGDE_REG_XGE1_PORT_BASE + 0x60) +#define RGDE_REG_XGE1_PORT_TXBRO (RGDE_REG_XGE1_PORT_BASE + 0x68) + +#define RGDE_REG_CPU_BASE 0x00002100 +#define RGDE_REG_PCIE_ENDIAN_CNTR (RGDE_REG_CPU_BASE + 0x08) + +/* DMA Registers */ +#define RGDE_REG_DMA_BASE 0x00004000 +#define RGDE_REG_BD_WR_OVERTIME (RGDE_REG_DMA_BASE + 0x00) +#define RGDE_REG_BD_DEEP (RGDE_REG_DMA_BASE + 0x04) + +/* TX0 Registers */ +#define RGDE_REG_TX0_BASE 0x00005000 +#define RGDE_REG_TX0_CHN_EN (RGDE_REG_TX0_BASE + 0x00) +#define RGDE_REG_TX0_BD_BASE (RGDE_REG_TX0_BASE + 0x04) +#define RGDE_REG_TX0_BD_TAIL (RGDE_REG_TX0_BASE + 0x08) +#define RGDE_REG_TX0_BD_READY_NUM (RGDE_REG_TX0_BASE + 0x0c) +#define RGDE_REG_TX0_CPU2FPGA_BD_NUM (RGDE_REG_TX0_BASE + 0x30) +#define RGDE_REG_TX0_FPGA2CPU_BD_NUM (RGDE_REG_TX0_BASE + 0x34) + +/* TX1 Registers */ +#define RGDE_REG_TX1_BASE 0x00005100 +#define RGDE_REG_TX1_CHN_EN (RGDE_REG_TX1_BASE + 0x00) +#define RGDE_REG_TX1_BD_BASE (RGDE_REG_TX1_BASE + 0x04) +#define RGDE_REG_TX1_BD_TAIL (RGDE_REG_TX1_BASE + 0x08) +#define RGDE_REG_TX1_BD_READY_NUM (RGDE_REG_TX1_BASE + 0x0c) +#define RGDE_REG_TX1_CPU2FPGA_BD_NUM (RGDE_REG_TX1_BASE + 0x30) +#define RGDE_REG_TX1_FPGA2CPU_BD_NUM (RGDE_REG_TX1_BASE + 0x34) + +/* RX0 Registers */ +#define RGDE_REG_RX0_BASE 0x00006400 +#define RGDE_REG_RX0_CHN_EN (RGDE_REG_RX0_BASE + 0x00) +#define RGDE_REG_RX0_BD_BASE (RGDE_REG_RX0_BASE + 0x04) +#define RGDE_REG_RX0_BD_TAIL (RGDE_REG_RX0_BASE + 0x08) +#define RGDE_REG_RX0_BD_READY_NUM (RGDE_REG_RX0_BASE + 0x0c) +#define RGDE_REG_RX0_CPU2FPGA_BD_NUM (RGDE_REG_RX0_BASE + 0x30) +#define RGDE_REG_RX0_FPGA2CPU_BD_NUM (RGDE_REG_RX0_BASE + 0x34) + +/* RX1 Registers */ +#define RGDE_REG_RX1_BASE 0x00006500 +#define RGDE_REG_RX1_CHN_EN (RGDE_REG_RX1_BASE + 0x00) +#define RGDE_REG_RX1_BD_BASE (RGDE_REG_RX1_BASE + 0x04) +#define RGDE_REG_RX1_BD_TAIL (RGDE_REG_RX1_BASE + 0x08) +#define RGDE_REG_RX1_BD_READY_NUM (RGDE_REG_RX1_BASE + 0x0c) +#define RGDE_REG_RX1_CPU2FPGA_BD_NUM (RGDE_REG_RX1_BASE + 0x30) +#define RGDE_REG_RX1_FPGA2CPU_BD_NUM (RGDE_REG_RX1_BASE + 0x34) + + +#endif /* _FPGA_REG_DEFS_H_ */ diff --git a/platform/broadcom/sonic-platform-modules-ragile/common/modules/i2c-mux-pca954x.c b/platform/broadcom/sonic-platform-modules-ragile/common/modules/i2c-mux-pca954x.c index 8c7054fbb9..f7b6bb952b 100755 --- a/platform/broadcom/sonic-platform-modules-ragile/common/modules/i2c-mux-pca954x.c +++ b/platform/broadcom/sonic-platform-modules-ragile/common/modules/i2c-mux-pca954x.c @@ -8,8 +8,8 @@ * This module supports the PCA954x series of I2C multiplexer/switch chips * made by Philips Semiconductors. * This includes the: - * PCA9540, PCA9542, PCA9543, PCA9544, PCA9545, PCA9546, PCA9547 - * and PCA9548. + * PCA9540, PCA9542, PCA9543, PCA9544, PCA9545, PCA9546, PCA9547 + * and PCA9548. * * These chips are all controlled via the I2C bus itself, and all have a * single 8-bit register. The upstream "parent" bus fans out to two, @@ -19,17 +19,17 @@ * combination simultaneously. * * Based on: - * pca954x.c from Kumar Gala + * pca954x.c from Kumar Gala * Copyright (C) 2006 * * Based on: - * pca954x.c from Ken Harrenstien + * pca954x.c from Ken Harrenstien * Copyright (C) 2004 Google, Inc. (Ken Harrenstien) * * Based on: - * i2c-virtual_cb.c from Brian Kuschak + * i2c-virtual_cb.c from Brian Kuschak * and - * pca9540.c from Jean Delvare . + * pca9540.c from Jean Delvare . * * This file is licensed under the terms of the GNU General Public * License version 2. This program is licensed "as is" without any @@ -66,109 +66,109 @@ int force_create_bus = 0; module_param(force_create_bus, int, S_IRUGO | S_IWUSR); enum pca_type { - pca_9540, - pca_9542, - pca_9543, - pca_9544, - pca_9545, - pca_9546, - pca_9547, - pca_9548, + pca_9540, + pca_9542, + pca_9543, + pca_9544, + pca_9545, + pca_9546, + pca_9547, + pca_9548, }; struct chip_desc { - u8 nchans; - u8 enable; /* used for muxes only */ - u8 has_irq; - enum muxtype { - pca954x_ismux = 0, - pca954x_isswi - } muxtype; + u8 nchans; + u8 enable; /* used for muxes only */ + u8 has_irq; + enum muxtype { + pca954x_ismux = 0, + pca954x_isswi + } muxtype; }; struct pca954x { - const struct chip_desc *chip; + const struct chip_desc *chip; - u8 last_chan; /* last register value */ - u8 deselect; - struct i2c_client *client; + u8 last_chan; /* last register value */ + u8 deselect; + struct i2c_client *client; - struct irq_domain *irq; - unsigned int irq_mask; - raw_spinlock_t lock; + struct irq_domain *irq; + unsigned int irq_mask; + raw_spinlock_t lock; }; /* Provide specs for the PCA954x types we know about */ static const struct chip_desc chips[] = { - [pca_9540] = { - .nchans = 2, - .enable = 0x4, - .muxtype = pca954x_ismux, - }, - [pca_9542] = { - .nchans = 2, - .enable = 0x4, - .has_irq = 1, - .muxtype = pca954x_ismux, - }, - [pca_9543] = { - .nchans = 2, - .has_irq = 1, - .muxtype = pca954x_isswi, - }, - [pca_9544] = { - .nchans = 4, - .enable = 0x4, - .has_irq = 1, - .muxtype = pca954x_ismux, - }, - [pca_9545] = { - .nchans = 4, - .has_irq = 1, - .muxtype = pca954x_isswi, - }, - [pca_9546] = { - .nchans = 4, - .muxtype = pca954x_isswi, - }, - [pca_9547] = { - .nchans = 8, - .enable = 0x8, - .muxtype = pca954x_ismux, - }, - [pca_9548] = { - .nchans = 8, - .muxtype = pca954x_isswi, - }, + [pca_9540] = { + .nchans = 2, + .enable = 0x4, + .muxtype = pca954x_ismux, + }, + [pca_9542] = { + .nchans = 2, + .enable = 0x4, + .has_irq = 1, + .muxtype = pca954x_ismux, + }, + [pca_9543] = { + .nchans = 2, + .has_irq = 1, + .muxtype = pca954x_isswi, + }, + [pca_9544] = { + .nchans = 4, + .enable = 0x4, + .has_irq = 1, + .muxtype = pca954x_ismux, + }, + [pca_9545] = { + .nchans = 4, + .has_irq = 1, + .muxtype = pca954x_isswi, + }, + [pca_9546] = { + .nchans = 4, + .muxtype = pca954x_isswi, + }, + [pca_9547] = { + .nchans = 8, + .enable = 0x8, + .muxtype = pca954x_ismux, + }, + [pca_9548] = { + .nchans = 8, + .muxtype = pca954x_isswi, + }, }; static const struct i2c_device_id pca954x_id[] = { - { "pca9540", pca_9540 }, - { "pca9542", pca_9542 }, - { "pca9543", pca_9543 }, - { "pca9544", pca_9544 }, - { "pca9545", pca_9545 }, - { "pca9546", pca_9546 }, - { "pca9547", pca_9547 }, - { "pca9548", pca_9548 }, - { } + { "pca9540", pca_9540 }, + { "pca9542", pca_9542 }, + { "pca9543", pca_9543 }, + { "pca9544", pca_9544 }, + { "pca9545", pca_9545 }, + { "pca9546", pca_9546 }, + { "pca9547", pca_9547 }, + { "pca9548", pca_9548 }, + { } }; MODULE_DEVICE_TABLE(i2c, pca954x_id); #ifdef CONFIG_OF static const struct of_device_id pca954x_of_match[] = { - { .compatible = "nxp,pca9540", .data = &chips[pca_9540] }, - { .compatible = "nxp,pca9542", .data = &chips[pca_9542] }, - { .compatible = "nxp,pca9543", .data = &chips[pca_9543] }, - { .compatible = "nxp,pca9544", .data = &chips[pca_9544] }, - { .compatible = "nxp,pca9545", .data = &chips[pca_9545] }, - { .compatible = "nxp,pca9546", .data = &chips[pca_9546] }, - { .compatible = "nxp,pca9547", .data = &chips[pca_9547] }, - { .compatible = "nxp,pca9548", .data = &chips[pca_9548] }, - {} + { .compatible = "nxp,pca9540", .data = &chips[pca_9540] }, + { .compatible = "nxp,pca9542", .data = &chips[pca_9542] }, + { .compatible = "nxp,pca9543", .data = &chips[pca_9543] }, + { .compatible = "nxp,pca9544", .data = &chips[pca_9544] }, + { .compatible = "nxp,pca9545", .data = &chips[pca_9545] }, + { .compatible = "nxp,pca9546", .data = &chips[pca_9546] }, + { .compatible = "nxp,pca9547", .data = &chips[pca_9547] }, + { .compatible = "nxp,pca9548", .data = &chips[pca_9548] }, + {} }; MODULE_DEVICE_TABLE(of, pca954x_of_match); #endif @@ -176,63 +176,63 @@ MODULE_DEVICE_TABLE(of, pca954x_of_match); /* Write to mux register. Don't use i2c_transfer()/i2c_smbus_xfer() for this as they will try to lock adapter a second time */ static int pca954x_reg_write(struct i2c_adapter *adap, - struct i2c_client *client, u8 val) + struct i2c_client *client, u8 val) { - int ret = -ENODEV; + int ret = -ENODEV; - if (adap->algo->master_xfer) { - struct i2c_msg msg; - char buf[1]; + if (adap->algo->master_xfer) { + struct i2c_msg msg; + char buf[1]; - msg.addr = client->addr; - msg.flags = 0; - msg.len = 1; - buf[0] = val; - msg.buf = buf; - ret = __i2c_transfer(adap, &msg, 1); + msg.addr = client->addr; + msg.flags = 0; + msg.len = 1; + buf[0] = val; + msg.buf = buf; + ret = __i2c_transfer(adap, &msg, 1); - if (ret >= 0 && ret != 1) - ret = -EREMOTEIO; - } else { - union i2c_smbus_data data; - ret = adap->algo->smbus_xfer(adap, client->addr, - client->flags, - I2C_SMBUS_WRITE, - val, I2C_SMBUS_BYTE, &data); - } + if (ret >= 0 && ret != 1) + ret = -EREMOTEIO; + } else { + union i2c_smbus_data data; + ret = adap->algo->smbus_xfer(adap, client->addr, + client->flags, + I2C_SMBUS_WRITE, + val, I2C_SMBUS_BYTE, &data); + } - return ret; + return ret; } - static int pca954x_setmuxflag(struct i2c_client *client, int flag) - { - struct i2c_adapter *adap = to_i2c_adapter(client->dev.parent); - pca9641_setmuxflag(adap->nr, flag); - return 0; - } +static int pca954x_setmuxflag(struct i2c_client *client, int flag) +{ + struct i2c_adapter *adap = to_i2c_adapter(client->dev.parent); + pca9641_setmuxflag(adap->nr, flag); + return 0; +} static int pca954x_select_chan(struct i2c_mux_core *muxc, u32 chan) { - struct pca954x *data = i2c_mux_priv(muxc); - struct i2c_client *client = data->client; - const struct chip_desc *chip = data->chip; - u8 regval; - int ret = 0; + struct pca954x *data = i2c_mux_priv(muxc); + struct i2c_client *client = data->client; + const struct chip_desc *chip = data->chip; + u8 regval; + int ret = 0; - /* we make switches look like muxes, not sure how to be smarter */ - if (chip->muxtype == pca954x_ismux) - regval = chan | chip->enable; - else - regval = 1 << chan; + /* we make switches look like muxes, not sure how to be smarter */ + if (chip->muxtype == pca954x_ismux) + regval = chan | chip->enable; + else + regval = 1 << chan; - /* Only select the channel if its different from the last channel */ - if (data->last_chan != regval) { - pca954x_setmuxflag(client, 0); - ret = pca954x_reg_write(muxc->parent, client, regval); - data->last_chan = ret < 0 ? 0 : regval; - } + /* Only select the channel if its different from the last channel */ + if (data->last_chan != regval) { + pca954x_setmuxflag(client, 0); + ret = pca954x_reg_write(muxc->parent, client, regval); + data->last_chan = ret < 0 ? 0 : regval; + } - return ret; + return ret; } @@ -326,7 +326,7 @@ typedef struct fpga_pcie_card_info_s { static pca9548_card_info_t g_pca9548_card_info[] = { { - .dev_type = {0x404a,0x4061,0x4071}, /*RA-B6510-48V8C*/ + .dev_type = {0x404a}, /* RA-B6510-48V8C */ .pca9548_cfg_info = { /* psu fan */ { @@ -451,6 +451,7 @@ static pca9548_card_info_t g_pca9548_card_info[] = { }, }, { + /*RA-B6910-64C*/ .dev_type = {0x404c}, .pca9548_cfg_info = { /* psu fan */ @@ -591,348 +592,8 @@ static pca9548_card_info_t g_pca9548_card_info[] = { }, }, { - .dev_type = {0x4044,0x4072,0x4048}, - .pca9548_cfg_info = { - { - .pca9548_reset_type = PCA9548_RESET_FUNC, - .pca9548_bus = 2, - .pca9548_addr = 0x76, - .rst_delay_b = 0, - .rst_delay = 1000, - .rst_delay_a = 1000, - .attr = { - .func_attr.reset_func = pca954x_hw_do_reset_by_lpc, - .func_attr.get_umask_func = pca954x_get_umask_by_lpc, - .func_attr.cfg_offset = {0x936, -1}, - .func_attr.umask = {BIT(4), -1}, - }, - }, - { - .pca9548_reset_type = PCA9548_RESET_FUNC, - .pca9548_bus = 8, - .pca9548_addr = 0x77, - .rst_delay_b = 0, - .rst_delay = 1000, - .rst_delay_a = 1000, - .attr = { - .func_attr.reset_func = pca954x_hw_do_reset_by_lpc, - .func_attr.get_umask_func = pca954x_get_umask_by_lpc, - .func_attr.cfg_offset = {0x917, -1}, - .func_attr.umask = {BIT(4), -1}, - }, - }, - { - .pca9548_reset_type = PCA9548_RESET_FUNC, - .pca9548_bus = 9, - .pca9548_addr = 0x77, - .rst_delay_b = 0, - .rst_delay = 1000, - .rst_delay_a = 1000, - .attr = { - .func_attr.reset_func = pca954x_hw_do_reset_by_lpc, - .func_attr.get_umask_func = pca954x_get_umask_by_lpc, - .func_attr.cfg_offset = {0x917, -1}, - .func_attr.umask = {BIT(0), -1}, - }, - }, - { - .pca9548_reset_type = PCA9548_RESET_FUNC, - .pca9548_bus = 12, - .pca9548_addr = 0x77, - .rst_delay_b = 0, - .rst_delay = 1000, - .rst_delay_a = 1000, - .attr = { - .func_attr.reset_func = pca954x_hw_do_reset_by_lpc, - .func_attr.get_umask_func = pca954x_get_umask_by_lpc, - .func_attr.cfg_offset = {0x917, -1}, - .func_attr.umask = {BIT(1), -1}, - }, - }, - { - .pca9548_reset_type = PCA9548_RESET_FUNC, - .pca9548_bus = 11, - .pca9548_addr = 0x77, - .rst_delay_b = 0, - .rst_delay = 1000, - .rst_delay_a = 1000, - .attr = { - .func_attr.reset_func = pca954x_hw_do_reset_by_lpc, - .func_attr.get_umask_func = pca954x_get_umask_by_lpc, - .func_attr.cfg_offset = {0x917, -1}, - .func_attr.umask = {BIT(2), -1}, - }, - }, - { - .pca9548_reset_type = PCA9548_RESET_FUNC, - .pca9548_bus = 7, - .pca9548_addr = 0x77, - .rst_delay_b = 0, - .rst_delay = 1000, - .rst_delay_a = 1000, - .attr = { - .func_attr.reset_func = pca954x_hw_do_reset_by_lpc, - .func_attr.get_umask_func = pca954x_get_umask_by_lpc, - .func_attr.cfg_offset = {0x917, -1}, - .func_attr.umask = {BIT(3), -1}, - }, - }, - { - .pca9548_reset_type = PCA9548_RESET_FUNC, - .pca9548_bus = 14, - .pca9548_addr = 0x77, - .rst_delay_b = 0, - .rst_delay = 1000, - .rst_delay_a = 1000, - .attr = { - .func_attr.reset_func = pca954x_hw_do_reset_by_lpc, - .func_attr.get_umask_func = pca954x_get_umask_by_lpc, - .func_attr.cfg_offset = {0xb10, -1}, - .func_attr.umask = {BIT(5), -1}, - }, - }, - { - .pca9548_reset_type = PCA9548_RESET_FUNC, - .pca9548_bus = 13, - .pca9548_addr = 0x77, - .rst_delay_b = 0, - .rst_delay = 1000, - .rst_delay_a = 1000, - .attr = { - .func_attr.reset_func = pca954x_hw_do_reset_by_lpc, - .func_attr.get_umask_func = pca954x_get_umask_by_lpc, - .func_attr.cfg_offset = {0xb10, -1}, - .func_attr.umask = {BIT(7), -1}, - }, - }, - { - .pca9548_reset_type = PCA9548_RESET_FUNC, - .pca9548_bus = 3, - .pca9548_addr = 0x70, - .rst_delay_b = 0, - .rst_delay = 1000, - .rst_delay_a = 1000, - .attr = { - .func_attr.reset_func = pca954x_hw_do_reset_by_lpc, - .func_attr.get_umask_func = pca954x_get_umask_by_lpc, - .func_attr.cfg_offset = {0xb17, -1}, - .func_attr.umask = {BIT(0), -1}, - }, - }, - { - .pca9548_reset_type = PCA9548_RESET_FUNC, - .pca9548_bus = 3, - .pca9548_addr = 0x71, - .rst_delay_b = 0, - .rst_delay = 1000, - .rst_delay_a = 1000, - .attr = { - .func_attr.reset_func = pca954x_hw_do_reset_by_lpc, - .func_attr.get_umask_func = pca954x_get_umask_by_lpc, - .func_attr.cfg_offset = {0xb17, -1}, - .func_attr.umask = {BIT(0), -1}, - }, - }, - { - .pca9548_reset_type = PCA9548_RESET_FUNC, - .pca9548_bus = 3, - .pca9548_addr = 0x72, - .rst_delay_b = 0, - .rst_delay = 1000, - .rst_delay_a = 1000, - .attr = { - .func_attr.reset_func = pca954x_hw_do_reset_by_lpc, - .func_attr.get_umask_func = pca954x_get_umask_by_lpc, - .func_attr.cfg_offset = {0xb17, -1}, - .func_attr.umask = {BIT(0), -1}, - }, - }, - { - .pca9548_reset_type = PCA9548_RESET_FUNC, - .pca9548_bus = 3, - .pca9548_addr = 0x73, - .rst_delay_b = 0, - .rst_delay = 1000, - .rst_delay_a = 1000, - .attr = { - .func_attr.reset_func = pca954x_hw_do_reset_by_lpc, - .func_attr.get_umask_func = pca954x_get_umask_by_lpc, - .func_attr.cfg_offset = {0xb17, -1}, - .func_attr.umask = {BIT(0), -1}, - }, - }, - { - .pca9548_reset_type = PCA9548_RESET_FUNC, - .pca9548_bus = 4, - .pca9548_addr = 0x70, - .rst_delay_b = 0, - .rst_delay = 1000, - .rst_delay_a = 1000, - .attr = { - .func_attr.reset_func = pca954x_hw_do_reset_by_lpc, - .func_attr.get_umask_func = pca954x_get_umask_by_lpc, - .func_attr.cfg_offset = {0xb17, -1}, - .func_attr.umask = {BIT(1), -1}, - }, - }, - { - .pca9548_reset_type = PCA9548_RESET_FUNC, - .pca9548_bus = 4, - .pca9548_addr = 0x71, - .rst_delay_b = 0, - .rst_delay = 1000, - .rst_delay_a = 1000, - .attr = { - .func_attr.reset_func = pca954x_hw_do_reset_by_lpc, - .func_attr.get_umask_func = pca954x_get_umask_by_lpc, - .func_attr.cfg_offset = {0xb17, -1}, - .func_attr.umask = {BIT(1), -1}, - }, - }, - { - .pca9548_reset_type = PCA9548_RESET_FUNC, - .pca9548_bus = 4, - .pca9548_addr = 0x72, - .rst_delay_b = 0, - .rst_delay = 1000, - .rst_delay_a = 1000, - .attr = { - .func_attr.reset_func = pca954x_hw_do_reset_by_lpc, - .func_attr.get_umask_func = pca954x_get_umask_by_lpc, - .func_attr.cfg_offset = {0xb17, -1}, - .func_attr.umask = {BIT(1), -1}, - }, - }, - { - .pca9548_reset_type = PCA9548_RESET_FUNC, - .pca9548_bus = 4, - .pca9548_addr = 0x73, - .rst_delay_b = 0, - .rst_delay = 1000, - .rst_delay_a = 1000, - .attr = { - .func_attr.reset_func = pca954x_hw_do_reset_by_lpc, - .func_attr.get_umask_func = pca954x_get_umask_by_lpc, - .func_attr.cfg_offset = {0xb17, -1}, - .func_attr.umask = {BIT(1), -1}, - }, - }, - { - .pca9548_reset_type = PCA9548_RESET_FUNC, - .pca9548_bus = 5, - .pca9548_addr = 0x70, - .rst_delay_b = 0, - .rst_delay = 1000, - .rst_delay_a = 1000, - .attr = { - .func_attr.reset_func = pca954x_hw_do_reset_by_lpc, - .func_attr.get_umask_func = pca954x_get_umask_by_lpc, - .func_attr.cfg_offset = {0xb17, -1}, - .func_attr.umask = {BIT(2), -1}, - }, - }, - { - .pca9548_reset_type = PCA9548_RESET_FUNC, - .pca9548_bus = 5, - .pca9548_addr = 0x71, - .rst_delay_b = 0, - .rst_delay = 1000, - .rst_delay_a = 1000, - .attr = { - .func_attr.reset_func = pca954x_hw_do_reset_by_lpc, - .func_attr.get_umask_func = pca954x_get_umask_by_lpc, - .func_attr.cfg_offset = {0xb17, -1}, - .func_attr.umask = {BIT(2), -1}, - }, - }, - { - .pca9548_reset_type = PCA9548_RESET_FUNC, - .pca9548_bus = 5, - .pca9548_addr = 0x72, - .rst_delay_b = 0, - .rst_delay = 1000, - .rst_delay_a = 1000, - .attr = { - .func_attr.reset_func = pca954x_hw_do_reset_by_lpc, - .func_attr.get_umask_func = pca954x_get_umask_by_lpc, - .func_attr.cfg_offset = {0xb17, -1}, - .func_attr.umask = {BIT(2), -1}, - }, - }, - { - .pca9548_reset_type = PCA9548_RESET_FUNC, - .pca9548_bus = 5, - .pca9548_addr = 0x73, - .rst_delay_b = 0, - .rst_delay = 1000, - .rst_delay_a = 1000, - .attr = { - .func_attr.reset_func = pca954x_hw_do_reset_by_lpc, - .func_attr.get_umask_func = pca954x_get_umask_by_lpc, - .func_attr.cfg_offset = {0xb17, -1}, - .func_attr.umask = {BIT(2), -1}, - }, - }, - { - .pca9548_reset_type = PCA9548_RESET_FUNC, - .pca9548_bus = 6, - .pca9548_addr = 0x70, - .rst_delay_b = 0, - .rst_delay = 1000, - .rst_delay_a = 1000, - .attr = { - .func_attr.reset_func = pca954x_hw_do_reset_by_lpc, - .func_attr.get_umask_func = pca954x_get_umask_by_lpc, - .func_attr.cfg_offset = {0xb17, -1}, - .func_attr.umask = {BIT(3), -1}, - }, - }, - { - .pca9548_reset_type = PCA9548_RESET_FUNC, - .pca9548_bus = 6, - .pca9548_addr = 0x71, - .rst_delay_b = 0, - .rst_delay = 1000, - .rst_delay_a = 1000, - .attr = { - .func_attr.reset_func = pca954x_hw_do_reset_by_lpc, - .func_attr.get_umask_func = pca954x_get_umask_by_lpc, - .func_attr.cfg_offset = {0xb17, -1}, - .func_attr.umask = {BIT(3), -1}, - }, - }, - { - .pca9548_reset_type = PCA9548_RESET_FUNC, - .pca9548_bus = 6, - .pca9548_addr = 0x72, - .rst_delay_b = 0, - .rst_delay = 1000, - .rst_delay_a = 1000, - .attr = { - .func_attr.reset_func = pca954x_hw_do_reset_by_lpc, - .func_attr.get_umask_func = pca954x_get_umask_by_lpc, - .func_attr.cfg_offset = {0xb17, -1}, - .func_attr.umask = {BIT(3), -1}, - }, - }, - { - .pca9548_reset_type = PCA9548_RESET_FUNC, - .pca9548_bus = 6, - .pca9548_addr = 0x73, - .rst_delay_b = 0, - .rst_delay = 1000, - .rst_delay_a = 1000, - .attr = { - .func_attr.reset_func = pca954x_hw_do_reset_by_lpc, - .func_attr.get_umask_func = pca954x_get_umask_by_lpc, - .func_attr.cfg_offset = {0xb17, -1}, - .func_attr.umask = {BIT(3), -1}, - }, - }, - }, - }, - { - .dev_type = {0x404b,0x4073}, + /* RA-B6510-32C */ + .dev_type = {0x404b}, .pca9548_cfg_info = { /* psu */ { @@ -998,7 +659,8 @@ static int dfd_get_my_dev_type_by_file(void) /* set_fs(KERNEL_DS); */ memset(buf, 0, DFD_PID_BUF_LEN); pos = 0; - kernel_read(fp, pos, buf, DFD_PRODUCT_ID_LENGTH + 1 ); + kernel_read(fp, buf, DFD_PRODUCT_ID_LENGTH + 1, &pos); + // kernel_read(fp, pos, buf, DFD_PRODUCT_ID_LENGTH + 1 ); if (pos < 0) { PCA954X_DEBUG("read file fail!\r\n"); goto exit; @@ -1104,9 +766,10 @@ static void pca9548_gpio_free(gpio_attr_t *gpio_attr) } static int pca954x_do_gpio_reset(pca9548_cfg_info_t *cfg_info, struct i2c_adapter *adap, - struct i2c_client *client, u32 chan) + struct i2c_client *client, u32 chan) { - struct pca954x *data = i2c_get_clientdata(client); + struct i2c_mux_core *muxc = i2c_get_clientdata(client); + struct pca954x *data = i2c_mux_priv(muxc); int ret = -1; gpio_attr_t *tmp_gpio_attr; int timeout; @@ -1171,9 +834,10 @@ static int pca954x_do_gpio_reset(pca9548_cfg_info_t *cfg_info, struct i2c_adapte } static int pca954x_do_func_reset(pca9548_cfg_info_t *cfg_info, struct i2c_adapter *adap, - struct i2c_client *client, u32 chan) + struct i2c_client *client, u32 chan) { - struct pca954x *data = i2c_get_clientdata(client); + struct i2c_mux_core *muxc = i2c_get_clientdata(client); + struct pca954x *data = i2c_mux_priv(muxc); int ret = -1; func_attr_t *tmp_func_attr; int timeout; @@ -1198,10 +862,10 @@ static int pca954x_do_func_reset(pca9548_cfg_info_t *cfg_info, struct i2c_adapte } for(i = 0; (i < PCA9548_MAX_CPLD_LAYER) && (tmp_func_attr->cfg_offset[i] != -1) - && (tmp_func_attr->umask[i] != -1); i++) { + && (tmp_func_attr->umask[i] != -1); i++) { old_value = (*tmp_func_attr->get_umask_func)(tmp_func_attr->cfg_offset[i]); PCA954X_DEBUG("cfg info: offset:0x%x umask:0x%x, old_value:0x%x\n", - tmp_func_attr->cfg_offset[i], tmp_func_attr->umask[i],old_value); + tmp_func_attr->cfg_offset[i], tmp_func_attr->umask[i],old_value); (*tmp_func_attr->reset_func)(tmp_func_attr->cfg_offset[i], old_value & ~tmp_func_attr->umask[i]); udelay(cfg_info->rst_delay); (*tmp_func_attr->reset_func)(tmp_func_attr->cfg_offset[i], old_value | tmp_func_attr->umask[i]); @@ -1245,7 +909,7 @@ static int pca954x_do_func_reset(pca9548_cfg_info_t *cfg_info, struct i2c_adapte } static int pca9548_reset_ctrl(pca9548_cfg_info_t *cfg_info, struct i2c_adapter *adap, - struct i2c_client *client, u32 chan) + struct i2c_client *client, u32 chan) { int ret = -1; @@ -1267,7 +931,7 @@ static int pca9548_reset_ctrl(pca9548_cfg_info_t *cfg_info, struct i2c_adapter * } static int pca954x_reset_i2c_read(uint32_t bus, uint32_t addr, uint32_t offset_addr, - unsigned char *buf, uint32_t size) + unsigned char *buf, uint32_t size) { struct file *fp; /* mm_segment_t fs; */ @@ -1298,9 +962,9 @@ static int pca954x_reset_i2c_read(uint32_t bus, uint32_t addr, uint32_t offset_a goto out; } continue; - } - *(buf + j) = (unsigned char)rv; - break; + } + *(buf + j) = (unsigned char)rv; + break; } } out: @@ -1310,7 +974,7 @@ out: } static int pca954x_reset_i2c_write(uint32_t bus, uint32_t dev_addr, uint32_t offset_addr, - uint8_t write_buf) + uint8_t write_buf) { struct file *fp; /* mm_segment_t fs; */ @@ -1414,7 +1078,7 @@ u8 pca954x_get_umask_by_i2c(int addr) void pca954x_hw_do_reset_by_lpc(int io_port, u8 value) { PCA954X_DEBUG("write lpc offset[0x%x], value[%d]\n", (u16)io_port, value); - outb(value, (u16)io_port); + outb(value, (u16)io_port); } u8 pca954x_get_umask_by_lpc(int io_port) @@ -1428,7 +1092,7 @@ u8 pca954x_get_umask_by_lpc(int io_port) } int pca954x_hw_do_reset_new(struct i2c_adapter *adap, - struct i2c_client *client, u32 chan) + struct i2c_client *client, u32 chan) { pca9548_cfg_info_t *cfg_info; int ret = -1; @@ -1451,7 +1115,7 @@ int pca954x_hw_do_reset_new(struct i2c_adapter *adap, /******************************end 9548 reset***********************************/ static int pca954x_do_reset(struct i2c_adapter *adap, - void *client, u32 chan) + void *client, u32 chan) { struct i2c_client *new_client; int ret = -1; @@ -1470,15 +1134,15 @@ static int pca954x_do_reset(struct i2c_adapter *adap, } static int pca954x_deselect_mux(struct i2c_mux_core *muxc, u32 chan) { - struct pca954x *data = i2c_mux_priv(muxc); - struct i2c_client *client = data->client; - int ret, rv; - struct i2c_client * new_client; + struct pca954x *data = i2c_mux_priv(muxc); + struct i2c_client *client = data->client; + int ret, rv; + struct i2c_client * new_client; - /* Deselect active channel */ - data->last_chan = 0; + /* Deselect active channel */ + data->last_chan = 0; - ret = pca954x_reg_write(muxc->parent, client, data->last_chan); + ret = pca954x_reg_write(muxc->parent, client, data->last_chan); if (ret < 0) { new_client =(struct i2c_client *) client; dev_warn(&new_client->dev, "pca954x close chn failed, do reset.\n"); @@ -1491,255 +1155,255 @@ static int pca954x_deselect_mux(struct i2c_mux_core *muxc, u32 chan) pca954x_setmuxflag(client, 1); (void)pca954x_reg_write(muxc->parent, client, data->last_chan); - return ret; + return ret; } static irqreturn_t pca954x_irq_handler(int irq, void *dev_id) { - struct pca954x *data = dev_id; - unsigned int child_irq; - int ret, i, handled = 0; + struct pca954x *data = dev_id; + unsigned int child_irq; + int ret, i, handled = 0; - ret = i2c_smbus_read_byte(data->client); - if (ret < 0) - return IRQ_NONE; + ret = i2c_smbus_read_byte(data->client); + if (ret < 0) + return IRQ_NONE; - for (i = 0; i < data->chip->nchans; i++) { - if (ret & BIT(PCA954X_IRQ_OFFSET + i)) { - child_irq = irq_linear_revmap(data->irq, i); - handle_nested_irq(child_irq); - handled++; - } - } - return handled ? IRQ_HANDLED : IRQ_NONE; + for (i = 0; i < data->chip->nchans; i++) { + if (ret & BIT(PCA954X_IRQ_OFFSET + i)) { + child_irq = irq_linear_revmap(data->irq, i); + handle_nested_irq(child_irq); + handled++; + } + } + return handled ? IRQ_HANDLED : IRQ_NONE; } static void pca954x_irq_mask(struct irq_data *idata) { - struct pca954x *data = irq_data_get_irq_chip_data(idata); - unsigned int pos = idata->hwirq; - unsigned long flags; + struct pca954x *data = irq_data_get_irq_chip_data(idata); + unsigned int pos = idata->hwirq; + unsigned long flags; - raw_spin_lock_irqsave(&data->lock, flags); + raw_spin_lock_irqsave(&data->lock, flags); - data->irq_mask &= ~BIT(pos); - if (!data->irq_mask) - disable_irq(data->client->irq); + data->irq_mask &= ~BIT(pos); + if (!data->irq_mask) + disable_irq(data->client->irq); - raw_spin_unlock_irqrestore(&data->lock, flags); + raw_spin_unlock_irqrestore(&data->lock, flags); } static void pca954x_irq_unmask(struct irq_data *idata) { - struct pca954x *data = irq_data_get_irq_chip_data(idata); - unsigned int pos = idata->hwirq; - unsigned long flags; + struct pca954x *data = irq_data_get_irq_chip_data(idata); + unsigned int pos = idata->hwirq; + unsigned long flags; - raw_spin_lock_irqsave(&data->lock, flags); + raw_spin_lock_irqsave(&data->lock, flags); - if (!data->irq_mask) - enable_irq(data->client->irq); - data->irq_mask |= BIT(pos); + if (!data->irq_mask) + enable_irq(data->client->irq); + data->irq_mask |= BIT(pos); - raw_spin_unlock_irqrestore(&data->lock, flags); + raw_spin_unlock_irqrestore(&data->lock, flags); } static int pca954x_irq_set_type(struct irq_data *idata, unsigned int type) { - if ((type & IRQ_TYPE_SENSE_MASK) != IRQ_TYPE_LEVEL_LOW) - return -EINVAL; - return 0; + if ((type & IRQ_TYPE_SENSE_MASK) != IRQ_TYPE_LEVEL_LOW) + return -EINVAL; + return 0; } static struct irq_chip pca954x_irq_chip = { - .name = "i2c-mux-pca954x", - .irq_mask = pca954x_irq_mask, - .irq_unmask = pca954x_irq_unmask, - .irq_set_type = pca954x_irq_set_type, + .name = "i2c-mux-pca954x", + .irq_mask = pca954x_irq_mask, + .irq_unmask = pca954x_irq_unmask, + .irq_set_type = pca954x_irq_set_type, }; static int pca954x_irq_setup(struct i2c_mux_core *muxc) { - struct pca954x *data = i2c_mux_priv(muxc); - struct i2c_client *client = data->client; - int c, err, irq; + struct pca954x *data = i2c_mux_priv(muxc); + struct i2c_client *client = data->client; + int c, err, irq; - if (!data->chip->has_irq || client->irq <= 0) - return 0; + if (!data->chip->has_irq || client->irq <= 0) + return 0; - raw_spin_lock_init(&data->lock); + raw_spin_lock_init(&data->lock); - data->irq = irq_domain_add_linear(client->dev.of_node, - data->chip->nchans, - &irq_domain_simple_ops, data); - if (!data->irq) - return -ENODEV; + data->irq = irq_domain_add_linear(client->dev.of_node, + data->chip->nchans, + &irq_domain_simple_ops, data); + if (!data->irq) + return -ENODEV; - for (c = 0; c < data->chip->nchans; c++) { - irq = irq_create_mapping(data->irq, c); - irq_set_chip_data(irq, data); - irq_set_chip_and_handler(irq, &pca954x_irq_chip, - handle_simple_irq); - } + for (c = 0; c < data->chip->nchans; c++) { + irq = irq_create_mapping(data->irq, c); + irq_set_chip_data(irq, data); + irq_set_chip_and_handler(irq, &pca954x_irq_chip, + handle_simple_irq); + } - err = devm_request_threaded_irq(&client->dev, data->client->irq, NULL, - pca954x_irq_handler, - IRQF_ONESHOT | IRQF_SHARED, - "pca954x", data); - if (err) - goto err_req_irq; + err = devm_request_threaded_irq(&client->dev, data->client->irq, NULL, + pca954x_irq_handler, + IRQF_ONESHOT | IRQF_SHARED, + "pca954x", data); + if (err) + goto err_req_irq; - disable_irq(data->client->irq); + disable_irq(data->client->irq); - return 0; + return 0; err_req_irq: - for (c = 0; c < data->chip->nchans; c++) { - irq = irq_find_mapping(data->irq, c); - irq_dispose_mapping(irq); - } - irq_domain_remove(data->irq); + for (c = 0; c < data->chip->nchans; c++) { + irq = irq_find_mapping(data->irq, c); + irq_dispose_mapping(irq); + } + irq_domain_remove(data->irq); - return err; + return err; } /* * I2C init/probing/exit functions */ static int pca954x_probe(struct i2c_client *client, - const struct i2c_device_id *id) + const struct i2c_device_id *id) { - struct i2c_adapter *adap = to_i2c_adapter(client->dev.parent); - struct pca954x_platform_data *pdata = dev_get_platdata(&client->dev); - struct device_node *of_node = client->dev.of_node; - bool idle_disconnect_dt; - struct gpio_desc *gpio; - int num, force, class; - struct i2c_mux_core *muxc; - struct pca954x *data; - const struct of_device_id *match; - int ret; + struct i2c_adapter *adap = to_i2c_adapter(client->dev.parent); + struct pca954x_platform_data *pdata = dev_get_platdata(&client->dev); + struct device_node *of_node = client->dev.of_node; + bool idle_disconnect_dt; + struct gpio_desc *gpio; + int num, force, class; + struct i2c_mux_core *muxc; + struct pca954x *data; + const struct of_device_id *match; + int ret; - if (!i2c_check_functionality(adap, I2C_FUNC_SMBUS_BYTE)) - return -ENODEV; + if (!i2c_check_functionality(adap, I2C_FUNC_SMBUS_BYTE)) + return -ENODEV; - muxc = i2c_mux_alloc(adap, &client->dev, - PCA954X_MAX_NCHANS, sizeof(*data), 0, - pca954x_select_chan, pca954x_deselect_mux); - if (!muxc) - return -ENOMEM; - data = i2c_mux_priv(muxc); + muxc = i2c_mux_alloc(adap, &client->dev, + PCA954X_MAX_NCHANS, sizeof(*data), 0, + pca954x_select_chan, pca954x_deselect_mux); + if (!muxc) + return -ENOMEM; + data = i2c_mux_priv(muxc); - i2c_set_clientdata(client, muxc); - data->client = client; + i2c_set_clientdata(client, muxc); + data->client = client; - /* Get the mux out of reset if a reset GPIO is specified. */ - gpio = devm_gpiod_get_optional(&client->dev, "reset", GPIOD_OUT_LOW); - if (IS_ERR(gpio)) - return PTR_ERR(gpio); + /* Get the mux out of reset if a reset GPIO is specified. */ + gpio = devm_gpiod_get_optional(&client->dev, "reset", GPIOD_OUT_LOW); + if (IS_ERR(gpio)) + return PTR_ERR(gpio); - /* Write the mux register at addr to verify - * that the mux is in fact present. This also - * initializes the mux to disconnected state. - */ - if ((i2c_smbus_write_byte(client, 0) < 0) && (force_create_bus == 0)) { - dev_warn(&client->dev, "probe failed\n"); - return -ENODEV; - } + /* Write the mux register at addr to verify + * that the mux is in fact present. This also + * initializes the mux to disconnected state. + */ + if ((i2c_smbus_write_byte(client, 0) < 0) && (force_create_bus == 0)) { + dev_warn(&client->dev, "probe failed\n"); + return -ENODEV; + } - match = of_match_device(of_match_ptr(pca954x_of_match), &client->dev); - if (match) - data->chip = of_device_get_match_data(&client->dev); - else - data->chip = &chips[id->driver_data]; + match = of_match_device(of_match_ptr(pca954x_of_match), &client->dev); + if (match) + data->chip = of_device_get_match_data(&client->dev); + else + data->chip = &chips[id->driver_data]; - data->last_chan = 0; /* force the first selection */ + data->last_chan = 0; /* force the first selection */ - idle_disconnect_dt = of_node && - of_property_read_bool(of_node, "i2c-mux-idle-disconnect"); + idle_disconnect_dt = of_node && + of_property_read_bool(of_node, "i2c-mux-idle-disconnect"); - ret = pca954x_irq_setup(muxc); - if (ret) - goto fail_del_adapters; + ret = pca954x_irq_setup(muxc); + if (ret) + goto fail_del_adapters; - /* Now create an adapter for each channel */ - for (num = 0; num < data->chip->nchans; num++) { - bool idle_disconnect_pd = false; + /* Now create an adapter for each channel */ + for (num = 0; num < data->chip->nchans; num++) { + bool idle_disconnect_pd = false; - force = 0; /* dynamic adap number */ - class = 0; /* no class by default */ - if (pdata) { - if (num < pdata->num_modes) { - /* force static number */ - force = pdata->modes[num].adap_id; - class = pdata->modes[num].class; - } else - /* discard unconfigured channels */ - break; - idle_disconnect_pd = pdata->modes[num].deselect_on_exit; - } - data->deselect |= (idle_disconnect_pd || - idle_disconnect_dt) << num; + force = 0; /* dynamic adap number */ + class = 0; /* no class by default */ + if (pdata) { + if (num < pdata->num_modes) { + /* force static number */ + force = pdata->modes[num].adap_id; + class = pdata->modes[num].class; + } else + /* discard unconfigured channels */ + break; + idle_disconnect_pd = pdata->modes[num].deselect_on_exit; + } + data->deselect |= (idle_disconnect_pd || + idle_disconnect_dt) << num; - ret = i2c_mux_add_adapter(muxc, force, num, class); - if (ret) - goto fail_del_adapters; - } + ret = i2c_mux_add_adapter(muxc, force, num, class); + if (ret) + goto fail_del_adapters; + } - dev_info(&client->dev, - "registered %d multiplexed busses for I2C %s %s\n", - num, data->chip->muxtype == pca954x_ismux - ? "mux" : "switch", client->name); + dev_info(&client->dev, + "registered %d multiplexed busses for I2C %s %s\n", + num, data->chip->muxtype == pca954x_ismux + ? "mux" : "switch", client->name); - return 0; + return 0; fail_del_adapters: - i2c_mux_del_adapters(muxc); - return ret; + i2c_mux_del_adapters(muxc); + return ret; } static int pca954x_remove(struct i2c_client *client) { - struct i2c_mux_core *muxc = i2c_get_clientdata(client); - struct pca954x *data = i2c_mux_priv(muxc); - int c, irq; + struct i2c_mux_core *muxc = i2c_get_clientdata(client); + struct pca954x *data = i2c_mux_priv(muxc); + int c, irq; - if (data->irq) { - for (c = 0; c < data->chip->nchans; c++) { - irq = irq_find_mapping(data->irq, c); - irq_dispose_mapping(irq); - } - irq_domain_remove(data->irq); - } + if (data->irq) { + for (c = 0; c < data->chip->nchans; c++) { + irq = irq_find_mapping(data->irq, c); + irq_dispose_mapping(irq); + } + irq_domain_remove(data->irq); + } - i2c_mux_del_adapters(muxc); - return 0; + i2c_mux_del_adapters(muxc); + return 0; } #ifdef CONFIG_PM_SLEEP static int pca954x_resume(struct device *dev) { - struct i2c_client *client = to_i2c_client(dev); - struct i2c_mux_core *muxc = i2c_get_clientdata(client); - struct pca954x *data = i2c_mux_priv(muxc); + struct i2c_client *client = to_i2c_client(dev); + struct i2c_mux_core *muxc = i2c_get_clientdata(client); + struct pca954x *data = i2c_mux_priv(muxc); - data->last_chan = 0; - return i2c_smbus_write_byte(client, 0); + data->last_chan = 0; + return i2c_smbus_write_byte(client, 0); } #endif static SIMPLE_DEV_PM_OPS(pca954x_pm, NULL, pca954x_resume); static struct i2c_driver pca954x_driver = { - .driver = { - .name = "pca954x", - .pm = &pca954x_pm, - .of_match_table = of_match_ptr(pca954x_of_match), - }, - .probe = pca954x_probe, - .remove = pca954x_remove, - .id_table = pca954x_id, + .driver = { + .name = "pca954x", + .pm = &pca954x_pm, + .of_match_table = of_match_ptr(pca954x_of_match), + }, + .probe = pca954x_probe, + .remove = pca954x_remove, + .id_table = pca954x_id, }; module_i2c_driver(pca954x_driver); diff --git a/platform/broadcom/sonic-platform-modules-ragile/common/modules/i2c-mux-pca9641.c b/platform/broadcom/sonic-platform-modules-ragile/common/modules/i2c-mux-pca9641.c index 02759ef062..501cfef8a9 100755 --- a/platform/broadcom/sonic-platform-modules-ragile/common/modules/i2c-mux-pca9641.c +++ b/platform/broadcom/sonic-platform-modules-ragile/common/modules/i2c-mux-pca9641.c @@ -40,22 +40,22 @@ * that only one of the masters is instantiated at any given time. */ -#define PCA9541_CONTROL 0x01 -#define PCA9541_ISTAT 0x02 +#define PCA9541_CONTROL 0x01 +#define PCA9541_ISTAT 0x02 -#define PCA9541_CTL_MYBUS (1 << 0) -#define PCA9541_CTL_NMYBUS (1 << 1) -#define PCA9541_CTL_BUSON (1 << 2) -#define PCA9541_CTL_NBUSON (1 << 3) -#define PCA9541_CTL_BUSINIT (1 << 4) -#define PCA9541_CTL_TESTON (1 << 6) -#define PCA9541_CTL_NTESTON (1 << 7) -#define PCA9541_ISTAT_INTIN (1 << 0) -#define PCA9541_ISTAT_BUSINIT (1 << 1) -#define PCA9541_ISTAT_BUSOK (1 << 2) -#define PCA9541_ISTAT_BUSLOST (1 << 3) -#define PCA9541_ISTAT_MYTEST (1 << 6) -#define PCA9541_ISTAT_NMYTEST (1 << 7) +#define PCA9541_CTL_MYBUS (1 << 0) +#define PCA9541_CTL_NMYBUS (1 << 1) +#define PCA9541_CTL_BUSON (1 << 2) +#define PCA9541_CTL_NBUSON (1 << 3) +#define PCA9541_CTL_BUSINIT (1 << 4) +#define PCA9541_CTL_TESTON (1 << 6) +#define PCA9541_CTL_NTESTON (1 << 7) +#define PCA9541_ISTAT_INTIN (1 << 0) +#define PCA9541_ISTAT_BUSINIT (1 << 1) +#define PCA9541_ISTAT_BUSOK (1 << 2) +#define PCA9541_ISTAT_BUSLOST (1 << 3) +#define PCA9541_ISTAT_MYTEST (1 << 6) +#define PCA9541_ISTAT_NMYTEST (1 << 7) #define PCA9641_ID 0x00 #define PCA9641_ID_MAGIC 0x38 #define PCA9641_CONTROL 0x01 @@ -78,12 +78,12 @@ #define PCA9641_STS_SCL_IO BIT(6) #define PCA9641_STS_SDA_IO BIT(7) #define PCA9641_RES_TIME 0x03 -#define BUSON (PCA9541_CTL_BUSON | PCA9541_CTL_NBUSON) -#define MYBUS (PCA9541_CTL_MYBUS | PCA9541_CTL_NMYBUS) -#define mybus(x) (!((x) & MYBUS) || ((x) & MYBUS) == MYBUS) -#define busoff(x) (!((x) & BUSON) || ((x) & BUSON) == BUSON) +#define BUSON (PCA9541_CTL_BUSON | PCA9541_CTL_NBUSON) +#define MYBUS (PCA9541_CTL_MYBUS | PCA9541_CTL_NMYBUS) +#define mybus(x) (!((x) & MYBUS) || ((x) & MYBUS) == MYBUS) +#define busoff(x) (!((x) & BUSON) || ((x) & BUSON) == BUSON) #define BUSOFF(x, y) (!((x) & PCA9641_CTL_LOCK_GRANT) && \ - !((y) & PCA9641_STS_OTHER_LOCK)) + !((y) & PCA9641_STS_OTHER_LOCK)) #define other_lock(x) ((x) & PCA9641_STS_OTHER_LOCK) #define lock_grant(x) ((x) & PCA9641_CTL_LOCK_GRANT) @@ -91,22 +91,22 @@ typedef struct i2c_muxs_struct_flag { - int nr; - char name[48]; - struct mutex update_lock; - int flag; + int nr; + char name[48]; + struct mutex update_lock; + int flag; }i2c_mux_flag; i2c_mux_flag pca_flag = { - .flag = -1, + .flag = -1, }; int pca9641_setmuxflag(int nr, int flag) { - if (pca_flag.nr == nr) { - pca_flag.flag = flag; - } - return 0; + if (pca_flag.nr == nr) { + pca_flag.flag = flag; + } + return 0; } EXPORT_SYMBOL(pca9641_setmuxflag); @@ -121,23 +121,23 @@ module_param(g_debug, int, S_IRUGO | S_IWUSR); /* arbitration timeouts, in jiffies */ -#define ARB_TIMEOUT (HZ / 8) /* 125 ms until forcing bus ownership */ -#define ARB2_TIMEOUT (HZ / 4) /* 250 ms until acquisition failure */ +#define ARB_TIMEOUT (HZ / 8) /* 125 ms until forcing bus ownership */ +#define ARB2_TIMEOUT (HZ / 4) /* 250 ms until acquisition failure */ /* arbitration retry delays, in us */ -#define SELECT_DELAY_SHORT 50 -#define SELECT_DELAY_LONG 1000 +#define SELECT_DELAY_SHORT 50 +#define SELECT_DELAY_LONG 1000 struct pca9541 { - struct i2c_client *client; - unsigned long select_timeout; - unsigned long arb_timeout; + struct i2c_client *client; + unsigned long select_timeout; + unsigned long arb_timeout; }; static const struct i2c_device_id pca9541_id[] = { - {"pca9541", 0}, - {"pca9641", 1}, - {} + {"pca9541", 0}, + {"pca9641", 1}, + {} }; MODULE_DEVICE_TABLE(i2c, pca9541_id); @@ -158,32 +158,32 @@ MODULE_DEVICE_TABLE(of, pca9541_of_match); */ static int pca9541_reg_write(struct i2c_client *client, u8 command, u8 val) { - struct i2c_adapter *adap = client->adapter; - int ret; + struct i2c_adapter *adap = client->adapter; + int ret; - if (adap->algo->master_xfer) { - struct i2c_msg msg; - char buf[2]; + if (adap->algo->master_xfer) { + struct i2c_msg msg; + char buf[2]; - msg.addr = client->addr; - msg.flags = 0; - msg.len = 2; - buf[0] = command; - buf[1] = val; - msg.buf = buf; - ret = __i2c_transfer(adap, &msg, 1); - } else { - union i2c_smbus_data data; + msg.addr = client->addr; + msg.flags = 0; + msg.len = 2; + buf[0] = command; + buf[1] = val; + msg.buf = buf; + ret = __i2c_transfer(adap, &msg, 1); + } else { + union i2c_smbus_data data; - data.byte = val; - ret = adap->algo->smbus_xfer(adap, client->addr, - client->flags, - I2C_SMBUS_WRITE, - command, - I2C_SMBUS_BYTE_DATA, &data); - } + data.byte = val; + ret = adap->algo->smbus_xfer(adap, client->addr, + client->flags, + I2C_SMBUS_WRITE, + command, + I2C_SMBUS_BYTE_DATA, &data); + } - return ret; + return ret; } /* @@ -192,42 +192,42 @@ static int pca9541_reg_write(struct i2c_client *client, u8 command, u8 val) */ static int pca9541_reg_read(struct i2c_client *client, u8 command) { - struct i2c_adapter *adap = client->adapter; - int ret; - u8 val; + struct i2c_adapter *adap = client->adapter; + int ret; + u8 val; - if (adap->algo->master_xfer) { - struct i2c_msg msg[2] = { - { - .addr = client->addr, - .flags = 0, - .len = 1, - .buf = &command - }, - { - .addr = client->addr, - .flags = I2C_M_RD, - .len = 1, - .buf = &val - } - }; - ret = __i2c_transfer(adap, msg, 2); - if (ret == 2) - ret = val; - else if (ret >= 0) - ret = -EIO; - } else { - union i2c_smbus_data data; + if (adap->algo->master_xfer) { + struct i2c_msg msg[2] = { + { + .addr = client->addr, + .flags = 0, + .len = 1, + .buf = &command + }, + { + .addr = client->addr, + .flags = I2C_M_RD, + .len = 1, + .buf = &val + } + }; + ret = __i2c_transfer(adap, msg, 2); + if (ret == 2) + ret = val; + else if (ret >= 0) + ret = -EIO; + } else { + union i2c_smbus_data data; - ret = adap->algo->smbus_xfer(adap, client->addr, - client->flags, - I2C_SMBUS_READ, - command, - I2C_SMBUS_BYTE_DATA, &data); - if (!ret) - ret = data.byte; - } - return ret; + ret = adap->algo->smbus_xfer(adap, client->addr, + client->flags, + I2C_SMBUS_READ, + command, + I2C_SMBUS_BYTE_DATA, &data); + if (!ret) + ret = data.byte; + } + return ret; } /* @@ -237,12 +237,12 @@ static int pca9541_reg_read(struct i2c_client *client, u8 command) /* Release bus. Also reset NTESTON and BUSINIT if it was set. */ static void pca9541_release_bus(struct i2c_client *client) { - int reg; + int reg; - reg = pca9541_reg_read(client, PCA9541_CONTROL); - if (reg >= 0 && !busoff(reg) && mybus(reg)) - pca9541_reg_write(client, PCA9541_CONTROL, - (reg & PCA9541_CTL_NBUSON) >> 1); + reg = pca9541_reg_read(client, PCA9541_CONTROL); + if (reg >= 0 && !busoff(reg) && mybus(reg)) + pca9541_reg_write(client, PCA9541_CONTROL, + (reg & PCA9541_CTL_NBUSON) >> 1); } /* @@ -251,16 +251,16 @@ static void pca9541_release_bus(struct i2c_client *client) * This multi-step process ensures that access contention is resolved * gracefully. * - * Bus Ownership Other master Action - * state requested access + * Bus Ownership Other master Action + * state requested access * ---------------------------------------------------- - * off - yes wait for arbitration timeout or - * for other master to drop request - * off no no take ownership - * off yes no turn on bus - * on yes - done - * on no - wait for arbitration timeout or - * for other master to release bus + * off - yes wait for arbitration timeout or + * for other master to drop request + * off no no take ownership + * off yes no turn on bus + * on yes - done + * on no - wait for arbitration timeout or + * for other master to release bus * * The main contention point occurs if the slave bus is off and both masters * request ownership at the same time. In this case, one master will turn on @@ -271,7 +271,7 @@ static void pca9541_release_bus(struct i2c_client *client) /* Control commands per PCA9541 datasheet */ static const u8 pca9541_control[16] = { - 4, 0, 1, 5, 4, 4, 5, 5, 0, 0, 1, 1, 0, 4, 5, 1 + 4, 0, 1, 5, 4, 4, 5, 5, 0, 0, 1, 1, 0, 4, 5, 1 }; /* @@ -284,187 +284,187 @@ static const u8 pca9541_control[16] = { */ static int pca9541_arbitrate(struct i2c_client *client) { - struct i2c_mux_core *muxc = i2c_get_clientdata(client); - struct pca9541 *data = i2c_mux_priv(muxc); - int reg; + struct i2c_mux_core *muxc = i2c_get_clientdata(client); + struct pca9541 *data = i2c_mux_priv(muxc); + int reg; - reg = pca9541_reg_read(client, PCA9541_CONTROL); - if (reg < 0) - return reg; + reg = pca9541_reg_read(client, PCA9541_CONTROL); + if (reg < 0) + return reg; - if (busoff(reg)) { - int istat; - /* - * Bus is off. Request ownership or turn it on unless - * other master requested ownership. - */ - istat = pca9541_reg_read(client, PCA9541_ISTAT); - if (!(istat & PCA9541_ISTAT_NMYTEST) - || time_is_before_eq_jiffies(data->arb_timeout)) { - /* - * Other master did not request ownership, - * or arbitration timeout expired. Take the bus. - */ - pca9541_reg_write(client, - PCA9541_CONTROL, - pca9541_control[reg & 0x0f] - | PCA9541_CTL_NTESTON); - data->select_timeout = SELECT_DELAY_SHORT; - } else { - /* - * Other master requested ownership. - * Set extra long timeout to give it time to acquire it. - */ - data->select_timeout = SELECT_DELAY_LONG * 2; - } - } else if (mybus(reg)) { - /* - * Bus is on, and we own it. We are done with acquisition. - * Reset NTESTON and BUSINIT, then return success. - */ - if (reg & (PCA9541_CTL_NTESTON | PCA9541_CTL_BUSINIT)) - pca9541_reg_write(client, - PCA9541_CONTROL, - reg & ~(PCA9541_CTL_NTESTON - | PCA9541_CTL_BUSINIT)); - return 1; - } else { - /* - * Other master owns the bus. - * If arbitration timeout has expired, force ownership. - * Otherwise request it. - */ - data->select_timeout = SELECT_DELAY_LONG; - if (time_is_before_eq_jiffies(data->arb_timeout)) { - /* Time is up, take the bus and reset it. */ - pca9541_reg_write(client, - PCA9541_CONTROL, - pca9541_control[reg & 0x0f] - | PCA9541_CTL_BUSINIT - | PCA9541_CTL_NTESTON); - } else { - /* Request bus ownership if needed */ - if (!(reg & PCA9541_CTL_NTESTON)) - pca9541_reg_write(client, - PCA9541_CONTROL, - reg | PCA9541_CTL_NTESTON); - } - } - return 0; + if (busoff(reg)) { + int istat; + /* + * Bus is off. Request ownership or turn it on unless + * other master requested ownership. + */ + istat = pca9541_reg_read(client, PCA9541_ISTAT); + if (!(istat & PCA9541_ISTAT_NMYTEST) + || time_is_before_eq_jiffies(data->arb_timeout)) { + /* + * Other master did not request ownership, + * or arbitration timeout expired. Take the bus. + */ + pca9541_reg_write(client, + PCA9541_CONTROL, + pca9541_control[reg & 0x0f] + | PCA9541_CTL_NTESTON); + data->select_timeout = SELECT_DELAY_SHORT; + } else { + /* + * Other master requested ownership. + * Set extra long timeout to give it time to acquire it. + */ + data->select_timeout = SELECT_DELAY_LONG * 2; + } + } else if (mybus(reg)) { + /* + * Bus is on, and we own it. We are done with acquisition. + * Reset NTESTON and BUSINIT, then return success. + */ + if (reg & (PCA9541_CTL_NTESTON | PCA9541_CTL_BUSINIT)) + pca9541_reg_write(client, + PCA9541_CONTROL, + reg & ~(PCA9541_CTL_NTESTON + | PCA9541_CTL_BUSINIT)); + return 1; + } else { + /* + * Other master owns the bus. + * If arbitration timeout has expired, force ownership. + * Otherwise request it. + */ + data->select_timeout = SELECT_DELAY_LONG; + if (time_is_before_eq_jiffies(data->arb_timeout)) { + /* Time is up, take the bus and reset it. */ + pca9541_reg_write(client, + PCA9541_CONTROL, + pca9541_control[reg & 0x0f] + | PCA9541_CTL_BUSINIT + | PCA9541_CTL_NTESTON); + } else { + /* Request bus ownership if needed */ + if (!(reg & PCA9541_CTL_NTESTON)) + pca9541_reg_write(client, + PCA9541_CONTROL, + reg | PCA9541_CTL_NTESTON); + } + } + return 0; } static int pca9541_select_chan(struct i2c_mux_core *muxc, u32 chan) { - struct pca9541 *data = i2c_mux_priv(muxc); - struct i2c_client *client = data->client; - int ret; - unsigned long timeout = jiffies + ARB2_TIMEOUT; - /* give up after this time */ + struct pca9541 *data = i2c_mux_priv(muxc); + struct i2c_client *client = data->client; + int ret; + unsigned long timeout = jiffies + ARB2_TIMEOUT; + /* give up after this time */ - data->arb_timeout = jiffies + ARB_TIMEOUT; - /* force bus ownership after this time */ + data->arb_timeout = jiffies + ARB_TIMEOUT; + /* force bus ownership after this time */ - do { - ret = pca9541_arbitrate(client); - if (ret) - return ret < 0 ? ret : 0; + do { + ret = pca9541_arbitrate(client); + if (ret) + return ret < 0 ? ret : 0; - if (data->select_timeout == SELECT_DELAY_SHORT) - udelay(data->select_timeout); - else - msleep(data->select_timeout / 1000); - } while (time_is_after_eq_jiffies(timeout)); + if (data->select_timeout == SELECT_DELAY_SHORT) + udelay(data->select_timeout); + else + msleep(data->select_timeout / 1000); + } while (time_is_after_eq_jiffies(timeout)); - return -ETIMEDOUT; + return -ETIMEDOUT; } static int pca9541_release_chan(struct i2c_mux_core *muxc, u32 chan) { struct pca9541 *data = i2c_mux_priv(muxc); - struct i2c_client *client = data->client; - pca9541_release_bus(client); - return 0; + struct i2c_client *client = data->client; + pca9541_release_bus(client); + return 0; } /* -* Arbitration management functions -*/ + * Arbitration management functions + */ static void pca9641_release_bus(struct i2c_client *client) { - pca9541_reg_write(client, PCA9641_CONTROL, 0x80); //master 0x80 + pca9541_reg_write(client, PCA9641_CONTROL, 0x80); //master 0x80 } /* -* Channel arbitration -* -* Return values: -* <0: error -* 0 : bus not acquired -* 1 : bus acquired -*/ + * Channel arbitration + * + * Return values: + * <0: error + * 0 : bus not acquired + * 1 : bus acquired + */ static int pca9641_arbitrate(struct i2c_client *client) { - struct i2c_mux_core *muxc = i2c_get_clientdata(client); - struct pca9541 *data = i2c_mux_priv(muxc); - int reg_ctl, reg_sts; + struct i2c_mux_core *muxc = i2c_get_clientdata(client); + struct pca9541 *data = i2c_mux_priv(muxc); + int reg_ctl, reg_sts; - reg_ctl = pca9541_reg_read(client, PCA9641_CONTROL); - if (reg_ctl < 0) - return reg_ctl; - reg_sts = pca9541_reg_read(client, PCA9641_STATUS); + reg_ctl = pca9541_reg_read(client, PCA9641_CONTROL); + if (reg_ctl < 0) + return reg_ctl; + reg_sts = pca9541_reg_read(client, PCA9641_STATUS); - if (BUSOFF(reg_ctl, reg_sts)) { - /* - * Bus is off. Request ownership or turn it on unless - * other master requested ownership. - */ - reg_ctl |= PCA9641_CTL_LOCK_REQ; - pca9541_reg_write(client, PCA9641_CONTROL, reg_ctl); - reg_ctl = pca9541_reg_read(client, PCA9641_CONTROL); + if (BUSOFF(reg_ctl, reg_sts)) { + /* + * Bus is off. Request ownership or turn it on unless + * other master requested ownership. + */ + reg_ctl |= PCA9641_CTL_LOCK_REQ; + pca9541_reg_write(client, PCA9641_CONTROL, reg_ctl); + reg_ctl = pca9541_reg_read(client, PCA9641_CONTROL); - if (lock_grant(reg_ctl)) { - /* - * Other master did not request ownership, - * or arbitration timeout expired. Take the bus. - */ - reg_ctl |= PCA9641_CTL_BUS_CONNECT - | PCA9641_CTL_LOCK_REQ; - pca9541_reg_write(client, PCA9641_CONTROL, reg_ctl); - data->select_timeout = SELECT_DELAY_SHORT; + if (lock_grant(reg_ctl)) { + /* + * Other master did not request ownership, + * or arbitration timeout expired. Take the bus. + */ + reg_ctl |= PCA9641_CTL_BUS_CONNECT + | PCA9641_CTL_LOCK_REQ; + pca9541_reg_write(client, PCA9641_CONTROL, reg_ctl); + data->select_timeout = SELECT_DELAY_SHORT; - return 1; - } else { - /* - * Other master requested ownership. - * Set extra long timeout to give it time to acquire it. - */ - data->select_timeout = SELECT_DELAY_LONG * 2; - } - } else if (lock_grant(reg_ctl)) { - /* - * Bus is on, and we own it. We are done with acquisition. - */ - reg_ctl |= PCA9641_CTL_BUS_CONNECT | PCA9641_CTL_LOCK_REQ; - pca9541_reg_write(client, PCA9641_CONTROL, reg_ctl); + return 1; + } else { + /* + * Other master requested ownership. + * Set extra long timeout to give it time to acquire it. + */ + data->select_timeout = SELECT_DELAY_LONG * 2; + } + } else if (lock_grant(reg_ctl)) { + /* + * Bus is on, and we own it. We are done with acquisition. + */ + reg_ctl |= PCA9641_CTL_BUS_CONNECT | PCA9641_CTL_LOCK_REQ; + pca9541_reg_write(client, PCA9641_CONTROL, reg_ctl); - return 1; - } else if (other_lock(reg_sts)) { - /* - * Other master owns the bus. - * If arbitration timeout has expired, force ownership. - * Otherwise request it. - */ - data->select_timeout = SELECT_DELAY_LONG; - reg_ctl |= PCA9641_CTL_LOCK_REQ; - pca9541_reg_write(client, PCA9641_CONTROL, reg_ctl); - } - return 0; + return 1; + } else if (other_lock(reg_sts)) { + /* + * Other master owns the bus. + * If arbitration timeout has expired, force ownership. + * Otherwise request it. + */ + data->select_timeout = SELECT_DELAY_LONG; + reg_ctl |= PCA9641_CTL_LOCK_REQ; + pca9541_reg_write(client, PCA9641_CONTROL, reg_ctl); + } + return 0; } int pca9641_select_chan(struct i2c_mux_core *muxc, u32 chan) { - struct pca9541 *data = i2c_mux_priv(muxc); + struct pca9541 *data = i2c_mux_priv(muxc); struct i2c_client *client = data->client; int ret; int result; @@ -472,42 +472,42 @@ int pca9641_select_chan(struct i2c_mux_core *muxc, u32 chan) /* give up after this time */ data->arb_timeout = jiffies + ARB_TIMEOUT; /* force bus ownership after this time */ - for (result = 0 ; result < PCA9641_RETRY_TIME ; result ++) { - do { - ret = pca9641_arbitrate(client); - if (ret == 1) { - return 0; - } - if (data->select_timeout == SELECT_DELAY_SHORT) - udelay(data->select_timeout); - else - msleep(data->select_timeout / 1000); - } while (time_is_after_eq_jiffies(timeout)); - timeout = jiffies + ARB2_TIMEOUT; - } + for (result = 0 ; result < PCA9641_RETRY_TIME ; result ++) { + do { + ret = pca9641_arbitrate(client); + if (ret == 1) { + return 0; + } + if (data->select_timeout == SELECT_DELAY_SHORT) + udelay(data->select_timeout); + else + msleep(data->select_timeout / 1000); + } while (time_is_after_eq_jiffies(timeout)); + timeout = jiffies + ARB2_TIMEOUT; + } return -ETIMEDOUT; } EXPORT_SYMBOL(pca9641_select_chan); static int pca9641_release_chan(struct i2c_mux_core *muxc, u32 chan) { - struct pca9541 *data = i2c_mux_priv(muxc); - struct i2c_client *client = data->client; - if (pca_flag.flag) { - pca9641_release_bus(client); - } - return 0; + struct pca9541 *data = i2c_mux_priv(muxc); + struct i2c_client *client = data->client; + if (pca_flag.flag) { + pca9641_release_bus(client); + } + return 0; } static int pca9641_detect_id(struct i2c_client *client) { - int reg; + int reg; - reg = pca9541_reg_read(client, PCA9641_ID); - if (reg == PCA9641_ID_MAGIC) - return 1; - else - return 0; + reg = pca9541_reg_read(client, PCA9641_ID); + if (reg == PCA9641_ID_MAGIC) + return 1; + else + return 0; } @@ -517,51 +517,51 @@ static int pca9641_recordflag(struct i2c_adapter *adap) { return -1 ; } pca_flag.nr = adap->nr; - PCA_DEBUG(" adap->nr:%d\n", adap->nr); - snprintf(pca_flag.name, sizeof(pca_flag.name),adap->name); + PCA_DEBUG(" adap->nr:%d\n", adap->nr); + snprintf(pca_flag.name, sizeof(pca_flag.name),adap->name); return 0; } static void i2c_lock_adapter(struct i2c_adapter *adapter){ - struct i2c_adapter *parent = i2c_parent_is_i2c_adapter(adapter); - if (parent) - i2c_lock_adapter(parent); - else - rt_mutex_lock(&adapter->bus_lock); + struct i2c_adapter *parent = i2c_parent_is_i2c_adapter(adapter); + if (parent) + i2c_lock_adapter(parent); + else + rt_mutex_lock(&adapter->bus_lock); } void i2c_unlock_adapter(struct i2c_adapter *adapter) { - struct i2c_adapter *parent = i2c_parent_is_i2c_adapter(adapter); + struct i2c_adapter *parent = i2c_parent_is_i2c_adapter(adapter); - if (parent) - i2c_unlock_adapter(parent); - else - rt_mutex_unlock(&adapter->bus_lock); + if (parent) + i2c_unlock_adapter(parent); + else + rt_mutex_unlock(&adapter->bus_lock); } /* * I2C init/probing/exit functions */ static int pca9541_probe(struct i2c_client *client, - const struct i2c_device_id *id) + const struct i2c_device_id *id) { - struct i2c_adapter *adap = client->adapter; - struct pca954x_platform_data *pdata = dev_get_platdata(&client->dev); + struct i2c_adapter *adap = client->adapter; + struct pca954x_platform_data *pdata = dev_get_platdata(&client->dev); struct i2c_mux_core *muxc; - struct pca9541 *data; - int force; - int ret = -ENODEV; + struct pca9541 *data; + int force; + int ret = -ENODEV; int detect_id; - if (!i2c_check_functionality(adap, I2C_FUNC_SMBUS_BYTE_DATA)) - return -ENODEV; + if (!i2c_check_functionality(adap, I2C_FUNC_SMBUS_BYTE_DATA)) + return -ENODEV; detect_id = pca9641_detect_id(client); - /* - * I2C accesses are unprotected here. - * We have to lock the adapter before releasing the bus. - */ + /* + * I2C accesses are unprotected here. + * We have to lock the adapter before releasing the bus. + */ if (detect_id == 0) { i2c_lock_adapter(adap); pca9541_release_bus(client); @@ -572,68 +572,68 @@ static int pca9541_probe(struct i2c_client *client, i2c_unlock_adapter(adap); } - /* Create mux adapter */ + /* Create mux adapter */ - force = 0; - if (pdata) - force = pdata->modes[0].adap_id; + force = 0; + if (pdata) + force = pdata->modes[0].adap_id; if (detect_id == 0) { muxc = i2c_mux_alloc(adap, &client->dev, 1, sizeof(*data), - I2C_MUX_ARBITRATOR, - pca9541_select_chan, pca9541_release_chan); - if (!muxc) - return -ENOMEM; + I2C_MUX_ARBITRATOR, + pca9541_select_chan, pca9541_release_chan); + if (!muxc) + return -ENOMEM; - data = i2c_mux_priv(muxc); - data->client = client; + data = i2c_mux_priv(muxc); + data->client = client; - i2c_set_clientdata(client, muxc); + i2c_set_clientdata(client, muxc); - ret = i2c_mux_add_adapter(muxc, force, 0, 0); - if (ret) - return ret; + ret = i2c_mux_add_adapter(muxc, force, 0, 0); + if (ret) + return ret; } else { - muxc = i2c_mux_alloc(adap, &client->dev, 1, sizeof(*data), - I2C_MUX_ARBITRATOR, - pca9641_select_chan, pca9641_release_chan); - if (!muxc) - return -ENOMEM; + muxc = i2c_mux_alloc(adap, &client->dev, 1, sizeof(*data), + I2C_MUX_ARBITRATOR, + pca9641_select_chan, pca9641_release_chan); + if (!muxc) + return -ENOMEM; - data = i2c_mux_priv(muxc); - data->client = client; + data = i2c_mux_priv(muxc); + data->client = client; - i2c_set_clientdata(client, muxc); + i2c_set_clientdata(client, muxc); - ret = i2c_mux_add_adapter(muxc, force, 0, 0); - if (ret) - return ret; + ret = i2c_mux_add_adapter(muxc, force, 0, 0); + if (ret) + return ret; } - pca9641_recordflag(muxc->adapter[0]); + pca9641_recordflag(muxc->adapter[0]); - dev_info(&client->dev, "registered master selector for I2C %s\n", - client->name); + dev_info(&client->dev, "registered master selector for I2C %s\n", + client->name); - return 0; + return 0; } static int pca9541_remove(struct i2c_client *client) { - struct i2c_mux_core *muxc = i2c_get_clientdata(client); + struct i2c_mux_core *muxc = i2c_get_clientdata(client); - i2c_mux_del_adapters(muxc); - return 0; + i2c_mux_del_adapters(muxc); + return 0; } static struct i2c_driver pca9641_driver = { - .driver = { - .name = "pca9641", - .of_match_table = of_match_ptr(pca9541_of_match), - }, - .probe = pca9541_probe, - .remove = pca9541_remove, - .id_table = pca9541_id, + .driver = { + .name = "pca9641", + .of_match_table = of_match_ptr(pca9541_of_match), + }, + .probe = pca9541_probe, + .remove = pca9541_remove, + .id_table = pca9541_id, }; module_i2c_driver(pca9641_driver); diff --git a/platform/broadcom/sonic-platform-modules-ragile/common/modules/lpc_cpld_i2c_ocores.c b/platform/broadcom/sonic-platform-modules-ragile/common/modules/lpc_cpld_i2c_ocores.c new file mode 100755 index 0000000000..7115fdabec --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ragile/common/modules/lpc_cpld_i2c_ocores.c @@ -0,0 +1,837 @@ +/* + * i2c-ocores.c: I2C bus driver for OpenCores I2C controller + * (http://www.opencores.org/projects.cgi/web/i2c/overview). + * + * Peter Korsgaard + * + * Support for the GRLIB port of the controller by + * Andreas Larsson + * + * This file is licensed under the terms of the GNU General Public License + * version 2. This program is licensed "as is" without any warranty of any + * kind, whether express or implied. + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#define OCORES_FLAG_POLL BIT(0) + +struct ocores_i2c { + void __iomem *base; + u32 reg_shift; + u32 reg_io_width; + unsigned long flags; + wait_queue_head_t wait; + struct i2c_adapter adap; + struct i2c_msg *msg; + int pos; + int nmsgs; + int state; /* see STATE_ */ + spinlock_t process_lock; + int clock_khz; + void (*setreg)(struct ocores_i2c *i2c, int reg, u8 value); + u8 (*getreg)(struct ocores_i2c *i2c, int reg); +}; + +/* registers */ +#define OCI2C_PRELOW 0x0 +#define OCI2C_PREHIGH 0x1 +#define OCI2C_CONTROL 0x2 +#define OCI2C_DATA 0x3 +#define OCI2C_CMD 0x4 /* write only */ +#define OCI2C_STATUS 0x4 /* read only, same address as OCI2C_CMD */ + +#define OCI2C_TRAN_REV 0x14 +#define OCI2C_CMD_REV 0x18 + + +#define OCI2C_CTRL_IEN 0x40 +#define OCI2C_CTRL_EN 0x80 + +#define OCI2C_CMD_START 0x91 +#define OCI2C_CMD_STOP 0x41 +#define OCI2C_CMD_READ 0x21 +#define OCI2C_CMD_WRITE 0x11 +#define OCI2C_CMD_READ_ACK 0x21 +#define OCI2C_CMD_READ_NACK 0x29 +#define OCI2C_CMD_IACK 0x01 + +#define OCI2C_STAT_IF 0x01 +#define OCI2C_STAT_TIP 0x02 +#define OCI2C_STAT_ARBLOST 0x20 +#define OCI2C_STAT_BUSY 0x40 +#define OCI2C_STAT_NACK 0x80 + +#define STATE_DONE 0 +#define STATE_START 1 +#define STATE_WRITE 2 +#define STATE_READ 3 +#define STATE_ERROR 4 + +#define TYPE_OCORES 0 +#define TYPE_GRLIB 1 +#define OCI2C_WAIT_SLEEP 40 + +int g_lpc_cpld_i2c_debug = 0; +int g_lpc_cpld_i2c_irq = 0; +int g_lpc_cpld_i2c_error = 0; + +module_param(g_lpc_cpld_i2c_debug, int, S_IRUGO | S_IWUSR); +module_param(g_lpc_cpld_i2c_error, int, S_IRUGO | S_IWUSR); +module_param(g_lpc_cpld_i2c_irq, int, S_IRUGO | S_IWUSR); + +int g_irq_dump_debug = 0; +module_param(g_irq_dump_debug, int, S_IRUGO | S_IWUSR); +#define LPC_CPLD_I2C_DEBUG_DUMP(fmt, args...) do { \ + if (g_irq_dump_debug) { \ + printk(KERN_ERR ""fmt, ## args); \ + } \ +} while (0) +int g_irq_invalid_cnt = 0; +module_param(g_irq_invalid_cnt, int, S_IRUGO | S_IWUSR); +#define LPC_CPLD_I2C_DEBUG_XFER(fmt, args...) do { \ + if (g_lpc_cpld_i2c_irq) { \ + printk(KERN_ERR "[LPC_CPLD_I2C_OCORES][XFER][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \ + } \ +} while (0) + +#define LPC_CPLD_I2C_DEBUG_VERBOSE(fmt, args...) do { \ + if (g_lpc_cpld_i2c_debug) { \ + printk(KERN_ERR "[LPC_CPLD_I2C_OCORES][VER][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \ + } \ +} while (0) + +#define LPC_CPLD_I2C_DEBUG_ERROR(fmt, args...) do { \ + if (g_lpc_cpld_i2c_error) { \ + printk(KERN_ERR "[LPC_CPLD_I2C_OCORES][ERR][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \ + } \ +} while (0) + +static int g_lpc_cpld_i2c_irq_flag = 1; + +module_param(g_lpc_cpld_i2c_irq_flag, int, S_IRUGO | S_IWUSR); + +static void oc_debug_dump_reg(struct ocores_i2c *i2c); +static void oc_setreg_8(struct ocores_i2c *i2c, int reg, u8 value) +{ + u64 base = (u64)i2c->base; + + outb(value, (u16)base + reg); +} + +static inline u8 oc_getreg_8(struct ocores_i2c *i2c, int reg) +{ + u64 base = (u64)i2c->base; + + return inb((u16)base + reg); +} + +static inline void oc_setreg(struct ocores_i2c *i2c, int reg, u8 value) +{ + i2c->setreg(i2c, reg, value); +} + +static inline u8 oc_getreg(struct ocores_i2c *i2c, int reg) +{ + u8 status; + + status = i2c->getreg(i2c, reg); + return status; +} + +#define LPC_CPLD_I2C_SPIN_LOCK(lock, flags) spin_lock_irqsave(&(lock), (flags)) +#define LPC_CPLD_I2C_SPIN_UNLOCK(lock, flags) spin_unlock_irqrestore(&(lock), (flags)) + +static void ocores_process(struct ocores_i2c *i2c, u8 stat) +{ + struct i2c_msg *msg = i2c->msg; + + LPC_CPLD_I2C_DEBUG_XFER("Enter nr %d.\n", i2c->adap.nr); + + /* + * If we spin here is because we are in timeout, so we are going + * to be in STATE_ERROR. See ocores_process_timeout() + */ + if ((i2c->state == STATE_DONE) || (i2c->state == STATE_ERROR)) { + /* stop has been sent */ + oc_setreg(i2c, OCI2C_CMD, OCI2C_CMD_IACK); + wake_up(&i2c->wait); + LPC_CPLD_I2C_DEBUG_XFER("stop has been sent, exit.\n"); + goto out; + } + + /* error */ + if (stat & OCI2C_STAT_ARBLOST) { + i2c->state = STATE_ERROR; + oc_setreg(i2c, OCI2C_CMD, OCI2C_CMD_STOP); + LPC_CPLD_I2C_DEBUG_XFER("error, exit.\n"); + goto out; + } + + if ((i2c->state == STATE_START) || (i2c->state == STATE_WRITE)) { + i2c->state = + (msg->flags & I2C_M_RD) ? STATE_READ : STATE_WRITE; + + if (stat & OCI2C_STAT_NACK) { + i2c->state = STATE_ERROR; + oc_setreg(i2c, OCI2C_CMD, OCI2C_CMD_STOP); + LPC_CPLD_I2C_DEBUG_XFER("OCI2C_STAT_NACK, exit.\n"); + goto out; + } + } else + msg->buf[i2c->pos++] = oc_getreg(i2c, OCI2C_DATA); + + /* end of msg */ + if (i2c->pos == msg->len) { + LPC_CPLD_I2C_DEBUG_XFER("Enter end of msg.\n"); + i2c->nmsgs--; + i2c->msg++; + i2c->pos = 0; + msg = i2c->msg; + + if (i2c->nmsgs) { /* end? */ + /* send start */ + if (!(msg->flags & I2C_M_NOSTART)) { + u8 addr = (msg->addr << 1); + + if (msg->flags & I2C_M_RD) + addr |= 1; + + i2c->state = STATE_START; + + oc_setreg(i2c, OCI2C_DATA, addr); + oc_setreg(i2c, OCI2C_CMD, OCI2C_CMD_START); + LPC_CPLD_I2C_DEBUG_XFER("send start, exit.\n"); + goto out; + } + + i2c->state = (msg->flags & I2C_M_RD) + ? STATE_READ : STATE_WRITE; + } else { + i2c->state = STATE_DONE; + oc_setreg(i2c, OCI2C_CMD, OCI2C_CMD_STOP); + LPC_CPLD_I2C_DEBUG_XFER("send OCI2C_CMD_STOP, exit.\n"); + goto out; + } + } + + if (i2c->state == STATE_READ) { + oc_setreg(i2c, OCI2C_CMD, i2c->pos == (msg->len-1) ? + OCI2C_CMD_READ_NACK : OCI2C_CMD_READ_ACK); + } else { + oc_setreg(i2c, OCI2C_DATA, msg->buf[i2c->pos++]); + oc_setreg(i2c, OCI2C_CMD, OCI2C_CMD_WRITE); + } + +out: + LPC_CPLD_I2C_DEBUG_XFER("normal, exit nr %d.\n", i2c->adap.nr); +} + +static irqreturn_t ocores_isr(int irq, void *dev_id) +{ + struct ocores_i2c *i2c = dev_id; + unsigned long flags; + u8 stat; + if (!i2c) { + return IRQ_NONE; + } + + LPC_CPLD_I2C_SPIN_LOCK(i2c->process_lock, flags); + stat = oc_getreg(i2c, OCI2C_STATUS); + + if (!(stat & OCI2C_STAT_IF)) { + g_irq_invalid_cnt++; + LPC_CPLD_I2C_SPIN_UNLOCK(i2c->process_lock, flags); + return IRQ_NONE; + } + + LPC_CPLD_I2C_DEBUG_XFER("Enter, irq %d nr %d addr 0x%x.\n", irq, i2c->adap.nr, i2c->msg->addr); + ocores_process(i2c, stat); + LPC_CPLD_I2C_DEBUG_XFER("Leave, irq %d nr %d addr 0x%x.\n", irq, i2c->adap.nr, i2c->msg->addr); + LPC_CPLD_I2C_SPIN_UNLOCK(i2c->process_lock, flags); + + return IRQ_HANDLED; +} + +/** + * Process timeout event + * @i2c: ocores I2C device instance + */ +static void ocores_process_timeout(struct ocores_i2c *i2c) +{ + unsigned long flags; + + LPC_CPLD_I2C_SPIN_LOCK(i2c->process_lock, flags); + i2c->state = STATE_ERROR; + oc_setreg(i2c, OCI2C_CMD, OCI2C_CMD_STOP); + mdelay(1); + LPC_CPLD_I2C_SPIN_UNLOCK(i2c->process_lock, flags); + +} + +/** + * Wait until something change in a given register + * @i2c: ocores I2C device instance + * @reg: register to query + * @mask: bitmask to apply on register value + * @val: expected result + * @timeout: timeout in jiffies + * + * Timeout is necessary to avoid to stay here forever when the chip + * does not answer correctly. + * + * Return: 0 on success, -ETIMEDOUT on timeout + */ +static int ocores_wait(struct ocores_i2c *i2c, + int reg, u8 mask, u8 val, + const unsigned long timeout) +{ + u8 status; + unsigned long j, jiffies_tmp; + unsigned int usleep; + usleep = OCI2C_WAIT_SLEEP; + j = jiffies + timeout; + while (1) { + jiffies_tmp = jiffies; + status = oc_getreg(i2c, reg); + + if ((status & mask) == val) + break; + + if (time_after(jiffies_tmp, j)) { + LPC_CPLD_I2C_DEBUG_XFER("STATUS timeout, mask[0x%x] val[0x%x] status[0x%x]\n", mask, val, status); + return -ETIMEDOUT; + } + usleep_range(usleep,usleep + 1); + } + return 0; +} + +/** + * Wait until is possible to process some data + * @i2c: ocores I2C device instance + * + * Used when the device is in polling mode (interrupts disabled). + * + * Return: 0 on success, -ETIMEDOUT on timeout + */ +static int ocores_poll_wait(struct ocores_i2c *i2c) +{ + u8 mask; + int err; + + if (i2c->state == STATE_DONE || i2c->state == STATE_ERROR) { + /* transfer is over */ + mask = OCI2C_STAT_BUSY; + } else { + /* on going transfer */ + mask = OCI2C_STAT_TIP; + udelay((8 * 1000) / i2c->clock_khz); + } + + /* + * once we are here we expect to get the expected result immediately + * so if after 1ms we timeout then something is broken. + */ + err = ocores_wait(i2c, OCI2C_STATUS, mask, 0, msecs_to_jiffies(100)); + if (err) { + LPC_CPLD_I2C_DEBUG_XFER("STATUS timeout, bit 0x%x did not clear in 1ms, err %d\n", mask, err); + } + + return err; +} + + +/** + * It handles an IRQ-less transfer + * @i2c: ocores I2C device instance + * + * Even if IRQ are disabled, the I2C OpenCore IP behavior is exactly the same + * (only that IRQ are not produced). This means that we can re-use entirely + * ocores_isr(), we just add our polling code around it. + * + * It can run in atomic context + */ +static int ocores_process_polling(struct ocores_i2c *i2c) +{ + irqreturn_t ret; + int err; + while (1) { + err = ocores_poll_wait(i2c); + if (err) { + i2c->state = STATE_ERROR; + break; /* timeout */ + } + + ret = ocores_isr(-1, i2c); + if (ret == IRQ_NONE) + break; /* all messages have been transfered */ + } + return err; +} + +static int ocores_xfer_core(struct ocores_i2c *i2c, + struct i2c_msg *msgs, int num, + bool polling) +{ + int ret; + unsigned long flags; + u8 ctrl; + + LPC_CPLD_I2C_DEBUG_XFER("Enter.polling %d\n", polling); + LPC_CPLD_I2C_SPIN_LOCK(i2c->process_lock, flags); + ctrl = oc_getreg(i2c, OCI2C_CONTROL); + if (polling) + oc_setreg(i2c, OCI2C_CONTROL, ctrl & ~OCI2C_CTRL_IEN); + else + oc_setreg(i2c, OCI2C_CONTROL, ctrl | OCI2C_CTRL_IEN); + + i2c->msg = msgs; + i2c->pos = 0; + i2c->nmsgs = num; + i2c->state = STATE_START; + + oc_setreg(i2c, OCI2C_DATA, + (i2c->msg->addr << 1) | + ((i2c->msg->flags & I2C_M_RD) ? 1:0)); + + oc_setreg(i2c, OCI2C_CMD, OCI2C_CMD_START); + LPC_CPLD_I2C_SPIN_UNLOCK(i2c->process_lock, flags); + + if (polling) { + ret = ocores_process_polling(i2c); + if (ret) { /* timeout */ + ocores_process_timeout(i2c); + return -ETIMEDOUT; + } + } else { + ret = wait_event_timeout(i2c->wait, + (i2c->state == STATE_ERROR) || + (i2c->state == STATE_DONE), HZ); + if (ret == 0) { + ocores_process_timeout(i2c); + return -ETIMEDOUT; + } + } + + return (i2c->state == STATE_DONE) ? num : -EIO; +} + +static int ocores_xfer_polling(struct i2c_adapter *adap, + struct i2c_msg *msgs, int num) +{ + LPC_CPLD_I2C_DEBUG_XFER("Enter.\n"); + return ocores_xfer_core(i2c_get_adapdata(adap), msgs, num, true); +} + +static int ocores_xfer(struct i2c_adapter *adap, + struct i2c_msg *msgs, int num) +{ + struct ocores_i2c *i2c = i2c_get_adapdata(adap); + + if (i2c->flags & OCORES_FLAG_POLL) + return ocores_xfer_polling(adap, msgs, num); + return ocores_xfer_core(i2c, msgs, num, false); +} + +static void ocores_init(struct ocores_i2c *i2c) +{ + int prescale; + u8 ctrl = oc_getreg(i2c, OCI2C_CONTROL); + + LPC_CPLD_I2C_DEBUG_XFER("Enter.\n"); + spin_lock_init(&i2c->process_lock); + + /* make sure the device is disabled */ + oc_setreg(i2c, OCI2C_CONTROL, ctrl & ~(OCI2C_CTRL_EN|OCI2C_CTRL_IEN)); + + prescale = (i2c->clock_khz / (5*100)) - 1; + oc_setreg(i2c, OCI2C_PRELOW, prescale & 0xff); + oc_setreg(i2c, OCI2C_PREHIGH, prescale >> 8); + LPC_CPLD_I2C_DEBUG_VERBOSE("i2c->base 0x%p, i2c->clock_khz %d, prescale 0x%x.\n", i2c->base, i2c->clock_khz, prescale); + + /* Init the device */ + oc_setreg(i2c, OCI2C_CMD, OCI2C_CMD_IACK); + oc_setreg(i2c, OCI2C_CONTROL, ctrl | OCI2C_CTRL_EN); +} + + +static u32 ocores_func(struct i2c_adapter *adap) +{ + return I2C_FUNC_I2C | I2C_FUNC_SMBUS_EMUL; +} + +static const struct i2c_algorithm ocores_algorithm = { + .master_xfer = ocores_xfer, + .functionality = ocores_func, +}; + +static struct i2c_adapter ocores_adapter = { + .owner = THIS_MODULE, + .name = "rg-cpld-ocrore-i2c", + .class = I2C_CLASS_HWMON | I2C_CLASS_SPD | I2C_CLASS_DEPRECATED, + .algo = &ocores_algorithm, +}; + +static const struct of_device_id ocores_i2c_match[] = { + { + .compatible = "opencores,rg-cpld-ocrore-i2c", + .data = (void *)TYPE_OCORES, + }, + {}, +}; +MODULE_DEVICE_TABLE(of, ocores_i2c_match); + +#ifdef CONFIG_OF +/* Read and write functions for the GRLIB port of the controller. Registers are + * 32-bit big endian and the PRELOW and PREHIGH registers are merged into one + * register. The subsequent registers has their offset decreased accordingly. */ +static u8 oc_getreg_grlib(struct ocores_i2c *i2c, int reg) +{ + u32 rd; + int rreg = reg; + if (reg != OCI2C_PRELOW) + rreg--; + rd = ioread32be(i2c->base + (rreg << i2c->reg_shift)); + if (reg == OCI2C_PREHIGH) + return (u8)(rd >> 8); + else + return (u8)rd; +} + +static void oc_setreg_grlib(struct ocores_i2c *i2c, int reg, u8 value) +{ + u32 curr, wr; + int rreg = reg; + if (reg != OCI2C_PRELOW) + rreg--; + if (reg == OCI2C_PRELOW || reg == OCI2C_PREHIGH) { + curr = ioread32be(i2c->base + (rreg << i2c->reg_shift)); + if (reg == OCI2C_PRELOW) + wr = (curr & 0xff00) | value; + else + wr = (((u32)value) << 8) | (curr & 0xff); + } else { + wr = value; + } + iowrite32be(wr, i2c->base + (rreg << i2c->reg_shift)); +} + +static int ocores_i2c_of_probe(struct platform_device *pdev, + struct ocores_i2c *i2c) +{ + struct device_node *np = pdev->dev.of_node; + const struct of_device_id *match; + u32 val; + + LPC_CPLD_I2C_DEBUG_VERBOSE("Enter ocores_i2c_of_probe.\n"); + if (of_property_read_u32(np, "reg-shift", &i2c->reg_shift)) { + /* no 'reg-shift', check for deprecated 'regstep' */ + if (!of_property_read_u32(np, "regstep", &val)) { + if (!is_power_of_2(val)) { + dev_err(&pdev->dev, "invalid regstep %d\n", + val); + return -EINVAL; + } + i2c->reg_shift = ilog2(val); + dev_warn(&pdev->dev, + "regstep property deprecated, use reg-shift\n"); + } + } + + if (of_property_read_u32(np, "clock-frequency", &val)) { + dev_err(&pdev->dev, + "Missing required parameter 'clock-frequency'\n"); + return -ENODEV; + } + i2c->clock_khz = val / 1000; + + of_property_read_u32(pdev->dev.of_node, "reg-io-width", + &i2c->reg_io_width); + + match = of_match_node(ocores_i2c_match, pdev->dev.of_node); + if (match && (long)match->data == TYPE_GRLIB) { + dev_dbg(&pdev->dev, "GRLIB variant of i2c-ocores\n"); + i2c->setreg = oc_setreg_grlib; + i2c->getreg = oc_getreg_grlib; + } + + return 0; +} +#else +#define ocores_i2c_of_probe(pdev,i2c) -ENODEV +#endif + +static void oc_debug_dump_reg(struct ocores_i2c *i2c) +{ + if (i2c) { + LPC_CPLD_I2C_DEBUG_DUMP("base: %p.\n", i2c->base); + LPC_CPLD_I2C_DEBUG_DUMP("reg_shift: %d.\n", i2c->reg_shift); + LPC_CPLD_I2C_DEBUG_DUMP("reg_io_width: %d.\n", i2c->reg_io_width); + LPC_CPLD_I2C_DEBUG_DUMP("adap.nr: %d.\n", i2c->adap.nr); + LPC_CPLD_I2C_DEBUG_DUMP("msg: %p.\n", i2c->msg); + if (i2c->msg) { + LPC_CPLD_I2C_DEBUG_DUMP("msg->buf: %p.\n", i2c->msg->buf); + LPC_CPLD_I2C_DEBUG_DUMP("msg->addr: 0x%x.\n", i2c->msg->addr); + LPC_CPLD_I2C_DEBUG_DUMP("msg->flags: 0x%x.\n", i2c->msg->flags); + LPC_CPLD_I2C_DEBUG_DUMP("msg->len: %d.\n", i2c->msg->len); + } else { + LPC_CPLD_I2C_DEBUG_DUMP("msg: %p is null.\n", i2c->msg); + } + + LPC_CPLD_I2C_DEBUG_DUMP("pos: %d.\n", i2c->pos); + LPC_CPLD_I2C_DEBUG_DUMP("nmsgs: %d.\n", i2c->nmsgs); + LPC_CPLD_I2C_DEBUG_DUMP("state: %d.\n", i2c->state); + LPC_CPLD_I2C_DEBUG_DUMP("clock_khz: %d.\n", i2c->clock_khz); + LPC_CPLD_I2C_DEBUG_DUMP("setreg: %p.\n", i2c->setreg); + LPC_CPLD_I2C_DEBUG_DUMP("getreg: %p.\n", i2c->getreg); + if (i2c->getreg) { + LPC_CPLD_I2C_DEBUG_DUMP("OCI2C_PRELOW: 0x%02x.\n", oc_getreg(i2c, OCI2C_PRELOW)); + LPC_CPLD_I2C_DEBUG_DUMP("OCI2C_PREHIGH: 0x%02x.\n", oc_getreg(i2c, OCI2C_PREHIGH)); + LPC_CPLD_I2C_DEBUG_DUMP("OCI2C_CONTROL: 0x%02x.\n", oc_getreg(i2c, OCI2C_CONTROL)); + LPC_CPLD_I2C_DEBUG_DUMP("OCI2C_DATA: 0x%02x.\n", oc_getreg(i2c, OCI2C_DATA)); + LPC_CPLD_I2C_DEBUG_DUMP("OCI2C_CMD: 0x%02x.\n", oc_getreg(i2c, OCI2C_CMD)); + LPC_CPLD_I2C_DEBUG_DUMP("OCI2C_STATUS: 0x%02x.\n", oc_getreg(i2c, OCI2C_STATUS)); + } else { + LPC_CPLD_I2C_DEBUG_DUMP("getreg: %p is null.\n", i2c->getreg); + } + } else { + LPC_CPLD_I2C_DEBUG_DUMP("i2c %p is null.\n", i2c); + } +} + +void oc_debug_dump_reg_exception(void) +{ + int bus_beg, bus_end, bus; + struct i2c_adapter *adap; + struct ocores_i2c *adap_data; + + bus_beg = 1; + bus_end = 14; + for (bus = bus_beg; bus <= bus_end; bus++) { + adap = i2c_get_adapter(bus); + if (adap) { + adap_data = (struct ocores_i2c *)i2c_get_adapdata(adap); + if (adap_data) { + LPC_CPLD_I2C_DEBUG_DUMP("bus %d call oc_debug_dump_reg begin.\n", bus); + oc_debug_dump_reg(adap_data); + LPC_CPLD_I2C_DEBUG_DUMP("bus %d call oc_debug_dump_reg end.\n", bus); + } else { + LPC_CPLD_I2C_DEBUG_DUMP("bus %d i2c_get_adapdata null.\n", bus); + } + i2c_put_adapter(adap); + } else { + LPC_CPLD_I2C_DEBUG_DUMP("bus %d i2c_get_adapter null.\n", bus); + } + } +} + +static ssize_t show_oc_debug_value(struct device *dev, struct device_attribute *da, char *buf) +{ + oc_debug_dump_reg_exception(); + return 0; +} + +static SENSOR_DEVICE_ATTR(oc_debug, S_IRUGO | S_IWUSR, show_oc_debug_value, NULL, 0x15); + +static struct attribute *oc_debug_sysfs_attrs[] = { + &sensor_dev_attr_oc_debug.dev_attr.attr, + NULL +}; + +static const struct attribute_group oc_debug_sysfs_group = { + .attrs = oc_debug_sysfs_attrs, +}; + +static void oc_debug_sysfs_init(struct platform_device *pdev) +{ + int ret; + + ret = sysfs_create_group(&pdev->dev.kobj, &oc_debug_sysfs_group); + LPC_CPLD_I2C_DEBUG_VERBOSE("sysfs_create_group ret %d.\n", ret); + return; +} + +static void oc_debug_sysfs_exit(struct platform_device *pdev) +{ + sysfs_remove_group(&pdev->dev.kobj, (const struct attribute_group *)&oc_debug_sysfs_group); + LPC_CPLD_I2C_DEBUG_VERBOSE("sysfs_remove_group.\n"); + return; +} + +static int rg_ocores_i2c_probe(struct platform_device *pdev) +{ + struct ocores_i2c *i2c; + struct rg_ocores_cpld_i2c_platform_data *pdata; + struct resource *res; + int irq; + int ret; + int i; + + LPC_CPLD_I2C_DEBUG_VERBOSE("Enter.\n"); + + i2c = devm_kzalloc(&pdev->dev, sizeof(*i2c), GFP_KERNEL); + if (!i2c) { + LPC_CPLD_I2C_DEBUG_ERROR("devm_kzalloc failed.\n"); + return -ENOMEM; + } + res = platform_get_resource(pdev, IORESOURCE_IO, 0); + if (!res) { + LPC_CPLD_I2C_DEBUG_ERROR("can't fetch device resource info\n"); + return -ENOMEM; + } + + i2c->base = (void __iomem *)res->start; + LPC_CPLD_I2C_DEBUG_VERBOSE("i2c->base is %p., res->end[%d]\n", i2c->base, (int)res->end); + + pdata = dev_get_platdata(&pdev->dev); + if (pdata) { + i2c->reg_shift = pdata->reg_shift; + i2c->reg_io_width = pdata->reg_io_width; + i2c->clock_khz = pdata->clock_khz; + } else { + ret = ocores_i2c_of_probe(pdev, i2c); + if (ret) + return ret; + } + + LPC_CPLD_I2C_DEBUG_VERBOSE("data: shift[%d], width[%d], clock_khz[%d] i2c_irq_flag=%d\n", + pdata->reg_shift, pdata->reg_io_width, pdata->clock_khz, pdata->i2c_irq_flag); + + if (i2c->reg_io_width == 0) + i2c->reg_io_width = 1; /* Set to default value */ + + + if (!i2c->setreg || !i2c->getreg) { + switch (i2c->reg_io_width) { + case 1: + i2c->setreg = oc_setreg_8; + i2c->getreg = oc_getreg_8; + break; + default: + dev_err(&pdev->dev, "Unsupported I/O width (%d)\n", + i2c->reg_io_width); + return -EINVAL; + } + } + + init_waitqueue_head(&i2c->wait); + + irq = platform_get_irq(pdev, 0); + LPC_CPLD_I2C_DEBUG_VERBOSE("get irq %d, ENXIO[%d]", irq, ENXIO); + if (irq == -ENXIO) { + i2c->flags |= OCORES_FLAG_POLL; + } else if(g_lpc_cpld_i2c_irq_flag){ + ret = devm_request_irq(&pdev->dev, irq, ocores_isr, 0, + pdev->name, i2c); + if (ret) { + dev_err(&pdev->dev, "Cannot claim IRQ\n"); + } + + if(pdata->i2c_irq_flag) { + g_lpc_cpld_i2c_irq_flag = 0; + } + } + + ocores_init(i2c); + + /* hook up driver to tree */ + platform_set_drvdata(pdev, i2c); + i2c->adap = ocores_adapter; + i2c_set_adapdata(&i2c->adap, i2c); + i2c->adap.dev.parent = &pdev->dev; + i2c->adap.dev.of_node = pdev->dev.of_node; + + /* add i2c adapter to i2c tree */ + ret = i2c_add_adapter(&i2c->adap); + if (ret) { + dev_err(&pdev->dev, "Failed to add adapter\n"); + return ret; + } + + /* add in known devices to the bus */ + if (pdata) { + LPC_CPLD_I2C_DEBUG_VERBOSE("i2c device %d.\n", pdata->num_devices); + for (i = 0; i < pdata->num_devices; i++) + i2c_new_device(&i2c->adap, pdata->devices + i); + } + + oc_debug_sysfs_init(pdev); + return 0; +} + +static int rg_ocores_i2c_remove(struct platform_device *pdev) +{ + struct ocores_i2c *i2c = platform_get_drvdata(pdev); + + /* disable i2c logic */ + oc_setreg(i2c, OCI2C_CONTROL, oc_getreg(i2c, OCI2C_CONTROL) + & ~(OCI2C_CTRL_EN|OCI2C_CTRL_IEN)); + + /* remove adapter & data */ + i2c_del_adapter(&i2c->adap); + oc_debug_sysfs_exit(pdev); + + return 0; +} + +#ifdef CONFIG_PM_SLEEP +static int ocores_i2c_suspend(struct device *dev) +{ + struct ocores_i2c *i2c = dev_get_drvdata(dev); + u8 ctrl = oc_getreg(i2c, OCI2C_CONTROL); + + /* make sure the device is disabled */ + oc_setreg(i2c, OCI2C_CONTROL, ctrl & ~(OCI2C_CTRL_EN|OCI2C_CTRL_IEN)); + + return 0; +} + +static int ocores_i2c_resume(struct device *dev) +{ + struct ocores_i2c *i2c = dev_get_drvdata(dev); + + ocores_init(i2c); + + return 0; +} + +static SIMPLE_DEV_PM_OPS(ocores_i2c_pm, ocores_i2c_suspend, ocores_i2c_resume); +#define OCORES_I2C_PM (&ocores_i2c_pm) +#else +#define OCORES_I2C_PM NULL +#endif + +static struct platform_driver ocores_i2c_driver = { + .probe = rg_ocores_i2c_probe, + .remove = rg_ocores_i2c_remove, + .driver = { + .owner = THIS_MODULE, + .name = "rg-cpld-ocrore-i2c", + .of_match_table = ocores_i2c_match, + .pm = OCORES_I2C_PM, + }, +}; + +module_platform_driver(ocores_i2c_driver); + +MODULE_AUTHOR("Peter Korsgaard "); +MODULE_DESCRIPTION("OpenCores I2C bus driver"); +MODULE_LICENSE("GPL"); +MODULE_ALIAS("platform:ocores-i2c"); diff --git a/platform/broadcom/sonic-platform-modules-ragile/common/modules/lpc_cpld_i2c_ocores.h b/platform/broadcom/sonic-platform-modules-ragile/common/modules/lpc_cpld_i2c_ocores.h new file mode 100755 index 0000000000..baf6a916b1 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ragile/common/modules/lpc_cpld_i2c_ocores.h @@ -0,0 +1,13 @@ +#ifndef _LPC_CPLD_I2C_OCORES_H +#define _LPC_CPLD_I2C_OCORES_H + +struct rg_ocores_cpld_i2c_platform_data { + u32 reg_shift; /* register offset shift value */ + u32 reg_io_width; /* register io read/write width */ + u32 clock_khz; /* input clock in kHz */ + u8 num_devices; /* number of devices in the devices list */ + u8 i2c_irq_flag; + struct i2c_board_info const *devices; /* devices connected to the bus */ +}; + +#endif /* _LPC_CPLD_I2C_OCORES_H */ diff --git a/platform/broadcom/sonic-platform-modules-ragile/common/modules/lpc_dbg.c b/platform/broadcom/sonic-platform-modules-ragile/common/modules/lpc_dbg.c new file mode 100755 index 0000000000..9c43bcee5c --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ragile/common/modules/lpc_dbg.c @@ -0,0 +1,534 @@ +#include +#if LINUX_VERSION_CODE > KERNEL_VERSION(4, 19, 0) +#include +#endif + +#include +#include /* Wd're doing kernel work */ +#include /* specifically, a module */ +#include +#include /* Need for the macros */ +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include "lpc_dbg.h" + +typedef struct rg_lpc_device_s { + u16 base; + u16 size; + u8 type; + u8 id; + u8 lpc_pci_addr; +} rg_lpc_device_t; + +typedef enum rg_lpc_dev_type_s { + LPC_DEVICE_CPLD = 1, + LPC_DEVICE_FPGA = 2, +} rg_lpc_dev_type_t; + +#define MAX_LPC_DEV_NUM (4) +#define LPC_PCI_CFG_BASE(__lgir) ((0x84) + ((__lgir) * 4)) +#define MAX_CPLD_REG_SIZE (0x100) +#define MAX_FPGA_REG_SIZE (0x100) //# fix compile actual value 0x10000 +#define LPC_GET_CPLD_ID(addr) ((addr >> 16) & 0xff) +#define LPC_GET_CPLD_OFFSET(addr) ((addr) & 0xff) + +int lpc_dbg_verbose = 0; +int lpc_dbg_error = 0; +int lpc_dbg_info = 0; +module_param(lpc_dbg_verbose, int, S_IRUGO | S_IWUSR); +module_param(lpc_dbg_error, int, S_IRUGO | S_IWUSR); +module_param(lpc_dbg_info, int, S_IRUGO | S_IWUSR); + + +#define LPC_DBG_VERBOSE(fmt, args...) do { \ + if (lpc_dbg_verbose) { \ + printk(KERN_ERR "[LPC_DBG][VERBOSE][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \ + } \ +} while (0) + +#define LPC_DBG_ERROR(fmt, args...) do { \ + if (lpc_dbg_error) { \ + printk(KERN_ERR "[LPC_DBG][ERROR][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \ + } \ +} while (0) + +#define LPC_DBG_INFO(fmt, args...) do { \ + if (lpc_dbg_info) { \ + printk(KERN_ERR ""fmt, ## args); \ + } \ +} while (0) + +static rg_lpc_device_t g_rg_lpc_dev_default[] = { + {.base = 0x700, .size = MAX_CPLD_REG_SIZE, .type = LPC_DEVICE_CPLD, .id = 0, .lpc_pci_addr = 0x84}, + {.base = 0x900, .size = MAX_CPLD_REG_SIZE, .type = LPC_DEVICE_CPLD, .id = 1, .lpc_pci_addr = 0x88}, + {.base = 0xb00, .size = MAX_CPLD_REG_SIZE, .type = LPC_DEVICE_CPLD, .id = 2, .lpc_pci_addr = 0x90}, +}; + +static rg_lpc_device_t *g_rg_lpc_dev = g_rg_lpc_dev_default; + +static rg_lpc_device_t* lpc_get_device_info(int type, int id) +{ + int i; + int size; + + size = ARRAY_SIZE(g_rg_lpc_dev_default); + for (i = 0; i < size; i++) { + if ((g_rg_lpc_dev[i].type == type) && (g_rg_lpc_dev[i].id == id)) { + return &g_rg_lpc_dev[i]; + } + } + + return NULL; +} + + +int lpc_cpld_read(int address, u8 *val) +{ + int cpld_id; + rg_lpc_device_t *info; + + cpld_id = LPC_GET_CPLD_ID(address); + info = lpc_get_device_info(LPC_DEVICE_CPLD, cpld_id); + if (info == NULL) { + LPC_DBG_ERROR("lpc_get_device_info addr 0x%x id %d failed.\r\n", address, cpld_id); + return -1; + } + + *val = inb(info->base + LPC_GET_CPLD_OFFSET(address)); + LPC_DBG_VERBOSE("Leave info->base 0x%x, addr 0x%x, cpld_id %d, val 0x%x.\r\n", info->base, address, cpld_id, *val); + return 0; +} + +int lpc_cpld_write(int address, u8 reg_val) +{ + int cpld_id; + rg_lpc_device_t *info; + + cpld_id = LPC_GET_CPLD_ID(address); + info = lpc_get_device_info(LPC_DEVICE_CPLD, cpld_id); + if (info == NULL) { + LPC_DBG_ERROR("lpc_get_device_info addr 0x%x id %d failed.\r\n", address, cpld_id); + return -1; + } + + outb(reg_val, info->base + LPC_GET_CPLD_OFFSET(address)); + LPC_DBG_VERBOSE("Leave info->base 0x%x, addr 0x%x, cpld_id %d, val 0x%x.\r\n", info->base, address, cpld_id, reg_val); + return 0; +} + +int lpc_fpga_read(int address, u8 *val) +{ + return -1; +} + +int lpc_fpga_write(int address, u8 reg_val) +{ + return -1; +} + +static ssize_t lpc_misc_cpld_dev_read (struct file *file, char __user *buf, size_t count, + loff_t *offset) +{ + int ret; + u8 value8[MAX_CPLD_REG_SIZE]; + int i; + + if ((count > MAX_CPLD_REG_SIZE) + || ((LPC_GET_CPLD_OFFSET(file->f_pos) + count) > MAX_CPLD_REG_SIZE)) { + return -EFAULT; + } + + for (i = 0; i < count; i++) { + ret = lpc_cpld_read((int)(file->f_pos + i), &value8[i]); + if (ret) { + LPC_DBG_ERROR("lpc_cpld_read i %d addr 0x%x failed ret %d.\n", + i, ((unsigned int)file->f_pos + i), ret); + return i; + } + } + + if (copy_to_user(buf, value8, count)) { + return -EFAULT; + } + + return count; +} + + +static ssize_t lpc_misc_cpld_dev_write (struct file *file, const char __user *buf, size_t count, + loff_t *offset) +{ + u8 value8[MAX_CPLD_REG_SIZE]; + int i; + int ret; + + if ((count > MAX_CPLD_REG_SIZE) + || ((LPC_GET_CPLD_OFFSET(file->f_pos) + count) > MAX_CPLD_REG_SIZE)) { + return -EFAULT; + } + + if (copy_from_user(value8, buf, count)) { + return -EFAULT; + } + + for (i = 0; i < count; i++) { + ret = lpc_cpld_write((int)(file->f_pos + i), value8[i]); + if (ret) { + LPC_DBG_ERROR("lpc_cpld_write i %d addr 0x%x value 0x%x failed ret %d.\n", + i, (unsigned int)file->f_pos + i, value8[i], ret); + return i; + } + } + + return count; +} + + +static loff_t lpc_misc_cpld_dev_llseek(struct file *file, loff_t offset, int origin) +{ + loff_t ret; + +#if LINUX_VERSION_CODE < KERNEL_VERSION(4,0,36) + mutex_lock(&file->f_path.dentry->d_inode->i_mutex); +#else + /* do noting add tjm */ + inode_lock(file_inode(file)); +#endif + + switch (origin) { + case 0: + file->f_pos = offset; + ret = file->f_pos; + break; + case 1: + file->f_pos += offset; + ret = file->f_pos; + break; + default: + ret = -EINVAL; + } + +#if LINUX_VERSION_CODE < KERNEL_VERSION(4,0,36) + mutex_unlock(&file->f_path.dentry->d_inode->i_mutex); +#else + /* do noting add tjm */ + inode_unlock(file_inode(file)); +#endif + + + return ret; +} + + +static long lpc_misc_cpld_dev_ioctl(struct file *file, unsigned int cmd, unsigned long arg) +{ + return -1; +} + +static int lpc_misc_cpld_dev_open(struct inode *inode, struct file *file) +{ + file->private_data = NULL; + file->f_pos = 0; + return 0; + +} + +static int lpc_misc_cpld_dev_release(struct inode *inode, struct file *file) +{ + file->private_data = NULL; + file->f_pos = 0; + return 0; +} + +static const struct file_operations lpc_misc_cpld_dev_fops = { + .owner = THIS_MODULE, + .llseek = lpc_misc_cpld_dev_llseek, + .read = lpc_misc_cpld_dev_read, + .write = lpc_misc_cpld_dev_write, + .unlocked_ioctl = lpc_misc_cpld_dev_ioctl, + .open = lpc_misc_cpld_dev_open, + .release = lpc_misc_cpld_dev_release, +}; + +static ssize_t lpc_misc_fpga_dev_read (struct file *file, char __user *buf, size_t count, + loff_t *offset) +{ + int ret; + u8 value8[MAX_FPGA_REG_SIZE]; + int i; + + if ((count > MAX_FPGA_REG_SIZE) || ((file->f_pos + count) > MAX_FPGA_REG_SIZE)) { + return -EFAULT; + } + + for (i = 0; i < count; i++) { + ret = lpc_fpga_read((int)(file->f_pos + i), &value8[i]); + if (ret) { + LPC_DBG_ERROR("lpc_fpga_read i %d addr 0x%x failed ret %d.\n", + i, ((unsigned int)file->f_pos + i), ret); + return i; + } + + } + + if (copy_to_user(buf, value8, count)) { + return -EFAULT; + } + + return count; +} + + +static ssize_t lpc_misc_fpga_dev_write (struct file *file, const char __user *buf, size_t count, + loff_t *offset) +{ + int ret; + u8 value8[MAX_FPGA_REG_SIZE]; + int i; + + if ((count > MAX_FPGA_REG_SIZE) || ((file->f_pos + count) > MAX_FPGA_REG_SIZE)) { + return -EFAULT; + } + + if (copy_from_user(value8, buf, count)) { + return -EFAULT; + } + + for (i = 0; i < count; i++) { + ret = lpc_fpga_write((int)(file->f_pos + i), value8[i]); + if (ret) { + LPC_DBG_ERROR("lpc_fpga_write i %d addr 0x%x value 0x%x failed ret %d.\n", + i, (int)(file->f_pos + i), value8[i], ret); + return i; + } + } + + return count; +} + + +static loff_t lpc_misc_fpga_dev_llseek(struct file *file, loff_t offset, int origin) +{ + loff_t ret; + +#if LINUX_VERSION_CODE < KERNEL_VERSION(4,0,36) + mutex_lock(&file->f_path.dentry->d_inode->i_mutex); +#else + /* do noting add tjm */ + inode_lock(file_inode(file)); +#endif + + switch (origin) { + case 0: + file->f_pos = offset; + ret = file->f_pos; + break; + case 1: + file->f_pos += offset; + ret = file->f_pos; + break; + default: + ret = -EINVAL; + } + +#if LINUX_VERSION_CODE < KERNEL_VERSION(4,0,36) + mutex_unlock(&file->f_path.dentry->d_inode->i_mutex); +#else + /* do noting add tjm */ + inode_unlock(file_inode(file)); +#endif + + + return ret; +} + + +static long lpc_misc_fpga_dev_ioctl(struct file *file, unsigned int cmd, unsigned long arg) +{ + return -1; +} + +static int lpc_misc_fpga_dev_open(struct inode *inode, struct file *file) +{ + file->private_data = NULL; + file->f_pos = 0; + return 0; + +} + +static int lpc_misc_fpga_dev_release(struct inode *inode, struct file *file) +{ + file->private_data = NULL; + file->f_pos = 0; + return 0; +} + +static const struct file_operations lpc_misc_fpga_dev_fops = { + .owner = THIS_MODULE, + .llseek = lpc_misc_fpga_dev_llseek, + .read = lpc_misc_fpga_dev_read, + .write = lpc_misc_fpga_dev_write, + .unlocked_ioctl = lpc_misc_fpga_dev_ioctl, + .open = lpc_misc_fpga_dev_open, + .release = lpc_misc_fpga_dev_release, +}; + +static struct miscdevice lpc_misc_cpld_dev = { + .minor = MISC_DYNAMIC_MINOR, + .name = "lpc_cpld", + .fops = &lpc_misc_cpld_dev_fops, +}; + +static struct miscdevice lpc_misc_fpga_dev = { + .minor = MISC_DYNAMIC_MINOR, + .name = "lpc_fpga", + .fops = &lpc_misc_fpga_dev_fops, +}; + +static int lpc_misc_drv_init(void) +{ + if (misc_register(&lpc_misc_cpld_dev) != 0) { + LPC_DBG_ERROR("Register %s failed.\r\n", lpc_misc_cpld_dev.name); + return -ENXIO; + } + + if (misc_register(&lpc_misc_fpga_dev) != 0) { + LPC_DBG_ERROR("Register %s failed.\r\n", lpc_misc_fpga_dev.name); + return -ENXIO; + } + return 0; +} + +static void lpc_misc_drv_exit(void) +{ + misc_deregister(&lpc_misc_cpld_dev); + misc_deregister(&lpc_misc_fpga_dev); +} + +#define LPC_MAKE_PCI_IO_RANGE(__base) ((0xfc0001) | ((__base) & (0xFFFC))) + +static int lpc_pci_cfg_init(struct pci_dev *pdev, + const struct pci_device_id *id) +{ + int i; + int size; + + size = ARRAY_SIZE(g_rg_lpc_dev_default); + + for (i = 0; i < size; i++) { + pci_write_config_dword(pdev, g_rg_lpc_dev[i].lpc_pci_addr, LPC_MAKE_PCI_IO_RANGE(g_rg_lpc_dev[i].base)); + LPC_DBG_VERBOSE("set lpc pci cfg[addr: 0x%x, value:0x%x].\n", LPC_PCI_CFG_BASE(i), LPC_MAKE_PCI_IO_RANGE(g_rg_lpc_dev[i].base)); + if (!request_region(g_rg_lpc_dev[i].base, g_rg_lpc_dev[i].size, "rg_lpc")) { + LPC_DBG_ERROR("request_region [0x%x][0x%x] failed!\n", g_rg_lpc_dev[i].base, g_rg_lpc_dev[i].size); + return -EBUSY; + } + } + + return 0; +} + +static void lpc_pci_cfg_exit(void) +{ + int i; + int size; + + size = ARRAY_SIZE(g_rg_lpc_dev_default); + for (i = 0; i < size; i++) { + release_region(g_rg_lpc_dev[i].base, g_rg_lpc_dev[i].size); + } + return; +} + +static int rg_lpc_cpld_probe(struct pci_dev *pdev, + const struct pci_device_id *id) +{ + int ret; + + LPC_DBG_VERBOSE("Enter.\n"); + ret = lpc_pci_cfg_init(pdev, id); + if (ret) { + LPC_DBG_ERROR("lpc_pci_cfg_init failed ret %d.\n", ret); + return ret; + } + + ret = lpc_misc_drv_init(); + if (ret) { + LPC_DBG_ERROR("lpc_misc_drv_init failed ret %d.\n", ret); + return ret; + } + LPC_DBG_VERBOSE("Leave success\n"); + + return 0; +} + +static void rg_lpc_cpld_remove(struct pci_dev *pdev) +{ + LPC_DBG_VERBOSE("Enter.\n"); + lpc_misc_drv_exit(); + lpc_pci_cfg_exit(); + LPC_DBG_VERBOSE("Leave.\n"); +} + + +#define PCI_VENDOR_ID_D1527_LPC (0x8c54) +#define PCI_VENDOR_ID_C3000_LPC (0x19dc) + +#if 0 +static const struct pci_device_id rg_lpc_cpld_pcidev_id[] = { + { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_VENDOR_ID_C3000_LPC) }, + { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_VENDOR_ID_D1527_LPC) }, + { 0, } +}; +MODULE_DEVICE_TABLE(pci, rg_lpc_cpld_pcidev_id); + +static struct pci_driver rg_lpc_driver = { + .name = "rg_lpc", + .id_table = rg_lpc_cpld_pcidev_id, + .probe = rg_lpc_cpld_probe, + .remove = rg_lpc_cpld_remove, +}; + +module_pci_driver(rg_lpc_driver); +#else +static int __init lpc_dbg_init(void) +{ + struct pci_dev *pdev = NULL; + int ret; + + LPC_DBG_VERBOSE("Enter.\n"); + + pdev = pci_get_device(PCI_VENDOR_ID_INTEL, PCI_VENDOR_ID_D1527_LPC, pdev); + if (!pdev) { + LPC_DBG_ERROR("pci_get_device(0x8086, 0x8c54) failed!\n"); + return 0; + } + + ret = rg_lpc_cpld_probe(pdev, NULL); + LPC_DBG_VERBOSE("Leave ret %d.\n", ret); + return ret; +} + +static void __exit lpc_dbg_exit(void) +{ + LPC_DBG_VERBOSE("Enter.\n"); + rg_lpc_cpld_remove(NULL); + LPC_DBG_VERBOSE("Leave.\n"); +} + + + +module_init(lpc_dbg_init); +module_exit(lpc_dbg_exit); + +#endif +MODULE_LICENSE("GPL"); +MODULE_AUTHOR("support "); + diff --git a/platform/broadcom/sonic-platform-modules-ragile/common/modules/lpc_dbg.h b/platform/broadcom/sonic-platform-modules-ragile/common/modules/lpc_dbg.h new file mode 100755 index 0000000000..d1aad9c907 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ragile/common/modules/lpc_dbg.h @@ -0,0 +1,39 @@ +#ifndef __ETH_CMD_TYPES_H__ +#define __ETH_CMD_TYPES_H__ + +typedef enum { + ETH_START = 1, + ETH_SHOW, + ETH_SET, + ETH_TEST, + ETH_MAC_REG, + ETH_PHY_REG, +} ether_dbg_top_cmd_t; + +typedef enum { + ETH_MAC_REG_READ = 1, + ETH_MAC_REG_WRITE, + ETH_MAC_REG_CHECK, + ETH_MAC_REG_DUMP_ALL, + ETH_MAC_REG_DUMP_PCI_CFG_ALL, +} ether_mac_reg_cmd_t; + + +#define ETH_DBG_TYPE(cmd1, cmd2, cmd3, cmd4) \ + ((cmd1) | ((cmd2) << 8) | ((cmd3) << 16) | ((cmd4) << 24)) +#define ETH_DBG_PARSE_TYPE(type, cmd1, cmd2, cmd3, cmd4) \ + do {\ + (cmd1) = (type) & 0xff;\ + (cmd2) = ((type) >> 8) & 0xff;\ + (cmd3) = ((type) >> 16) & 0xff;\ + (cmd4) = ((type) >> 24) & 0xff;\ + } while (0) + +typedef struct { + int type; + int length; + unsigned char value[128]; +} ether_msg_t; + + +#endif /* __ETH_CMD_TYPES_H__ */ diff --git a/platform/broadcom/sonic-platform-modules-ragile/common/modules/pmbus.h b/platform/broadcom/sonic-platform-modules-ragile/common/modules/pmbus.h index 869a8d1558..39b778a473 100755 --- a/platform/broadcom/sonic-platform-modules-ragile/common/modules/pmbus.h +++ b/platform/broadcom/sonic-platform-modules-ragile/common/modules/pmbus.h @@ -130,26 +130,26 @@ enum pmbus_regs { PMBUS_MFR_DATE = 0x9D, PMBUS_MFR_SERIAL = 0x9E, -/* - * Virtual registers. - * Useful to support attributes which are not supported by standard PMBus - * registers but exist as manufacturer specific registers on individual chips. - * Must be mapped to real registers in device specific code. - * - * Semantics: - * Virtual registers are all word size. - * READ registers are read-only; writes are either ignored or return an error. - * RESET registers are read/write. Reading reset registers returns zero - * (used for detection), writing any value causes the associated history to be - * reset. - * Virtual registers have to be handled in device specific driver code. Chip - * driver code returns non-negative register values if a virtual register is - * supported, or a negative error code if not. The chip driver may return - * -ENODATA or any other error code in this case, though an error code other - * than -ENODATA is handled more efficiently and thus preferred. Either case, - * the calling PMBus core code will abort if the chip driver returns an error - * code when reading or writing virtual registers. - */ + /* + * Virtual registers. + * Useful to support attributes which are not supported by standard PMBus + * registers but exist as manufacturer specific registers on individual chips. + * Must be mapped to real registers in device specific code. + * + * Semantics: + * Virtual registers are all word size. + * READ registers are read-only; writes are either ignored or return an error. + * RESET registers are read/write. Reading reset registers returns zero + * (used for detection), writing any value causes the associated history to be + * reset. + * Virtual registers have to be handled in device specific driver code. Chip + * driver code returns non-negative register values if a virtual register is + * supported, or a negative error code if not. The chip driver may return + * -ENODATA or any other error code in this case, though an error code other + * than -ENODATA is handled more efficiently and thus preferred. Either case, + * the calling PMBus core code will abort if the chip driver returns an error + * code when reading or writing virtual registers. + */ PMBUS_VIRT_BASE = 0x100, PMBUS_VIRT_READ_TEMP_AVG, PMBUS_VIRT_READ_TEMP_MIN, @@ -190,6 +190,33 @@ enum pmbus_regs { PMBUS_VIRT_VMON_UV_FAULT_LIMIT, PMBUS_VIRT_VMON_OV_FAULT_LIMIT, PMBUS_VIRT_STATUS_VMON, + + /* + * RPM and PWM Fan control + * + * Drivers wanting to expose PWM control must define the behaviour of + * PMBUS_VIRT_PWM_[1-4] and PMBUS_VIRT_PWM_ENABLE_[1-4] in the + * {read,write}_word_data callback. + * + * pmbus core provides a default implementation for + * PMBUS_VIRT_FAN_TARGET_[1-4]. + * + * TARGET, PWM and PWM_ENABLE members must be defined sequentially; + * pmbus core uses the difference between the provided register and + * it's _1 counterpart to calculate the FAN/PWM ID. + */ + PMBUS_VIRT_FAN_TARGET_1, + PMBUS_VIRT_FAN_TARGET_2, + PMBUS_VIRT_FAN_TARGET_3, + PMBUS_VIRT_FAN_TARGET_4, + PMBUS_VIRT_PWM_1, + PMBUS_VIRT_PWM_2, + PMBUS_VIRT_PWM_3, + PMBUS_VIRT_PWM_4, + PMBUS_VIRT_PWM_ENABLE_1, + PMBUS_VIRT_PWM_ENABLE_2, + PMBUS_VIRT_PWM_ENABLE_3, + PMBUS_VIRT_PWM_ENABLE_4, }; /* @@ -223,6 +250,8 @@ enum pmbus_regs { #define PB_FAN_1_RPM BIT(6) #define PB_FAN_1_INSTALLED BIT(7) +enum pmbus_fan_mode { percent = 0, rpm }; + /* * STATUS_BYTE, STATUS_WORD (lower) */ @@ -313,6 +342,7 @@ enum pmbus_sensor_classes { PSC_POWER, PSC_TEMPERATURE, PSC_FAN, + PSC_PWM, PSC_NUM_CLASSES /* Number of power sensor classes */ }; @@ -339,6 +369,10 @@ enum pmbus_sensor_classes { #define PMBUS_HAVE_STATUS_FAN34 BIT(17) #define PMBUS_HAVE_VMON BIT(18) #define PMBUS_HAVE_STATUS_VMON BIT(19) +#define PMBUS_HAVE_PWM12 BIT(20) +#define PMBUS_HAVE_PWM34 BIT(21) + +#define PMBUS_PAGE_VIRTUAL BIT(31) enum pmbus_data_format { linear = 0, direct, vid }; enum vrm_version { vr11 = 0, vr12, vr13 }; @@ -370,7 +404,7 @@ struct pmbus_driver_info { int (*read_byte_data)(struct i2c_client *client, int page, int reg); int (*read_word_data)(struct i2c_client *client, int page, int reg); int (*write_word_data)(struct i2c_client *client, int page, int reg, - u16 word); + u16 word); int (*write_byte)(struct i2c_client *client, int page, u8 value); /* * The identify function determines supported PMBus functionality. @@ -404,21 +438,29 @@ extern const struct regulator_ops pmbus_regulator_ops; /* Function declarations */ void pmbus_clear_cache(struct i2c_client *client); -int pmbus_set_page(struct i2c_client *client, u8 page); -int pmbus_read_word_data(struct i2c_client *client, u8 page, u8 reg); -int pmbus_write_word_data(struct i2c_client *client, u8 page, u8 reg, u16 word); +int pmbus_set_page(struct i2c_client *client, int page); +int pmbus_read_word_data(struct i2c_client *client, int page, u8 reg); +int pmbus_write_word_data(struct i2c_client *client, int page, u8 reg, u16 word); int pmbus_read_byte_data(struct i2c_client *client, int page, u8 reg); int pmbus_write_byte(struct i2c_client *client, int page, u8 value); int pmbus_write_byte_data(struct i2c_client *client, int page, u8 reg, - u8 value); + u8 value); int pmbus_update_byte_data(struct i2c_client *client, int page, u8 reg, - u8 mask, u8 value); + u8 mask, u8 value); void pmbus_clear_faults(struct i2c_client *client); bool pmbus_check_byte_register(struct i2c_client *client, int page, int reg); bool pmbus_check_word_register(struct i2c_client *client, int page, int reg); int pmbus_do_probe(struct i2c_client *client, const struct i2c_device_id *id, - struct pmbus_driver_info *info); + struct pmbus_driver_info *info); int pmbus_do_remove(struct i2c_client *client); const struct pmbus_driver_info *pmbus_get_driver_info(struct i2c_client - *client); + *client); +int pmbus_get_fan_rate_device(struct i2c_client *client, int page, int id, + enum pmbus_fan_mode mode); +int pmbus_get_fan_rate_cached(struct i2c_client *client, int page, int id, + enum pmbus_fan_mode mode); +int pmbus_update_fan(struct i2c_client *client, int page, int id, + u8 config, u8 mask, u16 command); +struct dentry *pmbus_get_debugfs_dir(struct i2c_client *client); + #endif /* PMBUS_H */ diff --git a/platform/broadcom/sonic-platform-modules-ragile/common/modules/ragile_common_module.c b/platform/broadcom/sonic-platform-modules-ragile/common/modules/ragile_common_module.c new file mode 100755 index 0000000000..e4fc735643 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ragile/common/modules/ragile_common_module.c @@ -0,0 +1,79 @@ +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +static int dfd_my_type = 0; +module_param(dfd_my_type, int, S_IRUGO | S_IWUSR); + +int g_common_debug_error = 0; +module_param(g_common_debug_error, int, S_IRUGO | S_IWUSR); + +int g_common_debug_verbose = 0; +module_param(g_common_debug_verbose, int, S_IRUGO | S_IWUSR); + +#define RAGILE_COMMON_DEBUG_VERBOSE(fmt, args...) do { \ + if (g_common_debug_verbose) { \ + printk(KERN_ERR "[RAGILE_COMMON][VER][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \ + } \ +} while (0) + +#define RAGILE_COMMON_DEBUG_ERROR(fmt, args...) do { \ + if (g_common_debug_error) { \ + printk(KERN_ERR "[RAGILE_COMMON][ERROR][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \ + } \ +} while (0) + + +int dfd_get_my_card_type(void) +{ + int type; + int cnt; + + if (dfd_my_type != 0) { + RAGILE_COMMON_DEBUG_VERBOSE("my_type = 0x%x\r\n", dfd_my_type); + return dfd_my_type; + } + + return -1; +} +EXPORT_SYMBOL(dfd_get_my_card_type); + +static int __init ragile_common_init(void) +{ + int ret; + + RAGILE_COMMON_DEBUG_VERBOSE("Enter.\n"); + ret = dfd_get_my_card_type(); + if (ret <= 0) { + RAGILE_COMMON_DEBUG_ERROR("dfd_get_my_card_type failed, ret %d.\n", ret); + printk(KERN_ERR "Warning: Device type get failed, please check the TLV-EEPROM!\n"); + return -1; + } + + RAGILE_COMMON_DEBUG_VERBOSE("Leave success type 0x%x.\n", ret); + return 0; +} + +static void __exit ragile_common_exit(void) +{ + RAGILE_COMMON_DEBUG_VERBOSE("Exit.\n"); +} + +module_init(ragile_common_init); +module_exit(ragile_common_exit); + +MODULE_DESCRIPTION("ragile Platform Support"); +MODULE_AUTHOR("support "); +MODULE_LICENSE("GPL"); + diff --git a/platform/broadcom/sonic-platform-modules-ragile/common/modules/rg-gpio-xeon.c b/platform/broadcom/sonic-platform-modules-ragile/common/modules/rg-gpio-xeon.c index ecfd61c39c..84b62c50ab 100755 --- a/platform/broadcom/sonic-platform-modules-ragile/common/modules/rg-gpio-xeon.c +++ b/platform/broadcom/sonic-platform-modules-ragile/common/modules/rg-gpio-xeon.c @@ -62,11 +62,11 @@ static DEFINE_SPINLOCK(sio_lock); /****************** i2c adapter with gpio ***********************/ static struct i2c_gpio_platform_data i2c_pdata = { - .timeout = 200, - .udelay = 10, - .scl_is_output_only = 0, - .sda_is_open_drain = 0, - .scl_is_open_drain = 0, + .timeout = 200, + .udelay = 10, + .scl_is_output_only = 0, + .sda_is_open_drain = 0, + .scl_is_open_drain = 0, }; static struct gpiod_lookup_table rg_gpio_lookup_table = { @@ -81,272 +81,272 @@ static struct gpiod_lookup_table rg_gpio_lookup_table = { static void i2c_gpio_release(struct device *dev) { - return; + return; } static struct platform_device i2c_gpio = { - .name = "i2c-gpio", - .num_resources = 0, - .id = -1, + .name = "i2c-gpio", + .num_resources = 0, + .id = -1, - .dev = { - .platform_data = &i2c_pdata, - .release = i2c_gpio_release, - } + .dev = { + .platform_data = &i2c_pdata, + .release = i2c_gpio_release, + } }; static int xeon_gpio_get(struct gpio_chip *gc, unsigned gpio_num) { - unsigned int data; - unsigned int bank, offset; - unsigned long flags; + unsigned int data; + unsigned int bank, offset; + unsigned long flags; data = 0; - bank = gpio_num / BANKSIZE; - offset = gpio_num % BANKSIZE; + bank = gpio_num / BANKSIZE; + offset = gpio_num % BANKSIZE; - GPIO_XEON_SPIN_LOCK(sio_lock, flags); - if (bank == 0) { - data = inl(GP_LVL) & (1 << offset); - if (data) { - data = 1; - } - } else if (bank == 1) { - data = inl(GP_LVL2) & (1 << offset); - if (data) { - data = 1; - } - } else if (bank == 2) { - data = inl(GP_LVL3) & (1 << offset); - if (data) { - data = 1; - } - } - GPIO_XEON_SPIN_UNLOCK(sio_lock, flags); + GPIO_XEON_SPIN_LOCK(sio_lock, flags); + if (bank == 0) { + data = inl(GP_LVL) & (1 << offset); + if (data) { + data = 1; + } + } else if (bank == 1) { + data = inl(GP_LVL2) & (1 << offset); + if (data) { + data = 1; + } + } else if (bank == 2) { + data = inl(GP_LVL3) & (1 << offset); + if (data) { + data = 1; + } + } + GPIO_XEON_SPIN_UNLOCK(sio_lock, flags); - return data; + return data; } static int xeon_gpio_direction_in(struct gpio_chip *gc, unsigned gpio_num) { - unsigned int data; - unsigned int bank, offset; - unsigned long flags; + unsigned int data; + unsigned int bank, offset; + unsigned long flags; - bank = gpio_num / BANKSIZE; - offset = gpio_num % BANKSIZE; + bank = gpio_num / BANKSIZE; + offset = gpio_num % BANKSIZE; - GPIO_XEON_SPIN_LOCK(sio_lock, flags); - if (bank == 0) { - data = inl(GP_IO_SEL); - data = data | (1 << offset); - outl(data, GP_IO_SEL); - } else if (bank == 1) { - data = inl(GP_IO_SEL2); - data = data | (1 << offset); - outl(data, GP_IO_SEL2); - } else if (bank == 2) { - data = inl(GP_IO_SEL3); - data = data | (1 << offset); - outl(data, GP_IO_SEL3); - } - GPIO_XEON_SPIN_UNLOCK(sio_lock, flags); + GPIO_XEON_SPIN_LOCK(sio_lock, flags); + if (bank == 0) { + data = inl(GP_IO_SEL); + data = data | (1 << offset); + outl(data, GP_IO_SEL); + } else if (bank == 1) { + data = inl(GP_IO_SEL2); + data = data | (1 << offset); + outl(data, GP_IO_SEL2); + } else if (bank == 2) { + data = inl(GP_IO_SEL3); + data = data | (1 << offset); + outl(data, GP_IO_SEL3); + } + GPIO_XEON_SPIN_UNLOCK(sio_lock, flags); - return 0; + return 0; } static void xeon_gpio_set(struct gpio_chip *gc, - unsigned gpio_num, int val) + unsigned gpio_num, int val) { - unsigned int data; - unsigned int bank, offset; - unsigned long flags; + unsigned int data; + unsigned int bank, offset; + unsigned long flags; - bank = gpio_num / BANKSIZE; - offset = gpio_num % BANKSIZE; + bank = gpio_num / BANKSIZE; + offset = gpio_num % BANKSIZE; - GPIO_XEON_SPIN_LOCK(sio_lock, flags); - if (bank == 0) { - data = inl(GP_LVL); - if (val) { - data = data | (1 << offset); - } else { - data = data & ~(1 << offset); - } - outl(data, GP_LVL); - } else if (bank == 1) { - data = inl(GP_LVL2); - if (val) { - data = data | (1 << offset); - } else { - data = data & ~(1 << offset); - } - outl(data, GP_LVL2); - } else if (bank == 2) { - data = inl(GP_LVL3); - if (val) { - data = data | (1 << offset); - } else { - data = data & ~(1 << offset); - } - outl(data, GP_LVL3); - } - GPIO_XEON_SPIN_UNLOCK(sio_lock, flags); + GPIO_XEON_SPIN_LOCK(sio_lock, flags); + if (bank == 0) { + data = inl(GP_LVL); + if (val) { + data = data | (1 << offset); + } else { + data = data & ~(1 << offset); + } + outl(data, GP_LVL); + } else if (bank == 1) { + data = inl(GP_LVL2); + if (val) { + data = data | (1 << offset); + } else { + data = data & ~(1 << offset); + } + outl(data, GP_LVL2); + } else if (bank == 2) { + data = inl(GP_LVL3); + if (val) { + data = data | (1 << offset); + } else { + data = data & ~(1 << offset); + } + outl(data, GP_LVL3); + } + GPIO_XEON_SPIN_UNLOCK(sio_lock, flags); } static int xeon_gpio_direction_out(struct gpio_chip *gc, - unsigned gpio_num, int val) + unsigned gpio_num, int val) { - unsigned int data; - unsigned int bank, offset; - unsigned long flags; + unsigned int data; + unsigned int bank, offset; + unsigned long flags; - bank = gpio_num / BANKSIZE; - offset = gpio_num % BANKSIZE; + bank = gpio_num / BANKSIZE; + offset = gpio_num % BANKSIZE; - GPIO_XEON_SPIN_LOCK(sio_lock, flags); - if (bank == 0) { - data = inl(GP_IO_SEL); - data = data & ~(1 << offset); - outl(data, GP_IO_SEL); + GPIO_XEON_SPIN_LOCK(sio_lock, flags); + if (bank == 0) { + data = inl(GP_IO_SEL); + data = data & ~(1 << offset); + outl(data, GP_IO_SEL); - data = inl(GP_LVL); - if (val) { - data = data | (1 << offset); - } else { - data = data & ~(1 << offset); - } - outl(data, GP_LVL); - } else if (bank == 1) { - data = inl(GP_IO_SEL2); - data = data & ~(1 << offset); - outl(data, GP_IO_SEL2); + data = inl(GP_LVL); + if (val) { + data = data | (1 << offset); + } else { + data = data & ~(1 << offset); + } + outl(data, GP_LVL); + } else if (bank == 1) { + data = inl(GP_IO_SEL2); + data = data & ~(1 << offset); + outl(data, GP_IO_SEL2); - data = inl(GP_LVL2); - if (val) { - data = data | (1 << offset); - } else { - data = data & ~(1 << offset); - } - outl(data, GP_LVL2); - } else if (bank == 2) { - data = inl(GP_IO_SEL3); - data = data & ~(1 << offset); - outl(data, GP_IO_SEL3); + data = inl(GP_LVL2); + if (val) { + data = data | (1 << offset); + } else { + data = data & ~(1 << offset); + } + outl(data, GP_LVL2); + } else if (bank == 2) { + data = inl(GP_IO_SEL3); + data = data & ~(1 << offset); + outl(data, GP_IO_SEL3); - data = inl(GP_LVL3); - if (val) { - data = data | (1 << offset); - } else { - data = data & ~(1 << offset); - } - outl(data, GP_LVL3); - } - GPIO_XEON_SPIN_UNLOCK(sio_lock, flags); + data = inl(GP_LVL3); + if (val) { + data = data | (1 << offset); + } else { + data = data & ~(1 << offset); + } + outl(data, GP_LVL3); + } + GPIO_XEON_SPIN_UNLOCK(sio_lock, flags); - return 0; + return 0; } static int xeon_gpio_request(struct gpio_chip *chip, unsigned int offset) { - unsigned int data; - unsigned int bank, tmp_offset; - unsigned long flags; + unsigned int data; + unsigned int bank, tmp_offset; + unsigned long flags; - bank = offset / BANKSIZE; - tmp_offset = offset % BANKSIZE; + bank = offset / BANKSIZE; + tmp_offset = offset % BANKSIZE; - GPIO_XEON_SPIN_LOCK(sio_lock, flags); - if (bank == 0) { - data = inl(GPIO_USE_SEL); - data = data | (1 << tmp_offset); - outl(data, GPIO_USE_SEL); - } else if (bank == 1) { - data = inl(GPIO_USE_SEL2); - data = data | (1 << tmp_offset); - outl(data, GPIO_USE_SEL2); - } else if (bank == 2) { - data = inl(GPIO_USE_SEL3); - data = data | (1 << tmp_offset); - outl(data, GPIO_USE_SEL3); - } - GPIO_XEON_SPIN_UNLOCK(sio_lock, flags); - return 0; + GPIO_XEON_SPIN_LOCK(sio_lock, flags); + if (bank == 0) { + data = inl(GPIO_USE_SEL); + data = data | (1 << tmp_offset); + outl(data, GPIO_USE_SEL); + } else if (bank == 1) { + data = inl(GPIO_USE_SEL2); + data = data | (1 << tmp_offset); + outl(data, GPIO_USE_SEL2); + } else if (bank == 2) { + data = inl(GPIO_USE_SEL3); + data = data | (1 << tmp_offset); + outl(data, GPIO_USE_SEL3); + } + GPIO_XEON_SPIN_UNLOCK(sio_lock, flags); + return 0; } static void xeon_gpio_free(struct gpio_chip *chip, unsigned int offset) { - unsigned int data; - unsigned int bank, tmp_offset; - unsigned long flags; + unsigned int data; + unsigned int bank, tmp_offset; + unsigned long flags; - bank = offset / BANKSIZE; - tmp_offset = offset % BANKSIZE; + bank = offset / BANKSIZE; + tmp_offset = offset % BANKSIZE; - GPIO_XEON_SPIN_LOCK(sio_lock, flags); - if (bank == 0) { - data = inl(GPIO_USE_SEL); - data = data & ~(1 << tmp_offset); - outl(data, GPIO_USE_SEL); - } else if (bank == 1) { - data = inl(GPIO_USE_SEL2); - data = data & ~(1 << tmp_offset); - outl(data, GPIO_USE_SEL2); - } else if (bank == 2) { - data = inl(GPIO_USE_SEL3); - data = data & ~(1 << tmp_offset); - outl(data, GPIO_USE_SEL3); - } - GPIO_XEON_SPIN_UNLOCK(sio_lock, flags); + GPIO_XEON_SPIN_LOCK(sio_lock, flags); + if (bank == 0) { + data = inl(GPIO_USE_SEL); + data = data & ~(1 << tmp_offset); + outl(data, GPIO_USE_SEL); + } else if (bank == 1) { + data = inl(GPIO_USE_SEL2); + data = data & ~(1 << tmp_offset); + outl(data, GPIO_USE_SEL2); + } else if (bank == 2) { + data = inl(GPIO_USE_SEL3); + data = data & ~(1 << tmp_offset); + outl(data, GPIO_USE_SEL3); + } + GPIO_XEON_SPIN_UNLOCK(sio_lock, flags); } static struct gpio_chip xeon_gpio_chip = { - .label = GPIO_NAME, - .owner = THIS_MODULE, - .get = xeon_gpio_get, - .direction_input = xeon_gpio_direction_in, - .set = xeon_gpio_set, - .direction_output = xeon_gpio_direction_out, - .request = xeon_gpio_request, - .free = xeon_gpio_free, + .label = GPIO_NAME, + .owner = THIS_MODULE, + .get = xeon_gpio_get, + .direction_input = xeon_gpio_direction_in, + .set = xeon_gpio_set, + .direction_output = xeon_gpio_direction_out, + .request = xeon_gpio_request, + .free = xeon_gpio_free, }; static int __init xeon_gpio_init(void) { - int err; - if (!request_region(GPIO_BASE, GPIO_IOSIZE, GPIO_NAME)) - return -EBUSY; + int err; + if (!request_region(GPIO_BASE, GPIO_IOSIZE, GPIO_NAME)) + return -EBUSY; - xeon_gpio_chip.base = GPIO_BASE_ID; - xeon_gpio_chip.ngpio = 96; + xeon_gpio_chip.base = GPIO_BASE_ID; + xeon_gpio_chip.ngpio = 96; - err = gpiochip_add_data(&xeon_gpio_chip, NULL); - if (err < 0) - goto gpiochip_add_err; - gpiod_add_lookup_table(&rg_gpio_lookup_table); - err = platform_device_register(&i2c_gpio); - if (err < 0) { - goto i2c_get_adapter_err; - } - return 0; + err = gpiochip_add_data(&xeon_gpio_chip, NULL); + if (err < 0) + goto gpiochip_add_err; + gpiod_add_lookup_table(&rg_gpio_lookup_table); + err = platform_device_register(&i2c_gpio); + if (err < 0) { + goto i2c_get_adapter_err; + } + return 0; i2c_get_adapter_err: - gpiod_remove_lookup_table(&rg_gpio_lookup_table); - platform_device_unregister(&i2c_gpio); - gpiochip_remove(&xeon_gpio_chip); + gpiod_remove_lookup_table(&rg_gpio_lookup_table); + platform_device_unregister(&i2c_gpio); + gpiochip_remove(&xeon_gpio_chip); gpiochip_add_err: - release_region(GPIO_BASE, GPIO_IOSIZE); - return -1; + release_region(GPIO_BASE, GPIO_IOSIZE); + return -1; } static void __exit xeon_gpio_exit(void) { - gpiod_remove_lookup_table(&rg_gpio_lookup_table); - platform_device_unregister(&i2c_gpio); - mdelay(100); - gpiochip_remove(&xeon_gpio_chip); - release_region(GPIO_BASE, GPIO_IOSIZE); + gpiod_remove_lookup_table(&rg_gpio_lookup_table); + platform_device_unregister(&i2c_gpio); + mdelay(100); + gpiochip_remove(&xeon_gpio_chip); + release_region(GPIO_BASE, GPIO_IOSIZE); } module_init(xeon_gpio_init); diff --git a/platform/broadcom/sonic-platform-modules-ragile/common/modules/rg-i2c-algo-bit.c b/platform/broadcom/sonic-platform-modules-ragile/common/modules/rg-i2c-algo-bit.c new file mode 100644 index 0000000000..5e8f2c29d2 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ragile/common/modules/rg-i2c-algo-bit.c @@ -0,0 +1,734 @@ +/* ------------------------------------------------------------------------- + * i2c-algo-bit.c i2c driver algorithms for bit-shift adapters + * ------------------------------------------------------------------------- + * Copyright (C) 1995-2000 Simon G. Vogl + + This program is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 2 of the License, or + (at your option) any later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + * ------------------------------------------------------------------------- */ + +/* With some changes from Frodo Looijaard , Kyösti Mälkki + and Jean Delvare */ + +#include +#include +#include +#include +#include +#include +#include + + +/* ----- global defines ----------------------------------------------- */ + +#ifdef DEBUG +#define bit_dbg(level, dev, format, args...) \ + do { \ + if (i2c_debug >= level) \ + dev_dbg(dev, format, ##args); \ + } while (0) +#else +#define bit_dbg(level, dev, format, args...) \ + do {} while (0) +#endif /* DEBUG */ + +/* ----- global variables --------------------------------------------- */ + +static int bit_test; /* see if the line-setting functions work */ +module_param(bit_test, int, S_IRUGO); +MODULE_PARM_DESC(bit_test, "lines testing - 0 off; 1 report; 2 fail if stuck"); + +#ifdef DEBUG +static int i2c_debug = 1; +module_param(i2c_debug, int, S_IRUGO | S_IWUSR); +MODULE_PARM_DESC(i2c_debug, + "debug level - 0 off; 1 normal; 2 verbose; 3 very verbose"); +#endif + +/* --- setting states on the bus with the right timing: --------------- */ + +#define setsda(adap, val) adap->setsda(adap->data, val) +#define setscl(adap, val) adap->setscl(adap->data, val) +#define getsda(adap) adap->getsda(adap->data) +#define getscl(adap) adap->getscl(adap->data) + +static inline void sdalo(struct i2c_algo_bit_data *adap) +{ + setsda(adap, 0); + udelay((adap->udelay + 1) / 2); +} + +static inline void sdahi(struct i2c_algo_bit_data *adap) +{ + setsda(adap, 1); + udelay((adap->udelay + 1) / 2); +} + +static inline void scllo(struct i2c_algo_bit_data *adap) +{ + setscl(adap, 0); + udelay(adap->udelay / 2); +} + +/* + * Raise scl line, and do checking for delays. This is necessary for slower + * devices. + */ +static int sclhi(struct i2c_algo_bit_data *adap) +{ + unsigned long start; + + setscl(adap, 1); + + /* Not all adapters have scl sense line... */ + if (!adap->getscl) + goto done; + + start = jiffies; + while (!getscl(adap)) { + /* This hw knows how to read the clock line, so we wait + * until it actually gets high. This is safer as some + * chips may hold it low ("clock stretching") while they + * are processing data internally. + */ + if (time_after(jiffies, start + adap->timeout)) { + /* Test one last time, as we may have been preempted + * between last check and timeout test. + */ + if (getscl(adap)) + break; + return -ETIMEDOUT; + } + cpu_relax(); + } +#ifdef DEBUG + if (jiffies != start && i2c_debug >= 3) + pr_debug("i2c-algo-bit: needed %ld jiffies for SCL to go high\n", + jiffies - start); +#endif + +done: + udelay(adap->udelay); + return 0; +} + + +/* --- other auxiliary functions -------------------------------------- */ +static void i2c_start(struct i2c_algo_bit_data *adap) +{ + /* assert: scl, sda are high */ + setsda(adap, 0); + udelay(adap->udelay); + scllo(adap); +} + +static void i2c_repstart(struct i2c_algo_bit_data *adap) +{ + /* assert: scl is low */ + sdahi(adap); + sclhi(adap); + setsda(adap, 0); + udelay(adap->udelay); + scllo(adap); +} + + +static void i2c_stop(struct i2c_algo_bit_data *adap) +{ + /* assert: scl is low */ + sdalo(adap); + sclhi(adap); + setsda(adap, 1); + udelay(adap->udelay); +} + + + +/* send a byte without start cond., look for arbitration, + check ackn. from slave */ +/* returns: + * 1 if the device acknowledged + * 0 if the device did not ack + * -ETIMEDOUT if an error occurred (while raising the scl line) + */ +static int i2c_outb(struct i2c_adapter *i2c_adap, unsigned char c) +{ + int i; + int sb; + int ack; + struct i2c_algo_bit_data *adap = i2c_adap->algo_data; + + /* assert: scl is low */ + for (i = 7; i >= 0; i--) { + sb = (c >> i) & 1; + setsda(adap, sb); + udelay((adap->udelay + 1) / 2); + if (sclhi(adap) < 0) { /* timed out */ + bit_dbg(1, &i2c_adap->dev, + "i2c_outb: 0x%02x, timeout at bit #%d\n", + (int)c, i); + return -ETIMEDOUT; + } + /* FIXME do arbitration here: + * if (sb && !getsda(adap)) -> ouch! Get out of here. + * + * Report a unique code, so higher level code can retry + * the whole (combined) message and *NOT* issue STOP. + */ + scllo(adap); + } + sdahi(adap); + if (sclhi(adap) < 0) { /* timeout */ + bit_dbg(1, &i2c_adap->dev, + "i2c_outb: 0x%02x, timeout at ack\n", (int)c); + return -ETIMEDOUT; + } + + /* read ack: SDA should be pulled down by slave, or it may + * NAK (usually to report problems with the data we wrote). + */ + ack = !getsda(adap); /* ack: sda is pulled low -> success */ + bit_dbg(2, &i2c_adap->dev, "i2c_outb: 0x%02x %s\n", (int)c, + ack ? "A" : "NA"); + + scllo(adap); + return ack; + /* assert: scl is low (sda undef) */ +} + + +static int i2c_inb(struct i2c_adapter *i2c_adap) +{ + /* read byte via i2c port, without start/stop sequence */ + /* acknowledge is sent in i2c_read. */ + int i; + unsigned char indata = 0; + struct i2c_algo_bit_data *adap = i2c_adap->algo_data; + + /* assert: scl is low */ + sdahi(adap); + for (i = 0; i < 8; i++) { + if (sclhi(adap) < 0) { /* timeout */ + bit_dbg(1, &i2c_adap->dev, + "i2c_inb: timeout at bit #%d\n", + 7 - i); + return -ETIMEDOUT; + } + indata *= 2; + if (getsda(adap)) + indata |= 0x01; + setscl(adap, 0); + udelay(i == 7 ? adap->udelay / 2 : adap->udelay); + } + /* assert: scl is low */ + return indata; +} + +/* + * Sanity check for the adapter hardware - check the reaction of + * the bus lines only if it seems to be idle. + */ +static int test_bus(struct i2c_adapter *i2c_adap) +{ + struct i2c_algo_bit_data *adap = i2c_adap->algo_data; + const char *name = i2c_adap->name; + int scl, sda, ret; + + if (adap->pre_xfer) { + ret = adap->pre_xfer(i2c_adap); + if (ret < 0) + return -ENODEV; + } + + if (adap->getscl == NULL) + pr_info("%s: Testing SDA only, SCL is not readable\n", name); + + sda = getsda(adap); + scl = (adap->getscl == NULL) ? 1 : getscl(adap); + if (!scl || !sda) { + printk(KERN_WARNING + "%s: bus seems to be busy (scl=%d, sda=%d)\n", + name, scl, sda); + goto bailout; + } + + sdalo(adap); + sda = getsda(adap); + scl = (adap->getscl == NULL) ? 1 : getscl(adap); + if (sda) { + printk(KERN_WARNING "%s: SDA stuck high!\n", name); + goto bailout; + } + if (!scl) { + printk(KERN_WARNING + "%s: SCL unexpected low while pulling SDA low!\n", + name); + goto bailout; + } + + sdahi(adap); + sda = getsda(adap); + scl = (adap->getscl == NULL) ? 1 : getscl(adap); + if (!sda) { + printk(KERN_WARNING "%s: SDA stuck low!\n", name); + goto bailout; + } + if (!scl) { + printk(KERN_WARNING + "%s: SCL unexpected low while pulling SDA high!\n", + name); + goto bailout; + } + + scllo(adap); + sda = getsda(adap); + scl = (adap->getscl == NULL) ? 0 : getscl(adap); + if (scl) { + printk(KERN_WARNING "%s: SCL stuck high!\n", name); + goto bailout; + } + if (!sda) { + printk(KERN_WARNING + "%s: SDA unexpected low while pulling SCL low!\n", + name); + goto bailout; + } + + sclhi(adap); + sda = getsda(adap); + scl = (adap->getscl == NULL) ? 1 : getscl(adap); + if (!scl) { + printk(KERN_WARNING "%s: SCL stuck low!\n", name); + goto bailout; + } + if (!sda) { + printk(KERN_WARNING + "%s: SDA unexpected low while pulling SCL high!\n", + name); + goto bailout; + } + + if (adap->post_xfer) + adap->post_xfer(i2c_adap); + + pr_info("%s: Test OK\n", name); + return 0; +bailout: + sdahi(adap); + sclhi(adap); + + if (adap->post_xfer) + adap->post_xfer(i2c_adap); + + return -ENODEV; +} + +/* ----- Utility functions +*/ + +/* try_address tries to contact a chip for a number of + * times before it gives up. + * return values: + * 1 chip answered + * 0 chip did not answer + * -x transmission error + */ +static int try_address(struct i2c_adapter *i2c_adap, + unsigned char addr, int retries) +{ + struct i2c_algo_bit_data *adap = i2c_adap->algo_data; + int i, ret = 0; + + for (i = 0; i <= retries; i++) { + ret = i2c_outb(i2c_adap, addr); + if (ret == 1 || i == retries) + break; + bit_dbg(3, &i2c_adap->dev, "emitting stop condition\n"); + i2c_stop(adap); + udelay(adap->udelay); + yield(); + bit_dbg(3, &i2c_adap->dev, "emitting start condition\n"); + i2c_start(adap); + } + if (i && ret) + bit_dbg(1, &i2c_adap->dev, + "Used %d tries to %s client at 0x%02x: %s\n", i + 1, + addr & 1 ? "read from" : "write to", addr >> 1, + ret == 1 ? "success" : "failed, timeout?"); + return ret; +} + +static int sendbytes(struct i2c_adapter *i2c_adap, struct i2c_msg *msg) +{ + const unsigned char *temp = msg->buf; + int count = msg->len; + unsigned short nak_ok = msg->flags & I2C_M_IGNORE_NAK; + int retval; + int wrcount = 0; + + while (count > 0) { + retval = i2c_outb(i2c_adap, *temp); + + /* OK/ACK; or ignored NAK */ + if ((retval > 0) || (nak_ok && (retval == 0))) { + count--; + temp++; + wrcount++; + + /* A slave NAKing the master means the slave didn't like + * something about the data it saw. For example, maybe + * the SMBus PEC was wrong. + */ + } else if (retval == 0) { + dev_err(&i2c_adap->dev, "sendbytes: NAK bailout.\n"); + return -EIO; + + /* Timeout; or (someday) lost arbitration + * + * FIXME Lost ARB implies retrying the transaction from + * the first message, after the "winning" master issues + * its STOP. As a rule, upper layer code has no reason + * to know or care about this ... it is *NOT* an error. + */ + } else { + dev_err(&i2c_adap->dev, "sendbytes: error %d\n", + retval); + return retval; + } + } + return wrcount; +} + +static int acknak(struct i2c_adapter *i2c_adap, int is_ack) +{ + struct i2c_algo_bit_data *adap = i2c_adap->algo_data; + + /* assert: sda is high */ + if (is_ack) /* send ack */ + setsda(adap, 0); + udelay((adap->udelay + 1) / 2); + if (sclhi(adap) < 0) { /* timeout */ + dev_err(&i2c_adap->dev, "readbytes: ack/nak timeout\n"); + return -ETIMEDOUT; + } + scllo(adap); + return 0; +} + +static int readbytes(struct i2c_adapter *i2c_adap, struct i2c_msg *msg) +{ + int inval; + int rdcount = 0; /* counts bytes read */ + unsigned char *temp = msg->buf; + int count = msg->len; + const unsigned flags = msg->flags; + + while (count > 0) { + inval = i2c_inb(i2c_adap); + if (inval >= 0) { + *temp = inval; + rdcount++; + } else { /* read timed out */ + break; + } + + temp++; + count--; + + /* Some SMBus transactions require that we receive the + transaction length as the first read byte. */ + if (rdcount == 1 && (flags & I2C_M_RECV_LEN)) { + if (inval <= 0 || inval > I2C_SMBUS_BLOCK_MAX) { + if (!(flags & I2C_M_NO_RD_ACK)) + acknak(i2c_adap, 0); + dev_err(&i2c_adap->dev, + "readbytes: invalid block length (%d)\n", + inval); + return -EPROTO; + } + /* The original count value accounts for the extra + bytes, that is, either 1 for a regular transaction, + or 2 for a PEC transaction. */ + count += inval; + msg->len += inval; + } + + bit_dbg(2, &i2c_adap->dev, "readbytes: 0x%02x %s\n", + inval, + (flags & I2C_M_NO_RD_ACK) + ? "(no ack/nak)" + : (count ? "A" : "NA")); + + if (!(flags & I2C_M_NO_RD_ACK)) { + inval = acknak(i2c_adap, count); + if (inval < 0) + return inval; + } + } + return rdcount; +} + +/* doAddress initiates the transfer by generating the start condition (in + * try_address) and transmits the address in the necessary format to handle + * reads, writes as well as 10bit-addresses. + * returns: + * 0 everything went okay, the chip ack'ed, or IGNORE_NAK flag was set + * -x an error occurred (like: -ENXIO if the device did not answer, or + * -ETIMEDOUT, for example if the lines are stuck...) + */ +static int bit_doAddress(struct i2c_adapter *i2c_adap, struct i2c_msg *msg) +{ + unsigned short flags = msg->flags; + unsigned short nak_ok = msg->flags & I2C_M_IGNORE_NAK; + struct i2c_algo_bit_data *adap = i2c_adap->algo_data; + + unsigned char addr; + int ret, retries; + + retries = nak_ok ? 0 : i2c_adap->retries; + + if (flags & I2C_M_TEN) { + /* a ten bit address */ + addr = 0xf0 | ((msg->addr >> 7) & 0x06); + bit_dbg(2, &i2c_adap->dev, "addr0: %d\n", addr); + /* try extended address code...*/ + ret = try_address(i2c_adap, addr, retries); + if ((ret != 1) && !nak_ok) { + dev_err(&i2c_adap->dev, + "died at extended address code\n"); + return -ENXIO; + } + /* the remaining 8 bit address */ + ret = i2c_outb(i2c_adap, msg->addr & 0xff); + if ((ret != 1) && !nak_ok) { + /* the chip did not ack / xmission error occurred */ + dev_err(&i2c_adap->dev, "died at 2nd address code\n"); + return -ENXIO; + } + if (flags & I2C_M_RD) { + bit_dbg(3, &i2c_adap->dev, + "emitting repeated start condition\n"); + i2c_repstart(adap); + /* okay, now switch into reading mode */ + addr |= 0x01; + ret = try_address(i2c_adap, addr, retries); + if ((ret != 1) && !nak_ok) { + dev_err(&i2c_adap->dev, + "died at repeated address code\n"); + return -EIO; + } + } + } else { /* normal 7bit address */ + addr = i2c_8bit_addr_from_msg(msg); + if (flags & I2C_M_REV_DIR_ADDR) + addr ^= 1; + ret = try_address(i2c_adap, addr, retries); + if ((ret != 1) && !nak_ok) + return -ENXIO; + } + + return 0; +} + +static void bit_i2c_unblock(struct i2c_adapter *i2c_adap) +{ + int i; + struct i2c_algo_bit_data *adap = i2c_adap->algo_data; + + for (i = 0; i < 9; i++) { + setscl(adap, 0); + udelay(5); + setscl(adap, 1); + udelay(5); + } + setscl(adap, 0); + setsda(adap, 0); + udelay(5); + setscl(adap, 1); + udelay(5); + setsda(adap, 1); +} + +static int check_bit_i2c_unblock(struct i2c_adapter *i2c_adap) +{ + struct i2c_algo_bit_data *adap = i2c_adap->algo_data; + int sda, scl; + + sda = getsda(adap); + scl = getscl(adap); + if ((sda == 0) && scl) { + // I2C_ALGO_BIT_ERROR("SCL is high and SDA is low, send 9 clock to device.\n"); + bit_i2c_unblock(i2c_adap); + } + + sda = getsda(adap); + scl = getscl(adap); + if (sda && scl) { + // I2C_ALGO_BIT_DEBUG("SCL and SDA are both high, i2c level check ok.\n"); + return 0; + } + dev_warn(&i2c_adap->dev, "Check i2c level failed, SCL %s, SDA %s.\n", scl ? "high" : "low", sda ? "high" : "low"); + return -EIO; +} + +static int bit_xfer(struct i2c_adapter *i2c_adap, + struct i2c_msg msgs[], int num) +{ + struct i2c_msg *pmsg; + struct i2c_algo_bit_data *adap = i2c_adap->algo_data; + int i, ret; + unsigned short nak_ok; + + if (adap->pre_xfer) { + ret = adap->pre_xfer(i2c_adap); + if (ret < 0) + return ret; + } + + if (check_bit_i2c_unblock(i2c_adap) < 0) { + // I2C_ALGO_BIT_ERROR("check i2c is block.\n"); + return -EIO; + } + + bit_dbg(3, &i2c_adap->dev, "emitting start condition\n"); + i2c_start(adap); + for (i = 0; i < num; i++) { + pmsg = &msgs[i]; + nak_ok = pmsg->flags & I2C_M_IGNORE_NAK; + if (!(pmsg->flags & I2C_M_NOSTART)) { + if (i) { + if (msgs[i - 1].flags & I2C_M_STOP) { + bit_dbg(3, &i2c_adap->dev, + "emitting enforced stop/start condition\n"); + i2c_stop(adap); + i2c_start(adap); + } else { + bit_dbg(3, &i2c_adap->dev, + "emitting repeated start condition\n"); + i2c_repstart(adap); + } + } + ret = bit_doAddress(i2c_adap, pmsg); + if ((ret != 0) && !nak_ok) { + bit_dbg(1, &i2c_adap->dev, + "NAK from device addr 0x%02x msg #%d\n", + msgs[i].addr, i); + goto bailout; + } + } + if (pmsg->flags & I2C_M_RD) { + /* read bytes into buffer*/ + ret = readbytes(i2c_adap, pmsg); + if (ret >= 1) + bit_dbg(2, &i2c_adap->dev, "read %d byte%s\n", + ret, ret == 1 ? "" : "s"); + if (ret < pmsg->len) { + if (ret >= 0) + ret = -EIO; + goto bailout; + } + } else { + /* write bytes from buffer */ + ret = sendbytes(i2c_adap, pmsg); + if (ret >= 1) + bit_dbg(2, &i2c_adap->dev, "wrote %d byte%s\n", + ret, ret == 1 ? "" : "s"); + if (ret < pmsg->len) { + if (ret >= 0) + ret = -EIO; + goto bailout; + } + } + } + ret = i; + +bailout: + bit_dbg(3, &i2c_adap->dev, "emitting stop condition\n"); + i2c_stop(adap); + + if (adap->post_xfer) + adap->post_xfer(i2c_adap); + return ret; +} + +static u32 bit_func(struct i2c_adapter *adap) +{ + return I2C_FUNC_I2C | I2C_FUNC_NOSTART | I2C_FUNC_SMBUS_EMUL | + I2C_FUNC_SMBUS_READ_BLOCK_DATA | + I2C_FUNC_SMBUS_BLOCK_PROC_CALL | + I2C_FUNC_10BIT_ADDR | I2C_FUNC_PROTOCOL_MANGLING; +} + + +/* -----exported algorithm data: ------------------------------------- */ + +const struct i2c_algorithm rg_i2c_bit_algo = { + .master_xfer = bit_xfer, + .functionality = bit_func, +}; +EXPORT_SYMBOL(rg_i2c_bit_algo); + +static const struct i2c_adapter_quirks i2c_bit_quirk_no_clk_stretch = { + .flags = I2C_AQ_NO_CLK_STRETCH, +}; + +/* + * registering functions to load algorithms at runtime + */ +static int __i2c_bit_add_bus(struct i2c_adapter *adap, + int (*add_adapter)(struct i2c_adapter *)) +{ + struct i2c_algo_bit_data *bit_adap = adap->algo_data; + int ret; + + if (bit_test) { + ret = test_bus(adap); + if (bit_test >= 2 && ret < 0) + return -ENODEV; + } + + /* register new adapter to i2c module... */ + adap->algo = &rg_i2c_bit_algo; + adap->retries = 3; + if (bit_adap->getscl == NULL) + adap->quirks = &i2c_bit_quirk_no_clk_stretch; + + /* + * We tried forcing SCL/SDA to an initial state here. But that caused a + * regression, sadly. Check Bugzilla #200045 for details. + */ + + ret = add_adapter(adap); + if (ret < 0) + return ret; + + /* Complain if SCL can't be read */ + if (bit_adap->getscl == NULL) { + dev_warn(&adap->dev, "Not I2C compliant: can't read SCL\n"); + dev_warn(&adap->dev, "Bus may be unreliable\n"); + } + return 0; +} + +int rg_i2c_bit_add_bus(struct i2c_adapter *adap) +{ + return __i2c_bit_add_bus(adap, i2c_add_adapter); +} +EXPORT_SYMBOL(rg_i2c_bit_add_bus); + +int rg_i2c_bit_add_numbered_bus(struct i2c_adapter *adap) +{ + return __i2c_bit_add_bus(adap, i2c_add_numbered_adapter); +} +EXPORT_SYMBOL(rg_i2c_bit_add_numbered_bus); + +MODULE_AUTHOR("Simon G. Vogl "); +MODULE_DESCRIPTION("I2C-Bus bit-banging algorithm"); +MODULE_LICENSE("GPL"); diff --git a/platform/broadcom/sonic-platform-modules-ragile/common/modules/rg-i2c-gpio.c b/platform/broadcom/sonic-platform-modules-ragile/common/modules/rg-i2c-gpio.c new file mode 100644 index 0000000000..bce3afac61 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ragile/common/modules/rg-i2c-gpio.c @@ -0,0 +1,431 @@ +/* + * Bitbanging I2C bus driver using the GPIO API + * + * Copyright (C) 2007 Atmel Corporation + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +extern int rg_i2c_bit_add_numbered_bus(struct i2c_adapter *adap); + +struct i2c_gpio_private_data { + struct gpio_desc *sda; + struct gpio_desc *scl; + struct i2c_adapter adap; + struct i2c_algo_bit_data bit_data; + struct i2c_gpio_platform_data pdata; +#ifdef CONFIG_I2C_GPIO_FAULT_INJECTOR + struct dentry *debug_dir; +#endif +}; + +/* + * Toggle SDA by changing the output value of the pin. This is only + * valid for pins configured as open drain (i.e. setting the value + * high effectively turns off the output driver.) + */ +static void i2c_gpio_setsda_val(void *data, int state) +{ + struct i2c_gpio_private_data *priv = data; + + gpiod_set_value_cansleep(priv->sda, state); +} + +/* + * Toggle SCL by changing the output value of the pin. This is used + * for pins that are configured as open drain and for output-only + * pins. The latter case will break the i2c protocol, but it will + * often work in practice. + */ +static void i2c_gpio_setscl_val(void *data, int state) +{ + struct i2c_gpio_private_data *priv = data; + + gpiod_set_value_cansleep(priv->scl, state); +} + +static int i2c_gpio_getsda(void *data) +{ + struct i2c_gpio_private_data *priv = data; + + return gpiod_get_value_cansleep(priv->sda); +} + +static int i2c_gpio_getscl(void *data) +{ + struct i2c_gpio_private_data *priv = data; + + return gpiod_get_value_cansleep(priv->scl); +} + +#ifdef CONFIG_I2C_GPIO_FAULT_INJECTOR +static struct dentry *i2c_gpio_debug_dir; + +#define setsda(bd, val) ((bd)->setsda((bd)->data, val)) +#define setscl(bd, val) ((bd)->setscl((bd)->data, val)) +#define getsda(bd) ((bd)->getsda((bd)->data)) +#define getscl(bd) ((bd)->getscl((bd)->data)) + +#define WIRE_ATTRIBUTE(wire) \ + static int fops_##wire##_get(void *data, u64 *val) \ +{ \ + struct i2c_gpio_private_data *priv = data; \ + \ + i2c_lock_bus(&priv->adap, I2C_LOCK_ROOT_ADAPTER); \ + *val = get##wire(&priv->bit_data); \ + i2c_unlock_bus(&priv->adap, I2C_LOCK_ROOT_ADAPTER); \ + return 0; \ +} \ +static int fops_##wire##_set(void *data, u64 val) \ +{ \ + struct i2c_gpio_private_data *priv = data; \ + \ + i2c_lock_bus(&priv->adap, I2C_LOCK_ROOT_ADAPTER); \ + set##wire(&priv->bit_data, val); \ + i2c_unlock_bus(&priv->adap, I2C_LOCK_ROOT_ADAPTER); \ + return 0; \ +} \ +DEFINE_DEBUGFS_ATTRIBUTE(fops_##wire, fops_##wire##_get, fops_##wire##_set, "%llu\n") + +WIRE_ATTRIBUTE(scl); +WIRE_ATTRIBUTE(sda); + +static void i2c_gpio_incomplete_transfer(struct i2c_gpio_private_data *priv, + u32 pattern, u8 pattern_size) +{ + struct i2c_algo_bit_data *bit_data = &priv->bit_data; + int i; + + i2c_lock_bus(&priv->adap, I2C_LOCK_ROOT_ADAPTER); + + /* START condition */ + setsda(bit_data, 0); + udelay(bit_data->udelay); + + /* Send pattern, request ACK, don't send STOP */ + for (i = pattern_size - 1; i >= 0; i--) { + setscl(bit_data, 0); + udelay(bit_data->udelay / 2); + setsda(bit_data, (pattern >> i) & 1); + udelay((bit_data->udelay + 1) / 2); + setscl(bit_data, 1); + udelay(bit_data->udelay); + } + + i2c_unlock_bus(&priv->adap, I2C_LOCK_ROOT_ADAPTER); +} + +static int fops_incomplete_addr_phase_set(void *data, u64 addr) +{ + struct i2c_gpio_private_data *priv = data; + u32 pattern; + + if (addr > 0x7f) + return -EINVAL; + + /* ADDR (7 bit) + RD (1 bit) + Client ACK, keep SDA hi (1 bit) */ + pattern = (addr << 2) | 3; + + i2c_gpio_incomplete_transfer(priv, pattern, 9); + + return 0; +} +DEFINE_DEBUGFS_ATTRIBUTE(fops_incomplete_addr_phase, NULL, fops_incomplete_addr_phase_set, "%llu\n"); + +static int fops_incomplete_write_byte_set(void *data, u64 addr) +{ + struct i2c_gpio_private_data *priv = data; + u32 pattern; + + if (addr > 0x7f) + return -EINVAL; + + /* ADDR (7 bit) + WR (1 bit) + Client ACK (1 bit) */ + pattern = (addr << 2) | 1; + /* 0x00 (8 bit) + Client ACK, keep SDA hi (1 bit) */ + pattern = (pattern << 9) | 1; + + i2c_gpio_incomplete_transfer(priv, pattern, 18); + + return 0; +} +DEFINE_DEBUGFS_ATTRIBUTE(fops_incomplete_write_byte, NULL, fops_incomplete_write_byte_set, "%llu\n"); + +static void i2c_gpio_fault_injector_init(struct platform_device *pdev) +{ + struct i2c_gpio_private_data *priv = platform_get_drvdata(pdev); + + /* + * If there will be a debugfs-dir per i2c adapter somewhen, put the + * 'fault-injector' dir there. Until then, we have a global dir with + * all adapters as subdirs. + */ + if (!i2c_gpio_debug_dir) { + i2c_gpio_debug_dir = debugfs_create_dir("i2c-fault-injector", NULL); + if (!i2c_gpio_debug_dir) + return; + } + + priv->debug_dir = debugfs_create_dir(pdev->name, i2c_gpio_debug_dir); + if (!priv->debug_dir) + return; + + debugfs_create_file_unsafe("scl", 0600, priv->debug_dir, priv, &fops_scl); + debugfs_create_file_unsafe("sda", 0600, priv->debug_dir, priv, &fops_sda); + debugfs_create_file_unsafe("incomplete_address_phase", 0200, priv->debug_dir, + priv, &fops_incomplete_addr_phase); + debugfs_create_file_unsafe("incomplete_write_byte", 0200, priv->debug_dir, + priv, &fops_incomplete_write_byte); +} + +static void i2c_gpio_fault_injector_exit(struct platform_device *pdev) +{ + struct i2c_gpio_private_data *priv = platform_get_drvdata(pdev); + + debugfs_remove_recursive(priv->debug_dir); +} +#else +static inline void i2c_gpio_fault_injector_init(struct platform_device *pdev) {} +static inline void i2c_gpio_fault_injector_exit(struct platform_device *pdev) {} +#endif /* CONFIG_I2C_GPIO_FAULT_INJECTOR*/ + +static void of_i2c_gpio_get_props(struct device_node *np, + struct i2c_gpio_platform_data *pdata) +{ + u32 reg; + + of_property_read_u32(np, "i2c-gpio,delay-us", &pdata->udelay); + + if (!of_property_read_u32(np, "i2c-gpio,timeout-ms", ®)) + pdata->timeout = msecs_to_jiffies(reg); + + pdata->sda_is_open_drain = + of_property_read_bool(np, "i2c-gpio,sda-open-drain"); + pdata->scl_is_open_drain = + of_property_read_bool(np, "i2c-gpio,scl-open-drain"); + pdata->scl_is_output_only = + of_property_read_bool(np, "i2c-gpio,scl-output-only"); +} + +static struct gpio_desc *i2c_gpio_get_desc(struct device *dev, + const char *con_id, + unsigned int index, + enum gpiod_flags gflags) +{ + struct gpio_desc *retdesc; + int ret; + + retdesc = devm_gpiod_get(dev, con_id, gflags); + if (!IS_ERR(retdesc)) { + dev_dbg(dev, "got GPIO from name %s\n", con_id); + return retdesc; + } + + retdesc = devm_gpiod_get_index(dev, NULL, index, gflags); + if (!IS_ERR(retdesc)) { + dev_dbg(dev, "got GPIO from index %u\n", index); + return retdesc; + } + + ret = PTR_ERR(retdesc); + + /* FIXME: hack in the old code, is this really necessary? */ + if (ret == -EINVAL) + retdesc = ERR_PTR(-EPROBE_DEFER); + + /* This happens if the GPIO driver is not yet probed, let's defer */ + if (ret == -ENOENT) + retdesc = ERR_PTR(-EPROBE_DEFER); + + if (PTR_ERR(retdesc) != -EPROBE_DEFER) + dev_err(dev, "error trying to get descriptor: %d\n", ret); + + return retdesc; +} + +static int i2c_gpio_probe(struct platform_device *pdev) +{ + struct i2c_gpio_private_data *priv; + struct i2c_gpio_platform_data *pdata; + struct i2c_algo_bit_data *bit_data; + struct i2c_adapter *adap; + struct device *dev = &pdev->dev; + struct device_node *np = dev->of_node; + enum gpiod_flags gflags; + int ret; + + priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL); + if (!priv) + return -ENOMEM; + + adap = &priv->adap; + bit_data = &priv->bit_data; + pdata = &priv->pdata; + + if (np) { + of_i2c_gpio_get_props(np, pdata); + } else { + /* + * If all platform data settings are zero it is OK + * to not provide any platform data from the board. + */ + if (dev_get_platdata(dev)) + memcpy(pdata, dev_get_platdata(dev), sizeof(*pdata)); + } + + /* + * First get the GPIO pins; if it fails, we'll defer the probe. + * If the SDA line is marked from platform data or device tree as + * "open drain" it means something outside of our control is making + * this line being handled as open drain, and we should just handle + * it as any other output. Else we enforce open drain as this is + * required for an I2C bus. + */ + if (pdata->sda_is_open_drain) + gflags = GPIOD_OUT_HIGH; + else + gflags = GPIOD_OUT_HIGH_OPEN_DRAIN; + priv->sda = i2c_gpio_get_desc(dev, "sda", 0, gflags); + if (IS_ERR(priv->sda)) + return PTR_ERR(priv->sda); + + /* + * If the SCL line is marked from platform data or device tree as + * "open drain" it means something outside of our control is making + * this line being handled as open drain, and we should just handle + * it as any other output. Else we enforce open drain as this is + * required for an I2C bus. + */ + if (pdata->scl_is_open_drain) + gflags = GPIOD_OUT_HIGH; + else + gflags = GPIOD_OUT_HIGH_OPEN_DRAIN; + priv->scl = i2c_gpio_get_desc(dev, "scl", 1, gflags); + if (IS_ERR(priv->scl)) + return PTR_ERR(priv->scl); + + if (gpiod_cansleep(priv->sda) || gpiod_cansleep(priv->scl)) + dev_warn(dev, "Slow GPIO pins might wreak havoc into I2C/SMBus bus timing"); + + bit_data->setsda = i2c_gpio_setsda_val; + bit_data->setscl = i2c_gpio_setscl_val; + + if (!pdata->scl_is_output_only) + bit_data->getscl = i2c_gpio_getscl; + bit_data->getsda = i2c_gpio_getsda; + + if (pdata->udelay) + bit_data->udelay = pdata->udelay; + else if (pdata->scl_is_output_only) + bit_data->udelay = 50; /* 10 kHz */ + else + bit_data->udelay = 5; /* 100 kHz */ + + if (pdata->timeout) + bit_data->timeout = pdata->timeout; + else + bit_data->timeout = HZ / 10; /* 100 ms */ + + bit_data->data = priv; + + adap->owner = THIS_MODULE; + if (np) + strlcpy(adap->name, dev_name(dev), sizeof(adap->name)); + else + snprintf(adap->name, sizeof(adap->name), "i2c-gpio%d", pdev->id); + + adap->algo_data = bit_data; + adap->class = I2C_CLASS_HWMON | I2C_CLASS_SPD; + adap->dev.parent = dev; + adap->dev.of_node = np; + + adap->nr = pdev->id; + ret = rg_i2c_bit_add_numbered_bus(adap); + if (ret) + return ret; + + platform_set_drvdata(pdev, priv); + + /* + * FIXME: using global GPIO numbers is not helpful. If/when we + * get accessors to get the actual name of the GPIO line, + * from the descriptor, then provide that instead. + */ + dev_info(dev, "using lines %u (SDA) and %u (SCL%s)\n", + desc_to_gpio(priv->sda), desc_to_gpio(priv->scl), + pdata->scl_is_output_only + ? ", no clock stretching" : ""); + + i2c_gpio_fault_injector_init(pdev); + + return 0; +} + +static int i2c_gpio_remove(struct platform_device *pdev) +{ + struct i2c_gpio_private_data *priv; + struct i2c_adapter *adap; + + i2c_gpio_fault_injector_exit(pdev); + + priv = platform_get_drvdata(pdev); + adap = &priv->adap; + + i2c_del_adapter(adap); + + return 0; +} + +#if defined(CONFIG_OF) +static const struct of_device_id i2c_gpio_dt_ids[] = { + { .compatible = "rg-i2c-gpio", }, + { /* sentinel */ } +}; + +MODULE_DEVICE_TABLE(of, i2c_gpio_dt_ids); +#endif + +static struct platform_driver i2c_gpio_driver = { + .driver = { + .name = "rg-i2c-gpio", + .of_match_table = of_match_ptr(i2c_gpio_dt_ids), + }, + .probe = i2c_gpio_probe, + .remove = i2c_gpio_remove, +}; + +static int __init i2c_gpio_init(void) +{ + int ret; + + ret = platform_driver_register(&i2c_gpio_driver); + if (ret) + printk(KERN_ERR "i2c-gpio: probe failed: %d\n", ret); + + return ret; +} +subsys_initcall(i2c_gpio_init); + +static void __exit i2c_gpio_exit(void) +{ + platform_driver_unregister(&i2c_gpio_driver); +} +module_exit(i2c_gpio_exit); + +MODULE_AUTHOR("Haavard Skinnemoen (Atmel)"); +MODULE_DESCRIPTION("Platform-independent bitbanging I2C driver"); +MODULE_LICENSE("GPL"); +MODULE_ALIAS("platform:i2c-gpio"); diff --git a/platform/broadcom/sonic-platform-modules-ragile/common/modules/rg_fan.c b/platform/broadcom/sonic-platform-modules-ragile/common/modules/rg_fan.c index 37cd5f8156..f8a70adeee 100755 --- a/platform/broadcom/sonic-platform-modules-ragile/common/modules/rg_fan.c +++ b/platform/broadcom/sonic-platform-modules-ragile/common/modules/rg_fan.c @@ -78,7 +78,7 @@ typedef enum dfd_dev_info_type_e { } dfd_dev_tlv_type_t; typedef struct dfd_dev_head_info_s { - uint8_t ver; /* define E2PROM version,default is 0x01 */ + uint8_t ver; /* define E2PROM version，default is 0x01 */ uint8_t flag; /* flag is 0x7E in new version E2PROM */ uint8_t hw_ver; /* consists of main version and revise version */ uint8_t type; /* HW type */ diff --git a/platform/broadcom/sonic-platform-modules-ragile/common/script/device_i2c.py b/platform/broadcom/sonic-platform-modules-ragile/common/script/device_i2c.py index 962eb1b086..cca9f0393d 100755 --- a/platform/broadcom/sonic-platform-modules-ragile/common/script/device_i2c.py +++ b/platform/broadcom/sonic-platform-modules-ragile/common/script/device_i2c.py @@ -5,7 +5,7 @@ import click import os import time from ragileconfig import GLOBALCONFIG, GLOBALINITPARAM, GLOBALINITCOMMAND, MAC_LED_RESET, STARTMODULE, i2ccheck_params -from ragileutil import rgpciwr, os_system, rgi2cset +from ragileutil import rgpciwr, os_system, rgi2cset, io_wr CONTEXT_SETTINGS = dict(help_option_names=['-h', '--help']) @@ -154,7 +154,7 @@ def add_dev(name, bus, loc): if name == "lm75": time.sleep(0.1) pdevpath = "/sys/bus/i2c/devices/i2c-%d/" % (bus) - for i in range(1, 100):#wait for mother-bus generation, maximum wait time is 10s + for i in range(1, 100):#wait for mother-bus generation，maximum wait time is 10s if os.path.exists(pdevpath) == True: break time.sleep(0.1) @@ -240,13 +240,16 @@ def adddrivers(): def otherinit(): for index in GLOBALINITPARAM: - # write_sysfs_value(index["loc"], index["value"]) - ret, _ = rgi2cset( - index.get("bus"), - index.get("devaddr"), - index.get("offset"), - index.get("val") - ) + index_type = index.get("type", None) + if index_type == "io": + ret = io_wr(index.get("offset"), index.get("val")) + else: + ret, _ = rgi2cset( + index.get("bus"), + index.get("devaddr"), + index.get("offset"), + index.get("val") + ) if not ret: click.echo("%%DEVICE_I2C-INIT: init param %s failed." % index.get("name")) diff --git a/platform/broadcom/sonic-platform-modules-ragile/common/script/fancontrol.py b/platform/broadcom/sonic-platform-modules-ragile/common/script/fancontrol.py index e87268cea7..19214b3040 100755 --- a/platform/broadcom/sonic-platform-modules-ragile/common/script/fancontrol.py +++ b/platform/broadcom/sonic-platform-modules-ragile/common/script/fancontrol.py @@ -31,6 +31,8 @@ from ragileutil import ( get_sysfs_value, strtoint, rgi2cset, + io_rd, + rgsysset, ) @@ -666,7 +668,7 @@ class FanControl(object): logger.error(str(e)) return False - # device error algorithm Tmac-Tin >= 50, or Tmac-Tin <= -50 + # device error algorithm Tmac-Tin≥50℃, or Tmac-Tin≤-50℃ def check_dev_err(self): try: if (self.mac_aver - self.intemp) >= MONITOR_CONST.MAC_UP_TEMP or ( diff --git a/platform/broadcom/sonic-platform-modules-ragile/common/script/ragilecommon.py b/platform/broadcom/sonic-platform-modules-ragile/common/script/ragilecommon.py index 07f66469aa..0adad9d746 100755 --- a/platform/broadcom/sonic-platform-modules-ragile/common/script/ragilecommon.py +++ b/platform/broadcom/sonic-platform-modules-ragile/common/script/ragilecommon.py @@ -211,6 +211,8 @@ MONITOR_INTERVAL = 60 MONITOR_MAC_SOURCE_SYSFS = (0) MONITOR_MAC_SOURCE_PATH = None # sysfs path + +# default MAC AVS parameters MAC_AVS_PARAM = { 0x72: 0x0384, 0x73: 0x037E, @@ -302,7 +304,7 @@ fanloc = {"name": "fanset", "location": "0-0032/fan_speed_set"} ####================================Adaption-Area================================ #### RAGILE_COMMON common configuration head -#### "platform" specific configuration head +#### “platform” specific configuration head #### PCA9548START = 11 PCA9548BUSEND = 74 diff --git a/platform/broadcom/sonic-platform-modules-ragile/common/script/ragileutil.py b/platform/broadcom/sonic-platform-modules-ragile/common/script/ragileutil.py index 7ef2d933d2..debfcad5bc 100755 --- a/platform/broadcom/sonic-platform-modules-ragile/common/script/ragileutil.py +++ b/platform/broadcom/sonic-platform-modules-ragile/common/script/ragileutil.py @@ -382,7 +382,7 @@ def getInputSetmac(val): class fan_tlv(object): - VERSION = 0x01 # E2PROM Version, start from 0x01 + VERSION = 0x01 # E2PROM Version，start from 0x01 FLAG = 0x7E # New E2PROM version flag is 0x7E HW_VER = 0x01 # compose by master version and fixed version TYPE = 0xF1 # hw type defination @@ -1043,7 +1043,7 @@ def util_setmac(eth, mac): log_debug(ifconfigcmd) ret, status = os_system(ifconfigcmd) if ret: - raise SETMACException("software set Internet cardMAC error") + raise SETMACException("software set Internet card MAC error") index = 0 for item in macs: cmd = "ethtool -E %s magic %s offset %d value 0x%s" % (eth, magic, index, item) @@ -1051,7 +1051,7 @@ def util_setmac(eth, mac): index += 1 ret, log = os_system(cmd) if ret != 0: - raise SETMACException(" set hardware Internet card MAC error") + raise SETMACException("set hardware Internet card MAC error") # get value after setting cmd_t = "ethtool -e eth0 offset 0 length 6" ret, log = os_system(cmd_t) @@ -1224,13 +1224,15 @@ def rgpcird(pcibus, slot, fn, bar, offset): s = result[::-1] val = 0 for i in range(0, len(s)): - val = val << 8 | ord(s[i]) + val = val << 8 | s[i] return "0x%08x" % val def rgpciwr(pcibus, slot, fn, bar, offset, data): """write pci register""" ret = inttostr(data, 4) + ret = str.encode(ret) + ret = ret.strip(b'\xc2') filename = "/sys/bus/pci/devices/0000:%02x:%02x.%x/resource%d" % ( int(pcibus), int(slot), @@ -1245,7 +1247,7 @@ def rgpciwr(pcibus, slot, fn, bar, offset, data): s = result[::-1] val = 0 for i in range(0, len(s)): - val = val << 8 | ord(s[i]) + val = val << 8 | s[i] data.close() @@ -1293,13 +1295,14 @@ def fan_setmac(): def checkfansninput(fan_sn, fansntemp): if fan_sn in fansntemp: - RJPRINTERR("exist same Serial Number, please input again") + RJPRINTERR("exist same Serial Number，please input again") return False if len(fan_sn) != 13: - RJPRINTERR("Serial Number length incorrect, please input again") + RJPRINTERR("Serial Number length incorrect，please input again") return False return True + # check hw version def checkfanhwinput(hw): if len(hw) != 4: @@ -1413,7 +1416,7 @@ def fac_fans_setmac_tlv(ret): print("\n*******************************\n") util_show_fanse2(fans) - if getInputCheck("check input correctly or not(Yes/No):") == True: + if getInputCheck("check input correctly or not（Yes/No):") == True: for fan in fans: log_debug("ouput fan") fac_fan_setmac(fan) @@ -2051,30 +2054,27 @@ def get_version_config_info(attr_key, file_name=None): return None -def io_rd(reg_addr, len=1): - u"""io read""" +def io_rd(reg_addr, size=1): + path = "/dev/port" + ret = "" + fd = None try: - regaddr = 0 - if type(reg_addr) == int: - regaddr = reg_addr - else: - regaddr = int(reg_addr, 16) - devfile = "/dev/port" - fd = os.open(devfile, os.O_RDWR | os.O_CREAT) - os.lseek(fd, regaddr, os.SEEK_SET) - str = os.read(fd, len) - return "".join(["%02x" % ord(item) for item in str]) - except ValueError: - return None + reg_addr = int(reg_addr) + fd = os.open(path, os.O_RDWR|os.O_CREAT) + for i in range(size): + os.lseek(fd, reg_addr+i, os.SEEK_SET) + ret+="{:02x}".format(ord(os.read(fd, 1).decode('latin-1'))) + return ret except Exception as e: - print(e) + print(str(e)) return None finally: - os.close(fd) + if fd: os.close(fd) def io_wr(reg_addr, reg_data): u"""io write""" + fd = None try: regdata = 0 regaddr = 0 @@ -2089,7 +2089,7 @@ def io_wr(reg_addr, reg_data): devfile = "/dev/port" fd = os.open(devfile, os.O_RDWR | os.O_CREAT) os.lseek(fd, regaddr, os.SEEK_SET) - os.write(fd, chr(regdata)) + os.write(fd, regdata.to_bytes(2, 'little')) return True except ValueError as e: print(e) @@ -2098,4 +2098,4 @@ def io_wr(reg_addr, reg_data): print(e) return False finally: - os.close(fd) + if fd: os.close(fd) diff --git a/platform/broadcom/sonic-platform-modules-ragile/debian/control b/platform/broadcom/sonic-platform-modules-ragile/debian/control index ceef333656..795c8219a6 100755 --- a/platform/broadcom/sonic-platform-modules-ragile/debian/control +++ b/platform/broadcom/sonic-platform-modules-ragile/debian/control @@ -11,3 +11,11 @@ Description: kernel modules for platform devices such as fan, led, sfp Package: platform-modules-ragile-ra-b6910-64c Architecture: amd64 Description: kernel modules for platform devices such as fan, led, sfp + +Package: platform-modules-ragile-ra-b6510-32c +Architecture: amd64 +Description: kernel modules for platform devices such as fan, led, sfp + +Package: platform-modules-ragile-ra-b6920-4s +Architecture: amd64 +Description: kernel modules for platform devices such as fan, led, sfp diff --git a/platform/broadcom/sonic-platform-modules-ragile/debian/platform-modules-ragile-ra-b6920-4s.install b/platform/broadcom/sonic-platform-modules-ragile/debian/platform-modules-ragile-ra-b6920-4s.install new file mode 100644 index 0000000000..0034aa7060 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ragile/debian/platform-modules-ragile-ra-b6920-4s.install @@ -0,0 +1 @@ +ra-b6920-4s/scripts/pddf_post_device_create.sh /usr/local/bin diff --git a/platform/broadcom/sonic-platform-modules-ragile/debian/rule-ragile.mk b/platform/broadcom/sonic-platform-modules-ragile/debian/rule-ragile.mk index c3294dc9e1..6620b8762f 100755 --- a/platform/broadcom/sonic-platform-modules-ragile/debian/rule-ragile.mk +++ b/platform/broadcom/sonic-platform-modules-ragile/debian/rule-ragile.mk @@ -2,5 +2,7 @@ currentdir = $(shell pwd) MODULE_DIRS := ra-b6510-48v8c MODULE_DIRS += ra-b6910-64c +MODULE_DIRS += ra-b6510-32c +MODULE_DIRS += ra-b6920-4s export MODULE_DIRS diff --git a/platform/broadcom/sonic-platform-modules-ragile/ra-b6510-32c/LICENSE b/platform/broadcom/sonic-platform-modules-ragile/ra-b6510-32c/LICENSE new file mode 100755 index 0000000000..d37122689f --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ragile/ra-b6510-32c/LICENSE @@ -0,0 +1,15 @@ +Copyright (C) 2016 Microsoft, Inc +Copyright (C) 2018 Ragile Network Corporation +This program is free software; you can redistribute it and/or +modify it under the terms of the GNU General Public License +as published by the Free Software Foundation; either version 2 +of the License, or (at your option) any later version. + +This program is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with this program; if not, write to the Free Software +Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA. diff --git a/platform/broadcom/sonic-platform-modules-ragile/ra-b6510-32c/MAINTAINERS b/platform/broadcom/sonic-platform-modules-ragile/ra-b6510-32c/MAINTAINERS new file mode 100755 index 0000000000..ec82224050 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ragile/ra-b6510-32c/MAINTAINERS @@ -0,0 +1,5 @@ +# See the SONiC project governance document for more information + +Name = "support" +Email = "support@ragile.com" +Mailinglist = sonicproject@googlegroups.com diff --git a/platform/broadcom/sonic-platform-modules-ragile/ra-b6510-32c/Makefile b/platform/broadcom/sonic-platform-modules-ragile/ra-b6510-32c/Makefile new file mode 100755 index 0000000000..46415e74ab --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ragile/ra-b6510-32c/Makefile @@ -0,0 +1,26 @@ +PWD = $(shell pwd) +DIR_KERNEL_SRC = $(PWD)/modules/driver +EXTRA_CFLAGS:= -I$(M)/include +EXTRA_CFLAGS+= -Wall +SUB_BUILD_DIR = $(PWD)/build +INSTALL_DIR = $(SUB_BUILD_DIR)/$(KERNEL_SRC)/$(INSTALL_MOD_DIR) +INSTALL_SCRIPT_DIR = $(SUB_BUILD_DIR)/usr/local/bin +INSTALL_SERVICE_DIR = $(SUB_BUILD_DIR)/lib/systemd/system/ + +KBUILD_EXTRA_SYMBOLS += $(DIR_KERNEL_SRC)/Module.symvers +export KBUILD_EXTRA_SYMBOLS + +all: + $(MAKE) -C $(KBUILD_OUTPUT) M=$(DIR_KERNEL_SRC) modules + @if [ ! -d ${INSTALL_DIR} ]; then mkdir -p ${INSTALL_DIR} ;fi + cp -r $(DIR_KERNEL_SRC)/*.ko $(INSTALL_DIR) + @if [ ! -d ${INSTALL_SCRIPT_DIR} ]; then mkdir -p ${INSTALL_SCRIPT_DIR} ;fi + cp -r $(PWD)/config/* $(INSTALL_SCRIPT_DIR) + @if [ ! -d ${INSTALL_SERVICE_DIR} ]; then mkdir -p ${INSTALL_SERVICE_DIR} ;fi + cp $(PWD)/systemd/*.service $(INSTALL_SERVICE_DIR) +clean: + rm -f ${DIR_KERNEL_SRC}/*.o ${DIR_KERNEL_SRC}/*.ko ${DIR_KERNEL_SRC}/*.mod.c ${DIR_KERNEL_SRC}/.*.cmd + rm -f ${DIR_KERNEL_SRC}/Module.markers ${DIR_KERNEL_SRC}/Module.symvers ${DIR_KERNEL_SRC}/modules.order + rm -rf ${DIR_KERNEL_SRC}/.tmp_versions + rm -rf $(SUB_BUILD_DIR) + diff --git a/platform/broadcom/sonic-platform-modules-ragile/ra-b6510-32c/README.md b/platform/broadcom/sonic-platform-modules-ragile/ra-b6510-32c/README.md new file mode 100755 index 0000000000..787636c4ad --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ragile/ra-b6510-32c/README.md @@ -0,0 +1 @@ +Device drivers for support of ragile platform for the SONiC project diff --git a/platform/broadcom/sonic-platform-modules-ragile/ra-b6510-32c/config/x86_64_ragile_ra_b6510_32c_r0_config.py b/platform/broadcom/sonic-platform-modules-ragile/ra-b6510-32c/config/x86_64_ragile_ra_b6510_32c_r0_config.py new file mode 100755 index 0000000000..2806615277 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ragile/ra-b6510-32c/config/x86_64_ragile_ra_b6510_32c_r0_config.py @@ -0,0 +1,311 @@ +#!/usr/bin/python +# -*- coding: UTF-8 -*- +from ragilecommon import * +PCA9548START = -1 +PCA9548BUSEND = -2 + + +RAGILE_CARDID = 0x0000404b +RAGILE_PRODUCTNAME = "RA-B6510-32C" + +fanlevel = { + "tips":["LOW","MIDDLE","HIGH"], + "level":[51,150,255], + "low_speed":[500,7500,17000], + "high_speed":[11000,22500,28500] +} + +fanloc =[ {"name":"FAN1", "location":"2-000d/fan1_pwm" , + "childfans":[{"name":"FRONT ROTOR", "location":"2-000d/fan1_input"},{"name":"BACK ROTOR", "location":"2-000d/fan2_input"} ]}, + {"name":"FAN2", "location":"2-000d/fan3_pwm", + "childfans":[{"name":"FRONT ROTOR", "location":"2-000d/fan3_input"},{"name":"BACK ROTOR", "location":"2-000d/fan4_input"} ]}, + {"name":"FAN3", "location":"2-000d/fan5_pwm", + "childfans":[{"name":"FRONT ROTOR", "location":"2-000d/fan5_input"},{"name":"BACK ROTOR", "location":"2-000d/fan6_input"} ]}, + {"name":"FAN4", "location":"2-000d/fan7_pwm", + "childfans":[{"name":"FRONT ROTOR", "location":"2-000d/fan7_input"},{"name":"BACK ROTOR", "location":"2-000d/fan8_input"} ]}, + {"name":"FAN5", "location":"2-000d/fan9_pwm", + "childfans":[{"name":"FRONT ROTOR", "location":"2-000d/fan9_input"},{"name":"BACK ROTOR", "location":"2-000d/fan10_input"} ]}, + ] + + +STARTMODULE = { + "fancontrol":1, + "avscontrol":1, + "avscontrol_restful":0, + "macledreset":1, + "dev_monitor": 1, + } + +DEV_MONITOR_PARAM = { + "polling_time" : 10, + "psus": [ + {"name": "psu1", + "present": {"gettype":"io", "io_addr":0x951,"presentbit": 0,"okval":0}, + "device": [ + {"id": "psu1pmbus", "name": "fsp1200", "bus": 24, "loc": 0x58, "attr": "hwmon"}, + {"id": "psu1frue2", "name": "24c02", "bus": 24, "loc": 0x50, "attr": "eeprom"}, + ], + }, + {"name": "psu2", + "present": {"gettype":"io", "io_addr":0x951,"presentbit": 4,"okval":0}, + "device": [ + {"id": "psu2pmbus", "name": "fsp1200", "bus": 25, "loc": 0x58, "attr": "hwmon"}, + {"id": "psu2frue2", "name": "24c02", "bus": 25, "loc": 0x50, "attr": "eeprom"}, + ], + }, + ], + "fans": [ + {"name": "fan1", + "present": {"gettype": "i2c", "bus": 2, "loc": 0x0d, "offset": 0x30, "presentbit": 0, "okval": 0}, + "device": [ + {"id": "fan1frue2", "name": "24c02", "bus": 16, "loc": 0x50, "attr": "eeprom"}, + ], + }, + {"name": "fan2", + "present": {"gettype": "i2c", "bus": 2, "loc": 0x0d, "offset": 0x30, "presentbit": 1, "okval": 0}, + "device": [ + {"id": "fan2frue2", "name": "24c02", "bus": 17, "loc": 0x50, "attr": "eeprom"}, + ], + }, + {"name": "fan3", + "present": {"gettype": "i2c", "bus": 2, "loc": 0x0d, "offset": 0x30, "presentbit": 2, "okval": 0}, + "device": [ + {"id": "fan3frue2", "name": "24c02", "bus": 18, "loc": 0x50, "attr": "eeprom"}, + ], + }, + {"name": "fan4", + "present": {"gettype": "i2c", "bus": 2, "loc": 0x0d, "offset": 0x30, "presentbit": 3, "okval": 0}, + "device": [ + {"id": "fan4frue2", "name": "24c02", "bus": 19, "loc": 0x50, "attr": "eeprom"}, + ], + }, + {"name": "fan5", + "present": {"gettype": "i2c", "bus": 2, "loc": 0x0d, "offset": 0x30, "presentbit": 4, "okval": 0}, + "device": [ + {"id": "fan5frue2", "name": "24c02", "bus": 20, "loc": 0x50, "attr": "eeprom"}, + ], + }, + ], +} + + +MONITOR_TEMP_MIN = 38 +MONITOR_K = 11 +MONITOR_MAC_IN = 35 +MONITOR_DEFAULT_SPEED = 0x60 +MONITOR_MAX_SPEED = 0xFF +MONITOR_MIN_SPEED = 0x33 +MONITOR_MAC_ERROR_SPEED = 0XBB +MONITOR_FAN_TOTAL_NUM = 5 +MONITOR_MAC_UP_TEMP = 50 +MONITOR_MAC_LOWER_TEMP = -50 +MONITOR_MAC_MAX_TEMP = 100 # + +MONITOR_FALL_TEMP = 4 +MONITOR_MAC_WARNING_THRESHOLD = 100 #100 +MONITOR_OUTTEMP_WARNING_THRESHOLD = 85 +MONITOR_BOARDTEMP_WARNING_THRESHOLD = 85 +MONITOR_CPUTEMP_WARNING_THRESHOLD = 85 +MONITOR_INTEMP_WARNING_THRESHOLD = 70 #70 + +MONITOR_MAC_CRITICAL_THRESHOLD = 105 #105 +MONITOR_OUTTEMP_CRITICAL_THRESHOLD = 90 #90 +MONITOR_BOARDTEMP_CRITICAL_THRESHOLD = 90 #90 +MONITOR_CPUTEMP_CRITICAL_THRESHOLD = 100 #100 +MONITOR_INTEMP_CRITICAL_THRESHOLD = 80 # 80 +MONITOR_CRITICAL_NUM = 3 +MONITOR_SHAKE_TIME = 20 +MONITOR_INTERVAL = 60 + +MONITOR_SYS_LED = [ + { + "cmdstr":"/sys/devices/pci0000:00/0000:00:1f.0/broad_front_sys", + "yellow":0x06, + "red":0x02, + "green":0x04, + "type":"sysfs", + }, +] + +MONITOR_SYS_FAN_LED = [ + { + "cmdstr":"/sys/devices/pci0000:00/0000:00:1f.0/broad_front_fan", + "yellow":0x06, + "red":0x02, + "green":0x04, + "type":"sysfs", + }, +] +MONITOR_FANS_LED = [ + {"bus":2,"devno":0x0d, "addr":0x3b, "green":0x04, "red":0x02}, + {"bus":2,"devno":0x0d, "addr":0x3c, "green":0x04, "red":0x02}, + {"bus":2,"devno":0x0d, "addr":0x3d, "green":0x04, "red":0x02}, + {"bus":2,"devno":0x0d, "addr":0x3e, "green":0x04, "red":0x02}, + {"bus":2,"devno":0x0d, "addr":0x3f, "green":0x04, "red":0x02}] + +E2_LOC = {"bus":1, "devno":0x56} +MAC_LED_RESET = {"pcibus":8, "slot":0, "fn":0, "bar":0, "offset":64, "reset":0x98} + +CPLDVERSIONS = [ + {"io_addr": 0x0700, "name": "CPU BOARD CPLD", "gettype": "io"}, + {"io_addr": 0x0900, "name": "CONNECT BOARD CPLD", "gettype": "io"}, + {"bus":2, "devno":0x0d, "name":"CONNECT BOARD CPLD-FAN"}, + {"bus":8, "devno":0x30, "name":"MAC BOARD CPLD_1"}, + {"bus":8, "devno":0x31, "name":"MAC BOARD CPLD_2"}, +] + +MONITOR_SYS_PSU_LED = [ + { + "cmdstr":"/sys/devices/pci0000:00/0000:00:1f.0/broad_front_pwr", + "yellow":0x06, + "red":0x02, + "green":0x04, + "type":"sysfs", + }, +] + +MONITOR_FAN_STATUS = [ + {'status':'green' , 'minOkNum':5,'maxOkNum':5}, + {'status':'yellow', 'minOkNum':4,'maxOkNum':4}, + {'status':'red' , 'minOkNum':0,'maxOkNum':3}, + ] + +MONITOR_PSU_STATUS = [ + {'status':'green' , 'minOkNum':2,'maxOkNum':2}, + {'status':'yellow', 'minOkNum':1,'maxOkNum':1}, + {'status':'red' , 'minOkNum':0,'maxOkNum':0}, + ] + + +MONITOR_DEV_STATUS = { + "temperature": [ + {"name":"lm75in", "location":"/sys/bus/i2c/devices/3-004b/hwmon/*/temp1_input"}, + {"name":"lm75out", "location":"/sys/bus/i2c/devices/3-004c/hwmon/*/temp1_input"}, + {"name":"lm75hot", "location":"/sys/bus/i2c/devices/3-0049/hwmon/*/temp1_input"}, + {"name":"cpu", "location":"/sys/class/hwmon/hwmon0"}, + ], + "fans": [ + { + "name":"fan1", + "presentstatus":{"bus":2, "loc":0x0d, "offset":0x30, 'bit':0}, + "rollstatus": [ + {"name":"motor1","bus":2, "loc":0x0d, "offset":0x31, 'bit':0}, + {"name":"motor2","bus":2, "loc":0x0d, "offset":0x34, 'bit':0}, + ] + }, + { + "name":"fan2", + "presentstatus":{"bus":2, "loc":0x0d, "offset":0x30, 'bit':1}, + "rollstatus":[ + {"name":"motor1","bus":2, "loc":0x0d, "offset":0x31, 'bit':1}, + {"name":"motor2","bus":2, "loc":0x0d, "offset":0x34, 'bit':1}, + ] + }, + { + "name":"fan3", + "presentstatus":{"bus":2, "loc":0x0d, "offset":0x30, 'bit':2}, + "rollstatus":[ + {"name":"motor1","bus":2, "loc":0x0d, "offset":0x31, 'bit':2}, + {"name":"motor2","bus":2, "loc":0x0d, "offset":0x34, 'bit':2}, + ] + }, + { + "name":"fan4", + "presentstatus":{"bus":2, "loc":0x0d, "offset":0x30, 'bit':3}, + "rollstatus":[ + {"name":"motor1","bus":2, "loc":0x0d, "offset":0x31, 'bit':3}, + {"name":"motor2","bus":2, "loc":0x0d, "offset":0x34, 'bit':3}, + ] + }, + { + "name":"fan5", + "presentstatus":{"bus":2, "loc":0x0d, "offset":0x30, 'bit':4}, + "rollstatus":[ + {"name":"motor1","bus":2, "loc":0x0d, "offset":0x31, 'bit':4}, + {"name":"motor2","bus":2, "loc":0x0d, "offset":0x34, 'bit':4}, + ] + }, + ], + "psus": [ + {"name":"psu1", "io_addr":0x951, "gettype":"io", 'presentbit': 0, 'statusbit':1, 'alertbit':2}, + {"name":"psu2", "io_addr":0x951, "gettype":"io", 'presentbit': 4, 'statusbit':5, 'alertbit':6}, + ], + "mac_temp" : { + "loc" : [ + "3-0044/hwmon/*/temp99_input", + ], + }, +} + +MONITOR_DEV_STATUS_DECODE = { + 'fanpresent': {0:'PRESENT', 1:'ABSENT', 'okval':0}, + 'fanroll' : {0:'STALL' , 1:'ROLL', 'okval':1}, + 'psupresent': {0:'PRESENT', 1:'ABSENT', 'okval':0}, + 'psuoutput' : {0:'FAULT' , 1:'NORMAL', 'okval':1}, + 'psualert' : {0:'FAULT' , 1:'NORMAL', 'okval':1}, +} +################################################################### + + + +MAC_AVS_PARAM ={ + 0x72:0x0384, + 0x73:0x037e, + 0x74:0x0378, + 0x75:0x0372, + 0x76:0x036b, + 0x77:0x0365, + 0x78:0x035f, + 0x79:0x0359, + 0x7a:0x0352, + 0x7b:0x034c, + 0x7c:0x0346, + 0x7d:0x0340, + 0x7e:0x0339, + 0x7f:0x0333, + 0x80:0x032d, + 0x81:0x0327, + 0x82:0x0320, + 0x83:0x031a, + 0x84:0x0314, + 0x85:0x030e, + 0x86:0x0307, + 0x87:0x0301, + 0x88:0x02fb, + 0x89:0x02f5, + 0x8A:0x02ee +} + +MAC_DEFAULT_PARAM = { + "type": 1, + "default":0x7a, + "loopaddr":0x00, + "loop":0x00, + "open":0x00, + "close":0x40, + "bus":7, + "devno":0x64, + "addr":0x21, + "protectaddr":0x10, + "sdkreg":"TOP_AVS_SEL_REG", + "sdkcmd": "scdcmd", + "sdkcmdargs": ["-t", 5], + "sdktype": 0, + "macregloc":24 , + "mask": 0xff +} + +DEVICE = [] +DRIVERLISTS = [] + +INIT_PARAM = [ + { + "name": "mac_power_on", + "type": "io", + "offset": 0x994, + "val": 0x01 + } +] + +INIT_COMMAND = [ +] diff --git a/platform/broadcom/sonic-platform-modules-ragile/ra-b6510-32c/modules/driver/Makefile b/platform/broadcom/sonic-platform-modules-ragile/ra-b6510-32c/modules/driver/Makefile new file mode 100755 index 0000000000..f3aa0d3735 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ragile/ra-b6510-32c/modules/driver/Makefile @@ -0,0 +1,4 @@ +obj-m := rg_cpld.o +obj-m += rg_lpc_cpld.o +obj-m += pddf_custom_psu.o +obj-m += pddf_custom_led_module.o diff --git a/platform/broadcom/sonic-platform-modules-ragile/ra-b6510-32c/modules/driver/pddf_client_defs.h b/platform/broadcom/sonic-platform-modules-ragile/ra-b6510-32c/modules/driver/pddf_client_defs.h new file mode 100644 index 0000000000..1c98a73e6e --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ragile/ra-b6510-32c/modules/driver/pddf_client_defs.h @@ -0,0 +1,135 @@ +/* + * Copyright 2019 Broadcom. + * The term “Broadcom” refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * + * Description: + * Platform I2C client defines/structures header file + */ + +#ifndef __PDDF_CLIENT_DEFS_H__ +#define __PDDF_CLIENT_DEFS_H__ + +#include + +#define PSU "PDDF_PSU" +#define LED "PDDF_LED" +#define FAN "PDDF_FAN" +#define CLIENT "PDDF_CLIENT" +#define CPLD "PDDF_CPLD" +#define CPLDMUX "PDDF_CPLDMUX" +#define MUX "PDDF_MUX" +#define GPIO "PDDF_GPIO" +#define SYSSTATUS "PDDF_SYSSTATUS" +#define XCVR "PDDF_XCVR" + +#define PDDF_DEBUG +#ifdef PDDF_DEBUG +#define pddf_dbg(filter,...) printk("%s\t", filter); printk(KERN_CONT __VA_ARGS__) +#else +#define pddf_dbg(...) +#endif + + +#define GEN_NAME_SIZE 32 +#define ERR_STR_SIZE 128 + + +typedef struct pddf_data_attribute{ + struct device_attribute dev_attr; + int type; + int len; + char *addr; + char *data; +}PDDF_ATTR; + +#define PDDF_DATA_ATTR(_name, _mode, _show, _store, _type, _len, _addr, _data) \ + struct pddf_data_attribute attr_##_name = { .dev_attr = __ATTR(_name, _mode, _show, _store), \ + .type = _type , \ + .len = _len , \ + .addr = _addr, \ + .data = _data } + + +enum attribute_data_type { + PDDF_CHAR, + PDDF_UCHAR, + PDDF_INT_HEX, // integer represented in HEX + PDDF_INT_DEC, // integer represented in DECIMAL + PDDF_USHORT, // HEX + PDDF_UINT32 // HEX +}; + + + + + +// PSU Specific details + +typedef struct NEW_DEV_ATTR +{ + char i2c_type[GEN_NAME_SIZE]; + char i2c_name[GEN_NAME_SIZE]; + int parent_bus; + char dev_type[GEN_NAME_SIZE]; + int dev_id; + int dev_addr; + char *data; + int error; + char errstr[ERR_STR_SIZE]; + +}NEW_DEV_ATTR; +extern NEW_DEV_ATTR pddf_data; + +extern struct attribute_group pddf_clients_data_group; +extern ssize_t store_pddf_data(struct device *dev, struct device_attribute *da, const char *buf, size_t count); +extern ssize_t show_pddf_data(struct device *dev, struct device_attribute *da, char *buf); +struct kobject* get_device_i2c_kobj(void); +void set_attr_data(void * ptr); +void set_error_code(int, char *); +ssize_t show_error_code(struct device *dev, struct device_attribute *da, char *buf); +ssize_t show_all_devices(struct device *dev, struct device_attribute *da, char *buf); +void traverse_device_table(void ); + + + +/*Various Ops hook which can be used by vendors to provide some deviation from usual pddf functionality*/ +struct pddf_ops_t +{ + /*Module init ops*/ + int (*pre_init)(void); + int (*post_init)(void); + /*probe ops*/ + int (*pre_probe)(struct i2c_client *, const struct i2c_device_id *); + int (*post_probe)(struct i2c_client *, const struct i2c_device_id *); + /*remove ops*/ + int (*pre_remove)(struct i2c_client *); + int (*post_remove)(struct i2c_client *); + /*Module exit ops*/ + void (*pre_exit)(void); + void (*post_exit)(void); +}; + + +typedef struct PDEVICE +{ + struct hlist_node node; + char name[GEN_NAME_SIZE]; + void *data; + +}PDEVICE; + +void add_device_table(char *name, void *ptr); + + +#endif diff --git a/platform/broadcom/sonic-platform-modules-ragile/ra-b6510-32c/modules/driver/pddf_custom_led_module.c b/platform/broadcom/sonic-platform-modules-ragile/ra-b6510-32c/modules/driver/pddf_custom_led_module.c new file mode 100644 index 0000000000..5776735ef4 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ragile/ra-b6510-32c/modules/driver/pddf_custom_led_module.c @@ -0,0 +1,736 @@ +/* + * Copyright 2019 Broadcom. + * The term “Broadcom” refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * + * A pddf kernel module to manage various LEDs of a switch + */ + +#include +#include +#include +#include +#include +#include +#include "pddf_led_defs.h" +#include "pddf_client_defs.h" +#include +#include +#include +#include + +#define DEBUG 0 +LED_OPS_DATA sys_led_ops_data[1]={0}; +LED_OPS_DATA* psu_led_ops_data=NULL; +LED_OPS_DATA diag_led_ops_data[1]= {0}; +LED_OPS_DATA fan_led_ops_data[1]= {0}; +LED_OPS_DATA loc_led_ops_data[1]= {0}; +LED_OPS_DATA* fantray_led_ops_data=NULL; +LED_OPS_DATA temp_data={0}; +LED_OPS_DATA* dev_list[LED_TYPE_MAX] = { + sys_led_ops_data, + NULL, + fan_led_ops_data, + NULL, + diag_led_ops_data, + loc_led_ops_data, +}; +int num_psus = 0; +int num_fantrays = 0; + +extern int board_i2c_cpld_read(unsigned short cpld_addr, u8 reg); +extern int board_i2c_cpld_write(unsigned short cpld_addr, u8 reg, u8 value); +extern ssize_t show_pddf_data(struct device *dev, struct device_attribute *da, char *buf); +extern ssize_t store_pddf_data(struct device *dev, struct device_attribute *da, const char *buf, size_t count); +extern void *get_device_table(char *name); + +static LED_STATUS find_state_index(const char* state_str) { + int index; + char *ptr = (char *)state_str; + while (*ptr && *ptr!= '\n' && *ptr !='\0') ptr++; + *ptr='\0'; + for ( index = 0; index < MAX_LED_STATUS; index++) { + /*int rc = strcmp(state_str, LED_STATUS_STR[index]) ;*/ + if (strcmp(state_str, LED_STATUS_STR[index]) == 0 ) { + return index; + } + } + return MAX_LED_STATUS; +} + +static LED_TYPE get_dev_type(char* name) +{ + LED_TYPE ret = LED_TYPE_MAX; + if(strcasecmp(name, "SYS_LED")==0) { + ret = LED_SYS; + } else if(strcasecmp(name, "FAN_LED")==0) { + ret = LED_FAN; + } else if(strstr(name, "PSU_LED")) { + ret = LED_PSU; + } else if(strcasecmp(name, "DIAG_LED")==0) { + ret = LED_DIAG; + } else if(strcasecmp(name, "LOC_LED")==0) { + ret = LED_LOC; + } else if(strstr(name, "FANTRAY_LED")) { + ret = LED_FANTRAY; + } +#if DEBUG > 1 + pddf_dbg(LED, KERN_INFO "LED get_dev_type: %s; %d\n", name, ret); +#endif + return (ret); +} +static int dev_index_check(LED_TYPE type, int index) +{ +#if DEBUG + pddf_dbg(LED, "dev_index_check: type:%s index:%d num_psus:%d num_fantrays:%d\n", + LED_TYPE_STR[type], index, num_psus, num_fantrays); +#endif + switch(type) + { + case LED_PSU: + if(index >= num_psus) return (-1); + break; + case LED_FANTRAY: + if(index >= num_fantrays) return (-1); + break; + default: + if(index >= 1) return (-1); + break; + } + return (0); +} + +static LED_OPS_DATA* find_led_ops_data(struct device_attribute *da) +{ + struct pddf_data_attribute *_ptr = (struct pddf_data_attribute *)da; + LED_OPS_DATA* ptr=(LED_OPS_DATA*)_ptr->addr; + LED_TYPE led_type; + if(!ptr || strlen(ptr->device_name)==0 ) return(NULL); + + + if((led_type=get_dev_type(ptr->device_name))==LED_TYPE_MAX) { + printk(KERN_ERR "PDDF_LED ERROR *%s Unsupported Led Type\n", __func__); + return(NULL); + } + if(dev_index_check(led_type, ptr->index)==-1) { + printk(KERN_ERR "PDDF_LED ERROR %s invalid index: %d for type:%s\n", __func__, ptr->index, ptr->device_name); + return(NULL); + } +#if DEBUG > 1 + pddf_dbg(LED, "find_led_ops_data: name:%s; index=%d tempAddr:%p actualAddr:%p\n", + ptr->device_name, ptr->index, ptr, dev_list[led_type]+ptr->index); +#endif + return (dev_list[led_type]+ptr->index); +} + +static void print_led_data(LED_OPS_DATA *ptr, LED_STATUS state) +{ + int i = 0; + if(!ptr) return ; + pddf_dbg(LED, KERN_INFO "Print %s index:%d num_psus:%d num_fantrays:%d ADDR=%p\n", + ptr->device_name, ptr->index, num_psus, num_fantrays, ptr); + pddf_dbg(LED, KERN_INFO "\tindex: %d\n", ptr->index); + pddf_dbg(LED, KERN_INFO "\tcur_state: %d; %s \n", ptr->cur_state.state, ptr->cur_state.color); + for (i = 0; i< MAX_LED_STATUS; i++) { + if(ptr->data[i].swpld_addr && (i == state || state == -1)) { + pddf_dbg(LED, KERN_INFO "\t\t[%s]: addr/offset:0x%x;0x%x color:%s; value:%x; mask_bits: 0x%x; pos:%d\n", + LED_STATUS_STR[i], + ptr->data[i].swpld_addr, ptr->data[i].swpld_addr_offset, + LED_STATUS_STR[i], ptr->data[i].value, ptr->data[i].bits.mask_bits, ptr->data[i].bits.pos); + } + } +} + +int get_sys_val(LED_OPS_DATA *ops_ptr, uint32_t *sys_val) +{ + int ret; + struct i2c_client *client_ptr; + + ret = -1; + + if (ops_ptr == NULL) { + pddf_dbg(LED, KERN_ERR "ERROR %s: param is NULL\n", __func__); + return ret; + } + + if (strlen(ops_ptr->device_name) != 0 && strncmp(ops_ptr->device_name, "FANTRAY_LED", strlen("FANTRAY_LED")) == 0) { + client_ptr = (struct i2c_client *)get_device_table("FAN-CTRL"); + if (client_ptr == NULL) { + pddf_dbg(LED, KERN_ERR "ERROR %s: get led color by cpld fail\n", __func__); + return ret; + } + *sys_val = i2c_smbus_read_byte_data(client_ptr, ops_ptr->swpld_addr_offset); + ret = 0; + } + else { + ret = inb(ops_ptr->swpld_addr_offset); + if (ret < 0) { + pddf_dbg(LED, KERN_ERR "ERROR %s: get led color by io fail\n", __func__); + return ret; + } + *sys_val = (uint32_t)ret; + ret = 0; + } + + return ret; +} + + +ssize_t get_status_led(struct device_attribute *da) +{ + int ret=0; + struct pddf_data_attribute *_ptr = (struct pddf_data_attribute *)da; + LED_OPS_DATA* temp_data_ptr=(LED_OPS_DATA*)_ptr->addr; + LED_OPS_DATA* ops_ptr=find_led_ops_data(da); + uint32_t color_val=0, sys_val=0; + int state=0; + if (!ops_ptr) { + pddf_dbg(LED, KERN_ERR "ERROR %s: Cannot find LED Ptr", __func__); + return (-1); + } + if (ops_ptr->swpld_addr == 0x0) { + pddf_dbg(LED, KERN_ERR "ERROR %s: device: %s %d not configured\n", __func__, + temp_data_ptr->device_name, temp_data_ptr->index); + return (-1); + } + ret = get_sys_val(ops_ptr, &sys_val); + if (ret < 0) { + pddf_dbg(LED, KERN_ERR "ERROR %s: Cannot get sys val\n", __func__); + return (-1); + } + /* keep ret as old value */ + ret = 0; + + strcpy(temp_data.cur_state.color, "None"); + for (state=0; statedata[state].bits.mask_bits); + if ((color_val ^ (ops_ptr->data[state].value<data[state].bits.pos))==0) { + strcpy(temp_data.cur_state.color, LED_STATUS_STR[state]); + } + } +#if DEBUG > 1 + pddf_dbg(LED, KERN_ERR "Get : %s:%d addr/offset:0x%x; 0x%x value=0x%x [%s]\n", + ops_ptr->device_name, ops_ptr->index, + ops_ptr->swpld_addr, ops_ptr->swpld_addr_offset, sys_val, + temp_data.cur_state.color); +#endif + + return(ret); +} + +int set_sys_val(LED_OPS_DATA *ops_ptr, uint32_t new_val) +{ + int ret; + struct i2c_client *client_ptr; + + ret = -1; + + if (ops_ptr == NULL) { + pddf_dbg(LED, KERN_ERR "ERROR %s: param is NULL\n", __func__); + return ret; + } + + if (strlen(ops_ptr->device_name) != 0 && strncmp(ops_ptr->device_name, "FANTRAY_LED", strlen("FANTRAY_LED")) == 0) { + client_ptr = (struct i2c_client *)get_device_table("FAN-CTRL"); + if (client_ptr == NULL) { + pddf_dbg(LED, KERN_ERR "ERROR %s: get i2c_client fail\n", __func__); + return ret; + } + ret = i2c_smbus_write_byte_data(client_ptr, ops_ptr->swpld_addr_offset, new_val); + if (ret < 0) { + pddf_dbg(LED, KERN_ERR "ERROR %s: set led color by cpld fail\n", __func__); + } + } + else { + outb(new_val, ops_ptr->swpld_addr_offset); + } + + return ret; +} + +ssize_t set_status_led(struct device_attribute *da) +{ + int ret=0; + uint32_t sys_val=0, new_val=0; + LED_STATUS cur_state = MAX_LED_STATUS; + struct pddf_data_attribute *_ptr = (struct pddf_data_attribute *)da; + LED_OPS_DATA* temp_data_ptr=(LED_OPS_DATA*)_ptr->addr; + LED_OPS_DATA* ops_ptr=find_led_ops_data(da); + char* _buf=temp_data_ptr->cur_state.color; + + if (!ops_ptr) { + pddf_dbg(LED, KERN_ERR "PDDF_LED ERROR %s: Cannot find LED Ptr", __func__); + return (-1); + } + if (ops_ptr->swpld_addr == 0x0) { + pddf_dbg(LED, KERN_ERR "PDDF_LED ERROR %s: device: %s %d not configured\n", + __func__, ops_ptr->device_name, ops_ptr->index); + return (-1); + } + pddf_dbg(LED, KERN_ERR "%s: Set [%s;%d] color[%s]\n", __func__, + temp_data_ptr->device_name, temp_data_ptr->index, + temp_data_ptr->cur_state.color); + cur_state = find_state_index(_buf); + + if (cur_state == MAX_LED_STATUS) { + pddf_dbg(LED, KERN_ERR "ERROR %s: not supported: %s\n", _buf, __func__); + return (-1); + } + + if(ops_ptr->data[cur_state].swpld_addr != 0x0) { + ret = get_sys_val(ops_ptr, &sys_val); + if (ret < 0) { + pddf_dbg(LED, KERN_ERR "ERROR %s: Cannot get sys val\n", __func__); + return (-1); + } + + new_val = (sys_val & ops_ptr->data[cur_state].bits.mask_bits) | + (ops_ptr->data[cur_state].value << ops_ptr->data[cur_state].bits.pos); + + } else { + pddf_dbg(LED, KERN_ERR "ERROR %s: %s %d state %d; %s not configured\n",__func__, + ops_ptr->device_name, ops_ptr->index, cur_state, _buf); + return (-1); + } + + ret = set_sys_val(ops_ptr, new_val); + if (ret < 0) { + pddf_dbg(LED, KERN_ERR "ERROR %s: Cannot set sys val\n", __func__); + return (-1); + } + pddf_dbg(LED, KERN_INFO "Set color:%s; 0x%x:0x%x sys_val:0x%x new_val:0x%x read:0x%x\n", + LED_STATUS_STR[cur_state], + ops_ptr->swpld_addr, ops_ptr->swpld_addr_offset, + sys_val, new_val, + ret = board_i2c_cpld_read(ops_ptr->swpld_addr, ops_ptr->swpld_addr_offset)); + if (ret < 0) + { + pddf_dbg(LED, KERN_ERR "PDDF_LED ERROR %s: Error %d in reading from cpld(0x%x) offset 0x%x\n", __FUNCTION__, ret, ops_ptr->swpld_addr, ops_ptr->swpld_addr_offset); + return ret; + } + return(ret); +} + + +ssize_t show_pddf_data(struct device *dev, struct device_attribute *da, + char *buf) +{ + int ret = 0; + struct pddf_data_attribute *ptr = (struct pddf_data_attribute *)da; + switch(ptr->type) + { + case PDDF_CHAR: + ret = sprintf(buf, "%s\n", ptr->addr); + break; + case PDDF_INT_DEC: + ret = sprintf(buf, "%d\n", *(int*)(ptr->addr)); + break; + case PDDF_INT_HEX: + ret = sprintf(buf, "0x%x\n", *(int*)(ptr->addr)); + break; + case PDDF_USHORT: + ret = sprintf(buf, "0x%x\n", *(unsigned short *)(ptr->addr)); + break; + case PDDF_UINT32: + ret = sprintf(buf, "0x%x\n", *(uint32_t *)(ptr->addr)); + break; + default: + break; + } +#if DEBUG > 1 + pddf_dbg(LED, "[ READ ] DATA ATTR PTR [%s] TYPE:%d, Value:[%s]\n", + ptr->dev_attr.attr.name, ptr->type, buf); +#endif + return ret; +} + +ssize_t store_pddf_data(struct device *dev, struct device_attribute *da, const char *buf, size_t count) +{ + int ret = 0, num = 0; + struct pddf_data_attribute *ptr = (struct pddf_data_attribute *)da; + switch(ptr->type) + { + case PDDF_CHAR: + strncpy(ptr->addr, buf, strlen(buf)-1); // to discard newline char form buf + ptr->addr[strlen(buf)-1] = '\0'; +#if DEBUG + pddf_dbg(LED, KERN_ERR "[ WRITE ] ATTR PTR [%s] PDDF_CHAR VALUE:%s\n", + ptr->dev_attr.attr.name, ptr->addr); +#endif + break; + case PDDF_INT_DEC: + ret = kstrtoint(buf,10,&num); + if (ret==0) + *(int *)(ptr->addr) = num; +#if DEBUG + pddf_dbg(LED, KERN_ERR "[ WRITE ] ATTR PTR [%s] PDDF_DEC VALUE:%d\n", + ptr->dev_attr.attr.name, *(int *)(ptr->addr)); +#endif + break; + case PDDF_INT_HEX: + ret = kstrtoint(buf,16,&num); + if (ret==0) + *(int *)(ptr->addr) = num; +#if DEBUG + pddf_dbg(LED, KERN_ERR "[ WRITE ] ATTR PTR [%s] PDDF_HEX VALUE:0x%x\n", + ptr->dev_attr.attr.name, *(int *)(ptr->addr)); +#endif + break; + case PDDF_USHORT: + ret = kstrtoint(buf,16,&num); + if (ret==0) + *(unsigned short *)(ptr->addr) = (unsigned short)num; +#if DEBUG + pddf_dbg(LED, KERN_ERR "[ WRITE ] ATTR PTR [%s] PDDF_USHORT VALUE:%x\n", + ptr->dev_attr.attr.name, *(unsigned short *)(ptr->addr)); +#endif + break; + case PDDF_UINT32: + ret = kstrtoint(buf,16,&num); + if (ret==0) + *(uint32_t *)(ptr->addr) = (uint32_t)num; +#if DEBUG + pddf_dbg(LED, KERN_ERR "[ WRITE ] ATTR PTR [%s] PDDF_UINT32 VALUE:%d\n", + ptr->dev_attr.attr.name, *(uint32_t *)(ptr->addr)); +#endif + break; + default: + break; + } + return count; +} + +static int load_led_ops_data(struct device_attribute *da, LED_STATUS state) +{ + struct pddf_data_attribute *_ptr = (struct pddf_data_attribute *)da; + LED_OPS_DATA* ptr=(LED_OPS_DATA*)_ptr->addr; + LED_TYPE led_type; + LED_OPS_DATA* ops_ptr=NULL; + if(!ptr || strlen(ptr->device_name)==0 ) { + pddf_dbg(LED, KERN_INFO "SYSTEM_LED: load_led_ops_data return -1 device_name:%s\n", ptr? ptr->device_name:"NULL"); + return(-1); + } + if(ptr->device_name) + { + pddf_dbg(LED, KERN_INFO "[%s]: load_led_ops_data: index=%d addr=0x%x;0x%x valu=0x%x\n", + ptr->device_name, ptr->index, ptr->swpld_addr, ptr->swpld_addr_offset, ptr->data[0].value); + } + if((led_type=get_dev_type(ptr->device_name))==LED_TYPE_MAX) { + pddf_dbg(LED, KERN_ERR "PDDF_LED ERROR *%s Unsupported Led Type\n", __func__); + return(-1); + } + if(dev_index_check(led_type, ptr->index)==-1) { + pddf_dbg(LED, KERN_ERR "PDDF_LED ERROR %s invalid index: %d for type:%d\n", __func__, ptr->index, led_type); + return(-1); + } + ops_ptr = dev_list[led_type]+ptr->index; + + memcpy(ops_ptr->device_name, ptr->device_name, sizeof(ops_ptr->device_name)); + ops_ptr->index = ptr->index; + memcpy(&ops_ptr->data[state], &ptr->data[0], sizeof(LED_DATA)); + ops_ptr->data[state].swpld_addr = ptr->swpld_addr; + ops_ptr->data[state].swpld_addr_offset = ptr->swpld_addr_offset; + ops_ptr->swpld_addr = ptr->swpld_addr; + ops_ptr->swpld_addr_offset = ptr->swpld_addr_offset; + + print_led_data(dev_list[led_type]+ptr->index, state); + + memset(ptr, 0, sizeof(LED_OPS_DATA)); + return (0); +} + +static int show_led_ops_data(struct device_attribute *da) +{ + LED_OPS_DATA* ops_ptr=find_led_ops_data(da); + print_led_data(ops_ptr, -1); + return(0); +} + +static int verify_led_ops_data(struct device_attribute *da) +{ + struct pddf_data_attribute *_ptr = (struct pddf_data_attribute *)da; + LED_OPS_DATA* ptr=(LED_OPS_DATA*)_ptr->addr; + LED_OPS_DATA* ops_ptr=find_led_ops_data(da); + + if(ops_ptr) + memcpy(ptr, ops_ptr, sizeof(LED_OPS_DATA)); + else + { + pddf_dbg(LED, "SYSTEM_LED: verify_led_ops_data: Failed to find ops_ptr name:%s; index=%d\n", ptr->device_name, ptr->index); + } + return (0); +} + + +ssize_t dev_operation(struct device *dev, struct device_attribute *da, const char *buf, size_t count) +{ +#if DEBUG + pddf_dbg(LED, KERN_INFO "dev_operation [%s]\n", buf); +#endif + if(strstr(buf, "STATUS_LED_COLOR")!= NULL) { + LED_STATUS index = find_state_index(buf); + if (index < MAX_LED_STATUS ) { + load_led_ops_data(da, index); + } else { + printk(KERN_ERR "PDDF_ERROR %s: Invalid state for dev_ops %s", __FUNCTION__, buf); + } + } + else if(strncmp(buf, "show", strlen("show"))==0 ) { + show_led_ops_data(da); + } + else if(strncmp(buf, "verify", strlen("verify"))==0 ) { + verify_led_ops_data(da); + } + else if(strncmp(buf, "get_status", strlen("get_status"))==0 ) { + get_status_led(da); + } + else if(strncmp(buf, "set_status", strlen("set_status"))==0 ) { + set_status_led(da); + } + else { + printk(KERN_ERR "PDDF_ERROR %s: Invalid value for dev_ops %s", __FUNCTION__, buf); + } + return(count); +} + +ssize_t store_config_data(struct device *dev, struct device_attribute *da, const char *buf, size_t count) +{ + int ret, num; + struct pddf_data_attribute *ptr = (struct pddf_data_attribute *)da; + if(strncmp(ptr->dev_attr.attr.name, "num_psus", strlen("num_psus"))==0 ) { + ret = kstrtoint(buf,10,&num); + if (ret==0) + *(int *)(ptr->addr) = num; + if(psu_led_ops_data == NULL) { + if ((psu_led_ops_data = kzalloc(num * sizeof(LED_OPS_DATA), GFP_KERNEL)) == NULL) { + printk(KERN_ERR "PDDF_LED ERROR failed to allocate memory for PSU LED\n"); + return (count); + } + pddf_dbg(LED, "Allocate PSU LED Memory ADDR=%p\n", psu_led_ops_data); + dev_list[LED_PSU]=psu_led_ops_data; + } +#if DEBUG + pddf_dbg(LED, "[ WRITE ] ATTR CONFIG [%s] VALUE:%d; %d\n", + ptr->dev_attr.attr.name, num, num_psus); +#endif + return(count); + } + if(strncmp(ptr->dev_attr.attr.name, "num_fantrays", strlen("num_fantrays"))==0 ) { + ret = kstrtoint(buf,10,&num); + if (ret==0) + *(int *)(ptr->addr) = num; + if (fantray_led_ops_data == NULL) { + if ((fantray_led_ops_data = kzalloc(num * sizeof(LED_OPS_DATA), GFP_KERNEL)) == NULL) { + printk(KERN_ERR "PDDF_LED ERROR failed to allocate memory for FANTRAY LED\n"); + return (count); + } + pddf_dbg(LED, "Allocate FanTray LED Memory ADDR=%p\n", fantray_led_ops_data); + dev_list[LED_FANTRAY]=fantray_led_ops_data; + } +#if DEBUG + pddf_dbg(LED, "[ WRITE ] ATTR CONFIG [%s] VALUE:%d; %d\n", + ptr->dev_attr.attr.name, num, num_fantrays); +#endif + return(count); + } + return (count); +} + +ssize_t store_bits_data(struct device *dev, struct device_attribute *da, const char *buf, size_t count) +{ + int len = 0, num1 = 0, num2 = 0, i=0, rc1=0, rc2=0; + char mask=0xFF; + char *pptr=NULL; + char bits[NAME_SIZE]; + struct pddf_data_attribute *ptr = (struct pddf_data_attribute *)da; + MASK_BITS* bits_ptr=(MASK_BITS*)(ptr->addr); + strncpy(bits_ptr->bits, buf, strlen(buf)-1); // to discard newline char form buf + bits_ptr->bits[strlen(buf)-1] = '\0'; + if((pptr=strstr(buf,":")) != NULL) { + len=pptr-buf; + sprintf(bits, buf); + bits[len]='\0'; + rc1=kstrtoint(bits,16,&num1); + if (rc1==0) + { + sprintf(bits, ++pptr); + rc2=kstrtoint(bits,16,&num2); + if (rc2==0) + { + for (i=num2; i<=num1; i++) { + mask &= ~(1 << i); + } + bits_ptr->mask_bits = mask; + bits_ptr->pos = num2; + } + } + } else { + rc1=kstrtoint(buf,16,&num1); + if (rc1==0) + { + bits_ptr->mask_bits = mask & ~(1 << num1); + bits_ptr->pos = num1; + } + } +#if DEBUG + pddf_dbg(LED, KERN_ERR "[ WRITE ] ATTR PTR Bits [%s] VALUE:%s mask:0x%x; pos:0x%x\n", + ptr->dev_attr.attr.name, bits_ptr->bits, bits_ptr->mask_bits, bits_ptr->pos); +#endif + return (count); +} + +/************************************************************************** + * platform/ attributes + **************************************************************************/ +PDDF_LED_DATA_ATTR(platform, num_psus, S_IWUSR|S_IRUGO, show_pddf_data, + store_config_data, PDDF_INT_DEC, sizeof(int), (void*)&num_psus); +PDDF_LED_DATA_ATTR(platform, num_fantrays, S_IWUSR|S_IRUGO, show_pddf_data, + store_config_data, PDDF_INT_DEC, sizeof(int), (void*)&num_fantrays); + +struct attribute* attrs_platform[]={ + &pddf_dev_platform_attr_num_psus.dev_attr.attr, + &pddf_dev_platform_attr_num_fantrays.dev_attr.attr, + NULL, +}; +struct attribute_group attr_group_platform={ + .attrs = attrs_platform, +}; + +/************************************************************************** + * led/ attributes + **************************************************************************/ +PDDF_LED_DATA_ATTR(dev, device_name, S_IWUSR|S_IRUGO, show_pddf_data, + store_pddf_data, PDDF_CHAR, NAME_SIZE, (void*)&temp_data.device_name); +PDDF_LED_DATA_ATTR(dev, index, S_IWUSR|S_IRUGO, show_pddf_data, + store_pddf_data, PDDF_INT_DEC, sizeof(int), (void*)&temp_data.index); +PDDF_LED_DATA_ATTR(dev, swpld_addr, S_IWUSR|S_IRUGO, show_pddf_data, + store_pddf_data, PDDF_INT_HEX, sizeof(int), (void*)&temp_data.swpld_addr); +PDDF_LED_DATA_ATTR(dev, swpld_addr_offset, S_IWUSR|S_IRUGO, show_pddf_data, + store_pddf_data, PDDF_INT_HEX, sizeof(int), (void*)&temp_data.swpld_addr_offset); +PDDF_LED_DATA_ATTR(dev, dev_ops , S_IWUSR, NULL, + dev_operation, PDDF_CHAR, NAME_SIZE, (void*)&temp_data); + +struct attribute* attrs_dev[]={ + &pddf_dev_dev_attr_device_name.dev_attr.attr, + &pddf_dev_dev_attr_index.dev_attr.attr, + &pddf_dev_dev_attr_swpld_addr.dev_attr.attr, + &pddf_dev_dev_attr_swpld_addr_offset.dev_attr.attr, + &pddf_dev_dev_attr_dev_ops.dev_attr.attr, + NULL, +}; +struct attribute_group attr_group_dev={ + .attrs = attrs_dev, +}; + +/************************************************************************** + * state_attr/ attributes + **************************************************************************/ +#define LED_DEV_STATE_ATTR_GROUP(name, func) \ + PDDF_LED_DATA_ATTR(name, bits, S_IWUSR|S_IRUGO, show_pddf_data, \ + store_bits_data, PDDF_CHAR, NAME_SIZE, func.bits.bits); \ + PDDF_LED_DATA_ATTR(name, value, S_IWUSR|S_IRUGO, show_pddf_data, \ + store_pddf_data, PDDF_USHORT, sizeof(unsigned short), func.value); \ + struct attribute* attrs_##name[]={ \ + &pddf_dev_##name##_attr_bits.dev_attr.attr, \ + &pddf_dev_##name##_attr_value.dev_attr.attr, \ + NULL, \ + }; \ + struct attribute_group attr_group_##name={ \ + .attrs = attrs_##name, \ + }; \ + + +LED_DEV_STATE_ATTR_GROUP(state_attr, (void*)&temp_data.data[0]) + +/************************************************************************** + * cur_state/ attributes + **************************************************************************/ +PDDF_LED_DATA_ATTR(cur_state, color, S_IWUSR|S_IRUGO, show_pddf_data, + store_pddf_data, PDDF_CHAR, NAME_SIZE, (void*)&temp_data.cur_state.color); + +struct attribute* attrs_cur_state[]={ + &pddf_dev_cur_state_attr_color.dev_attr.attr, + NULL, +}; +struct attribute_group attr_group_cur_state={ + .attrs = attrs_cur_state, +}; + +/*************************************************************************/ +#define KOBJ_FREE(obj) \ + if(obj) kobject_put(obj); \ + +void free_kobjs(void) +{ + KOBJ_FREE(cur_state_kobj) + KOBJ_FREE(state_attr_kobj) + KOBJ_FREE(led_kobj) + KOBJ_FREE(platform_kobj) +} + +int KBOJ_CREATE(char* name, struct kobject* parent, struct kobject** child) +{ + if (parent) { + *child = kobject_create_and_add(name, parent); + } else { + printk(KERN_ERR "PDDF_LED ERROR to create %s kobj; null parent\n", name); + free_kobjs(); + return (-ENOMEM); + } + return (0); +} + +int LED_DEV_ATTR_CREATE(struct kobject *kobj, const struct attribute_group *attr, const char* name) +{ + int status = sysfs_create_group(kobj, attr); + if(status) { + pddf_dbg(LED, KERN_ERR "Driver ERROR: sysfs_create %s failed rc=%d\n", name, status); + } + return (status); +} + + +static int __init led_init(void) { + struct kobject *device_kobj; + pddf_dbg(LED, KERN_INFO "PDDF GENERIC LED MODULE init..\n"); + + device_kobj = get_device_i2c_kobj(); + if(!device_kobj) + return -ENOMEM; + + KBOJ_CREATE("platform", device_kobj, &platform_kobj); + KBOJ_CREATE("led", device_kobj, &led_kobj); + KBOJ_CREATE("state_attr", led_kobj, &state_attr_kobj); + KBOJ_CREATE("cur_state", led_kobj, &cur_state_kobj); + + LED_DEV_ATTR_CREATE(platform_kobj, &attr_group_platform, "attr_group_platform"); + LED_DEV_ATTR_CREATE(led_kobj, &attr_group_dev, "attr_group_dev"); + LED_DEV_ATTR_CREATE(state_attr_kobj, &attr_group_state_attr, "attr_group_state_attr"); + LED_DEV_ATTR_CREATE(cur_state_kobj, &attr_group_cur_state, "attr_group_cur_state"); + return (0); +} + + +static void __exit led_exit(void) { + pddf_dbg(LED, "PDDF GENERIC LED MODULE exit..\n"); + free_kobjs(); + if(psu_led_ops_data) kfree(psu_led_ops_data); + if(fantray_led_ops_data) kfree(fantray_led_ops_data); +} + +module_init(led_init); +module_exit(led_exit); + +MODULE_AUTHOR("Broadcom"); +MODULE_DESCRIPTION("led driver"); +MODULE_LICENSE("GPL"); diff --git a/platform/broadcom/sonic-platform-modules-ragile/ra-b6510-32c/modules/driver/pddf_custom_psu.c b/platform/broadcom/sonic-platform-modules-ragile/ra-b6510-32c/modules/driver/pddf_custom_psu.c new file mode 100644 index 0000000000..6c4db972a7 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ragile/ra-b6510-32c/modules/driver/pddf_custom_psu.c @@ -0,0 +1,104 @@ +#include +#include +#include +#include "../../../../../pddf/i2c/modules/include/pddf_psu_defs.h" +#include "../../../../../pddf/i2c/modules/include/pddf_psu_driver.h" + +static int pddf_custom_psu_present(void *client, PSU_DATA_ATTR *adata, void *data); +extern void *get_device_table(char *name); +extern PSU_SYSFS_ATTR_DATA access_psu_present; +extern PSU_SYSFS_ATTR_DATA access_psu_power_good; + +static int pddf_custom_psu_present(void *client, PSU_DATA_ATTR *adata, void *data) +{ + int ret; + struct i2c_client *client_ptr; + struct psu_attr_info *padata; + + ret = -1; + client_ptr = NULL; + padata = (struct psu_attr_info *)data; + + if (strncmp(adata->devtype, "io", strlen("io")) == 0) { + ret = inb(adata->offset); + + if (ret < 0) { + return ret; + } + + padata->val.intval = ((ret & adata->mask) == adata->cmpval); + } + + else if (strncmp(adata->devtype, "cpld", strlen("cpld")) == 0) { + client_ptr = (struct i2c_client *)get_device_table(adata->devname); + if (client_ptr) { + ret = i2c_smbus_read_byte_data(client_ptr, adata->offset); + } + + if (ret < 0) { + return ret; + } + + padata->val.intval = ((ret & adata->mask) == adata->cmpval); + } + + return 0; +} + +static int pddf_custom_psu_power_good(void *client, PSU_DATA_ATTR *adata, void *data) +{ + int ret; + struct i2c_client *client_ptr; + struct psu_attr_info *padata; + + ret = -1; + client_ptr = NULL; + padata = (struct psu_attr_info *)data; + + if (strncmp(adata->devtype, "io", strlen("io")) == 0) { + ret = inb(adata->offset); + + if (ret < 0) { + return ret; + } + + padata->val.intval = ((ret & adata->mask) == adata->cmpval); + } + + else if (strncmp(adata->devtype, "cpld", strlen("cpld")) == 0) { + client_ptr = (struct i2c_client *)get_device_table(adata->devname); + if (client_ptr) { + ret = i2c_smbus_read_byte_data(client_ptr, adata->offset); + } + + if (ret < 0) { + return ret; + } + + padata->val.intval = ((ret & adata->mask) == adata->cmpval); + } + + return 0; +} + +static int __init pddf_custom_psu_init(void) +{ + access_psu_present.do_get = pddf_custom_psu_present; + access_psu_power_good.do_get = pddf_custom_psu_power_good; + printk(KERN_ERR "pddf_custom_psu_init\n"); + return 0; +} + +static void __exit pddf_custom_psu_exit(void) +{ + printk(KERN_ERR "pddf_custom_psu_exit\n"); + return; +} + +MODULE_AUTHOR("support "); +MODULE_DESCRIPTION("pddf custom psu api"); +MODULE_LICENSE("GPL"); + +module_init(pddf_custom_psu_init); +module_exit(pddf_custom_psu_exit); + diff --git a/platform/broadcom/sonic-platform-modules-ragile/ra-b6510-32c/modules/driver/pddf_led_defs.h b/platform/broadcom/sonic-platform-modules-ragile/ra-b6510-32c/modules/driver/pddf_led_defs.h new file mode 100644 index 0000000000..1603f8c5af --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ragile/ra-b6510-32c/modules/driver/pddf_led_defs.h @@ -0,0 +1,120 @@ +/* + * Copyright 2019 Broadcom. + * The term “Broadcom” refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * + * Description + * Platform LED related defines and structures + */ + + +/***************************************** + * kobj list + *****************************************/ + +struct kobject *platform_kobj=NULL; +struct kobject *led_kobj=NULL; + +struct kobject *state_attr_kobj=NULL; +struct kobject *cur_state_kobj=NULL; + +/***************************************** + * Static Data provided from user + * space JSON data file + *****************************************/ +#define NAME_SIZE 32 +typedef enum { + STATUS_LED_COLOR_GREEN, + STATUS_LED_COLOR_GREEN_BLINK, + STATUS_LED_COLOR_RED, + STATUS_LED_COLOR_RED_BLINK, + STATUS_LED_COLOR_AMBER, + STATUS_LED_COLOR_AMBER_BLINK, + STATUS_LED_COLOR_BLUE, + STATUS_LED_COLOR_BLUE_BLINK, + STATUS_LED_COLOR_OFF, + MAX_LED_STATUS +}LED_STATUS; + +char* LED_STATUS_STR[] = { + "STATUS_LED_COLOR_GREEN", + "STATUS_LED_COLOR_GREEN_BLINK", + "STATUS_LED_COLOR_RED", + "STATUS_LED_COLOR_RED_BLINK", + "STATUS_LED_COLOR_AMBER", + "STATUS_LED_COLOR_AMBER_BLINK", + "STATUS_LED_COLOR_BLUE", + "STATUS_LED_COLOR_BLUE_BLINK", + "STATUS_LED_COLOR_OFF" +}; + + +typedef struct +{ + char bits[NAME_SIZE]; + int pos; + int mask_bits; +}MASK_BITS; + +typedef struct +{ + int swpld_addr; + int swpld_addr_offset; + MASK_BITS bits; + unsigned short value; +} LED_DATA; + +typedef struct +{ + int state; + char color[NAME_SIZE]; +} CUR_STATE_DATA; + +typedef struct +{ + CUR_STATE_DATA cur_state; + char device_name[NAME_SIZE]; + int index; + LED_DATA data[MAX_LED_STATUS]; + int swpld_addr; + int swpld_addr_offset; +} LED_OPS_DATA; + +typedef enum{ + LED_SYS, + LED_PSU, + LED_FAN, + LED_FANTRAY, + LED_DIAG, + LED_LOC, + LED_TYPE_MAX +} LED_TYPE; +char* LED_TYPE_STR[LED_TYPE_MAX] = +{ + "LED_SYS", + "LED_PSU", + "LED_FAN", + "LED_FANTRAY", + "LED_DIAG", + "LED_LOC", +}; + +/***************************************** + * Data exported from kernel for + * user space plugin to get/set + *****************************************/ +#define PDDF_LED_DATA_ATTR( _prefix, _name, _mode, _show, _store, _type, _len, _addr) \ + struct pddf_data_attribute pddf_dev_##_prefix##_attr_##_name = { .dev_attr = __ATTR(_name, _mode, _show, _store), \ + .type = _type , \ + .len = _len , \ + .addr = _addr } diff --git a/platform/broadcom/sonic-platform-modules-ragile/ra-b6510-32c/modules/driver/ragile.h b/platform/broadcom/sonic-platform-modules-ragile/ra-b6510-32c/modules/driver/ragile.h new file mode 100755 index 0000000000..338874297e --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ragile/ra-b6510-32c/modules/driver/ragile.h @@ -0,0 +1,116 @@ +#ifndef __RAGILE_H__ +#define __RAGILE_H__ + +#include +#include + +typedef enum { + DBG_START, + DBG_VERBOSE, + DBG_KEY, + DBG_WARN, + DBG_ERROR, + DBG_END, +} dbg_level_t; + +typedef enum dfd_cpld_id { + BCM_CPLD0 = 0, + BCM_CPLD1, + CPLD0_MAC0, + CPLD0_MAC1, + CPLD1_MAC0, + CPLD2_MAC1, +} dfd_cpld_id_t; + +typedef enum dfd_cpld_bus { + SMBUS_BUS = 0 , + PCA9641_BUS = 1, + GPIO_BUS = 2, +} dfd_cpld_bus_t; + +typedef struct dfd_i2c_dev_s { + int bus; + int addr; +} dfd_i2c_dev_t; + + typedef enum dfd_cpld_addr { + CPLD_ADDR_MIN = 0x31, + BCM_CPLD0_ADDR = 0x32, + CPLD0_MAC0_ADDR = 0x33, + CPLD0_MAC1_ADDR = 0x34, + CPLD1_MAC0_ADDR = 0x35, + CPLD2_MAC1_ADDR = 0x36, + BCM_CPLD1_ADDR = 0x37, + CPLD_ADDR_MAX, +} dfd_cpld_addr_t; + +typedef struct dfd_dev_head_info_s { + uint8_t ver; + uint8_t flag; + uint8_t hw_ver; + uint8_t type; + int16_t tlv_len; +} dfd_dev_head_info_t; + +typedef enum dfd_intf_e{ + DFD_INTF_GET_FAN_HW_VERSION, + DFD_INTF_GET_FAN_STATUS, + DFD_INTF_GET_FAN_SPEED_LEVEL, + DFD_INTF_GET_FAN_SPEED, + DFD_INTF_GET_FAN_ATTRIBUTE, + DFD_INTF_GET_FAN_SN, + DFD_INTF_GET_FAN_TYPE, + DFD_INTF_SET_FAN_SPEED_LEVEL, + DFD_INTF_GET_FAN_SUB_NUM, + DFD_INTF_GET_FAN_FAIL_BITMAP, +}dfd_intf_t; + +typedef struct dfd_dev_tlv_info_s { + uint8_t type; + uint8_t len; + uint8_t data[0]; +} dfd_dev_tlv_info_t; + +typedef enum dfd_dev_info_type_e { + DFD_DEV_INFO_TYPE_MAC = 1, + DFD_DEV_INFO_TYPE_NAME = 2, + DFD_DEV_INFO_TYPE_SN = 3, + DFD_DEV_INFO_TYPE_PWR_CONS = 4, + DFD_DEV_INFO_TYPE_HW_INFO = 5, + DFD_DEV_INFO_TYPE_DEV_TYPE = 6, +} dfd_dev_tlv_type_t; + +typedef struct i2c_muxs_struct_flag +{ + int nr; + char name[48]; + struct mutex update_lock; + int flag; +}i2c_mux_flag; + +extern int setpca9641_muxflag(i2c_mux_flag i2c); +extern i2c_mux_flag getpca9641_muxflag(void) ; + +extern int debuglevel; +extern int dfd_cpld_read_chipid(int cpldid , uint32_t addr, int32_t size, unsigned char *buf); +extern int dfd_cpld_read(int32_t addr, uint8_t *val); +extern int dfd_cpld_write(int32_t addr, uint8_t val); +extern int ragile_setdebug(int val); + +#define DBG_DEBUG(fmt, arg...) do { \ + if ( debuglevel > DBG_START && debuglevel < DBG_ERROR) { \ + printk(KERN_INFO "[DEBUG]:<%s, %d>:"fmt, __FUNCTION__, __LINE__, ##arg); \ + } else if ( debuglevel >= DBG_ERROR ) { \ + printk(KERN_ERR "[DEBUG]:<%s, %d>:"fmt, __FUNCTION__, __LINE__, ##arg); \ + } else { } \ +} while (0) + +#define DBG_ERROR(fmt, arg...) do { \ + if ( debuglevel > DBG_START) { \ + printk(KERN_ERR "[ERROR]:<%s, %d>:"fmt, __FUNCTION__, __LINE__, ##arg); \ + } \ + } while (0) + +#define COMMON_STR_LEN (256) + +#endif diff --git a/platform/broadcom/sonic-platform-modules-ragile/ra-b6510-32c/modules/driver/rg_cpld.c b/platform/broadcom/sonic-platform-modules-ragile/ra-b6510-32c/modules/driver/rg_cpld.c new file mode 100755 index 0000000000..d8edb73277 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ragile/ra-b6510-32c/modules/driver/rg_cpld.c @@ -0,0 +1,495 @@ +/* + * rg_cpld.c - A driver for control rg_cpld base on rg_cpld.c + * + * Copyright (c) 1998, 1999 Frodo Looijaard + * Copyright (c) 2018 support + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + + +typedef enum { + DBG_START, + DBG_VERBOSE, + DBG_KEY, + DBG_WARN, + DBG_ERROR, + DBG_END, +} dbg_level_t; + +static int debuglevel = 0; +module_param(debuglevel, int, S_IRUGO | S_IWUSR); + +#define DBG_DEBUG(fmt, arg...) do { \ + if ( debuglevel > DBG_START && debuglevel < DBG_ERROR) { \ + printk(KERN_INFO "[DEBUG]:<%s, %d>:"fmt, __FUNCTION__, __LINE__, ##arg); \ + } else if ( debuglevel >= DBG_ERROR ) { \ + printk(KERN_ERR "[DEBUG]:<%s, %d>:"fmt, __FUNCTION__, __LINE__, ##arg); \ + } else { } \ +} while (0) + +#define DBG_ERROR(fmt, arg...) do { \ + if ( debuglevel > DBG_START) { \ + printk(KERN_ERR "[ERROR]:<%s, %d>:"fmt, __FUNCTION__, __LINE__, ##arg); \ + } \ + } while (0) + +static const unsigned short rg_i2c_cpld[] = { 0x32, 0x33, 0x34, 0x35, 0x36, 0x37, I2C_CLIENT_END }; + +#define CPLD_SIZE 256 +#define CPLD_I2C_RETRY_TIMES 5 +#define CPLD_I2C_RETRY_WAIT_TIME 10 + +#define COMMON_STR_LEN (256) + + +struct cpld_data { + struct i2c_client *client; + struct device *hwmon_dev; + struct mutex update_lock; + char valid; /* !=0 if registers are valid */ + unsigned long last_updated; /* In jiffies */ + u8 data[CPLD_SIZE]; /* Register value */ +}; + +static s32 cpld_i2c_smbus_read_byte_data(const struct i2c_client *client, u8 command) +{ + int try; + s32 ret; + + ret = -1; + for (try = 0; try < CPLD_I2C_RETRY_TIMES; try++) { + if ((ret = i2c_smbus_read_byte_data(client, command) ) >= 0 ) + break; + msleep(CPLD_I2C_RETRY_WAIT_TIME); + } + return ret; +} + +static s32 cpld_i2c_smbus_read_i2c_block_data(const struct i2c_client *client, + u8 command, u8 length, u8 *values) +{ + int try; + s32 ret; + + ret = -1; + for (try = 0; try < CPLD_I2C_RETRY_TIMES; try++) { + if ((ret = i2c_smbus_read_i2c_block_data(client, command, length, values) ) >= 0 ) + break; + msleep(CPLD_I2C_RETRY_WAIT_TIME); + } + return ret; +} + +static ssize_t show_fan_rpm_value(struct device *dev, struct device_attribute *da, char *buf) +{ + struct cpld_data *data = dev_get_drvdata(dev); + struct i2c_client *client = data->client; + int index = to_sensor_dev_attr_2(da)->index; + uint8_t size; + s32 status; + s32 ret_t; + + ret_t = 0; + status = -1; + size = 0; + mutex_lock(&data->update_lock); + status = cpld_i2c_smbus_read_byte_data(client, index); + if (status < 0) { + mutex_unlock(&data->update_lock); + return 0; + } + data->data[0] = status; + status = cpld_i2c_smbus_read_byte_data(client, index + 1); + if (status < 0) { + mutex_unlock(&data->update_lock); + return 0; + } + data->data[1] = status; + DBG_DEBUG("cpld reg pos:0x%x value:0x%x\n", index, data->data[0]); + DBG_DEBUG("cpld reg pos:0x%x value:0x%x\n", index + 1, data->data[1]); + ret_t = (data->data[1] << 8) + data->data[0] ; + if (ret_t == 0 ) { + size = snprintf(buf, CPLD_SIZE, "%d\n", ret_t); + } else if (ret_t == 0xffff) { + size = snprintf(buf, CPLD_SIZE, "%d\n", 0); + } else { + size = snprintf(buf, CPLD_SIZE, "%d\n", 15000000 / ret_t); + } + mutex_unlock(&data->update_lock); + return size; +} + +static ssize_t set_cpld_sysfs_value(struct device *dev, struct device_attribute *da, const char *buf, size_t +count) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct i2c_client *client = to_i2c_client(dev); + struct cpld_data *data = i2c_get_clientdata(client); + unsigned long val; + int err; + + err = kstrtoul(buf, 16, &val); + if (err) + return err; + if ((val < 0) || (val > 0xff)) { + DBG_ERROR("please enter 0x00 ~ 0xff\n"); + return -1; + } + mutex_lock(&data->update_lock); + data->data[0] = (u8)val; + DBG_DEBUG("pos: 0x%02x count = %ld, data = 0x%02x\n", attr->index, count, data->data[0]); + i2c_smbus_write_byte_data(client, attr->index, data->data[0]); + mutex_unlock(&data->update_lock); + + return count; +} + +static ssize_t show_cpld_version(struct device *dev, struct device_attribute *da, char *buf) +{ + struct i2c_client *client = to_i2c_client(dev); + struct cpld_data *data = i2c_get_clientdata(client); + s32 status; + + status = -1; + mutex_lock(&data->update_lock); + status = cpld_i2c_smbus_read_i2c_block_data(client, 0, 4, data->data); + if (status < 0) { + mutex_unlock(&data->update_lock); + return 0; + } + mutex_unlock(&data->update_lock); + return snprintf(buf, COMMON_STR_LEN, "%02x %02x %02x %02x \n", data->data[0], data->data[1], data->data[2], + data->data[3]); +} + +static ssize_t show_cpld_sysfs_value(struct device *dev, struct device_attribute *da, char *buf) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct i2c_client *client = to_i2c_client(dev); + struct cpld_data *data = i2c_get_clientdata(client); + s32 status; + + status = -1; + mutex_lock(&data->update_lock); + status = cpld_i2c_smbus_read_byte_data(client, attr->index); + if (status < 0) { + mutex_unlock(&data->update_lock); + return 0; + } + data->data[0] = status; + DBG_DEBUG("cpld reg pos:0x%x value:0x%02x\n", attr->index, data->data[0]); + mutex_unlock(&data->update_lock); + return snprintf(buf, COMMON_STR_LEN, "%02x\n", data->data[0]); +} + +/* sys */ +static SENSOR_DEVICE_ATTR(cpld_version, S_IRUGO, show_cpld_version, NULL, 0); +static SENSOR_DEVICE_ATTR(broad_back_sys, S_IRUGO | S_IWUSR, show_cpld_sysfs_value, set_cpld_sysfs_value, 0x72); +static SENSOR_DEVICE_ATTR(broad_front_pwr, S_IRUGO| S_IWUSR, show_cpld_sysfs_value, set_cpld_sysfs_value, 0x73); +static SENSOR_DEVICE_ATTR(broad_front_fan, S_IRUGO| S_IWUSR, show_cpld_sysfs_value, set_cpld_sysfs_value, 0x74); + + +/* fan */ +static SENSOR_DEVICE_ATTR(fan_present, S_IRUGO, show_cpld_sysfs_value, NULL, 0x30); +static SENSOR_DEVICE_ATTR(fan_status, S_IRUGO, show_cpld_sysfs_value, NULL, 0x31); + +static SENSOR_DEVICE_ATTR(fan1_speed_set, S_IRUGO | S_IWUSR, show_cpld_sysfs_value, set_cpld_sysfs_value, 0x14); +static SENSOR_DEVICE_ATTR(fan1_1_real_speed, S_IRUGO, show_fan_rpm_value, NULL, 0x1B); +static SENSOR_DEVICE_ATTR(fan1_2_real_speed, S_IRUGO, show_fan_rpm_value, NULL, 0x25); +static SENSOR_DEVICE_ATTR(fan1_led, S_IRUGO | S_IWUSR, show_cpld_sysfs_value, set_cpld_sysfs_value, 0x3b); + + +static SENSOR_DEVICE_ATTR(fan2_speed_set, S_IRUGO | S_IWUSR, show_cpld_sysfs_value, set_cpld_sysfs_value, 0x15); +static SENSOR_DEVICE_ATTR(fan2_1_real_speed, S_IRUGO, show_fan_rpm_value, NULL, 0x1D); +static SENSOR_DEVICE_ATTR(fan2_2_real_speed, S_IRUGO, show_fan_rpm_value, NULL, 0x27); +static SENSOR_DEVICE_ATTR(fan2_led, S_IRUGO | S_IWUSR, show_cpld_sysfs_value, set_cpld_sysfs_value, 0x3c); + + +static SENSOR_DEVICE_ATTR(fan3_speed_set, S_IRUGO | S_IWUSR, show_cpld_sysfs_value, set_cpld_sysfs_value, 0x16); +static SENSOR_DEVICE_ATTR(fan3_1_real_speed, S_IRUGO, show_fan_rpm_value, NULL, 0x1F); +static SENSOR_DEVICE_ATTR(fan3_2_real_speed, S_IRUGO, show_fan_rpm_value, NULL, 0x29); +static SENSOR_DEVICE_ATTR(fan3_led, S_IRUGO | S_IWUSR, show_cpld_sysfs_value, set_cpld_sysfs_value, 0x3d); + + +static SENSOR_DEVICE_ATTR(fan4_speed_set, S_IRUGO | S_IWUSR, show_cpld_sysfs_value, set_cpld_sysfs_value, 0x17); +static SENSOR_DEVICE_ATTR(fan4_1_real_speed, S_IRUGO, show_fan_rpm_value, NULL, 0x21); +static SENSOR_DEVICE_ATTR(fan4_2_real_speed, S_IRUGO, show_fan_rpm_value, NULL, 0x2b); +static SENSOR_DEVICE_ATTR(fan4_led, S_IRUGO | S_IWUSR, show_cpld_sysfs_value, set_cpld_sysfs_value, 0x3e); + +static SENSOR_DEVICE_ATTR(fan5_speed_set, S_IRUGO | S_IWUSR, show_cpld_sysfs_value, set_cpld_sysfs_value, 0x18); +static SENSOR_DEVICE_ATTR(fan5_1_real_speed, S_IRUGO, show_fan_rpm_value, NULL, 0x23); +static SENSOR_DEVICE_ATTR(fan5_2_real_speed, S_IRUGO, show_fan_rpm_value, NULL, 0x2d); +static SENSOR_DEVICE_ATTR(fan5_led, S_IRUGO | S_IWUSR, show_cpld_sysfs_value, set_cpld_sysfs_value, 0x3f); + +/* sfp */ +static SENSOR_DEVICE_ATTR(sfp_enable, S_IRUGO| S_IWUSR, show_cpld_sysfs_value, set_cpld_sysfs_value, +0x94); +static SENSOR_DEVICE_ATTR(sfp_presence1, S_IRUGO, show_cpld_sysfs_value, NULL, 0x10); +static SENSOR_DEVICE_ATTR(sfp_presence2, S_IRUGO, show_cpld_sysfs_value, NULL, 0x11); +static SENSOR_DEVICE_ATTR(sfp_presence3, S_IRUGO, show_cpld_sysfs_value, NULL, 0x10); +static SENSOR_DEVICE_ATTR(sfp_presence4, S_IRUGO, show_cpld_sysfs_value, NULL, 0x11); +static SENSOR_DEVICE_ATTR(sfp_led1, S_IRUGO | S_IWUSR, show_cpld_sysfs_value, set_cpld_sysfs_value, 0x18); +static SENSOR_DEVICE_ATTR(sfp_led2, S_IRUGO | S_IWUSR, show_cpld_sysfs_value, set_cpld_sysfs_value, 0x19); +static SENSOR_DEVICE_ATTR(sfp_led3, S_IRUGO | S_IWUSR, show_cpld_sysfs_value, set_cpld_sysfs_value, 0x18); +static SENSOR_DEVICE_ATTR(sfp_led4, S_IRUGO | S_IWUSR ,show_cpld_sysfs_value, set_cpld_sysfs_value, 0x19); +static SENSOR_DEVICE_ATTR(sfp_reset1, S_IRUGO | S_IWUSR ,show_cpld_sysfs_value, set_cpld_sysfs_value, 0x14); +static SENSOR_DEVICE_ATTR(sfp_reset2, S_IRUGO | S_IWUSR ,show_cpld_sysfs_value, set_cpld_sysfs_value, 0x15); +static SENSOR_DEVICE_ATTR(sfp_reset3, S_IRUGO | S_IWUSR ,show_cpld_sysfs_value, set_cpld_sysfs_value, 0x14); +static SENSOR_DEVICE_ATTR(sfp_reset4, S_IRUGO | S_IWUSR ,show_cpld_sysfs_value, set_cpld_sysfs_value, 0x15); + +static struct attribute *cpld_bus2_addr_0x0d_sysfs_attrs[] = { + &sensor_dev_attr_cpld_version.dev_attr.attr, + &sensor_dev_attr_fan_present.dev_attr.attr, + &sensor_dev_attr_fan_status.dev_attr.attr, + + &sensor_dev_attr_fan1_speed_set.dev_attr.attr, + &sensor_dev_attr_fan1_1_real_speed.dev_attr.attr, + &sensor_dev_attr_fan1_2_real_speed.dev_attr.attr, + &sensor_dev_attr_fan1_led.dev_attr.attr, + + &sensor_dev_attr_fan2_speed_set.dev_attr.attr, + &sensor_dev_attr_fan2_1_real_speed.dev_attr.attr, + &sensor_dev_attr_fan2_2_real_speed.dev_attr.attr, + &sensor_dev_attr_fan2_led.dev_attr.attr, + + &sensor_dev_attr_fan3_speed_set.dev_attr.attr, + &sensor_dev_attr_fan3_1_real_speed.dev_attr.attr, + &sensor_dev_attr_fan3_2_real_speed.dev_attr.attr, + &sensor_dev_attr_fan3_led.dev_attr.attr, + + &sensor_dev_attr_fan4_speed_set.dev_attr.attr, + &sensor_dev_attr_fan4_1_real_speed.dev_attr.attr, + &sensor_dev_attr_fan4_2_real_speed.dev_attr.attr, + &sensor_dev_attr_fan4_led.dev_attr.attr, + + &sensor_dev_attr_fan5_speed_set.dev_attr.attr, + &sensor_dev_attr_fan5_1_real_speed.dev_attr.attr, + &sensor_dev_attr_fan5_2_real_speed.dev_attr.attr, + &sensor_dev_attr_fan5_led.dev_attr.attr, + NULL +}; + +static struct attribute *cpld_bus6_addr_0x0d_sysfs_attrs[] = { + &sensor_dev_attr_cpld_version.dev_attr.attr, + &sensor_dev_attr_broad_back_sys.dev_attr.attr, + &sensor_dev_attr_broad_front_pwr.dev_attr.attr, + &sensor_dev_attr_broad_front_fan.dev_attr.attr, + &sensor_dev_attr_sfp_enable.dev_attr.attr, + NULL +}; + +static struct attribute *cpld_bus8_addr_0x30_sysfs_attrs[] = { + &sensor_dev_attr_sfp_presence1.dev_attr.attr, + &sensor_dev_attr_sfp_presence2.dev_attr.attr, + &sensor_dev_attr_sfp_led1.dev_attr.attr, + &sensor_dev_attr_sfp_led2.dev_attr.attr, + &sensor_dev_attr_sfp_reset1.dev_attr.attr, + &sensor_dev_attr_sfp_reset2.dev_attr.attr, + NULL +}; + +static struct attribute *cpld_bus8_addr_0x31_sysfs_attrs[] = { + &sensor_dev_attr_sfp_presence3.dev_attr.attr, + &sensor_dev_attr_sfp_presence4.dev_attr.attr, + &sensor_dev_attr_sfp_led3.dev_attr.attr, + &sensor_dev_attr_sfp_led4.dev_attr.attr, + &sensor_dev_attr_sfp_reset3.dev_attr.attr, + &sensor_dev_attr_sfp_reset4.dev_attr.attr, + NULL +}; + +static const struct attribute_group cpld_bus2_addr_0x0d_sysfs_group = { + .attrs = cpld_bus2_addr_0x0d_sysfs_attrs, +}; + +static const struct attribute_group cpld_bus6_addr_0x0d_sysfs_group = { + .attrs = cpld_bus6_addr_0x0d_sysfs_attrs, +}; + +static const struct attribute_group cpld_bus8_addr_0x30_sysfs_group = { + .attrs = cpld_bus8_addr_0x30_sysfs_attrs, +}; + +static const struct attribute_group cpld_bus8_addr_0x31_sysfs_group = { + .attrs = cpld_bus8_addr_0x31_sysfs_attrs, +}; + +struct cpld_attr_match_group { + int bus_nr; + unsigned short addr; + const struct attribute_group *attr_group_ptr; + const struct attribute_group *attr_hwmon_ptr; +}; + +static struct cpld_attr_match_group g_cpld_attr_match[] = { + {2, 0x0d, &cpld_bus2_addr_0x0d_sysfs_group, NULL}, + /* {6, 0x0d, &cpld_bus6_addr_0x0d_sysfs_group, NULL}, */ + {8, 0x30, &cpld_bus8_addr_0x30_sysfs_group, NULL}, + {8, 0x31, &cpld_bus8_addr_0x31_sysfs_group, NULL}, +}; + +static const struct attribute_group *cpld_get_attr_group(struct i2c_client *client, int is_hwmon) +{ + int i; + struct cpld_attr_match_group *group; + + for (i = 0; i < ARRAY_SIZE(g_cpld_attr_match); i++) { + group = &g_cpld_attr_match[i]; + DBG_DEBUG("is_hwmon %d i %d client(nr:%d,addr:0x%x), group(nr:%d,addr:0x0%x) .\n", is_hwmon, + i, client->adapter->nr, client->addr, group->bus_nr, group->addr); + if ((client->addr == group->addr) && (client->adapter->nr == group->bus_nr)) { + DBG_DEBUG("is_hwmon %d i %d nr %d addr %d .\n", is_hwmon, i, client->adapter->nr, client->addr); + return (is_hwmon) ? (group->attr_hwmon_ptr) : (group->attr_group_ptr); + } + } + + DBG_DEBUG("is_hwmon %d nr %d addr %d dismatch, return NULL.\n", is_hwmon, client->adapter->nr, client->addr); + return NULL; +} + +#if 0 +static int cpld_detect(struct i2c_client *new_client, struct i2c_board_info *info) +{ + struct i2c_adapter *adapter = new_client->adapter; + int conf; + DBG_DEBUG("=========cpld_detect(0x%x)===========\n", new_client->addr); + if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE_DATA | + I2C_FUNC_SMBUS_WORD_DATA)) + return -ENODEV; + conf = i2c_smbus_read_byte_data(new_client, 0); + if (!conf) + return -ENODEV; + strlcpy(info->type, "rg_cpld", I2C_NAME_SIZE); + return 0; +} +#endif + +static int cpld_probe(struct i2c_client *client, const struct i2c_device_id *id) +{ + struct cpld_data *data; + int status; + const struct attribute_group *sysfs_group, *hwmon_group; + + status = -1; + DBG_DEBUG("=========cpld_probe(addr:0x%x, nr:%d)===========\n", client->addr, client->adapter->nr); + data = devm_kzalloc(&client->dev, sizeof(struct cpld_data), GFP_KERNEL); + if (!data) { + return -ENOMEM; + } + + data->client = client; + i2c_set_clientdata(client, data); + mutex_init(&data->update_lock); + + sysfs_group = NULL; + sysfs_group = cpld_get_attr_group(client, 0); + if (sysfs_group) { + status = sysfs_create_group(&client->dev.kobj, sysfs_group); + DBG_DEBUG("=========(addr:0x%x, nr:%d) sysfs_create_group status %d===========\n", client->addr, client->adapter->nr, status); + if (status != 0) { + DBG_ERROR("sysfs_create_group status %d.\n", status); + goto error; + } + } else { + DBG_DEBUG("=========(addr:0x%x, nr:%d) no sysfs_create_group \n", client->addr, client->adapter->nr); + } + + hwmon_group = NULL; + hwmon_group = cpld_get_attr_group(client, 1); + if (hwmon_group) { + data->hwmon_dev = hwmon_device_register_with_groups(&client->dev, client->name, data, (const struct attribute_group **)hwmon_group); + if (IS_ERR(data->hwmon_dev)) { + sysfs_remove_group(&client->dev.kobj, (const struct attribute_group *)sysfs_group); + DBG_ERROR("hwmon_device_register_with_groups failed ret %ld.\n", PTR_ERR(data->hwmon_dev)); + return PTR_ERR(data->hwmon_dev); + } + DBG_DEBUG("=========(addr:0x%x, nr:%d) hwmon_device_register_with_groups success===========\n", client->addr, client->adapter->nr); + if (status != 0) { + DBG_ERROR("sysfs_create_group status %d.\n", status); + goto error; + } + } else { + DBG_DEBUG("=========(addr:0x%x, nr:%d) no hwmon_device_register_with_groups \n", client->addr, client->adapter->nr); + } + +error: + return status; + +} + +static int cpld_remove(struct i2c_client *client) +{ + struct cpld_data *data = i2c_get_clientdata(client); + const struct attribute_group *sysfs_group, *hwmon_group; + + DBG_DEBUG("=========cpld_remove(addr:0x%x, nr:%d)===========\n", client->addr, client->adapter->nr); + + sysfs_group = NULL; + sysfs_group = cpld_get_attr_group(client, 0); + if (sysfs_group) { + DBG_DEBUG("=========(addr:0x%x, nr:%d) do sysfs_remove_group \n", client->addr, client->adapter->nr); + sysfs_remove_group(&client->dev.kobj, (const struct attribute_group *)sysfs_group); + } else { + DBG_DEBUG("=========(addr:0x%x, nr:%d) no sysfs_remove_group \n", client->addr, client->adapter->nr); + } + + hwmon_group = NULL; + hwmon_group = cpld_get_attr_group(client, 1); + if (hwmon_group) { + DBG_DEBUG("=========(addr:0x%x, nr:%d) do hwmon_device_unregister \n", client->addr, client->adapter->nr); + hwmon_device_unregister(data->hwmon_dev); + } else { + DBG_DEBUG("=========(addr:0x%x, nr:%d) no hwmon_device_unregister \n", client->addr, client->adapter->nr); + } + + return 0; +} + +static const struct i2c_device_id cpld_id[] = { + { "rg_cpld", 0 }, + {} +}; +MODULE_DEVICE_TABLE(i2c, cpld_id); + +static struct i2c_driver rg_cpld_driver = { + .class = I2C_CLASS_HWMON, + .driver = { + .name = "rg_cpld", + }, + .probe = cpld_probe, + .remove = cpld_remove, + .id_table = cpld_id, + //.detect = cpld_detect, + // .address_list = rg_i2c_cpld, +}; + +module_i2c_driver(rg_cpld_driver); +MODULE_AUTHOR("support "); +MODULE_DESCRIPTION("ragile CPLD driver"); +MODULE_LICENSE("GPL"); diff --git a/platform/broadcom/sonic-platform-modules-ragile/ra-b6510-32c/modules/driver/rg_lpc_cpld.c b/platform/broadcom/sonic-platform-modules-ragile/ra-b6510-32c/modules/driver/rg_lpc_cpld.c new file mode 100755 index 0000000000..7f32a47436 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ragile/ra-b6510-32c/modules/driver/rg_lpc_cpld.c @@ -0,0 +1,237 @@ +#include /* Wd're doing kernel work */ +#include /* specifically, a module */ +#include +#include /* Need for the macros */ +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include "ragile.h" + +int lpc_cpld_verbose = 0; +int lpc_cpld_error = 0; +module_param(lpc_cpld_verbose, int, S_IRUGO | S_IWUSR); +module_param(lpc_cpld_error, int, S_IRUGO | S_IWUSR); + + +#define LPC_CPLD_VERBOSE(fmt, args...) do { \ + if (lpc_cpld_verbose) { \ + printk(KERN_ERR "[LPC_CPLD_I2C_DEVICE][VERBOSE][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \ + } \ +} while (0) + +#define LPC_CPLD_ERROR(fmt, args...) do { \ + if (lpc_cpld_error) { \ + printk(KERN_ERR "[LPC_CPLD_I2C_DEVICE][ERROR][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \ + } \ + } while (0) + +#define PCI_VENDOR_ID_D1527_LPC (0x8c54) +#define PCI_VENDOR_ID_C3000_LPC (0x19dc) + +#define MAX_CPLD_REG_SIZE (0x100) +#define LPC_GET_CPLD_ID(addr) ((addr >> 16) & 0xff) +#define LPC_GET_CPLD_OFFSET(addr) ((addr) & 0xff) +typedef struct rg_lpc_device_s { + u16 base; + u16 size; + u8 type; + u8 id; +} rg_lpc_device_t; + +typedef enum rg_lpc_dev_type_s { + LPC_DEVICE_CPLD = 1, + LPC_DEVICE_FPGA = 2, +} rg_lpc_dev_type_t; + +static rg_lpc_device_t g_rg_lpc_dev[] = { + {.base = 0x700, .size = MAX_CPLD_REG_SIZE, .type = LPC_DEVICE_CPLD, .id = 0}, + {.base = 0x900, .size = MAX_CPLD_REG_SIZE, .type = LPC_DEVICE_CPLD, .id = 1}, + {.base = 0xb00, .size = MAX_CPLD_REG_SIZE, .type = LPC_DEVICE_CPLD, .id = 2}, + /*{.base = 0x900, .size = MAX_FPGA_REG_SIZE, .type = LPC_DEVICE_FPGA, .id = 0},*/ +}; + +static rg_lpc_device_t* lpc_get_device_info(int type, int id) +{ + int i; + + for (i = 0; i < ARRAY_SIZE(g_rg_lpc_dev); i++) { + if ((g_rg_lpc_dev[i].type == type) && (g_rg_lpc_dev[i].id == id)) { + return &g_rg_lpc_dev[i]; + } + } + + return NULL; +} + +static int lpc_cpld_read(int address, u8 *val) +{ + int cpld_id; + rg_lpc_device_t *info; + + LPC_CPLD_ERROR("Enter\n"); + cpld_id = LPC_GET_CPLD_ID(address); + LPC_CPLD_ERROR("icpld_id=%d\n", cpld_id); + info = lpc_get_device_info(LPC_DEVICE_CPLD, cpld_id); + if (info == NULL) { + LPC_CPLD_ERROR("lpc_get_device_info addr 0x%x id %d failed.\r\n", address, cpld_id); + return -1; + } + + *val = inb(info->base + LPC_GET_CPLD_OFFSET(address)); + LPC_CPLD_VERBOSE("Leave info->base 0x%x, addr 0x%x, cpld_id %d, val 0x%x.\r\n", info->base, address, cpld_id, *val); + return 0; +} + +static int lpc_cpld_write(int address, u8 reg_val) +{ + int cpld_id; + rg_lpc_device_t *info; + + cpld_id = LPC_GET_CPLD_ID(address); + info = lpc_get_device_info(LPC_DEVICE_CPLD, cpld_id); + if (info == NULL) { + LPC_CPLD_ERROR("lpc_get_device_info addr 0x%x id %d failed.\r\n", address, cpld_id); + return -1; + } + + outb(reg_val, info->base + LPC_GET_CPLD_OFFSET(address)); + LPC_CPLD_VERBOSE("Leave info->base 0x%x, addr 0x%x, cpld_id %d, val 0x%x.\r\n", info->base, address, cpld_id, reg_val); + return 0; +} + +static ssize_t show_cpld_version(struct device *dev, struct device_attribute *da, char *buf) +{ + int ret, i; + u8 data[4]; + u32 index = to_sensor_dev_attr(da)->index; + + memset(data, 0 ,sizeof(data)); + for (i = 0; i < 4; i++) { + ret = lpc_cpld_read(index + i, &data[i]); + if (ret != 0) { + memset(data, 0 ,sizeof(data)); + LPC_CPLD_ERROR("get cpld version failed!\n"); + break; + } + } + + return snprintf(buf, COMMON_STR_LEN, "%02x %02x %02x %02x \n", data[0], data[1], data[2], data[3]); + +} + +static ssize_t show_cpld_sysfs_value(struct device *dev, struct device_attribute *da, char *buf) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + u8 data; + int ret; + + ret = lpc_cpld_read(attr->index, &data); + if (ret != 0) { + LPC_CPLD_ERROR("get cpld[0x%x] value failed!\n", attr->index); + data = 0; + } + return snprintf(buf, COMMON_STR_LEN, "%02x\n", data); +} + +static ssize_t set_cpld_sysfs_value(struct device *dev, struct device_attribute *da, const char *buf, size_t +count) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + u8 data; + unsigned long val; + int err; + + err = kstrtoul(buf, 16, &val); + if (err) + return err; + if ((val < 0) || (val > 0xff)) { + LPC_CPLD_ERROR("please enter 0x00 ~ 0xff\n"); + return -1; + } + + data = (u8)val; + LPC_CPLD_VERBOSE("pos: 0x%02x count = %ld, data = 0x%02x\n", attr->index, count, data); + err = lpc_cpld_write(attr->index, data); + if (err != 0) { + LPC_CPLD_ERROR("set cpld[0x%x] value[0x%x] failed!\n", attr->index, data); + count = 0; + } + + return count; +} + +/* connect board cpld 0x900 id=1 */ +static SENSOR_DEVICE_ATTR(connect_cpld_version, S_IRUGO, show_cpld_version, NULL, 0x10000); +static SENSOR_DEVICE_ATTR(broad_front_sys, S_IRUGO | S_IWUSR, show_cpld_sysfs_value, set_cpld_sysfs_value, 0x10072); +static SENSOR_DEVICE_ATTR(psu_status, S_IRUGO, show_cpld_sysfs_value, NULL, 0x10051); +static SENSOR_DEVICE_ATTR(broad_front_pwr, S_IRUGO| S_IWUSR, show_cpld_sysfs_value, set_cpld_sysfs_value, 0x10073); +static SENSOR_DEVICE_ATTR(broad_front_fan, S_IRUGO| S_IWUSR, show_cpld_sysfs_value, set_cpld_sysfs_value, 0x10074); +static SENSOR_DEVICE_ATTR(sfp_enable, S_IRUGO| S_IWUSR, show_cpld_sysfs_value, set_cpld_sysfs_value, 0x10094); + +static struct attribute *lpc_cpld_base_sysfs_attrs[] = { + &sensor_dev_attr_connect_cpld_version.dev_attr.attr, + &sensor_dev_attr_broad_front_sys.dev_attr.attr, + &sensor_dev_attr_psu_status.dev_attr.attr, + &sensor_dev_attr_broad_front_pwr.dev_attr.attr, + &sensor_dev_attr_broad_front_fan.dev_attr.attr, + &sensor_dev_attr_sfp_enable.dev_attr.attr, + NULL +}; + +static const struct attribute_group lpc_cpld_base_sysfs_group = { + .attrs = lpc_cpld_base_sysfs_attrs, +}; + +static int __init rg_lpc_cpld_init(void) +{ + struct pci_dev *pdev = NULL; + int status; + + pdev = pci_get_device(PCI_VENDOR_ID_INTEL, PCI_VENDOR_ID_D1527_LPC, pdev); + if (!pdev) { + LPC_CPLD_ERROR("pci_get_device(0x8086, 0x8c54) failed!\n"); + return -1; + } + + status = -1; + status = sysfs_create_group(&pdev->dev.kobj, &lpc_cpld_base_sysfs_group); + if (status) { + LPC_CPLD_ERROR("sysfs_create_group failed!\n"); + return -1; + } + + LPC_CPLD_VERBOSE("Leave success\n"); + return 0; +} + +static void __exit rg_lpc_cpld_exit(void) +{ + struct pci_dev *pdev = NULL; + + pdev = pci_get_device(PCI_VENDOR_ID_INTEL, PCI_VENDOR_ID_D1527_LPC, pdev); + if (!pdev) { + LPC_CPLD_ERROR("pci_get_device(0x8086, 0x8c54) failed!\n"); + return ; + } + + sysfs_remove_group(&pdev->dev.kobj, &lpc_cpld_base_sysfs_group); + + LPC_CPLD_VERBOSE("Leave.\n"); +} + +module_init(rg_lpc_cpld_init); +module_exit(rg_lpc_cpld_exit); +MODULE_LICENSE("GPL"); +MODULE_AUTHOR("support "); diff --git a/platform/broadcom/sonic-platform-modules-ragile/ra-b6510-32c/setup.py b/platform/broadcom/sonic-platform-modules-ragile/ra-b6510-32c/setup.py new file mode 100644 index 0000000000..f36055fb4e --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ragile/ra-b6510-32c/setup.py @@ -0,0 +1,33 @@ +from setuptools import setup + +setup( + name='sonic-platform', + version='1.0', + description='SONiC platform API implementation on RAGILE Platforms', + license='Apache 2.0', + author='SONiC Team', + author_email='support@ragile.com', + url='', + maintainer='RAGILE SUPPORT TEAM', + maintainer_email='', + packages=[ + 'sonic_platform', + 'rgutil', + 'eepromutil', + 'sonic_pcie', + ], + classifiers=[ + 'Development Status :: 3 - Alpha', + 'Environment :: Plugins', + 'Intended Audience :: Developers', + 'Intended Audience :: Information Technology', + 'Intended Audience :: System Administrators', + 'License :: OSI Approved :: Apache Software License', + 'Natural Language :: English', + 'Operating System :: POSIX :: Linux', + 'Programming Language :: Python :: 3.7', + 'Topic :: Utilities', + ], + keywords='sonic SONiC platform PLATFORM', +) + diff --git a/platform/broadcom/sonic-platform-modules-ragile/ra-b6510-32c/sonic_pcie/__init__.py b/platform/broadcom/sonic-platform-modules-ragile/ra-b6510-32c/sonic_pcie/__init__.py new file mode 100644 index 0000000000..73e2a89c8d --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ragile/ra-b6510-32c/sonic_pcie/__init__.py @@ -0,0 +1 @@ +__all__ = ["pcie_common"] \ No newline at end of file diff --git a/platform/broadcom/sonic-platform-modules-ragile/ra-b6510-32c/sonic_pcie/pcie_common.py b/platform/broadcom/sonic-platform-modules-ragile/ra-b6510-32c/sonic_pcie/pcie_common.py new file mode 100644 index 0000000000..56e9d8664a --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ragile/ra-b6510-32c/sonic_pcie/pcie_common.py @@ -0,0 +1,107 @@ +# pcie_common.py +# Common PCIE check interfaces for SONIC +# + +import os +import yaml +import subprocess +import re +import sys +from copy import deepcopy +try: + from .pcie import PcieBase +except ImportError as e: + raise ImportError(str(e) + "- required module not found") + + +class PcieUtil(PcieBase): + """Platform-specific PCIEutil class""" + # got the config file path + def __init__(self, path): + self.config_path = path + + # load the config file + def load_config_file(self): + config_file = self.config_path + "/" + "pcie.yaml" + try: + with open(config_file) as conf_file: + self.confInfo = yaml.load(conf_file) + except IOError as e: + print("Error: {}".format(str(e))) + print("Not found config file, please add a config file manually, or generate it by running [pcieutil pcie_generate]") + sys.exit() + + # load current PCIe device + def get_pcie_device(self): + pciDict = {} + pciList = [] + p1 = "^(\w+):(\w+)\.(\w)\s(.*)\s*\(*.*\)*" + p2 = "^.*:.*:.*:(\w+)\s*\(*.*\)*" + command1 = "sudo lspci" + command2 = "sudo lspci -n" + # run command 1 + proc1 = subprocess.Popen(command1, shell=True, universal_newlines=True, stdout=subprocess.PIPE) + output1 = proc1.stdout.readlines() + proc1.communicate() + # run command 2 + proc2 = subprocess.Popen(command2, shell=True, universal_newlines=True, stdout=subprocess.PIPE) + output2 = proc2.stdout.readlines() + proc2.communicate() + + if proc1.returncode > 0: + for line1 in output1: + print(line1.strip()) + return + elif proc2.returncode > 0: + for line2 in output2: + print(line2.strip()) + return + else: + for (line1, line2) in zip(output1, output2): + pciDict.clear() + match1 = re.search(p1, line1.strip()) + match2 = re.search(p2, line2.strip()) + if match1 and match2: + Bus = match1.group(1) + Dev = match1.group(2) + Fn = match1.group(3) + Name = match1.group(4) + Id = match2.group(1) + pciDict["name"] = Name + pciDict["bus"] = Bus + pciDict["dev"] = Dev + pciDict["fn"] = Fn + pciDict["id"] = Id + pciList.append(pciDict) + pciDict = deepcopy(pciDict) + else: + print("CAN NOT MATCH PCIe DEVICE") + return pciList + + # check the sysfs tree for each PCIe device + def check_pcie_sysfs(self, domain=0, bus=0, device=0, func=0): + dev_path = os.path.join('/sys/bus/pci/devices', '%04x:%02x:%02x.%d' % (domain, bus, device, func)) + if os.path.exists(dev_path): + return True + return False + + # check the current PCIe device with config file and return the result + def get_pcie_check(self): + self.load_config_file() + for item_conf in self.confInfo: + bus_conf = item_conf["bus"] + dev_conf = item_conf["dev"] + fn_conf = item_conf["fn"] + if self.check_pcie_sysfs(bus=int(bus_conf, base=16), device=int(dev_conf, base=16), func=int(fn_conf, base=16)): + item_conf["result"] = "Passed" + else: + item_conf["result"] = "Failed" + return self.confInfo + + # generate the config file with current pci device + def dump_conf_yaml(self): + curInfo = self.get_pcie_device() + with open(self.config_path + "/" + "pcie.yaml", "w") as conf_file: + yaml.dump(curInfo, conf_file, default_flow_style=False) + return + diff --git a/platform/broadcom/sonic-platform-modules-ragile/ra-b6510-32c/sonic_platform/__init__.py b/platform/broadcom/sonic-platform-modules-ragile/ra-b6510-32c/sonic_platform/__init__.py new file mode 100644 index 0000000000..d49ca9b48b --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ragile/ra-b6510-32c/sonic_platform/__init__.py @@ -0,0 +1,4 @@ +# All the derived classes for PDDF +__all__ = ["platform", "chassis", "sfp", "psu", "thermal", "fan", "fan_drawer"] +from . import platform + diff --git a/platform/broadcom/sonic-platform-modules-ragile/ra-b6510-32c/sonic_platform/chassis.py b/platform/broadcom/sonic-platform-modules-ragile/ra-b6510-32c/sonic_platform/chassis.py new file mode 100644 index 0000000000..ae8e741868 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ragile/ra-b6510-32c/sonic_platform/chassis.py @@ -0,0 +1,108 @@ +############################################################################# +# PDDF +# Module contains an implementation of SONiC Chassis API +# +############################################################################# + +try: + import time + from sonic_platform_pddf_base.pddf_chassis import PddfChassis + from sonic_platform.fan_drawer import FanDrawer +except ImportError as e: + raise ImportError(str(e) + "- required module not found") + +PORT_START = 0 +PORTS_IN_BLOCK = 32 +FAN_NUM_PER_DRAWER = 2 + +class Chassis(PddfChassis): + """ + PDDF Platform-specific Chassis class + """ + + SFP_STATUS_INSERTED = "1" + SFP_STATUS_REMOVED = "0" + port_dict = {} + + def __init__(self, pddf_data=None, pddf_plugin_data=None): + PddfChassis.__init__(self, pddf_data, pddf_plugin_data) + + # fan drawer + temp = [] + drawer_index = 0 + for idx, fan in enumerate(self.get_all_fans()): + temp.append(fan) + if (idx + 1) % FAN_NUM_PER_DRAWER == 0: + drawer = FanDrawer(drawer_index + 1, temp) + self.get_all_fan_drawers().append(drawer) + temp = [] + drawer_index += 1 + + def get_reboot_cause(self): + """ + Retrieves the cause of the previous reboot + Returns: + A tuple (string, string) where the first element is a string + containing the cause of the previous reboot. This string must be + one of the predefined strings in this class. If the first string + is "REBOOT_CAUSE_HARDWARE_OTHER", the second string can be used + to pass a description of the reboot cause. + """ + + return (self.REBOOT_CAUSE_NON_HARDWARE, None) + + def get_change_event(self, timeout=0): + change_event_dict = {"fan": {}, "sfp": {}} + sfp_status, sfp_change_dict = self.get_transceiver_change_event(timeout) + change_event_dict["sfp"] = sfp_change_dict + if sfp_status is True: + return True, change_event_dict + + return False, {} + + def get_transceiver_change_event(self, timeout=0): + start_time = time.time() + currernt_port_dict = {} + forever = False + + if timeout == 0: + forever = True + elif timeout > 0: + timeout = timeout / float(1000) # Convert to secs + else: + print("get_transceiver_change_event:Invalid timeout value", timeout) + return False, {} + + end_time = start_time + timeout + if start_time > end_time: + print( + "get_transceiver_change_event:" "time wrap / invalid timeout value", + timeout, + ) + return False, {} # Time wrap or possibly incorrect timeout + + while timeout >= 0: + # Check for OIR events and return updated port_dict + for index in range(PORT_START, PORTS_IN_BLOCK): + if self._sfp_list[index].get_presence(): + currernt_port_dict[index] = self.SFP_STATUS_INSERTED + else: + currernt_port_dict[index] = self.SFP_STATUS_REMOVED + if currernt_port_dict == self.port_dict: + if forever: + time.sleep(1) + else: + timeout = end_time - time.time() + if timeout >= 1: + time.sleep(1) # We poll at 1 second granularity + else: + if timeout > 0: + time.sleep(timeout) + return True, {} + else: + # Update reg value + self.port_dict = currernt_port_dict + print(self.port_dict) + return True, self.port_dict + print("get_transceiver_change_event: Should not reach here.") + return False, {} diff --git a/platform/broadcom/sonic-platform-modules-ragile/ra-b6510-32c/sonic_platform/common.py b/platform/broadcom/sonic-platform-modules-ragile/ra-b6510-32c/sonic_platform/common.py new file mode 100644 index 0000000000..c1a85f6186 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ragile/ra-b6510-32c/sonic_platform/common.py @@ -0,0 +1,44 @@ +import os +import yaml + +from sonic_py_common import device_info + + +class Common: + + DEVICE_PATH = '/usr/share/sonic/device/' + PMON_PLATFORM_PATH = '/usr/share/sonic/platform/' + CONFIG_DIR = 'sonic_platform_config' + + HOST_CHK_CMD = "docker > /dev/null 2>&1" + + def __init__(self): + (self.platform, self.hwsku) = device_info.get_platform_and_hwsku() + + def is_host(self): + return os.system(self.HOST_CHK_CMD) == 0 + + def load_json_file(self, path): + """ + Retrieves the json object from json file path + + Returns: + A json object + """ + with open(path, 'r') as f: + json_data = yaml.safe_load(f) + + return json_data + + def get_config_path(self, config_name): + """ + Retrieves the path to platform api config directory + + Args: + config_name: A string containing the name of config file. + + Returns: + A string containing the path to json file + """ + return os.path.join(self.DEVICE_PATH, self.platform, self.CONFIG_DIR, config_name) if self.is_host() else os.path.join(self.PMON_PLATFORM_PATH, self.CONFIG_DIR, config_name) + diff --git a/platform/broadcom/sonic-platform-modules-ragile/ra-b6510-32c/sonic_platform/component.py b/platform/broadcom/sonic-platform-modules-ragile/ra-b6510-32c/sonic_platform/component.py new file mode 100644 index 0000000000..7c6fd2df43 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ragile/ra-b6510-32c/sonic_platform/component.py @@ -0,0 +1,85 @@ +######################################################################## +# Ragile RA-B6510-32c +# +# Module contains an implementation of SONiC Platform Base API and +# provides the Components' (e.g., BIOS, CPLD, FPGA, etc.) available in +# the platform +# +######################################################################## + +try: + import subprocess + from sonic_platform_base.component_base import ComponentBase + from sonic_platform.regutil import Reg + from sonic_platform.logger import logger +except ImportError as e: + raise ImportError(str(e) + "- required module not found") + + +class Component(ComponentBase): + """ Ragile Platform-specific Component class""" + + def __init__(self, index, config=None): + self.index = index + self.name = config.get("name") + self._reg_fm_ver = Reg(config.get("firmware_version")) + self.description = config.get("desc") + self.slot = config.get("slot") + + def get_name(self): + """ + Retrieves the name of the component + + Returns: + A string containing the name of the component + """ + return self.name + + def get_description(self): + """ + Retrieves the description of the component + + Returns: + A string containing the description of the component + """ + return self.description + + def get_firmware_version(self): + """ + Retrieves the firmware version of the component + + Returns: + A string containing the firmware version of the component + """ + try: + return self._reg_fm_ver.decode() + except Exception as e: + logger.error(str(e)) + + return "" + + def install_firmware(self, image_path): + """ + Installs firmware to the component + + Args: + image_path: A string, path to firmware image + + Returns: + A boolean, True if install was successful, False if not + """ + try: + successtips = "CPLD Upgrade succeeded!" + status, output = subprocess.getstatusoutput("which firmware_upgrade") + if status or len(output) <= 0: + logger.error("no upgrade tool.") + return False + cmdstr = "%s %s cpld %d cpld"%(output,image_path,self.slot) + ret, log = subprocess.getstatusoutput(cmdstr) + if ret == 0 and successtips in log: + return True + logger.error("upgrade failed. ret:%d, log:\n%s" % (ret, log)) + except Exception as e: + logger.error(str(e)) + return False + diff --git a/platform/broadcom/sonic-platform-modules-ragile/ra-b6510-32c/sonic_platform/config.py b/platform/broadcom/sonic-platform-modules-ragile/ra-b6510-32c/sonic_platform/config.py new file mode 100644 index 0000000000..7d3064163b --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ragile/ra-b6510-32c/sonic_platform/config.py @@ -0,0 +1,771 @@ +# -*- coding: utf-8 -*- + +PSU_FAN_AIRFLOW = { + "CSU550AP-3-300": "F2B", + "CSU550AP-3-500": "F2B", + "DPS-550AB-39 A": "F2B", + "DPS-1300AB-6 S": "F2B", + "FSP1200-20ERM": "F2B", + "CSU800AP-3-300": "F2B", + "CSU550AP-3-501": "B2F", + "DPS-550AB-40 A": "B2F", +} + +psutypedecode = { + 0x00: "N/A", + 0x01: "AC", + 0x02: "DC", +} + + +class Unit: + Temperature = "C" + Voltage = "V" + Current = "A" + Power = "W" + Speed = "RPM" + + +class Threshold: + PSU_TEMP_MIN = -10 * 1000 + PSU_TEMP_MAX = 60 * 1000 + + PSU_FAN_SPEED_MIN = 5220 + PSU_FAN_SPEED_MAX = 17400 + + PSU_OUTPUT_VOLTAGE_MIN = 11 * 1000 + PSU_OUTPUT_VOLTAGE_MAX = 14 * 1000 + + PSU_AC_INPUT_VOLTAGE_MIN = 200 * 1000 + PSU_AC_INPUT_VOLTAGE_MAX = 240 * 1000 + + PSU_DC_INPUT_VOLTAGE_MIN = 190 * 1000 + PSU_DC_INPUT_VOLTAGE_MAX = 290 * 1000 + + ERR_VALUE = -9999999 + + PSU_OUTPUT_POWER_MIN = 10 * 1000 + PSU_OUTPUT_POWER_MAX = 1300 * 1000 + + PSU_INPUT_POWER_MIN = 10 * 1000 + PSU_INPUT_POWER_MAX = 1444 * 1000 + + PSU_OUTPUT_CURRENT_MIN = 2 * 1000 + PSU_OUTPUT_CURRENT_MAX = 107 * 1000 + + PSU_INPUT_CURRENT_MIN = 0.2 * 1000 + PSU_INPUT_CURRENT_MAX = 7 * 1000 + + FAN_SPEED_MAX = 24000 + FAN_SPEED_MIN = 7200 + + +class DecodeFormat: + TEXT = 0 + DECIMAL = 1 + ONE_BIT_HEX = 2 + HUNDREDTH = 3 + THOUSANDTH = 4 + MILLIONTH = 5 + AND = 6 + JOIN = 7 + FRU = 8 + HEX = 9 + + +class DecodeMethod: + SYSFS = 0 + I2C = 1 + I2C_WORD = 2 + DEVMEM = 3 + SDK = 4 + IO = 5 + FRU = 6 + + +class FRU: + SN = 0 + VERSION = 1 + PART_NAME = 2 + PRODUCT_NAME = 3 + MANUFACTURER = 4 + + +class Description: + CPLD = "Used for managing IO modules, SFP+ modules and system LEDs" + BIOS = "Performs initialization of hardware components during booting" + FPGA = "Platform management controller for on-board temperature monitoring, in-chassis power, Fan and LED control" + + +FAN_LED_COLORS = { + "green": 0b0100, + "red": 0b0010, + "amber": 0b0110, +} + + +DEVICE_CONF = { + "eeprom": {"bus": 1, "loc": "0056"}, + "components": [ + { + "name": "CPLD1 (MAC Board A)", + "firmware_version": { + "bus": 8, + "addr": 0x30, + "offset": 0, + "size": 4, + "way": DecodeMethod.I2C, + "format": DecodeFormat.JOIN, + "sep": "/", + }, + "desc": Description.CPLD, + "slot": 0, + }, + { + "name": "CPLD2 (MAC Board B)", + "firmware_version": { + "bus": 8, + "addr": 0x31, + "offset": 0, + "size": 4, + "way": DecodeMethod.I2C, + "format": DecodeFormat.JOIN, + "sep": "/", + }, + "desc": Description.CPLD, + "slot": 0, + }, + { + "name": "CPLD3 (CONNECT Board A)", + "firmware_version": { + "bus": 2, + "addr": 0x0d, + "offset": 0, + "size": 4, + "way": DecodeMethod.I2C, + "format": DecodeFormat.JOIN, + "sep": "/", + }, + "desc": Description.CPLD, + "slot": 0, + }, + { + "name": "CPLD4 (CPU Board)", + "firmware_version": { + "bus": 0, + "addr": 0x0D, + "offset": 0, + "size": 4, + "way": DecodeMethod.I2C, + "format": DecodeFormat.JOIN, + "sep": "/", + }, + "desc": Description.CPLD, + "slot": 1, + }, + ], + "thermals": [ + { + "name": "INLET TEMP", + "high": { + "loc": "/sys/bus/i2c/devices/3-004b/hwmon/*/temp1_max", + "format": DecodeFormat.THOUSANDTH, + }, + "low": None, + "crit_low": None, + "crit_high": None, + "temperature": { + "loc": "/sys/bus/i2c/devices/3-004b/hwmon/*/temp1_input", + "format": DecodeFormat.THOUSANDTH, + }, + }, + { + "name": "OUTLET TEMP", + "high": { + "loc": "/sys/bus/i2c/devices/3-004c/hwmon/*/temp1_max", + "format": DecodeFormat.THOUSANDTH, + }, + "low": None, + "crit_low": None, + "crit_high": None, + "temperature": { + "loc": "/sys/bus/i2c/devices/3-004c/hwmon/*/temp1_input", + "format": DecodeFormat.THOUSANDTH, + }, + }, + { + "name": "BOARD TEMP", + "high": { + "loc": "/sys/bus/i2c/devices/3-0049/hwmon/*/temp1_max", + "format": DecodeFormat.THOUSANDTH, + }, + "low": None, + "crit_low": None, + "crit_high": None, + "temperature": { + "loc": "/sys/bus/i2c/devices/3-0049/hwmon/*/temp1_input", + "format": DecodeFormat.THOUSANDTH, + }, + }, + { + "name": "PHYSICAL ID 0", + "high": { + "loc": "/sys/class/hwmon/hwmon0/temp1_max", + "format": DecodeFormat.THOUSANDTH, + }, + "low": None, + "crit_low": None, + "crit_high": { + "loc": "/sys/class/hwmon/hwmon0/temp1_crit", + "format": DecodeFormat.THOUSANDTH, + }, + "temperature": { + "loc": "/sys/class/hwmon/hwmon0/temp1_input", + "format": DecodeFormat.THOUSANDTH, + }, + }, + { + "name": "CPU CORE 0", + "high": { + "loc": "/sys/class/hwmon/hwmon0/temp2_max", + "format": DecodeFormat.THOUSANDTH, + }, + "low": None, + "crit_low": None, + "crit_high": { + "loc": "/sys/class/hwmon/hwmon0/temp2_crit", + "format": DecodeFormat.THOUSANDTH, + }, + "temperature": { + "loc": "/sys/class/hwmon/hwmon0/temp2_input", + "format": DecodeFormat.THOUSANDTH, + }, + }, + { + "name": "CPU CORE 1", + "high": { + "loc": "/sys/class/hwmon/hwmon0/temp3_max", + "format": DecodeFormat.THOUSANDTH, + }, + "low": None, + "crit_low": None, + "crit_high": { + "loc": "/sys/class/hwmon/hwmon0/temp3_crit", + "format": DecodeFormat.THOUSANDTH, + }, + "temperature": { + "loc": "/sys/class/hwmon/hwmon0/temp3_input", + "format": DecodeFormat.THOUSANDTH, + }, + }, + { + "name": "CPU CORE 2", + "high": { + "loc": "/sys/class/hwmon/hwmon0/temp4_max", + "format": DecodeFormat.THOUSANDTH, + }, + "low": None, + "crit_low": None, + "crit_high": { + "loc": "/sys/class/hwmon/hwmon0/temp4_crit", + "format": DecodeFormat.THOUSANDTH, + }, + "temperature": { + "loc": "/sys/class/hwmon/hwmon0/temp4_input", + "format": DecodeFormat.THOUSANDTH, + }, + }, + { + "name": "CPU CORE 3", + "high": { + "loc": "/sys/class/hwmon/hwmon0/temp5_max", + "format": DecodeFormat.THOUSANDTH, + }, + "low": None, + "crit_low": None, + "crit_high": { + "loc": "/sys/class/hwmon/hwmon0/temp5_crit", + "format": DecodeFormat.THOUSANDTH, + }, + "temperature": { + "loc": "/sys/class/hwmon/hwmon0/temp5_input", + "format": DecodeFormat.THOUSANDTH, + }, + }, + ], + "fans": [ + { + "name": "fan1", + "e2loc": {"bus": 16, "addr": 0x50, "way": "i2c", "size": "256"}, + "present": { + "loc": "/sys/bus/i2c/devices/2-000d/fan_present", + "format": DecodeFormat.ONE_BIT_HEX, + "bit": 0, + }, + "status": { + "loc": "/sys/bus/i2c/devices/2-000d/fan_status", + "format": DecodeFormat.ONE_BIT_HEX, + "bit": 0, + }, + "hw_version": { + "loc": "/sys/bus/i2c/devices/16-0050/eeprom", + "format": DecodeFormat.FRU, + "fru_key": FRU.VERSION + }, + "sn": { + "loc": "/sys/bus/i2c/devices/16-0050/eeprom", + "format": DecodeFormat.FRU, + "fru_key": FRU.SN + }, + "led": { + "loc": "/sys/bus/i2c/devices/2-000d/fan1_led", + "format": DecodeFormat.AND, + "mask": 0b1111, + }, + "led_colors": FAN_LED_COLORS, + "rotors": [ + { + "speed_getter": { + "loc": "/sys/bus/i2c/devices/2-000d/fan1_1_real_speed" + }, + "speed_setter": { + "loc": "/sys/bus/i2c/devices/2-000d/fan1_speed_set", + "format": DecodeFormat.HEX + }, + "speed_max": Threshold.FAN_SPEED_MAX, + "slope": 236.51, + "intercept": 82.571, + }, + { + "speed_getter": { + "loc": "/sys/bus/i2c/devices/2-000d/fan1_2_real_speed" + }, + "speed_setter": { + "loc": "/sys/bus/i2c/devices/2-000d/fan1_speed_set", + "format": DecodeFormat.HEX + }, + "speed_max": Threshold.FAN_SPEED_MAX, + "slope": 236.51, + "intercept": 82.571, + } + ], + "tolerance": 20, + "threshold": 30, + "target_default": 0, + }, + { + "name": "fan2", + "e2loc": {"bus": 17, "addr": 0x50, "way": "i2c", "size": "256"}, + "present": { + "loc": "/sys/bus/i2c/devices/2-000d/fan_present", + "format": DecodeFormat.ONE_BIT_HEX, + "bit": 1, + }, + "status": { + "loc": "/sys/bus/i2c/devices/2-000d/fan_status", + "format": DecodeFormat.ONE_BIT_HEX, + "bit": 1, + }, + "hw_version": { + "loc": "/sys/bus/i2c/devices/17-0050/eeprom", + "format": DecodeFormat.FRU, + "fru_key": FRU.VERSION + }, + "sn": { + "loc": "/sys/bus/i2c/devices/17-0050/eeprom", + "format": DecodeFormat.FRU, + "fru_key": FRU.SN + }, + "led": { + "loc": "/sys/bus/i2c/devices/2-000d/fan2_led", + "format": DecodeFormat.AND, + "mask": 0b1111, + }, + "led_colors": FAN_LED_COLORS, + "rotors": [ + { + "speed_getter": { + "loc": "/sys/bus/i2c/devices/2-000d/fan2_1_real_speed" + }, + "speed_setter": { + "loc": "/sys/bus/i2c/devices/2-000d/fan2_speed_set", + "format": DecodeFormat.HEX + }, + "speed_max": Threshold.FAN_SPEED_MAX, + "slope": 236.51, + "intercept": 82.571, + }, + { + "speed_getter": { + "loc": "/sys/bus/i2c/devices/2-000d/fan2_2_real_speed" + }, + "speed_setter": { + "loc": "/sys/bus/i2c/devices/2-000d/fan2_speed_set", + "format": DecodeFormat.HEX, + }, + "speed_max": Threshold.FAN_SPEED_MAX, + "slope": 236.51, + "intercept": 82.571, + } + ], + "tolerance": 20, + "threshold": 30, + "target_default": 0, + }, + { + "name": "fan3", + "e2loc": {"bus": 18, "addr": 0x50, "way": "i2c", "size": "256"}, + "present": { + "loc": "/sys/bus/i2c/devices/2-000d/fan_present", + "format": DecodeFormat.ONE_BIT_HEX, + "bit": 2, + }, + "status": { + "loc": "/sys/bus/i2c/devices/2-000d/fan_status", + "format": DecodeFormat.ONE_BIT_HEX, + "bit": 2, + }, + "hw_version": { + "loc": "/sys/bus/i2c/devices/18-0050/eeprom", + "format": DecodeFormat.FRU, + "fru_key": FRU.VERSION + }, + "sn": { + "loc": "/sys/bus/i2c/devices/18-0050/eeprom", + "format": DecodeFormat.FRU, + "fru_key": FRU.SN + }, + "led": { + "loc": "/sys/bus/i2c/devices/2-000d/fan3_led", + "format": DecodeFormat.AND, + "mask": 0b1111, + }, + "led_colors": FAN_LED_COLORS, + "rotors": [ + { + "speed_getter": { + "loc": "/sys/bus/i2c/devices/2-000d/fan3_1_real_speed" + }, + "speed_setter": { + "loc": "/sys/bus/i2c/devices/2-000d/fan3_speed_set", + "format": DecodeFormat.HEX + }, + "speed_max": Threshold.FAN_SPEED_MAX, + "slope": 236.51, + "intercept": 82.571, + }, + { + "speed_getter": { + "loc": "/sys/bus/i2c/devices/2-000d/fan3_2_real_speed" + }, + "speed_setter": { + "loc": "/sys/bus/i2c/devices/2-000d/fan3_speed_set", + "format": DecodeFormat.HEX + }, + "speed_max": Threshold.FAN_SPEED_MAX, + "slope": 236.51, + "intercept": 82.571, + } + ], + "tolerance": 20, + "threshold": 30, + "target_default": 0, + }, + { + "name": "fan4", + "e2loc": {"bus": 19, "addr": 0x50, "way": "i2c", "size": "256"}, + "present": { + "loc": "/sys/bus/i2c/devices/2-000d/fan_present", + "format": DecodeFormat.ONE_BIT_HEX, + "bit": 3, + }, + "status": { + "loc": "/sys/bus/i2c/devices/2-000d/fan_status", + "format": DecodeFormat.ONE_BIT_HEX, + "bit": 3, + }, + "hw_version": { + "loc": "/sys/bus/i2c/devices/19-0050/eeprom", + "format": DecodeFormat.FRU, + "fru_key": FRU.VERSION + }, + "sn": { + "loc": "/sys/bus/i2c/devices/19-0050/eeprom", + "format": DecodeFormat.FRU, + "fru_key": FRU.SN + }, + "led": { + "loc": "/sys/bus/i2c/devices/2-000d/fan4_led", + "format": DecodeFormat.AND, + "mask": 0b1111, + }, + "led_colors": FAN_LED_COLORS, + "rotors": [ + { + "speed_getter": { + "loc": "/sys/bus/i2c/devices/2-000d/fan4_1_real_speed" + }, + "speed_setter": { + "loc": "/sys/bus/i2c/devices/2-000d/fan4_speed_set", + "format": DecodeFormat.HEX + }, + "speed_max": Threshold.FAN_SPEED_MAX, + "slope": 236.51, + "intercept": 82.571, + }, + { + "speed_getter": { + "loc": "/sys/bus/i2c/devices/2-000d/fan4_2_real_speed" + }, + "speed_setter": { + "loc": "/sys/bus/i2c/devices/2-000d/fan4_speed_set", + "format": DecodeFormat.HEX + }, + "speed_max": Threshold.FAN_SPEED_MAX, + "slope": 236.51, + "intercept": 82.571, + } + ], + "tolerance": 20, + "threshold": 30, + "target_default": 0, + }, + { + "name": "fan5", + "e2loc": {"bus": 20, "addr": 0x50, "way": "i2c", "size": "256"}, + "present": { + "loc": "/sys/bus/i2c/devices/2-000d/fan_present", + "format": DecodeFormat.ONE_BIT_HEX, + "bit": 4, + }, + "status": { + "loc": "/sys/bus/i2c/devices/2-000d/fan_status", + "format": DecodeFormat.ONE_BIT_HEX, + "bit": 4, + }, + "hw_version": { + "loc": "/sys/bus/i2c/devices/20-0050/eeprom", + "format": DecodeFormat.FRU, + "fru_key": FRU.VERSION + }, + "sn": { + "loc": "/sys/bus/i2c/devices/20-0050/eeprom", + "format": DecodeFormat.FRU, + "fru_key": FRU.SN + }, + "led": { + "loc": "/sys/bus/i2c/devices/2-000d/fan5_led", + "format": DecodeFormat.AND, + "mask": 0b1111, + }, + "led_colors": FAN_LED_COLORS, + "rotors": [ + { + "speed_getter": { + "loc": "/sys/bus/i2c/devices/2-000d/fan5_1_real_speed" + }, + "speed_setter": { + "loc": "/sys/bus/i2c/devices/2-000d/fan5_speed_set", + "format": DecodeFormat.HEX + }, + "speed_max": Threshold.FAN_SPEED_MAX, + "slope": 236.51, + "intercept": 82.571, + }, + { + "speed_getter": { + "loc": "/sys/bus/i2c/devices/2-000d/fan5_2_real_speed" + }, + "speed_setter": { + "loc": "/sys/bus/i2c/devices/2-000d/fan5_speed_set", + "format": DecodeFormat.HEX + }, + "speed_max": Threshold.FAN_SPEED_MAX, + "slope": 236.51, + "intercept": 82.571, + } + ], + "tolerance": 20, + "threshold": 30, + "target_default": 0, + }, + ], + "psus": [ + { + "name": "psu1", + "present": { + "addr": 0x951, + "format": DecodeFormat.ONE_BIT_HEX, + "bit": 0, + "way": DecodeMethod.IO + }, + "status": { + "addr": 0x951, + "format": DecodeFormat.ONE_BIT_HEX, + "bit": 1, + "way": DecodeMethod.IO + }, + "sn": { + "loc": "/sys/bus/i2c/devices/24-0050/eeprom", + "format": DecodeFormat.FRU, + "fru_key": FRU.SN + }, + "in_current": { + "loc": "/sys/bus/i2c/devices/24-0058/hwmon/*/curr1_input", + "format": DecodeFormat.THOUSANDTH, + }, + "in_voltage": { + "loc": "/sys/bus/i2c/devices/24-0058/hwmon/*/in1_input", + "format": DecodeFormat.THOUSANDTH, + }, + "out_voltage": { + "loc": "/sys/bus/i2c/devices/24-0058/hwmon/*/in2_input", + "format": DecodeFormat.THOUSANDTH, + }, + "out_current": { + "loc": "/sys/bus/i2c/devices/24-0058/hwmon/*/curr2_input", + "format": DecodeFormat.THOUSANDTH, + }, + "temperature": { + "loc": "/sys/bus/i2c/devices/24-0058/hwmon/*/temp1_input", + "format": DecodeFormat.THOUSANDTH, + }, + "hw_version": { + "loc": "/sys/bus/i2c/devices/24-0050/eeprom", + "format": DecodeFormat.FRU, + "fru_key": FRU.VERSION + }, + # "psu_type": { + # "loc": "/sys/bus/i2c/devices/24-0050/eeprom", + # "format": DecodeFormat.FRU, + # "fru_key": FRU.SN + # }, + "fans": [ + { + "name": "psu_fan1", + "present": { + "loc": "/sys/bus/i2c/devices/24-0058/hwmon/*/fan1_fault", + }, + "status": { + "addr": 0x951, + "format": DecodeFormat.ONE_BIT_HEX, + "bit": 1, + "way": DecodeMethod.IO + }, + "rotors": [ + { + "speed_getter": { + "loc": "/sys/bus/i2c/devices/24-0058/hwmon/*/fan1_input" + }, + "speed_setter": { + "bus": 24, + "addr": 0x58, + "offset": 0x3b, + "size": 1, + "way": DecodeMethod.I2C, + "format": DecodeFormat.HEX, + }, + "speed_max": Threshold.PSU_FAN_SPEED_MAX, + } + ], + "tolerance": 20, + "threshold_low": 1900, + } + ], + "in_power": { + "loc": "/sys/bus/i2c/devices/24-0058/hwmon/*/power1_input", + "format": DecodeFormat.MILLIONTH, + }, + "out_power": { + "loc": "/sys/bus/i2c/devices/24-0058/hwmon/*/power2_input", + "format": DecodeFormat.MILLIONTH, + }, + }, + { + "name": "psu2", + "present": { + "addr": 0x951, + "format": DecodeFormat.ONE_BIT_HEX, + "bit": 4, + "way": DecodeMethod.IO + }, + "status": { + "addr": 0x951, + "format": DecodeFormat.ONE_BIT_HEX, + "bit": 5, + "way": DecodeMethod.IO + }, + "sn": { + "loc": "/sys/bus/i2c/devices/25-0050/eeprom", + "format": DecodeFormat.FRU, + "fru_key": FRU.SN + }, + "in_current": { + "loc": "/sys/bus/i2c/devices/25-0058/hwmon/*/curr1_input", + "format": DecodeFormat.THOUSANDTH, + }, + "in_voltage": { + "loc": "/sys/bus/i2c/devices/25-0058/hwmon/*/in1_input", + "format": DecodeFormat.THOUSANDTH, + }, + "out_voltage": { + "loc": "/sys/bus/i2c/devices/25-0058/hwmon/*/in2_input", + "format": DecodeFormat.THOUSANDTH, + }, + "out_current": { + "loc": "/sys/bus/i2c/devices/25-0058/hwmon/*/curr2_input", + "format": DecodeFormat.THOUSANDTH, + }, + "temperature": { + "loc": "/sys/bus/i2c/devices/25-0058/hwmon/*/temp1_input", + "format": DecodeFormat.THOUSANDTH, + }, + "hw_version": { + "loc": "/sys/bus/i2c/devices/25-0050/eeprom", + "format": DecodeFormat.FRU, + "fru_key": FRU.VERSION + }, + # "psu_type": {"loc": "/sys/bus/i2c/devices/8-0053/psu_type"}, + "fans": [ + { + "name": "psu_fan1", + "present": { + "loc": "/sys/bus/i2c/devices/25-0058/hwmon/*/fan1_fault", + }, + "status": { + "addr": 0x951, + "format": DecodeFormat.ONE_BIT_HEX, + "bit": 5, + "way": DecodeMethod.IO + }, + "rotors": [ + { + "speed_getter": { + "loc": "/sys/bus/i2c/devices/25-0058/hwmon/*/fan1_input" + }, + "speed_setter": { + "bus": 25, + "addr": 0x58, + "offset": 0x3b, + "size": 1, + "way": DecodeMethod.I2C, + "format": DecodeFormat.HEX, + }, + "speed_max": Threshold.PSU_FAN_SPEED_MAX, + } + ], + "tolerance": 20, + "threshold_low": 1900, + } + ], + "in_power": { + "loc": "/sys/bus/i2c/devices/25-0058/hwmon/*/power1_input", + "format": DecodeFormat.MILLIONTH, + }, + "out_power": { + "loc": "/sys/bus/i2c/devices/25-0058/hwmon/*/power2_input", + "format": DecodeFormat.MILLIONTH, + }, + }, + ], +} diff --git a/platform/broadcom/sonic-platform-modules-ragile/ra-b6510-32c/sonic_platform/eeprom.py b/platform/broadcom/sonic-platform-modules-ragile/ra-b6510-32c/sonic_platform/eeprom.py new file mode 100644 index 0000000000..c25d711354 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ragile/ra-b6510-32c/sonic_platform/eeprom.py @@ -0,0 +1,12 @@ +try: + from sonic_platform_pddf_base.pddf_eeprom import PddfEeprom +except ImportError as e: + raise ImportError(str(e) + "- required module not found") + + +class Eeprom(PddfEeprom): + + def __init__(self, pddf_data=None, pddf_plugin_data=None): + PddfEeprom.__init__(self, pddf_data, pddf_plugin_data) + + # Provide the functions/variables below for which implementation is to be overwritten diff --git a/platform/broadcom/sonic-platform-modules-ragile/ra-b6510-32c/sonic_platform/fan.py b/platform/broadcom/sonic-platform-modules-ragile/ra-b6510-32c/sonic_platform/fan.py new file mode 100644 index 0000000000..b3dd67ed52 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ragile/ra-b6510-32c/sonic_platform/fan.py @@ -0,0 +1,42 @@ +try: + from sonic_platform_pddf_base.pddf_fan import PddfFan +except ImportError as e: + raise ImportError(str(e) + "- required module not found") + + +class Fan(PddfFan): + """PDDF Platform-Specific Fan class""" + + def __init__(self, tray_idx, fan_idx=0, pddf_data=None, pddf_plugin_data=None, is_psu_fan=False, psu_index=0): + # idx is 0-based + PddfFan.__init__(self, tray_idx, fan_idx, pddf_data, pddf_plugin_data, is_psu_fan, psu_index) + + # Provide the functions/variables below for which implementation is to be overwritten + # Since psu_fan airflow direction cant be read from sysfs, it is fixed as 'F2B' or 'intake' + def get_direction(self): + """ + Retrieves the direction of fan + + Returns: + A string, either FAN_DIRECTION_INTAKE or FAN_DIRECTION_EXHAUST + depending on fan direction + """ + return self.FAN_DIRECTION_EXHAUST + + def get_speed_rpm(self): + if self.is_psu_fan: + return super().get_speed_rpm() + else: + divisor = 15000000 + mask_low = 0xff + ret = super().get_speed_rpm() + # revert ret + ret = (ret >> 8) + ((ret & mask_low) << 8) + return int(divisor/ret) + + def get_target_speed(self): + if self.is_psu_fan: + return None + + return super().get_target_speed() + diff --git a/platform/broadcom/sonic-platform-modules-ragile/ra-b6510-32c/sonic_platform/fan_drawer.py b/platform/broadcom/sonic-platform-modules-ragile/ra-b6510-32c/sonic_platform/fan_drawer.py new file mode 100644 index 0000000000..2f83b66df9 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ragile/ra-b6510-32c/sonic_platform/fan_drawer.py @@ -0,0 +1,69 @@ +# +# fan_drawer +# + +try: + from sonic_platform_base.fan_drawer_base import FanDrawerBase +except ImportError as e: + raise ImportError(str(e) + "- required module not found") + + +class FanDrawer(FanDrawerBase): + # Device type definition. Note, this is a constant. + DEVICE_TYPE = "fan_drawer" + + def __init__(self, index, fan_list): + FanDrawerBase.__init__(self) + + self._fan_list = fan_list + self._index = index + + def get_name(self): + """ + Retrieves the name of the device + Returns: + string: The name of the device + """ + + return "fan drawer {}".format(self._index) + + def get_num_fans(self): + """ + Retrieves the number of fans available on this fan drawer + Returns: + An integer, the number of fan modules available on this fan drawer + """ + return len(self._fan_list) + + def get_all_fans(self): + """ + Retrieves all fan modules available on this fan drawer + Returns: + A list of objects derived from FanBase representing all fan + modules available on this fan drawer + """ + return self._fan_list + + def set_status_led(self, color): + """ + Sets the state of the fan drawer status LED + Args: + color: A string representing the color with which to set the + fan drawer status LED + Returns: + bool: True if status LED state is set successfully, False if not + """ + if self.get_num_fans() > 0: + return self._fan_list[0].set_status_led(color) + return False + + def get_status_led(self): + """ + Gets the state of the fan drawer LED + Returns: + A string, one of the predefined STATUS_LED_COLOR_* strings above + """ + if self.get_num_fans() > 0: + return self._fan_list[0].get_status_led() + return "N/A" + diff --git a/platform/broadcom/sonic-platform-modules-ragile/ra-b6510-32c/sonic_platform/logger.py b/platform/broadcom/sonic-platform-modules-ragile/ra-b6510-32c/sonic_platform/logger.py new file mode 100644 index 0000000000..5969781bf9 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ragile/ra-b6510-32c/sonic_platform/logger.py @@ -0,0 +1,19 @@ +# -*- coding: utf-8 -*- + +import logging + + +def _init_logger(): + formatter = logging.Formatter( + "%(asctime)s %(levelname)s %(filename)s[%(funcName)s][%(lineno)s]: %(message)s" + ) + handler = logging.FileHandler("/var/log/syslog") + handler.setFormatter(formatter) + + logger = logging.getLogger(__name__) + logger.setLevel(logging.DEBUG) + logger.addHandler(handler) + return logger + + +logger = _init_logger() diff --git a/platform/broadcom/sonic-platform-modules-ragile/ra-b6510-32c/sonic_platform/pcie.py b/platform/broadcom/sonic-platform-modules-ragile/ra-b6510-32c/sonic_platform/pcie.py new file mode 100644 index 0000000000..5a66997d33 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ragile/ra-b6510-32c/sonic_platform/pcie.py @@ -0,0 +1,43 @@ +# +# pcie_base.py +# +# Abstract base class for implementing platform-specific +# PCIE functionality for SONiC +# + +try: + import abc + from sonic_pcie import PcieUtil +except ImportError as e: + raise ImportError (str(e) + " - required module not found") + +class PcieBase(object): + def __init__(self, path): + """ + Constructor + Args: + pcieutil file and config file path + """ + self.pcie_util = PcieUtil(path) + + + @abc.abstractmethod + def get_pcie_device(self): + """ + get current device pcie info + + Returns: + A list including pcie device info + """ + return self.pcie_util.get_pcie_device() + + + @abc.abstractmethod + def get_pcie_check(self): + """ + Check Pcie device with config file + Returns: + A list including pcie device and test result info + """ + return self.pcie_util.get_pcie_check() + diff --git a/platform/broadcom/sonic-platform-modules-ragile/ra-b6510-32c/sonic_platform/platform.py b/platform/broadcom/sonic-platform-modules-ragile/ra-b6510-32c/sonic_platform/platform.py new file mode 100644 index 0000000000..8595e80692 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ragile/ra-b6510-32c/sonic_platform/platform.py @@ -0,0 +1,23 @@ +############################################################################# +# PDDF +# Module contains an implementation of SONiC Platform Base API and +# provides the platform information +# +############################################################################# + + +try: + from sonic_platform_pddf_base.pddf_platform import PddfPlatform +except ImportError as e: + raise ImportError(str(e) + "- required module not found") + + +class Platform(PddfPlatform): + """ + PDDF Platform-Specific Platform Class + """ + + def __init__(self): + PddfPlatform.__init__(self) + + # Provide the functions/variables below for which implementation is to be overwritten diff --git a/platform/broadcom/sonic-platform-modules-ragile/ra-b6510-32c/sonic_platform/psu.py b/platform/broadcom/sonic-platform-modules-ragile/ra-b6510-32c/sonic_platform/psu.py new file mode 100644 index 0000000000..240af5d2d1 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ragile/ra-b6510-32c/sonic_platform/psu.py @@ -0,0 +1,32 @@ +try: + from sonic_platform_pddf_base.pddf_psu import PddfPsu +except ImportError as e: + raise ImportError (str(e) + "- required module not found") + + +class Psu(PddfPsu): + """PDDF Platform-Specific PSU class""" + + PLATFORM_PSU_CAPACITY = 1200 + + def __init__(self, index, pddf_data=None, pddf_plugin_data=None): + PddfPsu.__init__(self, index, pddf_data, pddf_plugin_data) + + # Provide the functions/variables below for which implementation is to be overwritten + def get_maximum_supplied_power(self): + """ + Retrieves the maximum supplied power by PSU (or PSU capacity) + Returns: + A float number, the maximum power output in Watts. + e.g. 1200.1 + """ + return float(self.PLATFORM_PSU_CAPACITY) + + def get_type(self): + """ + Gets the type of the PSU + Returns: + A string, the type of PSU (AC/DC) + """ + return "DC" + diff --git a/platform/broadcom/sonic-platform-modules-ragile/ra-b6510-32c/sonic_platform/regutil.py b/platform/broadcom/sonic-platform-modules-ragile/ra-b6510-32c/sonic_platform/regutil.py new file mode 100644 index 0000000000..bff2bd41ea --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ragile/ra-b6510-32c/sonic_platform/regutil.py @@ -0,0 +1,245 @@ +# -*- coding: utf-8 -*- +from glob import glob +from plat_hal.osutil import osutil + +try: + from sonic_platform.config import DecodeFormat, DecodeMethod + + DECODE_FORMAT = DecodeFormat + DECODE_METHOD = DecodeMethod +except ImportError: + raise ImportError(str(e) + "- required module not found") + +ERR_CODE = "ERR" + + +class Reg(object): + """ + "e2loc": {"bus": 3, "addr": 0x53, "way": "i2c"} + "value": { + "loc": "/sys/bus/i2c/devices/2-0048/hwmon/hwmon*/temp1_input", + "way": "sysfs", + + "InputsStatus": { + "bus": 8, + "addr": 0x5B, + "offset": 0x79, + "way": "i2cword", + "mask": 0x0200, + }, + """ + + def __new__(cls, *args): + if args[0] is None or not isinstance(args[0], dict): + return None + return super(Reg, cls).__new__(cls) + + def __init__(self, data): + + self.loc = None + self.way = DECODE_METHOD.SYSFS + self.addr = None + self.bus = None + self.offset = None + self.size = 1 + self.bit = None + self.mask = None + self.digit = None + self.sdk_type = None + self.sep = None + self.format = DECODE_FORMAT.TEXT + self.__dict__.update(data) + + def _read_reg_val(self): + ret = None + try: + if self.way == DECODE_METHOD.SYSFS: + ret = self.get_sysfs() + elif self.way == DECODE_METHOD.I2C: + ret = self.get_i2c() + elif self.way == DECODE_METHOD.I2C_WORD: + ret = self.get_i2cword() + elif self.way == DECODE_METHOD.DEVMEM: + ret = self.get_devmem() + elif self.way == DECODE_METHOD.SDK: + # TODO + pass + else: + pass + except Exception as e: + raise e + + return ret + + def _write_reg_val(self, val): + try: + if self.way == DECODE_METHOD.SYSFS: + return self._write_sysfs(val) + except Exception as e: + raise e + + return False + + def _write_sysfs(self, val): + try: + with open(glob(self.loc)[0], "w") as f: + f.write(val) + f.flush() + return True + except Exception as e: + raise e + + def _format_val(self, val): + try: + if isinstance(val, str): + val = val.strip() + if self.format == DECODE_FORMAT.THOUSANDTH: + return float("%.1f" % (float(val) / 1000)) + elif self.format == DECODE_FORMAT.HUNDREDTH: + return float("%.1f" % (float(val) / 100)) + elif self.format == DECODE_FORMAT.ONE_BIT_HEX: + return (int(val, 16) & (1 << self.bit)) >> self.bit + elif self.format == DECODE_FORMAT.DECIMAL: + return int(val, 10) + elif self.format == DECODE_FORMAT.MILLIONTH: + return float("%.1f" % (float(val) / 1000 / 1000)) + elif self.format == DECODE_FORMAT.AND: + return (int(val, 16)) & self.mask + elif isinstance(val, list): + if self.format == DECODE_FORMAT.JOIN: + return self.sep.join(val) + except Exception as e: + raise e + else: + return val + + def decode(self): + """ + get value by config way + way i2c/sysfs/lpc + """ + if self.way is None: + raise ValueError("cannot found way to deal") + + ret = self._read_reg_val() + + ret = self._format_val(ret) + return ret + + def encode(self, val): + if self.way is None: + raise ValueError("cannot found way to deal") + + return self._write_reg_val(val) + + def get_sdk(self): + # TODO + pass + + def get_sysfs(self): + if self.loc is None: + raise ValueError("Not Enough Attr: loc: {}".format(self.loc)) + + ret, val = osutil.readsysfs(self.loc) + + if not ret: + raise IOError(val) + + return val + + def get_devmem(self): + if self.addr is None or self.digit is None or self.mask is None: + raise ValueError( + "Not Enough Attr: addr: {}, digit: {}, mask: {}".format( + self.addr, self.digit, self.mask + ) + ) + + ret, val = osutil.getdevmem(self.addr, self.digit, self.mask) + + if not ret: + raise IOError(val) + + return val + + def get_i2cword(self): + if self.bus is None or self.addr is None or self.offset is None: + raise ValueError( + "Not Enough Attr: bus: {}, addr: {}, offset: {}".format( + self.bus, self.addr, self.offset + ) + ) + + ret, val = osutil.geti2cword(self.bus, self.addr, self.offset) + + if not ret: + raise IOError(val) + + return val + + def get_i2c(self): + if ( + self.bus is None + or self.addr is None + or self.offset is None + or self.size is None + ): + raise ValueError( + "Not Enough Attr: bus: {}, addr: {}, offset: {}".format( + self.bus, self.addr, self.offset + ) + ) + + value = [] + for i in range(self.size): + ofs = self.offset + i + ret, val = osutil.rji2cget(self.bus, self.addr, ofs) + + if not ret: + raise IOError(val) + else: + value.append(repr(chr(val)).translate(None, r"\\x").replace("'", "")) + + return value + + def set_i2cword(self, bus, addr, offset, byte): + return self.seti2cword(bus, addr, offset, byte) + + def seti2cword(self, bus, addr, offset, byte): + return osutil.seti2cword(bus, addr, offset, byte) + + def set_i2c(self, bus, addr, offset, byte): + return self.seti2c(bus, addr, offset, byte) + + def seti2c(self, bus, addr, offset, byte): + ret, val = osutil.rji2cset(bus, addr, offset, byte) + return ret, val + + def getbcmtemp(self): + try: + sta, ret = osutil.getmactemp() + if sta == True: + mac_aver = float(ret.get("average", self.__error_ret)) + #mac_max = float(ret.get("maximum", self.__error_ret)) + mac_aver = mac_aver * 1000 + #mac_max = mac_max * 1000 + else: + return False, ret + except AttributeError as e: + return False, str(e) + return True, mac_aver + + def getbcmreg(self, reg): + ret, val = osutil.getsdkreg(reg) + return ret, val + + def logger_debug(self, msg): + baseutil.logger_debug(msg) + + def command(self, cmd): + ret, output = osutil.command(cmd) + return ret, output + + def set_val(self, val): + # TODO + pass diff --git a/platform/broadcom/sonic-platform-modules-ragile/ra-b6510-32c/sonic_platform/rotor.py b/platform/broadcom/sonic-platform-modules-ragile/ra-b6510-32c/sonic_platform/rotor.py new file mode 100644 index 0000000000..3e5bcc5b9b --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ragile/ra-b6510-32c/sonic_platform/rotor.py @@ -0,0 +1,41 @@ +# -*- coding: utf-8 -*- + +try: + from sonic_platform.regutil import Reg + from sonic_platform.logger import logger +except ImportError: + raise ImportError(str(e) + "- required module not found") + +class Rotor: + def __init__(self, config): + if config is not None and isinstance(config, dict): + self.__reg_speed_getter = Reg(config.get("speed_getter")) + self.__reg_speed_setter = Reg(config.get("speed_setter")) + self.__speed_max = config.get("speed_max") + else: + raise ValueError("init rotor Error: {}".format(config)) + + def get_speed(self): + try: + return int(self.__reg_speed_getter.decode()) + except Exception as e: + logger.error(str(e)) + + return 0 + + def set_speed(self, speed): + try: + return self.__reg_speed_setter.encode(speed) + except Exception as e: + logger.error(str(e)) + + return False + + def get_speed_percentage(self): + try: + speed = self.get_speed() + return (100 * speed) / self.__speed_max + except Exception as e: + logger.error(str(e)) + + return 0 diff --git a/platform/broadcom/sonic-platform-modules-ragile/ra-b6510-32c/sonic_platform/sfp.py b/platform/broadcom/sonic-platform-modules-ragile/ra-b6510-32c/sonic_platform/sfp.py new file mode 100644 index 0000000000..ea8e256fe6 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ragile/ra-b6510-32c/sonic_platform/sfp.py @@ -0,0 +1,287 @@ +#!/usr/bin/env python + +try: + #from sonic_platform_pddf_base.pddf_sfp import * + from sonic_platform_base.sonic_sfp.sff8436 import sff8436InterfaceId + from sonic_platform_base.sonic_sfp.sff8436 import sff8436Dom + from sonic_platform_base.sonic_sfp.sff8472 import sff8472InterfaceId + from sonic_platform_base.sonic_sfp.sff8472 import sff8472Dom + from sonic_platform_pddf_base.pddf_sfp import PddfSfp + from sonic_platform_pddf_base.pddf_sfp import SFP_VOLT_OFFSET + from sonic_platform_pddf_base.pddf_sfp import SFP_VOLT_WIDTH + from sonic_platform_pddf_base.pddf_sfp import SFP_CHANNL_MON_OFFSET + from sonic_platform_pddf_base.pddf_sfp import SFP_CHANNL_MON_WIDTH + from sonic_platform_pddf_base.pddf_sfp import SFP_TEMPE_OFFSET + from sonic_platform_pddf_base.pddf_sfp import SFP_TEMPE_WIDTH + from sonic_platform_pddf_base.pddf_sfp import QSFP_DOM_REV_OFFSET + from sonic_platform_pddf_base.pddf_sfp import QSFP_DOM_REV_WIDTH + from sonic_platform_pddf_base.pddf_sfp import QSFP_CHANNL_MON_OFFSET + from sonic_platform_pddf_base.pddf_sfp import QSFP_CHANNL_MON_WITH_TX_POWER_WIDTH +except ImportError as e: + raise ImportError (str(e) + "- required module not found") + +XCVR_DOM_CAPABILITY_OFFSET = 92 +XCVR_DOM_CAPABILITY_WIDTH = 2 +QSFP_VERSION_COMPLIANCE_OFFSET = 1 +QSFP_VERSION_COMPLIANCE_WIDTH = 2 +QSFP_OPTION_VALUE_OFFSET = 192 +QSFP_OPTION_VALUE_WIDTH = 4 + +class Sfp(PddfSfp): + """ + PDDF Platform-Specific Sfp class + """ + + def __init__(self, index, pddf_data=None, pddf_plugin_data=None): + PddfSfp.__init__(self, index, pddf_data, pddf_plugin_data) + self.dom_supported = False + self.__dom_capability_detect() + + def __dom_capability_detect(self): + self.dom_supported = False + self.dom_temp_supported = False + self.dom_volt_supported = False + self.dom_rx_power_supported = False + self.dom_tx_power_supported = False + self.qsfp_page3_available = False + self.calibration = 0 + if not self.get_presence(): + return + + if self.is_osfp_port: + # Not implement + return + elif self.is_qsfp_port: + self.calibration = 1 + sfpi_obj = sff8436InterfaceId() + if sfpi_obj is None: + self.dom_supported = False + offset = 128 + + # QSFP capability byte parse, through this byte can know whether it support tx_power or not. + # TODO: in the future when decided to migrate to support SFF-8636 instead of SFF-8436, + # need to add more code for determining the capability and version compliance + # in SFF-8636 dom capability definitions evolving with the versions. + qsfp_dom_capability_raw = self.__read_eeprom_specific_bytes( + (offset + XCVR_DOM_CAPABILITY_OFFSET), XCVR_DOM_CAPABILITY_WIDTH) + if qsfp_dom_capability_raw is not None: + qsfp_version_compliance_raw = self.__read_eeprom_specific_bytes( + QSFP_VERSION_COMPLIANCE_OFFSET, QSFP_VERSION_COMPLIANCE_WIDTH) + qsfp_version_compliance = int( + qsfp_version_compliance_raw[0], 16) + dom_capability = sfpi_obj.parse_dom_capability( + qsfp_dom_capability_raw, 0) + if qsfp_version_compliance >= 0x08: + self.dom_temp_supported = dom_capability['data']['Temp_support']['value'] == 'On' + self.dom_volt_supported = dom_capability['data']['Voltage_support']['value'] == 'On' + self.dom_rx_power_supported = dom_capability['data']['Rx_power_support']['value'] == 'On' + self.dom_tx_power_supported = dom_capability['data']['Tx_power_support']['value'] == 'On' + else: + self.dom_temp_supported = True + self.dom_volt_supported = True + self.dom_rx_power_supported = dom_capability['data']['Rx_power_support']['value'] == 'On' + self.dom_tx_power_supported = True + + self.dom_supported = True + self.calibration = 1 + sfpd_obj = sff8436Dom() + if sfpd_obj is None: + return None + qsfp_option_value_raw = self.__read_eeprom_specific_bytes( + QSFP_OPTION_VALUE_OFFSET, QSFP_OPTION_VALUE_WIDTH) + if qsfp_option_value_raw is not None: + optional_capability = sfpd_obj.parse_option_params( + qsfp_option_value_raw, 0) + self.dom_tx_disable_supported = optional_capability[ + 'data']['TxDisable']['value'] == 'On' + dom_status_indicator = sfpd_obj.parse_dom_status_indicator( + qsfp_version_compliance_raw, 1) + self.qsfp_page3_available = dom_status_indicator['data']['FlatMem']['value'] == 'Off' + else: + self.dom_supported = False + self.dom_temp_supported = False + self.dom_volt_supported = False + self.dom_rx_power_supported = False + self.dom_tx_power_supported = False + self.calibration = 0 + self.qsfp_page3_available = False + else: + sfpi_obj = sff8472InterfaceId() + if sfpi_obj is None: + return None + sfp_dom_capability_raw = self.__read_eeprom_specific_bytes( + XCVR_DOM_CAPABILITY_OFFSET, XCVR_DOM_CAPABILITY_WIDTH) + if sfp_dom_capability_raw is not None: + sfp_dom_capability = int(sfp_dom_capability_raw[0], 16) + self.dom_supported = (sfp_dom_capability & 0x40 != 0) + if self.dom_supported: + self.dom_temp_supported = True + self.dom_volt_supported = True + self.dom_rx_power_supported = True + self.dom_tx_power_supported = True + if sfp_dom_capability & 0x20 != 0: + self.calibration = 1 + elif sfp_dom_capability & 0x10 != 0: + self.calibration = 2 + else: + self.calibration = 0 + else: + self.dom_temp_supported = False + self.dom_volt_supported = False + self.dom_rx_power_supported = False + self.dom_tx_power_supported = False + self.calibration = 0 + self.dom_tx_disable_supported = ( + int(sfp_dom_capability_raw[1], 16) & 0x40 != 0) + + # Provide the functions/variables below for which implementation is to be overwritten + + def __read_eeprom_specific_bytes(self, offset, num_bytes): + eeprom_raw = [] + if not self.get_presence(): + return None + for i in range(0, num_bytes): + eeprom_raw.append("0x00") + + try: + with open(self.eeprom_path, mode="rb", buffering=0) as eeprom: + eeprom.seek(offset) + raw = eeprom.read(num_bytes) + except Exception as e: + print("Error: Unable to open eeprom_path: %s" % (str(e))) + return None + + try: + if len(raw) == 0: + return None + for n in range(0, num_bytes): + eeprom_raw[n] = hex(raw[n])[2:].zfill(2) + except Exception as e: + print("Error: Exception info: %s" % (str(e))) + return None + + return eeprom_raw + + def get_transceiver_bulk_status(self): + # check present status + if not self.get_presence(): + return None + self.__dom_capability_detect() + + xcvr_dom_info_dict = dict.fromkeys(self.dom_dict_keys, 'N/A') + + if self.is_osfp_port: + # Below part is added to avoid fail xcvrd, shall be implemented later + pass + elif self.is_qsfp_port: + # QSFPs + xcvr_dom_info_dict = super(Sfp, self).get_transceiver_bulk_status() + + # pddf_sfp "qsfp_tx_power_support != 'on'" is wrong + + offset = 0 + sfpd_obj = sff8436Dom() + if sfpd_obj is None: + return None + + qsfp_dom_rev_raw = self.__read_eeprom_specific_bytes((offset + QSFP_DOM_REV_OFFSET), QSFP_DOM_REV_WIDTH) + if qsfp_dom_rev_raw is not None: + qsfp_dom_rev_data = sfpd_obj.parse_sfp_dom_rev(qsfp_dom_rev_raw, 0) + else: + return None + + dom_channel_monitor_data = {} + qsfp_dom_rev = qsfp_dom_rev_data['data']['dom_rev']['value'] + + if (qsfp_dom_rev[0:8] == 'SFF-8636' and self.dom_tx_power_supported is True): + dom_channel_monitor_raw = self.__read_eeprom_specific_bytes( + (offset + QSFP_CHANNL_MON_OFFSET), QSFP_CHANNL_MON_WITH_TX_POWER_WIDTH) + if dom_channel_monitor_raw is not None: + dom_channel_monitor_data = sfpd_obj.parse_channel_monitor_params_with_tx_power( + dom_channel_monitor_raw, 0) + else: + return None + + xcvr_dom_info_dict['tx1power'] = dom_channel_monitor_data['data']['TX1Power']['value'] + xcvr_dom_info_dict['tx2power'] = dom_channel_monitor_data['data']['TX2Power']['value'] + xcvr_dom_info_dict['tx3power'] = dom_channel_monitor_data['data']['TX3Power']['value'] + xcvr_dom_info_dict['tx4power'] = dom_channel_monitor_data['data']['TX4Power']['value'] + else: + # SFPs + offset = 256 + if not self.dom_supported: + return xcvr_dom_info_dict + + sfpd_obj = sff8472Dom() + if sfpd_obj is None: + return None + + sfpd_obj._calibration_type = self.calibration + + dom_temperature_raw = self.__read_eeprom_specific_bytes((offset + SFP_TEMPE_OFFSET), SFP_TEMPE_WIDTH) + if dom_temperature_raw is not None: + dom_temperature_data = sfpd_obj.parse_temperature(dom_temperature_raw, 0) + else: + return None + + dom_voltage_raw = self.__read_eeprom_specific_bytes((offset + SFP_VOLT_OFFSET), SFP_VOLT_WIDTH) + if dom_voltage_raw is not None: + dom_voltage_data = sfpd_obj.parse_voltage(dom_voltage_raw, 0) + else: + return None + + dom_channel_monitor_raw = self.__read_eeprom_specific_bytes( + (offset + SFP_CHANNL_MON_OFFSET), SFP_CHANNL_MON_WIDTH) + if dom_channel_monitor_raw is not None: + dom_channel_monitor_data = sfpd_obj.parse_channel_monitor_params(dom_channel_monitor_raw, 0) + else: + return None + + xcvr_dom_info_dict['temperature'] = dom_temperature_data['data']['Temperature']['value'] + xcvr_dom_info_dict['voltage'] = dom_voltage_data['data']['Vcc']['value'] + xcvr_dom_info_dict['rx1power'] = dom_channel_monitor_data['data']['RXPower']['value'] + xcvr_dom_info_dict['rx2power'] = 'N/A' + xcvr_dom_info_dict['rx3power'] = 'N/A' + xcvr_dom_info_dict['rx4power'] = 'N/A' + xcvr_dom_info_dict['tx1bias'] = dom_channel_monitor_data['data']['TXBias']['value'] + xcvr_dom_info_dict['tx2bias'] = 'N/A' + xcvr_dom_info_dict['tx3bias'] = 'N/A' + xcvr_dom_info_dict['tx4bias'] = 'N/A' + xcvr_dom_info_dict['tx1power'] = dom_channel_monitor_data['data']['TXPower']['value'] + xcvr_dom_info_dict['tx2power'] = 'N/A' + xcvr_dom_info_dict['tx3power'] = 'N/A' + xcvr_dom_info_dict['tx4power'] = 'N/A' + + xcvr_dom_info_dict['rx_los'] = self.get_rx_los() + xcvr_dom_info_dict['tx_fault'] = self.get_tx_fault() + xcvr_dom_info_dict['reset_status'] = self.get_reset_status() + xcvr_dom_info_dict['lp_mode'] = self.get_lpmode() + + return xcvr_dom_info_dict + + def get_transceiver_threshold_info(self): + # check present status + if not self.get_presence(): + return None + self.__dom_capability_detect() + + xcvr_dom_threshold_info_dict = dict.fromkeys(self.threshold_dict_keys, 'N/A') + + if self.is_osfp_port: + # Below part is added to avoid fail xcvrd, shall be implemented later + pass + elif self.is_qsfp_port: + # QSFPs + if not self.dom_supported or not self.qsfp_page3_available: + return xcvr_dom_threshold_info_dict + + return super(Sfp, self).get_transceiver_threshold_info() + + else: + # SFPs + if not self.dom_supported: + return xcvr_dom_threshold_info_dict + + return super(Sfp, self).get_transceiver_threshold_info() + + return xcvr_dom_threshold_info_dict diff --git a/platform/broadcom/sonic-platform-modules-ragile/ra-b6510-32c/sonic_platform/thermal.py b/platform/broadcom/sonic-platform-modules-ragile/ra-b6510-32c/sonic_platform/thermal.py new file mode 100644 index 0000000000..99b743c6d3 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ragile/ra-b6510-32c/sonic_platform/thermal.py @@ -0,0 +1,14 @@ +try: + from sonic_platform_pddf_base.pddf_thermal import PddfThermal +except ImportError as e: + raise ImportError(str(e) + "- required module not found") + + + +class Thermal(PddfThermal): + """PDDF Platform-Specific Thermal class""" + + def __init__(self, index, pddf_data=None, pddf_plugin_data=None): + PddfThermal.__init__(self, index, pddf_data, pddf_plugin_data) + + # Provide the functions/variables below for which implementation is to be overwritten diff --git a/platform/broadcom/sonic-platform-modules-ragile/ra-b6510-32c/sonic_platform/watchdog.py b/platform/broadcom/sonic-platform-modules-ragile/ra-b6510-32c/sonic_platform/watchdog.py new file mode 100644 index 0000000000..37788c2c82 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ragile/ra-b6510-32c/sonic_platform/watchdog.py @@ -0,0 +1,21 @@ +############################################################################# +# +# Module contains an implementation of platform specific watchdog API's +# +############################################################################# + +try: + from sonic_platform_pddf_base.pddf_watchdog import PddfWatchdog +except ImportError as e: + raise ImportError(str(e) + "- required module not found") + +class Watchdog(PddfWatchdog): + """ + PDDF Platform-specific Chassis class + """ + + def __init__(self): + PddfWatchdog.__init__(self) + self.timeout= 180 + + # Provide the functions/variables below for which implementation is to be overwritten diff --git a/platform/broadcom/sonic-platform-modules-ragile/ra-b6510-32c/systemd/pddf-platform-init.service b/platform/broadcom/sonic-platform-modules-ragile/ra-b6510-32c/systemd/pddf-platform-init.service new file mode 120000 index 0000000000..0fd9f25b6c --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ragile/ra-b6510-32c/systemd/pddf-platform-init.service @@ -0,0 +1 @@ +../../../../pddf/i2c/service/pddf-platform-init.service \ No newline at end of file diff --git a/platform/broadcom/sonic-platform-modules-ragile/ra-b6920-4s/LICENSE b/platform/broadcom/sonic-platform-modules-ragile/ra-b6920-4s/LICENSE new file mode 100755 index 0000000000..d37122689f --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ragile/ra-b6920-4s/LICENSE @@ -0,0 +1,15 @@ +Copyright (C) 2016 Microsoft, Inc +Copyright (C) 2018 Ragile Network Corporation +This program is free software; you can redistribute it and/or +modify it under the terms of the GNU General Public License +as published by the Free Software Foundation; either version 2 +of the License, or (at your option) any later version. + +This program is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with this program; if not, write to the Free Software +Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA. diff --git a/platform/broadcom/sonic-platform-modules-ragile/ra-b6920-4s/MAINTAINERS b/platform/broadcom/sonic-platform-modules-ragile/ra-b6920-4s/MAINTAINERS new file mode 100755 index 0000000000..ec82224050 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ragile/ra-b6920-4s/MAINTAINERS @@ -0,0 +1,5 @@ +# See the SONiC project governance document for more information + +Name = "support" +Email = "support@ragile.com" +Mailinglist = sonicproject@googlegroups.com diff --git a/platform/broadcom/sonic-platform-modules-ragile/ra-b6920-4s/Makefile b/platform/broadcom/sonic-platform-modules-ragile/ra-b6920-4s/Makefile new file mode 100755 index 0000000000..46415e74ab --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ragile/ra-b6920-4s/Makefile @@ -0,0 +1,26 @@ +PWD = $(shell pwd) +DIR_KERNEL_SRC = $(PWD)/modules/driver +EXTRA_CFLAGS:= -I$(M)/include +EXTRA_CFLAGS+= -Wall +SUB_BUILD_DIR = $(PWD)/build +INSTALL_DIR = $(SUB_BUILD_DIR)/$(KERNEL_SRC)/$(INSTALL_MOD_DIR) +INSTALL_SCRIPT_DIR = $(SUB_BUILD_DIR)/usr/local/bin +INSTALL_SERVICE_DIR = $(SUB_BUILD_DIR)/lib/systemd/system/ + +KBUILD_EXTRA_SYMBOLS += $(DIR_KERNEL_SRC)/Module.symvers +export KBUILD_EXTRA_SYMBOLS + +all: + $(MAKE) -C $(KBUILD_OUTPUT) M=$(DIR_KERNEL_SRC) modules + @if [ ! -d ${INSTALL_DIR} ]; then mkdir -p ${INSTALL_DIR} ;fi + cp -r $(DIR_KERNEL_SRC)/*.ko $(INSTALL_DIR) + @if [ ! -d ${INSTALL_SCRIPT_DIR} ]; then mkdir -p ${INSTALL_SCRIPT_DIR} ;fi + cp -r $(PWD)/config/* $(INSTALL_SCRIPT_DIR) + @if [ ! -d ${INSTALL_SERVICE_DIR} ]; then mkdir -p ${INSTALL_SERVICE_DIR} ;fi + cp $(PWD)/systemd/*.service $(INSTALL_SERVICE_DIR) +clean: + rm -f ${DIR_KERNEL_SRC}/*.o ${DIR_KERNEL_SRC}/*.ko ${DIR_KERNEL_SRC}/*.mod.c ${DIR_KERNEL_SRC}/.*.cmd + rm -f ${DIR_KERNEL_SRC}/Module.markers ${DIR_KERNEL_SRC}/Module.symvers ${DIR_KERNEL_SRC}/modules.order + rm -rf ${DIR_KERNEL_SRC}/.tmp_versions + rm -rf $(SUB_BUILD_DIR) + diff --git a/platform/broadcom/sonic-platform-modules-ragile/ra-b6920-4s/README.md b/platform/broadcom/sonic-platform-modules-ragile/ra-b6920-4s/README.md new file mode 100755 index 0000000000..787636c4ad --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ragile/ra-b6920-4s/README.md @@ -0,0 +1 @@ +Device drivers for support of ragile platform for the SONiC project diff --git a/platform/broadcom/sonic-platform-modules-ragile/ra-b6920-4s/config/x86_64_ragile_ra_b6920_4s_r0_config.py b/platform/broadcom/sonic-platform-modules-ragile/ra-b6920-4s/config/x86_64_ragile_ra_b6920_4s_r0_config.py new file mode 100755 index 0000000000..51cb6992a0 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ragile/ra-b6920-4s/config/x86_64_ragile_ra_b6920_4s_r0_config.py @@ -0,0 +1,625 @@ +#!/usr/bin/python +# -*- coding: UTF-8 -*- +from ragilecommon import * +PCA9548START = -1 +PCA9548BUSEND = -2 + +RAGILE_CARDID = 0x0000404d +RAGILE_PRODUCTNAME = "RA-B6920-4S" + +STARTMODULE = { + "fancontrol": 1, + "avscontrol": 1, + "sfptempmodule": 0, + "sfptempmodule_interval": 3, + "slot_monitor": 1, + "dev_monitor": 1, +} + + +DEV_MONITOR_PARAM = { + "polling_time": 5, + "psus": [ + { + "name": "psu1", + "present": {"gettype": "io", "io_addr": 0xB27, "presentbit": 0, "okval": 0}, + "device": [ + { + "id": "psu1pmbus", + "name": "fsp1200", + "bus": 23, + "loc": 0x58, + "attr": "hwmon", + }, + ], + }, + { + "name": "psu2", + "present": {"gettype": "io", "io_addr": 0xB28, "presentbit": 0, "okval": 0}, + "device": [ + { + "id": "psu2pmbus", + "name": "fsp1200", + "bus": 25, + "loc": 0x58, + "attr": "hwmon", + }, + ], + }, + { + "name": "psu3", + "present": {"gettype": "io", "io_addr": 0xB29, "presentbit": 0, "okval": 0}, + "device": [ + { + "id": "psu3pmbus", + "name": "fsp1200", + "bus": 24, + "loc": 0x58, + "attr": "hwmon", + }, + ], + }, + { + "name": "psu4", + "present": {"gettype": "io", "io_addr": 0xB2A, "presentbit": 0, "okval": 0}, + "device": [ + { + "id": "psu4pmbus", + "name": "fsp1200", + "bus": 26, + "loc": 0x58, + "attr": "hwmon", + }, + ], + }, + ], + "fans": [ + { + "name": "fan1", + "present": { + "gettype": "i2c", + "bus": 14, + "loc": 0x0d, + "offset": 0x30, + "presentbit": 0, + "okval": 0 + }, + "device": [ + { + "id": "fan1frue2", + "name": "24c02", + "bus": 63, + "loc": 0x50, + "attr": "eeprom" + }, + ], + }, + { + "name": "fan2", + "present": { + "gettype": "i2c", + "bus": 13, + "loc": 0x0d, + "offset": 0x30, + "presentbit": 0, + "okval": 0 + }, + "device": [ + { + "id": "fan2frue2", + "name": "24c02", + "bus": 55, + "loc": 0x50, + "attr": "eeprom" + }, + ], + }, + { + "name": "fan3", + "present": { + "gettype": "i2c", + "bus": 14, + "loc": 0x0d, + "offset": 0x30, + "presentbit": 1, + "okval": 0 + }, + "device": [ + { + "id": "fan3frue2", + "name": "24c02", + "bus": 64, + "loc": 0x50, + "attr": "eeprom" + }, + ], + }, + { + "name": "fan4", + "present": { + "gettype": "i2c", + "bus": 13, + "loc": 0x0d, + "offset": 0x30, + "presentbit": 1, + "okval": 0 + }, + "device": [ + { + "id": "fan4frue2", + "name": "24c02", + "bus": 56, + "loc": 0x50, + "attr": "eeprom" + }, + ], + }, + { + "name": "fan5", + "present": { + "gettype": "i2c", + "bus": 14, + "loc": 0x0d, + "offset": 0x30, + "presentbit": 2, + "okval": 0 + }, + "device": [ + { + "id": "fan5frue2", + "name": "24c02", + "bus": 65, + "loc": 0x50, + "attr": "eeprom" + }, + ], + }, + { + "name": "fan6", + "present": { + "gettype": "i2c", + "bus": 13, + "loc": 0x0d, + "offset": 0x30, + "presentbit": 2, + "okval": 0 + }, + "device": [ + { + "id": "fan6frue2", + "name": "24c02", + "bus": 57, + "loc": 0x50, + "attr": "eeprom" + }, + ], + }, + ] +} + + +FRULISTS = { + "fans":[ + {"name":"fan1","bus":63,"loc":0x50, }, + {"name":"fan2","bus":55,"loc":0x50, }, + {"name":"fan3","bus":64,"loc":0x50, }, + {"name":"fan4","bus":56,"loc":0x50, }, + {"name":"fan5","bus":65,"loc":0x50, }, + {"name":"fan6","bus":57,"loc":0x50, } + ] , + "psus": [ + {"name":"psu1","bus":23,"loc":0x50}, + {"name":"psu2","bus":25,"loc":0x50 }, + {"name":"psu2","bus":24,"loc":0x50 }, + {"name":"psu2","bus":26,"loc":0x50 } + ] +} + +# INIT_PARAM = [ +# {"loc":"3-0030/sfp_led_reset","value": "ff"}, +# {"loc":"3-0031/sfp_led_reset","value": "ff"}, +# {"loc":"4-0030/sfp_led_reset","value": "ff"}, +# {"loc":"4-0031/sfp_led_reset","value": "ff"}, +# {"loc":"5-0030/sfp_led_reset","value": "ff"}, +# {"loc":"5-0031/sfp_led_reset","value": "ff"}, +# {"loc":"6-0030/sfp_led_reset","value": "ff"}, +# {"loc":"6-0031/sfp_led_reset","value": "ff"}, +# ] +# INIT_COMMAND = [ +# "grtd_test.py io wr 0xb19 0xff", +# ] + +INIT_PARAM = [ + { + "name": "sfp_led_reset1", + "bus": 3, + "devaddr": 0x30, + "offset": 0xa0, + "val": 0xff, + }, + { + "name": "sfp_led_reset2", + "bus": 3, + "devaddr": 0x31, + "offset": 0xa0, + "val": 0xff, + }, + { + "name": "sfp_led_reset3", + "bus": 4, + "devaddr": 0x30, + "offset": 0xa0, + "val": 0xff, + }, + { + "name": "sfp_led_reset4", + "bus": 4, + "devaddr": 0x31, + "offset": 0xa0, + "val": 0xff, + }, + { + "name": "sfp_led_reset5", + "bus": 5, + "devaddr": 0x30, + "offset": 0xa0, + "val": 0xff, + }, + { + "name": "sfp_led_reset6", + "bus": 5, + "devaddr": 0x31, + "offset": 0xa0, + "val": 0xff, + }, + { + "name": "sfp_led_reset7", + "bus": 6, + "devaddr": 0x30, + "offset": 0xa0, + "val": 0xff, + }, + { + "name": "sfp_led_reset8", + "bus": 6, + "devaddr": 0x31, + "offset": 0xa0, + "val": 0xff, + }, + { + "name": "mac_power_on", + "type": "io", + "offset": 0xb19, + "val": 0xff + } +] +#rg_eeprom = "0-0054/eeprom" +E2_LOC = {"bus":1, "devno":0x56} +E2_PROTECT = {"io_addr":0xb45, "gettype":"io", "open":0, "close":1} + +CPLDVERSIONS = [ + {"bus":13, "devno":0x0d, "name":"FAN_CPLD_B"}, + {"bus":14, "devno":0x0d, "name":"FAN_CPLD_A"}, + {"bus":3, "devno":0x30, "name":"LC1_CPLD_1"}, + {"bus":3, "devno":0x31, "name":"LC1_CPLD_2"}, + {"bus":4, "devno":0x30, "name":"LC2_CPLD_1"}, + {"bus":4, "devno":0x31, "name":"LC2_CPLD_2"}, + {"bus":5, "devno":0x30, "name":"LC3_CPLD_1"}, + {"bus":5, "devno":0x31, "name":"LC3_CPLD_2"}, + {"bus":6, "devno":0x30, "name":"LC4_CPLD_1"}, + {"bus":6, "devno":0x31, "name":"LC4_CPLD_2"}, + {"io_addr":0x700, "name":"X86_CPLD", "gettype":"io"}, + {"io_addr":0x900, "name":"MAC_CPLD_B", "gettype":"io"}, + {"io_addr":0xb00, "name":"MAC_CPLD_A", "gettype":"io"}, +] + +DRIVERLISTS = [] + + +TEMPIDCHANGE = { + "lm75in": "inlet", + "lm75out": "outlet", + "lm75hot": "hot-point", + "slot1lm75a1": "LINE CARD1 lm751", + "slot1lm75a2": "LINE CARD1 lm752", + "slot1lm75a3": "LINE CARD1 lm753", + "slot2lm75a1": "LINE CARD2 lm751", + "slot2lm75a2": "LINE CARD2 lm752", + "slot2lm75a3": "LINE CARD2 lm753", + "slot3lm75a1": "LINE CARD3 lm751", + "slot3lm75a2": "LINE CARD3 lm752", + "slot3lm75a3": "LINE CARD3 lm753", + "slot4lm75a1": "LINE CARD4 lm751", + "slot4lm75a2": "LINE CARD4 lm752", + "slot4lm75a3": "LINE CARD4 lm753", + "inlet": "lm75in", + "outlet": "lm75out", + "hot-point": "lm75hot", +} + +DEVICE = [] + + +fanlevel = { + "tips":["LOW","MIDDLE","HIGH"], + "level":[51,128,255], + "low_speed":[1500,4500,9500], + "high_speed":[3000,7000,14000] +} + +fanloc =[ {"name":"FAN1", "location":"2-0020/fan1_pwm" , + "childfans":[{"name":"FRONT ROTOR", "location":"2-0020/fan1_input"},{"name":"BACK ROTOR", "location":"2-0020/fan2_input"} ]}, + {"name":"FAN2", "location":"2-0020/fan3_pwm", + "childfans":[{"name":"FRONT ROTOR", "location":"2-0020/fan3_input"},{"name":"BACK ROTOR", "location":"2-0020/fan4_input"} ]}, + {"name":"FAN3", "location":"2-0020/fan5_pwm", + "childfans":[{"name":"FRONT ROTOR", "location":"2-0020/fan5_input"},{"name":"BACK ROTOR", "location":"2-0020/fan6_input"} ]}, + {"name":"FAN4", "location":"2-0020/fan7_pwm", + "childfans":[{"name":"FRONT ROTOR", "location":"2-0020/fan7_input"},{"name":"BACK ROTOR", "location":"2-0020/fan8_input"} ]}, + {"name":"FAN5", "location":"2-0020/fan9_pwm", + "childfans":[{"name":"FRONT ROTOR", "location":"2-0020/fan9_input"},{"name":"BACK ROTOR", "location":"2-0020/fan10_input"} ]}, + {"name":"FAN6", "location":"2-0020/fan11_pwm", + "childfans":[{"name":"FRONT ROTOR", "location":"2-0020/fan11_input"},{"name":"BACK ROTOR", "location":"2-0020/fan12_input"} ]}, + ] + + +#################FAN speed args ############################## +MONITOR_TEMP_MIN = 30 +MONITOR_K = 14 +MONITOR_MAC_IN = 35 +MONITOR_DEFAULT_SPEED = 0x80 +MONITOR_MAX_SPEED = 0xFF +MONITOR_MIN_SPEED = 0x33 +MONITOR_MAC_ERROR_SPEED = 0XBB +MONITOR_FAN_TOTAL_NUM = 6 +MONITOR_MAC_UP_TEMP = 40 +MONITOR_MAC_LOWER_TEMP = -40 +MONITOR_MAC_MAX_TEMP = 100 + +MONITOR_FALL_TEMP = 2 +MONITOR_MAC_WARNING_THRESHOLD = 100 +MONITOR_OUTTEMP_WARNING_THRESHOLD = 85 +MONITOR_BOARDTEMP_WARNING_THRESHOLD = 85 +MONITOR_CPUTEMP_WARNING_THRESHOLD = 85 +MONITOR_INTEMP_WARNING_THRESHOLD = 70 + +MONITOR_MAC_CRITICAL_THRESHOLD = 105 +MONITOR_OUTTEMP_CRITICAL_THRESHOLD = 90 +MONITOR_BOARDTEMP_CRITICAL_THRESHOLD = 90 +MONITOR_CPUTEMP_CRITICAL_THRESHOLD = 100 +MONITOR_INTEMP_CRITICAL_THRESHOLD = 80 +MONITOR_CRITICAL_NUM = 2 +MONITOR_SHAKE_TIME = 10 +MONITOR_INTERVAL = 60 + +MONITOR_SYS_LED = [ +{ + "cmdstr":"/sys/devices/pci0000:00/0000:00:1f.0/broad_front_sys", + "yellow":0x06, + "red":0x02, + "green":0x04, + "type":"sysfs", +}, +] + +MONITOR_SYS_FAN_LED =[ +{ + "cmdstr":"/sys/devices/pci0000:00/0000:00:1f.0/broad_front_fan", + "yellow":0x06, + "red":0x02, + "green":0x04, + "type":"sysfs", +}, +] + +MONITOR_FANS_LED = [ + {"bus":14,"devno":0x0d, "addr":0x3b, "green":0x04, "red":0x02}, + {"bus":13,"devno":0x0d, "addr":0x3b, "green":0x04, "red":0x02}, + {"bus":14,"devno":0x0d, "addr":0x3c, "green":0x04, "red":0x02}, + {"bus":13,"devno":0x0d, "addr":0x3c, "green":0x04, "red":0x02}, + {"bus":14,"devno":0x0d, "addr":0x3d, "green":0x04, "red":0x02}, + {"bus":13,"devno":0x0d, "addr":0x3d, "green":0x04, "red":0x02}, + ] + +DEV_LEDS = { + "SLOTLED":[ + {"name":'slot1',"bus":3,"devno":0x30, "addr":0x1a, "green":0x04, "red":0x02}, + {"name":'slot2',"bus":4,"devno":0x30, "addr":0x1a, "green":0x04, "red":0x02}, + {"name":'slot3',"bus":5,"devno":0x30, "addr":0x1a, "green":0x04, "red":0x02}, + {"name":'slot4',"bus":6,"devno":0x30, "addr":0x1a, "green":0x04, "red":0x02}, + ] +} + +MONITOR_SYS_PSU_LED =[ +{ + "cmdstr":"/sys/devices/pci0000:00/0000:00:1f.0/broad_front_pwr", + "yellow":0x06, + "red":0x02, + "green":0x04, + "type":"sysfs", +}, +] + +MONITOR_FAN_STATUS = [ + {'status':'green' , 'minOkNum':6,'maxOkNum':6}, + {'status':'yellow', 'minOkNum':5,'maxOkNum':5}, + {'status':'red' , 'minOkNum':0,'maxOkNum':4}, + ] + +MONITOR_PSU_STATUS = [ + {'status':'green' , 'minOkNum':4,'maxOkNum':4}, + {'status':'yellow', 'minOkNum':3,'maxOkNum':3}, + {'status':'red' , 'minOkNum':0,'maxOkNum':2}, + ] + +MONITOR_DEV_STATUS = { + "temperature": [ + {"name":"lm75in", "location":"/sys/bus/i2c/devices/29-004f/hwmon/*/temp1_input"}, + {"name":"lm75out", "location":"/sys/bus/i2c/devices/28-004b/hwmon/*/temp1_input"}, + {"name":"lm75hot", "location":"/sys/bus/i2c/devices/28-004c/hwmon/*/temp1_input"}, + {"name":"cpu", "location":"/sys/class/hwmon/hwmon0"}, + ], + "fans": [ + { + "name":"fan1", + "presentstatus":{"bus":14, "loc":0x0d, "offset":0x30, 'bit':0}, + "rollstatus": [ + {"name":"motor1","bus":14, "loc":0x0d, "offset":0x31, 'bit':0}, + {"name":"motor2","bus":14, "loc":0x0d, "offset":0x34, 'bit':0}, + ] + }, + { + "name":"fan2", + "presentstatus":{"bus":13, "loc":0x0d, "offset":0x30, 'bit':0}, + "rollstatus": [ + {"name":"motor1","bus":13, "loc":0x0d, "offset":0x31, 'bit':0}, + {"name":"motor2","bus":13, "loc":0x0d, "offset":0x34, 'bit':0}, + ] + }, + { + "name":"fan3", + "presentstatus":{"bus":14, "loc":0x0d, "offset":0x30, 'bit':1}, + "rollstatus": [ + {"name":"motor1","bus":14, "loc":0x0d, "offset":0x31, 'bit':1}, + {"name":"motor2","bus":14, "loc":0x0d, "offset":0x34, 'bit':1}, + ] + }, + { + "name":"fan4", + "presentstatus":{"bus":13, "loc":0x0d, "offset":0x30, 'bit':1}, + "rollstatus": [ + {"name":"motor1","bus":13, "loc":0x0d, "offset":0x31, 'bit':1}, + {"name":"motor2","bus":13, "loc":0x0d, "offset":0x34, 'bit':1}, + ] + }, + { + "name":"fan5", + "presentstatus":{"bus":14, "loc":0x0d, "offset":0x30, 'bit':2}, + "rollstatus": [ + {"name":"motor1","bus":14, "loc":0x0d, "offset":0x31, 'bit':2}, + {"name":"motor2","bus":14, "loc":0x0d, "offset":0x34, 'bit':2}, + ] + }, + { + "name":"fan6", + "presentstatus":{"bus":13, "loc":0x0d, "offset":0x30, 'bit':2}, + "rollstatus": [ + {"name":"motor1","bus":13, "loc":0x0d, "offset":0x31, 'bit':2}, + {"name":"motor2","bus":13, "loc":0x0d, "offset":0x34, 'bit':2}, + ] + }, + ], + "psus": [ + {"name":"psu1", "io_addr":0xb27, "gettype":"io", 'presentbit': 0, 'statusbit':1, 'alertbit':2}, + {"name":"psu2", "io_addr":0xb28, "gettype":"io", 'presentbit': 0, 'statusbit':1, 'alertbit':2}, + {"name":"psu3", "io_addr":0xb29, "gettype":"io", 'presentbit': 0, 'statusbit':1, 'alertbit':2}, + {"name":"psu4", "io_addr":0xb2a, "gettype":"io", 'presentbit': 0, 'statusbit':1, 'alertbit':2} + ], + "slots": [ + {"name":"slot1", "io_addr":0xb2c, "gettype":"io", 'presentbit': 4}, + {"name":"slot2", "io_addr":0xb2c, "gettype":"io", 'presentbit': 5}, + {"name":"slot3", "io_addr":0xb2c, "gettype":"io", 'presentbit': 6}, + {"name":"slot4", "io_addr":0xb2c, "gettype":"io", 'presentbit': 7} + ], + "mac_temp" : { + "loc" : [ + "28-004c/hwmon/*/temp2_input", + "29-004c/hwmon/*/temp2_input", + ], + }, +} + +MONITOR_DEV_STATUS_DECODE = { + 'fanpresent' : {0:'PRESENT', 1:'ABSENT', 'okval':0}, + 'fanroll' : {0:'STALL' , 1:'ROLL', 'okval':1}, + 'psupresent' : {0:'PRESENT', 1:'ABSENT', 'okval':0}, + 'psuoutput' : {0:'FAULT' , 1:'NORMAL', 'okval':1}, + 'psualert' : {0:'FAULT' , 1:'NORMAL', 'okval':1}, + 'slotpresent': {0:'PRESENT', 1:'ABSENT', 'okval':0}, +} + +SLOT_MONITOR_PARAM = { + "polling_time" : 0.5, + "slots": [ + {"name":"slot1", + "present":{"gettype":"io", "io_addr":0xb2c,"presentbit": 4,"okval":0}, + "act":[ + {"io_addr":0xb19, "value":0x01, "mask":0xfe, "gettype":"io"}, + {"bus":3, "loc":0x30, "offset":0xa0, "value":0xff,"gettype":"i2c"}, + {"bus":3, "loc":0x31, "offset":0xa0, "value":0xff,"gettype":"i2c"}, + ], + }, + {"name":"slot2", + "present":{"gettype":"io", "io_addr":0xb2c,"presentbit": 5,"okval":0}, + "act":[ + {"io_addr":0xb19, "value":0x02, "mask":0xfd, "gettype":"io"}, + {"bus":4, "loc":0x30, "offset":0xa0, "value":0xff,"gettype":"i2c"}, + {"bus":4, "loc":0x31, "offset":0xa0, "value":0xff,"gettype":"i2c"}, + ], + }, + {"name":"slot3", + "present":{"gettype":"io", "io_addr":0xb2c,"presentbit": 6,"okval":0}, + "act":[ + {"io_addr":0xb19, "value":0x04, "mask":0xfb, "gettype":"io"}, + {"bus":5, "loc":0x30, "offset":0xa0, "value":0xff,"gettype":"i2c"}, + {"bus":5, "loc":0x31, "offset":0xa0, "value":0xff,"gettype":"i2c"}, + ], + }, + {"name":"slot4", + "present":{"gettype":"io", "io_addr":0xb2c,"presentbit": 7,"okval":0}, + "act":[ + {"io_addr":0xb19, "value":0x08, "mask":0xf7, "gettype":"io"}, + {"bus":6, "loc":0x30, "offset":0xa0, "value":0xff,"gettype":"i2c"}, + {"bus":6, "loc":0x31, "offset":0xa0, "value":0xff,"gettype":"i2c"}, + ], + }, + ], +} + +#####################MAC AVS ARGS (B6920-4S) #################################### +MAC_AVS_PARAM ={ + 0x72:0x0384 , + 0x73:0x037e , + 0x74:0x0378 , + 0x75:0x0372 , + 0x76:0x036b , + 0x77:0x0365 , + 0x78:0x035f , + 0x79:0x0359 , + 0x7a:0x0352 , + 0x7b:0x034c , + 0x7c:0x0346 , + 0x7d:0x0340 , + 0x7e:0x0339 , + 0x7f:0x0333 , + 0x80:0x032d , + 0x81:0x0327 , + 0x82:0x0320 , + 0x83:0x031a , + 0x84:0x0314 , + 0x85:0x030e , + 0x86:0x0307 , + 0x87:0x0301 , + 0x88:0x02fb , + 0x89:0x02f5 , + 0x8A:0x02ee +} + + +MAC_DEFAULT_PARAM = { + "type": 1, + "default":0x73, + "loopaddr":0x00, + "loop":0x01, + "open":0x00, + "close":0x40, + "bus":30, + "devno":0x64, + "addr":0x21, + "protectaddr":0x10, + "sdkreg":"DMU_PCU_OTP_CONFIG_4", + "sdkcmd": "scdcmd", + "sdkcmdargs": ["-t", 5], + "sdktype": 1, + "macregloc":8, + "mask": 0xff +} diff --git a/platform/broadcom/sonic-platform-modules-ragile/ra-b6920-4s/modules/driver/Makefile b/platform/broadcom/sonic-platform-modules-ragile/ra-b6920-4s/modules/driver/Makefile new file mode 100755 index 0000000000..2b5ac6c5aa --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ragile/ra-b6920-4s/modules/driver/Makefile @@ -0,0 +1,8 @@ +obj-m := rg_cpld.o + +obj-m += lpc_cpld_i2c.o +obj-m += rg_lpc_cpld.o +obj-m += pddf_custom_fan.o +obj-m += pddf_custom_psu.o +obj-m += pddf_custom_xcvr.o +obj-m += pddf_custom_led_module.o diff --git a/platform/broadcom/sonic-platform-modules-ragile/ra-b6920-4s/modules/driver/lpc_cpld_i2c.c b/platform/broadcom/sonic-platform-modules-ragile/ra-b6920-4s/modules/driver/lpc_cpld_i2c.c new file mode 100755 index 0000000000..17e2025d3c --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ragile/ra-b6920-4s/modules/driver/lpc_cpld_i2c.c @@ -0,0 +1,131 @@ +#include /* Wd're doing kernel work */ +#include /* specifically, a module */ +#include +#include /* Need for the macros */ +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include "../../../common/modules/lpc_cpld_i2c_ocores.h" +#include "ragile.h" + +int lpc_cpld_i2c_verbose = 0; +int lpc_cpld_i2c_error = 0; +module_param(lpc_cpld_i2c_verbose, int, S_IRUGO | S_IWUSR); +module_param(lpc_cpld_i2c_error, int, S_IRUGO | S_IWUSR); + + +#define LPC_CPLD_I2C_VERBOSE(fmt, args...) do { \ + if (lpc_cpld_i2c_verbose) { \ + printk(KERN_ERR "[LPC_CPLD_I2C_DEVICE][VERBOSE][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \ + } \ +} while (0) + +#define LPC_CPLD_I2C_ERROR(fmt, args...) do { \ + if (lpc_cpld_i2c_error) { \ + printk(KERN_ERR "[LPC_CPLD_I2C_DEVICE][ERROR][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \ + } \ + } while (0) + +#define PCI_VENDOR_ID_D1527_LPC (0x8c54) +#define PCI_VENDOR_ID_C3000_LPC (0x19dc) + +#define LPC_CPLD_I2C_OCORE_START_BASE (0x800) +#define MAX_LPC_CPLD_I2C_REG_SIZE (0x8) + +#define LPC_CPLD_I2C_OCORE_CTRL_START(id) ((LPC_CPLD_I2C_OCORE_START_BASE) + (id) * (MAX_LPC_CPLD_I2C_REG_SIZE)) +#define LPC_CPLD_I2C_OCORE_CTRL_END(id) ((LPC_CPLD_I2C_OCORE_START_BASE) + (id + 1) * (MAX_LPC_CPLD_I2C_REG_SIZE) - 1) + +static struct rg_ocores_cpld_i2c_platform_data rg_i2c_ocore_pdata = { + .reg_shift = 0, + .reg_io_width = 1, + .clock_khz = 33000, + .num_devices = 0, + .i2c_irq_flag = 1, +}; + +#define DEFINE_LPC_CPLD_I2C_DEVICE_RESOURCES(_id) \ + static struct resource lpc_cpld_i2c_resources_##_id[] = { \ + { \ + .start = LPC_CPLD_I2C_OCORE_CTRL_START(_id), \ + .end = LPC_CPLD_I2C_OCORE_CTRL_END(_id), \ + .flags = IORESOURCE_IO, \ + }, \ +} + +DEFINE_LPC_CPLD_I2C_DEVICE_RESOURCES(52); +DEFINE_LPC_CPLD_I2C_DEVICE_RESOURCES(48); +DEFINE_LPC_CPLD_I2C_DEVICE_RESOURCES(49); +DEFINE_LPC_CPLD_I2C_DEVICE_RESOURCES(50); +DEFINE_LPC_CPLD_I2C_DEVICE_RESOURCES(51); + +#define DEFINE_LPC_CPLD_I2C_MFD_CELL_CFG(_id) \ + { \ + .name = "rg-cpld-ocrore-i2c", \ + .id = (_id), \ + .num_resources = ARRAY_SIZE(lpc_cpld_i2c_resources_##_id), \ + .resources = lpc_cpld_i2c_resources_##_id, \ + .platform_data = &rg_i2c_ocore_pdata, \ + .pdata_size = sizeof(rg_i2c_ocore_pdata), \ + } + +static const struct mfd_cell lpc_cpld_i2c_cells_bar0_cfg0[] = { + DEFINE_LPC_CPLD_I2C_MFD_CELL_CFG(52), + DEFINE_LPC_CPLD_I2C_MFD_CELL_CFG(48), + DEFINE_LPC_CPLD_I2C_MFD_CELL_CFG(49), + DEFINE_LPC_CPLD_I2C_MFD_CELL_CFG(50), + DEFINE_LPC_CPLD_I2C_MFD_CELL_CFG(51), +}; + +static int __init lpc_cpld_i2c_init(void) +{ + struct pci_dev *pdev = NULL; + int ret; + + LPC_CPLD_I2C_VERBOSE("Enter.\n"); + + pdev = pci_get_device(PCI_VENDOR_ID_INTEL, PCI_VENDOR_ID_D1527_LPC, pdev); + if (!pdev) { + LPC_CPLD_I2C_ERROR("pci_get_device(0x8086, 0x8c54) failed!\n"); + return 0; + } + + ret = mfd_add_devices(&pdev->dev, 0, + lpc_cpld_i2c_cells_bar0_cfg0, + ARRAY_SIZE(lpc_cpld_i2c_cells_bar0_cfg0), + NULL, 0, NULL); + if (ret) { + LPC_CPLD_I2C_ERROR("mfd_add_devices failed: %d\n", ret); + return -1; + } + LPC_CPLD_I2C_VERBOSE("Leave success\n"); + return ret; +} + +static void __exit lpc_cpld_i2c_exit(void) +{ + struct pci_dev *pdev = NULL; + + pdev = pci_get_device(PCI_VENDOR_ID_INTEL, PCI_VENDOR_ID_D1527_LPC, pdev); + if (!pdev) { + LPC_CPLD_I2C_ERROR("pci_get_device(0x8086, 0x8c54) failed!\n"); + return ; + } + + mfd_remove_devices(&pdev->dev); + LPC_CPLD_I2C_VERBOSE("Leave.\n"); +} + +module_init(lpc_cpld_i2c_init); +module_exit(lpc_cpld_i2c_exit); +MODULE_LICENSE("GPL"); +MODULE_AUTHOR("support "); diff --git a/platform/broadcom/sonic-platform-modules-ragile/ra-b6920-4s/modules/driver/pddf_custom_fan.c b/platform/broadcom/sonic-platform-modules-ragile/ra-b6920-4s/modules/driver/pddf_custom_fan.c new file mode 100644 index 0000000000..9367524a94 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ragile/ra-b6920-4s/modules/driver/pddf_custom_fan.c @@ -0,0 +1,268 @@ +#include +#include "../../../../../pddf/i2c/modules/include/pddf_client_defs.h" +#include "../../../../../pddf/i2c/modules/include/pddf_fan_defs.h" +#include "../../../../../pddf/i2c/modules/include/pddf_fan_driver.h" +#include "../../../../../pddf/i2c/modules/include/pddf_fan_api.h" + +extern void *get_device_table(char *name); + +extern FAN_SYSFS_ATTR_DATA data_fan1_present; +extern FAN_SYSFS_ATTR_DATA data_fan2_present; +extern FAN_SYSFS_ATTR_DATA data_fan3_present; +extern FAN_SYSFS_ATTR_DATA data_fan4_present; +extern FAN_SYSFS_ATTR_DATA data_fan5_present; +extern FAN_SYSFS_ATTR_DATA data_fan6_present; +extern FAN_SYSFS_ATTR_DATA data_fan7_present; +extern FAN_SYSFS_ATTR_DATA data_fan8_present; +extern FAN_SYSFS_ATTR_DATA data_fan9_present; +extern FAN_SYSFS_ATTR_DATA data_fan10_present; +extern FAN_SYSFS_ATTR_DATA data_fan11_present; +extern FAN_SYSFS_ATTR_DATA data_fan12_present; + +extern FAN_SYSFS_ATTR_DATA data_fan1_input; +extern FAN_SYSFS_ATTR_DATA data_fan2_input; +extern FAN_SYSFS_ATTR_DATA data_fan3_input; +extern FAN_SYSFS_ATTR_DATA data_fan4_input; +extern FAN_SYSFS_ATTR_DATA data_fan5_input; +extern FAN_SYSFS_ATTR_DATA data_fan6_input; +extern FAN_SYSFS_ATTR_DATA data_fan7_input; +extern FAN_SYSFS_ATTR_DATA data_fan8_input; +extern FAN_SYSFS_ATTR_DATA data_fan9_input; +extern FAN_SYSFS_ATTR_DATA data_fan10_input; +extern FAN_SYSFS_ATTR_DATA data_fan11_input; +extern FAN_SYSFS_ATTR_DATA data_fan12_input; + +extern FAN_SYSFS_ATTR_DATA data_fan1_pwm; +extern FAN_SYSFS_ATTR_DATA data_fan2_pwm; +extern FAN_SYSFS_ATTR_DATA data_fan3_pwm; +extern FAN_SYSFS_ATTR_DATA data_fan4_pwm; +extern FAN_SYSFS_ATTR_DATA data_fan5_pwm; +extern FAN_SYSFS_ATTR_DATA data_fan6_pwm; +extern FAN_SYSFS_ATTR_DATA data_fan7_pwm; +extern FAN_SYSFS_ATTR_DATA data_fan8_pwm; +extern FAN_SYSFS_ATTR_DATA data_fan9_pwm; +extern FAN_SYSFS_ATTR_DATA data_fan10_pwm; +extern FAN_SYSFS_ATTR_DATA data_fan11_pwm; +extern FAN_SYSFS_ATTR_DATA data_fan12_pwm; + +extern FAN_SYSFS_ATTR_DATA data_fan1_fault; +extern FAN_SYSFS_ATTR_DATA data_fan2_fault; +extern FAN_SYSFS_ATTR_DATA data_fan3_fault; +extern FAN_SYSFS_ATTR_DATA data_fan4_fault; +extern FAN_SYSFS_ATTR_DATA data_fan5_fault; +extern FAN_SYSFS_ATTR_DATA data_fan6_fault; +extern FAN_SYSFS_ATTR_DATA data_fan7_fault; +extern FAN_SYSFS_ATTR_DATA data_fan8_fault; +extern FAN_SYSFS_ATTR_DATA data_fan9_fault; +extern FAN_SYSFS_ATTR_DATA data_fan10_fault; +extern FAN_SYSFS_ATTR_DATA data_fan11_fault; +extern FAN_SYSFS_ATTR_DATA data_fan12_fault; + +int pddf_custom_fan_present(void *client, FAN_DATA_ATTR *udata, void *info); +int pddf_custom_fan_input(void *client, FAN_DATA_ATTR *udata, void *info); +int pddf_custom_fan_fault(void *client, FAN_DATA_ATTR *udata, void *info); +int pddf_custom_fan_pwm(void *client, FAN_DATA_ATTR *udata, void *info); +int pddf_custom_fan_set_pwm(void *client, FAN_DATA_ATTR *udata, void *info); + +int pddf_custom_fan_present(void *client, FAN_DATA_ATTR *udata, void *info) +{ + uint32_t val; + struct fan_attr_info *painfo = (struct fan_attr_info *)info; + + val = 0; + + if (strcmp(udata->devtype, "cpld") == 0) { + if (udata->devname) { + client = (struct i2c_client *)get_device_table(udata->devname); + } + } + val = i2c_smbus_read_byte_data((struct i2c_client *)client, udata->offset); + /* printk("%s read data %x\n", __FUNCTION__, val); */ + + painfo->val.intval = ((val & udata->mask) == udata->cmpval); + + return 0; +} + +int pddf_custom_fan_input(void *client, FAN_DATA_ATTR *udata, void *info) +{ + uint32_t val; + struct fan_attr_info *painfo = (struct fan_attr_info *)info; + + val = 0; + + if (strcmp(udata->devtype, "cpld") == 0) { + if (udata->devname) { + client = (struct i2c_client *)get_device_table(udata->devname); + } + } + if (udata->len == 1) { + val = i2c_smbus_read_byte_data(client, udata->offset); + } else if (udata->len == 2) { + val = i2c_smbus_read_word_swapped((struct i2c_client *)client, udata->offset); + } + + /* printk("%s read data %x\n", __FUNCTION__, val); */ + + if (udata->is_divisor) + painfo->val.intval = udata->mult / (val >> 3); + else + painfo->val.intval = udata->mult * val; + + return 0; +} + +int pddf_custom_fan_pwm(void *client, FAN_DATA_ATTR *udata, void *info) +{ + uint32_t val; + struct fan_attr_info *painfo = (struct fan_attr_info *)info; + + val = 0; + + if (strcmp(udata->devtype, "cpld") == 0) { + if (udata->devname) { + client = (struct i2c_client *)get_device_table(udata->devname); + } + } + if (udata->len == 1) { + val = i2c_smbus_read_byte_data(client, udata->offset); + } else if (udata->len == 2) { + val = i2c_smbus_read_word_swapped((struct i2c_client *)client, udata->offset); + } + /* printk("%s read data %x\n", __FUNCTION__, val); */ + + val = val & udata->mask; + painfo->val.intval = val; + + return 0; +} + +int pddf_custom_fan_set_pwm(void *client, FAN_DATA_ATTR *udata, void *info) +{ + uint32_t val; + struct fan_attr_info *painfo; + + val = 0; + painfo = (struct fan_attr_info *)info; + + val = painfo->val.intval & udata->mask; + + if (val > 255) { + return -EINVAL; + } + + if (strcmp(udata->devtype, "cpld") == 0 && udata->devname) { + client = (struct i2c_client *)get_device_table(udata->devname); + i2c_smbus_write_byte_data(client, udata->offset, val); + } + + return 0; +} + + +int pddf_custom_fan_fault(void *client, FAN_DATA_ATTR *udata, void *info) +{ + uint32_t val; + struct fan_attr_info *painfo = (struct fan_attr_info *)info; + + val = 0; + + if (strcmp(udata->devtype, "cpld") == 0) { + if (udata->devname) { + client = (struct i2c_client *)get_device_table(udata->devname); + } + } + val = i2c_smbus_read_byte_data((struct i2c_client *)client, udata->offset); + /* printk("%s read data %x\n", __FUNCTION__, val); */ + + val = val & udata->mask; + painfo->val.intval = val; + + return 0; +} + +int __init pddf_custom_fan_init(void) +{ + printk(KERN_ERR "pddf_custom_fan_init\n"); + + data_fan1_present.do_get = pddf_custom_fan_present; + data_fan2_present.do_get = pddf_custom_fan_present; + data_fan3_present.do_get = pddf_custom_fan_present; + data_fan4_present.do_get = pddf_custom_fan_present; + data_fan5_present.do_get = pddf_custom_fan_present; + data_fan6_present.do_get = pddf_custom_fan_present; + data_fan7_present.do_get = pddf_custom_fan_present; + data_fan8_present.do_get = pddf_custom_fan_present; + data_fan9_present.do_get = pddf_custom_fan_present; + data_fan10_present.do_get = pddf_custom_fan_present; + data_fan11_present.do_get = pddf_custom_fan_present; + data_fan12_present.do_get = pddf_custom_fan_present; + + data_fan1_input.do_get = pddf_custom_fan_input; + data_fan2_input.do_get = pddf_custom_fan_input; + data_fan3_input.do_get = pddf_custom_fan_input; + data_fan4_input.do_get = pddf_custom_fan_input; + data_fan5_input.do_get = pddf_custom_fan_input; + data_fan6_input.do_get = pddf_custom_fan_input; + data_fan7_input.do_get = pddf_custom_fan_input; + data_fan8_input.do_get = pddf_custom_fan_input; + data_fan9_input.do_get = pddf_custom_fan_input; + data_fan10_input.do_get = pddf_custom_fan_input; + data_fan11_input.do_get = pddf_custom_fan_input; + data_fan12_input.do_get = pddf_custom_fan_input; + + data_fan1_pwm.do_get = pddf_custom_fan_pwm; + data_fan2_pwm.do_get = pddf_custom_fan_pwm; + data_fan3_pwm.do_get = pddf_custom_fan_pwm; + data_fan4_pwm.do_get = pddf_custom_fan_pwm; + data_fan5_pwm.do_get = pddf_custom_fan_pwm; + data_fan6_pwm.do_get = pddf_custom_fan_pwm; + data_fan7_pwm.do_get = pddf_custom_fan_pwm; + data_fan8_pwm.do_get = pddf_custom_fan_pwm; + data_fan9_pwm.do_get = pddf_custom_fan_pwm; + data_fan10_pwm.do_get = pddf_custom_fan_pwm; + data_fan11_pwm.do_get = pddf_custom_fan_pwm; + data_fan12_pwm.do_get = pddf_custom_fan_pwm; + + data_fan1_pwm.do_set = pddf_custom_fan_set_pwm; + data_fan2_pwm.do_set = pddf_custom_fan_set_pwm; + data_fan3_pwm.do_set = pddf_custom_fan_set_pwm; + data_fan4_pwm.do_set = pddf_custom_fan_set_pwm; + data_fan5_pwm.do_set = pddf_custom_fan_set_pwm; + data_fan6_pwm.do_set = pddf_custom_fan_set_pwm; + data_fan7_pwm.do_set = pddf_custom_fan_set_pwm; + data_fan8_pwm.do_set = pddf_custom_fan_set_pwm; + data_fan9_pwm.do_set = pddf_custom_fan_set_pwm; + data_fan10_pwm.do_set = pddf_custom_fan_set_pwm; + data_fan11_pwm.do_set = pddf_custom_fan_set_pwm; + data_fan12_pwm.do_set = pddf_custom_fan_set_pwm; + + data_fan1_fault.do_get = pddf_custom_fan_fault; + data_fan2_fault.do_get = pddf_custom_fan_fault; + data_fan3_fault.do_get = pddf_custom_fan_fault; + data_fan4_fault.do_get = pddf_custom_fan_fault; + data_fan5_fault.do_get = pddf_custom_fan_fault; + data_fan6_fault.do_get = pddf_custom_fan_fault; + data_fan7_fault.do_get = pddf_custom_fan_fault; + data_fan8_fault.do_get = pddf_custom_fan_fault; + data_fan9_fault.do_get = pddf_custom_fan_fault; + data_fan10_fault.do_get = pddf_custom_fan_fault; + data_fan11_fault.do_get = pddf_custom_fan_fault; + data_fan12_fault.do_get = pddf_custom_fan_fault; + + return 0; +} + +void __exit pddf_custom_fan_exit(void) +{ + printk(KERN_ERR "pddf_custom_fan_exit\n"); + return; +} + +MODULE_AUTHOR("support "); +MODULE_DESCRIPTION("pddf custom fan api"); +MODULE_LICENSE("GPL"); + +module_init(pddf_custom_fan_init); +module_exit(pddf_custom_fan_exit); + diff --git a/platform/broadcom/sonic-platform-modules-ragile/ra-b6920-4s/modules/driver/pddf_custom_led_module.c b/platform/broadcom/sonic-platform-modules-ragile/ra-b6920-4s/modules/driver/pddf_custom_led_module.c new file mode 100644 index 0000000000..97ca23a923 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ragile/ra-b6920-4s/modules/driver/pddf_custom_led_module.c @@ -0,0 +1,745 @@ +/* + * Copyright 2019 Broadcom. + * The term “Broadcom” refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * + * A pddf kernel module to manage various LEDs of a switch + */ + +#include +#include +#include +#include +#include +#include +#include "../../../../../pddf/i2c/modules/include/pddf_led_defs.h" +#include "../../../../../pddf/i2c/modules/include/pddf_client_defs.h" +#include +#include +#include +#include + +#define DEBUG 0 +LED_OPS_DATA sys_led_ops_data[1]={0}; +LED_OPS_DATA* psu_led_ops_data=NULL; +LED_OPS_DATA diag_led_ops_data[1]= {0}; +LED_OPS_DATA fan_led_ops_data[1]= {0}; +LED_OPS_DATA loc_led_ops_data[1]= {0}; +LED_OPS_DATA* fantray_led_ops_data=NULL; +LED_OPS_DATA temp_data={0}; +LED_OPS_DATA* dev_list[LED_TYPE_MAX] = { + sys_led_ops_data, + NULL, + fan_led_ops_data, + NULL, + diag_led_ops_data, + loc_led_ops_data, +}; +int num_psus = 0; +int num_fantrays = 0; + +extern int board_i2c_cpld_read(unsigned short cpld_addr, u8 reg); +extern int board_i2c_cpld_write(unsigned short cpld_addr, u8 reg, u8 value); +extern ssize_t show_pddf_data(struct device *dev, struct device_attribute *da, char *buf); +extern ssize_t store_pddf_data(struct device *dev, struct device_attribute *da, const char *buf, size_t count); +extern void *get_device_table(char *name); + +static LED_STATUS find_state_index(const char* state_str) { + int index; + char *ptr = (char *)state_str; + while (*ptr && *ptr!= '\n' && *ptr !='\0') ptr++; + *ptr='\0'; + for ( index = 0; index < MAX_LED_STATUS; index++) { + /*int rc = strcmp(state_str, LED_STATUS_STR[index]) ;*/ + if (strcmp(state_str, LED_STATUS_STR[index]) == 0 ) { + return index; + } + } + return MAX_LED_STATUS; +} + +static LED_TYPE get_dev_type(char* name) +{ + LED_TYPE ret = LED_TYPE_MAX; + if(strcasecmp(name, "SYS_LED")==0) { + ret = LED_SYS; + } else if(strcasecmp(name, "FAN_LED")==0) { + ret = LED_FAN; + } else if(strstr(name, "PSU_LED")) { + ret = LED_PSU; + } else if(strcasecmp(name, "DIAG_LED")==0) { + ret = LED_DIAG; + } else if(strcasecmp(name, "LOC_LED")==0) { + ret = LED_LOC; + } else if(strstr(name, "FANTRAY_LED")) { + ret = LED_FANTRAY; + } +#if DEBUG > 1 + pddf_dbg(LED, KERN_INFO "LED get_dev_type: %s; %d\n", name, ret); +#endif + return (ret); +} +static int dev_index_check(LED_TYPE type, int index) +{ +#if DEBUG + pddf_dbg(LED, "dev_index_check: type:%s index:%d num_psus:%d num_fantrays:%d\n", + LED_TYPE_STR[type], index, num_psus, num_fantrays); +#endif + switch(type) + { + case LED_PSU: + if(index >= num_psus) return (-1); + break; + case LED_FANTRAY: + if(index >= num_fantrays) return (-1); + break; + default: + if(index >= 1) return (-1); + break; + } + return (0); +} + +static LED_OPS_DATA* find_led_ops_data(struct device_attribute *da) +{ + struct pddf_data_attribute *_ptr = (struct pddf_data_attribute *)da; + LED_OPS_DATA* ptr=(LED_OPS_DATA*)_ptr->addr; + LED_TYPE led_type; + if(!ptr || strlen(ptr->device_name)==0 ) return(NULL); + + + if((led_type=get_dev_type(ptr->device_name))==LED_TYPE_MAX) { + printk(KERN_ERR "PDDF_LED ERROR *%s Unsupported Led Type\n", __func__); + return(NULL); + } + if(dev_index_check(led_type, ptr->index)==-1) { + printk(KERN_ERR "PDDF_LED ERROR %s invalid index: %d for type:%s\n", __func__, ptr->index, ptr->device_name); + return(NULL); + } +#if DEBUG > 1 + pddf_dbg(LED, "find_led_ops_data: name:%s; index=%d tempAddr:%p actualAddr:%p\n", + ptr->device_name, ptr->index, ptr, dev_list[led_type]+ptr->index); +#endif + return (dev_list[led_type]+ptr->index); +} + +static void print_led_data(LED_OPS_DATA *ptr, LED_STATUS state) +{ + int i = 0; + if(!ptr) return ; + pddf_dbg(LED, KERN_INFO "Print %s index:%d num_psus:%d num_fantrays:%d ADDR=%p\n", + ptr->device_name, ptr->index, num_psus, num_fantrays, ptr); + pddf_dbg(LED, KERN_INFO "\tindex: %d\n", ptr->index); + pddf_dbg(LED, KERN_INFO "\tcur_state: %d; %s \n", ptr->cur_state.state, ptr->cur_state.color); + for (i = 0; i< MAX_LED_STATUS; i++) { + if(ptr->data[i].swpld_addr && (i == state || state == -1)) { + pddf_dbg(LED, KERN_INFO "\t\t[%s]: addr/offset:0x%x;0x%x color:%s; value:%x; mask_bits: 0x%x; pos:%d\n", + LED_STATUS_STR[i], + ptr->data[i].swpld_addr, ptr->data[i].swpld_addr_offset, + LED_STATUS_STR[i], ptr->data[i].value, ptr->data[i].bits.mask_bits, ptr->data[i].bits.pos); + } + } +} + +int get_sys_val(LED_OPS_DATA *ops_ptr, uint32_t *sys_val) +{ + int ret; + struct i2c_client *client_ptr; + + ret = -1; + + if (ops_ptr == NULL) { + pddf_dbg(LED, KERN_ERR "ERROR %s: param is NULL\n", __func__); + return ret; + } + + if (strlen(ops_ptr->device_name) != 0 && strncmp(ops_ptr->device_name, "FANTRAY_LED", strlen("FANTRAY_LED")) == 0) { + if (ops_ptr->index % 2 == 0) { + client_ptr = (struct i2c_client *)get_device_table("FAN-CPLD-B"); + } else { + client_ptr = (struct i2c_client *)get_device_table("FAN-CPLD-A"); + } + if (client_ptr == NULL) { + pddf_dbg(LED, KERN_ERR "ERROR %s: get led color by cpld fail\n", __func__); + return ret; + } + *sys_val = i2c_smbus_read_byte_data(client_ptr, ops_ptr->swpld_addr_offset); + ret = 0; + } else { + ret = inb(ops_ptr->swpld_addr_offset); + if (ret < 0) { + pddf_dbg(LED, KERN_ERR "ERROR %s: get led color by io fail\n", __func__); + return ret; + } + *sys_val = (uint32_t)ret; + ret = 0; + } + + return ret; +} + + +ssize_t get_status_led(struct device_attribute *da) +{ + int ret=0; + struct pddf_data_attribute *_ptr = (struct pddf_data_attribute *)da; + LED_OPS_DATA* temp_data_ptr=(LED_OPS_DATA*)_ptr->addr; + LED_OPS_DATA* ops_ptr=find_led_ops_data(da); + uint32_t color_val=0, sys_val=0; + int state=0; + if (!ops_ptr) { + pddf_dbg(LED, KERN_ERR "ERROR %s: Cannot find LED Ptr", __func__); + return (-1); + } + if (ops_ptr->swpld_addr == 0x0) { + pddf_dbg(LED, KERN_ERR "ERROR %s: device: %s %d not configured\n", __func__, + temp_data_ptr->device_name, temp_data_ptr->index); + return (-1); + } + ret = get_sys_val(ops_ptr, &sys_val); + if (ret < 0) { + pddf_dbg(LED, KERN_ERR "ERROR %s: Cannot get sys val\n", __func__); + return (-1); + } + /* keep ret as old value */ + ret = 0; + + strcpy(temp_data.cur_state.color, "None"); + for (state=0; statedata[state].bits.mask_bits); + /* printk("color val %d p1 %x, p2 %x\n", color_val, ops_ptr->data[state].value, ops_ptr->data[state].bits.pos); */ + if ((color_val ^ (ops_ptr->data[state].value<data[state].bits.pos))==0) { + strcpy(temp_data.cur_state.color, LED_STATUS_STR[state]); + } + } +#if DEBUG > 1 + pddf_dbg(LED, KERN_ERR "Get : %s:%d addr/offset:0x%x; 0x%x value=0x%x [%s]\n", + ops_ptr->device_name, ops_ptr->index, + ops_ptr->swpld_addr, ops_ptr->swpld_addr_offset, sys_val, + temp_data.cur_state.color); +#endif + + return(ret); +} + +int set_sys_val(LED_OPS_DATA *ops_ptr, uint32_t new_val) +{ + int ret; + struct i2c_client *client_ptr; + + ret = -1; + + if (ops_ptr == NULL) { + pddf_dbg(LED, KERN_ERR "ERROR %s: param is NULL\n", __func__); + return ret; + } + + if (strlen(ops_ptr->device_name) != 0 && strncmp(ops_ptr->device_name, "FANTRAY_LED", strlen("FANTRAY_LED")) == 0) { + client_ptr = NULL; + if (ops_ptr->index % 2 == 0) { + client_ptr = (struct i2c_client *)get_device_table("FAN-CPLD-B"); + } else { + client_ptr = (struct i2c_client *)get_device_table("FAN-CPLD-A"); + } + if (client_ptr == NULL) { + pddf_dbg(LED, KERN_ERR "ERROR %s: get i2c_client fail\n", __func__); + return ret; + } + ret = i2c_smbus_write_byte_data(client_ptr, ops_ptr->swpld_addr_offset, new_val); + if (ret < 0) { + pddf_dbg(LED, KERN_ERR "ERROR %s: set led color by cpld fail\n", __func__); + } + } + else { + outb(new_val, ops_ptr->swpld_addr_offset); + } + + return ret; +} + +ssize_t set_status_led(struct device_attribute *da) +{ + int ret=0; + uint32_t sys_val=0, new_val=0; + LED_STATUS cur_state = MAX_LED_STATUS; + struct pddf_data_attribute *_ptr = (struct pddf_data_attribute *)da; + LED_OPS_DATA* temp_data_ptr=(LED_OPS_DATA*)_ptr->addr; + LED_OPS_DATA* ops_ptr=find_led_ops_data(da); + char* _buf=temp_data_ptr->cur_state.color; + + if (!ops_ptr) { + pddf_dbg(LED, KERN_ERR "PDDF_LED ERROR %s: Cannot find LED Ptr", __func__); + return (-1); + } + if (ops_ptr->swpld_addr == 0x0) { + pddf_dbg(LED, KERN_ERR "PDDF_LED ERROR %s: device: %s %d not configured\n", + __func__, ops_ptr->device_name, ops_ptr->index); + return (-1); + } + pddf_dbg(LED, KERN_ERR "%s: Set [%s;%d] color[%s]\n", __func__, + temp_data_ptr->device_name, temp_data_ptr->index, + temp_data_ptr->cur_state.color); + cur_state = find_state_index(_buf); + + if (cur_state == MAX_LED_STATUS) { + pddf_dbg(LED, KERN_ERR "ERROR %s: not supported: %s\n", _buf, __func__); + return (-1); + } + + if(ops_ptr->data[cur_state].swpld_addr != 0x0) { + ret = get_sys_val(ops_ptr, &sys_val); + if (ret < 0) { + pddf_dbg(LED, KERN_ERR "ERROR %s: Cannot get sys val\n", __func__); + return (-1); + } + + new_val = (sys_val & ops_ptr->data[cur_state].bits.mask_bits) | + (ops_ptr->data[cur_state].value << ops_ptr->data[cur_state].bits.pos); + + } else { + pddf_dbg(LED, KERN_ERR "ERROR %s: %s %d state %d; %s not configured\n",__func__, + ops_ptr->device_name, ops_ptr->index, cur_state, _buf); + return (-1); + } + + ret = set_sys_val(ops_ptr, new_val); + if (ret < 0) { + pddf_dbg(LED, KERN_ERR "ERROR %s: Cannot set sys val\n", __func__); + return (-1); + } + pddf_dbg(LED, KERN_INFO "Set color:%s; 0x%x:0x%x sys_val:0x%x new_val:0x%x read:0x%x\n", + LED_STATUS_STR[cur_state], + ops_ptr->swpld_addr, ops_ptr->swpld_addr_offset, + sys_val, new_val, + ret = board_i2c_cpld_read(ops_ptr->swpld_addr, ops_ptr->swpld_addr_offset)); + if (ret < 0) + { + pddf_dbg(LED, KERN_ERR "PDDF_LED ERROR %s: Error %d in reading from cpld(0x%x) offset 0x%x\n", __FUNCTION__, ret, ops_ptr->swpld_addr, ops_ptr->swpld_addr_offset); + return ret; + } + return(ret); +} + + +ssize_t show_pddf_data(struct device *dev, struct device_attribute *da, + char *buf) +{ + int ret = 0; + struct pddf_data_attribute *ptr = (struct pddf_data_attribute *)da; + switch(ptr->type) + { + case PDDF_CHAR: + ret = sprintf(buf, "%s\n", ptr->addr); + break; + case PDDF_INT_DEC: + ret = sprintf(buf, "%d\n", *(int*)(ptr->addr)); + break; + case PDDF_INT_HEX: + ret = sprintf(buf, "0x%x\n", *(int*)(ptr->addr)); + break; + case PDDF_USHORT: + ret = sprintf(buf, "0x%x\n", *(unsigned short *)(ptr->addr)); + break; + case PDDF_UINT32: + ret = sprintf(buf, "0x%x\n", *(uint32_t *)(ptr->addr)); + break; + default: + break; + } +#if DEBUG > 1 + pddf_dbg(LED, "[ READ ] DATA ATTR PTR [%s] TYPE:%d, Value:[%s]\n", + ptr->dev_attr.attr.name, ptr->type, buf); +#endif + return ret; +} + +ssize_t store_pddf_data(struct device *dev, struct device_attribute *da, const char *buf, size_t count) +{ + int ret = 0, num = 0; + struct pddf_data_attribute *ptr = (struct pddf_data_attribute *)da; + switch(ptr->type) + { + case PDDF_CHAR: + strncpy(ptr->addr, buf, strlen(buf)-1); // to discard newline char form buf + ptr->addr[strlen(buf)-1] = '\0'; +#if DEBUG + pddf_dbg(LED, KERN_ERR "[ WRITE ] ATTR PTR [%s] PDDF_CHAR VALUE:%s\n", + ptr->dev_attr.attr.name, ptr->addr); +#endif + break; + case PDDF_INT_DEC: + ret = kstrtoint(buf,10,&num); + if (ret==0) + *(int *)(ptr->addr) = num; +#if DEBUG + pddf_dbg(LED, KERN_ERR "[ WRITE ] ATTR PTR [%s] PDDF_DEC VALUE:%d\n", + ptr->dev_attr.attr.name, *(int *)(ptr->addr)); +#endif + break; + case PDDF_INT_HEX: + ret = kstrtoint(buf,16,&num); + if (ret==0) + *(int *)(ptr->addr) = num; +#if DEBUG + pddf_dbg(LED, KERN_ERR "[ WRITE ] ATTR PTR [%s] PDDF_HEX VALUE:0x%x\n", + ptr->dev_attr.attr.name, *(int *)(ptr->addr)); +#endif + break; + case PDDF_USHORT: + ret = kstrtoint(buf,16,&num); + if (ret==0) + *(unsigned short *)(ptr->addr) = (unsigned short)num; +#if DEBUG + pddf_dbg(LED, KERN_ERR "[ WRITE ] ATTR PTR [%s] PDDF_USHORT VALUE:%x\n", + ptr->dev_attr.attr.name, *(unsigned short *)(ptr->addr)); +#endif + break; + case PDDF_UINT32: + ret = kstrtoint(buf,16,&num); + if (ret==0) + *(uint32_t *)(ptr->addr) = (uint32_t)num; +#if DEBUG + pddf_dbg(LED, KERN_ERR "[ WRITE ] ATTR PTR [%s] PDDF_UINT32 VALUE:%d\n", + ptr->dev_attr.attr.name, *(uint32_t *)(ptr->addr)); +#endif + break; + default: + break; + } + return count; +} + +static int load_led_ops_data(struct device_attribute *da, LED_STATUS state) +{ + struct pddf_data_attribute *_ptr = (struct pddf_data_attribute *)da; + LED_OPS_DATA* ptr=(LED_OPS_DATA*)_ptr->addr; + LED_TYPE led_type; + LED_OPS_DATA* ops_ptr=NULL; + if(!ptr || strlen(ptr->device_name)==0 ) { + pddf_dbg(LED, KERN_INFO "SYSTEM_LED: load_led_ops_data return -1 device_name:%s\n", ptr? ptr->device_name:"NULL"); + return(-1); + } + if(ptr->device_name) + { + pddf_dbg(LED, KERN_INFO "[%s]: load_led_ops_data: index=%d addr=0x%x;0x%x valu=0x%x\n", + ptr->device_name, ptr->index, ptr->swpld_addr, ptr->swpld_addr_offset, ptr->data[0].value); + } + if((led_type=get_dev_type(ptr->device_name))==LED_TYPE_MAX) { + pddf_dbg(LED, KERN_ERR "PDDF_LED ERROR *%s Unsupported Led Type\n", __func__); + return(-1); + } + if(dev_index_check(led_type, ptr->index)==-1) { + pddf_dbg(LED, KERN_ERR "PDDF_LED ERROR %s invalid index: %d for type:%d\n", __func__, ptr->index, led_type); + return(-1); + } + ops_ptr = dev_list[led_type]+ptr->index; + + memcpy(ops_ptr->device_name, ptr->device_name, sizeof(ops_ptr->device_name)); + ops_ptr->index = ptr->index; + memcpy(&ops_ptr->data[state], &ptr->data[0], sizeof(LED_DATA)); + ops_ptr->data[state].swpld_addr = ptr->swpld_addr; + ops_ptr->data[state].swpld_addr_offset = ptr->swpld_addr_offset; + ops_ptr->swpld_addr = ptr->swpld_addr; + ops_ptr->swpld_addr_offset = ptr->swpld_addr_offset; + + print_led_data(dev_list[led_type]+ptr->index, state); + + memset(ptr, 0, sizeof(LED_OPS_DATA)); + return (0); +} + +static int show_led_ops_data(struct device_attribute *da) +{ + LED_OPS_DATA* ops_ptr=find_led_ops_data(da); + print_led_data(ops_ptr, -1); + return(0); +} + +static int verify_led_ops_data(struct device_attribute *da) +{ + struct pddf_data_attribute *_ptr = (struct pddf_data_attribute *)da; + LED_OPS_DATA* ptr=(LED_OPS_DATA*)_ptr->addr; + LED_OPS_DATA* ops_ptr=find_led_ops_data(da); + + if(ops_ptr) + memcpy(ptr, ops_ptr, sizeof(LED_OPS_DATA)); + else + { + pddf_dbg(LED, "SYSTEM_LED: verify_led_ops_data: Failed to find ops_ptr name:%s; index=%d\n", ptr->device_name, ptr->index); + } + return (0); +} + + +ssize_t dev_operation(struct device *dev, struct device_attribute *da, const char *buf, size_t count) +{ +#if DEBUG + pddf_dbg(LED, KERN_INFO "dev_operation [%s]\n", buf); +#endif + if(strstr(buf, "STATUS_LED_COLOR")!= NULL) { + LED_STATUS index = find_state_index(buf); + if (index < MAX_LED_STATUS ) { + load_led_ops_data(da, index); + } else { + printk(KERN_ERR "PDDF_ERROR %s: Invalid state for dev_ops %s", __FUNCTION__, buf); + } + } + else if(strncmp(buf, "show", strlen("show"))==0 ) { + show_led_ops_data(da); + } + else if(strncmp(buf, "verify", strlen("verify"))==0 ) { + verify_led_ops_data(da); + } + else if(strncmp(buf, "get_status", strlen("get_status"))==0 ) { + get_status_led(da); + } + else if(strncmp(buf, "set_status", strlen("set_status"))==0 ) { + set_status_led(da); + } + else { + printk(KERN_ERR "PDDF_ERROR %s: Invalid value for dev_ops %s", __FUNCTION__, buf); + } + return(count); +} + +ssize_t store_config_data(struct device *dev, struct device_attribute *da, const char *buf, size_t count) +{ + int ret, num; + struct pddf_data_attribute *ptr = (struct pddf_data_attribute *)da; + if(strncmp(ptr->dev_attr.attr.name, "num_psus", strlen("num_psus"))==0 ) { + ret = kstrtoint(buf,10,&num); + if (ret==0) + *(int *)(ptr->addr) = num; + if(psu_led_ops_data == NULL) { + if ((psu_led_ops_data = kzalloc(num * sizeof(LED_OPS_DATA), GFP_KERNEL)) == NULL) { + printk(KERN_ERR "PDDF_LED ERROR failed to allocate memory for PSU LED\n"); + return (count); + } + pddf_dbg(LED, "Allocate PSU LED Memory ADDR=%p\n", psu_led_ops_data); + dev_list[LED_PSU]=psu_led_ops_data; + } +#if DEBUG + pddf_dbg(LED, "[ WRITE ] ATTR CONFIG [%s] VALUE:%d; %d\n", + ptr->dev_attr.attr.name, num, num_psus); +#endif + return(count); + } + if(strncmp(ptr->dev_attr.attr.name, "num_fantrays", strlen("num_fantrays"))==0 ) { + ret = kstrtoint(buf,10,&num); + if (ret==0) + *(int *)(ptr->addr) = num; + if (fantray_led_ops_data == NULL) { + if ((fantray_led_ops_data = kzalloc(num * sizeof(LED_OPS_DATA), GFP_KERNEL)) == NULL) { + printk(KERN_ERR "PDDF_LED ERROR failed to allocate memory for FANTRAY LED\n"); + return (count); + } + pddf_dbg(LED, "Allocate FanTray LED Memory ADDR=%p\n", fantray_led_ops_data); + dev_list[LED_FANTRAY]=fantray_led_ops_data; + } +#if DEBUG + pddf_dbg(LED, "[ WRITE ] ATTR CONFIG [%s] VALUE:%d; %d\n", + ptr->dev_attr.attr.name, num, num_fantrays); +#endif + return(count); + } + return (count); +} + +ssize_t store_bits_data(struct device *dev, struct device_attribute *da, const char *buf, size_t count) +{ + int len = 0, num1 = 0, num2 = 0, i=0, rc1=0, rc2=0; + char mask=0xFF; + char *pptr=NULL; + char bits[NAME_SIZE]; + struct pddf_data_attribute *ptr = (struct pddf_data_attribute *)da; + MASK_BITS* bits_ptr=(MASK_BITS*)(ptr->addr); + strncpy(bits_ptr->bits, buf, strlen(buf)-1); // to discard newline char form buf + bits_ptr->bits[strlen(buf)-1] = '\0'; + if((pptr=strstr(buf,":")) != NULL) { + len=pptr-buf; + sprintf(bits, buf); + bits[len]='\0'; + rc1=kstrtoint(bits,16,&num1); + if (rc1==0) + { + sprintf(bits, ++pptr); + rc2=kstrtoint(bits,16,&num2); + if (rc2==0) + { + for (i=num2; i<=num1; i++) { + mask &= ~(1 << i); + } + bits_ptr->mask_bits = mask; + bits_ptr->pos = num2; + } + } + } else { + rc1=kstrtoint(buf,16,&num1); + if (rc1==0) + { + bits_ptr->mask_bits = mask & ~(1 << num1); + bits_ptr->pos = num1; + } + } +#if DEBUG + pddf_dbg(LED, KERN_ERR "[ WRITE ] ATTR PTR Bits [%s] VALUE:%s mask:0x%x; pos:0x%x\n", + ptr->dev_attr.attr.name, bits_ptr->bits, bits_ptr->mask_bits, bits_ptr->pos); +#endif + return (count); +} + +/************************************************************************** + * platform/ attributes + **************************************************************************/ +PDDF_LED_DATA_ATTR(platform, num_psus, S_IWUSR|S_IRUGO, show_pddf_data, + store_config_data, PDDF_INT_DEC, sizeof(int), (void*)&num_psus); +PDDF_LED_DATA_ATTR(platform, num_fantrays, S_IWUSR|S_IRUGO, show_pddf_data, + store_config_data, PDDF_INT_DEC, sizeof(int), (void*)&num_fantrays); + +struct attribute* attrs_platform[]={ + &pddf_dev_platform_attr_num_psus.dev_attr.attr, + &pddf_dev_platform_attr_num_fantrays.dev_attr.attr, + NULL, +}; +struct attribute_group attr_group_platform={ + .attrs = attrs_platform, +}; + +/************************************************************************** + * led/ attributes + **************************************************************************/ +PDDF_LED_DATA_ATTR(dev, device_name, S_IWUSR|S_IRUGO, show_pddf_data, + store_pddf_data, PDDF_CHAR, NAME_SIZE, (void*)&temp_data.device_name); +PDDF_LED_DATA_ATTR(dev, index, S_IWUSR|S_IRUGO, show_pddf_data, + store_pddf_data, PDDF_INT_DEC, sizeof(int), (void*)&temp_data.index); +PDDF_LED_DATA_ATTR(dev, swpld_addr, S_IWUSR|S_IRUGO, show_pddf_data, + store_pddf_data, PDDF_INT_HEX, sizeof(int), (void*)&temp_data.swpld_addr); +PDDF_LED_DATA_ATTR(dev, swpld_addr_offset, S_IWUSR|S_IRUGO, show_pddf_data, + store_pddf_data, PDDF_INT_HEX, sizeof(int), (void*)&temp_data.swpld_addr_offset); +PDDF_LED_DATA_ATTR(dev, dev_ops , S_IWUSR, NULL, + dev_operation, PDDF_CHAR, NAME_SIZE, (void*)&temp_data); + +struct attribute* attrs_dev[]={ + &pddf_dev_dev_attr_device_name.dev_attr.attr, + &pddf_dev_dev_attr_index.dev_attr.attr, + &pddf_dev_dev_attr_swpld_addr.dev_attr.attr, + &pddf_dev_dev_attr_swpld_addr_offset.dev_attr.attr, + &pddf_dev_dev_attr_dev_ops.dev_attr.attr, + NULL, +}; +struct attribute_group attr_group_dev={ + .attrs = attrs_dev, +}; + +/************************************************************************** + * state_attr/ attributes + **************************************************************************/ +#define LED_DEV_STATE_ATTR_GROUP(name, func) \ + PDDF_LED_DATA_ATTR(name, bits, S_IWUSR|S_IRUGO, show_pddf_data, \ + store_bits_data, PDDF_CHAR, NAME_SIZE, func.bits.bits); \ + PDDF_LED_DATA_ATTR(name, value, S_IWUSR|S_IRUGO, show_pddf_data, \ + store_pddf_data, PDDF_USHORT, sizeof(unsigned short), func.value); \ + struct attribute* attrs_##name[]={ \ + &pddf_dev_##name##_attr_bits.dev_attr.attr, \ + &pddf_dev_##name##_attr_value.dev_attr.attr, \ + NULL, \ + }; \ + struct attribute_group attr_group_##name={ \ + .attrs = attrs_##name, \ + }; \ + + +LED_DEV_STATE_ATTR_GROUP(state_attr, (void*)&temp_data.data[0]) + + /************************************************************************** + * cur_state/ attributes + **************************************************************************/ + PDDF_LED_DATA_ATTR(cur_state, color, S_IWUSR|S_IRUGO, show_pddf_data, + store_pddf_data, PDDF_CHAR, NAME_SIZE, (void*)&temp_data.cur_state.color); + +struct attribute* attrs_cur_state[]={ + &pddf_dev_cur_state_attr_color.dev_attr.attr, + NULL, +}; +struct attribute_group attr_group_cur_state={ + .attrs = attrs_cur_state, +}; + +/*************************************************************************/ +#define KOBJ_FREE(obj) \ + if(obj) kobject_put(obj); \ + +void free_kobjs(void) +{ + KOBJ_FREE(cur_state_kobj) + KOBJ_FREE(state_attr_kobj) + KOBJ_FREE(led_kobj) + KOBJ_FREE(platform_kobj) +} + +int KBOJ_CREATE(char* name, struct kobject* parent, struct kobject** child) +{ + if (parent) { + *child = kobject_create_and_add(name, parent); + } else { + printk(KERN_ERR "PDDF_LED ERROR to create %s kobj; null parent\n", name); + free_kobjs(); + return (-ENOMEM); + } + return (0); +} + +int LED_DEV_ATTR_CREATE(struct kobject *kobj, const struct attribute_group *attr, const char* name) +{ + int status = sysfs_create_group(kobj, attr); + if(status) { + pddf_dbg(LED, KERN_ERR "Driver ERROR: sysfs_create %s failed rc=%d\n", name, status); + } + return (status); +} + + +static int __init led_init(void) { + struct kobject *device_kobj; + pddf_dbg(LED, KERN_INFO "PDDF GENERIC LED MODULE init..\n"); + + device_kobj = get_device_i2c_kobj(); + if(!device_kobj) + return -ENOMEM; + + KBOJ_CREATE("platform", device_kobj, &platform_kobj); + KBOJ_CREATE("led", device_kobj, &led_kobj); + KBOJ_CREATE("state_attr", led_kobj, &state_attr_kobj); + KBOJ_CREATE("cur_state", led_kobj, &cur_state_kobj); + + LED_DEV_ATTR_CREATE(platform_kobj, &attr_group_platform, "attr_group_platform"); + LED_DEV_ATTR_CREATE(led_kobj, &attr_group_dev, "attr_group_dev"); + LED_DEV_ATTR_CREATE(state_attr_kobj, &attr_group_state_attr, "attr_group_state_attr"); + LED_DEV_ATTR_CREATE(cur_state_kobj, &attr_group_cur_state, "attr_group_cur_state"); + return (0); +} + + +static void __exit led_exit(void) { + pddf_dbg(LED, "PDDF GENERIC LED MODULE exit..\n"); + free_kobjs(); + if(psu_led_ops_data) kfree(psu_led_ops_data); + if(fantray_led_ops_data) kfree(fantray_led_ops_data); +} + +module_init(led_init); +module_exit(led_exit); + +MODULE_AUTHOR("Broadcom"); +MODULE_DESCRIPTION("led driver"); +MODULE_LICENSE("GPL"); diff --git a/platform/broadcom/sonic-platform-modules-ragile/ra-b6920-4s/modules/driver/pddf_custom_psu.c b/platform/broadcom/sonic-platform-modules-ragile/ra-b6920-4s/modules/driver/pddf_custom_psu.c new file mode 100644 index 0000000000..d061bf1ad0 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ragile/ra-b6920-4s/modules/driver/pddf_custom_psu.c @@ -0,0 +1,320 @@ +#include +#include +#include +#include +#include +#include +#include +#include + +#include "../../../../../pddf/i2c/modules/include/pddf_psu_defs.h" +#include "../../../../../pddf/i2c/modules/include/pddf_psu_driver.h" +#include "../../../common/modules/pmbus.h" + +int pddf_custom_psu_present(void *client, PSU_DATA_ATTR *adata, void *data); +long pmbus_reg2data_liner(void *client, int data, int class); +int pddf_custom_psu_power_good(void *client, PSU_DATA_ATTR *adata, void *data); +int smbus_read_byte(struct i2c_client *client, uint8_t offset); +ssize_t pddf_psu_custom_show(struct device *dev, struct device_attribute *da, char *buf); + +extern void *get_device_table(char *name); +extern PSU_SYSFS_ATTR_DATA access_psu_present; +extern PSU_SYSFS_ATTR_DATA access_psu_power_good; +extern PSU_SYSFS_ATTR_DATA access_psu_v_out; + +int pddf_custom_psu_present(void *client, PSU_DATA_ATTR *adata, void *data) +{ + int ret; + struct i2c_client *client_ptr; + struct psu_attr_info *padata; + + ret = -1; + client_ptr = NULL; + padata = (struct psu_attr_info *)data; + + if (strncmp(adata->devtype, "io", strlen("io")) == 0) { + ret = inb(adata->offset); + /* printk("%s read data %x\n", __FUNCTION__, ret); */ + + if (ret < 0) { + return ret; + } + + padata->val.intval = ((ret & adata->mask) == adata->cmpval); + } + + else if (strncmp(adata->devtype, "cpld", strlen("cpld")) == 0) { + client_ptr = (struct i2c_client *)get_device_table(adata->devname); + if (client_ptr) { + ret = i2c_smbus_read_byte_data(client_ptr, adata->offset); + } + + if (ret < 0) { + return ret; + } + + padata->val.intval = ((ret & adata->mask) == adata->cmpval); + } + + return 0; +} + +int pddf_custom_psu_power_good(void *client, PSU_DATA_ATTR *adata, void *data) +{ + int ret; + struct i2c_client *client_ptr; + struct psu_attr_info *padata; + + ret = -1; + client_ptr = NULL; + padata = (struct psu_attr_info *)data; + + if (strncmp(adata->devtype, "io", strlen("io")) == 0) { + ret = inb(adata->offset); + /* printk("%s read data %x\n", __FUNCTION__, ret); */ + + if (ret < 0) { + return ret; + } + + padata->val.intval = ((ret & adata->mask) == adata->cmpval); + } + + else if (strncmp(adata->devtype, "cpld", strlen("cpld")) == 0) { + client_ptr = (struct i2c_client *)get_device_table(adata->devname); + if (client_ptr) { + ret = i2c_smbus_read_byte_data(client_ptr, adata->offset); + } + + if (ret < 0) { + return ret; + } + + padata->val.intval = ((ret & adata->mask) == adata->cmpval); + } + + return 0; +} + +int smbus_read_byte(struct i2c_client *client, uint8_t offset) +{ + int retry; + int status; + + retry = 10; + while (retry) { + status = i2c_smbus_read_byte_data(client, offset); + if (unlikely(status < 0)) { + msleep(60); + retry--; + continue; + } + break; + } + + if (status < 0) { + /* TODO perror*/ + } + + return status; +} + +long pmbus_reg2data_liner(void *client, int data, int class) +{ + s16 exponent; + s32 mantissa; + long val; + int vout_mode; + + vout_mode = smbus_read_byte((struct i2c_client *)client, PMBUS_VOUT_MODE); + /* printk("%s vout mode %x\n", __FUNCTION__, vout_mode); */ + if (vout_mode < 0) { + return 0; + } + + /* LINEAR16 */ + if (class == PSC_VOLTAGE_OUT) { + /* exponent = data->exponent[sensor->page]; */ + exponent = ((s8)(vout_mode << 3)) >> 3; + mantissa = (u16) data; + } else { + /* LINEAR11 */ + exponent = ((s16)data) >> 11; + mantissa = ((s16)((data & 0x7ff) << 5)) >> 5; + } + + val = mantissa; + val = val * 1000L; + + /* scale result to micro-units for power sensors */ + if (class == PSC_POWER) { + val = val * 1000L; + } + + if (exponent >= 0) { + val <<= exponent; + } else { + val >>= -exponent; + } + + /* printk("%s class %d ex %x ma %x val %x\n", __FUNCTION__, class, exponent, mantissa, val); */ + + return val; +} + +int psu_update_attr(struct device *dev, struct psu_attr_info *data, PSU_DATA_ATTR *udata) +{ + int status; + struct i2c_client *client; + PSU_SYSFS_ATTR_DATA *sysfs_attr_data; + + status = 0; + client = to_i2c_client(dev); + sysfs_attr_data = NULL; + + mutex_lock(&data->update_lock); + + if (time_after(jiffies, data->last_updated + HZ + HZ / 2) || !data->valid) { + dev_dbg(&client->dev, "Starting update for %s\n", data->name); + + sysfs_attr_data = udata->access_data; + if (sysfs_attr_data->pre_get != NULL) { + status = (sysfs_attr_data->pre_get)(client, udata, data); + if (status != 0) { + printk(KERN_ERR "%s: pre_get function fails for %s attribute\n", __FUNCTION__, udata->aname); + } + } + if (sysfs_attr_data->do_get != NULL) { + status = (sysfs_attr_data->do_get)(client, udata, data); + if (status != 0) { + printk(KERN_ERR "%s: do_get function fails for %s attribute\n", __FUNCTION__, udata->aname); + } + } + if (sysfs_attr_data->post_get != NULL) { + status = (sysfs_attr_data->post_get)(client, udata, data); + if (status != 0) { + printk(KERN_ERR "%s: post_get function fails for %s attribute\n", __FUNCTION__, udata->aname); + } + } + + data->last_updated = jiffies; + data->valid = 1; + } + + mutex_unlock(&data->update_lock); + + return 0; +} + +void get_psu_duplicate_sysfs(int idx, char *str) +{ + switch (idx) { + case PSU_V_OUT: + strcpy(str, "in3_input"); + break; + case PSU_I_OUT: + strcpy(str, "curr2_input"); + break; + case PSU_P_OUT: + strcpy(str, "power2_input"); + break; + case PSU_FAN1_SPEED: + strcpy(str, "fan1_input"); + break; + case PSU_TEMP1_INPUT: + strcpy(str, "temp1_input"); + break; + default: + break; + } + + return; +} + +ssize_t pddf_psu_custom_show(struct device *dev, struct device_attribute *da, char *buf) +{ + struct sensor_device_attribute *attr; + struct i2c_client *client; + struct psu_data *data; + + PSU_PDATA *pdata; + PSU_DATA_ATTR *usr_data; + PSU_SYSFS_ATTR_DATA *ptr; + struct psu_attr_info *sysfs_attr_info; + int i; + int status; + char new_str[ATTR_NAME_LEN]; + + attr = to_sensor_dev_attr(da); + client = to_i2c_client(dev); + data = i2c_get_clientdata(client); + + pdata = (PSU_PDATA *)(client->dev.platform_data); + usr_data = NULL; + ptr = NULL; + sysfs_attr_info = NULL; + status = 0; + memset(new_str, 0, ATTR_NAME_LEN); + + for (i = 0; i < data->num_attr; i++) { + ptr = (PSU_SYSFS_ATTR_DATA *)pdata->psu_attrs[i].access_data; + get_psu_duplicate_sysfs(ptr->index , new_str); + if (strcmp(attr->dev_attr.attr.name, pdata->psu_attrs[i].aname) == 0 || \ + strcmp(attr->dev_attr.attr.name, new_str) == 0 ) { + sysfs_attr_info = &data->attr_info[i]; + usr_data = &pdata->psu_attrs[i]; + /* strcpy(new_str, ""); */ + } + } + + if (sysfs_attr_info == NULL || usr_data == NULL) { + printk(KERN_ERR "%s is not supported attribute for this client\n", attr->dev_attr.attr.name); + goto exit; + } + + psu_update_attr(dev, sysfs_attr_info, usr_data); + + switch(attr->index) { + case PSU_V_OUT: + status = pmbus_reg2data_liner(client, sysfs_attr_info->val.shortval, PSC_VOLTAGE_OUT); + break; + case PSU_P_OUT: + status = pmbus_reg2data_liner(client, sysfs_attr_info->val.shortval, PSC_POWER); + break; + case PSU_I_OUT: + case PSU_V_IN: + case PSU_I_IN: + case PSU_TEMP1_INPUT: + status = pmbus_reg2data_liner(client, sysfs_attr_info->val.shortval, PSC_NUM_CLASSES); + break; + default: + printk(KERN_ERR "%s: Unable to find attribute index for %s\n", __FUNCTION__, usr_data->aname); + goto exit; + } + +exit: + return sprintf(buf, "%d\n", status); +} + +int __init pddf_custom_psu_init(void) +{ + access_psu_present.do_get = pddf_custom_psu_present; + access_psu_power_good.do_get = pddf_custom_psu_power_good; + access_psu_v_out.show = pddf_psu_custom_show; + printk(KERN_ERR "pddf_custom_psu_init\n"); + return 0; +} + +void __exit pddf_custom_psu_exit(void) +{ + printk(KERN_ERR "pddf_custom_psu_exit\n"); + return; +} + +MODULE_AUTHOR("support "); +MODULE_DESCRIPTION("pddf custom psu api"); +MODULE_LICENSE("GPL"); + +module_init(pddf_custom_psu_init); +module_exit(pddf_custom_psu_exit); + diff --git a/platform/broadcom/sonic-platform-modules-ragile/ra-b6920-4s/modules/driver/pddf_custom_xcvr.c b/platform/broadcom/sonic-platform-modules-ragile/ra-b6920-4s/modules/driver/pddf_custom_xcvr.c new file mode 100644 index 0000000000..5aa155ce0a --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ragile/ra-b6920-4s/modules/driver/pddf_custom_xcvr.c @@ -0,0 +1,77 @@ +#include +#include +#include "../../../../../pddf/i2c/modules/include/pddf_xcvr_defs.h" +#include "../../../../../pddf/i2c/modules/include/pddf_xcvr_api.h" + +extern void *get_device_table(char *name); +extern XCVR_SYSFS_ATTR_OPS xcvr_ops[]; + +int pddf_custom_xcvr_pres(struct i2c_client *client, XCVR_ATTR *info, struct xcvr_data *data); +int pddf_custom_xcvr_reset(struct i2c_client *client, XCVR_ATTR *info, struct xcvr_data *data); + +int pddf_custom_xcvr_pres(struct i2c_client *client, XCVR_ATTR *info, struct xcvr_data *data) +{ + int status; + uint32_t modpres; + + status = 0; + modpres = 0; + if (strcmp(info->devtype, "cpld") == 0 && info->devname) { + client = (struct i2c_client *)get_device_table(info->devname); + status = i2c_smbus_read_byte_data(client, info->offset); + if (status < 0) { + return status; + } else { + modpres = ((status & BIT_INDEX(info->mask)) == info->cmpval) ? 1 : 0; + /* printk(KERN_INFO "\nMod presence :0x%x, reg_value = 0x%x, devaddr=0x%x, mask=0x%x, offset=0x%x\n", modpres, status, info->devaddr, info->mask, info->offset); */ + } + } + + data->modpres = modpres; + return 0; +} + +int pddf_custom_xcvr_reset(struct i2c_client *client, XCVR_ATTR *info, struct xcvr_data *data) +{ + int status; + uint32_t modreset; + + status = 0; + modreset = 0; + if (strcmp(info->devtype, "cpld") == 0 && info->devname) { + client = (struct i2c_client *)get_device_table(info->devname); + status = i2c_smbus_read_byte_data(client, info->offset); + if (status < 0) { + return status; + } else { + modreset = ((status & BIT_INDEX(info->mask)) == info->cmpval) ? 1 : 0; + /* printk(KERN_INFO "\nMod Reset :0x%x, reg_value = 0x%x\n", modreset, status); */ + } + } + + data->reset = modreset; + return 0; +} + +int __init pddf_custom_xcvr_init(void) +{ + xcvr_ops[0].do_get = pddf_custom_xcvr_pres; + xcvr_ops[1].do_get = pddf_custom_xcvr_reset; + + printk(KERN_ERR "pddf_custom_xcvr_init\n"); + return 0; +} + +void __exit pddf_custom_xcvr_exit(void) +{ + printk(KERN_ERR "pddf_custom_xcvr_exit\n"); + return; +} + +MODULE_AUTHOR("support "); +MODULE_DESCRIPTION("pddf custom xcvr api"); +MODULE_LICENSE("GPL"); + +module_init(pddf_custom_xcvr_init); +module_exit(pddf_custom_xcvr_exit); + diff --git a/platform/broadcom/sonic-platform-modules-ragile/ra-b6920-4s/modules/driver/ragile.h b/platform/broadcom/sonic-platform-modules-ragile/ra-b6920-4s/modules/driver/ragile.h new file mode 100755 index 0000000000..72e0907a91 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ragile/ra-b6920-4s/modules/driver/ragile.h @@ -0,0 +1,117 @@ +#ifndef __RAGILE_H__ +#define __RAGILE_H__ + +#include +#include + +/* debgu level */ +typedef enum { + DBG_START, + DBG_VERBOSE, + DBG_KEY, + DBG_WARN, + DBG_ERROR, + DBG_END, +} dbg_level_t; + +typedef enum dfd_cpld_id { + BCM_CPLD0 = 0, + BCM_CPLD1, + CPLD0_MAC0, + CPLD0_MAC1, + CPLD1_MAC0, + CPLD2_MAC1, +} dfd_cpld_id_t; + + typedef enum dfd_cpld_bus { + SMBUS_BUS = 0 , + PCA9641_BUS = 1, + GPIO_BUS = 2, +} dfd_cpld_bus_t; + + typedef struct dfd_i2c_dev_s { + int bus; + int addr; + } dfd_i2c_dev_t; + + typedef enum dfd_cpld_addr { + CPLD_ADDR_MIN = 0x31, + BCM_CPLD0_ADDR = 0x32, + CPLD0_MAC0_ADDR = 0x33, + CPLD0_MAC1_ADDR = 0x34, + CPLD1_MAC0_ADDR = 0x35, + CPLD2_MAC1_ADDR = 0x36, + BCM_CPLD1_ADDR = 0x37, + CPLD_ADDR_MAX, +} dfd_cpld_addr_t; + +typedef struct dfd_dev_head_info_s { + uint8_t ver; + uint8_t flag; + uint8_t hw_ver; + uint8_t type; + int16_t tlv_len; +} dfd_dev_head_info_t; + +typedef enum dfd_intf_e{ + DFD_INTF_GET_FAN_HW_VERSION, + DFD_INTF_GET_FAN_STATUS, + DFD_INTF_GET_FAN_SPEED_LEVEL, + DFD_INTF_GET_FAN_SPEED, + DFD_INTF_GET_FAN_ATTRIBUTE, + DFD_INTF_GET_FAN_SN, + DFD_INTF_GET_FAN_TYPE, + DFD_INTF_SET_FAN_SPEED_LEVEL, + DFD_INTF_GET_FAN_SUB_NUM, + DFD_INTF_GET_FAN_FAIL_BITMAP, +}dfd_intf_t; + +typedef struct dfd_dev_tlv_info_s { + uint8_t type; + uint8_t len; + uint8_t data[0]; +} dfd_dev_tlv_info_t; + +typedef enum dfd_dev_info_type_e { + DFD_DEV_INFO_TYPE_MAC = 1, + DFD_DEV_INFO_TYPE_NAME = 2, + DFD_DEV_INFO_TYPE_SN = 3, + DFD_DEV_INFO_TYPE_PWR_CONS = 4, + DFD_DEV_INFO_TYPE_HW_INFO = 5, + DFD_DEV_INFO_TYPE_DEV_TYPE = 6, +} dfd_dev_tlv_type_t; + +typedef struct i2c_muxs_struct_flag +{ + int nr; + char name[48]; + struct mutex update_lock; + int flag; +}i2c_mux_flag; + +extern int setpca9641_muxflag(i2c_mux_flag i2c); +extern i2c_mux_flag getpca9641_muxflag(void) ; + +extern int debuglevel; +extern int dfd_cpld_read_chipid(int cpldid , uint32_t addr, int32_t size, unsigned char *buf); +extern int dfd_cpld_read(int32_t addr, uint8_t *val); +extern int dfd_cpld_write(int32_t addr, uint8_t val); +extern int ragile_setdebug(int val); + +#define DBG_DEBUG(fmt, arg...) do { \ + if ( debuglevel > DBG_START && debuglevel < DBG_ERROR) { \ + printk(KERN_INFO "[DEBUG]:<%s, %d>:"fmt, __FUNCTION__, __LINE__, ##arg); \ + } else if ( debuglevel >= DBG_ERROR ) { \ + printk(KERN_ERR "[DEBUG]:<%s, %d>:"fmt, __FUNCTION__, __LINE__, ##arg); \ + } else { } \ +} while (0) + +#define DBG_ERROR(fmt, arg...) do { \ + if ( debuglevel > DBG_START) { \ + printk(KERN_ERR "[ERROR]:<%s, %d>:"fmt, __FUNCTION__, __LINE__, ##arg); \ + } \ + } while (0) + +#define COMMON_STR_LEN (256) + +#endif diff --git a/platform/broadcom/sonic-platform-modules-ragile/ra-b6920-4s/modules/driver/rg_cpld.c b/platform/broadcom/sonic-platform-modules-ragile/ra-b6920-4s/modules/driver/rg_cpld.c new file mode 100644 index 0000000000..7d9fc82a69 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ragile/ra-b6920-4s/modules/driver/rg_cpld.c @@ -0,0 +1,559 @@ +/* + * rg_cpld.c - A driver for control rg_cpld base on rg_cpld.c + * + * Copyright (c) 1998, 1999 Frodo Looijaard + * Copyright (c) 2018 support + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + + +/* debug level */ +typedef enum { + DBG_START, + DBG_VERBOSE, + DBG_KEY, + DBG_WARN, + DBG_ERROR, + DBG_END, +} dbg_level_t; + +static int debuglevel=0; +module_param(debuglevel, int, S_IRUGO); + +#define DBG_DEBUG(fmt, arg...) do { \ + if ( debuglevel > DBG_START && debuglevel < DBG_ERROR) { \ + printk(KERN_INFO "[DEBUG]:<%s, %d>:"fmt, __FUNCTION__, __LINE__, ##arg); \ + } else if ( debuglevel >= DBG_ERROR ) { \ + printk(KERN_ERR "[DEBUG]:<%s, %d>:"fmt, __FUNCTION__, __LINE__, ##arg); \ + } else { } \ +} while (0) + +#define DBG_ERROR(fmt, arg...) do { \ + if ( debuglevel > DBG_START) { \ + printk(KERN_ERR "[ERROR]:<%s, %d>:"fmt, __FUNCTION__, __LINE__, ##arg); \ + } \ + } while (0) + +static const unsigned short rg_i2c_cpld[] = { 0x32, 0x33, 0x34, 0x35, 0x36, 0x37, I2C_CLIENT_END }; + +#define CPLD_SIZE 256 +#define CPLD_I2C_RETRY_TIMES 3 +#define COMMON_STR_LEN (256) + +struct cpld_data { + struct i2c_client *client; + struct device *hwmon_dev; + struct mutex update_lock; + char valid; /* !=0 if registers are valid */ + unsigned long last_updated; /* In jiffies */ + u8 data[CPLD_SIZE]; /* Register value */ +}; + +static s32 cpld_i2c_smbus_read_byte_data(const struct i2c_client *client, u8 command) +{ + int try; + s32 ret; + + ret = -1; + for (try = 0; try < CPLD_I2C_RETRY_TIMES; try++) { + if ((ret = i2c_smbus_read_byte_data(client, command) ) >= 0 ) + break; + } + return ret; +} + +static s32 cpld_i2c_smbus_read_i2c_block_data(const struct i2c_client *client, + u8 command, u8 length, u8 *values) +{ + int try; + s32 ret; + + ret = -1; + for (try = 0; try < CPLD_I2C_RETRY_TIMES; try++) { + if ((ret = i2c_smbus_read_i2c_block_data(client, command, length, values) ) >= 0 ) + break; + } + return ret; +} + +static ssize_t show_fan_rpm_value(struct device *dev, struct device_attribute *da, char *buf) +{ + struct cpld_data *data = dev_get_drvdata(dev); + struct i2c_client *client = data->client; + int index = to_sensor_dev_attr_2(da)->index; + uint8_t size; + s32 status; + s32 ret_t; + u8 tmp[2]; + + ret_t = 0; + status = -1; + size = 0; + memset(tmp, 0, sizeof(tmp)); + + mutex_lock(&data->update_lock); + status = cpld_i2c_smbus_read_byte_data(client, index); + if (status < 0) { + mutex_unlock(&data->update_lock); + return 0; + } + tmp[0] = status; + status = cpld_i2c_smbus_read_byte_data(client, index + 1); + if (status < 0) { + mutex_unlock(&data->update_lock); + return 0; + } + tmp[1] = status; + DBG_DEBUG("cpld reg pos:0x%x value:0x%x\n", index, tmp[0]); + DBG_DEBUG("cpld reg pos:0x%x value:0x%x\n", index + 1, tmp[1]); + ret_t = (tmp[1] << 8) + tmp[0]; + if (ret_t == 0 ) { + size = snprintf(buf, CPLD_SIZE, "%d\n", ret_t); + } else if (ret_t == 0xffff) { + size = snprintf(buf, CPLD_SIZE, "%d\n", 0); + } else { + size = snprintf(buf, CPLD_SIZE, "%d\n", 15000000 / ret_t); + } + mutex_unlock(&data->update_lock); + return size; +} + +static ssize_t set_cpld_sysfs_value(struct device *dev, struct device_attribute *da, const char *buf, size_t +count) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct i2c_client *client = to_i2c_client(dev); + struct cpld_data *data = i2c_get_clientdata(client); + unsigned long val; + int err; + + err = kstrtoul(buf, 16, &val); + if (err) + return err; + if ((val < 0) || (val > 0xff)) { + DBG_ERROR("please enter 0x00 ~ 0xff\n"); + return -1; + } + mutex_lock(&data->update_lock); + val = (u8)val; + DBG_DEBUG("pos: 0x%02x count = %ld, data = 0x%02x\n", attr->index, count, val); + i2c_smbus_write_byte_data(client, attr->index, val); + mutex_unlock(&data->update_lock); + + return count; +} + +static ssize_t show_cpld_version(struct device *dev, struct device_attribute *da, char *buf) +{ + struct i2c_client *client = to_i2c_client(dev); + struct cpld_data *data = i2c_get_clientdata(client); + s32 status; + u8 tmp[4]; + + memset(tmp, 0, sizeof(tmp)); + status = -1; + mutex_lock(&data->update_lock); + status = cpld_i2c_smbus_read_i2c_block_data(client, 0, 4, tmp); + if (status < 0) { + mutex_unlock(&data->update_lock); + return 0; + } + mutex_unlock(&data->update_lock); + return snprintf(buf, COMMON_STR_LEN, "%02x %02x %02x %02x \n", tmp[0], tmp[1], tmp[2], tmp[3]); +} + +static ssize_t show_cpld_sysfs_value(struct device *dev, struct device_attribute *da, char *buf) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct i2c_client *client = to_i2c_client(dev); + struct cpld_data *data = i2c_get_clientdata(client); + s32 status; + + status = -1; + mutex_lock(&data->update_lock); + status = cpld_i2c_smbus_read_byte_data(client, attr->index); + if (status < 0) { + mutex_unlock(&data->update_lock); + return 0; + } + DBG_DEBUG("cpld reg pos:0x%x value:0x%02x\n", attr->index, status); + mutex_unlock(&data->update_lock); + return snprintf(buf, COMMON_STR_LEN, "%02x\n", status); +} + +/* common */ +static SENSOR_DEVICE_ATTR(cpld_version, S_IRUGO | S_IWUSR, show_cpld_version, NULL, 0); +static SENSOR_DEVICE_ATTR(cpld_card_id, S_IRUGO, show_cpld_sysfs_value, NULL, 0x04); +static SENSOR_DEVICE_ATTR(cpld_card_index, S_IRUGO, show_cpld_sysfs_value, NULL, 0x05); + +/* FAN speed rpm */ +static SENSOR_DEVICE_ATTR(fan1_input, S_IRUGO | S_IWUSR ,show_fan_rpm_value, NULL, 0x1B); +static SENSOR_DEVICE_ATTR(fan5_input, S_IRUGO | S_IWUSR ,show_fan_rpm_value, NULL, 0x1D); +static SENSOR_DEVICE_ATTR(fan9_input, S_IRUGO | S_IWUSR ,show_fan_rpm_value, NULL, 0x1F); +static SENSOR_DEVICE_ATTR(fan2_input, S_IRUGO | S_IWUSR ,show_fan_rpm_value, NULL, 0x25); +static SENSOR_DEVICE_ATTR(fan6_input, S_IRUGO | S_IWUSR ,show_fan_rpm_value, NULL, 0x27); +static SENSOR_DEVICE_ATTR(fan10_input, S_IRUGO | S_IWUSR ,show_fan_rpm_value, NULL, 0x29); + +static SENSOR_DEVICE_ATTR(fan3_input, S_IRUGO | S_IWUSR ,show_fan_rpm_value, NULL, 0x1B); +static SENSOR_DEVICE_ATTR(fan7_input, S_IRUGO | S_IWUSR ,show_fan_rpm_value, NULL, 0x1D); +static SENSOR_DEVICE_ATTR(fan11_input, S_IRUGO | S_IWUSR ,show_fan_rpm_value, NULL, 0x1F); +static SENSOR_DEVICE_ATTR(fan4_input, S_IRUGO | S_IWUSR ,show_fan_rpm_value, NULL, 0x25); +static SENSOR_DEVICE_ATTR(fan8_input, S_IRUGO | S_IWUSR ,show_fan_rpm_value, NULL, 0x27); +static SENSOR_DEVICE_ATTR(fan12_input, S_IRUGO | S_IWUSR ,show_fan_rpm_value, NULL, 0x29); + +/*FAN speed */ +static SENSOR_DEVICE_ATTR(fan1_speed_set, S_IRUGO | S_IWUSR, show_cpld_sysfs_value, set_cpld_sysfs_value, 0x14); +static SENSOR_DEVICE_ATTR(fan2_speed_set, S_IRUGO | S_IWUSR, show_cpld_sysfs_value, set_cpld_sysfs_value, 0x14); +static SENSOR_DEVICE_ATTR(fan3_speed_set, S_IRUGO | S_IWUSR, show_cpld_sysfs_value, set_cpld_sysfs_value, 0x15); +static SENSOR_DEVICE_ATTR(fan4_speed_set, S_IRUGO | S_IWUSR, show_cpld_sysfs_value, set_cpld_sysfs_value, 0x15); +static SENSOR_DEVICE_ATTR(fan5_speed_set, S_IRUGO | S_IWUSR, show_cpld_sysfs_value, set_cpld_sysfs_value, 0x16); +static SENSOR_DEVICE_ATTR(fan6_speed_set, S_IRUGO | S_IWUSR, show_cpld_sysfs_value, set_cpld_sysfs_value, 0x16); + +static SENSOR_DEVICE_ATTR(fan1_1_real_speed, S_IRUGO, show_fan_rpm_value, NULL, 0x1B); +static SENSOR_DEVICE_ATTR(fan2_1_real_speed, S_IRUGO, show_fan_rpm_value, NULL, 0x1B); +static SENSOR_DEVICE_ATTR(fan3_1_real_speed, S_IRUGO, show_fan_rpm_value, NULL, 0x1D); +static SENSOR_DEVICE_ATTR(fan4_1_real_speed, S_IRUGO, show_fan_rpm_value, NULL, 0x1D); +static SENSOR_DEVICE_ATTR(fan5_1_real_speed, S_IRUGO, show_fan_rpm_value, NULL, 0x1F); +static SENSOR_DEVICE_ATTR(fan6_1_real_speed, S_IRUGO, show_fan_rpm_value, NULL, 0x1F); +static SENSOR_DEVICE_ATTR(fan1_2_real_speed, S_IRUGO, show_fan_rpm_value, NULL, 0x25); +static SENSOR_DEVICE_ATTR(fan2_2_real_speed, S_IRUGO, show_fan_rpm_value, NULL, 0x25); +static SENSOR_DEVICE_ATTR(fan3_2_real_speed, S_IRUGO, show_fan_rpm_value, NULL, 0x27); +static SENSOR_DEVICE_ATTR(fan4_2_real_speed, S_IRUGO, show_fan_rpm_value, NULL, 0x27); +static SENSOR_DEVICE_ATTR(fan5_2_real_speed, S_IRUGO, show_fan_rpm_value, NULL, 0x29); +static SENSOR_DEVICE_ATTR(fan6_2_real_speed, S_IRUGO, show_fan_rpm_value, NULL, 0x29); + +/*FAN led register */ +static SENSOR_DEVICE_ATTR(fan1_led, S_IRUGO | S_IWUSR, show_cpld_sysfs_value, set_cpld_sysfs_value, 0x3B); +static SENSOR_DEVICE_ATTR(fan2_led, S_IRUGO | S_IWUSR, show_cpld_sysfs_value, set_cpld_sysfs_value, 0x3B); +static SENSOR_DEVICE_ATTR(fan3_led, S_IRUGO | S_IWUSR, show_cpld_sysfs_value, set_cpld_sysfs_value, 0x3C); +static SENSOR_DEVICE_ATTR(fan4_led, S_IRUGO | S_IWUSR, show_cpld_sysfs_value, set_cpld_sysfs_value, 0x3C); +static SENSOR_DEVICE_ATTR(fan5_led, S_IRUGO | S_IWUSR, show_cpld_sysfs_value, set_cpld_sysfs_value, 0x3D); +static SENSOR_DEVICE_ATTR(fan6_led, S_IRUGO | S_IWUSR, show_cpld_sysfs_value, set_cpld_sysfs_value, 0x3D); +static SENSOR_DEVICE_ATTR(fan_led_control, S_IRUGO | S_IWUSR, show_cpld_sysfs_value, set_cpld_sysfs_value, 0x40); + +/* FAN present */ +static SENSOR_DEVICE_ATTR(fan_present, S_IRUGO, show_cpld_sysfs_value, NULL, 0x30); + +/* FAN status */ +static SENSOR_DEVICE_ATTR(fan_status1, S_IRUGO, show_cpld_sysfs_value, NULL, 0x31); +static SENSOR_DEVICE_ATTR(fan_status2, S_IRUGO, show_cpld_sysfs_value, NULL, 0x34); + +/* 0x30 */ +/* sfp 1-16 present register */ +static SENSOR_DEVICE_ATTR(sfp_presence1, S_IRUGO, show_cpld_sysfs_value, NULL, 0x10); +static SENSOR_DEVICE_ATTR(sfp_presence2, S_IRUGO, show_cpld_sysfs_value, NULL, 0x11); + +/* sfp 1-16 led register */ +static SENSOR_DEVICE_ATTR(sfp_led1, S_IRUGO | S_IWUSR, show_cpld_sysfs_value, set_cpld_sysfs_value, 0x18); +static SENSOR_DEVICE_ATTR(sfp_led2, S_IRUGO | S_IWUSR, show_cpld_sysfs_value, set_cpld_sysfs_value, 0x19); +static SENSOR_DEVICE_ATTR(sfp_led_reset, S_IRUGO | S_IWUSR, show_cpld_sysfs_value, set_cpld_sysfs_value, 0xa0); + + +/* 0x31*/ +/* sfp 17-32 present register */ +static SENSOR_DEVICE_ATTR(sfp_presence3, S_IRUGO, show_cpld_sysfs_value, NULL, 0x10); +static SENSOR_DEVICE_ATTR(sfp_presence4, S_IRUGO, show_cpld_sysfs_value, NULL, 0x11); + +/* sfp 17-32 led register */ +static SENSOR_DEVICE_ATTR(sfp_led3, S_IRUGO | S_IWUSR ,show_cpld_sysfs_value, set_cpld_sysfs_value, 0x18); +static SENSOR_DEVICE_ATTR(sfp_led4, S_IRUGO | S_IWUSR ,show_cpld_sysfs_value, set_cpld_sysfs_value, 0x19); + +static SENSOR_DEVICE_ATTR(sfp_reset1, S_IRUGO | S_IWUSR ,show_cpld_sysfs_value, set_cpld_sysfs_value, 0x14); +static SENSOR_DEVICE_ATTR(sfp_reset2, S_IRUGO | S_IWUSR ,show_cpld_sysfs_value, set_cpld_sysfs_value, 0x15); +static SENSOR_DEVICE_ATTR(sfp_reset3, S_IRUGO | S_IWUSR ,show_cpld_sysfs_value, set_cpld_sysfs_value, 0x14); +static SENSOR_DEVICE_ATTR(sfp_reset4, S_IRUGO | S_IWUSR ,show_cpld_sysfs_value, set_cpld_sysfs_value, 0x15); + + +static struct attribute *cpld_bus14_addr_0x0d_sysfs_attrs[] = { + &sensor_dev_attr_cpld_version.dev_attr.attr, + &sensor_dev_attr_cpld_card_id.dev_attr.attr, + &sensor_dev_attr_cpld_card_index.dev_attr.attr, + &sensor_dev_attr_fan1_speed_set.dev_attr.attr, + &sensor_dev_attr_fan3_speed_set.dev_attr.attr, + &sensor_dev_attr_fan5_speed_set.dev_attr.attr, + &sensor_dev_attr_fan1_1_real_speed.dev_attr.attr, + &sensor_dev_attr_fan3_1_real_speed.dev_attr.attr, + &sensor_dev_attr_fan5_1_real_speed.dev_attr.attr, + &sensor_dev_attr_fan1_2_real_speed.dev_attr.attr, + &sensor_dev_attr_fan3_2_real_speed.dev_attr.attr, + &sensor_dev_attr_fan5_2_real_speed.dev_attr.attr, + &sensor_dev_attr_fan_present.dev_attr.attr, + &sensor_dev_attr_fan_status1.dev_attr.attr, + &sensor_dev_attr_fan_status2.dev_attr.attr, + &sensor_dev_attr_fan1_led.dev_attr.attr, + &sensor_dev_attr_fan3_led.dev_attr.attr, + &sensor_dev_attr_fan5_led.dev_attr.attr, + &sensor_dev_attr_fan_led_control.dev_attr.attr, + NULL +}; + +static struct attribute *cpld_bus13_addr_0x0d_sysfs_attrs[] = { + &sensor_dev_attr_cpld_version.dev_attr.attr, + &sensor_dev_attr_cpld_card_id.dev_attr.attr, + &sensor_dev_attr_cpld_card_index.dev_attr.attr, + &sensor_dev_attr_fan2_speed_set.dev_attr.attr, + &sensor_dev_attr_fan4_speed_set.dev_attr.attr, + &sensor_dev_attr_fan6_speed_set.dev_attr.attr, + &sensor_dev_attr_fan2_1_real_speed.dev_attr.attr, + &sensor_dev_attr_fan4_1_real_speed.dev_attr.attr, + &sensor_dev_attr_fan6_1_real_speed.dev_attr.attr, + &sensor_dev_attr_fan2_2_real_speed.dev_attr.attr, + &sensor_dev_attr_fan4_2_real_speed.dev_attr.attr, + &sensor_dev_attr_fan6_2_real_speed.dev_attr.attr, + &sensor_dev_attr_fan_present.dev_attr.attr, + &sensor_dev_attr_fan_status1.dev_attr.attr, + &sensor_dev_attr_fan_status2.dev_attr.attr, + &sensor_dev_attr_fan2_led.dev_attr.attr, + &sensor_dev_attr_fan4_led.dev_attr.attr, + &sensor_dev_attr_fan6_led.dev_attr.attr, + &sensor_dev_attr_fan_led_control.dev_attr.attr, + NULL +}; + +static struct attribute *slot_cpld_addr_0x30_sysfs_attrs[] = { + &sensor_dev_attr_sfp_presence1.dev_attr.attr, + &sensor_dev_attr_sfp_presence2.dev_attr.attr, + &sensor_dev_attr_sfp_led1.dev_attr.attr, + &sensor_dev_attr_sfp_led2.dev_attr.attr, + &sensor_dev_attr_cpld_version.dev_attr.attr, + &sensor_dev_attr_sfp_led_reset.dev_attr.attr, + &sensor_dev_attr_sfp_reset1.dev_attr.attr, + &sensor_dev_attr_sfp_reset2.dev_attr.attr, + NULL +}; + +static struct attribute *slot_cpld_addr_0x31_sysfs_attrs[] = { + &sensor_dev_attr_sfp_presence3.dev_attr.attr, + &sensor_dev_attr_sfp_presence4.dev_attr.attr, + &sensor_dev_attr_sfp_led3.dev_attr.attr, + &sensor_dev_attr_sfp_led4.dev_attr.attr, + &sensor_dev_attr_cpld_version.dev_attr.attr, + &sensor_dev_attr_sfp_led_reset.dev_attr.attr, + &sensor_dev_attr_sfp_reset3.dev_attr.attr, + &sensor_dev_attr_sfp_reset4.dev_attr.attr, + NULL +}; + + +static const struct attribute_group cpld_bus14_addr_0x0d_sysfs_group = { + .attrs = cpld_bus14_addr_0x0d_sysfs_attrs, +}; + +static const struct attribute_group cpld_bus13_addr_0x0d_sysfs_group = { + .attrs = cpld_bus13_addr_0x0d_sysfs_attrs, +}; + +static const struct attribute_group slot_cpld_addr_0x30_sysfs_group = { + .attrs = slot_cpld_addr_0x30_sysfs_attrs, +}; + +static const struct attribute_group slot_cpld_addr_0x31_sysfs_group = { + .attrs = slot_cpld_addr_0x31_sysfs_attrs, +}; + + +static struct attribute *cpld_hwmon_bus14_attrs[] = { + &sensor_dev_attr_fan1_input.dev_attr.attr, + &sensor_dev_attr_fan5_input.dev_attr.attr, + &sensor_dev_attr_fan9_input.dev_attr.attr, + &sensor_dev_attr_fan2_input.dev_attr.attr, + &sensor_dev_attr_fan6_input.dev_attr.attr, + &sensor_dev_attr_fan10_input.dev_attr.attr, + NULL +}; +static struct attribute *cpld_hwmon_bus13_attrs[] = { + &sensor_dev_attr_fan3_input.dev_attr.attr, + &sensor_dev_attr_fan7_input.dev_attr.attr, + &sensor_dev_attr_fan11_input.dev_attr.attr, + &sensor_dev_attr_fan4_input.dev_attr.attr, + &sensor_dev_attr_fan8_input.dev_attr.attr, + &sensor_dev_attr_fan12_input.dev_attr.attr, + NULL +}; +ATTRIBUTE_GROUPS(cpld_hwmon_bus14); +ATTRIBUTE_GROUPS(cpld_hwmon_bus13); + +struct cpld_attr_match_group { + int bus_nr; + unsigned short addr; + const struct attribute_group *attr_group_ptr; + const struct attribute_group *attr_hwmon_ptr; +}; + +static struct cpld_attr_match_group g_cpld_attr_match[] = { + {14, 0x0D, &cpld_bus14_addr_0x0d_sysfs_group, (struct attribute_group *)cpld_hwmon_bus14_groups}, + {13, 0x0D, &cpld_bus13_addr_0x0d_sysfs_group, (struct attribute_group *)cpld_hwmon_bus13_groups}, + {3, 0x30, &slot_cpld_addr_0x30_sysfs_group,NULL }, + {3, 0x31, &slot_cpld_addr_0x31_sysfs_group, NULL}, + {4, 0x30, &slot_cpld_addr_0x30_sysfs_group,NULL }, + {4, 0x31, &slot_cpld_addr_0x31_sysfs_group, NULL}, + {5, 0x30, &slot_cpld_addr_0x30_sysfs_group,NULL }, + {5, 0x31, &slot_cpld_addr_0x31_sysfs_group, NULL}, + {6, 0x30, &slot_cpld_addr_0x30_sysfs_group,NULL }, + {6, 0x31, &slot_cpld_addr_0x31_sysfs_group, NULL}, +}; + +static const struct attribute_group *cpld_get_attr_group(struct i2c_client *client, int is_hwmon) +{ + int i; + struct cpld_attr_match_group *group; + + for (i = 0; i < ARRAY_SIZE(g_cpld_attr_match); i++) { + group = &g_cpld_attr_match[i]; + DBG_DEBUG("is_hwmon %d i %d client(nr:%d,addr:0x%x), group(nr:%d,addr:0x0%x) .\n", is_hwmon, + i, client->adapter->nr, client->addr, group->bus_nr, group->addr); + if ((client->addr == group->addr) && (client->adapter->nr == group->bus_nr)) { + DBG_DEBUG("is_hwmon %d i %d nr %d addr %d .\n", is_hwmon, i, client->adapter->nr, client->addr); + return (is_hwmon) ? (group->attr_hwmon_ptr) : (group->attr_group_ptr); + } + } + + DBG_DEBUG("is_hwmon %d nr %d addr %d dismatch, return NULL.\n", is_hwmon, client->adapter->nr, client->addr); + return NULL; +} + +#if 0 +static int cpld_detect(struct i2c_client *new_client, struct i2c_board_info *info) +{ + struct i2c_adapter *adapter = new_client->adapter; + int conf; + DBG_DEBUG("=========cpld_detect(0x%x)===========\n", new_client->addr); + if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE_DATA | + I2C_FUNC_SMBUS_WORD_DATA)) + return -ENODEV; + conf = i2c_smbus_read_byte_data(new_client, 0); + if (!conf) + return -ENODEV; + strlcpy(info->type, "rg_cpld", I2C_NAME_SIZE); + return 0; +} +#endif + +static int cpld_probe(struct i2c_client *client, const struct i2c_device_id *id) +{ + struct cpld_data *data; + int status; + const struct attribute_group *sysfs_group, *hwmon_group; + + status = -1; + DBG_DEBUG("=========cpld_probe(addr:0x%x, nr:%d)===========\n", client->addr, client->adapter->nr); + data = devm_kzalloc(&client->dev, sizeof(struct cpld_data), GFP_KERNEL); + if (!data) { + return -ENOMEM; + } + + data->client = client; + i2c_set_clientdata(client, data); + mutex_init(&data->update_lock); + + sysfs_group = NULL; + sysfs_group = cpld_get_attr_group(client, 0); + if (sysfs_group) { + status = sysfs_create_group(&client->dev.kobj, sysfs_group); + DBG_DEBUG("=========(addr:0x%x, nr:%d) sysfs_create_group status %d===========\n", client->addr, client->adapter->nr, status); + if (status != 0) { + DBG_ERROR("sysfs_create_group status %d.\n", status); + goto error; + } + } else { + DBG_DEBUG("=========(addr:0x%x, nr:%d) no sysfs_create_group \n", client->addr, client->adapter->nr); + } + + hwmon_group = NULL; + hwmon_group = cpld_get_attr_group(client, 1); + if (hwmon_group) { + data->hwmon_dev = hwmon_device_register_with_groups(&client->dev, client->name, data, (const struct attribute_group **)hwmon_group); + if (IS_ERR(data->hwmon_dev)) { + sysfs_remove_group(&client->dev.kobj, (const struct attribute_group *)sysfs_group); + DBG_ERROR("hwmon_device_register_with_groups failed ret %ld.\n", PTR_ERR(data->hwmon_dev)); + return PTR_ERR(data->hwmon_dev); + } + DBG_DEBUG("=========(addr:0x%x, nr:%d) hwmon_device_register_with_groups success===========\n", client->addr, client->adapter->nr); + if (status != 0) { + DBG_ERROR("sysfs_create_group status %d.\n", status); + goto error; + } + } else { + DBG_DEBUG("=========(addr:0x%x, nr:%d) no hwmon_device_register_with_groups \n", client->addr, client->adapter->nr); + } + +error: + return status; + +} + +static int cpld_remove(struct i2c_client *client) +{ + struct cpld_data *data = i2c_get_clientdata(client); + const struct attribute_group *sysfs_group, *hwmon_group; + + DBG_DEBUG("=========cpld_remove(addr:0x%x, nr:%d)===========\n", client->addr, client->adapter->nr); + + sysfs_group = NULL; + sysfs_group = cpld_get_attr_group(client, 0); + if (sysfs_group) { + DBG_DEBUG("=========(addr:0x%x, nr:%d) do sysfs_remove_group \n", client->addr, client->adapter->nr); + sysfs_remove_group(&client->dev.kobj, (const struct attribute_group *)sysfs_group); + } else { + DBG_DEBUG("=========(addr:0x%x, nr:%d) no sysfs_remove_group \n", client->addr, client->adapter->nr); + } + + hwmon_group = NULL; + hwmon_group = cpld_get_attr_group(client, 1); + if (hwmon_group) { + DBG_DEBUG("=========(addr:0x%x, nr:%d) do hwmon_device_unregister \n", client->addr, client->adapter->nr); + hwmon_device_unregister(data->hwmon_dev); + } else { + DBG_DEBUG("=========(addr:0x%x, nr:%d) no hwmon_device_unregister \n", client->addr, client->adapter->nr); + } + + return 0; +} + +static const struct i2c_device_id cpld_id[] = { + { "rg_cpld", 0 }, + {} +}; +MODULE_DEVICE_TABLE(i2c, cpld_id); + +static struct i2c_driver rg_cpld_driver = { + .class = I2C_CLASS_HWMON, + .driver = { + .name = "rg_cpld", + }, + .probe = cpld_probe, + .remove = cpld_remove, + .id_table = cpld_id, + //.detect = cpld_detect, + // .address_list = rg_i2c_cpld, +}; + +module_i2c_driver(rg_cpld_driver); +MODULE_AUTHOR("support "); +MODULE_DESCRIPTION("ragile CPLD driver"); +MODULE_LICENSE("GPL"); diff --git a/platform/broadcom/sonic-platform-modules-ragile/ra-b6920-4s/modules/driver/rg_lpc_cpld.c b/platform/broadcom/sonic-platform-modules-ragile/ra-b6920-4s/modules/driver/rg_lpc_cpld.c new file mode 100755 index 0000000000..2141567bf1 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ragile/ra-b6920-4s/modules/driver/rg_lpc_cpld.c @@ -0,0 +1,250 @@ +#include /* Wd're doing kernel work */ +#include /* specifically, a module */ +#include +#include /* Need for the macros */ +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include "ragile.h" + +int lpc_cpld_verbose = 0; +int lpc_cpld_error = 0; +module_param(lpc_cpld_verbose, int, S_IRUGO | S_IWUSR); +module_param(lpc_cpld_error, int, S_IRUGO | S_IWUSR); + + +#define LPC_CPLD_VERBOSE(fmt, args...) do { \ + if (lpc_cpld_verbose) { \ + printk(KERN_ERR "[LPC_CPLD_I2C_DEVICE][VERBOSE][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \ + } \ +} while (0) + +#define LPC_CPLD_ERROR(fmt, args...) do { \ + if (lpc_cpld_error) { \ + printk(KERN_ERR "[LPC_CPLD_I2C_DEVICE][ERROR][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \ + } \ + } while (0) + +#define PCI_VENDOR_ID_D1527_LPC (0x8c54) +#define PCI_VENDOR_ID_C3000_LPC (0x19dc) + +#define MAX_CPLD_REG_SIZE (0x100) +#define LPC_GET_CPLD_ID(addr) ((addr >> 16) & 0xff) +#define LPC_GET_CPLD_OFFSET(addr) ((addr) & 0xff) +typedef struct rg_lpc_device_s { + u16 base; + u16 size; + u8 type; + u8 id; +} rg_lpc_device_t; + +typedef enum rg_lpc_dev_type_s { + LPC_DEVICE_CPLD = 1, + LPC_DEVICE_FPGA = 2, +} rg_lpc_dev_type_t; + +static rg_lpc_device_t g_rg_lpc_dev[] = { + {.base = 0x700, .size = MAX_CPLD_REG_SIZE, .type = LPC_DEVICE_CPLD, .id = 0}, + {.base = 0x900, .size = MAX_CPLD_REG_SIZE, .type = LPC_DEVICE_CPLD, .id = 1}, + {.base = 0xb00, .size = MAX_CPLD_REG_SIZE, .type = LPC_DEVICE_CPLD, .id = 2}, + /*{.base = 0x900, .size = MAX_FPGA_REG_SIZE, .type = LPC_DEVICE_FPGA, .id = 0},*/ +}; + +static rg_lpc_device_t* lpc_get_device_info(int type, int id) +{ + int i; + + for (i = 0; i < ARRAY_SIZE(g_rg_lpc_dev); i++) { + if ((g_rg_lpc_dev[i].type == type) && (g_rg_lpc_dev[i].id == id)) { + return &g_rg_lpc_dev[i]; + } + } + + return NULL; +} + +static int lpc_cpld_read(int address, u8 *val) +{ + int cpld_id; + rg_lpc_device_t *info; + + LPC_CPLD_ERROR("Enter\n"); + cpld_id = LPC_GET_CPLD_ID(address); + LPC_CPLD_ERROR("icpld_id=%d\n", cpld_id); + info = lpc_get_device_info(LPC_DEVICE_CPLD, cpld_id); + if (info == NULL) { + LPC_CPLD_ERROR("lpc_get_device_info addr 0x%x id %d failed.\r\n", address, cpld_id); + return -1; + } + + *val = inb(info->base + LPC_GET_CPLD_OFFSET(address)); + LPC_CPLD_VERBOSE("Leave info->base 0x%x, addr 0x%x, cpld_id %d, val 0x%x.\r\n", info->base, address, cpld_id, *val); + return 0; +} + +static int lpc_cpld_write(int address, u8 reg_val) +{ + int cpld_id; + rg_lpc_device_t *info; + + cpld_id = LPC_GET_CPLD_ID(address); + info = lpc_get_device_info(LPC_DEVICE_CPLD, cpld_id); + if (info == NULL) { + LPC_CPLD_ERROR("lpc_get_device_info addr 0x%x id %d failed.\r\n", address, cpld_id); + return -1; + } + + outb(reg_val, info->base + LPC_GET_CPLD_OFFSET(address)); + LPC_CPLD_VERBOSE("Leave info->base 0x%x, addr 0x%x, cpld_id %d, val 0x%x.\r\n", info->base, address, cpld_id, reg_val); + return 0; +} + +static ssize_t show_cpld_version(struct device *dev, struct device_attribute *da, char *buf) +{ + int ret, i; + u8 data[4]; + u32 index = to_sensor_dev_attr(da)->index; + + memset(data, 0 ,sizeof(data)); + for (i = 0; i < 4; i++) { + ret = lpc_cpld_read(index + i, &data[i]); + if (ret != 0) { + memset(data, 0 ,sizeof(data)); + LPC_CPLD_ERROR("get cpld version failed!\n"); + break; + } + } + + return snprintf(buf, COMMON_STR_LEN, "%02x %02x %02x %02x \n", data[0], data[1], data[2], data[3]); + +} + +static ssize_t show_cpld_sysfs_value(struct device *dev, struct device_attribute *da, char *buf) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + u8 data; + int ret; + + ret = lpc_cpld_read(attr->index, &data); + if (ret != 0) { + LPC_CPLD_ERROR("get cpld[0x%x] value failed!\n", attr->index); + data = 0; + } + return snprintf(buf, COMMON_STR_LEN, "%02x\n", data); +} + +static ssize_t set_cpld_sysfs_value(struct device *dev, struct device_attribute *da, const char *buf, size_t +count) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + u8 data; + unsigned long val; + int err; + + err = kstrtoul(buf, 16, &val); + if (err) + return err; + if ((val < 0) || (val > 0xff)) { + LPC_CPLD_ERROR("please enter 0x00 ~ 0xff\n"); + return -1; + } + + data = (u8)val; + LPC_CPLD_VERBOSE("pos: 0x%02x count = %ld, data = 0x%02x\n", attr->index, count, data); + err = lpc_cpld_write(attr->index, data); + if (err != 0) { + LPC_CPLD_ERROR("set cpld[0x%x] value[0x%x] failed!\n", attr->index, data); + count = 0; + } + + return count; +} + +/* common */ +static SENSOR_DEVICE_ATTR(cpld_version_0_0, S_IRUGO, show_cpld_version, NULL, 0x10000); +static SENSOR_DEVICE_ATTR(cpld_version_0_1, S_IRUGO, show_cpld_version, NULL, 0x20000); + +static SENSOR_DEVICE_ATTR(broad_front_sys, S_IRUGO| S_IWUSR, show_cpld_sysfs_value, set_cpld_sysfs_value, 0x20021); +static SENSOR_DEVICE_ATTR(broad_front_pwr, S_IRUGO| S_IWUSR, show_cpld_sysfs_value, set_cpld_sysfs_value, 0x20022); +static SENSOR_DEVICE_ATTR(broad_front_fan, S_IRUGO| S_IWUSR, show_cpld_sysfs_value, set_cpld_sysfs_value, 0x20023); + +/* psu status */ +static SENSOR_DEVICE_ATTR(psu_status_1, S_IRUGO, show_cpld_sysfs_value, NULL, 0x20027); +static SENSOR_DEVICE_ATTR(psu_status_2, S_IRUGO, show_cpld_sysfs_value, NULL, 0x20028); +static SENSOR_DEVICE_ATTR(psu_status_3, S_IRUGO, show_cpld_sysfs_value, NULL, 0x20029); +static SENSOR_DEVICE_ATTR(psu_status_4, S_IRUGO, show_cpld_sysfs_value, NULL, 0x2002a); + +/* line card present status */ +static SENSOR_DEVICE_ATTR(slot_present, S_IRUGO, show_cpld_sysfs_value, NULL, 0x2002c); + +static struct attribute *lpc_cpld_base_sysfs_attrs[] = { + &sensor_dev_attr_cpld_version_0_0.dev_attr.attr, + &sensor_dev_attr_cpld_version_0_1.dev_attr.attr, + &sensor_dev_attr_broad_front_sys.dev_attr.attr, + &sensor_dev_attr_broad_front_pwr.dev_attr.attr, + &sensor_dev_attr_broad_front_fan.dev_attr.attr, + &sensor_dev_attr_psu_status_1.dev_attr.attr, + &sensor_dev_attr_psu_status_2.dev_attr.attr, + &sensor_dev_attr_psu_status_3.dev_attr.attr, + &sensor_dev_attr_psu_status_4.dev_attr.attr, + &sensor_dev_attr_slot_present.dev_attr.attr, + NULL +}; + +static const struct attribute_group lpc_cpld_base_sysfs_group = { + .attrs = lpc_cpld_base_sysfs_attrs, +}; + +static int __init rg_lpc_cpld_init(void) +{ + struct pci_dev *pdev = NULL; + int status; + + pdev = pci_get_device(PCI_VENDOR_ID_INTEL, PCI_VENDOR_ID_D1527_LPC, pdev); + if (!pdev) { + LPC_CPLD_ERROR("pci_get_device(0x8086, 0x8c54) failed!\n"); + return -1; + } + + status = -1; + status = sysfs_create_group(&pdev->dev.kobj, &lpc_cpld_base_sysfs_group); + if (status) { + LPC_CPLD_ERROR("sysfs_create_group failed!\n"); + return -1; + } + + LPC_CPLD_VERBOSE("Leave success\n"); + return 0; +} + +static void __exit rg_lpc_cpld_exit(void) +{ + struct pci_dev *pdev = NULL; + + pdev = pci_get_device(PCI_VENDOR_ID_INTEL, PCI_VENDOR_ID_D1527_LPC, pdev); + if (!pdev) { + LPC_CPLD_ERROR("pci_get_device(0x8086, 0x8c54) failed!\n"); + return ; + } + + sysfs_remove_group(&pdev->dev.kobj, &lpc_cpld_base_sysfs_group); + + LPC_CPLD_VERBOSE("Leave.\n"); +} + +module_init(rg_lpc_cpld_init); +module_exit(rg_lpc_cpld_exit); +MODULE_LICENSE("GPL"); +MODULE_AUTHOR("support "); diff --git a/platform/broadcom/sonic-platform-modules-ragile/ra-b6920-4s/scripts/pddf_post_device_create.sh b/platform/broadcom/sonic-platform-modules-ragile/ra-b6920-4s/scripts/pddf_post_device_create.sh new file mode 100755 index 0000000000..952e034c5b --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ragile/ra-b6920-4s/scripts/pddf_post_device_create.sh @@ -0,0 +1,16 @@ +#!/bin/bash + +# create tmp411 device +function create_tmp411() +{ + bus=$1 + addr=$2 + if [ -d "/sys/bus/i2c/devices/i2c-${bus}" ] + then + echo "tmp411 ${addr}" > /sys/bus/i2c/devices/i2c-${bus}/new_device + fi +} + +create_tmp411 "28" "0x4c" +create_tmp411 "29" "0x4c" + diff --git a/platform/broadcom/sonic-platform-modules-ragile/ra-b6920-4s/setup.py b/platform/broadcom/sonic-platform-modules-ragile/ra-b6920-4s/setup.py new file mode 100644 index 0000000000..f36055fb4e --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ragile/ra-b6920-4s/setup.py @@ -0,0 +1,33 @@ +from setuptools import setup + +setup( + name='sonic-platform', + version='1.0', + description='SONiC platform API implementation on RAGILE Platforms', + license='Apache 2.0', + author='SONiC Team', + author_email='support@ragile.com', + url='', + maintainer='RAGILE SUPPORT TEAM', + maintainer_email='', + packages=[ + 'sonic_platform', + 'rgutil', + 'eepromutil', + 'sonic_pcie', + ], + classifiers=[ + 'Development Status :: 3 - Alpha', + 'Environment :: Plugins', + 'Intended Audience :: Developers', + 'Intended Audience :: Information Technology', + 'Intended Audience :: System Administrators', + 'License :: OSI Approved :: Apache Software License', + 'Natural Language :: English', + 'Operating System :: POSIX :: Linux', + 'Programming Language :: Python :: 3.7', + 'Topic :: Utilities', + ], + keywords='sonic SONiC platform PLATFORM', +) + diff --git a/platform/broadcom/sonic-platform-modules-ragile/ra-b6920-4s/sonic_pcie/__init__.py b/platform/broadcom/sonic-platform-modules-ragile/ra-b6920-4s/sonic_pcie/__init__.py new file mode 100644 index 0000000000..73e2a89c8d --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ragile/ra-b6920-4s/sonic_pcie/__init__.py @@ -0,0 +1 @@ +__all__ = ["pcie_common"] \ No newline at end of file diff --git a/platform/broadcom/sonic-platform-modules-ragile/ra-b6920-4s/sonic_pcie/pcie_common.py b/platform/broadcom/sonic-platform-modules-ragile/ra-b6920-4s/sonic_pcie/pcie_common.py new file mode 100644 index 0000000000..56e9d8664a --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ragile/ra-b6920-4s/sonic_pcie/pcie_common.py @@ -0,0 +1,107 @@ +# pcie_common.py +# Common PCIE check interfaces for SONIC +# + +import os +import yaml +import subprocess +import re +import sys +from copy import deepcopy +try: + from .pcie import PcieBase +except ImportError as e: + raise ImportError(str(e) + "- required module not found") + + +class PcieUtil(PcieBase): + """Platform-specific PCIEutil class""" + # got the config file path + def __init__(self, path): + self.config_path = path + + # load the config file + def load_config_file(self): + config_file = self.config_path + "/" + "pcie.yaml" + try: + with open(config_file) as conf_file: + self.confInfo = yaml.load(conf_file) + except IOError as e: + print("Error: {}".format(str(e))) + print("Not found config file, please add a config file manually, or generate it by running [pcieutil pcie_generate]") + sys.exit() + + # load current PCIe device + def get_pcie_device(self): + pciDict = {} + pciList = [] + p1 = "^(\w+):(\w+)\.(\w)\s(.*)\s*\(*.*\)*" + p2 = "^.*:.*:.*:(\w+)\s*\(*.*\)*" + command1 = "sudo lspci" + command2 = "sudo lspci -n" + # run command 1 + proc1 = subprocess.Popen(command1, shell=True, universal_newlines=True, stdout=subprocess.PIPE) + output1 = proc1.stdout.readlines() + proc1.communicate() + # run command 2 + proc2 = subprocess.Popen(command2, shell=True, universal_newlines=True, stdout=subprocess.PIPE) + output2 = proc2.stdout.readlines() + proc2.communicate() + + if proc1.returncode > 0: + for line1 in output1: + print(line1.strip()) + return + elif proc2.returncode > 0: + for line2 in output2: + print(line2.strip()) + return + else: + for (line1, line2) in zip(output1, output2): + pciDict.clear() + match1 = re.search(p1, line1.strip()) + match2 = re.search(p2, line2.strip()) + if match1 and match2: + Bus = match1.group(1) + Dev = match1.group(2) + Fn = match1.group(3) + Name = match1.group(4) + Id = match2.group(1) + pciDict["name"] = Name + pciDict["bus"] = Bus + pciDict["dev"] = Dev + pciDict["fn"] = Fn + pciDict["id"] = Id + pciList.append(pciDict) + pciDict = deepcopy(pciDict) + else: + print("CAN NOT MATCH PCIe DEVICE") + return pciList + + # check the sysfs tree for each PCIe device + def check_pcie_sysfs(self, domain=0, bus=0, device=0, func=0): + dev_path = os.path.join('/sys/bus/pci/devices', '%04x:%02x:%02x.%d' % (domain, bus, device, func)) + if os.path.exists(dev_path): + return True + return False + + # check the current PCIe device with config file and return the result + def get_pcie_check(self): + self.load_config_file() + for item_conf in self.confInfo: + bus_conf = item_conf["bus"] + dev_conf = item_conf["dev"] + fn_conf = item_conf["fn"] + if self.check_pcie_sysfs(bus=int(bus_conf, base=16), device=int(dev_conf, base=16), func=int(fn_conf, base=16)): + item_conf["result"] = "Passed" + else: + item_conf["result"] = "Failed" + return self.confInfo + + # generate the config file with current pci device + def dump_conf_yaml(self): + curInfo = self.get_pcie_device() + with open(self.config_path + "/" + "pcie.yaml", "w") as conf_file: + yaml.dump(curInfo, conf_file, default_flow_style=False) + return + diff --git a/platform/broadcom/sonic-platform-modules-ragile/ra-b6920-4s/sonic_platform/__init__.py b/platform/broadcom/sonic-platform-modules-ragile/ra-b6920-4s/sonic_platform/__init__.py new file mode 100644 index 0000000000..d49ca9b48b --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ragile/ra-b6920-4s/sonic_platform/__init__.py @@ -0,0 +1,4 @@ +# All the derived classes for PDDF +__all__ = ["platform", "chassis", "sfp", "psu", "thermal", "fan", "fan_drawer"] +from . import platform + diff --git a/platform/broadcom/sonic-platform-modules-ragile/ra-b6920-4s/sonic_platform/chassis.py b/platform/broadcom/sonic-platform-modules-ragile/ra-b6920-4s/sonic_platform/chassis.py new file mode 100644 index 0000000000..5d428f6685 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ragile/ra-b6920-4s/sonic_platform/chassis.py @@ -0,0 +1,108 @@ +############################################################################# +# PDDF +# Module contains an implementation of SONiC Chassis API +# +############################################################################# + +try: + import time + from sonic_platform_pddf_base.pddf_chassis import PddfChassis + from sonic_platform.fan_drawer import FanDrawer +except ImportError as e: + raise ImportError(str(e) + "- required module not found") + +PORT_START = 0 +PORTS_IN_BLOCK = 128 +FAN_NUM_PER_DRAWER = 2 + +class Chassis(PddfChassis): + """ + PDDF Platform-specific Chassis class + """ + + SFP_STATUS_INSERTED = "1" + SFP_STATUS_REMOVED = "0" + port_dict = {} + + def __init__(self, pddf_data=None, pddf_plugin_data=None): + PddfChassis.__init__(self, pddf_data, pddf_plugin_data) + + # fan drawer + temp = [] + drawer_index = 0 + for idx, fan in enumerate(self.get_all_fans()): + temp.append(fan) + if (idx + 1) % FAN_NUM_PER_DRAWER == 0: + drawer = FanDrawer(drawer_index + 1, temp) + self.get_all_fan_drawers().append(drawer) + temp = [] + drawer_index += 1 + + def get_reboot_cause(self): + """ + Retrieves the cause of the previous reboot + Returns: + A tuple (string, string) where the first element is a string + containing the cause of the previous reboot. This string must be + one of the predefined strings in this class. If the first string + is "REBOOT_CAUSE_HARDWARE_OTHER", the second string can be used + to pass a description of the reboot cause. + """ + + return (self.REBOOT_CAUSE_NON_HARDWARE, None) + + def get_change_event(self, timeout=0): + change_event_dict = {"fan": {}, "sfp": {}} + sfp_status, sfp_change_dict = self.get_transceiver_change_event(timeout) + change_event_dict["sfp"] = sfp_change_dict + if sfp_status is True: + return True, change_event_dict + + return False, {} + + def get_transceiver_change_event(self, timeout=0): + start_time = time.time() + currernt_port_dict = {} + forever = False + + if timeout == 0: + forever = True + elif timeout > 0: + timeout = timeout / float(1000) # Convert to secs + else: + print("get_transceiver_change_event:Invalid timeout value", timeout) + return False, {} + + end_time = start_time + timeout + if start_time > end_time: + print( + "get_transceiver_change_event:" "time wrap / invalid timeout value", + timeout, + ) + return False, {} # Time wrap or possibly incorrect timeout + + while timeout >= 0: + # Check for OIR events and return updated port_dict + for index in range(PORT_START, PORTS_IN_BLOCK): + if self._sfp_list[index].get_presence(): + currernt_port_dict[index] = self.SFP_STATUS_INSERTED + else: + currernt_port_dict[index] = self.SFP_STATUS_REMOVED + if currernt_port_dict == self.port_dict: + if forever: + time.sleep(1) + else: + timeout = end_time - time.time() + if timeout >= 1: + time.sleep(1) # We poll at 1 second granularity + else: + if timeout > 0: + time.sleep(timeout) + return True, {} + else: + # Update reg value + self.port_dict = currernt_port_dict + print(self.port_dict) + return True, self.port_dict + print("get_transceiver_change_event: Should not reach here.") + return False, {} diff --git a/platform/broadcom/sonic-platform-modules-ragile/ra-b6920-4s/sonic_platform/common.py b/platform/broadcom/sonic-platform-modules-ragile/ra-b6920-4s/sonic_platform/common.py new file mode 100644 index 0000000000..c1a85f6186 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ragile/ra-b6920-4s/sonic_platform/common.py @@ -0,0 +1,44 @@ +import os +import yaml + +from sonic_py_common import device_info + + +class Common: + + DEVICE_PATH = '/usr/share/sonic/device/' + PMON_PLATFORM_PATH = '/usr/share/sonic/platform/' + CONFIG_DIR = 'sonic_platform_config' + + HOST_CHK_CMD = "docker > /dev/null 2>&1" + + def __init__(self): + (self.platform, self.hwsku) = device_info.get_platform_and_hwsku() + + def is_host(self): + return os.system(self.HOST_CHK_CMD) == 0 + + def load_json_file(self, path): + """ + Retrieves the json object from json file path + + Returns: + A json object + """ + with open(path, 'r') as f: + json_data = yaml.safe_load(f) + + return json_data + + def get_config_path(self, config_name): + """ + Retrieves the path to platform api config directory + + Args: + config_name: A string containing the name of config file. + + Returns: + A string containing the path to json file + """ + return os.path.join(self.DEVICE_PATH, self.platform, self.CONFIG_DIR, config_name) if self.is_host() else os.path.join(self.PMON_PLATFORM_PATH, self.CONFIG_DIR, config_name) + diff --git a/platform/broadcom/sonic-platform-modules-ragile/ra-b6920-4s/sonic_platform/component.py b/platform/broadcom/sonic-platform-modules-ragile/ra-b6920-4s/sonic_platform/component.py new file mode 100644 index 0000000000..7c6fd2df43 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ragile/ra-b6920-4s/sonic_platform/component.py @@ -0,0 +1,85 @@ +######################################################################## +# Ragile RA-B6510-32c +# +# Module contains an implementation of SONiC Platform Base API and +# provides the Components' (e.g., BIOS, CPLD, FPGA, etc.) available in +# the platform +# +######################################################################## + +try: + import subprocess + from sonic_platform_base.component_base import ComponentBase + from sonic_platform.regutil import Reg + from sonic_platform.logger import logger +except ImportError as e: + raise ImportError(str(e) + "- required module not found") + + +class Component(ComponentBase): + """ Ragile Platform-specific Component class""" + + def __init__(self, index, config=None): + self.index = index + self.name = config.get("name") + self._reg_fm_ver = Reg(config.get("firmware_version")) + self.description = config.get("desc") + self.slot = config.get("slot") + + def get_name(self): + """ + Retrieves the name of the component + + Returns: + A string containing the name of the component + """ + return self.name + + def get_description(self): + """ + Retrieves the description of the component + + Returns: + A string containing the description of the component + """ + return self.description + + def get_firmware_version(self): + """ + Retrieves the firmware version of the component + + Returns: + A string containing the firmware version of the component + """ + try: + return self._reg_fm_ver.decode() + except Exception as e: + logger.error(str(e)) + + return "" + + def install_firmware(self, image_path): + """ + Installs firmware to the component + + Args: + image_path: A string, path to firmware image + + Returns: + A boolean, True if install was successful, False if not + """ + try: + successtips = "CPLD Upgrade succeeded!" + status, output = subprocess.getstatusoutput("which firmware_upgrade") + if status or len(output) <= 0: + logger.error("no upgrade tool.") + return False + cmdstr = "%s %s cpld %d cpld"%(output,image_path,self.slot) + ret, log = subprocess.getstatusoutput(cmdstr) + if ret == 0 and successtips in log: + return True + logger.error("upgrade failed. ret:%d, log:\n%s" % (ret, log)) + except Exception as e: + logger.error(str(e)) + return False + diff --git a/platform/broadcom/sonic-platform-modules-ragile/ra-b6920-4s/sonic_platform/config.py b/platform/broadcom/sonic-platform-modules-ragile/ra-b6920-4s/sonic_platform/config.py new file mode 100644 index 0000000000..7d3064163b --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ragile/ra-b6920-4s/sonic_platform/config.py @@ -0,0 +1,771 @@ +# -*- coding: utf-8 -*- + +PSU_FAN_AIRFLOW = { + "CSU550AP-3-300": "F2B", + "CSU550AP-3-500": "F2B", + "DPS-550AB-39 A": "F2B", + "DPS-1300AB-6 S": "F2B", + "FSP1200-20ERM": "F2B", + "CSU800AP-3-300": "F2B", + "CSU550AP-3-501": "B2F", + "DPS-550AB-40 A": "B2F", +} + +psutypedecode = { + 0x00: "N/A", + 0x01: "AC", + 0x02: "DC", +} + + +class Unit: + Temperature = "C" + Voltage = "V" + Current = "A" + Power = "W" + Speed = "RPM" + + +class Threshold: + PSU_TEMP_MIN = -10 * 1000 + PSU_TEMP_MAX = 60 * 1000 + + PSU_FAN_SPEED_MIN = 5220 + PSU_FAN_SPEED_MAX = 17400 + + PSU_OUTPUT_VOLTAGE_MIN = 11 * 1000 + PSU_OUTPUT_VOLTAGE_MAX = 14 * 1000 + + PSU_AC_INPUT_VOLTAGE_MIN = 200 * 1000 + PSU_AC_INPUT_VOLTAGE_MAX = 240 * 1000 + + PSU_DC_INPUT_VOLTAGE_MIN = 190 * 1000 + PSU_DC_INPUT_VOLTAGE_MAX = 290 * 1000 + + ERR_VALUE = -9999999 + + PSU_OUTPUT_POWER_MIN = 10 * 1000 + PSU_OUTPUT_POWER_MAX = 1300 * 1000 + + PSU_INPUT_POWER_MIN = 10 * 1000 + PSU_INPUT_POWER_MAX = 1444 * 1000 + + PSU_OUTPUT_CURRENT_MIN = 2 * 1000 + PSU_OUTPUT_CURRENT_MAX = 107 * 1000 + + PSU_INPUT_CURRENT_MIN = 0.2 * 1000 + PSU_INPUT_CURRENT_MAX = 7 * 1000 + + FAN_SPEED_MAX = 24000 + FAN_SPEED_MIN = 7200 + + +class DecodeFormat: + TEXT = 0 + DECIMAL = 1 + ONE_BIT_HEX = 2 + HUNDREDTH = 3 + THOUSANDTH = 4 + MILLIONTH = 5 + AND = 6 + JOIN = 7 + FRU = 8 + HEX = 9 + + +class DecodeMethod: + SYSFS = 0 + I2C = 1 + I2C_WORD = 2 + DEVMEM = 3 + SDK = 4 + IO = 5 + FRU = 6 + + +class FRU: + SN = 0 + VERSION = 1 + PART_NAME = 2 + PRODUCT_NAME = 3 + MANUFACTURER = 4 + + +class Description: + CPLD = "Used for managing IO modules, SFP+ modules and system LEDs" + BIOS = "Performs initialization of hardware components during booting" + FPGA = "Platform management controller for on-board temperature monitoring, in-chassis power, Fan and LED control" + + +FAN_LED_COLORS = { + "green": 0b0100, + "red": 0b0010, + "amber": 0b0110, +} + + +DEVICE_CONF = { + "eeprom": {"bus": 1, "loc": "0056"}, + "components": [ + { + "name": "CPLD1 (MAC Board A)", + "firmware_version": { + "bus": 8, + "addr": 0x30, + "offset": 0, + "size": 4, + "way": DecodeMethod.I2C, + "format": DecodeFormat.JOIN, + "sep": "/", + }, + "desc": Description.CPLD, + "slot": 0, + }, + { + "name": "CPLD2 (MAC Board B)", + "firmware_version": { + "bus": 8, + "addr": 0x31, + "offset": 0, + "size": 4, + "way": DecodeMethod.I2C, + "format": DecodeFormat.JOIN, + "sep": "/", + }, + "desc": Description.CPLD, + "slot": 0, + }, + { + "name": "CPLD3 (CONNECT Board A)", + "firmware_version": { + "bus": 2, + "addr": 0x0d, + "offset": 0, + "size": 4, + "way": DecodeMethod.I2C, + "format": DecodeFormat.JOIN, + "sep": "/", + }, + "desc": Description.CPLD, + "slot": 0, + }, + { + "name": "CPLD4 (CPU Board)", + "firmware_version": { + "bus": 0, + "addr": 0x0D, + "offset": 0, + "size": 4, + "way": DecodeMethod.I2C, + "format": DecodeFormat.JOIN, + "sep": "/", + }, + "desc": Description.CPLD, + "slot": 1, + }, + ], + "thermals": [ + { + "name": "INLET TEMP", + "high": { + "loc": "/sys/bus/i2c/devices/3-004b/hwmon/*/temp1_max", + "format": DecodeFormat.THOUSANDTH, + }, + "low": None, + "crit_low": None, + "crit_high": None, + "temperature": { + "loc": "/sys/bus/i2c/devices/3-004b/hwmon/*/temp1_input", + "format": DecodeFormat.THOUSANDTH, + }, + }, + { + "name": "OUTLET TEMP", + "high": { + "loc": "/sys/bus/i2c/devices/3-004c/hwmon/*/temp1_max", + "format": DecodeFormat.THOUSANDTH, + }, + "low": None, + "crit_low": None, + "crit_high": None, + "temperature": { + "loc": "/sys/bus/i2c/devices/3-004c/hwmon/*/temp1_input", + "format": DecodeFormat.THOUSANDTH, + }, + }, + { + "name": "BOARD TEMP", + "high": { + "loc": "/sys/bus/i2c/devices/3-0049/hwmon/*/temp1_max", + "format": DecodeFormat.THOUSANDTH, + }, + "low": None, + "crit_low": None, + "crit_high": None, + "temperature": { + "loc": "/sys/bus/i2c/devices/3-0049/hwmon/*/temp1_input", + "format": DecodeFormat.THOUSANDTH, + }, + }, + { + "name": "PHYSICAL ID 0", + "high": { + "loc": "/sys/class/hwmon/hwmon0/temp1_max", + "format": DecodeFormat.THOUSANDTH, + }, + "low": None, + "crit_low": None, + "crit_high": { + "loc": "/sys/class/hwmon/hwmon0/temp1_crit", + "format": DecodeFormat.THOUSANDTH, + }, + "temperature": { + "loc": "/sys/class/hwmon/hwmon0/temp1_input", + "format": DecodeFormat.THOUSANDTH, + }, + }, + { + "name": "CPU CORE 0", + "high": { + "loc": "/sys/class/hwmon/hwmon0/temp2_max", + "format": DecodeFormat.THOUSANDTH, + }, + "low": None, + "crit_low": None, + "crit_high": { + "loc": "/sys/class/hwmon/hwmon0/temp2_crit", + "format": DecodeFormat.THOUSANDTH, + }, + "temperature": { + "loc": "/sys/class/hwmon/hwmon0/temp2_input", + "format": DecodeFormat.THOUSANDTH, + }, + }, + { + "name": "CPU CORE 1", + "high": { + "loc": "/sys/class/hwmon/hwmon0/temp3_max", + "format": DecodeFormat.THOUSANDTH, + }, + "low": None, + "crit_low": None, + "crit_high": { + "loc": "/sys/class/hwmon/hwmon0/temp3_crit", + "format": DecodeFormat.THOUSANDTH, + }, + "temperature": { + "loc": "/sys/class/hwmon/hwmon0/temp3_input", + "format": DecodeFormat.THOUSANDTH, + }, + }, + { + "name": "CPU CORE 2", + "high": { + "loc": "/sys/class/hwmon/hwmon0/temp4_max", + "format": DecodeFormat.THOUSANDTH, + }, + "low": None, + "crit_low": None, + "crit_high": { + "loc": "/sys/class/hwmon/hwmon0/temp4_crit", + "format": DecodeFormat.THOUSANDTH, + }, + "temperature": { + "loc": "/sys/class/hwmon/hwmon0/temp4_input", + "format": DecodeFormat.THOUSANDTH, + }, + }, + { + "name": "CPU CORE 3", + "high": { + "loc": "/sys/class/hwmon/hwmon0/temp5_max", + "format": DecodeFormat.THOUSANDTH, + }, + "low": None, + "crit_low": None, + "crit_high": { + "loc": "/sys/class/hwmon/hwmon0/temp5_crit", + "format": DecodeFormat.THOUSANDTH, + }, + "temperature": { + "loc": "/sys/class/hwmon/hwmon0/temp5_input", + "format": DecodeFormat.THOUSANDTH, + }, + }, + ], + "fans": [ + { + "name": "fan1", + "e2loc": {"bus": 16, "addr": 0x50, "way": "i2c", "size": "256"}, + "present": { + "loc": "/sys/bus/i2c/devices/2-000d/fan_present", + "format": DecodeFormat.ONE_BIT_HEX, + "bit": 0, + }, + "status": { + "loc": "/sys/bus/i2c/devices/2-000d/fan_status", + "format": DecodeFormat.ONE_BIT_HEX, + "bit": 0, + }, + "hw_version": { + "loc": "/sys/bus/i2c/devices/16-0050/eeprom", + "format": DecodeFormat.FRU, + "fru_key": FRU.VERSION + }, + "sn": { + "loc": "/sys/bus/i2c/devices/16-0050/eeprom", + "format": DecodeFormat.FRU, + "fru_key": FRU.SN + }, + "led": { + "loc": "/sys/bus/i2c/devices/2-000d/fan1_led", + "format": DecodeFormat.AND, + "mask": 0b1111, + }, + "led_colors": FAN_LED_COLORS, + "rotors": [ + { + "speed_getter": { + "loc": "/sys/bus/i2c/devices/2-000d/fan1_1_real_speed" + }, + "speed_setter": { + "loc": "/sys/bus/i2c/devices/2-000d/fan1_speed_set", + "format": DecodeFormat.HEX + }, + "speed_max": Threshold.FAN_SPEED_MAX, + "slope": 236.51, + "intercept": 82.571, + }, + { + "speed_getter": { + "loc": "/sys/bus/i2c/devices/2-000d/fan1_2_real_speed" + }, + "speed_setter": { + "loc": "/sys/bus/i2c/devices/2-000d/fan1_speed_set", + "format": DecodeFormat.HEX + }, + "speed_max": Threshold.FAN_SPEED_MAX, + "slope": 236.51, + "intercept": 82.571, + } + ], + "tolerance": 20, + "threshold": 30, + "target_default": 0, + }, + { + "name": "fan2", + "e2loc": {"bus": 17, "addr": 0x50, "way": "i2c", "size": "256"}, + "present": { + "loc": "/sys/bus/i2c/devices/2-000d/fan_present", + "format": DecodeFormat.ONE_BIT_HEX, + "bit": 1, + }, + "status": { + "loc": "/sys/bus/i2c/devices/2-000d/fan_status", + "format": DecodeFormat.ONE_BIT_HEX, + "bit": 1, + }, + "hw_version": { + "loc": "/sys/bus/i2c/devices/17-0050/eeprom", + "format": DecodeFormat.FRU, + "fru_key": FRU.VERSION + }, + "sn": { + "loc": "/sys/bus/i2c/devices/17-0050/eeprom", + "format": DecodeFormat.FRU, + "fru_key": FRU.SN + }, + "led": { + "loc": "/sys/bus/i2c/devices/2-000d/fan2_led", + "format": DecodeFormat.AND, + "mask": 0b1111, + }, + "led_colors": FAN_LED_COLORS, + "rotors": [ + { + "speed_getter": { + "loc": "/sys/bus/i2c/devices/2-000d/fan2_1_real_speed" + }, + "speed_setter": { + "loc": "/sys/bus/i2c/devices/2-000d/fan2_speed_set", + "format": DecodeFormat.HEX + }, + "speed_max": Threshold.FAN_SPEED_MAX, + "slope": 236.51, + "intercept": 82.571, + }, + { + "speed_getter": { + "loc": "/sys/bus/i2c/devices/2-000d/fan2_2_real_speed" + }, + "speed_setter": { + "loc": "/sys/bus/i2c/devices/2-000d/fan2_speed_set", + "format": DecodeFormat.HEX, + }, + "speed_max": Threshold.FAN_SPEED_MAX, + "slope": 236.51, + "intercept": 82.571, + } + ], + "tolerance": 20, + "threshold": 30, + "target_default": 0, + }, + { + "name": "fan3", + "e2loc": {"bus": 18, "addr": 0x50, "way": "i2c", "size": "256"}, + "present": { + "loc": "/sys/bus/i2c/devices/2-000d/fan_present", + "format": DecodeFormat.ONE_BIT_HEX, + "bit": 2, + }, + "status": { + "loc": "/sys/bus/i2c/devices/2-000d/fan_status", + "format": DecodeFormat.ONE_BIT_HEX, + "bit": 2, + }, + "hw_version": { + "loc": "/sys/bus/i2c/devices/18-0050/eeprom", + "format": DecodeFormat.FRU, + "fru_key": FRU.VERSION + }, + "sn": { + "loc": "/sys/bus/i2c/devices/18-0050/eeprom", + "format": DecodeFormat.FRU, + "fru_key": FRU.SN + }, + "led": { + "loc": "/sys/bus/i2c/devices/2-000d/fan3_led", + "format": DecodeFormat.AND, + "mask": 0b1111, + }, + "led_colors": FAN_LED_COLORS, + "rotors": [ + { + "speed_getter": { + "loc": "/sys/bus/i2c/devices/2-000d/fan3_1_real_speed" + }, + "speed_setter": { + "loc": "/sys/bus/i2c/devices/2-000d/fan3_speed_set", + "format": DecodeFormat.HEX + }, + "speed_max": Threshold.FAN_SPEED_MAX, + "slope": 236.51, + "intercept": 82.571, + }, + { + "speed_getter": { + "loc": "/sys/bus/i2c/devices/2-000d/fan3_2_real_speed" + }, + "speed_setter": { + "loc": "/sys/bus/i2c/devices/2-000d/fan3_speed_set", + "format": DecodeFormat.HEX + }, + "speed_max": Threshold.FAN_SPEED_MAX, + "slope": 236.51, + "intercept": 82.571, + } + ], + "tolerance": 20, + "threshold": 30, + "target_default": 0, + }, + { + "name": "fan4", + "e2loc": {"bus": 19, "addr": 0x50, "way": "i2c", "size": "256"}, + "present": { + "loc": "/sys/bus/i2c/devices/2-000d/fan_present", + "format": DecodeFormat.ONE_BIT_HEX, + "bit": 3, + }, + "status": { + "loc": "/sys/bus/i2c/devices/2-000d/fan_status", + "format": DecodeFormat.ONE_BIT_HEX, + "bit": 3, + }, + "hw_version": { + "loc": "/sys/bus/i2c/devices/19-0050/eeprom", + "format": DecodeFormat.FRU, + "fru_key": FRU.VERSION + }, + "sn": { + "loc": "/sys/bus/i2c/devices/19-0050/eeprom", + "format": DecodeFormat.FRU, + "fru_key": FRU.SN + }, + "led": { + "loc": "/sys/bus/i2c/devices/2-000d/fan4_led", + "format": DecodeFormat.AND, + "mask": 0b1111, + }, + "led_colors": FAN_LED_COLORS, + "rotors": [ + { + "speed_getter": { + "loc": "/sys/bus/i2c/devices/2-000d/fan4_1_real_speed" + }, + "speed_setter": { + "loc": "/sys/bus/i2c/devices/2-000d/fan4_speed_set", + "format": DecodeFormat.HEX + }, + "speed_max": Threshold.FAN_SPEED_MAX, + "slope": 236.51, + "intercept": 82.571, + }, + { + "speed_getter": { + "loc": "/sys/bus/i2c/devices/2-000d/fan4_2_real_speed" + }, + "speed_setter": { + "loc": "/sys/bus/i2c/devices/2-000d/fan4_speed_set", + "format": DecodeFormat.HEX + }, + "speed_max": Threshold.FAN_SPEED_MAX, + "slope": 236.51, + "intercept": 82.571, + } + ], + "tolerance": 20, + "threshold": 30, + "target_default": 0, + }, + { + "name": "fan5", + "e2loc": {"bus": 20, "addr": 0x50, "way": "i2c", "size": "256"}, + "present": { + "loc": "/sys/bus/i2c/devices/2-000d/fan_present", + "format": DecodeFormat.ONE_BIT_HEX, + "bit": 4, + }, + "status": { + "loc": "/sys/bus/i2c/devices/2-000d/fan_status", + "format": DecodeFormat.ONE_BIT_HEX, + "bit": 4, + }, + "hw_version": { + "loc": "/sys/bus/i2c/devices/20-0050/eeprom", + "format": DecodeFormat.FRU, + "fru_key": FRU.VERSION + }, + "sn": { + "loc": "/sys/bus/i2c/devices/20-0050/eeprom", + "format": DecodeFormat.FRU, + "fru_key": FRU.SN + }, + "led": { + "loc": "/sys/bus/i2c/devices/2-000d/fan5_led", + "format": DecodeFormat.AND, + "mask": 0b1111, + }, + "led_colors": FAN_LED_COLORS, + "rotors": [ + { + "speed_getter": { + "loc": "/sys/bus/i2c/devices/2-000d/fan5_1_real_speed" + }, + "speed_setter": { + "loc": "/sys/bus/i2c/devices/2-000d/fan5_speed_set", + "format": DecodeFormat.HEX + }, + "speed_max": Threshold.FAN_SPEED_MAX, + "slope": 236.51, + "intercept": 82.571, + }, + { + "speed_getter": { + "loc": "/sys/bus/i2c/devices/2-000d/fan5_2_real_speed" + }, + "speed_setter": { + "loc": "/sys/bus/i2c/devices/2-000d/fan5_speed_set", + "format": DecodeFormat.HEX + }, + "speed_max": Threshold.FAN_SPEED_MAX, + "slope": 236.51, + "intercept": 82.571, + } + ], + "tolerance": 20, + "threshold": 30, + "target_default": 0, + }, + ], + "psus": [ + { + "name": "psu1", + "present": { + "addr": 0x951, + "format": DecodeFormat.ONE_BIT_HEX, + "bit": 0, + "way": DecodeMethod.IO + }, + "status": { + "addr": 0x951, + "format": DecodeFormat.ONE_BIT_HEX, + "bit": 1, + "way": DecodeMethod.IO + }, + "sn": { + "loc": "/sys/bus/i2c/devices/24-0050/eeprom", + "format": DecodeFormat.FRU, + "fru_key": FRU.SN + }, + "in_current": { + "loc": "/sys/bus/i2c/devices/24-0058/hwmon/*/curr1_input", + "format": DecodeFormat.THOUSANDTH, + }, + "in_voltage": { + "loc": "/sys/bus/i2c/devices/24-0058/hwmon/*/in1_input", + "format": DecodeFormat.THOUSANDTH, + }, + "out_voltage": { + "loc": "/sys/bus/i2c/devices/24-0058/hwmon/*/in2_input", + "format": DecodeFormat.THOUSANDTH, + }, + "out_current": { + "loc": "/sys/bus/i2c/devices/24-0058/hwmon/*/curr2_input", + "format": DecodeFormat.THOUSANDTH, + }, + "temperature": { + "loc": "/sys/bus/i2c/devices/24-0058/hwmon/*/temp1_input", + "format": DecodeFormat.THOUSANDTH, + }, + "hw_version": { + "loc": "/sys/bus/i2c/devices/24-0050/eeprom", + "format": DecodeFormat.FRU, + "fru_key": FRU.VERSION + }, + # "psu_type": { + # "loc": "/sys/bus/i2c/devices/24-0050/eeprom", + # "format": DecodeFormat.FRU, + # "fru_key": FRU.SN + # }, + "fans": [ + { + "name": "psu_fan1", + "present": { + "loc": "/sys/bus/i2c/devices/24-0058/hwmon/*/fan1_fault", + }, + "status": { + "addr": 0x951, + "format": DecodeFormat.ONE_BIT_HEX, + "bit": 1, + "way": DecodeMethod.IO + }, + "rotors": [ + { + "speed_getter": { + "loc": "/sys/bus/i2c/devices/24-0058/hwmon/*/fan1_input" + }, + "speed_setter": { + "bus": 24, + "addr": 0x58, + "offset": 0x3b, + "size": 1, + "way": DecodeMethod.I2C, + "format": DecodeFormat.HEX, + }, + "speed_max": Threshold.PSU_FAN_SPEED_MAX, + } + ], + "tolerance": 20, + "threshold_low": 1900, + } + ], + "in_power": { + "loc": "/sys/bus/i2c/devices/24-0058/hwmon/*/power1_input", + "format": DecodeFormat.MILLIONTH, + }, + "out_power": { + "loc": "/sys/bus/i2c/devices/24-0058/hwmon/*/power2_input", + "format": DecodeFormat.MILLIONTH, + }, + }, + { + "name": "psu2", + "present": { + "addr": 0x951, + "format": DecodeFormat.ONE_BIT_HEX, + "bit": 4, + "way": DecodeMethod.IO + }, + "status": { + "addr": 0x951, + "format": DecodeFormat.ONE_BIT_HEX, + "bit": 5, + "way": DecodeMethod.IO + }, + "sn": { + "loc": "/sys/bus/i2c/devices/25-0050/eeprom", + "format": DecodeFormat.FRU, + "fru_key": FRU.SN + }, + "in_current": { + "loc": "/sys/bus/i2c/devices/25-0058/hwmon/*/curr1_input", + "format": DecodeFormat.THOUSANDTH, + }, + "in_voltage": { + "loc": "/sys/bus/i2c/devices/25-0058/hwmon/*/in1_input", + "format": DecodeFormat.THOUSANDTH, + }, + "out_voltage": { + "loc": "/sys/bus/i2c/devices/25-0058/hwmon/*/in2_input", + "format": DecodeFormat.THOUSANDTH, + }, + "out_current": { + "loc": "/sys/bus/i2c/devices/25-0058/hwmon/*/curr2_input", + "format": DecodeFormat.THOUSANDTH, + }, + "temperature": { + "loc": "/sys/bus/i2c/devices/25-0058/hwmon/*/temp1_input", + "format": DecodeFormat.THOUSANDTH, + }, + "hw_version": { + "loc": "/sys/bus/i2c/devices/25-0050/eeprom", + "format": DecodeFormat.FRU, + "fru_key": FRU.VERSION + }, + # "psu_type": {"loc": "/sys/bus/i2c/devices/8-0053/psu_type"}, + "fans": [ + { + "name": "psu_fan1", + "present": { + "loc": "/sys/bus/i2c/devices/25-0058/hwmon/*/fan1_fault", + }, + "status": { + "addr": 0x951, + "format": DecodeFormat.ONE_BIT_HEX, + "bit": 5, + "way": DecodeMethod.IO + }, + "rotors": [ + { + "speed_getter": { + "loc": "/sys/bus/i2c/devices/25-0058/hwmon/*/fan1_input" + }, + "speed_setter": { + "bus": 25, + "addr": 0x58, + "offset": 0x3b, + "size": 1, + "way": DecodeMethod.I2C, + "format": DecodeFormat.HEX, + }, + "speed_max": Threshold.PSU_FAN_SPEED_MAX, + } + ], + "tolerance": 20, + "threshold_low": 1900, + } + ], + "in_power": { + "loc": "/sys/bus/i2c/devices/25-0058/hwmon/*/power1_input", + "format": DecodeFormat.MILLIONTH, + }, + "out_power": { + "loc": "/sys/bus/i2c/devices/25-0058/hwmon/*/power2_input", + "format": DecodeFormat.MILLIONTH, + }, + }, + ], +} diff --git a/platform/broadcom/sonic-platform-modules-ragile/ra-b6920-4s/sonic_platform/eeprom.py b/platform/broadcom/sonic-platform-modules-ragile/ra-b6920-4s/sonic_platform/eeprom.py new file mode 100644 index 0000000000..c25d711354 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ragile/ra-b6920-4s/sonic_platform/eeprom.py @@ -0,0 +1,12 @@ +try: + from sonic_platform_pddf_base.pddf_eeprom import PddfEeprom +except ImportError as e: + raise ImportError(str(e) + "- required module not found") + + +class Eeprom(PddfEeprom): + + def __init__(self, pddf_data=None, pddf_plugin_data=None): + PddfEeprom.__init__(self, pddf_data, pddf_plugin_data) + + # Provide the functions/variables below for which implementation is to be overwritten diff --git a/platform/broadcom/sonic-platform-modules-ragile/ra-b6920-4s/sonic_platform/fan.py b/platform/broadcom/sonic-platform-modules-ragile/ra-b6920-4s/sonic_platform/fan.py new file mode 100644 index 0000000000..14895ec47e --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ragile/ra-b6920-4s/sonic_platform/fan.py @@ -0,0 +1,42 @@ +try: + from sonic_platform_pddf_base.pddf_fan import PddfFan +except ImportError as e: + raise ImportError(str(e) + "- required module not found") + + +class Fan(PddfFan): + """PDDF Platform-Specific Fan class""" + + def __init__(self, tray_idx, fan_idx=0, pddf_data=None, pddf_plugin_data=None, is_psu_fan=False, psu_index=0): + # idx is 0-based + PddfFan.__init__(self, tray_idx, fan_idx, pddf_data, pddf_plugin_data, is_psu_fan, psu_index) + + # Provide the functions/variables below for which implementation is to be overwritten + # Since psu_fan airflow direction cant be read from sysfs, it is fixed as 'F2B' or 'intake' + def get_direction(self): + """ + Retrieves the direction of fan + + Returns: + A string, either FAN_DIRECTION_INTAKE or FAN_DIRECTION_EXHAUST + depending on fan direction + """ + return self.FAN_DIRECTION_EXHAUST + + def get_speed_rpm(self): + if self.is_psu_fan: + return int(round(super().get_speed_rpm())) + else: + divisor = 15000000 + mask_low = 0xff + ret = super().get_speed_rpm() + # revert ret + ret = (ret >> 8) + ((ret & mask_low) << 8) + return int(round(divisor/ret)) + + def get_target_speed(self): + if self.is_psu_fan: + return None + + return super().get_target_speed() + diff --git a/platform/broadcom/sonic-platform-modules-ragile/ra-b6920-4s/sonic_platform/fan_drawer.py b/platform/broadcom/sonic-platform-modules-ragile/ra-b6920-4s/sonic_platform/fan_drawer.py new file mode 100644 index 0000000000..2f83b66df9 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ragile/ra-b6920-4s/sonic_platform/fan_drawer.py @@ -0,0 +1,69 @@ +# +# fan_drawer +# + +try: + from sonic_platform_base.fan_drawer_base import FanDrawerBase +except ImportError as e: + raise ImportError(str(e) + "- required module not found") + + +class FanDrawer(FanDrawerBase): + # Device type definition. Note, this is a constant. + DEVICE_TYPE = "fan_drawer" + + def __init__(self, index, fan_list): + FanDrawerBase.__init__(self) + + self._fan_list = fan_list + self._index = index + + def get_name(self): + """ + Retrieves the name of the device + Returns: + string: The name of the device + """ + + return "fan drawer {}".format(self._index) + + def get_num_fans(self): + """ + Retrieves the number of fans available on this fan drawer + Returns: + An integer, the number of fan modules available on this fan drawer + """ + return len(self._fan_list) + + def get_all_fans(self): + """ + Retrieves all fan modules available on this fan drawer + Returns: + A list of objects derived from FanBase representing all fan + modules available on this fan drawer + """ + return self._fan_list + + def set_status_led(self, color): + """ + Sets the state of the fan drawer status LED + Args: + color: A string representing the color with which to set the + fan drawer status LED + Returns: + bool: True if status LED state is set successfully, False if not + """ + if self.get_num_fans() > 0: + return self._fan_list[0].set_status_led(color) + return False + + def get_status_led(self): + """ + Gets the state of the fan drawer LED + Returns: + A string, one of the predefined STATUS_LED_COLOR_* strings above + """ + if self.get_num_fans() > 0: + return self._fan_list[0].get_status_led() + return "N/A" + diff --git a/platform/broadcom/sonic-platform-modules-ragile/ra-b6920-4s/sonic_platform/logger.py b/platform/broadcom/sonic-platform-modules-ragile/ra-b6920-4s/sonic_platform/logger.py new file mode 100644 index 0000000000..5969781bf9 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ragile/ra-b6920-4s/sonic_platform/logger.py @@ -0,0 +1,19 @@ +# -*- coding: utf-8 -*- + +import logging + + +def _init_logger(): + formatter = logging.Formatter( + "%(asctime)s %(levelname)s %(filename)s[%(funcName)s][%(lineno)s]: %(message)s" + ) + handler = logging.FileHandler("/var/log/syslog") + handler.setFormatter(formatter) + + logger = logging.getLogger(__name__) + logger.setLevel(logging.DEBUG) + logger.addHandler(handler) + return logger + + +logger = _init_logger() diff --git a/platform/broadcom/sonic-platform-modules-ragile/ra-b6920-4s/sonic_platform/pcie.py b/platform/broadcom/sonic-platform-modules-ragile/ra-b6920-4s/sonic_platform/pcie.py new file mode 100644 index 0000000000..5a66997d33 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ragile/ra-b6920-4s/sonic_platform/pcie.py @@ -0,0 +1,43 @@ +# +# pcie_base.py +# +# Abstract base class for implementing platform-specific +# PCIE functionality for SONiC +# + +try: + import abc + from sonic_pcie import PcieUtil +except ImportError as e: + raise ImportError (str(e) + " - required module not found") + +class PcieBase(object): + def __init__(self, path): + """ + Constructor + Args: + pcieutil file and config file path + """ + self.pcie_util = PcieUtil(path) + + + @abc.abstractmethod + def get_pcie_device(self): + """ + get current device pcie info + + Returns: + A list including pcie device info + """ + return self.pcie_util.get_pcie_device() + + + @abc.abstractmethod + def get_pcie_check(self): + """ + Check Pcie device with config file + Returns: + A list including pcie device and test result info + """ + return self.pcie_util.get_pcie_check() + diff --git a/platform/broadcom/sonic-platform-modules-ragile/ra-b6920-4s/sonic_platform/platform.py b/platform/broadcom/sonic-platform-modules-ragile/ra-b6920-4s/sonic_platform/platform.py new file mode 100644 index 0000000000..8595e80692 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ragile/ra-b6920-4s/sonic_platform/platform.py @@ -0,0 +1,23 @@ +############################################################################# +# PDDF +# Module contains an implementation of SONiC Platform Base API and +# provides the platform information +# +############################################################################# + + +try: + from sonic_platform_pddf_base.pddf_platform import PddfPlatform +except ImportError as e: + raise ImportError(str(e) + "- required module not found") + + +class Platform(PddfPlatform): + """ + PDDF Platform-Specific Platform Class + """ + + def __init__(self): + PddfPlatform.__init__(self) + + # Provide the functions/variables below for which implementation is to be overwritten diff --git a/platform/broadcom/sonic-platform-modules-ragile/ra-b6920-4s/sonic_platform/psu.py b/platform/broadcom/sonic-platform-modules-ragile/ra-b6920-4s/sonic_platform/psu.py new file mode 100644 index 0000000000..57dd5117a2 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ragile/ra-b6920-4s/sonic_platform/psu.py @@ -0,0 +1,32 @@ +try: + from sonic_platform_pddf_base.pddf_psu import PddfPsu +except ImportError as e: + raise ImportError (str(e) + "- required module not found") + + +class Psu(PddfPsu): + """PDDF Platform-Specific PSU class""" + + PLATFORM_PSU_CAPACITY = 1200 + + def __init__(self, index, pddf_data=None, pddf_plugin_data=None): + PddfPsu.__init__(self, index, pddf_data, pddf_plugin_data) + + # Provide the functions/variables below for which implementation is to be overwritten + def get_maximum_supplied_power(self): + """ + Retrieves the maximum supplied power by PSU (or PSU capacity) + Returns: + A float number, the maximum power output in Watts. + e.g. 1200.1 + """ + return float(self.PLATFORM_PSU_CAPACITY) + + def get_type(self): + """ + Gets the type of the PSU + Returns: + A string, the type of PSU (AC/DC) + """ + return "DC" + diff --git a/platform/broadcom/sonic-platform-modules-ragile/ra-b6920-4s/sonic_platform/regutil.py b/platform/broadcom/sonic-platform-modules-ragile/ra-b6920-4s/sonic_platform/regutil.py new file mode 100644 index 0000000000..bff2bd41ea --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ragile/ra-b6920-4s/sonic_platform/regutil.py @@ -0,0 +1,245 @@ +# -*- coding: utf-8 -*- +from glob import glob +from plat_hal.osutil import osutil + +try: + from sonic_platform.config import DecodeFormat, DecodeMethod + + DECODE_FORMAT = DecodeFormat + DECODE_METHOD = DecodeMethod +except ImportError: + raise ImportError(str(e) + "- required module not found") + +ERR_CODE = "ERR" + + +class Reg(object): + """ + "e2loc": {"bus": 3, "addr": 0x53, "way": "i2c"} + "value": { + "loc": "/sys/bus/i2c/devices/2-0048/hwmon/hwmon*/temp1_input", + "way": "sysfs", + + "InputsStatus": { + "bus": 8, + "addr": 0x5B, + "offset": 0x79, + "way": "i2cword", + "mask": 0x0200, + }, + """ + + def __new__(cls, *args): + if args[0] is None or not isinstance(args[0], dict): + return None + return super(Reg, cls).__new__(cls) + + def __init__(self, data): + + self.loc = None + self.way = DECODE_METHOD.SYSFS + self.addr = None + self.bus = None + self.offset = None + self.size = 1 + self.bit = None + self.mask = None + self.digit = None + self.sdk_type = None + self.sep = None + self.format = DECODE_FORMAT.TEXT + self.__dict__.update(data) + + def _read_reg_val(self): + ret = None + try: + if self.way == DECODE_METHOD.SYSFS: + ret = self.get_sysfs() + elif self.way == DECODE_METHOD.I2C: + ret = self.get_i2c() + elif self.way == DECODE_METHOD.I2C_WORD: + ret = self.get_i2cword() + elif self.way == DECODE_METHOD.DEVMEM: + ret = self.get_devmem() + elif self.way == DECODE_METHOD.SDK: + # TODO + pass + else: + pass + except Exception as e: + raise e + + return ret + + def _write_reg_val(self, val): + try: + if self.way == DECODE_METHOD.SYSFS: + return self._write_sysfs(val) + except Exception as e: + raise e + + return False + + def _write_sysfs(self, val): + try: + with open(glob(self.loc)[0], "w") as f: + f.write(val) + f.flush() + return True + except Exception as e: + raise e + + def _format_val(self, val): + try: + if isinstance(val, str): + val = val.strip() + if self.format == DECODE_FORMAT.THOUSANDTH: + return float("%.1f" % (float(val) / 1000)) + elif self.format == DECODE_FORMAT.HUNDREDTH: + return float("%.1f" % (float(val) / 100)) + elif self.format == DECODE_FORMAT.ONE_BIT_HEX: + return (int(val, 16) & (1 << self.bit)) >> self.bit + elif self.format == DECODE_FORMAT.DECIMAL: + return int(val, 10) + elif self.format == DECODE_FORMAT.MILLIONTH: + return float("%.1f" % (float(val) / 1000 / 1000)) + elif self.format == DECODE_FORMAT.AND: + return (int(val, 16)) & self.mask + elif isinstance(val, list): + if self.format == DECODE_FORMAT.JOIN: + return self.sep.join(val) + except Exception as e: + raise e + else: + return val + + def decode(self): + """ + get value by config way + way i2c/sysfs/lpc + """ + if self.way is None: + raise ValueError("cannot found way to deal") + + ret = self._read_reg_val() + + ret = self._format_val(ret) + return ret + + def encode(self, val): + if self.way is None: + raise ValueError("cannot found way to deal") + + return self._write_reg_val(val) + + def get_sdk(self): + # TODO + pass + + def get_sysfs(self): + if self.loc is None: + raise ValueError("Not Enough Attr: loc: {}".format(self.loc)) + + ret, val = osutil.readsysfs(self.loc) + + if not ret: + raise IOError(val) + + return val + + def get_devmem(self): + if self.addr is None or self.digit is None or self.mask is None: + raise ValueError( + "Not Enough Attr: addr: {}, digit: {}, mask: {}".format( + self.addr, self.digit, self.mask + ) + ) + + ret, val = osutil.getdevmem(self.addr, self.digit, self.mask) + + if not ret: + raise IOError(val) + + return val + + def get_i2cword(self): + if self.bus is None or self.addr is None or self.offset is None: + raise ValueError( + "Not Enough Attr: bus: {}, addr: {}, offset: {}".format( + self.bus, self.addr, self.offset + ) + ) + + ret, val = osutil.geti2cword(self.bus, self.addr, self.offset) + + if not ret: + raise IOError(val) + + return val + + def get_i2c(self): + if ( + self.bus is None + or self.addr is None + or self.offset is None + or self.size is None + ): + raise ValueError( + "Not Enough Attr: bus: {}, addr: {}, offset: {}".format( + self.bus, self.addr, self.offset + ) + ) + + value = [] + for i in range(self.size): + ofs = self.offset + i + ret, val = osutil.rji2cget(self.bus, self.addr, ofs) + + if not ret: + raise IOError(val) + else: + value.append(repr(chr(val)).translate(None, r"\\x").replace("'", "")) + + return value + + def set_i2cword(self, bus, addr, offset, byte): + return self.seti2cword(bus, addr, offset, byte) + + def seti2cword(self, bus, addr, offset, byte): + return osutil.seti2cword(bus, addr, offset, byte) + + def set_i2c(self, bus, addr, offset, byte): + return self.seti2c(bus, addr, offset, byte) + + def seti2c(self, bus, addr, offset, byte): + ret, val = osutil.rji2cset(bus, addr, offset, byte) + return ret, val + + def getbcmtemp(self): + try: + sta, ret = osutil.getmactemp() + if sta == True: + mac_aver = float(ret.get("average", self.__error_ret)) + #mac_max = float(ret.get("maximum", self.__error_ret)) + mac_aver = mac_aver * 1000 + #mac_max = mac_max * 1000 + else: + return False, ret + except AttributeError as e: + return False, str(e) + return True, mac_aver + + def getbcmreg(self, reg): + ret, val = osutil.getsdkreg(reg) + return ret, val + + def logger_debug(self, msg): + baseutil.logger_debug(msg) + + def command(self, cmd): + ret, output = osutil.command(cmd) + return ret, output + + def set_val(self, val): + # TODO + pass diff --git a/platform/broadcom/sonic-platform-modules-ragile/ra-b6920-4s/sonic_platform/rotor.py b/platform/broadcom/sonic-platform-modules-ragile/ra-b6920-4s/sonic_platform/rotor.py new file mode 100644 index 0000000000..3e5bcc5b9b --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ragile/ra-b6920-4s/sonic_platform/rotor.py @@ -0,0 +1,41 @@ +# -*- coding: utf-8 -*- + +try: + from sonic_platform.regutil import Reg + from sonic_platform.logger import logger +except ImportError: + raise ImportError(str(e) + "- required module not found") + +class Rotor: + def __init__(self, config): + if config is not None and isinstance(config, dict): + self.__reg_speed_getter = Reg(config.get("speed_getter")) + self.__reg_speed_setter = Reg(config.get("speed_setter")) + self.__speed_max = config.get("speed_max") + else: + raise ValueError("init rotor Error: {}".format(config)) + + def get_speed(self): + try: + return int(self.__reg_speed_getter.decode()) + except Exception as e: + logger.error(str(e)) + + return 0 + + def set_speed(self, speed): + try: + return self.__reg_speed_setter.encode(speed) + except Exception as e: + logger.error(str(e)) + + return False + + def get_speed_percentage(self): + try: + speed = self.get_speed() + return (100 * speed) / self.__speed_max + except Exception as e: + logger.error(str(e)) + + return 0 diff --git a/platform/broadcom/sonic-platform-modules-ragile/ra-b6920-4s/sonic_platform/sfp.py b/platform/broadcom/sonic-platform-modules-ragile/ra-b6920-4s/sonic_platform/sfp.py new file mode 100644 index 0000000000..ea8e256fe6 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ragile/ra-b6920-4s/sonic_platform/sfp.py @@ -0,0 +1,287 @@ +#!/usr/bin/env python + +try: + #from sonic_platform_pddf_base.pddf_sfp import * + from sonic_platform_base.sonic_sfp.sff8436 import sff8436InterfaceId + from sonic_platform_base.sonic_sfp.sff8436 import sff8436Dom + from sonic_platform_base.sonic_sfp.sff8472 import sff8472InterfaceId + from sonic_platform_base.sonic_sfp.sff8472 import sff8472Dom + from sonic_platform_pddf_base.pddf_sfp import PddfSfp + from sonic_platform_pddf_base.pddf_sfp import SFP_VOLT_OFFSET + from sonic_platform_pddf_base.pddf_sfp import SFP_VOLT_WIDTH + from sonic_platform_pddf_base.pddf_sfp import SFP_CHANNL_MON_OFFSET + from sonic_platform_pddf_base.pddf_sfp import SFP_CHANNL_MON_WIDTH + from sonic_platform_pddf_base.pddf_sfp import SFP_TEMPE_OFFSET + from sonic_platform_pddf_base.pddf_sfp import SFP_TEMPE_WIDTH + from sonic_platform_pddf_base.pddf_sfp import QSFP_DOM_REV_OFFSET + from sonic_platform_pddf_base.pddf_sfp import QSFP_DOM_REV_WIDTH + from sonic_platform_pddf_base.pddf_sfp import QSFP_CHANNL_MON_OFFSET + from sonic_platform_pddf_base.pddf_sfp import QSFP_CHANNL_MON_WITH_TX_POWER_WIDTH +except ImportError as e: + raise ImportError (str(e) + "- required module not found") + +XCVR_DOM_CAPABILITY_OFFSET = 92 +XCVR_DOM_CAPABILITY_WIDTH = 2 +QSFP_VERSION_COMPLIANCE_OFFSET = 1 +QSFP_VERSION_COMPLIANCE_WIDTH = 2 +QSFP_OPTION_VALUE_OFFSET = 192 +QSFP_OPTION_VALUE_WIDTH = 4 + +class Sfp(PddfSfp): + """ + PDDF Platform-Specific Sfp class + """ + + def __init__(self, index, pddf_data=None, pddf_plugin_data=None): + PddfSfp.__init__(self, index, pddf_data, pddf_plugin_data) + self.dom_supported = False + self.__dom_capability_detect() + + def __dom_capability_detect(self): + self.dom_supported = False + self.dom_temp_supported = False + self.dom_volt_supported = False + self.dom_rx_power_supported = False + self.dom_tx_power_supported = False + self.qsfp_page3_available = False + self.calibration = 0 + if not self.get_presence(): + return + + if self.is_osfp_port: + # Not implement + return + elif self.is_qsfp_port: + self.calibration = 1 + sfpi_obj = sff8436InterfaceId() + if sfpi_obj is None: + self.dom_supported = False + offset = 128 + + # QSFP capability byte parse, through this byte can know whether it support tx_power or not. + # TODO: in the future when decided to migrate to support SFF-8636 instead of SFF-8436, + # need to add more code for determining the capability and version compliance + # in SFF-8636 dom capability definitions evolving with the versions. + qsfp_dom_capability_raw = self.__read_eeprom_specific_bytes( + (offset + XCVR_DOM_CAPABILITY_OFFSET), XCVR_DOM_CAPABILITY_WIDTH) + if qsfp_dom_capability_raw is not None: + qsfp_version_compliance_raw = self.__read_eeprom_specific_bytes( + QSFP_VERSION_COMPLIANCE_OFFSET, QSFP_VERSION_COMPLIANCE_WIDTH) + qsfp_version_compliance = int( + qsfp_version_compliance_raw[0], 16) + dom_capability = sfpi_obj.parse_dom_capability( + qsfp_dom_capability_raw, 0) + if qsfp_version_compliance >= 0x08: + self.dom_temp_supported = dom_capability['data']['Temp_support']['value'] == 'On' + self.dom_volt_supported = dom_capability['data']['Voltage_support']['value'] == 'On' + self.dom_rx_power_supported = dom_capability['data']['Rx_power_support']['value'] == 'On' + self.dom_tx_power_supported = dom_capability['data']['Tx_power_support']['value'] == 'On' + else: + self.dom_temp_supported = True + self.dom_volt_supported = True + self.dom_rx_power_supported = dom_capability['data']['Rx_power_support']['value'] == 'On' + self.dom_tx_power_supported = True + + self.dom_supported = True + self.calibration = 1 + sfpd_obj = sff8436Dom() + if sfpd_obj is None: + return None + qsfp_option_value_raw = self.__read_eeprom_specific_bytes( + QSFP_OPTION_VALUE_OFFSET, QSFP_OPTION_VALUE_WIDTH) + if qsfp_option_value_raw is not None: + optional_capability = sfpd_obj.parse_option_params( + qsfp_option_value_raw, 0) + self.dom_tx_disable_supported = optional_capability[ + 'data']['TxDisable']['value'] == 'On' + dom_status_indicator = sfpd_obj.parse_dom_status_indicator( + qsfp_version_compliance_raw, 1) + self.qsfp_page3_available = dom_status_indicator['data']['FlatMem']['value'] == 'Off' + else: + self.dom_supported = False + self.dom_temp_supported = False + self.dom_volt_supported = False + self.dom_rx_power_supported = False + self.dom_tx_power_supported = False + self.calibration = 0 + self.qsfp_page3_available = False + else: + sfpi_obj = sff8472InterfaceId() + if sfpi_obj is None: + return None + sfp_dom_capability_raw = self.__read_eeprom_specific_bytes( + XCVR_DOM_CAPABILITY_OFFSET, XCVR_DOM_CAPABILITY_WIDTH) + if sfp_dom_capability_raw is not None: + sfp_dom_capability = int(sfp_dom_capability_raw[0], 16) + self.dom_supported = (sfp_dom_capability & 0x40 != 0) + if self.dom_supported: + self.dom_temp_supported = True + self.dom_volt_supported = True + self.dom_rx_power_supported = True + self.dom_tx_power_supported = True + if sfp_dom_capability & 0x20 != 0: + self.calibration = 1 + elif sfp_dom_capability & 0x10 != 0: + self.calibration = 2 + else: + self.calibration = 0 + else: + self.dom_temp_supported = False + self.dom_volt_supported = False + self.dom_rx_power_supported = False + self.dom_tx_power_supported = False + self.calibration = 0 + self.dom_tx_disable_supported = ( + int(sfp_dom_capability_raw[1], 16) & 0x40 != 0) + + # Provide the functions/variables below for which implementation is to be overwritten + + def __read_eeprom_specific_bytes(self, offset, num_bytes): + eeprom_raw = [] + if not self.get_presence(): + return None + for i in range(0, num_bytes): + eeprom_raw.append("0x00") + + try: + with open(self.eeprom_path, mode="rb", buffering=0) as eeprom: + eeprom.seek(offset) + raw = eeprom.read(num_bytes) + except Exception as e: + print("Error: Unable to open eeprom_path: %s" % (str(e))) + return None + + try: + if len(raw) == 0: + return None + for n in range(0, num_bytes): + eeprom_raw[n] = hex(raw[n])[2:].zfill(2) + except Exception as e: + print("Error: Exception info: %s" % (str(e))) + return None + + return eeprom_raw + + def get_transceiver_bulk_status(self): + # check present status + if not self.get_presence(): + return None + self.__dom_capability_detect() + + xcvr_dom_info_dict = dict.fromkeys(self.dom_dict_keys, 'N/A') + + if self.is_osfp_port: + # Below part is added to avoid fail xcvrd, shall be implemented later + pass + elif self.is_qsfp_port: + # QSFPs + xcvr_dom_info_dict = super(Sfp, self).get_transceiver_bulk_status() + + # pddf_sfp "qsfp_tx_power_support != 'on'" is wrong + + offset = 0 + sfpd_obj = sff8436Dom() + if sfpd_obj is None: + return None + + qsfp_dom_rev_raw = self.__read_eeprom_specific_bytes((offset + QSFP_DOM_REV_OFFSET), QSFP_DOM_REV_WIDTH) + if qsfp_dom_rev_raw is not None: + qsfp_dom_rev_data = sfpd_obj.parse_sfp_dom_rev(qsfp_dom_rev_raw, 0) + else: + return None + + dom_channel_monitor_data = {} + qsfp_dom_rev = qsfp_dom_rev_data['data']['dom_rev']['value'] + + if (qsfp_dom_rev[0:8] == 'SFF-8636' and self.dom_tx_power_supported is True): + dom_channel_monitor_raw = self.__read_eeprom_specific_bytes( + (offset + QSFP_CHANNL_MON_OFFSET), QSFP_CHANNL_MON_WITH_TX_POWER_WIDTH) + if dom_channel_monitor_raw is not None: + dom_channel_monitor_data = sfpd_obj.parse_channel_monitor_params_with_tx_power( + dom_channel_monitor_raw, 0) + else: + return None + + xcvr_dom_info_dict['tx1power'] = dom_channel_monitor_data['data']['TX1Power']['value'] + xcvr_dom_info_dict['tx2power'] = dom_channel_monitor_data['data']['TX2Power']['value'] + xcvr_dom_info_dict['tx3power'] = dom_channel_monitor_data['data']['TX3Power']['value'] + xcvr_dom_info_dict['tx4power'] = dom_channel_monitor_data['data']['TX4Power']['value'] + else: + # SFPs + offset = 256 + if not self.dom_supported: + return xcvr_dom_info_dict + + sfpd_obj = sff8472Dom() + if sfpd_obj is None: + return None + + sfpd_obj._calibration_type = self.calibration + + dom_temperature_raw = self.__read_eeprom_specific_bytes((offset + SFP_TEMPE_OFFSET), SFP_TEMPE_WIDTH) + if dom_temperature_raw is not None: + dom_temperature_data = sfpd_obj.parse_temperature(dom_temperature_raw, 0) + else: + return None + + dom_voltage_raw = self.__read_eeprom_specific_bytes((offset + SFP_VOLT_OFFSET), SFP_VOLT_WIDTH) + if dom_voltage_raw is not None: + dom_voltage_data = sfpd_obj.parse_voltage(dom_voltage_raw, 0) + else: + return None + + dom_channel_monitor_raw = self.__read_eeprom_specific_bytes( + (offset + SFP_CHANNL_MON_OFFSET), SFP_CHANNL_MON_WIDTH) + if dom_channel_monitor_raw is not None: + dom_channel_monitor_data = sfpd_obj.parse_channel_monitor_params(dom_channel_monitor_raw, 0) + else: + return None + + xcvr_dom_info_dict['temperature'] = dom_temperature_data['data']['Temperature']['value'] + xcvr_dom_info_dict['voltage'] = dom_voltage_data['data']['Vcc']['value'] + xcvr_dom_info_dict['rx1power'] = dom_channel_monitor_data['data']['RXPower']['value'] + xcvr_dom_info_dict['rx2power'] = 'N/A' + xcvr_dom_info_dict['rx3power'] = 'N/A' + xcvr_dom_info_dict['rx4power'] = 'N/A' + xcvr_dom_info_dict['tx1bias'] = dom_channel_monitor_data['data']['TXBias']['value'] + xcvr_dom_info_dict['tx2bias'] = 'N/A' + xcvr_dom_info_dict['tx3bias'] = 'N/A' + xcvr_dom_info_dict['tx4bias'] = 'N/A' + xcvr_dom_info_dict['tx1power'] = dom_channel_monitor_data['data']['TXPower']['value'] + xcvr_dom_info_dict['tx2power'] = 'N/A' + xcvr_dom_info_dict['tx3power'] = 'N/A' + xcvr_dom_info_dict['tx4power'] = 'N/A' + + xcvr_dom_info_dict['rx_los'] = self.get_rx_los() + xcvr_dom_info_dict['tx_fault'] = self.get_tx_fault() + xcvr_dom_info_dict['reset_status'] = self.get_reset_status() + xcvr_dom_info_dict['lp_mode'] = self.get_lpmode() + + return xcvr_dom_info_dict + + def get_transceiver_threshold_info(self): + # check present status + if not self.get_presence(): + return None + self.__dom_capability_detect() + + xcvr_dom_threshold_info_dict = dict.fromkeys(self.threshold_dict_keys, 'N/A') + + if self.is_osfp_port: + # Below part is added to avoid fail xcvrd, shall be implemented later + pass + elif self.is_qsfp_port: + # QSFPs + if not self.dom_supported or not self.qsfp_page3_available: + return xcvr_dom_threshold_info_dict + + return super(Sfp, self).get_transceiver_threshold_info() + + else: + # SFPs + if not self.dom_supported: + return xcvr_dom_threshold_info_dict + + return super(Sfp, self).get_transceiver_threshold_info() + + return xcvr_dom_threshold_info_dict diff --git a/platform/broadcom/sonic-platform-modules-ragile/ra-b6920-4s/sonic_platform/thermal.py b/platform/broadcom/sonic-platform-modules-ragile/ra-b6920-4s/sonic_platform/thermal.py new file mode 100644 index 0000000000..99b743c6d3 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ragile/ra-b6920-4s/sonic_platform/thermal.py @@ -0,0 +1,14 @@ +try: + from sonic_platform_pddf_base.pddf_thermal import PddfThermal +except ImportError as e: + raise ImportError(str(e) + "- required module not found") + + + +class Thermal(PddfThermal): + """PDDF Platform-Specific Thermal class""" + + def __init__(self, index, pddf_data=None, pddf_plugin_data=None): + PddfThermal.__init__(self, index, pddf_data, pddf_plugin_data) + + # Provide the functions/variables below for which implementation is to be overwritten diff --git a/platform/broadcom/sonic-platform-modules-ragile/ra-b6920-4s/sonic_platform/watchdog.py b/platform/broadcom/sonic-platform-modules-ragile/ra-b6920-4s/sonic_platform/watchdog.py new file mode 100644 index 0000000000..37788c2c82 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ragile/ra-b6920-4s/sonic_platform/watchdog.py @@ -0,0 +1,21 @@ +############################################################################# +# +# Module contains an implementation of platform specific watchdog API's +# +############################################################################# + +try: + from sonic_platform_pddf_base.pddf_watchdog import PddfWatchdog +except ImportError as e: + raise ImportError(str(e) + "- required module not found") + +class Watchdog(PddfWatchdog): + """ + PDDF Platform-specific Chassis class + """ + + def __init__(self): + PddfWatchdog.__init__(self) + self.timeout= 180 + + # Provide the functions/variables below for which implementation is to be overwritten diff --git a/platform/broadcom/sonic-platform-modules-ragile/ra-b6920-4s/systemd/pddf-platform-init.service b/platform/broadcom/sonic-platform-modules-ragile/ra-b6920-4s/systemd/pddf-platform-init.service new file mode 120000 index 0000000000..0fd9f25b6c --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ragile/ra-b6920-4s/systemd/pddf-platform-init.service @@ -0,0 +1 @@ +../../../../pddf/i2c/service/pddf-platform-init.service \ No newline at end of file diff --git a/src/sonic-device-data/tests/permitted_list b/src/sonic-device-data/tests/permitted_list index 4bbe223aec..c1f70dc7be 100644 --- a/src/sonic-device-data/tests/permitted_list +++ b/src/sonic-device-data/tests/permitted_list @@ -297,6 +297,16 @@ lb_port_pipe1_int ing_origin_id_device_id_mask egr_origin_id_device_id_mask port_count_in_pb_stream +cancun_dir +pcie_file +capi_level +phy_pin_compatibility_enable +cfg_int_phy_ctrl +stand_alone_phy_init +sap_rx_polarity_flip +sap_tx_polarity_flip +sap_mdio_num +dport_map_port_9 ifa_enable port_gmii_mode phy_force_firmware_load