[Ufispace][PDDF] Add support for S9301-32D platform

This commit is contained in:
linyutsung 2023-09-22 15:25:18 +08:00
parent a8af76f108
commit 0cb357797f
51 changed files with 11202 additions and 3 deletions

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{
"interfaces": {
"Ethernet0": {
"default_brkout_mode": "1x400G"
},
"Ethernet8": {
"default_brkout_mode": "1x400G"
},
"Ethernet16": {
"default_brkout_mode": "1x400G"
},
"Ethernet24": {
"default_brkout_mode": "1x400G"
},
"Ethernet32": {
"default_brkout_mode": "1x400G"
},
"Ethernet40": {
"default_brkout_mode": "1x400G"
},
"Ethernet48": {
"default_brkout_mode": "1x400G"
},
"Ethernet56": {
"default_brkout_mode": "1x400G"
},
"Ethernet64": {
"default_brkout_mode": "1x400G"
},
"Ethernet72": {
"default_brkout_mode": "1x400G"
},
"Ethernet80": {
"default_brkout_mode": "1x400G"
},
"Ethernet88": {
"default_brkout_mode": "1x400G"
},
"Ethernet96": {
"default_brkout_mode": "1x400G"
},
"Ethernet104": {
"default_brkout_mode": "1x400G"
},
"Ethernet112": {
"default_brkout_mode": "1x400G"
},
"Ethernet120": {
"default_brkout_mode": "1x400G"
},
"Ethernet128": {
"default_brkout_mode": "1x400G"
},
"Ethernet136": {
"default_brkout_mode": "1x400G"
},
"Ethernet144": {
"default_brkout_mode": "1x400G"
},
"Ethernet152": {
"default_brkout_mode": "1x400G"
},
"Ethernet160": {
"default_brkout_mode": "1x400G"
},
"Ethernet168": {
"default_brkout_mode": "1x400G"
},
"Ethernet176": {
"default_brkout_mode": "1x400G"
},
"Ethernet184": {
"default_brkout_mode": "1x400G"
},
"Ethernet192": {
"default_brkout_mode": "1x400G"
},
"Ethernet200": {
"default_brkout_mode": "1x400G"
},
"Ethernet208": {
"default_brkout_mode": "1x400G"
},
"Ethernet216": {
"default_brkout_mode": "1x400G"
},
"Ethernet224": {
"default_brkout_mode": "1x400G"
},
"Ethernet232": {
"default_brkout_mode": "1x400G"
},
"Ethernet240": {
"default_brkout_mode": "1x400G"
},
"Ethernet248": {
"default_brkout_mode": "1x400G"
},
"Ethernet256": {
"default_brkout_mode": "1x10G"
},
"Ethernet257": {
"default_brkout_mode": "1x10G"
}
}
}

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# name lanes alias index speed
Ethernet0 1,2,3,4,5,6,7,8 Ethernet1/1 0 400000
Ethernet8 9,10,11,12,13,14,15,16 Ethernet2/1 1 400000
Ethernet16 17,18,19,20,21,22,23,24 Ethernet3/1 2 400000
Ethernet24 25,26,27,28,29,30,31,32 Ethernet4/1 3 400000
Ethernet32 33,34,35,36,37,38,39,40 Ethernet5/1 4 400000
Ethernet40 41,42,43,44,45,46,47,48 Ethernet6/1 5 400000
Ethernet48 49,50,51,52,53,54,55,56 Ethernet7/1 6 400000
Ethernet56 57,58,59,60,61,62,63,64 Ethernet8/1 7 400000
Ethernet64 65,66,67,68,69,70,71,72 Ethernet9/1 8 400000
Ethernet72 73,74,75,76,77,78,79,80 Ethernet10/1 9 400000
Ethernet80 81,82,83,84,85,86,87,88 Ethernet11/1 10 400000
Ethernet88 89,90,91,92,93,94,95,96 Ethernet12/1 11 400000
Ethernet96 97,98,99,100,101,102,103,104 Ethernet13/1 12 400000
Ethernet104 105,106,107,108,109,110,111,112 Ethernet14/1 13 400000
Ethernet112 113,114,115,116,117,118,119,120 Ethernet15/1 14 400000
Ethernet120 121,122,123,124,125,126,127,128 Ethernet16/1 15 400000
Ethernet128 129,130,131,132,133,134,135,136 Ethernet17/1 16 400000
Ethernet136 137,138,139,140,141,142,143,144 Ethernet18/1 17 400000
Ethernet144 145,146,147,148,149,150,151,152 Ethernet19/1 18 400000
Ethernet152 153,154,155,156,157,158,159,160 Ethernet20/1 19 400000
Ethernet160 161,162,163,164,165,166,167,168 Ethernet21/1 20 400000
Ethernet168 169,170,171,172,173,174,175,176 Ethernet22/1 21 400000
Ethernet176 177,178,179,180,181,182,183,184 Ethernet23/1 22 400000
Ethernet184 185,186,187,188,189,190,191,192 Ethernet24/1 23 400000
Ethernet192 193,194,195,196,197,198,199,200 Ethernet25/1 24 400000
Ethernet200 201,202,203,204,205,206,207,208 Ethernet26/1 25 400000
Ethernet208 209,210,211,212,213,214,215,216 Ethernet27/1 26 400000
Ethernet216 217,218,219,220,221,222,223,224 Ethernet28/1 27 400000
Ethernet224 225,226,227,228,229,230,231,232 Ethernet29/1 28 400000
Ethernet232 233,234,235,236,237,238,239,240 Ethernet30/1 29 400000
Ethernet240 241,242,243,244,245,246,247,248 Ethernet31/1 30 400000
Ethernet248 249,250,251,252,253,254,255,256 Ethernet32/1 31 400000
Ethernet256 257 Ethernet33 32 10000
Ethernet257 258 Ethernet34 33 10000

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SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/th3-s9301-32x400G.config.bcm

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# r1.0.0
sai_tunnel_global_sip_mask_enable=1
bcm_tunnel_term_compatible_mode=1
sai_tunnel_support=0
pbmp_xport_xe.0=0x8ffff8ffffcffff8ffff8ffff8ffffcffff9fffe
ccm_dma_enable=0
ccmdma_intr_enable=0
mem_cache_enable=0
parity_correction=0
parity_enable=0
phy_enable=0
phy_null=1
core_clock_frequency=1325
dpr_clock_frequency=1000
device_clock_frequency=1325
port_flex_enable=1
load_firmware=0x2
portmap_1=1:400
portmap_5=9:400
portmap_9=17:400
portmap_13=25:400
portmap_19=259:10
portmap_20=33:400
portmap_24=41:400
portmap_28=49:400
portmap_32=57:400
portmap_38=257:10
#portmap_38=257:10:1
portmap_39=260:10
portmap_40=65:400
portmap_44=73:400
portmap_48=81:400
portmap_52=89:400
portmap_59=261:10
portmap_60=97:400
portmap_64=105:400
portmap_68=113:400
portmap_72=121:400
portmap_79=262:10
portmap_80=129:400
portmap_84=137:400
portmap_88=145:400
portmap_92=153:400
portmap_99=263:10
portmap_100=161:400
portmap_104=169:400
portmap_108=177:400
portmap_112=185:400
portmap_118=258:10
#portmap_118=258:10:1
portmap_119=264:10
portmap_120=193:400
portmap_124=201:400
portmap_128=209:400
portmap_132=217:400
portmap_139=265:10
portmap_140=225:400
portmap_144=233:400
portmap_148=241:400
portmap_152=249:400
portmap_159=266:10
port_fec_cd=9
phy_chain_rx_lane_map_physical{1}=0x60357412
phy_chain_tx_lane_map_physical{1}=0x02537164
serdes_core_rx_polarity_flip_physical{1}=0x53
serdes_core_tx_polarity_flip_physical{1}=0xa5
phy_chain_rx_lane_map_physical{9}=0x31472056
phy_chain_tx_lane_map_physical{9}=0x51306274
serdes_core_rx_polarity_flip_physical{9}=0x1e
serdes_core_tx_polarity_flip_physical{9}=0x7d
phy_chain_rx_lane_map_physical{17}=0x21347065
phy_chain_tx_lane_map_physical{17}=0x73046512
serdes_core_rx_polarity_flip_physical{17}=0x78
serdes_core_tx_polarity_flip_physical{17}=0x1d
phy_chain_rx_lane_map_physical{25}=0x36507124
phy_chain_tx_lane_map_physical{25}=0x45102736
serdes_core_rx_polarity_flip_physical{25}=0xb0
serdes_core_tx_polarity_flip_physical{25}=0x46
phy_chain_rx_lane_map_physical{33}=0x27603145
phy_chain_tx_lane_map_physical{33}=0x06372514
serdes_core_rx_polarity_flip_physical{33}=0x24
serdes_core_tx_polarity_flip_physical{33}=0x66
phy_chain_rx_lane_map_physical{41}=0x20643175
phy_chain_tx_lane_map_physical{41}=0x65107423
serdes_core_rx_polarity_flip_physical{41}=0xc3
serdes_core_tx_polarity_flip_physical{41}=0x5a
phy_chain_rx_lane_map_physical{49}=0x20653174
phy_chain_tx_lane_map_physical{49}=0x65217043
serdes_core_rx_polarity_flip_physical{49}=0x27
serdes_core_tx_polarity_flip_physical{49}=0x92
phy_chain_rx_lane_map_physical{57}=0x23417065
phy_chain_tx_lane_map_physical{57}=0x46102735
serdes_core_rx_polarity_flip_physical{57}=0x8d
serdes_core_tx_polarity_flip_physical{57}=0x17
phy_chain_rx_lane_map_physical{65}=0x32406175
phy_chain_tx_lane_map_physical{65}=0x26073415
serdes_core_rx_polarity_flip_physical{65}=0xa6
serdes_core_tx_polarity_flip_physical{65}=0x4b
phy_chain_rx_lane_map_physical{73}=0x30642175
phy_chain_tx_lane_map_physical{73}=0x76415230
serdes_core_rx_polarity_flip_physical{73}=0x4b
serdes_core_tx_polarity_flip_physical{73}=0x8f
phy_chain_rx_lane_map_physical{81}=0x21743065
phy_chain_tx_lane_map_physical{81}=0x42507361
serdes_core_rx_polarity_flip_physical{81}=0x50
serdes_core_tx_polarity_flip_physical{81}=0xb2
phy_chain_rx_lane_map_physical{89}=0x23407165
phy_chain_tx_lane_map_physical{89}=0x30147625
serdes_core_rx_polarity_flip_physical{89}=0x99
serdes_core_tx_polarity_flip_physical{89}=0x0b
phy_chain_rx_lane_map_physical{97}=0x10652437
phy_chain_tx_lane_map_physical{97}=0x76352014
serdes_core_rx_polarity_flip_physical{97}=0xac
serdes_core_tx_polarity_flip_physical{97}=0xe6
phy_chain_rx_lane_map_physical{105}=0x74306521
phy_chain_tx_lane_map_physical{105}=0x73046215
serdes_core_rx_polarity_flip_physical{105}=0x96
serdes_core_tx_polarity_flip_physical{105}=0xaf
phy_chain_rx_lane_map_physical{113}=0x02741365
phy_chain_tx_lane_map_physical{113}=0x60425371
serdes_core_rx_polarity_flip_physical{113}=0x14
serdes_core_tx_polarity_flip_physical{113}=0xa5
phy_chain_rx_lane_map_physical{121}=0x76241503
phy_chain_tx_lane_map_physical{121}=0x76541320
serdes_core_rx_polarity_flip_physical{121}=0x59
serdes_core_tx_polarity_flip_physical{121}=0x5f
phy_chain_rx_lane_map_physical{129}=0x67351402
phy_chain_tx_lane_map_physical{129}=0x61047253
serdes_core_rx_polarity_flip_physical{129}=0x59
serdes_core_tx_polarity_flip_physical{129}=0x63
phy_chain_rx_lane_map_physical{137}=0x21743065
phy_chain_tx_lane_map_physical{137}=0x61405372
serdes_core_rx_polarity_flip_physical{137}=0xa5
serdes_core_tx_polarity_flip_physical{137}=0x31
phy_chain_rx_lane_map_physical{145}=0x21743065
phy_chain_tx_lane_map_physical{145}=0x76503214
serdes_core_rx_polarity_flip_physical{145}=0x50
serdes_core_tx_polarity_flip_physical{145}=0x46
phy_chain_rx_lane_map_physical{153}=0x10652437
phy_chain_tx_lane_map_physical{153}=0x42537160
serdes_core_rx_polarity_flip_physical{153}=0x59
serdes_core_tx_polarity_flip_physical{153}=0x63
phy_chain_rx_lane_map_physical{161}=0x76125340
phy_chain_tx_lane_map_physical{161}=0x25043716
serdes_core_rx_polarity_flip_physical{161}=0x6c
serdes_core_tx_polarity_flip_physical{161}=0x1e
phy_chain_rx_lane_map_physical{169}=0x20743165
phy_chain_tx_lane_map_physical{169}=0x41507263
serdes_core_rx_polarity_flip_physical{169}=0xe1
serdes_core_tx_polarity_flip_physical{169}=0x36
phy_chain_rx_lane_map_physical{177}=0x30742165
phy_chain_tx_lane_map_physical{177}=0x74036125
serdes_core_rx_polarity_flip_physical{177}=0x9c
serdes_core_tx_polarity_flip_physical{177}=0x58
phy_chain_rx_lane_map_physical{185}=0x23406175
phy_chain_tx_lane_map_physical{185}=0x63127450
serdes_core_rx_polarity_flip_physical{185}=0x93
serdes_core_tx_polarity_flip_physical{185}=0x11
phy_chain_rx_lane_map_physical{193}=0x23507164
phy_chain_tx_lane_map_physical{193}=0x75140326
serdes_core_rx_polarity_flip_physical{193}=0x4d
serdes_core_tx_polarity_flip_physical{193}=0x30
phy_chain_rx_lane_map_physical{201}=0x20743165
phy_chain_tx_lane_map_physical{201}=0x13640275
serdes_core_rx_polarity_flip_physical{201}=0xe1
serdes_core_tx_polarity_flip_physical{201}=0x05
phy_chain_rx_lane_map_physical{209}=0x30742165
phy_chain_tx_lane_map_physical{209}=0x03645271
serdes_core_rx_polarity_flip_physical{209}=0x9c
serdes_core_tx_polarity_flip_physical{209}=0x74
phy_chain_rx_lane_map_physical{217}=0x32604175
phy_chain_tx_lane_map_physical{217}=0x46213750
serdes_core_rx_polarity_flip_physical{217}=0x53
serdes_core_tx_polarity_flip_physical{217}=0x2d
phy_chain_rx_lane_map_physical{225}=0x23471605
phy_chain_tx_lane_map_physical{225}=0x16304725
serdes_core_rx_polarity_flip_physical{225}=0x66
serdes_core_tx_polarity_flip_physical{225}=0xef
phy_chain_rx_lane_map_physical{233}=0x63051274
phy_chain_tx_lane_map_physical{233}=0x73046251
serdes_core_rx_polarity_flip_physical{233}=0x9c
serdes_core_tx_polarity_flip_physical{233}=0xae
phy_chain_rx_lane_map_physical{241}=0x21473056
phy_chain_tx_lane_map_physical{241}=0x74503261
serdes_core_rx_polarity_flip_physical{241}=0x63
serdes_core_tx_polarity_flip_physical{241}=0x4e
phy_chain_rx_lane_map_physical{249}=0x76341502
phy_chain_tx_lane_map_physical{249}=0x45603271
serdes_core_rx_polarity_flip_physical{249}=0x78
serdes_core_tx_polarity_flip_physical{249}=0x03
dport_map_enable=1
dport_map_port_1=0
dport_map_port_5=1
dport_map_port_9=2
dport_map_port_13=3
dport_map_port_20=4
dport_map_port_24=5
dport_map_port_28=6
dport_map_port_32=7
dport_map_port_40=8
dport_map_port_44=9
dport_map_port_48=10
dport_map_port_52=11
dport_map_port_60=12
dport_map_port_64=13
dport_map_port_68=14
dport_map_port_72=15
dport_map_port_80=16
dport_map_port_84=17
dport_map_port_88=18
dport_map_port_92=19
dport_map_port_100=20
dport_map_port_104=21
dport_map_port_108=22
dport_map_port_112=23
dport_map_port_120=24
dport_map_port_124=25
dport_map_port_128=26
dport_map_port_132=27
dport_map_port_140=28
dport_map_port_144=29
dport_map_port_148=30
dport_map_port_152=31
dport_map_port_38=32
dport_map_port_118=33

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UFISPACE-S9301-32D t1

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# Configuration file generated by pwmconfig, changes will be lost
INTERVAL=10
DEVPATH=
DEVNAME=
FCTEMPS=
FCFANS=
MINTEMP=
MAXTEMP=
MINSTART=
MINSTOP=

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CONSOLE_PORT=0x3f8
CONSOLE_DEV=0
CONSOLE_SPEED=115200
ONIE_PLATFORM_EXTRA_CMDLINE_LINUX="module_blacklist=gpio_ich nomodeset pcie_aspm=off"

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m0 load 0 0x3800 /usr/share/sonic/platform/cmicx_customer_led.bin
led auto on
led start

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- bus: '00'
dev: '00'
fn: '0'
id: '2020'
name: 'Host bridge: Intel Corporation Sky Lake-E DMI3 Registers (rev 04)'
- bus: '00'
dev: '04'
fn: '0'
id: '2021'
name: 'System peripheral: Intel Corporation Sky Lake-E CBDMA Registers (rev 04)'
- bus: '00'
dev: '04'
fn: '1'
id: '2021'
name: 'System peripheral: Intel Corporation Sky Lake-E CBDMA Registers (rev 04)'
- bus: '00'
dev: '04'
fn: '2'
id: '2021'
name: 'System peripheral: Intel Corporation Sky Lake-E CBDMA Registers (rev 04)'
- bus: '00'
dev: '04'
fn: '3'
id: '2021'
name: 'System peripheral: Intel Corporation Sky Lake-E CBDMA Registers (rev 04)'
- bus: '00'
dev: '04'
fn: '4'
id: '2021'
name: 'System peripheral: Intel Corporation Sky Lake-E CBDMA Registers (rev 04)'
- bus: '00'
dev: '04'
fn: '5'
id: '2021'
name: 'System peripheral: Intel Corporation Sky Lake-E CBDMA Registers (rev 04)'
- bus: '00'
dev: '04'
fn: '6'
id: '2021'
name: 'System peripheral: Intel Corporation Sky Lake-E CBDMA Registers (rev 04)'
- bus: '00'
dev: '04'
fn: '7'
id: '2021'
name: 'System peripheral: Intel Corporation Sky Lake-E CBDMA Registers (rev 04)'
- bus: '00'
dev: '05'
fn: '0'
id: '2024'
name: 'System peripheral: Intel Corporation Sky Lake-E MM/Vt-d Configuration Registers
(rev 04)'
- bus: '00'
dev: '05'
fn: '2'
id: '2025'
name: 'System peripheral: Intel Corporation Sky Lake-E RAS (rev 04)'
- bus: '00'
dev: '05'
fn: '4'
id: '2026'
name: 'PIC: Intel Corporation Sky Lake-E IOAPIC (rev 04)'
- bus: '00'
dev: 08
fn: '0'
id: '2014'
name: 'System peripheral: Intel Corporation Sky Lake-E Ubox Registers (rev 04)'
- bus: '00'
dev: 08
fn: '1'
id: '2015'
name: 'Performance counters: Intel Corporation Sky Lake-E Ubox Registers (rev 04)'
- bus: '00'
dev: 08
fn: '2'
id: '2016'
name: 'System peripheral: Intel Corporation Sky Lake-E Ubox Registers (rev 04)'
- bus: '00'
dev: '11'
fn: '0'
id: a1ec
name: 'Unassigned class [ff00]: Intel Corporation C620 Series Chipset Family MROM
0 (rev 04)'
- bus: '00'
dev: '11'
fn: '1'
id: a1ed
name: 'Unassigned class [ff00]: Intel Corporation C620 Series Chipset Family MROM
1 (rev 04)'
- bus: '00'
dev: '14'
fn: '0'
id: a1af
name: 'USB controller: Intel Corporation C620 Series Chipset Family USB 3.0 xHCI
Controller (rev 04)'
- bus: '00'
dev: '14'
fn: '2'
id: a1b1
name: 'Signal processing controller: Intel Corporation C620 Series Chipset Family
Thermal Subsystem (rev 04)'
- bus: '00'
dev: '16'
fn: '0'
id: a1ba
name: 'Communication controller: Intel Corporation C620 Series Chipset Family MEI
Controller #1 (rev 04)'
- bus: '00'
dev: '16'
fn: '4'
id: a1be
name: 'Communication controller: Intel Corporation C620 Series Chipset Family MEI
Controller #3 (rev 04)'
- bus: '00'
dev: 1c
fn: '0'
id: a190
name: 'PCI bridge: Intel Corporation C620 Series Chipset Family PCI Express Root
Port #1 (rev f4)'
- bus: '00'
dev: 1c
fn: '4'
id: a194
name: 'PCI bridge: Intel Corporation C620 Series Chipset Family PCI Express Root
Port #5 (rev f4)'
- bus: '00'
dev: 1c
fn: '5'
id: a195
name: 'PCI bridge: Intel Corporation C620 Series Chipset Family PCI Express Root
Port #6 (rev f4)'
- bus: '00'
dev: 1d
fn: '0'
id: a198
name: 'PCI bridge: Intel Corporation C620 Series Chipset Family PCI Express Root
Port #9 (rev f4)'
- bus: '00'
dev: 1d
fn: '2'
id: a19a
name: 'PCI bridge: Intel Corporation C620 Series Chipset Family PCI Express Root
Port #11 (rev f4)'
- bus: '00'
dev: 1f
fn: '0'
id: a1c8
name: 'ISA bridge: Intel Corporation Device a1c8 (rev 04)'
- bus: '00'
dev: 1f
fn: '2'
id: a1a1
name: 'Memory controller: Intel Corporation C620 Series Chipset Family Power Management
Controller (rev 04)'
- bus: '00'
dev: 1f
fn: '4'
id: a1a3
name: 'SMBus: Intel Corporation C620 Series Chipset Family SMBus (rev 04)'
- bus: '00'
dev: 1f
fn: '5'
id: a1a4
name: 'Serial bus controller [0c80]: Intel Corporation C620 Series Chipset Family
SPI Controller (rev 04)'
- bus: '02'
dev: '00'
fn: '0'
id: '1533'
name: 'Ethernet controller: Intel Corporation I210 Gigabit Network Connection (rev
03)'
- bus: '03'
dev: '00'
fn: '0'
id: '1150'
name: 'PCI bridge: ASPEED Technology, Inc. AST1150 PCI-to-PCI Bridge (rev 03)'
- bus: '04'
dev: '00'
fn: '0'
id: '2000'
name: 'VGA compatible controller: ASPEED Technology, Inc. ASPEED Graphics Family
(rev 30)'
- bus: '06'
dev: '00'
fn: '0'
id: '0625'
name: 'SATA controller: ASMedia Technology Inc. Device 0625 (rev 01)'
- bus: '16'
dev: '00'
fn: '0'
id: '2030'
name: 'PCI bridge: Intel Corporation Sky Lake-E PCI Express Root Port A (rev 04)'
- bus: '16'
dev: '01'
fn: '0'
id: '2031'
name: 'PCI bridge: Intel Corporation Sky Lake-E PCI Express Root Port B (rev 04)'
- bus: '16'
dev: '02'
fn: '0'
id: '2032'
name: 'PCI bridge: Intel Corporation Sky Lake-E PCI Express Root Port C (rev 04)'
- bus: '16'
dev: '03'
fn: '0'
id: '2033'
name: 'PCI bridge: Intel Corporation Sky Lake-E PCI Express Root Port D (rev 04)'
- bus: '16'
dev: '05'
fn: '0'
id: '2034'
name: 'System peripheral: Intel Corporation Sky Lake-E VT-d (rev 04)'
- bus: '16'
dev: '05'
fn: '2'
id: '2035'
name: 'System peripheral: Intel Corporation Sky Lake-E RAS Configuration Registers
(rev 04)'
- bus: '16'
dev: '05'
fn: '4'
id: '2036'
name: 'PIC: Intel Corporation Sky Lake-E IOxAPIC Configuration Registers (rev 04)'
- bus: '16'
dev: 08
fn: '0'
id: 208d
name: 'System peripheral: Intel Corporation Sky Lake-E CHA Registers (rev 04)'
- bus: '16'
dev: 08
fn: '1'
id: 208d
name: 'System peripheral: Intel Corporation Sky Lake-E CHA Registers (rev 04)'
- bus: '16'
dev: 08
fn: '2'
id: 208d
name: 'System peripheral: Intel Corporation Sky Lake-E CHA Registers (rev 04)'
- bus: '16'
dev: 08
fn: '3'
id: 208d
name: 'System peripheral: Intel Corporation Sky Lake-E CHA Registers (rev 04)'
- bus: '16'
dev: 08
fn: '4'
id: 208d
name: 'System peripheral: Intel Corporation Sky Lake-E CHA Registers (rev 04)'
- bus: '16'
dev: 08
fn: '5'
id: 208d
name: 'System peripheral: Intel Corporation Sky Lake-E CHA Registers (rev 04)'
- bus: '16'
dev: 08
fn: '6'
id: 208d
name: 'System peripheral: Intel Corporation Sky Lake-E CHA Registers (rev 04)'
- bus: '16'
dev: 08
fn: '7'
id: 208d
name: 'System peripheral: Intel Corporation Sky Lake-E CHA Registers (rev 04)'
- bus: '16'
dev: 09
fn: '0'
id: 208d
name: 'System peripheral: Intel Corporation Sky Lake-E CHA Registers (rev 04)'
- bus: '16'
dev: 09
fn: '1'
id: 208d
name: 'System peripheral: Intel Corporation Sky Lake-E CHA Registers (rev 04)'
- bus: '16'
dev: 09
fn: '2'
id: 208d
name: 'System peripheral: Intel Corporation Sky Lake-E CHA Registers (rev 04)'
- bus: '16'
dev: 09
fn: '3'
id: 208d
name: 'System peripheral: Intel Corporation Sky Lake-E CHA Registers (rev 04)'
- bus: '16'
dev: 09
fn: '4'
id: 208d
name: 'System peripheral: Intel Corporation Sky Lake-E CHA Registers (rev 04)'
- bus: '16'
dev: 09
fn: '5'
id: 208d
name: 'System peripheral: Intel Corporation Sky Lake-E CHA Registers (rev 04)'
- bus: '16'
dev: 09
fn: '6'
id: 208d
name: 'System peripheral: Intel Corporation Sky Lake-E CHA Registers (rev 04)'
- bus: '16'
dev: 09
fn: '7'
id: 208d
name: 'System peripheral: Intel Corporation Sky Lake-E CHA Registers (rev 04)'
- bus: '16'
dev: 0a
fn: '0'
id: 208d
name: 'System peripheral: Intel Corporation Sky Lake-E CHA Registers (rev 04)'
- bus: '16'
dev: 0a
fn: '1'
id: 208d
name: 'System peripheral: Intel Corporation Sky Lake-E CHA Registers (rev 04)'
- bus: '16'
dev: 0e
fn: '0'
id: 208e
name: 'System peripheral: Intel Corporation Sky Lake-E CHA Registers (rev 04)'
- bus: '16'
dev: 0e
fn: '1'
id: 208e
name: 'System peripheral: Intel Corporation Sky Lake-E CHA Registers (rev 04)'
- bus: '16'
dev: 0e
fn: '2'
id: 208e
name: 'System peripheral: Intel Corporation Sky Lake-E CHA Registers (rev 04)'
- bus: '16'
dev: 0e
fn: '3'
id: 208e
name: 'System peripheral: Intel Corporation Sky Lake-E CHA Registers (rev 04)'
- bus: '16'
dev: 0e
fn: '4'
id: 208e
name: 'System peripheral: Intel Corporation Sky Lake-E CHA Registers (rev 04)'
- bus: '16'
dev: 0e
fn: '5'
id: 208e
name: 'System peripheral: Intel Corporation Sky Lake-E CHA Registers (rev 04)'
- bus: '16'
dev: 0e
fn: '6'
id: 208e
name: 'System peripheral: Intel Corporation Sky Lake-E CHA Registers (rev 04)'
- bus: '16'
dev: 0e
fn: '7'
id: 208e
name: 'System peripheral: Intel Corporation Sky Lake-E CHA Registers (rev 04)'
- bus: '16'
dev: 0f
fn: '0'
id: 208e
name: 'System peripheral: Intel Corporation Sky Lake-E CHA Registers (rev 04)'
- bus: '16'
dev: 0f
fn: '1'
id: 208e
name: 'System peripheral: Intel Corporation Sky Lake-E CHA Registers (rev 04)'
- bus: '16'
dev: 0f
fn: '2'
id: 208e
name: 'System peripheral: Intel Corporation Sky Lake-E CHA Registers (rev 04)'
- bus: '16'
dev: 0f
fn: '3'
id: 208e
name: 'System peripheral: Intel Corporation Sky Lake-E CHA Registers (rev 04)'
- bus: '16'
dev: 0f
fn: '4'
id: 208e
name: 'System peripheral: Intel Corporation Sky Lake-E CHA Registers (rev 04)'
- bus: '16'
dev: 0f
fn: '5'
id: 208e
name: 'System peripheral: Intel Corporation Sky Lake-E CHA Registers (rev 04)'
- bus: '16'
dev: 0f
fn: '6'
id: 208e
name: 'System peripheral: Intel Corporation Sky Lake-E CHA Registers (rev 04)'
- bus: '16'
dev: 0f
fn: '7'
id: 208e
name: 'System peripheral: Intel Corporation Sky Lake-E CHA Registers (rev 04)'
- bus: '16'
dev: '10'
fn: '0'
id: 208e
name: 'System peripheral: Intel Corporation Sky Lake-E CHA Registers (rev 04)'
- bus: '16'
dev: '10'
fn: '1'
id: 208e
name: 'System peripheral: Intel Corporation Sky Lake-E CHA Registers (rev 04)'
- bus: '16'
dev: 1d
fn: '0'
id: '2054'
name: 'System peripheral: Intel Corporation Sky Lake-E CHA Registers (rev 04)'
- bus: '16'
dev: 1d
fn: '1'
id: '2055'
name: 'System peripheral: Intel Corporation Sky Lake-E CHA Registers (rev 04)'
- bus: '16'
dev: 1d
fn: '2'
id: '2056'
name: 'System peripheral: Intel Corporation Sky Lake-E CHA Registers (rev 04)'
- bus: '16'
dev: 1d
fn: '3'
id: '2057'
name: 'System peripheral: Intel Corporation Sky Lake-E CHA Registers (rev 04)'
- bus: '16'
dev: 1e
fn: '0'
id: '2080'
name: 'System peripheral: Intel Corporation Sky Lake-E PCU Registers (rev 04)'
- bus: '16'
dev: 1e
fn: '1'
id: '2081'
name: 'System peripheral: Intel Corporation Sky Lake-E PCU Registers (rev 04)'
- bus: '16'
dev: 1e
fn: '2'
id: '2082'
name: 'System peripheral: Intel Corporation Sky Lake-E PCU Registers (rev 04)'
- bus: '16'
dev: 1e
fn: '3'
id: '2083'
name: 'System peripheral: Intel Corporation Sky Lake-E PCU Registers (rev 04)'
- bus: '16'
dev: 1e
fn: '4'
id: '2084'
name: 'System peripheral: Intel Corporation Sky Lake-E PCU Registers (rev 04)'
- bus: '16'
dev: 1e
fn: '5'
id: '2085'
name: 'System peripheral: Intel Corporation Sky Lake-E PCU Registers (rev 04)'
- bus: '16'
dev: 1e
fn: '6'
id: '2086'
name: 'System peripheral: Intel Corporation Sky Lake-E PCU Registers (rev 04)'
- bus: '17'
dev: '00'
fn: '0'
id: b880
name: 'Ethernet controller: Broadcom Inc. and subsidiaries BCM56880 Switch ASIC
(rev 11)'
- bus: '64'
dev: '00'
fn: '0'
id: '2030'
name: 'PCI bridge: Intel Corporation Sky Lake-E PCI Express Root Port A (rev 04)'
- bus: '64'
dev: '01'
fn: '0'
id: '2031'
name: 'PCI bridge: Intel Corporation Sky Lake-E PCI Express Root Port B (rev 04)'
- bus: '64'
dev: '02'
fn: '0'
id: '2032'
name: 'PCI bridge: Intel Corporation Sky Lake-E PCI Express Root Port C (rev 04)'
- bus: '64'
dev: '03'
fn: '0'
id: '2033'
name: 'PCI bridge: Intel Corporation Sky Lake-E PCI Express Root Port D (rev 04)'
- bus: '64'
dev: '05'
fn: '0'
id: '2034'
name: 'System peripheral: Intel Corporation Sky Lake-E VT-d (rev 04)'
- bus: '64'
dev: '05'
fn: '2'
id: '2035'
name: 'System peripheral: Intel Corporation Sky Lake-E RAS Configuration Registers
(rev 04)'
- bus: '64'
dev: '05'
fn: '4'
id: '2036'
name: 'PIC: Intel Corporation Sky Lake-E IOxAPIC Configuration Registers (rev 04)'
- bus: '64'
dev: 08
fn: '0'
id: '2066'
name: 'System peripheral: Intel Corporation Sky Lake-E Integrated Memory Controller
(rev 04)'
- bus: '64'
dev: 09
fn: '0'
id: '2066'
name: 'System peripheral: Intel Corporation Sky Lake-E Integrated Memory Controller
(rev 04)'
- bus: '64'
dev: 0a
fn: '0'
id: '2040'
name: 'System peripheral: Intel Corporation Sky Lake-E Integrated Memory Controller
(rev 04)'
- bus: '64'
dev: 0a
fn: '1'
id: '2041'
name: 'System peripheral: Intel Corporation Sky Lake-E Integrated Memory Controller
(rev 04)'
- bus: '64'
dev: 0a
fn: '2'
id: '2042'
name: 'System peripheral: Intel Corporation Sky Lake-E Integrated Memory Controller
(rev 04)'
- bus: '64'
dev: 0a
fn: '3'
id: '2043'
name: 'System peripheral: Intel Corporation Sky Lake-E Integrated Memory Controller
(rev 04)'
- bus: '64'
dev: 0a
fn: '4'
id: '2044'
name: 'System peripheral: Intel Corporation Sky Lake-E Integrated Memory Controller
(rev 04)'
- bus: '64'
dev: 0a
fn: '5'
id: '2045'
name: 'System peripheral: Intel Corporation Sky Lake-E LM Channel 1 (rev 04)'
- bus: '64'
dev: 0a
fn: '6'
id: '2046'
name: 'System peripheral: Intel Corporation Sky Lake-E LMS Channel 1 (rev 04)'
- bus: '64'
dev: 0a
fn: '7'
id: '2047'
name: 'System peripheral: Intel Corporation Sky Lake-E LMDP Channel 1 (rev 04)'
- bus: '64'
dev: 0b
fn: '0'
id: '2048'
name: 'System peripheral: Intel Corporation Sky Lake-E DECS Channel 2 (rev 04)'
- bus: '64'
dev: 0b
fn: '1'
id: '2049'
name: 'System peripheral: Intel Corporation Sky Lake-E LM Channel 2 (rev 04)'
- bus: '64'
dev: 0b
fn: '2'
id: 204a
name: 'System peripheral: Intel Corporation Sky Lake-E LMS Channel 2 (rev 04)'
- bus: '64'
dev: 0b
fn: '3'
id: 204b
name: 'System peripheral: Intel Corporation Sky Lake-E LMDP Channel 2 (rev 04)'
- bus: '64'
dev: 0c
fn: '0'
id: '2040'
name: 'System peripheral: Intel Corporation Sky Lake-E Integrated Memory Controller
(rev 04)'
- bus: '64'
dev: 0c
fn: '1'
id: '2041'
name: 'System peripheral: Intel Corporation Sky Lake-E Integrated Memory Controller
(rev 04)'
- bus: '64'
dev: 0c
fn: '2'
id: '2042'
name: 'System peripheral: Intel Corporation Sky Lake-E Integrated Memory Controller
(rev 04)'
- bus: '64'
dev: 0c
fn: '3'
id: '2043'
name: 'System peripheral: Intel Corporation Sky Lake-E Integrated Memory Controller
(rev 04)'
- bus: '64'
dev: 0c
fn: '4'
id: '2044'
name: 'System peripheral: Intel Corporation Sky Lake-E Integrated Memory Controller
(rev 04)'
- bus: '64'
dev: 0c
fn: '5'
id: '2045'
name: 'System peripheral: Intel Corporation Sky Lake-E LM Channel 1 (rev 04)'
- bus: '64'
dev: 0c
fn: '6'
id: '2046'
name: 'System peripheral: Intel Corporation Sky Lake-E LMS Channel 1 (rev 04)'
- bus: '64'
dev: 0c
fn: '7'
id: '2047'
name: 'System peripheral: Intel Corporation Sky Lake-E LMDP Channel 1 (rev 04)'
- bus: '64'
dev: 0d
fn: '0'
id: '2048'
name: 'System peripheral: Intel Corporation Sky Lake-E DECS Channel 2 (rev 04)'
- bus: '64'
dev: 0d
fn: '1'
id: '2049'
name: 'System peripheral: Intel Corporation Sky Lake-E LM Channel 2 (rev 04)'
- bus: '64'
dev: 0d
fn: '2'
id: 204a
name: 'System peripheral: Intel Corporation Sky Lake-E LMS Channel 2 (rev 04)'
- bus: '64'
dev: 0d
fn: '3'
id: 204b
name: 'System peripheral: Intel Corporation Sky Lake-E LMDP Channel 2 (rev 04)'
- bus: b2
dev: '00'
fn: '0'
id: '2030'
name: 'PCI bridge: Intel Corporation Sky Lake-E PCI Express Root Port A (rev 04)'
- bus: b2
dev: '05'
fn: '0'
id: '2034'
name: 'System peripheral: Intel Corporation Sky Lake-E VT-d (rev 04)'
- bus: b2
dev: '05'
fn: '2'
id: '2035'
name: 'System peripheral: Intel Corporation Sky Lake-E RAS Configuration Registers
(rev 04)'
- bus: b2
dev: '05'
fn: '4'
id: '2036'
name: 'PIC: Intel Corporation Sky Lake-E IOxAPIC Configuration Registers (rev 04)'
- bus: b2
dev: '12'
fn: '0'
id: 204c
name: 'Performance counters: Intel Corporation Sky Lake-E M3KTI Registers (rev 04)'
- bus: b2
dev: '12'
fn: '1'
id: 204d
name: 'Performance counters: Intel Corporation Sky Lake-E M3KTI Registers (rev 04)'
- bus: b2
dev: '12'
fn: '2'
id: 204e
name: 'System peripheral: Intel Corporation Sky Lake-E M3KTI Registers (rev 04)'
- bus: b2
dev: '15'
fn: '0'
id: '2018'
name: 'System peripheral: Intel Corporation Sky Lake-E M2PCI Registers (rev 04)'
- bus: b2
dev: '16'
fn: '0'
id: '2018'
name: 'System peripheral: Intel Corporation Sky Lake-E M2PCI Registers (rev 04)'
- bus: b2
dev: '16'
fn: '4'
id: '2018'
name: 'System peripheral: Intel Corporation Sky Lake-E M2PCI Registers (rev 04)'
- bus: b2
dev: '17'
fn: '0'
id: '2018'
name: 'System peripheral: Intel Corporation Sky Lake-E M2PCI Registers (rev 04)'
- bus: b3
dev: '00'
fn: '0'
id: 37c0
name: 'PCI bridge: Intel Corporation Device 37c0 (rev 04)'
- bus: b4
dev: '00'
fn: '0'
id: 37c2
name: 'PCI bridge: Intel Corporation Device 37c2 (rev 04)'
- bus: b4
dev: '03'
fn: '0'
id: 37c5
name: 'PCI bridge: Intel Corporation Device 37c5 (rev 04)'
- bus: b5
dev: '00'
fn: '0'
id: 37c8
name: 'Co-processor: Intel Corporation C62x Chipset QuickAssist Technology (rev
04)'
- bus: b6
dev: '00'
fn: '0'
id: 37d3
name: 'Ethernet controller: Intel Corporation Ethernet Connection X722 for 10GbE
SFP+ (rev 04)'
- bus: b6
dev: '00'
fn: '1'
id: 37d3
name: 'Ethernet controller: Intel Corporation Ethernet Connection X722 for 10GbE
SFP+ (rev 04)'
- bus: b6
dev: '00'
fn: '2'
id: 37ce
name: 'Ethernet controller: Intel Corporation Ethernet Connection X722 for 10GbE
backplane (rev 04)'
- bus: b6
dev: '00'
fn: '3'
id: 37ce
name: 'Ethernet controller: Intel Corporation Ethernet Connection X722 for 10GbE
backplane (rev 04)'

View File

@ -0,0 +1,86 @@
{
"XCVR":
{
"xcvr_present":
{
"i2c":
{
"valmap-SFP": {"1":true, "0":false },
"valmap-QSFP-DD": {"1":true, "0":false}
}
},
"plug_status":
{
"inserted": "1",
"removed": "0"
}
},
"PSU":
{
"psu_present":
{
"i2c":
{
"valmap": { "1":true, "0":false }
},
"bmc":
{
"valmap": { "0x0280|":true, "0x0180|":false }
}
},
"psu_power_good":
{
"i2c":
{
"valmap": { "1": true, "0":false }
},
"bmc":
{
"valmap": { "0x0280|":true, "0x0180|":false }
}
},
"psu_fan_dir":
{
"i2c":
{
"valmap": { "F2B":"EXHAUST", "B2F":"INTAKE" }
}
},
"PSU_FAN_MAX_SPEED":"30000"
},
"FAN":
{
"direction":
{
"bmc":
{
"valmap": {"0": "UNKNOW", "1":"INTAKE", "2":"EXHAUST"}
}
},
"present":
{
"i2c":
{
"valmap": {"1":true, "0":false}
},
"bmc":
{
"valmap": { "0x0280|":true, "0x0180|":false }
}
},
"FAN_R_MAX_SPEED":"32000",
"FAN_F_MAX_SPEED":"36200"
},
"REBOOT_CAUSE":
{
"reboot_cause_file": "/host/reboot-cause/reboot-cause.txt"
}
}

File diff suppressed because it is too large Load Diff

View File

@ -0,0 +1,659 @@
{
"chassis": {
"name": "S9301-32D",
"components": [
{
"name": "CPLD1"
},
{
"name": "CPLD2"
},
{
"name": "CPLD3"
},
{
"name": "BIOS"
},
{
"name": "BMC"
}
],
"fans": [
{
"name": "Fantray1_1"
},
{
"name": "Fantray1_2"
},
{
"name": "Fantray2_1"
},
{
"name": "Fantray2_2"
},
{
"name": "Fantray3_1"
},
{
"name": "Fantray3_2"
},
{
"name": "Fantray4_1"
},
{
"name": "Fantray4_2"
},
{
"name": "Fantray5_1"
},
{
"name": "Fantray5_2"
},
{
"name": "Fantray6_1"
},
{
"name": "Fantray6_2"
}
],
"fan_drawers":[
{
"name": "Fantray1",
"num_fans" : 2,
"fans": [
{
"name": "Fantray1_1"
},
{
"name": "Fantray1_2"
}
]
},
{
"name": "Fantray2",
"num_fans" : 2,
"fans": [
{
"name": "Fantray2_1"
},
{
"name": "Fantray2_2"
}
]
},
{
"name": "Fantray3",
"num_fans" : 2,
"fans": [
{
"name": "Fantray3_1"
},
{
"name": "Fantray3_2"
}
]
},
{
"name": "Fantray4",
"num_fans" : 2,
"fans": [
{
"name": "Fantray4_1"
},
{
"name": "Fantray4_2"
}
]
},
{
"name": "Fantray5",
"num_fans" : 2,
"fans": [
{
"name": "Fantray5_1"
},
{
"name": "Fantray5_2"
}
]
},
{
"name": "Fantray6",
"num_fans" : 2,
"fans": [
{
"name": "Fantray6_1"
},
{
"name": "Fantray6_2"
}
]
}
],
"psus": [
{
"name": "PSU1",
"fans": [
{
"name": "PSU1_FAN1"
}
],
"thermals": [
{
"name": "PSU1_TEMP1"
}
]
},
{
"name": "PSU2",
"fans": [
{
"name": "PSU2_FAN1"
}
],
"thermals": [
{
"name": "PSU2_TEMP1"
}
]
}
],
"thermals": [
{
"name": "Temp_CPU_PECI"
},
{
"name": "Temp_CPU_ENV"
},
{
"name": "Temp_CPU_ENV2"
},
{
"name": "Temp_CPU_PECI"
},
{
"name": "Temp_MAC_DIE"
},
{
"name": "Temp_MAC_ENV"
},
{
"name": "Temp_PSU_CONNTOR"
}
],
"sfps": [
{
"name": "Ethernet0"
},
{
"name": "Ethernet8"
},
{
"name": "Ethernet16"
},
{
"name": "Ethernet24"
},
{
"name": "Ethernet32"
},
{
"name": "Ethernet40"
},
{
"name": "Ethernet48"
},
{
"name": "Ethernet56"
},
{
"name": "Ethernet64"
},
{
"name": "Ethernet72"
},
{
"name": "Ethernet80"
},
{
"name": "Ethernet88"
},
{
"name": "Ethernet96"
},
{
"name": "Ethernet104"
},
{
"name": "Ethernet112"
},
{
"name": "Ethernet120"
},
{
"name": "Ethernet128"
},
{
"name": "Ethernet136"
},
{
"name": "Ethernet144"
},
{
"name": "Ethernet152"
},
{
"name": "Ethernet160"
},
{
"name": "Ethernet168"
},
{
"name": "Ethernet176"
},
{
"name": "Ethernet184"
},
{
"name": "Ethernet192"
},
{
"name": "Ethernet200"
},
{
"name": "Ethernet208"
},
{
"name": "Ethernet216"
},
{
"name": "Ethernet224"
},
{
"name": "Ethernet232"
},
{
"name": "Ethernet240"
},
{
"name": "Ethernet248"
},
{
"name": "Ethernet256"
},
{
"name": "Ethernet257"
}
]
},
"interfaces": {
"Ethernet0": {
"index": "0,0,0,0,0,0,0,0",
"lanes": "1,2,3,4,5,6,7,8",
"breakout_modes": {
"1x400G": ["Eth0(Port0)"],
"2x200G": ["Eth0/1(Port0)", "Eth0/2(Port0)"],
"4x100G": ["Eth0/1(Port0)", "Eth0/2(Port0)", "Eth0/3(Port0)", "Eth0/4(Port0)"],
"8x50G": ["Eth0/1(Port0)", "Eth0/2(Port0)", "Eth0/3(Port0)", "Eth0/4(Port0)", "Eth0/5(Port0)", "Eth0/6(Port0)", "Eth0/7(Port0)", "Eth0/8(Port0)"]
}
},
"Ethernet8": {
"index": "1,1,1,1,1,1,1,1",
"lanes": "9,10,11,12,13,14,15,16",
"breakout_modes": {
"1x400G": ["Eth1(Port1)"],
"2x200G": ["Eth1/1(Port1)", "Eth1/2(Port1)"],
"4x100G": ["Eth1/1(Port1)", "Eth1/2(Port1)", "Eth1/3(Port1)", "Eth1/4(Port1)"],
"8x50G": ["Eth1/1(Port1)", "Eth1/2(Port1)", "Eth1/3(Port1)", "Eth1/4(Port1)", "Eth1/5(Port1)", "Eth1/6(Port1)", "Eth1/7(Port1)", "Eth1/8(Port1)"]
}
},
"Ethernet16": {
"index": "2,2,2,2,2,2,2,2",
"lanes": "17,18,19,20,21,22,23,24",
"breakout_modes": {
"1x400G": ["Eth2(Port2)"],
"2x200G": ["Eth2/1(Port2)", "Eth2/2(Port2)"],
"4x100G": ["Eth2/1(Port2)", "Eth2/2(Port2)", "Eth2/3(Port2)", "Eth2/4(Port2)"],
"8x50G": ["Eth2/1(Port2)", "Eth2/2(Port2)", "Eth2/3(Port2)", "Eth2/4(Port2)", "Eth2/5(Port2)", "Eth2/6(Port2)", "Eth2/7(Port2)", "Eth2/8(Port2)"]
}
},
"Ethernet24": {
"index": "3,3,3,3,3,3,3,3",
"lanes": "25,26,27,28,29,30,31,32",
"breakout_modes": {
"1x400G": ["Eth3(Port3)"],
"2x200G": ["Eth3/1(Port3)", "Eth3/2(Port3)"],
"4x100G": ["Eth3/1(Port3)", "Eth3/2(Port3)", "Eth3/3(Port3)", "Eth3/4(Port3)"],
"8x50G": ["Eth3/1(Port3)", "Eth3/2(Port3)", "Eth3/3(Port3)", "Eth3/4(Port3)", "Eth3/5(Port3)", "Eth3/6(Port3)", "Eth3/7(Port3)", "Eth3/8(Port3)"]
}
},
"Ethernet32": {
"index": "4,4,4,4,4,4,4,4",
"lanes": "33,34,35,36,37,38,39,40",
"breakout_modes": {
"1x400G": ["Eth4(Port4)"],
"2x200G": ["Eth4/1(Port4)", "Eth4/2(Port4)"],
"4x100G": ["Eth4/1(Port4)", "Eth4/2(Port4)", "Eth4/3(Port4)", "Eth4/4(Port4)"],
"8x50G": ["Eth4/1(Port4)", "Eth4/2(Port4)", "Eth4/3(Port4)", "Eth4/4(Port4)", "Eth4/5(Port4)", "Eth4/6(Port4)", "Eth4/7(Port4)", "Eth4/8(Port4)"]
}
},
"Ethernet40": {
"index": "5,5,5,5,5,5,5,5",
"lanes": "41,42,43,44,45,46,47,48",
"breakout_modes": {
"1x400G": ["Eth5(Port5)"],
"2x200G": ["Eth5/1(Port5)", "Eth5/2(Port5)"],
"4x100G": ["Eth5/1(Port5)", "Eth5/2(Port5)", "Eth5/3(Port5)", "Eth5/4(Port5)"],
"8x50G": ["Eth5/1(Port5)", "Eth5/2(Port5)", "Eth5/3(Port5)", "Eth5/4(Port5)", "Eth5/5(Port5)", "Eth5/6(Port5)", "Eth5/7(Port5)", "Eth5/8(Port5)"]
}
},
"Ethernet48": {
"index": "6,6,6,6,6,6,6,6",
"lanes": "49,50,51,52,53,54,55,56",
"breakout_modes": {
"1x400G": ["Eth6(Port6)"],
"2x200G": ["Eth6/1(Port6)", "Eth6/2(Port6)"],
"4x100G": ["Eth6/1(Port6)", "Eth6/2(Port6)", "Eth6/3(Port6)", "Eth6/4(Port6)"],
"8x50G": ["Eth6/1(Port6)", "Eth6/2(Port6)", "Eth6/3(Port6)", "Eth6/4(Port6)", "Eth6/5(Port6)", "Eth6/6(Port6)", "Eth6/7(Port6)", "Eth6/8(Port6)"]
}
},
"Ethernet56": {
"index": "7,7,7,7,7,7,7,7",
"lanes": "57,58,59,60,61,62,63,64",
"breakout_modes": {
"1x400G": ["Eth7(Port7)"],
"2x200G": ["Eth7/1(Port7)", "Eth7/2(Port7)"],
"4x100G": ["Eth7/1(Port7)", "Eth7/2(Port7)", "Eth7/3(Port7)", "Eth7/4(Port7)"],
"8x50G": ["Eth7/1(Port7)", "Eth7/2(Port7)", "Eth7/3(Port7)", "Eth7/4(Port7)", "Eth7/5(Port7)", "Eth7/6(Port7)", "Eth7/7(Port7)", "Eth7/8(Port7)"]
}
},
"Ethernet64": {
"index": "8,8,8,8,8,8,8,8",
"lanes": "65,66,67,68,69,70,71,72",
"breakout_modes": {
"1x400G": ["Eth8(Port8)"],
"2x200G": ["Eth8/1(Port8)", "Eth8/2(Port8)"],
"4x100G": ["Eth8/1(Port8)", "Eth8/2(Port8)", "Eth8/3(Port8)", "Eth8/4(Port8)"],
"8x50G": ["Eth8/1(Port8)", "Eth8/2(Port8)", "Eth8/3(Port8)", "Eth8/4(Port8)", "Eth8/5(Port8)", "Eth8/6(Port8)", "Eth8/7(Port8)", "Eth8/8(Port8)"]
}
},
"Ethernet72": {
"index": "9,9,9,9,9,9,9,9",
"lanes": "73,74,75,76,77,78,79,80",
"breakout_modes": {
"1x400G": ["Eth9(Port9)"],
"2x200G": ["Eth9/1(Port9)", "Eth9/2(Port9)"],
"4x100G": ["Eth9/1(Port9)", "Eth9/2(Port9)", "Eth9/3(Port9)", "Eth9/4(Port9)"],
"8x50G": ["Eth9/1(Port9)", "Eth9/2(Port9)", "Eth9/3(Port9)", "Eth9/4(Port9)", "Eth9/5(Port9)", "Eth9/6(Port9)", "Eth9/7(Port9)", "Eth9/8(Port9)"]
}
},
"Ethernet80": {
"index": "10,10,10,10,10,10,10,10",
"lanes": "81,82,83,84,85,86,87,88",
"breakout_modes": {
"1x400G": ["Eth10(Port10)"],
"2x200G": ["Eth10/1(Port10)", "Eth10/2(Port10)"],
"4x100G": ["Eth10/1(Port10)", "Eth10/2(Port10)", "Eth10/3(Port10)", "Eth10/4(Port10)"],
"8x50G": ["Eth10/1(Port10)", "Eth10/2(Port10)", "Eth10/3(Port10)", "Eth10/4(Port10)", "Eth10/5(Port10)", "Eth10/6(Port10)", "Eth10/7(Port10)", "Eth10/8(Port10)"]
}
},
"Ethernet88": {
"index": "11,11,11,11,11,11,11,11",
"lanes": "89,90,91,92,93,94,95,96",
"breakout_modes": {
"1x400G": ["Eth11(Port11)"],
"2x200G": ["Eth11/1(Port11)", "Eth11/2(Port11)"],
"4x100G": ["Eth11/1(Port11)", "Eth11/2(Port11)", "Eth11/3(Port11)", "Eth11/4(Port11)"],
"8x50G": ["Eth11/1(Port11)", "Eth11/2(Port11)", "Eth11/3(Port11)", "Eth11/4(Port11)", "Eth11/5(Port11)", "Eth11/6(Port11)", "Eth11/7(Port11)", "Eth11/8(Port11)"]
}
},
"Ethernet96": {
"index": "12,12,12,12,12,12,12,12",
"lanes": "97,98,99,100,101,102,103,104",
"breakout_modes": {
"1x400G": ["Eth12(Port12)"],
"2x200G": ["Eth12/1(Port12)", "Eth12/2(Port12)"],
"4x100G": ["Eth12/1(Port12)", "Eth12/2(Port12)", "Eth12/3(Port12)", "Eth12/4(Port12)"],
"8x50G": ["Eth12/1(Port12)", "Eth12/2(Port12)", "Eth12/3(Port12)", "Eth12/4(Port12)", "Eth12/5(Port12)", "Eth12/6(Port12)", "Eth12/7(Port12)", "Eth12/8(Port12)"]
}
},
"Ethernet104": {
"index": "13,13,13,13,13,13,13,13",
"lanes": "105,106,107,108,109,110,111,112",
"breakout_modes": {
"1x400G": ["Eth13(Port13)"],
"2x200G": ["Eth13/1(Port13)", "Eth13/2(Port13)"],
"4x100G": ["Eth13/1(Port13)", "Eth13/2(Port13)", "Eth13/3(Port13)", "Eth13/4(Port13)"],
"8x50G": ["Eth13/1(Port13)", "Eth13/2(Port13)", "Eth13/3(Port13)", "Eth13/4(Port13)", "Eth13/5(Port13)", "Eth13/6(Port13)", "Eth13/7(Port13)", "Eth13/8(Port13)"]
}
},
"Ethernet112": {
"index": "14,14,14,14,14,14,14,14",
"lanes": "113,114,115,116,117,118,119,120",
"breakout_modes": {
"1x400G": ["Eth14(Port14)"],
"2x200G": ["Eth14/1(Port14)", "Eth14/2(Port14)"],
"4x100G": ["Eth14/1(Port14)", "Eth14/2(Port14)", "Eth14/3(Port14)", "Eth14/4(Port14)"],
"8x50G": ["Eth14/1(Port14)", "Eth14/2(Port14)", "Eth14/3(Port14)", "Eth14/4(Port14)", "Eth14/5(Port14)", "Eth14/6(Port14)", "Eth14/7(Port14)", "Eth14/8(Port14)"]
}
},
"Ethernet120": {
"index": "15,15,15,15,15,15,15,15",
"lanes": "121,122,123,124,125,126,127,128",
"breakout_modes": {
"1x400G": ["Eth15(Port15)"],
"2x200G": ["Eth15/1(Port15)", "Eth15/2(Port15)"],
"4x100G": ["Eth15/1(Port15)", "Eth15/2(Port15)", "Eth15/3(Port15)", "Eth15/4(Port15)"],
"8x50G": ["Eth15/1(Port15)", "Eth15/2(Port15)", "Eth15/3(Port15)", "Eth15/4(Port15)", "Eth15/5(Port15)", "Eth15/6(Port15)", "Eth15/7(Port15)", "Eth15/8(Port15)"]
}
},
"Ethernet128": {
"index": "16,16,16,16,16,16,16,16",
"lanes": "129,130,131,132,133,134,135,136",
"breakout_modes": {
"1x400G": ["Eth16(Port16)"],
"2x200G": ["Eth16/1(Port16)", "Eth16/2(Port16)"],
"4x100G": ["Eth16/1(Port16)", "Eth16/2(Port16)", "Eth16/3(Port16)", "Eth16/4(Port16)"],
"8x50G": ["Eth16/1(Port16)", "Eth16/2(Port16)", "Eth16/3(Port16)", "Eth16/4(Port16)", "Eth16/5(Port16)", "Eth16/6(Port16)", "Eth16/7(Port16)", "Eth16/8(Port16)"]
}
},
"Ethernet136": {
"index": "17,17,17,17,17,17,17,17",
"lanes": "137,138,139,140,141,142,143,144",
"breakout_modes": {
"1x400G": ["Eth17(Port17)"],
"2x200G": ["Eth17/1(Port17)", "Eth17/2(Port17)"],
"4x100G": ["Eth17/1(Port17)", "Eth17/2(Port17)", "Eth17/3(Port17)", "Eth17/4(Port17)"],
"8x50G": ["Eth17/1(Port17)", "Eth17/2(Port17)", "Eth17/3(Port17)", "Eth17/4(Port17)", "Eth17/5(Port17)", "Eth17/6(Port17)", "Eth17/7(Port17)", "Eth17/8(Port17)"]
}
},
"Ethernet144": {
"index": "18,18,18,18,18,18,18,18",
"lanes": "145,146,147,148,149,150,151,152",
"breakout_modes": {
"1x400G": ["Eth18(Port18)"],
"2x200G": ["Eth18/1(Port18)", "Eth18/2(Port18)"],
"4x100G": ["Eth18/1(Port18)", "Eth18/2(Port18)", "Eth18/3(Port18)", "Eth18/4(Port18)"],
"8x50G": ["Eth18/1(Port18)", "Eth18/2(Port18)", "Eth18/3(Port18)", "Eth18/4(Port18)", "Eth18/5(Port18)", "Eth18/6(Port18)", "Eth18/7(Port18)", "Eth18/8(Port18)"]
}
},
"Ethernet152": {
"index": "19,19,19,19,19,19,19,19",
"lanes": "153,154,155,156,157,158,159,160",
"breakout_modes": {
"1x400G": ["Eth19(Port19)"],
"2x200G": ["Eth19/1(Port19)", "Eth19/2(Port19)"],
"4x100G": ["Eth19/1(Port19)", "Eth19/2(Port19)", "Eth19/3(Port19)", "Eth19/4(Port19)"],
"8x50G": ["Eth19/1(Port19)", "Eth19/2(Port19)", "Eth19/3(Port19)", "Eth19/4(Port19)", "Eth19/5(Port19)", "Eth19/6(Port19)", "Eth19/7(Port19)", "Eth19/8(Port19)"]
}
},
"Ethernet160": {
"index": "20,20,20,20,20,20,20,20",
"lanes": "161,162,163,164,165,166,167,168",
"breakout_modes": {
"1x400G": ["Eth20(Port20)"],
"2x200G": ["Eth20/1(Port20)", "Eth20/2(Port20)"],
"4x100G": ["Eth20/1(Port20)", "Eth20/2(Port20)", "Eth20/3(Port20)", "Eth20/4(Port20)"],
"8x50G": ["Eth20/1(Port20)", "Eth20/2(Port20)", "Eth20/3(Port20)", "Eth20/4(Port20)", "Eth20/5(Port20)", "Eth20/6(Port20)", "Eth20/7(Port20)", "Eth20/8(Port20)"]
}
},
"Ethernet168": {
"index": "21,21,21,21,21,21,21,21",
"lanes": "169,170,171,172,173,174,175,176",
"breakout_modes": {
"1x400G": ["Eth21(Port21)"],
"2x200G": ["Eth21/1(Port21)", "Eth21/2(Port21)"],
"4x100G": ["Eth21/1(Port21)", "Eth21/2(Port21)", "Eth21/3(Port21)", "Eth21/4(Port21)"],
"8x50G": ["Eth21/1(Port21)", "Eth21/2(Port21)", "Eth21/3(Port21)", "Eth21/4(Port21)", "Eth21/5(Port21)", "Eth21/6(Port21)", "Eth21/7(Port21)", "Eth21/8(Port21)"]
}
},
"Ethernet176": {
"index": "22,22,22,22,22,22,22,22",
"lanes": "177,178,179,180,181,182,183,184",
"breakout_modes": {
"1x400G": ["Eth22(Port22)"],
"2x200G": ["Eth22/1(Port22)", "Eth22/2(Port22)"],
"4x100G": ["Eth22/1(Port22)", "Eth22/2(Port22)", "Eth22/3(Port22)", "Eth22/4(Port22)"],
"8x50G": ["Eth22/1(Port22)", "Eth22/2(Port22)", "Eth22/3(Port22)", "Eth22/4(Port22)", "Eth22/5(Port22)", "Eth22/6(Port22)", "Eth22/7(Port22)", "Eth22/8(Port22)"]
}
},
"Ethernet184": {
"index": "23,23,23,23,23,23,23,23",
"lanes": "185,186,187,188,189,190,191,192",
"breakout_modes": {
"1x400G": ["Eth23(Port23)"],
"2x200G": ["Eth23/1(Port23)", "Eth23/2(Port23)"],
"4x100G": ["Eth23/1(Port23)", "Eth23/2(Port23)", "Eth23/3(Port23)", "Eth23/4(Port23)"],
"8x50G": ["Eth23/1(Port23)", "Eth23/2(Port23)", "Eth23/3(Port23)", "Eth23/4(Port23)", "Eth23/5(Port23)", "Eth23/6(Port23)", "Eth23/7(Port23)", "Eth23/8(Port23)"]
}
},
"Ethernet192": {
"index": "24,24,24,24,24,24,24,24",
"lanes": "193,194,195,196,197,198,199,200",
"breakout_modes": {
"1x400G": ["Eth24(Port24)"],
"2x200G": ["Eth24/1(Port24)", "Eth24/2(Port24)"],
"4x100G": ["Eth24/1(Port24)", "Eth24/2(Port24)", "Eth24/3(Port24)", "Eth24/4(Port24)"],
"8x50G": ["Eth24/1(Port24)", "Eth24/2(Port24)", "Eth24/3(Port24)", "Eth24/4(Port24)", "Eth24/5(Port24)", "Eth24/6(Port24)", "Eth24/7(Port24)", "Eth24/8(Port24)"]
}
},
"Ethernet200": {
"index": "25,25,25,25,25,25,25,25",
"lanes": "201,202,203,204,205,206,207,208",
"breakout_modes": {
"1x400G": ["Eth25(Port25)"],
"2x200G": ["Eth25/1(Port25)", "Eth25/2(Port25)"],
"4x100G": ["Eth25/1(Port25)", "Eth25/2(Port25)", "Eth25/3(Port25)", "Eth25/4(Port25)"],
"8x50G": ["Eth25/1(Port25)", "Eth25/2(Port25)", "Eth25/3(Port25)", "Eth25/4(Port25)", "Eth25/5(Port25)", "Eth25/6(Port25)", "Eth25/7(Port25)", "Eth25/8(Port25)"]
}
},
"Ethernet208": {
"index": "26,26,26,26,26,26,26,26",
"lanes": "209,210,211,212,213,214,215,216",
"breakout_modes": {
"1x400G": ["Eth26(Port26)"],
"2x200G": ["Eth26/1(Port26)", "Eth26/2(Port26)"],
"4x100G": ["Eth26/1(Port26)", "Eth26/2(Port26)", "Eth26/3(Port26)", "Eth26/4(Port26)"],
"8x50G": ["Eth26/1(Port26)", "Eth26/2(Port26)", "Eth26/3(Port26)", "Eth26/4(Port26)", "Eth26/5(Port26)", "Eth26/6(Port26)", "Eth26/7(Port26)", "Eth26/8(Port26)"]
}
},
"Ethernet216": {
"index": "27,27,27,27,27,27,27,27",
"lanes": "217,218,219,220,221,222,223,224",
"breakout_modes": {
"1x400G": ["Eth27(Port27)"],
"2x200G": ["Eth27/1(Port27)", "Eth27/2(Port27)"],
"4x100G": ["Eth27/1(Port27)", "Eth27/2(Port27)", "Eth27/3(Port27)", "Eth27/4(Port27)"],
"8x50G": ["Eth27/1(Port27)", "Eth27/2(Port27)", "Eth27/3(Port27)", "Eth27/4(Port27)", "Eth27/5(Port27)", "Eth27/6(Port27)", "Eth27/7(Port27)", "Eth27/8(Port27)"]
}
},
"Ethernet224": {
"index": "28,28,28,28,28,28,28,28",
"lanes": "225,226,227,228,229,230,231,232",
"breakout_modes": {
"1x400G": ["Eth28(Port28)"],
"2x200G": ["Eth28/1(Port28)", "Eth28/2(Port28)"],
"4x100G": ["Eth28/1(Port28)", "Eth28/2(Port28)", "Eth28/3(Port28)", "Eth28/4(Port28)"],
"8x50G": ["Eth28/1(Port28)", "Eth28/2(Port28)", "Eth28/3(Port28)", "Eth28/4(Port28)", "Eth28/5(Port28)", "Eth28/6(Port28)", "Eth28/7(Port28)", "Eth28/8(Port28)"]
}
},
"Ethernet232": {
"index": "29,29,29,29,29,29,29,29",
"lanes": "233,234,235,236,237,238,239,240",
"breakout_modes": {
"1x400G": ["Eth29(Port29)"],
"2x200G": ["Eth29/1(Port29)", "Eth29/2(Port29)"],
"4x100G": ["Eth29/1(Port29)", "Eth29/2(Port29)", "Eth29/3(Port29)", "Eth29/4(Port29)"],
"8x50G": ["Eth29/1(Port29)", "Eth29/2(Port29)", "Eth29/3(Port29)", "Eth29/4(Port29)", "Eth29/5(Port29)", "Eth29/6(Port29)", "Eth29/7(Port29)", "Eth29/8(Port29)"]
}
},
"Ethernet240": {
"index": "30,30,30,30,30,30,30,30",
"lanes": "241,242,243,244,245,246,247,248",
"breakout_modes": {
"1x400G": ["Eth30(Port30)"],
"2x200G": ["Eth30/1(Port30)", "Eth30/2(Port30)"],
"4x100G": ["Eth30/1(Port30)", "Eth30/2(Port30)", "Eth30/3(Port30)", "Eth30/4(Port30)"],
"8x50G": ["Eth30/1(Port30)", "Eth30/2(Port30)", "Eth30/3(Port30)", "Eth30/4(Port30)", "Eth30/5(Port30)", "Eth30/6(Port30)", "Eth30/7(Port30)", "Eth30/8(Port30)"]
}
},
"Ethernet248": {
"index": "31,31,31,31,31,31,31,31",
"lanes": "249,250,251,252,253,254,255,256",
"breakout_modes": {
"1x400G": ["Eth31(Port31)"],
"2x200G": ["Eth31/1(Port31)", "Eth31/2(Port31)"],
"4x100G": ["Eth31/1(Port31)", "Eth31/2(Port31)", "Eth31/3(Port31)", "Eth31/4(Port31)"],
"8x50G": ["Eth31/1(Port31)", "Eth31/2(Port31)", "Eth31/3(Port31)", "Eth31/4(Port31)", "Eth31/5(Port31)", "Eth31/6(Port31)", "Eth31/7(Port31)", "Eth31/8(Port31)"]
}
},
"Ethernet256": {
"index": "32",
"lanes": "257",
"breakout_modes": {
"1x10G": ["Eth32(Port32)"]
}
},
"Ethernet257": {
"index": "33",
"lanes": "258",
"breakout_modes": {
"1x10G": ["Eth33(Port33)"]
}
}
}
}

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@ -0,0 +1 @@
broadcom

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@ -0,0 +1,13 @@
{
"chassis": {
"x86_64-ufispace_s9301_32d-r0": {
"component": {
"CPLD1": { },
"CPLD2": { },
"CPLD3": { },
"BIOS": { },
"BMC": {}
}
}
}
}

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@ -0,0 +1 @@
SYNCD_SHM_SIZE=512m

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@ -0,0 +1,9 @@
{
"skip_pcied": false,
"skip_fancontrol": false,
"skip_thermalctld": false,
"skip_ledd": true,
"skip_xcvrd": false,
"skip_psud": false,
"skip_syseepromd": false
}

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@ -0,0 +1,9 @@
# libsensors configuration file
bus "i2c-0" "I2C I801"
chip "tmp75-i2c-*-4f"
label temp1 "CPU Board Temp"
set temp1_max 70
set temp1_max_hyst 75
set temp1_crit 85

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@ -0,0 +1,15 @@
{
"services_to_ignore": [],
"devices_to_ignore": [
"asic",
"psu",
"fan"
],
"user_defined_checkers": [],
"polling_interval": 60,
"led_color": {
"fault": "yellow",
"normal": "green",
"booting": "blinking_green"
}
}

View File

@ -86,7 +86,8 @@ $(SONIC_ONE_IMAGE)_LAZY_INSTALLS += $(DELL_S6000_PLATFORM_MODULE) \
$(UFISPACE_S9110_32X_PLATFORM_MODULE) \
$(UFISPACE_S8901_54XC_PLATFORM_MODULE) \
$(UFISPACE_S7801_54XS_PLATFORM_MODULE) \
$(UFISPACE_S6301_56ST_PLATFORM_MODULE)
$(UFISPACE_S6301_56ST_PLATFORM_MODULE) \
$(UFISPACE_S9301_32D_PLATFORM_MODULE)
$(SONIC_ONE_IMAGE)_LAZY_BUILD_INSTALLS = $(BRCM_OPENNSL_KERNEL) $(BRCM_DNX_OPENNSL_KERNEL)
ifeq ($(INSTALL_DEBUG_TOOLS),y)

View File

@ -5,12 +5,14 @@ UFISPACE_S9110_32X_PLATFORM_MODULE_VERSION = 1.0.0
UFISPACE_S8901_54XC_PLATFORM_MODULE_VERSION = 1.0.0
UFISPACE_S7801_54XS_PLATFORM_MODULE_VERSION = 1.0.0
UFISPACE_S6301_56ST_PLATFORM_MODULE_VERSION = 1.0.0
UFISPACE_S9301_32D_PLATFORM_MODULE_VERSION = 1.0.0
export UFISPACE_S9300_32D_PLATFORM_MODULE_VERSION
export UFISPACE_S9110_32X_PLATFORM_MODULE_VERSION
export UFISPACE_S8901_54XC_PLATFORM_MODULE_VERSION
export UFISPACE_S7801_54XS_PLATFORM_MODULE_VERSION
export UFISPACE_S6301_56ST_PLATFORM_MODULE_VERSION
export UFISPACE_S9301_32D_PLATFORM_MODULE_VERSION
UFISPACE_S9300_32D_PLATFORM_MODULE = sonic-platform-ufispace-s9300-32d_$(UFISPACE_S9300_32D_PLATFORM_MODULE_VERSION)_amd64.deb
$(UFISPACE_S9300_32D_PLATFORM_MODULE)_SRC_PATH = $(PLATFORM_PATH)/sonic-platform-modules-ufispace
@ -32,4 +34,8 @@ $(eval $(call add_extra_package,$(UFISPACE_S9300_32D_PLATFORM_MODULE),$(UFISPACE
UFISPACE_S6301_56ST_PLATFORM_MODULE = sonic-platform-ufispace-s6301-56st_$(UFISPACE_S6301_56ST_PLATFORM_MODULE_VERSION)_amd64.deb
$(UFISPACE_S6301_56ST_PLATFORM_MODULE)_PLATFORM = x86_64-ufispace_s6301_56st-r0
$(eval $(call add_extra_package,$(UFISPACE_S9300_32D_PLATFORM_MODULE),$(UFISPACE_S6301_56ST_PLATFORM_MODULE)))
$(eval $(call add_extra_package,$(UFISPACE_S9300_32D_PLATFORM_MODULE),$(UFISPACE_S6301_56ST_PLATFORM_MODULE)))
UFISPACE_S9301_32D_PLATFORM_MODULE = sonic-platform-ufispace-s9301-32d_$(UFISPACE_S9301_32D_PLATFORM_MODULE_VERSION)_amd64.deb
$(UFISPACE_S9301_32D_PLATFORM_MODULE)_PLATFORM = x86_64-ufispace_s9301_32d-r0
$(eval $(call add_extra_package,$(UFISPACE_S9300_32D_PLATFORM_MODULE),$(UFISPACE_S9301_32D_PLATFORM_MODULE)))

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@ -1,3 +1,9 @@
sonic-ufispace-platform-modules (1.0.0) unstable; urgency=low
* Add support for S9301-32D
-- Ufispace <leo.yt.lin@ufispace.com> Fri, 22 Sep 2023 10:00:00 +0800
sonic-ufispace-platform-modules (1.0.0) unstable; urgency=low
* Add support for S6301-56ST

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@ -23,4 +23,8 @@ Description: This package contains s7801-54xs platform driver utility for SONiC
Package: sonic-platform-ufispace-s6301-56st
Architecture: amd64
Description: This package contains s6301-56st platform driver utility for SONiC project.
Description: This package contains s6301-56st platform driver utility for SONiC project.
Package: sonic-platform-ufispace-s9301-32d
Architecture: amd64
Description: This package contains s9301-32d platform driver utility for SONiC project.

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@ -24,6 +24,7 @@ MODULE_DIRS += s9110-32x
MODULE_DIRS += s8901-54xc
MODULE_DIRS += s7801-54xs
MODULE_DIRS += s6301-56st
MODULE_DIRS += s9301-32d
MODULE_DIR := modules
UTILS_DIR := utils
SERVICE_DIR := service

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@ -0,0 +1 @@
s9301-32d/sonic_platform-1.0-py3-none-any.whl usr/share/sonic/device/x86_64-ufispace_s9301_32d-r0/pddf

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@ -0,0 +1,3 @@
depmod -a
systemctl enable pddf-platform-init.service
systemctl start pddf-platform-init.service

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@ -0,0 +1,2 @@
systemctl stop pddf-platform-init.service
systemctl disable pddf-platform-init.service

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@ -0,0 +1,6 @@
MODULE_NAME = x86-64-ufispace-s9301-32d-cpld.o x86-64-ufispace-s9301-32d-sys-eeprom.o x86-64-ufispace-s9301-32d-lpc.o pddf_custom_sysstatus_module.o
obj-m := $(MODULE_NAME)
CFLAGS_pddf_custom_sysstatus_module.o := -I$(M)/../../../../pddf/i2c/modules/include
KBUILD_EXTRA_SYMBOLS := $(M)/../../../../pddf/i2c/Module.symvers.PDDF

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@ -0,0 +1,265 @@
/*
* Copyright 2019 Broadcom.
* The term ¡§Broadcom¡¨ refers to Broadcom Inc. and/or its subsidiaries.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
*
* A pddf kernel module for system status registers
*/
#define __STDC_WANT_LIB_EXT1__ 1
#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/jiffies.h>
#include <linux/i2c.h>
#include <linux/hwmon.h>
#include <linux/hwmon-sysfs.h>
#include <linux/err.h>
#include <linux/mutex.h>
#include <linux/sysfs.h>
#include <linux/slab.h>
#include <linux/delay.h>
#include <linux/dmi.h>
#include <linux/kobject.h>
#include "../../../../pddf/i2c/modules/include/pddf_client_defs.h"
#include "../../../../pddf/i2c/modules/include/pddf_sysstatus_defs.h"
SYSSTATUS_DATA sysstatus_data = {0};
extern int board_i2c_cpld_read(unsigned short cpld_addr, u8 reg);
extern int board_i2c_cpld_write(unsigned short cpld_addr, u8 reg, u8 value);
static ssize_t do_attr_operation(struct device *dev, struct device_attribute *da, const char *buf, size_t count);
ssize_t show_sysstatus_data(struct device *dev, struct device_attribute *da, char *buf);
ssize_t store_sysstatus_data(struct device *dev, struct device_attribute *da, const char *buf, size_t count);
PDDF_DATA_ATTR(attr_name, S_IWUSR|S_IRUGO, show_pddf_data, store_pddf_data, PDDF_CHAR, 32,
(void*)&sysstatus_data.sysstatus_addr_attr.aname, NULL);
PDDF_DATA_ATTR(attr_devaddr, S_IWUSR|S_IRUGO, show_pddf_data, store_pddf_data, PDDF_UINT32,
sizeof(uint32_t), (void*)&sysstatus_data.sysstatus_addr_attr.devaddr , NULL);
PDDF_DATA_ATTR(attr_offset, S_IWUSR|S_IRUGO, show_pddf_data, store_pddf_data, PDDF_UINT32,
sizeof(uint32_t), (void*)&sysstatus_data.sysstatus_addr_attr.offset, NULL);
PDDF_DATA_ATTR(attr_mask, S_IWUSR|S_IRUGO, show_pddf_data, store_pddf_data, PDDF_UINT32,
sizeof(uint32_t), (void*)&sysstatus_data.sysstatus_addr_attr.mask , NULL);
PDDF_DATA_ATTR(attr_len, S_IWUSR|S_IRUGO, show_pddf_data, store_pddf_data, PDDF_UINT32,
sizeof(uint32_t), (void*)&sysstatus_data.sysstatus_addr_attr.len , NULL);
PDDF_DATA_ATTR(attr_ops, S_IWUSR, NULL, do_attr_operation, PDDF_CHAR, 8, (void*)&sysstatus_data, NULL);
static struct attribute *sysstatus_addr_attributes[] = {
&attr_attr_name.dev_attr.attr,
&attr_attr_devaddr.dev_attr.attr,
&attr_attr_offset.dev_attr.attr,
&attr_attr_mask.dev_attr.attr,
&attr_attr_len.dev_attr.attr,
&attr_attr_ops.dev_attr.attr,
NULL
};
PDDF_DATA_ATTR(board_info, S_IRUGO, show_sysstatus_data, NULL, PDDF_UCHAR, sizeof(u8), NULL, NULL);
PDDF_DATA_ATTR(cpld1_version, S_IRUGO, show_sysstatus_data, NULL, PDDF_UCHAR, sizeof(u8), NULL, NULL);
PDDF_DATA_ATTR(cpld2_version, S_IRUGO, show_sysstatus_data, NULL, PDDF_UCHAR, sizeof(u8), NULL, NULL);
PDDF_DATA_ATTR(cpld3_version, S_IRUGO, show_sysstatus_data, NULL, PDDF_UCHAR, sizeof(u8), NULL, NULL);
PDDF_DATA_ATTR(mac_reset, S_IWUSR|S_IRUGO, show_sysstatus_data, store_sysstatus_data, PDDF_UCHAR, sizeof(u8), NULL, NULL);
PDDF_DATA_ATTR(mux_reset, S_IWUSR|S_IRUGO, show_sysstatus_data, store_sysstatus_data, PDDF_UCHAR, sizeof(u8), NULL, NULL);
PDDF_DATA_ATTR(psu_status, S_IRUGO, show_sysstatus_data, NULL, PDDF_UCHAR, sizeof(u8), NULL, NULL);
PDDF_DATA_ATTR(system_led_0, S_IRUGO, show_sysstatus_data, NULL, PDDF_UCHAR, sizeof(u8), NULL, NULL);
PDDF_DATA_ATTR(system_led_1, S_IRUGO, show_sysstatus_data, NULL, PDDF_UCHAR, sizeof(u8), NULL, NULL);
PDDF_DATA_ATTR(beacon_led, S_IWUSR|S_IRUGO, show_sysstatus_data, store_sysstatus_data, PDDF_UCHAR, sizeof(u8), NULL, NULL);
PDDF_DATA_ATTR(port_led_clr_ctrl, S_IWUSR|S_IRUGO, show_sysstatus_data, store_sysstatus_data, PDDF_UCHAR, sizeof(u8), NULL, NULL);
static struct attribute *sysstatus_data_attributes[] = {
&attr_board_info.dev_attr.attr,
&attr_cpld1_version.dev_attr.attr,
&attr_cpld2_version.dev_attr.attr,
&attr_cpld3_version.dev_attr.attr,
&attr_mac_reset.dev_attr.attr,
&attr_mux_reset.dev_attr.attr,
&attr_psu_status.dev_attr.attr,
&attr_system_led_0.dev_attr.attr,
&attr_system_led_1.dev_attr.attr,
&attr_beacon_led.dev_attr.attr,
&attr_port_led_clr_ctrl.dev_attr.attr,
NULL
};
static const struct attribute_group pddf_sysstatus_addr_group = {
.attrs = sysstatus_addr_attributes,
};
static const struct attribute_group pddf_sysstatus_data_group = {
.attrs = sysstatus_data_attributes,
};
static struct kobject *sysstatus_addr_kobj;
static struct kobject *sysstatus_data_kobj;
ssize_t show_sysstatus_data(struct device *dev, struct device_attribute *da, char *buf)
{
struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
SYSSTATUS_DATA *data = &sysstatus_data;
struct SYSSTATUS_ADDR_ATTR *sysstatus_addr_attrs = NULL;
int i, status ;
for (i=0;i<MAX_ATTRS;i++)
{
if (strcmp(data->sysstatus_addr_attrs[i].aname, attr->dev_attr.attr.name) == 0 )
{
sysstatus_addr_attrs = &data->sysstatus_addr_attrs[i];
}
}
if (sysstatus_addr_attrs==NULL )
{
printk(KERN_DEBUG "%s is not supported attribute for this client\n",data->sysstatus_addr_attrs[i].aname);
status = 0;
}
else
{
status = board_i2c_cpld_read( sysstatus_addr_attrs->devaddr, sysstatus_addr_attrs->offset);
}
return sprintf(buf, "0x%x\n", (status&sysstatus_addr_attrs->mask));
}
ssize_t store_sysstatus_data(struct device *dev, struct device_attribute *da, const char *buf, size_t count)
{
struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
SYSSTATUS_DATA *data = &sysstatus_data;
struct SYSSTATUS_ADDR_ATTR *sysstatus_addr_attrs = NULL;
int i, status ;
u8 reg_val;
for (i=0;i<MAX_ATTRS;i++)
{
if (strcmp(data->sysstatus_addr_attrs[i].aname, attr->dev_attr.attr.name) == 0 )
{
sysstatus_addr_attrs = &data->sysstatus_addr_attrs[i];
}
}
if (sysstatus_addr_attrs==NULL)
{
printk(KERN_DEBUG "%s is not supported attribute for this client\n",data->sysstatus_addr_attrs[i].aname);
return -EINVAL;
}
else
{
if (kstrtou8(buf, 0, &reg_val) < 0)
return -EINVAL;
status = board_i2c_cpld_write(sysstatus_addr_attrs->devaddr, sysstatus_addr_attrs->offset, reg_val);
if (status!=0)
{
printk(KERN_DEBUG "store_sysstatus_data() %s failed, status=%d\n",data->sysstatus_addr_attrs[i].aname, status);
return status;
}
}
return count;
}
static ssize_t do_attr_operation(struct device *dev, struct device_attribute *da, const char *buf, size_t count)
{
PDDF_ATTR *ptr = (PDDF_ATTR *)da;
SYSSTATUS_DATA *pdata = (SYSSTATUS_DATA *)(ptr->addr);
pdata->sysstatus_addr_attrs[pdata->len] = pdata->sysstatus_addr_attr;
pdata->len++;
pddf_dbg(SYSSTATUS, KERN_ERR "%s: Populating the data for %s\n", __FUNCTION__, pdata->sysstatus_addr_attr.aname);
#ifdef __STDC_LIB_EXT1__
memset_s(&pdata->sysstatus_addr_attr, sizeof(pdata->sysstatus_addr_attr), 0, sizeof(pdata->sysstatus_addr_attr));
#else
memset(&pdata->sysstatus_addr_attr, 0, sizeof(pdata->sysstatus_addr_attr));
#endif
return count;
}
int __init sysstatus_data_init(void)
{
struct kobject *device_kobj;
int ret = 0;
pddf_dbg(SYSSTATUS, "PDDF SYSSTATUS MODULE.. init\n");
device_kobj = get_device_i2c_kobj();
if(!device_kobj)
return -ENOMEM;
sysstatus_addr_kobj = kobject_create_and_add("sysstatus", device_kobj);
if(!sysstatus_addr_kobj)
return -ENOMEM;
sysstatus_data_kobj = kobject_create_and_add("sysstatus_data", sysstatus_addr_kobj);
if(!sysstatus_data_kobj)
return -ENOMEM;
ret = sysfs_create_group(sysstatus_addr_kobj, &pddf_sysstatus_addr_group);
if (ret)
{
kobject_put(sysstatus_addr_kobj);
return ret;
}
ret = sysfs_create_group(sysstatus_data_kobj, &pddf_sysstatus_data_group);
if (ret)
{
sysfs_remove_group(sysstatus_addr_kobj, &pddf_sysstatus_addr_group);
kobject_put(sysstatus_data_kobj);
kobject_put(sysstatus_addr_kobj);
return ret;
}
return ret;
}
void __exit sysstatus_data_exit(void)
{
pddf_dbg(SYSSTATUS, "PDDF SYSSTATUS MODULE.. exit\n");
sysfs_remove_group(sysstatus_data_kobj, &pddf_sysstatus_data_group);
sysfs_remove_group(sysstatus_addr_kobj, &pddf_sysstatus_addr_group);
kobject_put(sysstatus_data_kobj);
kobject_put(sysstatus_addr_kobj);
pddf_dbg(SYSSTATUS, KERN_ERR "%s: Removed the kobjects for 'SYSSTATUS'\n",__FUNCTION__);
return;
}
module_init(sysstatus_data_init);
module_exit(sysstatus_data_exit);
MODULE_AUTHOR("Broadcom");
MODULE_DESCRIPTION("SYSSTATUS platform data");
MODULE_LICENSE("GPL");

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@ -0,0 +1,251 @@
/* header file for i2c cpld driver of ufispace_s9301_32d
*
* Copyright (C) 2017 UfiSpace Technology Corporation.
* Leo Lin <leo.yt.lin@ufispace.com>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
*/
#ifndef UFISPACE_S9301_I2C_CPLD_H
#define UFISPACE_S9301_I2C_CPLD_H
/* CPLD device index value */
enum cpld_id {
cpld1,
cpld2,
cpld3,
};
enum LED_BLINK {
NOBLINK,
BLINK,
};
enum LED_BLINK_SPEED {
BLINK_1X, // 0.5hz
BLINK_4X, // 2hz
};
enum LED_STATUS {
OFF,
ON,
};
enum LED_YELLOW {
YELLOW_OFF,
YELLOW_ON,
};
enum LED_GREEN {
GREEN_OFF,
GREEN_ON,
};
/* QSFPDD port number */
#define QSFPDD_MAX_PORT_NUM 32
#define QSFPDD_MIN_PORT_NUM 1
/* SFP+ port number */
#define SFP_MAX_PORT_NUM 4
#define SFP_MIN_PORT_NUM 1
/* CPLD registers */
/* CPLD 1 */
#define CPLD_SKU_ID_REG 0x00
#define CPLD_HW_REV_REG 0x01
#define CPLD_VERSION_REG 0x02
#define CPLD_ID_REG 0x03
#define CPLD_BUILD_VER_REG 0x04
// Interrupt status
#define CPLD_MAC_INTR_REG 0x10
#define CPLD_10G_PHY_INTR_REG 0x13
#define CPLD_CPLD_FRU_INTR_REG 0x14
#define CPLD_THERMAL_ALERT_INTR_REG 0x16
#define CPLD_MISC_INTR_REG 0x1B
#define CPLD_SYSTEM_INTR_REG 0x1D
// Interrupt mask
#define CPLD_MAC_INTR_MASK_REG 0x20
#define CPLD_10G_PHY_INTR_MASK_REG 0x23
#define CPLD_CPLD_FRU_INTR_MASK_REG 0x24
#define CPLD_THERMAL_ALERT_INTR_MASK_REG 0x26
#define CPLD_MISC_INTR_MASK_REG 0x2B
// Interrupt event
#define CPLD_MAC_INTR_EVENT_REG 0x30
#define CPLD_10G_PHY_INTR_EVENT_REG 0x33
#define CPLD_CPLD_FRU_INTR_EVENT_REG 0x14
#define CPLD_THERMAL_ALERT_INTR_EVENT_REG 0x16
#define CPLD_MISC_INTR_EVENT_REG 0x1B
// Reset ctrl
#define CPLD_MAC_RST_REG 0x40
#define CPLD_10G_PHY_RST_REG 0x42
#define CPLD_BMC_RST_REG 0x43
#define CPLD_USB_RST_REG 0x44
#define CPLD_MUX_RST_REG 0x46
#define CPLD_MISC_RST_REG 0x48
#define CPLD_BMC_WATCHDOG_REG 0x4D
// Sys status
#define CPLD_DAU_BD_PRES_REG 0x50
#define CPLD_PSU_STATUS_REG 0x51
#define CPLD_SYS_PW_STATUS_REG 0x52
#define CPLD_MISC_REG 0x5B
// Mux ctrl
#define CPLD_MUX_CTRL_REG 0x5C
#define CPLD_MAC_QSFP_SEL_CTRL_REG 0x5F
// Led ctrl
#define CPLD_SYS_LED_CTRL_1_REG 0x80
#define CPLD_SYS_LED_CTRL_2_REG 0x81
#define CPLD_BEACON_LED_CTRL_REG 0x84
#define CPLD_PORT_LED_CLR_CTRL_REG 0x85
// Event Detect Ctrl
#define CPLD_EVENT_DETECT_CTRL_REG 0x5D
/* CPLD 2 */
/* G0 - port 0 ~ 7
G1 - port 8 ~ 15
G2 - port 16 ~ 23
G3 - port 24 ~ 31
*/
// Interrupt status
#define CPLD_QSFPDD_MOD_INT_G0_REG 0x10
#define CPLD_QSFPDD_MOD_INT_G1_REG 0x11
#define CPLD_QSFPDD_MOD_INT_G2_REG 0x12
#define CPLD_QSFPDD_MOD_INT_G3_REG 0x13
#define CPLD_QSFPDD_PRES_G0_REG 0x14
#define CPLD_QSFPDD_PRES_G1_REG 0x15
#define CPLD_QSFPDD_PRES_G2_REG 0x16
#define CPLD_QSFPDD_PRES_G3_REG 0x17
#define CPLD_QSFPDD_FUSE_INT_G0_REG 0x18
#define CPLD_QSFPDD_FUSE_INT_G1_REG 0x19
#define CPLD_QSFPDD_FUSE_INT_G2_REG 0x1A
#define CPLD_QSFPDD_FUSE_INT_G3_REG 0x1B
#define CPLD_SFP_TXFAULT_REG 0x1D
#define CPLD_SFP_ABS_REG 0x1E
#define CPLD_SFP_RXLOS_REG 0x1F
// Interrupt mask
#define CPLD_QSFPDD_MOD_INT_MASK_G0_REG 0x20
#define CPLD_QSFPDD_MOD_INT_MASK_G1_REG 0x21
#define CPLD_QSFPDD_MOD_INT_MASK_G2_REG 0x22
#define CPLD_QSFPDD_MOD_INT_MASK_G3_REG 0x23
#define CPLD_QSFPDD_PRES_MASK_G0_REG 0x24
#define CPLD_QSFPDD_PRES_MASK_G1_REG 0x25
#define CPLD_QSFPDD_PRES_MASK_G2_REG 0x26
#define CPLD_QSFPDD_PRES_MASK_G3_REG 0x27
#define CPLD_QSFPDD_FUSE_INT_MASK_G0_REG 0x28
#define CPLD_QSFPDD_FUSE_INT_MASK_G1_REG 0x29
#define CPLD_QSFPDD_FUSE_INT_MASK_G2_REG 0x2A
#define CPLD_QSFPDD_FUSE_INT_MASK_G3_REG 0x2B
#define CPLD_SFP_TXFAULT_MASK_REG 0x2D
#define CPLD_SFP_ABS_MASK_REG 0x2E
#define CPLD_SFP_RXLOS_MASK_REG 0x2F
// Interrupt event
#define CPLD_QSFPDD_MOD_INT_EVENT_G0_REG 0x30
#define CPLD_QSFPDD_MOD_INT_EVENT_G1_REG 0x31
#define CPLD_QSFPDD_MOD_INT_EVENT_G2_REG 0x32
#define CPLD_QSFPDD_MOD_INT_EVENT_G3_REG 0x33
#define CPLD_QSFPDD_PRES_EVENT_G0_REG 0x34
#define CPLD_QSFPDD_PRES_EVENT_G1_REG 0x35
#define CPLD_QSFPDD_PRES_EVENT_G2_REG 0x36
#define CPLD_QSFPDD_PRES_EVENT_G3_REG 0x37
#define CPLD_QSFPDD_FUSE_INT_EVENT_G0_REG 0x38
#define CPLD_QSFPDD_FUSE_INT_EVENT_G1_REG 0x39
#define CPLD_QSFPDD_FUSE_INT_EVENT_G2_REG 0x3A
#define CPLD_QSFPDD_FUSE_INT_EVENT_G3_REG 0x3B
#define CPLD_SFP_TXFAULT_EVENT_REG 0x3D
#define CPLD_SFP_ABS_EVENT_REG 0x3E
#define CPLD_SFP_RXLOS_EVENT_REG 0x3F
// Port ctrl
#define CPLD_QSFPDD_RESET_CTRL_G0_REG 0x40
#define CPLD_QSFPDD_RESET_CTRL_G1_REG 0x41
#define CPLD_QSFPDD_RESET_CTRL_G2_REG 0x42
#define CPLD_QSFPDD_RESET_CTRL_G3_REG 0x43
#define CPLD_QSFPDD_LP_MODE_G0_REG 0x44
#define CPLD_QSFPDD_LP_MODE_G1_REG 0x45
#define CPLD_QSFPDD_LP_MODE_G2_REG 0x46
#define CPLD_QSFPDD_LP_MODE_G3_REG 0x47
#define CPLD_SFP_TX_DIS_REG 0x55
#define CPLD_SFP_RS_REG 0x56
#define CPLD_SFP_TS_REG 0x57
// Port status
#define CPLD_PORT_INT_STATUS_REG 0x58
/* bit field structure for register value */
struct cpld_reg_sku_id_t {
u8 model_id:8;
};
struct cpld_reg_hw_rev_t {
u8 hw_rev:2;
u8 deph_rev:1;
u8 build_rev:3;
u8 reserved:1;
u8 id_type:1;
};
struct cpld_reg_version_t {
u8 minor:6;
u8 major:2;
};
struct cpld_reg_id_t {
u8 id:3;
u8 release:5;
};
struct cpld_reg_beacon_led_ctrl_t {
u8 reserve:5;
u8 speed:1;
u8 blink:1;
u8 onoff:1;
};
/* common manipulation */
#define INVALID(i, min, max) ((i < min) || (i > max) ? 1u : 0u)
#define READ_BIT(val, bit) ((0u == (val & (1<<bit))) ? 0u : 1u)
#define SET_BIT(val, bit) (val |= (1 << bit))
#define CLEAR_BIT(val, bit) (val &= ~(1 << bit))
#define TOGGLE_BIT(val, bit) (val ^= (1 << bit))
#define _BIT(n) (1<<(n))
#define _BIT_MASK(len) (BIT(len)-1)
/* bitfield of register manipulation */
#define READ_BF(bf_struct, val, bf_name, bf_value) \
(bf_value = ((struct bf_struct *)&val)->bf_name)
#define READ_BF_1(bf_struct, val, bf_name, bf_value) \
bf_struct bf; \
bf.data = val; \
bf_value = bf.bf_name
#define HW_REV_GET(val, res) \
READ_BF(cpld_reg_hw_rev_t, val, hw_rev, res)
#define DEPH_REV_GET(val, res) \
READ_BF(cpld_reg_hw_rev_t, val, deph_rev, res)
#define BUILD_REV_GET(val, res) \
READ_BF(cpld_reg_hw_rev_t, val, build_rev, res)
#define ID_TYPE_GET(val, res) \
READ_BF(cpld_reg_hw_rev_t, val, id_type, res)
#define CPLD_MAJOR_VERSION_GET(val, res) \
READ_BF(cpld_reg_version_t, val, major, res)
#define CPLD_MINOR_VERSION_GET(val, res) \
READ_BF(cpld_reg_version_t, val, minor, res)
#define CPLD_ID_ID_GET(val, res) \
READ_BF(cpld_reg_id_t, val, id, res)
/* CPLD access functions */
extern int s9301_cpld_read(u8 cpld_idx, u8 reg);
extern int s9301_cpld_write(u8 cpld_idx, u8 reg, u8 value);
#endif

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@ -0,0 +1,850 @@
/*
* A lpc driver for the ufispace_s9301_32d
*
* Copyright (C) 2017-2020 UfiSpace Technology Corporation.
* Jason Tsai <jason.cy.tsai@ufispace.com>
*
* Based on ad7414.c
* Copyright 2006 Stefan Roese <sr at denx.de>, DENX Software Engineering
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
*/
#include <linux/module.h>
#include <linux/delay.h>
#include <linux/io.h>
#include <linux/platform_device.h>
#include <linux/hwmon-sysfs.h>
#define BSP_LOG_R(fmt, args...) \
_bsp_log (LOG_READ, KERN_INFO "%s:%s[%d]: " fmt "\r\n", \
__FILE__, __func__, __LINE__, ##args)
#define BSP_LOG_W(fmt, args...) \
_bsp_log (LOG_WRITE, KERN_INFO "%s:%s[%d]: " fmt "\r\n", \
__FILE__, __func__, __LINE__, ##args)
#define BSP_PR(level, fmt, args...) _bsp_log (LOG_SYS, level "[BSP]" fmt "\r\n", ##args)
#define DRIVER_NAME "x86_64_ufispace_s9301_32d_lpc"
#define CPU_BDE 0
#define CPU_SKY 1
#define CPU_TYPE CPU_SKY
/* LPC registers */
#define REG_BASE_CPU 0x600
#if CPU_TYPE == CPU_SKY
#define REG_BASE_MB 0xE00
#define REG_BASE_I2C_ALERT 0x700
#else
#define REG_BASE_MB 0x700
#define REG_BASE_I2C_ALERT 0xF000
#endif
//CPU CPLD
#define REG_CPU_CPLD_VERSION (REG_BASE_CPU + 0x00)
#define REG_CPU_STATUS_0 (REG_BASE_CPU + 0x01)
#define REG_CPU_STATUS_1 (REG_BASE_CPU + 0x02)
#define REG_CPU_CTRL_0 (REG_BASE_CPU + 0x03)
#define REG_CPU_CTRL_1 (REG_BASE_CPU + 0x04)
#define REG_CPU_CPLD_BUILD (REG_BASE_CPU + 0xE0)
//MB CPLD
//TBD, need to change after CPLD spec release
#define REG_MB_BRD_ID_0 (REG_BASE_MB + 0x00)
#define REG_MB_BRD_ID_1 (REG_BASE_MB + 0x01)
#define REG_MB_CPLD_VERSION (REG_BASE_MB + 0x02)
#define REG_MB_CPLD_BUILD (REG_BASE_MB + 0x04)
#define REG_MB_MUX_RESET (REG_BASE_MB + 0x46)
#define REG_MB_MUX_CTRL (REG_BASE_MB + 0x5c)
//I2C Alert
#if CPU_TYPE == CPU_SKY
#define REG_ALERT_STATUS (REG_BASE_I2C_ALERT + 0x80)
#else
#define REG_ALERT_STATUS (REG_BASE_I2C_ALERT + 0x00)
#define REG_ALERT_DISABLE (REG_BASE_I2C_ALERT + 0x11)
#endif
#define MASK_ALL (0xFF)
#define LPC_MDELAY (5)
/* LPC sysfs attributes index */
enum lpc_sysfs_attributes {
//CPU CPLD
ATT_CPU_CPLD_VERSION,
ATT_CPU_CPLD_VERSION_H,
ATT_CPU_BIOS_BOOT_ROM,
ATT_CPU_BIOS_BOOT_CFG,
ATT_CPU_CPLD_BUILD,
//MB CPLD
ATT_MB_BRD_ID_0,
ATT_MB_BRD_ID_1,
ATT_MB_CPLD_1_VERSION,
ATT_MB_CPLD_1_VERSION_H,
ATT_MB_CPLD_1_BUILD,
ATT_MB_MUX_CTRL,
ATT_MB_MUX_RESET,
ATT_MB_BRD_SKU_ID,
ATT_MB_BRD_HW_ID,
ATT_MB_BRD_ID_TYPE,
ATT_MB_BRD_BUILD_ID,
ATT_MB_BRD_DEPH_ID,
//I2C Alert
ATT_ALERT_STATUS,
#if CPU_TYPE == CPU_BDE
ATT_ALERT_DISABLE,
#endif
//BSP
ATT_BSP_VERSION,
ATT_BSP_DEBUG,
ATT_BSP_PR_INFO,
ATT_BSP_PR_ERR,
ATT_BSP_REG,
ATT_MAX
};
enum bsp_log_types {
LOG_NONE,
LOG_RW,
LOG_READ,
LOG_WRITE,
LOG_SYS
};
enum bsp_log_ctrl {
LOG_DISABLE,
LOG_ENABLE
};
struct lpc_data_s {
struct mutex access_lock;
};
struct lpc_data_s *lpc_data;
char bsp_version[16]="";
char bsp_debug[2]="0";
char bsp_reg[8]="0x0";
u8 enable_log_read=LOG_DISABLE;
u8 enable_log_write=LOG_DISABLE;
u8 enable_log_sys=LOG_ENABLE;
/* reg shift */
static u8 _shift(u8 mask)
{
int i=0, mask_one=1;
for(i=0; i<8; ++i) {
if ((mask & mask_one) == 1)
return i;
else
mask >>= 1;
}
return -1;
}
/* reg mask and shift */
static u8 _mask_shift(u8 val, u8 mask)
{
int shift=0;
shift = _shift(mask);
return (val & mask) >> shift;
}
static u8 _bit_operation(u8 reg_val, u8 bit, u8 bit_val)
{
if (bit_val == 0)
reg_val = reg_val & ~(1 << bit);
else
reg_val = reg_val | (1 << bit);
return reg_val;
}
static int _bsp_log(u8 log_type, char *fmt, ...)
{
if ((log_type==LOG_READ && enable_log_read) ||
(log_type==LOG_WRITE && enable_log_write) ||
(log_type==LOG_SYS && enable_log_sys) ) {
va_list args;
int r;
va_start(args, fmt);
r = vprintk(fmt, args);
va_end(args);
return r;
} else {
return 0;
}
}
static int _config_bsp_log(u8 log_type)
{
switch(log_type) {
case LOG_NONE:
enable_log_read = LOG_DISABLE;
enable_log_write = LOG_DISABLE;
break;
case LOG_RW:
enable_log_read = LOG_ENABLE;
enable_log_write = LOG_ENABLE;
break;
case LOG_READ:
enable_log_read = LOG_ENABLE;
enable_log_write = LOG_DISABLE;
break;
case LOG_WRITE:
enable_log_read = LOG_DISABLE;
enable_log_write = LOG_ENABLE;
break;
default:
return -EINVAL;
}
return 0;
}
/* get lpc register value */
static u8 _read_lpc_reg(u16 reg, u8 mask)
{
u8 reg_val;
mutex_lock(&lpc_data->access_lock);
reg_val=_mask_shift(inb(reg), mask);
mutex_unlock(&lpc_data->access_lock);
BSP_LOG_R("reg=0x%03x, reg_val=0x%02x", reg, reg_val);
return reg_val;
}
/* get lpc register value */
static ssize_t read_lpc_reg(u16 reg, u8 mask, char *buf)
{
u8 reg_val;
int len=0;
reg_val = _read_lpc_reg(reg, mask);
len=sprintf(buf,"0x%x\n", reg_val);
return len;
}
/* set lpc register value */
static ssize_t write_lpc_reg(u16 reg, u8 mask, const char *buf, size_t count)
{
u8 reg_val, reg_val_now, shift;
if (kstrtou8(buf, 0, &reg_val) < 0)
return -EINVAL;
//apply SINGLE BIT operation if mask is specified, multiple bits are not supported
if (mask != MASK_ALL) {
reg_val_now = _read_lpc_reg(reg, 0x0);
shift = _shift(mask);
reg_val = _bit_operation(reg_val_now, shift, reg_val);
}
mutex_lock(&lpc_data->access_lock);
outb(reg_val, reg);
mdelay(LPC_MDELAY);
mutex_unlock(&lpc_data->access_lock);
BSP_LOG_W("reg=0x%03x, reg_val=0x%02x", reg, reg_val);
return count;
}
/* get bsp value */
static ssize_t read_bsp(char *buf, char *str)
{
ssize_t len=0;
mutex_lock(&lpc_data->access_lock);
len=sprintf(buf, "%s", str);
mutex_unlock(&lpc_data->access_lock);
BSP_LOG_R("reg_val=%s", str);
return len;
}
/* set bsp value */
static ssize_t write_bsp(const char *buf, char *str, size_t str_len, size_t count)
{
mutex_lock(&lpc_data->access_lock);
snprintf(str, str_len, "%s", buf);
mutex_unlock(&lpc_data->access_lock);
BSP_LOG_W("reg_val=%s", str);
return count;
}
/* get cpu cpld version in human readable format */
static ssize_t read_cpu_cpld_version_h(struct device *dev,
struct device_attribute *da, char *buf)
{
ssize_t len=0;
u16 reg = REG_CPU_CPLD_VERSION;
u8 mask = MASK_ALL;
u8 mask_major = 0b11000000;
u8 mask_minor = 0b00111111;
u8 reg_val;
u8 major, minor, build;
mutex_lock(&lpc_data->access_lock);
reg_val = _mask_shift(inb(reg), mask);
major = _mask_shift(reg_val, mask_major);
minor = _mask_shift(reg_val, mask_minor);
reg = REG_CPU_CPLD_BUILD;
build = _mask_shift(inb(reg), mask);
len = sprintf(buf, "%d.%02d.%03d\n", major, minor, build);
mutex_unlock(&lpc_data->access_lock);
BSP_LOG_R("reg=0x%03x, reg_val=0x%02x", reg, reg_val);
return len;
}
/* get mb cpld version in human readable format */
static ssize_t read_mb_cpld_1_version_h(struct device *dev,
struct device_attribute *da, char *buf)
{
ssize_t len=0;
u16 reg = REG_MB_CPLD_VERSION;
u8 mask = MASK_ALL;
u8 mask_major = 0b11000000;
u8 mask_minor = 0b00111111;
u8 reg_val;
u8 major, minor, build;
mutex_lock(&lpc_data->access_lock);
reg_val = _mask_shift(inb(reg), mask);
major = _mask_shift(reg_val, mask_major);
minor = _mask_shift(reg_val, mask_minor);
reg = REG_MB_CPLD_BUILD;
build = _mask_shift(inb(reg), mask);
len = sprintf(buf, "%d.%02d.%03d\n", major, minor, build);
mutex_unlock(&lpc_data->access_lock);
BSP_LOG_R("reg=0x%03x, reg_val=0x%02x", reg, reg_val);
return len;
}
/* get mux_reset register value */
static ssize_t read_mux_reset_callback(struct device *dev,
struct device_attribute *da, char *buf)
{
int len = 0;
u16 reg = REG_MB_MUX_RESET;
u8 mask = 0b00011111;
u8 reg_val;
mutex_lock(&lpc_data->access_lock);
reg_val=_mask_shift(inb(reg), mask);
BSP_LOG_R("reg=0x%03x, reg_val=0x%02x", reg, reg_val);
len=sprintf(buf, "%d\n", reg_val);
mutex_unlock(&lpc_data->access_lock);
return len;
}
/* set mux_reset register value */
static ssize_t write_mux_reset_callback(struct device *dev,
struct device_attribute *da, const char *buf, size_t count)
{
u8 val = 0;
u16 reg = REG_MB_MUX_RESET;
u8 reg_val = 0;
u8 mask = 0b00011111;
static int mux_reset_flag = 0;
if (kstrtou8(buf, 0, &val) < 0)
return -EINVAL;
if (mux_reset_flag == 0) {
if (val == 0) {
mutex_lock(&lpc_data->access_lock);
mux_reset_flag = 1;
BSP_LOG_W("i2c mux reset is triggered...");
reg_val = inb(reg);
outb((reg_val & ~mask), reg);
mdelay(LPC_MDELAY);
BSP_LOG_W("reg=0x%03x, reg_val=0x%02x", reg, reg_val & ~mask);
mdelay(500);
outb((reg_val | mask), reg);
mdelay(LPC_MDELAY);
BSP_LOG_W("reg=0x%03x, reg_val=0x%02x", reg, reg_val | mask);
mdelay(500);
mux_reset_flag = 0;
mutex_unlock(&lpc_data->access_lock);
} else {
return -EINVAL;
}
} else {
BSP_LOG_W("i2c mux is resetting... (ignore)");
mutex_lock(&lpc_data->access_lock);
mutex_unlock(&lpc_data->access_lock);
}
return count;
}
/* get lpc register value */
static ssize_t read_lpc_callback(struct device *dev,
struct device_attribute *da, char *buf)
{
struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
u16 reg = 0;
u8 mask = MASK_ALL;
switch (attr->index) {
//CPU CPLD
case ATT_CPU_CPLD_VERSION:
reg = REG_CPU_CPLD_VERSION;
break;
case ATT_CPU_BIOS_BOOT_ROM:
reg = REG_CPU_STATUS_1;
mask = 0x80;
break;
case ATT_CPU_BIOS_BOOT_CFG:
reg = REG_CPU_CTRL_1;
mask = 0x80;
break;
case ATT_CPU_CPLD_BUILD:
reg = REG_CPU_CPLD_BUILD;
break;
//MB CPLD
case ATT_MB_BRD_ID_0:
reg = REG_MB_BRD_ID_0;
break;
case ATT_MB_BRD_ID_1:
reg = REG_MB_BRD_ID_1;
break;
case ATT_MB_CPLD_1_VERSION:
reg = REG_MB_CPLD_VERSION;
break;
case ATT_MB_CPLD_1_BUILD:
reg = REG_MB_CPLD_BUILD;
break;
case ATT_MB_BRD_SKU_ID:
reg = REG_MB_BRD_ID_0;
mask = 0xFF;
break;
case ATT_MB_BRD_HW_ID:
reg = REG_MB_BRD_ID_1;
mask = 0x03;
break;
case ATT_MB_BRD_ID_TYPE:
reg = REG_MB_BRD_ID_1;
mask = 0x80;
break;
case ATT_MB_BRD_BUILD_ID:
reg = REG_MB_BRD_ID_1;
mask = 0x38;
break;
case ATT_MB_BRD_DEPH_ID:
reg = REG_MB_BRD_ID_1;
mask = 0x04;
break;
case ATT_MB_MUX_CTRL:
reg = REG_MB_MUX_CTRL;
break;
//I2C Alert
case ATT_ALERT_STATUS:
reg = REG_ALERT_STATUS;
mask = 0x20;
break;
#if CPU_TYPE == CPU_BDE
case ATT_ALERT_DISABLE:
reg = REG_ALERT_DISABLE;
mask = 0x04;
break;
#endif
//BSP
case ATT_BSP_REG:
if (kstrtou16(bsp_reg, 0, &reg) < 0)
return -EINVAL;
break;
default:
return -EINVAL;
}
return read_lpc_reg(reg, mask, buf);
}
/* set lpc register value */
static ssize_t write_lpc_callback(struct device *dev,
struct device_attribute *da, const char *buf, size_t count)
{
struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
u16 reg = 0;
u8 mask = MASK_ALL;
switch (attr->index) {
case ATT_MB_MUX_CTRL:
reg = REG_MB_MUX_CTRL;
break;
default:
return -EINVAL;
}
return write_lpc_reg(reg, mask, buf, count);
}
/* get bsp parameter value */
static ssize_t read_bsp_callback(struct device *dev,
struct device_attribute *da, char *buf)
{
struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
int str_len=0;
char *str=NULL;
switch (attr->index) {
case ATT_BSP_VERSION:
str = bsp_version;
str_len = sizeof(bsp_version);
break;
case ATT_BSP_DEBUG:
str = bsp_debug;
str_len = sizeof(bsp_debug);
break;
case ATT_BSP_REG:
str = bsp_reg;
str_len = sizeof(bsp_reg);
break;
default:
return -EINVAL;
}
return read_bsp(buf, str);
}
/* set bsp parameter value */
static ssize_t write_bsp_callback(struct device *dev,
struct device_attribute *da, const char *buf, size_t count)
{
struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
int str_len=0;
char *str=NULL;
u16 reg = 0;
u8 bsp_debug_u8 = 0;
switch (attr->index) {
case ATT_BSP_VERSION:
str = bsp_version;
str_len = sizeof(str);
break;
case ATT_BSP_DEBUG:
str = bsp_debug;
str_len = sizeof(str);
break;
case ATT_BSP_REG:
if (kstrtou16(buf, 0, &reg) < 0)
return -EINVAL;
str = bsp_reg;
str_len = sizeof(str);
break;
default:
return -EINVAL;
}
if (attr->index == ATT_BSP_DEBUG) {
if (kstrtou8(buf, 0, &bsp_debug_u8) < 0) {
return -EINVAL;
} else if (_config_bsp_log(bsp_debug_u8) < 0) {
return -EINVAL;
}
}
return write_bsp(buf, str, str_len, count);
}
static ssize_t write_bsp_pr_callback(struct device *dev,
struct device_attribute *da, const char *buf, size_t count)
{
struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
int str_len = strlen(buf);
if(str_len <= 0)
return str_len;
switch (attr->index) {
case ATT_BSP_PR_INFO:
BSP_PR(KERN_INFO, "%s", buf);
break;
case ATT_BSP_PR_ERR:
BSP_PR(KERN_ERR, "%s", buf);
break;
default:
return -EINVAL;
}
return str_len;
}
//SENSOR_DEVICE_ATTR - CPU
static SENSOR_DEVICE_ATTR(cpu_cpld_version, S_IRUGO, read_lpc_callback, NULL, ATT_CPU_CPLD_VERSION);
static SENSOR_DEVICE_ATTR(cpu_cpld_version_h, S_IRUGO, read_cpu_cpld_version_h, NULL, ATT_CPU_CPLD_VERSION_H);
static SENSOR_DEVICE_ATTR(boot_rom, S_IRUGO, read_lpc_callback, NULL, ATT_CPU_BIOS_BOOT_ROM);
static SENSOR_DEVICE_ATTR(boot_cfg, S_IRUGO, read_lpc_callback, NULL, ATT_CPU_BIOS_BOOT_CFG);
static SENSOR_DEVICE_ATTR(cpu_cpld_build, S_IRUGO, read_lpc_callback, NULL, ATT_CPU_CPLD_BUILD);
//SENSOR_DEVICE_ATTR - MB
static SENSOR_DEVICE_ATTR(board_id_0, S_IRUGO, read_lpc_callback, NULL, ATT_MB_BRD_ID_0);
static SENSOR_DEVICE_ATTR(board_id_1, S_IRUGO, read_lpc_callback, NULL, ATT_MB_BRD_ID_1);
static SENSOR_DEVICE_ATTR(mb_cpld_1_version, S_IRUGO, read_lpc_callback, NULL, ATT_MB_CPLD_1_VERSION);
static SENSOR_DEVICE_ATTR(mb_cpld_1_version_h, S_IRUGO, read_mb_cpld_1_version_h, NULL, ATT_MB_CPLD_1_VERSION_H);
static SENSOR_DEVICE_ATTR(mb_cpld_1_build, S_IRUGO, read_lpc_callback, NULL, ATT_MB_CPLD_1_BUILD);
static SENSOR_DEVICE_ATTR(mux_ctrl, S_IRUGO | S_IWUSR, read_lpc_callback, write_lpc_callback, ATT_MB_MUX_CTRL);
static SENSOR_DEVICE_ATTR(mux_reset, S_IRUGO | S_IWUSR, read_mux_reset_callback, write_mux_reset_callback, ATT_MB_MUX_RESET);
static SENSOR_DEVICE_ATTR(board_sku_id, S_IRUGO, read_lpc_callback, NULL, ATT_MB_BRD_SKU_ID);
static SENSOR_DEVICE_ATTR(board_hw_id, S_IRUGO, read_lpc_callback, NULL, ATT_MB_BRD_HW_ID);
static SENSOR_DEVICE_ATTR(board_id_type, S_IRUGO, read_lpc_callback, NULL, ATT_MB_BRD_ID_TYPE);
static SENSOR_DEVICE_ATTR(board_build_id, S_IRUGO, read_lpc_callback, NULL, ATT_MB_BRD_BUILD_ID);
static SENSOR_DEVICE_ATTR(board_deph_id, S_IRUGO, read_lpc_callback, NULL, ATT_MB_BRD_DEPH_ID);
//SENSOR_DEVICE_ATTR - I2C Alert
static SENSOR_DEVICE_ATTR(alert_status, S_IRUGO, read_lpc_callback, NULL, ATT_ALERT_STATUS);
#if CPU_TYPE == CPU_BDE
static SENSOR_DEVICE_ATTR(alert_disable, S_IRUGO, read_lpc_callback, NULL, ATT_ALERT_DISABLE);
#endif
//SENSOR_DEVICE_ATTR - BSP
static SENSOR_DEVICE_ATTR(bsp_version, S_IRUGO | S_IWUSR, read_bsp_callback, write_bsp_callback, ATT_BSP_VERSION);
static SENSOR_DEVICE_ATTR(bsp_debug, S_IRUGO | S_IWUSR, read_bsp_callback, write_bsp_callback, ATT_BSP_DEBUG);
static SENSOR_DEVICE_ATTR(bsp_pr_info, S_IWUSR, NULL, write_bsp_pr_callback, ATT_BSP_PR_INFO);
static SENSOR_DEVICE_ATTR(bsp_pr_err, S_IWUSR, NULL, write_bsp_pr_callback, ATT_BSP_PR_ERR);
static SENSOR_DEVICE_ATTR(bsp_reg, S_IRUGO | S_IWUSR, read_lpc_callback, write_bsp_callback, ATT_BSP_REG);
static struct attribute *cpu_cpld_attrs[] = {
&sensor_dev_attr_cpu_cpld_version.dev_attr.attr,
&sensor_dev_attr_cpu_cpld_version_h.dev_attr.attr,
&sensor_dev_attr_cpu_cpld_build.dev_attr.attr,
NULL,
};
static struct attribute *mb_cpld_attrs[] = {
&sensor_dev_attr_board_id_0.dev_attr.attr,
&sensor_dev_attr_board_id_1.dev_attr.attr,
&sensor_dev_attr_mb_cpld_1_version.dev_attr.attr,
&sensor_dev_attr_mb_cpld_1_version_h.dev_attr.attr,
&sensor_dev_attr_mb_cpld_1_build.dev_attr.attr,
&sensor_dev_attr_board_sku_id.dev_attr.attr,
&sensor_dev_attr_board_hw_id.dev_attr.attr,
&sensor_dev_attr_board_id_type.dev_attr.attr,
&sensor_dev_attr_board_build_id.dev_attr.attr,
&sensor_dev_attr_board_deph_id.dev_attr.attr,
&sensor_dev_attr_mux_ctrl.dev_attr.attr,
&sensor_dev_attr_mux_reset.dev_attr.attr,
NULL,
};
static struct attribute *bios_attrs[] = {
&sensor_dev_attr_boot_rom.dev_attr.attr,
&sensor_dev_attr_boot_cfg.dev_attr.attr,
NULL,
};
static struct attribute *i2c_alert_attrs[] = {
&sensor_dev_attr_alert_status.dev_attr.attr,
#if CPU_TYPE == CPU_BDE
&sensor_dev_attr_alert_disable.dev_attr.attr,
#endif
NULL,
};
static struct attribute *bsp_attrs[] = {
&sensor_dev_attr_bsp_version.dev_attr.attr,
&sensor_dev_attr_bsp_debug.dev_attr.attr,
&sensor_dev_attr_bsp_pr_info.dev_attr.attr,
&sensor_dev_attr_bsp_pr_err.dev_attr.attr,
&sensor_dev_attr_bsp_reg.dev_attr.attr,
NULL,
};
static struct attribute_group cpu_cpld_attr_grp = {
.name = "cpu_cpld",
.attrs = cpu_cpld_attrs,
};
static struct attribute_group mb_cpld_attr_grp = {
.name = "mb_cpld",
.attrs = mb_cpld_attrs,
};
static struct attribute_group bios_attr_grp = {
.name = "bios",
.attrs = bios_attrs,
};
static struct attribute_group i2c_alert_attr_grp = {
.name = "i2c_alert",
.attrs = i2c_alert_attrs,
};
static struct attribute_group bsp_attr_grp = {
.name = "bsp",
.attrs = bsp_attrs,
};
static void lpc_dev_release( struct device * dev)
{
return;
}
static struct platform_device lpc_dev = {
.name = DRIVER_NAME,
.id = -1,
.dev = {
.release = lpc_dev_release,
}
};
static int lpc_drv_probe(struct platform_device *pdev)
{
int i = 0, grp_num = 5;
int err[5] = {0};
struct attribute_group *grp;
lpc_data = devm_kzalloc(&pdev->dev, sizeof(struct lpc_data_s),
GFP_KERNEL);
if (!lpc_data)
return -ENOMEM;
mutex_init(&lpc_data->access_lock);
for (i=0; i<grp_num; ++i) {
switch (i) {
case 0:
grp = &cpu_cpld_attr_grp;
break;
case 1:
grp = &mb_cpld_attr_grp;
break;
case 2:
grp = &bios_attr_grp;
break;
case 3:
grp = &i2c_alert_attr_grp;
break;
case 4:
grp = &bsp_attr_grp;
break;
default:
break;
}
err[i] = sysfs_create_group(&pdev->dev.kobj, grp);
if (err[i]) {
printk(KERN_ERR "Cannot create sysfs for group %s\n", grp->name);
goto exit;
} else {
continue;
}
}
return 0;
exit:
for (i=0; i<grp_num; ++i) {
switch (i) {
case 0:
grp = &cpu_cpld_attr_grp;
break;
case 1:
grp = &mb_cpld_attr_grp;
break;
case 2:
grp = &bios_attr_grp;
break;
case 3:
grp = &i2c_alert_attr_grp;
break;
case 4:
grp = &bsp_attr_grp;
break;
default:
break;
}
sysfs_remove_group(&pdev->dev.kobj, grp);
if (!err[i]) {
//remove previous successful cases
continue;
} else {
//remove first failed case, then return
return err[i];
}
}
return 0;
}
static int lpc_drv_remove(struct platform_device *pdev)
{
sysfs_remove_group(&pdev->dev.kobj, &cpu_cpld_attr_grp);
sysfs_remove_group(&pdev->dev.kobj, &mb_cpld_attr_grp);
sysfs_remove_group(&pdev->dev.kobj, &bios_attr_grp);
sysfs_remove_group(&pdev->dev.kobj, &i2c_alert_attr_grp);
sysfs_remove_group(&pdev->dev.kobj, &bsp_attr_grp);
return 0;
}
static struct platform_driver lpc_drv = {
.probe = lpc_drv_probe,
.remove = __exit_p(lpc_drv_remove),
.driver = {
.name = DRIVER_NAME,
},
};
int lpc_init(void)
{
int err = 0;
err = platform_driver_register(&lpc_drv);
if (err) {
printk(KERN_ERR "%s(#%d): platform_driver_register failed(%d)\n",
__func__, __LINE__, err);
return err;
}
err = platform_device_register(&lpc_dev);
if (err) {
printk(KERN_ERR "%s(#%d): platform_device_register failed(%d)\n",
__func__, __LINE__, err);
platform_driver_unregister(&lpc_drv);
return err;
}
return err;
}
void lpc_exit(void)
{
platform_driver_unregister(&lpc_drv);
platform_device_unregister(&lpc_dev);
}
MODULE_AUTHOR("Leo Lin <leo.yt.lin@ufispace.com>");
MODULE_DESCRIPTION("x86_64_ufispace_s9301_32d_lpc driver");
MODULE_LICENSE("GPL");
module_init(lpc_init);
module_exit(lpc_exit);

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@ -0,0 +1,273 @@
/*
* Copyright (C) 1998, 1999 Frodo Looijaard <frodol@dds.nl> and
* Philip Edelbrock <phil@netroedge.com>
* Copyright (C) 2003 Greg Kroah-Hartman <greg@kroah.com>
* Copyright (C) 2003 IBM Corp.
* Copyright (C) 2004 Jean Delvare <jdelvare@suse.de>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
/* enable dev_dbg print out */
//#define DEBUG
#define __STDC_WANT_LIB_EXT1__ 1
#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/slab.h>
#include <linux/delay.h>
#include <linux/jiffies.h>
#include <linux/i2c.h>
#include <linux/mutex.h>
/* Addresses to scan */
static const unsigned short normal_i2c[] = { /*0x50, 0x51, 0x52, 0x53, 0x54,
0x55, 0x56, 0x57,*/ I2C_CLIENT_END };
/* Size of EEPROM in bytes */
#define EEPROM_SIZE 512
#define SLICE_BITS (6)
#define SLICE_SIZE (1 << SLICE_BITS)
#define SLICE_NUM (EEPROM_SIZE/SLICE_SIZE)
/* Each client has this additional data */
struct eeprom_data {
struct mutex update_lock;
u8 valid; /* bitfield, bit!=0 if slice is valid */
unsigned long last_updated[SLICE_NUM]; /* In jiffies, 8 slices */
u8 data[EEPROM_SIZE]; /* Register values */
};
static void sys_eeprom_update_client(struct i2c_client *client, u8 slice)
{
struct eeprom_data *data = i2c_get_clientdata(client);
int i, j;
int ret;
int addr;
mutex_lock(&data->update_lock);
if (!(data->valid & (1 << slice)) ||
time_after(jiffies, data->last_updated[slice] + 300 * HZ)) {
dev_dbg(&client->dev, "Starting eeprom update, slice %u\n", slice);
addr = slice << SLICE_BITS;
ret = i2c_smbus_write_byte_data(client, (u8)((addr >> 8) & 0xFF), (u8)(addr & 0xFF));
/* select the eeprom address */
if (ret < 0) {
dev_err(&client->dev, "address set failed\n");
goto exit;
}
if (!i2c_check_functionality(client->adapter, I2C_FUNC_SMBUS_READ_BYTE)) {
goto exit;
}
for (i = slice << SLICE_BITS; i < (slice + 1) << SLICE_BITS; i+= SLICE_SIZE) {
for (j = i; j < (i+SLICE_SIZE); j++) {
int res;
res = i2c_smbus_read_byte(client);
if (res < 0) {
goto exit;
}
data->data[j] = res & 0xFF;
}
}
data->last_updated[slice] = jiffies;
data->valid |= (1 << slice);
}
exit:
mutex_unlock(&data->update_lock);
}
static ssize_t sys_eeprom_read(struct file *filp, struct kobject *kobj,
struct bin_attribute *bin_attr,
char *buf, loff_t off, size_t count)
{
struct i2c_client *client = to_i2c_client(container_of(kobj, struct device, kobj));
struct eeprom_data *data = i2c_get_clientdata(client);
u8 slice;
if (off > EEPROM_SIZE) {
return 0;
}
if (off + count > EEPROM_SIZE) {
count = EEPROM_SIZE - off;
}
if (count == 0) {
return 0;
}
/* Only refresh slices which contain requested bytes */
for (slice = off >> SLICE_BITS; slice <= (off + count - 1) >> SLICE_BITS; slice++) {
sys_eeprom_update_client(client, slice);
}
memcpy(buf, &data->data[off], count);
return count;
}
static ssize_t sys_eeprom_write(struct file *filp, struct kobject *kobj,
struct bin_attribute *bin_attr,
char *buf, loff_t off, size_t count)
{
struct i2c_client *client = to_i2c_client(container_of(kobj, struct device, kobj));
struct eeprom_data *data = i2c_get_clientdata(client);
int ret;
int i;
u8 cmd;
u16 value16;
dev_dbg(&client->dev, "sys_eeprom_write off=%d, count=%d\n", (int)off, (int)count);
if (off > EEPROM_SIZE) {
return 0;
}
if (off + count > EEPROM_SIZE) {
count = EEPROM_SIZE - off;
}
if (count == 0) {
return 0;
}
mutex_lock(&data->update_lock);
for(i=0; i < count; i++) {
/* write command */
cmd = (off >> 8) & 0xff;
value16 = off & 0xff;
value16 |= buf[i] << 8;
ret = i2c_smbus_write_word_data(client, cmd, value16);
if (ret < 0) {
dev_err(&client->dev, "write address failed at %d \n", (int)off);
goto exit;
}
off++;
/* need to wait for write complete */
udelay(10000);
}
exit:
mutex_unlock(&data->update_lock);
/* force to update client when reading */
for(i=0; i < SLICE_NUM; i++) {
data->last_updated[i] = 0;
}
return count;
}
static struct bin_attribute sys_eeprom_attr = {
.attr = {
.name = "eeprom",
.mode = S_IRUGO | S_IWUSR,
},
.size = EEPROM_SIZE,
.read = sys_eeprom_read,
.write = sys_eeprom_write,
};
/* Return 0 if detection is successful, -ENODEV otherwise */
static int sys_eeprom_detect(struct i2c_client *client, struct i2c_board_info *info)
{
struct i2c_adapter *adapter = client->adapter;
/* EDID EEPROMs are often 24C00 EEPROMs, which answer to all
addresses 0x50-0x57, but we only care about 0x51 and 0x55. So decline
attaching to addresses >= 0x56 on DDC buses */
if (!(adapter->class & I2C_CLASS_SPD) && client->addr >= 0x56) {
return -ENODEV;
}
if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_READ_BYTE)
&& !i2c_check_functionality(adapter, I2C_FUNC_SMBUS_WRITE_BYTE_DATA)) {
return -ENODEV;
}
strlcpy(info->type, "eeprom", I2C_NAME_SIZE);
return 0;
}
static int sys_eeprom_probe(struct i2c_client *client,
const struct i2c_device_id *id)
{
struct eeprom_data *data;
int err;
if (!(data = kzalloc(sizeof(struct eeprom_data), GFP_KERNEL))) {
err = -ENOMEM;
goto exit;
}
#ifdef __STDC_LIB_EXT1__
memset_s(data->data, EEPROM_SIZE, 0xff, EEPROM_SIZE);
#else
memset(data->data, 0xff, EEPROM_SIZE);
#endif
i2c_set_clientdata(client, data);
mutex_init(&data->update_lock);
/* create the sysfs eeprom file */
err = sysfs_create_bin_file(&client->dev.kobj, &sys_eeprom_attr);
if (err) {
goto exit_kfree;
}
return 0;
exit_kfree:
kfree(data);
exit:
return err;
}
static int sys_eeprom_remove(struct i2c_client *client)
{
sysfs_remove_bin_file(&client->dev.kobj, &sys_eeprom_attr);
kfree(i2c_get_clientdata(client));
return 0;
}
static const struct i2c_device_id sys_eeprom_id[] = {
{ "sys_eeprom", 0 },
{ }
};
static struct i2c_driver sys_eeprom_driver = {
.driver = {
.name = "sys_eeprom",
},
.probe = sys_eeprom_probe,
.remove = sys_eeprom_remove,
.id_table = sys_eeprom_id,
.class = I2C_CLASS_DDC | I2C_CLASS_SPD,
.detect = sys_eeprom_detect,
.address_list = normal_i2c,
};
module_i2c_driver(sys_eeprom_driver);
MODULE_AUTHOR("Wade <wade.ce.he@ufispace.com>");
MODULE_DESCRIPTION("UfiSpace Mother Board EEPROM driver");
MODULE_LICENSE("GPL");

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../../../../pddf/i2c/service/pddf-platform-init.service

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@ -0,0 +1,4 @@
# All the derived classes for PDDF
__all__ = ["platform", "chassis", "sfp", "psu", "thermal", "fan"]
from . import platform

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#!/usr/bin/env python
#############################################################################
# PDDF
# Module contains an implementation of SONiC Chassis API
#
#############################################################################
try:
import time
from sonic_platform_pddf_base.pddf_chassis import PddfChassis
from sonic_py_common import device_info
except ImportError as e:
raise ImportError(str(e) + "- required module not found")
NUM_COMPONENT = 5
class Chassis(PddfChassis):
"""
PDDF Platform-specific Chassis class
"""
port_dict = {}
def __init__(self, pddf_data=None, pddf_plugin_data=None):
PddfChassis.__init__(self, pddf_data, pddf_plugin_data)
self._initialize_components()
def _initialize_components(self):
from sonic_platform.component import Component
for index in range(NUM_COMPONENT):
component = Component(index)
self._component_list.append(component)
# Provide the functions/variables below for which implementation is to be overwritten
def get_name(self):
"""
Retrieves the name of the chassis
Returns:
string: The name of the chassis
"""
return device_info.get_platform()
def initizalize_system_led(self):
return True
def get_status_led(self):
return self.get_system_led("SYS_LED")
def get_change_event(self, timeout=0):
"""
Returns a nested dictionary containing all devices which have
experienced a change at chassis level
Args:
timeout: Timeout in milliseconds (optional). If timeout == 0,
this method will block until a change is detected.
Returns:
(bool, dict):
- bool: True if call successful, False if not;
- dict: A nested dictionary where key is a device type,
value is a dictionary with key:value pairs in the format of
{'device_id':'device_event'}, where device_id is the device ID
for this device and device_event.
The known devices's device_id and device_event was defined as table below.
-----------------------------------------------------------------
device | device_id | device_event | annotate
-----------------------------------------------------------------
'sfp' '<sfp number>' '0' Sfp removed
'1' Sfp inserted
'2' I2C bus stuck
'3' Bad eeprom
'4' Unsupported cable
'5' High Temperature
'6' Bad cable
--------------------------------------------------------------------
Ex. 'sfp':{'11':'0', '12':'1'},
Indicates that:
sfp 11 has been removed, sfp 12 has been inserted.
Note: For sfp, when event 3-6 happened, the module will not be avalaible,
XCVRD shall stop to read eeprom before SFP recovered from error status.
"""
change_event_dict = {"sfp": {}}
start_time = time.time()
forever = False
if timeout == 0:
forever = True
elif timeout > 0:
timeout = timeout / float(1000) # Convert to secs
else:
print("get_change_event:Invalid timeout value", timeout)
return False, change_event_dict
end_time = start_time + timeout
if start_time > end_time:
print(
"get_change_event:" "time wrap / invalid timeout value",
timeout,
)
return False, change_event_dict # Time wrap or possibly incorrect timeout
try:
while timeout >= 0:
# check for sfp
sfp_change_dict = self.get_transceiver_change_event()
if sfp_change_dict:
change_event_dict["sfp"] = sfp_change_dict
return True, change_event_dict
if forever:
time.sleep(1)
else:
timeout = end_time - time.time()
if timeout >= 1:
time.sleep(1) # We poll at 1 second granularity
else:
if timeout > 0:
time.sleep(timeout)
return True, change_event_dict
except Exception as e:
print(e)
print("get_change_event: Should not reach here.")
return False, change_event_dict
def get_transceiver_change_event(self, timeout=0):
current_port_dict = {}
ret_dict = {}
# Check for OIR events and return ret_dict
for index in range(self.platform_inventory['num_ports']):
if self._sfp_list[index].get_presence():
current_port_dict[index] = self.plugin_data['XCVR']['plug_status']['inserted']
else:
current_port_dict[index] = self.plugin_data['XCVR']['plug_status']['removed']
if len(self.port_dict) == 0: # first time
self.port_dict = current_port_dict
return {}
if current_port_dict == self.port_dict:
return {}
# Update reg value
for index, status in current_port_dict.items():
if self.port_dict[index] != status:
ret_dict[index] = status
#ret_dict[str(index)] = status
self.port_dict = current_port_dict
for index, status in ret_dict.items():
if int(status) == 1:
pass
#self._sfp_list[int(index)].check_sfp_optoe_type()
return ret_dict
def get_reboot_cause(self):
"""
Retrieves the cause of the previous reboot
Returns:
A tuple (string, string) where the first element is a string
containing the cause of the previous reboot. This string must be
one of the predefined strings in this class. If the first string
is "REBOOT_CAUSE_HARDWARE_OTHER", the second string can be used
to pass a description of the reboot cause.
"""
reboot_cause_path = self.plugin_data['REBOOT_CAUSE']['reboot_cause_file']
try:
with open(reboot_cause_path, 'r', errors='replace') as fd:
data = fd.read()
sw_reboot_cause = data.strip()
except IOError:
sw_reboot_cause = "Unknown"
return ('REBOOT_CAUSE_NON_HARDWARE', sw_reboot_cause)

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#############################################################################
#
# Component contains an implementation of SONiC Platform Base API and
# provides the components firmware management function
#
#############################################################################
try:
import subprocess
from sonic_platform_base.component_base import ComponentBase
except ImportError as e:
raise ImportError(str(e) + "- required module not found")
CPLD_SYSFS = {
"CPLD1": "/sys/kernel/pddf/devices/sysstatus/sysstatus_data/cpld1_version",
"CPLD2": "/sys/kernel/pddf/devices/sysstatus/sysstatus_data/cpld2_version",
"CPLD3": "/sys/kernel/pddf/devices/sysstatus/sysstatus_data/cpld3_version",
}
BMC_CMDS = {
"VER1": "ipmitool mc info | grep 'Firmware Revision' | cut -d':' -f2 | cut -d'.' -f1",
"VER2": "ipmitool mc info | grep 'Firmware Revision' | cut -d':' -f2 | cut -d'.' -f2",
"VER3": "echo $((`ipmitool mc info | grep 'Aux Firmware Rev Info' -A 2 | sed -n '2p'` + 0))",
}
BIOS_VERSION_PATH = "/sys/class/dmi/id/bios_version"
COMPONENT_LIST= [
("CPLD1", "CPLD 1"),
("CPLD2", "CPLD 2"),
("CPLD3", "CPLD 3"),
("BIOS", "Basic Input/Output System"),
("BMC", "BMC"),
]
class Component(ComponentBase):
"""Platform-specific Component class"""
DEVICE_TYPE = "component"
def __init__(self, component_index=0):
self.index = component_index
self.name = self.get_name()
def _run_command(self, command):
# Run bash command and print output to stdout
try:
process = subprocess.Popen(
shlex.split(command), stdout=subprocess.PIPE)
while True:
output = process.stdout.readline()
if output == '' and process.poll() is not None:
break
rc = process.poll()
if rc != 0:
return False
except Exception:
return False
return True
def _get_bios_version(self):
# Retrieves the BIOS firmware version
try:
with open(BIOS_VERSION_PATH, 'r') as fd:
bios_version = fd.read()
return bios_version.strip()
except Exception as e:
return None
def _get_cpld_version(self):
# Retrieves the CPLD firmware version
cpld_version = dict()
for cpld_name in CPLD_SYSFS:
cmd = "cat {}".format(CPLD_SYSFS[cpld_name])
status, value = subprocess.getstatusoutput(cmd)
if not status:
cpld_version_raw = value.rstrip()
cpld_version_int = int(cpld_version_raw,16)
cpld_version[cpld_name] = "{}.{:02d}".format(cpld_version_int >> 6,
cpld_version_int & 0b00111111)
return cpld_version
def _get_bmc_version(self):
# Retrieves the BMC firmware version
bmc_ver = dict()
for ver in BMC_CMDS:
status, value = subprocess.getstatusoutput(BMC_CMDS[ver])
if not status:
bmc_ver[ver] = int(value.rstrip())
else:
return None
bmc_version = "{}.{}.{}".format(bmc_ver["VER1"], bmc_ver["VER2"], bmc_ver["VER3"])
return bmc_version
def get_name(self):
"""
Retrieves the name of the component
Returns:
A string containing the name of the component
"""
return COMPONENT_LIST[self.index][0]
def get_description(self):
"""
Retrieves the description of the component
Returns:
A string containing the description of the component
"""
return COMPONENT_LIST[self.index][1]
def get_firmware_version(self):
"""
Retrieves the firmware version of module
Returns:
string: The firmware versions of the module
"""
fw_version = None
if self.name == "BIOS":
fw_version = self._get_bios_version()
elif "CPLD" in self.name:
cpld_version = self._get_cpld_version()
fw_version = cpld_version.get(self.name)
elif self.name == "BMC":
fw_version = self._get_bmc_version()
return fw_version
def install_firmware(self, image_path):
"""
Install firmware to module
Args:
image_path: A string, path to firmware image
Returns:
A boolean, True if install successfully, False if not
"""
raise NotImplementedError

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@ -0,0 +1,21 @@
#!/usr/bin/env python
try:
from sonic_platform_pddf_base.pddf_eeprom import PddfEeprom
except ImportError as e:
raise ImportError(str(e) + "- required module not found")
class Eeprom(PddfEeprom):
def __init__(self, pddf_data=None, pddf_plugin_data=None):
PddfEeprom.__init__(self, pddf_data, pddf_plugin_data)
# Provide the functions/variables below for which implementation is to be overwritten
def platform_name_str(self):
(is_valid, results) = self.get_tlv_field(self.eeprom_data, self._TLV_CODE_PLATFORM_NAME)
if not is_valid:
return "N/A"
return results[2].decode('ascii')

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@ -0,0 +1,168 @@
#!/usr/bin/env python
try:
from sonic_platform_pddf_base.pddf_fan import PddfFan
except ImportError as e:
raise ImportError(str(e) + "- required module not found")
class Fan(PddfFan):
"""PDDF Platform-Specific Fan class"""
def __init__(self, tray_idx, fan_idx=0, pddf_data=None, pddf_plugin_data=None, is_psu_fan=False, psu_index=0):
# idx is 0-based
PddfFan.__init__(self, tray_idx, fan_idx, pddf_data, pddf_plugin_data, is_psu_fan, psu_index)
# Provide the functions/variables below for which implementation is to be overwritten
# Since psu_fan airflow direction cant be read from sysfs, it is fixed as 'F2B' or 'intake'
def get_speed(self):
"""
Retrieves the speed of fan as a percentage of full speed
Returns:
An integer, the percentage of full fan speed, in the range 0 (off)
to 100 (full speed)
"""
speed_percentage = 0
if self.is_psu_fan:
attr = "psu_fan{}_speed_rpm".format(self.fan_index)
device = "PSU{}".format(self.fans_psu_index)
max_speed = int(self.plugin_data['PSU']['PSU_FAN_MAX_SPEED'])
else:
if self.fan_index == 1:
pos = "f"
max_speed = int(self.plugin_data['FAN']['FAN_F_MAX_SPEED'])
else:
pos = "r"
max_speed = int(self.plugin_data['FAN']['FAN_R_MAX_SPEED'])
attr = "fan{}_{}_speed_rpm".format(self.fantray_index, pos)
device = "FAN-CTRL"
output = self.pddf_obj.get_attr_name_output(device, attr)
if not output:
return speed_percentage
output['status'] = output['status'].rstrip()
if output['status'].isalpha():
return speed_percentage
else:
speed = int(float(output['status']))
speed_percentage = round((speed*100)/max_speed)
return min(speed_percentage, 100)
def get_speed_rpm(self):
"""
Retrieves the speed of fan in RPM
Returns:
An integer, Speed of fan in RPM
"""
rpm_speed = 0
if self.is_psu_fan:
attr = "psu_fan{}_speed_rpm".format(self.fan_index)
device = "PSU{}".format(self.fans_psu_index)
else:
if self.fan_index == 1:
pos = "f"
else:
pos = "r"
attr = "fan{}_{}_speed_rpm".format(self.fantray_index, pos)
device = "FAN-CTRL"
output = self.pddf_obj.get_attr_name_output(device, attr)
if output is None:
return rpm_speed
output['status'] = output['status'].rstrip()
if output['status'].isalpha():
return rpm_speed
else:
rpm_speed = int(float(output['status']))
return rpm_speed
def get_direction(self):
"""
Retrieves the direction of fan
Returns:
A string, either FAN_DIRECTION_INTAKE or FAN_DIRECTION_EXHAUST
depending on fan direction
"""
direction = self.FAN_DIRECTION_INTAKE
if self.is_psu_fan:
attr = "psu_fan{}_dir".format(self.fan_index)
device = "PSU{}".format(self.fans_psu_index)
else:
attr = "fan{}_dir".format(self.fantray_index)
device = "FAN-CTRL"
output = self.pddf_obj.get_attr_name_output(device, attr)
if not output:
return direction
mode = output['mode']
val = output['status'].strip()
vmap = self.plugin_data['FAN']['direction'][mode]['valmap']
if val in vmap:
direction = vmap[val]
return direction
def get_presence(self):
"""
Retrieves the presence of the device
Returns:
bool: True if device is present, False if not
"""
presence = False
if self.is_psu_fan:
attr = "psu_present"
device = "PSU{}".format(self.fans_psu_index)
else:
attr = "fan{}_present".format(self.fantray_index)
device = "FAN-CTRL"
output = self.pddf_obj.get_attr_name_output(device, attr)
if not output:
return presence
mode = output['mode']
val = output['status'].strip()
vmap = self.plugin_data['FAN']['present'][mode]['valmap']
if val in vmap:
presence = vmap[val]
return presence
def get_target_speed(self):
"""
Retrieves the target (expected) speed of the fan
Returns:
An integer, the percentage of full fan speed, in the range 0 (off)
to 100 (full speed)
"""
return self.get_speed()
def set_speed(self, speed):
"""
Sets the fan speed
Args:
speed: An integer, the percentage of full fan speed to set fan to,
in the range 0 (off) to 100 (full speed)
Returns:
A boolean, True if speed is set successfully, False if not
"""
print("Setting Fan speed is not allowed")
return False

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#!/usr/bin/env python
try:
from sonic_platform_pddf_base.pddf_fan_drawer import PddfFanDrawer
except ImportError as e:
raise ImportError(str(e) + "- required module not found")
class FanDrawer(PddfFanDrawer):
"""PDDF Platform-Specific Fan-Drawer class"""
def __init__(self, tray_idx, pddf_data=None, pddf_plugin_data=None):
# idx is 0-based
PddfFanDrawer.__init__(self, tray_idx, pddf_data, pddf_plugin_data)
# Provide the functions/variables below for which implementation is to be overwritten

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#!/usr/bin/env python
#############################################################################
# PDDF
# Module contains an implementation of SONiC Platform Base API and
# provides the platform information
#
#############################################################################
try:
from sonic_platform_pddf_base.pddf_platform import PddfPlatform
except ImportError as e:
raise ImportError(str(e) + "- required module not found")
class Platform(PddfPlatform):
"""
PDDF Platform-Specific Platform Class
"""
def __init__(self):
PddfPlatform.__init__(self)
# Provide the functions/variables below for which implementation is to be overwritten

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#!/usr/bin/env python
try:
from sonic_platform_pddf_base.pddf_psu import PddfPsu
except ImportError as e:
raise ImportError (str(e) + "- required module not found")
class Psu(PddfPsu):
"""PDDF Platform-Specific PSU class"""
PLATFORM_PSU_CAPACITY = 2000
def __init__(self, index, pddf_data=None, pddf_plugin_data=None):
PddfPsu.__init__(self, index, pddf_data, pddf_plugin_data)
# Provide the functions/variables below for which implementation is to be overwritten
def get_maximum_supplied_power(self):
"""
Retrieves the maximum supplied power by PSU (or PSU capacity)
Returns:
A float number, the maximum power output in Watts.
e.g. 1200.1
"""
return float(self.PLATFORM_PSU_CAPACITY)
def get_power(self):
"""
Retrieves current energy supplied by PSU
Returns:
A float number, the power in watts,
e.g. 302.6
"""
# power is returned in micro watts
return round(float(self.get_voltage()*self.get_current()), 2)

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#!/usr/bin/env python
try:
from sonic_platform_pddf_base.pddf_sfp import PddfSfp
except ImportError as e:
raise ImportError (str(e) + "- required module not found")
class Sfp(PddfSfp):
"""
PDDF Platform-Specific Sfp class
"""
def __init__(self, index, pddf_data=None, pddf_plugin_data=None):
PddfSfp.__init__(self, index, pddf_data, pddf_plugin_data)
self.index = index
# Provide the functions/variables below for which implementation is to be overwritten
def get_error_description(self):
"""
Retrives the error descriptions of the SFP module
Returns:
String that represents the current error descriptions of vendor specific errors
In case there are multiple errors, they should be joined by '|',
like: "Bad EEPROM|Unsupported cable"
"""
if not self.get_presence():
return self.SFP_STATUS_UNPLUGGED
return self.SFP_STATUS_OK

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#!/usr/bin/env python
try:
from sonic_platform_pddf_base.pddf_thermal import PddfThermal
except ImportError as e:
raise ImportError(str(e) + "- required module not found")
class Thermal(PddfThermal):
"""PDDF Platform-Specific Thermal class"""
def __init__(self, index, pddf_data=None, pddf_plugin_data=None, is_psu_thermal=False, psu_index=0):
PddfThermal.__init__(self, index, pddf_data, pddf_plugin_data, is_psu_thermal, psu_index)
# Provide the functions/variables below for which implementation is to be overwritten

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#!/usr/bin/env python
#############################################################################
#
# Module contains an implementation of platform specific watchdog API's
#
#############################################################################
try:
from sonic_platform_pddf_base.pddf_watchdog import PddfWatchdog
except ImportError as e:
raise ImportError(str(e) + "- required module not found")
class Watchdog(PddfWatchdog):
"""
PDDF Platform-specific Chassis class
"""
def __init__(self):
PddfWatchdog.__init__(self)
self.timeout= 180
# Provide the functions/variables below for which implementation is to be overwritten

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from setuptools import setup
setup(
name='sonic-platform',
version='1.0',
description='SONiC platform API implementation on ufispace platform',
license='Apache 2.0',
author='SONiC Team',
author_email='linuxnetdev@microsoft.com',
url='https://github.com/Azure/sonic-buildimage',
maintainer='Leo Lin',
maintainer_email='leo.yt.lin@ufispace.com',
packages=['sonic_platform'],
classifiers=[
'Development Status :: 3 - Alpha',
'Environment :: Plugins',
'Intended Audience :: Developers',
'Intended Audience :: Information Technology',
'Intended Audience :: System Administrators',
'License :: OSI Approved :: Apache Software License',
'Natural Language :: English',
'Operating System :: POSIX :: Linux',
'Programming Language :: Python :: 3.7',
'Topic :: Utilities',
],
keywords='sonic SONiC platform PLATFORM',
)

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#!/bin/bash
echo 1 > /sys/kernel/pddf/devices/sysstatus/sysstatus_data/port_led_clr_ctrl
echo "PDDF device post-create completed"

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#!/bin/bash
echo "PDDF driver post-install completed"

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#!/bin/bash
#rmmod gpio_ich
if [ ! -f /tmp/._pddf_pre_driver_init_completion ]; then
# make sure igb/i40e init in correct order
rmmod i40e
rmmod igb
modprobe igb
modprobe i40e
# disable bmc watchdog
ipmitool mc watchdog off
date > /tmp/._pddf_pre_driver_init_completion
fi
echo "PDDF driver pre-install completed"

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#!/usr/bin/env python
# Script to stop and start the respective platforms default services.
# This will be used while switching the pddf->non-pddf mode and vice versa
import commands
def check_pddf_support():
return True
def stop_platform_svc():
'''
status, output = commands.getstatusoutput("systemctl stop s9301-32d-platform-monitor-fan.service")
if status:
print "Stop s9301-32d-platform-fan.service failed %d"%status
return False
status, output = commands.getstatusoutput("systemctl stop s9301-32d-platform-monitor-psu.service")
if status:
print "Stop s9301-32d-platform-psu.service failed %d"%status
return False
status, output = commands.getstatusoutput("systemctl stop s9301-32d-platform-monitor.service")
if status:
print "Stop s9301-32d-platform-init.service failed %d"%status
return False
status, output = commands.getstatusoutput("systemctl disable s9301-32d-platform-monitor.service")
if status:
print "Disable s9301-32d-platform-monitor.service failed %d"%status
return False
'''
status, output = commands.getstatusoutput("/usr/local/bin/platform_utility.py deinit")
if status:
print "platform_utility.py deinit command failed %d"%status
return False
# HACK , stop the pddf-platform-init service if it is active
status, output = commands.getstatusoutput("systemctl stop pddf-platform-init.service")
if status:
print "Stop pddf-platform-init.service along with other platform serives failed %d"%status
return False
return True
def start_platform_svc():
status, output = commands.getstatusoutput("/usr/local/bin/platform_utility.py init")
if status:
print "platform_utility.py init command failed %d"%status
return False
'''
status, output = commands.getstatusoutput("systemctl enable s9301-32d-platform-monitor.service")
if status:
print "Enable s9301-32d-platform-monitor.service failed %d"%status
return False
status, output = commands.getstatusoutput("systemctl start s9301-32d-platform-monitor-fan.service")
if status:
print "Start s9301-32d-platform-monitor-fan.service failed %d"%status
return False
status, output = commands.getstatusoutput("systemctl start s9301-32d-platform-monitor-psu.service")
if status:
print "Start s9301-32d-platform-monitor-psu.service failed %d"%status
return False
'''
return True
def start_platform_pddf():
status, output = commands.getstatusoutput("systemctl start pddf-platform-init.service")
if status:
print "Start pddf-platform-init.service failed %d"%status
return False
return True
def stop_platform_pddf():
status, output = commands.getstatusoutput("systemctl stop pddf-platform-init.service")
if status:
print "Stop pddf-platform-init.service failed %d"%status
return False
return True