2019-05-29 00:44:32 -05:00
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# sfputil.py
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#
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# Platform-specific SFP transceiver interface for SONiC
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#
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try:
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import time
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import os
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from ctypes import create_string_buffer
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from sonic_sfp.sfputilbase import SfpUtilBase
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except ImportError as e:
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raise ImportError("%s - required module not found" % str(e))
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2019-07-24 14:14:43 -05:00
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#from xcvrd
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SFP_STATUS_INSERTED = '1'
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SFP_STATUS_REMOVED = '0'
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2019-05-29 00:44:32 -05:00
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class SfpUtil(SfpUtilBase):
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"""Platform-specific SfpUtil class"""
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PORT_START = 1
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2019-07-24 14:14:43 -05:00
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PORT_END = 54
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PORTS_IN_BLOCK = 54
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QSFP_PORT_START = 49
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QSFP_PORT_END = 54
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2019-05-29 00:44:32 -05:00
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BASE_VAL_PATH = "/sys/class/i2c-adapter/i2c-{0}/{1}-0050/"
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BASE_OOM_PATH = "/sys/bus/i2c/devices/{0}-0050/"
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BASE_CPLD2_PATH = "/sys/bus/i2c/devices/{0}-0061/"
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BASE_CPLD3_PATH = "/sys/bus/i2c/devices/{0}-0062/"
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I2C_BUS_ORDER = -1
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#The sidebands of QSFP is different.
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#present is in-order.
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#But lp_mode and reset are not.
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2019-07-24 14:14:43 -05:00
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qsfp_sb_map = [0, 2, 4, 1, 3, 5]
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2019-05-29 00:44:32 -05:00
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_port_to_is_present = {}
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_port_to_lp_mode = {}
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_port_to_eeprom_mapping = {}
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_port_to_i2c_mapping = {
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2019-07-24 14:14:43 -05:00
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1: [1, 2],
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2: [2, 3],
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3: [3, 4],
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4: [4, 5],
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5: [5, 6],
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6: [6, 7],
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7: [7, 8],
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8: [8, 9],
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9: [9, 10],
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10: [10,11],
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11: [11,12],
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12: [12,13],
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13: [13,14],
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14: [14,15],
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15: [15,16],
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16: [16,17],
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17: [17,18],
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18: [18,19],
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19: [19,20],
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20: [20,21],
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21: [21,22],
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22: [22,23],
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23: [23,24],
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24: [24,25],
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25: [25,26],
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26: [26,27],
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27: [27,28],
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28: [28,29],
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29: [29,30],
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30: [30,31],
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31: [31,32],
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32: [32,33],
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33: [33,34],
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34: [34,35],
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35: [35,36],
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36: [36,37],
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37: [37,38],
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38: [38,39],
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39: [39,40],
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40: [40,41],
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41: [41,42],
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42: [42,43],
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43: [43,44],
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44: [44,45],
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45: [45,46],
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46: [46,47],
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47: [47,48],
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48: [48,49],
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49: [49,50],#QSFP_start
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50: [51,52],
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51: [53,54],
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52: [50,51],
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53: [52,53],
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54: [54,55],
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2019-05-29 00:44:32 -05:00
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}
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@property
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def port_start(self):
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return self.PORT_START
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@property
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def port_end(self):
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return self.PORT_END
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@property
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def qsfp_port_start(self):
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return self.QSFP_PORT_START
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@property
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def qsfp_port_end(self):
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return self.QSFP_PORT_END
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@property
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def qsfp_ports(self):
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return range(self.QSFP_PORT_START, self.PORTS_IN_BLOCK + 1)
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@property
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def port_to_eeprom_mapping(self):
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return self._port_to_eeprom_mapping
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def __init__(self):
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eeprom_path = self.BASE_OOM_PATH + "eeprom"
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for x in range(self.port_start, self.port_end+1):
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self.port_to_eeprom_mapping[x] = eeprom_path.format(
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self._port_to_i2c_mapping[x][1]
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)
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SfpUtilBase.__init__(self)
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#Two i2c buses might get flipped order, check them both.
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def update_i2c_order(self):
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2020-11-04 18:24:53 -06:00
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if self.I2C_BUS_ORDER < 0:
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eeprom_path = "/sys/bus/i2c/devices/1-0057/eeprom"
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if os.path.exists(eeprom_path):
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self.I2C_BUS_ORDER = 0
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eeprom_path = "/sys/bus/i2c/devices/0-0057/eeprom"
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if os.path.exists(eeprom_path):
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self.I2C_BUS_ORDER = 1
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2019-05-29 00:44:32 -05:00
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return self.I2C_BUS_ORDER
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def get_presence(self, port_num):
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# Check for invalid port_num
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if port_num < self.port_start or port_num > self.port_end:
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return False
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order = self.update_i2c_order()
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if port_num <= 24:
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present_path = self.BASE_CPLD2_PATH.format(order)
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else:
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present_path = self.BASE_CPLD3_PATH.format(order)
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2019-07-24 14:14:43 -05:00
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present_path = present_path + "module_present_" + str(port_num)
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2019-05-29 00:44:32 -05:00
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self.__port_to_is_present = present_path
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2020-02-07 09:53:55 -06:00
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content="0"
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2019-05-29 00:44:32 -05:00
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try:
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val_file = open(self.__port_to_is_present)
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2020-02-07 09:53:55 -06:00
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content = val_file.readline().rstrip()
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val_file.close()
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2019-05-29 00:44:32 -05:00
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except IOError as e:
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2020-02-07 09:53:55 -06:00
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print "Error: unable to access file: %s" % str(e)
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2019-05-29 00:44:32 -05:00
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return False
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2020-02-07 09:53:55 -06:00
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2019-05-29 00:44:32 -05:00
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if content == "1":
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return True
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return False
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def qsfp_sb_remap(self, port_num):
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qsfp_start = self.qsfp_port_start
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2019-07-24 14:14:43 -05:00
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qsfp_index = port_num - qsfp_start
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qsfp_index = self.qsfp_sb_map[qsfp_index]
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2019-05-29 00:44:32 -05:00
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return qsfp_start+qsfp_index
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def get_low_power_mode_cpld(self, port_num):
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if port_num < self.qsfp_port_start or port_num > self.qsfp_port_end:
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return False
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order = self.update_i2c_order()
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lp_mode_path = self.BASE_CPLD3_PATH.format(order)
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lp_mode_path = lp_mode_path + "module_lp_mode_"
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q = self.qsfp_sb_remap(port_num)
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lp_mode_path = lp_mode_path + str(q)
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2020-02-07 09:53:55 -06:00
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content = "0"
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2019-05-29 00:44:32 -05:00
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try:
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val_file = open(lp_mode_path)
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2020-02-07 09:53:55 -06:00
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content = val_file.readline().rstrip()
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val_file.close()
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2019-05-29 00:44:32 -05:00
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except IOError as e:
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print "Error: unable to open file: %s" % str(e)
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return False
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2020-02-07 09:53:55 -06:00
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2019-05-29 00:44:32 -05:00
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if content == "1":
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return True
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return False
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def get_low_power_mode(self, port_num):
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if port_num < self.qsfp_port_start or port_num > self.qsfp_port_end:
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return False
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if not self.get_presence(port_num):
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return self.get_low_power_mode_cpld(port_num)
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try:
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eeprom = None
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eeprom = open(self.port_to_eeprom_mapping[port_num], "rb")
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eeprom.seek(93)
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lpmode = ord(eeprom.read(1))
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if not (lpmode & 0x1): # 'Power override' bit is 0
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return self.get_low_power_mode_cpld(port_num)
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else:
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if ((lpmode & 0x2) == 0x2):
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return True # Low Power Mode if "Power set" bit is 1
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else:
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return False # High Power Mode if "Power set" bit is 0
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except IOError as err:
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print "Error: unable to open file: %s" % str(err)
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return False
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finally:
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if eeprom is not None:
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eeprom.close()
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time.sleep(0.01)
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def set_low_power_mode(self, port_num, lpmode):
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if port_num < self.qsfp_port_start or port_num > self.qsfp_port_end:
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return False
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try:
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eeprom = None
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if not self.get_presence(port_num):
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return False # Port is not present, unable to set the eeprom
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# Fill in write buffer
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regval = 0x3 if lpmode else 0x1 # 0x3:Low Power Mode, 0x1:High Power Mode
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buffer = create_string_buffer(1)
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buffer[0] = chr(regval)
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# Write to eeprom
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eeprom = open(self.port_to_eeprom_mapping[port_num], "r+b")
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eeprom.seek(93)
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eeprom.write(buffer[0])
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return True
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except IOError as err:
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print "Error: unable to open file: %s" % str(err)
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return False
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finally:
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if eeprom is not None:
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eeprom.close()
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time.sleep(0.01)
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def reset(self, port_num):
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if port_num < self.qsfp_port_start or port_num > self.qsfp_port_end:
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return False
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order = self.update_i2c_order()
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lp_mode_path = self.BASE_CPLD3_PATH.format(order)
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mod_rst_path = lp_mode_path + "module_reset_"
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q = self.qsfp_sb_remap(port_num)
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mod_rst_path = mod_rst_path + str(q)
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try:
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2019-07-24 14:14:43 -05:00
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reg_file = open(mod_rst_path, 'r+', buffering=0)
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2019-05-29 00:44:32 -05:00
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except IOError as e:
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print "Error: unable to open file: %s" % str(e)
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return False
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#toggle reset
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reg_file.seek(0)
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reg_file.write('0')
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time.sleep(1)
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reg_file.seek(0)
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reg_file.write('1')
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reg_file.close()
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return True
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2019-07-24 14:14:43 -05:00
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@property
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def _get_presence_bitmap(self):
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nodes = []
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order = self.update_i2c_order()
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2019-05-29 00:44:32 -05:00
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2019-07-24 14:14:43 -05:00
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present_path = self.BASE_CPLD2_PATH.format(order)
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nodes.append(present_path + "module_present_all")
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present_path = self.BASE_CPLD3_PATH.format(order)
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nodes.append(present_path + "module_present_all")
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bitmap = ""
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for node in nodes:
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try:
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reg_file = open(node)
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except IOError as e:
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print "Error: unable to open file: %s" % str(e)
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return False
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bitmap += reg_file.readline().rstrip() + " "
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reg_file.close()
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rev = bitmap.split(" ")
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rev = "".join(rev[::-1])
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return int(rev,16)
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data = {'valid':0, 'last':0, 'present':0}
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def get_transceiver_change_event(self, timeout=2000):
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now = time.time()
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port_dict = {}
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port = 0
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if timeout < 1000:
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timeout = 1000
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timeout = (timeout) / float(1000) # Convert to secs
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if now < (self.data['last'] + timeout) and self.data['valid']:
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return True, {}
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reg_value = self._get_presence_bitmap
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changed_ports = self.data['present'] ^ reg_value
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if changed_ports:
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for port in range (self.port_start, self.port_end+1):
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# Mask off the bit corresponding to our port
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fp_port = self._port_to_i2c_mapping[port][0]
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mask = (1 << (fp_port - 1))
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if changed_ports & mask:
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if (reg_value & mask) == 0:
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port_dict[port] = SFP_STATUS_REMOVED
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else:
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port_dict[port] = SFP_STATUS_INSERTED
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# Update cache
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self.data['present'] = reg_value
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self.data['last'] = now
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self.data['valid'] = 1
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return True, port_dict
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else:
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return True, {}
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return False, {}
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