2018-08-07 02:14:37 -05:00
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/*
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2018-08-23 14:05:14 -05:00
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* Copyright 2017 Broadcom
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2018-08-07 02:14:37 -05:00
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*
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2018-08-23 14:05:14 -05:00
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License, version 2, as
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* published by the Free Software Foundation (the "GPL").
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*
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* This program is distributed in the hope that it will be useful, but
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* WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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* General Public License version 2 (GPLv2) for more details.
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*
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* You should have received a copy of the GNU General Public License
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* version 2 (GPLv2) along with this source code.
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2018-08-07 02:14:37 -05:00
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*/
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/*
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* $Id: ibde.h,v 1.27 Broadcom SDK $
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* $Copyright: (c) 2005 Broadcom Corp.
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* All Rights Reserved.$
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*/
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#ifndef __IBDE_H__
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#define __IBDE_H__
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#include <sal/types.h>
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/*
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* Represents a collection of devices
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*/
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typedef struct ibde_dev_s {
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uint16 device;
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uint8 rev;
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sal_vaddr_t base_address;
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sal_vaddr_t base_address1;
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sal_vaddr_t base_address2;
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} ibde_dev_t;
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typedef struct ibde_s {
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const char *(*name)(void);
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/* Returns the number of devices available */
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/* Each device is is accessed through a handle */
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/* Handles are assumed to index the array of devices */
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/* Support SWITCH or ETHERNET or CPU devices */
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int (*num_devices)(int type);
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#define BDE_ALL_DEVICES 0
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#define BDE_SWITCH_DEVICES 1
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#define BDE_ETHER_DEVICES 2
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#define BDE_CPU_DEVICES 3
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const ibde_dev_t *(*get_dev)(int d);
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/*
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* Get types of underlaying devices.
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* A combination of bus type and functional type is returned.
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* In case of bus type, support PCI and SPI device types.
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* In case of functional type, specify if underlaying device is
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* a switching or ethernet device.
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*/
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uint32 (*get_dev_type)(int d);
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#define BDE_PCI_DEV_TYPE SAL_PCI_DEV_TYPE /* PCI device */
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#define BDE_SPI_DEV_TYPE SAL_SPI_DEV_TYPE /* SPI device */
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#define BDE_EB_DEV_TYPE SAL_EB_DEV_TYPE /* EB device */
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#define BDE_ICS_DEV_TYPE SAL_ICS_DEV_TYPE /* ICS device */
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#define BDE_MII_DEV_TYPE SAL_MII_DEV_TYPE /* MII device */
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#define BDE_I2C_DEV_TYPE SAL_I2C_DEV_TYPE /* I2C device */
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#define BDE_AXI_DEV_TYPE SAL_AXI_DEV_TYPE /* AXI device */
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#define BDE_EMMI_DEV_TYPE SAL_EMMI_DEV_TYPE /* EMMI device */
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#define BDE_DEV_BUS_ALT SAL_DEV_BUS_ALT /* Alternate Access */
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#define BDE_DEV_BUS_MSI SAL_DEV_BUS_MSI /* Message-signaled interrupts */
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#define BDE_DEV_BUS_TYPE_MASK SAL_DEV_BUS_TYPE_MASK
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#define BDE_SWITCH_DEV_TYPE SAL_SWITCH_DEV_TYPE /* Switch device */
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#define BDE_ETHER_DEV_TYPE SAL_ETHER_DEV_TYPE /* Ethernet device */
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#define BDE_CPU_DEV_TYPE SAL_CPU_DEV_TYPE /* CPU device */
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#define BDE_BYTE_SWAP 0x01000000 /* SW byte swap */
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#define BDE_NO_IPROC 0x02000000 /* Device uses two BARs, but is not iProc */
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2018-08-23 14:05:14 -05:00
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#define BDE_8MB_REG_SPACE 0x10000000 /* 8MB sized CMIC BAR */
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#define BDE_256K_REG_SPACE 0x20000000 /* Map 256K (v 64K) */
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#define BDE_128K_REG_SPACE 0x40000000 /* Map 128K (v 64K) */
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#define BDE_320K_REG_SPACE 0x80000000 /* Map 256K+64K */
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/* Bus supports only 16bit reads */
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#define BDE_DEV_BUS_RD_16BIT SAL_DEV_BUS_RD_16BIT
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/* Bus supports only 16bit writes */
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#define BDE_DEV_BUS_WR_16BIT SAL_DEV_BUS_WR_16BIT
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/* Backward compatibility */
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#define BDE_ET_DEV_TYPE BDE_MII_DEV_TYPE
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#define BDE_DEV_MEM_MAPPED(_d) \
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((_d) & (BDE_PCI_DEV_TYPE | BDE_ICS_DEV_TYPE | BDE_EB_DEV_TYPE |\
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BDE_EMMI_DEV_TYPE | BDE_AXI_DEV_TYPE))
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/*
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* PCI Bus Access
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*/
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uint32 (*pci_conf_read)(int d, uint32 addr);
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int (*pci_conf_write)(int d, uint32 addr, uint32 data);
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void (*pci_bus_features)(int d, int *be_pio, int *be_packet,
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int *be_other);
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uint32 (*read)(int d, uint32 addr);
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int (*write)(int d, uint32 addr, uint32 data);
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uint32* (*salloc)(int d, int size, const char *name);
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void (*sfree)(int d, void *ptr);
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int (*sflush)(int d, void *addr, int length);
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int (*sinval)(int d, void *addr, int length);
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int (*interrupt_connect)(int d, void (*)(void*), void *data);
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int (*interrupt_disconnect)(int d);
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sal_paddr_t (*l2p)(int d, void *laddr);
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void* (*p2l)(int d, sal_paddr_t paddr);
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/*
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* SPI Access via SMP
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*/
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int (*spi_read)(int d, uint32 addr, uint8 *buf, int len);
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int (*spi_write)(int d, uint32 addr, uint8 *buf, int len);
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/* Special SPI access addresses */
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#define BDE_DEV_OP_EMMI_INIT SAL_DEV_OP_EMMI_INIT
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/*
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* iProc register access
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*/
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uint32 (*iproc_read)(int d, uint32 addr);
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int (*iproc_write)(int d, uint32 addr, uint32 data);
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/*
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* Shared memory access
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*/
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uint32 (*shmem_read)(int dev, uint32 addr, uint8 *buf, uint32 len);
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void (*shmem_write)(int dev, uint32 addr, uint8 *buf, uint32 len);
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sal_vaddr_t (*shmem_map)(int dev, uint32 addr, uint32 size);
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/*
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* cmic
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*/
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int (*get_cmic_ver)(int d, uint32 *ver);
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} ibde_t;
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/* System BDE */
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extern ibde_t *bde;
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#endif /* __IBDE_H__ */
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