2021-06-03 12:51:01 -05:00
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/*
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* I2C multiplexer driver for PCA9541 bus master selector
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*
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* Copyright (c) 2010 Ericsson AB.
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* Copyright (c) 2019 <support@ragile.com>
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* Author: Guenter Roeck <linux@roeck-us.net>
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*
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* Derived from:
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* pca954x.c
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*
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* Copyright (c) 2008-2009 Rodolfo Giometti <giometti@linux.it>
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* Copyright (c) 2008-2009 Eurotech S.p.A. <info@eurotech.it>
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*
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* This file is licensed under the terms of the GNU General Public
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* License version 2. This program is licensed "as is" without any
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* warranty of any kind, whether express or implied.
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*/
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#include <linux/module.h>
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#include <linux/jiffies.h>
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#include <linux/delay.h>
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#include <linux/slab.h>
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#include <linux/device.h>
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#include <linux/i2c.h>
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#include <linux/i2c-mux.h>
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2023-01-12 20:01:47 -06:00
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#include <linux/version.h>
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#if LINUX_VERSION_CODE >= KERNEL_VERSION(5, 10, 0)
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#include <linux/bitops.h>
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#else
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2021-06-03 12:51:01 -05:00
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#include <linux/platform_data/pca954x.h>
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2023-01-12 20:01:47 -06:00
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#endif
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2021-06-03 12:51:01 -05:00
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/*
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* The PCA9541 is a bus master selector. It supports two I2C masters connected
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* to a single slave bus.
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*
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* Before each bus transaction, a master has to acquire bus ownership. After the
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* transaction is complete, bus ownership has to be released. This fits well
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* into the I2C multiplexer framework, which provides select and release
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* functions for this purpose. For this reason, this driver is modeled as
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* single-channel I2C bus multiplexer.
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*
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* This driver assumes that the two bus masters are controlled by two different
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* hosts. If a single host controls both masters, platform code has to ensure
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* that only one of the masters is instantiated at any given time.
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*/
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2021-11-18 01:49:06 -06:00
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#define PCA9541_CONTROL 0x01
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#define PCA9541_ISTAT 0x02
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#define PCA9541_CTL_MYBUS (1 << 0)
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#define PCA9541_CTL_NMYBUS (1 << 1)
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#define PCA9541_CTL_BUSON (1 << 2)
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#define PCA9541_CTL_NBUSON (1 << 3)
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#define PCA9541_CTL_BUSINIT (1 << 4)
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#define PCA9541_CTL_TESTON (1 << 6)
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#define PCA9541_CTL_NTESTON (1 << 7)
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#define PCA9541_ISTAT_INTIN (1 << 0)
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#define PCA9541_ISTAT_BUSINIT (1 << 1)
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#define PCA9541_ISTAT_BUSOK (1 << 2)
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#define PCA9541_ISTAT_BUSLOST (1 << 3)
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#define PCA9541_ISTAT_MYTEST (1 << 6)
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#define PCA9541_ISTAT_NMYTEST (1 << 7)
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#define PCA9641_ID 0x00
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#define PCA9641_ID_MAGIC 0x38
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#define PCA9641_CONTROL 0x01
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#define PCA9641_STATUS 0x02
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#define PCA9641_TIME 0x03
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#define PCA9641_CTL_LOCK_REQ BIT(0)
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#define PCA9641_CTL_LOCK_GRANT BIT(1)
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#define PCA9641_CTL_BUS_CONNECT BIT(2)
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#define PCA9641_CTL_BUS_INIT BIT(3)
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#define PCA9641_CTL_SMBUS_SWRST BIT(4)
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#define PCA9641_CTL_IDLE_TIMER_DIS BIT(5)
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#define PCA9641_CTL_SMBUS_DIS BIT(6)
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#define PCA9641_CTL_PRIORITY BIT(7)
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#define PCA9641_STS_OTHER_LOCK BIT(0)
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#define PCA9641_STS_BUS_INIT_FAIL BIT(1)
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#define PCA9641_STS_BUS_HUNG BIT(2)
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#define PCA9641_STS_MBOX_EMPTY BIT(3)
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#define PCA9641_STS_MBOX_FULL BIT(4)
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#define PCA9641_STS_TEST_INT BIT(5)
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#define PCA9641_STS_SCL_IO BIT(6)
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#define PCA9641_STS_SDA_IO BIT(7)
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#define PCA9641_RES_TIME 0x03
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2021-11-18 01:49:06 -06:00
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#define BUSON (PCA9541_CTL_BUSON | PCA9541_CTL_NBUSON)
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#define MYBUS (PCA9541_CTL_MYBUS | PCA9541_CTL_NMYBUS)
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#define mybus(x) (!((x) & MYBUS) || ((x) & MYBUS) == MYBUS)
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#define busoff(x) (!((x) & BUSON) || ((x) & BUSON) == BUSON)
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#define BUSOFF(x, y) (!((x) & PCA9641_CTL_LOCK_GRANT) && \
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!((y) & PCA9641_STS_OTHER_LOCK))
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#define other_lock(x) ((x) & PCA9641_STS_OTHER_LOCK)
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#define lock_grant(x) ((x) & PCA9641_CTL_LOCK_GRANT)
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#define PCA9641_RETRY_TIME 8
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typedef struct i2c_muxs_struct_flag
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{
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int nr;
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char name[48];
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struct mutex update_lock;
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int flag;
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2021-06-03 12:51:01 -05:00
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}i2c_mux_flag;
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i2c_mux_flag pca_flag = {
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.flag = -1,
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2021-06-03 12:51:01 -05:00
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};
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int pca9641_setmuxflag(int nr, int flag)
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{
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2021-11-18 01:49:06 -06:00
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if (pca_flag.nr == nr) {
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pca_flag.flag = flag;
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}
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return 0;
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2021-06-03 12:51:01 -05:00
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}
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EXPORT_SYMBOL(pca9641_setmuxflag);
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int g_debug = 0;
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module_param(g_debug, int, S_IRUGO | S_IWUSR);
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#define PCA_DEBUG(fmt, args...) do { \
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if (g_debug) { \
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printk(KERN_ERR "[pca9641][VER][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \
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} \
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} while (0)
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/* arbitration timeouts, in jiffies */
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2021-11-18 01:49:06 -06:00
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#define ARB_TIMEOUT (HZ / 8) /* 125 ms until forcing bus ownership */
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#define ARB2_TIMEOUT (HZ / 4) /* 250 ms until acquisition failure */
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2021-06-03 12:51:01 -05:00
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/* arbitration retry delays, in us */
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2021-11-18 01:49:06 -06:00
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#define SELECT_DELAY_SHORT 50
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#define SELECT_DELAY_LONG 1000
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2021-06-03 12:51:01 -05:00
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struct pca9541 {
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struct i2c_client *client;
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unsigned long select_timeout;
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unsigned long arb_timeout;
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};
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static const struct i2c_device_id pca9541_id[] = {
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{"pca9541", 0},
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{"pca9641", 1},
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{}
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2021-06-03 12:51:01 -05:00
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};
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MODULE_DEVICE_TABLE(i2c, pca9541_id);
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#ifdef CONFIG_OF
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static const struct of_device_id pca9541_of_match[] = {
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{ .compatible = "nxp,pca9541" },
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{ .compatible = "nxp,pca9641" },
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{}
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};
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MODULE_DEVICE_TABLE(of, pca9541_of_match);
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#endif
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/*
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* Write to chip register. Don't use i2c_transfer()/i2c_smbus_xfer()
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* as they will try to lock the adapter a second time.
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*/
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static int pca9541_reg_write(struct i2c_client *client, u8 command, u8 val)
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{
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struct i2c_adapter *adap = client->adapter;
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int ret;
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if (adap->algo->master_xfer) {
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struct i2c_msg msg;
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char buf[2];
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msg.addr = client->addr;
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msg.flags = 0;
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msg.len = 2;
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buf[0] = command;
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buf[1] = val;
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msg.buf = buf;
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ret = __i2c_transfer(adap, &msg, 1);
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} else {
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union i2c_smbus_data data;
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data.byte = val;
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ret = adap->algo->smbus_xfer(adap, client->addr,
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client->flags,
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I2C_SMBUS_WRITE,
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command,
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I2C_SMBUS_BYTE_DATA, &data);
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}
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return ret;
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2021-06-03 12:51:01 -05:00
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}
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/*
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* Read from chip register. Don't use i2c_transfer()/i2c_smbus_xfer()
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* as they will try to lock adapter a second time.
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*/
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static int pca9541_reg_read(struct i2c_client *client, u8 command)
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{
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struct i2c_adapter *adap = client->adapter;
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int ret;
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u8 val;
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if (adap->algo->master_xfer) {
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struct i2c_msg msg[2] = {
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{
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.addr = client->addr,
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.flags = 0,
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.len = 1,
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.buf = &command
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},
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{
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.addr = client->addr,
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.flags = I2C_M_RD,
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.len = 1,
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.buf = &val
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}
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};
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ret = __i2c_transfer(adap, msg, 2);
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if (ret == 2)
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ret = val;
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else if (ret >= 0)
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ret = -EIO;
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} else {
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union i2c_smbus_data data;
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ret = adap->algo->smbus_xfer(adap, client->addr,
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client->flags,
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I2C_SMBUS_READ,
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command,
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I2C_SMBUS_BYTE_DATA, &data);
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if (!ret)
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ret = data.byte;
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}
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return ret;
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2021-06-03 12:51:01 -05:00
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}
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/*
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* Arbitration management functions
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*/
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/* Release bus. Also reset NTESTON and BUSINIT if it was set. */
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static void pca9541_release_bus(struct i2c_client *client)
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{
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int reg;
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2021-11-18 01:49:06 -06:00
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reg = pca9541_reg_read(client, PCA9541_CONTROL);
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if (reg >= 0 && !busoff(reg) && mybus(reg))
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pca9541_reg_write(client, PCA9541_CONTROL,
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(reg & PCA9541_CTL_NBUSON) >> 1);
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}
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/*
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* Arbitration is defined as a two-step process. A bus master can only activate
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* the slave bus if it owns it; otherwise it has to request ownership first.
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* This multi-step process ensures that access contention is resolved
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* gracefully.
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*
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* Bus Ownership Other master Action
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* state requested access
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* ----------------------------------------------------
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* off - yes wait for arbitration timeout or
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* for other master to drop request
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* off no no take ownership
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* off yes no turn on bus
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* on yes - done
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* on no - wait for arbitration timeout or
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* for other master to release bus
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*
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* The main contention point occurs if the slave bus is off and both masters
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* request ownership at the same time. In this case, one master will turn on
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* the slave bus, believing that it owns it. The other master will request
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* bus ownership. Result is that the bus is turned on, and master which did
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* _not_ own the slave bus before ends up owning it.
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*/
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/* Control commands per PCA9541 datasheet */
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static const u8 pca9541_control[16] = {
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4, 0, 1, 5, 4, 4, 5, 5, 0, 0, 1, 1, 0, 4, 5, 1
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};
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/*
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* Channel arbitration
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*
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* Return values:
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* <0: error
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* 0 : bus not acquired
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* 1 : bus acquired
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*/
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static int pca9541_arbitrate(struct i2c_client *client)
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{
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struct i2c_mux_core *muxc = i2c_get_clientdata(client);
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struct pca9541 *data = i2c_mux_priv(muxc);
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int reg;
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reg = pca9541_reg_read(client, PCA9541_CONTROL);
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if (reg < 0)
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return reg;
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if (busoff(reg)) {
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int istat;
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/*
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* Bus is off. Request ownership or turn it on unless
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* other master requested ownership.
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*/
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istat = pca9541_reg_read(client, PCA9541_ISTAT);
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if (!(istat & PCA9541_ISTAT_NMYTEST)
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|| time_is_before_eq_jiffies(data->arb_timeout)) {
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/*
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* Other master did not request ownership,
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* or arbitration timeout expired. Take the bus.
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*/
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pca9541_reg_write(client,
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PCA9541_CONTROL,
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pca9541_control[reg & 0x0f]
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| PCA9541_CTL_NTESTON);
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data->select_timeout = SELECT_DELAY_SHORT;
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} else {
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/*
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* Other master requested ownership.
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* Set extra long timeout to give it time to acquire it.
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*/
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data->select_timeout = SELECT_DELAY_LONG * 2;
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}
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} else if (mybus(reg)) {
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/*
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* Bus is on, and we own it. We are done with acquisition.
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* Reset NTESTON and BUSINIT, then return success.
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*/
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if (reg & (PCA9541_CTL_NTESTON | PCA9541_CTL_BUSINIT))
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|
|
pca9541_reg_write(client,
|
|
|
|
PCA9541_CONTROL,
|
|
|
|
reg & ~(PCA9541_CTL_NTESTON
|
|
|
|
| PCA9541_CTL_BUSINIT));
|
|
|
|
return 1;
|
|
|
|
} else {
|
|
|
|
/*
|
|
|
|
* Other master owns the bus.
|
|
|
|
* If arbitration timeout has expired, force ownership.
|
|
|
|
* Otherwise request it.
|
|
|
|
*/
|
|
|
|
data->select_timeout = SELECT_DELAY_LONG;
|
|
|
|
if (time_is_before_eq_jiffies(data->arb_timeout)) {
|
|
|
|
/* Time is up, take the bus and reset it. */
|
|
|
|
pca9541_reg_write(client,
|
|
|
|
PCA9541_CONTROL,
|
|
|
|
pca9541_control[reg & 0x0f]
|
|
|
|
| PCA9541_CTL_BUSINIT
|
|
|
|
| PCA9541_CTL_NTESTON);
|
|
|
|
} else {
|
|
|
|
/* Request bus ownership if needed */
|
|
|
|
if (!(reg & PCA9541_CTL_NTESTON))
|
|
|
|
pca9541_reg_write(client,
|
|
|
|
PCA9541_CONTROL,
|
|
|
|
reg | PCA9541_CTL_NTESTON);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
return 0;
|
2021-06-03 12:51:01 -05:00
|
|
|
}
|
|
|
|
|
|
|
|
static int pca9541_select_chan(struct i2c_mux_core *muxc, u32 chan)
|
|
|
|
{
|
2021-11-18 01:49:06 -06:00
|
|
|
struct pca9541 *data = i2c_mux_priv(muxc);
|
|
|
|
struct i2c_client *client = data->client;
|
|
|
|
int ret;
|
|
|
|
unsigned long timeout = jiffies + ARB2_TIMEOUT;
|
|
|
|
/* give up after this time */
|
|
|
|
|
|
|
|
data->arb_timeout = jiffies + ARB_TIMEOUT;
|
|
|
|
/* force bus ownership after this time */
|
|
|
|
|
|
|
|
do {
|
|
|
|
ret = pca9541_arbitrate(client);
|
|
|
|
if (ret)
|
|
|
|
return ret < 0 ? ret : 0;
|
|
|
|
|
|
|
|
if (data->select_timeout == SELECT_DELAY_SHORT)
|
|
|
|
udelay(data->select_timeout);
|
|
|
|
else
|
|
|
|
msleep(data->select_timeout / 1000);
|
|
|
|
} while (time_is_after_eq_jiffies(timeout));
|
|
|
|
|
|
|
|
return -ETIMEDOUT;
|
2021-06-03 12:51:01 -05:00
|
|
|
}
|
|
|
|
|
|
|
|
static int pca9541_release_chan(struct i2c_mux_core *muxc, u32 chan)
|
|
|
|
{
|
|
|
|
struct pca9541 *data = i2c_mux_priv(muxc);
|
2021-11-18 01:49:06 -06:00
|
|
|
struct i2c_client *client = data->client;
|
|
|
|
pca9541_release_bus(client);
|
|
|
|
return 0;
|
2021-06-03 12:51:01 -05:00
|
|
|
}
|
|
|
|
|
|
|
|
/*
|
2021-11-18 01:49:06 -06:00
|
|
|
* Arbitration management functions
|
|
|
|
*/
|
2021-06-03 12:51:01 -05:00
|
|
|
static void pca9641_release_bus(struct i2c_client *client)
|
|
|
|
{
|
2021-11-18 01:49:06 -06:00
|
|
|
pca9541_reg_write(client, PCA9641_CONTROL, 0x80); //master 0x80
|
2021-06-03 12:51:01 -05:00
|
|
|
}
|
|
|
|
|
|
|
|
/*
|
2021-11-18 01:49:06 -06:00
|
|
|
* Channel arbitration
|
|
|
|
*
|
|
|
|
* Return values:
|
|
|
|
* <0: error
|
|
|
|
* 0 : bus not acquired
|
|
|
|
* 1 : bus acquired
|
|
|
|
*/
|
2021-06-03 12:51:01 -05:00
|
|
|
static int pca9641_arbitrate(struct i2c_client *client)
|
|
|
|
{
|
2021-11-18 01:49:06 -06:00
|
|
|
struct i2c_mux_core *muxc = i2c_get_clientdata(client);
|
|
|
|
struct pca9541 *data = i2c_mux_priv(muxc);
|
|
|
|
int reg_ctl, reg_sts;
|
|
|
|
|
|
|
|
reg_ctl = pca9541_reg_read(client, PCA9641_CONTROL);
|
|
|
|
if (reg_ctl < 0)
|
|
|
|
return reg_ctl;
|
|
|
|
reg_sts = pca9541_reg_read(client, PCA9641_STATUS);
|
|
|
|
|
|
|
|
if (BUSOFF(reg_ctl, reg_sts)) {
|
|
|
|
/*
|
|
|
|
* Bus is off. Request ownership or turn it on unless
|
|
|
|
* other master requested ownership.
|
|
|
|
*/
|
|
|
|
reg_ctl |= PCA9641_CTL_LOCK_REQ;
|
|
|
|
pca9541_reg_write(client, PCA9641_CONTROL, reg_ctl);
|
|
|
|
reg_ctl = pca9541_reg_read(client, PCA9641_CONTROL);
|
|
|
|
|
|
|
|
if (lock_grant(reg_ctl)) {
|
|
|
|
/*
|
|
|
|
* Other master did not request ownership,
|
|
|
|
* or arbitration timeout expired. Take the bus.
|
|
|
|
*/
|
|
|
|
reg_ctl |= PCA9641_CTL_BUS_CONNECT
|
|
|
|
| PCA9641_CTL_LOCK_REQ;
|
|
|
|
pca9541_reg_write(client, PCA9641_CONTROL, reg_ctl);
|
|
|
|
data->select_timeout = SELECT_DELAY_SHORT;
|
|
|
|
|
|
|
|
return 1;
|
|
|
|
} else {
|
|
|
|
/*
|
|
|
|
* Other master requested ownership.
|
|
|
|
* Set extra long timeout to give it time to acquire it.
|
|
|
|
*/
|
|
|
|
data->select_timeout = SELECT_DELAY_LONG * 2;
|
|
|
|
}
|
|
|
|
} else if (lock_grant(reg_ctl)) {
|
|
|
|
/*
|
|
|
|
* Bus is on, and we own it. We are done with acquisition.
|
|
|
|
*/
|
|
|
|
reg_ctl |= PCA9641_CTL_BUS_CONNECT | PCA9641_CTL_LOCK_REQ;
|
|
|
|
pca9541_reg_write(client, PCA9641_CONTROL, reg_ctl);
|
|
|
|
|
|
|
|
return 1;
|
|
|
|
} else if (other_lock(reg_sts)) {
|
|
|
|
/*
|
|
|
|
* Other master owns the bus.
|
|
|
|
* If arbitration timeout has expired, force ownership.
|
|
|
|
* Otherwise request it.
|
|
|
|
*/
|
|
|
|
data->select_timeout = SELECT_DELAY_LONG;
|
|
|
|
reg_ctl |= PCA9641_CTL_LOCK_REQ;
|
|
|
|
pca9541_reg_write(client, PCA9641_CONTROL, reg_ctl);
|
|
|
|
}
|
|
|
|
return 0;
|
2021-06-03 12:51:01 -05:00
|
|
|
}
|
|
|
|
|
|
|
|
|
|
|
|
int pca9641_select_chan(struct i2c_mux_core *muxc, u32 chan)
|
|
|
|
{
|
2021-11-18 01:49:06 -06:00
|
|
|
struct pca9541 *data = i2c_mux_priv(muxc);
|
2021-06-03 12:51:01 -05:00
|
|
|
struct i2c_client *client = data->client;
|
|
|
|
int ret;
|
|
|
|
int result;
|
|
|
|
unsigned long timeout = jiffies + ARB2_TIMEOUT;
|
|
|
|
/* give up after this time */
|
|
|
|
data->arb_timeout = jiffies + ARB_TIMEOUT;
|
|
|
|
/* force bus ownership after this time */
|
2021-11-18 01:49:06 -06:00
|
|
|
for (result = 0 ; result < PCA9641_RETRY_TIME ; result ++) {
|
|
|
|
do {
|
|
|
|
ret = pca9641_arbitrate(client);
|
|
|
|
if (ret == 1) {
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
if (data->select_timeout == SELECT_DELAY_SHORT)
|
|
|
|
udelay(data->select_timeout);
|
|
|
|
else
|
|
|
|
msleep(data->select_timeout / 1000);
|
|
|
|
} while (time_is_after_eq_jiffies(timeout));
|
|
|
|
timeout = jiffies + ARB2_TIMEOUT;
|
|
|
|
}
|
2021-06-03 12:51:01 -05:00
|
|
|
return -ETIMEDOUT;
|
|
|
|
}
|
|
|
|
EXPORT_SYMBOL(pca9641_select_chan);
|
|
|
|
|
|
|
|
static int pca9641_release_chan(struct i2c_mux_core *muxc, u32 chan)
|
|
|
|
{
|
2021-11-18 01:49:06 -06:00
|
|
|
struct pca9541 *data = i2c_mux_priv(muxc);
|
|
|
|
struct i2c_client *client = data->client;
|
|
|
|
if (pca_flag.flag) {
|
|
|
|
pca9641_release_bus(client);
|
|
|
|
}
|
|
|
|
return 0;
|
2021-06-03 12:51:01 -05:00
|
|
|
}
|
|
|
|
|
|
|
|
static int pca9641_detect_id(struct i2c_client *client)
|
|
|
|
{
|
2021-11-18 01:49:06 -06:00
|
|
|
int reg;
|
2021-06-03 12:51:01 -05:00
|
|
|
|
2021-11-18 01:49:06 -06:00
|
|
|
reg = pca9541_reg_read(client, PCA9641_ID);
|
|
|
|
if (reg == PCA9641_ID_MAGIC)
|
|
|
|
return 1;
|
|
|
|
else
|
|
|
|
return 0;
|
2021-06-03 12:51:01 -05:00
|
|
|
}
|
|
|
|
|
|
|
|
|
|
|
|
static int pca9641_recordflag(struct i2c_adapter *adap) {
|
|
|
|
if (pca_flag.flag != -1) {
|
|
|
|
pr_err(" %s %d has init already!!!", __func__, __LINE__);
|
|
|
|
return -1 ;
|
|
|
|
}
|
|
|
|
pca_flag.nr = adap->nr;
|
2021-11-18 01:49:06 -06:00
|
|
|
PCA_DEBUG(" adap->nr:%d\n", adap->nr);
|
|
|
|
snprintf(pca_flag.name, sizeof(pca_flag.name),adap->name);
|
2021-06-03 12:51:01 -05:00
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
static void i2c_lock_adapter(struct i2c_adapter *adapter){
|
2021-11-18 01:49:06 -06:00
|
|
|
struct i2c_adapter *parent = i2c_parent_is_i2c_adapter(adapter);
|
|
|
|
if (parent)
|
|
|
|
i2c_lock_adapter(parent);
|
|
|
|
else
|
|
|
|
rt_mutex_lock(&adapter->bus_lock);
|
2021-06-03 12:51:01 -05:00
|
|
|
}
|
|
|
|
|
|
|
|
void i2c_unlock_adapter(struct i2c_adapter *adapter)
|
|
|
|
{
|
2021-11-18 01:49:06 -06:00
|
|
|
struct i2c_adapter *parent = i2c_parent_is_i2c_adapter(adapter);
|
2021-06-03 12:51:01 -05:00
|
|
|
|
2021-11-18 01:49:06 -06:00
|
|
|
if (parent)
|
|
|
|
i2c_unlock_adapter(parent);
|
|
|
|
else
|
|
|
|
rt_mutex_unlock(&adapter->bus_lock);
|
2021-06-03 12:51:01 -05:00
|
|
|
}
|
|
|
|
/*
|
|
|
|
* I2C init/probing/exit functions
|
|
|
|
*/
|
|
|
|
static int pca9541_probe(struct i2c_client *client,
|
2021-11-18 01:49:06 -06:00
|
|
|
const struct i2c_device_id *id)
|
2021-06-03 12:51:01 -05:00
|
|
|
{
|
2021-11-18 01:49:06 -06:00
|
|
|
struct i2c_adapter *adap = client->adapter;
|
2023-01-12 20:01:47 -06:00
|
|
|
#if LINUX_VERSION_CODE < KERNEL_VERSION(5, 10, 0)
|
2021-11-18 01:49:06 -06:00
|
|
|
struct pca954x_platform_data *pdata = dev_get_platdata(&client->dev);
|
2023-01-12 20:01:47 -06:00
|
|
|
#endif
|
2021-06-03 12:51:01 -05:00
|
|
|
struct i2c_mux_core *muxc;
|
2021-11-18 01:49:06 -06:00
|
|
|
struct pca9541 *data;
|
|
|
|
int force;
|
|
|
|
int ret = -ENODEV;
|
2021-06-03 12:51:01 -05:00
|
|
|
int detect_id;
|
|
|
|
|
2021-11-18 01:49:06 -06:00
|
|
|
if (!i2c_check_functionality(adap, I2C_FUNC_SMBUS_BYTE_DATA))
|
|
|
|
return -ENODEV;
|
2021-06-03 12:51:01 -05:00
|
|
|
|
|
|
|
detect_id = pca9641_detect_id(client);
|
|
|
|
|
2021-11-18 01:49:06 -06:00
|
|
|
/*
|
|
|
|
* I2C accesses are unprotected here.
|
|
|
|
* We have to lock the adapter before releasing the bus.
|
|
|
|
*/
|
2021-06-03 12:51:01 -05:00
|
|
|
if (detect_id == 0) {
|
|
|
|
i2c_lock_adapter(adap);
|
|
|
|
pca9541_release_bus(client);
|
|
|
|
i2c_unlock_adapter(adap);
|
|
|
|
} else {
|
|
|
|
i2c_lock_adapter(adap);
|
|
|
|
pca9641_release_bus(client);
|
|
|
|
i2c_unlock_adapter(adap);
|
|
|
|
}
|
|
|
|
|
2021-11-18 01:49:06 -06:00
|
|
|
/* Create mux adapter */
|
2023-01-12 20:01:47 -06:00
|
|
|
#if LINUX_VERSION_CODE < KERNEL_VERSION(5, 10, 0)
|
2021-11-18 01:49:06 -06:00
|
|
|
force = 0;
|
|
|
|
if (pdata)
|
|
|
|
force = pdata->modes[0].adap_id;
|
2023-01-12 20:01:47 -06:00
|
|
|
#endif
|
2021-06-03 12:51:01 -05:00
|
|
|
if (detect_id == 0) {
|
|
|
|
muxc = i2c_mux_alloc(adap, &client->dev, 1, sizeof(*data),
|
2021-11-18 01:49:06 -06:00
|
|
|
I2C_MUX_ARBITRATOR,
|
|
|
|
pca9541_select_chan, pca9541_release_chan);
|
|
|
|
if (!muxc)
|
|
|
|
return -ENOMEM;
|
2021-06-03 12:51:01 -05:00
|
|
|
|
2021-11-18 01:49:06 -06:00
|
|
|
data = i2c_mux_priv(muxc);
|
|
|
|
data->client = client;
|
2021-06-03 12:51:01 -05:00
|
|
|
|
2021-11-18 01:49:06 -06:00
|
|
|
i2c_set_clientdata(client, muxc);
|
2023-01-12 20:01:47 -06:00
|
|
|
#if LINUX_VERSION_CODE >= KERNEL_VERSION(5, 10, 0)
|
|
|
|
ret = i2c_mux_add_adapter(muxc, 0, 0, 0);
|
|
|
|
#else
|
2021-11-18 01:49:06 -06:00
|
|
|
ret = i2c_mux_add_adapter(muxc, force, 0, 0);
|
2023-01-12 20:01:47 -06:00
|
|
|
#endif
|
2021-11-18 01:49:06 -06:00
|
|
|
if (ret)
|
|
|
|
return ret;
|
2021-06-03 12:51:01 -05:00
|
|
|
} else {
|
2021-11-18 01:49:06 -06:00
|
|
|
muxc = i2c_mux_alloc(adap, &client->dev, 1, sizeof(*data),
|
|
|
|
I2C_MUX_ARBITRATOR,
|
|
|
|
pca9641_select_chan, pca9641_release_chan);
|
|
|
|
if (!muxc)
|
|
|
|
return -ENOMEM;
|
2021-06-03 12:51:01 -05:00
|
|
|
|
2021-11-18 01:49:06 -06:00
|
|
|
data = i2c_mux_priv(muxc);
|
|
|
|
data->client = client;
|
2021-06-03 12:51:01 -05:00
|
|
|
|
2021-11-18 01:49:06 -06:00
|
|
|
i2c_set_clientdata(client, muxc);
|
2021-06-03 12:51:01 -05:00
|
|
|
|
2021-11-18 01:49:06 -06:00
|
|
|
ret = i2c_mux_add_adapter(muxc, force, 0, 0);
|
|
|
|
if (ret)
|
|
|
|
return ret;
|
2021-06-03 12:51:01 -05:00
|
|
|
}
|
2021-11-18 01:49:06 -06:00
|
|
|
pca9641_recordflag(muxc->adapter[0]);
|
2021-06-03 12:51:01 -05:00
|
|
|
|
2021-11-18 01:49:06 -06:00
|
|
|
dev_info(&client->dev, "registered master selector for I2C %s\n",
|
|
|
|
client->name);
|
2021-06-03 12:51:01 -05:00
|
|
|
|
2021-11-18 01:49:06 -06:00
|
|
|
return 0;
|
2021-06-03 12:51:01 -05:00
|
|
|
|
|
|
|
}
|
|
|
|
|
|
|
|
static int pca9541_remove(struct i2c_client *client)
|
|
|
|
{
|
2021-11-18 01:49:06 -06:00
|
|
|
struct i2c_mux_core *muxc = i2c_get_clientdata(client);
|
2021-06-03 12:51:01 -05:00
|
|
|
|
2021-11-18 01:49:06 -06:00
|
|
|
i2c_mux_del_adapters(muxc);
|
|
|
|
return 0;
|
2021-06-03 12:51:01 -05:00
|
|
|
}
|
|
|
|
|
|
|
|
static struct i2c_driver pca9641_driver = {
|
2021-11-18 01:49:06 -06:00
|
|
|
.driver = {
|
|
|
|
.name = "pca9641",
|
|
|
|
.of_match_table = of_match_ptr(pca9541_of_match),
|
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},
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.probe = pca9541_probe,
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.remove = pca9541_remove,
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.id_table = pca9541_id,
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2021-06-03 12:51:01 -05:00
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};
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module_i2c_driver(pca9641_driver);
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MODULE_AUTHOR("support support@ragile.com");
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MODULE_DESCRIPTION("PCA9541 I2C master selector driver");
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MODULE_LICENSE("GPL v2");
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