662 lines
19 KiB
C
662 lines
19 KiB
C
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/*
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* Juniper Networks TMC GPIO driver
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*
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* Copyright (C) 2020 Juniper Networks
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* Author: Ashish Bhensdadia <bashish@juniper.net>
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*
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* This driver implement the GPIO set/get functionality
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; version 2 of the License.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#include <linux/device.h>
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#include <linux/kernel.h>
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#include <linux/init.h>
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#include <linux/gpio.h>
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#include <linux/errno.h>
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#include <linux/io.h>
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#include <linux/module.h>
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#include <linux/sched.h>
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#include <linux/platform_device.h>
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#include <linux/mfd/core.h>
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#include "jnx-tmc.h"
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#define TMC_GPIO_MAX_BITS_PER_REG 16
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#define TMC_GPIO_SFP_MAX_BITS_PER_REG 2
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#define TMC_GPIO_PTPCFG_MAX_BITS_PER_REG 8
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#define TMC_GPIO_FIND_GROUP(gpio) \
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((gpio) / TMC_GPIO_MAX_BITS_PER_REG)
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#define TMC_GPIO_FIND_GPIO(gpio) \
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((gpio) % TMC_GPIO_MAX_BITS_PER_REG)
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#define TMC_GPIO_SFP_FIND_GROUP(gpio) \
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((gpio) / TMC_GPIO_SFP_MAX_BITS_PER_REG)
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#define TMC_GPIO_SFP_FIND_GPIO(gpio) \
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((gpio) % TMC_GPIO_SFP_MAX_BITS_PER_REG)
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#define TMC_GPIO_PTPCFG_FIND_GPIO(gpio) \
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((gpio) % TMC_GPIO_PTPCFG_MAX_BITS_PER_REG)
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#define TMC_GPIO_MAX_NGPIO_PER_GROUP 320
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#define TMC_PFE_QSFP_RESET_OFFSET 0x4
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#define TMC_PFE_QSFP_PRESENT_OFFSET 0x8
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#define TMC_PFE_QSFP_PHY_RESET_OFFSET 0x10
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#define TMC_PFE_QSFP_LPMOD_OFFSET 0x78
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#define TMC_PFE_QSFP_LED_CTRL_OFFSET 0x20
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#define TMC_PFE_LANES_GREEN_LED_VALUE 0x3
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#define TMC_PFE_LANE0_GREEN_LED_BIT_POSITION 0
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#define TMC_PFE_LANE1_GREEN_LED_BIT_POSITION 2
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#define TMC_PFE_LANE2_GREEN_LED_BIT_POSITION 4
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#define TMC_PFE_LANE3_GREEN_LED_BIT_POSITION 6
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#define TMC_PFE_LANES_BEACON_LED_VALUE 0x2
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#define TMC_PFE_LANE0_BEACON_LED_BIT_POSITION 0
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#define TMC_PFE_LANE1_BEACON_LED_BIT_POSITION 2
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#define TMC_PFE_LANE2_BEACON_LED_BIT_POSITION 4
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#define TMC_PFE_LANE3_BEACON_LED_BIT_POSITION 6
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#define TMC_PFE_LANES_FAULT_LED_VALUE 0x1
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#define TMC_PFE_LANE0_FAULT_LED_BIT_POSITION 0
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#define TMC_PFE_LANE1_FAULT_LED_BIT_POSITION 2
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#define TMC_PFE_LANE2_FAULT_LED_BIT_POSITION 4
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#define TMC_PFE_LANE3_FAULT_LED_BIT_POSITION 6
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#define TMC_PFE_SFPSB0_TX_DISABLE_OFFSET 0x0
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#define TMC_PFE_SFPSB0_LED_CTRL_OFFSET 0xC
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#define TMC_PFE_SFPSB0_LED_ACTIVITY_OFFSET 0x14
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#define TMC_PFE_SFPSB0_PRESENT_OFFSET 0x18
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#define TMC_PFE_SFPSB0_LOSS_OFFSET 0x1C
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#define TMC_PFE_SFPSB0_TX_FAULT_OFFSET 0x20
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#define TMC_PFE_SFPSB1_TX_DISABLE_OFFSET 0x0
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#define TMC_PFE_SFPSB1_LED_CTRL_OFFSET 0x8
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#define TMC_PFE_SFPSB1_LED_ACTIVITY_OFFSET 0x10
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#define TMC_PFE_SFPSB1_PRESENT_OFFSET 0x14
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#define TMC_PFE_SFPSB1_LOSS_OFFSET 0x18
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#define TMC_PFE_SFPSB1_TX_FAULT_OFFSET 0x1C
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/*
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* Index 4 to 15 is used for QSFP starting with
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* QSFP_LED_LANE0_GREEN. To keep multibit set/get common
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* starting SFP_LED_LANE0_GREEN with 16 which will avoid
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* conflict with QSFP enums.
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*/
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#define SFP_LED_OP_START_INDEX 16
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/*
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* Used for off-setting SFP led op index
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*/
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#define SFP_LED_OP_OFFSET 0xB
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/*
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* SFP slave blocks
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*/
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#define SFP_SLAVE0_BLOCK 0x1
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#define SFP_SLAVE1_BLOCK 0x2
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/*
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* each group represent the 16 gpios.
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* QSFP_RST - QSFP_LPMODE
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* each bit represent the one gpio
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* exemple: bits[0:15] - bit0 - gpio0
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* QSFP_LED_LANE0_GREEN - QSFP_LED_LANE3_FAULT
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* here, number represent the one gpio
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* exemple: bits[0:1]
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* 00 - gpio off, 01 - gpio on [ gpio0]
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* 00 - gpio off, 10 - gpio on [ gpio1]
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* 00 - gpio off, 11 - gpio on [ gpio2]
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*
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*/
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enum {
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QSFP_RST,
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QSFP_PRESENT,
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QSFP_PHY_RST,
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QSFP_LPMOD,
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QSFP_LED_LANE0_GREEN,
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QSFP_LED_LANE1_GREEN,
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QSFP_LED_LANE2_GREEN,
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QSFP_LED_LANE3_GREEN,
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QSFP_LED_LANE0_BEACON,
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QSFP_LED_LANE1_BEACON,
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QSFP_LED_LANE2_BEACON,
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QSFP_LED_LANE3_BEACON,
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QSFP_LED_LANE0_FAULT,
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QSFP_LED_LANE1_FAULT,
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QSFP_LED_LANE2_FAULT,
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QSFP_LED_LANE3_FAULT,
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TMC_PFE_GPIO_GROUP_MAX
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};
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enum sfp_op {
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SFP_TX_DISABLE,
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SFP_LED_ACTIVITY,
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SFP_PRESENT,
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SFP_SFP_LOS,
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SFP_TX_FAULT,
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SFP_LED_LANE0_GREEN = SFP_LED_OP_START_INDEX,
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SFP_LED_LANE1_GREEN,
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SFP_LED_LANE2_GREEN,
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SFP_LED_LANE3_GREEN,
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SFP_LED_LANE0_BEACON,
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SFP_LED_LANE1_BEACON,
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SFP_LED_LANE2_BEACON,
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SFP_LED_LANE3_BEACON,
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SFP_LED_LANE0_FAULT,
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SFP_LED_LANE1_FAULT,
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SFP_LED_LANE2_FAULT,
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SFP_LED_LANE3_FAULT,
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TMC_PFE_SFP_GPIO_GROUP_MAX
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};
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static const u32 group_offset[TMC_PFE_GPIO_GROUP_MAX] = {
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TMC_PFE_QSFP_RESET_OFFSET,
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TMC_PFE_QSFP_PRESENT_OFFSET,
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TMC_PFE_QSFP_PHY_RESET_OFFSET,
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TMC_PFE_QSFP_LPMOD_OFFSET,
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TMC_PFE_QSFP_LED_CTRL_OFFSET, /* LANE0 GREEN */
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TMC_PFE_QSFP_LED_CTRL_OFFSET, /* LANE1 GREEN */
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TMC_PFE_QSFP_LED_CTRL_OFFSET, /* LANE2 GREEN */
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TMC_PFE_QSFP_LED_CTRL_OFFSET, /* LANE3 GREEN */
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TMC_PFE_QSFP_LED_CTRL_OFFSET, /* LANE0 BEACON */
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TMC_PFE_QSFP_LED_CTRL_OFFSET, /* LANE1 BEACON */
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TMC_PFE_QSFP_LED_CTRL_OFFSET, /* LANE2 BEACON */
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TMC_PFE_QSFP_LED_CTRL_OFFSET, /* LANE3 BEACON */
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TMC_PFE_QSFP_LED_CTRL_OFFSET, /* LANE0 FAULT */
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TMC_PFE_QSFP_LED_CTRL_OFFSET, /* LANE1 FAULT */
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TMC_PFE_QSFP_LED_CTRL_OFFSET, /* LANE2 FAULT */
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TMC_PFE_QSFP_LED_CTRL_OFFSET, /* LANE3 FAULT */
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};
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static const u32 sfp_slaveb0_group_offset[TMC_PFE_SFP_GPIO_GROUP_MAX] = {
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TMC_PFE_SFPSB0_TX_DISABLE_OFFSET,
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TMC_PFE_SFPSB0_LED_ACTIVITY_OFFSET,
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TMC_PFE_SFPSB0_PRESENT_OFFSET,
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TMC_PFE_SFPSB0_LOSS_OFFSET,
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TMC_PFE_SFPSB0_TX_FAULT_OFFSET,
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TMC_PFE_SFPSB0_LED_CTRL_OFFSET, /* LANE0 GREEN */
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TMC_PFE_SFPSB0_LED_CTRL_OFFSET, /* LANE1 GREEN */
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TMC_PFE_SFPSB0_LED_CTRL_OFFSET, /* LANE2 GREEN */
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TMC_PFE_SFPSB0_LED_CTRL_OFFSET, /* LANE3 GREEN */
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TMC_PFE_SFPSB0_LED_CTRL_OFFSET, /* LANE0 BEACON */
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TMC_PFE_SFPSB0_LED_CTRL_OFFSET, /* LANE1 BEACON */
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TMC_PFE_SFPSB0_LED_CTRL_OFFSET, /* LANE2 BEACON */
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TMC_PFE_SFPSB0_LED_CTRL_OFFSET, /* LANE3 BEACON */
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TMC_PFE_SFPSB0_LED_CTRL_OFFSET, /* LANE0 FAULT */
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TMC_PFE_SFPSB0_LED_CTRL_OFFSET, /* LANE1 FAULT */
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TMC_PFE_SFPSB0_LED_CTRL_OFFSET, /* LANE2 FAULT */
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TMC_PFE_SFPSB0_LED_CTRL_OFFSET, /* LANE3 FAULT */
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};
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static const u32 sfp_slaveb1_group_offset[TMC_PFE_SFP_GPIO_GROUP_MAX] = {
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TMC_PFE_SFPSB1_TX_DISABLE_OFFSET,
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TMC_PFE_SFPSB1_LED_ACTIVITY_OFFSET,
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TMC_PFE_SFPSB1_PRESENT_OFFSET,
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TMC_PFE_SFPSB1_LOSS_OFFSET,
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TMC_PFE_SFPSB1_TX_FAULT_OFFSET,
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TMC_PFE_SFPSB1_LED_CTRL_OFFSET, /* LANE0 GREEN */
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TMC_PFE_SFPSB1_LED_CTRL_OFFSET, /* LANE1 GREEN */
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TMC_PFE_SFPSB1_LED_CTRL_OFFSET, /* LANE2 GREEN */
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TMC_PFE_SFPSB1_LED_CTRL_OFFSET, /* LANE3 GREEN */
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TMC_PFE_SFPSB1_LED_CTRL_OFFSET, /* LANE0 BEACON */
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TMC_PFE_SFPSB1_LED_CTRL_OFFSET, /* LANE1 BEACON */
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TMC_PFE_SFPSB1_LED_CTRL_OFFSET, /* LANE2 BEACON */
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TMC_PFE_SFPSB1_LED_CTRL_OFFSET, /* LANE3 BEACON */
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TMC_PFE_SFPSB1_LED_CTRL_OFFSET, /* LANE0 FAULT */
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TMC_PFE_SFPSB1_LED_CTRL_OFFSET, /* LANE1 FAULT */
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TMC_PFE_SFPSB1_LED_CTRL_OFFSET, /* LANE2 FAULT */
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TMC_PFE_SFPSB1_LED_CTRL_OFFSET, /* LANE3 FAULT */
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};
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struct tmc_gpio_info {
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int (*get)(struct gpio_chip *, unsigned int);
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void (*set)(struct gpio_chip *, unsigned int, int);
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int (*dirin)(struct gpio_chip *, unsigned int);
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int (*dirout)(struct gpio_chip *, unsigned int, int);
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};
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struct tmc_gpio_chip {
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const struct tmc_gpio_info *info;
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void __iomem *base;
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struct device *dev;
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struct gpio_chip gpio;
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int ngpio;
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spinlock_t gpio_lock; /* gpio lock */
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int sfp_slave_block;
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};
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/* slave gpio max */
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static int gpio_max = 320;
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module_param(gpio_max, int, S_IRUSR | S_IWUSR | S_IRGRP | S_IROTH);
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MODULE_PARM_DESC(gpio_max, "Maximum number of gpio for SLAVE TMC GPIO");
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/*
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* generic bit operation functions
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*/
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static u32 tmc_gpio_reset_bits(u32 state, u32 val, u32 shift)
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{
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state &= ~(val << shift);
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return state;
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};
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static u32 tmc_gpio_set_bits(u32 state, u32 val, u32 shift)
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{
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state |= (val << shift);
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return state;
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};
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static u32 tmc_gpio_find_bits_val(u32 state, u32 shift, u32 mask)
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{
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return ((state >> shift)) & mask;
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};
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#define to_tmc_chip(chip) \
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container_of((chip), struct tmc_gpio_chip, gpio)
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/*
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* tmc_gpio_multiple_bitsop - Generic TMC GPIO multiple bits operation
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*/
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static void tmc_gpio_multiple_bitsop(struct tmc_gpio_chip *chip,
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unsigned int gpiono, u32 group, u32 offset, bool set)
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{
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u32 gpio_state, led_val, bit_shift;
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unsigned long flags;
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void __iomem *iobase;
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iobase = chip->base + offset;
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dev_dbg(chip->dev, "TMC GPIO multiple bitop group=%u, "
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"gpiono=%u, offet:=%u, set=%u\n", group, gpiono, offset, set);
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spin_lock_irqsave(&chip->gpio_lock, flags);
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switch (group) {
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case QSFP_LED_LANE0_GREEN:
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case SFP_LED_LANE0_GREEN:
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gpio_state = ioread32(iobase+(0x004*gpiono));
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led_val = TMC_PFE_LANES_GREEN_LED_VALUE;
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bit_shift = TMC_PFE_LANE0_GREEN_LED_BIT_POSITION;
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break;
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case QSFP_LED_LANE1_GREEN:
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case SFP_LED_LANE1_GREEN:
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gpio_state = ioread32(iobase+(0x004*gpiono));
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led_val = TMC_PFE_LANES_GREEN_LED_VALUE;
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bit_shift = TMC_PFE_LANE1_GREEN_LED_BIT_POSITION;
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break;
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case QSFP_LED_LANE2_GREEN:
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case SFP_LED_LANE2_GREEN:
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gpio_state = ioread32(iobase+(0x004*gpiono));
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led_val = TMC_PFE_LANES_GREEN_LED_VALUE;
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bit_shift = TMC_PFE_LANE2_GREEN_LED_BIT_POSITION;
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break;
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case QSFP_LED_LANE3_GREEN:
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case SFP_LED_LANE3_GREEN:
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gpio_state = ioread32(iobase+(0x004*gpiono));
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led_val = TMC_PFE_LANES_GREEN_LED_VALUE;
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bit_shift = TMC_PFE_LANE3_GREEN_LED_BIT_POSITION;
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break;
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case QSFP_LED_LANE0_BEACON:
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|
|
case SFP_LED_LANE0_BEACON:
|
||
|
|
gpio_state = ioread32(iobase+(0x004*gpiono));
|
||
|
|
led_val = TMC_PFE_LANES_BEACON_LED_VALUE;
|
||
|
|
bit_shift = TMC_PFE_LANE0_BEACON_LED_BIT_POSITION;
|
||
|
|
break;
|
||
|
|
case QSFP_LED_LANE1_BEACON:
|
||
|
|
case SFP_LED_LANE1_BEACON:
|
||
|
|
gpio_state = ioread32(iobase+(0x004*gpiono));
|
||
|
|
led_val = TMC_PFE_LANES_BEACON_LED_VALUE;
|
||
|
|
bit_shift = TMC_PFE_LANE1_BEACON_LED_BIT_POSITION;
|
||
|
|
break;
|
||
|
|
case QSFP_LED_LANE2_BEACON:
|
||
|
|
case SFP_LED_LANE2_BEACON:
|
||
|
|
gpio_state = ioread32(iobase+(0x004*gpiono));
|
||
|
|
led_val = TMC_PFE_LANES_BEACON_LED_VALUE;
|
||
|
|
bit_shift = TMC_PFE_LANE2_BEACON_LED_BIT_POSITION;
|
||
|
|
break;
|
||
|
|
case QSFP_LED_LANE3_BEACON:
|
||
|
|
case SFP_LED_LANE3_BEACON:
|
||
|
|
gpio_state = ioread32(iobase+(0x004*gpiono));
|
||
|
|
led_val = TMC_PFE_LANES_BEACON_LED_VALUE;
|
||
|
|
bit_shift = TMC_PFE_LANE3_BEACON_LED_BIT_POSITION;
|
||
|
|
break;
|
||
|
|
case QSFP_LED_LANE0_FAULT:
|
||
|
|
case SFP_LED_LANE0_FAULT:
|
||
|
|
gpio_state = ioread32(iobase+(0x004*gpiono));
|
||
|
|
led_val = TMC_PFE_LANES_FAULT_LED_VALUE;
|
||
|
|
bit_shift = TMC_PFE_LANE0_FAULT_LED_BIT_POSITION;
|
||
|
|
break;
|
||
|
|
case QSFP_LED_LANE1_FAULT:
|
||
|
|
case SFP_LED_LANE1_FAULT:
|
||
|
|
gpio_state = ioread32(iobase+(0x004*gpiono));
|
||
|
|
led_val = TMC_PFE_LANES_FAULT_LED_VALUE;
|
||
|
|
bit_shift = TMC_PFE_LANE1_FAULT_LED_BIT_POSITION;
|
||
|
|
break;
|
||
|
|
case QSFP_LED_LANE2_FAULT:
|
||
|
|
case SFP_LED_LANE2_FAULT:
|
||
|
|
gpio_state = ioread32(iobase+(0x004*gpiono));
|
||
|
|
led_val = TMC_PFE_LANES_FAULT_LED_VALUE;
|
||
|
|
bit_shift = TMC_PFE_LANE2_FAULT_LED_BIT_POSITION;
|
||
|
|
break;
|
||
|
|
case QSFP_LED_LANE3_FAULT:
|
||
|
|
case SFP_LED_LANE3_FAULT:
|
||
|
|
gpio_state = ioread32(iobase+(0x004*gpiono));
|
||
|
|
led_val = TMC_PFE_LANES_FAULT_LED_VALUE;
|
||
|
|
bit_shift = TMC_PFE_LANE3_FAULT_LED_BIT_POSITION;
|
||
|
|
break;
|
||
|
|
|
||
|
|
default:
|
||
|
|
spin_unlock_irqrestore(&chip->gpio_lock, flags);
|
||
|
|
return;
|
||
|
|
}
|
||
|
|
|
||
|
|
if (set) {
|
||
|
|
gpio_state = tmc_gpio_reset_bits(gpio_state, 0x3, bit_shift);
|
||
|
|
gpio_state = tmc_gpio_set_bits(gpio_state, led_val, bit_shift);
|
||
|
|
} else {
|
||
|
|
gpio_state = tmc_gpio_reset_bits(gpio_state, 0x3, bit_shift);
|
||
|
|
}
|
||
|
|
|
||
|
|
iowrite32(gpio_state, (iobase+(0x004*gpiono)));
|
||
|
|
|
||
|
|
spin_unlock_irqrestore(&chip->gpio_lock, flags);
|
||
|
|
|
||
|
|
return;
|
||
|
|
};
|
||
|
|
|
||
|
|
/*
|
||
|
|
* tmc_gpio_one_bitop - Generic TMC GPIO single bit operation
|
||
|
|
*/
|
||
|
|
static void tmc_gpio_one_bitop(struct tmc_gpio_chip *chip,
|
||
|
|
unsigned int bit, u32 offset, bool set)
|
||
|
|
{
|
||
|
|
u32 gpio_state;
|
||
|
|
unsigned long flags;
|
||
|
|
void __iomem *iobase;
|
||
|
|
|
||
|
|
iobase = chip->base + offset;
|
||
|
|
|
||
|
|
dev_dbg(chip->dev, "TMC GPIO one bitop bit=%u, offset=%x, "
|
||
|
|
"set=%u\n", bit, offset, set);
|
||
|
|
|
||
|
|
spin_lock_irqsave(&chip->gpio_lock, flags);
|
||
|
|
|
||
|
|
gpio_state = ioread32(iobase);
|
||
|
|
if (set)
|
||
|
|
gpio_state |= BIT(bit);
|
||
|
|
else
|
||
|
|
gpio_state &= ~BIT(bit);
|
||
|
|
|
||
|
|
iowrite32(gpio_state, iobase);
|
||
|
|
|
||
|
|
spin_unlock_irqrestore(&chip->gpio_lock, flags);
|
||
|
|
|
||
|
|
return;
|
||
|
|
}
|
||
|
|
|
||
|
|
/*
|
||
|
|
* tmc_gpio_get_multiple_bitsop - Generic TMC get GPIO multiple bits operation
|
||
|
|
*/
|
||
|
|
static int tmc_gpio_get_multiple_bitsop(struct tmc_gpio_chip *chip,
|
||
|
|
unsigned int gpiono, u32 group, u32 offset)
|
||
|
|
{
|
||
|
|
u32 gpio_state;
|
||
|
|
void __iomem *iobase;
|
||
|
|
|
||
|
|
iobase = chip->base + offset;
|
||
|
|
|
||
|
|
dev_dbg(chip->dev, "TMC GPIO get multiple bitsop group=%u, "
|
||
|
|
"gpiono=%u, offset=%u\n", group, gpiono, offset);
|
||
|
|
|
||
|
|
switch (group) {
|
||
|
|
case QSFP_LED_LANE0_GREEN:
|
||
|
|
case SFP_LED_LANE0_GREEN:
|
||
|
|
gpio_state = ioread32(iobase+(0x004*gpiono));
|
||
|
|
return (TMC_PFE_LANES_GREEN_LED_VALUE ==
|
||
|
|
tmc_gpio_find_bits_val(gpio_state,
|
||
|
|
TMC_PFE_LANE0_GREEN_LED_BIT_POSITION, 0x3));
|
||
|
|
case QSFP_LED_LANE1_GREEN:
|
||
|
|
case SFP_LED_LANE1_GREEN:
|
||
|
|
gpio_state = ioread32(iobase+(0x004*gpiono));
|
||
|
|
return (TMC_PFE_LANES_GREEN_LED_VALUE ==
|
||
|
|
tmc_gpio_find_bits_val(gpio_state,
|
||
|
|
TMC_PFE_LANE1_GREEN_LED_BIT_POSITION, 0x3));
|
||
|
|
case QSFP_LED_LANE2_GREEN:
|
||
|
|
case SFP_LED_LANE2_GREEN:
|
||
|
|
gpio_state = ioread32(iobase+(0x004*gpiono));
|
||
|
|
return (TMC_PFE_LANES_GREEN_LED_VALUE ==
|
||
|
|
tmc_gpio_find_bits_val(gpio_state,
|
||
|
|
TMC_PFE_LANE2_GREEN_LED_BIT_POSITION, 0x3));
|
||
|
|
case QSFP_LED_LANE3_GREEN:
|
||
|
|
case SFP_LED_LANE3_GREEN:
|
||
|
|
gpio_state = ioread32(iobase+(0x004*gpiono));
|
||
|
|
return (TMC_PFE_LANES_GREEN_LED_VALUE ==
|
||
|
|
tmc_gpio_find_bits_val(gpio_state,
|
||
|
|
TMC_PFE_LANE3_GREEN_LED_BIT_POSITION, 0x3));
|
||
|
|
case QSFP_LED_LANE0_BEACON:
|
||
|
|
case SFP_LED_LANE0_BEACON:
|
||
|
|
gpio_state = ioread32(iobase+(0x004*gpiono));
|
||
|
|
return (TMC_PFE_LANES_BEACON_LED_VALUE ==
|
||
|
|
tmc_gpio_find_bits_val(gpio_state,
|
||
|
|
TMC_PFE_LANE0_BEACON_LED_BIT_POSITION, 0x3));
|
||
|
|
case QSFP_LED_LANE1_BEACON:
|
||
|
|
case SFP_LED_LANE1_BEACON:
|
||
|
|
gpio_state = ioread32(iobase+(0x004*gpiono));
|
||
|
|
return (TMC_PFE_LANES_BEACON_LED_VALUE ==
|
||
|
|
tmc_gpio_find_bits_val(gpio_state,
|
||
|
|
TMC_PFE_LANE1_BEACON_LED_BIT_POSITION, 0x3));
|
||
|
|
case QSFP_LED_LANE2_BEACON:
|
||
|
|
case SFP_LED_LANE2_BEACON:
|
||
|
|
gpio_state = ioread32(iobase+(0x004*gpiono));
|
||
|
|
return (TMC_PFE_LANES_BEACON_LED_VALUE ==
|
||
|
|
tmc_gpio_find_bits_val(gpio_state,
|
||
|
|
TMC_PFE_LANE2_BEACON_LED_BIT_POSITION, 0x3));
|
||
|
|
case QSFP_LED_LANE3_BEACON:
|
||
|
|
case SFP_LED_LANE3_BEACON:
|
||
|
|
gpio_state = ioread32(iobase+(0x004*gpiono));
|
||
|
|
return (TMC_PFE_LANES_BEACON_LED_VALUE ==
|
||
|
|
tmc_gpio_find_bits_val(gpio_state,
|
||
|
|
TMC_PFE_LANE3_BEACON_LED_BIT_POSITION, 0x3));
|
||
|
|
case QSFP_LED_LANE0_FAULT:
|
||
|
|
case SFP_LED_LANE0_FAULT:
|
||
|
|
gpio_state = ioread32(iobase+(0x004*gpiono));
|
||
|
|
return (TMC_PFE_LANES_FAULT_LED_VALUE ==
|
||
|
|
tmc_gpio_find_bits_val(gpio_state,
|
||
|
|
TMC_PFE_LANE0_FAULT_LED_BIT_POSITION, 0x3));
|
||
|
|
case QSFP_LED_LANE1_FAULT:
|
||
|
|
case SFP_LED_LANE1_FAULT:
|
||
|
|
gpio_state = ioread32(iobase+(0x004*gpiono));
|
||
|
|
return (TMC_PFE_LANES_FAULT_LED_VALUE ==
|
||
|
|
tmc_gpio_find_bits_val(gpio_state,
|
||
|
|
TMC_PFE_LANE1_FAULT_LED_BIT_POSITION, 0x3));
|
||
|
|
case QSFP_LED_LANE2_FAULT:
|
||
|
|
case SFP_LED_LANE2_FAULT:
|
||
|
|
gpio_state = ioread32(iobase+(0x004*gpiono));
|
||
|
|
return (TMC_PFE_LANES_FAULT_LED_VALUE ==
|
||
|
|
tmc_gpio_find_bits_val(gpio_state,
|
||
|
|
TMC_PFE_LANE2_FAULT_LED_BIT_POSITION, 0x3));
|
||
|
|
case QSFP_LED_LANE3_FAULT:
|
||
|
|
case SFP_LED_LANE3_FAULT:
|
||
|
|
gpio_state = ioread32(iobase+(0x004*gpiono));
|
||
|
|
return (TMC_PFE_LANES_FAULT_LED_VALUE ==
|
||
|
|
tmc_gpio_find_bits_val(gpio_state,
|
||
|
|
TMC_PFE_LANE3_FAULT_LED_BIT_POSITION, 0x3));
|
||
|
|
default:
|
||
|
|
return 0;
|
||
|
|
}
|
||
|
|
};
|
||
|
|
|
||
|
|
/*
|
||
|
|
* tmc_gpio_get - Read the specified signal of the GPIO device.
|
||
|
|
*/
|
||
|
|
static int tmc_gpio_get(struct gpio_chip *gc, unsigned int gpio)
|
||
|
|
{
|
||
|
|
struct tmc_gpio_chip *chip = to_tmc_chip(gc);
|
||
|
|
unsigned int group = TMC_GPIO_FIND_GROUP(gpio);
|
||
|
|
unsigned int bit = TMC_GPIO_FIND_GPIO(gpio);
|
||
|
|
|
||
|
|
if (group >= TMC_PFE_GPIO_GROUP_MAX)
|
||
|
|
return 0;
|
||
|
|
|
||
|
|
switch (group) {
|
||
|
|
case QSFP_RST:
|
||
|
|
case QSFP_PRESENT:
|
||
|
|
case QSFP_PHY_RST:
|
||
|
|
case QSFP_LPMOD:
|
||
|
|
dev_dbg(chip->dev, "TMC GPIO get one bitop group=%u, gpio=%u, "
|
||
|
|
"bit=%u\n", group, gpio, bit);
|
||
|
|
return !!(ioread32(chip->base + group_offset[group])
|
||
|
|
& BIT(bit));
|
||
|
|
default:
|
||
|
|
return tmc_gpio_get_multiple_bitsop(chip, bit, group, group_offset[group]);
|
||
|
|
}
|
||
|
|
}
|
||
|
|
|
||
|
|
/*
|
||
|
|
* tmc_gpio_set - Write the specified signal of the GPIO device.
|
||
|
|
*/
|
||
|
|
static void tmc_gpio_set(struct gpio_chip *gc, unsigned int gpio, int val)
|
||
|
|
{
|
||
|
|
struct tmc_gpio_chip *chip = to_tmc_chip(gc);
|
||
|
|
unsigned int group = TMC_GPIO_FIND_GROUP(gpio);
|
||
|
|
unsigned int bit = TMC_GPIO_FIND_GPIO(gpio);
|
||
|
|
|
||
|
|
if (group >= TMC_PFE_GPIO_GROUP_MAX)
|
||
|
|
return;
|
||
|
|
|
||
|
|
switch (group) {
|
||
|
|
case QSFP_RST:
|
||
|
|
case QSFP_PRESENT:
|
||
|
|
case QSFP_PHY_RST:
|
||
|
|
case QSFP_LPMOD:
|
||
|
|
dev_dbg(chip->dev, "TMC GPIO one bitop group=%d\n", group);
|
||
|
|
tmc_gpio_one_bitop(chip, bit, group_offset[group], val);
|
||
|
|
break;
|
||
|
|
default:
|
||
|
|
tmc_gpio_multiple_bitsop(chip, bit, group, group_offset[group], val);
|
||
|
|
break;
|
||
|
|
}
|
||
|
|
}
|
||
|
|
|
||
|
|
static struct tmc_gpio_info tmc_gpios[] = {
|
||
|
|
{
|
||
|
|
.get = tmc_gpio_get,
|
||
|
|
.set = tmc_gpio_set,
|
||
|
|
},
|
||
|
|
};
|
||
|
|
|
||
|
|
static void tmc_gpio_setup(struct tmc_gpio_chip *sgc, int id)
|
||
|
|
{
|
||
|
|
struct gpio_chip *chip = &sgc->gpio;
|
||
|
|
const struct tmc_gpio_info *info = sgc->info;
|
||
|
|
|
||
|
|
chip->get = info->get;
|
||
|
|
chip->set = info->set;
|
||
|
|
chip->direction_input = info->dirin;
|
||
|
|
chip->direction_output = info->dirout;
|
||
|
|
chip->dbg_show = NULL;
|
||
|
|
chip->can_sleep = 0;
|
||
|
|
|
||
|
|
if (id == 0) {
|
||
|
|
chip->base = 0;
|
||
|
|
} else if (id == 1) {
|
||
|
|
chip->base = (gpio_max * id);
|
||
|
|
} else {
|
||
|
|
chip->base = -1;
|
||
|
|
}
|
||
|
|
|
||
|
|
chip->ngpio = sgc->ngpio;
|
||
|
|
chip->label = dev_name(sgc->dev);
|
||
|
|
chip->parent = sgc->dev;
|
||
|
|
chip->owner = THIS_MODULE;
|
||
|
|
}
|
||
|
|
|
||
|
|
static int tmc_gpio_of_init(struct device *dev,
|
||
|
|
struct tmc_gpio_chip *chip)
|
||
|
|
{
|
||
|
|
chip->info = &tmc_gpios[0];
|
||
|
|
chip->ngpio = gpio_max;
|
||
|
|
|
||
|
|
return 0;
|
||
|
|
}
|
||
|
|
|
||
|
|
static int tmc_gpio_probe(struct platform_device *pdev)
|
||
|
|
{
|
||
|
|
struct device *dev = &pdev->dev;
|
||
|
|
struct tmc_gpio_chip *chip;
|
||
|
|
struct resource *res;
|
||
|
|
int ret;
|
||
|
|
|
||
|
|
const struct mfd_cell *cell = mfd_get_cell(pdev);
|
||
|
|
|
||
|
|
dev_dbg(dev, "TMC GPIO probe\n");
|
||
|
|
|
||
|
|
chip = devm_kzalloc(dev, sizeof(*chip), GFP_KERNEL);
|
||
|
|
if (!chip)
|
||
|
|
return -ENOMEM;
|
||
|
|
|
||
|
|
res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
|
||
|
|
if (!res)
|
||
|
|
return -ENODEV;
|
||
|
|
|
||
|
|
dev_info(dev, "TMC GPIO resource 0x%llx, %llu\n",
|
||
|
|
res->start, resource_size(res));
|
||
|
|
|
||
|
|
chip->base = devm_ioremap_nocache(dev, res->start, resource_size(res));
|
||
|
|
if (!chip->base)
|
||
|
|
return -ENOMEM;
|
||
|
|
|
||
|
|
ret = tmc_gpio_of_init(dev, chip);
|
||
|
|
if (ret)
|
||
|
|
return ret;
|
||
|
|
|
||
|
|
chip->dev = dev;
|
||
|
|
spin_lock_init(&chip->gpio_lock);
|
||
|
|
|
||
|
|
tmc_gpio_setup(chip, cell->id);
|
||
|
|
|
||
|
|
ret = gpiochip_add(&chip->gpio);
|
||
|
|
if (ret) {
|
||
|
|
dev_err(dev,
|
||
|
|
"Failed to register TMC gpiochip : %d\n", ret);
|
||
|
|
return ret;
|
||
|
|
}
|
||
|
|
|
||
|
|
platform_set_drvdata(pdev, chip);
|
||
|
|
dev_info(dev, "TMC GPIO registered at 0x%lx, gpiobase: %d\n",
|
||
|
|
(long unsigned)chip->base, chip->gpio.base);
|
||
|
|
|
||
|
|
return 0;
|
||
|
|
}
|
||
|
|
|
||
|
|
static int tmc_gpio_remove(struct platform_device *pdev)
|
||
|
|
{
|
||
|
|
struct tmc_gpio_chip *chip = platform_get_drvdata(pdev);
|
||
|
|
|
||
|
|
gpiochip_remove(&chip->gpio);
|
||
|
|
|
||
|
|
return 0;
|
||
|
|
}
|
||
|
|
|
||
|
|
static struct platform_driver tmc_gpio_driver = {
|
||
|
|
.driver = {
|
||
|
|
.name = "gpioslave-tmc",
|
||
|
|
.owner = THIS_MODULE,
|
||
|
|
},
|
||
|
|
.probe = tmc_gpio_probe,
|
||
|
|
.remove = tmc_gpio_remove,
|
||
|
|
};
|
||
|
|
|
||
|
|
module_platform_driver(tmc_gpio_driver);
|
||
|
|
|
||
|
|
MODULE_DESCRIPTION("Juniper Networks TMC FPGA GPIO driver");
|
||
|
|
MODULE_AUTHOR("Ashish Bhensdadia <bashish@juniper.net>");
|
||
|
|
MODULE_LICENSE("GPL");
|