sonic-buildimage/device/barefoot/x86_64-accton_wedge100bf_32x-r0/thermal_thresholds.json

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[BFN] Refactoring and adding some functions of Thermal class (set and get thresholds and etc.) (#10205) * Revised set_high_thershold and set_low_thershold methobs in the thermal.py Signed-off-by: Vadym Yashchenko <vadymx.yashchenko@intel.com> * Revised set_low_thershold and set_high_thershold Signed-off-by: Vadym Yashchenko <vadymx.yashchenko@intel.com> * Added separated files with thermal thresholds, changed platform.json and thermal.py Signed-off-by: Vadym Yashchenko <vadymx.yashchenko@intel.com> * Revised on code revieww Signed-off-by: Vadym Yashchenko <vadymx.yashchenko@intel.com> * Reverted thermal.py Signed-off-by: Vadym Yashchenko <vadymx.yashchenko@intel.com> * Revised ther python.py Signed-off-by: Vadym Yashchenko <vadymx.yashchenko@intel.com> * Revised due to code review Signed-off-by: Vadym Yashchenko <vadymx.yashchenko@intel.com> * Added fucntion for fix the problem of tofino sensor high critical threshold Signed-off-by: Vadym Yashchenko <vadymx.yashchenko@intel.com> * Revised due to code review Signed-off-by: Vadym Yashchenko <vadymx.yashchenko@intel.com> * Revised due to code review Signed-off-by: Vadym Yashchenko <vadymx.yashchenko@intel.com> * Revised due to code review Signed-off-by: Vadym Yashchenko <vadymx.yashchenko@intel.com> * Revised only for cab18-4 Signed-off-by: Vadym Yashchenko <vadymx.yashchenko@intel.com> * Revised default thresholds Signed-off-by: Vadym Yashchenko <vadymx.yashchenko@intel.com> * Revised ther def thresholds Signed-off-by: Vadym Yashchenko <vadymx.yashchenko@intel.com> * Revised on code review Signed-off-by: Vadym Yashchenko <vadymx.yashchenko@intel.com> * Revised platform.json and thermal_thresholds.json Signed-off-by: Vadym Yashchenko <vadymx.yashchenko@intel.com> * Code review in PR to azure (trigger CI) Signed-off-by: Vadym Yashchenko <vadymx.yashchenko@intel.com> * Added handle of exception Signed-off-by: Vadym Yashchenko <vadymx.yashchenko@intel.com> * Revised exception handler * Added psu-1 thermal names to platfrom.json Signed-off-by: Vadym Yashchenko <vadymx.yashchenko@intel.com> * Changed platform.json and thermal_thresholds.json in x86_64-acton_as9516_32d-r0 Signed-off-by: Vadym Yashchenko <vadymx.yashchenko@intel.com> * Removed indentation from json file Signed-off-by: Vadym Yashchenko <vadymx.yashchenko@intel.com>
2022-04-05 11:13:08 -05:00
{
"thermals": [
{
"com_e_driver-i2c-4-33:cpu-temp" : [99.0, 89.0, 11.0, 1.0]
},
{
"com_e_driver-i2c-4-33:memory-temp" : [85.0, 75.0, 11.0, 1.0]
},
{
"psu_driver-i2c-7-59:psu2-temp1" : [50.0, 40.0, 11.0, 1.0]
},
{
"psu_driver-i2c-7-59:psu2-temp2" : [90.0, 80.0, 11.0, 1.0]
},
{
"psu_driver-i2c-7-5a:psu1-temp1" : [50.0, 40.0, 11.0, 1.0]
},
{
"psu_driver-i2c-7-5a:psu1-temp2" : [90.0, 80.0, 11.0, 1.0]
},
{
"tmp75-i2c-3-48:chip-temp" : [90.0, 80.0, 11.0, 1.0]
},
{
"tmp75-i2c-3-49:exhaust2-temp" : [80.0, 70.0, 11.0, 1.0]
},
{
"tmp75-i2c-3-4a:exhaust-temp" : [60.0, 50.0, 11.0, 1.0]
},
{
"tmp75-i2c-3-4b:intake-temp" : [60.0, 50.0, 11.0, 1.0]
},
{
"tmp75-i2c-3-4c:tofino-temp" : [99.0, 89.0, 11.0, 1.0]
},
{
"tmp75-i2c-3-4d:intake2-temp" : [60.0, 50.0, 11.0, 1.0]
},
{
"tmp75-i2c-8-48:outlet-right-temp" : [60.0, 50.0, 11.0, 1.0]
},
{
"tmp75-i2c-8-49:outlet-left-temp" : [60.0, 50.0, 11.0, 1.0]
},
{
"pch_haswell-virtual-0:temp1" : [60.0, 50.0, 11.0, 1.0]
},
{
"coretemp-isa-0000:package-id-0" : [80.0, 70.0, 11.0, 1.0]
},
{
"coretemp-isa-0000:core-0" : [99.0, 89.0, 11.0, 1.0]
},
{
"coretemp-isa-0000:core-1" : [99.0, 89.0, 11.0, 1.0]
},
{
"coretemp-isa-0000:core-2" : [99.0, 89.0, 11.0, 1.0]
},
{
"coretemp-isa-0000:core-3" : [99.0, 89.0, 11.0, 1.0]
}
]
}