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sonic-buildimage/platform/centec-arm64/rules.mk

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[centec]: Add centec arm64 architecture support for E530 (#4641) summary of E530 platfrom: - CPU: CTC5236, arm64 - LAN switch chip set: CENTEC CTC7132 (TsingMa). TsingMa is a purpose built device to address the challenge in the recent network evolution such as Cloud computing. CTC7132 provides 440Gbps I/O bandwidth and 400Gcore bandwidth, the CTC7132 family combines a feature-rich switch core and an embedded ARM A53 CPU Core running at 800MHz/1.2GHz. CTC7132 supports a variety of port configurations, such as QSGMII and USXGMII-M, providing full-rate port capability from 100M to 100G. - device E530-48T4X: 48 * 10/100/1000 Base-T Ports, 4 * 10GE SFP+ Ports. - device E530-24X2C: 24 * 10 GE SFP+ Ports, 2 * 100GE QSFP28 Ports. add new files in three directories: device/centec/arm64-centec_e530_24x2c-r0 device/centec/arm64-centec_e530_48t4x_p-r0 platform/centec-arm64 Co-authored-by: taocy <taocy2@centecnetworks.com> Co-authored-by: Gu Xianghong <gxh2001757@163.com> Co-authored-by: shil <shil@centecnetworks.com>
2020-08-06 05:16:11 -05:00
include $(PLATFORM_PATH)/sai.mk
include $(PLATFORM_PATH)/docker-syncd-centec.mk
include $(PLATFORM_PATH)/docker-syncd-centec-rpc.mk
[centec] Support saiserver docker for centec-x86 and centec-arm64 platform (#9162) Fix docker-syncd-centec-rpc.gz compile fail Support Centec saiserver docker Co-authored-by: Xianghong Gu <xgu@centecnetworks.com>
2021-11-15 23:58:47 -06:00
include $(PLATFORM_PATH)/docker-saiserver-centec.mk
[centec]: Add centec arm64 architecture support for E530 (#4641) summary of E530 platfrom: - CPU: CTC5236, arm64 - LAN switch chip set: CENTEC CTC7132 (TsingMa). TsingMa is a purpose built device to address the challenge in the recent network evolution such as Cloud computing. CTC7132 provides 440Gbps I/O bandwidth and 400Gcore bandwidth, the CTC7132 family combines a feature-rich switch core and an embedded ARM A53 CPU Core running at 800MHz/1.2GHz. CTC7132 supports a variety of port configurations, such as QSGMII and USXGMII-M, providing full-rate port capability from 100M to 100G. - device E530-48T4X: 48 * 10/100/1000 Base-T Ports, 4 * 10GE SFP+ Ports. - device E530-24X2C: 24 * 10 GE SFP+ Ports, 2 * 100GE QSFP28 Ports. add new files in three directories: device/centec/arm64-centec_e530_24x2c-r0 device/centec/arm64-centec_e530_48t4x_p-r0 platform/centec-arm64 Co-authored-by: taocy <taocy2@centecnetworks.com> Co-authored-by: Gu Xianghong <gxh2001757@163.com> Co-authored-by: shil <shil@centecnetworks.com>
2020-08-06 05:16:11 -05:00
include $(PLATFORM_PATH)/one-image.mk
include $(PLATFORM_PATH)/libsaithrift-dev.mk
include $(PLATFORM_PATH)/tsingma-bsp.mk
include $(PLATFORM_PATH)/platform-modules-centec-e530.mk
SONIC_ALL += $(SONIC_ONE_IMAGE) \
$(DOCKER_FPM)
# $(DOCKER_SYNCD_CENTEC_RPC)
[CENTEC ARM64]LIBSAIREDIS isn't depend on CENTEC_SAI, Remove this dependency (#5834) * LIBSAIREDIS isn't depend on CENTEC_SAI remove this dependence * Build depends are optimized in PR #4880 and #5039. Merge these optimization to Centec ARM64 platform.
2020-11-16 06:15:25 -06:00
# Inject centec sai into syncd
[centec]: fix docker syncd rpc compile(#11097) Change makefile to reference to new SAI dev for docker-syncd-centec-rpc compile Co-authored-by: yoush <yoush@centec.com>
2022-06-16 17:27:57 -05:00
$(SYNCD)_DEPENDS += $(CENTEC_SAI) $(CENTEC_SAI_DEV)
$(SYNCD)_UNINSTALLS += $(CENTEC_SAI_DEV) $(CENTEC_SAI)
[CENTEC ARM64]LIBSAIREDIS isn't depend on CENTEC_SAI, Remove this dependency (#5834) * LIBSAIREDIS isn't depend on CENTEC_SAI remove this dependence * Build depends are optimized in PR #4880 and #5039. Merge these optimization to Centec ARM64 platform.
2020-11-16 06:15:25 -06:00
ifeq ($(ENABLE_SYNCD_RPC),y)
$(SYNCD)_DEPENDS += $(LIBSAITHRIFT_DEV)
endif
[centec]: Add centec arm64 architecture support for E530 (#4641) summary of E530 platfrom: - CPU: CTC5236, arm64 - LAN switch chip set: CENTEC CTC7132 (TsingMa). TsingMa is a purpose built device to address the challenge in the recent network evolution such as Cloud computing. CTC7132 provides 440Gbps I/O bandwidth and 400Gcore bandwidth, the CTC7132 family combines a feature-rich switch core and an embedded ARM A53 CPU Core running at 800MHz/1.2GHz. CTC7132 supports a variety of port configurations, such as QSGMII and USXGMII-M, providing full-rate port capability from 100M to 100G. - device E530-48T4X: 48 * 10/100/1000 Base-T Ports, 4 * 10GE SFP+ Ports. - device E530-24X2C: 24 * 10 GE SFP+ Ports, 2 * 100GE QSFP28 Ports. add new files in three directories: device/centec/arm64-centec_e530_24x2c-r0 device/centec/arm64-centec_e530_48t4x_p-r0 platform/centec-arm64 Co-authored-by: taocy <taocy2@centecnetworks.com> Co-authored-by: Gu Xianghong <gxh2001757@163.com> Co-authored-by: shil <shil@centecnetworks.com>
2020-08-06 05:16:11 -05:00
# Runtime dependency on centec sai is set only for syncd
$(SYNCD)_RDEPENDS += $(CENTEC_SAI)
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