268 lines
7.9 KiB
Diff
268 lines
7.9 KiB
Diff
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From e46f9bfa89b8b9caced49a74db695e86e963b35d Mon Sep 17 00:00:00 2001
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From: Vadim Pasternak <vadimp@nvidia.com>
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Date: Mon, 3 Jan 2022 10:20:49 +0000
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Subject: [PATCH] mlxsw: reg: Add Management DownStream Device Query Register
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The MDDQ register allows to query the DownStream device properties.
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Signed-off-by: Jiri Pirko <jiri@nvidia.com>
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---
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drivers/net/ethernet/mellanox/mlxsw/reg.h | 234 ++++++++++++++++++++++
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1 file changed, 234 insertions(+)
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diff --git a/drivers/net/ethernet/mellanox/mlxsw/reg.h b/drivers/net/ethernet/mellanox/mlxsw/reg.h
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index 42169957c..d5301bd6f 100644
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--- a/drivers/net/ethernet/mellanox/mlxsw/reg.h
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+++ b/drivers/net/ethernet/mellanox/mlxsw/reg.h
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@@ -10297,6 +10297,239 @@ mlxsw_reg_mgpir_unpack(char *payload, u8 *num_of_devices,
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*num_of_slots = mlxsw_reg_mgpir_num_of_slots_get(payload);
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}
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+/* MDDQ - Management DownStream Device Query Register
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+ * --------------------------------------------------
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+ * This register allows to query the DownStream device properties. The desired
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+ * information is chosen upon the query_type field and is delivered by 32B
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+ * of data blocks.
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+ */
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+#define MLXSW_REG_MDDQ_ID 0x9161
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+#define MLXSW_REG_MDDQ_LEN 0x30
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+
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+MLXSW_REG_DEFINE(mddq, MLXSW_REG_MDDQ_ID, MLXSW_REG_MDDQ_LEN);
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+
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+/* reg_mddq_sie
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+ * Slot info event enable.
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+ * When set to '1', each change in the slot_info.provisioned / sr_valid /
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+ * active / ready will generate an event.
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+ * Access: RW
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+ */
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+MLXSW_ITEM32(reg, mddq, sie, 0x00, 31, 1);
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+
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+enum mlxsw_reg_mddq_query_type {
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+ MLXSW_REG_MDDQ_QUERY_TYPE_SLOT_INFO = 1,
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+ MLXSW_REG_MDDQ_QUERY_TYPE_DEVICE_INFO, /* If there are no devices
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+ * on the slot, data_valid
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+ * will be '0'.
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+ */
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+ MLXSW_REG_MDDQ_QUERY_TYPE_SLOT_NAME,
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+};
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+
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+/* reg_mddq_query_type
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+ * Access: Index
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+ */
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+MLXSW_ITEM32(reg, mddq, query_type, 0x00, 16, 8);
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+
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+/* reg_mddq_slot_index
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+ * Slot index. 0 is reserved.
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+ * Access: Index
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+ */
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+MLXSW_ITEM32(reg, mddq, slot_index, 0x00, 0, 4);
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+
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+/* reg_mddq_response_msg_seq
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+ * Response message sequential number. For a specific request, the response
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+ * message sequential number is the following one. In addition, the last
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+ * message should be 0.
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+ * Access: RO
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+ */
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+MLXSW_ITEM32(reg, mddq, response_msg_seq, 0x04, 16, 8);
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+
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+/* reg_mddq_request_msg_seq
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+ * Request message sequential number.
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+ * The first message number should be 0.
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+ * Access: Index
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+ */
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+MLXSW_ITEM32(reg, mddq, request_msg_seq, 0x04, 0, 8);
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+
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+/* reg_mddq_data_valid
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+ * If set, the data in the data field is valid and contain the information
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+ * for the queried index.
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+ * Access: RO
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+ */
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+MLXSW_ITEM32(reg, mddq, data_valid, 0x08, 31, 1);
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+
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+/* reg_mddq_provisioned
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+ * If set, the INI file is applied and the card is provisioned.
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+ * Access: RO
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+ */
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+MLXSW_ITEM32(reg, mddq, provisioned, 0x10, 31, 1);
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+
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+/* reg_mddq_sr_valid
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+ * If set, Shift Register is valid (after being provisioned).
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+ * Access: RO
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+ */
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+MLXSW_ITEM32(reg, mddq, sr_valid, 0x10, 30, 1);
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+
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+enum mlxsw_reg_mddq_ready {
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+ MLXSW_REG_MDDQ_READY_NOT_READY,
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+ MLXSW_REG_MDDQ_READY_READY,
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+ MLXSW_REG_MDDQ_READY_ERROR,
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+};
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+
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+/* reg_mddq_lc_ready
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+ * If set, the LC is powered on, matching the INI version and a new FW
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+ * version can be burnt (if necessary).
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+ * Access: RO
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+ */
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+MLXSW_ITEM32(reg, mddq, lc_ready, 0x10, 28, 2);
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+
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+/* reg_mddq_active
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+ * If set, the FW has completed the MDDC.device_enable command.
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+ * Access: RO
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+ */
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+MLXSW_ITEM32(reg, mddq, active, 0x10, 27, 1);
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+
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+/* reg_mddq_hw_revision
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+ * Major user-configured version number of the current INI file.
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+ * Valid only when active or ready are '1'.
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+ * Access: RO
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+ */
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+MLXSW_ITEM32(reg, mddq, hw_revision, 0x14, 16, 16);
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+
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+/* reg_mddq_ini_file_version
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+ * User-configured version number of the current INI file.
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+ * Valid only when active or lc_ready are '1'.
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+ * Access: RO
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+ */
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+MLXSW_ITEM32(reg, mddq, ini_file_version, 0x14, 0, 16);
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+
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+enum mlxsw_reg_mddq_card_type {
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+ MLXSW_REG_MDDQ_CARD_TYPE_BUFFALO_4X400G,
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+ MLXSW_REG_MDDQ_CARD_TYPE_BUFFALO_8X200G,
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+ MLXSW_REG_MDDQ_CARD_TYPE_BUFFALO_16X100G,
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+};
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+
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+/* reg_mddq_card_type
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+ * Access: RO
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+ */
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+MLXSW_ITEM32(reg, mddq, card_type, 0x18, 0, 8);
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+
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+static inline void
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+__mlxsw_reg_mddq_pack(char *payload, u8 slot_index,
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+ enum mlxsw_reg_mddq_query_type query_type)
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+{
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+ MLXSW_REG_ZERO(mddq, payload);
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+ mlxsw_reg_mddq_slot_index_set(payload, slot_index);
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+ mlxsw_reg_mddq_query_type_set(payload, query_type);
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+}
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+
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+static inline void
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+mlxsw_reg_mddq_slot_info_pack(char *payload, u8 slot_index, bool sie)
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+{
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+ __mlxsw_reg_mddq_pack(payload, slot_index,
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+ MLXSW_REG_MDDQ_QUERY_TYPE_SLOT_INFO);
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+ mlxsw_reg_mddq_sie_set(payload, sie);
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+}
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+
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+static inline void
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+mlxsw_reg_mddq_slot_info_unpack(const char *payload, u8 *p_slot_index,
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+ bool *p_provisioned, bool *p_sr_valid,
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+ enum mlxsw_reg_mddq_ready *p_lc_ready,
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+ bool *p_active, u16 *p_hw_revision,
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+ u16 *p_ini_file_version,
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+ enum mlxsw_reg_mddq_card_type *p_card_type)
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+{
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+ *p_slot_index = mlxsw_reg_mddq_slot_index_get(payload);
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+ *p_provisioned = mlxsw_reg_mddq_provisioned_get(payload);
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+ *p_sr_valid = mlxsw_reg_mddq_sr_valid_get(payload);
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+ *p_lc_ready = mlxsw_reg_mddq_lc_ready_get(payload);
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+ *p_active = mlxsw_reg_mddq_active_get(payload);
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+ *p_hw_revision = mlxsw_reg_mddq_hw_revision_get(payload);
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+ *p_ini_file_version = mlxsw_reg_mddq_ini_file_version_get(payload);
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+ *p_card_type = mlxsw_reg_mddq_card_type_get(payload);
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+}
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+
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+/* reg_mddq_flash_owner
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+ * If set, the device is the flash owner. Otherwise, a shared flash
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+ * is used by this device (another device is the flash owner).
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+ * Access: RO
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+ */
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+MLXSW_ITEM32(reg, mddq, flash_owner, 0x10, 30, 1);
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+
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+/* reg_mddq_device_index
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+ * Device index. The first device should number 0.
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+ * Access: RO
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+ */
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+MLXSW_ITEM32(reg, mddq, device_index, 0x10, 0, 8);
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+
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+/* reg_mddq_fw_major
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+ * Major FW version number.
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+ * Access: RO
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+ */
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+MLXSW_ITEM32(reg, mddq, fw_major, 0x14, 16, 16);
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+
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+/* reg_mddq_fw_minor
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+ * Minor FW version number.
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+ * Access: RO
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+ */
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+MLXSW_ITEM32(reg, mddq, fw_minor, 0x18, 16, 16);
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+
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+/* reg_mddq_fw_sub_minor
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+ * Sub-minor FW version number.
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+ * Access: RO
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+ */
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+MLXSW_ITEM32(reg, mddq, fw_sub_minor, 0x18, 0, 16);
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+
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+static inline void
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+mlxsw_reg_mddq_device_info_pack(char *payload, u8 slot_index,
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+ u8 request_msg_seq)
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+{
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+ __mlxsw_reg_mddq_pack(payload, slot_index,
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+ MLXSW_REG_MDDQ_QUERY_TYPE_DEVICE_INFO);
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+ mlxsw_reg_mddq_request_msg_seq_set(payload, request_msg_seq);
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+}
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+
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+static inline void
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+mlxsw_reg_mddq_device_info_unpack(const char *payload, u8 *p_response_msg_seq,
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+ bool *p_data_valid, bool *p_flash_owner,
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+ u8 *p_device_index, u16 *p_fw_major,
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+ u16 *p_fw_minor, u16 *p_fw_sub_minor)
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+{
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+ *p_response_msg_seq = mlxsw_reg_mddq_response_msg_seq_get(payload);
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+ *p_data_valid = mlxsw_reg_mddq_data_valid_get(payload);
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+ if (p_flash_owner)
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+ *p_flash_owner = mlxsw_reg_mddq_flash_owner_get(payload);
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+ *p_device_index = mlxsw_reg_mddq_device_index_get(payload);
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+ if (p_fw_major)
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+ *p_fw_major = mlxsw_reg_mddq_fw_major_get(payload);
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+ if (p_fw_minor)
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+ *p_fw_minor = mlxsw_reg_mddq_fw_minor_get(payload);
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+ if (p_fw_sub_minor)
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+ *p_fw_sub_minor = mlxsw_reg_mddq_fw_sub_minor_get(payload);
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+}
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+
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+#define MLXSW_REG_MDDQ_SLOT_ACII_NAME_LEN 20
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+
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+/* reg_mddq_slot_ascii_name
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+ * Slot's ASCII name.
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+ * Access: RO
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+ */
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+MLXSW_ITEM_BUF(reg, mddq, slot_ascii_name, 0x10,
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+ MLXSW_REG_MDDQ_SLOT_ACII_NAME_LEN);
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+
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+static inline void
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+mlxsw_reg_mddq_slot_name_pack(char *payload, u8 slot_index)
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+{
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+ __mlxsw_reg_mddq_pack(payload, slot_index,
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+ MLXSW_REG_MDDQ_QUERY_TYPE_SLOT_NAME);
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+}
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+
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+static inline void
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+mlxsw_reg_mddq_slot_name_unpack(const char *payload, char *slot_ascii_name)
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+{
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+ mlxsw_reg_mddq_slot_ascii_name_memcpy_from(payload, slot_ascii_name);
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+}
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+
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/* MFDE - Monitoring FW Debug Register
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* -----------------------------------
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*/
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@@ -11496,6 +11729,7 @@ static const struct mlxsw_reg_info *mlxsw_reg_infos[] = {
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MLXSW_REG(mtptpt),
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MLXSW_REG(mfgd),
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MLXSW_REG(mgpir),
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+ MLXSW_REG(mddq),
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MLXSW_REG(mfde),
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MLXSW_REG(tngcr),
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MLXSW_REG(tnumt),
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--
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2.30.2
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