98 lines
2.9 KiB
C
98 lines
2.9 KiB
C
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/* --------------------------------------------------------------------
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* A hwmon driver for the CIG cs6436-56P
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*
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* Copyright (C) 2018 Cambridge, Inc.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
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*/
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/* -------------------------------------------------------------------- */
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#ifndef I2C_LPC_H
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#define I2C_LPC_H 1
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/* ----- Control register bits ---------------------------------------- */
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#define I2C_LPC_PIN 0x80
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#define I2C_LPC_ESO 0x40
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#define I2C_LPC_ES1 0x20
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#define I2C_LPC_ES2 0x10
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#define I2C_LPC_ENI 0x08
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#define I2C_LPC_STO 0x40
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#define I2C_LPC_ACK 0x01
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/*command register*/
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#define I2C_LPC_STA 0x80
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#define I2C_LPC_ABT 0x40
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/*status register*/
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#define I2C_LPC_TBE 0x02
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#define I2C_LPC_IBB 0x80
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#define I2C_LPC_RBF 0x01
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#define I2C_LPC_TD 0x08
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#define I2C_LPC_START I2C_LPC_STA
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#define I2C_LPC_STOP I2C_LPC_STO
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#define I2C_LPC_REPSTART I2C_LPC_STA
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#define I2C_LPC_IDLE
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/* ----- Status register bits ----------------------------------------- */
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/*#define I2C_LPC_PIN 0x80 as above*/
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#define I2C_LPC_INI 0x40 /* 1 if not initialized */
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#define I2C_LPC_STS 0x20
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#define I2C_LPC_BER 0x10
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#define I2C_LPC_AD0 0x08
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#define I2C_LPC_LRB 0x08
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#define I2C_LPC_AAS 0x04
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#define I2C_LPC_LAB 0x02
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#define I2C_LPC_BB 0x80
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/* ----- Chip clock frequencies --------------------------------------- */
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#define I2C_LPC_CLK3 0x00
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#define I2C_LPC_CLK443 0x10
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#define I2C_LPC_CLK6 0x14
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#define I2C_LPC_CLK 0x18
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#define I2C_LPC_CLK12 0x1c
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/* ----- transmission frequencies ------------------------------------- */
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#define I2C_LPC_TRNS90 0x00 /* 90 kHz */
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#define I2C_LPC_TRNS45 0x01 /* 45 kHz */
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#define I2C_LPC_TRNS11 0x02 /* 11 kHz */
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#define I2C_LPC_TRNS15 0x03 /* 1.5 kHz */
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#define I2C_LPC_OWNADR 0
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#define I2C_LPC_INTREG I2C_LPC_ES2
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#define I2C_LPC_CLKREG I2C_LPC_ES1
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#define I2C_LPC_REG_TEST 0x01
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#define I2C_LPC_REG_BUS_SEL 0x80
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#define I2C_LPC_REG_DEVICE_ADDR 0x81
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#define I2C_LPC_REG_BYTE_COUNT 0x83
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#define I2C_LPC_REG_COMMAND 0x84
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#define I2C_LPC_REG_STATUS 0x85
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#define I2C_LPC_REG_DATA_RX1 0x86
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#define I2C_LPC_REG_DATA_RX2 0x87
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#define I2C_LPC_REG_DATA_RX3 0x88
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#define I2C_LPC_REG_DATA_RX4 0x89
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#define I2C_LPC_REG_DATA_TX1 0x8a
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#define I2C_LPC_REG_DATA_TX2 0x8b
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#define I2C_LPC_REG_DATA_TX3 0x8c
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#define I2C_LPC_REG_DATA_TX4 0x8d
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#endif /* I2C_LPC_H */
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