2020-04-21 04:25:51 -05:00
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/*
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* Juniper Networks RE-FPGA qfx platform specific driver
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*
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* Copyright (C) 2020 Juniper Networks
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* Author: Ciju Rajan K <crajank@juniper.net>
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*
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* This driver implements various features such as
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* - ALARM led driver
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* - Fan full speed reset control
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* - FAN precense detection
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* - FAN type detection
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* - Any new QFX specific features which uses RE-FPGA
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*/
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#include <linux/module.h>
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#include <linux/init.h>
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#include <linux/device.h>
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#include <linux/of.h>
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#include <linux/delay.h>
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#include <linux/leds.h>
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#include <linux/platform_device.h>
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#include <linux/io.h>
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#include <linux/mutex.h>
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#include <linux/kernel.h>
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#include <linux/init.h>
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#include <linux/pci.h>
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#include <linux/gpio.h>
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#include <linux/errno.h>
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#include <linux/string.h>
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#include <linux/hwmon.h>
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#include <linux/hwmon-sysfs.h>
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#define NUM_LEDS 7 /* Max number of Alarm + FAN LEDs */
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#define ALARM_MINOR_LED 0
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#define ALARM_MAJOR_LED 1
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#define REFPGA_PCIE_RESET_CTRL 0x13
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#define REFPGA_PCIE_ALARM 0x33
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#define REFPGA_FAN0_CTRL_STAT 0x28
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#define REFPGA_RESET_FAN_SPEED BIT(3)
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#define REFPGA_OPER_TYPE BIT(0)
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#define REFPGA_OPER_START BIT(1)
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#define REFPGA_OPER_DONE BIT(2)
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#define TMC_REFPGA_ADDR_REG 0x0 /* TMC offset: 0x228 */
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#define TMC_REFPGA_DATA_REG 0x4 /* TMC offset: 0x22C */
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#define TMC_REFPGA_CTRL_REG 0x8 /* TMC offset: 0x230 */
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#define TMC_REFPGA_READ_CMD 0x3
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#define TMC_REFPGA_WRITE_CMD 0x2
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#define REFPGA_INTR_NR_GROUPS 1
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#define REFPGA_INTR_MAX_IRQS_PG 32
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#define MAX_FANS 5
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#define REFPGA_IRQ_MAX_BITS_PER_REG 32
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#define POLL_INTERVAL 5000
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#define AFI_MASK (0x01)
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#define AFO_MASK (0x02)
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#define AFI_AFO_MASK (0x03)
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/*
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* LED specific data structures
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*/
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struct refpga_led {
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struct led_classdev lc;
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struct work_struct work;
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int blink;
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int on;
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int bit;
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void __iomem *addr;
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};
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struct refpga_led_data {
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int num_leds;
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struct refpga_led *leds;
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};
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static DEFINE_MUTEX(alarm_led_lock);
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/*
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* Common routines
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*/
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struct refpga_chip {
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struct refpga_led_data *led;
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};
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static struct refpga_chip *refpga;
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static DEFINE_MUTEX(refpga_lock);
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static void __iomem *tmc_membase;
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static void wait_for_refpga_oper(void __iomem *base_addr)
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{
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volatile u32 done = ~(-1);
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unsigned long int timeout;
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void __iomem *addr;
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addr = base_addr + (TMC_REFPGA_CTRL_REG);
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/*
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* Wait till the transaction is complete
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*/
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timeout = jiffies + msecs_to_jiffies(100);
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do {
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usleep_range(50, 100);
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done = ioread32(addr);
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if (done & (REFPGA_OPER_DONE))
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break;
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} while(time_before(jiffies, timeout));
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}
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static u32 refpga_read(void __iomem *base_addr, u32 refpga_offset)
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{
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u32 value;
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mutex_lock(&refpga_lock);
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iowrite32(refpga_offset, base_addr + (TMC_REFPGA_ADDR_REG));
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iowrite32(TMC_REFPGA_READ_CMD, base_addr + (TMC_REFPGA_CTRL_REG));
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wait_for_refpga_oper(base_addr);
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value = ioread32(base_addr + (TMC_REFPGA_DATA_REG));
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mutex_unlock(&refpga_lock);
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return value;
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}
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static void refpga_write(void __iomem *base_addr, u32 refpga_offset, u32 val)
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{
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mutex_lock(&refpga_lock);
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iowrite32(refpga_offset, base_addr + (TMC_REFPGA_ADDR_REG));
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iowrite32(val, base_addr + (TMC_REFPGA_DATA_REG));
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iowrite32(TMC_REFPGA_WRITE_CMD, base_addr + (TMC_REFPGA_CTRL_REG));
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wait_for_refpga_oper(base_addr);
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mutex_unlock(&refpga_lock);
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}
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static bool get_fan_presense(u8 idx)
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{
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u8 value = 0x00;
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u8 offset = REFPGA_FAN0_CTRL_STAT;
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bool ret = 0;
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value = refpga_read(tmc_membase, (offset + (idx * 2)));
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/*
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* Get the last two bits of REFPGA_FANx_CTRL_STAT.
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* REFPGA_FANx_CTRL_STAT register of REFPGA gives the fan airflow
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* status. There are 5 fans in QFX5200. Last two bits give the AFI
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* & AFO status. If any of these bits are set, fan is present.
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*/
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value = (value & BIT(0)) | (value & BIT(1));
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if (value)
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ret = 1;
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return ret;
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}
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static int get_fan_type(u8 idx)
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{
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u8 value = 0x00;
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u8 offset = REFPGA_FAN0_CTRL_STAT;
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int ret = -1;
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value = refpga_read(tmc_membase, (offset + (idx * 2)));
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/*
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* Get the last two bits of REFPGA_FANx_CTRL_STAT.
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* REFPGA_FANx_CTRL_STAT register of REFPGA gives the fan airflow
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* status. There are 5 fans in QFX5200. Last two bits give the AFI
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* & AFO status. If bit1 is set, it's AFO and if bit 0 is set,
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* it's AFI.
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*
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* This function will return '1' for AFO, '0' for AFI, and '-1'
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* if there is no fan or if both AFI & AFO bits are set.
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*/
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value &= AFI_AFO_MASK;
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switch(value) {
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case AFI_MASK:
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ret = 0;
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break;
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case AFO_MASK:
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ret = 1;
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break;
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default:
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ret = -1;
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break;
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};
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return ret;
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}
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enum sysfs_fan_attributes {
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FAN0_PRESENT,
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FAN1_PRESENT,
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FAN2_PRESENT,
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FAN3_PRESENT,
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FAN4_PRESENT,
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};
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enum sysfs_fan_type_attributes {
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FAN0_TYPE,
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FAN1_TYPE,
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FAN2_TYPE,
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FAN3_TYPE,
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FAN4_TYPE,
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};
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/*
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* The sysfs files will be present in this path
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* /sys/devices/pci0000:00/0000:00:1c.0/0000:0f:00.0/refpga-tmc.15/fan*_present
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* /sys/devices/pci0000:00/0000:00:1c.0/0000:0f:00.0/refpga-tmc.15/fan*_type
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*/
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#define DECLARE_FAN_PRESENT_SENSOR_DEV_ATTR(index) \
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static SENSOR_DEVICE_ATTR(fan##index##_present, S_IRUGO, refpga_fan_presense_show, NULL, FAN##index##_PRESENT)
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#define DECLARE_FAN_PRESENT_ATTR(index) &sensor_dev_attr_fan##index##_present.dev_attr.attr
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#define DECLARE_FAN_TYPE_SENSOR_DEV_ATTR(index) \
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static SENSOR_DEVICE_ATTR(fan##index##_type, S_IRUGO, refpga_fan_type_show, NULL, FAN##index##_TYPE)
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#define DECLARE_FAN_TYPE_ATTR(index) &sensor_dev_attr_fan##index##_type.dev_attr.attr
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static ssize_t refpga_fan_presense_show(struct device *dev, struct device_attribute *attr, char *buf)
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{
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struct sensor_device_attribute *s_attr = to_sensor_dev_attr(attr);
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return sprintf(buf, "%d\n", get_fan_presense(s_attr->index));
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}
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static ssize_t refpga_fan_type_show(struct device *dev, struct device_attribute *attr, char *buf)
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{
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struct sensor_device_attribute *s_attr = to_sensor_dev_attr(attr);
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return sprintf(buf, "%d\n", get_fan_type(s_attr->index));
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}
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DECLARE_FAN_PRESENT_SENSOR_DEV_ATTR(0);
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DECLARE_FAN_PRESENT_SENSOR_DEV_ATTR(1);
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DECLARE_FAN_PRESENT_SENSOR_DEV_ATTR(2);
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DECLARE_FAN_PRESENT_SENSOR_DEV_ATTR(3);
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DECLARE_FAN_PRESENT_SENSOR_DEV_ATTR(4);
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DECLARE_FAN_TYPE_SENSOR_DEV_ATTR(0);
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DECLARE_FAN_TYPE_SENSOR_DEV_ATTR(1);
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DECLARE_FAN_TYPE_SENSOR_DEV_ATTR(2);
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DECLARE_FAN_TYPE_SENSOR_DEV_ATTR(3);
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DECLARE_FAN_TYPE_SENSOR_DEV_ATTR(4);
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static struct attribute *refpga_fan_attrs[] = {
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DECLARE_FAN_PRESENT_ATTR(0),
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DECLARE_FAN_PRESENT_ATTR(1),
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DECLARE_FAN_PRESENT_ATTR(2),
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DECLARE_FAN_PRESENT_ATTR(3),
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DECLARE_FAN_PRESENT_ATTR(4),
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DECLARE_FAN_TYPE_ATTR(0),
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DECLARE_FAN_TYPE_ATTR(1),
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DECLARE_FAN_TYPE_ATTR(2),
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DECLARE_FAN_TYPE_ATTR(3),
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DECLARE_FAN_TYPE_ATTR(4),
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NULL
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};
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static struct attribute_group refpga_fan_attr_group = {
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.attrs = refpga_fan_attrs,
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};
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/*
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* There is only a single ALARM led in QFX5200 and that
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* is used for both Major & Minor alarm indicator.
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* These are represented by two different bits in RE-FPGA
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* PCIE_ALARM register. Only one of the bit (either Red or
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* Yellow) should be set a time. If both the bits are set,
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* it's an undefined behaviour.
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*
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* The following table describes how the conditions are
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* handled in the driver as there can be both Major & Minor
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* alarms can be triggered from userspace.
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*
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* Major Minor Colour
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*
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* 0 0 Nil
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* 0 1 Yellow
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* 1 1 Red
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* 1 0 Red
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*
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*/
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static void manage_alarm_led(void __iomem *addr, int led_type, int value)
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{
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static int alarm_major = 0, alarm_minor = 0;
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u32 reg = 0x0;
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mutex_lock(&alarm_led_lock);
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reg = refpga_read(addr, REFPGA_PCIE_ALARM);
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(led_type == ALARM_MAJOR_LED) ?
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((value == 1) ? (alarm_major = 1) : (alarm_major = 0)) :
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((value == 1) ? (alarm_minor = 1) : (alarm_minor = 0));
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if (alarm_major) {
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reg &= ~BIT(ALARM_MINOR_LED);
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reg |= BIT(ALARM_MAJOR_LED);
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} else {
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if (alarm_minor) {
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reg &= ~BIT(ALARM_MAJOR_LED);
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reg |= BIT(ALARM_MINOR_LED);
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} else {
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reg &= ~BIT(ALARM_MINOR_LED);
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reg &= ~BIT(ALARM_MAJOR_LED);
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}
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}
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refpga_write(addr, REFPGA_PCIE_ALARM, reg);
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mutex_unlock(&alarm_led_lock);
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}
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static void manage_fan_led(void __iomem *addr, int fan_slot, int value)
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{
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u8 offset = REFPGA_FAN0_CTRL_STAT + (fan_slot * 2);
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u32 reg = 0x0;
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reg = refpga_read(addr, offset);
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if(value) {
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/* Turn on s/w control */
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reg = reg | BIT(4);
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/* Turn off green led */
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reg &= ~BIT(5);
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/* Turn on yellow led & make it blink */
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reg |= (BIT(6) | BIT(7));
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} else {
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/* Clear yellow led & stop blink */
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reg &= ~(BIT(6) | BIT(7));
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/* Stop s/w control */
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reg &= ~BIT(4);
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}
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refpga_write(addr, offset, reg);
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}
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static void refpga_led_work(struct work_struct *work)
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{
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struct refpga_led *led = container_of(work, struct refpga_led, work);
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void __iomem *addr;
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addr = led->addr;
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if(strstr(led->lc.name, "fan"))
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manage_fan_led(addr, led->bit, led->on);
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else
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manage_alarm_led(addr, led->bit, led->on);
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}
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static void refpga_led_brightness_set(struct led_classdev *lc,
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enum led_brightness brightness)
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|
{
|
|
|
|
struct refpga_led *led = container_of(lc, struct refpga_led, lc);
|
|
|
|
|
|
|
|
led->on = (brightness != LED_OFF);
|
|
|
|
led->blink = 0; /* always turn off hw blink on brightness_set() */
|
|
|
|
schedule_work(&led->work);
|
|
|
|
}
|
|
|
|
|
|
|
|
struct led_table
|
|
|
|
{
|
|
|
|
const char *name;
|
|
|
|
int reg;
|
|
|
|
};
|
|
|
|
|
|
|
|
static struct led_table qfx5200_led_data[] = {
|
|
|
|
{
|
|
|
|
.name = "alarm-minor",
|
|
|
|
.reg = 0,
|
|
|
|
},
|
|
|
|
{
|
|
|
|
.name = "alarm-major",
|
|
|
|
.reg = 1,
|
|
|
|
},
|
|
|
|
{
|
|
|
|
.name = "fan0-fault",
|
|
|
|
.reg = 0,
|
|
|
|
},
|
|
|
|
{
|
|
|
|
.name = "fan1-fault",
|
|
|
|
.reg = 1,
|
|
|
|
},
|
|
|
|
{
|
|
|
|
.name = "fan2-fault",
|
|
|
|
.reg = 2,
|
|
|
|
},
|
|
|
|
{
|
|
|
|
.name = "fan3-fault",
|
|
|
|
.reg = 3,
|
|
|
|
},
|
|
|
|
{
|
|
|
|
.name = "fan4-fault",
|
|
|
|
.reg = 4,
|
|
|
|
}
|
|
|
|
};
|
|
|
|
|
|
|
|
static int refpga_led_init_one(struct device *dev,
|
|
|
|
struct refpga_led_data *ild,
|
|
|
|
int num)
|
|
|
|
{
|
|
|
|
struct refpga_led *led;
|
|
|
|
int ret = 0;
|
|
|
|
|
|
|
|
led = &ild->leds[num];
|
|
|
|
led->addr = tmc_membase;
|
|
|
|
|
|
|
|
led->lc.name = qfx5200_led_data[num].name;
|
|
|
|
led->bit = qfx5200_led_data[num].reg;
|
|
|
|
led->lc.brightness = LED_OFF;
|
|
|
|
led->lc.brightness_set = refpga_led_brightness_set;
|
|
|
|
|
|
|
|
ret = devm_led_classdev_register(dev, &led->lc);
|
|
|
|
if (ret) {
|
|
|
|
dev_err(dev, "devm_led_classdev_register failed\n");
|
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
|
|
|
|
INIT_WORK(&led->work, refpga_led_work);
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
static int refpga_led_qfx5200_init(struct device *dev, struct refpga_led_data *ild)
|
|
|
|
{
|
|
|
|
int ret = 0, idx = 0;
|
|
|
|
|
|
|
|
|
|
|
|
if (!dev->parent) {
|
|
|
|
dev_err(dev, "dev->parent is null\n");
|
|
|
|
return -ENODEV;
|
|
|
|
}
|
|
|
|
|
|
|
|
ild->num_leds = NUM_LEDS;
|
|
|
|
ild->leds = devm_kzalloc(dev, sizeof(struct refpga_led) * NUM_LEDS,
|
|
|
|
GFP_KERNEL);
|
|
|
|
if (!ild->leds) {
|
|
|
|
dev_err(dev, "LED allocation failed\n");
|
|
|
|
return -ENOMEM;
|
|
|
|
}
|
|
|
|
|
|
|
|
for(idx=0; idx<NUM_LEDS; idx++){
|
|
|
|
ret = refpga_led_init_one(dev, ild, idx);
|
|
|
|
if (ret)
|
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
static int jnx_refpga_led_probe(struct platform_device *pdev)
|
|
|
|
{
|
|
|
|
struct device *dev = &pdev->dev;
|
|
|
|
struct refpga_led_data *ild;
|
|
|
|
int ret;
|
|
|
|
|
|
|
|
ild = devm_kzalloc(dev, sizeof(*ild), GFP_KERNEL);
|
|
|
|
if (!ild) {
|
|
|
|
dev_err(dev, "ild allocation failed\n");
|
|
|
|
return -ENOMEM;
|
|
|
|
}
|
|
|
|
|
|
|
|
ret = refpga_led_qfx5200_init(dev, ild);
|
|
|
|
if (ret < 0)
|
|
|
|
return ret;
|
|
|
|
|
|
|
|
refpga->led = ild;
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
static int jnx_refpga_led_remove(struct platform_device *pdev)
|
|
|
|
{
|
|
|
|
struct refpga_chip *drv_data = platform_get_drvdata(pdev);
|
|
|
|
struct refpga_led_data *ild = drv_data->led;
|
|
|
|
int i;
|
|
|
|
|
|
|
|
for (i = 0; i < ild->num_leds; i++) {
|
|
|
|
devm_led_classdev_unregister(&pdev->dev, &ild->leds[i].lc);
|
|
|
|
cancel_work_sync(&ild->leds[i].work);
|
|
|
|
}
|
|
|
|
if (ild) {
|
|
|
|
if (ild->leds)
|
|
|
|
devm_kfree(&pdev->dev, ild->leds);
|
|
|
|
devm_kfree(&pdev->dev, ild);
|
|
|
|
}
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
static void reset_fan_full_speed(struct device *dev)
|
|
|
|
{
|
|
|
|
u32 val = ~(-1), tmp = ~(-1);
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Reading the REFPGA_PCIE_RESET_CTRL register
|
|
|
|
*/
|
|
|
|
val = refpga_read(tmc_membase, REFPGA_PCIE_RESET_CTRL);
|
|
|
|
/*
|
|
|
|
* Clearing the fan full_speed bit
|
|
|
|
*/
|
|
|
|
val &= ~(REFPGA_RESET_FAN_SPEED);
|
|
|
|
/*
|
|
|
|
* Writing the REFPGA_PCIE_RESET_CTRL register
|
|
|
|
*/
|
|
|
|
refpga_write(tmc_membase, REFPGA_PCIE_RESET_CTRL, val);
|
|
|
|
/*
|
|
|
|
* Reading the REFPGA_PCIE_RESET_CTRL register
|
|
|
|
*/
|
|
|
|
tmp = refpga_read(tmc_membase, REFPGA_PCIE_RESET_CTRL);
|
|
|
|
dev_info(dev, "After resetting fan full speed control: %X\n", tmp);
|
|
|
|
}
|
|
|
|
|
|
|
|
static int jnx_refpga_tmc_probe(struct platform_device *pdev)
|
|
|
|
{
|
|
|
|
struct device *dev = &pdev->dev;
|
|
|
|
struct resource *res;
|
|
|
|
int ret = 0;
|
|
|
|
|
|
|
|
res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
|
|
|
|
if (!res) {
|
|
|
|
dev_err(dev, "resource allocation failed\n");
|
|
|
|
return -ENODEV;
|
|
|
|
}
|
|
|
|
|
2021-09-10 00:44:03 -05:00
|
|
|
tmc_membase = devm_ioremap(dev, res->start, resource_size(res));
|
2020-04-21 04:25:51 -05:00
|
|
|
if (!tmc_membase) {
|
|
|
|
dev_err(dev, "ioremap failed\n");
|
|
|
|
return -ENOMEM;
|
|
|
|
}
|
|
|
|
|
|
|
|
refpga = devm_kzalloc(dev, sizeof(*refpga), GFP_KERNEL);
|
|
|
|
if (!refpga) {
|
|
|
|
dev_err(dev, "refpga memory allocation failed\n");
|
|
|
|
return -ENOMEM;
|
|
|
|
}
|
|
|
|
|
|
|
|
reset_fan_full_speed(dev);
|
|
|
|
|
|
|
|
ret = jnx_refpga_led_probe(pdev);
|
|
|
|
if (ret != 0) {
|
|
|
|
dev_err(dev, "Refpga LED probe failed\n");
|
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
|
|
|
|
dev_info(dev, "Refpga LED probe successful: TMC memoy base: %p\n",
|
|
|
|
tmc_membase);
|
|
|
|
|
|
|
|
ret = sysfs_create_group(&dev->kobj, &refpga_fan_attr_group);
|
|
|
|
if (ret != 0) {
|
|
|
|
dev_err(dev, "sysfs_create_group failed: %d\n", ret);
|
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
|
|
|
|
platform_set_drvdata(pdev, refpga);
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
static int jnx_refpga_tmc_remove(struct platform_device *pdev)
|
|
|
|
{
|
|
|
|
jnx_refpga_led_remove(pdev);
|
|
|
|
sysfs_remove_group(&pdev->dev.kobj, &refpga_fan_attr_group);
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
static struct platform_driver jnx_refpga_tmc_driver = {
|
|
|
|
.driver = {
|
|
|
|
.name = "refpga-tmc",
|
|
|
|
.owner = THIS_MODULE,
|
|
|
|
},
|
|
|
|
.probe = jnx_refpga_tmc_probe,
|
|
|
|
.remove = jnx_refpga_tmc_remove,
|
|
|
|
};
|
|
|
|
|
|
|
|
static int __init jnx_refpga_tmc_driver_init(void)
|
|
|
|
{
|
|
|
|
int ret = -1;
|
|
|
|
|
|
|
|
ret = platform_driver_register(&jnx_refpga_tmc_driver);
|
|
|
|
|
|
|
|
return ret;
|
|
|
|
|
|
|
|
}
|
|
|
|
|
|
|
|
static void __exit jnx_refpga_tmc_driver_exit(void)
|
|
|
|
{
|
|
|
|
platform_driver_unregister(&jnx_refpga_tmc_driver);
|
|
|
|
}
|
|
|
|
|
|
|
|
module_init(jnx_refpga_tmc_driver_init);
|
|
|
|
module_exit(jnx_refpga_tmc_driver_exit);
|
|
|
|
|
|
|
|
MODULE_DESCRIPTION("Juniper Networks REFPGA / TMC driver");
|
|
|
|
MODULE_AUTHOR("Ciju Rajan K <crajank@juniper.net>");
|
|
|
|
MODULE_LICENSE("GPL");
|