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sonic-buildimage/device/arista/x86_64-arista_7060px5_64s/Arista-7060PX5-64S/blackhawk.xml

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[Arista] Add support support for 7060dx5_64s and 7060px5_64s (#10888) Why I did it This change adds the support for Arista 7060dx5_64s and 7060px5_64s How I did it How to verify it We verified the platform driver is working and the ports are up on 7060dx5_64s and 7060px5_64s.
2022-06-16 11:51:42 -05:00
<?xml version="1.0"?>
<root>
<name>CSDK-BH</name>
<phy_addr>0</phy_addr>
<mode>retimer</mode>
<topology>1</topology>
<lane id="0" tx-polarity="0" rx-polarity="0" />
<lane id="1" tx-polarity="0" rx-polarity="0" />
<lane id="2" tx-polarity="0" rx-polarity="0" />
<lane id="3" tx-polarity="0" rx-polarity="0" />
<lane id="4" tx-polarity="0" rx-polarity="0" />
<lane id="5" tx-polarity="0" rx-polarity="0" />
<lane id="6" tx-polarity="0" rx-polarity="0" />
<lane id="7" tx-polarity="0" rx-polarity="0" />
<lane id="8" tx-polarity="0" rx-polarity="0" />
<lane id="9" tx-polarity="0" rx-polarity="0" />
<lane id="10" tx-polarity="0" rx-polarity="0" />
<lane id="11" tx-polarity="0" rx-polarity="0" />
<lane id="12" tx-polarity="0" rx-polarity="0" />
<lane id="13" tx-polarity="0" rx-polarity="0" />
<lane id="14" tx-polarity="0" rx-polarity="0" />
<lane id="15" tx-polarity="0" rx-polarity="0" />
Misc platform improvements for DCS-7060DX5-64S (#13875) * sonic-buildimage: Add 7060DX5-64S brcm tunnel config Add bcm_tunnel_term_compatible_mode: 1 support, which allows Loopback configuration to no longer result in SAI failure "tunnel terminator add failed with error Feature unavailable" that caused Orchagent SIGABRT Signed-off-by: Aaron Payment <aaronp@arista.com> * sonic-buildimage: Set port config ENABLE:0 in 7060DX5-64S brcm config Set ENABLE:0 for the front panel ports in the brcm config so that the ports are default admin down. This change prevents the issue that ports are able to link up and pass traffic resulting in mac learn events after SAI create switch and before SAI admin state up. The unexpected mac learn events resulted in Orch agent crash in PortsOrch init, which occurs after SAI create switch and before SAI admin state up. * fix sensors.conf on CatalinaDD * Add support for two sfp ports * Add copper 50g tuning to babbagelp on catalina --------- Signed-off-by: Aaron Payment <aaronp@arista.com> Co-authored-by: enes.oncu <enes.oncu@arista.com> Co-authored-by: Boyang Yu <byu@arista.com>
2023-08-18 15:05:05 -05:00
<PAM4>
<lane id="0" tx-taps="0,0,-8,117,-2,0,0"/>
<lane id="1" tx-taps="0,0,-8,117,-2,0,0"/>
<lane id="2" tx-taps="0,0,-8,117,-2,0,0"/>
<lane id="3" tx-taps="0,0,-8,117,-2,0,0"/>
<lane id="4" tx-taps="0,0,-8,117,-2,0,0"/>
<lane id="5" tx-taps="0,0,-8,117,-2,0,0"/>
<lane id="6" tx-taps="0,0,-8,117,-2,0,0"/>
<lane id="7" tx-taps="0,0,-8,117,-2,0,0"/>
<lane id="8" tx-taps="0,10,-22,93,-2,0,0"/>
<lane id="9" tx-taps="0,10,-22,93,-2,0,0"/>
<lane id="10" tx-taps="0,10,-22,93,-2,0,0"/>
<lane id="11" tx-taps="0,10,-22,93,-2,0,0"/>
<lane id="12" tx-taps="0,10,-22,93,-2,0,0"/>
<lane id="13" tx-taps="0,10,-22,93,-2,0,0"/>
<lane id="14" tx-taps="0,10,-22,93,-2,0,0"/>
<lane id="15" tx-taps="0,10,-22,93,-2,0,0"/>
</PAM4>
[Arista] Add support support for 7060dx5_64s and 7060px5_64s (#10888) Why I did it This change adds the support for Arista 7060dx5_64s and 7060px5_64s How I did it How to verify it We verified the platform driver is working and the ports are up on 7060dx5_64s and 7060px5_64s.
2022-06-16 11:51:42 -05:00
</root>
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