874 lines
25 KiB
Plaintext
874 lines
25 KiB
Plaintext
|
#/******************************************************************************
|
||
|
|
# *
|
||
|
|
# * File: config.bcm.cloverdales (7050-QX32)
|
||
|
|
# * Name:
|
||
|
|
# *
|
||
|
|
# * Description: This file contains SDK properties for an Arista
|
||
|
|
# * Cloverdales platform.
|
||
|
|
# *
|
||
|
|
# *-----------------------------------------------------------------------------
|
||
|
|
# ******************************************************************************/
|
||
|
|
####################################################################
|
||
|
|
# BCM Config file for Cloverdale platform
|
||
|
|
# - 32x40g Portmode
|
||
|
|
|
||
|
|
# Old LPM only configuration
|
||
|
|
# l2_mem_entries=163840
|
||
|
|
# l3_mem_entries=90112
|
||
|
|
# l3_alpm_enable=0
|
||
|
|
# ipv6_lpm_128b_enable=0
|
||
|
|
#
|
||
|
|
# ALPM enable
|
||
|
|
l3_alpm_enable=2
|
||
|
|
ipv6_lpm_128b_enable=1
|
||
|
|
l2_mem_entries=32768
|
||
|
|
l3_mem_entries=16384
|
||
|
|
|
||
|
|
# From old config file
|
||
|
|
os=unix
|
||
|
|
higig2_hdr_mode=1
|
||
|
|
|
||
|
|
# Parity
|
||
|
|
parity_correction=1
|
||
|
|
parity_enable=1
|
||
|
|
stat_if_parity_enable=0
|
||
|
|
|
||
|
|
# l2 thread related config vars
|
||
|
|
l2xmsg_hostbuf_size=8192
|
||
|
|
l2xmsg_mode=1
|
||
|
|
|
||
|
|
bcm_num_cos=8
|
||
|
|
bcm_stat_interval=2000000
|
||
|
|
lls_num_l2uc=12
|
||
|
|
max_vp_lags=0
|
||
|
|
miim_intr_enable=0
|
||
|
|
mmu_lossless=0
|
||
|
|
module_64ports=0
|
||
|
|
scache_filename=/tmp/scache
|
||
|
|
schan_intr_enable=0
|
||
|
|
stable_size=0x2000000
|
||
|
|
tdma_timeout_usec=5000000
|
||
|
|
|
||
|
|
# for GLC transceiver
|
||
|
|
phy_an_c73=0x0
|
||
|
|
phy_an_c37=0x3
|
||
|
|
|
||
|
|
###########################
|
||
|
|
#port_init_speed_xe=40000
|
||
|
|
#port_init_speed_xe.0=40000
|
||
|
|
|
||
|
|
#load_firmware=0x0102
|
||
|
|
load_firmware.0=2
|
||
|
|
|
||
|
|
#########################
|
||
|
|
# All ports are in oversubscription mode
|
||
|
|
pbmp_oversubscribe=0x1fffffffffffffffffffffffffe
|
||
|
|
pbmp_xport_xe.0=0x1fffffffe
|
||
|
|
|
||
|
|
phy_84328_1.0=1
|
||
|
|
phy_84328_2.0=1
|
||
|
|
phy_84328_29.0=1
|
||
|
|
phy_84328_3.0=1
|
||
|
|
phy_84328_30.0=1
|
||
|
|
phy_84328_31.0=1
|
||
|
|
phy_84328_32.0=1
|
||
|
|
phy_84328_4.0=1
|
||
|
|
phy_an_c37_1.0=3
|
||
|
|
phy_an_c37_10.0=3
|
||
|
|
phy_an_c37_11.0=3
|
||
|
|
phy_an_c37_12.0=3
|
||
|
|
phy_an_c37_13.0=3
|
||
|
|
phy_an_c37_14.0=3
|
||
|
|
phy_an_c37_15.0=3
|
||
|
|
phy_an_c37_16.0=3
|
||
|
|
phy_an_c37_17.0=3
|
||
|
|
phy_an_c37_18.0=3
|
||
|
|
phy_an_c37_19.0=3
|
||
|
|
phy_an_c37_2.0=3
|
||
|
|
phy_an_c37_20.0=3
|
||
|
|
phy_an_c37_21.0=3
|
||
|
|
phy_an_c37_22.0=3
|
||
|
|
phy_an_c37_23.0=3
|
||
|
|
phy_an_c37_24.0=3
|
||
|
|
phy_an_c37_25.0=3
|
||
|
|
phy_an_c37_26.0=3
|
||
|
|
phy_an_c37_27.0=3
|
||
|
|
phy_an_c37_28.0=3
|
||
|
|
phy_an_c37_29.0=3
|
||
|
|
phy_an_c37_3.0=3
|
||
|
|
phy_an_c37_30.0=3
|
||
|
|
phy_an_c37_31.0=3
|
||
|
|
phy_an_c37_32.0=3
|
||
|
|
phy_an_c37_4.0=3
|
||
|
|
phy_an_c37_5.0=3
|
||
|
|
phy_an_c37_6.0=3
|
||
|
|
phy_an_c37_7.0=3
|
||
|
|
phy_an_c37_8.0=3
|
||
|
|
phy_an_c37_9.0=3
|
||
|
|
phy_an_c73_1.0=1
|
||
|
|
phy_an_c73_10.0=1
|
||
|
|
phy_an_c73_11.0=1
|
||
|
|
phy_an_c73_12.0=1
|
||
|
|
phy_an_c73_13.0=1
|
||
|
|
phy_an_c73_14.0=1
|
||
|
|
phy_an_c73_15.0=1
|
||
|
|
phy_an_c73_16.0=1
|
||
|
|
phy_an_c73_17.0=1
|
||
|
|
phy_an_c73_18.0=1
|
||
|
|
phy_an_c73_19.0=1
|
||
|
|
phy_an_c73_2.0=1
|
||
|
|
phy_an_c73_20.0=1
|
||
|
|
phy_an_c73_21.0=1
|
||
|
|
phy_an_c73_22.0=1
|
||
|
|
phy_an_c73_23.0=1
|
||
|
|
phy_an_c73_24.0=1
|
||
|
|
phy_an_c73_25.0=1
|
||
|
|
phy_an_c73_26.0=1
|
||
|
|
phy_an_c73_27.0=1
|
||
|
|
phy_an_c73_28.0=1
|
||
|
|
phy_an_c73_29.0=1
|
||
|
|
phy_an_c73_3.0=1
|
||
|
|
phy_an_c73_30.0=1
|
||
|
|
phy_an_c73_31.0=1
|
||
|
|
phy_an_c73_32.0=1
|
||
|
|
phy_an_c73_4.0=1
|
||
|
|
phy_an_c73_5.0=1
|
||
|
|
phy_an_c73_6.0=1
|
||
|
|
phy_an_c73_7.0=1
|
||
|
|
phy_an_c73_8.0=1
|
||
|
|
phy_an_c73_9.0=1
|
||
|
|
phy_aux_voltage_enable_1.0=0x1
|
||
|
|
phy_aux_voltage_enable_2.0=0x1
|
||
|
|
phy_aux_voltage_enable_29.0=0x1
|
||
|
|
phy_aux_voltage_enable_3.0=0x1
|
||
|
|
phy_aux_voltage_enable_30.0=0x1
|
||
|
|
phy_aux_voltage_enable_31.0=0x1
|
||
|
|
phy_aux_voltage_enable_32.0=0x1
|
||
|
|
phy_aux_voltage_enable_4.0=0x1
|
||
|
|
phy_ext_rom_boot.0=0
|
||
|
|
phy_ext_rom_boot_1.0=0x0
|
||
|
|
phy_ext_rom_boot_2.0=0x0
|
||
|
|
phy_ext_rom_boot_29.0=0x0
|
||
|
|
phy_ext_rom_boot_3.0=0x0
|
||
|
|
phy_ext_rom_boot_30.0=0x0
|
||
|
|
phy_ext_rom_boot_31.0=0x0
|
||
|
|
phy_ext_rom_boot_32.0=0x0
|
||
|
|
phy_ext_rom_boot_4.0=0x0
|
||
|
|
phy_line_tx_mode_1.0=1
|
||
|
|
phy_line_tx_mode_2.0=1
|
||
|
|
phy_line_tx_mode_29.0=1
|
||
|
|
phy_line_tx_mode_3.0=1
|
||
|
|
phy_line_tx_mode_30.0=1
|
||
|
|
phy_line_tx_mode_31.0=1
|
||
|
|
phy_line_tx_mode_32.0=1
|
||
|
|
phy_line_tx_mode_4.0=1
|
||
|
|
phy_rx_polarity_flip_1.0=0x0
|
||
|
|
phy_rx_polarity_flip_2.0=0x0
|
||
|
|
phy_rx_polarity_flip_29.0=0x0
|
||
|
|
phy_rx_polarity_flip_3.0=0x0
|
||
|
|
phy_rx_polarity_flip_30.0=0x0
|
||
|
|
phy_rx_polarity_flip_31.0=0x0
|
||
|
|
phy_rx_polarity_flip_32.0=0x0
|
||
|
|
phy_rx_polarity_flip_4.0=0x0
|
||
|
|
phy_system_tx_mode_1.0=0
|
||
|
|
phy_system_tx_mode_2.0=0
|
||
|
|
phy_system_tx_mode_29.0=0
|
||
|
|
phy_system_tx_mode_3.0=0
|
||
|
|
phy_system_tx_mode_30.0=0
|
||
|
|
phy_system_tx_mode_31.0=0
|
||
|
|
phy_system_tx_mode_32.0=0
|
||
|
|
phy_system_tx_mode_4.0=0
|
||
|
|
phy_tx_polarity_flip_1.0=0x0
|
||
|
|
phy_tx_polarity_flip_2.0=0x0
|
||
|
|
phy_tx_polarity_flip_29.0=0x0
|
||
|
|
phy_tx_polarity_flip_3.0=0x0
|
||
|
|
phy_tx_polarity_flip_30.0=0x0
|
||
|
|
phy_tx_polarity_flip_31.0=0x0
|
||
|
|
phy_tx_polarity_flip_32.0=0x0
|
||
|
|
phy_tx_polarity_flip_4.0=0x0
|
||
|
|
phy_xaui_rx_polarity_flip_1.0=0x0
|
||
|
|
phy_xaui_rx_polarity_flip_10.0=0x0
|
||
|
|
phy_xaui_rx_polarity_flip_11.0=0x0
|
||
|
|
phy_xaui_rx_polarity_flip_12.0=0x0
|
||
|
|
phy_xaui_rx_polarity_flip_13.0=0x0
|
||
|
|
phy_xaui_rx_polarity_flip_14.0=0x0
|
||
|
|
phy_xaui_rx_polarity_flip_15.0=0x0
|
||
|
|
phy_xaui_rx_polarity_flip_16.0=0x0
|
||
|
|
phy_xaui_rx_polarity_flip_17.0=0x0
|
||
|
|
phy_xaui_rx_polarity_flip_18.0=0x0
|
||
|
|
phy_xaui_rx_polarity_flip_19.0=0x0
|
||
|
|
phy_xaui_rx_polarity_flip_2.0=0x0
|
||
|
|
phy_xaui_rx_polarity_flip_20.0=0x0
|
||
|
|
phy_xaui_rx_polarity_flip_21.0=0x0
|
||
|
|
phy_xaui_rx_polarity_flip_22.0=0x0
|
||
|
|
phy_xaui_rx_polarity_flip_23.0=0x0
|
||
|
|
phy_xaui_rx_polarity_flip_24.0=0x0
|
||
|
|
phy_xaui_rx_polarity_flip_25.0=0x0
|
||
|
|
phy_xaui_rx_polarity_flip_26.0=0x0
|
||
|
|
phy_xaui_rx_polarity_flip_27.0=0x0
|
||
|
|
phy_xaui_rx_polarity_flip_28.0=0x0
|
||
|
|
phy_xaui_rx_polarity_flip_29.0=0x0
|
||
|
|
phy_xaui_rx_polarity_flip_3.0=0x0
|
||
|
|
phy_xaui_rx_polarity_flip_30.0=0x0
|
||
|
|
phy_xaui_rx_polarity_flip_31.0=0x0
|
||
|
|
phy_xaui_rx_polarity_flip_32.0=0x0
|
||
|
|
phy_xaui_rx_polarity_flip_4.0=0x0
|
||
|
|
phy_xaui_rx_polarity_flip_5.0=0x0
|
||
|
|
phy_xaui_rx_polarity_flip_6.0=0x0
|
||
|
|
phy_xaui_rx_polarity_flip_7.0=0x0
|
||
|
|
phy_xaui_rx_polarity_flip_8.0=0x0
|
||
|
|
phy_xaui_rx_polarity_flip_9.0=0x0
|
||
|
|
phy_xaui_tx_polarity_flip_1.0=0x0
|
||
|
|
phy_xaui_tx_polarity_flip_10.0=0x0
|
||
|
|
phy_xaui_tx_polarity_flip_11.0=0x0
|
||
|
|
phy_xaui_tx_polarity_flip_12.0=0x0
|
||
|
|
phy_xaui_tx_polarity_flip_13.0=0x0
|
||
|
|
phy_xaui_tx_polarity_flip_14.0=0x0
|
||
|
|
phy_xaui_tx_polarity_flip_15.0=0x0
|
||
|
|
phy_xaui_tx_polarity_flip_16.0=0x0
|
||
|
|
phy_xaui_tx_polarity_flip_17.0=0x0
|
||
|
|
phy_xaui_tx_polarity_flip_18.0=0x0
|
||
|
|
phy_xaui_tx_polarity_flip_19.0=0x0
|
||
|
|
phy_xaui_tx_polarity_flip_2.0=0x0
|
||
|
|
phy_xaui_tx_polarity_flip_20.0=0x0
|
||
|
|
phy_xaui_tx_polarity_flip_21.0=0x0
|
||
|
|
phy_xaui_tx_polarity_flip_22.0=0x0
|
||
|
|
phy_xaui_tx_polarity_flip_23.0=0x0
|
||
|
|
phy_xaui_tx_polarity_flip_24.0=0x0
|
||
|
|
phy_xaui_tx_polarity_flip_25.0=0x0
|
||
|
|
phy_xaui_tx_polarity_flip_26.0=0x0
|
||
|
|
phy_xaui_tx_polarity_flip_27.0=0x0
|
||
|
|
phy_xaui_tx_polarity_flip_28.0=0x0
|
||
|
|
phy_xaui_tx_polarity_flip_29.0=0x0
|
||
|
|
phy_xaui_tx_polarity_flip_3.0=0x0
|
||
|
|
phy_xaui_tx_polarity_flip_30.0=0x0
|
||
|
|
phy_xaui_tx_polarity_flip_31.0=0x0
|
||
|
|
phy_xaui_tx_polarity_flip_32.0=0x0
|
||
|
|
phy_xaui_tx_polarity_flip_4.0=0x0
|
||
|
|
phy_xaui_tx_polarity_flip_5.0=0x0
|
||
|
|
phy_xaui_tx_polarity_flip_6.0=0x0
|
||
|
|
phy_xaui_tx_polarity_flip_7.0=0x0
|
||
|
|
phy_xaui_tx_polarity_flip_8.0=0x0
|
||
|
|
phy_xaui_tx_polarity_flip_9.0=0x0
|
||
|
|
port_init_autoneg_10.0=0
|
||
|
|
port_init_autoneg_11.0=0
|
||
|
|
port_init_autoneg_12.0=0
|
||
|
|
port_init_autoneg_13.0=0
|
||
|
|
port_init_autoneg_14.0=0
|
||
|
|
port_init_autoneg_15.0=0
|
||
|
|
port_init_autoneg_16.0=0
|
||
|
|
port_init_autoneg_17.0=0
|
||
|
|
port_init_autoneg_18.0=0
|
||
|
|
port_init_autoneg_19.0=0
|
||
|
|
port_init_autoneg_20.0=0
|
||
|
|
port_init_autoneg_21.0=0
|
||
|
|
port_init_autoneg_22.0=0
|
||
|
|
port_init_autoneg_23.0=0
|
||
|
|
port_init_autoneg_24.0=0
|
||
|
|
port_init_autoneg_25.0=0
|
||
|
|
port_init_autoneg_26.0=0
|
||
|
|
port_init_autoneg_27.0=0
|
||
|
|
port_init_autoneg_28.0=0
|
||
|
|
port_init_autoneg_5.0=0
|
||
|
|
port_init_autoneg_6.0=0
|
||
|
|
port_init_autoneg_7.0=0
|
||
|
|
port_init_autoneg_8.0=0
|
||
|
|
port_init_autoneg_9.0=0
|
||
|
|
port_init_cl72_hg.0=0x11
|
||
|
|
port_phy_addr_1.0=0x4
|
||
|
|
port_phy_addr_10.0=0x7f
|
||
|
|
port_phy_addr_11.0=0x7f
|
||
|
|
port_phy_addr_12.0=0x7f
|
||
|
|
port_phy_addr_13.0=0x7f
|
||
|
|
port_phy_addr_14.0=0x7f
|
||
|
|
port_phy_addr_15.0=0x7f
|
||
|
|
port_phy_addr_16.0=0x7f
|
||
|
|
port_phy_addr_17.0=0x7f
|
||
|
|
port_phy_addr_18.0=0x7f
|
||
|
|
port_phy_addr_19.0=0x7f
|
||
|
|
port_phy_addr_2.0=0x0
|
||
|
|
port_phy_addr_20.0=0x7f
|
||
|
|
port_phy_addr_21.0=0x7f
|
||
|
|
port_phy_addr_22.0=0x7f
|
||
|
|
port_phy_addr_23.0=0x7f
|
||
|
|
port_phy_addr_24.0=0x7f
|
||
|
|
port_phy_addr_25.0=0x7f
|
||
|
|
port_phy_addr_26.0=0x7f
|
||
|
|
port_phy_addr_27.0=0x7f
|
||
|
|
port_phy_addr_28.0=0x7f
|
||
|
|
port_phy_addr_29.0=0x54
|
||
|
|
port_phy_addr_3.0=0x2c
|
||
|
|
port_phy_addr_30.0=0x50
|
||
|
|
port_phy_addr_31.0=0x7c
|
||
|
|
port_phy_addr_32.0=0x78
|
||
|
|
port_phy_addr_4.0=0x28
|
||
|
|
port_phy_addr_5.0=0x7f
|
||
|
|
port_phy_addr_6.0=0x7f
|
||
|
|
port_phy_addr_7.0=0x7f
|
||
|
|
port_phy_addr_8.0=0x7f
|
||
|
|
port_phy_addr_9.0=0x7f
|
||
|
|
port_phy_clause_1.0=0x2d
|
||
|
|
port_phy_clause_2.0=0x2d
|
||
|
|
port_phy_clause_29.0=0x2d
|
||
|
|
port_phy_clause_3.0=0x2d
|
||
|
|
port_phy_clause_30.0=0x2d
|
||
|
|
port_phy_clause_31.0=0x2d
|
||
|
|
port_phy_clause_32.0=0x2d
|
||
|
|
port_phy_clause_4.0=0x2d
|
||
|
|
port_phy_id0_1.0=0x600d
|
||
|
|
port_phy_id0_2.0=0x600d
|
||
|
|
port_phy_id0_29.0=0x600d
|
||
|
|
port_phy_id0_3.0=0x600d
|
||
|
|
port_phy_id0_30.0=0x600d
|
||
|
|
port_phy_id0_31.0=0x600d
|
||
|
|
port_phy_id0_32.0=0x600d
|
||
|
|
port_phy_id0_4.0=0x600d
|
||
|
|
port_phy_id1_1.0=0x8500
|
||
|
|
port_phy_id1_2.0=0x8500
|
||
|
|
port_phy_id1_29.0=0x8500
|
||
|
|
port_phy_id1_3.0=0x8500
|
||
|
|
port_phy_id1_30.0=0x8500
|
||
|
|
port_phy_id1_31.0=0x8500
|
||
|
|
port_phy_id1_32.0=0x8500
|
||
|
|
port_phy_id1_4.0=0x8500
|
||
|
|
portmap_1.0=125:40
|
||
|
|
portmap_10.0=33:40
|
||
|
|
portmap_11.0=45:40
|
||
|
|
portmap_12.0=41:40
|
||
|
|
portmap_13.0=53:40
|
||
|
|
portmap_14.0=49:40
|
||
|
|
portmap_15.0=69:40
|
||
|
|
portmap_16.0=65:40
|
||
|
|
portmap_17.0=77:40
|
||
|
|
portmap_18.0=73:40
|
||
|
|
portmap_19.0=93:40
|
||
|
|
portmap_2.0=121:40
|
||
|
|
portmap_20.0=89:40
|
||
|
|
portmap_21.0=101:40
|
||
|
|
portmap_22.0=97:40
|
||
|
|
portmap_23.0=109:40
|
||
|
|
portmap_24.0=105:40
|
||
|
|
portmap_25.0=61:40
|
||
|
|
portmap_26.0=57:40
|
||
|
|
portmap_27.0=81:40
|
||
|
|
portmap_28.0=85:40
|
||
|
|
portmap_29.0=117:40
|
||
|
|
portmap_3.0=13:40
|
||
|
|
portmap_30.0=113:40
|
||
|
|
portmap_31.0=5:40
|
||
|
|
portmap_32.0=1:40
|
||
|
|
portmap_4.0=9:40
|
||
|
|
portmap_5.0=17:40
|
||
|
|
portmap_6.0=21:40
|
||
|
|
portmap_7.0=25:40
|
||
|
|
portmap_8.0=29:40
|
||
|
|
portmap_9.0=37:40
|
||
|
|
serdes_firmware_mode_1.0=1
|
||
|
|
serdes_firmware_mode_10.0=2
|
||
|
|
serdes_firmware_mode_11.0=2
|
||
|
|
serdes_firmware_mode_12.0=2
|
||
|
|
serdes_firmware_mode_13.0=2
|
||
|
|
serdes_firmware_mode_14.0=2
|
||
|
|
serdes_firmware_mode_15.0=2
|
||
|
|
serdes_firmware_mode_16.0=2
|
||
|
|
serdes_firmware_mode_17.0=2
|
||
|
|
serdes_firmware_mode_18.0=2
|
||
|
|
serdes_firmware_mode_19.0=2
|
||
|
|
serdes_firmware_mode_2.0=1
|
||
|
|
serdes_firmware_mode_20.0=2
|
||
|
|
serdes_firmware_mode_21.0=2
|
||
|
|
serdes_firmware_mode_22.0=2
|
||
|
|
serdes_firmware_mode_23.0=2
|
||
|
|
serdes_firmware_mode_24.0=2
|
||
|
|
serdes_firmware_mode_25.0=2
|
||
|
|
serdes_firmware_mode_26.0=2
|
||
|
|
serdes_firmware_mode_27.0=2
|
||
|
|
serdes_firmware_mode_28.0=2
|
||
|
|
serdes_firmware_mode_29.0=1
|
||
|
|
serdes_firmware_mode_3.0=1
|
||
|
|
serdes_firmware_mode_30.0=1
|
||
|
|
serdes_firmware_mode_31.0=1
|
||
|
|
serdes_firmware_mode_32.0=1
|
||
|
|
serdes_firmware_mode_4.0=1
|
||
|
|
serdes_firmware_mode_5.0=2
|
||
|
|
serdes_firmware_mode_6.0=2
|
||
|
|
serdes_firmware_mode_7.0=2
|
||
|
|
serdes_firmware_mode_8.0=2
|
||
|
|
serdes_firmware_mode_9.0=2
|
||
|
|
xgxs_lcpll_xtal_refclk.0=1
|
||
|
|
xgxs_rx_lane_map_1.0=0x0123
|
||
|
|
xgxs_rx_lane_map_10.0=0x3120
|
||
|
|
xgxs_rx_lane_map_11.0=0x3120
|
||
|
|
xgxs_rx_lane_map_12.0=0x3120
|
||
|
|
xgxs_rx_lane_map_13.0=0x3120
|
||
|
|
xgxs_rx_lane_map_14.0=0x3120
|
||
|
|
xgxs_rx_lane_map_15.0=0x3120
|
||
|
|
xgxs_rx_lane_map_16.0=0x3120
|
||
|
|
xgxs_rx_lane_map_17.0=0x3120
|
||
|
|
xgxs_rx_lane_map_18.0=0x3120
|
||
|
|
xgxs_rx_lane_map_19.0=0x3120
|
||
|
|
xgxs_rx_lane_map_2.0=0x0123
|
||
|
|
xgxs_rx_lane_map_20.0=0x3120
|
||
|
|
xgxs_rx_lane_map_21.0=0x3120
|
||
|
|
xgxs_rx_lane_map_22.0=0x3120
|
||
|
|
xgxs_rx_lane_map_23.0=0x3120
|
||
|
|
xgxs_rx_lane_map_24.0=0x3120
|
||
|
|
xgxs_rx_lane_map_25.0=0x2031
|
||
|
|
xgxs_rx_lane_map_26.0=0x2031
|
||
|
|
xgxs_rx_lane_map_27.0=0x0213
|
||
|
|
xgxs_rx_lane_map_28.0=0x0213
|
||
|
|
xgxs_rx_lane_map_29.0=0x0123
|
||
|
|
xgxs_rx_lane_map_3.0=0x0123
|
||
|
|
xgxs_rx_lane_map_30.0=0x0123
|
||
|
|
xgxs_rx_lane_map_31.0=0x0123
|
||
|
|
xgxs_rx_lane_map_32.0=0x0123
|
||
|
|
xgxs_rx_lane_map_4.0=0x0123
|
||
|
|
xgxs_rx_lane_map_5.0=0x2031
|
||
|
|
xgxs_rx_lane_map_6.0=0x2031
|
||
|
|
xgxs_rx_lane_map_7.0=0x2031
|
||
|
|
xgxs_rx_lane_map_8.0=0x2031
|
||
|
|
xgxs_rx_lane_map_9.0=0x3120
|
||
|
|
xgxs_tx_lane_map_1.0=0x0123
|
||
|
|
xgxs_tx_lane_map_10.0=0x3120
|
||
|
|
xgxs_tx_lane_map_11.0=0x3120
|
||
|
|
xgxs_tx_lane_map_12.0=0x3120
|
||
|
|
xgxs_tx_lane_map_13.0=0x3120
|
||
|
|
xgxs_tx_lane_map_14.0=0x3120
|
||
|
|
xgxs_tx_lane_map_15.0=0x3120
|
||
|
|
xgxs_tx_lane_map_16.0=0x3120
|
||
|
|
xgxs_tx_lane_map_17.0=0x3120
|
||
|
|
xgxs_tx_lane_map_18.0=0x3120
|
||
|
|
xgxs_tx_lane_map_19.0=0x3120
|
||
|
|
xgxs_tx_lane_map_2.0=0x0123
|
||
|
|
xgxs_tx_lane_map_20.0=0x3120
|
||
|
|
xgxs_tx_lane_map_21.0=0x3120
|
||
|
|
xgxs_tx_lane_map_22.0=0x3120
|
||
|
|
xgxs_tx_lane_map_23.0=0x3120
|
||
|
|
xgxs_tx_lane_map_24.0=0x3120
|
||
|
|
xgxs_tx_lane_map_25.0=0x2031
|
||
|
|
xgxs_tx_lane_map_26.0=0x2031
|
||
|
|
xgxs_tx_lane_map_27.0=0x0213
|
||
|
|
xgxs_tx_lane_map_28.0=0x0213
|
||
|
|
xgxs_tx_lane_map_29.0=0x0123
|
||
|
|
xgxs_tx_lane_map_3.0=0x0123
|
||
|
|
xgxs_tx_lane_map_30.0=0x0123
|
||
|
|
xgxs_tx_lane_map_31.0=0x0123
|
||
|
|
xgxs_tx_lane_map_32.0=0x0123
|
||
|
|
xgxs_tx_lane_map_4.0=0x0123
|
||
|
|
xgxs_tx_lane_map_5.0=0x1302
|
||
|
|
xgxs_tx_lane_map_6.0=0x1302
|
||
|
|
xgxs_tx_lane_map_7.0=0x1302
|
||
|
|
xgxs_tx_lane_map_8.0=0x1302
|
||
|
|
xgxs_tx_lane_map_9.0=0x3120
|
||
|
|
|
||
|
|
##########################################
|
||
|
|
#skip_L2_USER_ENTRY=0
|
||
|
|
phy_aux_voltage_enable=1
|
||
|
|
###############################
|
||
|
|
serdes_fiber_pref=1
|
||
|
|
###############################
|
||
|
|
mdio_output_delay.0=0x0d
|
||
|
|
###############################
|
||
|
|
serdes_sgmii_m=0
|
||
|
|
xgxs_lcpll_xtal_refclk=1
|
||
|
|
xgxs_lcpll_xtal_refclk.1=1
|
||
|
|
xgxs_lcpll_xtal_refclk.2=1
|
||
|
|
xgxs_lcpll_xtal_refclk.3=1
|
||
|
|
tdma_intr_enable=1
|
||
|
|
tslam_intr_enable=1
|
||
|
|
tslam_dma_enable.2=1
|
||
|
|
tslam_dma_enable.3=1
|
||
|
|
#dport_map_port=0
|
||
|
|
#dport_map_enable=0
|
||
|
|
#dport_map_indexed=0
|
||
|
|
#bcm_xlate_port_enable.0=0
|
||
|
|
#xgxs_pdetect_1=0
|
||
|
|
table_dma_enable.0=1
|
||
|
|
table_dma_enable.1=1
|
||
|
|
table_dma_enable.2=1
|
||
|
|
table_dma_enable.3=1
|
||
|
|
serdes_driver_current_lane0_1=2
|
||
|
|
serdes_pre_driver_current_lane0_1=2
|
||
|
|
serdes_preemphasis_lane0_1=0x8fc0
|
||
|
|
serdes_driver_current_lane1_1=2
|
||
|
|
serdes_pre_driver_current_lane1_1=2
|
||
|
|
serdes_preemphasis_lane1_1=0x8fc0
|
||
|
|
serdes_driver_current_lane2_1=2
|
||
|
|
serdes_pre_driver_current_lane2_1=2
|
||
|
|
serdes_preemphasis_lane2_1=0x8fc0
|
||
|
|
serdes_driver_current_lane3_1=2
|
||
|
|
serdes_pre_driver_current_lane3_1=2
|
||
|
|
serdes_preemphasis_lane3_1=0x8fc0
|
||
|
|
serdes_driver_current_lane0_2=3
|
||
|
|
serdes_pre_driver_current_lane0_2=2
|
||
|
|
serdes_preemphasis_lane0_2=0x8fc0
|
||
|
|
serdes_driver_current_lane1_2=3
|
||
|
|
serdes_pre_driver_current_lane1_2=2
|
||
|
|
serdes_preemphasis_lane1_2=0x8fc0
|
||
|
|
serdes_driver_current_lane2_2=3
|
||
|
|
serdes_pre_driver_current_lane2_2=2
|
||
|
|
serdes_preemphasis_lane2_2=0x8fc0
|
||
|
|
serdes_driver_current_lane3_2=3
|
||
|
|
serdes_pre_driver_current_lane3_2=2
|
||
|
|
serdes_preemphasis_lane3_2=0x8fc0
|
||
|
|
serdes_driver_current_lane0_3=2
|
||
|
|
serdes_pre_driver_current_lane0_3=2
|
||
|
|
serdes_preemphasis_lane0_3=0x8fc0
|
||
|
|
serdes_driver_current_lane1_3=2
|
||
|
|
serdes_pre_driver_current_lane1_3=2
|
||
|
|
serdes_preemphasis_lane1_3=0x8fc0
|
||
|
|
serdes_driver_current_lane2_3=2
|
||
|
|
serdes_pre_driver_current_lane2_3=2
|
||
|
|
serdes_preemphasis_lane2_3=0x8fc0
|
||
|
|
serdes_driver_current_lane3_3=2
|
||
|
|
serdes_pre_driver_current_lane3_3=2
|
||
|
|
serdes_preemphasis_lane3_3=0x8fc0
|
||
|
|
serdes_driver_current_lane0_4=2
|
||
|
|
serdes_pre_driver_current_lane0_4=2
|
||
|
|
serdes_preemphasis_lane0_4=0x8fc0
|
||
|
|
serdes_driver_current_lane1_4=2
|
||
|
|
serdes_pre_driver_current_lane1_4=2
|
||
|
|
serdes_preemphasis_lane1_4=0x8fc0
|
||
|
|
serdes_driver_current_lane2_4=2
|
||
|
|
serdes_pre_driver_current_lane2_4=2
|
||
|
|
serdes_preemphasis_lane2_4=0x8fc0
|
||
|
|
serdes_driver_current_lane3_4=2
|
||
|
|
serdes_pre_driver_current_lane3_4=2
|
||
|
|
serdes_preemphasis_lane3_4=0x8fc0
|
||
|
|
serdes_driver_current_lane0_5=4
|
||
|
|
serdes_pre_driver_current_lane0_5=4
|
||
|
|
serdes_preemphasis_lane0_5=0xbf00
|
||
|
|
serdes_driver_current_lane1_5=4
|
||
|
|
serdes_pre_driver_current_lane1_5=4
|
||
|
|
serdes_preemphasis_lane1_5=0xbf00
|
||
|
|
serdes_driver_current_lane2_5=4
|
||
|
|
serdes_pre_driver_current_lane2_5=4
|
||
|
|
serdes_preemphasis_lane2_5=0xbf00
|
||
|
|
serdes_driver_current_lane3_5=4
|
||
|
|
serdes_pre_driver_current_lane3_5=4
|
||
|
|
serdes_preemphasis_lane3_5=0xbf00
|
||
|
|
serdes_driver_current_lane0_6=4
|
||
|
|
serdes_pre_driver_current_lane0_6=4
|
||
|
|
serdes_preemphasis_lane0_6=0xbb10
|
||
|
|
serdes_driver_current_lane1_6=4
|
||
|
|
serdes_pre_driver_current_lane1_6=4
|
||
|
|
serdes_preemphasis_lane1_6=0xbb10
|
||
|
|
serdes_driver_current_lane2_6=4
|
||
|
|
serdes_pre_driver_current_lane2_6=4
|
||
|
|
serdes_preemphasis_lane2_6=0xbb10
|
||
|
|
serdes_driver_current_lane3_6=4
|
||
|
|
serdes_pre_driver_current_lane3_6=4
|
||
|
|
serdes_preemphasis_lane3_6=0xbb10
|
||
|
|
serdes_driver_current_lane0_7=3
|
||
|
|
serdes_pre_driver_current_lane0_7=3
|
||
|
|
serdes_preemphasis_lane0_7=0xcad0
|
||
|
|
serdes_driver_current_lane1_7=3
|
||
|
|
serdes_pre_driver_current_lane1_7=3
|
||
|
|
serdes_preemphasis_lane1_7=0xcad0
|
||
|
|
serdes_driver_current_lane2_7=3
|
||
|
|
serdes_pre_driver_current_lane2_7=3
|
||
|
|
serdes_preemphasis_lane2_7=0xcad0
|
||
|
|
serdes_driver_current_lane3_7=3
|
||
|
|
serdes_pre_driver_current_lane3_7=3
|
||
|
|
serdes_preemphasis_lane3_7=0xcad0
|
||
|
|
serdes_driver_current_lane0_8=3
|
||
|
|
serdes_pre_driver_current_lane0_8=3
|
||
|
|
serdes_preemphasis_lane0_8=0xcad0
|
||
|
|
serdes_driver_current_lane1_8=3
|
||
|
|
serdes_pre_driver_current_lane1_8=3
|
||
|
|
serdes_preemphasis_lane1_8=0xcad0
|
||
|
|
serdes_driver_current_lane2_8=3
|
||
|
|
serdes_pre_driver_current_lane2_8=3
|
||
|
|
serdes_preemphasis_lane2_8=0xcad0
|
||
|
|
serdes_driver_current_lane3_8=3
|
||
|
|
serdes_pre_driver_current_lane3_8=3
|
||
|
|
serdes_preemphasis_lane3_8=0xcad0
|
||
|
|
serdes_driver_current_lane0_9=3
|
||
|
|
serdes_pre_driver_current_lane0_9=3
|
||
|
|
serdes_preemphasis_lane0_9=0xc2f0
|
||
|
|
serdes_driver_current_lane1_9=3
|
||
|
|
serdes_pre_driver_current_lane1_9=3
|
||
|
|
serdes_preemphasis_lane1_9=0xc2f0
|
||
|
|
serdes_driver_current_lane2_9=3
|
||
|
|
serdes_pre_driver_current_lane2_9=3
|
||
|
|
serdes_preemphasis_lane2_9=0xc2f0
|
||
|
|
serdes_driver_current_lane3_9=3
|
||
|
|
serdes_pre_driver_current_lane3_9=3
|
||
|
|
serdes_preemphasis_lane3_9=0xc2f0
|
||
|
|
serdes_driver_current_lane0_10=3
|
||
|
|
serdes_pre_driver_current_lane0_10=3
|
||
|
|
serdes_preemphasis_lane0_10=0xc6e0
|
||
|
|
serdes_driver_current_lane1_10=3
|
||
|
|
serdes_pre_driver_current_lane1_10=3
|
||
|
|
serdes_preemphasis_lane1_10=0xc6e0
|
||
|
|
serdes_driver_current_lane2_10=3
|
||
|
|
serdes_pre_driver_current_lane2_10=3
|
||
|
|
serdes_preemphasis_lane2_10=0xc6e0
|
||
|
|
serdes_driver_current_lane3_10=3
|
||
|
|
serdes_pre_driver_current_lane3_10=3
|
||
|
|
serdes_preemphasis_lane3_10=0xc6e0
|
||
|
|
serdes_driver_current_lane0_11=3
|
||
|
|
serdes_pre_driver_current_lane0_11=3
|
||
|
|
serdes_preemphasis_lane0_11=0xc2f0
|
||
|
|
serdes_driver_current_lane1_11=3
|
||
|
|
serdes_pre_driver_current_lane1_11=3
|
||
|
|
serdes_preemphasis_lane1_11=0xc2f0
|
||
|
|
serdes_driver_current_lane2_11=3
|
||
|
|
serdes_pre_driver_current_lane2_11=3
|
||
|
|
serdes_preemphasis_lane2_11=0xc2f0
|
||
|
|
serdes_driver_current_lane3_11=3
|
||
|
|
serdes_pre_driver_current_lane3_11=3
|
||
|
|
serdes_preemphasis_lane3_11=0xc2f0
|
||
|
|
serdes_driver_current_lane0_12=3
|
||
|
|
serdes_pre_driver_current_lane0_12=3
|
||
|
|
serdes_preemphasis_lane0_12=0xc2f0
|
||
|
|
serdes_driver_current_lane1_12=3
|
||
|
|
serdes_pre_driver_current_lane1_12=3
|
||
|
|
serdes_preemphasis_lane1_12=0xc2f0
|
||
|
|
serdes_driver_current_lane2_12=3
|
||
|
|
serdes_pre_driver_current_lane2_12=3
|
||
|
|
serdes_preemphasis_lane2_12=0xc2f0
|
||
|
|
serdes_driver_current_lane3_12=3
|
||
|
|
serdes_pre_driver_current_lane3_12=3
|
||
|
|
serdes_preemphasis_lane3_12=0xc2f0
|
||
|
|
serdes_driver_current_lane0_13=3
|
||
|
|
serdes_pre_driver_current_lane0_13=3
|
||
|
|
serdes_preemphasis_lane0_13=0xc2f0
|
||
|
|
serdes_driver_current_lane1_13=3
|
||
|
|
serdes_pre_driver_current_lane1_13=3
|
||
|
|
serdes_preemphasis_lane1_13=0xc2f0
|
||
|
|
serdes_driver_current_lane2_13=3
|
||
|
|
serdes_pre_driver_current_lane2_13=3
|
||
|
|
serdes_preemphasis_lane2_13=0xc2f0
|
||
|
|
serdes_driver_current_lane3_13=3
|
||
|
|
serdes_pre_driver_current_lane3_13=3
|
||
|
|
serdes_preemphasis_lane3_13=0xc2f0
|
||
|
|
serdes_driver_current_lane0_14=3
|
||
|
|
serdes_pre_driver_current_lane0_14=3
|
||
|
|
serdes_preemphasis_lane0_14=0xc2f0
|
||
|
|
serdes_driver_current_lane1_14=3
|
||
|
|
serdes_pre_driver_current_lane1_14=3
|
||
|
|
serdes_preemphasis_lane1_14=0xc2f0
|
||
|
|
serdes_driver_current_lane2_14=3
|
||
|
|
serdes_pre_driver_current_lane2_14=3
|
||
|
|
serdes_preemphasis_lane2_14=0xc2f0
|
||
|
|
serdes_driver_current_lane3_14=3
|
||
|
|
serdes_pre_driver_current_lane3_14=3
|
||
|
|
serdes_preemphasis_lane3_14=0xc2f0
|
||
|
|
serdes_driver_current_lane0_15=3
|
||
|
|
serdes_pre_driver_current_lane0_15=3
|
||
|
|
serdes_preemphasis_lane0_15=0xc2f0
|
||
|
|
serdes_driver_current_lane1_15=3
|
||
|
|
serdes_pre_driver_current_lane1_15=3
|
||
|
|
serdes_preemphasis_lane1_15=0xc2f0
|
||
|
|
serdes_driver_current_lane2_15=3
|
||
|
|
serdes_pre_driver_current_lane2_15=3
|
||
|
|
serdes_preemphasis_lane2_15=0xc2f0
|
||
|
|
serdes_driver_current_lane3_15=3
|
||
|
|
serdes_pre_driver_current_lane3_15=3
|
||
|
|
serdes_preemphasis_lane3_15=0xc2f0
|
||
|
|
serdes_driver_current_lane0_16=3
|
||
|
|
serdes_pre_driver_current_lane0_16=3
|
||
|
|
serdes_preemphasis_lane0_16=0xc2f0
|
||
|
|
serdes_driver_current_lane1_16=3
|
||
|
|
serdes_pre_driver_current_lane1_16=3
|
||
|
|
serdes_preemphasis_lane1_16=0xc2f0
|
||
|
|
serdes_driver_current_lane2_16=3
|
||
|
|
serdes_pre_driver_current_lane2_16=3
|
||
|
|
serdes_preemphasis_lane2_16=0xc2f0
|
||
|
|
serdes_driver_current_lane3_16=3
|
||
|
|
serdes_pre_driver_current_lane3_16=3
|
||
|
|
serdes_preemphasis_lane3_16=0xc2f0
|
||
|
|
serdes_driver_current_lane0_17=3
|
||
|
|
serdes_pre_driver_current_lane0_17=3
|
||
|
|
serdes_preemphasis_lane0_17=0xc2f0
|
||
|
|
serdes_driver_current_lane1_17=3
|
||
|
|
serdes_pre_driver_current_lane1_17=3
|
||
|
|
serdes_preemphasis_lane1_17=0xc2f0
|
||
|
|
serdes_driver_current_lane2_17=3
|
||
|
|
serdes_pre_driver_current_lane2_17=3
|
||
|
|
serdes_preemphasis_lane2_17=0xc2f0
|
||
|
|
serdes_driver_current_lane3_17=3
|
||
|
|
serdes_pre_driver_current_lane3_17=3
|
||
|
|
serdes_preemphasis_lane3_17=0xc2f0
|
||
|
|
serdes_driver_current_lane0_18=3
|
||
|
|
serdes_pre_driver_current_lane0_18=3
|
||
|
|
serdes_preemphasis_lane0_18=0xc2f0
|
||
|
|
serdes_driver_current_lane1_18=3
|
||
|
|
serdes_pre_driver_current_lane1_18=3
|
||
|
|
serdes_preemphasis_lane1_18=0xc2f0
|
||
|
|
serdes_driver_current_lane2_18=3
|
||
|
|
serdes_pre_driver_current_lane2_18=3
|
||
|
|
serdes_preemphasis_lane2_18=0xc2f0
|
||
|
|
serdes_driver_current_lane3_18=3
|
||
|
|
serdes_pre_driver_current_lane3_18=3
|
||
|
|
serdes_preemphasis_lane3_18=0xc2f0
|
||
|
|
serdes_driver_current_lane0_19=3
|
||
|
|
serdes_pre_driver_current_lane0_19=3
|
||
|
|
serdes_preemphasis_lane0_19=0xc2f0
|
||
|
|
serdes_driver_current_lane1_19=3
|
||
|
|
serdes_pre_driver_current_lane1_19=3
|
||
|
|
serdes_preemphasis_lane1_19=0xc2f0
|
||
|
|
serdes_driver_current_lane2_19=3
|
||
|
|
serdes_pre_driver_current_lane2_19=3
|
||
|
|
serdes_preemphasis_lane2_19=0xc2f0
|
||
|
|
serdes_driver_current_lane3_19=3
|
||
|
|
serdes_pre_driver_current_lane3_19=3
|
||
|
|
serdes_preemphasis_lane3_19=0xc2f0
|
||
|
|
serdes_driver_current_lane0_20=3
|
||
|
|
serdes_pre_driver_current_lane0_20=3
|
||
|
|
serdes_preemphasis_lane0_20=0xc2f0
|
||
|
|
serdes_driver_current_lane1_20=3
|
||
|
|
serdes_pre_driver_current_lane1_20=3
|
||
|
|
serdes_preemphasis_lane1_20=0xc2f0
|
||
|
|
serdes_driver_current_lane2_20=3
|
||
|
|
serdes_pre_driver_current_lane2_20=3
|
||
|
|
serdes_preemphasis_lane2_20=0xc2f0
|
||
|
|
serdes_driver_current_lane3_20=3
|
||
|
|
serdes_pre_driver_current_lane3_20=3
|
||
|
|
serdes_preemphasis_lane3_20=0xc2f0
|
||
|
|
serdes_driver_current_lane0_21=3
|
||
|
|
serdes_pre_driver_current_lane0_21=3
|
||
|
|
serdes_preemphasis_lane0_21=0xc6e0
|
||
|
|
serdes_driver_current_lane1_21=3
|
||
|
|
serdes_pre_driver_current_lane1_21=3
|
||
|
|
serdes_preemphasis_lane1_21=0xc6e0
|
||
|
|
serdes_driver_current_lane2_21=3
|
||
|
|
serdes_pre_driver_current_lane2_21=3
|
||
|
|
serdes_preemphasis_lane2_21=0xc6e0
|
||
|
|
serdes_driver_current_lane3_21=3
|
||
|
|
serdes_pre_driver_current_lane3_21=3
|
||
|
|
serdes_preemphasis_lane3_21=0xc6e0
|
||
|
|
serdes_driver_current_lane0_22=3
|
||
|
|
serdes_pre_driver_current_lane0_22=3
|
||
|
|
serdes_preemphasis_lane0_22=0xc6e0
|
||
|
|
serdes_driver_current_lane1_22=3
|
||
|
|
serdes_pre_driver_current_lane1_22=3
|
||
|
|
serdes_preemphasis_lane1_22=0xc6e0
|
||
|
|
serdes_driver_current_lane2_22=3
|
||
|
|
serdes_pre_driver_current_lane2_22=3
|
||
|
|
serdes_preemphasis_lane2_22=0xc6e0
|
||
|
|
serdes_driver_current_lane3_22=3
|
||
|
|
serdes_pre_driver_current_lane3_22=3
|
||
|
|
serdes_preemphasis_lane3_22=0xc6e0
|
||
|
|
serdes_driver_current_lane0_23=3
|
||
|
|
serdes_pre_driver_current_lane0_23=3
|
||
|
|
serdes_preemphasis_lane0_23=0xcad0
|
||
|
|
serdes_driver_current_lane1_23=3
|
||
|
|
serdes_pre_driver_current_lane1_23=3
|
||
|
|
serdes_preemphasis_lane1_23=0xcad0
|
||
|
|
serdes_driver_current_lane2_23=3
|
||
|
|
serdes_pre_driver_current_lane2_23=3
|
||
|
|
serdes_preemphasis_lane2_23=0xcad0
|
||
|
|
serdes_driver_current_lane3_23=3
|
||
|
|
serdes_pre_driver_current_lane3_23=3
|
||
|
|
serdes_preemphasis_lane3_23=0xcad0
|
||
|
|
serdes_driver_current_lane0_24=3
|
||
|
|
serdes_pre_driver_current_lane0_24=3
|
||
|
|
serdes_preemphasis_lane0_24=0xcad0
|
||
|
|
serdes_driver_current_lane1_24=3
|
||
|
|
serdes_pre_driver_current_lane1_24=3
|
||
|
|
serdes_preemphasis_lane1_24=0xcad0
|
||
|
|
serdes_driver_current_lane2_24=3
|
||
|
|
serdes_pre_driver_current_lane2_24=3
|
||
|
|
serdes_preemphasis_lane2_24=0xcad0
|
||
|
|
serdes_driver_current_lane3_24=3
|
||
|
|
serdes_pre_driver_current_lane3_24=3
|
||
|
|
serdes_preemphasis_lane3_24=0xcad0
|
||
|
|
serdes_driver_current_lane0_25=5
|
||
|
|
serdes_pre_driver_current_lane0_25=5
|
||
|
|
serdes_preemphasis_lane0_25=0xc2f0
|
||
|
|
serdes_driver_current_lane1_25=5
|
||
|
|
serdes_pre_driver_current_lane1_25=5
|
||
|
|
serdes_preemphasis_lane1_25=0xc2f0
|
||
|
|
serdes_driver_current_lane2_25=5
|
||
|
|
serdes_pre_driver_current_lane2_25=5
|
||
|
|
serdes_preemphasis_lane2_25=0xc2f0
|
||
|
|
serdes_driver_current_lane3_25=5
|
||
|
|
serdes_pre_driver_current_lane3_25=5
|
||
|
|
serdes_preemphasis_lane3_25=0xc2f0
|
||
|
|
serdes_driver_current_lane0_26=5
|
||
|
|
serdes_pre_driver_current_lane0_26=5
|
||
|
|
serdes_preemphasis_lane0_26=0xc2f0
|
||
|
|
serdes_driver_current_lane1_26=5
|
||
|
|
serdes_pre_driver_current_lane1_26=5
|
||
|
|
serdes_preemphasis_lane1_26=0xc2f0
|
||
|
|
serdes_driver_current_lane2_26=5
|
||
|
|
serdes_pre_driver_current_lane2_26=5
|
||
|
|
serdes_preemphasis_lane2_26=0xc2f0
|
||
|
|
serdes_driver_current_lane3_26=5
|
||
|
|
serdes_pre_driver_current_lane3_26=5
|
||
|
|
serdes_preemphasis_lane3_26=0xc2f0
|
||
|
|
serdes_driver_current_lane0_27=5
|
||
|
|
serdes_pre_driver_current_lane0_27=5
|
||
|
|
serdes_preemphasis_lane0_27=0xc2f0
|
||
|
|
serdes_driver_current_lane1_27=5
|
||
|
|
serdes_pre_driver_current_lane1_27=5
|
||
|
|
serdes_preemphasis_lane1_27=0xc2f0
|
||
|
|
serdes_driver_current_lane2_27=5
|
||
|
|
serdes_pre_driver_current_lane2_27=5
|
||
|
|
serdes_preemphasis_lane2_27=0xc2f0
|
||
|
|
serdes_driver_current_lane3_27=5
|
||
|
|
serdes_pre_driver_current_lane3_27=5
|
||
|
|
serdes_preemphasis_lane3_27=0xc2f0
|
||
|
|
serdes_driver_current_lane0_28=8
|
||
|
|
serdes_pre_driver_current_lane0_28=6
|
||
|
|
serdes_preemphasis_lane0_28=0xc2f0
|
||
|
|
serdes_driver_current_lane1_28=8
|
||
|
|
serdes_pre_driver_current_lane1_28=6
|
||
|
|
serdes_preemphasis_lane1_28=0xc2f0
|
||
|
|
serdes_driver_current_lane2_28=8
|
||
|
|
serdes_pre_driver_current_lane2_28=6
|
||
|
|
serdes_preemphasis_lane2_28=0xc2f0
|
||
|
|
serdes_driver_current_lane3_28=8
|
||
|
|
serdes_pre_driver_current_lane3_28=6
|
||
|
|
serdes_preemphasis_lane3_28=0xc2f0
|
||
|
|
serdes_driver_current_lane0_29=2
|
||
|
|
serdes_pre_driver_current_lane0_29=2
|
||
|
|
serdes_preemphasis_lane0_29=0x8fc0
|
||
|
|
serdes_driver_current_lane1_29=2
|
||
|
|
serdes_pre_driver_current_lane1_29=2
|
||
|
|
serdes_preemphasis_lane1_29=0x8fc0
|
||
|
|
serdes_driver_current_lane2_29=2
|
||
|
|
serdes_pre_driver_current_lane2_29=2
|
||
|
|
serdes_preemphasis_lane2_29=0x8fc0
|
||
|
|
serdes_driver_current_lane3_29=2
|
||
|
|
serdes_pre_driver_current_lane3_29=2
|
||
|
|
serdes_preemphasis_lane3_29=0x8fc0
|
||
|
|
serdes_driver_current_lane0_30=2
|
||
|
|
serdes_pre_driver_current_lane0_30=2
|
||
|
|
serdes_preemphasis_lane0_30=0x8fc0
|
||
|
|
serdes_driver_current_lane1_30=2
|
||
|
|
serdes_pre_driver_current_lane1_30=2
|
||
|
|
serdes_preemphasis_lane1_30=0x8fc0
|
||
|
|
serdes_driver_current_lane2_30=2
|
||
|
|
serdes_pre_driver_current_lane2_30=2
|
||
|
|
serdes_preemphasis_lane2_30=0x8fc0
|
||
|
|
serdes_driver_current_lane3_30=2
|
||
|
|
serdes_pre_driver_current_lane3_30=2
|
||
|
|
serdes_preemphasis_lane3_30=0x8fc0
|
||
|
|
serdes_driver_current_lane0_31=2
|
||
|
|
serdes_pre_driver_current_lane0_31=2
|
||
|
|
serdes_preemphasis_lane0_31=0x8fc0
|
||
|
|
serdes_driver_current_lane1_31=2
|
||
|
|
serdes_pre_driver_current_lane1_31=2
|
||
|
|
serdes_preemphasis_lane1_31=0x8fc0
|
||
|
|
serdes_driver_current_lane2_31=2
|
||
|
|
serdes_pre_driver_current_lane2_31=2
|
||
|
|
serdes_preemphasis_lane2_31=0x8fc0
|
||
|
|
serdes_driver_current_lane3_31=2
|
||
|
|
serdes_pre_driver_current_lane3_31=2
|
||
|
|
serdes_preemphasis_lane3_31=0x8fc0
|
||
|
|
serdes_driver_current_lane0_32=2
|
||
|
|
serdes_pre_driver_current_lane0_32=2
|
||
|
|
serdes_preemphasis_lane0_32=0x8fc0
|
||
|
|
serdes_driver_current_lane1_32=2
|
||
|
|
serdes_pre_driver_current_lane1_32=2
|
||
|
|
serdes_preemphasis_lane1_32=0x8fc0
|
||
|
|
serdes_driver_current_lane2_32=2
|
||
|
|
serdes_pre_driver_current_lane2_32=2
|
||
|
|
serdes_preemphasis_lane2_32=0x8fc0
|
||
|
|
serdes_driver_current_lane3_32=2
|
||
|
|
serdes_pre_driver_current_lane3_32=2
|
||
|
|
serdes_preemphasis_lane3_32=0x8fc0
|