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sonic-buildimage/device/mellanox/x86_64-mlnx_msn4600c-r0/Mellanox-SN4600C-D112C8/pg_profile_lookup.ini

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Support single ingress pool for MSFT SKUs and optimize headroom calculation (#4686) Calculate pool size in t1 as 24 * downlink port + 8 * uplink port - Take both port and peer MTU into account when calculating headroom - Worst case factor is decreased to 50% - Mellanox-SN2700-C28D8 t0, assume 48 * 50G/5m + 8 * 100G/40m ports - Mellanox-SN2700 (C32) - t0: 16 * 100G/5m + 16 * 100G/40m - t1: 16 * 100G/40m + 16 * 100G/300m Signed-off-by: Stephen Sun <stephens@mellanox.com> Co-authored-by: Stephen Sun <stephens@mellanox.com>
2020-08-13 05:12:09 -05:00
# PG lossless profiles.
# speed cable size xon xoff threshold
Support shared headroom pool for Microsoft SKUs (#6366) - Why I did it Support shared headroom pool Signed-off-by: Stephen Sun stephens@nvidia.com - How I did it Port configurations for SKUs based on 2700/3800 platform from 201911 For SN3800 platform: C64: 32 100G down links and 32 100G up links. D112C8: 112 50G down links and 8 100G up links. D24C52: 24 50G down links, 20 100G down links, and 32 100G up links. D28C50: 28 50G down links, 18 100G down links, and 32 100G up links. For SN2700 platform: D48C8: 48 50G down links and 8 100G up links C32: 16 100G downlinks and 16 100G uplinks Add configuration for Mellanox-SN4600C-D112C8 112 50G down links and 8 100G up links. - How to verify it Run regression test.
2021-02-16 10:53:40 -06:00
10000 5m 19456 19456 24576 0
[Mellanox] Adjust buffer parameters with 2km cable supported for 4600C non-generic SKUs (#9215) - Why I did it Also recalculated all parameters with the latest algorithm with per-speed peer response time taken into account - How I did it Detailed information of each SKU: C64: t0: 32 100G downlinks and 32 100G uplinks t1: 56 100G downlinks and 8 100G uplinks with 2km-cable supported D112C8: 112 50G downlinks and 8 100G uplinks. D48C40: 48 50G downlinks, 32 100G downlinks, and 8 100G uplinks D100C12S2: 4 100G downlinks, 2 10G downlinks, 100 50G downlinks, and 8 100G uplinks 2km cable is supported for C64 on t1 only - How to verify it Run regression test (QoS) Signed-off-by: Stephen Sun <stephens@nvidia.com>
2021-12-08 07:51:33 -06:00
25000 5m 19456 19456 26624 0
40000 5m 19456 19456 30720 0
50000 5m 19456 19456 33792 0
100000 5m 19456 19456 59392 0
10000 40m 19456 19456 25600 0
25000 40m 19456 19456 28672 0
40000 40m 19456 19456 33792 0
50000 40m 19456 19456 36864 0
100000 40m 19456 19456 66560 0
Support shared headroom pool for Microsoft SKUs (#6366) - Why I did it Support shared headroom pool Signed-off-by: Stephen Sun stephens@nvidia.com - How I did it Port configurations for SKUs based on 2700/3800 platform from 201911 For SN3800 platform: C64: 32 100G down links and 32 100G up links. D112C8: 112 50G down links and 8 100G up links. D24C52: 24 50G down links, 20 100G down links, and 32 100G up links. D28C50: 28 50G down links, 18 100G down links, and 32 100G up links. For SN2700 platform: D48C8: 48 50G down links and 8 100G up links C32: 16 100G downlinks and 16 100G uplinks Add configuration for Mellanox-SN4600C-D112C8 112 50G down links and 8 100G up links. - How to verify it Run regression test.
2021-02-16 10:53:40 -06:00
10000 300m 19456 19456 30720 0
[Mellanox] Adjust buffer parameters with 2km cable supported for 4600C non-generic SKUs (#9215) - Why I did it Also recalculated all parameters with the latest algorithm with per-speed peer response time taken into account - How I did it Detailed information of each SKU: C64: t0: 32 100G downlinks and 32 100G uplinks t1: 56 100G downlinks and 8 100G uplinks with 2km-cable supported D112C8: 112 50G downlinks and 8 100G uplinks. D48C40: 48 50G downlinks, 32 100G downlinks, and 8 100G uplinks D100C12S2: 4 100G downlinks, 2 10G downlinks, 100 50G downlinks, and 8 100G uplinks 2km cable is supported for C64 on t1 only - How to verify it Run regression test (QoS) Signed-off-by: Stephen Sun <stephens@nvidia.com>
2021-12-08 07:51:33 -06:00
25000 300m 19456 19456 41984 0
40000 300m 19456 19456 54272 0
50000 300m 19456 19456 63488 0
100000 300m 19456 19456 120832 0
Add Mellanox-SN4600C-D100C12S2 SKU (#8754) *[mellanox] Add D100C12S2 SKU to 4600C
2021-09-16 15:31:30 -05:00
10000 2000m 19456 19456 32768 0
[Mellanox] Adjust buffer parameters with 2km cable supported for 4600C non-generic SKUs (#9215) - Why I did it Also recalculated all parameters with the latest algorithm with per-speed peer response time taken into account - How I did it Detailed information of each SKU: C64: t0: 32 100G downlinks and 32 100G uplinks t1: 56 100G downlinks and 8 100G uplinks with 2km-cable supported D112C8: 112 50G downlinks and 8 100G uplinks. D48C40: 48 50G downlinks, 32 100G downlinks, and 8 100G uplinks D100C12S2: 4 100G downlinks, 2 10G downlinks, 100 50G downlinks, and 8 100G uplinks 2km cable is supported for C64 on t1 only - How to verify it Run regression test (QoS) Signed-off-by: Stephen Sun <stephens@nvidia.com>
2021-12-08 07:51:33 -06:00
25000 2000m 19456 19456 64512 0
40000 2000m 19456 19456 97280 0
50000 2000m 19456 19456 119808 0
100000 2000m 19456 19456 234496 0
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